From 13e14ba93c8bc40c861d06b30f7a02f5c44514e4 Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Wed, 29 Feb 2012 01:51:39 -0500 Subject: EIO: update stats (mostly order change, some renames) --- .../ref/alpha/eio/simple-atomic/config.ini | 27 +++++-- .../ref/alpha/eio/simple-atomic/simerr | 7 +- .../ref/alpha/eio/simple-atomic/simout | 16 ++-- .../ref/alpha/eio/simple-atomic/stats.txt | 92 +++++++++++++--------- 4 files changed, 83 insertions(+), 59 deletions(-) (limited to 'tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic') diff --git a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/config.ini b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/config.ini index 1a56ca25e..7c413d69b 100644 --- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/config.ini +++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/config.ini @@ -1,6 +1,7 @@ [root] type=Root children=system +full_system=false time_sync_enable=false time_sync_period=100000000000 time_sync_spin_threshold=100000000 @@ -8,8 +9,16 @@ time_sync_spin_threshold=100000000 [system] type=System children=cpu membus physmem +boot_osflags=a +init_param=0 +kernel= +load_addr_mask=1099511627775 mem_mode=atomic +memories=system.physmem +num_work_ids=16 physmem=system.physmem +readfile= +symbolfile= work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 work_begin_exit_count=0 @@ -17,19 +26,22 @@ work_cpus_ckpt_count=0 work_end_ckpt_count=0 work_end_exit_count=0 work_item_id=-1 +system_port=system.membus.slave[0] [system.cpu] type=AtomicSimpleCPU -children=dtb itb tracer workload +children=dtb interrupts itb tracer workload checker=Null clock=500 cpu_id=0 defer_registration=false do_checkpoint_insts=true +do_quiesce=true do_statistics_insts=true dtb=system.cpu.dtb function_trace=false function_trace_start=0 +interrupts=system.cpu.interrupts itb=system.cpu.itb max_insts_all_threads=0 max_insts_any_thread=500000 @@ -37,6 +49,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 phase=0 +profile=0 progress_interval=0 simulate_data_stalls=false simulate_inst_stalls=false @@ -44,13 +57,16 @@ system=system tracer=system.cpu.tracer width=1 workload=system.cpu.workload -dcache_port=system.membus.port[2] -icache_port=system.membus.port[1] +dcache_port=system.membus.slave[2] +icache_port=system.membus.slave[1] [system.cpu.dtb] type=AlphaTLB size=64 +[system.cpu.interrupts] +type=AlphaInterrupts + [system.cpu.itb] type=AlphaTLB size=48 @@ -76,7 +92,8 @@ clock=1000 header_cycles=1 use_default_range=false width=64 -port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port +master=system.physmem.port[0] +slave=system.system_port system.cpu.icache_port system.cpu.dcache_port [system.physmem] type=PhysicalMemory @@ -86,5 +103,5 @@ latency_var=0 null=false range=0:134217727 zero=false -port=system.membus.port[0] +port=system.membus.master[0] diff --git a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simerr b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simerr index 47fb3b40c..850fc5669 100755 --- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simerr +++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simerr @@ -1,9 +1,6 @@ warn: Sockets disabled, not accepting gdb connections -For more information see: http://www.m5sim.org/warn/d946bea6 -warn: Prefetch instrutions is Alpha do not do anything -For more information see: http://www.m5sim.org/warn/3e0eccba -warn: Prefetch instrutions is Alpha do not do anything -For more information see: http://www.m5sim.org/warn/3e0eccba +warn: Prefetch instructions in Alpha do not do anything +warn: Prefetch instructions in Alpha do not do anything hack: be nice to actually delete the event here gzip: stdout: Broken pipe diff --git a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simout b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simout index 4c837ce08..94e5c0a9b 100755 --- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simout +++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simout @@ -1,14 +1,10 @@ -M5 Simulator System +gem5 Simulator System. http://gem5.org +gem5 is copyrighted software; use the --copyright option for details. -Copyright (c) 2001-2008 -The Regents of The University of Michigan -All Rights Reserved - - -M5 compiled Apr 19 2011 11:52:53 -M5 started Apr 19 2011 11:58:24 -M5 executing on maize -command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/20.eio-short/alpha/eio/simple-atomic -re tests/run.py build/ALPHA_SE/tests/fast/quick/20.eio-short/alpha/eio/simple-atomic +gem5 compiled Feb 29 2012 00:47:21 +gem5 started Feb 29 2012 00:51:57 +gem5 executing on zizzer +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic -re tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... main dictionary has 1245 entries diff --git a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt index aaf712409..5065b3dff 100644 --- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt +++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt @@ -1,66 +1,80 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 5358491 # Simulator instruction rate (inst/s) -host_mem_usage 194108 # Number of bytes of host memory used -host_seconds 0.09 # Real time elapsed on the host -host_tick_rate 2674844665 # Simulator tick rate (ticks/s) -sim_freq 1000000000000 # Frequency of simulated ticks -sim_insts 500001 # Number of instructions simulated sim_seconds 0.000250 # Number of seconds simulated sim_ticks 250015500 # Number of ticks simulated -system.cpu.dtb.data_accesses 180793 # DTB accesses -system.cpu.dtb.data_acv 0 # DTB access violations -system.cpu.dtb.data_hits 180775 # DTB hits -system.cpu.dtb.data_misses 18 # DTB misses -system.cpu.dtb.fetch_accesses 0 # ITB accesses -system.cpu.dtb.fetch_acv 0 # ITB acv +final_tick 250015500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_freq 1000000000000 # Frequency of simulated ticks +host_inst_rate 3174528 # Simulator instruction rate (inst/s) +host_op_rate 3174125 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1586983445 # Simulator tick rate (ticks/s) +host_mem_usage 203780 # Number of bytes of host memory used +host_seconds 0.16 # Real time elapsed on the host +sim_insts 500001 # Number of instructions simulated +sim_ops 500001 # Number of ops (including micro ops) simulated +system.physmem.bytes_read 2872676 # Number of bytes read from this memory +system.physmem.bytes_inst_read 2000076 # Number of instructions bytes read from this memory +system.physmem.bytes_written 417562 # Number of bytes written to this memory +system.physmem.num_reads 624454 # Number of read requests responded to by this memory +system.physmem.num_writes 56340 # Number of write requests responded to by this memory +system.physmem.num_other 0 # Number of other requests responded to by this memory +system.physmem.bw_read 11489991621 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read 7999808012 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_write 1670144451 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_total 13160136072 # Total bandwidth to/from this memory (bytes/s) system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses -system.cpu.dtb.read_accesses 124443 # DTB read accesses -system.cpu.dtb.read_acv 0 # DTB read access violations +system.cpu.dtb.fetch_acv 0 # ITB acv +system.cpu.dtb.fetch_accesses 0 # ITB accesses system.cpu.dtb.read_hits 124435 # DTB read hits system.cpu.dtb.read_misses 8 # DTB read misses -system.cpu.dtb.write_accesses 56350 # DTB write accesses -system.cpu.dtb.write_acv 0 # DTB write access violations +system.cpu.dtb.read_acv 0 # DTB read access violations +system.cpu.dtb.read_accesses 124443 # DTB read accesses system.cpu.dtb.write_hits 56340 # DTB write hits system.cpu.dtb.write_misses 10 # DTB write misses -system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.itb.data_accesses 0 # DTB accesses -system.cpu.itb.data_acv 0 # DTB access violations -system.cpu.itb.data_hits 0 # DTB hits -system.cpu.itb.data_misses 0 # DTB misses -system.cpu.itb.fetch_accesses 500032 # ITB accesses -system.cpu.itb.fetch_acv 0 # ITB acv +system.cpu.dtb.write_acv 0 # DTB write access violations +system.cpu.dtb.write_accesses 56350 # DTB write accesses +system.cpu.dtb.data_hits 180775 # DTB hits +system.cpu.dtb.data_misses 18 # DTB misses +system.cpu.dtb.data_acv 0 # DTB access violations +system.cpu.dtb.data_accesses 180793 # DTB accesses system.cpu.itb.fetch_hits 500019 # ITB hits system.cpu.itb.fetch_misses 13 # ITB misses -system.cpu.itb.read_accesses 0 # DTB read accesses -system.cpu.itb.read_acv 0 # DTB read access violations +system.cpu.itb.fetch_acv 0 # ITB acv +system.cpu.itb.fetch_accesses 500032 # ITB accesses system.cpu.itb.read_hits 0 # DTB read hits system.cpu.itb.read_misses 0 # DTB read misses -system.cpu.itb.write_accesses 0 # DTB write accesses -system.cpu.itb.write_acv 0 # DTB write access violations +system.cpu.itb.read_acv 0 # DTB read access violations +system.cpu.itb.read_accesses 0 # DTB read accesses system.cpu.itb.write_hits 0 # DTB write hits system.cpu.itb.write_misses 0 # DTB write misses -system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles +system.cpu.itb.write_acv 0 # DTB write access violations +system.cpu.itb.write_accesses 0 # DTB write accesses +system.cpu.itb.data_hits 0 # DTB hits +system.cpu.itb.data_misses 0 # DTB misses +system.cpu.itb.data_acv 0 # DTB access violations +system.cpu.itb.data_accesses 0 # DTB accesses +system.cpu.workload.num_syscalls 18 # Number of system calls system.cpu.numCycles 500032 # number of cpu cycles simulated -system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu.num_busy_cycles 500032 # Number of busy cycles -system.cpu.num_conditional_control_insts 38180 # number of instructions that are conditional controls +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.committedInsts 500001 # Number of instructions committed +system.cpu.committedOps 500001 # Number of ops (including micro ops) committed +system.cpu.num_int_alu_accesses 474689 # Number of integer alu accesses system.cpu.num_fp_alu_accesses 32 # Number of float alu accesses -system.cpu.num_fp_insts 32 # number of float instructions -system.cpu.num_fp_register_reads 32 # number of times the floating registers were read -system.cpu.num_fp_register_writes 16 # number of times the floating registers were written system.cpu.num_func_calls 14357 # number of times a function call or return occured -system.cpu.num_idle_cycles 0 # Number of idle cycles -system.cpu.num_insts 500001 # Number of instructions executed -system.cpu.num_int_alu_accesses 474689 # Number of integer alu accesses +system.cpu.num_conditional_control_insts 38180 # number of instructions that are conditional controls system.cpu.num_int_insts 474689 # number of integer instructions +system.cpu.num_fp_insts 32 # number of float instructions system.cpu.num_int_register_reads 654286 # number of times the integer registers were read system.cpu.num_int_register_writes 371542 # number of times the integer registers were written -system.cpu.num_load_insts 124443 # Number of load instructions +system.cpu.num_fp_register_reads 32 # number of times the floating registers were read +system.cpu.num_fp_register_writes 16 # number of times the floating registers were written system.cpu.num_mem_refs 180793 # number of memory refs +system.cpu.num_load_insts 124443 # Number of load instructions system.cpu.num_store_insts 56350 # Number of store instructions -system.cpu.workload.num_syscalls 18 # Number of system calls +system.cpu.num_idle_cycles 0 # Number of idle cycles +system.cpu.num_busy_cycles 500032 # Number of busy cycles +system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles +system.cpu.idle_fraction 0 # Percentage of idle cycles ---------- End Simulation Statistics ---------- -- cgit v1.2.3