From 84f138ba96201431513eb2ae5f847389ac731aa2 Mon Sep 17 00:00:00 2001 From: Curtis Dunham Date: Thu, 21 Jul 2016 17:19:18 +0100 Subject: stats: update references --- .../ref/sparc/linux/o3-timing-mp/config.ini | 142 ++++++++++++++++++++- .../ref/sparc/linux/o3-timing-mp/simerr | 5 + .../ref/sparc/linux/o3-timing-mp/simout | 72 ++++++----- .../ref/sparc/linux/o3-timing-mp/stats.txt | 12 +- .../ref/sparc/linux/simple-atomic-mp/config.ini | 142 ++++++++++++++++++++- .../ref/sparc/linux/simple-atomic-mp/simerr | 5 + .../ref/sparc/linux/simple-atomic-mp/simout | 10 +- .../ref/sparc/linux/simple-atomic-mp/stats.txt | 12 +- .../ref/sparc/linux/simple-timing-mp/config.ini | 142 ++++++++++++++++++++- .../ref/sparc/linux/simple-timing-mp/simerr | 5 + .../ref/sparc/linux/simple-timing-mp/simout | 60 ++++----- .../ref/sparc/linux/simple-timing-mp/stats.txt | 12 +- 12 files changed, 530 insertions(+), 89 deletions(-) (limited to 'tests/quick/se/40.m5threads-test-atomic') diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini index 485cbfda8..0109ebfd6 100644 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini @@ -14,6 +14,7 @@ children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain dvfs_handler l2c membus p boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 exit_on_work_items=false init_param=0 @@ -27,6 +28,10 @@ memories=system.physmem mmap_using_noreserve=false multi_thread=false num_work_ids=16 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null readfile= symbolfile= thermal_components= @@ -72,6 +77,7 @@ cpu_id=0 decodeToFetchDelay=1 decodeToRenameDelay=1 decodeWidth=8 +default_p_state=UNDEFINED dispatchWidth=8 do_checkpoint_insts=true do_quiesce=true @@ -108,6 +114,10 @@ numPhysIntRegs=256 numROBEntries=192 numRobs=1 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 renameToDecodeDelay=1 @@ -167,12 +177,17 @@ addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -191,8 +206,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -515,12 +535,17 @@ addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -539,8 +564,13 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -571,7 +601,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/home/stever/hg/m5sim.org/gem5/tests/test-progs/m5threads/bin/sparc/linux/test_atomic +executable=/arm/projectscratch/randd/systems/dist/test-progs/m5threads/bin/sparc/linux/test_atomic gid=100 input=cin kvmInSE=false @@ -608,6 +638,7 @@ cpu_id=1 decodeToFetchDelay=1 decodeToRenameDelay=1 decodeWidth=8 +default_p_state=UNDEFINED dispatchWidth=8 do_checkpoint_insts=true do_quiesce=true @@ -644,6 +675,10 @@ numPhysIntRegs=256 numROBEntries=192 numRobs=1 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 renameToDecodeDelay=1 @@ -703,12 +738,17 @@ addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -727,8 +767,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -1051,12 +1096,17 @@ addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -1075,8 +1125,13 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -1121,6 +1176,7 @@ cpu_id=2 decodeToFetchDelay=1 decodeToRenameDelay=1 decodeWidth=8 +default_p_state=UNDEFINED dispatchWidth=8 do_checkpoint_insts=true do_quiesce=true @@ -1157,6 +1213,10 @@ numPhysIntRegs=256 numROBEntries=192 numRobs=1 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 renameToDecodeDelay=1 @@ -1216,12 +1276,17 @@ addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -1240,8 +1305,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -1564,12 +1634,17 @@ addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -1588,8 +1663,13 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -1634,6 +1714,7 @@ cpu_id=3 decodeToFetchDelay=1 decodeToRenameDelay=1 decodeWidth=8 +default_p_state=UNDEFINED dispatchWidth=8 do_checkpoint_insts=true do_quiesce=true @@ -1670,6 +1751,10 @@ numPhysIntRegs=256 numROBEntries=192 numRobs=1 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 renameToDecodeDelay=1 @@ -1729,12 +1814,17 @@ addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -1753,8 +1843,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -2077,12 +2172,17 @@ addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -2101,8 +2201,13 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -2146,12 +2251,17 @@ addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=20 is_read_only=false max_miss_count=0 mshrs=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=20 @@ -2170,20 +2280,31 @@ type=LRU assoc=8 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=4194304 [system.membus] type=CoherentXBar +children=snoop_filter clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 forward_latency=4 frontend_latency=3 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 point_of_coherency=true +power_model=Null response_latency=2 -snoop_filter=Null +snoop_filter=system.membus.snoop_filter snoop_response_latency=4 system=system use_default_range=false @@ -2191,6 +2312,13 @@ width=16 master=system.physmem.port slave=system.system_port system.l2c.mem_side +[system.membus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=1 +max_capacity=8388608 +system=system + [system.physmem] type=DRAMCtrl IDD0=0.075000 @@ -2225,6 +2353,7 @@ burst_length=8 channels=1 clk_domain=system.clk_domain conf_table_reported=true +default_p_state=UNDEFINED device_bus_width=8 device_rowbuffer_size=1024 device_size=536870912 @@ -2236,7 +2365,11 @@ max_accesses_per_row=16 mem_sched_policy=frfcfs min_writes_per_switch=16 null=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 page_policy=open_adaptive +power_model=Null range=0:134217727 ranks_per_channel=2 read_buffer_size=32 @@ -2272,10 +2405,15 @@ port=system.membus.master[0] type=CoherentXBar children=snoop_filter clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 forward_latency=0 frontend_latency=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 point_of_coherency=false +power_model=Null response_latency=1 snoop_filter=system.toL2Bus.snoop_filter snoop_response_latency=1 diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simerr b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simerr index 341b479f7..952fc386a 100755 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simerr +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simerr @@ -1,2 +1,7 @@ warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections +warn: ClockedObject: More than one power state change request encountered within the same simulation tick +warn: ClockedObject: More than one power state change request encountered within the same simulation tick +warn: ClockedObject: More than one power state change request encountered within the same simulation tick +warn: ClockedObject: More than one power state change request encountered within the same simulation tick +warn: ClockedObject: Already in the requested power state, request ignored diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout index 1f6d76948..64591e1c0 100755 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout @@ -1,20 +1,22 @@ +Redirecting stdout to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp/simout +Redirecting stderr to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Mar 13 2016 22:35:56 -gem5 started Mar 13 2016 22:44:20 -gem5 executing on phenom, pid 19840 -command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp +gem5 compiled Jul 21 2016 14:30:06 +gem5 started Jul 21 2016 14:30:37 +gem5 executing on e108600-lin, pid 38681 +command line: /work/curdun01/gem5-external.hg/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... Init done [Iteration 1, Thread 1] Got lock [Iteration 1, Thread 1] Critical section done, previously next=0, now next=1 -[Iteration 1, Thread 3] Got lock -[Iteration 1, Thread 3] Critical section done, previously next=1, now next=3 [Iteration 1, Thread 2] Got lock -[Iteration 1, Thread 2] Critical section done, previously next=3, now next=2 +[Iteration 1, Thread 2] Critical section done, previously next=1, now next=2 +[Iteration 1, Thread 3] Got lock +[Iteration 1, Thread 3] Critical section done, previously next=2, now next=3 Iteration 1 completed [Iteration 2, Thread 1] Got lock [Iteration 2, Thread 1] Critical section done, previously next=0, now next=1 @@ -30,54 +32,54 @@ Iteration 2 completed [Iteration 3, Thread 1] Got lock [Iteration 3, Thread 1] Critical section done, previously next=2, now next=1 Iteration 3 completed +[Iteration 4, Thread 1] Got lock +[Iteration 4, Thread 1] Critical section done, previously next=0, now next=1 [Iteration 4, Thread 2] Got lock -[Iteration 4, Thread 2] Critical section done, previously next=0, now next=2 +[Iteration 4, Thread 2] Critical section done, previously next=1, now next=2 [Iteration 4, Thread 3] Got lock [Iteration 4, Thread 3] Critical section done, previously next=2, now next=3 -[Iteration 4, Thread 1] Got lock -[Iteration 4, Thread 1] Critical section done, previously next=3, now next=1 Iteration 4 completed [Iteration 5, Thread 1] Got lock [Iteration 5, Thread 1] Critical section done, previously next=0, now next=1 -[Iteration 5, Thread 2] Got lock -[Iteration 5, Thread 2] Critical section done, previously next=1, now next=2 [Iteration 5, Thread 3] Got lock -[Iteration 5, Thread 3] Critical section done, previously next=2, now next=3 +[Iteration 5, Thread 3] Critical section done, previously next=1, now next=3 +[Iteration 5, Thread 2] Got lock +[Iteration 5, Thread 2] Critical section done, previously next=3, now next=2 Iteration 5 completed -[Iteration 6, Thread 1] Got lock -[Iteration 6, Thread 1] Critical section done, previously next=0, now next=1 [Iteration 6, Thread 2] Got lock -[Iteration 6, Thread 2] Critical section done, previously next=1, now next=2 +[Iteration 6, Thread 2] Critical section done, previously next=0, now next=2 +[Iteration 6, Thread 1] Got lock +[Iteration 6, Thread 1] Critical section done, previously next=2, now next=1 [Iteration 6, Thread 3] Got lock -[Iteration 6, Thread 3] Critical section done, previously next=2, now next=3 +[Iteration 6, Thread 3] Critical section done, previously next=1, now next=3 Iteration 6 completed [Iteration 7, Thread 3] Got lock [Iteration 7, Thread 3] Critical section done, previously next=0, now next=3 -[Iteration 7, Thread 2] Got lock -[Iteration 7, Thread 2] Critical section done, previously next=3, now next=2 [Iteration 7, Thread 1] Got lock -[Iteration 7, Thread 1] Critical section done, previously next=2, now next=1 +[Iteration 7, Thread 1] Critical section done, previously next=3, now next=1 +[Iteration 7, Thread 2] Got lock +[Iteration 7, Thread 2] Critical section done, previously next=1, now next=2 Iteration 7 completed -[Iteration 8, Thread 2] Got lock -[Iteration 8, Thread 2] Critical section done, previously next=0, now next=2 -[Iteration 8, Thread 1] Got lock -[Iteration 8, Thread 1] Critical section done, previously next=2, now next=1 [Iteration 8, Thread 3] Got lock -[Iteration 8, Thread 3] Critical section done, previously next=1, now next=3 +[Iteration 8, Thread 3] Critical section done, previously next=0, now next=3 +[Iteration 8, Thread 1] Got lock +[Iteration 8, Thread 1] Critical section done, previously next=3, now next=1 +[Iteration 8, Thread 2] Got lock +[Iteration 8, Thread 2] Critical section done, previously next=1, now next=2 Iteration 8 completed -[Iteration 9, Thread 3] Got lock -[Iteration 9, Thread 3] Critical section done, previously next=0, now next=3 -[Iteration 9, Thread 1] Got lock -[Iteration 9, Thread 1] Critical section done, previously next=3, now next=1 [Iteration 9, Thread 2] Got lock -[Iteration 9, Thread 2] Critical section done, previously next=1, now next=2 +[Iteration 9, Thread 2] Critical section done, previously next=0, now next=2 +[Iteration 9, Thread 1] Got lock +[Iteration 9, Thread 1] Critical section done, previously next=2, now next=1 +[Iteration 9, Thread 3] Got lock +[Iteration 9, Thread 3] Critical section done, previously next=1, now next=3 Iteration 9 completed -[Iteration 10, Thread 2] Got lock -[Iteration 10, Thread 2] Critical section done, previously next=0, now next=2 [Iteration 10, Thread 3] Got lock -[Iteration 10, Thread 3] Critical section done, previously next=2, now next=3 +[Iteration 10, Thread 3] Critical section done, previously next=0, now next=3 +[Iteration 10, Thread 2] Got lock +[Iteration 10, Thread 2] Critical section done, previously next=3, now next=2 [Iteration 10, Thread 1] Got lock -[Iteration 10, Thread 1] Critical section done, previously next=3, now next=1 +[Iteration 10, Thread 1] Critical section done, previously next=2, now next=1 Iteration 10 completed PASSED :-) -Exiting @ tick 107700000 because target called exit() +Exiting @ tick 124523000 because target called exit() diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt index b9708b9b9..8c3fa74c7 100644 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000125 # Nu sim_ticks 124523000 # Number of ticks simulated final_tick 124523000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 259079 # Simulator instruction rate (inst/s) -host_op_rate 259078 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 27957290 # Simulator tick rate (ticks/s) -host_mem_usage 308636 # Number of bytes of host memory used -host_seconds 4.45 # Real time elapsed on the host +host_inst_rate 143029 # Simulator instruction rate (inst/s) +host_op_rate 143029 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 15434351 # Simulator tick rate (ticks/s) +host_mem_usage 263456 # Number of bytes of host memory used +host_seconds 8.07 # Real time elapsed on the host sim_insts 1153943 # Number of instructions simulated sim_ops 1153943 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -2838,6 +2838,7 @@ system.membus.pkt_count::total 1755 # Pa system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 45632 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size::total 45632 # Cumulative packet size per connected master and slave (bytes) system.membus.snoops 244 # Total snoops (count) +system.membus.snoopTraffic 0 # Total snoop traffic (bytes) system.membus.snoop_fanout::samples 1042 # Request fanout histogram system.membus.snoop_fanout::mean 0 # Request fanout histogram system.membus.snoop_fanout::stdev 0 # Request fanout histogram @@ -2889,6 +2890,7 @@ system.toL2Bus.pkt_size_system.cpu3.icache.mem_side::system.l2c.cpu_side system.toL2Bus.pkt_size_system.cpu3.dcache.mem_side::system.l2c.cpu_side 1600 # Cumulative packet size per connected master and slave (bytes) system.toL2Bus.pkt_size::total 334720 # Cumulative packet size per connected master and slave (bytes) system.toL2Bus.snoops 1023 # Total snoops (count) +system.toL2Bus.snoopTraffic 53376 # Total snoop traffic (bytes) system.toL2Bus.snoop_fanout::samples 4207 # Request fanout histogram system.toL2Bus.snoop_fanout::mean 1.289042 # Request fanout histogram system.toL2Bus.snoop_fanout::stdev 1.099056 # Request fanout histogram diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini index 8aa92b057..d84a9f055 100644 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini @@ -14,6 +14,7 @@ children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain dvfs_handler l2c membus p boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 exit_on_work_items=false init_param=0 @@ -27,6 +28,10 @@ memories=system.physmem mmap_using_noreserve=false multi_thread=false num_work_ids=16 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null readfile= symbolfile= thermal_components= @@ -55,6 +60,7 @@ branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 +default_p_state=UNDEFINED do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true @@ -71,6 +77,10 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 simpoint_start_insts= @@ -92,12 +102,17 @@ addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -116,8 +131,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -133,12 +153,17 @@ addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -157,8 +182,13 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -189,7 +219,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic +executable=/arm/projectscratch/randd/systems/dist/test-progs/m5threads/bin/sparc/linux/test_atomic gid=100 input=cin kvmInSE=false @@ -209,6 +239,7 @@ branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=1 +default_p_state=UNDEFINED do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true @@ -225,6 +256,10 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 simpoint_start_insts= @@ -246,12 +281,17 @@ addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -270,8 +310,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -287,12 +332,17 @@ addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -311,8 +361,13 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -340,6 +395,7 @@ branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=2 +default_p_state=UNDEFINED do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true @@ -356,6 +412,10 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 simpoint_start_insts= @@ -377,12 +437,17 @@ addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -401,8 +466,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -418,12 +488,17 @@ addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -442,8 +517,13 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -471,6 +551,7 @@ branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=3 +default_p_state=UNDEFINED do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true @@ -487,6 +568,10 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 simpoint_start_insts= @@ -508,12 +593,17 @@ addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -532,8 +622,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -549,12 +644,17 @@ addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -573,8 +673,13 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -618,12 +723,17 @@ addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=20 is_read_only=false max_miss_count=0 mshrs=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=20 @@ -642,20 +752,31 @@ type=LRU assoc=8 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=4194304 [system.membus] type=CoherentXBar +children=snoop_filter clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 forward_latency=4 frontend_latency=3 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 point_of_coherency=true +power_model=Null response_latency=2 -snoop_filter=Null +snoop_filter=system.membus.snoop_filter snoop_response_latency=4 system=system use_default_range=false @@ -663,16 +784,28 @@ width=16 master=system.physmem.port slave=system.system_port system.l2c.mem_side +[system.membus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=1 +max_capacity=8388608 +system=system + [system.physmem] type=SimpleMemory bandwidth=73.000000 clk_domain=system.clk_domain conf_table_reported=true +default_p_state=UNDEFINED eventq_index=0 in_addr_map=true latency=30000 latency_var=0 null=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null range=0:134217727 port=system.membus.master[0] @@ -680,10 +813,15 @@ port=system.membus.master[0] type=CoherentXBar children=snoop_filter clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 forward_latency=0 frontend_latency=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 point_of_coherency=false +power_model=Null response_latency=1 snoop_filter=system.toL2Bus.snoop_filter snoop_response_latency=1 diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simerr b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simerr index 1a4f96712..a5c275fc8 100755 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simerr +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simerr @@ -1 +1,6 @@ warn: Sockets disabled, not accepting gdb connections +warn: ClockedObject: More than one power state change request encountered within the same simulation tick +warn: ClockedObject: More than one power state change request encountered within the same simulation tick +warn: ClockedObject: More than one power state change request encountered within the same simulation tick +warn: ClockedObject: More than one power state change request encountered within the same simulation tick +warn: ClockedObject: Already in the requested power state, request ignored diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout index 05f972a06..f5b06fc1f 100755 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout @@ -1,10 +1,12 @@ +Redirecting stdout to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp/simout +Redirecting stderr to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 21 2016 14:30:54 -gem5 started Jan 21 2016 14:31:25 -gem5 executing on zizzer, pid 8720 -command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp -re /z/atgutier/gem5/gem5-commit/tests/run.py build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp +gem5 compiled Jul 21 2016 14:30:06 +gem5 started Jul 21 2016 14:30:37 +gem5 executing on e108600-lin, pid 38680 +command line: /work/curdun01/gem5-external.hg/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt index 42d05c9b0..5019ecb02 100644 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000088 # Nu sim_ticks 87707000 # Number of ticks simulated final_tick 87707000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1934217 # Simulator instruction rate (inst/s) -host_op_rate 1934165 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 250446535 # Simulator tick rate (ticks/s) -host_mem_usage 303372 # Number of bytes of host memory used -host_seconds 0.35 # Real time elapsed on the host +host_inst_rate 807732 # Simulator instruction rate (inst/s) +host_op_rate 807715 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 104588000 # Simulator tick rate (ticks/s) +host_mem_usage 259108 # Number of bytes of host memory used +host_seconds 0.84 # Real time elapsed on the host sim_insts 677333 # Number of instructions simulated sim_ops 677333 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -956,6 +956,7 @@ system.membus.pkt_count::total 1518 # Pa system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 35776 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size::total 35776 # Cumulative packet size per connected master and slave (bytes) system.membus.snoops 0 # Total snoops (count) +system.membus.snoopTraffic 0 # Total snoop traffic (bytes) system.membus.snoop_fanout::samples 879 # Request fanout histogram system.membus.snoop_fanout::mean 0 # Request fanout histogram system.membus.snoop_fanout::stdev 0 # Request fanout histogram @@ -1002,6 +1003,7 @@ system.toL2Bus.pkt_size_system.cpu3.icache.mem_side::system.l2c.cpu_side system.toL2Bus.pkt_size_system.cpu3.dcache.mem_side::system.l2c.cpu_side 15424 # Cumulative packet size per connected master and slave (bytes) system.toL2Bus.pkt_size::total 233088 # Cumulative packet size per connected master and slave (bytes) system.toL2Bus.snoops 0 # Total snoops (count) +system.toL2Bus.snoopTraffic 0 # Total snoop traffic (bytes) system.toL2Bus.snoop_fanout::samples 3918 # Request fanout histogram system.toL2Bus.snoop_fanout::mean 1.246554 # Request fanout histogram system.toL2Bus.snoop_fanout::stdev 1.199505 # Request fanout histogram diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini index b3a457f47..524dea641 100644 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini @@ -14,6 +14,7 @@ children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain dvfs_handler l2c membus p boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 exit_on_work_items=false init_param=0 @@ -27,6 +28,10 @@ memories=system.physmem mmap_using_noreserve=false multi_thread=false num_work_ids=16 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null readfile= symbolfile= thermal_components= @@ -55,6 +60,7 @@ branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 +default_p_state=UNDEFINED do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true @@ -70,6 +76,10 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 simpoint_start_insts= @@ -88,12 +98,17 @@ addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -112,8 +127,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -129,12 +149,17 @@ addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -153,8 +178,13 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -185,7 +215,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic +executable=/arm/projectscratch/randd/systems/dist/test-progs/m5threads/bin/sparc/linux/test_atomic gid=100 input=cin kvmInSE=false @@ -205,6 +235,7 @@ branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=1 +default_p_state=UNDEFINED do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true @@ -220,6 +251,10 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 simpoint_start_insts= @@ -238,12 +273,17 @@ addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -262,8 +302,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -279,12 +324,17 @@ addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -303,8 +353,13 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -332,6 +387,7 @@ branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=2 +default_p_state=UNDEFINED do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true @@ -347,6 +403,10 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 simpoint_start_insts= @@ -365,12 +425,17 @@ addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -389,8 +454,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -406,12 +476,17 @@ addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -430,8 +505,13 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -459,6 +539,7 @@ branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=3 +default_p_state=UNDEFINED do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true @@ -474,6 +555,10 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 simpoint_start_insts= @@ -492,12 +577,17 @@ addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -516,8 +606,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -533,12 +628,17 @@ addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -557,8 +657,13 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -602,12 +707,17 @@ addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=20 is_read_only=false max_miss_count=0 mshrs=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=20 @@ -626,20 +736,31 @@ type=LRU assoc=8 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=4194304 [system.membus] type=CoherentXBar +children=snoop_filter clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 forward_latency=4 frontend_latency=3 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 point_of_coherency=true +power_model=Null response_latency=2 -snoop_filter=Null +snoop_filter=system.membus.snoop_filter snoop_response_latency=4 system=system use_default_range=false @@ -647,16 +768,28 @@ width=16 master=system.physmem.port slave=system.system_port system.l2c.mem_side +[system.membus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=1 +max_capacity=8388608 +system=system + [system.physmem] type=SimpleMemory bandwidth=73.000000 clk_domain=system.clk_domain conf_table_reported=true +default_p_state=UNDEFINED eventq_index=0 in_addr_map=true latency=30000 latency_var=0 null=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null range=0:134217727 port=system.membus.master[0] @@ -664,10 +797,15 @@ port=system.membus.master[0] type=CoherentXBar children=snoop_filter clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 forward_latency=0 frontend_latency=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 point_of_coherency=false +power_model=Null response_latency=1 snoop_filter=system.toL2Bus.snoop_filter snoop_response_latency=1 diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simerr b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simerr index 1a4f96712..a5c275fc8 100755 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simerr +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simerr @@ -1 +1,6 @@ warn: Sockets disabled, not accepting gdb connections +warn: ClockedObject: More than one power state change request encountered within the same simulation tick +warn: ClockedObject: More than one power state change request encountered within the same simulation tick +warn: ClockedObject: More than one power state change request encountered within the same simulation tick +warn: ClockedObject: More than one power state change request encountered within the same simulation tick +warn: ClockedObject: Already in the requested power state, request ignored diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout index 0436b2616..dc5d474a6 100755 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout @@ -1,10 +1,12 @@ +Redirecting stdout to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp/simout +Redirecting stderr to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 21 2016 14:30:54 -gem5 started Jan 21 2016 14:31:26 -gem5 executing on zizzer, pid 8732 -command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp -re /z/atgutier/gem5/gem5-commit/tests/run.py build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp +gem5 compiled Jul 21 2016 14:30:06 +gem5 started Jul 21 2016 14:30:36 +gem5 executing on e108600-lin, pid 38675 +command line: /work/curdun01/gem5-external.hg/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... @@ -23,47 +25,47 @@ Iteration 1 completed [Iteration 2, Thread 2] Got lock [Iteration 2, Thread 2] Critical section done, previously next=1, now next=2 Iteration 2 completed -[Iteration 3, Thread 1] Got lock -[Iteration 3, Thread 1] Critical section done, previously next=0, now next=1 [Iteration 3, Thread 2] Got lock -[Iteration 3, Thread 2] Critical section done, previously next=1, now next=2 +[Iteration 3, Thread 2] Critical section done, previously next=0, now next=2 +[Iteration 3, Thread 1] Got lock +[Iteration 3, Thread 1] Critical section done, previously next=2, now next=1 [Iteration 3, Thread 3] Got lock -[Iteration 3, Thread 3] Critical section done, previously next=2, now next=3 +[Iteration 3, Thread 3] Critical section done, previously next=1, now next=3 Iteration 3 completed -[Iteration 4, Thread 2] Got lock -[Iteration 4, Thread 2] Critical section done, previously next=0, now next=2 [Iteration 4, Thread 3] Got lock -[Iteration 4, Thread 3] Critical section done, previously next=2, now next=3 +[Iteration 4, Thread 3] Critical section done, previously next=0, now next=3 +[Iteration 4, Thread 2] Got lock +[Iteration 4, Thread 2] Critical section done, previously next=3, now next=2 [Iteration 4, Thread 1] Got lock -[Iteration 4, Thread 1] Critical section done, previously next=3, now next=1 +[Iteration 4, Thread 1] Critical section done, previously next=2, now next=1 Iteration 4 completed -[Iteration 5, Thread 3] Got lock -[Iteration 5, Thread 3] Critical section done, previously next=0, now next=3 [Iteration 5, Thread 1] Got lock -[Iteration 5, Thread 1] Critical section done, previously next=3, now next=1 +[Iteration 5, Thread 1] Critical section done, previously next=0, now next=1 [Iteration 5, Thread 2] Got lock [Iteration 5, Thread 2] Critical section done, previously next=1, now next=2 +[Iteration 5, Thread 3] Got lock +[Iteration 5, Thread 3] Critical section done, previously next=2, now next=3 Iteration 5 completed +[Iteration 6, Thread 3] Got lock +[Iteration 6, Thread 3] Critical section done, previously next=0, now next=3 [Iteration 6, Thread 1] Got lock -[Iteration 6, Thread 1] Critical section done, previously next=0, now next=1 +[Iteration 6, Thread 1] Critical section done, previously next=3, now next=1 [Iteration 6, Thread 2] Got lock [Iteration 6, Thread 2] Critical section done, previously next=1, now next=2 -[Iteration 6, Thread 3] Got lock -[Iteration 6, Thread 3] Critical section done, previously next=2, now next=3 Iteration 6 completed [Iteration 7, Thread 2] Got lock [Iteration 7, Thread 2] Critical section done, previously next=0, now next=2 -[Iteration 7, Thread 3] Got lock -[Iteration 7, Thread 3] Critical section done, previously next=2, now next=3 [Iteration 7, Thread 1] Got lock -[Iteration 7, Thread 1] Critical section done, previously next=3, now next=1 +[Iteration 7, Thread 1] Critical section done, previously next=2, now next=1 +[Iteration 7, Thread 3] Got lock +[Iteration 7, Thread 3] Critical section done, previously next=1, now next=3 Iteration 7 completed [Iteration 8, Thread 3] Got lock [Iteration 8, Thread 3] Critical section done, previously next=0, now next=3 -[Iteration 8, Thread 1] Got lock -[Iteration 8, Thread 1] Critical section done, previously next=3, now next=1 [Iteration 8, Thread 2] Got lock -[Iteration 8, Thread 2] Critical section done, previously next=1, now next=2 +[Iteration 8, Thread 2] Critical section done, previously next=3, now next=2 +[Iteration 8, Thread 1] Got lock +[Iteration 8, Thread 1] Critical section done, previously next=2, now next=1 Iteration 8 completed [Iteration 9, Thread 1] Got lock [Iteration 9, Thread 1] Critical section done, previously next=0, now next=1 @@ -72,12 +74,12 @@ Iteration 8 completed [Iteration 9, Thread 3] Got lock [Iteration 9, Thread 3] Critical section done, previously next=2, now next=3 Iteration 9 completed -[Iteration 10, Thread 2] Got lock -[Iteration 10, Thread 2] Critical section done, previously next=0, now next=2 [Iteration 10, Thread 3] Got lock -[Iteration 10, Thread 3] Critical section done, previously next=2, now next=3 +[Iteration 10, Thread 3] Critical section done, previously next=0, now next=3 +[Iteration 10, Thread 2] Got lock +[Iteration 10, Thread 2] Critical section done, previously next=3, now next=2 [Iteration 10, Thread 1] Got lock -[Iteration 10, Thread 1] Critical section done, previously next=3, now next=1 +[Iteration 10, Thread 1] Critical section done, previously next=2, now next=1 Iteration 10 completed PASSED :-) -Exiting @ tick 264840500 because target called exit() +Exiting @ tick 264174500 because target called exit() diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt index be0efa0c8..78f5a0ee7 100644 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000264 # Nu sim_ticks 264174500 # Number of ticks simulated final_tick 264174500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1178179 # Simulator instruction rate (inst/s) -host_op_rate 1178160 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 469155398 # Simulator tick rate (ticks/s) -host_mem_usage 303372 # Number of bytes of host memory used -host_seconds 0.56 # Real time elapsed on the host +host_inst_rate 538178 # Simulator instruction rate (inst/s) +host_op_rate 538161 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 214299964 # Simulator tick rate (ticks/s) +host_mem_usage 259104 # Number of bytes of host memory used +host_seconds 1.23 # Real time elapsed on the host sim_insts 663394 # Number of instructions simulated sim_ops 663394 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -1581,6 +1581,7 @@ system.membus.pkt_count::total 1482 # Pa system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 36608 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size::total 36608 # Cumulative packet size per connected master and slave (bytes) system.membus.snoops 261 # Total snoops (count) +system.membus.snoopTraffic 0 # Total snoop traffic (bytes) system.membus.snoop_fanout::samples 916 # Request fanout histogram system.membus.snoop_fanout::mean 0 # Request fanout histogram system.membus.snoop_fanout::stdev 0 # Request fanout histogram @@ -1631,6 +1632,7 @@ system.toL2Bus.pkt_size_system.cpu3.icache.mem_side::system.l2c.cpu_side system.toL2Bus.pkt_size_system.cpu3.dcache.mem_side::system.l2c.cpu_side 1600 # Cumulative packet size per connected master and slave (bytes) system.toL2Bus.pkt_size::total 183616 # Cumulative packet size per connected master and slave (bytes) system.toL2Bus.snoops 1028 # Total snoops (count) +system.toL2Bus.snoopTraffic 53312 # Total snoop traffic (bytes) system.toL2Bus.snoop_fanout::samples 2919 # Request fanout histogram system.toL2Bus.snoop_fanout::mean 1.272011 # Request fanout histogram system.toL2Bus.snoop_fanout::stdev 1.157273 # Request fanout histogram -- cgit v1.2.3