From 4124ea09f8e2f6934fe746ff7c244dba7230cac9 Mon Sep 17 00:00:00 2001 From: Joel Hestness Date: Wed, 5 Sep 2012 20:53:34 -0500 Subject: stats: Update Ruby regressions for memory controller fix --- .../rubytest-ruby-MESI_CMP_directory/config.ini | 8 +- .../rubytest-ruby-MESI_CMP_directory/ruby.stats | 386 ++++++++++----------- .../linux/rubytest-ruby-MESI_CMP_directory/simout | 10 +- .../rubytest-ruby-MESI_CMP_directory/stats.txt | 12 +- .../rubytest-ruby-MOESI_CMP_directory/config.ini | 8 +- .../rubytest-ruby-MOESI_CMP_directory/ruby.stats | 372 ++++++++++---------- .../linux/rubytest-ruby-MOESI_CMP_directory/simout | 10 +- .../rubytest-ruby-MOESI_CMP_directory/stats.txt | 12 +- .../linux/rubytest-ruby-MOESI_hammer/config.ini | 8 +- .../linux/rubytest-ruby-MOESI_hammer/ruby.stats | 344 +++++++++--------- .../alpha/linux/rubytest-ruby-MOESI_hammer/simout | 10 +- .../linux/rubytest-ruby-MOESI_hammer/stats.txt | 12 +- .../ref/alpha/linux/rubytest-ruby/config.ini | 8 +- .../ref/alpha/linux/rubytest-ruby/ruby.stats | 196 +++++------ .../ref/alpha/linux/rubytest-ruby/simout | 10 +- .../ref/alpha/linux/rubytest-ruby/stats.txt | 10 +- 16 files changed, 724 insertions(+), 692 deletions(-) (limited to 'tests/quick/se/60.rubytest/ref/alpha/linux') diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini index f8c719b99..66023571f 100644 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini @@ -10,6 +10,7 @@ time_sync_spin_threshold=100000 type=System children=dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby sys_port_proxy tester boot_osflags=a +clock=1 init_param=0 kernel= load_addr_mask=1099511627775 @@ -57,9 +58,9 @@ bank_busy_time=11 bank_queue_size=12 banks_per_rank=8 basic_bus_busy_time=2 +clock=3 dimm_bit_0=12 dimms_per_channel=2 -mem_bus_cycle_multiplier=10 mem_ctl_latency=12 mem_fixed_delay=0 mem_random_arbitrate=0 @@ -68,6 +69,7 @@ rank_rank_delay=1 ranks_per_dimm=2 read_write_delay=2 refresh_period=1560 +ruby_system=system.ruby tFaw=0 version=0 @@ -121,6 +123,7 @@ tagArrayBanks=1 [system.l1_cntrl0.sequencer] type=RubySequencer access_phys_mem=false +clock=1 dcache=system.l1_cntrl0.L1DcacheMemory deadlock_threshold=500000 icache=system.l1_cntrl0.L1IcacheMemory @@ -165,6 +168,7 @@ tagArrayBanks=1 [system.physmem] type=SimpleMemory +clock=1 conf_table_reported=false file= in_addr_map=true @@ -289,6 +293,7 @@ ruby_system=system.ruby [system.sys_port_proxy] type=RubyPortProxy access_phys_mem=true +clock=1 ruby_system=system.ruby support_data_reqs=true support_inst_reqs=true @@ -302,6 +307,7 @@ slave=system.system_port type=RubyTester check_flush=false checks_to_complete=100 +clock=1 deadlock_threshold=50000 num_cpus=1 system=system diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats index cd8ab42db..cd0889639 100644 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats @@ -1,4 +1,4 @@ -Real time: Jul/10/2012 17:34:42 +Real time: Sep/01/2012 14:05:06 Profiler Stats -------------- @@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0 Elapsed_time_in_hours: 0 Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.58 -Virtual_time_in_minutes: 0.00966667 -Virtual_time_in_hours: 0.000161111 -Virtual_time_in_days: 6.71296e-06 +Virtual_time_in_seconds: 0.52 +Virtual_time_in_minutes: 0.00866667 +Virtual_time_in_hours: 0.000144444 +Virtual_time_in_days: 6.01852e-06 -Ruby_current_time: 349711 +Ruby_current_time: 318321 Ruby_start_time: 0 -Ruby_cycles: 349711 +Ruby_cycles: 318321 -mbytes_resident: 41.8008 -mbytes_total: 225.551 -resident_ratio: 0.185362 +mbytes_resident: 44.9961 +mbytes_total: 254.652 +resident_ratio: 0.176758 -ruby_cycles_executed: [ 349712 ] +ruby_cycles_executed: [ 318322 ] Busy Controller Counts: L1Cache-0:0 @@ -30,15 +30,15 @@ Directory-0:0 Busy Bank Count:0 -sequencer_requests_outstanding: [binsize: 1 max: 16 count: 994 average: 15.841 | standard deviation: 1.12331 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 39 941 ] +sequencer_requests_outstanding: [binsize: 1 max: 16 count: 1012 average: 15.8221 | standard deviation: 1.11991 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 61 937 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 64 max: 8736 count: 979 average: 5661.07 | standard deviation: 2367.21 | 72 10 0 0 2 2 5 2 5 4 6 8 4 7 3 2 4 3 2 4 3 1 1 1 0 1 1 0 2 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 2 1 1 2 8 4 5 9 6 8 9 19 21 27 27 32 32 32 39 32 43 26 27 28 36 34 35 22 24 33 26 22 19 22 17 14 7 2 16 6 5 11 5 4 3 3 1 2 0 2 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_LD: [binsize: 64 max: 8339 count: 44 average: 6147 | standard deviation: 2036.5 | 3 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 2 1 1 1 1 4 4 1 1 3 2 0 2 1 1 0 3 1 1 1 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 1 ] -miss_latency_ST: [binsize: 64 max: 8736 count: 879 average: 5937.77 | standard deviation: 2125.68 | 69 9 0 0 2 0 3 2 2 0 3 0 1 2 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 2 1 1 2 8 4 5 9 6 8 9 19 19 25 25 31 31 31 38 28 39 25 26 25 34 34 33 21 23 33 23 21 18 21 17 13 7 2 16 5 5 11 5 3 3 3 1 1 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_IFETCH: [binsize: 16 max: 1853 count: 56 average: 936.107 | standard deviation: 353.831 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 2 0 0 0 0 0 1 0 2 0 0 1 1 2 3 0 0 0 2 0 4 2 0 1 1 1 0 4 1 0 1 0 1 1 1 1 0 0 2 2 0 0 1 0 0 1 1 0 1 0 1 1 1 1 1 2 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_NULL: [binsize: 64 max: 8736 count: 979 average: 5661.07 | standard deviation: 2367.21 | 72 10 0 0 2 2 5 2 5 4 6 8 4 7 3 2 4 3 2 4 3 1 1 1 0 1 1 0 2 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 2 1 1 2 8 4 5 9 6 8 9 19 21 27 27 32 32 32 39 32 43 26 27 28 36 34 35 22 24 33 26 22 19 22 17 14 7 2 16 6 5 11 5 4 3 3 1 2 0 2 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency: [binsize: 64 max: 8110 count: 997 average: 5056.15 | standard deviation: 2131.53 | 69 13 4 2 1 6 6 4 4 1 8 8 6 5 0 3 0 1 1 1 2 3 2 3 0 0 3 1 0 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 1 1 0 1 3 0 3 1 5 8 11 8 16 15 20 29 26 21 24 31 17 30 34 34 27 28 36 25 28 32 33 35 28 34 17 19 21 21 16 13 13 11 7 3 6 6 8 3 2 2 4 2 2 1 0 3 1 2 2 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD: [binsize: 64 max: 7764 count: 44 average: 5504.89 | standard deviation: 1648.56 | 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 1 1 0 1 2 0 1 3 1 1 1 2 1 0 0 3 3 0 2 1 1 1 3 1 2 1 0 1 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 ] +miss_latency_ST: [binsize: 64 max: 8110 count: 897 average: 5296.67 | standard deviation: 1932.9 | 66 13 3 2 0 3 1 2 2 0 1 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 1 1 0 1 2 0 3 1 4 7 11 7 15 15 19 27 26 20 21 30 16 29 32 33 27 28 33 22 28 30 32 34 27 31 16 17 20 21 15 12 13 11 7 2 6 6 8 3 2 1 4 2 2 1 0 2 1 2 2 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_IFETCH: [binsize: 16 max: 2021 count: 56 average: 850.893 | standard deviation: 421.128 | 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 2 0 3 0 1 1 0 1 0 1 0 0 2 0 0 1 0 0 2 3 1 1 2 0 3 3 1 1 2 2 0 0 3 2 0 0 0 0 0 0 0 2 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 2 0 0 0 0 0 0 2 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_NULL: [binsize: 64 max: 8110 count: 997 average: 5056.15 | standard deviation: 2131.53 | 69 13 4 2 1 6 6 4 4 1 8 8 6 5 0 3 0 1 1 1 2 3 2 3 0 0 3 1 0 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 1 1 0 1 3 0 3 1 5 8 11 8 16 15 20 29 26 21 24 31 17 30 34 34 27 28 36 25 28 32 33 35 28 34 17 19 21 21 16 13 13 11 7 3 6 6 8 3 2 2 4 2 2 1 0 3 1 2 2 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] @@ -49,9 +49,9 @@ miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: N miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] imcomplete_dir_Times: 0 -miss_latency_LD_NULL: [binsize: 64 max: 8339 count: 44 average: 6147 | standard deviation: 2036.5 | 3 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 2 1 1 1 1 4 4 1 1 3 2 0 2 1 1 0 3 1 1 1 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 1 ] -miss_latency_ST_NULL: [binsize: 64 max: 8736 count: 879 average: 5937.77 | standard deviation: 2125.68 | 69 9 0 0 2 0 3 2 2 0 3 0 1 2 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 2 1 1 2 8 4 5 9 6 8 9 19 19 25 25 31 31 31 38 28 39 25 26 25 34 34 33 21 23 33 23 21 18 21 17 13 7 2 16 5 5 11 5 3 3 3 1 1 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_IFETCH_NULL: [binsize: 16 max: 1853 count: 56 average: 936.107 | standard deviation: 353.831 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 2 0 0 0 0 0 1 0 2 0 0 1 1 2 3 0 0 0 2 0 4 2 0 1 1 1 0 4 1 0 1 0 1 1 1 1 0 0 2 2 0 0 1 0 0 1 1 0 1 0 1 1 1 1 1 2 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD_NULL: [binsize: 64 max: 7764 count: 44 average: 5504.89 | standard deviation: 1648.56 | 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 1 1 0 1 2 0 1 3 1 1 1 2 1 0 0 3 3 0 2 1 1 1 3 1 2 1 0 1 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 ] +miss_latency_ST_NULL: [binsize: 64 max: 8110 count: 897 average: 5296.67 | standard deviation: 1932.9 | 66 13 3 2 0 3 1 2 2 0 1 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 1 1 0 1 2 0 3 1 4 7 11 7 15 15 19 27 26 20 21 30 16 29 32 33 27 28 33 22 28 30 32 34 27 31 16 17 20 21 15 12 13 11 7 2 6 6 8 3 2 1 4 2 2 1 0 2 1 2 2 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_IFETCH_NULL: [binsize: 16 max: 2021 count: 56 average: 850.893 | standard deviation: 421.128 | 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 2 0 3 0 1 1 0 1 0 1 0 0 2 0 0 1 0 0 2 3 1 1 2 0 3 3 1 1 2 2 0 0 3 2 0 0 0 0 0 0 0 2 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 2 0 0 0 0 0 0 2 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -65,11 +65,11 @@ filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN Message Delayed Cycles ---------------------- -Total_delay_cycles: [binsize: 64 max: 1964 count: 6930 average: 44.9837 | standard deviation: 177.937 | 6277 162 19 77 35 23 39 25 31 46 31 47 16 29 20 14 5 2 2 5 1 3 4 7 1 3 1 1 1 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -Total_nonPF_delay_cycles: [binsize: 1 max: 10 count: 4452 average: 0.269093 | standard deviation: 0.946561 | 4000 119 113 132 37 23 14 8 1 4 1 ] - virtual_network_0_delay_cycles: [binsize: 64 max: 1964 count: 2478 average: 125.318 | standard deviation: 280.209 | 1825 162 19 77 35 23 39 25 31 46 31 47 16 29 20 14 5 2 2 5 1 3 4 7 1 3 1 1 1 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] - virtual_network_1_delay_cycles: [binsize: 1 max: 10 count: 3903 average: 0.282603 | standard deviation: 0.959989 | 3479 115 110 122 32 19 13 8 1 3 1 ] - virtual_network_2_delay_cycles: [binsize: 1 max: 9 count: 549 average: 0.173042 | standard deviation: 0.84036 | 521 4 3 10 5 4 1 0 0 1 ] +Total_delay_cycles: [binsize: 32 max: 1572 count: 7069 average: 39.9154 | standard deviation: 159.247 | 6421 15 38 124 13 11 58 12 11 21 23 10 10 30 13 21 26 16 8 26 17 12 9 25 16 4 10 11 7 8 1 4 2 4 7 1 2 4 1 2 2 1 1 4 2 0 0 3 1 1 ] +Total_nonPF_delay_cycles: [binsize: 1 max: 11 count: 4539 average: 0.320996 | standard deviation: 1.03402 | 3993 136 158 137 52 29 15 8 6 4 0 1 ] + virtual_network_0_delay_cycles: [binsize: 32 max: 1572 count: 2530 average: 110.951 | standard deviation: 251.02 | 1882 15 38 124 13 11 58 12 11 21 23 10 10 30 13 21 26 16 8 26 17 12 9 25 16 4 10 11 7 8 1 4 2 4 7 1 2 4 1 2 2 1 1 4 2 0 0 3 1 1 ] + virtual_network_1_delay_cycles: [binsize: 1 max: 9 count: 3976 average: 0.342807 | standard deviation: 1.04899 | 3455 133 152 135 45 25 14 8 5 4 ] + virtual_network_2_delay_cycles: [binsize: 1 max: 11 count: 563 average: 0.166963 | standard deviation: 0.907658 | 538 3 6 2 7 4 1 0 1 0 0 1 ] virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] @@ -83,83 +83,83 @@ Resource Usage page_size: 4096 user_time: 0 system_time: 0 -page_reclaims: 11853 +page_reclaims: 8497 page_faults: 0 swaps: 0 block_inputs: 0 -block_outputs: 0 +block_outputs: 80 Network Stats ------------- -total_msg_count_Control: 5280 42240 -total_msg_count_Request_Control: 1647 13176 -total_msg_count_Response_Data: 7584 546048 -total_msg_count_Response_Control: 7733 61864 -total_msg_count_Writeback_Data: 3603 259416 -total_msg_count_Writeback_Control: 108 864 -total_msgs: 25955 total_bytes: 923608 +total_msg_count_Control: 5373 42984 +total_msg_count_Request_Control: 1689 13512 +total_msg_count_Response_Data: 7724 556128 +total_msg_count_Response_Control: 7854 62832 +total_msg_count_Writeback_Data: 3705 266760 +total_msg_count_Writeback_Control: 102 816 +total_msgs: 26447 total_bytes: 943032 switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 1.57251 - links_utilized_percent_switch_0_link_0: 1.33853 bw: 16000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 1.80649 bw: 16000 base_latency: 1 - - outgoing_messages_switch_0_link_0_Request_Control: 549 4392 [ 549 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Response_Data: 897 64584 [ 0 897 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Response_Control: 740 5920 [ 0 740 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Control: 898 7184 [ 898 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Response_Control: 892 7136 [ 0 52 840 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Data: 1201 86472 [ 704 497 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Control: 36 288 [ 36 0 0 0 0 0 0 0 0 0 ] base_latency: 1 +links_utilized_percent_switch_0: 1.76936 + links_utilized_percent_switch_0_link_0: 1.50069 bw: 16000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 2.03804 bw: 16000 base_latency: 1 + + outgoing_messages_switch_0_link_0_Request_Control: 563 4504 [ 563 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Response_Data: 915 65880 [ 0 915 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Response_Control: 756 6048 [ 0 756 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Control: 917 7336 [ 917 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Response_Control: 909 7272 [ 0 50 859 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Data: 1235 88920 [ 722 513 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Control: 34 272 [ 34 0 0 0 0 0 0 0 0 0 ] base_latency: 1 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 2.75106 - links_utilized_percent_switch_1_link_0: 3.03694 bw: 16000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 2.46518 bw: 16000 base_latency: 1 - - outgoing_messages_switch_1_link_0_Control: 898 7184 [ 898 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Response_Data: 861 61992 [ 0 861 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Response_Control: 1749 13992 [ 0 909 840 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Writeback_Data: 1201 86472 [ 704 497 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Writeback_Control: 36 288 [ 36 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Control: 862 6896 [ 862 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Request_Control: 549 4392 [ 549 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Response_Data: 1667 120024 [ 0 1667 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Response_Control: 828 6624 [ 0 828 0 0 0 0 0 0 0 0 ] base_latency: 1 +links_utilized_percent_switch_1: 3.08541 + links_utilized_percent_switch_1_link_0: 3.40851 bw: 16000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 2.76231 bw: 16000 base_latency: 1 + + outgoing_messages_switch_1_link_0_Control: 917 7336 [ 917 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Response_Data: 873 62856 [ 0 873 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Response_Control: 1777 14216 [ 0 919 858 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Writeback_Data: 1235 88920 [ 722 513 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Writeback_Control: 34 272 [ 34 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Control: 874 6992 [ 874 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Request_Control: 563 4504 [ 563 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Response_Data: 1701 122472 [ 0 1701 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Response_Control: 840 6720 [ 0 840 0 0 0 0 0 0 0 0 ] base_latency: 1 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 1.17862 - links_utilized_percent_switch_2_link_0: 1.12664 bw: 16000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 1.23059 bw: 16000 base_latency: 1 +links_utilized_percent_switch_2: 1.31691 + links_utilized_percent_switch_2_link_0: 1.26162 bw: 16000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 1.3722 bw: 16000 base_latency: 1 - outgoing_messages_switch_2_link_0_Control: 862 6896 [ 862 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Response_Data: 770 55440 [ 0 770 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Response_Control: 88 704 [ 0 88 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Response_Data: 861 61992 [ 0 861 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Response_Control: 858 6864 [ 0 858 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Control: 874 6992 [ 874 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Response_Data: 786 56592 [ 0 786 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Response_Control: 84 672 [ 0 84 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Response_Data: 874 62928 [ 0 874 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Response_Control: 870 6960 [ 0 870 0 0 0 0 0 0 0 0 ] base_latency: 1 switch_3_inlinks: 3 switch_3_outlinks: 3 -links_utilized_percent_switch_3: 1.83409 - links_utilized_percent_switch_3_link_0: 1.33853 bw: 16000 base_latency: 1 - links_utilized_percent_switch_3_link_1: 3.03708 bw: 16000 base_latency: 1 - links_utilized_percent_switch_3_link_2: 1.12664 bw: 16000 base_latency: 1 - - outgoing_messages_switch_3_link_0_Request_Control: 549 4392 [ 549 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_Response_Data: 897 64584 [ 0 897 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_Response_Control: 740 5920 [ 0 740 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Control: 898 7184 [ 898 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Response_Data: 861 61992 [ 0 861 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Response_Control: 1750 14000 [ 0 910 840 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Writeback_Data: 1201 86472 [ 704 497 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Writeback_Control: 36 288 [ 36 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Control: 862 6896 [ 862 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Response_Data: 770 55440 [ 0 770 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Response_Control: 88 704 [ 0 88 0 0 0 0 0 0 0 0 ] base_latency: 1 +links_utilized_percent_switch_3: 2.05746 + links_utilized_percent_switch_3_link_0: 1.50069 bw: 16000 base_latency: 1 + links_utilized_percent_switch_3_link_1: 3.41008 bw: 16000 base_latency: 1 + links_utilized_percent_switch_3_link_2: 1.26162 bw: 16000 base_latency: 1 + + outgoing_messages_switch_3_link_0_Request_Control: 563 4504 [ 563 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_Response_Data: 915 65880 [ 0 915 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_Response_Control: 756 6048 [ 0 756 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Control: 917 7336 [ 917 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Response_Data: 874 62928 [ 0 874 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Response_Control: 1778 14224 [ 0 920 858 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Writeback_Data: 1235 88920 [ 722 513 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Writeback_Control: 34 272 [ 34 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Control: 874 6992 [ 874 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Response_Data: 786 56592 [ 0 786 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Response_Control: 84 672 [ 0 84 0 0 0 0 0 0 0 0 ] base_latency: 1 Cache Stats: system.l1_cntrl0.L1IcacheMemory system.l1_cntrl0.L1IcacheMemory_total_misses: 56 @@ -173,39 +173,39 @@ Cache Stats: system.l1_cntrl0.L1IcacheMemory system.l1_cntrl0.L1IcacheMemory_access_mode_type_Supervisor: 56 100% Cache Stats: system.l1_cntrl0.L1DcacheMemory - system.l1_cntrl0.L1DcacheMemory_total_misses: 842 - system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 842 + system.l1_cntrl0.L1DcacheMemory_total_misses: 861 + system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 861 system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0 system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0 system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0 - system.l1_cntrl0.L1DcacheMemory_request_type_LD: 4.86936% - system.l1_cntrl0.L1DcacheMemory_request_type_ST: 95.1306% + system.l1_cntrl0.L1DcacheMemory_request_type_LD: 4.87805% + system.l1_cntrl0.L1DcacheMemory_request_type_ST: 95.122% - system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor: 842 100% + system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor: 861 100% --- L1Cache --- - Event Counts - -Load [45 ] 45 -Ifetch [62 ] 62 -Store [879 ] 879 -Inv [549 ] 549 -L1_Replacement [10481 ] 10481 +Load [44 ] 44 +Ifetch [67 ] 67 +Store [898 ] 898 +Inv [563 ] 563 +L1_Replacement [10398 ] 10398 Fwd_GETX [0 ] 0 Fwd_GETS [0 ] 0 Fwd_GET_INSTR [0 ] 0 Data [0 ] 0 -Data_Exclusive [40 ] 40 +Data_Exclusive [41 ] 41 DataS_fromL1 [0 ] 0 -Data_all_Acks [857 ] 857 +Data_all_Acks [874 ] 874 Ack [0 ] 0 -Ack_all [0 ] 0 -WB_Ack [740 ] 740 +Ack_all [1 ] 1 +WB_Ack [755 ] 755 - Transitions - -NP Load [41 ] 41 +NP Load [42 ] 42 NP Ifetch [56 ] 56 -NP Store [801 ] 801 +NP Store [818 ] 818 NP Inv [1 ] 1 NP L1_Replacement [0 ] 0 @@ -213,28 +213,28 @@ I Load [0 ] 0 I Ifetch [0 ] 0 I Store [0 ] 0 I Inv [0 ] 0 -I L1_Replacement [146 ] 146 +I L1_Replacement [145 ] 145 S Load [0 ] 0 S Ifetch [0 ] 0 -S Store [0 ] 0 -S Inv [27 ] 27 -S L1_Replacement [7 ] 7 +S Store [1 ] 1 +S Inv [31 ] 31 +S L1_Replacement [11 ] 11 E Load [0 ] 0 E Ifetch [0 ] 0 -E Store [1 ] 1 -E Inv [2 ] 2 -E L1_Replacement [36 ] 36 +E Store [2 ] 2 +E Inv [4 ] 4 +E L1_Replacement [34 ] 34 E Fwd_GETX [0 ] 0 E Fwd_GETS [0 ] 0 E Fwd_GET_INSTR [0 ] 0 -M Load [4 ] 4 +M Load [2 ] 2 M Ifetch [0 ] 0 M Store [77 ] 77 M Inv [97 ] 97 -M L1_Replacement [704 ] 704 +M L1_Replacement [722 ] 722 M Fwd_GETX [0 ] 0 M Fwd_GETS [0 ] 0 M Fwd_GET_INSTR [0 ] 0 @@ -242,19 +242,19 @@ M Fwd_GET_INSTR [0 ] 0 IS Load [0 ] 0 IS Ifetch [0 ] 0 IS Store [0 ] 0 -IS Inv [22 ] 22 -IS L1_Replacement [508 ] 508 -IS Data_Exclusive [40 ] 40 +IS Inv [14 ] 14 +IS L1_Replacement [374 ] 374 +IS Data_Exclusive [41 ] 41 IS DataS_fromL1 [0 ] 0 -IS Data_all_Acks [34 ] 34 +IS Data_all_Acks [43 ] 43 IM Load [0 ] 0 IM Ifetch [0 ] 0 IM Store [0 ] 0 IM Inv [0 ] 0 -IM L1_Replacement [9080 ] 9080 +IM L1_Replacement [9112 ] 9112 IM Data [0 ] 0 -IM Data_all_Acks [801 ] 801 +IM Data_all_Acks [817 ] 817 IM Ack [0 ] 0 SM Load [0 ] 0 @@ -263,7 +263,7 @@ SM Store [0 ] 0 SM Inv [0 ] 0 SM L1_Replacement [0 ] 0 SM Ack [0 ] 0 -SM Ack_all [0 ] 0 +SM Ack_all [1 ] 1 IS_I Load [0 ] 0 IS_I Ifetch [0 ] 0 @@ -272,12 +272,12 @@ IS_I Inv [0 ] 0 IS_I L1_Replacement [0 ] 0 IS_I Data_Exclusive [0 ] 0 IS_I DataS_fromL1 [0 ] 0 -IS_I Data_all_Acks [22 ] 22 +IS_I Data_all_Acks [14 ] 14 M_I Load [0 ] 0 -M_I Ifetch [6 ] 6 +M_I Ifetch [10 ] 10 M_I Store [0 ] 0 -M_I Inv [400 ] 400 +M_I Inv [416 ] 416 M_I L1_Replacement [0 ] 0 M_I Fwd_GETX [0 ] 0 M_I Fwd_GETS [0 ] 0 @@ -285,73 +285,73 @@ M_I Fwd_GET_INSTR [0 ] 0 M_I WB_Ack [340 ] 340 SINK_WB_ACK Load [0 ] 0 -SINK_WB_ACK Ifetch [0 ] 0 +SINK_WB_ACK Ifetch [1 ] 1 SINK_WB_ACK Store [0 ] 0 SINK_WB_ACK Inv [0 ] 0 SINK_WB_ACK L1_Replacement [0 ] 0 -SINK_WB_ACK WB_Ack [400 ] 400 +SINK_WB_ACK WB_Ack [415 ] 415 Cache Stats: system.l2_cntrl0.L2cacheMemory - system.l2_cntrl0.L2cacheMemory_total_misses: 862 - system.l2_cntrl0.L2cacheMemory_total_demand_misses: 862 + system.l2_cntrl0.L2cacheMemory_total_misses: 874 + system.l2_cntrl0.L2cacheMemory_total_demand_misses: 874 system.l2_cntrl0.L2cacheMemory_total_prefetches: 0 system.l2_cntrl0.L2cacheMemory_total_sw_prefetches: 0 system.l2_cntrl0.L2cacheMemory_total_hw_prefetches: 0 - system.l2_cntrl0.L2cacheMemory_request_type_GETS: 4.75638% - system.l2_cntrl0.L2cacheMemory_request_type_GET_INSTR: 5.80046% - system.l2_cntrl0.L2cacheMemory_request_type_GETX: 89.4432% + system.l2_cntrl0.L2cacheMemory_request_type_GETS: 4.69108% + system.l2_cntrl0.L2cacheMemory_request_type_GET_INSTR: 5.26316% + system.l2_cntrl0.L2cacheMemory_request_type_GETX: 90.0458% - system.l2_cntrl0.L2cacheMemory_access_mode_type_Supervisor: 862 100% + system.l2_cntrl0.L2cacheMemory_access_mode_type_Supervisor: 874 100% --- L2Cache --- - Event Counts - L1_GET_INSTR [56 ] 56 -L1_GETS [41 ] 41 -L1_GETX [801 ] 801 -L1_UPGRADE [0 ] 0 -L1_PUTX [349 ] 349 -L1_PUTX_old [757 ] 757 +L1_GETS [42 ] 42 +L1_GETX [818 ] 818 +L1_UPGRADE [1 ] 1 +L1_PUTX [345 ] 345 +L1_PUTX_old [796 ] 796 Fwd_L1_GETX [0 ] 0 Fwd_L1_GETS [0 ] 0 Fwd_L1_GET_INSTR [0 ] 0 -L2_Replacement [297 ] 297 -L2_Replacement_clean [1183 ] 1183 -Mem_Data [861 ] 861 -Mem_Ack [856 ] 856 -WB_Data [473 ] 473 -WB_Data_clean [24 ] 24 +L2_Replacement [291 ] 291 +L2_Replacement_clean [1216 ] 1216 +Mem_Data [873 ] 873 +Mem_Ack [869 ] 869 +WB_Data [495 ] 495 +WB_Data_clean [18 ] 18 Ack [0 ] 0 -Ack_all [52 ] 52 +Ack_all [50 ] 50 Unblock [0 ] 0 Unblock_Cancel [0 ] 0 -Exclusive_Unblock [840 ] 840 +Exclusive_Unblock [858 ] 858 MEM_Inv [0 ] 0 - Transitions - -NP L1_GET_INSTR [50 ] 50 +NP L1_GET_INSTR [46 ] 46 NP L1_GETS [41 ] 41 -NP L1_GETX [771 ] 771 +NP L1_GETX [787 ] 787 NP L1_PUTX [0 ] 0 -NP L1_PUTX_old [264 ] 264 +NP L1_PUTX_old [302 ] 302 SS L1_GET_INSTR [0 ] 0 -SS L1_GETS [0 ] 0 -SS L1_GETX [6 ] 6 -SS L1_UPGRADE [0 ] 0 +SS L1_GETS [1 ] 1 +SS L1_GETX [9 ] 9 +SS L1_UPGRADE [1 ] 1 SS L1_PUTX [0 ] 0 SS L1_PUTX_old [0 ] 0 SS L2_Replacement [0 ] 0 -SS L2_Replacement_clean [50 ] 50 +SS L2_Replacement_clean [46 ] 46 SS MEM_Inv [0 ] 0 -M L1_GET_INSTR [6 ] 6 +M L1_GET_INSTR [10 ] 10 M L1_GETS [0 ] 0 -M L1_GETX [24 ] 24 +M L1_GETX [22 ] 22 M L1_PUTX [0 ] 0 M L1_PUTX_old [0 ] 0 -M L2_Replacement [297 ] 297 -M L2_Replacement_clean [12 ] 12 +M L2_Replacement [291 ] 291 +M L2_Replacement_clean [16 ] 16 M MEM_Inv [0 ] 0 MT L1_GET_INSTR [0 ] 0 @@ -360,7 +360,7 @@ MT L1_GETX [0 ] 0 MT L1_PUTX [340 ] 340 MT L1_PUTX_old [0 ] 0 MT L2_Replacement [0 ] 0 -MT L2_Replacement_clean [499 ] 499 +MT L2_Replacement_clean [517 ] 517 MT MEM_Inv [0 ] 0 M_I L1_GET_INSTR [0 ] 0 @@ -368,8 +368,8 @@ M_I L1_GETS [0 ] 0 M_I L1_GETX [0 ] 0 M_I L1_UPGRADE [0 ] 0 M_I L1_PUTX [0 ] 0 -M_I L1_PUTX_old [136 ] 136 -M_I Mem_Ack [856 ] 856 +M_I L1_PUTX_old [113 ] 113 +M_I Mem_Ack [869 ] 869 M_I MEM_Inv [0 ] 0 MT_I L1_GET_INSTR [0 ] 0 @@ -388,10 +388,10 @@ MCT_I L1_GETS [0 ] 0 MCT_I L1_GETX [0 ] 0 MCT_I L1_UPGRADE [0 ] 0 MCT_I L1_PUTX [0 ] 0 -MCT_I L1_PUTX_old [181 ] 181 -MCT_I WB_Data [473 ] 473 -MCT_I WB_Data_clean [24 ] 24 -MCT_I Ack_all [2 ] 2 +MCT_I L1_PUTX_old [210 ] 210 +MCT_I WB_Data [495 ] 495 +MCT_I WB_Data_clean [18 ] 18 +MCT_I Ack_all [4 ] 4 I_I L1_GET_INSTR [0 ] 0 I_I L1_GETS [0 ] 0 @@ -400,7 +400,7 @@ I_I L1_UPGRADE [0 ] 0 I_I L1_PUTX [0 ] 0 I_I L1_PUTX_old [0 ] 0 I_I Ack [0 ] 0 -I_I Ack_all [50 ] 50 +I_I Ack_all [46 ] 46 S_I L1_GET_INSTR [0 ] 0 S_I L1_GETS [0 ] 0 @@ -418,8 +418,8 @@ ISS L1_GETX [0 ] 0 ISS L1_PUTX [0 ] 0 ISS L1_PUTX_old [0 ] 0 ISS L2_Replacement [0 ] 0 -ISS L2_Replacement_clean [14 ] 14 -ISS Mem_Data [40 ] 40 +ISS L2_Replacement_clean [11 ] 11 +ISS Mem_Data [41 ] 41 ISS MEM_Inv [0 ] 0 IS L1_GET_INSTR [0 ] 0 @@ -428,8 +428,8 @@ IS L1_GETX [0 ] 0 IS L1_PUTX [0 ] 0 IS L1_PUTX_old [0 ] 0 IS L2_Replacement [0 ] 0 -IS L2_Replacement_clean [69 ] 69 -IS Mem_Data [50 ] 50 +IS L2_Replacement_clean [57 ] 57 +IS Mem_Data [46 ] 46 IS MEM_Inv [0 ] 0 IM L1_GET_INSTR [0 ] 0 @@ -438,8 +438,8 @@ IM L1_GETX [0 ] 0 IM L1_PUTX [0 ] 0 IM L1_PUTX_old [0 ] 0 IM L2_Replacement [0 ] 0 -IM L2_Replacement_clean [225 ] 225 -IM Mem_Data [771 ] 771 +IM L2_Replacement_clean [219 ] 219 +IM Mem_Data [786 ] 786 IM MEM_Inv [0 ] 0 SS_MB L1_GET_INSTR [0 ] 0 @@ -451,19 +451,19 @@ SS_MB L1_PUTX_old [0 ] 0 SS_MB L2_Replacement [0 ] 0 SS_MB L2_Replacement_clean [0 ] 0 SS_MB Unblock_Cancel [0 ] 0 -SS_MB Exclusive_Unblock [6 ] 6 +SS_MB Exclusive_Unblock [10 ] 10 SS_MB MEM_Inv [0 ] 0 MT_MB L1_GET_INSTR [0 ] 0 MT_MB L1_GETS [0 ] 0 MT_MB L1_GETX [0 ] 0 MT_MB L1_UPGRADE [0 ] 0 -MT_MB L1_PUTX [9 ] 9 -MT_MB L1_PUTX_old [176 ] 176 +MT_MB L1_PUTX [5 ] 5 +MT_MB L1_PUTX_old [171 ] 171 MT_MB L2_Replacement [0 ] 0 -MT_MB L2_Replacement_clean [314 ] 314 +MT_MB L2_Replacement_clean [350 ] 350 MT_MB Unblock_Cancel [0 ] 0 -MT_MB Exclusive_Unblock [834 ] 834 +MT_MB Exclusive_Unblock [848 ] 848 MT_MB MEM_Inv [0 ] 0 M_MB L1_GET_INSTR [0 ] 0 @@ -515,37 +515,37 @@ MT_SB Unblock [0 ] 0 MT_SB MEM_Inv [0 ] 0 Memory controller: system.dir_cntrl0.memBuffer: - memory_total_requests: 1632 - memory_reads: 861 - memory_writes: 770 - memory_refreshes: 729 - memory_total_request_delays: 1043 - memory_delays_per_request: 0.639093 - memory_delays_in_input_queue: 147 - memory_delays_behind_head_of_bank_queue: 0 - memory_delays_stalled_at_head_of_bank_queue: 896 - memory_stalls_for_bank_busy: 170 + memory_total_requests: 1660 + memory_reads: 874 + memory_writes: 786 + memory_refreshes: 2210 + memory_total_request_delays: 601 + memory_delays_per_request: 0.362048 + memory_delays_in_input_queue: 44 + memory_delays_behind_head_of_bank_queue: 2 + memory_delays_stalled_at_head_of_bank_queue: 555 + memory_stalls_for_bank_busy: 169 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 70 - memory_stalls_for_bus: 355 + memory_stalls_for_arbitration: 30 + memory_stalls_for_bus: 188 memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 230 - memory_stalls_for_read_read_turnaround: 71 - accesses_per_bank: 59 40 48 77 75 69 65 47 55 56 48 54 65 48 34 60 44 35 56 37 49 41 46 49 50 48 50 47 58 40 41 41 + memory_stalls_for_read_write_turnaround: 104 + memory_stalls_for_read_read_turnaround: 64 + accesses_per_bank: 42 51 50 73 73 71 65 49 54 41 50 44 58 48 47 63 57 47 58 57 41 49 46 49 57 45 42 49 45 53 48 38 --- Directory --- - Event Counts - -Fetch [862 ] 862 -Data [770 ] 770 -Memory_Data [861 ] 861 -Memory_Ack [770 ] 770 +Fetch [874 ] 874 +Data [786 ] 786 +Memory_Data [874 ] 874 +Memory_Ack [786 ] 786 DMA_READ [0 ] 0 DMA_WRITE [0 ] 0 -CleanReplacement [88 ] 88 +CleanReplacement [84 ] 84 - Transitions - -I Fetch [862 ] 862 +I Fetch [874 ] 874 I DMA_READ [0 ] 0 I DMA_WRITE [0 ] 0 @@ -561,20 +561,20 @@ ID_W Memory_Ack [0 ] 0 ID_W DMA_READ [0 ] 0 ID_W DMA_WRITE [0 ] 0 -M Data [770 ] 770 +M Data [786 ] 786 M DMA_READ [0 ] 0 M DMA_WRITE [0 ] 0 -M CleanReplacement [88 ] 88 +M CleanReplacement [84 ] 84 IM Fetch [0 ] 0 IM Data [0 ] 0 -IM Memory_Data [861 ] 861 +IM Memory_Data [874 ] 874 IM DMA_READ [0 ] 0 IM DMA_WRITE [0 ] 0 MI Fetch [0 ] 0 MI Data [0 ] 0 -MI Memory_Ack [770 ] 770 +MI Memory_Ack [786 ] 786 MI DMA_READ [0 ] 0 MI DMA_WRITE [0 ] 0 diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout index d145eb7c5..fddb193cf 100755 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout @@ -1,10 +1,12 @@ +Redirecting stdout to build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout +Redirecting stderr to build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jul 28 2012 11:30:15 -gem5 started Jul 28 2012 11:35:50 -gem5 executing on zizzer +gem5 compiled Sep 1 2012 14:01:54 +gem5 started Sep 1 2012 14:05:06 +gem5 executing on doudou.cs.wisc.edu command line: build/ALPHA_MESI_CMP_directory/gem5.opt -d build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory -re tests/run.py build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 349711 because Ruby Tester completed +Exiting @ tick 318321 because Ruby Tester completed diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt index 7224a1c96..618fbf540 100644 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt @@ -1,12 +1,12 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 0.000350 # Number of seconds simulated -sim_ticks 349711 # Number of ticks simulated -final_tick 349711 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_seconds 0.000318 # Number of seconds simulated +sim_ticks 318321 # Number of ticks simulated +final_tick 318321 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_tick_rate 2474351 # Simulator tick rate (ticks/s) -host_mem_usage 229272 # Number of bytes of host memory used -host_seconds 0.14 # Real time elapsed on the host +host_tick_rate 1505639 # Simulator tick rate (ticks/s) +host_mem_usage 260768 # Number of bytes of host memory used +host_seconds 0.21 # Real time elapsed on the host system.l1_cntrl0.L1DcacheMemory.num_data_array_reads 0 # number of data array reads system.l1_cntrl0.L1DcacheMemory.num_data_array_writes 0 # number of data array writes system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini index dc2ecd66a..783db058f 100644 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini @@ -10,6 +10,7 @@ time_sync_spin_threshold=100000 type=System children=dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby sys_port_proxy tester boot_osflags=a +clock=1 init_param=0 kernel= load_addr_mask=1099511627775 @@ -56,9 +57,9 @@ bank_busy_time=11 bank_queue_size=12 banks_per_rank=8 basic_bus_busy_time=2 +clock=3 dimm_bit_0=12 dimms_per_channel=2 -mem_bus_cycle_multiplier=10 mem_ctl_latency=12 mem_fixed_delay=0 mem_random_arbitrate=0 @@ -67,6 +68,7 @@ rank_rank_delay=1 ranks_per_dimm=2 read_write_delay=2 refresh_period=1560 +ruby_system=system.ruby tFaw=0 version=0 @@ -118,6 +120,7 @@ tagArrayBanks=1 [system.l1_cntrl0.sequencer] type=RubySequencer access_phys_mem=false +clock=1 dcache=system.l1_cntrl0.L1DcacheMemory deadlock_threshold=500000 icache=system.l1_cntrl0.L1IcacheMemory @@ -161,6 +164,7 @@ tagArrayBanks=1 [system.physmem] type=SimpleMemory +clock=1 conf_table_reported=false file= in_addr_map=true @@ -285,6 +289,7 @@ ruby_system=system.ruby [system.sys_port_proxy] type=RubyPortProxy access_phys_mem=true +clock=1 ruby_system=system.ruby support_data_reqs=true support_inst_reqs=true @@ -298,6 +303,7 @@ slave=system.system_port type=RubyTester check_flush=false checks_to_complete=100 +clock=1 deadlock_threshold=50000 num_cpus=1 system=system diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats index 5feac2c34..19907d578 100644 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats @@ -1,26 +1,26 @@ -Real time: Jul/10/2012 17:44:41 +Real time: Sep/01/2012 14:14:50 Profiler Stats -------------- -Elapsed_time_in_seconds: 0 -Elapsed_time_in_minutes: 0 -Elapsed_time_in_hours: 0 -Elapsed_time_in_days: 0 +Elapsed_time_in_seconds: 1 +Elapsed_time_in_minutes: 0.0166667 +Elapsed_time_in_hours: 0.000277778 +Elapsed_time_in_days: 1.15741e-05 -Virtual_time_in_seconds: 1.08 -Virtual_time_in_minutes: 0.018 -Virtual_time_in_hours: 0.0003 -Virtual_time_in_days: 1.25e-05 +Virtual_time_in_seconds: 0.83 +Virtual_time_in_minutes: 0.0138333 +Virtual_time_in_hours: 0.000230556 +Virtual_time_in_days: 9.60648e-06 -Ruby_current_time: 357561 +Ruby_current_time: 316521 Ruby_start_time: 0 -Ruby_cycles: 357561 +Ruby_cycles: 316521 -mbytes_resident: 41.8789 -mbytes_total: 225.645 -resident_ratio: 0.185631 +mbytes_resident: 44.0977 +mbytes_total: 254.852 +resident_ratio: 0.173094 -ruby_cycles_executed: [ 357562 ] +ruby_cycles_executed: [ 316522 ] Busy Controller Counts: L2Cache-0:0 @@ -30,15 +30,15 @@ Directory-0:0 Busy Bank Count:0 -sequencer_requests_outstanding: [binsize: 1 max: 16 count: 959 average: 15.8321 | standard deviation: 1.14411 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 42 903 ] +sequencer_requests_outstanding: [binsize: 1 max: 16 count: 977 average: 15.825 | standard deviation: 1.13712 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 52 911 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 256 max: 35755 count: 944 average: 5943.47 | standard deviation: 8648.87 | 80 45 92 101 84 54 37 40 29 42 18 14 12 10 11 11 4 10 2 6 6 0 1 3 5 3 4 3 0 5 2 1 4 4 1 1 1 1 2 2 2 0 1 1 1 0 1 1 0 0 0 0 0 0 0 1 2 1 0 1 1 1 2 1 5 5 2 1 1 4 1 8 4 3 6 6 6 2 4 10 4 6 2 5 3 3 3 1 4 5 3 3 4 4 1 3 0 2 2 0 6 4 3 1 1 0 1 2 5 0 2 1 1 2 0 0 3 2 0 3 2 1 2 0 1 1 1 1 0 2 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_LD: [binsize: 256 max: 32625 count: 44 average: 6010.95 | standard deviation: 9060.42 | 5 4 0 9 2 5 2 0 2 2 0 1 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 1 0 0 0 0 1 0 0 0 1 0 1 1 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_ST: [binsize: 256 max: 35755 count: 844 average: 6286.24 | standard deviation: 8806.66 | 73 32 69 78 75 48 35 40 27 40 18 13 12 10 11 11 4 8 2 6 6 0 1 3 5 3 4 3 0 5 2 1 4 4 1 1 1 1 2 2 2 0 1 1 1 0 1 1 0 0 0 0 0 0 0 1 2 1 0 1 1 1 2 1 5 4 2 1 1 4 1 8 3 3 5 6 6 2 4 9 4 6 2 4 3 2 2 1 4 5 3 3 2 4 1 3 0 2 2 0 6 4 3 1 1 0 1 2 5 0 2 1 1 2 0 0 3 2 0 3 2 1 2 0 1 1 1 0 0 2 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_IFETCH: [binsize: 8 max: 1342 count: 56 average: 724.5 | standard deviation: 266.653 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 2 1 0 0 1 1 0 0 0 0 2 2 4 1 0 0 1 1 0 0 1 1 0 0 2 1 1 1 0 0 0 1 0 1 1 0 0 1 0 0 0 1 1 0 0 1 0 0 0 0 1 1 3 1 1 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 2 0 0 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] -miss_latency_NULL: [binsize: 256 max: 35755 count: 944 average: 5943.47 | standard deviation: 8648.87 | 80 45 92 101 84 54 37 40 29 42 18 14 12 10 11 11 4 10 2 6 6 0 1 3 5 3 4 3 0 5 2 1 4 4 1 1 1 1 2 2 2 0 1 1 1 0 1 1 0 0 0 0 0 0 0 1 2 1 0 1 1 1 2 1 5 5 2 1 1 4 1 8 4 3 6 6 6 2 4 10 4 6 2 5 3 3 3 1 4 5 3 3 4 4 1 3 0 2 2 0 6 4 3 1 1 0 1 2 5 0 2 1 1 2 0 0 3 2 0 3 2 1 2 0 1 1 1 1 0 2 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency: [binsize: 256 max: 34293 count: 962 average: 5083.18 | standard deviation: 7651.66 | 97 58 107 114 62 59 47 32 38 24 25 15 18 13 6 9 6 5 2 4 5 3 3 2 2 2 1 0 0 2 2 2 1 2 3 1 2 2 1 2 0 0 2 1 1 2 3 0 3 2 1 0 2 1 2 5 3 4 3 2 3 2 2 4 3 3 10 3 2 5 4 1 8 2 6 4 5 4 4 2 1 1 2 4 3 2 4 0 2 1 6 0 3 3 1 1 1 3 6 1 1 0 1 2 0 0 0 1 1 1 0 1 6 1 1 1 1 0 0 0 0 1 0 1 0 0 0 1 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD: [binsize: 128 max: 25205 count: 44 average: 5768.3 | standard deviation: 8418.68 | 7 0 1 1 0 0 6 2 3 1 0 0 2 3 0 1 0 0 2 0 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 2 ] +miss_latency_ST: [binsize: 256 max: 34293 count: 862 average: 5340.56 | standard deviation: 7771.5 | 84 40 83 99 56 58 42 31 38 22 24 14 17 12 6 9 6 5 2 4 5 3 3 2 2 2 1 0 0 2 2 2 1 2 2 1 2 2 1 2 0 0 2 1 1 2 3 0 3 2 1 0 2 1 2 5 3 4 3 2 1 1 2 4 3 3 10 3 2 5 4 1 7 2 6 4 5 4 3 2 1 1 2 4 3 2 3 0 2 1 5 0 3 3 1 0 1 3 4 1 1 0 1 2 0 0 0 1 1 1 0 1 6 1 1 1 1 0 0 0 0 1 0 1 0 0 0 1 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_IFETCH: [binsize: 8 max: 1374 count: 56 average: 583.107 | standard deviation: 267.301 | 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 1 0 0 1 1 2 0 0 0 0 0 1 0 1 0 0 2 1 1 1 0 2 0 1 0 1 0 0 0 2 0 0 1 0 0 0 0 1 1 0 0 1 1 3 3 1 2 2 1 0 1 0 0 0 0 0 2 1 1 0 0 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 ] +miss_latency_NULL: [binsize: 256 max: 34293 count: 962 average: 5083.18 | standard deviation: 7651.66 | 97 58 107 114 62 59 47 32 38 24 25 15 18 13 6 9 6 5 2 4 5 3 3 2 2 2 1 0 0 2 2 2 1 2 3 1 2 2 1 2 0 0 2 1 1 2 3 0 3 2 1 0 2 1 2 5 3 4 3 2 3 2 2 4 3 3 10 3 2 5 4 1 8 2 6 4 5 4 4 2 1 1 2 4 3 2 4 0 2 1 6 0 3 3 1 1 1 3 6 1 1 0 1 2 0 0 0 1 1 1 0 1 6 1 1 1 1 0 0 0 0 1 0 1 0 0 0 1 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] @@ -49,9 +49,9 @@ miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: N miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] imcomplete_dir_Times: 0 -miss_latency_LD_NULL: [binsize: 256 max: 32625 count: 44 average: 6010.95 | standard deviation: 9060.42 | 5 4 0 9 2 5 2 0 2 2 0 1 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 1 0 0 0 0 1 0 0 0 1 0 1 1 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_ST_NULL: [binsize: 256 max: 35755 count: 844 average: 6286.24 | standard deviation: 8806.66 | 73 32 69 78 75 48 35 40 27 40 18 13 12 10 11 11 4 8 2 6 6 0 1 3 5 3 4 3 0 5 2 1 4 4 1 1 1 1 2 2 2 0 1 1 1 0 1 1 0 0 0 0 0 0 0 1 2 1 0 1 1 1 2 1 5 4 2 1 1 4 1 8 3 3 5 6 6 2 4 9 4 6 2 4 3 2 2 1 4 5 3 3 2 4 1 3 0 2 2 0 6 4 3 1 1 0 1 2 5 0 2 1 1 2 0 0 3 2 0 3 2 1 2 0 1 1 1 0 0 2 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_IFETCH_NULL: [binsize: 8 max: 1342 count: 56 average: 724.5 | standard deviation: 266.653 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 2 1 0 0 1 1 0 0 0 0 2 2 4 1 0 0 1 1 0 0 1 1 0 0 2 1 1 1 0 0 0 1 0 1 1 0 0 1 0 0 0 1 1 0 0 1 0 0 0 0 1 1 3 1 1 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 2 0 0 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_LD_NULL: [binsize: 128 max: 25205 count: 44 average: 5768.3 | standard deviation: 8418.68 | 7 0 1 1 0 0 6 2 3 1 0 0 2 3 0 1 0 0 2 0 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 2 ] +miss_latency_ST_NULL: [binsize: 256 max: 34293 count: 862 average: 5340.56 | standard deviation: 7771.5 | 84 40 83 99 56 58 42 31 38 22 24 14 17 12 6 9 6 5 2 4 5 3 3 2 2 2 1 0 0 2 2 2 1 2 2 1 2 2 1 2 0 0 2 1 1 2 3 0 3 2 1 0 2 1 2 5 3 4 3 2 1 1 2 4 3 3 10 3 2 5 4 1 7 2 6 4 5 4 3 2 1 1 2 4 3 2 3 0 2 1 5 0 3 3 1 0 1 3 4 1 1 0 1 2 0 0 0 1 1 1 0 1 6 1 1 1 1 0 0 0 0 1 0 1 0 0 0 1 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_IFETCH_NULL: [binsize: 8 max: 1374 count: 56 average: 583.107 | standard deviation: 267.301 | 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 1 0 0 1 1 2 0 0 0 0 0 1 0 1 0 0 2 1 1 1 0 2 0 1 0 1 0 0 0 2 0 0 1 0 0 0 0 1 1 0 0 1 1 3 3 1 2 2 1 0 1 0 0 0 0 0 2 1 1 0 0 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -81,89 +81,89 @@ Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard dev Resource Usage -------------- page_size: 4096 -user_time: 1 +user_time: 0 system_time: 0 -page_reclaims: 11882 +page_reclaims: 8272 page_faults: 0 swaps: 0 block_inputs: 0 -block_outputs: 0 +block_outputs: 80 Network Stats ------------- -total_msg_count_Request_Control: 5082 40656 -total_msg_count_Response_Data: 4932 355104 -total_msg_count_ResponseL2hit_Data: 138 9936 -total_msg_count_Writeback_Data: 4785 344520 -total_msg_count_Writeback_Control: 10307 82456 -total_msg_count_Unblock_Control: 5058 40464 -total_msgs: 30302 total_bytes: 873136 +total_msg_count_Request_Control: 5112 40896 +total_msg_count_Response_Data: 4992 359424 +total_msg_count_ResponseL2hit_Data: 120 8640 +total_msg_count_Writeback_Data: 4839 348408 +total_msg_count_Writeback_Control: 10370 82960 +total_msg_count_Unblock_Control: 5107 40856 +total_msgs: 30540 total_bytes: 881184 switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 2.54369 - links_utilized_percent_switch_0_link_0: 2.59676 bw: 16000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 2.49062 bw: 16000 base_latency: 1 - - outgoing_messages_switch_0_link_0_Request_Control: 870 6960 [ 870 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Response_Data: 822 59184 [ 0 0 822 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Writeback_Data: 862 62064 [ 0 0 862 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Writeback_Control: 1678 13424 [ 865 813 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Unblock_Control: 866 6928 [ 0 0 866 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Request_Control: 824 6592 [ 0 824 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Response_Data: 822 59184 [ 0 0 822 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_ResponseL2hit_Data: 46 3312 [ 0 0 46 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Data: 733 52776 [ 0 0 733 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Control: 1758 14064 [ 865 813 80 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Unblock_Control: 820 6560 [ 0 0 820 0 0 0 0 0 0 0 ] base_latency: 1 +links_utilized_percent_switch_0: 2.89997 + links_utilized_percent_switch_0_link_0: 2.95778 bw: 16000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 2.84215 bw: 16000 base_latency: 1 + + outgoing_messages_switch_0_link_0_Request_Control: 872 6976 [ 872 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Response_Data: 832 59904 [ 0 0 832 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Writeback_Data: 867 62424 [ 0 0 867 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Writeback_Control: 1690 13520 [ 867 823 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Unblock_Control: 871 6968 [ 0 0 871 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Request_Control: 832 6656 [ 0 832 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Response_Data: 832 59904 [ 0 0 832 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_ResponseL2hit_Data: 40 2880 [ 0 0 40 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Data: 746 53712 [ 0 0 746 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Control: 1767 14136 [ 867 824 76 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Unblock_Control: 831 6648 [ 0 0 831 0 0 0 0 0 0 0 ] base_latency: 1 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 1.33089 - links_utilized_percent_switch_1_link_0: 1.21322 bw: 16000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 1.44856 bw: 16000 base_latency: 1 - - outgoing_messages_switch_1_link_0_Response_Data: 822 59184 [ 0 0 822 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_ResponseL2hit_Data: 46 3312 [ 0 0 46 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Writeback_Control: 864 6912 [ 864 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Request_Control: 870 6960 [ 870 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Writeback_Data: 862 62064 [ 0 0 862 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Writeback_Control: 865 6920 [ 865 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Unblock_Control: 866 6928 [ 0 0 866 0 0 0 0 0 0 0 ] base_latency: 1 +links_utilized_percent_switch_1: 1.51096 + links_utilized_percent_switch_1_link_0: 1.37669 bw: 16000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 1.64523 bw: 16000 base_latency: 1 + + outgoing_messages_switch_1_link_0_Response_Data: 832 59904 [ 0 0 832 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_ResponseL2hit_Data: 40 2880 [ 0 0 40 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Writeback_Control: 867 6936 [ 867 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Request_Control: 872 6976 [ 872 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Writeback_Data: 867 62424 [ 0 0 867 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Writeback_Control: 868 6944 [ 868 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Unblock_Control: 872 6976 [ 0 0 872 0 0 0 0 0 0 0 ] base_latency: 1 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 1.21273 - links_utilized_percent_switch_2_link_0: 1.27726 bw: 16000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 1.1482 bw: 16000 base_latency: 1 +links_utilized_percent_switch_2: 1.38901 + links_utilized_percent_switch_2_link_0: 1.46515 bw: 16000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 1.31287 bw: 16000 base_latency: 1 - outgoing_messages_switch_2_link_0_Request_Control: 824 6592 [ 0 824 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Writeback_Data: 733 52776 [ 0 0 733 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Writeback_Control: 893 7144 [ 0 813 80 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Unblock_Control: 820 6560 [ 0 0 820 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Response_Data: 822 59184 [ 0 0 822 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Writeback_Control: 813 6504 [ 0 813 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Request_Control: 832 6656 [ 0 832 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Writeback_Data: 746 53712 [ 0 0 746 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Writeback_Control: 899 7192 [ 0 823 76 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Unblock_Control: 830 6640 [ 0 0 830 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Response_Data: 832 59904 [ 0 0 832 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Writeback_Control: 823 6584 [ 0 823 0 0 0 0 0 0 0 0 ] base_latency: 1 switch_3_inlinks: 3 switch_3_outlinks: 3 -links_utilized_percent_switch_3: 1.69579 - links_utilized_percent_switch_3_link_0: 2.59676 bw: 16000 base_latency: 1 - links_utilized_percent_switch_3_link_1: 1.21336 bw: 16000 base_latency: 1 - links_utilized_percent_switch_3_link_2: 1.27726 bw: 16000 base_latency: 1 - - outgoing_messages_switch_3_link_0_Request_Control: 870 6960 [ 870 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_Response_Data: 822 59184 [ 0 0 822 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_Writeback_Data: 862 62064 [ 0 0 862 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_Writeback_Control: 1678 13424 [ 865 813 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_Unblock_Control: 866 6928 [ 0 0 866 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Response_Data: 822 59184 [ 0 0 822 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_ResponseL2hit_Data: 46 3312 [ 0 0 46 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Writeback_Control: 865 6920 [ 865 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Request_Control: 824 6592 [ 0 824 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Writeback_Data: 733 52776 [ 0 0 733 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Writeback_Control: 893 7144 [ 0 813 80 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Unblock_Control: 820 6560 [ 0 0 820 0 0 0 0 0 0 0 ] base_latency: 1 +links_utilized_percent_switch_3: 1.93331 + links_utilized_percent_switch_3_link_0: 2.95794 bw: 16000 base_latency: 1 + links_utilized_percent_switch_3_link_1: 1.37669 bw: 16000 base_latency: 1 + links_utilized_percent_switch_3_link_2: 1.46531 bw: 16000 base_latency: 1 + + outgoing_messages_switch_3_link_0_Request_Control: 872 6976 [ 872 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_Response_Data: 832 59904 [ 0 0 832 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_Writeback_Data: 867 62424 [ 0 0 867 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_Writeback_Control: 1690 13520 [ 867 823 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_Unblock_Control: 872 6976 [ 0 0 872 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Response_Data: 832 59904 [ 0 0 832 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_ResponseL2hit_Data: 40 2880 [ 0 0 40 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Writeback_Control: 867 6936 [ 867 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Request_Control: 832 6656 [ 0 832 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Writeback_Data: 746 53712 [ 0 0 746 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Writeback_Control: 899 7192 [ 0 823 76 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Unblock_Control: 831 6648 [ 0 0 831 0 0 0 0 0 0 0 ] base_latency: 1 Cache Stats: system.l1_cntrl0.L1IcacheMemory system.l1_cntrl0.L1IcacheMemory_total_misses: 0 @@ -183,10 +183,10 @@ Cache Stats: system.l1_cntrl0.L1DcacheMemory --- L1Cache --- - Event Counts - -Load [47 ] 47 -Ifetch [318 ] 318 -Store [964 ] 964 -L1_Replacement [506921 ] 506921 +Load [44 ] 44 +Ifetch [204 ] 204 +Store [1039 ] 1039 +L1_Replacement [449881 ] 449881 Own_GETX [0 ] 0 Fwd_GETX [0 ] 0 Fwd_GETS [0 ] 0 @@ -194,17 +194,17 @@ Fwd_DMA [0 ] 0 Inv [0 ] 0 Ack [0 ] 0 Data [0 ] 0 -Exclusive_Data [868 ] 868 +Exclusive_Data [872 ] 872 Writeback_Ack [0 ] 0 -Writeback_Ack_Data [864 ] 864 +Writeback_Ack_Data [867 ] 867 Writeback_Nack [0 ] 0 -All_acks [772 ] 772 -Use_Timeout [866 ] 866 +All_acks [782 ] 782 +Use_Timeout [870 ] 870 - Transitions - -I Load [41 ] 41 -I Ifetch [56 ] 56 -I Store [773 ] 773 +I Load [37 ] 37 +I Ifetch [53 ] 53 +I Store [783 ] 783 I L1_Replacement [0 ] 0 I Inv [0 ] 0 @@ -225,28 +225,28 @@ O Fwd_GETS [0 ] 0 O Fwd_DMA [0 ] 0 M Load [0 ] 0 -M Ifetch [0 ] 0 +M Ifetch [3 ] 3 M Store [0 ] 0 -M L1_Replacement [94 ] 94 +M L1_Replacement [88 ] 88 M Fwd_GETX [0 ] 0 M Fwd_GETS [0 ] 0 M Fwd_DMA [0 ] 0 -M_W Load [1 ] 1 +M_W Load [0 ] 0 M_W Ifetch [0 ] 0 M_W Store [0 ] 0 -M_W L1_Replacement [1321 ] 1321 +M_W L1_Replacement [1690 ] 1690 M_W Own_GETX [0 ] 0 M_W Fwd_GETX [0 ] 0 M_W Fwd_GETS [0 ] 0 M_W Fwd_DMA [0 ] 0 M_W Inv [0 ] 0 -M_W Use_Timeout [94 ] 94 +M_W Use_Timeout [90 ] 90 -MM Load [2 ] 2 +MM Load [6 ] 6 MM Ifetch [0 ] 0 -MM Store [66 ] 66 -MM L1_Replacement [771 ] 771 +MM Store [74 ] 74 +MM L1_Replacement [780 ] 780 MM Fwd_GETX [0 ] 0 MM Fwd_GETS [0 ] 0 MM Fwd_DMA [0 ] 0 @@ -254,22 +254,22 @@ MM Fwd_DMA [0 ] 0 MM_W Load [1 ] 1 MM_W Ifetch [0 ] 0 MM_W Store [6 ] 6 -MM_W L1_Replacement [28136 ] 28136 +MM_W L1_Replacement [28210 ] 28210 MM_W Own_GETX [0 ] 0 MM_W Fwd_GETX [0 ] 0 MM_W Fwd_GETS [0 ] 0 MM_W Fwd_DMA [0 ] 0 MM_W Inv [0 ] 0 -MM_W Use_Timeout [772 ] 772 +MM_W Use_Timeout [780 ] 780 IM Load [0 ] 0 IM Ifetch [0 ] 0 IM Store [0 ] 0 -IM L1_Replacement [439219 ] 439219 +IM L1_Replacement [383229 ] 383229 IM Inv [0 ] 0 IM Ack [0 ] 0 IM Data [0 ] 0 -IM Exclusive_Data [772 ] 772 +IM Exclusive_Data [782 ] 782 SM Load [0 ] 0 SM Ifetch [0 ] 0 @@ -285,21 +285,21 @@ SM Exclusive_Data [0 ] 0 OM Load [0 ] 0 OM Ifetch [0 ] 0 OM Store [0 ] 0 -OM L1_Replacement [14936 ] 14936 +OM L1_Replacement [14910 ] 14910 OM Own_GETX [0 ] 0 OM Fwd_GETX [0 ] 0 OM Fwd_GETS [0 ] 0 OM Fwd_DMA [0 ] 0 OM Ack [0 ] 0 -OM All_acks [772 ] 772 +OM All_acks [782 ] 782 IS Load [0 ] 0 IS Ifetch [0 ] 0 IS Store [0 ] 0 -IS L1_Replacement [22444 ] 22444 +IS L1_Replacement [20974 ] 20974 IS Inv [0 ] 0 IS Data [0 ] 0 -IS Exclusive_Data [96 ] 96 +IS Exclusive_Data [90 ] 90 SI Load [0 ] 0 SI Ifetch [0 ] 0 @@ -323,15 +323,15 @@ OI Writeback_Ack [0 ] 0 OI Writeback_Ack_Data [0 ] 0 OI Writeback_Nack [0 ] 0 -MI Load [2 ] 2 -MI Ifetch [262 ] 262 -MI Store [119 ] 119 +MI Load [0 ] 0 +MI Ifetch [148 ] 148 +MI Store [176 ] 176 MI L1_Replacement [0 ] 0 MI Fwd_GETX [0 ] 0 MI Fwd_GETS [0 ] 0 MI Fwd_DMA [0 ] 0 MI Writeback_Ack [0 ] 0 -MI Writeback_Ack_Data [864 ] 864 +MI Writeback_Ack_Data [867 ] 867 MI Writeback_Nack [0 ] 0 II Load [0 ] 0 @@ -353,10 +353,10 @@ Cache Stats: system.l2_cntrl0.L2cacheMemory --- L2Cache --- - Event Counts - -L1_GETS [127 ] 127 -L1_GETX [839 ] 839 +L1_GETS [129 ] 129 +L1_GETX [848 ] 848 L1_PUTO [0 ] 0 -L1_PUTX [2005 ] 2005 +L1_PUTX [2406 ] 2406 L1_PUTS_only [0 ] 0 L1_PUTS [0 ] 0 Fwd_GETX [0 ] 0 @@ -366,21 +366,21 @@ Own_GETX [0 ] 0 Inv [0 ] 0 IntAck [0 ] 0 ExtAck [0 ] 0 -All_Acks [736 ] 736 -Data [736 ] 736 -Data_Exclusive [86 ] 86 -L1_WBCLEANDATA [84 ] 84 -L1_WBDIRTYDATA [778 ] 778 -Writeback_Ack [813 ] 813 +All_Acks [752 ] 752 +Data [752 ] 752 +Data_Exclusive [80 ] 80 +L1_WBCLEANDATA [79 ] 79 +L1_WBDIRTYDATA [788 ] 788 +Writeback_Ack [823 ] 823 Writeback_Nack [0 ] 0 Unblock [0 ] 0 -Exclusive_Unblock [866 ] 866 +Exclusive_Unblock [871 ] 871 DmaAck [0 ] 0 -L2_Replacement [814 ] 814 +L2_Replacement [824 ] 824 - Transitions - -NP L1_GETS [87 ] 87 -NP L1_GETX [737 ] 737 +NP L1_GETS [80 ] 80 +NP L1_GETX [752 ] 752 NP L1_PUTO [0 ] 0 NP L1_PUTX [0 ] 0 NP L1_PUTS [0 ] 0 @@ -406,7 +406,7 @@ ILS L2_Replacement [0 ] 0 ILX L1_GETS [0 ] 0 ILX L1_GETX [0 ] 0 ILX L1_PUTO [0 ] 0 -ILX L1_PUTX [865 ] 865 +ILX L1_PUTX [867 ] 867 ILX L1_PUTS_only [0 ] 0 ILX L1_PUTS [0 ] 0 ILX Fwd_GETX [0 ] 0 @@ -506,14 +506,14 @@ SLS Inv [0 ] 0 SLS L2_Replacement [0 ] 0 M L1_GETS [10 ] 10 -M L1_GETX [36 ] 36 +M L1_GETX [30 ] 30 M L1_PUTO [0 ] 0 M L1_PUTX [0 ] 0 M L1_PUTS [0 ] 0 M Fwd_GETX [0 ] 0 M Fwd_GETS [0 ] 0 M Fwd_DMA [0 ] 0 -M L2_Replacement [813 ] 813 +M L2_Replacement [824 ] 824 IFGX L1_GETS [0 ] 0 IFGX L1_GETX [0 ] 0 @@ -762,8 +762,8 @@ OLSXW Inv [0 ] 0 OLSXW Unblock [0 ] 0 OLSXW L2_Replacement [0 ] 0 -ILXW L1_GETS [30 ] 30 -ILXW L1_GETX [31 ] 31 +ILXW L1_GETS [36 ] 36 +ILXW L1_GETX [47 ] 47 ILXW L1_PUTO [0 ] 0 ILXW L1_PUTX [0 ] 0 ILXW L1_PUTS_only [0 ] 0 @@ -773,8 +773,8 @@ ILXW Fwd_GETS [0 ] 0 ILXW Fwd_DMA [0 ] 0 ILXW Inv [0 ] 0 ILXW Data [0 ] 0 -ILXW L1_WBCLEANDATA [84 ] 84 -ILXW L1_WBDIRTYDATA [778 ] 778 +ILXW L1_WBCLEANDATA [79 ] 79 +ILXW L1_WBDIRTYDATA [788 ] 788 ILXW Unblock [0 ] 0 ILXW L2_Replacement [0 ] 0 @@ -862,7 +862,7 @@ IFLXO L2_Replacement [0 ] 0 IGS L1_GETS [0 ] 0 IGS L1_GETX [0 ] 0 IGS L1_PUTO [0 ] 0 -IGS L1_PUTX [87 ] 87 +IGS L1_PUTX [44 ] 44 IGS L1_PUTS_only [0 ] 0 IGS L1_PUTS [0 ] 0 IGS Fwd_GETX [0 ] 0 @@ -871,9 +871,9 @@ IGS Fwd_DMA [0 ] 0 IGS Own_GETX [0 ] 0 IGS Inv [0 ] 0 IGS Data [0 ] 0 -IGS Data_Exclusive [86 ] 86 +IGS Data_Exclusive [80 ] 80 IGS Unblock [0 ] 0 -IGS Exclusive_Unblock [84 ] 84 +IGS Exclusive_Unblock [80 ] 80 IGS L2_Replacement [0 ] 0 IGM L1_GETS [0 ] 0 @@ -888,7 +888,7 @@ IGM Fwd_DMA [0 ] 0 IGM Own_GETX [0 ] 0 IGM Inv [0 ] 0 IGM ExtAck [0 ] 0 -IGM Data [736 ] 736 +IGM Data [752 ] 752 IGM Data_Exclusive [0 ] 0 IGM L2_Replacement [0 ] 0 @@ -909,7 +909,7 @@ IGMLS L2_Replacement [0 ] 0 IGMO L1_GETS [0 ] 0 IGMO L1_GETX [0 ] 0 IGMO L1_PUTO [0 ] 0 -IGMO L1_PUTX [1037 ] 1037 +IGMO L1_PUTX [1465 ] 1465 IGMO L1_PUTS_only [0 ] 0 IGMO L1_PUTS [0 ] 0 IGMO Fwd_GETX [0 ] 0 @@ -917,8 +917,8 @@ IGMO Fwd_GETS [0 ] 0 IGMO Fwd_DMA [0 ] 0 IGMO Own_GETX [0 ] 0 IGMO ExtAck [0 ] 0 -IGMO All_Acks [736 ] 736 -IGMO Exclusive_Unblock [736 ] 736 +IGMO All_Acks [752 ] 752 +IGMO Exclusive_Unblock [751 ] 751 IGMO L2_Replacement [0 ] 0 IGMIO L1_GETS [0 ] 0 @@ -991,14 +991,14 @@ II All_Acks [0 ] 0 MM L1_GETS [0 ] 0 MM L1_GETX [0 ] 0 MM L1_PUTO [0 ] 0 -MM L1_PUTX [0 ] 0 +MM L1_PUTX [30 ] 30 MM L1_PUTS_only [0 ] 0 MM L1_PUTS [0 ] 0 MM Fwd_GETX [0 ] 0 MM Fwd_GETS [0 ] 0 MM Fwd_DMA [0 ] 0 MM Inv [0 ] 0 -MM Exclusive_Unblock [36 ] 36 +MM Exclusive_Unblock [30 ] 30 MM L2_Replacement [0 ] 0 SS L1_GETS [0 ] 0 @@ -1017,7 +1017,7 @@ SS L2_Replacement [0 ] 0 OO L1_GETS [0 ] 0 OO L1_GETX [0 ] 0 OO L1_PUTO [0 ] 0 -OO L1_PUTX [16 ] 16 +OO L1_PUTX [0 ] 0 OO L1_PUTS_only [0 ] 0 OO L1_PUTS [0 ] 0 OO Fwd_GETX [0 ] 0 @@ -1026,7 +1026,7 @@ OO Fwd_DMA [0 ] 0 OO Inv [0 ] 0 OO Unblock [0 ] 0 OO Exclusive_Unblock [10 ] 10 -OO L2_Replacement [1 ] 1 +OO L2_Replacement [0 ] 0 OLSS L1_GETS [0 ] 0 OLSS L1_GETX [0 ] 0 @@ -1080,8 +1080,8 @@ OI Writeback_Ack [0 ] 0 OI Writeback_Nack [0 ] 0 OI L2_Replacement [0 ] 0 -MI L1_GETS [0 ] 0 -MI L1_GETX [35 ] 35 +MI L1_GETS [3 ] 3 +MI L1_GETX [19 ] 19 MI L1_PUTO [0 ] 0 MI L1_PUTX [0 ] 0 MI L1_PUTS_only [0 ] 0 @@ -1089,7 +1089,7 @@ MI L1_PUTS [0 ] 0 MI Fwd_GETX [0 ] 0 MI Fwd_GETS [0 ] 0 MI Fwd_DMA [0 ] 0 -MI Writeback_Ack [813 ] 813 +MI Writeback_Ack [823 ] 823 MI L2_Replacement [0 ] 0 MII L1_GETS [0 ] 0 @@ -1196,51 +1196,51 @@ ILOXD DmaAck [0 ] 0 ILOXD L2_Replacement [0 ] 0 Memory controller: system.dir_cntrl0.memBuffer: - memory_total_requests: 1557 - memory_reads: 824 - memory_writes: 733 - memory_refreshes: 745 - memory_total_request_delays: 699 - memory_delays_per_request: 0.44894 - memory_delays_in_input_queue: 100 + memory_total_requests: 1578 + memory_reads: 832 + memory_writes: 746 + memory_refreshes: 2198 + memory_total_request_delays: 449 + memory_delays_per_request: 0.284537 + memory_delays_in_input_queue: 36 memory_delays_behind_head_of_bank_queue: 0 - memory_delays_stalled_at_head_of_bank_queue: 599 - memory_stalls_for_bank_busy: 167 + memory_delays_stalled_at_head_of_bank_queue: 413 + memory_stalls_for_bank_busy: 165 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 37 - memory_stalls_for_bus: 228 + memory_stalls_for_arbitration: 26 + memory_stalls_for_bus: 146 memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 89 - memory_stalls_for_read_read_turnaround: 78 - accesses_per_bank: 58 56 38 78 87 60 65 48 44 42 38 35 56 49 46 40 29 55 43 35 47 44 52 40 42 46 53 46 44 46 52 43 + memory_stalls_for_read_write_turnaround: 29 + memory_stalls_for_read_read_turnaround: 47 + accesses_per_bank: 42 42 62 72 55 44 62 62 55 41 42 49 52 46 57 38 61 59 41 51 46 55 45 47 39 55 63 43 31 45 39 37 --- Directory --- - Event Counts - -GETX [788 ] 788 -GETS [87 ] 87 -PUTX [817 ] 817 +GETX [765 ] 765 +GETS [80 ] 80 +PUTX [823 ] 823 PUTO [0 ] 0 PUTO_SHARERS [0 ] 0 Unblock [0 ] 0 Last_Unblock [0 ] 0 -Exclusive_Unblock [820 ] 820 -Clean_Writeback [80 ] 80 -Dirty_Writeback [733 ] 733 -Memory_Data [822 ] 822 -Memory_Ack [732 ] 732 +Exclusive_Unblock [830 ] 830 +Clean_Writeback [76 ] 76 +Dirty_Writeback [746 ] 746 +Memory_Data [832 ] 832 +Memory_Ack [746 ] 746 DMA_READ [0 ] 0 DMA_WRITE [0 ] 0 DMA_ACK [0 ] 0 Data [0 ] 0 - Transitions - -I GETX [737 ] 737 -I GETS [87 ] 87 +I GETX [752 ] 752 +I GETS [80 ] 80 I PUTX [0 ] 0 I PUTO [0 ] 0 I Memory_Data [0 ] 0 -I Memory_Ack [728 ] 728 +I Memory_Ack [744 ] 744 I DMA_READ [0 ] 0 I DMA_WRITE [0 ] 0 @@ -1265,7 +1265,7 @@ O DMA_WRITE [0 ] 0 M GETX [0 ] 0 M GETS [0 ] 0 -M PUTX [813 ] 813 +M PUTX [823 ] 823 M PUTO [0 ] 0 M PUTO_SHARERS [0 ] 0 M Memory_Data [0 ] 0 @@ -1279,8 +1279,8 @@ IS PUTX [0 ] 0 IS PUTO [0 ] 0 IS PUTO_SHARERS [0 ] 0 IS Unblock [0 ] 0 -IS Exclusive_Unblock [84 ] 84 -IS Memory_Data [86 ] 86 +IS Exclusive_Unblock [80 ] 80 +IS Memory_Data [80 ] 80 IS Memory_Ack [0 ] 0 IS DMA_READ [0 ] 0 IS DMA_WRITE [0 ] 0 @@ -1323,24 +1323,24 @@ MO DMA_WRITE [0 ] 0 MM GETX [0 ] 0 MM GETS [0 ] 0 -MM PUTX [4 ] 4 +MM PUTX [0 ] 0 MM PUTO [0 ] 0 MM PUTO_SHARERS [0 ] 0 -MM Exclusive_Unblock [736 ] 736 -MM Memory_Data [736 ] 736 -MM Memory_Ack [4 ] 4 +MM Exclusive_Unblock [750 ] 750 +MM Memory_Data [752 ] 752 +MM Memory_Ack [2 ] 2 MM DMA_READ [0 ] 0 MM DMA_WRITE [0 ] 0 -MI GETX [51 ] 51 +MI GETX [13 ] 13 MI GETS [0 ] 0 MI PUTX [0 ] 0 MI PUTO [0 ] 0 MI PUTO_SHARERS [0 ] 0 MI Unblock [0 ] 0 -MI Clean_Writeback [80 ] 80 -MI Dirty_Writeback [733 ] 733 +MI Clean_Writeback [76 ] 76 +MI Dirty_Writeback [746 ] 746 MI Memory_Data [0 ] 0 MI Memory_Ack [0 ] 0 MI DMA_READ [0 ] 0 diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout index 7310e89b2..c5a30e355 100755 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout @@ -1,10 +1,12 @@ +Redirecting stdout to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout +Redirecting stderr to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jul 28 2012 11:32:56 -gem5 started Jul 28 2012 11:35:54 -gem5 executing on zizzer +gem5 compiled Sep 1 2012 14:10:16 +gem5 started Sep 1 2012 14:14:49 +gem5 executing on doudou.cs.wisc.edu command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory -re tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 357561 because Ruby Tester completed +Exiting @ tick 316521 because Ruby Tester completed diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt index 017992f91..150be1ab5 100644 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt @@ -1,12 +1,12 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 0.000358 # Number of seconds simulated -sim_ticks 357561 # Number of ticks simulated -final_tick 357561 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_seconds 0.000317 # Number of seconds simulated +sim_ticks 316521 # Number of ticks simulated +final_tick 316521 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_tick_rate 791110 # Simulator tick rate (ticks/s) -host_mem_usage 229444 # Number of bytes of host memory used -host_seconds 0.45 # Real time elapsed on the host +host_tick_rate 596457 # Simulator tick rate (ticks/s) +host_mem_usage 260972 # Number of bytes of host memory used +host_seconds 0.53 # Real time elapsed on the host system.l1_cntrl0.L1DcacheMemory.num_data_array_reads 0 # number of data array reads system.l1_cntrl0.L1DcacheMemory.num_data_array_writes 0 # number of data array writes system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini index 22a3e7356..2920575ea 100644 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini @@ -10,6 +10,7 @@ time_sync_spin_threshold=100000 type=System children=dir_cntrl0 l1_cntrl0 physmem ruby sys_port_proxy tester boot_osflags=a +clock=1 init_param=0 kernel= load_addr_mask=1099511627775 @@ -59,9 +60,9 @@ bank_busy_time=11 bank_queue_size=12 banks_per_rank=8 basic_bus_busy_time=2 +clock=3 dimm_bit_0=12 dimms_per_channel=2 -mem_bus_cycle_multiplier=10 mem_ctl_latency=12 mem_fixed_delay=0 mem_random_arbitrate=0 @@ -70,6 +71,7 @@ rank_rank_delay=1 ranks_per_dimm=2 read_write_delay=2 refresh_period=1560 +ruby_system=system.ruby tFaw=0 version=0 @@ -152,6 +154,7 @@ tagArrayBanks=1 [system.l1_cntrl0.sequencer] type=RubySequencer access_phys_mem=false +clock=1 dcache=system.l1_cntrl0.L1DcacheMemory deadlock_threshold=500000 icache=system.l1_cntrl0.L1IcacheMemory @@ -167,6 +170,7 @@ slave=system.tester.cpuDataPort[0] system.tester.cpuInstPort[0] [system.physmem] type=SimpleMemory +clock=1 conf_table_reported=false file= in_addr_map=true @@ -268,6 +272,7 @@ ruby_system=system.ruby [system.sys_port_proxy] type=RubyPortProxy access_phys_mem=true +clock=1 ruby_system=system.ruby support_data_reqs=true support_inst_reqs=true @@ -281,6 +286,7 @@ slave=system.system_port type=RubyTester check_flush=true checks_to_complete=100 +clock=1 deadlock_threshold=50000 num_cpus=1 system=system diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats index a315a3873..31072bf7e 100644 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats @@ -1,4 +1,4 @@ -Real time: Jul/10/2012 17:54:42 +Real time: Sep/01/2012 13:57:00 Profiler Stats -------------- @@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0 Elapsed_time_in_hours: 0 Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.48 -Virtual_time_in_minutes: 0.008 -Virtual_time_in_hours: 0.000133333 -Virtual_time_in_days: 5.55556e-06 +Virtual_time_in_seconds: 0.44 +Virtual_time_in_minutes: 0.00733333 +Virtual_time_in_hours: 0.000122222 +Virtual_time_in_days: 5.09259e-06 -Ruby_current_time: 205611 +Ruby_current_time: 172201 Ruby_start_time: 0 -Ruby_cycles: 205611 +Ruby_cycles: 172201 -mbytes_resident: 41.625 -mbytes_total: 225.387 -resident_ratio: 0.184717 +mbytes_resident: 44.8359 +mbytes_total: 254.68 +resident_ratio: 0.176125 -ruby_cycles_executed: [ 205612 ] +ruby_cycles_executed: [ 172202 ] Busy Controller Counts: L1Cache-0:0 @@ -29,18 +29,18 @@ Directory-0:0 Busy Bank Count:0 -sequencer_requests_outstanding: [binsize: 1 max: 16 count: 955 average: 15.8063 | standard deviation: 1.1547 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 2 64 876 ] +sequencer_requests_outstanding: [binsize: 1 max: 16 count: 986 average: 15.788 | standard deviation: 1.14484 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 4 84 885 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 32 max: 5995 count: 940 average: 3454.8 | standard deviation: 1689.48 | 73 0 0 15 0 3 1 1 9 6 2 7 11 6 2 14 6 0 5 12 4 2 3 2 1 3 2 1 0 0 1 0 1 0 0 2 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 1 0 1 1 0 0 0 1 1 3 3 2 4 5 6 5 14 2 7 10 3 17 12 13 12 12 19 15 16 15 18 28 27 20 15 26 23 19 24 21 26 18 22 22 18 11 20 18 12 11 10 9 7 8 8 11 9 0 7 5 8 5 7 3 3 4 5 4 1 1 5 2 2 0 0 3 0 0 2 0 0 2 5 0 0 0 1 0 0 0 0 1 ] -miss_latency_LD: [binsize: 32 max: 5688 count: 51 average: 3691.18 | standard deviation: 1748.75 | 8 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 2 0 0 0 0 1 0 0 1 0 0 2 1 0 4 1 3 1 1 0 1 2 1 3 0 0 4 1 1 2 2 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 ] -miss_latency_ST: [binsize: 32 max: 5995 count: 837 average: 3617.77 | standard deviation: 1564.58 | 62 0 0 14 0 2 1 0 4 4 2 3 5 2 0 10 2 0 2 7 4 1 2 0 1 2 2 1 0 0 1 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 1 0 1 1 0 0 0 1 1 3 3 2 4 5 6 4 14 2 7 10 3 15 12 13 12 12 18 15 16 14 18 28 25 19 15 22 21 16 23 20 26 17 20 21 14 11 20 14 11 10 8 7 7 8 8 10 9 0 7 5 7 4 7 3 3 3 5 3 1 0 5 2 2 0 0 3 0 0 2 0 0 1 5 0 0 0 1 0 0 0 0 1 ] -miss_latency_IFETCH: [binsize: 8 max: 809 count: 49 average: 434 | standard deviation: 189.079 | 2 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 2 2 1 0 1 0 0 0 0 0 0 1 0 2 4 2 0 0 1 2 1 0 0 2 0 0 1 2 1 0 2 0 1 1 0 0 0 0 1 1 0 1 3 1 1 0 0 0 0 0 0 0 0 1 0 0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_FLUSH: [binsize: 32 max: 4507 count: 3 average: 3306 | standard deviation: 1853.78 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 ] -miss_latency_L1Cache: [binsize: 32 max: 4507 count: 81 average: 139.605 | standard deviation: 691.167 | 67 0 0 11 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 ] -miss_latency_L2Cache: [binsize: 32 max: 5708 count: 38 average: 2643.53 | standard deviation: 1886.57 | 6 0 0 4 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 1 1 0 0 1 0 0 2 0 0 0 1 0 0 0 0 1 1 1 1 1 1 0 2 1 1 1 1 0 1 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_Directory: [binsize: 32 max: 5995 count: 821 average: 3819.42 | standard deviation: 1346.15 | 0 0 0 0 0 3 1 1 9 5 2 7 11 5 2 14 6 0 5 11 4 2 3 2 1 3 2 1 0 0 1 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 2 2 2 4 4 6 5 12 2 7 10 2 17 12 13 12 11 18 14 15 14 17 28 25 19 14 25 21 19 23 21 26 18 22 22 16 11 20 18 12 11 10 8 7 8 8 11 9 0 7 5 8 5 7 3 3 4 5 4 1 1 5 2 2 0 0 3 0 0 2 0 0 2 4 0 0 0 1 0 0 0 0 1 ] +miss_latency: [binsize: 32 max: 4954 count: 971 average: 2802.39 | standard deviation: 1327.57 | 80 0 6 7 2 8 6 2 1 19 3 3 8 2 2 8 6 2 5 4 1 3 3 1 0 1 1 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 2 0 0 1 2 2 0 1 1 5 4 7 3 3 4 9 8 7 5 8 19 10 17 6 23 19 18 16 17 17 21 17 30 28 20 26 23 25 26 21 23 34 18 14 18 15 15 9 20 13 16 12 12 7 10 6 8 6 11 3 1 4 6 4 5 2 4 0 0 0 1 1 0 0 2 1 0 2 2 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD: [binsize: 32 max: 4368 count: 50 average: 2780.46 | standard deviation: 1378.72 | 4 0 1 1 0 0 0 0 0 2 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 2 1 1 0 1 0 3 0 0 1 1 1 0 0 0 4 1 1 1 0 0 2 0 0 4 3 0 1 0 0 0 0 2 1 0 0 3 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST: [binsize: 32 max: 4954 count: 866 average: 2940.8 | standard deviation: 1219.88 | 67 0 4 4 1 5 5 1 1 9 2 1 3 1 1 5 4 0 3 2 0 2 1 1 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 2 0 0 1 1 2 0 1 1 5 4 7 3 3 4 9 7 7 4 7 17 9 16 6 22 19 15 16 17 16 20 16 30 28 20 22 22 23 25 20 23 32 17 14 14 12 15 8 20 13 16 12 10 6 10 6 5 5 9 3 1 4 6 4 5 2 3 0 0 0 1 1 0 0 2 1 0 2 2 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_IFETCH: [binsize: 8 max: 817 count: 50 average: 332.28 | standard deviation: 230.032 | 6 3 0 0 0 0 0 0 0 0 1 0 0 2 0 0 0 0 0 1 0 0 1 2 1 0 0 0 1 0 0 0 0 0 0 0 3 2 1 2 0 1 0 0 0 0 1 1 2 1 0 1 1 0 0 0 0 1 0 0 0 1 0 2 1 0 1 0 0 0 1 0 0 0 1 1 0 1 1 0 0 1 0 0 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_FLUSH: [binsize: 32 max: 4122 count: 5 average: 3751 | standard deviation: 332.267 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 ] +miss_latency_L1Cache: [binsize: 32 max: 4122 count: 76 average: 256.355 | standard deviation: 937.092 | 66 0 0 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 ] +miss_latency_L2Cache: [binsize: 32 max: 4319 count: 49 average: 1546.86 | standard deviation: 1620.72 | 14 0 3 1 0 1 2 1 0 1 0 0 1 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 2 0 0 0 1 0 0 0 1 1 1 1 0 0 0 2 0 0 0 1 0 0 2 0 0 1 0 1 0 0 0 0 1 0 2 0 1 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_Directory: [binsize: 32 max: 4954 count: 846 average: 3103.83 | standard deviation: 1015.18 | 0 0 3 1 2 7 4 1 1 18 3 3 7 2 1 7 6 2 5 3 1 3 3 1 0 1 1 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 2 0 0 1 2 2 0 1 1 4 3 6 3 3 4 9 6 7 5 8 18 10 17 6 22 18 17 15 17 17 21 15 30 28 20 25 23 24 24 20 23 33 17 13 18 15 15 9 19 13 14 12 11 7 10 6 8 5 10 3 1 4 6 4 4 2 4 0 0 0 1 1 0 0 2 1 0 2 2 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] @@ -50,16 +50,16 @@ miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -imcomplete_dir_Times: 821 -miss_latency_LD_L1Cache: [binsize: 1 max: 4 count: 7 average: 2.42857 | standard deviation: 1 | 0 1 3 2 1 ] -miss_latency_LD_L2Cache: [binsize: 32 max: 4298 count: 2 average: 2152.5 | standard deviation: 3034.2 | 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] -miss_latency_LD_Directory: [binsize: 32 max: 5688 count: 42 average: 4379.24 | standard deviation: 762.412 | 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 2 0 0 0 0 1 0 0 1 0 0 2 1 0 4 1 3 0 1 0 1 2 1 3 0 0 4 1 1 2 2 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 ] -miss_latency_ST_L1Cache: [binsize: 1 max: 118 count: 71 average: 19.338 | standard deviation: 39.1116 | 0 12 12 16 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 3 1 0 0 2 0 1 0 0 1 ] -miss_latency_ST_L2Cache: [binsize: 32 max: 5708 count: 32 average: 3000.47 | standard deviation: 1710.17 | 2 0 0 3 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 1 1 0 0 1 0 0 2 0 0 0 1 0 0 0 0 1 1 1 1 1 1 0 2 1 1 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_ST_Directory: [binsize: 32 max: 5995 count: 734 average: 3992.76 | standard deviation: 1120.88 | 0 0 0 0 0 2 1 0 4 3 2 3 5 1 0 10 2 0 2 6 4 1 2 0 1 2 2 1 0 0 1 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 2 2 2 4 4 6 4 12 2 7 10 2 15 12 13 12 11 17 14 15 13 17 28 23 18 14 21 20 16 23 20 26 17 20 21 13 11 20 14 11 10 8 6 7 8 8 10 9 0 7 5 7 4 7 3 3 3 5 3 1 0 5 2 2 0 0 3 0 0 2 0 0 1 4 0 0 0 1 0 0 0 0 1 ] -miss_latency_IFETCH_L2Cache: [binsize: 1 max: 115 count: 4 average: 33.5 | standard deviation: 54.3476 | 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] -miss_latency_IFETCH_Directory: [binsize: 8 max: 809 count: 45 average: 469.6 | standard deviation: 151.399 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 2 2 1 0 1 0 0 0 0 0 0 1 0 2 4 2 0 0 1 2 1 0 0 2 0 0 1 2 1 0 2 0 1 1 0 0 0 0 1 1 0 1 3 1 1 0 0 0 0 0 0 0 0 1 0 0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_FLUSH_L1Cache: [binsize: 32 max: 4507 count: 3 average: 3306 | standard deviation: 1853.78 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 ] +imcomplete_dir_Times: 846 +miss_latency_LD_L1Cache: [binsize: 1 max: 112 count: 5 average: 24 | standard deviation: 49.2037 | 0 2 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_LD_Directory: [binsize: 32 max: 4368 count: 45 average: 3086.73 | standard deviation: 1075.78 | 0 0 1 0 0 0 0 0 0 2 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 2 1 1 0 1 0 3 0 0 1 1 1 0 0 0 4 1 1 1 0 0 2 0 0 4 3 0 1 0 0 0 0 2 1 0 0 3 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST_L1Cache: [binsize: 1 max: 117 count: 65 average: 9.33846 | standard deviation: 26.6015 | 0 13 15 17 16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 1 ] +miss_latency_ST_L2Cache: [binsize: 32 max: 4319 count: 40 average: 1890.95 | standard deviation: 1603.6 | 6 0 3 0 0 1 2 1 0 1 0 0 1 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 2 0 0 0 1 0 0 0 1 1 1 1 0 0 0 2 0 0 0 1 0 0 2 0 0 1 0 1 0 0 0 0 1 0 2 0 1 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_ST_Directory: [binsize: 32 max: 4954 count: 761 average: 3246.37 | standard deviation: 821.708 | 0 0 1 0 1 4 3 0 1 8 2 1 2 1 0 4 4 0 3 1 0 2 1 1 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 2 0 0 1 1 2 0 1 1 4 3 6 3 3 4 9 5 7 4 7 16 9 16 6 21 18 14 15 17 16 20 14 30 28 20 21 22 23 23 20 23 31 17 13 14 12 15 8 19 13 14 12 9 6 10 6 5 5 9 3 1 4 6 4 4 2 3 0 0 0 1 1 0 0 2 1 0 2 2 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_IFETCH_L1Cache: [binsize: 1 max: 1 count: 1 average: 1 | standard deviation: 0 | 0 1 ] +miss_latency_IFETCH_L2Cache: [binsize: 1 max: 107 count: 9 average: 17.5556 | standard deviation: 33.5764 | 0 0 0 0 1 2 1 1 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_IFETCH_Directory: [binsize: 8 max: 817 count: 40 average: 411.375 | standard deviation: 184.832 | 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 1 0 0 1 2 1 0 0 0 1 0 0 0 0 0 0 0 3 2 1 2 0 1 0 0 0 0 1 1 2 1 0 1 1 0 0 0 0 1 0 0 0 1 0 2 1 0 1 0 0 0 1 0 0 0 1 1 0 1 1 0 0 1 0 0 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_FLUSH_L1Cache: [binsize: 32 max: 4122 count: 5 average: 3751 | standard deviation: 332.267 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -91,60 +91,60 @@ Resource Usage page_size: 4096 user_time: 0 system_time: 0 -page_reclaims: 11775 +page_reclaims: 8466 page_faults: 0 swaps: 0 block_inputs: 0 -block_outputs: 0 +block_outputs: 88 Network Stats ------------- -total_msg_count_Request_Control: 2475 19800 -total_msg_count_Response_Data: 2469 177768 -total_msg_count_Writeback_Data: 2211 159192 -total_msg_count_Writeback_Control: 5145 41160 -total_msg_count_Unblock_Control: 2460 19680 -total_msgs: 14760 total_bytes: 417600 +total_msg_count_Request_Control: 2554 20432 +total_msg_count_Response_Data: 2550 183600 +total_msg_count_Writeback_Data: 2303 165816 +total_msg_count_Writeback_Control: 5288 42304 +total_msg_count_Unblock_Control: 2535 20280 +total_msgs: 15230 total_bytes: 432432 switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 2.11565 - links_utilized_percent_switch_0_link_0: 2.00014 bw: 16000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 2.23115 bw: 16000 base_latency: 1 +links_utilized_percent_switch_0: 2.61656 + links_utilized_percent_switch_0_link_0: 2.4663 bw: 16000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 2.76682 bw: 16000 base_latency: 1 - outgoing_messages_switch_0_link_0_Response_Data: 823 59256 [ 0 0 0 0 823 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Writeback_Control: 818 6544 [ 0 0 0 818 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Request_Control: 825 6600 [ 0 0 825 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Data: 737 53064 [ 0 0 0 0 0 737 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Control: 897 7176 [ 0 0 817 0 0 80 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Unblock_Control: 820 6560 [ 0 0 0 0 0 820 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Response_Data: 850 61200 [ 0 0 0 0 850 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Writeback_Control: 844 6752 [ 0 0 0 844 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Request_Control: 852 6816 [ 0 0 852 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Data: 768 55296 [ 0 0 0 0 0 768 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Control: 920 7360 [ 0 0 845 0 0 75 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Unblock_Control: 845 6760 [ 0 0 0 0 0 845 0 0 0 0 ] base_latency: 1 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 2.11565 - links_utilized_percent_switch_1_link_0: 2.23115 bw: 16000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 2.00014 bw: 16000 base_latency: 1 +links_utilized_percent_switch_1: 2.61482 + links_utilized_percent_switch_1_link_0: 2.76334 bw: 16000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 2.4663 bw: 16000 base_latency: 1 - outgoing_messages_switch_1_link_0_Request_Control: 825 6600 [ 0 0 825 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Writeback_Data: 737 53064 [ 0 0 0 0 0 737 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Writeback_Control: 897 7176 [ 0 0 817 0 0 80 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Unblock_Control: 820 6560 [ 0 0 0 0 0 820 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Response_Data: 823 59256 [ 0 0 0 0 823 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Writeback_Control: 818 6544 [ 0 0 0 818 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Request_Control: 851 6808 [ 0 0 851 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Writeback_Data: 767 55224 [ 0 0 0 0 0 767 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Writeback_Control: 918 7344 [ 0 0 843 0 0 75 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Unblock_Control: 845 6760 [ 0 0 0 0 0 845 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Response_Data: 850 61200 [ 0 0 0 0 850 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Writeback_Control: 844 6752 [ 0 0 0 844 0 0 0 0 0 0 ] base_latency: 1 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 2.11565 - links_utilized_percent_switch_2_link_0: 2.00014 bw: 16000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 2.23115 bw: 16000 base_latency: 1 +links_utilized_percent_switch_2: 2.61613 + links_utilized_percent_switch_2_link_0: 2.4663 bw: 16000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 2.76595 bw: 16000 base_latency: 1 - outgoing_messages_switch_2_link_0_Response_Data: 823 59256 [ 0 0 0 0 823 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Writeback_Control: 818 6544 [ 0 0 0 818 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Request_Control: 825 6600 [ 0 0 825 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Writeback_Data: 737 53064 [ 0 0 0 0 0 737 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Writeback_Control: 897 7176 [ 0 0 817 0 0 80 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Unblock_Control: 820 6560 [ 0 0 0 0 0 820 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Response_Data: 850 61200 [ 0 0 0 0 850 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Writeback_Control: 844 6752 [ 0 0 0 844 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Request_Control: 851 6808 [ 0 0 851 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Writeback_Data: 768 55296 [ 0 0 0 0 0 768 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Writeback_Control: 918 7344 [ 0 0 843 0 0 75 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Unblock_Control: 845 6760 [ 0 0 0 0 0 845 0 0 0 0 ] base_latency: 1 Cache Stats: system.l1_cntrl0.L1IcacheMemory system.l1_cntrl0.L1IcacheMemory_total_misses: 49 @@ -158,42 +158,42 @@ Cache Stats: system.l1_cntrl0.L1IcacheMemory system.l1_cntrl0.L1IcacheMemory_access_mode_type_Supervisor: 49 100% Cache Stats: system.l1_cntrl0.L1DcacheMemory - system.l1_cntrl0.L1DcacheMemory_total_misses: 812 - system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 812 + system.l1_cntrl0.L1DcacheMemory_total_misses: 849 + system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 849 system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0 system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0 system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0 - system.l1_cntrl0.L1DcacheMemory_request_type_LD: 5.41872% - system.l1_cntrl0.L1DcacheMemory_request_type_ST: 94.4581% - system.l1_cntrl0.L1DcacheMemory_request_type_FLUSH: 0.123153% + system.l1_cntrl0.L1DcacheMemory_request_type_LD: 5.41814% + system.l1_cntrl0.L1DcacheMemory_request_type_ST: 94.4641% + system.l1_cntrl0.L1DcacheMemory_request_type_FLUSH: 0.117786% - system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor: 812 100% + system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor: 849 100% Cache Stats: system.l1_cntrl0.L2cacheMemory - system.l1_cntrl0.L2cacheMemory_total_misses: 863 - system.l1_cntrl0.L2cacheMemory_total_demand_misses: 863 + system.l1_cntrl0.L2cacheMemory_total_misses: 902 + system.l1_cntrl0.L2cacheMemory_total_demand_misses: 902 system.l1_cntrl0.L2cacheMemory_total_prefetches: 0 system.l1_cntrl0.L2cacheMemory_total_sw_prefetches: 0 system.l1_cntrl0.L2cacheMemory_total_hw_prefetches: 0 - system.l1_cntrl0.L2cacheMemory_request_type_LD: 5.09849% - system.l1_cntrl0.L2cacheMemory_request_type_ST: 88.876% - system.l1_cntrl0.L2cacheMemory_request_type_IFETCH: 5.67787% - system.l1_cntrl0.L2cacheMemory_request_type_FLUSH: 0.347625% + system.l1_cntrl0.L2cacheMemory_request_type_LD: 5.09978% + system.l1_cntrl0.L2cacheMemory_request_type_ST: 88.9135% + system.l1_cntrl0.L2cacheMemory_request_type_IFETCH: 5.43237% + system.l1_cntrl0.L2cacheMemory_request_type_FLUSH: 0.554324% - system.l1_cntrl0.L2cacheMemory_access_mode_type_Supervisor: 863 100% + system.l1_cntrl0.L2cacheMemory_access_mode_type_Supervisor: 902 100% --- L1Cache --- - Event Counts - -Load [53 ] 53 -Ifetch [49 ] 49 -Store [861 ] 861 -L2_Replacement [814 ] 814 -L1_to_L2 [15927 ] 15927 -Trigger_L2_to_L1D [35 ] 35 -Trigger_L2_to_L1I [4 ] 4 -Complete_L2_to_L1 [39 ] 39 +Load [52 ] 52 +Ifetch [53 ] 53 +Store [888 ] 888 +L2_Replacement [840 ] 840 +L1_to_L2 [16587 ] 16587 +Trigger_L2_to_L1D [41 ] 41 +Trigger_L2_to_L1I [9 ] 9 +Complete_L2_to_L1 [50 ] 50 Other_GETX [0 ] 0 Other_GETS [0 ] 0 Merged_GETS [0 ] 0 @@ -204,18 +204,18 @@ Ack [0 ] 0 Shared_Ack [0 ] 0 Data [0 ] 0 Shared_Data [0 ] 0 -Exclusive_Data [823 ] 823 -Writeback_Ack [817 ] 817 +Exclusive_Data [850 ] 850 +Writeback_Ack [843 ] 843 Writeback_Nack [0 ] 0 All_acks [0 ] 0 -All_acks_no_sharers [823 ] 823 -Flush_line [3 ] 3 +All_acks_no_sharers [850 ] 850 +Flush_line [5 ] 5 Block_Ack [1 ] 1 - Transitions - -I Load [42 ] 42 -I Ifetch [45 ] 45 -I Store [735 ] 735 +I Load [46 ] 46 +I Ifetch [40 ] 40 +I Store [762 ] 762 I L2_Replacement [0 ] 0 I L1_to_L2 [0 ] 0 I Trigger_L2_to_L1D [0 ] 0 @@ -225,7 +225,7 @@ I Other_GETS [0 ] 0 I Other_GETS_No_Mig [0 ] 0 I NC_DMA_GETS [0 ] 0 I Invalidate [0 ] 0 -I Flush_line [2 ] 2 +I Flush_line [4 ] 4 S Load [0 ] 0 S Ifetch [0 ] 0 @@ -257,11 +257,11 @@ O Invalidate [0 ] 0 O Flush_line [0 ] 0 M Load [0 ] 0 -M Ifetch [0 ] 0 +M Ifetch [1 ] 1 M Store [0 ] 0 -M L2_Replacement [78 ] 78 -M L1_to_L2 [84 ] 84 -M Trigger_L2_to_L1D [6 ] 6 +M L2_Replacement [71 ] 71 +M L1_to_L2 [83 ] 83 +M Trigger_L2_to_L1D [11 ] 11 M Trigger_L2_to_L1I [0 ] 0 M Other_GETX [0 ] 0 M Other_GETS [0 ] 0 @@ -271,13 +271,13 @@ M NC_DMA_GETS [0 ] 0 M Invalidate [0 ] 0 M Flush_line [0 ] 0 -MM Load [6 ] 6 +MM Load [5 ] 5 MM Ifetch [0 ] 0 -MM Store [69 ] 69 -MM L2_Replacement [736 ] 736 -MM L1_to_L2 [771 ] 771 -MM Trigger_L2_to_L1D [29 ] 29 -MM Trigger_L2_to_L1I [4 ] 4 +MM Store [62 ] 62 +MM L2_Replacement [769 ] 769 +MM L1_to_L2 [809 ] 809 +MM Trigger_L2_to_L1D [30 ] 30 +MM Trigger_L2_to_L1I [9 ] 9 MM Other_GETX [0 ] 0 MM Other_GETS [0 ] 0 MM Merged_GETS [0 ] 0 @@ -306,21 +306,21 @@ OR Flush_line [0 ] 0 MR Load [0 ] 0 MR Ifetch [0 ] 0 -MR Store [6 ] 6 -MR L1_to_L2 [25 ] 25 +MR Store [11 ] 11 +MR L1_to_L2 [90 ] 90 MR Flush_line [0 ] 0 -MMR Load [2 ] 2 -MMR Ifetch [4 ] 4 -MMR Store [26 ] 26 -MMR L1_to_L2 [91 ] 91 +MMR Load [0 ] 0 +MMR Ifetch [9 ] 9 +MMR Store [29 ] 29 +MMR L1_to_L2 [25 ] 25 MMR Flush_line [1 ] 1 IM Load [0 ] 0 IM Ifetch [0 ] 0 IM Store [0 ] 0 IM L2_Replacement [0 ] 0 -IM L1_to_L2 [9582 ] 9582 +IM L1_to_L2 [9996 ] 9996 IM Other_GETX [0 ] 0 IM Other_GETS [0 ] 0 IM Other_GETS_No_Mig [0 ] 0 @@ -328,7 +328,7 @@ IM NC_DMA_GETS [0 ] 0 IM Invalidate [0 ] 0 IM Ack [0 ] 0 IM Data [0 ] 0 -IM Exclusive_Data [734 ] 734 +IM Exclusive_Data [761 ] 761 IM Flush_line [0 ] 0 SM Load [0 ] 0 @@ -375,25 +375,25 @@ M_W Load [0 ] 0 M_W Ifetch [0 ] 0 M_W Store [0 ] 0 M_W L2_Replacement [0 ] 0 -M_W L1_to_L2 [253 ] 253 +M_W L1_to_L2 [306 ] 306 M_W Ack [0 ] 0 -M_W All_acks_no_sharers [87 ] 87 +M_W All_acks_no_sharers [85 ] 85 M_W Flush_line [0 ] 0 -MM_W Load [1 ] 1 +MM_W Load [0 ] 0 MM_W Ifetch [0 ] 0 -MM_W Store [2 ] 2 +MM_W Store [3 ] 3 MM_W L2_Replacement [0 ] 0 -MM_W L1_to_L2 [4505 ] 4505 +MM_W L1_to_L2 [4592 ] 4592 MM_W Ack [0 ] 0 -MM_W All_acks_no_sharers [734 ] 734 +MM_W All_acks_no_sharers [761 ] 761 MM_W Flush_line [0 ] 0 IS Load [0 ] 0 IS Ifetch [0 ] 0 IS Store [0 ] 0 IS L2_Replacement [0 ] 0 -IS L1_to_L2 [525 ] 525 +IS L1_to_L2 [529 ] 529 IS Other_GETX [0 ] 0 IS Other_GETS [0 ] 0 IS Other_GETS_No_Mig [0 ] 0 @@ -403,7 +403,7 @@ IS Ack [0 ] 0 IS Shared_Ack [0 ] 0 IS Data [0 ] 0 IS Shared_Data [0 ] 0 -IS Exclusive_Data [87 ] 87 +IS Exclusive_Data [85 ] 85 IS Flush_line [0 ] 0 SS Load [0 ] 0 @@ -431,9 +431,9 @@ OI Invalidate [0 ] 0 OI Writeback_Ack [0 ] 0 OI Flush_line [0 ] 0 -MI Load [0 ] 0 -MI Ifetch [0 ] 0 -MI Store [2 ] 2 +MI Load [1 ] 1 +MI Ifetch [3 ] 3 +MI Store [1 ] 1 MI L2_Replacement [0 ] 0 MI L1_to_L2 [0 ] 0 MI Other_GETX [0 ] 0 @@ -442,7 +442,7 @@ MI Merged_GETS [0 ] 0 MI Other_GETS_No_Mig [0 ] 0 MI NC_DMA_GETS [0 ] 0 MI Invalidate [0 ] 0 -MI Writeback_Ack [814 ] 814 +MI Writeback_Ack [838 ] 838 MI Flush_line [0 ] 0 II Load [0 ] 0 @@ -482,23 +482,23 @@ OT Complete_L2_to_L1 [0 ] 0 MT Load [0 ] 0 MT Ifetch [0 ] 0 -MT Store [1 ] 1 +MT Store [2 ] 2 MT L2_Replacement [0 ] 0 -MT L1_to_L2 [14 ] 14 -MT Complete_L2_to_L1 [6 ] 6 +MT L1_to_L2 [54 ] 54 +MT Complete_L2_to_L1 [11 ] 11 -MMT Load [2 ] 2 +MMT Load [0 ] 0 MMT Ifetch [0 ] 0 -MMT Store [20 ] 20 +MMT Store [18 ] 18 MMT L2_Replacement [0 ] 0 -MMT L1_to_L2 [77 ] 77 -MMT Complete_L2_to_L1 [33 ] 33 +MMT L1_to_L2 [103 ] 103 +MMT Complete_L2_to_L1 [39 ] 39 MI_F Load [0 ] 0 MI_F Ifetch [0 ] 0 MI_F Store [0 ] 0 MI_F L1_to_L2 [0 ] 0 -MI_F Writeback_Ack [3 ] 3 +MI_F Writeback_Ack [5 ] 5 MI_F Flush_line [0 ] 0 MM_F Load [0 ] 0 @@ -529,7 +529,7 @@ IM_F NC_DMA_GETS [0 ] 0 IM_F Invalidate [0 ] 0 IM_F Ack [0 ] 0 IM_F Data [0 ] 0 -IM_F Exclusive_Data [2 ] 2 +IM_F Exclusive_Data [4 ] 4 IM_F Flush_line [0 ] 0 ISM_F Load [0 ] 0 @@ -578,7 +578,7 @@ MM_WF Store [0 ] 0 MM_WF L2_Replacement [0 ] 0 MM_WF L1_to_L2 [0 ] 0 MM_WF Ack [0 ] 0 -MM_WF All_acks_no_sharers [2 ] 2 +MM_WF All_acks_no_sharers [4 ] 4 MM_WF Flush_line [0 ] 0 Cache Stats: system.dir_cntrl0.probeFilter @@ -590,42 +590,42 @@ Cache Stats: system.dir_cntrl0.probeFilter Memory controller: system.dir_cntrl0.memBuffer: - memory_total_requests: 1560 - memory_reads: 824 - memory_writes: 736 - memory_refreshes: 429 - memory_total_request_delays: 1115 - memory_delays_per_request: 0.714744 - memory_delays_in_input_queue: 138 - memory_delays_behind_head_of_bank_queue: 10 - memory_delays_stalled_at_head_of_bank_queue: 967 - memory_stalls_for_bank_busy: 228 + memory_total_requests: 1617 + memory_reads: 850 + memory_writes: 767 + memory_refreshes: 1196 + memory_total_request_delays: 599 + memory_delays_per_request: 0.370439 + memory_delays_in_input_queue: 48 + memory_delays_behind_head_of_bank_queue: 1 + memory_delays_stalled_at_head_of_bank_queue: 550 + memory_stalls_for_bank_busy: 172 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 72 - memory_stalls_for_bus: 362 + memory_stalls_for_arbitration: 40 + memory_stalls_for_bus: 204 memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 186 - memory_stalls_for_read_read_turnaround: 119 - accesses_per_bank: 47 55 53 77 82 53 68 47 52 57 48 52 53 45 30 61 44 37 47 47 54 41 43 45 39 47 27 43 41 34 39 52 + memory_stalls_for_read_write_turnaround: 52 + memory_stalls_for_read_read_turnaround: 82 + accesses_per_bank: 60 50 58 80 69 77 71 48 48 38 42 44 39 57 47 44 42 45 53 54 55 41 48 56 29 45 43 51 47 51 42 43 --- Directory --- - Event Counts - -GETX [735 ] 735 -GETS [88 ] 88 -PUT [864 ] 864 +GETX [761 ] 761 +GETS [87 ] 87 +PUT [913 ] 913 Unblock [0 ] 0 UnblockS [0 ] 0 -UnblockM [820 ] 820 +UnblockM [845 ] 845 Writeback_Clean [0 ] 0 Writeback_Dirty [0 ] 0 -Writeback_Exclusive_Clean [80 ] 80 -Writeback_Exclusive_Dirty [736 ] 736 +Writeback_Exclusive_Clean [75 ] 75 +Writeback_Exclusive_Dirty [767 ] 767 Pf_Replacement [0 ] 0 DMA_READ [0 ] 0 DMA_WRITE [0 ] 0 -Memory_Data [823 ] 823 -Memory_Ack [735 ] 735 +Memory_Data [850 ] 850 +Memory_Ack [767 ] 767 Ack [0 ] 0 Shared_Ack [0 ] 0 Shared_Data [0 ] 0 @@ -635,8 +635,8 @@ All_acks_and_shared_data [0 ] 0 All_acks_and_owner_data [0 ] 0 All_acks_and_data_no_sharers [0 ] 0 All_Unblocks [0 ] 0 -GETF [3 ] 3 -PUTF [3 ] 3 +GETF [5 ] 5 +PUTF [5 ] 5 - Transitions - NX GETX [0 ] 0 @@ -649,7 +649,7 @@ NX GETF [0 ] 0 NO GETX [0 ] 0 NO GETS [0 ] 0 -NO PUT [814 ] 814 +NO PUT [838 ] 838 NO Pf_Replacement [0 ] 0 NO DMA_READ [0 ] 0 NO DMA_WRITE [0 ] 0 @@ -671,12 +671,12 @@ O DMA_READ [0 ] 0 O DMA_WRITE [0 ] 0 O GETF [0 ] 0 -E GETX [735 ] 735 -E GETS [87 ] 87 +E GETX [761 ] 761 +E GETS [85 ] 85 E PUT [0 ] 0 E DMA_READ [0 ] 0 E DMA_WRITE [0 ] 0 -E GETF [2 ] 2 +E GETF [4 ] 4 O_R GETX [0 ] 0 O_R GETS [0 ] 0 @@ -713,9 +713,9 @@ NO_R GETF [0 ] 0 NO_B GETX [0 ] 0 NO_B GETS [0 ] 0 -NO_B PUT [50 ] 50 +NO_B PUT [75 ] 75 NO_B UnblockS [0 ] 0 -NO_B UnblockM [820 ] 820 +NO_B UnblockM [845 ] 845 NO_B Pf_Replacement [0 ] 0 NO_B DMA_READ [0 ] 0 NO_B DMA_WRITE [0 ] 0 @@ -769,7 +769,7 @@ NO_B_W UnblockM [0 ] 0 NO_B_W Pf_Replacement [0 ] 0 NO_B_W DMA_READ [0 ] 0 NO_B_W DMA_WRITE [0 ] 0 -NO_B_W Memory_Data [821 ] 821 +NO_B_W Memory_Data [846 ] 846 NO_B_W GETF [0 ] 0 O_B_W GETX [0 ] 0 @@ -896,8 +896,8 @@ WB PUT [0 ] 0 WB Unblock [0 ] 0 WB Writeback_Clean [0 ] 0 WB Writeback_Dirty [0 ] 0 -WB Writeback_Exclusive_Clean [80 ] 80 -WB Writeback_Exclusive_Dirty [736 ] 736 +WB Writeback_Exclusive_Clean [75 ] 75 +WB Writeback_Exclusive_Dirty [767 ] 767 WB Pf_Replacement [0 ] 0 WB DMA_READ [0 ] 0 WB DMA_WRITE [0 ] 0 @@ -913,12 +913,12 @@ WB_O_W Memory_Ack [0 ] 0 WB_O_W GETF [0 ] 0 WB_E_W GETX [0 ] 0 -WB_E_W GETS [0 ] 0 +WB_E_W GETS [1 ] 1 WB_E_W PUT [0 ] 0 WB_E_W Pf_Replacement [0 ] 0 WB_E_W DMA_READ [0 ] 0 WB_E_W DMA_WRITE [0 ] 0 -WB_E_W Memory_Ack [735 ] 735 +WB_E_W Memory_Ack [767 ] 767 WB_E_W GETF [0 ] 0 NO_F GETX [0 ] 0 @@ -927,7 +927,7 @@ NO_F PUT [0 ] 0 NO_F UnblockM [0 ] 0 NO_F Pf_Replacement [0 ] 0 NO_F GETF [0 ] 0 -NO_F PUTF [3 ] 3 +NO_F PUTF [5 ] 5 NO_F_W GETX [0 ] 0 NO_F_W GETS [0 ] 0 @@ -935,6 +935,6 @@ NO_F_W PUT [0 ] 0 NO_F_W Pf_Replacement [0 ] 0 NO_F_W DMA_READ [0 ] 0 NO_F_W DMA_WRITE [0 ] 0 -NO_F_W Memory_Data [2 ] 2 +NO_F_W Memory_Data [4 ] 4 NO_F_W GETF [0 ] 0 diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout index a8e08a1e3..4f22200bf 100755 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout @@ -1,10 +1,12 @@ +Redirecting stdout to build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer/simout +Redirecting stderr to build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jul 28 2012 11:27:37 -gem5 started Jul 28 2012 11:35:39 -gem5 executing on zizzer +gem5 compiled Sep 1 2012 13:53:26 +gem5 started Sep 1 2012 13:57:00 +gem5 executing on doudou.cs.wisc.edu command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer -re tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 205611 because Ruby Tester completed +Exiting @ tick 172201 because Ruby Tester completed diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt index 8c3ff8304..9f304868a 100644 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt @@ -1,12 +1,12 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 0.000206 # Number of seconds simulated -sim_ticks 205611 # Number of ticks simulated -final_tick 205611 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_seconds 0.000172 # Number of seconds simulated +sim_ticks 172201 # Number of ticks simulated +final_tick 172201 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_tick_rate 2054687 # Simulator tick rate (ticks/s) -host_mem_usage 229284 # Number of bytes of host memory used -host_seconds 0.10 # Real time elapsed on the host +host_tick_rate 1185587 # Simulator tick rate (ticks/s) +host_mem_usage 260796 # Number of bytes of host memory used +host_seconds 0.15 # Real time elapsed on the host system.l1_cntrl0.L1DcacheMemory.num_data_array_reads 0 # number of data array reads system.l1_cntrl0.L1DcacheMemory.num_data_array_writes 0 # number of data array writes system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini index 1875c19df..d66b5e6a2 100644 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini @@ -10,6 +10,7 @@ time_sync_spin_threshold=100000 type=System children=dir_cntrl0 l1_cntrl0 physmem ruby sys_port_proxy tester boot_osflags=a +clock=1 init_param=0 kernel= load_addr_mask=1099511627775 @@ -56,9 +57,9 @@ bank_busy_time=11 bank_queue_size=12 banks_per_rank=8 basic_bus_busy_time=2 +clock=3 dimm_bit_0=12 dimms_per_channel=2 -mem_bus_cycle_multiplier=10 mem_ctl_latency=12 mem_fixed_delay=0 mem_random_arbitrate=0 @@ -67,6 +68,7 @@ rank_rank_delay=1 ranks_per_dimm=2 read_write_delay=2 refresh_period=1560 +ruby_system=system.ruby tFaw=0 version=0 @@ -103,6 +105,7 @@ tagArrayBanks=1 [system.l1_cntrl0.sequencer] type=RubySequencer access_phys_mem=false +clock=1 dcache=system.l1_cntrl0.cacheMemory deadlock_threshold=500000 icache=system.l1_cntrl0.cacheMemory @@ -118,6 +121,7 @@ slave=system.tester.cpuDataPort[0] system.tester.cpuInstPort[0] [system.physmem] type=SimpleMemory +clock=1 conf_table_reported=false file= in_addr_map=true @@ -219,6 +223,7 @@ ruby_system=system.ruby [system.sys_port_proxy] type=RubyPortProxy access_phys_mem=true +clock=1 ruby_system=system.ruby support_data_reqs=true support_inst_reqs=true @@ -232,6 +237,7 @@ slave=system.system_port type=RubyTester check_flush=false checks_to_complete=100 +clock=1 deadlock_threshold=50000 num_cpus=1 system=system diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats index 3a69fd2a1..ec81e3ed4 100644 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats @@ -1,4 +1,4 @@ -Real time: Jul/10/2012 17:29:08 +Real time: Sep/01/2012 13:48:35 Profiler Stats -------------- @@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0 Elapsed_time_in_hours: 0 Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.44 -Virtual_time_in_minutes: 0.00733333 -Virtual_time_in_hours: 0.000122222 -Virtual_time_in_days: 5.09259e-06 +Virtual_time_in_seconds: 0.41 +Virtual_time_in_minutes: 0.00683333 +Virtual_time_in_hours: 0.000113889 +Virtual_time_in_days: 4.74537e-06 -Ruby_current_time: 280571 +Ruby_current_time: 221941 Ruby_start_time: 0 -Ruby_cycles: 280571 +Ruby_cycles: 221941 -mbytes_resident: 41.2305 -mbytes_total: 224.867 -resident_ratio: 0.18339 +mbytes_resident: 43.6133 +mbytes_total: 254.102 +resident_ratio: 0.171699 -ruby_cycles_executed: [ 280572 ] +ruby_cycles_executed: [ 221942 ] Busy Controller Counts: L1Cache-0:0 @@ -29,16 +29,16 @@ Directory-0:0 Busy Bank Count:0 -sequencer_requests_outstanding: [binsize: 1 max: 16 count: 1000 average: 15.774 | standard deviation: 1.14469 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 8 93 886 ] +sequencer_requests_outstanding: [binsize: 1 max: 16 count: 969 average: 15.7379 | standard deviation: 1.20089 | 0 1 1 1 1 1 1 2 1 1 1 1 1 1 9 110 836 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 32 max: 6185 count: 986 average: 4512.83 | standard deviation: 564.917 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 2 0 2 0 1 1 1 0 3 0 1 1 2 5 4 6 5 8 7 2 12 9 11 7 16 19 21 19 24 15 26 28 20 22 22 30 33 30 27 30 31 27 29 27 19 18 31 35 23 21 29 18 15 18 17 12 17 5 13 10 2 9 7 5 6 6 5 5 6 4 1 2 3 1 1 0 3 1 4 3 0 1 0 1 4 2 0 0 1 1 0 0 1 ] -miss_latency_LD: [binsize: 32 max: 5593 count: 43 average: 4526 | standard deviation: 440.983 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 2 2 2 1 1 1 1 1 0 1 1 0 3 1 0 1 1 2 2 1 0 2 1 1 1 2 0 1 1 0 1 0 0 1 1 0 0 0 0 0 0 0 0 2 0 0 0 0 1 ] -miss_latency_ST: [binsize: 32 max: 6185 count: 886 average: 4517.13 | standard deviation: 578.837 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 2 0 2 0 1 1 1 0 2 0 1 1 2 5 4 6 4 6 4 2 12 9 10 5 15 13 17 16 20 14 20 25 18 21 19 29 32 26 25 26 30 26 26 25 16 17 28 32 21 17 25 17 14 15 16 11 17 5 9 8 2 9 7 5 6 5 5 5 4 4 1 2 3 0 1 0 3 1 4 3 0 1 0 1 4 2 0 0 1 1 0 0 1 ] -miss_latency_IFETCH: [binsize: 32 max: 5314 count: 57 average: 4436.05 | standard deviation: 407.417 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 3 0 0 0 0 1 1 4 2 1 3 0 5 2 1 1 2 0 1 1 1 4 0 0 1 0 2 1 1 2 1 3 2 1 0 2 1 0 0 0 3 1 0 0 0 0 0 1 ] -miss_latency_L1Cache: [binsize: 32 max: 5682 count: 39 average: 3989.69 | standard deviation: 543.603 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 1 1 1 0 2 0 0 1 0 2 1 1 2 1 1 0 3 1 0 0 0 0 1 2 0 0 0 2 1 2 0 1 0 0 2 0 1 0 0 0 1 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] -miss_latency_Directory: [binsize: 32 max: 6185 count: 947 average: 4534.38 | standard deviation: 555.581 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 1 0 1 0 2 3 3 5 3 7 6 2 9 8 11 7 16 19 20 17 24 15 26 26 19 20 22 29 33 30 25 30 30 27 29 27 18 18 29 35 23 21 29 18 15 18 17 11 17 5 13 10 2 9 7 5 6 6 5 5 6 4 1 2 3 1 1 0 2 1 4 3 0 1 0 1 4 2 0 0 1 1 0 0 1 ] +miss_latency: [binsize: 32 max: 5298 count: 954 average: 3683.39 | standard deviation: 578.018 | 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 2 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 2 0 1 2 1 0 0 4 1 1 3 4 7 5 7 8 7 5 12 10 2 14 13 15 12 17 17 14 19 13 18 33 11 18 28 22 17 19 33 19 21 25 18 14 24 16 14 26 22 18 13 28 16 20 20 19 12 15 20 16 17 12 14 11 10 14 7 5 6 12 1 4 6 2 1 1 0 0 2 2 0 0 2 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD: [binsize: 32 max: 4587 count: 42 average: 3722.1 | standard deviation: 463.961 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 0 1 0 0 0 0 4 0 1 1 0 0 1 0 0 1 2 1 0 0 2 0 0 5 1 1 0 0 4 1 2 0 1 1 0 1 1 0 0 0 1 1 1 0 0 0 0 1 1 1 ] +miss_latency_ST: [binsize: 32 max: 5298 count: 854 average: 3677.29 | standard deviation: 585.222 | 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 2 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 2 0 1 2 1 0 0 3 1 1 3 4 7 5 6 6 6 5 11 6 2 12 12 15 9 15 13 14 18 11 16 33 7 17 27 19 14 18 32 19 18 23 17 8 22 15 14 24 16 14 10 27 14 18 20 17 11 13 19 15 13 11 13 11 9 13 5 4 5 9 0 4 6 2 1 1 0 0 2 2 0 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_IFETCH: [binsize: 32 max: 5106 count: 58 average: 3745.14 | standard deviation: 548.056 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 3 0 1 1 0 3 2 0 0 0 1 2 0 3 1 1 2 1 0 1 0 1 2 1 1 1 0 0 2 2 3 1 1 1 1 0 1 0 2 1 1 3 0 0 0 1 1 2 0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_L1Cache: [binsize: 32 max: 4375 count: 38 average: 3245.53 | standard deviation: 508.825 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 1 0 1 0 2 1 0 2 2 1 2 1 2 1 0 0 0 0 1 2 0 0 3 1 3 0 0 0 0 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_Directory: [binsize: 32 max: 5298 count: 916 average: 3701.55 | standard deviation: 573.776 | 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 2 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 1 1 0 0 4 1 1 2 3 7 4 7 6 6 5 10 8 1 12 12 13 11 17 17 14 19 12 16 33 11 15 27 19 17 19 33 19 21 24 17 14 23 16 13 25 22 18 13 28 16 20 20 19 11 15 19 16 17 12 13 11 10 14 7 5 6 12 1 4 6 2 1 1 0 0 2 2 0 0 2 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] @@ -48,12 +48,12 @@ miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -imcomplete_dir_Times: 947 -miss_latency_LD_Directory: [binsize: 32 max: 5593 count: 43 average: 4526 | standard deviation: 440.983 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 2 2 2 1 1 1 1 1 0 1 1 0 3 1 0 1 1 2 2 1 0 2 1 1 1 2 0 1 1 0 1 0 0 1 1 0 0 0 0 0 0 0 0 2 0 0 0 0 1 ] -miss_latency_ST_L1Cache: [binsize: 32 max: 5682 count: 37 average: 4008.19 | standard deviation: 551.275 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 1 1 1 0 1 0 0 1 0 2 1 1 2 0 1 0 3 1 0 0 0 0 1 2 0 0 0 2 1 2 0 1 0 0 2 0 1 0 0 0 1 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] -miss_latency_ST_Directory: [binsize: 32 max: 6185 count: 849 average: 4539.31 | standard deviation: 570.066 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 1 0 1 0 2 3 3 5 2 6 3 2 9 8 10 5 15 13 16 14 20 14 20 23 17 19 19 28 32 26 23 26 29 26 26 25 15 17 26 32 21 17 25 17 14 15 16 10 17 5 9 8 2 9 7 5 6 5 5 5 4 4 1 2 3 0 1 0 2 1 4 3 0 1 0 1 4 2 0 0 1 1 0 0 1 ] -miss_latency_IFETCH_L1Cache: [binsize: 32 max: 3792 count: 2 average: 3647.5 | standard deviation: 204.355 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ] -miss_latency_IFETCH_Directory: [binsize: 32 max: 5314 count: 55 average: 4464.73 | standard deviation: 384.051 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 0 0 0 1 1 4 2 1 3 0 5 2 1 1 2 0 1 1 1 4 0 0 1 0 2 1 1 2 1 3 2 1 0 2 1 0 0 0 3 1 0 0 0 0 0 1 ] +imcomplete_dir_Times: 916 +miss_latency_LD_Directory: [binsize: 32 max: 4587 count: 42 average: 3722.1 | standard deviation: 463.961 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 0 1 0 0 0 0 4 0 1 1 0 0 1 0 0 1 2 1 0 0 2 0 0 5 1 1 0 0 4 1 2 0 1 1 0 1 1 0 0 0 1 1 1 0 0 0 0 1 1 1 ] +miss_latency_ST_L1Cache: [binsize: 32 max: 4375 count: 36 average: 3241 | standard deviation: 520.843 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 1 0 1 0 2 1 0 2 2 1 2 1 2 0 0 0 0 0 1 2 0 0 3 1 2 0 0 0 0 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST_Directory: [binsize: 32 max: 5298 count: 818 average: 3696.49 | standard deviation: 580.688 | 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 2 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 1 1 0 0 3 1 1 2 3 7 4 6 4 5 5 9 4 1 10 11 13 9 15 13 14 18 10 14 33 7 14 26 17 14 18 32 19 18 22 16 8 21 15 13 23 16 14 10 27 14 18 20 17 10 13 18 15 13 11 12 11 9 13 5 4 5 9 0 4 6 2 1 1 0 0 2 2 0 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_IFETCH_L1Cache: [binsize: 32 max: 3515 count: 2 average: 3327 | standard deviation: 265.872 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_IFETCH_Directory: [binsize: 32 max: 5106 count: 56 average: 3760.07 | standard deviation: 550.834 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 3 0 1 1 0 2 2 0 0 0 1 2 0 3 1 1 1 1 0 1 0 1 2 1 1 1 0 0 2 2 3 1 1 1 1 0 1 0 2 1 1 3 0 0 0 1 1 2 0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -67,11 +67,11 @@ filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN Message Delayed Cycles ---------------------- -Total_delay_cycles: [binsize: 1 max: 8 count: 1890 average: 0.140212 | standard deviation: 0.700147 | 1792 21 32 25 7 8 1 1 3 ] -Total_nonPF_delay_cycles: [binsize: 1 max: 8 count: 1890 average: 0.140212 | standard deviation: 0.700147 | 1792 21 32 25 7 8 1 1 3 ] +Total_delay_cycles: [binsize: 1 max: 12 count: 1828 average: 0.280088 | standard deviation: 1.03285 | 1658 32 43 46 23 10 9 2 2 2 0 0 1 ] +Total_nonPF_delay_cycles: [binsize: 1 max: 12 count: 1828 average: 0.280088 | standard deviation: 1.03285 | 1658 32 43 46 23 10 9 2 2 2 0 0 1 ] virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_1_delay_cycles: [binsize: 1 max: 8 count: 947 average: 0.198522 | standard deviation: 0.78638 | 871 19 27 18 5 5 0 0 2 ] - virtual_network_2_delay_cycles: [binsize: 1 max: 8 count: 943 average: 0.0816543 | standard deviation: 0.596344 | 921 2 5 7 2 3 1 1 1 ] + virtual_network_1_delay_cycles: [binsize: 1 max: 7 count: 916 average: 0.265284 | standard deviation: 0.915561 | 824 19 30 28 3 6 4 2 ] + virtual_network_2_delay_cycles: [binsize: 1 max: 12 count: 912 average: 0.294956 | standard deviation: 1.13907 | 834 13 13 18 20 4 5 0 2 2 0 0 1 ] virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] @@ -85,83 +85,83 @@ Resource Usage page_size: 4096 user_time: 0 system_time: 0 -page_reclaims: 11714 +page_reclaims: 8164 page_faults: 0 swaps: 0 block_inputs: 0 -block_outputs: 0 +block_outputs: 80 Network Stats ------------- -total_msg_count_Control: 2841 22728 -total_msg_count_Data: 2833 203976 -total_msg_count_Response_Data: 2841 204552 -total_msg_count_Writeback_Control: 2829 22632 -total_msgs: 11344 total_bytes: 453888 +total_msg_count_Control: 2748 21984 +total_msg_count_Data: 2742 197424 +total_msg_count_Response_Data: 2748 197856 +total_msg_count_Writeback_Control: 2739 21912 +total_msgs: 10977 total_bytes: 439176 switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 1.68505 - links_utilized_percent_switch_0_link_0: 1.68692 bw: 16000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 1.68317 bw: 16000 base_latency: 1 +links_utilized_percent_switch_0: 2.06125 + links_utilized_percent_switch_0_link_0: 2.06294 bw: 16000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 2.05956 bw: 16000 base_latency: 1 - outgoing_messages_switch_0_link_0_Response_Data: 947 68184 [ 0 0 0 0 947 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Writeback_Control: 943 7544 [ 0 0 0 943 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Control: 947 7576 [ 0 0 947 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Data: 945 68040 [ 0 0 945 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Response_Data: 916 65952 [ 0 0 0 0 916 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Writeback_Control: 913 7304 [ 0 0 0 913 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Control: 916 7328 [ 0 0 916 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Data: 914 65808 [ 0 0 914 0 0 0 0 0 0 0 ] base_latency: 1 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 1.68487 - links_utilized_percent_switch_1_link_0: 1.68282 bw: 16000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 1.68692 bw: 16000 base_latency: 1 +links_utilized_percent_switch_1: 2.06125 + links_utilized_percent_switch_1_link_0: 2.05956 bw: 16000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 2.06294 bw: 16000 base_latency: 1 - outgoing_messages_switch_1_link_0_Control: 947 7576 [ 0 0 947 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Data: 944 67968 [ 0 0 944 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Response_Data: 947 68184 [ 0 0 0 0 947 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Writeback_Control: 943 7544 [ 0 0 0 943 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Control: 916 7328 [ 0 0 916 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Data: 914 65808 [ 0 0 914 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Response_Data: 916 65952 [ 0 0 0 0 916 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Writeback_Control: 913 7304 [ 0 0 0 913 0 0 0 0 0 0 ] base_latency: 1 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 1.68487 - links_utilized_percent_switch_2_link_0: 1.68692 bw: 16000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 1.68282 bw: 16000 base_latency: 1 +links_utilized_percent_switch_2: 2.06125 + links_utilized_percent_switch_2_link_0: 2.06294 bw: 16000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 2.05956 bw: 16000 base_latency: 1 - outgoing_messages_switch_2_link_0_Response_Data: 947 68184 [ 0 0 0 0 947 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Writeback_Control: 943 7544 [ 0 0 0 943 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Control: 947 7576 [ 0 0 947 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Data: 944 67968 [ 0 0 944 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Response_Data: 916 65952 [ 0 0 0 0 916 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Writeback_Control: 913 7304 [ 0 0 0 913 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Control: 916 7328 [ 0 0 916 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Data: 914 65808 [ 0 0 914 0 0 0 0 0 0 0 ] base_latency: 1 Cache Stats: system.l1_cntrl0.cacheMemory - system.l1_cntrl0.cacheMemory_total_misses: 949 - system.l1_cntrl0.cacheMemory_total_demand_misses: 949 + system.l1_cntrl0.cacheMemory_total_misses: 917 + system.l1_cntrl0.cacheMemory_total_demand_misses: 917 system.l1_cntrl0.cacheMemory_total_prefetches: 0 system.l1_cntrl0.cacheMemory_total_sw_prefetches: 0 system.l1_cntrl0.cacheMemory_total_hw_prefetches: 0 - system.l1_cntrl0.cacheMemory_request_type_LD: 4.63646% - system.l1_cntrl0.cacheMemory_request_type_ST: 89.568% - system.l1_cntrl0.cacheMemory_request_type_IFETCH: 5.79557% + system.l1_cntrl0.cacheMemory_request_type_LD: 4.58015% + system.l1_cntrl0.cacheMemory_request_type_ST: 89.313% + system.l1_cntrl0.cacheMemory_request_type_IFETCH: 6.10687% - system.l1_cntrl0.cacheMemory_access_mode_type_Supervisor: 949 100% + system.l1_cntrl0.cacheMemory_access_mode_type_Supervisor: 917 100% --- L1Cache --- - Event Counts - -Load [44 ] 44 -Ifetch [57 ] 57 -Store [887 ] 887 -Data [947 ] 947 +Load [42 ] 42 +Ifetch [58 ] 58 +Store [855 ] 855 +Data [916 ] 916 Fwd_GETX [0 ] 0 Inv [0 ] 0 -Replacement [946 ] 946 -Writeback_Ack [943 ] 943 +Replacement [914 ] 914 +Writeback_Ack [912 ] 912 Writeback_Nack [0 ] 0 - Transitions - -I Load [44 ] 44 -I Ifetch [55 ] 55 -I Store [850 ] 850 +I Load [42 ] 42 +I Ifetch [56 ] 56 +I Store [819 ] 819 I Inv [0 ] 0 I Replacement [0 ] 0 @@ -169,61 +169,61 @@ II Writeback_Nack [0 ] 0 M Load [0 ] 0 M Ifetch [2 ] 2 -M Store [37 ] 37 +M Store [36 ] 36 M Fwd_GETX [0 ] 0 M Inv [0 ] 0 -M Replacement [946 ] 946 +M Replacement [914 ] 914 MI Fwd_GETX [0 ] 0 MI Inv [0 ] 0 -MI Writeback_Ack [943 ] 943 +MI Writeback_Ack [912 ] 912 MI Writeback_Nack [0 ] 0 MII Fwd_GETX [0 ] 0 IS Data [98 ] 98 -IM Data [849 ] 849 +IM Data [818 ] 818 Memory controller: system.dir_cntrl0.memBuffer: - memory_total_requests: 1891 - memory_reads: 947 - memory_writes: 944 - memory_refreshes: 585 - memory_total_request_delays: 2814 - memory_delays_per_request: 1.4881 - memory_delays_in_input_queue: 676 - memory_delays_behind_head_of_bank_queue: 12 - memory_delays_stalled_at_head_of_bank_queue: 2126 - memory_stalls_for_bank_busy: 294 + memory_total_requests: 1830 + memory_reads: 916 + memory_writes: 914 + memory_refreshes: 1542 + memory_total_request_delays: 1930 + memory_delays_per_request: 1.05464 + memory_delays_in_input_queue: 182 + memory_delays_behind_head_of_bank_queue: 3 + memory_delays_stalled_at_head_of_bank_queue: 1745 + memory_stalls_for_bank_busy: 343 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 265 - memory_stalls_for_bus: 935 + memory_stalls_for_arbitration: 167 + memory_stalls_for_bus: 617 memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 518 - memory_stalls_for_read_read_turnaround: 114 - accesses_per_bank: 46 50 40 88 149 74 58 50 50 48 58 62 54 60 56 58 60 62 54 54 63 54 56 44 54 77 52 48 46 62 46 58 + memory_stalls_for_read_write_turnaround: 556 + memory_stalls_for_read_read_turnaround: 62 + accesses_per_bank: 64 60 44 96 107 64 62 38 55 54 54 36 48 34 66 48 56 54 60 70 56 62 44 62 48 58 64 72 46 46 36 66 --- Directory --- - Event Counts - -GETX [947 ] 947 +GETX [916 ] 916 GETS [0 ] 0 -PUTX [944 ] 944 +PUTX [914 ] 914 PUTX_NotOwner [0 ] 0 DMA_READ [0 ] 0 DMA_WRITE [0 ] 0 -Memory_Data [947 ] 947 -Memory_Ack [944 ] 944 +Memory_Data [916 ] 916 +Memory_Ack [914 ] 914 - Transitions - -I GETX [947 ] 947 +I GETX [916 ] 916 I PUTX_NotOwner [0 ] 0 I DMA_READ [0 ] 0 I DMA_WRITE [0 ] 0 M GETX [0 ] 0 -M PUTX [944 ] 944 +M PUTX [914 ] 914 M PUTX_NotOwner [0 ] 0 M DMA_READ [0 ] 0 M DMA_WRITE [0 ] 0 @@ -246,7 +246,7 @@ IM PUTX [0 ] 0 IM PUTX_NotOwner [0 ] 0 IM DMA_READ [0 ] 0 IM DMA_WRITE [0 ] 0 -IM Memory_Data [947 ] 947 +IM Memory_Data [916 ] 916 MI GETX [0 ] 0 MI GETS [0 ] 0 @@ -254,7 +254,7 @@ MI PUTX [0 ] 0 MI PUTX_NotOwner [0 ] 0 MI DMA_READ [0 ] 0 MI DMA_WRITE [0 ] 0 -MI Memory_Ack [944 ] 944 +MI Memory_Ack [914 ] 914 ID GETX [0 ] 0 ID GETS [0 ] 0 diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simout b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simout index 61f11453b..7d0232d91 100755 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simout +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simout @@ -1,10 +1,12 @@ +Redirecting stdout to build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby/simout +Redirecting stderr to build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jul 10 2012 16:32:12 -gem5 started Jul 10 2012 17:29:08 -gem5 executing on sc2b0605 +gem5 compiled Sep 1 2012 13:41:29 +gem5 started Sep 1 2012 13:48:35 +gem5 executing on doudou.cs.wisc.edu command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby -re tests/run.py build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 280571 because Ruby Tester completed +Exiting @ tick 221941 because Ruby Tester completed diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt index 4325e7de4..1afc580a0 100644 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt @@ -1,11 +1,11 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 0.000281 # Number of seconds simulated -sim_ticks 280571 # Number of ticks simulated -final_tick 280571 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_seconds 0.000222 # Number of seconds simulated +sim_ticks 221941 # Number of ticks simulated +final_tick 221941 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_tick_rate 2647246 # Simulator tick rate (ticks/s) -host_mem_usage 230268 # Number of bytes of host memory used +host_tick_rate 2057251 # Simulator tick rate (ticks/s) +host_mem_usage 260204 # Number of bytes of host memory used host_seconds 0.11 # Real time elapsed on the host system.l1_cntrl0.cacheMemory.num_data_array_reads 0 # number of data array reads system.l1_cntrl0.cacheMemory.num_data_array_writes 0 # number of data array writes -- cgit v1.2.3