From de489e1997ee6c37aaf6e876e32622f6c648fe95 Mon Sep 17 00:00:00 2001 From: Nilay Vaish Date: Mon, 16 Nov 2015 05:08:57 -0600 Subject: stats: updates due to recent chagnesets --- .../quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini | 1 + tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simerr | 1 + tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout | 11 +++++++---- tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt | 6 +++--- .../quick/se/70.tgen/ref/null/none/tgen-simple-mem/config.ini | 1 + tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout | 10 ++++++---- .../quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt | 6 +++--- 7 files changed, 22 insertions(+), 14 deletions(-) (limited to 'tests/quick/se/70.tgen/ref') diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini index a2d2e78d7..1c3eb8444 100644 --- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini +++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini @@ -24,6 +24,7 @@ mem_mode=timing mem_ranges= memories=system.physmem mmap_using_noreserve=false +multi_thread=false num_work_ids=16 readfile= symbolfile= diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simerr b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simerr index e69de29bb..f9e2ef3b2 100755 --- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simerr +++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simerr @@ -0,0 +1 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout index cffe93183..8a847077c 100755 --- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout +++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout @@ -1,10 +1,13 @@ +Redirecting stdout to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl/simout +Redirecting stderr to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 22 2014 16:54:17 -gem5 started Jan 22 2014 17:29:00 -gem5 executing on u200540-lin -command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-dram -re tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-dram +gem5 compiled Nov 15 2015 14:58:33 +gem5 started Nov 15 2015 14:58:46 +gem5 executing on ribera.cs.wisc.edu, pid 5049 +command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl -re /scratch/nilay/GEM5/gem5/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl + Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... Exiting @ tick 100000000000 because simulate() limit reached diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt index e6e71a4ae..54a9cbbda 100644 --- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt +++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt @@ -4,9 +4,9 @@ sim_seconds 0.100000 # Nu sim_ticks 100000000000 # Number of ticks simulated final_tick 100000000000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_tick_rate 8352384426 # Simulator tick rate (ticks/s) -host_mem_usage 264628 # Number of bytes of host memory used -host_seconds 11.97 # Real time elapsed on the host +host_tick_rate 6195134552 # Simulator tick rate (ticks/s) +host_mem_usage 261500 # Number of bytes of host memory used +host_seconds 16.14 # Real time elapsed on the host system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks system.physmem.bytes_read::cpu 106649408 # Number of bytes read from this memory diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/config.ini b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/config.ini index 0c06c4a1a..0936865ed 100644 --- a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/config.ini +++ b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/config.ini @@ -24,6 +24,7 @@ mem_mode=timing mem_ranges= memories=system.physmem mmap_using_noreserve=false +multi_thread=false num_work_ids=16 readfile= symbolfile= diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout index 01f1d48fb..bbcc7960c 100755 --- a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout +++ b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout @@ -1,10 +1,12 @@ +Redirecting stdout to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem/simout +Redirecting stderr to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jun 17 2015 08:02:53 -gem5 started Jun 17 2015 09:01:31 -gem5 executing on e104799-lin -command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem -re /work/gem5/outgoing/gem5_2/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem +gem5 compiled Nov 15 2015 14:58:33 +gem5 started Nov 15 2015 14:58:46 +gem5 executing on ribera.cs.wisc.edu, pid 5048 +command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem -re /scratch/nilay/GEM5/gem5/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt index a95826599..57e0820a3 100644 --- a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt +++ b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt @@ -4,9 +4,9 @@ sim_seconds 0.100000 # Nu sim_ticks 100000000000 # Number of ticks simulated final_tick 100000000000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_tick_rate 16291006908 # Simulator tick rate (ticks/s) -host_mem_usage 266948 # Number of bytes of host memory used -host_seconds 6.14 # Real time elapsed on the host +host_tick_rate 12448574230 # Simulator tick rate (ticks/s) +host_mem_usage 263544 # Number of bytes of host memory used +host_seconds 8.03 # Real time elapsed on the host system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks system.physmem.bytes_read::cpu 64 # Number of bytes read from this memory -- cgit v1.2.3