From 020e923ba7f027b7b3b18ccf8ac208c576d75b95 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sat, 8 Oct 2011 23:24:34 -0700 Subject: Configs: Use connectAllPorts to connect ports for simple-timing-ruby. --- tests/configs/simple-timing-ruby.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'tests') diff --git a/tests/configs/simple-timing-ruby.py b/tests/configs/simple-timing-ruby.py index 1d67f6f97..d03b86068 100644 --- a/tests/configs/simple-timing-ruby.py +++ b/tests/configs/simple-timing-ruby.py @@ -82,8 +82,7 @@ assert(len(system.ruby._cpu_ruby_ports) == 1) # Tie the cpu cache ports to the ruby cpu ports and # physmem, respectively # -cpu.icache_port = system.ruby._cpu_ruby_ports[0].port -cpu.dcache_port = system.ruby._cpu_ruby_ports[0].port +cpu.connectAllPorts(system.ruby._cpu_ruby_ports[0]) # ----------------------- # run simulation -- cgit v1.2.3