From 31825bd988fd512d822ee73a76d852c98fdf803d Mon Sep 17 00:00:00 2001 From: Curtis Dunham Date: Mon, 1 Jun 2015 18:05:11 -0500 Subject: sim, arm: add checkpoint upgrader for d02b45a5 The insertion of CONTEXTIDR_EL2 in the ARM miscellaneous registers obsoletes old checkpoints. --- util/cpt_upgrader.py | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'util/cpt_upgrader.py') diff --git a/util/cpt_upgrader.py b/util/cpt_upgrader.py index 66c671025..5d836a23d 100755 --- a/util/cpt_upgrader.py +++ b/util/cpt_upgrader.py @@ -602,6 +602,18 @@ def from_C(cpt): cpt.set(sec, 'intRegs', ' '.join(intRegs)) cpt.set(sec, 'ccRegs', ' '.join(ccRegs)) +# Checkpoint version E adds the ARM CONTEXTIDR_EL2 miscreg. +def from_D(cpt): + if cpt.get('root','isa') == 'arm': + for sec in cpt.sections(): + import re + # Search for all ISA sections + if re.search('.*sys.*\.cpu.*\.isa$', sec): + miscRegs = cpt.get(sec, 'miscRegs').split() + # CONTEXTIDR_EL2 defaults to 0b11111100000000000001 + miscRegs[599:599] = [0xFC001] + cpt.set(sec, 'miscRegs', ' '.join(str(x) for x in miscRegs)) + migrations = [] migrations.append(from_0) migrations.append(from_1) @@ -616,6 +628,7 @@ migrations.append(from_9) migrations.append(from_A) migrations.append(from_B) migrations.append(from_C) +migrations.append(from_D) verbose_print = False -- cgit v1.2.3