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# Author: Éder F. Zulian

import sys
import argparse

import m5
from m5.objects import *
from m5.util import *
addToPath('../')
from common import MemConfig
from common import HMC


pd = "Simple 'hello world' example using HMC as main memory"
parser = argparse.ArgumentParser(description=pd)
HMC.add_options(parser)
options = parser.parse_args()
# create the system we are going to simulate
system = System()
# use timing mode for the interaction between master-slave ports
system.mem_mode = 'timing'
# set the clock fequency of the system
clk = '1GHz'
vd = VoltageDomain(voltage='1V')
system.clk_domain = SrcClockDomain(clock=clk, voltage_domain=vd)
# create a simple CPU
system.cpu = TimingSimpleCPU()
# config memory system
MemConfig.config_mem(options, system)
# hook the CPU ports up to the membus
system.cpu.icache_port = system.membus.slave
system.cpu.dcache_port = system.membus.slave
# create the interrupt controller for the CPU and connect to the membus
system.cpu.createInterruptController()
# connect special port in the system to the membus. This port is a
# functional-only port to allow the system to read and write memory.
system.system_port = system.membus.slave
# get ISA for the binary to run.
isa = str(m5.defines.buildEnv['TARGET_ISA']).lower()
# run 'hello' and use the compiled ISA to find the binary
binary = 'tests/test-progs/hello/bin/' + isa + '/linux/hello'
# create a process for a simple "Hello World" application
process = Process()
# cmd is a list which begins with the executable (like argv)
process.cmd = [binary]
# set the cpu workload
system.cpu.workload = process
# create thread contexts
system.cpu.createThreads()
# set up the root SimObject
root = Root(full_system=False, system=system)
m5.instantiate()
m5.simulate()