//Default parameters, taken from /athitos/export/08spr_ee382a/sanchezd/runs/gen-scripts/ruby.defaults

//General config
g_DEADLOCK_THRESHOLD: 20000000
RANDOMIZATION: false
g_tester_length: 0
SIMICS_RUBY_MULTIPLIER: 1
OPAL_RUBY_MULTIPLIER: 1
TRANSACTION_TRACE_ENABLED: false
USER_MODE_DATA_ONLY: false
PROFILE_HOT_LINES: false
PROFILE_ALL_INSTRUCTIONS: false
PRINT_INSTRUCTION_TRACE: false
g_DEBUG_CYCLE: 0
PERFECT_MEMORY_SYSTEM: false
PERFECT_MEMORY_SYSTEM_LATENCY: 0
DATA_BLOCK: false

// Line, page sizes
g_DATA_BLOCK_BYTES: 64
g_PAGE_SIZE_BYTES: 8192


g_REPLACEMENT_POLICY: PSEDUO_LRU
// For all caches (sic)

// L1 config
//  32KB, 4-way SA
L1_CACHE_ASSOC: 4
L1_CACHE_NUM_SETS_BITS: 7
//  Single-cycle latency, hits take fastpath
SEQUENCER_TO_CONTROLLER_LATENCY: 1
REMOVE_SINGLE_CYCLE_DCACHE_FAST_PATH: false
//  L1->L2 delays
L1_REQUEST_LATENCY: 1
L1_RESPONSE_LATENCY: 1

// L2 parameters
//  4 MB, 16-way SA
L2_CACHE_ASSOC: 16
L2_CACHE_NUM_SETS_BITS: 12
MAP_L2BANKS_TO_LOWEST_BITS: false
//  Bank latencies
L2_RESPONSE_LATENCY: 10
L2_TAG_LATENCY: 5


// Directory latencies
//  The one that counts, we have perfect dirs
DIRECTORY_CACHE_LATENCY: 6
//  should not be used, but just in case...
DIRECTORY_LATENCY: 6

// Simple network parameters
//  external links
NETWORK_LINK_LATENCY: 1
// intra-chip links
ON_CHIP_LINK_LATENCY: 1

// General latencies
RECYCLE_LATENCY: 1
//Used in MessageBuffer, also MSI_MOSI_CMP dir controller


// Unused parameters, good to define them to really weird things just in case
NULL_LATENCY: 100000
// Only SMP and token CMP protocols
ISSUE_LATENCY: 100000
// Only SMP, example protocols
CACHE_RESPONSE_LATENCY: 100000
// Only SMP protocols
COPY_HEAD_LATENCY: 100000
// In no protocols or ruby code
L2_RECYCLE_LATENCY: 100000
// In no protocols or ruby code
TIMER_LATENCY: 100000
// Not used
TBE_RESPONSE_LATENCY: 100000
// Not used
PERIODIC_TIMER_WAKEUPS: false
// Not used
BLOCK_STC: false
// Not used
SINGLE_ACCESS_L2_BANKS: false
// Not used

// Main memory latency
MEMORY_RESPONSE_LATENCY_MINUS_2: 448 //not used in _m, see below

PROFILE_EXCEPTIONS: false
PROFILE_XACT: false
PROFILE_NONXACT: true
XACT_DEBUG: false
XACT_DEBUG_LEVEL: 1
XACT_MEMORY: false
XACT_ENABLE_TOURMALINE: false
XACT_NUM_CURRENT: 0
XACT_LAST_UPDATE: 0
XACT_ISOLATION_CHECK: false
PERFECT_FILTER: true
READ_WRITE_FILTER: Perfect_
PERFECT_VIRTUAL_FILTER: true
VIRTUAL_READ_WRITE_FILTER: Perfect_
PERFECT_SUMMARY_FILTER: true
SUMMARY_READ_WRITE_FILTER: Perfect_
XACT_EAGER_CD: true
XACT_LAZY_VM: false
XACT_CONFLICT_RES: BASE
XACT_COMMIT_TOKEN_LATENCY: 0
XACT_NO_BACKOFF: false
XACT_LOG_BUFFER_SIZE: 0
XACT_STORE_PREDICTOR_HISTORY: 0
XACT_STORE_PREDICTOR_ENTRIES: 0
XACT_STORE_PREDICTOR_THRESHOLD: 0
XACT_FIRST_ACCESS_COST: 0
XACT_FIRST_PAGE_ACCESS_COST: 0
ENABLE_MAGIC_WAITING: false
ENABLE_WATCHPOINT: false
XACT_ENABLE_VIRTUALIZATION_LOGTM_SE: false
ATMTP_ENABLED: false
ATMTP_ABORT_ON_NON_XACT_INST: false
ATMTP_ALLOW_SAVE_RESTORE_IN_XACT: false
ATMTP_XACT_MAX_STORES: 0
ATMTP_DEBUG_LEVEL: 0
XACT_LENGTH: 0
XACT_SIZE: 0
ABORT_RETRY_TIME: 0


// Allowed parallelism in controllers
L1CACHE_TRANSITIONS_PER_RUBY_CYCLE: 32
L2CACHE_TRANSITIONS_PER_RUBY_CYCLE: 1000
DIRECTORY_TRANSITIONS_PER_RUBY_CYCLE: 1000
g_SEQUENCER_OUTSTANDING_REQUESTS: 16

//TBEs == MSHRs (global)
NUMBER_OF_TBES: 128
NUMBER_OF_L1_TBES: 32
// unused in CMP protocols
NUMBER_OF_L2_TBES: 32
// unused in CMP protocols


// TSO & WBuffer params (unused)
FINITE_BUFFERING: false
FINITE_BUFFER_SIZE: 3
PROCESSOR_BUFFER_SIZE: 10
PROTOCOL_BUFFER_SIZE: 32
TSO: false

// General network params
g_endpoint_bandwidth: 10000
g_adaptive_routing: true
NUMBER_OF_VIRTUAL_NETWORKS: 5
FAN_OUT_DEGREE: 4
//  for HIERARCHICAL_SWITCH


// Detailed Memory Controller Params (only used in _m protocols)
MEM_BUS_CYCLE_MULTIPLIER: 5
BANKS_PER_RANK: 8
RANKS_PER_DIMM: 2
DIMMS_PER_CHANNEL: 2
BANK_BIT_0: 8
RANK_BIT_0: 11
DIMM_BIT_0: 12

BANK_QUEUE_SIZE: 12
BANK_BUSY_TIME: 22
RANK_RANK_DELAY: 2
READ_WRITE_DELAY: 3
BASIC_BUS_BUSY_TIME: 3
MEM_CTL_LATENCY: 20
REFRESH_PERIOD: 3120
TFAW: 0
//flip a coin to delay requests by one cycle, introduces non-determinism
MEM_RANDOM_ARBITRATE: 50
MEM_FIXED_DELAY: 0


//Configuration-specific parameters
g_NUM_PROCESSORS: 1
g_NUM_CHIPS: 1
g_PROCS_PER_CHIP: 1
g_NUM_L2_BANKS: 1
g_NUM_MEMORIES: 4
g_PRINT_TOPOLOGY: true
g_GARNET_NETWORK: true
g_DETAIL_NETWORK: true
g_FLIT_SIZE: 8