// -*- mode:c++ -*-

// Copyright (c) 2007 The Hewlett-Packard Development Company
// All rights reserved.
//
// Redistribution and use of this software in source and binary forms,
// with or without modification, are permitted provided that the
// following conditions are met:
//
// The software must be used only for Non-Commercial Use which means any
// use which is NOT directed to receiving any direct monetary
// compensation for, or commercial advantage from such use.  Illustrative
// examples of non-commercial use are academic research, personal study,
// teaching, education and corporate research & development.
// Illustrative examples of commercial use are distributing products for
// commercial advantage and providing services using the software for
// commercial advantage.
//
// If you wish to use this software or functionality therein that may be
// covered by patents for commercial use, please contact:
//     Director of Intellectual Property Licensing
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//
// Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.  Redistributions
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// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
// contributors may be used to endorse or promote products derived from
// this software without specific prior written permission.  No right of
// sublicense is granted herewith.  Derivatives of the software and
// output created using the software may be prepared, but only for
// Non-Commercial Uses.  Derivatives of the software may be shared with
// others provided: (i) the others agree to abide by the list of
// conditions herein which includes the Non-Commercial Use restrictions;
// and (ii) such Derivatives of the software include the above copyright
// notice to acknowledge the contribution from this software where
// applicable, this list of conditions and the disclaimer below.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// Authors: Gabe Black

//////////////////////////////////////////////////////////////////////////////
//
//  Architecture independent
//

// Execute method for macroops.
def template MacroExecPanic {{
        Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const
        {
            panic("Tried to execute macroop directly!");
            return NoFault;
        }
}};

output header {{

        // Base class for combinationally generated macroops
        class MacroOp : public StaticInst
        {
          protected:
            const uint32_t numMicroOps;

            //Constructor.
            MacroOp(const char *mnem, ExtMachInst _machInst,
                    uint32_t _numMicroOps)
                        : StaticInst(mnem, _machInst, No_OpClass),
                        numMicroOps(_numMicroOps)
            {
                assert(numMicroOps);
                microOps = new StaticInstPtr[numMicroOps];
                flags[IsMacroOp] = true;
            }

            ~MacroOp()
            {
                delete [] microOps;
            }

            StaticInstPtr * microOps;

            StaticInstPtr fetchMicroOp(MicroPC microPC)
            {
                assert(microPC < numMicroOps);
                return microOps[microPC];
            }

            std::string generateDisassembly(Addr pc,
                    const SymbolTable *symtab) const
            {
                return mnemonic;
            }

            %(MacroExecPanic)s
        };
}};

// Basic instruction class declaration template.
def template MacroDeclare {{
        namespace X86Microop
        {
            /**
             * Static instruction class for "%(mnemonic)s".
             */
            class %(class_name)s : public %(base_class)s
            {
              public:
                // Constructor.
                %(class_name)s(ExtMachInst machInst);
            };
        };
}};

// Basic instruction class constructor template.
def template MacroConstructor {{
        inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
            : %(base_class)s("%(mnemonic)s", machInst, %(num_micro_ops)s)
        {
                %(constructor)s;
                //alloc_micro_ops is the code that sets up the microOps
                //array in the parent class.
                %(alloc_micro_ops)s;
        }
}};

//////////////////////////////////////////////////////////////////////////////
//
//  X86 specific
//

let {{
    from micro_asm import Combinational_Macroop, Rom_Macroop
    class X86Macroop(Combinational_Macroop):
        def __init__(self, name):
            super(X86Macroop, self).__init__(name)
            self.directives = {
            }
            self.declared = False
        def getAllocator(self, env):
            return "new X86Macroop::%s(machInst)" % self.name
        def getDeclaration(self):
            #FIXME This first parameter should be the mnemonic. I need to
            #write some code which pulls that out
            iop = InstObjParams(self.name, self.name, "Macroop", {"code" : ""})
            return MacroDeclare.subst(iop);
        def getDefinition(self):
            #FIXME This first parameter should be the mnemonic. I need to
            #write some code which pulls that out
            numMicroops = len(self.microops)
            allocMicroops = ''
            micropc = 0
            for op in self.microops:
                allocMicroops += \
                    "microOps[%d] = %s;\n" % \
                    (micropc, op.getAllocator(True, False,
                                              micropc == 0,
                                              micropc == numMicroops - 1))
                micropc += 1
            iop = InstObjParams(self.name, self.name, "Macroop",
                                {"code" : "", "num_micro_ops" : numMicroops,
                                 "alloc_micro_ops" : allocMicroops})
            return MacroConstructor.subst(iop);
}};

output header {{
    struct EmulEnv
    {
        X86ISA::RegIndex reg;
        X86ISA::RegIndex regm;
        uint64_t immediate;
        uint64_t displacement;
        int addressSize;
        int dataSize;

        EmulEnv(X86ISA::RegIndex _reg, X86ISA::RegIndex _regm,
                uint64_t _immediate, uint64_t _displacement,
                int _addressSize, int _dataSize) :
            reg(_reg), regm(_regm),
            immediate(_immediate), displacement(_displacement),
            addressSize(_addressSize), dataSize(_dataSize)
        {;}
    };
}};

let {{
    class EmulEnv(object):
        def __init__(self):
            self.reg = "Not specified"
            self.regm = "Not specified"
            self.immediate = "IMMEDIATE"
            self.displacement = "DISPLACEMENT"
            self.addressSize = "ADDRSIZE"
            self.dataSize = "OPSIZE"
        def getAllocator(self):
            return "EmulEmv(%(reg)s, %(regm)s, %(immediate)s, %(displacement)s, %(addressSize)s, %(dataSize)s)" % \
                self.__dict__()
}};

let {{
    def genMacroop(Name, env):
        if not macroopDict.has_key(Name):
            raise Exception, "Unrecognized instruction: %s" % Name
        macroop = macroopDict[Name]
        if not macroop.declared:
            global header_output
            global decoder_output
            header_output = macroop.getDeclaration()
            decoder_output = macroop.getDefinition()
        return "return %s;\n" % macroop.getAllocator(env)
}};