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# Authors: Andreas Sandberg

from m5.SimObject import *
from m5.params import *
from m5.proxy import *

from BaseCPU import BaseCPU
from KvmVM import KvmVM

class BaseKvmCPU(BaseCPU):
    type = 'BaseKvmCPU'
    cxx_header = "cpu/kvm/base.hh"
    abstract = True

    @cxxMethod
    def dump(self):
        """Dump the internal state of KVM to standard out."""
        pass

    @classmethod
    def memory_mode(cls):
        return 'atomic_noncaching'

    @classmethod
    def require_caches(cls):
        return False

    @classmethod
    def support_take_over(cls):
        return True

    useCoalescedMMIO = Param.Bool(False, "Use coalesced MMIO (EXPERIMENTAL)")
    usePerfOverflow = Param.Bool(False, "Use perf event overflow counters (EXPERIMENTAL)")
    alwaysSyncTC = Param.Bool(False,
                              "Always sync thread contexts on entry/exit")

    hostFreq = Param.Clock("2GHz", "Host clock frequency")
    hostFactor = Param.Float(1.0, "Cycle scale factor")