---------- Begin Simulation Statistics ---------- host_inst_rate 5567399 # Simulator instruction rate (inst/s) host_mem_usage 202284 # Number of bytes of host memory used host_seconds 71.61 # Real time elapsed on the host host_tick_rate 2783694716 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 398664595 # Number of instructions simulated sim_seconds 0.199332 # Number of seconds simulated sim_ticks 199332411500 # Number of ticks simulated system.cpu.dtb.data_accesses 168275274 # DTB accesses system.cpu.dtb.data_acv 0 # DTB access violations system.cpu.dtb.data_hits 168275218 # DTB hits system.cpu.dtb.data_misses 56 # DTB misses system.cpu.dtb.fetch_accesses 0 # ITB accesses system.cpu.dtb.fetch_acv 0 # ITB acv system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.read_accesses 94754510 # DTB read accesses system.cpu.dtb.read_acv 0 # DTB read access violations system.cpu.dtb.read_hits 94754489 # DTB read hits system.cpu.dtb.read_misses 21 # DTB read misses system.cpu.dtb.write_accesses 73520764 # DTB write accesses system.cpu.dtb.write_acv 0 # DTB write access violations system.cpu.dtb.write_hits 73520729 # DTB write hits system.cpu.dtb.write_misses 35 # DTB write misses system.cpu.idle_fraction 0 # Percentage of idle cycles system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_hits 0 # DTB hits system.cpu.itb.data_misses 0 # DTB misses system.cpu.itb.fetch_accesses 398664824 # ITB accesses system.cpu.itb.fetch_acv 0 # ITB acv system.cpu.itb.fetch_hits 398664651 # ITB hits system.cpu.itb.fetch_misses 173 # ITB misses system.cpu.itb.read_accesses 0 # DTB read accesses system.cpu.itb.read_acv 0 # DTB read access violations system.cpu.itb.read_hits 0 # DTB read hits system.cpu.itb.read_misses 0 # DTB read misses system.cpu.itb.write_accesses 0 # DTB write accesses system.cpu.itb.write_acv 0 # DTB write access violations system.cpu.itb.write_hits 0 # DTB write hits system.cpu.itb.write_misses 0 # DTB write misses system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.numCycles 398664824 # number of cpu cycles simulated system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.num_busy_cycles 398664824 # Number of busy cycles system.cpu.num_conditional_control_insts 25997787 # number of instructions that are conditional controls system.cpu.num_fp_alu_accesses 155295119 # Number of float alu accesses system.cpu.num_fp_insts 155295119 # number of float instructions system.cpu.num_fp_register_reads 151776196 # number of times the floating registers were read system.cpu.num_fp_register_writes 100196481 # number of times the floating registers were written system.cpu.num_func_calls 16015498 # number of times a function call or return occured system.cpu.num_idle_cycles 0 # Number of idle cycles system.cpu.num_insts 398664595 # Number of instructions executed system.cpu.num_int_alu_accesses 316365907 # Number of integer alu accesses system.cpu.num_int_insts 316365907 # number of integer instructions system.cpu.num_int_register_reads 372938760 # number of times the integer registers were read system.cpu.num_int_register_writes 159335860 # number of times the integer registers were written system.cpu.num_load_insts 94754510 # Number of load instructions system.cpu.num_mem_refs 168275274 # number of memory refs system.cpu.num_store_insts 73520764 # Number of store instructions system.cpu.workload.num_syscalls 215 # Number of system calls ---------- End Simulation Statistics ----------