[drivesys]
type=LinuxAlphaSystem
children=bridge clk_domain cpu disk0 disk2 dvfs_handler intrctrl iobridge iobus membus physmem simple_disk terminal tsunami voltage_domain
boot_cpu_frequency=250
boot_osflags=root=/dev/hda1 console=ttyS0
cache_line_size=64
clk_domain=drivesys.clk_domain
console=/arm/projectscratch/randd/systems/dist/binaries/console
default_p_state=UNDEFINED
eventq_index=0
exit_on_work_items=false
init_param=0
kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux
kernel_addr_check=true
load_addr_mask=1099511627775
load_offset=0
mem_mode=atomic
mem_ranges=0:134217727
memories=drivesys.physmem
mmap_using_noreserve=false
multi_thread=false
num_work_ids=16
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pal=/arm/projectscratch/randd/systems/dist/binaries/ts_osfpal
power_model=Null
readfile=/work/curdun01/gem5-external.hg/configs/boot/netperf-server.rcS
symbolfile=
system_rev=1024
system_type=34
thermal_components=
thermal_model=Null
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=drivesys.membus.slave[0]

[drivesys.bridge]
type=Bridge
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
delay=50000
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
ranges=8796093022208:18446744073709551615
req_size=16
resp_size=16
master=drivesys.iobus.slave[0]
slave=drivesys.membus.master[0]

[drivesys.clk_domain]
type=SrcClockDomain
clock=1000
domain_id=-1
eventq_index=0
init_perf_level=0
voltage_domain=drivesys.voltage_domain

[drivesys.cpu]
type=AtomicSimpleCPU
children=clk_domain dtb interrupts isa itb tracer
branchPred=Null
checker=Null
clk_domain=drivesys.cpu.clk_domain
cpu_id=0
default_p_state=UNDEFINED
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=drivesys.cpu.dtb
eventq_index=0
fastmem=false
function_trace=false
function_trace_start=0
interrupts=drivesys.cpu.interrupts
isa=drivesys.cpu.isa
itb=drivesys.cpu.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
profile=0
progress_interval=0
simpoint_start_insts=
simulate_data_stalls=false
simulate_inst_stalls=false
socket_id=0
switched_out=false
system=drivesys
tracer=drivesys.cpu.tracer
width=1
workload=
dcache_port=drivesys.membus.slave[2]
icache_port=drivesys.membus.slave[1]

[drivesys.cpu.clk_domain]
type=SrcClockDomain
clock=250
domain_id=-1
eventq_index=0
init_perf_level=0
voltage_domain=drivesys.voltage_domain

[drivesys.cpu.dtb]
type=AlphaTLB
eventq_index=0
size=64

[drivesys.cpu.interrupts]
type=AlphaInterrupts
eventq_index=0

[drivesys.cpu.isa]
type=AlphaISA
eventq_index=0
system=drivesys

[drivesys.cpu.itb]
type=AlphaTLB
eventq_index=0
size=48

[drivesys.cpu.tracer]
type=ExeTracer
eventq_index=0

[drivesys.disk0]
type=IdeDisk
children=image
delay=1000000
driveID=master
eventq_index=0
image=drivesys.disk0.image

[drivesys.disk0.image]
type=CowDiskImage
children=child
child=drivesys.disk0.image.child
eventq_index=0
image_file=
read_only=false
table_size=65536

[drivesys.disk0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
read_only=true

[drivesys.disk2]
type=IdeDisk
children=image
delay=1000000
driveID=master
eventq_index=0
image=drivesys.disk2.image

[drivesys.disk2.image]
type=CowDiskImage
children=child
child=drivesys.disk2.image.child
eventq_index=0
image_file=
read_only=false
table_size=65536

[drivesys.disk2.image.child]
type=RawDiskImage
eventq_index=0
image_file=/arm/projectscratch/randd/systems/dist/disks/linux-bigswap2.img
read_only=true

[drivesys.dvfs_handler]
type=DVFSHandler
domains=
enable=false
eventq_index=0
sys_clk_domain=drivesys.clk_domain
transition_latency=100000000

[drivesys.intrctrl]
type=IntrControl
eventq_index=0
sys=drivesys

[drivesys.iobridge]
type=Bridge
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
delay=50000
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
ranges=0:134217727
req_size=16
resp_size=16
master=drivesys.membus.slave[3]
slave=drivesys.iobus.master[27]

[drivesys.iobus]
type=NoncoherentXBar
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
forward_latency=1
frontend_latency=2
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
response_latency=2
use_default_range=false
width=16
master=drivesys.tsunami.cchip.pio drivesys.tsunami.pchip.pio drivesys.tsunami.fake_sm_chip.pio drivesys.tsunami.fake_uart1.pio drivesys.tsunami.fake_uart2.pio drivesys.tsunami.fake_uart3.pio drivesys.tsunami.fake_uart4.pio drivesys.tsunami.fake_ppc.pio drivesys.tsunami.fake_OROM.pio drivesys.tsunami.fake_pnp_addr.pio drivesys.tsunami.fake_pnp_write.pio drivesys.tsunami.fake_pnp_read0.pio drivesys.tsunami.fake_pnp_read1.pio drivesys.tsunami.fake_pnp_read2.pio drivesys.tsunami.fake_pnp_read3.pio drivesys.tsunami.fake_pnp_read4.pio drivesys.tsunami.fake_pnp_read5.pio drivesys.tsunami.fake_pnp_read6.pio drivesys.tsunami.fake_pnp_read7.pio drivesys.tsunami.fake_ata0.pio drivesys.tsunami.fake_ata1.pio drivesys.tsunami.fb.pio drivesys.tsunami.io.pio drivesys.tsunami.uart.pio drivesys.tsunami.backdoor.pio drivesys.tsunami.ide.pio drivesys.tsunami.ethernet.pio drivesys.iobridge.slave
slave=drivesys.bridge.master drivesys.tsunami.ide.dma drivesys.tsunami.ethernet.dma

[drivesys.membus]
type=CoherentXBar
children=badaddr_responder
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
forward_latency=4
frontend_latency=3
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
point_of_coherency=true
power_model=Null
response_latency=2
snoop_filter=Null
snoop_response_latency=4
system=drivesys
use_default_range=false
width=16
default=drivesys.membus.badaddr_responder.pio
master=drivesys.bridge.slave drivesys.physmem.port
slave=drivesys.system_port drivesys.cpu.icache_port drivesys.cpu.dcache_port drivesys.iobridge.master

[drivesys.membus.badaddr_responder]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=0
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=true
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.membus.default

[drivesys.physmem]
type=SimpleMemory
bandwidth=73.000000
clk_domain=drivesys.clk_domain
conf_table_reported=true
default_p_state=UNDEFINED
eventq_index=0
in_addr_map=true
latency=30000
latency_var=0
null=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
range=0:134217727
port=drivesys.membus.master[1]

[drivesys.simple_disk]
type=SimpleDisk
children=disk
disk=drivesys.simple_disk.disk
eventq_index=0
system=drivesys

[drivesys.simple_disk.disk]
type=RawDiskImage
eventq_index=0
image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
read_only=true

[drivesys.terminal]
type=Terminal
eventq_index=0
intr_control=drivesys.intrctrl
number=0
output=true
port=3456

[drivesys.tsunami]
type=Tsunami
children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip uart
eventq_index=0
intrctrl=drivesys.intrctrl
system=drivesys

[drivesys.tsunami.backdoor]
type=AlphaBackdoor
clk_domain=drivesys.clk_domain
cpu=drivesys.cpu
default_p_state=UNDEFINED
disk=drivesys.simple_disk
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804682956800
pio_latency=100000
platform=drivesys.tsunami
power_model=Null
system=drivesys
terminal=drivesys.terminal
pio=drivesys.iobus.master[24]

[drivesys.tsunami.cchip]
type=TsunamiCChip
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8803072344064
pio_latency=100000
power_model=Null
system=drivesys
tsunami=drivesys.tsunami
pio=drivesys.iobus.master[0]

[drivesys.tsunami.ethernet]
type=NSGigE
children=clk_domain
BAR0=1
BAR0LegacyIO=false
BAR0Size=256
BAR1=0
BAR1LegacyIO=false
BAR1Size=4096
BAR2=0
BAR2LegacyIO=false
BAR2Size=0
BAR3=0
BAR3LegacyIO=false
BAR3Size=0
BAR4=0
BAR4LegacyIO=false
BAR4Size=0
BAR5=0
BAR5LegacyIO=false
BAR5Size=0
BIST=0
CacheLineSize=0
CapabilityPtr=0
CardbusCIS=0
ClassCode=2
Command=0
DeviceID=34
ExpansionROM=0
HeaderType=0
InterruptLine=30
InterruptPin=1
LatencyTimer=0
LegacyIOBase=0
MSICAPBaseOffset=0
MSICAPCapId=0
MSICAPMaskBits=0
MSICAPMsgAddr=0
MSICAPMsgCtrl=0
MSICAPMsgData=0
MSICAPMsgUpperAddr=0
MSICAPNextCapability=0
MSICAPPendingBits=0
MSIXCAPBaseOffset=0
MSIXCAPCapId=0
MSIXCAPNextCapability=0
MSIXMsgCtrl=0
MSIXPbaOffset=0
MSIXTableOffset=0
MaximumLatency=52
MinimumGrant=176
PMCAPBaseOffset=0
PMCAPCapId=0
PMCAPCapabilities=0
PMCAPCtrlStatus=0
PMCAPNextCapability=0
PXCAPBaseOffset=0
PXCAPCapId=0
PXCAPCapabilities=0
PXCAPDevCap2=0
PXCAPDevCapabilities=0
PXCAPDevCtrl=0
PXCAPDevCtrl2=0
PXCAPDevStatus=0
PXCAPLinkCap=0
PXCAPLinkCtrl=0
PXCAPLinkStatus=0
PXCAPNextCapability=0
ProgIF=0
Revision=0
Status=656
SubClassCode=0
SubsystemID=0
SubsystemVendorID=0
VendorID=4107
clk_domain=drivesys.tsunami.ethernet.clk_domain
config_latency=20000
default_p_state=UNDEFINED
dma_data_free=false
dma_desc_free=false
dma_no_allocate=true
dma_read_delay=0
dma_read_factor=0
dma_write_delay=0
dma_write_factor=0
eventq_index=0
hardware_address=00:90:00:00:00:01
host=drivesys.tsunami.pchip
intr_delay=10000000
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pci_bus=0
pci_dev=1
pci_func=0
pio_latency=30000
power_model=Null
rss=false
rx_delay=1000000
rx_fifo_size=524288
rx_filter=true
rx_thread=false
system=drivesys
tx_delay=1000000
tx_fifo_size=524288
tx_thread=false
dma=drivesys.iobus.slave[2]
interface=etherlink.int1
pio=drivesys.iobus.master[26]

[drivesys.tsunami.ethernet.clk_domain]
type=SrcClockDomain
clock=2000
domain_id=-1
eventq_index=0
init_perf_level=0
voltage_domain=drivesys.voltage_domain

[drivesys.tsunami.fake_OROM]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8796093677568
pio_latency=100000
pio_size=393216
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[8]

[drivesys.tsunami.fake_ata0]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848432
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[19]

[drivesys.tsunami.fake_ata1]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848304
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[20]

[drivesys.tsunami.fake_pnp_addr]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848569
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[9]

[drivesys.tsunami.fake_pnp_read0]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848451
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[11]

[drivesys.tsunami.fake_pnp_read1]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848515
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[12]

[drivesys.tsunami.fake_pnp_read2]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848579
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[13]

[drivesys.tsunami.fake_pnp_read3]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848643
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[14]

[drivesys.tsunami.fake_pnp_read4]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848707
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[15]

[drivesys.tsunami.fake_pnp_read5]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848771
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[16]

[drivesys.tsunami.fake_pnp_read6]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848835
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[17]

[drivesys.tsunami.fake_pnp_read7]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848899
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[18]

[drivesys.tsunami.fake_pnp_write]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615850617
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[10]

[drivesys.tsunami.fake_ppc]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848891
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[7]

[drivesys.tsunami.fake_sm_chip]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848816
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[2]

[drivesys.tsunami.fake_uart1]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848696
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[3]

[drivesys.tsunami.fake_uart2]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848936
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[4]

[drivesys.tsunami.fake_uart3]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848680
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[5]

[drivesys.tsunami.fake_uart4]
type=IsaFake
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848944
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=drivesys
update_data=false
warn_access=
pio=drivesys.iobus.master[6]

[drivesys.tsunami.fb]
type=BadDevice
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
devicename=FrameBuffer
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848912
pio_latency=100000
power_model=Null
system=drivesys
pio=drivesys.iobus.master[21]

[drivesys.tsunami.ide]
type=IdeController
BAR0=1
BAR0LegacyIO=false
BAR0Size=8
BAR1=1
BAR1LegacyIO=false
BAR1Size=4
BAR2=1
BAR2LegacyIO=false
BAR2Size=8
BAR3=1
BAR3LegacyIO=false
BAR3Size=4
BAR4=1
BAR4LegacyIO=false
BAR4Size=16
BAR5=1
BAR5LegacyIO=false
BAR5Size=0
BIST=0
CacheLineSize=0
CapabilityPtr=0
CardbusCIS=0
ClassCode=1
Command=0
DeviceID=28945
ExpansionROM=0
HeaderType=0
InterruptLine=31
InterruptPin=1
LatencyTimer=0
LegacyIOBase=0
MSICAPBaseOffset=0
MSICAPCapId=0
MSICAPMaskBits=0
MSICAPMsgAddr=0
MSICAPMsgCtrl=0
MSICAPMsgData=0
MSICAPMsgUpperAddr=0
MSICAPNextCapability=0
MSICAPPendingBits=0
MSIXCAPBaseOffset=0
MSIXCAPCapId=0
MSIXCAPNextCapability=0
MSIXMsgCtrl=0
MSIXPbaOffset=0
MSIXTableOffset=0
MaximumLatency=0
MinimumGrant=0
PMCAPBaseOffset=0
PMCAPCapId=0
PMCAPCapabilities=0
PMCAPCtrlStatus=0
PMCAPNextCapability=0
PXCAPBaseOffset=0
PXCAPCapId=0
PXCAPCapabilities=0
PXCAPDevCap2=0
PXCAPDevCapabilities=0
PXCAPDevCtrl=0
PXCAPDevCtrl2=0
PXCAPDevStatus=0
PXCAPLinkCap=0
PXCAPLinkCtrl=0
PXCAPLinkStatus=0
PXCAPNextCapability=0
ProgIF=133
Revision=0
Status=640
SubClassCode=1
SubsystemID=0
SubsystemVendorID=0
VendorID=32902
clk_domain=drivesys.clk_domain
config_latency=20000
ctrl_offset=0
default_p_state=UNDEFINED
disks=drivesys.disk0 drivesys.disk2
eventq_index=0
host=drivesys.tsunami.pchip
io_shift=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pci_bus=0
pci_dev=0
pci_func=0
pio_latency=30000
power_model=Null
system=drivesys
dma=drivesys.iobus.slave[1]
pio=drivesys.iobus.master[25]

[drivesys.tsunami.io]
type=TsunamiIO
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
frequency=976562500
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615847936
pio_latency=100000
power_model=Null
system=drivesys
time=Thu Jan  1 00:00:00 2009
tsunami=drivesys.tsunami
year_is_bcd=false
pio=drivesys.iobus.master[22]

[drivesys.tsunami.pchip]
type=TsunamiPChip
clk_domain=drivesys.clk_domain
conf_base=8804649402368
conf_device_bits=8
conf_size=16777216
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pci_dma_base=0
pci_mem_base=8796093022208
pci_pio_base=8804615847936
pio_addr=8802535473152
pio_latency=100000
platform=drivesys.tsunami
power_model=Null
system=drivesys
tsunami=drivesys.tsunami
pio=drivesys.iobus.master[1]

[drivesys.tsunami.uart]
type=Uart8250
clk_domain=drivesys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848952
pio_latency=100000
platform=drivesys.tsunami
power_model=Null
system=drivesys
terminal=drivesys.terminal
pio=drivesys.iobus.master[23]

[drivesys.voltage_domain]
type=VoltageDomain
eventq_index=0
voltage=1.000000

[etherdump]
type=EtherDump
eventq_index=0
file=ethertrace
maxlen=96

[etherlink]
type=EtherLink
delay=0
delay_var=0
dump=etherdump
eventq_index=0
speed=8000.000000
int0=testsys.tsunami.ethernet.interface
int1=drivesys.tsunami.ethernet.interface

[root]
type=Root
children=drivesys etherdump etherlink testsys
eventq_index=0
full_system=true
sim_quantum=0
time_sync_enable=false
time_sync_period=100000000000
time_sync_spin_threshold=100000000

[testsys]
type=LinuxAlphaSystem
children=bridge clk_domain cpu disk0 disk2 dvfs_handler intrctrl iobridge iobus membus physmem simple_disk terminal tsunami voltage_domain
boot_cpu_frequency=500
boot_osflags=root=/dev/hda1 console=ttyS0
cache_line_size=64
clk_domain=testsys.clk_domain
console=/arm/projectscratch/randd/systems/dist/binaries/console
default_p_state=UNDEFINED
eventq_index=0
exit_on_work_items=false
init_param=0
kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux
kernel_addr_check=true
load_addr_mask=1099511627775
load_offset=0
mem_mode=atomic
mem_ranges=0:134217727
memories=testsys.physmem
mmap_using_noreserve=false
multi_thread=false
num_work_ids=16
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pal=/arm/projectscratch/randd/systems/dist/binaries/ts_osfpal
power_model=Null
readfile=/work/curdun01/gem5-external.hg/configs/boot/netperf-stream-client.rcS
symbolfile=
system_rev=1024
system_type=34
thermal_components=
thermal_model=Null
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=testsys.membus.slave[0]

[testsys.bridge]
type=Bridge
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
delay=50000
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
ranges=8796093022208:18446744073709551615
req_size=16
resp_size=16
master=testsys.iobus.slave[0]
slave=testsys.membus.master[0]

[testsys.clk_domain]
type=SrcClockDomain
clock=1000
domain_id=-1
eventq_index=0
init_perf_level=0
voltage_domain=testsys.voltage_domain

[testsys.cpu]
type=AtomicSimpleCPU
children=clk_domain dtb interrupts isa itb tracer
branchPred=Null
checker=Null
clk_domain=testsys.cpu.clk_domain
cpu_id=0
default_p_state=UNDEFINED
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=testsys.cpu.dtb
eventq_index=0
fastmem=false
function_trace=false
function_trace_start=0
interrupts=testsys.cpu.interrupts
isa=testsys.cpu.isa
itb=testsys.cpu.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
profile=0
progress_interval=0
simpoint_start_insts=
simulate_data_stalls=false
simulate_inst_stalls=false
socket_id=0
switched_out=false
system=testsys
tracer=testsys.cpu.tracer
width=1
workload=
dcache_port=testsys.membus.slave[2]
icache_port=testsys.membus.slave[1]

[testsys.cpu.clk_domain]
type=SrcClockDomain
clock=500
domain_id=-1
eventq_index=0
init_perf_level=0
voltage_domain=testsys.voltage_domain

[testsys.cpu.dtb]
type=AlphaTLB
eventq_index=0
size=64

[testsys.cpu.interrupts]
type=AlphaInterrupts
eventq_index=0

[testsys.cpu.isa]
type=AlphaISA
eventq_index=0
system=testsys

[testsys.cpu.itb]
type=AlphaTLB
eventq_index=0
size=48

[testsys.cpu.tracer]
type=ExeTracer
eventq_index=0

[testsys.disk0]
type=IdeDisk
children=image
delay=1000000
driveID=master
eventq_index=0
image=testsys.disk0.image

[testsys.disk0.image]
type=CowDiskImage
children=child
child=testsys.disk0.image.child
eventq_index=0
image_file=
read_only=false
table_size=65536

[testsys.disk0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
read_only=true

[testsys.disk2]
type=IdeDisk
children=image
delay=1000000
driveID=master
eventq_index=0
image=testsys.disk2.image

[testsys.disk2.image]
type=CowDiskImage
children=child
child=testsys.disk2.image.child
eventq_index=0
image_file=
read_only=false
table_size=65536

[testsys.disk2.image.child]
type=RawDiskImage
eventq_index=0
image_file=/arm/projectscratch/randd/systems/dist/disks/linux-bigswap2.img
read_only=true

[testsys.dvfs_handler]
type=DVFSHandler
domains=
enable=false
eventq_index=0
sys_clk_domain=testsys.clk_domain
transition_latency=100000000

[testsys.intrctrl]
type=IntrControl
eventq_index=0
sys=testsys

[testsys.iobridge]
type=Bridge
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
delay=50000
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
ranges=0:134217727
req_size=16
resp_size=16
master=testsys.membus.slave[3]
slave=testsys.iobus.master[27]

[testsys.iobus]
type=NoncoherentXBar
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
forward_latency=1
frontend_latency=2
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
response_latency=2
use_default_range=false
width=16
master=testsys.tsunami.cchip.pio testsys.tsunami.pchip.pio testsys.tsunami.fake_sm_chip.pio testsys.tsunami.fake_uart1.pio testsys.tsunami.fake_uart2.pio testsys.tsunami.fake_uart3.pio testsys.tsunami.fake_uart4.pio testsys.tsunami.fake_ppc.pio testsys.tsunami.fake_OROM.pio testsys.tsunami.fake_pnp_addr.pio testsys.tsunami.fake_pnp_write.pio testsys.tsunami.fake_pnp_read0.pio testsys.tsunami.fake_pnp_read1.pio testsys.tsunami.fake_pnp_read2.pio testsys.tsunami.fake_pnp_read3.pio testsys.tsunami.fake_pnp_read4.pio testsys.tsunami.fake_pnp_read5.pio testsys.tsunami.fake_pnp_read6.pio testsys.tsunami.fake_pnp_read7.pio testsys.tsunami.fake_ata0.pio testsys.tsunami.fake_ata1.pio testsys.tsunami.fb.pio testsys.tsunami.io.pio testsys.tsunami.uart.pio testsys.tsunami.backdoor.pio testsys.tsunami.ide.pio testsys.tsunami.ethernet.pio testsys.iobridge.slave
slave=testsys.bridge.master testsys.tsunami.ide.dma testsys.tsunami.ethernet.dma

[testsys.membus]
type=CoherentXBar
children=badaddr_responder
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
forward_latency=4
frontend_latency=3
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
point_of_coherency=true
power_model=Null
response_latency=2
snoop_filter=Null
snoop_response_latency=4
system=testsys
use_default_range=false
width=16
default=testsys.membus.badaddr_responder.pio
master=testsys.bridge.slave testsys.physmem.port
slave=testsys.system_port testsys.cpu.icache_port testsys.cpu.dcache_port testsys.iobridge.master

[testsys.membus.badaddr_responder]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=0
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=true
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.membus.default

[testsys.physmem]
type=SimpleMemory
bandwidth=73.000000
clk_domain=testsys.clk_domain
conf_table_reported=true
default_p_state=UNDEFINED
eventq_index=0
in_addr_map=true
latency=30000
latency_var=0
null=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
range=0:134217727
port=testsys.membus.master[1]

[testsys.simple_disk]
type=SimpleDisk
children=disk
disk=testsys.simple_disk.disk
eventq_index=0
system=testsys

[testsys.simple_disk.disk]
type=RawDiskImage
eventq_index=0
image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
read_only=true

[testsys.terminal]
type=Terminal
eventq_index=0
intr_control=testsys.intrctrl
number=0
output=true
port=3456

[testsys.tsunami]
type=Tsunami
children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip uart
eventq_index=0
intrctrl=testsys.intrctrl
system=testsys

[testsys.tsunami.backdoor]
type=AlphaBackdoor
clk_domain=testsys.clk_domain
cpu=testsys.cpu
default_p_state=UNDEFINED
disk=testsys.simple_disk
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804682956800
pio_latency=100000
platform=testsys.tsunami
power_model=Null
system=testsys
terminal=testsys.terminal
pio=testsys.iobus.master[24]

[testsys.tsunami.cchip]
type=TsunamiCChip
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8803072344064
pio_latency=100000
power_model=Null
system=testsys
tsunami=testsys.tsunami
pio=testsys.iobus.master[0]

[testsys.tsunami.ethernet]
type=NSGigE
children=clk_domain
BAR0=1
BAR0LegacyIO=false
BAR0Size=256
BAR1=0
BAR1LegacyIO=false
BAR1Size=4096
BAR2=0
BAR2LegacyIO=false
BAR2Size=0
BAR3=0
BAR3LegacyIO=false
BAR3Size=0
BAR4=0
BAR4LegacyIO=false
BAR4Size=0
BAR5=0
BAR5LegacyIO=false
BAR5Size=0
BIST=0
CacheLineSize=0
CapabilityPtr=0
CardbusCIS=0
ClassCode=2
Command=0
DeviceID=34
ExpansionROM=0
HeaderType=0
InterruptLine=30
InterruptPin=1
LatencyTimer=0
LegacyIOBase=0
MSICAPBaseOffset=0
MSICAPCapId=0
MSICAPMaskBits=0
MSICAPMsgAddr=0
MSICAPMsgCtrl=0
MSICAPMsgData=0
MSICAPMsgUpperAddr=0
MSICAPNextCapability=0
MSICAPPendingBits=0
MSIXCAPBaseOffset=0
MSIXCAPCapId=0
MSIXCAPNextCapability=0
MSIXMsgCtrl=0
MSIXPbaOffset=0
MSIXTableOffset=0
MaximumLatency=52
MinimumGrant=176
PMCAPBaseOffset=0
PMCAPCapId=0
PMCAPCapabilities=0
PMCAPCtrlStatus=0
PMCAPNextCapability=0
PXCAPBaseOffset=0
PXCAPCapId=0
PXCAPCapabilities=0
PXCAPDevCap2=0
PXCAPDevCapabilities=0
PXCAPDevCtrl=0
PXCAPDevCtrl2=0
PXCAPDevStatus=0
PXCAPLinkCap=0
PXCAPLinkCtrl=0
PXCAPLinkStatus=0
PXCAPNextCapability=0
ProgIF=0
Revision=0
Status=656
SubClassCode=0
SubsystemID=0
SubsystemVendorID=0
VendorID=4107
clk_domain=testsys.tsunami.ethernet.clk_domain
config_latency=20000
default_p_state=UNDEFINED
dma_data_free=false
dma_desc_free=false
dma_no_allocate=true
dma_read_delay=0
dma_read_factor=0
dma_write_delay=0
dma_write_factor=0
eventq_index=0
hardware_address=00:90:00:00:00:02
host=testsys.tsunami.pchip
intr_delay=10000000
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pci_bus=0
pci_dev=1
pci_func=0
pio_latency=30000
power_model=Null
rss=false
rx_delay=1000000
rx_fifo_size=524288
rx_filter=true
rx_thread=false
system=testsys
tx_delay=1000000
tx_fifo_size=524288
tx_thread=false
dma=testsys.iobus.slave[2]
interface=etherlink.int0
pio=testsys.iobus.master[26]

[testsys.tsunami.ethernet.clk_domain]
type=SrcClockDomain
clock=2000
domain_id=-1
eventq_index=0
init_perf_level=0
voltage_domain=testsys.voltage_domain

[testsys.tsunami.fake_OROM]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8796093677568
pio_latency=100000
pio_size=393216
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[8]

[testsys.tsunami.fake_ata0]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848432
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[19]

[testsys.tsunami.fake_ata1]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848304
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[20]

[testsys.tsunami.fake_pnp_addr]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848569
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[9]

[testsys.tsunami.fake_pnp_read0]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848451
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[11]

[testsys.tsunami.fake_pnp_read1]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848515
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[12]

[testsys.tsunami.fake_pnp_read2]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848579
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[13]

[testsys.tsunami.fake_pnp_read3]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848643
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[14]

[testsys.tsunami.fake_pnp_read4]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848707
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[15]

[testsys.tsunami.fake_pnp_read5]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848771
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[16]

[testsys.tsunami.fake_pnp_read6]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848835
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[17]

[testsys.tsunami.fake_pnp_read7]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848899
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[18]

[testsys.tsunami.fake_pnp_write]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615850617
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[10]

[testsys.tsunami.fake_ppc]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848891
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[7]

[testsys.tsunami.fake_sm_chip]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848816
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[2]

[testsys.tsunami.fake_uart1]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848696
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[3]

[testsys.tsunami.fake_uart2]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848936
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[4]

[testsys.tsunami.fake_uart3]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848680
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[5]

[testsys.tsunami.fake_uart4]
type=IsaFake
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848944
pio_latency=100000
pio_size=8
power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=testsys
update_data=false
warn_access=
pio=testsys.iobus.master[6]

[testsys.tsunami.fb]
type=BadDevice
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
devicename=FrameBuffer
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848912
pio_latency=100000
power_model=Null
system=testsys
pio=testsys.iobus.master[21]

[testsys.tsunami.ide]
type=IdeController
BAR0=1
BAR0LegacyIO=false
BAR0Size=8
BAR1=1
BAR1LegacyIO=false
BAR1Size=4
BAR2=1
BAR2LegacyIO=false
BAR2Size=8
BAR3=1
BAR3LegacyIO=false
BAR3Size=4
BAR4=1
BAR4LegacyIO=false
BAR4Size=16
BAR5=1
BAR5LegacyIO=false
BAR5Size=0
BIST=0
CacheLineSize=0
CapabilityPtr=0
CardbusCIS=0
ClassCode=1
Command=0
DeviceID=28945
ExpansionROM=0
HeaderType=0
InterruptLine=31
InterruptPin=1
LatencyTimer=0
LegacyIOBase=0
MSICAPBaseOffset=0
MSICAPCapId=0
MSICAPMaskBits=0
MSICAPMsgAddr=0
MSICAPMsgCtrl=0
MSICAPMsgData=0
MSICAPMsgUpperAddr=0
MSICAPNextCapability=0
MSICAPPendingBits=0
MSIXCAPBaseOffset=0
MSIXCAPCapId=0
MSIXCAPNextCapability=0
MSIXMsgCtrl=0
MSIXPbaOffset=0
MSIXTableOffset=0
MaximumLatency=0
MinimumGrant=0
PMCAPBaseOffset=0
PMCAPCapId=0
PMCAPCapabilities=0
PMCAPCtrlStatus=0
PMCAPNextCapability=0
PXCAPBaseOffset=0
PXCAPCapId=0
PXCAPCapabilities=0
PXCAPDevCap2=0
PXCAPDevCapabilities=0
PXCAPDevCtrl=0
PXCAPDevCtrl2=0
PXCAPDevStatus=0
PXCAPLinkCap=0
PXCAPLinkCtrl=0
PXCAPLinkStatus=0
PXCAPNextCapability=0
ProgIF=133
Revision=0
Status=640
SubClassCode=1
SubsystemID=0
SubsystemVendorID=0
VendorID=32902
clk_domain=testsys.clk_domain
config_latency=20000
ctrl_offset=0
default_p_state=UNDEFINED
disks=testsys.disk0 testsys.disk2
eventq_index=0
host=testsys.tsunami.pchip
io_shift=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pci_bus=0
pci_dev=0
pci_func=0
pio_latency=30000
power_model=Null
system=testsys
dma=testsys.iobus.slave[1]
pio=testsys.iobus.master[25]

[testsys.tsunami.io]
type=TsunamiIO
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
frequency=976562500
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615847936
pio_latency=100000
power_model=Null
system=testsys
time=Thu Jan  1 00:00:00 2009
tsunami=testsys.tsunami
year_is_bcd=false
pio=testsys.iobus.master[22]

[testsys.tsunami.pchip]
type=TsunamiPChip
clk_domain=testsys.clk_domain
conf_base=8804649402368
conf_device_bits=8
conf_size=16777216
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pci_dma_base=0
pci_mem_base=8796093022208
pci_pio_base=8804615847936
pio_addr=8802535473152
pio_latency=100000
platform=testsys.tsunami
power_model=Null
system=testsys
tsunami=testsys.tsunami
pio=testsys.iobus.master[1]

[testsys.tsunami.uart]
type=Uart8250
clk_domain=testsys.clk_domain
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
pio_addr=8804615848952
pio_latency=100000
platform=testsys.tsunami
power_model=Null
system=testsys
terminal=testsys.terminal
pio=testsys.iobus.master[23]

[testsys.voltage_domain]
type=VoltageDomain
eventq_index=0
voltage=1.000000