Real time: Mar/06/2013 20:38:34 Profiler Stats -------------- Elapsed_time_in_seconds: 1 Elapsed_time_in_minutes: 0.0166667 Elapsed_time_in_hours: 0.000277778 Elapsed_time_in_days: 1.15741e-05 Virtual_time_in_seconds: 0.68 Virtual_time_in_minutes: 0.0113333 Virtual_time_in_hours: 0.000188889 Virtual_time_in_days: 7.87037e-06 Ruby_current_time: 138616 Ruby_start_time: 0 Ruby_cycles: 138616 mbytes_resident: 55.9375 mbytes_total: 148.203 resident_ratio: 0.377491 ruby_cycles_executed: [ 138617 ] Busy Controller Counts: L1Cache-0:0 L2Cache-0:0 Directory-0:0 Busy Bank Count:0 sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8449 average: 1 | standard deviation: 0 | 0 8449 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- miss_latency: [binsize: 1 max: 113 count: 8448 average: 15.4081 | standard deviation: 27.0652 | 0 0 0 6958 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 29 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 269 472 460 8 43 37 35 30 26 2 16 29 14 0 4 0 0 2 0 0 0 0 0 0 1 0 2 1 0 0 0 0 0 0 0 1 0 1 6 0 0 1 ] miss_latency_LD: [binsize: 1 max: 113 count: 1183 average: 37.6915 | standard deviation: 35.8089 | 0 0 0 600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 94 211 147 0 28 22 17 10 4 2 12 8 8 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1 3 0 0 1 ] miss_latency_ST: [binsize: 1 max: 110 count: 865 average: 20.5237 | standard deviation: 31.2331 | 0 0 0 649 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 37 82 0 6 10 3 3 6 0 4 20 5 0 3 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ] miss_latency_IFETCH: [binsize: 1 max: 98 count: 6400 average: 10.5978 | standard deviation: 21.9071 | 0 0 0 5709 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 155 224 231 8 9 5 15 17 16 0 0 1 1 0 1 0 0 1 0 0 0 0 0 0 1 0 1 ] miss_latency_NULL: [binsize: 1 max: 113 count: 8448 average: 15.4081 | standard deviation: 27.0652 | 0 0 0 6958 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 29 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 269 472 460 8 43 37 35 30 26 2 16 29 14 0 4 0 0 2 0 0 0 0 0 0 1 0 2 1 0 0 0 0 0 0 0 1 0 1 6 0 0 1 ] miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] imcomplete_wCC_Times: 0 miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] imcomplete_dir_Times: 0 miss_latency_LD_NULL: [binsize: 1 max: 113 count: 1183 average: 37.6915 | standard deviation: 35.8089 | 0 0 0 600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 94 211 147 0 28 22 17 10 4 2 12 8 8 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1 3 0 0 1 ] miss_latency_ST_NULL: [binsize: 1 max: 110 count: 865 average: 20.5237 | standard deviation: 31.2331 | 0 0 0 649 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 37 82 0 6 10 3 3 6 0 4 20 5 0 3 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ] miss_latency_IFETCH_NULL: [binsize: 1 max: 98 count: 6400 average: 10.5978 | standard deviation: 21.9071 | 0 0 0 5709 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 155 224 231 8 9 5 15 17 16 0 0 1 1 0 1 0 0 1 0 0 0 0 0 0 1 0 1 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] Request vs. RubySystem State Profile -------------------------------- filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] Message Delayed Cycles ---------------------- Total_delay_cycles: [binsize: 1 max: 4 count: 9645 average: 0.0609642 | standard deviation: 0.490156 | 9498 0 0 0 147 ] virtual_network_0_delay_cycles: [binsize: 1 max: 4 count: 2725 average: 0.21578 | standard deviation: 0.90398 | 2578 0 0 0 147 ] virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 5879 average: 0 | standard deviation: 0 | 5879 ] virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 1041 average: 0 | standard deviation: 0 | 1041 ] virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] Resource Usage -------------- page_size: 4096 user_time: 0 system_time: 0 page_reclaims: 11604 page_faults: 0 swaps: 0 block_inputs: 0 block_outputs: 96 Network Stats ------------- total_msg_count_Control: 8850 70800 total_msg_count_Request_Control: 3123 24984 total_msg_count_Response_Data: 9681 697032 total_msg_count_Response_Control: 14286 114288 total_msg_count_Writeback_Data: 864 62208 total_msg_count_Writeback_Control: 867 6936 total_msgs: 37671 total_bytes: 976248 switch_0_inlinks: 2 switch_0_outlinks: 2 links_utilized_percent_switch_0: 3.77969 links_utilized_percent_switch_0_link_0: 5.36987 bw: 16000 base_latency: 1 links_utilized_percent_switch_0_link_1: 2.1895 bw: 16000 base_latency: 1 outgoing_messages_switch_0_link_0_Request_Control: 1041 8328 [ 1041 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_0_Response_Data: 1490 107280 [ 0 1490 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_0_Response_Control: 436 3488 [ 0 436 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_1_Control: 1490 11920 [ 1490 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_1_Response_Control: 1699 13592 [ 0 900 799 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_1_Writeback_Data: 288 20736 [ 147 141 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_1_Writeback_Control: 289 2312 [ 289 0 0 0 0 0 0 0 0 0 ] base_latency: 1 switch_1_inlinks: 2 switch_1_outlinks: 2 links_utilized_percent_switch_1: 7.33627 links_utilized_percent_switch_1_link_0: 7.45296 bw: 16000 base_latency: 1 links_utilized_percent_switch_1_link_1: 7.21959 bw: 16000 base_latency: 1 outgoing_messages_switch_1_link_0_Control: 1490 11920 [ 1490 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_0_Response_Data: 1460 105120 [ 0 1460 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_0_Response_Control: 3151 25208 [ 0 2352 799 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_0_Writeback_Data: 288 20736 [ 147 141 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_0_Writeback_Control: 289 2312 [ 289 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_1_Control: 1460 11680 [ 1460 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_1_Request_Control: 1041 8328 [ 1041 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_1_Response_Data: 1767 127224 [ 0 1767 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_1_Response_Control: 1611 12888 [ 0 1611 0 0 0 0 0 0 0 0 ] base_latency: 1 switch_2_inlinks: 2 switch_2_outlinks: 2 links_utilized_percent_switch_2: 3.55659 links_utilized_percent_switch_2_link_0: 1.84971 bw: 16000 base_latency: 1 links_utilized_percent_switch_2_link_1: 5.26346 bw: 16000 base_latency: 1 outgoing_messages_switch_2_link_0_Control: 1460 11680 [ 1460 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_0_Response_Data: 277 19944 [ 0 277 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_0_Response_Control: 1175 9400 [ 0 1175 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_1_Response_Data: 1460 105120 [ 0 1460 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_1_Response_Control: 1452 11616 [ 0 1452 0 0 0 0 0 0 0 0 ] base_latency: 1 switch_3_inlinks: 3 switch_3_outlinks: 3 links_utilized_percent_switch_3: 4.89085 links_utilized_percent_switch_3_link_0: 5.36987 bw: 16000 base_latency: 1 links_utilized_percent_switch_3_link_1: 7.45296 bw: 16000 base_latency: 1 links_utilized_percent_switch_3_link_2: 1.84971 bw: 16000 base_latency: 1 outgoing_messages_switch_3_link_0_Request_Control: 1041 8328 [ 1041 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_0_Response_Data: 1490 107280 [ 0 1490 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_0_Response_Control: 436 3488 [ 0 436 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_1_Control: 1490 11920 [ 1490 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_1_Response_Data: 1460 105120 [ 0 1460 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_1_Response_Control: 3151 25208 [ 0 2352 799 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_1_Writeback_Data: 288 20736 [ 147 141 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_1_Writeback_Control: 289 2312 [ 289 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_2_Control: 1460 11680 [ 1460 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_2_Response_Data: 277 19944 [ 0 277 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_2_Response_Control: 1175 9400 [ 0 1175 0 0 0 0 0 0 0 0 ] base_latency: 1 --- L1Cache --- - Event Counts - Load [1183 ] 1183 Ifetch [6400 ] 6400 Store [865 ] 865 Inv [1041 ] 1041 L1_Replacement [1354 ] 1354 Fwd_GETX [0 ] 0 Fwd_GETS [0 ] 0 Fwd_GET_INSTR [0 ] 0 Data [0 ] 0 Data_Exclusive [583 ] 583 DataS_fromL1 [0 ] 0 Data_all_Acks [907 ] 907 Ack [0 ] 0 Ack_all [0 ] 0 WB_Ack [436 ] 436 PF_Load [0 ] 0 PF_Ifetch [0 ] 0 PF_Store [0 ] 0 - Transitions - NP Load [525 ] 525 NP Ifetch [646 ] 646 NP Store [191 ] 191 NP Inv [356 ] 356 NP L1_Replacement [0 ] 0 NP PF_Load [0 ] 0 NP PF_Ifetch [0 ] 0 NP PF_Store [0 ] 0 I Load [58 ] 58 I Ifetch [45 ] 45 I Store [25 ] 25 I Inv [0 ] 0 I L1_Replacement [556 ] 556 I PF_Load [0 ] 0 I PF_Ifetch [0 ] 0 I PF_Store [0 ] 0 S Load [0 ] 0 S Ifetch [5709 ] 5709 S Store [0 ] 0 S Inv [325 ] 325 S L1_Replacement [362 ] 362 S PF_Load [0 ] 0 S PF_Store [0 ] 0 E Load [452 ] 452 E Ifetch [0 ] 0 E Store [71 ] 71 E Inv [219 ] 219 E L1_Replacement [291 ] 291 E Fwd_GETX [0 ] 0 E Fwd_GETS [0 ] 0 E Fwd_GET_INSTR [0 ] 0 E PF_Load [0 ] 0 E PF_Store [0 ] 0 M Load [148 ] 148 M Ifetch [0 ] 0 M Store [578 ] 578 M Inv [141 ] 141 M L1_Replacement [145 ] 145 M Fwd_GETX [0 ] 0 M Fwd_GETS [0 ] 0 M Fwd_GET_INSTR [0 ] 0 M PF_Load [0 ] 0 M PF_Store [0 ] 0 IS Load [0 ] 0 IS Ifetch [0 ] 0 IS Store [0 ] 0 IS Inv [0 ] 0 IS L1_Replacement [0 ] 0 IS Data_Exclusive [583 ] 583 IS DataS_fromL1 [0 ] 0 IS Data_all_Acks [691 ] 691 IS PF_Load [0 ] 0 IS PF_Store [0 ] 0 IM Load [0 ] 0 IM Ifetch [0 ] 0 IM Store [0 ] 0 IM Inv [0 ] 0 IM L1_Replacement [0 ] 0 IM Data [0 ] 0 IM Data_all_Acks [216 ] 216 IM Ack [0 ] 0 IM PF_Load [0 ] 0 IM PF_Store [0 ] 0 SM Load [0 ] 0 SM Ifetch [0 ] 0 SM Store [0 ] 0 SM Inv [0 ] 0 SM L1_Replacement [0 ] 0 SM Ack [0 ] 0 SM Ack_all [0 ] 0 SM PF_Load [0 ] 0 SM PF_Store [0 ] 0 IS_I Load [0 ] 0 IS_I Ifetch [0 ] 0 IS_I Store [0 ] 0 IS_I Inv [0 ] 0 IS_I L1_Replacement [0 ] 0 IS_I Data_Exclusive [0 ] 0 IS_I DataS_fromL1 [0 ] 0 IS_I Data_all_Acks [0 ] 0 IS_I PF_Load [0 ] 0 IS_I PF_Store [0 ] 0 M_I Load [0 ] 0 M_I Ifetch [0 ] 0 M_I Store [0 ] 0 M_I Inv [0 ] 0 M_I L1_Replacement [0 ] 0 M_I Fwd_GETX [0 ] 0 M_I Fwd_GETS [0 ] 0 M_I Fwd_GET_INSTR [0 ] 0 M_I WB_Ack [436 ] 436 M_I PF_Load [0 ] 0 M_I PF_Store [0 ] 0 SINK_WB_ACK Load [0 ] 0 SINK_WB_ACK Ifetch [0 ] 0 SINK_WB_ACK Store [0 ] 0 SINK_WB_ACK Inv [0 ] 0 SINK_WB_ACK L1_Replacement [0 ] 0 SINK_WB_ACK WB_Ack [0 ] 0 SINK_WB_ACK PF_Load [0 ] 0 SINK_WB_ACK PF_Store [0 ] 0 PF_IS Load [0 ] 0 PF_IS Ifetch [0 ] 0 PF_IS Store [0 ] 0 PF_IS Inv [0 ] 0 PF_IS L1_Replacement [0 ] 0 PF_IS Data_Exclusive [0 ] 0 PF_IS DataS_fromL1 [0 ] 0 PF_IS Data_all_Acks [0 ] 0 PF_IS PF_Load [0 ] 0 PF_IS PF_Store [0 ] 0 PF_IM Load [0 ] 0 PF_IM Ifetch [0 ] 0 PF_IM Store [0 ] 0 PF_IM Inv [0 ] 0 PF_IM L1_Replacement [0 ] 0 PF_IM Data [0 ] 0 PF_IM Data_all_Acks [0 ] 0 PF_IM Ack [0 ] 0 PF_IM PF_Load [0 ] 0 PF_IM PF_Store [0 ] 0 PF_SM Load [0 ] 0 PF_SM Ifetch [0 ] 0 PF_SM Store [0 ] 0 PF_SM Inv [0 ] 0 PF_SM L1_Replacement [0 ] 0 PF_SM Ack [0 ] 0 PF_SM Ack_all [0 ] 0 PF_IS_I Load [0 ] 0 PF_IS_I Store [0 ] 0 PF_IS_I Inv [0 ] 0 PF_IS_I L1_Replacement [0 ] 0 PF_IS_I Data_Exclusive [0 ] 0 PF_IS_I DataS_fromL1 [0 ] 0 PF_IS_I Data_all_Acks [0 ] 0 --- L2Cache --- - Event Counts - L1_GET_INSTR [691 ] 691 L1_GETS [583 ] 583 L1_GETX [216 ] 216 L1_UPGRADE [0 ] 0 L1_PUTX [436 ] 436 L1_PUTX_old [0 ] 0 Fwd_L1_GETX [0 ] 0 Fwd_L1_GETS [0 ] 0 Fwd_L1_GET_INSTR [0 ] 0 L2_Replacement [142 ] 142 L2_Replacement_clean [1310 ] 1310 Mem_Data [1460 ] 1460 Mem_Ack [1452 ] 1452 WB_Data [141 ] 141 WB_Data_clean [0 ] 0 Ack [0 ] 0 Ack_all [900 ] 900 Unblock [0 ] 0 Unblock_Cancel [0 ] 0 Exclusive_Unblock [799 ] 799 MEM_Inv [0 ] 0 - Transitions - NP L1_GET_INSTR [686 ] 686 NP L1_GETS [570 ] 570 NP L1_GETX [204 ] 204 NP L1_PUTX [0 ] 0 NP L1_PUTX_old [0 ] 0 SS L1_GET_INSTR [5 ] 5 SS L1_GETS [0 ] 0 SS L1_GETX [0 ] 0 SS L1_UPGRADE [0 ] 0 SS L1_PUTX [0 ] 0 SS L1_PUTX_old [0 ] 0 SS L2_Replacement [0 ] 0 SS L2_Replacement_clean [681 ] 681 SS MEM_Inv [0 ] 0 M L1_GET_INSTR [0 ] 0 M L1_GETS [13 ] 13 M L1_GETX [12 ] 12 M L1_PUTX [0 ] 0 M L1_PUTX_old [0 ] 0 M L2_Replacement [134 ] 134 M L2_Replacement_clean [277 ] 277 M MEM_Inv [0 ] 0 MT L1_GET_INSTR [0 ] 0 MT L1_GETS [0 ] 0 MT L1_GETX [0 ] 0 MT L1_PUTX [436 ] 436 MT L1_PUTX_old [0 ] 0 MT L2_Replacement [8 ] 8 MT L2_Replacement_clean [352 ] 352 MT MEM_Inv [0 ] 0 M_I L1_GET_INSTR [0 ] 0 M_I L1_GETS [0 ] 0 M_I L1_GETX [0 ] 0 M_I L1_UPGRADE [0 ] 0 M_I L1_PUTX [0 ] 0 M_I L1_PUTX_old [0 ] 0 M_I Mem_Ack [1452 ] 1452 M_I MEM_Inv [0 ] 0 MT_I L1_GET_INSTR [0 ] 0 MT_I L1_GETS [0 ] 0 MT_I L1_GETX [0 ] 0 MT_I L1_UPGRADE [0 ] 0 MT_I L1_PUTX [0 ] 0 MT_I L1_PUTX_old [0 ] 0 MT_I WB_Data [6 ] 6 MT_I WB_Data_clean [0 ] 0 MT_I Ack_all [2 ] 2 MT_I MEM_Inv [0 ] 0 MCT_I L1_GET_INSTR [0 ] 0 MCT_I L1_GETS [0 ] 0 MCT_I L1_GETX [0 ] 0 MCT_I L1_UPGRADE [0 ] 0 MCT_I L1_PUTX [0 ] 0 MCT_I L1_PUTX_old [0 ] 0 MCT_I WB_Data [135 ] 135 MCT_I WB_Data_clean [0 ] 0 MCT_I Ack_all [217 ] 217 I_I L1_GET_INSTR [0 ] 0 I_I L1_GETS [0 ] 0 I_I L1_GETX [0 ] 0 I_I L1_UPGRADE [0 ] 0 I_I L1_PUTX [0 ] 0 I_I L1_PUTX_old [0 ] 0 I_I Ack [0 ] 0 I_I Ack_all [681 ] 681 S_I L1_GET_INSTR [0 ] 0 S_I L1_GETS [0 ] 0 S_I L1_GETX [0 ] 0 S_I L1_UPGRADE [0 ] 0 S_I L1_PUTX [0 ] 0 S_I L1_PUTX_old [0 ] 0 S_I Ack [0 ] 0 S_I Ack_all [0 ] 0 S_I MEM_Inv [0 ] 0 ISS L1_GET_INSTR [0 ] 0 ISS L1_GETS [0 ] 0 ISS L1_GETX [0 ] 0 ISS L1_PUTX [0 ] 0 ISS L1_PUTX_old [0 ] 0 ISS L2_Replacement [0 ] 0 ISS L2_Replacement_clean [0 ] 0 ISS Mem_Data [570 ] 570 ISS MEM_Inv [0 ] 0 IS L1_GET_INSTR [0 ] 0 IS L1_GETS [0 ] 0 IS L1_GETX [0 ] 0 IS L1_PUTX [0 ] 0 IS L1_PUTX_old [0 ] 0 IS L2_Replacement [0 ] 0 IS L2_Replacement_clean [0 ] 0 IS Mem_Data [686 ] 686 IS MEM_Inv [0 ] 0 IM L1_GET_INSTR [0 ] 0 IM L1_GETS [0 ] 0 IM L1_GETX [0 ] 0 IM L1_PUTX [0 ] 0 IM L1_PUTX_old [0 ] 0 IM L2_Replacement [0 ] 0 IM L2_Replacement_clean [0 ] 0 IM Mem_Data [204 ] 204 IM MEM_Inv [0 ] 0 SS_MB L1_GET_INSTR [0 ] 0 SS_MB L1_GETS [0 ] 0 SS_MB L1_GETX [0 ] 0 SS_MB L1_UPGRADE [0 ] 0 SS_MB L1_PUTX [0 ] 0 SS_MB L1_PUTX_old [0 ] 0 SS_MB L2_Replacement [0 ] 0 SS_MB L2_Replacement_clean [0 ] 0 SS_MB Unblock_Cancel [0 ] 0 SS_MB Exclusive_Unblock [0 ] 0 SS_MB MEM_Inv [0 ] 0 MT_MB L1_GET_INSTR [0 ] 0 MT_MB L1_GETS [0 ] 0 MT_MB L1_GETX [0 ] 0 MT_MB L1_UPGRADE [0 ] 0 MT_MB L1_PUTX [0 ] 0 MT_MB L1_PUTX_old [0 ] 0 MT_MB L2_Replacement [0 ] 0 MT_MB L2_Replacement_clean [0 ] 0 MT_MB Unblock_Cancel [0 ] 0 MT_MB Exclusive_Unblock [799 ] 799 MT_MB MEM_Inv [0 ] 0 MT_IIB L1_GET_INSTR [0 ] 0 MT_IIB L1_GETS [0 ] 0 MT_IIB L1_GETX [0 ] 0 MT_IIB L1_UPGRADE [0 ] 0 MT_IIB L1_PUTX [0 ] 0 MT_IIB L1_PUTX_old [0 ] 0 MT_IIB L2_Replacement [0 ] 0 MT_IIB L2_Replacement_clean [0 ] 0 MT_IIB WB_Data [0 ] 0 MT_IIB WB_Data_clean [0 ] 0 MT_IIB Unblock [0 ] 0 MT_IIB MEM_Inv [0 ] 0 MT_IB L1_GET_INSTR [0 ] 0 MT_IB L1_GETS [0 ] 0 MT_IB L1_GETX [0 ] 0 MT_IB L1_UPGRADE [0 ] 0 MT_IB L1_PUTX [0 ] 0 MT_IB L1_PUTX_old [0 ] 0 MT_IB L2_Replacement [0 ] 0 MT_IB L2_Replacement_clean [0 ] 0 MT_IB WB_Data [0 ] 0 MT_IB WB_Data_clean [0 ] 0 MT_IB Unblock_Cancel [0 ] 0 MT_IB MEM_Inv [0 ] 0 MT_SB L1_GET_INSTR [0 ] 0 MT_SB L1_GETS [0 ] 0 MT_SB L1_GETX [0 ] 0 MT_SB L1_UPGRADE [0 ] 0 MT_SB L1_PUTX [0 ] 0 MT_SB L1_PUTX_old [0 ] 0 MT_SB L2_Replacement [0 ] 0 MT_SB L2_Replacement_clean [0 ] 0 MT_SB Unblock [0 ] 0 MT_SB MEM_Inv [0 ] 0 Memory controller: system.ruby.dir_cntrl0.memBuffer: memory_total_requests: 1737 memory_reads: 1460 memory_writes: 277 memory_refreshes: 963 memory_total_request_delays: 341 memory_delays_per_request: 0.196315 memory_delays_in_input_queue: 0 memory_delays_behind_head_of_bank_queue: 0 memory_delays_stalled_at_head_of_bank_queue: 341 memory_stalls_for_bank_busy: 166 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 memory_stalls_for_arbitration: 24 memory_stalls_for_bus: 147 memory_stalls_for_tfaw: 0 memory_stalls_for_read_write_turnaround: 4 memory_stalls_for_read_read_turnaround: 0 accesses_per_bank: 92 21 45 54 57 174 48 18 19 22 35 37 56 59 44 36 41 24 22 28 32 48 122 36 32 25 35 96 114 185 19 61 --- Directory --- - Event Counts - Fetch [1460 ] 1460 Data [277 ] 277 Memory_Data [1460 ] 1460 Memory_Ack [277 ] 277 DMA_READ [0 ] 0 DMA_WRITE [0 ] 0 CleanReplacement [1175 ] 1175 - Transitions - I Fetch [1460 ] 1460 I DMA_READ [0 ] 0 I DMA_WRITE [0 ] 0 ID Fetch [0 ] 0 ID Data [0 ] 0 ID Memory_Data [0 ] 0 ID DMA_READ [0 ] 0 ID DMA_WRITE [0 ] 0 ID_W Fetch [0 ] 0 ID_W Data [0 ] 0 ID_W Memory_Ack [0 ] 0 ID_W DMA_READ [0 ] 0 ID_W DMA_WRITE [0 ] 0 M Data [277 ] 277 M DMA_READ [0 ] 0 M DMA_WRITE [0 ] 0 M CleanReplacement [1175 ] 1175 IM Fetch [0 ] 0 IM Data [0 ] 0 IM Memory_Data [1460 ] 1460 IM DMA_READ [0 ] 0 IM DMA_WRITE [0 ] 0 MI Fetch [0 ] 0 MI Data [0 ] 0 MI Memory_Ack [277 ] 277 MI DMA_READ [0 ] 0 MI DMA_WRITE [0 ] 0 M_DRD Data [0 ] 0 M_DRD DMA_READ [0 ] 0 M_DRD DMA_WRITE [0 ] 0 M_DRDI Fetch [0 ] 0 M_DRDI Data [0 ] 0 M_DRDI Memory_Ack [0 ] 0 M_DRDI DMA_READ [0 ] 0 M_DRDI DMA_WRITE [0 ] 0 M_DWR Data [0 ] 0 M_DWR DMA_READ [0 ] 0 M_DWR DMA_WRITE [0 ] 0 M_DWRI Fetch [0 ] 0 M_DWRI Data [0 ] 0 M_DWRI Memory_Ack [0 ] 0 M_DWRI DMA_READ [0 ] 0 M_DWRI DMA_WRITE [0 ] 0