---------- Begin Simulation Statistics ---------- sim_seconds 0.000139 # Number of seconds simulated sim_ticks 138616 # Number of ticks simulated final_tick 138616 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks host_inst_rate 17199 # Simulator instruction rate (inst/s) host_op_rate 17198 # Simulator op (including micro ops) rate (op/s) host_tick_rate 373054 # Simulator tick rate (ticks/s) host_mem_usage 151764 # Number of bytes of host memory used host_seconds 0.37 # Real time elapsed on the host sim_insts 6390 # Number of instructions simulated sim_ops 6390 # Number of ops (including micro ops) simulated system.ruby.l2_cntrl0.L2cacheMemory.num_data_array_reads 0 # number of data array reads system.ruby.l2_cntrl0.L2cacheMemory.num_data_array_writes 0 # number of data array writes system.ruby.l2_cntrl0.L2cacheMemory.num_tag_array_reads 0 # number of tag array reads system.ruby.l2_cntrl0.L2cacheMemory.num_tag_array_writes 0 # number of tag array writes system.ruby.l2_cntrl0.L2cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array system.ruby.l2_cntrl0.L2cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array system.ruby.l1_cntrl0.L1DcacheMemory.num_data_array_reads 0 # number of data array reads system.ruby.l1_cntrl0.L1DcacheMemory.num_data_array_writes 0 # number of data array writes system.ruby.l1_cntrl0.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads system.ruby.l1_cntrl0.L1DcacheMemory.num_tag_array_writes 0 # number of tag array writes system.ruby.l1_cntrl0.L1DcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array system.ruby.l1_cntrl0.L1DcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array system.ruby.l1_cntrl0.L1IcacheMemory.num_data_array_reads 0 # number of data array reads system.ruby.l1_cntrl0.L1IcacheMemory.num_data_array_writes 0 # number of data array writes system.ruby.l1_cntrl0.L1IcacheMemory.num_tag_array_reads 0 # number of tag array reads system.ruby.l1_cntrl0.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes system.ruby.l1_cntrl0.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array system.ruby.l1_cntrl0.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array system.ruby.l1_cntrl0.prefetcher.miss_observed 0 # number of misses observed system.ruby.l1_cntrl0.prefetcher.allocated_streams 0 # number of streams allocated for prefetching system.ruby.l1_cntrl0.prefetcher.prefetches_requested 0 # number of prefetch requests made system.ruby.l1_cntrl0.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted system.ruby.l1_cntrl0.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped system.ruby.l1_cntrl0.prefetcher.hits 0 # number of prefetched blocks accessed system.ruby.l1_cntrl0.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched system.ruby.l1_cntrl0.prefetcher.pages_crossed 0 # number of prefetches across pages system.ruby.l1_cntrl0.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv system.cpu.dtb.fetch_accesses 0 # ITB accesses system.cpu.dtb.read_hits 1183 # DTB read hits system.cpu.dtb.read_misses 7 # DTB read misses system.cpu.dtb.read_acv 0 # DTB read access violations system.cpu.dtb.read_accesses 1190 # DTB read accesses system.cpu.dtb.write_hits 865 # DTB write hits system.cpu.dtb.write_misses 3 # DTB write misses system.cpu.dtb.write_acv 0 # DTB write access violations system.cpu.dtb.write_accesses 868 # DTB write accesses system.cpu.dtb.data_hits 2048 # DTB hits system.cpu.dtb.data_misses 10 # DTB misses system.cpu.dtb.data_acv 0 # DTB access violations system.cpu.dtb.data_accesses 2058 # DTB accesses system.cpu.itb.fetch_hits 6401 # ITB hits system.cpu.itb.fetch_misses 17 # ITB misses system.cpu.itb.fetch_acv 0 # ITB acv system.cpu.itb.fetch_accesses 6418 # ITB accesses system.cpu.itb.read_hits 0 # DTB read hits system.cpu.itb.read_misses 0 # DTB read misses system.cpu.itb.read_acv 0 # DTB read access violations system.cpu.itb.read_accesses 0 # DTB read accesses system.cpu.itb.write_hits 0 # DTB write hits system.cpu.itb.write_misses 0 # DTB write misses system.cpu.itb.write_acv 0 # DTB write access violations system.cpu.itb.write_accesses 0 # DTB write accesses system.cpu.itb.data_hits 0 # DTB hits system.cpu.itb.data_misses 0 # DTB misses system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.workload.num_syscalls 17 # Number of system calls system.cpu.numCycles 138616 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.committedInsts 6390 # Number of instructions committed system.cpu.committedOps 6390 # Number of ops (including micro ops) committed system.cpu.num_int_alu_accesses 6317 # Number of integer alu accesses system.cpu.num_fp_alu_accesses 10 # Number of float alu accesses system.cpu.num_func_calls 251 # number of times a function call or return occured system.cpu.num_conditional_control_insts 749 # number of instructions that are conditional controls system.cpu.num_int_insts 6317 # number of integer instructions system.cpu.num_fp_insts 10 # number of float instructions system.cpu.num_int_register_reads 8285 # number of times the integer registers were read system.cpu.num_int_register_writes 4568 # number of times the integer registers were written system.cpu.num_fp_register_reads 8 # number of times the floating registers were read system.cpu.num_fp_register_writes 2 # number of times the floating registers were written system.cpu.num_mem_refs 2058 # number of memory refs system.cpu.num_load_insts 1190 # Number of load instructions system.cpu.num_store_insts 868 # Number of store instructions system.cpu.num_idle_cycles 0 # Number of idle cycles system.cpu.num_busy_cycles 138616 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles ---------- End Simulation Statistics ----------