---------- Begin Simulation Statistics ---------- sim_seconds 0.000125 # Number of seconds simulated sim_ticks 125334 # Number of ticks simulated final_tick 125334 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks host_inst_rate 43626 # Simulator instruction rate (inst/s) host_op_rate 43619 # Simulator op (including micro ops) rate (op/s) host_tick_rate 940162 # Simulator tick rate (ticks/s) host_mem_usage 147408 # Number of bytes of host memory used host_seconds 0.13 # Real time elapsed on the host sim_insts 5814 # Number of instructions simulated sim_ops 5814 # Number of ops (including micro ops) simulated system.ruby.l1_cntrl0.cacheMemory.demand_hits 6410 # Number of cache demand hits system.ruby.l1_cntrl0.cacheMemory.demand_misses 1493 # Number of cache demand misses system.ruby.l1_cntrl0.cacheMemory.demand_accesses 7903 # Number of cache demand accesses system.ruby.dir_cntrl0.memBuffer.memReq 2982 # Total number of memory requests system.ruby.dir_cntrl0.memBuffer.memRead 1493 # Number of memory reads system.ruby.dir_cntrl0.memBuffer.memWrite 1489 # Number of memory writes system.ruby.dir_cntrl0.memBuffer.memRefresh 871 # Number of memory refreshes system.ruby.dir_cntrl0.memBuffer.memWaitCycles 2125 # Delay stalled at the head of the bank queue system.ruby.dir_cntrl0.memBuffer.memBankQ 5 # Delay behind the head of the bank queue system.ruby.dir_cntrl0.memBuffer.totalStalls 2130 # Total number of stall cycles system.ruby.dir_cntrl0.memBuffer.stallsPerReq 0.714286 # Expected number of stall cycles per request system.ruby.dir_cntrl0.memBuffer.memBankBusy 839 # memory stalls due to busy bank system.ruby.dir_cntrl0.memBuffer.memBusBusy 1172 # memory stalls due to busy bus system.ruby.dir_cntrl0.memBuffer.memReadWriteBusy 34 # memory stalls due to read write turnaround system.ruby.dir_cntrl0.memBuffer.memArbWait 80 # memory stalls due to arbitration system.ruby.dir_cntrl0.memBuffer.memBankCount | 236 7.91% 7.91% | 108 3.62% 11.54% | 74 2.48% 14.02% | 51 1.71% 15.73% | 26 0.87% 16.60% | 104 3.49% 20.09% | 18 0.60% 20.69% | 38 1.27% 21.97% | 16 0.54% 22.50% | 52 1.74% 24.25% | 154 5.16% 29.41% | 50 1.68% 31.09% | 22 0.74% 31.82% | 70 2.35% 34.17% | 30 1.01% 35.18% | 220 7.38% 42.56% | 80 2.68% 45.24% | 58 1.95% 47.18% | 80 2.68% 49.87% | 118 3.96% 53.82% | 42 1.41% 55.23% | 52 1.74% 56.98% | 82 2.75% 59.73% | 168 5.63% 65.36% | 116 3.89% 69.25% | 80 2.68% 71.93% | 138 4.63% 76.56% | 110 3.69% 80.25% | 208 6.98% 87.22% | 273 9.15% 96.38% | 40 1.34% 97.72% | 68 2.28% 100.00% # Number of accesses per bank system.ruby.dir_cntrl0.memBuffer.memBankCount::total 2982 # Number of accesses per bank system.cpu.dtb.read_hits 0 # DTB read hits system.cpu.dtb.read_misses 0 # DTB read misses system.cpu.dtb.read_accesses 0 # DTB read accesses system.cpu.dtb.write_hits 0 # DTB write hits system.cpu.dtb.write_misses 0 # DTB write misses system.cpu.dtb.write_accesses 0 # DTB write accesses system.cpu.dtb.hits 0 # DTB hits system.cpu.dtb.misses 0 # DTB misses system.cpu.dtb.accesses 0 # DTB accesses system.cpu.itb.read_hits 0 # DTB read hits system.cpu.itb.read_misses 0 # DTB read misses system.cpu.itb.read_accesses 0 # DTB read accesses system.cpu.itb.write_hits 0 # DTB write hits system.cpu.itb.write_misses 0 # DTB write misses system.cpu.itb.write_accesses 0 # DTB write accesses system.cpu.itb.hits 0 # DTB hits system.cpu.itb.misses 0 # DTB misses system.cpu.itb.accesses 0 # DTB accesses system.cpu.workload.num_syscalls 8 # Number of system calls system.cpu.numCycles 125334 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.committedInsts 5814 # Number of instructions committed system.cpu.committedOps 5814 # Number of ops (including micro ops) committed system.cpu.num_int_alu_accesses 5113 # Number of integer alu accesses system.cpu.num_fp_alu_accesses 2 # Number of float alu accesses system.cpu.num_func_calls 194 # number of times a function call or return occured system.cpu.num_conditional_control_insts 676 # number of instructions that are conditional controls system.cpu.num_int_insts 5113 # number of integer instructions system.cpu.num_fp_insts 2 # number of float instructions system.cpu.num_int_register_reads 7284 # number of times the integer registers were read system.cpu.num_int_register_writes 3397 # number of times the integer registers were written system.cpu.num_fp_register_reads 3 # number of times the floating registers were read system.cpu.num_fp_register_writes 1 # number of times the floating registers were written system.cpu.num_mem_refs 2089 # number of memory refs system.cpu.num_load_insts 1163 # Number of load instructions system.cpu.num_store_insts 926 # Number of store instructions system.cpu.num_idle_cycles 0 # Number of idle cycles system.cpu.num_busy_cycles 125334 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles system.ruby.l1_cntrl0.Load 1163 0.00% 0.00% system.ruby.l1_cntrl0.Ifetch 5815 0.00% 0.00% system.ruby.l1_cntrl0.Store 925 0.00% 0.00% system.ruby.l1_cntrl0.Data 1493 0.00% 0.00% system.ruby.l1_cntrl0.Replacement 1489 0.00% 0.00% system.ruby.l1_cntrl0.Writeback_Ack 1489 0.00% 0.00% system.ruby.l1_cntrl0.I.Load 677 0.00% 0.00% system.ruby.l1_cntrl0.I.Ifetch 596 0.00% 0.00% system.ruby.l1_cntrl0.I.Store 220 0.00% 0.00% system.ruby.l1_cntrl0.M.Load 486 0.00% 0.00% system.ruby.l1_cntrl0.M.Ifetch 5219 0.00% 0.00% system.ruby.l1_cntrl0.M.Store 705 0.00% 0.00% system.ruby.l1_cntrl0.M.Replacement 1489 0.00% 0.00% system.ruby.l1_cntrl0.MI.Writeback_Ack 1489 0.00% 0.00% system.ruby.l1_cntrl0.IS.Data 1273 0.00% 0.00% system.ruby.l1_cntrl0.IM.Data 220 0.00% 0.00% system.ruby.dir_cntrl0.GETX 1493 0.00% 0.00% system.ruby.dir_cntrl0.PUTX 1489 0.00% 0.00% system.ruby.dir_cntrl0.Memory_Data 1493 0.00% 0.00% system.ruby.dir_cntrl0.Memory_Ack 1489 0.00% 0.00% system.ruby.dir_cntrl0.I.GETX 1493 0.00% 0.00% system.ruby.dir_cntrl0.M.PUTX 1489 0.00% 0.00% system.ruby.dir_cntrl0.IM.Memory_Data 1493 0.00% 0.00% system.ruby.dir_cntrl0.MI.Memory_Ack 1489 0.00% 0.00% ---------- End Simulation Statistics ----------