From ae51f41d14f548d494ac41e0d21137c5a4c3f59c Mon Sep 17 00:00:00 2001 From: Iru Cai Date: Wed, 30 Oct 2019 14:21:52 +0800 Subject: import the U-Boot code and make it compile --- include/cache.h | 69 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 include/cache.h (limited to 'include/cache.h') diff --git a/include/cache.h b/include/cache.h new file mode 100644 index 0000000..32f59fd --- /dev/null +++ b/include/cache.h @@ -0,0 +1,69 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 Intel Corporation + */ + +#ifndef __CACHE_H +#define __CACHE_H + +/* + * Structure for the cache controller + */ +struct cache_info { + phys_addr_t base; /* Base physical address of cache device. */ +}; + +struct cache_ops { + /** + * get_info() - Get basic cache info + * + * @dev: Device to check (UCLASS_CACHE) + * @info: Place to put info + * @return 0 if OK, -ve on error + */ + int (*get_info)(struct udevice *dev, struct cache_info *info); + + /** + * enable() - Enable cache + * + * @dev: Device to check (UCLASS_CACHE) + * @return 0 if OK, -ve on error + */ + int (*enable)(struct udevice *dev); + + /** + * disable() - Flush and disable cache + * + * @dev: Device to check (UCLASS_CACHE) + * @return 0 if OK, -ve on error + */ + int (*disable)(struct udevice *dev); +}; + +#define cache_get_ops(dev) ((struct cache_ops *)(dev)->driver->ops) + +/** + * cache_get_info() - Get information about a cache controller + * + * @dev: Device to check (UCLASS_CACHE) + * @info: Returns cache info + * @return 0 if OK, -ve on error + */ +int cache_get_info(struct udevice *dev, struct cache_info *info); + +/** + * cache_enable() - Enable cache + * + * @dev: Device to check (UCLASS_CACHE) + * @return 0 if OK, -ve on error + */ +int cache_enable(struct udevice *dev); + +/** + * cache_disable() - Flush and disable cache + * + * @dev: Device to check (UCLASS_CACHE) + * @return 0 if OK, -ve on error + */ +int cache_disable(struct udevice *dev); +#endif -- cgit v1.2.3