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authorraywu <raywu@aaeon.com.tw>2018-10-22 11:01:40 +0800
committerraywu <raywu@aaeon.com.tw>2018-10-22 11:01:40 +0800
commit5cab331a33610a1c0b612fa87ac3d6fe70bfab23 (patch)
tree3ea7dad633e006b35ebbb233b11684437bae8f0a
parent70113d8d0ccbde0f76a6528355bead92a8f3bb96 (diff)
downloadzprj-5cab331a33610a1c0b612fa87ac3d6fe70bfab23.tar.xz
DW03AR : Module Updated - CSM - Fixed : System Hang Up when SAS OPROM Extracted not from the 1st PCIe Bridge
Diffstat
-rw-r--r--Addon/AmiLegacy16.binbin65536 -> 65536 bytes
-rw-r--r--Board/EM/Csm/CSM.chmbin447966 -> 450616 bytes
-rw-r--r--Board/EM/Csm/CSMKRNL.ASM127
-rw-r--r--Board/EM/Csm/csm.sd25
-rw-r--r--Board/EM/Csm/csm.sdl35
-rw-r--r--Board/EM/Csm/csm.unibin7022 -> 7836 bytes
-rw-r--r--Core/EM/CSM/CSM.c222
-rw-r--r--Core/EM/CSM/CSM.h37
-rw-r--r--Core/EM/CSM/CSM.mak8
-rw-r--r--Core/EM/CSM/CsmBsp.c48
-rw-r--r--Core/EM/CSM/CsmHwInfo.c129
-rw-r--r--Core/EM/CSM/CsmLib.c56
-rw-r--r--Core/EM/CSM/CsmOpROM.c424
-rw-r--r--Core/EM/CSM/PciInterrupts.c3
-rw-r--r--Core/EM/CSM/thunk/BlockIo/CsmBlkIoComponentName.c11
-rw-r--r--Core/EM/CSM/thunk/BlockIo/CsmBlockIo.c105
-rw-r--r--Core/EM/CSM/thunk/BlockIo/CsmEdd.h13
-rw-r--r--Core/EM/CSM/thunk/BlockIo/CsmInt13.c18
-rw-r--r--Core/EM/CSM/thunk/CsmVideo/UefiBiosVideo.c6
-rw-r--r--Core/EM/CSM/thunk/x86/thunk.c59
-rw-r--r--SharkBayDT.veb27
21 files changed, 961 insertions, 392 deletions
diff --git a/Addon/AmiLegacy16.bin b/Addon/AmiLegacy16.bin
index e7ab684..de2579f 100644
--- a/Addon/AmiLegacy16.bin
+++ b/Addon/AmiLegacy16.bin
Binary files differ
diff --git a/Board/EM/Csm/CSM.chm b/Board/EM/Csm/CSM.chm
index bd06c00..1e33b10 100644
--- a/Board/EM/Csm/CSM.chm
+++ b/Board/EM/Csm/CSM.chm
Binary files differ
diff --git a/Board/EM/Csm/CSMKRNL.ASM b/Board/EM/Csm/CSMKRNL.ASM
new file mode 100644
index 0000000..a22341b
--- /dev/null
+++ b/Board/EM/Csm/CSMKRNL.ASM
@@ -0,0 +1,127 @@
+
+ TITLE CSMKRNL.ASM -- KERNEL TABLES / PROCEDURES
+
+;-------- DO NOT EDIT THIS FILE --------
+;
+; FILE WAS GENERATED AUTOMATICALY USING AMISDL v3.64.1065 Test Only (Mar 15 2013,03:42:45)
+;
+;-------- DO NOT EDIT THIS FILE --------
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2013, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
+;****************************************************************************
+;---------------------------------------------------------------------------
+; INCLUDE FILES
+;---------------------------------------------------------------------------
+
+ INCLUDE mbiosequ.equ
+ INCLUDE mbiosmac.mac
+ INCLUDE equates.equ
+
+;---------------------------------------------------------------------------
+; EXTERNS USED
+;---------------------------------------------------------------------------
+
+
+;---------------------------------------------------------------------------
+; SEGMENTS USED
+;---------------------------------------------------------------------------
+
+STARTUP_SEG SEGMENT PARA PUBLIC 'CODE' USE32
+STARTUP_SEG ENDS
+
+CSMOEM_CSEG SEGMENT PARA PUBLIC 'CODE' USE16
+CSMOEM_CSEG ENDS
+
+
+;---------------------------------------------------------------------------
+; CSMOEM_CSEG S E G M E N T STARTS
+;---------------------------------------------------------------------------
+CSMOEM_CSEG SEGMENT PARA PUBLIC 'CODE' USE16
+
+;<AMI_THDR_START>
+;---------------------------------------------------------------------------
+;
+; Name: CsmOemInterrupts
+;
+; Type: eLink Table
+;
+; Description:
+;
+; Referrals:
+;
+; Notes: eLink comments display the name of immediate Parent.
+;
+;---------------------------------------------------------------------------
+;<AMI_THDR_END>
+
+PUBLIC CsmOemInterrupts
+PUBLIC CsmOemInterruptsEnd
+
+CsmOemInterrupts LABEL WORD
+ mBODY_ID_AND_TBL_CSM_ENTRY_NEAR 00015h, NBINT15
+mEND_TBL_CSM CsmOemInterrupts
+
+;<AMI_THDR_START>
+;---------------------------------------------------------------------------
+;
+; Name: CsmOem16Functions
+;
+; Type: eLink Table
+;
+; Description:
+;
+; Referrals:
+;
+; Notes: eLink comments display the name of immediate Parent.
+;
+;---------------------------------------------------------------------------
+;<AMI_THDR_END>
+
+PUBLIC CsmOem16Functions
+PUBLIC CsmOem16FunctionsEnd
+
+CsmOem16Functions LABEL WORD
+ mBODY_ID_AND_TBL_CSM_ENTRY_NEAR 00007h, AhciApiModuleStart
+ mBODY_ID_AND_TBL_CSM_ENTRY_NEAR 0000Bh, SerialCallBackApiModuleStart
+ mBODY_ID_AND_TBL_CSM_ENTRY_NEAR 00008h, LegcaySredirModuleStart
+ mBODY_ID_AND_TBL_CSM_ENTRY_NEAR 00006h, EnableLegcaySredirModuleStart
+mEND_TBL_CSM CsmOem16Functions
+
+;---------------------------------------------------------------------------
+; CSMOEM_CSEG S E G M E N T ENDS
+;---------------------------------------------------------------------------
+CSMOEM_CSEG ENDS
+
+END
+
+
+;-------- DO NOT EDIT THIS FILE --------
+;
+; FILE WAS GENERATED AUTOMATICALY USING AMISDL v3.64.1065 Test Only (Mar 15 2013,03:42:45)
+;
+;-------- DO NOT EDIT THIS FILE --------
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2013, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
+;****************************************************************************
diff --git a/Board/EM/Csm/csm.sd b/Board/EM/Csm/csm.sd
index 9106247..42c5fc9 100644
--- a/Board/EM/Csm/csm.sd
+++ b/Board/EM/Csm/csm.sd
@@ -13,16 +13,20 @@
//**********************************************************************
//**********************************************************************
-// $Header: /Alaska/SOURCE/Modules/CSM/Generic/csm.sd 23 8/06/14 4:23p Fasihm $
+// $Header: /Alaska/SOURCE/Modules/CSM/Generic/csm.sd 24 9/09/15 9:46a Olegi $
//
-// $Revision: 23 $
+// $Revision: 24 $
//
-// $Date: 8/06/14 4:23p $
+// $Date: 9/09/15 9:46a $
//**********************************************************************
// Revision History
// ----------------
// $Log: /Alaska/SOURCE/Modules/CSM/Generic/csm.sd $
//
+// 24 9/09/15 9:46a Olegi
+// [TAG] EIP237381
+// [Description] Aptio 4 CSM: add INT19 TRAP setup question
+//
// 23 8/06/14 4:23p Fasihm
// [TAG] EIP180681
// [Category] Improvement
@@ -123,9 +127,10 @@
//**********************************************************************
#ifdef SETUP_DATA_DEFINITION
- UINT8 ExpansionCardText;
+ UINT8 ExpansionCardText;
+ UINT8 I19Trap;
UINT8 ZipEmulation;
- UINT8 KeepGA20Active;
+ UINT8 KeepGA20Active;
// UINT8 CsmSupport;
#endif
@@ -150,6 +155,13 @@
option text = STRING_TOKEN(STR_CSM_OPROM_DISPLAY_KEEP_CURRENT), value = 0, flags = 0, key = 0;\
endoneof;
+#define CSM_CHECKBOX_I19TRAP\
+ oneof varid = SETUP_DATA.I19Trap,\
+ prompt = STRING_TOKEN(STR_CSM_I19_TRAP),\
+ help = STRING_TOKEN(STR_CSM_I19_TRAP_HELP),\
+ option text = STRING_TOKEN(STR_CSM_I19_TRAP_IMMEDIATE), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_CSM_I19_TRAP_POSTPONED), value = 0, flags = 0;\
+ endoneof;
#if CSM_SET_ZIP_EMULATION_TYPE
@@ -180,6 +192,7 @@
CSM_ONEOF_KEEPGA20ACTIVE
CSM_ONEOF_EXPANSIONCARDTEXT
+ CSM_CHECKBOX_I19TRAP
CSM_ONEOF_ZIPEMULATION
#endif //#ifdef CONTROLS_WITH_DEFAULTS
@@ -239,7 +252,7 @@
CSM_ONEOF_KEEPGA20ACTIVE
CSM_ONEOF_EXPANSIONCARDTEXT
-
+ CSM_CHECKBOX_I19TRAP
#if CSM_SET_ZIP_EMULATION_TYPE
CSM_ONEOF_ZIPEMULATION
#endif
diff --git a/Board/EM/Csm/csm.sdl b/Board/EM/Csm/csm.sdl
index 5aaf973..3526135 100644
--- a/Board/EM/Csm/csm.sdl
+++ b/Board/EM/Csm/csm.sdl
@@ -20,7 +20,7 @@ End
TOKEN
Name = "CSM16_VERSION_MINOR"
- Value = "76"
+ Value = "78"
Help = "CSM16 minor version"
TokenType = Integer
TargetMAK = Yes
@@ -29,7 +29,7 @@ End
TOKEN
Name = "CSM_VERSION_BUILD"
- Value = "81"
+ Value = "82"
Help = "CSM module build version"
TokenType = Integer
TargetMAK = Yes
@@ -86,15 +86,6 @@ TOKEN
End
TOKEN
- Name = "LEGACY_TO_EFI_BOOTRECORD_RETURN"
- Value = "0"
- Help = "This token controls the LegacyToEfi feature after legacy boot gives control to the boot record\Disabled: next boot option can be Legacy only.\Enabled: next boot option can be either Legacy or UEFI."
- TokenType = Boolean
- TargetH = Yes
- Token = "LEGACY_TO_EFI_DEFAULT" "=" "1"
-End
-
-TOKEN
Name = "LEGACY_TO_EFI_BOOT_BUFFER_SIZE"
Value = "0x300000"
Help = "Size of buffer used to save memory context before legacy boot."
@@ -198,6 +189,14 @@ TOKEN
End
TOKEN
+ Name = "CSM_ALLOW_LARGE_OPROMS"
+ Value = "0"
+ Help = "Enabling this switch allows CSM to load and execute legacy Option ROMs larger than 128K. If enabled, the >128KB size will be taken from PCIR structure, not from ROM header."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
Name = "PXE_BASECODE_ROM_FILE"
Value = "AddOn\Pxebase.lom"
Help = "PXE base code ROM file."
@@ -364,3 +363,17 @@ ELINK
Name = "CSM_INIT_LEGACY_MEMORY_FUNCTIONS"
InvokeOrder = ReplaceParent
End
+
+ELINK
+ Name = "CSM_16_CALL_COMPANION_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
+
+TOKEN
+ Name = "ACPI_TIMER_IN_LEGACY_SUPPORT"
+ Value = "0"
+ Help = "Enable this token if ACPI timer needs to be used in AmiLegacy16 instead of 8254 timer for delay.\ If disabled 8254 timer will be used for creating delay."
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "ACPI_SUPPORT" "=" "1"
+End \ No newline at end of file
diff --git a/Board/EM/Csm/csm.uni b/Board/EM/Csm/csm.uni
index fea891f..7539215 100644
--- a/Board/EM/Csm/csm.uni
+++ b/Board/EM/Csm/csm.uni
Binary files differ
diff --git a/Core/EM/CSM/CSM.c b/Core/EM/CSM/CSM.c
index c3b5314..bd70951 100644
--- a/Core/EM/CSM/CSM.c
+++ b/Core/EM/CSM/CSM.c
@@ -13,17 +13,76 @@
//**********************************************************************
//****************************************************************************
-// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Core/csm.c 198 8/06/14 12:57p Fasihm $
+// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Core/csm.c 211 9/14/15 1:53p Olegi $
//
-// $Revision: 198 $
+// $Revision: 211 $
//
-// $Date: 8/06/14 12:57p $
+// $Date: 9/14/15 1:53p $
//
//****************************************************************************
// Revision History
// ----------------
// $Log: /Alaska/SOURCE/Modules/CSM/Generic/Core/csm.c $
//
+// 211 9/14/15 1:53p Olegi
+// [TAG] EIP237981
+// [Description] Aptio4 CSM: BBS table adjustment needed when BootNext
+// variable is set
+//
+// 210 9/09/15 8:29a Olegi
+// [TAG] EIP237374
+// [Description] Aptio 4 CSM: ASSERT in TerminalSetup due to
+// DisconnectSerialIo in CSM
+//
+// 209 9/08/15 2:45p Olegi
+// [TAG] EIP237205
+// [Description] Aptio4 CSM: Add Lock/Unlock console calls during Option
+// ROMs execution
+//
+// 208 9/08/15 11:17a Olegi
+// [TAG] EIP237186
+// [Description] Aptio4 CSM: move BBS data to EBDA
+//
+// 207 8/26/15 9:49a Olegi
+// [TAG] EIP235407
+// [Description] Aptio4 CSM: add error handling for out-of-memory PMM
+// initialization
+//
+// 206 8/25/15 10:16a Olegi
+// [TAG] EIP235214
+// [Description] CSM Aptio4: properly restore BBS table after
+// unsuccessful boot
+//
+// 205 8/24/15 3:00p Olegi
+// [TAG] EIP235037
+// [Description] Aptio4 CSM: Optimize video mode switching during Option
+// ROMs execution
+//
+// 204 8/20/15 9:37a Olegi
+// [TAG] EIP234641
+// [Description] Aptio4 CSM: PMM memory life cycle
+//
+// 203 8/20/15 8:47a Olegi
+// [TAG] EIP234636
+// [Description] Aptio4 CSM: allocate PMM block below 4GB
+//
+// 202 8/20/15 8:38a Olegi
+// [TAG] EIP234635
+// [Description] CSM Aptio4: do not deallocate PMM block
+//
+// 201 8/19/15 1:31p Olegi
+// [TAG] EIP234472
+// [Description] Remove duplicate GetVariable calls from CSM.C
+//
+// 200 8/19/15 11:19a Olegi
+// [TAG] EIP234465
+// [Description] Aptio4 CSM: remove LEGACY_TO_EFI_BOOTRECORD_RETURN
+//
+// 199 12/01/14 1:17p Olegi
+// [TAG] EIP194476
+// [Category] New Feature
+// [Description] Aptio 4 CSM: Add ACPI timer parameters passing to CSM
+//
// 198 8/06/14 12:57p Fasihm
// [TAG] EIP180667
// [Category] Bug Fix
@@ -736,6 +795,7 @@ IVT_SAVE_RESTORE gIrqSav[MAX_NUM_IRQS_SAVERESTORE];
//
// gSetTxtMode
+// ff - initial value
// 0 - switching to text mode is needed (init value)
// 1 - switching is needed, restoration is not (set in ShadowOptionRoms)
// 2 - neither switching nor restoration is needed
@@ -759,10 +819,9 @@ VOID DisconnectSerialIO();
VOID DummyFunction(EFI_EVENT Event, VOID *Context);
EFI_TPL gOldTplValue = NULL;
UINT16 gProtectedIrqMask = 0xffff;
-BBS_TABLE *gOriginalBbsTable = NULL;
+BBS_TABLE *gBbsTableBackup = NULL;
VOID DumpBbsTable(UINT32);
-#define BBS_LOWEST_ACTIVE_PRIORITY 0xfffb
/*---------------------------------------------------*/
/*--- ---*/
@@ -936,15 +995,12 @@ InitializeCsm16MiscInfo(
*(UINT32*)Csm16BufferPointer = (UINT32)Address;
*(UINT32*)(Csm16BufferPointer+4) = LEGACY_TO_EFI_BOOT_BUFFER_SIZE;
- Csm16Configuration(Csm16FeatureReset, Csm16LegacyToEfi, NULL);
- Csm16Configuration(Csm16FeatureReset, Csm16LegacyToEfiPonr, NULL);
-
#if LEGACY_TO_EFI_DEFAULT
Csm16Configuration(Csm16FeatureSet, Csm16LegacyToEfi, NULL);
-#if LEGACY_TO_EFI_BOOTRECORD_RETURN
- Csm16Configuration(Csm16FeatureSet, Csm16LegacyToEfiPonr, NULL);
-#endif
+#else
+ Csm16Configuration(Csm16FeatureReset, Csm16LegacyToEfi, NULL);
#endif
+
}
}
@@ -1062,15 +1118,7 @@ EFI_STATUS UpdatePciLastBus()
return Status;
}
-VOID ReadyToBootNotify(EFI_EVENT Event, VOID *Context)
-{
- EFI_TO_COMPATIBILITY16_INIT_TABLE *Csm16InitTable;
- Csm16InitTable = &CoreBiosInfo->Thunk->Csm16InitTable;
- pBS->FreePool((VOID*)(UINTN)Csm16InitTable->HiPmmMemory);
- pBS->CloseEvent(Event);
-}
-
//<AMI_PHDR_START>
//---------------------------------------------------------------------------
//
@@ -1224,7 +1272,8 @@ CsmEntryPoint(
// - 1 - use text mode during all Option ROMs execution time, no mode
// switching during this time frame.
- gSetTxtMode = CSM_DEFAULT_VMODE_SWITCHING;
+ gSetTxtMode = 0xff; // CSM_DEFAULT_VMODE_SWITCHING will be applied after 1st ROM is executed
+
if (Status == EFI_SUCCESS && gSetup.ExpansionCardText == 0) {
gSetTxtMode = 2;
}
@@ -1316,7 +1365,7 @@ CsmEntryPoint(
UpdatePciLastBus(); // Update Pci Last Bus number in Csm16 Header
- Status = CreateReadyToBootEvent(TPL_CALLBACK, ReadyToBootNotify, NULL, &Event);
+ Status = CreateReadyToBootEvent(TPL_CALLBACK, FreePmmBeforeBoot, NULL, &Event);
ASSERT_EFI_ERROR(Status);
return EFI_SUCCESS; // Force success: every unsuccessful status is branched
@@ -1345,8 +1394,18 @@ AllConnectedCallback (
VOID *Context
)
{
- if (gSetTxtMode == 1 && gVgaHandle != NULL) {
- pBS->ConnectController(gVgaHandle, NULL, NULL, TRUE);
+ TRACE((-1, "CSM.AllConnectedCallback: SetMode: %x VgaHandle %x\n", gSetTxtMode, gVgaHandle));
+
+ if (gSetTxtMode == 1)
+ {
+ if (gVgaHandle != NULL)
+ {
+ TRACE((-1, "Reconnecting video and serial after all OPROMs are done.\n"));
+ pBS->DisconnectController(gVgaHandle, NULL, NULL);
+ pBS->ConnectController(gVgaHandle, NULL, NULL, TRUE);
+ ConnectSerialIO();
+ }
+ UnlockConsole();
}
}
@@ -1532,7 +1591,7 @@ EFI_STATUS InitializeLegacyMemory(BIOS_INFO *CoreBiosInfo)
//
bda = (BDA_DATA*)((UINTN) 0x400);
- bda->system_memory = (TopOfBaseMemory>>10)-1; // 1K is for BIOS EBDA
+ bda->system_memory = (TopOfBaseMemory>>10)-5; // 5K is for BIOS EBDA
bda->kb_buf_head_ptr = bda->kb_buf_tail_ptr = 0x1E;
bda->motor_time_count = 0xFF;
bda->kb_buff_begin = 0x1E;
@@ -1542,10 +1601,10 @@ EFI_STATUS InitializeLegacyMemory(BIOS_INFO *CoreBiosInfo)
bda->winch_number = 0;
// bda->machine_config is updated later when SIO information becomes available
- bda->ext_bios_data_seg = (TopOfBaseMemory>>4)-0x40;
+ bda->ext_bios_data_seg = (TopOfBaseMemory>>4)-0x140;
- ebda = (UINT8*)((UINTN)(TopOfBaseMemory-0x400));
- *ebda = 1; // 1K
+ ebda = (UINT8*)((UINTN)(TopOfBaseMemory-0x1400));
+ *ebda = 5; // 5K
//
// Create BBS table and initialize it with BBS_IGNORE_ENTRY values
@@ -1605,7 +1664,7 @@ InitCompatibility16(
UINT8 i;
UINTN LowPmmMemorySizeInBytes;
UINTN HiPmmMemorySizeInBytes;
- VOID *HiPmmMemory;
+ UINTN HiPmmMemory;
UINTN PciExpressBase;
struct IRQ_REDIRECTION_CODE {
@@ -1713,17 +1772,21 @@ InitCompatibility16(
ASSERT_EFI_ERROR(Status);
Csm16InitTable->LowPmmMemorySizeInBytes = (UINT32)LowPmmMemorySizeInBytes;
- Csm16InitTable->HiPmmMemorySizeInBytes = (UINT32)HiPmmMemorySizeInBytes;
- //
- // Allocate Hi memory for PMM
- //
- Status = pBS->AllocatePool(
- EfiBootServicesData,
- Csm16InitTable->HiPmmMemorySizeInBytes,
- &HiPmmMemory);
- ASSERT_EFI_ERROR(Status);
- Csm16InitTable->HiPmmMemory = (UINT32)HiPmmMemory;
+ Status = AllocateHiMemPmmBlock((HiPmmMemorySizeInBytes >> 12) + 1, &HiPmmMemory);
+ if (EFI_ERROR(Status))
+ {
+ Csm16InitTable->HiPmmMemorySizeInBytes = 0;
+ Csm16InitTable->HiPmmMemory = 0;
+ TRACE((-1, "HI PMM memory block is NOT allocated.\n"));
+ ERROR_CODE(DXE_CSM_INIT,EFI_ERROR_MINOR);
+ }
+ else
+ {
+ Csm16InitTable->HiPmmMemorySizeInBytes = (UINT32)HiPmmMemorySizeInBytes;
+ Csm16InitTable->HiPmmMemory = (UINT32)HiPmmMemory;
+ TRACE((-1, "HI PMM memory allocated at 0x%x, size 0x%x\n", HiPmmMemory, HiPmmMemorySizeInBytes));
+ }
//
// Make a call to 16 bit code to initialize itself
@@ -1732,14 +1795,24 @@ InitCompatibility16(
RegSet.X.AX = Compatibility16InitializeYourself;
RegSet.X.ES = EFI_SEGMENT (Csm16InitTable);
RegSet.X.BX = EFI_OFFSET (Csm16InitTable);
-
+ #if ACPI_TIMER_IN_LEGACY_SUPPORT
+ // ACPI timer address is passed to AmiLegacy16 binary in the following structure
+ // Width (0/1) | Signature 'TM'| base address
+ // 31 30 15 0
+ RegSet.E.ECX = (FACP_FLAG_TMR_VAL_EXT << ACPI_TMR_WIDTH_SHIFT)
+ | ( ACPI_TMR_SIGNATURE << ACPI_TMR_SIGNATURE_SHIFT)
+ | PM_TMR_BLK_ADDRESS;
+ #else
+ RegSet.E.ECX = 0;
+ #endif
+
FarCall86 (&CoreBiosInfo->iBios,
CoreBiosInfo->Csm16EntrySeg,
CoreBiosInfo->Csm16EntryOfs,
&RegSet,
NULL,
0);
- if (RegSet.X.AX) Status = (RegSet.X.AX & 0x7FFF) | EFI_ERROR_BIT;
+ Status = (RegSet.X.AX)? ((RegSet.X.AX & 0x7FFF) | EFI_ERROR_BIT) : EFI_SUCCESS;
ASSERT_EFI_ERROR(Status);
if (EFI_ERROR(Status)) return Status;
@@ -2428,36 +2501,38 @@ LegacyBoot (
Status = ShadowAllLegacyOproms(This); // Launch remaining OpROMs
ASSERT_EFI_ERROR(Status);
- // For the 1st boot store BBS table, else update the entries
- if (gOriginalBbsTable == NULL){
+ // For the 1st boot allocate BBS table backup
+ if (gBbsTableBackup == NULL){
Status = pBS->AllocatePool(EfiBootServicesData, (sizeof(BBS_TABLE))*CoreBiosInfo->BbsEntriesNo,
- &gOriginalBbsTable);
+ &gBbsTableBackup);
ASSERT_EFI_ERROR(Status);
- pBS->CopyMem(gOriginalBbsTable, CoreBiosInfo->BbsTable, (sizeof(BBS_TABLE))*CoreBiosInfo->BbsEntriesNo);
- }
- else
- {
- // find the lowest priority and update failed-to-boot entries with even lower priority values
- UINT16 LowestPriority = 0;
-
- for (i = 0; i < CoreBiosInfo->BbsEntriesNo; i++)
+
+ // If BootNext is set, TSE sets the BBS priorities to BBS_UNPRIORITIZED_ENTRY.
+ // Give unprioritized devices a priority to allow it to show up in INT13h.
{
- if (CoreBiosInfo->BbsTable[i].BootPriority > LowestPriority
- && CoreBiosInfo->BbsTable[i].BootPriority <= BBS_LOWEST_ACTIVE_PRIORITY)
- {
- LowestPriority = CoreBiosInfo->BbsTable[i].BootPriority;
+ #define BBS_LOWEST_ACTIVE_PRIORITY 0xfffb
+ UINT16 LowestPriority = 0;
+
+ // Locate the lowest priority
+ for (i = 0; i < CoreBiosInfo->BbsEntriesNo; i++) {
+ if (CoreBiosInfo->BbsTable[i].BootPriority > LowestPriority
+ && CoreBiosInfo->BbsTable[i].BootPriority <= BBS_LOWEST_ACTIVE_PRIORITY) {
+ LowestPriority = CoreBiosInfo->BbsTable[i].BootPriority;
+ }
}
- }
- // the failed entries have the priority of BBS_UNPRIORITIZED_ENTRY (set by TSE)
- for (i = 0; i < CoreBiosInfo->BbsEntriesNo; i++)
- {
- if (CoreBiosInfo->BbsTable[i].BootPriority == BBS_UNPRIORITIZED_ENTRY
- && gOriginalBbsTable[i].BootPriority != BBS_UNPRIORITIZED_ENTRY)
- {
- CoreBiosInfo->BbsTable[i].BootPriority = ++LowestPriority; // bump the entry all the way back
- ASSERT(LowestPriority < BBS_LOWEST_ACTIVE_PRIORITY);
+
+ for (i = 0; i < CoreBiosInfo->BbsEntriesNo; i++) {
+ if (CoreBiosInfo->BbsTable[i].BootPriority == BBS_UNPRIORITIZED_ENTRY) {
+ TRACE((-1, "Assigning unprioritized device %d priority %x\n", i, (LowestPriority+1)));
+ CoreBiosInfo->BbsTable[i].BootPriority = ++LowestPriority;
+ }
}
}
+ pBS->CopyMem(gBbsTableBackup, CoreBiosInfo->BbsTable, (sizeof(BBS_TABLE))*CoreBiosInfo->BbsEntriesNo);
+ }
+ else
+ {
+ pBS->CopyMem(CoreBiosInfo->BbsTable, gBbsTableBackup, (sizeof(BBS_TABLE))*CoreBiosInfo->BbsEntriesNo);
}
DumpBbsTable(0);
@@ -2471,6 +2546,8 @@ LegacyBoot (
Status = pBS->LocateProtocol(&gEfiTimerArchProtocolGuid, NULL, &Timer);
ASSERT_EFI_ERROR(Status);
+ DisconnectSerialIO();
+
//
// Signal EFI_EVENT_SIGNAL_LEGACY_BOOT event
//
@@ -2505,21 +2582,10 @@ LegacyBoot (
//
// Set NumLock state according to Setup question
//
- Size = sizeof(SETUP_DATA);
- Status = pRS->GetVariable(L"Setup",&guidSetup, NULL, &Size, &gSetup);
- if (Status==EFI_SUCCESS) {
- i = (gSetup.Numlock)? 2 : 0;
- } else {
- i = 2; // NumLock is on
- }
- //
- // Note: GetVariable call could have been done once in the entry point,
- // but in this case we will have to require reset on Setup.Numlock
- // change.
- //
+ i = (gSetup.Numlock)? 2 : 0; // On:Off
+
UpdateKeyboardLedStatus(This, (UINT8)i);
//(EIP52733+)>
- DisconnectSerialIO();
CoreBiosInfo->i8259->GetMask(CoreBiosInfo->i8259, NULL, NULL, &gProtectedIrqMask, NULL); // Save current Mask
//<(EIP52733+)
@@ -2582,6 +2648,8 @@ LegacyBoot (
}
ConnectSerialIO();
+ pBS->CopyMem(CoreBiosInfo->BbsTable, gBbsTableBackup, (sizeof(BBS_TABLE))*CoreBiosInfo->BbsEntriesNo);
+
return EFI_SUCCESS;
//<(EIP52733+)
diff --git a/Core/EM/CSM/CSM.h b/Core/EM/CSM/CSM.h
index 1016a5b..365e320 100644
--- a/Core/EM/CSM/CSM.h
+++ b/Core/EM/CSM/CSM.h
@@ -13,11 +13,11 @@
//**********************************************************************
//**********************************************************************
-// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Core/csm.h 88 8/06/14 3:20p Fasihm $
+// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Core/csm.h 92 9/08/15 2:46p Olegi $
//
-// $Revision: 88 $
+// $Revision: 92 $
//
-// $Date: 8/06/14 3:20p $
+// $Date: 9/08/15 2:46p $
//**********************************************************************
//**********************************************************************
@@ -142,6 +142,13 @@ typedef struct {
#define CSM_RT_CMOS_LTE_BIT 0x80
//****************************************************
+// ACPI timer
+//****************************************************
+#define ACPI_TMR_SIGNATURE 0x544D // Signature used is 'TM'
+#define ACPI_TMR_WIDTH_SHIFT 31
+#define ACPI_TMR_SIGNATURE_SHIFT 16
+
+//****************************************************
// Type values
//****************************************************
#define STANDARD_IO 0x00
@@ -543,7 +550,7 @@ typedef struct {
IN UINT16 OpromSegment;
IN UINT8 PciBus;
IN UINT8 PciDeviceFunction;
- IN OUT UINT8 NumberBbbsEntries;
+ IN OUT UINT8 NumberBbsEntries;
UINT32 BbsTable;
IN UINT16 FinalLocationSegment;
} EFI_DISPATCH_OPROM_TABLE;
@@ -1009,6 +1016,20 @@ typedef struct _LEGACY16_TO_EFI_DATA_TABLE_EXT {
UINT8 RbArrayCount;
} LEGACY16_TO_EFI_DATA_TABLE_EXT;
+typedef struct {
+ struct {
+ UINT16 Offset;
+ UINT16 Segment;
+ } FarCall;
+ EFI_IA32_REGISTER_SET Regs;
+ struct {
+ UINT32 Stack;
+ UINT32 StackSize;
+ } StackData;
+ BOOLEAN isFarCall; //if false, then INT86.
+ UINT8 BiosInt;
+} AMI_CSM_THUNK_DATA;
+
EFI_STATUS Get16BitFuncAddress (UINT16, UINT32*);
UINTN CopyLegacyTable(VOID*, UINT16, UINT16, UINT16);
EFI_STATUS GetEmbeddedRom(UINT16, UINT16, UINT16, VOID**, UINTN*);
@@ -1061,11 +1082,15 @@ EFI_STATUS GetShadowRamAddress(UINT32*, UINT32, UINT32, UINT32);
VOID DisconnectSerialIO();
VOID ConnectSerialIO();
+EFI_STATUS LockConsole();
+EFI_STATUS UnlockConsole();
BOOLEAN IsAMICSM16(EFI_COMPATIBILITY16_TABLE*);
UINT8 ChecksumCSM16Header(EFI_COMPATIBILITY16_TABLE*);
-EFI_STATUS GetSystemMemoryMap(EFI_MEMORY_DESCRIPTOR**, UINTN*,UINTN*);
-EFI_STATUS ClearFreeMemory(EFI_PHYSICAL_ADDRESS,EFI_PHYSICAL_ADDRESS);
+EFI_STATUS GetSystemMemoryMap(EFI_MEMORY_DESCRIPTOR**, UINTN*,UINTN*);
+EFI_STATUS ClearFreeMemory(EFI_PHYSICAL_ADDRESS,EFI_PHYSICAL_ADDRESS);
EFI_STATUS Csm16Configuration(CSM16_CONFIGURATION_ACTION, CSM16_FEATURE, UINT32*);
+EFI_STATUS AllocateHiMemPmmBlock(UINTN, UINTN*);
+VOID FreePmmBeforeBoot (EFI_EVENT, VOID*);
#pragma pack ()
/****** DO NOT WRITE BELOW THIS LINE *******/
diff --git a/Core/EM/CSM/CSM.mak b/Core/EM/CSM/CSM.mak
index 9e651c2..e7cb6c3 100644
--- a/Core/EM/CSM/CSM.mak
+++ b/Core/EM/CSM/CSM.mak
@@ -13,11 +13,11 @@
#**********************************************************************
#**********************************************************************
-# $Header: /Alaska/SOURCE/Modules/CSM/Generic/Core/csm.mak 36 10/07/13 8:58a Olegi $
+# $Header: /Alaska/SOURCE/Modules/CSM/Generic/Core/csm.mak 37 9/08/15 2:25p Olegi $
#
-# $Revision: 36 $
+# $Revision: 37 $
#
-# $Date: 10/07/13 8:58a $
+# $Date: 9/08/15 2:25p $
#**********************************************************************
#**********************************************************************
@@ -74,6 +74,8 @@ CSMELINKFUNCTIONS :
)
#define CSM_INIT_LEGACY_MEMORY_FUNCTIONS $(CSM_INIT_LEGACY_MEMORY_FUNCTIONS:},=},\^
)
+#define CSM_16_CALL_COMPANION_FUNCTIONS $(CSM_16_CALL_COMPANION_FUNCTIONS:},=},\^
+)
<<
$(BUILD_DIR)\csmcore.mak : $(CSMCORE_DIR)\csmcore.cif $(CSMCORE_DIR)\csm.mak $(BUILD_RULES)
diff --git a/Core/EM/CSM/CsmBsp.c b/Core/EM/CSM/CsmBsp.c
index 9bc04c8..b3aeae6 100644
--- a/Core/EM/CSM/CsmBsp.c
+++ b/Core/EM/CSM/CsmBsp.c
@@ -13,11 +13,11 @@
//**********************************************************************
//****************************************************************************
-// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Core/CsmBsp.c 39 8/06/14 4:40p Fasihm $
+// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Core/CsmBsp.c 40 9/08/15 2:25p Olegi $
//
-// $Revision: 39 $
+// $Revision: 40 $
//
-// $Date: 8/06/14 4:40p $
+// $Date: 9/08/15 2:25p $
//
//****************************************************************************
@@ -94,6 +94,10 @@ typedef EFI_STATUS (CSM_ENABLE_OEM_PCI_SIBLINGS)(EFI_PCI_IO_PROTOCOL *PciIo);
extern CSM_ENABLE_OEM_PCI_SIBLINGS CSM_ENABLE_OEM_PCI_SIBLINGS_FUNCTIONS EndOfEnableOemPciSiblingsFunctions;
CSM_ENABLE_OEM_PCI_SIBLINGS *CsmEnableOemPciSiblingsFunctions[] = { CSM_ENABLE_OEM_PCI_SIBLINGS_FUNCTIONS NULL };
+typedef EFI_STATUS (AMI_CSM_16_CALL_COMPANION)(AMI_CSM_THUNK_DATA*, BOOLEAN);
+extern AMI_CSM_16_CALL_COMPANION CSM_16_CALL_COMPANION_FUNCTIONS EndOfCsm16CompanionFunctions;
+AMI_CSM_16_CALL_COMPANION *Csm16CallCompanionFunctions[] = { CSM_16_CALL_COMPANION_FUNCTIONS NULL };
+
typedef EFI_STATUS (CSM_GET_ROUTING_TABLE)(
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
OUT VOID **RoutingTable,
@@ -782,6 +786,44 @@ EnableOemPciSiblings(
return Status;
}
+/**
+ This function is called from FarCall86() and Int86() before and after executing
+ 16-bit code. OEM code can be hooked up in SDL to the parent eLink
+ "AMI_CSM_16_CALL_COMPANION_FUNCTIONS" and execute before and after 16-bit code.
+
+ @param IsFarCall BOOLEAN to indicate the 16-bit FAR CALL (TRUE) or INT (FALSE)
+ @param TargetLocation UINT32 address of FAR CALL or INT number
+ @param Priority BOOLEAN function is called before (TRUE) or after (FALSE) 16-bit code
+
+ @retval EFI_UNSUPPORTED Function is not implemented
+ @retval EFI_SUCCESS All OEM functions have been executed
+
+ @note
+ For the function calls the address is passed in segment:offset format; upper 16 bits
+ is the segment, lower 16 bits is the offset of the function entry point.
+ @note
+ After 16-bit code execution (Priority == FALSE) TargetLocation is not relevant; value is ignored.
+
+**/
+
+EFI_STATUS
+Csm16CallCompanion(
+ AMI_CSM_THUNK_DATA *ThunkData,
+ BOOLEAN Priority
+)
+{
+ EFI_STATUS Status = EFI_UNSUPPORTED;
+ UINTN i;
+ AMI_CSM_THUNK_DATA ThunkDataCopy = *ThunkData;
+
+ for(i = 0; Csm16CallCompanionFunctions[i] != NULL; i++)
+ {
+ Status = EFI_SUCCESS;
+ Csm16CallCompanionFunctions[i](&ThunkDataCopy, Priority);
+ }
+ return Status;
+}
+
//<AMI_PHDR_START>
//----------------------------------------------------------------------------
diff --git a/Core/EM/CSM/CsmHwInfo.c b/Core/EM/CSM/CsmHwInfo.c
index ab4bce8..1007abe 100644
--- a/Core/EM/CSM/CsmHwInfo.c
+++ b/Core/EM/CSM/CsmHwInfo.c
@@ -13,20 +13,39 @@
//**********************************************************************
//****************************************************************************
-// $Header: /Alaska/Projects/Intel/Haswell/LynxPoint_SharkBay-DT_Crb_1AQQW/Core/EM/CSM/CsmHwInfo.c 1 7/31/17 4:55a Chienhsieh $
+// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Core/CsmHwInfo.c 117 8/26/15 9:49a Olegi $
//
-// $Revision: 1 $
+// $Revision: 117 $
//
-// $Date: 7/31/17 4:55a $
+// $Date: 8/26/15 9:49a $
//
//**********************************************************************
// Revision History
// ----------------
-// $Log: /Alaska/Projects/Intel/Haswell/LynxPoint_SharkBay-DT_Crb_1AQQW/Core/EM/CSM/CsmHwInfo.c $
+// $Log: /Alaska/SOURCE/Modules/CSM/Generic/Core/CsmHwInfo.c $
//
-// 1 7/31/17 4:55a Chienhsieh
-// [TAG] EIP184371
-// [Description] Filter the DiskInfo protocols while creating HddInfo
+// 117 8/26/15 9:49a Olegi
+// [TAG] EIP235407
+// [Description] Aptio4 CSM: add error handling for out-of-memory PMM
+// initialization
+//
+// 116 8/06/15 2:13a Rameshr
+// [TAG] EIP230079
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Boot option will appear an unknown device "C0::PATA SM:"
+// after added the NVMe module and attached the NVMe device
+// [RootCause] CSM should handle the device that belongs to IDE
+// interface. But It handles the all the diskinfo protocol avilable
+// [Solution] Modified the code to handle only the Ide Interface
+// Diskinfo Protocol
+// [Files] Csmhwinfo.c
+//
+// 115 5/25/15 6:01a Rameshr
+// [TAG] EIP213255
+// [Category] Improvement
+// [Description] Dont add Legacy boot option for the Ata device doesnt
+// have 512 bytes per sector.
// [Files] CsmHwInfo.c
//
// 114 8/07/14 12:44p Fasihm
@@ -444,6 +463,7 @@ UINT8 gIdeController = 0;
UINT16 aInstalledPciIrq[MAX_IDE_PCI_CONTROLLER];
EFI_GUID gDiskInfoProtocol = EFI_DISK_INFO_PROTOCOL_GUID;
+EFI_GUID gEfiBlockIoProtocolGuid = EFI_BLOCK_IO_PROTOCOL_GUID;
EFI_GUID gSataControllerProtocol = SATA_CONTROLLER_PROTOCOL_GUID;
EFI_GUID gAcpiRsdtPtr = ACPI_20_TABLE_GUID;
EFI_GUID gAcpiRsdtPtr1_0 = ACPI_10_TABLE_GUID;
@@ -775,6 +795,7 @@ EFI_STATUS GetAtaAtapiInfo(
EFI_DISK_INFO_PROTOCOL *pDiskInfo;
EFI_DEVICE_PATH_PROTOCOL *pDevicePath;
EFI_PCI_IO_PROTOCOL *pPciIo;
+ EFI_BLOCK_IO_PROTOCOL *BlkIo;
EFI_HANDLE Handle;
UINTN Seg, Bus, Dev, Func;
HDD_INFO *HddInfo;
@@ -803,25 +824,32 @@ EFI_STATUS GetAtaAtapiInfo(
DiskInfoHandles);
if (EFI_ERROR(Status)) return EFI_NOT_FOUND;
-
for (i = 0; i < HandlesNo; i++) {
-// [ EIP184371 ]+>
+
// Check DiskInfo.Interface field
static EFI_GUID DiIntrfGuid = EFI_DISK_INFO_IDE_INTERFACE_GUID;
Status = pBS->HandleProtocol (
- (*DiskInfoHandles)[i],
- &gDiskInfoProtocol,
- &pDiskInfo); // Get DiskInfo protocol
+ (*DiskInfoHandles)[i],
+ &gDiskInfoProtocol,
+ &pDiskInfo); // Get DiskInfo protocol
+
ASSERT_EFI_ERROR (Status);
-
if (guidcmp(&pDiskInfo->Interface, &DiIntrfGuid)) continue;
-// [ EIP184371 ]+<
-
+
+ Status = pBS->HandleProtocol((*DiskInfoHandles)[i],
+ &gEfiBlockIoProtocolGuid,
+ &BlkIo);
+ ASSERT_EFI_ERROR(Status);
+ if (EFI_ERROR(Status)) {
+ continue;
+ }
+
Status = pBS->HandleProtocol ((*DiskInfoHandles)[i],
- &gEfiDevicePathProtocolGuid,
- (VOID*)&pDevicePath);
+ &gEfiDevicePathProtocolGuid,
+ (VOID*)&pDevicePath);
+
ASSERT_EFI_ERROR(Status);
//
@@ -846,13 +874,6 @@ EFI_STATUS GetAtaAtapiInfo(
&pPciIo); // Get PciIo protocol
ASSERT_EFI_ERROR (Status);
-// [ EIP184371 ]+>
-// Status = pBS->HandleProtocol (
-// (*DiskInfoHandles)[i],
-// &gDiskInfoProtocol,
-// &pDiskInfo); // Get DiskInfo protocol
-// ASSERT_EFI_ERROR (Status);
-// [ EIP184371 ]+<
pDiskInfo->WhichIde(pDiskInfo, &PriSec, &MasterSlave); // Device/Channel info
Status = pPciIo->GetLocation(pPciIo, &Seg, &Bus, &Dev, &Func); // Location on PCI bus
@@ -952,13 +973,24 @@ EFI_STATUS GetAtaAtapiInfo(
pAtapiIdentifyBuffer = HddInfo->IdentifyDrive;
if (MasterSlave != MASTER_DRIVE) pAtapiIdentifyBuffer++;
pDiskInfo->Identify(pDiskInfo, pAtapiIdentifyBuffer, &DataCount);
- pDriveHandle->IdentifyPtr = pAtapiIdentifyBuffer;
- pDriveHandle->DriveHandle = (*DiskInfoHandles)[i];
- pDriveHandle++;
+
//
// Check whether device is ATA or ATAPI - WORD 0 bits 14 and 15
//
IsAtapiDevice = (BOOLEAN)((*(UINT16*)pAtapiIdentifyBuffer & 0xC000) == 0x8000);
+
+ // If the device Block size is more than 512 bytes and ATA device
+ // Don't add the device as INT13 device ( Legacy supported device).
+ if( IsAtapiDevice == FALSE ) {
+ if(BlkIo->Media->BlockSize != 512) {
+ continue;
+ }
+ }
+
+
+ pDriveHandle->IdentifyPtr = pAtapiIdentifyBuffer;
+ pDriveHandle->DriveHandle = (*DiskInfoHandles)[i];
+ pDriveHandle++;
//
// Update HDD_INFO status
//
@@ -1949,6 +1981,7 @@ EFI_STATUS AllocateHiMemPmmBlock(
EFI_PHYSICAL_ADDRESS HiPmmMemory;
EFI_STATUS Status;
UINT64 NumberOfPages;
+ UINT64 BlockLength;
GetSystemMemoryMap(&MemMap, &MemDescSize, &MemEntriesCount);
@@ -1978,16 +2011,17 @@ EFI_STATUS AllocateHiMemPmmBlock(
// and use the end
Status = FindMemoryBlockForHiPmm(MemMap, MemEntriesCount, MemDescSize, BlockSize*4, &HiPmmMemory, &NumberOfPages);
if (!EFI_ERROR(Status)) {
- HiPmmMemory += Shl64(NumberOfPages, 11); // Middle of the block
+ BlockLength = Shl64(NumberOfPages, 11); // Middle of the block
} else {
Status = FindMemoryBlockForHiPmm(MemMap, MemEntriesCount, MemDescSize, BlockSize*2, &HiPmmMemory, &NumberOfPages);
- HiPmmMemory += Shl64(NumberOfPages, 12); // End of the block
+ BlockLength = Shl64(NumberOfPages, 12); // End of the block
}
- ASSERT_EFI_ERROR(Status);
-
pBS->FreePool(MemMap);
-
+
+ if (EFI_ERROR(Status)) return Status;
+
+ HiPmmMemory += BlockLength;
Status = pBS->AllocatePages(AllocateMaxAddress, EfiBootServicesData, BlockSize*2, &HiPmmMemory);
*BlockAddr = (UINTN)HiPmmMemory;
@@ -2028,24 +2062,25 @@ VOID FreePmmBeforeBoot (
UINTN Size = NumberOfPages << 12;
UINTN Address = CoreBiosInfo->Thunk->Csm16InitTable.HiPmmMemory;
- if (ClearMemoryEnabled ())
+ if (Address != 0)
{
- pBS->CopyMem((VOID*)(Address+Size), (VOID*)Address, Size);
- Status = pBS->FreePages(Address, NumberOfPages);
- ASSERT_EFI_ERROR(Status);
- pBS->CopyMem((VOID*)Address, (VOID*)(Address+Size), Size);
- Status = pBS->FreePages(Address+Size, NumberOfPages);
- ASSERT_EFI_ERROR(Status);
- }
- else
- {
- Status = pBS->FreePages(Address, NumberOfPages*2);
- ASSERT_EFI_ERROR(Status);
+ if (ClearMemoryEnabled ())
+ {
+ pBS->CopyMem((VOID*)(Address+Size), (VOID*)Address, Size);
+ Status = pBS->FreePages(Address, NumberOfPages);
+ ASSERT_EFI_ERROR(Status);
+ pBS->CopyMem((VOID*)Address, (VOID*)(Address+Size), Size);
+ Status = pBS->FreePages(Address+Size, NumberOfPages);
+ ASSERT_EFI_ERROR(Status);
+ }
+ else
+ {
+ Status = pBS->FreePages(Address, NumberOfPages*2);
+ ASSERT_EFI_ERROR(Status);
+ }
+ TRACE((-1, "Free HI PMM memory: %r\n", Status));
}
pBS->CloseEvent(Event);
-
- TRACE((-1, "Free HI PMM memory: %r\n", Status));
-
}
//**********************************************************************
diff --git a/Core/EM/CSM/CsmLib.c b/Core/EM/CSM/CsmLib.c
index d0605ae..5b20c79 100644
--- a/Core/EM/CSM/CsmLib.c
+++ b/Core/EM/CSM/CsmLib.c
@@ -13,17 +13,26 @@
//**********************************************************************
//****************************************************************************
-// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Core/CsmLib.c 69 1/10/14 12:21p Olegi $
+// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Core/CsmLib.c 71 9/09/15 9:53a Olegi $
//
-// $Revision: 69 $
+// $Revision: 71 $
//
-// $Date: 1/10/14 12:21p $
+// $Date: 9/09/15 9:53a $
//
//**********************************************************************
// Revision History
// ----------------
// $Log: /Alaska/SOURCE/Modules/CSM/Generic/Core/CsmLib.c $
//
+// 71 9/09/15 9:53a Olegi
+// [TAG] EIP237381
+// [Description] Aptio 4 CSM: add INT19 TRAP setup question
+//
+// 70 9/08/15 2:47p Olegi
+// [TAG] EIP237205
+// [Description] Aptio4 CSM: Add Lock/Unlock console calls during Option
+// ROMs execution
+//
// 69 1/10/14 12:21p Olegi
// EIP149769: LegacyToEfi boot management
// Changed default setting, added new token to extend the functionality
@@ -324,6 +333,7 @@
#include "pci.h"
#include <Protocol/SerialIo.h>
#include <Protocol/AmiBoardInfo.h>
+#include <Protocol/ConsoleControl.h>
extern BIOS_INFO *CoreBiosInfo;
extern UINTN gMaxOpRomAddress;
@@ -334,8 +344,12 @@ UINTN EmbeddedRomSize;
VOID UpdateEbdaMap(UINT32);
extern AMI_BOARD_INFO_PROTOCOL *gAmiBoardInfo;
+extern BOOLEAN gDoNotUpdateBbsTable;
extern BOOLEAN gBbsUpdateInProgress;
+EFI_CONSOLE_CONTROL_PROTOCOL *gConsoleControl = NULL;
+BOOLEAN gConsoleLocked = FALSE;
+
BOOLEAN
Check30ROM(
IN VOID *RomLocation,
@@ -1173,6 +1187,7 @@ AddBbsEntry (
IN BBS_TABLE *BbsEntry
)
{
+ if (gDoNotUpdateBbsTable) return EFI_ACCESS_DENIED;
if (gBbsUpdateInProgress) return EFI_NOT_READY;
gBbsUpdateInProgress = TRUE;
@@ -1216,6 +1231,7 @@ InsertBbsEntryAt (
{
UINT8 EntryNo;
+ if (gDoNotUpdateBbsTable) return EFI_ACCESS_DENIED;
if (gBbsUpdateInProgress) return EFI_NOT_READY;
if (EntryNumber == NULL) return EFI_INVALID_PARAMETER;
@@ -1282,6 +1298,7 @@ RemoveBbsEntryAt (
{
EFI_STATUS Status = EFI_SUCCESS;
+ if (gDoNotUpdateBbsTable) return EFI_ACCESS_DENIED;
if (gBbsUpdateInProgress) return EFI_NOT_READY;
gBbsUpdateInProgress = TRUE;
@@ -1367,6 +1384,39 @@ VOID ConnectSerialIO()
}
+EFI_STATUS LockConsole()
+{
+ EFI_STATUS Status;
+
+ if (gConsoleControl == NULL)
+ {
+ Status = pBS->LocateProtocol(&gEfiConsoleControlProtocolGuid, NULL, &gConsoleControl);
+ }
+ ASSERT_EFI_ERROR(Status);
+ if (EFI_ERROR(Status)) return Status;
+ if (gConsoleLocked) return EFI_NO_RESPONSE;
+
+ Status = gConsoleControl->LockStdIn(gConsoleControl, L"");
+ if (!EFI_ERROR(Status))
+ {
+ gConsoleLocked = TRUE;
+ }
+ return Status;
+}
+
+EFI_STATUS UnlockConsole()
+{
+ EFI_STATUS Status;
+
+ if (gConsoleControl == NULL) return EFI_NOT_FOUND;
+ if (gConsoleLocked == FALSE) return EFI_NO_RESPONSE;
+ Status = gConsoleControl->LockStdIn(gConsoleControl, L"");
+ if (!EFI_ERROR(Status))
+ {
+ gConsoleLocked = FALSE;
+ }
+ return Status;
+}
//<AMI_PHDR_START>
//---------------------------------------------------------------------------
diff --git a/Core/EM/CSM/CsmOpROM.c b/Core/EM/CSM/CsmOpROM.c
index 15cf5c5..b5366e7 100644
--- a/Core/EM/CSM/CsmOpROM.c
+++ b/Core/EM/CSM/CsmOpROM.c
@@ -13,17 +13,58 @@
//**********************************************************************
//****************************************************************************
-// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Core/CsmOpROM.c 171 8/06/14 4:24p Fasihm $
+// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Core/CsmOpROM.c 180 9/14/15 10:15a Olegi $
//
-// $Revision: 171 $
+// $Revision: 180 $
//
-// $Date: 8/06/14 4:24p $
+// $Date: 9/14/15 10:15a $
//
//**********************************************************************
// Revision History
// ----------------
// $Log: /Alaska/SOURCE/Modules/CSM/Generic/Core/CsmOpROM.c $
//
+// 180 9/14/15 10:15a Olegi
+// [TAG] EIP237972
+// [Category] Bug Fix
+// [Symptom] Aptio4 CSM: default int10 installation may fail
+//
+// 179 9/09/15 11:09a Olegi
+// [TAG] EIP237387
+// [Description] Aptio4 CSM: Add PciIo check to prevent CPU exceptions
+// when executing service ROMs
+//
+// 178 9/09/15 10:54a Olegi
+// [TAG] EIP237386
+// [Description] Aptio4 CSM: ASSERT in headless mode on OptionROM
+// execution
+//
+// 177 9/09/15 10:47a Olegi
+// [TAG] EIP237385
+// [Description] Aptio4 CSM: trapped INT19 may fail
+//
+// 176 9/09/15 9:53a Olegi
+// [TAG] EIP237381
+// [Description] Aptio 4 CSM: add INT19 TRAP setup question
+//
+// 175 9/08/15 2:47p Olegi
+// [TAG] EIP237205
+// [Description] Aptio4 CSM: Add Lock/Unlock console calls during Option
+// ROMs execution
+//
+// 174 8/24/15 3:00p Olegi
+// [TAG] EIP235037
+// [Description] Aptio4 CSM: Optimize video mode switching during Option
+// ROMs execution
+//
+// 173 12/01/14 11:40a Olegi
+// correction to the previous check-in
+//
+// 172 11/06/14 11:28a Olegi
+// [TAG] EIP187681
+// [Description] Aptio4 CSM: Larger than 128KB sized OPROM support /
+// checking
+//
// 171 8/06/14 4:24p Fasihm
// [TAG] EIP180681
// [Category] Improvement
@@ -700,9 +741,15 @@ extern SAVED_PCI_ROM *gSavedOprom;
EFI_HANDLE gVgaHandle = NULL;
BOOLEAN gBbsUpdateInProgress = FALSE;
+BOOLEAN gDoNotUpdateBbsTable = FALSE;
+
+EFI_STATUS PreProcessOpRom(CSM_PLATFORM_PROTOCOL*, EFI_PCI_IO_PROTOCOL*, VOID**);
+EFI_STATUS PostProcessOpRom(CSM_PLATFORM_PROTOCOL*, EFI_PCI_IO_PROTOCOL*, VOID**);
+EFI_STATUS GetOpromVideoSwitchingMode(EFI_PCI_IO_PROTOCOL*, UINT16,UINTN*);
//
// gSetTxtMode
+// ff - initial value
// 0 - switching to text mode is needed
// 1 - switching is needed, restoration is not
// 2 - neither switching nor restoration is needed
@@ -778,7 +825,7 @@ IsValidLegacyPciOpROM (
PCI_DATA_STRUCTURE *pcir;
BOOLEAN IsLastImage = FALSE;
UINT8 *RomStart = *Image;
- UINTN RomSize = 0;
+ UINT32 RomSize = 0;
BOOLEAN FoundLegacyRom = FALSE;
UINTN RomEnd = (UINTN)*Image + *Size;
@@ -818,13 +865,28 @@ IsValidLegacyPciOpROM (
//
return TRUE;
}
-
- RomSize = ((LEGACY_OPT_ROM_HEADER*)RomStart)->Size512 << 9;
+
+ // Validate the ROM size
+ RomSize = pcir->ImageLength << 9;
+ if (RomSize <= 0x1fe00)
+ {
+ UINT32 HeaderRomSize = ((LEGACY_OPT_ROM_HEADER*)RomStart)->Size512 << 9;
+ if (HeaderRomSize > RomSize) RomSize = HeaderRomSize;
+ }
+ else
+ {
+ TRACE((-1, "CSM: Found unusually large legacy Option ROM (%d Bytes) - loading ", RomSize));
+ if (CSM_ALLOW_LARGE_OPROMS == 0)
+ {
+ TRACE((-1, "skipped.\n"));
+ RomSize = 0;
+ } else TRACE((-1, "allowed.\n"));
+ }
if (RomSize == 0) return FALSE;
*Image = RomStart;
- *Size = RomSize;
+ *Size = (UINTN)RomSize;
if (pcir->Revision == 3) return TRUE;
@@ -1033,6 +1095,8 @@ FetchBbsBootDevices(
UINT32 *ivt = (UINT32*)0;
UINT8 i, Checksum;
+ if (gDoNotUpdateBbsTable) return;
+
gBbsUpdateInProgress = TRUE;
BbsCount = BiosInfo->BbsEntriesNo;
@@ -1068,6 +1132,8 @@ TRACE((-1, "FetchBbsBootDevices: B%x/D%x/F%x, ClassCode %x\n", Bus, Dev, Fun, *(
//
PnpOfs = *((UINT16*)(Rom + 0x1A));// Offset of the 1st PnP header
for (;;PnpOfs = (UINT16)PnpHdr->NextHeaderOffset) {
+ if (gDoNotUpdateBbsTable) break;
+
PnpHdr = (PCI_PNP_EXPANSION_HEADER*) (Rom + PnpOfs);
if (*((UINT32*)PnpHdr) != 0x506E5024) break; // "$PnP"
@@ -1123,6 +1189,16 @@ TRACE((-1, "FetchBbsBootDevices: B%x/D%x/F%x, ClassCode %x\n", Bus, Dev, Fun, *(
BbsTable[BbsCount].BootHandlerOffset = PnpHdr->BEV;
}
+ if (gSetup.I19Trap == 0 && NewInt19) {
+ TRACE((-1, "CSM: trapped int19 execution postponed.\n"));
+
+ // clear up the BBS table, leave only the one entry that traps INT19
+ // block any further BBS table updates
+ for (i = 0; i < BbsCount; i++) {
+ BbsTable[i].BootPriority = BBS_IGNORE_ENTRY;
+ }
+ gDoNotUpdateBbsTable = TRUE;
+ }
BbsCount++;
}
@@ -1736,105 +1812,65 @@ CsmInstallRom (
UINT8 *RtData = NULL;
UINT32 RtDataSize;
UINT32 RtRomSize;
- UINTN SetTxtMode;
EFI_STATUS Status;
UINT32 CurrentInt10 = 0;
- UINT8 CurrentMode = 0;
- BOOLEAN VgaWasConnected = FALSE;
-// static EFI_CONSOLE_CONTROL_PROTOCOL *ConsoleControl = NULL;
UINT32 EbdaOffset;
EFI_PCI_IO_PROTOCOL *PciIo = NULL;
- EFI_PCI_IO_PROTOCOL *VgaPciIo;
- static UINT8 LegacyVgaStartCounter = 0;
- UINT64 VgaCapabilities;
-
- if (Handle != NULL) {
- Status = pBS->HandleProtocol (
- Handle,
- &gEfiPciIoProtocolGuid,
- &PciIo);
- ASSERT_EFI_ERROR (Status);
- }
-
- // Call LegacyBiosPlatform to get the VGA switching policy override
-
- Status = CoreBiosInfo->iBiosPlatform->GetPlatformInfo(CoreBiosInfo->iBiosPlatform,
- EfiGetPlatformOpromVideoMode,
- &PciIo,
- &SetTxtMode,
- 0,
- 0,
- (UINT16)gSetTxtMode,
- 0);
- if (EFI_ERROR(Status)) {
- SetTxtMode = (UINTN)gSetTxtMode;
- }
+ UINT64 Capabilities;
+ UINTN SetTxtMode;
- if (IsVga) {
- LegacyVgaStartCounter++;
- } else {
- // If it is not for VGA, than video mode might be forced to 3 for compatibility.
- // Current video mode is saved before the call and restored afterwards.
- DisconnectSerialIO();
- if (SetTxtMode != 2 && SetTxtMode != 3) {
- CurrentMode = *(UINT8*)(UINTN)0x449;
- Status = pBS->DisconnectController(gVgaHandle, NULL, NULL);
- // Note: later VgaWasConnected is checked only for SetTxtMode == 0
+ if (!IsVga) {
+ LockConsole();
+ if ((gSetTxtMode == 0) || (gSetTxtMode == 0xff)) {
+ DisconnectSerialIO();
+
+ if (gSetTxtMode == 0xff) {
+ // Call LegacyBiosPlatform to get the VGA switching policy override
+ // by default gSetTxtMode will be set to CSM_DEFAULT_VMODE_SWITCHING
+ if (Handle != NULL) {
+ Status = pBS->HandleProtocol (
+ Handle,
+ &gEfiPciIoProtocolGuid,
+ &PciIo);
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ GetOpromVideoSwitchingMode(PciIo, CSM_DEFAULT_VMODE_SWITCHING, &SetTxtMode);
+ gSetTxtMode = (UINT8)SetTxtMode;
- VgaWasConnected = (BOOLEAN)(Status == EFI_SUCCESS);
+ if (gSetTxtMode == 1) {
+ // gSetTxtMode is 1: keep gVgaHandle connected, quietly change the video mode
+ RegSet.X.AX = 3;
+ Int86 (&CoreBiosInfo->iBios, 0x10, &RegSet);
+ }
+ }
- if (VgaWasConnected) {
- UINT64 Capabilities;
- //
- // VGA was successfully disconnected. Store the current attributes (to
- // be restored after executing OptionROM), and enable MEM/IO/VGA
- // decoding according to the supported attributes
- //
+ if (gSetTxtMode == 0) {
+ // gSetTxtMode is 0: disconnect controller and enable legacy VGA MEM/IO
+ Status = pBS->DisconnectController(gVgaHandle, NULL, NULL);
+ ASSERT_EFI_ERROR(Status);
+
Status = pBS->HandleProtocol (
gVgaHandle,
&gEfiPciIoProtocolGuid,
- &VgaPciIo);
+ &PciIo);
ASSERT_EFI_ERROR(Status);
- // Store the attributes set by DisconnectController
- Status = VgaPciIo->Attributes (VgaPciIo, EfiPciIoAttributeOperationGet, 0,
- &VgaCapabilities);
- ASSERT_EFI_ERROR(Status);
-
- Status = VgaPciIo->Attributes (VgaPciIo, EfiPciIoAttributeOperationSupported, 0,
+ Status = PciIo->Attributes (PciIo, EfiPciIoAttributeOperationSupported, 0,
&Capabilities);
ASSERT_EFI_ERROR(Status);
- // Enable VGA legacy MEM/IO access, do not check the status
- VgaPciIo->Attributes (VgaPciIo, EfiPciIoAttributeOperationEnable,
+ // Enable VGA legacy MEM/IO access
+ PciIo->Attributes (PciIo, EfiPciIoAttributeOperationEnable,
(Capabilities & EFI_PCI_DEVICE_ENABLE)
| EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO,
NULL);
}
-
-// if (ConsoleControl == NULL) {
-// Status = pBS->LocateProtocol(&gEfiConsoleControlProtocolGuid,NULL,&ConsoleControl);
-// if (!EFI_ERROR(Status)) {
-// Status = ConsoleControl->SetMode(ConsoleControl, EfiConsoleControlScreenText);
-// ASSERT_EFI_ERROR(Status);
-// }
-// }
}
-
-#if LEGACYSREDIR_SUPPORT
- // Enable Legacy Serial Redirection if enabled in the project
- pBS->LocateProtocol (
- &gEfiLegacySredirProtocolGuid,
- NULL,
- &gLegacySredir
- );
- if(gLegacySredir != NULL) {
- gLegacySredir->EnableLegacySredir(gLegacySredir);
- }
-#endif
-
- if (SetTxtMode == 2) {
+ // Set a dummy INT10 handler if gSetTxtMode is set to 2; note that gSetTxtMode
+ // might change after GetOpromVideoSwitchingMode
+ if (gSetTxtMode == 2) {
CurrentInt10 = *(UINT32*)(UINTN)0x40;
*(UINT32*)(UINTN)0x40 = 0xf000f065; // legacy int10
}
@@ -1847,15 +1883,12 @@ CsmInstallRom (
// Save the current EBDA location to check if OpROM modifies it
ebdaSeg1 = *(UINT16*)(UINTN)0x40e;
ebdaSizeKB = *(UINT8*)((UINTN)ebdaSeg1<<4);
- ebdaSize1 = (UINT32)ebdaSizeKB << 10;
+ ebdaSize1 = (UINTN)ebdaSizeKB << 10;
ASSERT(ebdaSizeKB); // should be initialized, can not be 0
baseMem1 = *(UINT16*)(UINTN)0x413;
// Execute OpROM
-// Status = DispatchOptionRom(CoreBiosInfo, Csm16DOT);
-// ASSERT_EFI_ERROR(Status);
-
pBS->SetMem(&RegSet, sizeof (EFI_IA32_REGISTER_SET), 0);
RegSet.X.AX = Compatibility16DispatchOprom;
RegSet.X.ES = EFI_SEGMENT (Csm16DOT);
@@ -1877,7 +1910,7 @@ CsmInstallRom (
TRACE((-1, "InstallRom...Run-time ROM Size = %x Bytes\n", RtRomSize));
// Update EBDA map
- ebdaSeg2 = *(UINT16*)(UINTN)0x40e;
+ ebdaSeg2 = *(UINT16*)(UINTN)0x40e;
ebdaSize2 = *(UINT8*)((UINTN)ebdaSeg2<<4) << 10;
RtDataSize = 0;
@@ -1895,59 +1928,32 @@ TRACE((-1, "InstallRom...Run-time ROM Size = %x Bytes\n", RtRomSize));
if (IsVga) return EFI_SUCCESS; // Done for VBIOS
- // Restore video mode
- if (SetTxtMode == 2) {
- *(UINT32*)(UINTN)0x40 = CurrentInt10;
- }
-
- // Disable Legacy console redirection
-#if LEGACYSREDIR_SUPPORT
- if(gLegacySredir == NULL) {
- pBS->LocateProtocol (
- &gEfiLegacySredirProtocolGuid,
- NULL,
- &gLegacySredir
- );
+ if (gSetTxtMode != 1) {
+ UnlockConsole();
}
- if(gLegacySredir != NULL) {
- gLegacySredir->DisableLegacySredir(gLegacySredir);
- }
-#endif
+ // Restore video mode if needed
+ // gSetTxtMode:
+ // 0: reconnect VGA controller
+ // 1: do nothing
+ // 2: restore fake INT10 vector
+ // Note that at first pass gSetTxtMode is either 0 or 2; in case of 0 it is
+ // reassigned using CSM_DEFAULT_VMODE_SWITCHING and OEM override.
- // VGA needs to be reconnected in several cases:
- // 1) SetTxtMode == 0
- // 2) SetTxtMode == 1 and VGA was started outside CSM control; this is determined
- // by the value of LegacyVgaStartCounter (greater than 1)
- if (SetTxtMode == 0 || (SetTxtMode == 1 && LegacyVgaStartCounter > 1))
- {
- if (VgaWasConnected) {
- // Restore VgaCapabilities on VgaPciIo
- VgaPciIo->Attributes (VgaPciIo, EfiPciIoAttributeOperationSet, VgaCapabilities, 0);
- } else {
- RegSet.H.AL = CurrentMode;
- RegSet.H.AH = 0;
- Status = CoreBiosInfo->iBios.Int86 (&CoreBiosInfo->iBios, 0x10, &RegSet);
- ASSERT_EFI_ERROR(Status);
- }
+ if (gSetTxtMode == 2) {
+ *(UINT32*)(UINTN)0x40 = CurrentInt10;
+ }
+ if (gSetTxtMode == 0) {
+ pBS->DisconnectController(gVgaHandle, NULL, NULL);
pBS->ConnectController(gVgaHandle, NULL, NULL, TRUE);
-
- // Reset counter so that following OpROMs will properly switch video when SetTxtMode is 1
- LegacyVgaStartCounter = 1;
-
-// if (ConsoleControl != NULL) {
-// Status = ConsoleControl->SetMode(ConsoleControl, EfiConsoleControlScreenGraphics);
-// ASSERT_EFI_ERROR(Status);
-// }
+ ConnectSerialIO();
}
- ConnectSerialIO();
-
// Update BBS device count
- if (CoreBiosInfo->BbsEntriesNo != Csm16DOT->NumberBbbsEntries) {
+ if (CoreBiosInfo->BbsEntriesNo != Csm16DOT->NumberBbsEntries) {
// CSM16 had inserted some BBS entries for non-BBS devices
- CoreBiosInfo->BbsEntriesNo = Csm16DOT->NumberBbbsEntries;
+ CoreBiosInfo->BbsEntriesNo = Csm16DOT->NumberBbsEntries;
}
// Process boot devices
@@ -2115,15 +2121,17 @@ InstallPciRom (
ASSERT_EFI_ERROR(Status);
}
+
//
// Execute platform pre-OpROM function
//
- pBS->LocateProtocol(&gCsmPlatformProtocolGuid, NULL, &CsmPlatformProtocol);
+ Status = pBS->LocateProtocol(&gCsmPlatformProtocolGuid, NULL, &CsmPlatformProtocol);
+
+ if (!EFI_ERROR(Status)) {
+ Status = PreProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
- if (CsmPlatformProtocol) {
- Status = CsmPlatformProtocol->PreProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
if (EFI_ERROR(Status)) {
- CsmPlatformProtocol->PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
+ PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
return Status;
}
}
@@ -2136,7 +2144,7 @@ InstallPciRom (
// does not fail.
//
if (CsmPlatformProtocol) {
- CsmPlatformProtocol->PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
+ PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
}
return EFI_SUCCESS;
}
@@ -2150,7 +2158,7 @@ InstallPciRom (
if (!EFI_ERROR(Status)) { // Platform returned VGA handle
if (PciHandle != *VgaHandlePtr) { // Not the one requested by platform
if (CsmPlatformProtocol) {
- CsmPlatformProtocol->PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
+ PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
}
return EFI_UNSUPPORTED;
}
@@ -2158,6 +2166,7 @@ InstallPciRom (
}
else { // Not VGA
if (CoreBiosInfo->hVga == NULL) {
+ // NOTE: WITH THE CURRENT BDS IMPLEMENTATION CONTROL SHOULD NEVER COME HERE
EFI_PCI_IO_PROTOCOL *VgaPciIo = NULL;
//
// The control is passed to this routine to install non-VGA OpROM and VGA BIOS is
@@ -2228,7 +2237,7 @@ InstallPciRom (
Status = CheckPciRom (This, PciHandle, &RomLocation, &RomSize, Flags);
if (EFI_ERROR(Status) || (RomLocation == NULL)) {
if (CsmPlatformProtocol) {
- CsmPlatformProtocol->PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
+ PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
}
return EFI_UNSUPPORTED;
}
@@ -2240,7 +2249,7 @@ InstallPciRom (
RomSize = ((LEGACY_OPT_ROM_HEADER*)RomLocation)->Size512 * 0x200;
if (RomSize == 0) {
if (CsmPlatformProtocol) {
- CsmPlatformProtocol->PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
+ PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
}
return EFI_UNSUPPORTED;
}
@@ -2263,7 +2272,7 @@ InstallPciRom (
ASSERT_EFI_ERROR(Status);
if (EFI_ERROR(Status)) {
if (CsmPlatformProtocol) {
- CsmPlatformProtocol->PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
+ PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
}
DEVICE_ERROR_CODE(DXE_LEGACY_OPROM_NO_SPACE, EFI_ERROR_MAJOR, PciHandle);
return EFI_OUT_OF_RESOURCES;
@@ -2271,7 +2280,7 @@ InstallPciRom (
if (Rom30Address < 0x8000) {
if (CsmPlatformProtocol) {
- CsmPlatformProtocol->PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
+ PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
}
Status = EFI_OUT_OF_RESOURCES;
TRACE(((UINTN)TRACE_ALWAYS,"Can not execute PCI 3.0 OPROM: out of Base Memory.\n"));
@@ -2291,7 +2300,7 @@ InstallPciRom (
if(((UINTN)(gNextRomAddress) + SizeInShadow) > OPROM_MAX_ADDRESS){
if (CsmPlatformProtocol) {
- CsmPlatformProtocol->PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
+ PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
}
TRACE(((UINTN)TRACE_ALWAYS,"Can not execute PCI OPROM: out of resources. RomAddr %x RomSize %x\n", gNextRomAddress, SizeInShadow));
Status = EFI_OUT_OF_RESOURCES;
@@ -2325,7 +2334,7 @@ InstallPciRom (
Csm16DOT->PciBus = (UINT8)PciBus;
Csm16DOT->PciDeviceFunction = (UINT8)(PciDeviceNumber << 3 | PciFunction);
- Csm16DOT->NumberBbbsEntries = CoreBiosInfo->BbsEntriesNo;
+ Csm16DOT->NumberBbsEntries = CoreBiosInfo->BbsEntriesNo;
Csm16DOT->BbsTable = (UINT32)(UINTN)(CoreBiosInfo->BbsTable);
TRACE((TRACE_ALWAYS, "OptionROM for B%x/D%x/F%x is executed from %x:0003\n",
@@ -2356,10 +2365,10 @@ InstallPciRom (
ivt[0x18] = Int18;
ivt[0x19] = Int19;
- DiskTo = DiskFrom + *(UINT8*)(UINTN)0x475;
+ DiskTo = (DiskFrom & 0xc0) + *(UINT8*)(UINTN)0x475;
if (CsmPlatformProtocol) {
- CsmPlatformProtocol->PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
+ PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
}
if (is30ROM) {
@@ -2412,8 +2421,32 @@ TRACE((TRACE_ALWAYS, "PCI OPROM(handle %x, %x/%x/%x): addr %x, size %x\n",
PciHandle, PciBus, PciDeviceNumber, PciFunction, gNextRomAddress, NewRomSize));
gNextRomAddress += NewRomSize;
- if (Int19Trapped && !IsVga)
+ if (Int19Trapped && !IsVga && (gSetup.I19Trap == 1))
{
+ if (gSetTxtMode == 1)
+ {
+ if (gVgaHandle != NULL)
+ {
+ TRACE((-1, "Reconnecting video and serial before calling INT19 trap.\n"));
+ pBS->DisconnectController(gVgaHandle, NULL, NULL);
+ pBS->ConnectController(gVgaHandle, NULL, NULL, TRUE);
+ ConnectSerialIO();
+ }
+ UnlockConsole();
+ }
+
+ // Signal READY_TO_BOOT event
+ {
+ EFI_EVENT ReadyToBootEvent;
+ Status = CreateReadyToBootEvent(
+ TPL_CALLBACK, NULL, NULL, &ReadyToBootEvent
+ );
+ if (!EFI_ERROR(Status)) {
+ pBS->SignalEvent(ReadyToBootEvent);
+ pBS->CloseEvent(ReadyToBootEvent);
+ }
+ }
+
LegacyBoot (
&CoreBiosInfo->iBios,
&(DummyLoadOption.BbsDevicePath),
@@ -2553,12 +2586,12 @@ InstallIsaRom(
//
// Execute platform pre-OpROM function
//
- pBS->LocateProtocol(&gCsmPlatformProtocolGuid, NULL, &CsmPlatformProtocol);
+ Status = pBS->LocateProtocol(&gCsmPlatformProtocolGuid, NULL, &CsmPlatformProtocol);
- if (CsmPlatformProtocol) {
- Status = CsmPlatformProtocol->PreProcessOpRom(CsmPlatformProtocol, NULL, (VOID*)&RomAddress);
+ if (!EFI_ERROR(Status)) {
+ Status = PreProcessOpRom(CsmPlatformProtocol, NULL, (VOID*)&RomAddress);
if (EFI_ERROR(Status)) {
- CsmPlatformProtocol->PostProcessOpRom(CsmPlatformProtocol, NULL, (VOID*)&RomAddress);
+ PostProcessOpRom(CsmPlatformProtocol, NULL, (VOID*)&RomAddress);
return Status;
}
}
@@ -2567,7 +2600,7 @@ InstallIsaRom(
Csm16DOT = &CoreBiosInfo->Thunk->DispatchOpromTable;
Csm16DOT->OpromSegment = (UINT16)(RomAddress >> 4);
- Csm16DOT->NumberBbbsEntries = CoreBiosInfo->BbsEntriesNo;
+ Csm16DOT->NumberBbsEntries = CoreBiosInfo->BbsEntriesNo;
Csm16DOT->BbsTable = (UINT32)(UINTN)(CoreBiosInfo->BbsTable);
TRACE((TRACE_ALWAYS, "OptionROM for ISA Device is executed from %x:0003\n", Csm16DOT->OpromSegment));
@@ -2596,7 +2629,7 @@ InstallIsaRom(
ivt[0x19] = Int19;
if (CsmPlatformProtocol) {
- CsmPlatformProtocol->PostProcessOpRom(CsmPlatformProtocol, NULL, (VOID*)&RomAddress);
+ PostProcessOpRom(CsmPlatformProtocol, NULL, (VOID*)&RomAddress);
}
return Status;
@@ -2631,7 +2664,6 @@ ShadowAllLegacyOproms (
UINT64 Capabilities;
UINTN Flags;
UINT8 dData[4];
- UINT8 SetTxtMode = gSetTxtMode;
//
// Locate all PciIo handles
@@ -2705,11 +2737,87 @@ ShadowAllLegacyOproms (
gServiceRomsExecuted = TRUE;
}
- gSetTxtMode = SetTxtMode;
-
return EFI_SUCCESS;
}
+EFI_STATUS
+PreProcessOpRom(
+ CSM_PLATFORM_PROTOCOL *CsmPlatformProtocol,
+ EFI_PCI_IO_PROTOCOL *PciIo,
+ VOID **RomImage
+)
+{
+ EFI_STATUS Status;
+
+ if (gVgaHandle == NULL)
+ {
+ BOOLEAN IsVga = FALSE;
+
+ if (PciIo != NULL)
+ {
+ UINT8 PciCfgData[4];
+ EFI_STATUS Status;
+
+ Status = PciIo->Pci.Read(
+ PciIo,
+ EfiPciIoWidthUint8,
+ 8, // offset
+ 4, // width
+ PciCfgData);
+ ASSERT_EFI_ERROR(Status);
+
+ if (PciCfgData[3]==PCI_CL_OLD && PciCfgData[2]==PCI_CL_OLD_SCL_VGA) {
+ IsVga = TRUE;
+ }
+ if (PciCfgData[3]==PCI_CL_DISPLAY && PciCfgData[2]==PCI_CL_DISPLAY_SCL_VGA) {
+ IsVga = TRUE;
+ }
+ }
+ if (!IsVga)
+ gSetTxtMode = 2;
+ }
+
+ Status = CsmPlatformProtocol->PreProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
+
+#if LEGACYSREDIR_SUPPORT
+ if(gLegacySredir == NULL) {
+ pBS->LocateProtocol (
+ &gEfiLegacySredirProtocolGuid,
+ NULL,
+ &gLegacySredir
+ );
+ }
+ if(gLegacySredir != NULL) {
+ gLegacySredir->EnableLegacySredir(gLegacySredir);
+ }
+#endif
+ return Status;
+}
+
+EFI_STATUS
+PostProcessOpRom(
+ CSM_PLATFORM_PROTOCOL *CsmPlatformProtocol,
+ EFI_PCI_IO_PROTOCOL *PciIo,
+ VOID **RomImage
+)
+{
+ EFI_STATUS Status;
+ Status = CsmPlatformProtocol->PostProcessOpRom(CsmPlatformProtocol, PciIo, RomImage);
+
+#if LEGACYSREDIR_SUPPORT
+ if(gLegacySredir == NULL) {
+ pBS->LocateProtocol (
+ &gEfiLegacySredirProtocolGuid,
+ NULL,
+ &gLegacySredir
+ );
+ }
+ if(gLegacySredir != NULL) {
+ gLegacySredir->DisableLegacySredir(gLegacySredir);
+ }
+#endif
+ return Status;
+}
//**********************************************************************
//**********************************************************************
diff --git a/Core/EM/CSM/PciInterrupts.c b/Core/EM/CSM/PciInterrupts.c
index 95a0709..057315d 100644
--- a/Core/EM/CSM/PciInterrupts.c
+++ b/Core/EM/CSM/PciInterrupts.c
@@ -237,8 +237,7 @@ extern UINTN RbCount;
UINT8 SBGen_GetPIRQIndex (UINT8);
-//UINT8 irq_priority_map[] = {11, 10, 9, 15, 5, 3, 7, 4, 14};
-UINT8 irq_priority_map[] = {15, 7, 14, 6, 11, 10, 9, 5, 3, 4};
+UINT8 irq_priority_map[] = {11, 10, 9, 15, 5, 3, 7, 4, 14};
UINT8 irq_allocated_count[sizeof(irq_priority_map)] = {0};
UINT16 IsaIrqMask;
diff --git a/Core/EM/CSM/thunk/BlockIo/CsmBlkIoComponentName.c b/Core/EM/CSM/thunk/BlockIo/CsmBlkIoComponentName.c
index 6807d3e..2f48bf2 100644
--- a/Core/EM/CSM/thunk/BlockIo/CsmBlkIoComponentName.c
+++ b/Core/EM/CSM/thunk/BlockIo/CsmBlkIoComponentName.c
@@ -13,16 +13,19 @@
//**********************************************************************
//**********************************************************************
-// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/INT13/CsmBlkIoComponentName.c 6 12/23/13 3:38p Olegi $
+// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/INT13/CsmBlkIoComponentName.c 7 9/09/15 11:42a Olegi $
//
-// $Revision: 6 $
+// $Revision: 7 $
//
-// $Date: 12/23/13 3:38p $
+// $Date: 9/09/15 11:42a $
//**********************************************************************
// Revision History
// ----------------
// $Log: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/INT13/CsmBlkIoComponentName.c $
//
+// 7 9/09/15 11:42a Olegi
+// cleanup
+//
// 6 12/23/13 3:38p Olegi
// EIP128504: implement EFI_COMPONENT2_NAME_PROTOCOL for CsmBlockIo driver
//
@@ -223,7 +226,7 @@ CsmBlockIoComponentNameGetControllerName (
Status = LegacyBiosExt->GetBbsTable(&BbsEntry, &BbsCount);
if (EFI_ERROR(Status)) return Status;
- ZeroMemory(gCsmBlockIoControllerName, sizeof(gCsmBlockIoControllerName));
+ pBS->SetMem(gCsmBlockIoControllerName, sizeof(gCsmBlockIoControllerName), 0);
for (i = 0; i < MAX_BBS_ENTRIES_NO; i++, BbsEntry++) {
Handle = *(VOID**)(&BbsEntry->IBV1);
diff --git a/Core/EM/CSM/thunk/BlockIo/CsmBlockIo.c b/Core/EM/CSM/thunk/BlockIo/CsmBlockIo.c
index 14438f5..91d5191 100644
--- a/Core/EM/CSM/thunk/BlockIo/CsmBlockIo.c
+++ b/Core/EM/CSM/thunk/BlockIo/CsmBlockIo.c
@@ -13,16 +13,23 @@
//**********************************************************************
//**********************************************************************
-// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/INT13/CsmBlockIo.c 49 8/06/14 1:20p Fasihm $
+// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/INT13/CsmBlockIo.c 51 9/09/15 11:46a Olegi $
//
-// $Revision: 49 $
+// $Revision: 51 $
//
-// $Date: 8/06/14 1:20p $
+// $Date: 9/09/15 11:46a $
//**********************************************************************
// Revision History
// ----------------
// $Log: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/INT13/CsmBlockIo.c $
//
+// 51 9/09/15 11:46a Olegi
+// [TAG] EIP237391
+// [Description] Aptio4 CSM: CsmBlockIo drive handle is lost
+//
+// 50 9/09/15 11:26a Olegi
+// cleanup
+//
// 49 8/06/14 1:20p Fasihm
// [TAG] EIP180668
// [Category] Bug Fix
@@ -251,16 +258,23 @@ CSM_LEGACY_DRIVE *mDriveParameterBuffer;
// has gOnboardRaidGuid installed on it
//
#define ONBOARD_RAID_GUID \
- { 0x5d206dd3, 0x516a, 0x47dc, 0xa1, 0xbc, 0x6d, 0xa2, 0x4, 0xaa, 0xbe, 0x8};
+ { 0x5d206dd3, 0x516a, 0x47dc, {0xa1, 0xbc, 0x6d, 0xa2, 0x4, 0xaa, 0xbe, 0x8}};
EFI_GUID gOnboardRaidGuid = ONBOARD_RAID_GUID;
// The following GUID is used to ensure the Start function is executed after all
// individual drives in RAID are unlocked before RAID Option ROM is executed
//
#define HDD_UNLOCKED_GUID \
- { 0x1fd29be6, 0x70d0, 0x42a4, 0xa6, 0xe7, 0xe5, 0xd1, 0xe, 0x6a, 0xc3, 0x76};
+ { 0x1fd29be6, 0x70d0, 0x42a4, {0xa6, 0xe7, 0xe5, 0xd1, 0xe, 0x6a, 0xc3, 0x76}};
EFI_GUID gHddUnlockedGuid = HDD_UNLOCKED_GUID;
+#define LTEB_GUID \
+ {0xC8BCA618, 0xBFC6, 0x46B7, 0x8D, 0x19, 0x83, 0x14, 0xE2, 0xE5, 0x6E, 0xC1}
+
+EFI_GUID gLTEBGuid = LTEB_GUID;
+
+VOID CsmBlockIoComebackFromLegacyBoot(EFI_EVENT, VOID*);
+
//<AMI_PHDR_START>
//**********************************************************************
@@ -720,7 +734,7 @@ CsmBlockIoStart (
}
// Zero the private device structure
- ZeroMemory (PrivateBlockIoStruc, sizeof (CSM_BLOCK_IO_DEV));
+ pBS->SetMem (PrivateBlockIoStruc, sizeof (CSM_BLOCK_IO_DEV), 0);
// Initialize the private device structure
PrivateBlockIoStruc->ControllerHandle = Controller;
@@ -754,11 +768,17 @@ CsmBlockIoStart (
pBS->FreePool (PrivateBlockIoStruc);
}
- // Set handle to which BlockIO has been installed
+ // Set handle and BCV information to which BlockIO has been installed
if (j < NewBbsEntries)
{
*(UINTN*)(&(BbsTable[FirstNewBbsEntry + j].IBV1)) = (UINTN)(PrivateBlockIoStruc->Handle);
+ PrivateBlockIoStruc->BcvSegment = BbsTable[FirstNewBbsEntry + j].BootHandlerSegment;
+ PrivateBlockIoStruc->BcvOffset = BbsTable[FirstNewBbsEntry + j].BootHandlerOffset;
}
+
+ // For Onboard Raid controller use device path protocol
+ // and other Raid controller uses the PciIO protocol.
+
if(OnboardRaidController) {
// Open For Child Device
Status = pBS->OpenProtocol( Controller,
@@ -778,6 +798,18 @@ CsmBlockIoStart (
PrivateBlockIoStruc->Handle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER );
}
+
+ // Register callback notification on Legacy2Efi. Use PrivateBlockInfoStruc as Context
+
+ Status = pBS->CreateEventEx(
+ EVT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ CsmBlockIoComebackFromLegacyBoot,
+ PrivateBlockIoStruc,
+ &gLTEBGuid,
+ &PrivateBlockIoStruc->Legacy2EfiEvent);
+ ASSERT_EFI_ERROR(Status);
+
} else {
pBS->FreePool (PrivateBlockIoStruc);
}
@@ -884,6 +916,8 @@ CsmBlockIoStop (
This->DriverBindingHandle,
ChildHandleBuffer[i] );
}
+
+ pBS->CloseEvent(PrivateBlockIoStruc->Legacy2EfiEvent);
// Release PCI I/O and Block IO Protocols on the clild handle.
Status = pBS->UninstallMultipleProtocolInterfaces( ChildHandleBuffer[i],
@@ -1048,19 +1082,60 @@ UINTN AlignAddress (UINTN Address)
}
}
-// Zero memory
-VOID ZeroMemory (
- VOID *Buffer,
- UINTN Size
+/**
+ Callback notification on legacy boot return. This function adjusts the INT13 handles
+ that might have been changed during legacy boot.
+
+ @note
+ Control flow:
+ - locate CSM_BLOCK_IO_DEV device
+ - look in IPLDT for this device using BCV Segment/Offset
+ - get the handle index from IPLDT ipld_table_entry.VectorIndex
+ - get the handle from dimVectorMap[32 max]
+ - updates BlockIoDev->Drive->Number with the new handle
+
+**/
+
+#define EFI_CSM_BLOCKIO_MAX_IPLDT_ENTRIES 32
+
+VOID
+CsmBlockIoComebackFromLegacyBoot(
+ EFI_EVENT Event,
+ VOID *Context
)
{
- UINT8 *Ptr;
- Ptr = Buffer;
- while (Size--) {
- *(Ptr++) = 0;
+ CSM_BLOCK_IO_DEV *Device = Context;
+ UINT16 EbdaSeg = *(UINT16*)0x40e;
+ UINT8 *Ebda = (UINT8*)((UINTN)EbdaSeg<<4);
+ UINT8 i;
+ UINT8 *Int13Handles = Ebda + 0x3e0;
+ UINT8 *Ipldt = Ebda + 0x440;
+ UINT8 VectorIndex;
+ UINT8 Handle;
+
+ TRACE((TRACE_ALWAYS, "CsmBlockIo L2E: BCV at %x:%x\n", Device->BcvSegment, Device->BcvOffset));
+ for (i = 0; i < EFI_CSM_BLOCKIO_MAX_IPLDT_ENTRIES; i++)
+ {
+ if (*((UINT16*)(Ipldt+0xe)) == Device->BcvOffset &&
+ (*((UINT16*)(Ipldt + 0x10)) == Device->BcvSegment)) break;
+ Ipldt += 0x40;
+ }
+ if (i == EFI_CSM_BLOCKIO_MAX_IPLDT_ENTRIES)
+ {
+ TRACE((TRACE_ALWAYS, "Entry is not found in IPLDT\n"));
+ return;
}
+
+ VectorIndex = Ipldt[2];
+ Handle = Int13Handles[VectorIndex];
+
+ TRACE((TRACE_ALWAYS, "IPLDT[%x], index %x, handle %x\n", i, VectorIndex, Handle));
+ ASSERT(Handle > 0x7f);
+
+ Device->Drive.Number = Handle;
}
+
//**********************************************************************
//**********************************************************************
//** **
diff --git a/Core/EM/CSM/thunk/BlockIo/CsmEdd.h b/Core/EM/CSM/thunk/BlockIo/CsmEdd.h
index 0c9ff4c..4743f81 100644
--- a/Core/EM/CSM/thunk/BlockIo/CsmEdd.h
+++ b/Core/EM/CSM/thunk/BlockIo/CsmEdd.h
@@ -13,16 +13,20 @@
//**********************************************************************
//**********************************************************************
-// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/INT13/CsmEdd.h 7 1/12/10 11:50a Olegi $
+// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/INT13/CsmEdd.h 8 9/09/15 11:46a Olegi $
//
-// $Revision: 7 $
+// $Revision: 8 $
//
-// $Date: 1/12/10 11:50a $
+// $Date: 9/09/15 11:46a $
//**********************************************************************
// Revision History
// ----------------
// $Log: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/INT13/CsmEdd.h $
//
+// 8 9/09/15 11:46a Olegi
+// [TAG] EIP237391
+// [Description] Aptio4 CSM: CsmBlockIo drive handle is lost
+//
// 7 1/12/10 11:50a Olegi
// Copyright message updated.
//
@@ -388,6 +392,9 @@ typedef struct {
CSM_LEGACY_DRIVE Drive;
UINT8 HwInt;
UINT32 HwIntHandler;
+ EFI_EVENT Legacy2EfiEvent;
+ UINT16 BcvSegment;
+ UINT16 BcvOffset;
} CSM_BLOCK_IO_DEV;
#endif
diff --git a/Core/EM/CSM/thunk/BlockIo/CsmInt13.c b/Core/EM/CSM/thunk/BlockIo/CsmInt13.c
index 8e3195e..962742e 100644
--- a/Core/EM/CSM/thunk/BlockIo/CsmInt13.c
+++ b/Core/EM/CSM/thunk/BlockIo/CsmInt13.c
@@ -13,16 +13,22 @@
//**********************************************************************
//**********************************************************************
-// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/INT13/CsmInt13.c 17 12/23/13 3:14p Olegi $
+// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/INT13/CsmInt13.c 18 6/18/15 10:15a Olegi $
//
-// $Revision: 17 $
+// $Revision: 18 $
//
-// $Date: 12/23/13 3:14p $
+// $Date: 6/18/15 10:15a $
//**********************************************************************
// Revision History
// ----------------
// $Log: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/INT13/CsmInt13.c $
//
+// 18 6/18/15 10:15a Olegi
+// [TAG] EIP221923
+// [Category] Bug Fix
+// [Symptom] CsmBlockIO issue for 4K Sector size - Do the changes of
+// EIP219657 to Aptio4 CSMBlockIo.
+//
// 17 12/23/13 3:14p Olegi
// EIP148138: use AMI_BLOCKIO_WRITE_PROTECTION_PROTOCOL instead of
// EFI_MBR_WRITE_PROTECTION_PROTOCOL
@@ -205,7 +211,11 @@ InitBlockIo (
}
// TRACE((-1," BlockSize = %d LastBlock = %d\n", BlockMedia->BlockSize, BlockMedia->LastBlock));
-
+ // If the BlockSize is more than 512 bytes per sector, don't install the BlockIO Protocol
+ // for the device: Int13 function supports only 512 bytes per sector.
+ if(BlockMedia->BlockSize != 512) {
+ return FALSE;
+ }
BlockMedia->LogicalPartition = FALSE;
BlockMedia->WriteCaching = FALSE;
diff --git a/Core/EM/CSM/thunk/CsmVideo/UefiBiosVideo.c b/Core/EM/CSM/thunk/CsmVideo/UefiBiosVideo.c
index ddbe46c..eafc43e 100644
--- a/Core/EM/CSM/thunk/CsmVideo/UefiBiosVideo.c
+++ b/Core/EM/CSM/thunk/CsmVideo/UefiBiosVideo.c
@@ -1788,7 +1788,7 @@ BiosVideoCheckForVbe (
//
Status = gBS->AllocatePool (
EfiBootServicesData,
- sizeof ((VESA_BIOS_EXTENSIONS_EDID_BLOCK_SIZE * 2)),
+ VESA_BIOS_EXTENSIONS_EDID_BLOCK_SIZE * 2,
&EdidOverrideDataBlock
);
@@ -2030,7 +2030,7 @@ BiosVideoCheckForVbe (
// When EDID exist and if the timing matches with VESA add it.
// And also add three possible resolutions, i.e. 1024x768, 800x600, 640x480
//
- TRACE((TRACE_BIOS_VIDEO, "neither EDID nor MODE match is found.\n", i));
+ TRACE((TRACE_BIOS_VIDEO, "neither EDID nor MODE match is found.\n"));
continue;
}
@@ -2738,7 +2738,7 @@ Routine Description:
//
// Frame BufferSize remain unchanged
//
- This->Mode->FrameBufferBase = (EFI_PHYSICAL_ADDRESS) ModeData->LinearFrameBuffer;
+ This->Mode->FrameBufferBase = (EFI_PHYSICAL_ADDRESS)(UINTN)ModeData->LinearFrameBuffer;
This->Mode->FrameBufferSize = ModeData->FrameBufferSize;
BiosVideoPrivate->HardwareNeedsStarting = FALSE;
diff --git a/Core/EM/CSM/thunk/x86/thunk.c b/Core/EM/CSM/thunk/x86/thunk.c
index 57233e4..44b7beb 100644
--- a/Core/EM/CSM/thunk/x86/thunk.c
+++ b/Core/EM/CSM/thunk/x86/thunk.c
@@ -13,16 +13,21 @@
//**********************************************************************
//**********************************************************************
-// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/x86/thunk.c 49 10/07/13 9:41a Olegi $
+// $Header: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/x86/thunk.c 50 9/09/15 11:13a Olegi $
//
-// $Revision: 49 $
+// $Revision: 50 $
//
-// $Date: 10/07/13 9:41a $
+// $Date: 9/09/15 11:13a $
//**********************************************************************
// Revision History
// ----------------
// $Log: /Alaska/SOURCE/Modules/CSM/Generic/Thunk/x86/thunk.c $
//
+// 50 9/09/15 11:13a Olegi
+// [TAG] EIP237204
+// [Description] Aptio4 CSM: implement OEM eLink function for
+// FarCall86() and Int86()
+//
// 49 10/07/13 9:41a Olegi
// Undone previous checkin related to EIP125856 as it is causing assert
// during boot.
@@ -227,24 +232,6 @@
#pragma pack(1)
-typedef struct {
- UINT16 Offset;
- UINT16 Segment;
-} FAR_CALL_PTR_16;
-
-typedef struct {
- UINT32 Stack;
- UINT32 StackSize;
-} STACK;
-
-typedef struct {
- FAR_CALL_PTR_16 FarCall;
- EFI_IA32_REGISTER_SET Regs;
- STACK Stack;
- BOOLEAN isFarCall; //if false, then INT86.
- UINT8 BiosInt;
-} THUNK_DATA;
-
typedef struct _ACPI_PNPID {
UINT32 Signature :16;
UINT32 PnpID :16;
@@ -274,6 +261,8 @@ EFI_STATUS GetPs2SimpleTextInProtocolInterface(
EFI_SIMPLE_TEXT_INPUT_PROTOCOL **PS2KBDInterface
);
+EFI_STATUS Csm16CallCompanion(AMI_CSM_THUNK_DATA*, BOOLEAN);
+
//<AMI_PHDR_START>
//---------------------------------------------------------------------------
//
@@ -384,7 +373,7 @@ BOOLEAN Int86(
{
EFI_TPL OldTpl;
- THUNK_DATA *ThunkData = (THUNK_DATA*)(gThunkAsmAddr+6);
+ AMI_CSM_THUNK_DATA *ThunkData = (AMI_CSM_THUNK_DATA*)(gThunkAsmAddr+6);
//
// To avoid reentrance in Int86
//
@@ -394,12 +383,14 @@ BOOLEAN Int86(
gInsideThunk = TRUE;
ThunkData->isFarCall = FALSE;
ThunkData->BiosInt = BiosInt;
- ThunkData->Stack.StackSize = 0; //This is required
+ ThunkData->StackData.StackSize = 0; //This is required
//Copy thunk registers.
ThunkData->Regs = *Regs;
-
+
+ Csm16CallCompanion(ThunkData, TRUE);
+
#if defined(AMIUSB_SUPPORT)
{
EFI_STATUS Status;
@@ -432,6 +423,8 @@ BOOLEAN Int86(
gLegacy8259->SetMode(gLegacy8259,Efi8259ProtectedMode,NULL,NULL);
pBS->RestoreTPL(OldTpl);
+ Csm16CallCompanion(ThunkData, FALSE);
+
//Restore thunk registers.
*Regs = ThunkData->Regs;
gInsideThunk = FALSE;
@@ -473,7 +466,7 @@ BOOLEAN FarCall86(
EFI_TPL OldTpl;
UINT16 IrqMask, SaveIrqMask;
UINT16 ProtectedIrqMask, ProtectedSaveIrqMask;
- THUNK_DATA *ThunkData = (THUNK_DATA*)(gThunkAsmAddr+6);
+ AMI_CSM_THUNK_DATA *ThunkData = (AMI_CSM_THUNK_DATA*)(gThunkAsmAddr+6);
UINT16 FuncNumber;
BOOLEAN IsCsm16Call =
Segment == CoreBiosInfo->Csm16EntrySeg &&
@@ -521,13 +514,15 @@ BOOLEAN FarCall86(
//Copy address for stack
if (Stack)
{
- ThunkData->Stack.Stack = (UINT32)Stack;
- ThunkData->Stack.StackSize = (UINT32)StackSize;
- } else ThunkData->Stack.StackSize = 0;
+ ThunkData->StackData.Stack = (UINT32)Stack;
+ ThunkData->StackData.StackSize = (UINT32)StackSize;
+ } else ThunkData->StackData.StackSize = 0;
//Copy thunk registers.
ThunkData->Regs = *Regs;
-
+
+ Csm16CallCompanion(ThunkData, TRUE);
+
// Reset the PS/2 keyboard before legacy boot
if (IsCsm16LegacyBoot == TRUE) {
if (gPS2KBDInterface) gPS2KBDInterface->Reset(gPS2KBDInterface, FALSE);
@@ -548,9 +543,6 @@ BOOLEAN FarCall86(
// Mask all HW interrupts for real mode for CSM16 function #0 (InitializeYourself).
// This is needed since IVT is not installed before executing function #0.
//
- // TODO: Explore the possibility of IVT installation from CSM32; in this case the
- // code that is updating and using ProtectedIrqMask can be removed.
- //
if (IsCsm16Call && FuncNumber == 00 ) {
gLegacy8259->GetMask(gLegacy8259, NULL, NULL, &ProtectedSaveIrqMask, NULL); // Save current Mask
ProtectedIrqMask = -1;
@@ -620,7 +612,8 @@ BOOLEAN FarCall86(
pKeyCodeProtocol->SetState((EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL*)pKeyCodeProtocol,&KeyToggleState);
}
}
-
+ Csm16CallCompanion(ThunkData, FALSE);
+
*(UINT8*)(UINTN)0x417 &= 0x70; // Clear key modifiers status in BDA
gInsideThunk = FALSE;
diff --git a/SharkBayDT.veb b/SharkBayDT.veb
index 6c2313d..a56672a 100644
--- a/SharkBayDT.veb
+++ b/SharkBayDT.veb
@@ -327,20 +327,19 @@
"core\em\KbcEmul\KbcUhci.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/KbcEmulation/ALASKA/KBCEMUL;4.6.3-KbcEmulation-020"
"core\em\KbcEmul\KbcEmulIrq.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/KbcEmulation/ALASKA/KBCEMUL;4.6.3-KbcEmulation-020"
"core\em\KbcEmul\KbcOhci.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/KbcEmulation/ALASKA/KBCEMUL;4.6.3-KbcEmulation-020"
-"Board\em\KbcSbBoard\KbcSbBoard.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/KbcEmulation/SouthBridge/Intel/LynxPoint;4.6.3-KbcEmulation-LynxPnt-001"
-"Board\eM\Csm\csm.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic;4.6.5.3_CSM.7.76_81"
-"Core\EM\CSM\csmcore.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\Core;4.6.5.3_CSM.7.76_81"
-"core\em\csm\thunk\thunk.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\Thunk;4.6.5.3_CSM.7.76_81"
-"core\em\csm\thunk\x86\x86thunk.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\Thunk/x86;4.6.5.3_CSM.7.76_81"
-"core\em\csm\thunk\BlockIo\int13thunk.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\Thunk/INT13;4.6.5.3_CSM.7.76_81"
-"core\em\csm\thunk\Snp16\snp16.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\Thunk/SNP16;4.6.5.3_CSM.7.76_81"
-"Core\EM\CSM\Thunk\CsmVideo\CsmVideo.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\Thunk/CsmVideo;4.6.5.3_CSM.7.76_81"
-"Board\eM\Csm\csmoem.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\OEM Hooks;4.6.5.3_CSM.7.76_81"
-"Addon\csm16.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\CSM16;4.6.5.3_CSM.7.76_81"
-"Chipset\SB\CSM\csmsb.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\Chipset/SouthBridge;4.6.5.3_CSM.7.76_81"
-"Chipset\SB\CSM\LegacyInterrupt\LegacyInterrupt.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\Chipset/SouthBridge;4.6.5.3_CSM.7.76_81"
-"include\CsmProtocols.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic;4.6.5.3_CSM.7.76_81"
-"board\em\csm\csmsetup.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic;4.6.5.3_CSM.7.76_81"
+"Board\eM\Csm\csm.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic;4.6.5.3_CSM.7.79_82"
+"Core\EM\CSM\csmcore.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\Core;4.6.5.3_CSM.7.79_82"
+"core\em\csm\thunk\thunk.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\Thunk;4.6.5.3_CSM.7.79_82"
+"core\em\csm\thunk\x86\x86thunk.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\Thunk/x86;4.6.5.3_CSM.7.79_82"
+"core\em\csm\thunk\BlockIo\int13thunk.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\Thunk/INT13;4.6.5.3_CSM.7.79_82"
+"core\em\csm\thunk\Snp16\snp16.cif"= "SS: ALASKA;$/Alaska/SOURCE/Modules/CSM/Generic\Thunk/SNP16;4.6.5.3_CSM.7.79_82"
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generated by cgit v1.2.3 (git 2.25.1) at 2024-05-01 05:01:43 +0000