diff options
| author | raywu <raywu@aaeon.com> | 2018-06-15 10:48:05 +0800 |
|---|---|---|
| committer | raywu <raywu@aaeon.com> | 2018-06-15 10:48:05 +0800 |
| commit | a2303a031a4a69b505a704b6e716a81c8e70cb21 (patch) | |
| tree | 0c972eb763d109968cba6e4e5c88d16bb4347640 | |
| parent | 72754fac5c1d3154722de813afe19015d21fa34a (diff) | |
| download | zprj-a2303a031a4a69b505a704b6e716a81c8e70cb21.tar.xz | |
Add Modules
1 > 4.6.3.5_SIO_F81866_A5
2 > 4.6.3_SIO_F81216_Sec_A9
52 files changed, 14439 insertions, 0 deletions
diff --git a/Board/IO/F81216/ACPI/DeviceASL.cif b/Board/IO/F81216/ACPI/DeviceASL.cif new file mode 100644 index 0000000..3d68f5f --- /dev/null +++ b/Board/IO/F81216/ACPI/DeviceASL.cif @@ -0,0 +1,11 @@ +<component> + name = "F81216 Device ASL Files" + category = ModulePart + LocalRoot = "Board\IO\F81216\ACPI\" + RefName = "F81216ASLFiles" +[files] +"Uart3.ASL" +"Uart4.ASL" +"Uart2.ASL" +"Uart1.ASL" +<endComponent> diff --git a/Board/IO/F81216/ACPI/Uart1.ASL b/Board/IO/F81216/ACPI/Uart1.ASL new file mode 100644 index 0000000..375847e --- /dev/null +++ b/Board/IO/F81216/ACPI/Uart1.ASL @@ -0,0 +1,123 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2009, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart1.ASL 3 7/18/12 9:29p Elviscai $ +// +// $Revision: 3 $ +// +// $Date: 7/18/12 9:29p $ +//**********************************************************************; +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart1.ASL $ +// +// 3 7/18/12 9:29p Elviscai +// [TAG] EIPNONE +// [Category] Bug Fix +// [Solution] Change _HID judgement if IR mode +// +// 2 7/04/11 3:23a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] Uart3.ASL +// Uart4.ASL +// Uart2.ASL +// Uart1.ASL +// DeviceASL.cif +// +// 1 10/28/10 2:32a Mikes +// Implement new name rule +// +// 1 3/31/10 5:56a Fantasylai +//**********************************************************************; +// UART1 // +// Category # :0x11 +Device(UR11) { +// Name(_HID, EISAID("PNP0501")) //PnP Device ID 16550 Type + Name(_UID, 0x11) //Generic ID for COMC + + Method(_HID, 0) {Return(^^SIO2.UHID(0x11))} //PnP Device ID + Method(_STA, 0) {Return(^^SIO2.DSTA(0x11))} //Get UART status + Method(_DIS, 0) {^^SIO2.DCNT(0x11, 0)} //Disable UART + //Default is share mode + Method(_CRS, 0) {Return(^^SIO2.DCR3(0x11, 0))} //Get UART current resources + Method(_SRS, 1) {^^SIO2.DSR3(Arg0, 0x11)} //Set UART recources +//----------------------------------------------------------------------- +// UART1 Possible Resources +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x260, 0x260, 1, 8) + IRQ(Level,ActiveLow,Shared) {11} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x260, 0x260, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x268, 0x268, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x270, 0x270, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x278, 0x278, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + EndDependentFn() + }) + + +/* +//---------Power Resources for UART1 ------------------------- + PowerResource(URP1, 0, 0) { //SystemLevel Parameter=0, + //which means UART can be turned off + //in any sleep state + Method(_STA, 0) { + Return(URAP) //Get Power Status + } //end of _STA + Method(_ON) { + Store(1, URAP) //Power on + } //end of _ON + Method(_OFF){ + Store(0, URAP) //Power off + } //end of _OFF + } + Name(_PR0, Package(){URP1}) //Reference to PowerResources +*/ +} // End Of UAR1 +//----------------------------------------------------------------------- + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2008, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//*************************************************************************
\ No newline at end of file diff --git a/Board/IO/F81216/ACPI/Uart2.ASL b/Board/IO/F81216/ACPI/Uart2.ASL new file mode 100644 index 0000000..64118d3 --- /dev/null +++ b/Board/IO/F81216/ACPI/Uart2.ASL @@ -0,0 +1,117 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2009, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart2.ASL 2 7/04/11 3:23a Kasalinyi $ +// +// $Revision: 2 $ +// +// $Date: 7/04/11 3:23a $ +//**********************************************************************; +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart2.ASL $ +// +// 2 7/04/11 3:23a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] Uart3.ASL +// Uart4.ASL +// Uart2.ASL +// Uart1.ASL +// DeviceASL.cif +// +// 1 10/28/10 2:32a Mikes +// Implement new name rule +// +// 1 3/31/10 5:56a Fantasylai +//**********************************************************************; +// UART2 // +// Category # :0x12 +Device(UR12) { + Name(_HID, EISAID("PNP0501")) //PnP Device ID 16550 Type + Name(_UID, 0x12) + //Generic ID for COMD +// Method(_HID, 0) {Return(^^SIO2.UHID(0x12))} //PnP Device ID + Method(_STA, 0) {Return(^^SIO2.DSTA(0x12))} //Get UART status + Method(_DIS, 0) {^^SIO2.DCNT(0x12, 0)} //Disable UART + //Default is share mode + Method(_CRS, 0) {Return(^^SIO2.DCR3(0x12, 0))} //Get UART current resources + Method(_SRS, 1) {^^SIO2.DSR3(Arg0, 0x12)} //Set UART recources + +//----------------------------------------------------------------------- +// UART2 Possible Resources +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x268, 0x268, 1, 8) + IRQ(Level,ActiveLow,Shared) {11} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x260, 0x260, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x268, 0x268, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x270, 0x270, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x278, 0x278, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + EndDependentFn() + }) +/* +//---------Power Resources for UART2 ------------------------- + PowerResource(URP2, 0, 0) { //SystemLevel Parameter=0, + //which means UART can be turned off + //in any sleep state + Method(_STA, 0) { + Return(URBP) //Get Power Status + } //end of _STA + Method(_ON) { + Store(1, URBP) //Power on + } //end of _ON + Method(_OFF){ + Store(0, URBP) //Power off + } //end of _OFF + } + Name(_PR0, Package(){URP2}) //Reference to PowerResources +*/ +} // End Of UAR2 +//----------------------------------------------------------------------- + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2008, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//*************************************************************************
\ No newline at end of file diff --git a/Board/IO/F81216/ACPI/Uart3.ASL b/Board/IO/F81216/ACPI/Uart3.ASL new file mode 100644 index 0000000..aca730c --- /dev/null +++ b/Board/IO/F81216/ACPI/Uart3.ASL @@ -0,0 +1,101 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart3.ASL 3 7/04/11 3:23a Kasalinyi $ +// +// $Revision: 3 $ +// +// $Date: 7/04/11 3:23a $ +//**********************************************************************; +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart3.ASL $ +// +// 3 7/04/11 3:23a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] Uart3.ASL +// Uart4.ASL +// Uart2.ASL +// Uart1.ASL +// DeviceASL.cif +// +// 2 10/28/10 2:33a Mikes +// Implement new name rule +// +// 1 3/31/10 5:56a Fantasylai +//**********************************************************************; +// UART3 // +// Category # :0x13 +Device(UR13) { + Name(_HID, EISAID("PNP0501")) //PnP Device ID 16550 Type + Name(_UID, 0x13) + +// Method(_HID, 0) {Return(^^SIO2.UHID(0x13))} //PnP Device ID + Method(_STA, 0) {Return(^^SIO2.DSTA(0x13))} //Get UART status + Method(_DIS, 0) {^^SIO2.DCNT(0x13, 0)} //Disable UART + //Default is share mode + Method(_CRS, 0) {Return(^^SIO2.DCR3(0x13, 0))} //Get UART current resources + Method(_SRS, 1) {^^SIO2.DSR3(Arg0, 0x13)} //Set UART recources + +//----------------------------------------------------------------------- +// UART3 Possible Resources +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x270, 0x270, 1, 8) + IRQ(Level,ActiveLow,Shared) {11} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x260, 0x260, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x268, 0x268, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x270, 0x270, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x278, 0x278, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + EndDependentFn() + }) + +} // End Of UAR3 +//----------------------------------------------------------------------- + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81216/ACPI/Uart4.ASL b/Board/IO/F81216/ACPI/Uart4.ASL new file mode 100644 index 0000000..3d3d34a --- /dev/null +++ b/Board/IO/F81216/ACPI/Uart4.ASL @@ -0,0 +1,101 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart4.ASL 3 7/04/11 3:23a Kasalinyi $ +// +// $Revision: 3 $ +// +// $Date: 7/04/11 3:23a $ +//**********************************************************************; +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart4.ASL $ +// +// 3 7/04/11 3:23a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] Uart3.ASL +// Uart4.ASL +// Uart2.ASL +// Uart1.ASL +// DeviceASL.cif +// +// 2 10/28/10 2:33a Mikes +// Implement new name rule +// +// 1 3/31/10 5:56a Fantasylai +//**********************************************************************; +// UART4 // +// Category # :0x14 +Device(UR14) { + Name(_HID, EISAID("PNP0501")) //PnP Device ID 16550 Type + Name(_UID, 0x14) //Generic ID for COMD + +// Method(_HID, 0) {Return(^^SIO2.UHID(0x14))} //PnP Device ID + Method(_STA, 0) {Return(^^SIO2.DSTA(0x14))} //Get UART status + Method(_DIS, 0) {^^SIO2.DCNT(0x14, 0)} //Disable UART + //Default is share mode + Method(_CRS, 0) {Return(^^SIO2.DCR3(0x14, 0))} //Get UART current resources + Method(_SRS, 1) {^^SIO2.DSR3(Arg0, 0x14)} //Set UART recources + +//----------------------------------------------------------------------- +// UART4 Possible Resources +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x278, 0x278, 1, 8) + IRQ(Level,ActiveLow,Shared) {11} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x260, 0x260, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x268, 0x268, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x270, 0x270, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x278, 0x278, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + EndDependentFn() + }) + +} // End Of UAR4 +//----------------------------------------------------------------------- + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81216/BSP/BSP.cif b/Board/IO/F81216/BSP/BSP.cif new file mode 100644 index 0000000..b21d947 --- /dev/null +++ b/Board/IO/F81216/BSP/BSP.cif @@ -0,0 +1,10 @@ +<component> + name = "F81216 Board" + category = ModulePart + LocalRoot = "Board\IO\F81216\BSP\" + RefName = "F81216Board" +[files] +"OemIoDecode.c" +"PeiIoTable.h" +"DxeIoTable.h" +<endComponent> diff --git a/Board/IO/F81216/BSP/DxeIoTable.h b/Board/IO/F81216/BSP/DxeIoTable.h new file mode 100644 index 0000000..abc4c8b --- /dev/null +++ b/Board/IO/F81216/BSP/DxeIoTable.h @@ -0,0 +1,122 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/DxeIoTable.h 2 7/04/11 3:23a Kasalinyi $ +// +// $Revision: 2 $ +// +// $Date: 7/04/11 3:23a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/DxeIoTable.h $ +// +// 2 7/04/11 3:23a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] OemIoDecode.c +// PeiIoTable.h +// DxeIoTable.h +// BSP.cif +// +// 1 3/31/10 5:56a Fantasylai +// Initial release to F81216 just as a second IO + +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: DxeIoTable.H +// +// Description: +// SIO init table in DXE phase. Any customers have to review below tables +// for themselves platform and make sure each initialization is necessary. +// +// Notes: +// In all tables, only fill with necessary setting. Don't fill with default +// +//<AMI_FHDR_END> +//************************************************************************* +#ifndef _DXEIoTable_H +#define _DXEIoTable_H +#ifdef __cplusplus +extern "C" { +#endif +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- +typedef struct _DXE_DEVICE_INIT_DATA{ + UINT16 Reg16; + UINT8 AndData8; // 0xFF means register don't need AndMask + // only write OrData8 to regisrer. + UINT8 OrData8; +} DXE_DEVICE_INIT_DATA; + +// SIO DECODE list creation code must be in this order +typedef EFI_STATUS (IO_RANGE_DECODE)( +// IN void *LpcPciIo, + IN EFI_PCI_IO_PROTOCOL *LpcPciIo, + IN UINT16 DevBase, + IN UINT8 UID, + IN SIO_DEV_TYPE Type +); + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: DXE_XXX_Init_Table +// +// Description: +// Table filled with SIO GPIO,PME,HWM, etc. logical devices' setting +// For example: +// 1. GPIO will define the GPIO pin useage +// 2. PME will power management control +// 3. HWM will set temperature, fan, voltage and start control. +// +// Notes: +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> + + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif //_DXEIoTable_H +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + + + + diff --git a/Board/IO/F81216/BSP/OemIoDecode.c b/Board/IO/F81216/BSP/OemIoDecode.c new file mode 100644 index 0000000..25e008e --- /dev/null +++ b/Board/IO/F81216/BSP/OemIoDecode.c @@ -0,0 +1,186 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2009, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/OemIoDecode.c 1 3/31/10 5:56a Fantasylai $ +// +// $Revision: 1 $ +// +// $Date: 3/31/10 5:56a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/OemIoDecode.c $ +// +// 1 3/31/10 5:56a Fantasylai +// Initial release to F81216 just as a second IO +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <OemIoDecode.C> +// +// Description: If can't decode IO usually. Change other IoDecode mode in file. +// +// Note: +// !!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!! +// This sample is not for any chipset, it bases on a chipset. For any indivadual +// projects, should re-program the IO decode policy. +// !!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!! +// +//<AMI_FHDR_END> +//************************************************************************* +#include <Efi.h> +#include <Token.h> +#include <Protocol\PciIo.h> +#include <Protocol\AmiSio.h> + +#if(IODECODETYPE) +//<AMI_PHDR_START> +//---------------------------------------------------------------------- +// Procedure: OEM_F81216_LPCDeviceDecoding +// +// Description: This function goes through the elinked list of identify +// functions giving control when the token "IODECODETYPE == 1". +// +// Input: Base - I/O base address, Base=0 means disable the decode of the device +// DevUid - The device Unique ID +// If type is 0xFF, DevUid contain the IO length +// +// Output: EFI_STATUS +// EFI_SUCCESS - Set successfully. +// EFI_INVALID_PARAMETER - the Input parameter is invalid. +// +// Note: +// Input paramete is a multi-paramete. If type is 0xFF, DevUid contain the IO length +// +//---------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS OEM_F81216_LPCDeviceDecoding( + IN EFI_PCI_IO_PROTOCOL *LpcPciIo, + IN UINT16 Base, + IN UINT8 DevUid +) +{//Chipset porting should provide the Io Ranage decode function. + //If chipset porting provide this function, set IODECODETYPE = 0. + //If chipset porting doesn't provide this function, you can use a eLink to replace OEM_F81216_LPCDeviceDecoding() + //In file of IoDecodeSample.c, there is a example code to decode IO Range. You can eLink your code with CORE_DXEBin object. + //------------------------------------- + EFI_STATUS Status=EFI_SUCCESS; + +/* + EFI_STATUS Status; + ICH_LPC_IO_DECODE_REG dr; //IchDecode Register + BOOLEAN a; +//--------------------------------------------------------- + //Read what currently have there... + Status = LpcPciIo->Pci.Read(LpcPciIo, EfiPciIoWidthUint16, + ICH_LPC_IO_DECODE_OFFSET, 1, &dr.IO_DECODE_REG); + if (EFI_ERROR(Status)) return Status; + a = TRUE; + //Check all possible BAse Addresses + switch(Base){ + //LPT Address range + case 0x378 : + dr.LptDecode = 0; + break; + case 0x278 : + dr.LptDecode=1; + break; + case 0x3bc : + dr.LptDecode=2; + break; + //FDC Address range + case 0x3f0 : + dr.FdcDecode = 0; + break; + case 0x370 : + dr.FdcDecode = 1; + break; + //COM Port Address range + case 0x3f8 : + if (DevUid) + dr.ComBDecode=0; + else + dr.ComADecode=0; + break; + case 0x2f8 : + if (DevUid) + dr.ComBDecode=1; + else + dr.ComADecode=1; + break; + case 0x220 : + if (DevUid) + dr.ComBDecode=2; + else + dr.ComADecode=2; + break; + case 0x228 : + if (DevUid) + dr.ComBDecode=3; + else + dr.ComADecode=3; + break; + case 0x238 : + if (DevUid) + dr.ComBDecode=4; + else + dr.ComADecode=4; + break; + + case 0x2E8 : + if (DevUid) + dr.ComBDecode=5; + else + dr.ComADecode=5; + break; + case 0x338 : + if (DevUid) + dr.ComBDecode=6; + else + dr.ComADecode=6; + break; + case 0x3e8 : + if (DevUid) + dr.ComBDecode=7; + else + dr.ComADecode=7; + break; + + default : + a = FALSE; + } + //Use Provided LPC Bridge PCI IO to write data back + if (a) Status=LpcPciIo->Pci.Write(LpcPciIo, EfiPciIoWidthUint16, + ICH_LPC_IO_DECODE_OFFSET, 1, &dr.IO_DECODE_REG); +*/ + + return Status; +} +#endif + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2009, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//*************************************************************************
\ No newline at end of file diff --git a/Board/IO/F81216/BSP/PeiIoTable.h b/Board/IO/F81216/BSP/PeiIoTable.h new file mode 100644 index 0000000..6ff6e85 --- /dev/null +++ b/Board/IO/F81216/BSP/PeiIoTable.h @@ -0,0 +1,219 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/PeiIoTable.h 4 1/19/12 3:07a Elviscai $ +// +// $Revision: 4 $ +// +// $Date: 1/19/12 3:07a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/PeiIoTable.h $ +// +// 4 1/19/12 3:07a Elviscai +// [TAG] EIPNONE +// [Category] Bug Fix +// [Severity] Important +// [Symptom] Base 0x200 generic IO decode fail +// [RootCause] 1ST IO OemIoDecode will take 0x200 as GamePort +// [Solution] Change Com port IoDecodeBase from 0x200 to 0x240. +// +// 3 7/04/11 3:23a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] OemIoDecode.c +// PeiIoTable.h +// DxeIoTable.h +// BSP.cif +// +// 2 10/28/10 2:34a Mikes +// Change configure key with a token +// +// 1 3/31/10 5:56a Fantasylai +// Initial release to F81216 just as a second IO + +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: PeiIoTable.H +// +// Description: +// SIO init table in PEI phase. Any customers have to review below tables +// for themselves platform and make sure each initialization is necessary. +// +// Notes: +// +//<AMI_FHDR_END> +//************************************************************************* +#ifndef _PEIIoTable_H +#define _PEIIoTable_H +#ifdef __cplusplus +extern "C" { +#endif + +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- +typedef struct _IO_DECODE_DATA{ + UINT16 BaseAdd; + //!!!Attention!!!If type is 0xFF, UID is a IO legth + UINT8 UID; + SIO_DEV_TYPE Type; +} IO_DECODE_DATA; + +typedef struct _SIO_DATA{ + UINT16 Addr; + //AND mask value, 0xFF means register don't need AndMask and + //only write OrData8 to regisrer. + UINT8 DataMask; + //OR mask value. + UINT8 DataValue; +} SIO_DATA; + +// SIO DECODE list creation code must be in this order +typedef EFI_STATUS (IO_RANGE_DECODE)( + IN void *LpcPciIo, + IN UINT16 DevBase, + IN UINT8 UID, + IN SIO_DEV_TYPE Type +); + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: F81216SEC_Decode_Table +// +// Description: +// Table filled with SIO IO resource to decode. It is used +// for PEI IO Decode function. For example: +// 1. Decode Index/data port +// 2. Decode KBC,FDC IO for recovery +// 3. Decode COM port for debug +// 4. Decode total IO base for runtime, pme, acpi, etc... +// 5. Decode more com ports wirh "generic IO range decode" +// +// Notes: +// Attention! Cann't open 3F6(it was used by IDE controller.) +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> +IO_DECODE_DATA F81216SEC_Decode_Table[]={ + // ----------------------------- + //| BaseAdd | UID | Type | + // ----------------------------- + {F81216SEC_CONFIG_INDEX, 2, 0xFF}, + + // !!!!Attention!!!!This is necessary + //OEM_TODO//OEM_TODO//OEM_TODO//OEM_TODO + {0x240, 0x40, 0xFF}, // 0x200~0x27f , open a IODecode section for UART1,2,3,4 + // Add more OEM IO decode below. +}; + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: F81216SEC_PEI_Init_Table +// +// Description: Table filled with SIO logical devices' register value. +// Only do the necessary initialization. For example: +// 1. Program clock and multi-pin setting in global registers +// 2. Program KBC,FDC IO for recovery +// 3. Program COM port for debug +// +// Notes: +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> +SIO_DATA F81216SEC_PEI_Init_Table[] = { + // ----------------------------- + //| Addr | DataMask | DataValue | + // ----------------------------- + + //--------------------------------------------------------------------- + // Enter Configuration Mode. + //--------------------------------------------------------------------- + //AMI_TODO: + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_CONFIG_MODE_ENTER_VALUE}, + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_CONFIG_MODE_ENTER_VALUE}, + //--------------------------------------------------------------------- + // Before init all logical devices, program Global register if needed. + //--------------------------------------------------------------------- + // Program clock setting in global registers + // Bit0: 0/1 for CLKIN is 48Mhz/24MHz . + {F81216SEC_CONFIG_INDEX, 0xFF, 0x25}, + {F81216SEC_CONFIG_DATA, 0xFE, 0x00 | F81216SEC_CLOCK}, + + //--------------------------------------------------------------------- + // Initialize the Serial Port for debug useage. Default is COMA + //--------------------------------------------------------------------- + //if first io have no comport debug,open it +/* + #if defined(EFI_DEBUG) || (defined(Recovery_SUPPORT) && (SERIAL_RECOVERY_SUPPORT)) + #if (F81216SEC_SERIAL_PORT0_PRESENT) + // Select device + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_LDN_SEL_REGISTER}, + {F81216SEC_CONFIG_DATA, 0xFF, F81216SEC_LDN_UART0}, + // Program Base Addr + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_BASE1_LO_REGISTER}, + {F81216SEC_CONFIG_DATA, 0xFF ,0x60}, + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_BASE1_HI_REGISTER}, + {F81216SEC_CONFIG_DATA, 0xFF, 0x02}, + // Activate Device + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_ACTIVATE_REGISTER}, + {F81216SEC_CONFIG_DATA, 0xFF, F81216SEC_ACTIVATE_VALUE}, + #endif // F81216SEC_SERIAL_PORT1_PRESENT + #endif // #ifdef EFI_DEBUG +*/ + //--------------------------------------------------------------------- + // Disable non-used devices + //--------------------------------------------------------------------- + +//-------------------------------------------------------------------------- +// After init all logical devices, program Global register if needed. +//-------------------------------------------------------------------------- +//-------------------------------------------------------------------------- +// After init all logical devices, Exit Configuration Mode. +//-------------------------------------------------------------------------- + {F81216SEC_CONFIG_INDEX, 0xFF, 0xAA}, + +}; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif //_PEIIoTable_H +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81216/F81216.ASL b/Board/IO/F81216/F81216.ASL new file mode 100644 index 0000000..ebc950f --- /dev/null +++ b/Board/IO/F81216/F81216.ASL @@ -0,0 +1,505 @@ +// THIS FILE IS INCLUDED to South Bridge device scope +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216.ASL 6 4/01/13 3:15a Elviscai $ +// +// $Revision: 6 $ +// +// $Date: 4/01/13 3:15a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216.ASL $ +// +// 6 4/01/13 3:15a Elviscai +// [TAG] EIP115780 +// [Category] Bug Fix +// [Symptom] Burn in test faile while dual IO using same idex/data port +// [RootCause] Method DSTA retrned before exit config mode. +// +// 5 7/18/12 9:31p Elviscai +// [TAG] EIPNONE +// [Category] Bug Fix +// [Solution] Change UHID judgement if IR mode +// +// 4 2/01/12 10:46p Elviscai +// [TAG] EIP76584 +// [Category] Bug Fix +// [Severity] Important +// [Symptom] BIT test fail under OS +// [Solution] Update DSR3 Method +// +// 3 7/04/11 3:22a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] IO_F81216.SDL +// F81216.ASL +// F81216.MAK +// F81216.SD +// F81216.UNI +// F81216DXE.C +// F81216PEI.C +// F81216Setup.H +// F81216.CIF +// +// 2 10/28/10 2:25a Mikes +// Clean code and implement new name rule +// +// 1 3/31/10 5:55a Fantasylai +// Initial release to F81216 just as a second IO +// +//************************************************************************* + +//<AMI_FHDR_START> +// +// Name: <F81216.ASL> +// +// Description: Define ACPI method or namespce For Super IO +// +//<AMI_FHDR_END> +//************************************************************************* +//Scope(\_SB.PCI0.SBRG) { +//----------------------------------------------------------------------- +// SET OF COMMON DATA/CONTROL METHODS USED FOR ALL LDN BASED SIO DEVICES +//----------------------------------------------------------------------- +// LIST of objects defined in this file: +// SIO specific: SIOR - Device node (_HID=0c02, UID=SPIO), SIO index/DAta IO access & SIO GPIO address space if available +// SIO specific: DCAT - Table correspondence the LDNs to Device order in Routing Table. +// SIO specific: ENFG & EXFG - Control methods to Enter and Exit configuration mode. ENFG & EXFG correspondingly +// SIO specific: LPTM - current parralel port mode +// SIO specific: UHID - PnP ID for given Serial port +// SIO specific: SIOS - SIO Chipset specific code called from _PTS +// SIO specific: SIOW - SIO Chipset specific code called from _WAK +// SIO specific: SIOH - SIO event handler, to be called from correspondent _Lxx method +// SIO specific: PowerResources & _PR0 object to control Power management for FDC, LPT, UART1,2. +// +// Generic :OpRegion & common Fields to access SIO configuration space +// Generic :CGLD - Convert Device category to LDN +// Generic :DSTA - Get device status according to ACTR register in LD IO space +// Generic :DCNT - Enable/Disable Decoding of Device resources, Route/Release resources to LPC bus +// Generic :DCRS - Returns Byte stream of device's Current resources +// Generic :DSRS - Configures new Resources to be decoded by a Device +// Device node:Motherboard resources +// SIO index/DAta IO access & SIO GPIO address space if available +Device(SIO2) { + Name(_HID, EISAID("PNP0C02")) // System board resources device node ID + Name(_UID,0x222) // Unique ID. First IO use 0x111, Second IO use 0x222 ... + + Name(CRS, ResourceTemplate(){ + IO(Decode16, 0, 0, 0, 0, IOI) // Index/Data Io address + }) // end CRS + + Method (_CRS, 0){ + // Reserve Super I/O Configuration Port + // 0x0 to 0xF0 already reserved + // 0x3F0 - 0x3F1 are reserved in FDC + If(LAnd(LLess(SP2O, 0x3F0), LGreater(SP2O, 0x0F0))){ + CreateWordField(CRS, ^IOI._MIN, GPI0) + CreateWordField(CRS, ^IOI._MAX, GPI1) + CreateByteField(CRS, ^IOI._LEN, GPIL) + Store(SP2O, GPI0) //Index/Data Base address + Store(SP2O, GPI1) + Store(0x02, GPIL) //IO range + } + Return(CRS) + } //End _CRS + + //--------------------------------------------------------------------- + // Table correspondence the LDNs to Device order in Routing Table + // Device type selection is achieved by picking the value from DCAT Package by Offset = LDN + //---------------------------------------------------------------------- + // Elements in the package contain LDN numbers for each category of devices. + // Default value 0xFF -> no device present. + // Make sure number of elements not less or equal to largest LDN + Name (DCAT, Package(0x15){ + // AMI_TODO: fill the table with the present LDN + // LDN number, 0xFF if device not present + // We keep category 0x00~0x0F as SIO_DEV_STATUS layout in GenericSio.h to Update IOST + 0xFF, // 0x00 - Serial A (SP1) + 0xFF, // 01 - Serial B (SP2) + 0xFF, // 02 - LPT + 0xFF, // 03 - FDD + 0xFF, // 04 - SB16 Audio + 0xFF, // 05 - MIDI + 0xFF, // 06 - MSS Audio + 0xFF, // 07 - AdLib sound (FM synth) + 0xFF, // 08 - Game port #1 + 0xFF, // 09 - Game port #2 + 0xFF, // 0A - KBC 60 & 64 + 0xFF, // 0B - EC 62 & 66 + 0xFF, // 0C - Reserved + 0xFF, // 0D - Reserved + 0xFF, // 0E - PS/2 Mouse + 0xFF, // 0F - Reserved +//----add your other device below,if no,please cut and modify Package number----------// + 0xFF, // 10 - CIR + 0x00, // 11 - Serial A2 + 0x01, // 12 - Serial B2 + 0x02, // 13 - Serial C2 + 0x03, // 14 - Serial D2 + }) + + //--------------------------------------------------------------------- + // Mutex object to sincronize the access to Logical devices + //--------------------------------------------------------------------- + Mutex(MUT0, 0) + + //--------------------------------------------------------------------- + // Enter Config Mode, Select LDN + // Arg0 : Logical Device number + //--------------------------------------------------------------------- + Method(ENFG, 1) { + Acquire(MUT0, 0xFFF) + Store(ENT2, INDX) + Store(ENT2, INDX) + Store(Arg0, LDN) //Select LDN + } + + //--------------------------------------------------------------------- + // Exit Config Mode + //--------------------------------------------------------------------- + Method(EXFG, 0) { + //AMI_TODO: exit config mode + Store(0xAA, INDX) + Release(MUT0) + } + //--------------------------------------------------------------------- + // Return current UART mode PnP ID : 0-plain Serial port, non Zero-IrDa mode + // Arg0 : Device Category # + //--------------------------------------------------------------------- + Method(UHID, 1){ + //AMI_TODO: Return the correct HID base on UART mode (UART/IR) + ENFG(CGLD(Arg0)) //Enter Config Mode, Select LDN + And(OPT1, 0x10, Local0) //Ir mode is active + EXFG() //Exit Config Mode + If (Local0) { //Get Uart mode : 0-Serial port, non-zero - IrDa + Return(EISAID("PNP0510")) //PnP Device ID IrDa + } + Else { + Return(EISAID("PNP0501")) //PnP Device ID 16550 Type + } + } + +//------------------------------------------------------------------------- +// !!! BELOW ARE GENERIC SIO CONTROL METHODS. DO NOT REQUIRE MODIFICATIONS +//------------------------------------------------------------------------- + +//<AMI_THDR_START> +//------------------------------------------------------------------------ +// Name: IOID +// +// Type: OperationRegion +// +// Description: Operation Region to point to SuperIO configuration space +// +// Notes: OpeRegion address is defined by 'SP2O' global name. +// 'SPIO' is a field isnside AML_Exchange data area defined in SDL file. +// +// Referrals: BIOS, AMLDATA +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> + //--------------------------------------------------------------------- + // Set of Field names to be used to access SIO configuration space. + //--------------------------------------------------------------------- + OperationRegion(IOID, // Name of Operation Region for SuperIO device + SystemIO, // Type of address space + SP2O, // Offset to start of region + 2) // Size of region in bytes + // End of Operation Region + Field(IOID, ByteAcc, NoLock,Preserve){ + INDX, 8, // Field named INDX is 8 bit wide + DATA, 8 // Field DATA is 8 bit wide + } + + //--------------------------------------------------------------------- + // Set of Field names to be used to access SIO configuration space. + //--------------------------------------------------------------------- + IndexField(INDX, DATA, ByteAcc, NoLock, Preserve){ + Offset(0x07), + LDN, 8, //Logical Device Number + + Offset(0x25), + SCF5, 8, //Set SCF5 + + Offset(0x30), + ACTR, 8, //Activate register + Offset(0x60), + IOAH, 8, //Base I/O High addr + IOAL, 8, //Base I/O Low addr + IOH2, 8, //Base2 I/O High addr + IOL2, 8, //Base2 I/O Low addr + Offset(0x70), + INTR, 4, //IRQ + INTT, 4, //IRQ type + Offset(0x74), + DMCH, 8, //DMA channel + Offset(0xE0), + RGE0, 8, //Option Register E0 + RGE1, 8, //Option Register E1 + RGE2, 8, //Option Register E2 + RGE3, 8, //Option Register E3 + RGE4, 8, //Option Register E4 + RGE5, 8, //Option Register E5 + RGE6, 8, //Option Register E6 + RGE7, 8, //Option Register E7 + RGE8, 8, //Option Register E8 + RGE9, 8, //Option Register E9 + Offset(0xF0), + OPT0, 8, //Option register 0xF0 + OPT1, 8, //Option register 0xF1 + OPT2, 8, //Option register 0xF2 + OPT3, 8, //Option register 0xF3 + OPT4, 8, //Option register 0xF4 + OPT5, 8, //Option register 0xF5 + OPT6, 8, //Option register 0xF6 + OPT7, 8, //Option register 0xF7 + OPT8, 8, //Option register 0xF8 + OPT9, 8, //Option register 0xF9 + } //End of indexed field + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: CGLD +// Description: Convert Device Category to Device's LDN +// Input: Arg0 : Device category # +// Output: LDN +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(CGLD, 1) { + Return(DeRefOf(Index(DCAT, Arg0))) // Return LDN + } + + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DSTA +// Description: GET SIO DEVICE STATUS according to ACTR/IOST(category0x00~0x0F) return values +// GET SIO DEVICE STATUS according to ACTR/IOAH+IOAL/IOH2+IOL2(category>0x0F) +// Input: Arg0 : Device category # +// Output: Device Status +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DSTA, 1) { + // IO Device presence status is determined during first _STA invocation. + // If "Activate" bit is set during first _STA invocation, IO device + // present status is stored into IOST global variable. + // IOST global variable contains the bit mask of all enabled Io devices. + ENFG(CGLD(Arg0)) //Enter Config Mode, Select LDN + Store(ACTR, Local0) + Or(ShiftLeft(IOAH, 8),IOAL,Local1) + EXFG() //Exit Config Mode + + // LDN's not decoded, Device not present. + If(LEqual(Local0, 0xFF)) {Return(0x0)} + + //Assume register(ACTR) bit0 is "Active" bit. + //AMI_TODO: If register(ACTR) non-bit0 is "Active" bit, change below code. + And(Local0, 1, Local0) //Leave only "Activate" bit + + // Update IO device status in IOST according to the category# + // Note. Once device is detected its status bit cannot be removed + If(Local0){ + Return(0x0F) // Device present & Active + } + Else{ + If(Local1) { Return(0x0D)} // Device Detected & Not Active +// Or(ShiftLeft(IOH2, 8),IOL2,Local0) +// If(Local0) { Return(0x0D)} // Device Detected & Not Active + Return(0x00) // Device not present + } + } // End Of DSTA + + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DCNT +// Description: Enable/Disable Decoding of Device resources, Route/Release +// I/O & DMA Resources From, To EIO/LPC Bus +// Input: Arg0 : Device catagory # +// Arg1 : 0/1 Disable/Enable resource decoding +// Output:Nothing +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DCNT, 2) { + + ENFG(CGLD(Arg0)) //Enter Config Mode, Select LDN + + // Route/Release DMA channel from/to being ISA/PCI mode + // Note. DMA channel 0 is currently not decoded, although it can be + // used on some of SIO chipsets. + If(LAnd(LLess(DMCH,4), LNotEqual(And(DMCH, 3, Local1),0))){ + rDMA(Arg0, Arg1, Increment(Local1)) + } + + Store(Arg1, ACTR) // Update Activate Register + ShiftLeft(IOAH, 8, local1) // Get IO Base address + Or(IOAL, Local1, Local1) + + // Route/Release I/O resources from/to EIO/LPC Bus + // Arg0 Device Category + // Arg1 0/1 Disable/Enable resource decoding + // Arg2 Port to Route/Release + // Arg3 Port SIZE to Route + RRIO(Arg0, Arg1, Local1, 0x08) + + EXFG() // Exit Config Mode + } // End DCNT + +//<AMI_THDR_START> +//------------------------------------------------------------------------ +// Name: CRS1,CRS2,CRS3 +// +// Type: ResourceTemplate +// +// Description: Current Resources Buffer for Generic SIO devices +// +// Notes: Note. DMA channel 0 is currently decoded as reserved, +// although, it can be used on some of SIO chipsets. +// Add DMA0 to _PRS if it is used +// Generic Resourse template for FDC, COMx, LPT and ECP Current Resource Settings +// (to be initialized and returned by _CRS) +//------------------------------------------------------------------------- +//<AMI_THDR_END> + + // CRS buffer without DMA resource + Name(CRS3, ResourceTemplate(){ + IO(Decode16, 0, 0, 1, 0, IO04) + IRQ(Level,ActiveLow,Shared,IRQ3){} + DMA(Compatibility, NotBusMaster, Transfer8, DMA3) {} + }) + CreateWordField(CRS3, IRQ3._INT, IRQT) //IRQ mask 0x9 + CreateByteField(CRS3, 0x0B,IRQS) //IRQ Shared/Active-Low/Edge-Triggered/=0x19 0xB + CreateByteField(CRS3, DMA3._DMA, DMAT) //DMA 0x4 + CreateWordField(CRS3, IO04._MIN, IO41) //Range 1 Min Base Word 0x2 + CreateWordField(CRS3, IO04._MAX, IO42) //Range 1 Max Base Word 0x4 + CreateByteField(CRS3, IO04._LEN, LEN4) //Length 1 0x7 + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DCR3 +// Description: Get FDC, LPT, ECP, UART, IRDA resources (_CRS) +// Returns Byte stream of Current resources. May contain Resources such: +// 1 IRQ resource +// 1 IO Port +// Input: Arg0 : Device catagory # +// Output: _CRS Resource Buffer +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DCR3, 2) { + + ENFG(CGLD(Arg0)) // Enter Config Mode, Select LDN + + // Write Current Settings into Buffer for 1st IO Descriptor + ShiftLeft(IOAH, 8, IO41) //Get IO Base MSB + Or(IOAL, IO41, IO41) //Get IO Base LSB + Store(IO41, IO42) //Get Max Base Word + Store(0x08, LEN4) + + // Write Current Settings into IRQ descriptor + If(INTR){ + ShiftLeft(1, INTR, IRQT) + // Set IRQ Type:porting according INTT + //AMI_TODO: + If(And(INTT,0x01)){ + Store(0x18, IRQS) // IRQ Type: Active-Low-Level-Triggered,Shared. + } Else { + Store(1, IRQS) // IRQ Type: Active-High-Edge-Triggered,No-Shared(default) + } + }Else{ + Store(0, IRQT) // No IRQ used + } + // Write Current Settings into DMA descriptor + // Note. DMA channel 0 is currently decoded as reserved, + // although, it can be used on some of SIO chipsets. + //If(Or(LGreater(DMCH,3), LEqual(And(DMCH, 3, Local1),0))){ + If(LOr(LGreater(DMCH,3), LEqual(Arg1, 0))){ + Store(0, DMAT) // No DMA + } Else { + And(DMCH, 3, Local1) + ShiftLeft(1, Local1, DMAT) + } + + EXFG() // Exit Config Mode + Return(CRS3) //Return Current Resources + } +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DSR3 +// Description: Set FDC, LPT, ECP, UART, IRDA resources (_SRS) +// Control method can be used for configuring devices with following resource order: +// 1 IRQ resource +// 1 IO Port +// Input: Arg0 : PnP Resource String to set +// Arg1 : Device catagory # +// Output: Nothing +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DSR3, 2) { + CreateWordField(Arg0, ^IO04._MIN, IO41) //Range 1 Min Base Word 0x8 + CreateWordField(Arg0, ^IRQ3._INT, IRQT) //IRQ mask 0x1 + CreateByteField(Arg0, 0x0B, IRQS) //IRQ Flag + CreateByteField(Arg0, ^DMA3._DMA, DMAT) //DMA + + ENFG(CGLD(Arg1)) // Enter Config Mode, Select LDN + + // Set Base IO Address + And(IO41,0xff, IOAL) //Set IO Base LSB + ShiftRight(IO41, 0x8, IOAH) //Set IO Base MSB + + // Set IRQ + If(IRQT){ + FindSetRightBit(IRQT, Local0) + Subtract(Local0, 1, INTR) + //Set IRQ flag,AMI_TODO: bit4:_SHR,bit3:_LL,bit0:_HE + Store(0x01, INTT) //some relative share,active-low/high registers + }Else{ + Store(0, INTR) //No IRQ used + } + // Set DMA + If(DMAT){ + FindSetRightBit(DMAT, Local0) + Subtract(Local0, 1, DMCH) + }Else{ + Store(4, DMCH) //No DMA + } + + EXFG() // Exit Config Mode + // Enable ACTR + DCNT(Arg1, 1) // Enable Device (Routing) + Store(Arg1, Local2) + If (LGreater(Local2, 0)){Subtract(Local2, 1, Local2)} + } + +} // End of SIO2 + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + + + + diff --git a/Board/IO/F81216/F81216.CIF b/Board/IO/F81216/F81216.CIF new file mode 100644 index 0000000..c5b6a0d --- /dev/null +++ b/Board/IO/F81216/F81216.CIF @@ -0,0 +1,20 @@ +<component> + name = "Second SuperI/O - F81216" + category = IO + LocalRoot = "Board\IO\F81216" + RefName = "F81216" +[files] +"IO_F81216.SDL" +"F81216.ASL" +"F81216.MAK" +"F81216.SD" +"F81216.UNI" +"F81216DXE.C" +"F81216PEI.C" +"F81216Setup.H" +"History.txt" +"F81216SEC.chm" +[parts] +"F81216ASLFiles" +"F81216Board" +<endComponent> diff --git a/Board/IO/F81216/F81216.MAK b/Board/IO/F81216/F81216.MAK new file mode 100644 index 0000000..d7d2399 --- /dev/null +++ b/Board/IO/F81216/F81216.MAK @@ -0,0 +1,92 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* +# +#************************************************************************* +# $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216.MAK 3 7/04/11 3:22a Kasalinyi $ +# +# $Revision: 3 $ +# +# $Date: 7/04/11 3:22a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216.MAK $ +# +# 3 7/04/11 3:22a Kasalinyi +# [Category] Improvement +# [Description] Update to new template +# [Files] IO_F81216.SDL +# F81216.ASL +# F81216.MAK +# F81216.SD +# F81216.UNI +# F81216DXE.C +# F81216PEI.C +# F81216Setup.H +# F81216.CIF +# +# 2 10/28/10 2:26a Mikes +# Clean code +# +# 1 3/31/10 5:55a Fantasylai +# Initial release to F81216 just as a second IO +# +#************************************************************************* +#<AMI_FHDR_START> +# +# Name: <F81216.MAK> +# +# Description: Make file to include SIO module in project +# +# +#<AMI_FHDR_END> +#************************************************************************* +{$(F81216_DIR)}.C{$(BUILD_DIR)}.OBJ:: + $(CC) $(CFLAGS) /Fo$(BUILD_DIR)\\ $< + +F81216PEI_OBJ= $(BUILD_DIR)\F81216PEI.OBJ +F81216DXE_OBJ= $(BUILD_DIR)\F81216DXE.OBJ + +$(F81216PEI_OBJ) : $(F81216_DIR)\F81216.MAK $(F81216_DIR)\BSP\PeiIoTable.h +$(F81216DXE_OBJ) : $(F81216_DIR)\F81216.MAK $(F81216_DIR)\BSP\DxeIoTable.h + +CORE_PEIBin : $(F81216PEI_OBJ) $(AMICSPLib) +CORE_DXEBin : $(F81216DXE_OBJ) $(AMICSPLib) + +#--------------------------------------------------------------------------- +# Create SIO Setup Screen +#--------------------------------------------------------------------------- +SetupSdbs : $(BUILD_DIR)\F81216.MAK F81216SDB + +$(BUILD_DIR)\F81216.MAK : $(F81216_DIR)\$(@B).CIF $(F81216_DIR)\$(@B).MAK $(BUILD_RULES) + $(CIF2MAK) $(F81216_DIR)\$(@B).CIF $(CIF2MAK_DEFAULTS) + +F81216SDB : $(BUILD_DIR)\F81216.mak + $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\ + /f $(BUILD_DIR)\F81216.MAK all\ + TYPE=SDB NAME=F81216 STRING_CONSUMERS=$(F81216_DIR)\F81216.SD + +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/Board/IO/F81216/F81216.SD b/Board/IO/F81216/F81216.SD new file mode 100644 index 0000000..1cdeee7 --- /dev/null +++ b/Board/IO/F81216/F81216.SD @@ -0,0 +1,388 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216.SD 5 7/04/11 3:22a Kasalinyi $ +// +// $Revision: 5 $ +// +// $Date: 7/04/11 3:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216.SD $ +// +// 5 7/04/11 3:22a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] IO_F81216.SDL +// F81216.ASL +// F81216.MAK +// F81216.SD +// F81216.UNI +// F81216DXE.C +// F81216PEI.C +// F81216Setup.H +// F81216.CIF +// +// 4 10/28/10 2:27a Mikes +// Implement new name rule +// +// 3 9/06/10 3:47a Mikes +// Add MANUFACTURING flag to support manufacture mode +// +// 2 6/02/10 9:42p Fantasylai +// +// 1 3/31/10 5:55a Fantasylai +// Initial release to F81216 just as a second IO +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81216.SD> +// +// Description: SIO Form Template, Setup screen definition file +// +//<AMI_FHDR_END> +//************************************************************************* + +#ifdef SETUP_DATA_DEFINITION +/***********************************************************/ +/* Put NVRAM data definitions here. +/* For example: UINT8 Data1; +/* These definitions will be converted by the build process +/* to a definitions of SETUP_DATA fields. +/***********************************************************/ +#endif //SETUP_DATA_DEFINITION + +//------------------------------------------------------------------------- +//Select Top level menu itmem (forset) for you pages +//------------------------------------------------------------------------- +#ifdef ADVANCED_FORM_SET + +//------------------------------------------------------------------------- +//If you need any additional type definitions add them here +//------------------------------------------------------------------------- +#ifdef FORM_SET_TYPEDEF + #include "F81216Setup.H" + #include "Token.h" +#endif + +//------------------------------------------------------------------------- +//If you need custom varstore's define them here +//------------------------------------------------------------------------- +#ifdef FORM_SET_VARSTORE + + //Callback varstore control in first io + + #ifdef SETUP_DATA_DEFINITION + AUTO_ID(COMA2_V_DATA_KEY) + AUTO_ID(COMA2_NV_DATA_KEY) + AUTO_ID(COMB2_V_DATA_KEY) + AUTO_ID(COMB2_NV_DATA_KEY) + AUTO_ID(COMC2_V_DATA_KEY) + AUTO_ID(COMC2_NV_DATA_KEY) + AUTO_ID(COMD2_V_DATA_KEY) + AUTO_ID(COMD2_NV_DATA_KEY) + #endif + + #if F81216SEC_SERIAL_PORT0_PRESENT + AMI_SIO_VARSTORE(COMA2, PNP0501_10) + #endif + + #if F81216SEC_SERIAL_PORT1_PRESENT + AMI_SIO_VARSTORE(COMB2, PNP0501_11) + #endif + + #if F81216SEC_SERIAL_PORT2_PRESENT + AMI_SIO_VARSTORE(COMC2, PNP0501_12) + #endif + + #if F81216SEC_SERIAL_PORT3_PRESENT + AMI_SIO_VARSTORE(COMD2, PNP0501_13) + #endif + +#endif + +//------------------------------------------------------------------------- +//Define controls to be added to the top level page of the formset +//------------------------------------------------------------------------- +#ifdef FORM_SET_ITEM +#endif + +//------------------------------------------------------------------------- +//Define goto commands for the forms defined in this file +//------------------------------------------------------------------------- +#ifdef FORM_SET_GOTO + goto F81216SEC_FORM_ID, + prompt = STRING_TOKEN(STR_F81216SEC_SIO_FORM), + help = STRING_TOKEN(STR_F81216SEC_SIO_FORM_HELP); + +#endif + +//------------------------------------------------------------------------- +// Define forms +//------------------------------------------------------------------------- +#ifdef FORM_SET_FORM + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SIO formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + form formid = AUTO_ID(F81216SEC_FORM_ID), + title = STRING_TOKEN(STR_F81216SEC_SIO_FORM); + SUBTITLE(STRING_TOKEN(STR_F81216SEC_SIO_FORM)) + + SEPARATOR + + text + help = STRING_TOKEN(STR_F81216SEC_SIO_FORM_HELP), + text = STRING_TOKEN(STR_F81216SEC_SIO_PROMPT), + text = STRING_TOKEN(STR_F81216SEC), + flags = 0, + key = 0; + + //Goto Serial 0 Form + #if F81216SEC_SERIAL_PORT0_PRESENT + suppressif ideqval COMA2_V_DATA.DevImplemented == 0x00; + goto F81216SEC_SERIAL1_FORM_ID, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL0_FORM), + help = STRING_TOKEN(STR_F81216SEC_SERIAL0_FORM_HELP); + endif; + #endif + + //Goto Serial 1 Form + #if F81216SEC_SERIAL_PORT1_PRESENT + suppressif ideqval COMB2_V_DATA.DevImplemented == 0x00; + goto F81216SEC_SERIAL2_FORM_ID, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL1_FORM), + help = STRING_TOKEN(STR_F81216SEC_SERIAL1_FORM_HELP); + endif; + #endif + + //Goto Serial 2 Form + #if F81216SEC_SERIAL_PORT2_PRESENT + suppressif ideqval COMC2_V_DATA.DevImplemented == 0x00; + goto F81216SEC_SERIAL3_FORM_ID, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL2_FORM), + help = STRING_TOKEN(STR_F81216SEC_SERIAL2_FORM_HELP); + endif; + #endif + + //Goto Serial 3 Form + #if F81216SEC_SERIAL_PORT3_PRESENT + suppressif ideqval COMD2_V_DATA.DevImplemented == 0x00; + goto F81216SEC_SERIAL4_FORM_ID, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL3_FORM), + help = STRING_TOKEN(STR_F81216SEC_SERIAL3_FORM_HELP); + endif; + #endif + +endform;//SIO Form + + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SP0 formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + #if F81216SEC_SERIAL_PORT0_PRESENT + form formid = AUTO_ID(F81216SEC_SERIAL1_FORM_ID), + title = STRING_TOKEN(STR_F81216SEC_SERIAL0_FORM); + SUBTITLE(STRING_TOKEN(STR_F81216SEC_SERIAL0_FORM)) + + SEPARATOR + + checkbox varid = COMA2_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT), + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval COMA2_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81216SEC_SERIAL0_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.COMA2Enable == 0x00; + + SEPARATOR + + suppressif ideqval COMA2_NV_DATA.DevEnable == 0x00; + oneof varid = COMA2_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL0_SETTINGS1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS2), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS3), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS4), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS5), value = 5, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.COMA2Enable == 0x00; + + suppressif ideqval COMA2_NV_DATA.DevEnable == 0x00; + oneof varid = COMA2_NV_DATA.DevMode, + prompt = STRING_TOKEN(STR_SELECT_MODE), + help = STRING_TOKEN(STR_F81216SEC_SERIAL_MODE_HELP), + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_MODE1), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_MODE2), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_MODE3), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_MODE4), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_MODE5), value = 4, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.COMA2Enable == 0x00; + endform; //Serial 0 Form + #endif + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SP1 formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + #if F81216SEC_SERIAL_PORT1_PRESENT + form formid = AUTO_ID(F81216SEC_SERIAL2_FORM_ID), + title = STRING_TOKEN(STR_F81216SEC_SERIAL1_FORM); + SUBTITLE(STRING_TOKEN(STR_F81216SEC_SERIAL1_FORM)) + + SEPARATOR + + checkbox varid = COMB2_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT), + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval COMB2_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81216SEC_SERIAL1_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.COMB2Enable == 0x00; + + SEPARATOR + + suppressif ideqval COMB2_NV_DATA.DevEnable == 0x00; + oneof varid = COMB2_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL1_SETTINGS1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS2), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS3), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS4), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS5), value = 5, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.COMB2Enable == 0x00; + + endform; // Serial 1 Form + #endif + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SP2 formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + #if F81216SEC_SERIAL_PORT2_PRESENT + form formid = AUTO_ID(F81216SEC_SERIAL3_FORM_ID), + title = STRING_TOKEN(STR_F81216SEC_SERIAL2_FORM); + SUBTITLE(STRING_TOKEN(STR_F81216SEC_SERIAL2_FORM)) + + SEPARATOR + + checkbox varid = COMC2_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT), + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval COMC2_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81216SEC_SERIAL2_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.COMC2Enable == 0x00; + + SEPARATOR + + suppressif ideqval COMC2_NV_DATA.DevEnable == 0x00; + oneof varid = COMC2_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL2_SETTINGS1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS2), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS3), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS4), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS5), value = 5, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.COMC2Enable == 0x00; + + endform; // Serial 2 Form + #endif + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SP3 formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + #if F81216SEC_SERIAL_PORT3_PRESENT + form formid = AUTO_ID(F81216SEC_SERIAL4_FORM_ID), + title = STRING_TOKEN(STR_F81216SEC_SERIAL3_FORM); + SUBTITLE(STRING_TOKEN(STR_F81216SEC_SERIAL3_FORM)) + + SEPARATOR + + checkbox varid = COMD2_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT), + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval COMD2_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81216SEC_SERIAL3_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.COMD2Enable == 0x00; + + SEPARATOR + + suppressif ideqval COMD2_NV_DATA.DevEnable == 0x00; + oneof varid = COMD2_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL3_SETTINGS1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS2), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS3), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS4), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS5), value = 5, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.COMD2Enable == 0x00; + + endform; // Serial 3 Form + #endif + +#endif //FORM_SET_FORM + +#endif//ADVANCED_FORM_SET + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81216/F81216.UNI b/Board/IO/F81216/F81216.UNI Binary files differnew file mode 100644 index 0000000..2df933c --- /dev/null +++ b/Board/IO/F81216/F81216.UNI diff --git a/Board/IO/F81216/F81216DXE.C b/Board/IO/F81216/F81216DXE.C new file mode 100644 index 0000000..e68bb69 --- /dev/null +++ b/Board/IO/F81216/F81216DXE.C @@ -0,0 +1,546 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216DXE.C 5 7/18/12 9:32p Elviscai $ +// +// $Revision: 5 $ +// +// $Date: 7/18/12 9:32p $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216DXE.C $ +// +// 5 7/18/12 9:32p Elviscai +// [TAG] EIPNONE +// [Category] Bug Fix +// [Solution] Correct IR mode register setting in COM_INIT +// +// 4 7/04/11 3:22a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] IO_F81216.SDL +// F81216.ASL +// F81216.MAK +// F81216.SD +// F81216.UNI +// F81216DXE.C +// F81216PEI.C +// F81216Setup.H +// F81216.CIF +// +// 3 10/28/10 2:30a Mikes +// Implement new name rule +// +// 2 9/06/10 3:50a Mikes +// Fix compile issue with first IO module +// +// 1 3/31/10 5:55a Fantasylai +// Initial release to F81216 just as a second IO +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81216DXE.C> +// +// Description: 1. Port SIO DXE initial table and routine for genericsio.c +// 2. Define enter/exit config mode scrip table +// 3. Define SIO bootscriptable table +// +//<AMI_FHDR_END> +//************************************************************************* +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- +#include <Efi.h> +#include <Token.h> +#include <GenericSIO.h> +#include <Setup.h> +#include <Protocol\AmiSio.h> +#include <Protocol\PciIo.h> +#include <AmiCspLib.h> +#include "BSP\DxeIoTable.h" + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- +#define INITIAL_ROUTINE(name) \ +static EFI_STATUS name(\ + IN AMI_SIO_PROTOCOL *AmiSio,\ + IN EFI_PCI_IO_PROTOCOL *PciIo,\ + IN SIO_INIT_STEP InitStep\ +); + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- +extern VOID SioCfgMode(GSPIO *Sio, BOOLEAN Enter); +extern VOID DevSelect(SPIO_DEV *Dev); +extern VOID SioRegister(SPIO_DEV *Dev, BOOLEAN Write, UINT8 Reg, UINT8 *Val); + +extern EFI_STATUS LoopCspIoDecodeListInit( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN AMI_SIO_PROTOCOL *AmiSio ); + +static VOID ClearDevResource( + IN SPIO_DEV* dev +); + +//Declare initial routines for your SPIO_DEV_LST list. +INITIAL_ROUTINE(COM_Init) + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: F81216SEC_DevLst +// +// Description: Table filled with SIO porting information +// +//------------+-------+-------+--------+---------+---------+-------------+------------+------------+-----------+------------+------------+-------------| +//SIO_DEV_TYP | UINT8 | UINT8 | UINT16 | BOOLEAN | BOOLEAN | UINT8 | UINT8 | UINT16 | UINT16 | UINT16 | UINT8 | SIO_INIT | +//Type | LDN | UID | PnpId | Impleme | HasSetu | Flags | AslName[5] | ResBase[2] | ResLen[2] | IrqMask[2] | DmaMask[2] | InitRoutine | +//------------+-------+-------+--------+---------+---------+-------------+------------+------------+-----------+------------+------------+-------------| +// Field "Falgs" is needed to indicate that SIO Logical Device represented +// by this table entry shares all or some resources with previous entry. +// Such situation is sutable for FDC - and PS2 controller +// This field must be filled properely in order to have driver working right. +// Here possible Flags Settings +// #define SIO_SHR_NONE 0x00 +// #define SIO_SHR_IO1 0x01 //device shares resources programmed in SIO_1_BASE_REG +// #define SIO_SHR_IO2 0x02 //device shares resources programmed in SIO_2_BASE_REG +// #define SIO_SHR_IO 0x03 //device shares resources programmed in all SIO_BASE_REG +// #define SIO_SHR_IRQ1 0x04 +// #define SIO_SHR_IRQ2 0x08 +// #define SIO_SHR_IRQ 0x0C +// #define SIO_SHR_DMA1 0x10 +// #define SIO_SHR_DMA2 0x20 +// #define SIO_SHR_DMA 0x30 +// #define SIO_SHR_ALL 0x3F +// #define SIO_NO_RES 0x80 //this bit will be set if GCD call to allocate resource succeed +// //at least one call must return SUCCESS if this flag +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> +//AMI_TODO: Please check below notes. +//1. if device has no ASL code and has IO base register to be initialized, fill it in below table +//2. If device has no IO base register to be initialized, set flag to SIO_NO_RES +//3. if more device PnpId is 0x0C08, please check the UID of these devices. +static SPIO_DEV_LST F81216SEC_DevLst[]={ +//If device Implemented=FALSE the rest of the table will be ignored, just to avoid compilation ERROR +//Type LDN UID PnpId Implement HasSetu Share RES AslName[5] Base Length IrqMask DmaMask InitRoutine +//=============================================================================== +{dsUART, F81216SEC_LDN_UART0, 0x10, 0x0501, F81216SEC_SERIAL_PORT0_PRESENT, TRUE, SIO_SHR_NONE, {"UR11"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, COM_Init},//LDN 0x00 +{dsUART, F81216SEC_LDN_UART1, 0x11, 0x0501, F81216SEC_SERIAL_PORT1_PRESENT, TRUE, SIO_SHR_IRQ1, {"UR12"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, COM_Init},//LDN 0x01 +{dsUART, F81216SEC_LDN_UART2, 0x12, 0x0501, F81216SEC_SERIAL_PORT2_PRESENT, TRUE, SIO_SHR_IRQ1, {"UR13"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, COM_Init},//LDN 0x02 +{dsUART, F81216SEC_LDN_UART3, 0x13, 0x0501, F81216SEC_SERIAL_PORT3_PRESENT, TRUE, SIO_SHR_IRQ1, {"UR14"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, COM_Init},//LDN 0x03 +//=============================================================================== +};//SPIO_DEV_LST mSpioDeviceList[] END of structure Buffer +#define F81216SEC_DEV_CNT (sizeof(F81216SEC_DevLst)/sizeof(SPIO_DEV_LST)) + +// Note: below bootscript table->more registers, more post time +//------------------------------------------------------------------------- +// Define the registers to save/restore in BootScriptSave table when SIO sleep +//------------------------------------------------------------------------- +static UINT8 F81216SEC_GLOBAL_REGS[] = { + //AMI_TODO: + //Global registers. For example: + //LDN Register, Multi-fun registers and Device Specific registers + //0x07, + 0x25 +}; +#define F81216SEC_G_REG_CNT (sizeof(F81216SEC_GLOBAL_REGS)/sizeof(UINT8)) + +//------------------------------------------------------------------------- +// Define the local registers for configure SIO +//------------------------------------------------------------------------- +static UINT8 F81216SEC_LOCAL_REGS[] = { +//AMI_TODO: + F81216SEC_ACTIVATE_REGISTER, //Activate Reg + F81216SEC_BASE1_HI_REGISTER, //IO Base Registers + F81216SEC_BASE1_LO_REGISTER, //IO Base Registers + F81216SEC_BASE2_HI_REGISTER, //IO Base Registers + F81216SEC_BASE2_LO_REGISTER, //IO Base Registers + F81216SEC_IRQ1_REGISTER, //IRQ & DMA Select Regs + F81216SEC_IRQ2_REGISTER, //IRQ & DMA Select Regs + F81216SEC_DMA1_REGISTER, //IRQ & DMA Select Regs + F81216SEC_DMA2_REGISTER, //IRQ & DMA Select Regs + //Logical Device Configuration Registers(Dwevice Specific) + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE, + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE, +}; +#define F81216SEC_L_REG_CNT (sizeof(F81216SEC_LOCAL_REGS)/sizeof(UINT8)) + +//------------------------------------------------------------------------- +// Define script variable for enter config mode +//------------------------------------------------------------------------- +static SPIO_SCRIPT F81216SEC_OPEN_CONFIG[]={ + //AMI_TODO: + { + 1, //BOOLEAN IdxDat; //1=IDX 0=DAT + 1, //BOOLEAN WrRd; //1=Write 0=Read + F81216SEC_CONFIG_MODE_ENTER_VALUE //UINT8 Value; //if WrRd=0 wait for this data to come + }, + { + 1, //BOOLEAN IdxDat; //1=IDX 0=DAT + 1, //BOOLEAN WrRd; //1=Write 0=Read + F81216SEC_CONFIG_MODE_ENTER_VALUE //UINT8 Value; //if WrRd=0 wait for this data to come + } +}; + +//------------------------------------------------------------------------- +// Define script variable for exit config mode +//------------------------------------------------------------------------- +static SPIO_SCRIPT F81216SEC_CLOSE_CONFIG[]={ + //AMI_TODO: + { + 1, //BOOLEAN IdxDat; //1=IDX 0=DAT + 1, //BOOLEAN WrRd; //1=Write 0=Read + 0xAA //UINT8 Value; //if WrRd=0 wait for this data to come + } +}; + +//------------------------------------------------------------------------- +// Here comes the table telling how to enter "SIO Config Mode" +//------------------------------------------------------------------------- +static SPIO_SCRIPT_LST F81216SEC_ENTER_CONFIG={ + cfgByteSeq, //Operation Type + (sizeof(F81216SEC_OPEN_CONFIG))/(sizeof(SPIO_SCRIPT)), + &F81216SEC_OPEN_CONFIG //Instruction +}; + +//------------------------------------------------------------------------- +// Here comes the table telling how to exit "SIO Config Mode" +//------------------------------------------------------------------------- +static SPIO_SCRIPT_LST F81216SEC_EXIT_CONFIG={ + cfgByteSeq, //Operation Type + (sizeof(F81216SEC_CLOSE_CONFIG))/(sizeof(SPIO_SCRIPT)), + &F81216SEC_CLOSE_CONFIG //Instruction +}; + +//------------------------------------------------------------------------- +// If Spio uses complicated way to enter and exit config mode +// use cfgRoutine as Operation Type instead +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +// Here goes SPIO_LIST_ITEM structure for F81216SEC +//------------------------------------------------------------------------- +// value of -1 (0xF..F) means Do not check this parameter +#ifndef SB_BUS_NUM +#define SB_BUS_NUM SIO_SB_BUS_NUM +#endif +#ifndef SB_DEV_NUM +#define SB_DEV_NUM SIO_SB_DEV_NUM +#endif +#ifndef SB_FUNC_NUM +#define SB_FUNC_NUM SIO_SB_FUNC_NUM +#endif + +SPIO_LIST_ITEM F81216SEC={ + //This Information is needed to identify right LPC bridge for the SIO + -1, //UINT32 IsaVenDevId; + -1, //UINT32 IsaSubVenId; + SB_BUS_NUM, //UINT8 IsaBusNo; + SB_DEV_NUM, //UINT8 IsaDevNo; + SB_FUNC_NUM, //UINT8 IsaFuncNo; + //This is the information Needed to access SIO Generic Registers + //for the second SIO in the system change F81216SEC name to to SIO2_.... + //and so on + F81216SEC_CONFIG_INDEX, //UINT16 SioIndex; + F81216SEC_CONFIG_DATA, //UINT16 SioData; + // Dev Select and Activate + F81216SEC_LDN_SEL_REGISTER, //UINT8 DevSel; + F81216SEC_ACTIVATE_REGISTER, //UINT8 Activate; + F81216SEC_ACTIVATE_VALUE, //UINT8 ActivVal; + F81216SEC_DEACTIVATE_VALUE, //UINT8 DeactVal; + //Generic registers location + F81216SEC_BASE1_HI_REGISTER, //UINT8 Base1Hi; + F81216SEC_BASE1_LO_REGISTER, //UINT8 Base1Lo; + F81216SEC_BASE2_HI_REGISTER, //UINT8 Base2Hi; + F81216SEC_BASE2_LO_REGISTER, //UINT8 Base2Lo; + F81216SEC_IRQ1_REGISTER, //UINT8 Irq1; + F81216SEC_IRQ2_REGISTER, //UINT8 Irq2; + F81216SEC_DMA1_REGISTER, //UINT8 Dma1; + F81216SEC_DMA2_REGISTER, //UINT8 Dma2; + //List of devices inside this SIO + F81216SEC_DEV_CNT, //UINTN DevCount; + &F81216SEC_DevLst[0], //SPIO_DEV_LST *SioDevList; + //List of valid registers inside SIO to check if they has to be saved + //in BOOT_SCRIPT_SAVE for S3 state Resume + //This is for global registers which are the same for all devices in SIO + F81216SEC_G_REG_CNT, //UINTN GlobalInclRegCount; + &F81216SEC_GLOBAL_REGS[0], //UINT8 *GlobalIncludeReg; + //This is for Local registers they are unique for each device in SIO + F81216SEC_L_REG_CNT, //UINTN LocalInclRegCount; + &F81216SEC_LOCAL_REGS[0], //UINT8 *LocalIncludeReg; + //How To enter/exit Configuration mode if any + &F81216SEC_ENTER_CONFIG, //SPIO_SCRIPT_LST *EnterCfgMode; + &F81216SEC_EXIT_CONFIG, //SPIO_SCRIPT_LST *ExitCfgMode; +}; + +//------------------------------------------------------------------------- +//!!!!!!!!!!! PORTING REQUIRED !!!!!!!!!!! PORTING REQUIRED !!!!!!!!!!!* +//!!!!!!!!!!!!!!!! must be maintained for SIO devices!!!!!!!!!!!!!!!!!!* +//------------------------------------------------------------------------- +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: XXXX_Init +// +// Description: +// Each of INIT functions will be called twice by GenericSIO after standart +// initialization(Assigning and Programming IO/IRQ/DMA resources), +// First time it will be called before Activating the device, +// If device requires some additional initialization like +// - programming SIO device registers except IO1, IO2, IRQ1, IRQ2, DMA1 DMA2 +// Second time After Installing AmiSioProtocol, and DevicePath Protocol of SIO Device. +// If device requires some additional initialization like +// - if programming of some runtime registers like SIO_GPIO, SIO_PM SIO_HHM is needed +// - implementation of some additional setup questions +// do it here +// NOTE#1 Once SIO_INIT function invoced SIO Logical device allready selected +// NOTE#2 If Device Does not require any additional initialization just set +// InitRoutine field to NULL in SioDevLst[] Table. +// +// Input: +// IN AMI_SIO_PROTOCOL *AmiSio - Logical Device's information +// IN EFI_PCI_IO_PROTOCOL *PciIo - Read/Write PCI config space +// IN SIO_INIT_STEP InitStep - Initial routine step +// +// Output: None +// EFI_STATUS +// EFI_SUCCESS - Initial step sucessfully +// EFI_INVALID_PARAMETER - not find the initial step +// +// Modified: Nothing +// +// Referrals: None +// +// Note: +// It is recommended to have a separate Initialization Routine for each SIO Device. +// it will save you some code needed to detect which device is currently selected. +// case isGetSetupData: +// SIO implementation uses separate set of NVRAM variables +// associated with each LogicalDevice who has +// SPIO_DEV.DeviceInfo->HasSetup property set to true. +// Current Setup Settings are stored in SPIO_DEV.NvData. +// If due to different look and fill we need to overwrite standard +// Setup settings, we can do it here..... +// ===================================================== +// if(SetupData==NULL){ +// Status=GetSetupData(); +// if(EFI_ERROR(Status)) return Status; +// } +// dev->NvData.DevEnable = SetupData->FdcEnable; +// dev->NvData.DevPrsId = 0;//SetupData->FdcPrsId; +// dev->NvData.DevMode = 0;//SetupData->FdcMode; +// break; +// +// case isPrsSelect: +// If LDN uses non-standard way to determine possible resources(_PRS), +// or _PRS may wary based on LD mode. Then here we can get LD mode using +// SPIO_DEV.NvData.Mode field and get corresponded to the mode _PRS Buffer +// using GetPrsFromAml() function if ACPISUPPORT is ON. Or set of functions +// EFI_STATUS SetUartPrs(SPIO_DEV *Dev); +// EFI_STATUS SetLptPrs(SPIO_DEV *Dev, BOOLEAN UseDma); +// EFI_STATUS SetFdcPrs(SPIO_DEV *Dev); +// EFI_STATUS SetPs2kPrs(SPIO_DEV *Dev); +// EFI_STATUS SetPs2mPrs(SPIO_DEV *Dev); +// EFI_STATUS SetGamePrs(SPIO_DEV *Dev); +// EFI_STATUS SetMpu401Prs(SPIO_DEV *Dev); +// Defined in GenericSio.h +// +// case isBeforeActivate: +// //If any register needs to be initialized, whle enumerating all SIO devices. +// //Use NEW SbLib_SetLpcDeviceDecoding() function to set Device Decoding Range for +// //Legacy devices. Implementation in SbGeneric.c, definition in SbCspLib.h +// //===================================================== +// +// case isAfterActivate: +// //Ttis Initialization step is used to programm any runtime registers rsiding in +// //Decvice's decoded io space like SIO_GPIOs, SIO_PM, HHM registers. +// //This Programming is needed if device doesnot have or don't need driver to do so. +// //If there are a spetial driver like could be for HHM which could get THIS device handle +// //and programm like Terminal Driver for COM ports and Floppy Driver for FDC +// //nothing needs to be done here +// +// case isAfterBootScript: +// //This initialization step is needed to +// //Use NEW SbLib_SetLpcDeviceDecoding() function to set Device Decoding Range for Legacy devices +// +//------------------------------------------------------------------------- +// <AMI_PHDR_END> + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: COM_Init +// +// Description: +// This function provide each initial routine in genericsio.c +// +// Input: +// IN AMI_SIO_PROTOCOL *AmiSio - Logical Device's information +// IN EFI_PCI_IO_PROTOCOL *PciIo - Read/Write PCI config space +// IN SIO_INIT_STEP InitStep - Initial routine step +// +// Output: +// EFI_SUCCESS - Initial step sucessfully +// EFI_INVALID_PARAMETER - not find the initial step +// +// Modified: Nothing +// +// Referrals: None +// +// Note: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +static EFI_STATUS COM_Init( + IN AMI_SIO_PROTOCOL *AmiSio, + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN SIO_INIT_STEP InitStep +) +{ + EFI_STATUS Status=EFI_SUCCESS; + SPIO_DEV *dev=(SPIO_DEV*)AmiSio; + UINT8 rv; +//----------------------------- + switch (InitStep) + { + case isGetSetupData: + // Disable IODecode? + if((!dev->DeviceInfo->Implemented) || (!dev->NvData.DevEnable)) { + LoopCspIoDecodeListInit(NULL,AmiSio); + ClearDevResource(dev); + } + break; + + case isPrsSelect: + break; + + case isBeforeActivate: + + //Programm Device Mode register here(if NEEDED)use AmiSioProtocol + //make serial port 0 as IR port funtion only + if(dev->DeviceInfo->UID == 0x10) + { + //Programm Device Mode register here(if NEEDED)use AmiSioProtocol + Status=AmiSio->Access(AmiSio,FALSE,FALSE,0xF1,&rv); + ASSERT_EFI_ERROR(Status); + if(EFI_ERROR(Status)) return Status; + + rv &= 0xE3; + + switch (dev->NvData.DevMode) + { + case 0: //Bit4 = 0, Serial Port Function Mode + break; + case 1: + rv|=0x10; //Bit4 = 1 Bit3,Bit2 = 00 , IR Mode,Pusle 1.6us,Full Duplex + break; + case 2: + rv|=0x14; //Bit4 = 1 Bit3,Bit2 = 01 , IR Mode,Pusle 1.6us,Half Duplex + break; + case 3: + rv|=0x18; //Bit4 = 1 Bit3,Bit2 = 10 , IR Mode,Pusle 3/16 Bit Time,Full Duplex + break; + case 4: + rv|=0x1C; //Bit4 = 1 Bit3,Bit2 = 11 , IR Mode,Pusle 3/16 Bit Time,Half Duplex + break; + default: return EFI_INVALID_PARAMETER; + } + Status=AmiSio->Access(AmiSio,TRUE,FALSE,0xF1,&rv); + ASSERT_EFI_ERROR(Status); + } + //Programm Serial_X IRQ Share register. + if((dev->DeviceInfo->Flags & SIO_SHR_IRQ1) && dev->ResOwner) { + //enter cfgmode + SioCfgMode(dev->Owner, TRUE); + //set device resource owner share register + DevSelect(dev->ResOwner); + SioRegister(dev->ResOwner, FALSE, 0x70, &rv);//read reg0x70 value + rv |= 0x10; //Bit4:share or normal + SioRegister(dev->ResOwner, TRUE, 0x70, &rv);//write reg0x70 value + //set device share register + DevSelect(dev); + SioRegister(dev, TRUE, 0x70, &rv);//read reg0x70 value + //exit cfgmode + SioCfgMode(dev->Owner, FALSE); + dev->VlData.DevIrq1=dev->ResOwner->VlData.DevIrq1; + } + break; + + case isAfterActivate: + break; + + #if(CORE_AFTER_4634) + case isAfterBootScript: + break; + #endif + + default: Status=EFI_INVALID_PARAMETER; + }//switch + return Status; +} +//------------------------------------------------------------------------- +//!!!!!!!!!!! Porting End !!!!!!!!!!! +//------------------------------------------------------------------------- +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: ClearDevResource +// +// Description: +// This function will Clear SIO resource +// +// Input: +// SPIO_DEV* dev +// Output: +// NONE +// +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +static VOID ClearDevResource( + IN SPIO_DEV* dev +) +{ + UINT8 Value8; + Value8=0x00; + SioCfgMode(dev->Owner, TRUE); + DevSelect(dev); + SioRegister(dev, TRUE,F81216SEC_BASE1_HI_REGISTER,&Value8); + SioRegister(dev, TRUE,F81216SEC_BASE1_LO_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81216SEC_BASE2_HI_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81216SEC_BASE2_LO_REGISTER,&Value8); + SioRegister(dev, TRUE,F81216SEC_IRQ1_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81216SEC_IRQ2_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81216SEC_DMA1_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81216SEC_DMA2_REGISTER,&Value8); + SioCfgMode(dev->Owner, FALSE); + return; +} +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81216/F81216PEI.C b/Board/IO/F81216/F81216PEI.C new file mode 100644 index 0000000..8e0d564 --- /dev/null +++ b/Board/IO/F81216/F81216PEI.C @@ -0,0 +1,200 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216PEI.C 3 7/04/11 3:22a Kasalinyi $ +// +// $Revision: 3 $ +// +// $Date: 7/04/11 3:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216PEI.C $ +// +// 3 7/04/11 3:22a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] IO_F81216.SDL +// F81216.ASL +// F81216.MAK +// F81216.SD +// F81216.UNI +// F81216DXE.C +// F81216PEI.C +// F81216Setup.H +// F81216.CIF +// +// 2 9/06/10 3:50a Mikes +// Fix compile issue with first IO module +// +// 1 3/31/10 5:55a Fantasylai +// Initial release to F81216 just as a second IO +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81216PEI.C> +// +// Description: Porting for PEI phase.Just for necessary devices porting. +// +// +//<AMI_FHDR_END> +//************************************************************************* +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- +#include <Pei.h> +#include <Setup.h> +#include <Token.h> +#include <AmiLib.h> +#include <Protocol\AmiSio.h> +#include <AmiCspLib.h> +#include "BSP\PeiIoTable.h" + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- +extern EFI_STATUS PeiLoopCspIoDecodeListInit ( + IN VOID *Fun, + IN UINT16 Base, + IN UINT8 DevUid, + IN SIO_DEV_TYPE Type); + +static VOID PeiSetLpcDeviceDecoding(VOID); // + +VOID F81216SEC_INIT(VOID); // + +VOID PeiF81216SECInit ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices +); + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: PeiF81216SECInit +// +// Description: +// This function provide PEI phase SIO initialization +// +// Input: +// IN EFI_FFS_FILE_HEADER *FfsHeader - Logical Device's information +// IN EFI_PEI_SERVICES **PeiServices - Read/Write PCI config space +// +// Output: None +// +// Modified: Nothing +// +// Referrals: None +// +// Note: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +VOID PeiF81216SECInit ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices +) +{ + F81216SEC_INIT(); +} + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: F81216SEC_INIT +// +// Description: +// +// This function Step through table and initialize the Logic Device +// +// Input: None +// +// Output: EFI_STATUS +// +// Modified: Nothing +// +// Referrals: None +// +// Note: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +VOID F81216SEC_INIT(VOID) +{ + UINTN i; + + // Decode neccessary IO resource in PEI phase + PeiSetLpcDeviceDecoding(); + + // Step through table and initialize the Serial Port + for(i=0; i<(sizeof(F81216SEC_PEI_Init_Table))/(sizeof(SIO_DATA));i++) { + // If Mask=0xFF,only write register. + if(F81216SEC_PEI_Init_Table[i].DataMask == 0xFF) { + IoWrite8(F81216SEC_PEI_Init_Table[i].Addr, F81216SEC_PEI_Init_Table[i].DataValue); + } + // Read and writer register + else { + IoWrite8(F81216SEC_PEI_Init_Table[i].Addr, \ + IoRead8(F81216SEC_PEI_Init_Table[i].Addr) \ + & F81216SEC_PEI_Init_Table[i].DataMask \ + | F81216SEC_PEI_Init_Table[i].DataValue); + } + } +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: PeiSetLpcDeviceDecoding +// +// Description: +// This function is used to open IoDecode for logic devices initialized in PEI +// +// Input: +// +// Output: EFI_STATUS +// +// Notes: PORTING REQUIRED +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +static VOID PeiSetLpcDeviceDecoding(VOID) +{ + EFI_STATUS Status=EFI_SUCCESS; + UINT8 i; + + for(i=0;i<(sizeof(F81216SEC_Decode_Table))/(sizeof(IO_DECODE_DATA));i++) + { + Status = PeiLoopCspIoDecodeListInit( NULL,\ + F81216SEC_Decode_Table[i].BaseAdd,\ + F81216SEC_Decode_Table[i].UID,\ + F81216SEC_Decode_Table[i].Type); + } +} + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81216/F81216SEC.chm b/Board/IO/F81216/F81216SEC.chm Binary files differnew file mode 100644 index 0000000..b98befc --- /dev/null +++ b/Board/IO/F81216/F81216SEC.chm diff --git a/Board/IO/F81216/F81216Setup.H b/Board/IO/F81216/F81216Setup.H new file mode 100644 index 0000000..d8b2b20 --- /dev/null +++ b/Board/IO/F81216/F81216Setup.H @@ -0,0 +1,173 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216Setup.H 3 7/04/11 3:22a Kasalinyi $ +// +// $Revision: 3 $ +// +// $Date: 7/04/11 3:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216Setup.H $ +// +// 3 7/04/11 3:22a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] IO_F81216.SDL +// F81216.ASL +// F81216.MAK +// F81216.SD +// F81216.UNI +// F81216DXE.C +// F81216PEI.C +// F81216Setup.H +// F81216.CIF +// +// 2 10/28/10 2:30a Mikes +// Make code readable +// +// 1 3/31/10 5:55a Fantasylai +// Initial release to F81216 just as a second IO +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81216Setup.H> +// +// Description: GUID or structure Of Setup related Routines. +// +//<AMI_FHDR_END> +//************************************************************************* + +#ifndef _F81216SETUP_H_ +#define _F81216SETUP_H_ +#ifdef __cplusplus +extern "C" { +#endif +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- +#include "token.h" +#include <Setup.h> +#include <SetupStrTokens.h> + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- + +//**********************************************************************// +// Belos is for SD files // +//**********************************************************************// +#define SIO_VAR_GUID \ + {0x560bf58a, 0x1e0d, 0x4d7e, 0x95, 0x3f, 0x29, 0x80, 0xa2, 0x61, 0xe0, 0x31} + +#define AMI_SIO_VARSTORE(ldxn, PNPxxxx_n) \ +varstore ldxn##_V_DATA,\ + key = ldxn##_V_DATA_KEY,\ + name = PNPxxxx_n##_VV,\ + guid = SIO_VAR_GUID;\ +varstore ldxn##_NV_DATA,\ + key = ldxn##_NV_DATA_KEY,\ + name = PNPxxxx_n##_NV,\ + guid = SIO_VAR_GUID; + +#define LDX_XV_DATA(ldxn) \ +typedef struct {\ + UINT8 DevImplemented;\ + UINT16 DevBase1;\ + UINT16 DevBase2;\ + UINT8 DevIrq1;\ + UINT8 DevIrq2;\ + UINT8 DevDma1;\ + UINT8 DevDma2;\ +} ldxn##_V_DATA;\ +typedef struct {\ + UINT8 DevEnable;\ + UINT8 DevPrsId;\ + UINT8 DevMode;\ +} ldxn##_NV_DATA; + + +#pragma pack(1) + +#if F81216SEC_SERIAL_PORT0_PRESENT +LDX_XV_DATA(COMA2) +#endif + +#if F81216SEC_SERIAL_PORT1_PRESENT +LDX_XV_DATA(COMB2) +#endif + +#if F81216SEC_SERIAL_PORT2_PRESENT +LDX_XV_DATA(COMC2) +#endif + +#if F81216SEC_SERIAL_PORT3_PRESENT +LDX_XV_DATA(COMD2) +#endif + +#pragma pack() + +//**********************************************************************// +// Below is for "xxSetup.c" // +//**********************************************************************// +#define STR_BUFFER_LENGTH 0x10 +//Defination of function +#define VOLTAGE 0x01 +#define TEMPERATURE 0x02 +#define FAN_SPEED 0x03 + +#define LEFT_JUSTIFY 0x01 +#define PREFIX_SIGN 0x02 +#define PREFIX_BLANK 0x04 +#define COMMA_TYPE 0x08 +#define LONG_TYPE 0x10 +#define PREFIX_ZERO 0x20 + +#define CHARACTER_NUMBER_FOR_VALUE 30 + +#pragma pack(1) + +/* +typedef struct { + UINT16 Token; // String token value + UINT8 Type; // For what? Temperature, Fan, Voltage... + UINT16 Value; // Monitor value + UINT8 OddPos; // Value precision +} HWM_DATA; +*/ + +#pragma pack() + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81216/History.txt b/Board/IO/F81216/History.txt new file mode 100644 index 0000000..18fd55a --- /dev/null +++ b/Board/IO/F81216/History.txt @@ -0,0 +1,76 @@ + +-----------------------------------------------------------+ + | Super I/O Release History | + | | + | IO Vendor : Fintek | + | Part Number : F81216 | + | Datasheet Version : F81216_V032P | + | Template Version : | + | | + +-----------------------------------------------------------+ + +;---------------------------------------------------------------------------; +Module Label :4.6.3_SIO_F81216_Sec_A9 +;---------------------------------------------------------------------------; +[TAG] EIP115780 +[Category] Bug Fix +[Symptom] Burn in test faile while dual IO using same idex/data port +[RootCause] Method DSTA retrned before exit config mode. +[Files] F81216.ASL +;---------------------------------------------------------------------------; +AMI China +Engineer : Elviscai +Release Date : 2013-04-01 +;---------------------------------------------------------------------------; + +;---------------------------------------------------------------------------; +Module Label :4.6.3_SIO_F81216_Sec_A8 +;---------------------------------------------------------------------------; +[TAG] EIPNONE +[Category] Bug Fix +[Solution] Change UHID judgement if IR mode + Correct IR mode register setting in COM_INIT + Change _HID judgement if IR mode +[Files] F81216.ASL +Uart1.ASL +F81216DXE.C +;---------------------------------------------------------------------------; +AMI China +Engineer : Elviscai +Release Date : 2011-07-19 +;---------------------------------------------------------------------------; + +;---------------------------------------------------------------------------; +Module Label :4.6.3_SIO_F81216_Sec_A7 +;---------------------------------------------------------------------------; +[TAG] EIPNONE +[Category] Bug Fix +[Severity] Important +[Symptom] Base 0x200 generic IO decode fail +[RootCause] 1ST IO OemIoDecode will take 0x200 as GamePort +[Solution] Change Com port IoDecodeBase from 0x200 to 0x240. +;---------------------------------------------------------------------------; +AMI China +Engineer : Elviscai +Release Date : 2011-06-18 +;---------------------------------------------------------------------------; + + +;---------------------------------------------------------------------------; +Module Label :4.6.3_SIO_F81216_Sec_A6 +;---------------------------------------------------------------------------; +[CATEGORY] Improvement +[REASON] Update to new template +[SEVERITY] Medium +[FILE] +Board\IO\*.* +[TAG] +;---------------------------------------------------------------------------; +AMI China +Engineer : Elviscai +Release Date : 2011-05-19 +;---------------------------------------------------------------------------; + + + + + diff --git a/Board/IO/F81216/IO_F81216.SDL b/Board/IO/F81216/IO_F81216.SDL new file mode 100644 index 0000000..fb57386 --- /dev/null +++ b/Board/IO/F81216/IO_F81216.SDL @@ -0,0 +1,479 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* +# +#************************************************************************* +# $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/IO_F81216.SDL 6 6/18/12 3:12a Elviscai $ +# +# $Revision: 6 $ +# +# $Date: 6/18/12 3:12a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/IO_F81216.SDL $ +# +# 6 6/18/12 3:12a Elviscai +# Specific Tokentype Integer to ENT2 +# +# 5 7/04/11 3:22a Kasalinyi +# [Category] Improvement +# [Description] Update to new template +# [Files] IO_F81216.SDL +# F81216.ASL +# F81216.MAK +# F81216.SD +# F81216.UNI +# F81216DXE.C +# F81216PEI.C +# F81216Setup.H +# F81216.CIF +# +# 4 11/17/10 5:01a Mikes +# [Category] Improvement +# [Description] Add TargetMAK for master token +# [Files] IO_F81216.SDL +# +# 3 10/28/10 2:23a Mikes +# Add enter configure key token +# Clean code and implement new name rule +# +# 2 6/02/10 9:42p Fantasylai +# Redefine the TOKEN "CORE_AFTER_4634" +# +# 1 3/31/10 5:55a Fantasylai +# Initial release to F81216 just as a second IO +# +#************************************************************************* +#<AMI_FHDR_START> +# +# Name: <IO_F81216.SDL> +# +# Description: SDL file to define SIO functions +# +# +#<AMI_FHDR_END> +#************************************************************************* +IODEVICE + Name = "F81216 SIO Implementation" + ASLfile = "F81216.ASL" +End + +IODEVICE + Name = "F81216 Serial Port A2" + ASLfile = "Board\IO\F81216\ACPI\UART1.ASL" + ASLdeviceName = "UR11" + Token = "F81216SEC_SERIAL_PORT0_PRESENT" "=" "1" +End + +IODEVICE + Name = "F81216 Serial Port B2" + ASLfile = "Board\IO\F81216\ACPI\UART2.ASL" + ASLdeviceName = "UR12" + Token = "F81216SEC_SERIAL_PORT1_PRESENT" "=" "1" +End + +IODEVICE + Name = "F81216 Serial Port C2" + ASLfile = "Board\IO\F81216\ACPI\UART3.ASL" + ASLdeviceName = "UR13" + Token = "F81216SEC_SERIAL_PORT2_PRESENT" "=" "1" +End + +IODEVICE + Name = "F81216 Serial Port D2" + ASLfile = "Board\IO\F81216\ACPI\UART4.ASL" + ASLdeviceName = "UR14" + Token = "F81216SEC_SERIAL_PORT3_PRESENT" "=" "1" +End + +TOKEN + Name = "====== SIO Global Control Tokens ======" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Specfy global control tokens." + TokenType = Expression +End + +TOKEN + Name = "F81216SEC_SUPPORT" + Value = "1" + Help = "Main switch to enable F81216SEC support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetH = Yes + Master = Yes +End + +TOKEN + Name = "F81216SEC_CONFIG_INDEX" + Value = "0x2E" + TokenType = Integer + TargetEQU = Yes + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_CONFIG_DATA" + Value = "0x2F" + TokenType = Integer + TargetEQU = Yes + TargetH = Yes +End + +TOKEN + Name = "SP2O" + Value = "$(F81216SEC_CONFIG_INDEX)" + Help = "Super IO Index/Data configuration port for ASL." + TokenType = Integer + TargetASL = Yes +End + +TOKEN + Name = "====== SIO Logical Devices Numbers ======" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Specfy Devices Logical Number." + TokenType = Expression +End + +TOKEN + Name = "F81216SEC_LDN_UART0" + Value = "0x00" + Help = "LDN for Serial1 Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_LDN_UART1" + Value = "0x01" + Help = "LDN for Serial2 Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_LDN_UART2" + Value = "0x02" + Help = "LDN for Serial3 Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_LDN_UART3" + Value = "0x03" + Help = "LDN for Serial4 Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_LDN_WDT" + Value = "0x08" + Help = "LDN for Watch Dog Timer" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "=== SIO Global Registers Settings ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "SIO Global Registers Setting" + TokenType = Expression +End + +TOKEN + Name = "F81216SEC_CLOCK" + Value = "0" + Help = "1/0 for 48Mhz/24MHz" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "====== SIO Registers Layout ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Specfy Register address inside SIO Chip." + TokenType = Expression +End + +TOKEN + Name = "F81216SEC_LDN_SEL_REGISTER" + Value = "0x07" + Help = "Logical Device Select Register Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_DEV_ID_REGISTER" + Value = "0x20" + Help = "Device Identification Register Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_ACTIVATE_REGISTER" + Value = "0x30" + Help = "Device Identification Register Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_BASE1_HI_REGISTER" + Value = "0x60" + Help = "Device BaseAddres Register#1 MSB Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_BASE1_LO_REGISTER" + Value = "0x61" + Help = "Device BaseAddres Register#1 LSB Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_BASE2_HI_REGISTER" + Value = "0x62" + Help = "Device BaseAddres Register#2 MSB Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_BASE2_LO_REGISTER" + Value = "0x63" + Help = "Device BaseAddres Register#2 LSB Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_IRQ1_REGISTER" + Value = "0x70" + Help = "Device IRQ Register#1 Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_IRQ2_REGISTER" + Value = "0x72" + Help = "Device IRQ Register#2 Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_DMA1_REGISTER" + Value = "0x74" + Help = "Device DMA Register#1 Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_DMA2_REGISTER" + Value = "0x75" + Help = "Device DMA Register#2 Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "=== SIO Activation Values ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Logical Device Activation Value." + TokenType = Expression +End + +TOKEN + Name = "F81216SEC_CONFIG_MODE_ENTER_VALUE" + Value = "0x77" + Help = "Value to enter Configuration Mode.Please check your hardware\Default is 0x77.\others are 0xA0, 0x87, 0x67" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "ENT2" + Value = "$(F81216SEC_CONFIG_MODE_ENTER_VALUE)" + Help = "Value to enter Configuration Mode.Please check your hardware\Default is 0x77.\others are 0xA0, 0x87, 0x67" + TokenType = Integer + TargetASL = Yes +End + +TOKEN + Name = "F81216SEC_ACTIVATE_VALUE" + Value = "0x01" + Help = "Value to activate Device." + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_DEACTIVATE_VALUE" + Value = "0x00" + Help = "Value to deactivate Device." + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "=== SIO Logic Device Present Settings ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "All Logic Device Present / Not Present." + TokenType = Expression +End + +TOKEN + Name = "F81216SEC_SERIAL_PORT0_PRESENT" + Value = "1" + Help = "Serial Port 0 (COMA / UART0) Present / Not Present." + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_SERIAL_PORT1_PRESENT" + Value = "1" + Help = "Serial Port 1 (COMB / UART1) Present / Not Present." + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_SERIAL_PORT2_PRESENT" + Value = "1" + Help = "Serial Port 2 (COMC / UART2) Present / Not Present." + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_SERIAL_PORT3_PRESENT" + Value = "1" + Help = "Serial Port 3 (COMD / UART3) Present / Not Present." + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_WDT_PORT_PRESENT" + Value = "1" + Help = "WDT Port Present / Not Present." + TokenType = Boolean + TargetH = Yes + TargetMAK = Yes +End + +TOKEN + Name = "===== SIO Module Setting ======" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "SIO Module Setting" + TokenType = Expression +End + +PATH + Name = "F81216_DIR" +End + +MODULE + Help = "Includes F81216.MAK to Project" + File = "F81216.MAK" +End + +ELINK + Name = "$(BUILD_DIR)\F81216.SDB" + Parent = "SETUP_SDBS" + Priority = 40 + InvokeOrder = AfterParent +End + +ELINK + Name = "$(F81216_DIR)\F81216.SD" + Parent = "SETUP_DEFINITIONS" + Priority = 40 + InvokeOrder = AfterParent +End + +ELINK + Name = "PeiF81216SECInit," + Parent = "PeiCoreInitialize" + InvokeOrder = AfterParent + Priority = 2 + Help = "if SecondIO, Priority must be 2." +End + +ELINK + Name = "F81216SEC," + Parent = "DxeSioList" + InvokeOrder = AfterParent + Priority = 2 + Help = "if SecondIO, Priority must be 2." +End + +ELINK + Name = "-i $(F81216_DIR)" + Parent = "SETUP_VFR_INCLUDES" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsUART,0x10, STRING_TOKEN(STR_F81216SEC_SERIAL0_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + Token = "F81216SEC_SERIAL_PORT0_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsUART,0x11, STRING_TOKEN(STR_F81216SEC_SERIAL1_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + Token = "F81216SEC_SERIAL_PORT1_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsUART,0x12, STRING_TOKEN(STR_F81216SEC_SERIAL2_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + Token = "F81216SEC_SERIAL_PORT2_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsUART,0x13, STRING_TOKEN(STR_F81216SEC_SERIAL3_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + Token = "F81216SEC_SERIAL_PORT3_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +#************************************************************************* +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + diff --git a/Board/IO/F81866/ACPI/DeviceASL.cif b/Board/IO/F81866/ACPI/DeviceASL.cif new file mode 100644 index 0000000..13fa357 --- /dev/null +++ b/Board/IO/F81866/ACPI/DeviceASL.cif @@ -0,0 +1,19 @@ +<component> + name = "F81866 Device ASL Files" + category = ModulePart + LocalRoot = "Board\IO\F81866\ACPI\" + RefName = "F81866ASLFiles" +[files] +"FDC.ASL" +"LPTE.ASL" +"PS2kb.asl" +"PS2ms.asl" +"Uart1.ASL" +"Uart2.ASL" +"Uart3.ASL" +"Uart4.ASL" +"Uart5.ASL" +"Uart6.ASL" +"SIOH.ASL" +<endComponent> + diff --git a/Board/IO/F81866/ACPI/FDC.ASL b/Board/IO/F81866/ACPI/FDC.ASL new file mode 100644 index 0000000..1452e11 --- /dev/null +++ b/Board/IO/F81866/ACPI/FDC.ASL @@ -0,0 +1,175 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/FDC.ASL 2 7/04/12 3:40a Elviscai $ +// +// $Revision: 2 $ +// +// $Date: 7/04/12 3:40a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/FDC.ASL $ +// +// 2 7/04/12 3:40a Elviscai +// [TAG] EIP88939 +// [Category] Bug Fix +// [Solution] Update _FDE from Package to Buffer to fix IASL5 compile +// issue +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] DeviceASL.cif +// FDC.ASL +// LPTE.ASL +// PS2kb.asl +// PS2ms.asl +// Uart1.ASL +// Uart2.ASL +// Uart3.ASL +// Uart4.ASL +// Uart5.ASL +// Uart6.ASL +// SIOH.ASL +// +// 2 3/21/11 9:43p Mikes +// Clean code +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <FDC.ASL> +// +// Description: Define ACPI method or namespce For Super IO +// +//<AMI_FHDR_END> +//************************************************************************* + +//**********************************************************************; +// Floppy Disk Controller - FDC // +//**********************************************************************; +// Category # :0x03 +Device(FDC) { + Name(_HID, EISAID("PNP0700")) //PnP Device ID +// _FDE : 5 Dword Package (1-4 are for each FDD present, #5 is for optional tape drive) +// 0 - Device is not present +// 1 - Device is Present +// 2 - Device is never Present +// >2- Reserved +// Tape drive is never present + Name(_FDE, Buffer(){1,0,2,2,2}) //_FDE - Floppy Disk Enumerate + + Method(_STA, 0) {Return(^^SIO1.DSTA(3))} //Get status + + Method(_DIS, 0) {^^SIO1.DCNT(3, 0)} //Disable FDC + + Method(_CRS, 0) { //Return FDC Current Resources + ^^SIO1.DCRS(3, 1) //Fill in Return buffer with DMA, Irq and 1st IO + //Move resources from CRS1 ro CRS2 buffer + Store(^^SIO1.IRQM, ^^SIO1.IRQE) //IRQ mask 0x1 + Store(^^SIO1.DMAM, ^^SIO1.DMAE) //DMA 0x04 + Store(^^SIO1.IO11, ^^SIO1.IO21) //1st IO Range Min Base Word 0x8 + Store(^^SIO1.IO12, ^^SIO1.IO22) // Max Base Word 0xa + Store(6, ^^SIO1.LEN2) + + Add(^^SIO1.IO21, 0x07, ^^SIO1.IO31) //2nd IO range + Store(^^SIO1.IO31, ^^SIO1.IO32) + Store(1, ^^SIO1.LEN3) + Return(^^SIO1.CRS2) + } + +//------------------------------------------------------------------------ +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { //FDC Possible Resources + StartDependentFn(0, 0) { + IO(Decode16, 0x3F0, 0x3F0, 1, 6) +// IO(Decode16, 0x3F7, 0x3F7, 1, 1)//0x3F6 port reserved for Legacy IDE + IRQNoFlags() {6} + DMA(Compatibility, NotBusMaster, Transfer8) {2} + } +// StartDependentFnNoPri() { +// IO(Decode16, 0x3F0, 0x3F0, 1, 6) +// IO(Decode16, 0x3F7, 0x3F7, 1, 1)//0x3F6 port reserved for Legacy IDE +// IRQNoFlags() {3,4,5,6,7,10,11,12} +// DMA(Compatibility, NotBusMaster, Transfer8) {2,3} +// } +// StartDependentFnNoPri() { +// IO(Decode16, 0x370, 0x370, 1, 6) +// IO(Decode16, 0x377, 0x377, 1, 1)//0x376 port reserved for Legacy IDE +// IRQNoFlags() {3,4,5,6,7,10,11,12} +// DMA(Compatibility, NotBusMaster, Transfer8) {2,3} +// } + EndDependentFn() + }) + + Method(_SRS, 1) { //Set resources/Enable FDC + ^^SIO1.DSRS(Arg0, 3) + + CreateWordField(Arg0, ^^SIO1.IRQ2._INT, IRQE) //IRQ mask 0x1 + CreateByteField(Arg0, ^^SIO1.DMA2._DMA, DMAE) //DMA 0x4 + + ^^SIO1.ENFG(^^SIO1.CGLD(3)) //Enter Config Mode, Select LDN + // Set IRQ + If(IRQE){ + FindSetRightBit(IRQE, Local0) + Subtract(Local0, 1, ^^SIO1.INTR) + }Else{ + Store(0, ^^SIO1.INTR) // No IRQ used + } + // Set DMA + If(DMAE){ + FindSetRightBit(DMAE, Local0) + Subtract(Local0, 1, ^^SIO1.DMCH) + }Else{ + Store(4, ^^SIO1.DMCH) // No DMA + } + ^^SIO1.EXFG() //Exit Config Mode + } + + +//---------Power Resources for FDD ------------------------- +/* + PowerResource(FDDP, 0, 0) { // SystemLevel Parameter=0, + Method(_STA, 0) { + Return(FDCP) // Get Power Status + } // end of _STA + Method(_ON) { + Store(1, FDCP) // Power on + } // end of _ON + Method(_OFF){ + Store(0, FDCP) // Power off + } // end of _OFF + } + Name(_PR0, Package(){FDDP}) // Reference to PowerResources +*/ +} // End Of FDC0 + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Board/IO/F81866/ACPI/LPTE.ASL b/Board/IO/F81866/ACPI/LPTE.ASL new file mode 100644 index 0000000..5bbf0f8 --- /dev/null +++ b/Board/IO/F81866/ACPI/LPTE.ASL @@ -0,0 +1,215 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/LPTE.ASL 1 7/20/11 4:22a Kasalinyi $ +// +// $Revision: 1 $ +// +// $Date: 7/20/11 4:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/LPTE.ASL $ +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] DeviceASL.cif +// FDC.ASL +// LPTE.ASL +// PS2kb.asl +// PS2ms.asl +// Uart1.ASL +// Uart2.ASL +// Uart3.ASL +// Uart4.ASL +// Uart5.ASL +// Uart6.ASL +// SIOH.ASL +// +// 3 3/21/11 9:43p Mikes +// Clean code +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <LPTE.ASL> +// +// Description: Define ACPI method or namespce For Super IO +// +//<AMI_FHDR_END> +//************************************************************************* + +//**********************************************************************; +// Parallel port - LPT or ECP(Extended mode) +//**********************************************************************; +// Category # :0x02 +Device(LPTE) { + Method(_HID, 0){ //PnP Device ID + If(^^SIO1.LPTM(2)) //Get LPT mode : 0-plain LPT, non Zero-ECP mode + {Return(EISAID("PNP0401"))} //PnP ID for ECP Port + Else + {Return(EISAID("PNP0400"))} //PnP ID for LPT Port + } + + Method(_STA, 0) {Return(^^SIO1.DSTA(2))}//Get Device status + + Method(_DIS, 0) {^^SIO1.DCNT(2,0)} //Disable LPT, arg0 - LDN, arg1 - 1(disable) + + Method(_CRS, 0) { //Get LPT current resources + ^^SIO1.DCRS(2, 1) //Fill in Return buffer with DMA, Irq and 1st IO + + //adjust base/aligment size if base ports are 0x3bc/0x7bc + If(And(^^SIO1.IO11, 0x04)) { + Store(0x04, ^^SIO1.LEN1) + } + + If(^^SIO1.LPTM(2)){ //Extended LPT mode ? + //Move resources from CRS1 ro CRS2 buffer + Store(^^SIO1.IRQM, ^^SIO1.IRQE) //IRQ mask 0x1 + Store(^^SIO1.DMAM, ^^SIO1.DMAE) //DMA 0x04 + + Store(^^SIO1.IO11, ^^SIO1.IO21) //1st IO Range Min Base Word 0x8 + Store(^^SIO1.IO12, ^^SIO1.IO22) // Max Base Word 0xa + Store(^^SIO1.LEN1, ^^SIO1.LEN2) + + Add(^^SIO1.IO21, 0x400, ^^SIO1.IO31)//2nd IO range + Store(^^SIO1.IO31, ^^SIO1.IO32) + Store(^^SIO1.LEN2, ^^SIO1.LEN3) + Return(^^SIO1.CRS2) + }else{ + Return(^^SIO1.CRS1) + } + } + + Method(_SRS, 1) { //Set LPT resources + ^^SIO1.DSRS(Arg0, 2) + } + + Method(_PRS, 0) { //Return Possible resources + If(^^SIO1.LPTM(2)) //Get LPT mode : 0-plain LPT, non Zero-ECP mode + {Return(EPPR)} //ECP mode resources + Else + {Return(LPPR)} //LPT mode resources + } + + +//----------------------------------------------------------------------- +// LPT Possible Resources +//----------------------------------------------------------------------- +//------------------------------------------------------------------------ +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(LPPR, ResourceTemplate(){ +// IRQ + StartDependentFn(0,0) { + IO(Decode16, 0x378, 0x378, 1, 8) + IRQNoFlags() {5} + } + StartDependentFnNoPri() { + IO(Decode16, 0x378, 0x378, 1, 8) + IRQNoFlags() {5,6,7,10,11,12} + } + StartDependentFnNoPri() { + IO(Decode16, 0x278, 0x278, 1, 8) + IRQNoFlags() {5,6,7,10,11,12} + } + StartDependentFnNoPri() { + IO(Decode16, 0x3BC, 0x3BC, 1, 4) + IRQNoFlags() {5,6,7,10,11,12} + } +// No IRQ +// StartDependentFnNoPri() { +// IO(Decode16, 0x378, 0x378, 1, 8) +// IRQNoFlags() {} +// } +// StartDependentFnNoPri() { +// IO(Decode16, 0x278, 0x278, 1, 8) +// IRQNoFlags() {} +// } +// StartDependentFnNoPri() { +// IO(Decode16, 0x3BC, 0x3BC, 1, 4) +// IRQNoFlags() {} +// } + EndDependentFn() + }) + +//----------------------------------------------------------------------- +// ECP Possible Resources +//----------------------------------------------------------------------- + Name(EPPR, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x378, 0x378, 1, 8) + IO(Decode16, 0x778, 0x778, 1, 8) + IRQNoFlags() {5} + DMA(Compatibility, NotBusMaster, Transfer8) {3} + } + StartDependentFnNoPri() { + IO(Decode16, 0x378, 0x378, 1, 8) + IO(Decode16, 0x778, 0x778, 1, 8) + IRQNoFlags() {5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {1,3} + } + StartDependentFnNoPri() { + IO(Decode16, 0x278, 0x278, 1, 8) + IO(Decode16, 0x678, 0x678, 1, 8) + IRQNoFlags() {5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {1,3} + } + StartDependentFnNoPri() { + IO(Decode16, 0x3BC, 0x3BC, 1, 4) + IO(Decode16, 0x7BC, 0x7BC, 1, 4) + IRQNoFlags() {5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {1,3} + } +// No IRQ +// StartDependentFnNoPri() { +// IO(Decode16, 0x378, 0x378, 1, 8) +// IO(Decode16, 0x778, 0x778, 1, 8) +// IRQNoFlags() {} +// DMA(Compatibility, NotBusMaster, Transfer8) {1,3} +// } +// StartDependentFnNoPri() { +// IO(Decode16, 0x278, 0x278, 1, 8) +// IO(Decode16, 0x678, 0x678, 1, 8) +// IRQNoFlags() {} +// DMA(Compatibility, NotBusMaster, Transfer8) {1,3} +// } +// StartDependentFnNoPri() { +// IO(Decode16, 0x3BC, 0x3BC, 1, 4) +// IO(Decode16, 0x7BC, 0x7BC, 1, 4) +// IRQNoFlags() {} +// DMA(Compatibility, NotBusMaster, Transfer8) {1,3} +// } + EndDependentFn() + }) + +//**********************************************************************; +} // End Of LPTE + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81866/ACPI/PS2kb.asl b/Board/IO/F81866/ACPI/PS2kb.asl new file mode 100644 index 0000000..b809fc4 --- /dev/null +++ b/Board/IO/F81866/ACPI/PS2kb.asl @@ -0,0 +1,112 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/PS2kb.asl 1 7/20/11 4:22a Kasalinyi $ +// +// $Revision: 1 $ +// +// $Date: 7/20/11 4:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/PS2kb.asl $ +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] DeviceASL.cif +// FDC.ASL +// LPTE.ASL +// PS2kb.asl +// PS2ms.asl +// Uart1.ASL +// Uart2.ASL +// Uart3.ASL +// Uart4.ASL +// Uart5.ASL +// Uart6.ASL +// SIOH.ASL +// +// 2 3/21/11 9:43p Mikes +// Clean code +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <PS2kb.ASL> +// +// Description: Define ACPI method or namespce For Super IO +// +//<AMI_FHDR_END> +//************************************************************************* + +//**********************************************************************; +// PS2 Keyboard Device, IO category # - 10 +//--------------------------------------------------------------------- + + +Device(PS2K) { + Name(_HID,EISAID("PNP0303")) // Standard Keyboard 101/102 + Name(_CID,EISAID("PNP030b")) // Compatible ID, PC/AT Enhanced Keyboard 101/102 + Method(_STA,0) { + If(And(\IOST, 0x0400)){ + Return (0x0F) + } else { + Return (0x00) + } + } + + Name(_CRS,ResourceTemplate() + { + IO(Decode16, 0x60, 0x60, 0, 0x1) //PS2 resource + IO(Decode16, 0x64, 0x64, 0, 0x1) + IRQNoFlags(){1} + }) + +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate(){ + StartDependentFn(0, 0) { + FixedIO(0x60,0x01) + FixedIO(0x64,0x01) + IRQNoFlags(){1} + } + EndDependentFn() + }) + + // Keyboard 2nd Level wake up control method + Method(_PSW, 1){ + Store(Arg0, \KBFG) + } +}// End of PS2K + +Scope(\){ + Name(\KBFG, 0x01) //Keyboard wake-up flag default enable +} +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81866/ACPI/PS2ms.asl b/Board/IO/F81866/ACPI/PS2ms.asl new file mode 100644 index 0000000..9447512 --- /dev/null +++ b/Board/IO/F81866/ACPI/PS2ms.asl @@ -0,0 +1,128 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/PS2ms.asl 1 7/20/11 4:22a Kasalinyi $ +// +// $Revision: 1 $ +// +// $Date: 7/20/11 4:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/PS2ms.asl $ +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] DeviceASL.cif +// FDC.ASL +// LPTE.ASL +// PS2kb.asl +// PS2ms.asl +// Uart1.ASL +// Uart2.ASL +// Uart3.ASL +// Uart4.ASL +// Uart5.ASL +// Uart6.ASL +// SIOH.ASL +// +// 2 3/21/11 9:43p Mikes +// Clean code +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <PS2ms.ASL> +// +// Description: Define ACPI method or namespce For Super IO +// +//<AMI_FHDR_END> +//************************************************************************* + +//**********************************************************************; +// PS2 Mouse Device, IO category # - 12 +//--------------------------------------------------------------------- +Device(PS2M) { + + Name(_HID, EISAID("PNP0F03")) // Hardware Device ID - Microsoft mouse + // check if MSFT Mouse driver supports D3 properly on all MSFT OSes. + // It may prevent OS to go to S3 sleep state + // Use Logitech _HID instead if OS rejecting to go to S3. +// Name(_HID, EISAID("PNP0F12")) // Logitech PS2 Mouse ID + Name(_CID, EISAID("PNP0F13")) // Compatible ID + + Method(_STA, 0) { + // Check if PS2Mouse detected in BIOS Post + // IOST - bit mask of enabled devices, 0x4000 - PS2M mask + If(And(\IOST, 0x4000)){ // Check if PS2MS detected in BIOS Post + Return(0x0f) + } else { + Return(0x00)// device's not present + } + } + Name(CRS1, ResourceTemplate() + { + IRQNoFlags(){12} + }) + Name(CRS2, ResourceTemplate() + { + IO(Decode16, 0x60, 0x60, 0, 0x1) + IO(Decode16, 0x64, 0x64, 0, 0x1) + IRQNoFlags(){12} + }) + Method(_CRS,0) + { + If(And(\IOST, 0x0400)){ // PS2K is present, I/O resources 0x60 & 0x64 are reserved there + Return(CRS1) + } else { // single PS/2 mouse(no PS/2 kbd), need to supply I/O resources 0x60 & 0x64 for PS/2 Controller. + Return(CRS2) + } + } + +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate(){ + StartDependentFn(0, 0) { + IRQNoFlags(){12} + } + EndDependentFn() + }) + + // Mouse 2nd Level wake up control method + Method(_PSW, 1){ + Store(Arg0, \MSFG) + } + +}// End of PS2M + +Scope(\){ + Name(\MSFG, 0x01) //Mouse wake-up flag default enable +} +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81866/ACPI/SIOH.ASL b/Board/IO/F81866/ACPI/SIOH.ASL new file mode 100644 index 0000000..5e54555 --- /dev/null +++ b/Board/IO/F81866/ACPI/SIOH.ASL @@ -0,0 +1,84 @@ +// THIS FILE IS INCLUDED to South Bridge device scope +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/SIOH.ASL 1 7/20/11 4:22a Kasalinyi $ +// +// $Revision: 1 $ +// +// $Date: 7/20/11 4:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/SIOH.ASL $ +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] DeviceASL.cif +// FDC.ASL +// LPTE.ASL +// PS2kb.asl +// PS2ms.asl +// Uart1.ASL +// Uart2.ASL +// Uart3.ASL +// Uart4.ASL +// Uart5.ASL +// Uart6.ASL +// SIOH.ASL +// +// 1 3/21/11 9:42p Mikes +// +//************************************************************************* + +//<AMI_FHDR_START> +// +// Name: <SIOH.ASL> +// +// Description: Define event handler For Super IO +// +//<AMI_FHDR_END> +//************************************************************************* +//----------------------------------------------------------------------- +// SIOH - SIO event handler, to be called from correspondent _Lxx method +// in order to serve the SIO chipset side of wake up event +//----------------------------------------------------------------------- +// input - nothing +// output - nothing +//----------------------------------------------------------------------- + Method(SIOH, 0){ + If(And(PMFG, 0x08)){ + Notify(PS2K, 0x2) //KBD Wake up + } + If(And(PMFG, 0x10)){ + Notify(PS2M, 0x2) //MOUSE Wake up + } + } //End Of _Lx PMEH +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + + diff --git a/Board/IO/F81866/ACPI/Uart1.ASL b/Board/IO/F81866/ACPI/Uart1.ASL new file mode 100644 index 0000000..3cc0609 --- /dev/null +++ b/Board/IO/F81866/ACPI/Uart1.ASL @@ -0,0 +1,121 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/Uart1.ASL 1 7/20/11 4:22a Kasalinyi $ +// +// $Revision: 1 $ +// +// $Date: 7/20/11 4:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/Uart1.ASL $ +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] DeviceASL.cif +// FDC.ASL +// LPTE.ASL +// PS2kb.asl +// PS2ms.asl +// Uart1.ASL +// Uart2.ASL +// Uart3.ASL +// Uart4.ASL +// Uart5.ASL +// Uart6.ASL +// SIOH.ASL +// +// 3 3/21/11 9:43p Mikes +// Clean code +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <UART1.ASL> +// +// Description: Define ACPI method or namespce For Super IO +// +//<AMI_FHDR_END> +//************************************************************************* +// UART1 // +// Category # :0x00 +Device(UAR1) { + Name(_HID, EISAID("PNP0501")) //PnP Device ID 16550 Type + //AMI_TODO:If UAR1 support CIR/IR mode, please use below method. + //In method UHID(), it should return HID by device mode registers. + //Method(_HID, 0) {Return(^^SIO1.UHID(0))} //PnP Device ID + + Name(_UID, 1) //Generic ID for COMA + Method(_STA, 0) {Return(^^SIO1.DSTA(0))} //Get UART status + Method(_DIS, 0) {^^SIO1.DCNT(0, 0)} //Disable UART + + Method(_CRS, 0) {Return(^^SIO1.DCRS(0, 0))} //Get UART current resources + Method(_SRS, 1) {^^SIO1.DSRS(Arg0, 0)} //Set UART recources + //AMI_TODO:If use share mode, replace with below method. + //Method(_CRS, 0) {Return(^^SIO1.DCR3(0, 0))} + //Method(_SRS, 1) {^^SIO1.DSR3(Arg0, 0)} + +//----------------------------------------------------------------------- +// UART1 Possible Resources +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x3F8, 0x3F8, 1, 8) + IRQNoFlags() {4} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x3F8, 0x3F8, 1, 8) + IRQNoFlags() {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2F8, 0x2F8, 1, 8) + IRQNoFlags() {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x3E8, 0x3E8, 1, 8) + IRQNoFlags() {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2E8, 0x2E8, 1, 8) + IRQNoFlags() {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + EndDependentFn() + }) +} // End Of UAR1 +//----------------------------------------------------------------------- + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81866/ACPI/Uart2.ASL b/Board/IO/F81866/ACPI/Uart2.ASL new file mode 100644 index 0000000..f5729c8 --- /dev/null +++ b/Board/IO/F81866/ACPI/Uart2.ASL @@ -0,0 +1,122 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/Uart2.ASL 1 7/20/11 4:22a Kasalinyi $ +// +// $Revision: 1 $ +// +// $Date: 7/20/11 4:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/Uart2.ASL $ +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] DeviceASL.cif +// FDC.ASL +// LPTE.ASL +// PS2kb.asl +// PS2ms.asl +// Uart1.ASL +// Uart2.ASL +// Uart3.ASL +// Uart4.ASL +// Uart5.ASL +// Uart6.ASL +// SIOH.ASL +// +// 3 3/21/11 9:43p Mikes +// Clean code +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <UART2.ASL> +// +// Description: Define ACPI method or namespce For Super IO +// +//<AMI_FHDR_END> +//************************************************************************* +// UART2 // +// Category # :0x01 +Device(UAR2) { + Name(_HID, EISAID("PNP0501")) //PnP Device ID 16550 Type + //AMI_TODO:If UAR2 support CIR/IR mode, please use below method. + //In method UHID(), it should return HID by device mode registers. + //Method(_HID, 0) {Return(^^SIO1.UHID(1))} //PnP Device ID + + Name(_UID, 2) //Generic ID for COMB + Method(_STA, 0) {Return(^^SIO1.DSTA(1))} //Get UART status + Method(_DIS, 0) {^^SIO1.DCNT(1, 0)} //Disable UART + + Method(_CRS, 0) {Return(^^SIO1.DCRS(1, 0))} //Get UART current resources + Method(_SRS, 1) {^^SIO1.DSRS(Arg0, 1)} //Set UART recources + //AMI_TODO:If use share mode, replace with below method. + //Method(_CRS, 0) {Return(^^SIO1.DCR3(1, 0))} + //Method(_SRS, 1) {^^SIO1.DSR3(Arg0, 1)} + +//------------------------------------------------------------------------ +// UART2 Possible Resources +//------------------------------------------------------------------------ +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x2F8, 0x2F8, 1, 8) + IRQNoFlags() {3} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x3F8, 0x3F8, 1, 8) + IRQNoFlags() {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2F8, 0x2F8, 1, 8) + IRQNoFlags() {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x3E8, 0x3E8, 1, 8) + IRQNoFlags() {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2E8, 0x2E8, 1, 8) + IRQNoFlags() {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + EndDependentFn() + }) + +} // End Of UAR2 +//----------------------------------------------------------------------- + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81866/ACPI/Uart3.ASL b/Board/IO/F81866/ACPI/Uart3.ASL new file mode 100644 index 0000000..bd99224 --- /dev/null +++ b/Board/IO/F81866/ACPI/Uart3.ASL @@ -0,0 +1,123 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/Uart3.ASL 3 2/16/12 9:18p Elviscai $ +// +// $Revision: 3 $ +// +// $Date: 2/16/12 9:18p $ +//**********************************************************************; +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/Uart3.ASL $ +// +// 3 2/16/12 9:18p Elviscai +// [TAG] EIP68967 +// [Category] Bug Fix +// [Symptom] If select the 02E8,will have a yellow bang +// [Solution] Correct the IRQ flag Edge to Level +// +// 2 2/03/12 1:33a Elviscai +// [TAG] EIPNONE +// [Category] Improvement +// [Description] Remove _PRS 0x3F8/0x3E8 from UART3/4/5/6 +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] DeviceASL.cif +// FDC.ASL +// LPTE.ASL +// PS2kb.asl +// PS2ms.asl +// Uart1.ASL +// Uart2.ASL +// Uart3.ASL +// Uart4.ASL +// Uart5.ASL +// Uart6.ASL +// SIOH.ASL +// +// 3 3/21/11 9:43p Mikes +// Clean code +//**********************************************************************; +// UART3 // +// Category # :0x11 +Device(UAR3) { + Name(_HID, EISAID("PNP0501")) //PnP Device ID 16550 Type + //AMI_TODO:If UAR3 support CIR/IR mode, please use below method. + //In method UHID(), it should return HID by device mode registers. + //Method(_HID, 0) {Return(^^SIO1.UHID(0x11))} //PnP Device ID + + Name(_UID, 3) //Generic ID for COMC + Method(_STA, 0) {Return(^^SIO1.DSTA(0x11))} //Get UART status + Method(_DIS, 0) {^^SIO1.DCNT(0x11, 0)} //Disable UART + + //Default is share mode + Method(_CRS, 0) {Return(^^SIO1.DCR3(0x11, 0))} //Get UART current resources + Method(_SRS, 1) {^^SIO1.DSR3(Arg0, 0x11)} //Set UART recources + //AMI_TODO:If use non-share mode, replace with below method. + //Method(_CRS, 0) {Return(^^SIO1.DCRS(0x11, 0))} //Get UART current resources + //Method(_SRS, 1) {^^SIO1.DSRS(Arg0, 0x11)} //Set UART recources + +//----------------------------------------------------------------------- +// UART3 Possible Resources +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x3E8, 0x3E8, 1, 8) + IRQ(Level,ActiveLow,Shared) {7} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x3E8, 0x3E8, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2E8, 0x2E8, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2F0, 0x2F0, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2E0, 0x2E0, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + EndDependentFn() + }) + +} // End Of UAR3 +//----------------------------------------------------------------------- + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81866/ACPI/Uart4.ASL b/Board/IO/F81866/ACPI/Uart4.ASL new file mode 100644 index 0000000..38863d1 --- /dev/null +++ b/Board/IO/F81866/ACPI/Uart4.ASL @@ -0,0 +1,117 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/Uart4.ASL 2 2/03/12 1:34a Elviscai $ +// +// $Revision: 2 $ +// +// $Date: 2/03/12 1:34a $ +//**********************************************************************; +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/Uart4.ASL $ +// +// 2 2/03/12 1:34a Elviscai +// [TAG] EIPNONE +// [Category] Improvement +// [Description] Remove _PRS 0x3F8/0x3E8 from UART3/4/5/6 +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] DeviceASL.cif +// FDC.ASL +// LPTE.ASL +// PS2kb.asl +// PS2ms.asl +// Uart1.ASL +// Uart2.ASL +// Uart3.ASL +// Uart4.ASL +// Uart5.ASL +// Uart6.ASL +// SIOH.ASL +// +// 3 3/21/11 9:43p Mikes +// Clean code +//**********************************************************************; +// UART4 // +// Category # :0x12 +Device(UAR4) { + Name(_HID, EISAID("PNP0501")) //PnP Device ID 16550 Type + //AMI_TODO:If UAR4 support CIR/IR mode, please use below method. + //In method UHID(), it should return HID by device mode registers. + //Method(_HID, 0) {Return(^^SIO1.UHID(0x12))} //PnP Device ID + + Name(_UID, 4) //Generic ID for COMD + Method(_STA, 0) {Return(^^SIO1.DSTA(0x12))} //Get UART status + Method(_DIS, 0) {^^SIO1.DCNT(0x12, 0)} //Disable UART + + //Default is share mode + Method(_CRS, 0) {Return(^^SIO1.DCR3(0x12, 0))} //Get UART current resources + Method(_SRS, 1) {^^SIO1.DSR3(Arg0, 0x12)} //Set UART recources + //AMI_TODO:If use non-share mode, replace with below method. + //Method(_CRS, 0) {Return(^^SIO1.DCRS(0x12, 0))} //Get UART current resources + //Method(_SRS, 1) {^^SIO1.DSRS(Arg0, 0x12)} //Set UART recources + +//----------------------------------------------------------------------- +// UART4 Possible Resources +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x2E8, 0x2E8, 1, 8) + IRQ(Level,ActiveLow,Shared) {7} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x3E8, 0x3E8, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2E8, 0x2E8, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2F0, 0x2F0, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2E0, 0x2E0, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + EndDependentFn() + }) + +} // End Of UAR4 +//----------------------------------------------------------------------- + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81866/ACPI/Uart5.ASL b/Board/IO/F81866/ACPI/Uart5.ASL new file mode 100644 index 0000000..ad81de4 --- /dev/null +++ b/Board/IO/F81866/ACPI/Uart5.ASL @@ -0,0 +1,117 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/Uart5.ASL 2 2/03/12 1:34a Elviscai $ +// +// $Revision: 2 $ +// +// $Date: 2/03/12 1:34a $ +//**********************************************************************; +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/Uart5.ASL $ +// +// 2 2/03/12 1:34a Elviscai +// [TAG] EIPNONE +// [Category] Improvement +// [Description] Remove _PRS 0x3F8/0x3E8 from UART3/4/5/6 +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] DeviceASL.cif +// FDC.ASL +// LPTE.ASL +// PS2kb.asl +// PS2ms.asl +// Uart1.ASL +// Uart2.ASL +// Uart3.ASL +// Uart4.ASL +// Uart5.ASL +// Uart6.ASL +// SIOH.ASL +// +// 3 3/21/11 9:43p Mikes +// Clean code +//**********************************************************************; +// UART5 // +// Category # :0x13 +Device(UAR5) { + Name(_HID, EISAID("PNP0501")) //PnP Device ID 16550 Type + //AMI_TODO:If UAR5 support CIR/IR mode, please use below method. + //In method UHID(), it should return HID by device mode registers. + //Method(_HID, 0) {Return(^^SIO1.UHID(0x13))} //PnP Device ID + + Name(_UID, 5) //Generic ID for COME + Method(_STA, 0) {Return(^^SIO1.DSTA(0x13))} //Get UART status + Method(_DIS, 0) {^^SIO1.DCNT(0x13, 0)} //Disable UART + + //Default is share mode + Method(_CRS, 0) {Return(^^SIO1.DCR3(0x13, 0))} //Get UART current resources + Method(_SRS, 1) {^^SIO1.DSR3(Arg0, 0x13)} //Set UART recources + //AMI_TODO:If use non-share mode, replace with below method. + //Method(_CRS, 0) {Return(^^SIO1.DCRS(0x13, 0))} //Get UART current resources + //Method(_SRS, 1) {^^SIO1.DSRS(Arg0, 0x13)} //Set UART recources + +//----------------------------------------------------------------------- +// UART3 Possible Resources +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x2F0, 0x2F0, 1, 8) + IRQ(Level,ActiveLow,Shared) {10} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x3E8, 0x3E8, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2E8, 0x2E8, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2F0, 0x2F0, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2E0, 0x2E0, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + EndDependentFn() + }) + +} // End Of UAR3 +//----------------------------------------------------------------------- + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81866/ACPI/Uart6.ASL b/Board/IO/F81866/ACPI/Uart6.ASL new file mode 100644 index 0000000..0377b3c --- /dev/null +++ b/Board/IO/F81866/ACPI/Uart6.ASL @@ -0,0 +1,117 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/Uart6.ASL 2 2/03/12 1:35a Elviscai $ +// +// $Revision: 2 $ +// +// $Date: 2/03/12 1:35a $ +//**********************************************************************; +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Device ASL Files/Uart6.ASL $ +// +// 2 2/03/12 1:35a Elviscai +// [TAG] EIPNONE +// [Category] Improvement +// [Description] Remove _PRS 0x3F8/0x3E8 from UART3/4/5/6 +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] DeviceASL.cif +// FDC.ASL +// LPTE.ASL +// PS2kb.asl +// PS2ms.asl +// Uart1.ASL +// Uart2.ASL +// Uart3.ASL +// Uart4.ASL +// Uart5.ASL +// Uart6.ASL +// SIOH.ASL +// +// 3 3/21/11 9:43p Mikes +// Clean code +//**********************************************************************; +// UART6 // +// Category # :0x14 +Device(UAR6) { + //Name(_HID, EISAID("PNP0501")) //PnP Device ID 16550 Type + //AMI_TODO:If UAR4 support CIR/IR mode, please use below method. + //In method UHID(), it should return HID by device mode registers. + Method(_HID, 0) {Return(^^SIO1.UHID(0x14))} //PnP Device ID + + Name(_UID, 6) //Generic ID for COMF + Method(_STA, 0) {Return(^^SIO1.DSTA(0x14))} //Get UART status + Method(_DIS, 0) {^^SIO1.DCNT(0x14, 0)} //Disable UART + + //Default is share mode + Method(_CRS, 0) {Return(^^SIO1.DCR3(0x14, 0))} //Get UART current resources + Method(_SRS, 1) {^^SIO1.DSR3(Arg0, 0x14)} //Set UART recources + //AMI_TODO:If use non-share mode, replace with below method. + //Method(_CRS, 0) {Return(^^SIO1.DCRS(0x14, 0))} //Get UART current resources + //Method(_SRS, 1) {^^SIO1.DSRS(Arg0, 0x14)} //Set UART recources + +//----------------------------------------------------------------------- +// UART4 Possible Resources +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x2E0, 0x2E0, 1, 8) + IRQ(Level,ActiveLow,Shared) {10} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x3E8, 0x3E8, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2E8, 0x2E8, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2F0, 0x2F0, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x2E0, 0x2E0, 1, 8) + IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + EndDependentFn() + }) + +} // End Of UAR4 +//----------------------------------------------------------------------- + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81866/BSP/BSP.cif b/Board/IO/F81866/BSP/BSP.cif new file mode 100644 index 0000000..04b5810 --- /dev/null +++ b/Board/IO/F81866/BSP/BSP.cif @@ -0,0 +1,13 @@ +<component> + name = "F81866 Board" + category = ModulePart + LocalRoot = "Board\IO\F81866\BSP\" + RefName = "F81866Board" +[files] +"OemIoDecode.c" +"PeiIoTable.h" +"DxeIoTable.h" +"F81866HwmOemHooks.c" +"F81866SmartFan.c" +<endComponent> + diff --git a/Board/IO/F81866/BSP/DxeIoTable.h b/Board/IO/F81866/BSP/DxeIoTable.h new file mode 100644 index 0000000..d56f42d --- /dev/null +++ b/Board/IO/F81866/BSP/DxeIoTable.h @@ -0,0 +1,165 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Board/DxeIoTable.h 1 7/20/11 4:22a Kasalinyi $ +// +// $Revision: 1 $ +// +// $Date: 7/20/11 4:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Board/DxeIoTable.h $ +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] BSP.cif +// OemIoDecode.c +// PeiIoTable.h +// DxeIoTable.h +// F81866HwmOemHooks.c +// F81866SmartFan.c +// +// 4 3/21/11 9:44p Mikes +// Seperate the core and oem job +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: DxeIoTable.C +// +// Description: +// SIO init table in DXE phase. Any customers have to review below tables +// for themselves platform and make sure each initialization is necessary. +// +// Notes: +// In all tables, only fill with necessary setting. Don't fill with default +// +//<AMI_FHDR_END> +//************************************************************************* +#ifndef _DXEIoTable_H +#define _DXEIoTable_H +#ifdef __cplusplus +extern "C" { +#endif +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- +typedef struct _DXE_DEVICE_INIT_DATA{ + UINT16 Reg16; + UINT8 AndData8; // 0xFF means register don't need AndMask + // only write OrData8 to regisrer. + UINT8 OrData8; +} DXE_DEVICE_INIT_DATA; + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: DXE_XXX_Init_Table +// +// Description: +// Table filled with SIO GPIO,PME,HWM, etc. logical devices' setting +// For example: +// 1. GPIO will define the GPIO pin useage +// 2. PME will power management control +// 3. HWM will set temperature, fan, voltage and start control. +// +// Notes: +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> + +DXE_DEVICE_INIT_DATA DXE_COM_Mode_Init_Table[] = { + // ----------------------------- + //| Reg16 | AndData8 | OrData8 | + // ----------------------------- + // OEM_TODO: Base on OEM board. + // Program COM RS485/RS232 Mode Registers. + {0xF0, 0xCF, (F81866_COM1_RS485_Mode << 4)| (F81866_COM1_RS485_RTS_INV << 5)}, //make no effect when com1 disabled + {0xF0, 0xCF, (F81866_COM2_RS485_Mode << 4)| (F81866_COM2_RS485_RTS_INV << 5)}, //make no effect when com2 disabled + {0xF0, 0xCF, (F81866_COM3_RS485_Mode << 4)| (F81866_COM3_RS485_RTS_INV << 5)}, //make no effect when com3 disabled + {0xF0, 0xCF, (F81866_COM4_RS485_Mode << 4)| (F81866_COM4_RS485_RTS_INV << 5)}, //make no effect when com4 disabled + {0xF0, 0xCF, (F81866_COM5_RS485_Mode << 4)| (F81866_COM5_RS485_RTS_INV << 5)}, //make no effect when com5 disabled + {0xF0, 0xCF, (F81866_COM6_RS485_Mode << 4)| (F81866_COM6_RS485_RTS_INV << 5)}, //make no effect when com6 disabled +}; + +//------------------------------------------------------------------------- +// HWM registers init table. +//------------------------------------------------------------------------- +#if F81866_HWM_PRESENT +DXE_DEVICE_INIT_DATA DXE_HWM_Init_Table_After_Active[] = { + + // ----------------------------- + //| Reg16 | AndData8 | OrData8 | + // ----------------------------- + // Configuration Setting + {0x01, 0xF8, 0x03}, // Configuration Register ? Index 01h + + // PECI/TSI/SMBus Setting +#if (F81866_PECI_SUPPORT) + {0x0A, 0xDE, (F81866_INTEL_SEL << 5) | F81866_PECI_EN }, + {0x09, 0x01, F81866_I2C_ADDR & 0xFE }, +#endif +#if (F81866_IBEX_SUPPORT) + {0x0A, 0xDD, (F81866_INTEL_SEL << 5) | (F81866_IBEX_EN << 1)}, + {0x08, 0x01, F81866_SMBUS_ADDR & 0xFE}, + {0xEE, 0xFF, 0x41}, + {0xED, 0xFF, 0x40}, +#endif + + //PECI 3.0 & Temperture Setting + {0x6B, 0xF9, (F81866_T2_MODE << 2) | (F81866_T1_MODE << 1) }, + + //Fan type Setting +#if F81866_SMF_PRESENT + {0x94, 0xC0, (FAN3_TYPE<<4)|(FAN2_TYPE<<2)|FAN1_TYPE }, +#endif +}; //DXE_HWM_Init_Table + + +// Define a table for BootScriptTable of SIO space +UINT8 DXE_HWM_SIO_BootScript_Table[] = { + 0x01,0x08,0x09,0x0A,0x0D,0x6B,0x94,0xEE,0xED +}; +#endif + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif //_DXEIoTable_H +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Board/IO/F81866/BSP/F81866HwmOemHooks.c b/Board/IO/F81866/BSP/F81866HwmOemHooks.c new file mode 100644 index 0000000..0ffa3c6 --- /dev/null +++ b/Board/IO/F81866/BSP/F81866HwmOemHooks.c @@ -0,0 +1,733 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Board/F81866HwmOemHooks.c 1 7/20/11 4:22a Kasalinyi $ +// +// $Revision: 1 $ +// +// $Date: 7/20/11 4:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Board/F81866HwmOemHooks.c $ +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] BSP.cif +// OemIoDecode.c +// PeiIoTable.h +// DxeIoTable.h +// F81866HwmOemHooks.c +// F81866SmartFan.c +// +// 1 3/21/11 9:44p Mikes +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81866HwmOemHooks.c> +// +// Description: This is related to individual HHM devices. +// +//<AMI_FHDR_END> +//************************************************************************* +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- +#include "..\F81866Setup.H" +#include <AmiLib.h> +#include <AmiDxeLib.h> + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- +void +GetValueWithIO ( + IN UINT8 BankNo, + IN UINT8 Register, + OUT UINTN *Value +); + +////////////////////////////////////////////////////////////////////////////// +////////////OEM PORTING REQUIRED/////////////OEM PORTING REQUIRED///////////// +////////////////////////////////////////////////////////////////////////////// +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateTemperature1 +// +// Description: +// Get Temperature1 value in HWM space register and update to HII. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateTemperature1( + IN OUT HWM_DATA * Data +) +{ + UINTN T1; + + Data->Token = STRING_TOKEN(STR_F81866_SYSTEM_TEMP1_VALUE); + Data->Type = TEMPERATURE; + Data->OddPos = 0x00; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0x72,&T1); // Bank0 Register 0x72. + Data->Value = (UINT16)T1; + + + return; +} + + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateTemperature2 +// +// Description: +// Get the second System temperature value in HWM space register and update +// to HII. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateTemperature2 ( + IN OUT HWM_DATA * Data + ) +{ + UINTN T1; + + Data->Token = STRING_TOKEN(STR_F81866_SYSTEM_TEMP2_VALUE); + Data->Type = TEMPERATURE; + Data->OddPos = 0x00; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0x74,&T1); // Bank0 Register 0x74. + Data->Value = (UINT16)T1; + + return; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateTemperature3 +// +// Description: +// Get the second System temperature value in HWM space register and update +// to Hii. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateTemperature3 ( + IN OUT HWM_DATA * Data + ) +{ + UINTN T1; + + Data->Token = STRING_TOKEN(STR_F81866_SYSTEM_TEMP3_VALUE); + Data->Type = TEMPERATURE; + Data->OddPos = 0x00; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0x7E,&T1); // Bank0 Register 0x7E. + Data->Value = (UINT16)T1; + + return; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateTemperature4 +// +// Description: +// Get the second System temperature value in HWM space register and update +// to HII. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None + +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateTemperature4 ( + IN OUT HWM_DATA * Data + ) +{ + UINTN T1; + + Data->Token = STRING_TOKEN(STR_F81866_SYSTEM_TEMP4_VALUE); + Data->Type = TEMPERATURE; + Data->OddPos = 0x00; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0x7A,&T1); // Bank0 Register 0x7A. + Data->Value = (UINT16)T1; + + return; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateTemperature5 +// +// Description: +// Get the second System temperature value in HWM space register and update +// to HII. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None + +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateTemperature5 ( + IN OUT HWM_DATA * Data + ) +{ + UINTN T1; + + Data->Token = STRING_TOKEN(STR_F81866_SYSTEM_TEMP5_VALUE); + Data->Type = TEMPERATURE; + Data->OddPos = 0x00; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0x7B,&T1); // Bank0 Register 0x7B. + Data->Value = (UINT16)T1; + + return; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateTemperature6 +// +// Description: +// Get the second System temperature value in HWM space register and update +// to HII. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None + +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateTemperature6 ( + IN OUT HWM_DATA * Data + ) +{ + UINTN T1; + + Data->Token = STRING_TOKEN(STR_F81866_SYSTEM_TEMP6_VALUE); + Data->Type = TEMPERATURE; + Data->OddPos = 0x00; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0x7C,&T1); // Bank0 Register 0x7C. + Data->Value = (UINT16)T1; + + return; +} + + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateFan1Speed +// +// Description: +// Get the First FAN Speed value in HWM space register and update it to HII. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None + +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateFan1Speed ( + IN OUT HWM_DATA * Data + ) +{ + UINTN Speed; + UINTN Divisor; + + Data->Token = STRING_TOKEN(STR_F81866_FAN1_SPEED_VALUE); + Data->Type = FAN_SPEED; + Data->OddPos = 0x00; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0xA0,&Speed); // Register 0xA0 + Divisor = (UINT8)Speed << 8; + GetValueWithIO(0x00,0xA1,&Speed); // Register 0xA1 + Divisor |= (UINT8) Speed; + if( (Divisor == 0xFFFF) || (Divisor == 0x0FFF) || (Divisor == 0 )) { + Speed = 0; + } else { + Speed = (UINTN)1500000/Divisor; + } + Data->Value = (UINT16)Speed; + + return; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateFan2Speed +// +// Description: +// Get FAN2 Speed value in HWM space register and update it to HII. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateFan2Speed ( + IN OUT HWM_DATA * Data + ) +{ + UINTN Speed; + UINTN Divisor; + + Data->Token = STRING_TOKEN(STR_F81866_FAN2_SPEED_VALUE); + Data->Type = FAN_SPEED; + Data->OddPos = 0x00; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0xB0,&Speed); // Register 0xA0 + Divisor = (UINT8)Speed << 8; + GetValueWithIO(0x00,0xB1,&Speed); // Register 0xA1 + Divisor |= (UINT8) Speed; + + if( (Divisor == 0xFFFF) || (Divisor == 0x0FFF) || (Divisor == 0 )) { + Speed = 0; + } else { + Speed = (UINTN)1500000/Divisor; + } + + Data->Value = (UINT16)Speed; + + return; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateFan3Speed +// +// Description: +// Get FAN2 Speed value in HWM space register. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateFan3Speed ( + IN OUT HWM_DATA * Data + ) +{ + UINTN Speed; + UINTN Divisor; + + Data->Token = STRING_TOKEN(STR_F81866_FAN3_SPEED_VALUE); + Data->Type = FAN_SPEED; + Data->OddPos = 0x00; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0xC0,&Speed); // Register 0xA0 + Divisor = (UINT8)Speed << 8; + GetValueWithIO(0x00,0xC1,&Speed); // Register 0xA1 + Divisor |= (UINT8) Speed; + + if( (Divisor == 0xFFFF) || (Divisor == 0x0FFF) || (Divisor == 0 )) { + Speed = 0; + } else { + Speed = (UINTN)1500000/Divisor; + } + Data->Value = (UINT16)Speed; + + return; +} + + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateVIN1Voltage +// +// Description: Get the Voltage value in HWM space register. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateVIN1Voltage ( + IN OUT HWM_DATA * Data + ) +{ + UINTN VIN1; + + Data->Token = STRING_TOKEN(STR_F81866_HMM_VIN1_VALUE); + Data->Type = VOLTAGE; + Data->OddPos = 0x03; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0x21,&VIN1) ; // Register 0x21 + VIN1 = VIN1*8; + + Data->Value = (UINT16)VIN1; + + return; + +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateVIN2Voltage +// +// Description: Get the Voltage value in HWM space register. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateVIN2Voltage ( + IN OUT HWM_DATA * Data + ) +{ + UINTN VIN2; + + Data->Token = STRING_TOKEN(STR_F81866_HMM_VIN2_VALUE); + Data->Type = VOLTAGE; + Data->OddPos = 0x03; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0x22,&VIN2) ; // Register 0x22 + VIN2 = VIN2*8*(20+47)/47; + Data->Value = (UINT16)VIN2; + + return; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateVIN3Voltage +// +// Description: +// Get the Voltage value in HWM space register. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateVIN3Voltage ( + IN OUT HWM_DATA * Data + ) +{ + UINTN VIN3; + + Data->Token = STRING_TOKEN(STR_F81866_HMM_VIN3_VALUE); + Data->Type = VOLTAGE; + Data->OddPos = 0x03; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0x23,&VIN3) ; // Register 0x23 + VIN3 = VIN3*8; + Data->Value = (UINT16)VIN3; + + return; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateVIN4Voltage +// +// Description: +// Get the Voltage value in HWM space register. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateVIN4Voltage ( + IN OUT HWM_DATA * Data + ) +{ + UINTN VIN4; + + Data->Token = STRING_TOKEN(STR_F81866_HMM_VIN4_VALUE); + Data->Type = VOLTAGE; + Data->OddPos = 0x03; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0x24,&VIN4) ; // Register 0x24 + VIN4 = VIN4*8*(100+100)/100; + Data->Value = (UINT16)VIN4; + + return; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateVSB5VVoltage +// +// Description: +// Get the Voltage value in HWM space register. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateVSB5VVoltage ( + IN OUT HWM_DATA * Data +) +{ + UINTN VSB5V; + + Data->Token = STRING_TOKEN(STR_F81866_HMM_VSB5V_VALUE); + Data->Type = VOLTAGE; + Data->OddPos = 0x03; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0x27,&VSB5V) ; // Register 0x27 + VSB5V = VSB5V*8*2; + Data->Value = (UINT16)VSB5V; + + return; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateVCC3VVoltage +// +// Description: +// Get the Voltage value in HWM space register. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None + +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateVCC3VVoltage ( + IN OUT HWM_DATA * Data +) +{ + UINTN VCC3V; + + Data->Token = STRING_TOKEN(STR_F81866_HMM_VCC3V_VALUE); + Data->Type = VOLTAGE; + Data->OddPos = 0x03; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0x20,&VCC3V) ; // Register 0x20 + VCC3V = VCC3V * 8 * 2; + + Data->Value = (UINT16)VCC3V; + + return; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateVSB3VVoltage +// +// Description: +// Get the Voltage value in HWM space register. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None + +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateVSB3VVoltage ( + IN OUT HWM_DATA * Data + ) +{ + UINTN VSB3V; + + Data->Token = STRING_TOKEN(STR_F81866_HMM_VSB3V_VALUE); + Data->Type = VOLTAGE; + Data->OddPos = 0x03; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0x25,&VSB3V) ; // Register 0x25 + VSB3V = VSB3V * 8 * 2 ; + + Data->Value = (UINT16)VSB3V; + + return; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetAndUpdateVBATVoltage +// +// Description: +// Get the Voltage value in HWM space register. +// +// Input: +// UINTN IN OUT HWM_DATA * Data +// +// Output: +// None + +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetAndUpdateVBATVoltage ( + IN OUT HWM_DATA * Data +) +{ + UINTN VBAT; + + Data->Token = STRING_TOKEN(STR_F81866_HMM_VBAT_VALUE); + Data->Type = VOLTAGE; + Data->OddPos = 0x03; + + //OEM_TODO:Get value with HWM IO interface + GetValueWithIO(0x00,0x26,&VBAT) ; // Register 0x26 + VBAT = VBAT*8*2; + Data->Value = (UINT16)VBAT; + + return; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: GetValueWithIO +// +// Description: +// Get the register value form HWM space register. +// +// Input: +// UINT8 BankNo, +// UINT8 Register -> Register who content the wanted value +// UINTN *Value -> Register value +// +// Output: +// None +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void +GetValueWithIO ( + IN UINT8 BankNo, + IN UINT8 Register, + OUT UINTN *Value +) +{ + + // Enter Bank NO! + + //Read the data from register + IoWrite8(F81866_HWM_BASE_ADDRESS+0x05, Register); + *Value = IoRead8(F81866_HWM_BASE_ADDRESS+0x06); + return; +} + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Board/IO/F81866/BSP/F81866SmartFan.c b/Board/IO/F81866/BSP/F81866SmartFan.c new file mode 100644 index 0000000..674a73e --- /dev/null +++ b/Board/IO/F81866/BSP/F81866SmartFan.c @@ -0,0 +1,467 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2008, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Board/F81866SmartFan.c 1 7/20/11 4:23a Kasalinyi $Revision: +// +// $Date: +//************************************************************************* +// Revision History +// ---------------- +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81866SmartFan.c> +// +// Description: This is related to individual Smart Fan functions. +// +//<AMI_FHDR_END> +//************************************************************************* +#include <Efi.h> +#include <Token.h> +#include <AmiLib.h> +#include <Setup.h> +#include <AmiDxeLib.h> +#include <Protocol\BootScriptSave.h> +#define HWM_CONFIG_INDEX F81866_HWM_BASE_ADDRESS+5 +#define HWM_CONFIG_DATA F81866_HWM_BASE_ADDRESS+6 +SETUP_DATA SetupData; +static EFI_EVENT gEvtReadyToBoot = NULL; +static EFI_GUID gEfiBootScriptSaveGuid = EFI_BOOT_SCRIPT_SAVE_GUID; + +typedef struct _DXE_SMF_INIT_DATA{ + UINT8 Reg8; + UINT8 AndData8; + UINT8 OrData8; +} DXE_SMF_INIT_DATA; + +typedef struct _S3_SAVE_DATA{ + UINT8 Bank; + UINT8 Reg8; +} S3_SAVE_DATA; +//---------------------------------------------------------------------------------------------- +// smart system fan registers need init AfterActivate. !!!AfterActivate +//---------------------------------------------------------------------------------------------- +DXE_SMF_INIT_DATA DXE_FAN1_INIT_TABLE[] = { + {0x96, 0xFC, 0x00}, + {0xA2, 0xFF, 0x00}, + {0xA3, 0xFF, 0x00}, + {0xA6, 0xFF, 0x00}, + {0xA7, 0xFF, 0x00}, + {0xA8, 0xFF, 0x00}, + {0xA9, 0XFF, 0x00}, + {0xAB, 0xFF, 0x00}, + {0xAC, 0xFF, 0x00}, + {0xAD, 0xFF, 0x00}, + {0xAE, 0xFF, 0x00}, +}; + +DXE_SMF_INIT_DATA DXE_FAN2_INIT_TABLE[] = { + {0x96, 0xF3, 0x00}, + {0xB2, 0xFF, 0x00}, + {0xB3, 0xFF, 0x00}, + {0xB6, 0xFF, 0x00}, + {0xB7, 0xFF, 0x00}, + {0xB8, 0xFF, 0x00}, + {0xB9, 0XFF, 0x00}, + {0xBB, 0xFF, 0x00}, + {0xBC, 0xFF, 0x00}, + {0xBD, 0xFF, 0x00}, + {0xBE, 0xFF, 0x00}, +}; + +DXE_SMF_INIT_DATA DXE_FAN3_INIT_TABLE[] = { + {0x96, 0xCF, 0x00}, + {0xC2, 0xFF, 0x00}, + {0xC3, 0xFF, 0x00}, + {0xC6, 0xFF, 0x00}, + {0xC7, 0xFF, 0x00}, + {0xC8, 0xFF, 0x00}, + {0xC9, 0XFF, 0x00}, + {0xCB, 0xFF, 0x00}, + {0xCC, 0xFF, 0x00}, + {0xCD, 0xFF, 0x00}, + {0xCE, 0xFF, 0x00}, +}; + +S3_SAVE_DATA HwmS3SaveRegisterTbl[] = { +// ---------------------- +//| Bank | Reg8 | +// ---------------------- + {0x00,0x94}, + {0x00,0x96}, + {0x00,0xA2}, + {0x00,0xA3}, + {0x00,0xA6}, + {0x00,0xA7}, + {0x00,0xA8}, + {0x00,0xA9}, + {0x00,0xAB}, + {0x00,0xAC}, + {0x00,0xAD}, + {0x00,0xAE}, + {0x00,0xB2}, + {0x00,0xB3}, + {0x00,0xB6}, + {0x00,0xB7}, + {0x00,0xB8}, + {0x00,0xB9}, + {0x00,0xBB}, + {0x00,0xBC}, + {0x00,0xBD}, + {0x00,0xBE}, + {0x00,0xC2}, + {0x00,0xC3}, + {0x00,0xC6}, + {0x00,0xC7}, + {0x00,0xC8}, + {0x00,0xC9}, + {0x00,0xCB}, + {0x00,0xCC}, + {0x00,0xCD}, + {0x00,0xCE}, +}; +//-------------------------------------------------------------------------- +// Definition of smart fan functions +//-------------------------------------------------------------------------- +VOID F81866SmartFunction (VOID); +static VOID SmartFanFuncStart(VOID); +static VOID F81866_SMF1_INIT(void); +static VOID F81866_SMF2_INIT(void); +static VOID F81866_SMF3_INIT(void); +static void F81866_SMF_WRITE_CFG(DXE_SMF_INIT_DATA DXE_SMF_MODEx_Table); +static EFI_STATUS HwmCallbackReadyToBoot( + IN EFI_EVENT Event, + IN VOID *Context); +//<AMI_PHDR_START> +//--------------------------------------------------------------------------- +// Procedure: F81866SmartFunction +// +// Description: This function initializes the IT8783 in BDS phase +// +// Input: +// IN EFI_HANDLE ImageHandle +// IN EFI_SYSTEM_TABLE SystemTable +// +// Output: Status +// +//--------------------------------------------------------------------------- +//<AMI_PHDR_END> + +VOID F81866SmartFunction (VOID) +{ + EFI_STATUS Status = EFI_SUCCESS; + UINTN Size = sizeof(SETUP_DATA); + EFI_GUID SetupGuid = SETUP_GUID; + + //Get Setup variable + Status=pRS->GetVariable( L"Setup", &SetupGuid, NULL, &Size, &SetupData); + if(Status != EFI_SUCCESS) return; + + //Init the smart fan function + if(SetupData.SmartFanEnable) + SmartFanFuncStart(); +} + +//<AMI_PHDR_START> +//--------------------------------------------------------------------------- +// Procedure: SmartFanFuncStart +// +// Description: This function start to initialize the smart fan function +// +// Input: NULL +// +// +// Output: NULL +// +//--------------------------------------------------------------------------- +//<AMI_PHDR_END> +static VOID SmartFanFuncStart(VOID) +{ + EFI_STATUS Status; + //-------------------------------------------------------------------------- + // Before speed control, program neccessary registers if needed. + //-------------------------------------------------------------------------- + + //-------------------------------------------------------------------------- + // Start to program the smart fan mode + //-------------------------------------------------------------------------- + F81866_SMF1_INIT(); + F81866_SMF2_INIT(); + F81866_SMF3_INIT(); + //Create event for boot script + Status = CreateReadyToBootEvent( + TPL_NOTIFY, + HwmCallbackReadyToBoot, + NULL, + &gEvtReadyToBoot + ); + ASSERT_EFI_ERROR(Status); +} + +//<AMI_PHDR_START> +//--------------------------------------------------------------------------- +// Procedure: F81866_SMF1_INIT +// +// Description: This function do smart fan1 config +// +// Input: NULL +// +// +// Output: NULL +// +//--------------------------------------------------------------------------- +//<AMI_PHDR_END> +void F81866_SMF1_INIT(VOID) +{ + UINT8 i, temp; + switch (SetupData.Fan1SmartFanMode) { + case 0: + DXE_FAN1_INIT_TABLE[0].OrData8 = 0x02;//mode + DXE_FAN1_INIT_TABLE[1].OrData8 = (UINT8)(1500000/SetupData.Fan1Mode0FixedSpeed >> 8);//mode + DXE_FAN1_INIT_TABLE[2].OrData8 = (UINT8)(1500000/SetupData.Fan1Mode0FixedSpeed & 0xFF);//mode + break; + case 1: + DXE_FAN1_INIT_TABLE[0].OrData8 = 0x03;//mode + DXE_FAN1_INIT_TABLE[2].OrData8 = (UINT8)SetupData.Fan1Mode1FixedDuty*0xFF/100;//mode + break; + case 2: + DXE_FAN1_INIT_TABLE[0].OrData8 = 0x00;//mode + DXE_FAN1_INIT_TABLE[3].OrData8 = SetupData.Fan1Mode2AutoRpmT1; + DXE_FAN1_INIT_TABLE[4].OrData8 = SetupData.Fan1Mode2AutoRpmT2; + DXE_FAN1_INIT_TABLE[5].OrData8 = SetupData.Fan1Mode2AutoRpmT3; + DXE_FAN1_INIT_TABLE[6].OrData8 = SetupData.Fan1Mode2AutoRpmT4; + DXE_FAN1_INIT_TABLE[7].OrData8 = (UINT8)((100-SetupData.Fan1Mode2AutoRpmF1)*32/60); + DXE_FAN1_INIT_TABLE[8].OrData8 = (UINT8)((100-SetupData.Fan1Mode2AutoRpmF2)*32/60); + DXE_FAN1_INIT_TABLE[9].OrData8 = (UINT8)((100-SetupData.Fan1Mode2AutoRpmF3)*32/60); + DXE_FAN1_INIT_TABLE[10].OrData8 = (UINT8)((100-SetupData.Fan1Mode2AutoRpmF4)*32/60); + break; + case 3: + DXE_FAN1_INIT_TABLE[0].OrData8 = 0x01;//mode + DXE_FAN1_INIT_TABLE[3].OrData8 = SetupData.Fan1Mode3AutoDutyT1; + DXE_FAN1_INIT_TABLE[4].OrData8 = SetupData.Fan1Mode3AutoDutyT2; + DXE_FAN1_INIT_TABLE[5].OrData8 = SetupData.Fan1Mode3AutoDutyT3; + DXE_FAN1_INIT_TABLE[6].OrData8 = SetupData.Fan1Mode3AutoDutyT4; + DXE_FAN1_INIT_TABLE[7].OrData8 = (UINT8)(SetupData.Fan1Mode3AutoDutyF1*0xFF/100); + DXE_FAN1_INIT_TABLE[8].OrData8 = (UINT8)(SetupData.Fan1Mode3AutoDutyF2*0xFF/100); + DXE_FAN1_INIT_TABLE[9].OrData8 = (UINT8)(SetupData.Fan1Mode3AutoDutyF3*0xFF/100); + DXE_FAN1_INIT_TABLE[10].OrData8 = (UINT8)(SetupData.Fan1Mode3AutoDutyF4*0xFF/100); + break; + default: + break; + } + for(i=0; i<( (sizeof(DXE_FAN1_INIT_TABLE))/(sizeof(DXE_SMF_INIT_DATA)) ); i++) { + IoWrite8(HWM_CONFIG_INDEX, DXE_FAN1_INIT_TABLE[i].Reg8 ); + if(DXE_FAN1_INIT_TABLE[i].AndData8 == 0xFF) { + temp = DXE_FAN1_INIT_TABLE[i].OrData8; + } else { + temp = IoRead8(HWM_CONFIG_DATA); + temp &= DXE_FAN1_INIT_TABLE[i].AndData8; + temp |= DXE_FAN1_INIT_TABLE[i].OrData8; + } + IoWrite8(HWM_CONFIG_DATA, temp); + } +} + +//<AMI_PHDR_START> +//--------------------------------------------------------------------------- +// Procedure: F81866_SMF2_INIT +// +// Description: This function do smart fan2 config +// +// Input: NULL +// +// +// Output: NULL +// +//--------------------------------------------------------------------------- +//<AMI_PHDR_END> +void F81866_SMF2_INIT(VOID) +{ + UINT8 i, temp; + switch (SetupData.Fan2SmartFanMode) { + case 0: + DXE_FAN2_INIT_TABLE[0].OrData8 = 0x02 << 2;//mode + DXE_FAN2_INIT_TABLE[1].OrData8 = (UINT8)(1500000/SetupData.Fan2Mode0FixedSpeed >> 8);//mode + DXE_FAN2_INIT_TABLE[2].OrData8 = (UINT8)(1500000/SetupData.Fan2Mode0FixedSpeed & 0xFF);//mode + break; + case 1: + DXE_FAN2_INIT_TABLE[0].OrData8 = 0x03 << 2;//mode + DXE_FAN2_INIT_TABLE[2].OrData8 = (UINT8)(SetupData.Fan2Mode1FixedDuty*0xFF/100);//mode + break; + case 2: + DXE_FAN2_INIT_TABLE[0].OrData8 = 0x00 << 2;//mode + DXE_FAN2_INIT_TABLE[3].OrData8 = SetupData.Fan2Mode2AutoRpmT1; + DXE_FAN2_INIT_TABLE[4].OrData8 = SetupData.Fan2Mode2AutoRpmT2; + DXE_FAN2_INIT_TABLE[5].OrData8 = SetupData.Fan2Mode2AutoRpmT3; + DXE_FAN2_INIT_TABLE[6].OrData8 = SetupData.Fan2Mode2AutoRpmT4; + DXE_FAN2_INIT_TABLE[7].OrData8 = (UINT8)((100-SetupData.Fan2Mode2AutoRpmF1)*32/60); + DXE_FAN2_INIT_TABLE[8].OrData8 = (UINT8)((100-SetupData.Fan2Mode2AutoRpmF2)*32/60); + DXE_FAN2_INIT_TABLE[9].OrData8 = (UINT8)((100-SetupData.Fan2Mode2AutoRpmF3)*32/60); + DXE_FAN2_INIT_TABLE[10].OrData8 = (UINT8)((100-SetupData.Fan2Mode2AutoRpmF4)*32/60); + break; + case 3: + DXE_FAN2_INIT_TABLE[0].OrData8 = 0x01 << 2;//mode + DXE_FAN2_INIT_TABLE[3].OrData8 = SetupData.Fan2Mode3AutoDutyT1; + DXE_FAN2_INIT_TABLE[4].OrData8 = SetupData.Fan2Mode3AutoDutyT2; + DXE_FAN2_INIT_TABLE[5].OrData8 = SetupData.Fan2Mode3AutoDutyT3; + DXE_FAN2_INIT_TABLE[6].OrData8 = SetupData.Fan2Mode3AutoDutyT4; + DXE_FAN2_INIT_TABLE[7].OrData8 = (UINT8)(SetupData.Fan2Mode3AutoDutyF1*0xFF/100); + DXE_FAN2_INIT_TABLE[8].OrData8 = (UINT8)(SetupData.Fan2Mode3AutoDutyF2*0xFF/100); + DXE_FAN2_INIT_TABLE[9].OrData8 = (UINT8)(SetupData.Fan2Mode3AutoDutyF3*0xFF/100); + DXE_FAN2_INIT_TABLE[10].OrData8 = (UINT8)(SetupData.Fan2Mode3AutoDutyF4*0xFF/100); + break; + default: + break; + } + for(i=0; i<( (sizeof(DXE_FAN2_INIT_TABLE))/(sizeof(DXE_SMF_INIT_DATA)) ); i++) { + IoWrite8(HWM_CONFIG_INDEX, DXE_FAN2_INIT_TABLE[i].Reg8 ); + if(DXE_FAN2_INIT_TABLE[i].AndData8 == 0xFF) { + temp = DXE_FAN2_INIT_TABLE[i].OrData8; + } else { + temp = IoRead8(HWM_CONFIG_DATA); + temp &= DXE_FAN2_INIT_TABLE[i].AndData8; + temp |= DXE_FAN2_INIT_TABLE[i].OrData8; + } + IoWrite8(HWM_CONFIG_DATA, temp); + } +} + +//<AMI_PHDR_START> +//--------------------------------------------------------------------------- +// Procedure: F81866_SMF3_INIT +// +// Description: This function do smart fan3 config +// +// Input: NULL +// +// +// Output: NULL +// +//--------------------------------------------------------------------------- +//<AMI_PHDR_END> +void F81866_SMF3_INIT(VOID) +{ + UINT8 i, temp; + switch (SetupData.Fan3SmartFanMode) { + case 0: + DXE_FAN3_INIT_TABLE[0].OrData8 = 0x02 << 4;//mode + DXE_FAN3_INIT_TABLE[1].OrData8 = (UINT8)(1500000/SetupData.Fan3Mode0FixedSpeed >> 8);//mode + DXE_FAN3_INIT_TABLE[2].OrData8 = (UINT8)(1500000/SetupData.Fan3Mode0FixedSpeed & 0xFF);//mode + break; + case 1: + DXE_FAN3_INIT_TABLE[0].OrData8 = 0x03 << 4;//mode + DXE_FAN3_INIT_TABLE[2].OrData8 = (UINT8)(SetupData.Fan3Mode1FixedDuty*0xFF/100);//mode + break; + case 2: + DXE_FAN3_INIT_TABLE[0].OrData8 = 0x00 << 4;//mode + DXE_FAN3_INIT_TABLE[3].OrData8 = SetupData.Fan3Mode2AutoRpmT1; + DXE_FAN3_INIT_TABLE[4].OrData8 = SetupData.Fan3Mode2AutoRpmT2; + DXE_FAN3_INIT_TABLE[5].OrData8 = SetupData.Fan3Mode2AutoRpmT3; + DXE_FAN3_INIT_TABLE[6].OrData8 = SetupData.Fan3Mode2AutoRpmT4; + DXE_FAN3_INIT_TABLE[7].OrData8 = (UINT8)((100-SetupData.Fan3Mode2AutoRpmF1)*32/60); + DXE_FAN3_INIT_TABLE[8].OrData8 = (UINT8)((100-SetupData.Fan3Mode2AutoRpmF2)*32/60); + DXE_FAN3_INIT_TABLE[9].OrData8 = (UINT8)((100-SetupData.Fan3Mode2AutoRpmF3)*32/60); + DXE_FAN3_INIT_TABLE[10].OrData8 = (UINT8)((100-SetupData.Fan3Mode2AutoRpmF4)*32/60); + break; + case 3: + DXE_FAN3_INIT_TABLE[0].OrData8 = 0x01 << 4;//mode + DXE_FAN3_INIT_TABLE[3].OrData8 = SetupData.Fan3Mode3AutoDutyT1; + DXE_FAN3_INIT_TABLE[4].OrData8 = SetupData.Fan3Mode3AutoDutyT2; + DXE_FAN3_INIT_TABLE[5].OrData8 = SetupData.Fan3Mode3AutoDutyT3; + DXE_FAN3_INIT_TABLE[6].OrData8 = SetupData.Fan3Mode3AutoDutyT4; + DXE_FAN3_INIT_TABLE[7].OrData8 = (UINT8)(SetupData.Fan3Mode3AutoDutyF1*0xFF/100); + DXE_FAN3_INIT_TABLE[8].OrData8 = (UINT8)(SetupData.Fan3Mode3AutoDutyF2*0xFF/100); + DXE_FAN3_INIT_TABLE[9].OrData8 = (UINT8)(SetupData.Fan3Mode3AutoDutyF3*0xFF/100); + DXE_FAN3_INIT_TABLE[10].OrData8 = (UINT8)(SetupData.Fan3Mode3AutoDutyF4*0xFF/100); + break; + default: + break; + } + for(i=0; i<( (sizeof(DXE_FAN3_INIT_TABLE))/(sizeof(DXE_SMF_INIT_DATA)) ); i++) { + IoWrite8(HWM_CONFIG_INDEX, DXE_FAN3_INIT_TABLE[i].Reg8 ); + if(DXE_FAN3_INIT_TABLE[i].AndData8 == 0xFF) { + temp = DXE_FAN3_INIT_TABLE[i].OrData8; + } else { + temp = IoRead8(HWM_CONFIG_DATA); + temp &= DXE_FAN3_INIT_TABLE[i].AndData8; + temp |= DXE_FAN3_INIT_TABLE[i].OrData8; + } + IoWrite8(HWM_CONFIG_DATA, temp); + } +} + +//<AMI_PHDR_START> +//--------------------------------------------------------------------------- +// Procedure: HwmCallbackReadyToBoot +// +// Description: This function save registers for S3 +// +// Input: NULL +// +// +// Output: NULL +// +//--------------------------------------------------------------------------- +//<AMI_PHDR_END> +static EFI_STATUS HwmCallbackReadyToBoot( + IN EFI_EVENT Event, + IN VOID *Context) +{ + EFI_BOOT_SCRIPT_SAVE_PROTOCOL *bss; + EFI_STATUS Status; + UINT8 bank_reg,bank,r,v,i; + + Status = pBS->LocateProtocol(&gEfiBootScriptSaveGuid,NULL,&bss); + if(EFI_ERROR(Status)) return Status; + + // record the register from table into boot script + for (i=0; i < ((sizeof(HwmS3SaveRegisterTbl))/(sizeof(S3_SAVE_DATA))); i++) { + bank = HwmS3SaveRegisterTbl[i].Bank; + bank_reg = 0x4e; + r = HwmS3SaveRegisterTbl[i].Reg8; + + //select bank + IoWrite8(HWM_CONFIG_INDEX, bank_reg); + IoWrite8(HWM_CONFIG_DATA, bank); + //select register to read actual data + IoWrite8(HWM_CONFIG_INDEX, r); + v = IoRead8(HWM_CONFIG_DATA); + //save to s3 bootscrip table + BOOT_SCRIPT_S3_IO_WRITE_MACRO(bss,EfiBootScriptWidthUint8,HWM_CONFIG_INDEX, 1, &bank_reg); + BOOT_SCRIPT_S3_IO_WRITE_MACRO(bss,EfiBootScriptWidthUint8,HWM_CONFIG_DATA, 1, &bank); + + BOOT_SCRIPT_S3_IO_WRITE_MACRO(bss,EfiBootScriptWidthUint8,HWM_CONFIG_INDEX, 1, &r); + BOOT_SCRIPT_S3_IO_WRITE_MACRO(bss,EfiBootScriptWidthUint8,HWM_CONFIG_DATA, 1, &v); + } + + return Status; +} + + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2008, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Board/IO/F81866/BSP/OemIoDecode.c b/Board/IO/F81866/BSP/OemIoDecode.c new file mode 100644 index 0000000..e114211 --- /dev/null +++ b/Board/IO/F81866/BSP/OemIoDecode.c @@ -0,0 +1,411 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Board/OemIoDecode.c 1 7/20/11 4:22a Kasalinyi $ +// +// $Revision: 1 $ +// +// $Date: 7/20/11 4:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Board/OemIoDecode.c $ +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] BSP.cif +// OemIoDecode.c +// PeiIoTable.h +// DxeIoTable.h +// F81866HwmOemHooks.c +// F81866SmartFan.c +// +// 3 3/21/11 9:44p Mikes +// Seperate the core and oem job +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <OemIoDecode.c> +// +// Description: This file provides a interface to decode any IO resource used +// by IO module. In the interface, has provided some sample codes, but +// only for reference. The sample code is based on some old chipsets. You +// must check your platform and re-program the function. +// You also can call chipset IO decode function with token IODECODETYPE. +// +// Notes: +// !!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!! +// This sample is not for any chipset, please, re-program the function base +// on your porject. +// !!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!! +// +//<AMI_FHDR_END> +//************************************************************************* +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- +#include <Efi.h> +#include <Token.h> +#include <Protocol\PciIo.h> +#include <Protocol\AmiSio.h> + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- +#define ICH_LPC_IO_DECODE_OFFSET 0x80 +#define ICH_LPC_IO_ENABLE_OFFSET 0x82 +#define ICH_LPC_REG_GEN1_DEC_OFFSET 0x84 +#define SIO_SB_BUS_NUMBER 0x00 +#define SIO_SB_DEV_NUMBER 0x1F +#define SIO_SB_FUNC_NUMBER 0x00 +#define LPC_PCI_ADDR (UINT32)(BIT31 | (SIO_SB_BUS_NUMBER << 16) | (SIO_SB_DEV_NUMBER << 11) | (SIO_SB_FUNC_NUMBER << 8)) + +EFI_STATUS CSP_SetLpcGenericDecoding ( + IN EFI_PCI_IO_PROTOCOL *LpcPciIo, + IN UINT16 Base, + IN UINT16 Length, + IN BOOLEAN Enable ); + +VOID static RWPciReg16 ( + IN UINT32 dNumOfBusDevFunc, + IN UINT16 Reg, + IN UINT16 SetData, + IN UINT16 MaskData ); + +VOID static WritePciReg32 ( + IN UINT32 dNumOfBusDevFunc, + IN UINT16 Reg, + IN UINT32 Value32 ); + +UINT32 static ReadPciReg32 ( + IN UINT32 dNumOfBusDevFunc, + IN UINT16 Reg ); +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: RWPciReg16 +// +// Description: +// This function read or write PCI 16bit register +// +// Input: +// UINT32 dNumOfBusDevFunc - Content the BUS DEV and FUNC number to be used +// UINT16 Reg +// UINT16 SetData +// UINT16 MaskData +// +// Output: +// NONE +// +// Notes: +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +static VOID RWPciReg16 ( + IN UINT32 dNumOfBusDevFunc, + IN UINT16 Reg, + IN UINT16 SetData, + IN UINT16 MaskData ) +{ + UINT16 Value16; + + dNumOfBusDevFunc |= (UINT32)(Reg & ~3); + + IoWrite32(0xcf8, dNumOfBusDevFunc); + Value16 = IoRead16(0xcfc | (UINT8)(Reg & 2)); + + IoWrite32(0xcf8, dNumOfBusDevFunc); + IoWrite16(0xcfc | (UINT8)(Reg & 2), (Value16 & MaskData) | SetData); + +} +//<AMI_PHDR_START> +//---------------------------------------------------------------------- +// Procedure: WritePciReg32 +// +// Description: This function write PCI 32bit register +// +// Input: +// UINT32 dNumOfBusDevFunc - Content the BUS DEV and FUNC number to be used. +// UINT16 Reg +// UINT32 Value32 +// +// Output: +// NONE +// +// Notes: +// +//---------------------------------------------------------------------- +//<AMI_PHDR_END> +static VOID WritePciReg32 ( + IN UINT32 dNumOfBusDevFunc, + IN UINT16 Reg, + IN UINT32 Value32 ) +{ + //BIT31 | (SIO_SB_BUS_NUM << 16) | (SIO_SB_DEV_NUM << 11) | (SIO_SB_FUNC_NUM << 8) | (Reg & 0xfc); + dNumOfBusDevFunc |= (UINT32)(Reg & ~3); + IoWrite32(0xcf8, dNumOfBusDevFunc); + IoWrite32(0xcfc, Value32); +} + +//<AMI_PHDR_START> +//---------------------------------------------------------------------- +// Procedure: ReadPciReg32 +// +// Description: This function read PCI 32bit register +// +// Input: +// UINT32 dNumOfBusDevFunc - Content the BUS DEV and FUNC number to be used. +// UINT16 Reg +// +// Output: +// NONE +// +// Notes: +// +//---------------------------------------------------------------------- +//<AMI_PHDR_END> +static UINT32 ReadPciReg32 ( + IN UINT32 dNumOfBusDevFunc, + IN UINT16 Reg ) +{ + //BIT31 | (SIO_SB_BUS_NUM << 16) | (SIO_SB_DEV_NUM << 11) | (SIO_SB_FUNC_NUM << 8) | (Reg & 0xfc); + dNumOfBusDevFunc |= (UINT32)(Reg & ~3); + IoWrite32(0xcf8, dNumOfBusDevFunc); + return IoRead32(0xcfc); +} +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: CSP_SetLpcDeviceDecoding +// +// Description: +// This function goes through the elinked list of identify functions +// giving control when the token "IODECODETYPE == 1". +// +// Input: +// Base - I/O base address +// Base=0 means disable the decode of the device +// DevUid - The device Unique ID +// If type is 0xFF, DevUid contain the IO length +// Type - Device type +// If type is 0xFF, DevUid contain the IO length +// +// Output: +// EFI_SUCCESS - Set successfully. +// EFI_INVALID_PARAMETER - the Input parameter is invalid. +// +// Notes: +// Chipset porting should provide the Io Ranage decode function. +// If chipset porting provide this function, set IODECODETYPE = 0. +// If chipset porting doesn't provide this function, you can eLink your +// function to IoRangeDecodeList or replace CSP_SetLpcDeviceDecoding elink +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS CSP_SetLpcDeviceDecoding( + IN EFI_PCI_IO_PROTOCOL *LpcPciIo, + IN UINT16 Base, + IN UINT8 DevUid, + IN SIO_DEV_TYPE Type) +{ + EFI_STATUS Status = EFI_UNSUPPORTED; + UINT16 IoRangeMask16 = 0xffff; + UINT16 IoRangeSet16 = 0; + UINT16 IoEnMask16 = 0xffff; + UINT16 IoEnSet16 = 0; + switch (Base) { + //disable device decode + case 0: + switch(Type) { + case dsFDC:IoEnMask16 &= ~BIT03;break; + case dsLPT:IoEnMask16 &= ~BIT02;break; + case dsUART: + if(DevUid == 0) + IoEnMask16 &= ~BIT00;break;//disable coma + if(DevUid == 1) + IoEnMask16 &= ~BIT01;break;//disable comb + case dsPS2K: + case dsPS2CK:IoEnMask16 &= ~BIT10;break;//disable kbc + case dsGAME: + if(DevUid == 0) + IoEnMask16 &= ~BIT08;break;//disable game1 + if(DevUid == 1) + IoEnMask16 &= ~BIT09;break;//disable game2 + } + break; + // FDC Address Range + case 0x3f0:IoEnSet16 |= BIT03;IoRangeMask16 &= ~BIT12;IoRangeSet16 |= (0 << 12);break; + case 0x370:IoEnSet16 |= BIT03;IoRangeMask16 &= ~BIT12;IoRangeSet16 |= (1 << 12);break; + // LPT Address Range + case 0x378:IoEnSet16 |= BIT02;IoRangeMask16 &= ~(BIT09 | BIT08);IoRangeSet16 |= (0 << 8);break; + case 0x278:IoEnSet16 |= BIT02;IoRangeMask16 &= ~(BIT09 | BIT08);IoRangeSet16 |= (1 << 8);break; + case 0x3bc:IoEnSet16 |= BIT02;IoRangeMask16 &= ~(BIT09 | BIT08);IoRangeSet16 |= (2 << 8);break; + + // ComA Address Range + case 0x3f8:if(DevUid == 0) {IoEnSet16 |= BIT00;IoRangeMask16 &= ~(BIT02 | BIT01 | BIT00);IoRangeSet16 |= 0;break;} + if(DevUid == 1) {IoEnSet16 |= BIT01;IoRangeMask16 &= ~(BIT06 | BIT05 | BIT04);IoRangeSet16 |= (0 << 4);break;} + case 0x2f8:if(DevUid == 0) {IoEnSet16 |= BIT00;IoRangeMask16 &= ~(BIT02 | BIT01 | BIT00);IoRangeSet16 |= 1;break;} + if(DevUid == 1) {IoEnSet16 |= BIT01;IoRangeMask16 &= ~(BIT06 | BIT05 | BIT04);IoRangeSet16 |= (1 << 4);break;} + case 0x220:if(DevUid == 0) {IoEnSet16 |= BIT00;IoRangeMask16 &= ~(BIT02 | BIT01 | BIT00);IoRangeSet16 |= 2;break;} + if(DevUid == 1) {IoEnSet16 |= BIT01;IoRangeMask16 &= ~(BIT06 | BIT05 | BIT04);IoRangeSet16 |= (2 << 4);break;} + case 0x228:if(DevUid == 0) {IoEnSet16 |= BIT00;IoRangeMask16 &= ~(BIT02 | BIT01 | BIT00);IoRangeSet16 |= 3;break;} + if(DevUid == 1) {IoEnSet16 |= BIT01;IoRangeMask16 &= ~(BIT06 | BIT05 | BIT04);IoRangeSet16 |= (3 << 4);break;} + case 0x238:if(DevUid == 0) {IoEnSet16 |= BIT00;IoRangeMask16 &= ~(BIT02 | BIT01 | BIT00);IoRangeSet16 |= 4;break;} + if(DevUid == 1) {IoEnSet16 |= BIT01;IoRangeMask16 &= ~(BIT06 | BIT05 | BIT04);IoRangeSet16 |= (4 << 4);break;} + case 0x2e8:if(DevUid == 0) {IoEnSet16 |= BIT00;IoRangeMask16 &= ~(BIT02 | BIT01 | BIT00);IoRangeSet16 |= 5;break;} + if(DevUid == 1) {IoEnSet16 |= BIT01;IoRangeMask16 &= ~(BIT06 | BIT05 | BIT04);IoRangeSet16 |= (5 << 4);break;} + case 0x338:if(DevUid == 0) {IoEnSet16 |= BIT00;IoRangeMask16 &= ~(BIT02 | BIT01 | BIT00);IoRangeSet16 |= 6;break;} + if(DevUid == 1) {IoEnSet16 |= BIT01;IoRangeMask16 &= ~(BIT06 | BIT05 | BIT04);IoRangeSet16 |= (6 << 4);break;} + case 0x3e8:if(DevUid == 0) {IoEnSet16 |= BIT00;IoRangeMask16 &= ~(BIT02 | BIT01 | BIT00);IoRangeSet16 |= 7;break;} + if(DevUid == 1) {IoEnSet16 |= BIT01;IoRangeMask16 &= ~(BIT06 | BIT05 | BIT04);IoRangeSet16 |= (7 << 4);break;} + + + // KBC Address Enable + case 0x60: + case 0x64:IoEnSet16 |= BIT10;break; + case 0x62: + case 0x66: IoEnSet16 |= BIT11;break; + // Game Port Address Enable + case 0x200:IoEnSet16 |= BIT08;break; + case 0x208:IoEnSet16 |= BIT09;break; + // LPC CFG Address Enable + case 0x2e: IoEnSet16 |= BIT12;break; + case 0x4e: IoEnSet16 |= BIT13;break; + default:if(Type == 0xff) {//!!!Attention!!!If type is 0xFF, DevUid contain the IO length + return CSP_SetLpcGenericDecoding(LpcPciIo, \ + Base , \ + DevUid, \ + TRUE ); + }else return EFI_UNSUPPORTED; + + } + RWPciReg16(LPC_PCI_ADDR,ICH_LPC_IO_DECODE_OFFSET, IoRangeSet16, IoRangeMask16); //0X82 + RWPciReg16(LPC_PCI_ADDR,ICH_LPC_IO_ENABLE_OFFSET, IoEnSet16, IoEnMask16); //0X84 + // Porting End + + return EFI_SUCCESS; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: CSP_SetLpcGenericDecoding +// +// Description: +// This function set LPC Bridge Generic Decoding +// +// Input: +// *LpcPciIo - Pointer to LPC PCI IO Protocol +// Base - I/O base address +// Length - I/O Length +// Enabled - Enable/Disable the generic decode range register +// +// Output: +// EFI_SUCCESS - Set successfully. +// EFI_UNSUPPORTED - This function is not implemented or the +// Length more than the maximum supported +// size of generic range decoding. +// EFI_INVALID_PARAMETER - the Input parameter is invalid. +// EFI_OUT_OF_RESOURCES - There is not available Generic +// Decoding Register. +// EFI_NOT_FOUND - the generic decode range will be disabled +// is not found. +// +// Notes: +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS CSP_SetLpcGenericDecoding ( + IN EFI_PCI_IO_PROTOCOL *LpcPciIo, + IN UINT16 Base, + IN UINT16 Length, + IN BOOLEAN Enable ) +{ + // Porting Required + UINT32 IoGenDecode32; + UINT16 IoGenDecIndex; + UINT16 Buffer16; + UINT8 Bsf8 = 0; + UINT8 Bsr8 = 0; + + if (Length > 0x100) return EFI_UNSUPPORTED; + + if (Length == 0) return EFI_INVALID_PARAMETER; + + if (Length < 4) Length = 4; + + + // Read I/O Generic Decodes Register. + for (IoGenDecIndex = 0; IoGenDecIndex < 4; IoGenDecIndex++) { + IoGenDecode32 = ReadPciReg32(LPC_PCI_ADDR,ICH_LPC_REG_GEN1_DEC_OFFSET + IoGenDecIndex * 4); + if (Enable) { + if ((IoGenDecode32 & 1) == 0) break; + else if ((IoGenDecode32 & 0xfffc) == Base) break; + } else { + if (((IoGenDecode32 & 0xfffc) == Base) && (IoGenDecode32 & 1)) { + IoGenDecode32 = 0; // Disable & clear the base/mask fields + break; + } + } + } + + if (Enable) { + if (IoGenDecIndex == 4) return EFI_OUT_OF_RESOURCES; + + Buffer16 = Length; + while ((Buffer16 % 2) == 0) { + Buffer16 /= 2; + Bsf8++; + } + + while (Length) { + Length >>= 1; + Bsr8++; + } + + if (Bsf8 == (Bsr8 - 1)) Bsr8--; + + Length = (1 << Bsr8) - 1 ; + + Base &= (~Length); + + IoGenDecode32 = Base | (UINT32)((Length >> 2) << 18) | 1; + + } else { + if (IoGenDecIndex == 4) return EFI_NOT_FOUND; + } + + WritePciReg32(LPC_PCI_ADDR,ICH_LPC_REG_GEN1_DEC_OFFSET + IoGenDecIndex * 4, IoGenDecode32); + // Porting End + + return EFI_SUCCESS; + +} + + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Board/IO/F81866/BSP/PeiIoTable.h b/Board/IO/F81866/BSP/PeiIoTable.h new file mode 100644 index 0000000..5bda076 --- /dev/null +++ b/Board/IO/F81866/BSP/PeiIoTable.h @@ -0,0 +1,332 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866 Board/PeiIoTable.h 5 9/16/12 9:38p Elviscai $ +// +// $Revision: 5 $ +// +// $Date: 9/16/12 9:38p $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866 Board/PeiIoTable.h $ +// +// 5 9/16/12 9:38p Elviscai +// [TAG] EIPNONE +// [Category] Bug Fix +// [Solution] Remove token control, LDN05h index FEh bit7& bit4 to ¡°0¡± +// as fixed. +// +// 4 2/16/12 9:22p Elviscai +// [TAG] EIP82572 +// [Category] Improvement +// [Description] Remove PS2 SWAP auto detection according Spec v0.13 +// +// 3 2/09/12 5:23a Kasalinyi +// [TAG] EIP82488 +// [Category] Improvement +// [Description] Fintek Workaround +// [Files] PeiIoTable.h +// +// 2 2/03/12 1:29a Elviscai +// [TAG] EIP68967 +// [Category] Improvement +// [Description] Correct UART/LPT/FDC muti-function pin definations. +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] BSP.cif +// OemIoDecode.c +// PeiIoTable.h +// DxeIoTable.h +// F81866HwmOemHooks.c +// F81866SmartFan.c +// +// 4 3/21/11 9:44p Mikes +// Seperate the core and oem job +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: PeiIoTable.C +// +// Description: +// SIO init table in PEI phase. Any customers have to review below tables +// for themselves platform and make sure each initialization is necessary. +// +// Notes: +// +//<AMI_FHDR_END> +//************************************************************************* +#ifndef _PEIIoTable_H +#define _PEIIoTable_H +#ifdef __cplusplus +extern "C" { +#endif + +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- +typedef struct _IO_DECODE_DATA{ + UINT16 BaseAdd; + //!!!Attention!!!If type is 0xFF, UID is a IO legth + UINT8 UID; + SIO_DEV_TYPE Type; +} IO_DECODE_DATA; + +typedef struct _SIO_DATA{ + UINT16 Addr; + //AND mask value, 0xFF means register don't need AndMask and + //only write OrData8 to regisrer. + UINT8 DataMask; + //OR mask value. + UINT8 DataValue; +} SIO_DATA; + +// SIO DECODE list creation code must be in this order +typedef EFI_STATUS (IO_RANGE_DECODE)( +// IN void *LpcPciIo, + IN EFI_PCI_IO_PROTOCOL *LpcPciIo, + IN UINT16 DevBase, + IN UINT8 UID, + IN SIO_DEV_TYPE Type +); + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: F81866_Decode_Table +// +// Description: +// Table filled with SIO IO resource to decode. It is used +// for PEI IO Decode function. For example: +// 1. Decode Index/data port +// 2. Decode KBC,FDC IO for recovery +// 3. Decode COM port for debug +// 4. Decode total IO base for runtime, pme, acpi, etc... +// 5. Decode more com ports wirh "generic IO range decode" +// +// Notes: +// Attention! Cann't open 3F6(it was used by IDE controller.) +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> +IO_DECODE_DATA F81866_Decode_Table[]={ + // ----------------------------- + //| BaseAdd | UID | Type | + // ----------------------------- + {F81866_CONFIG_INDEX, 2, 0xFF}, + //Below decode is for DEBUG Mode + #if defined(EFI_DEBUG) || (defined(Recovery_SUPPORT) && (SERIAL_RECOVERY_SUPPORT)) + #if (F81866_SERIAL_PORT0_PRESENT) + {F81866_SERIAL_PORT0_BASE_ADDRESS, 0, dsUART}, + #endif + #endif + //Below decode is for recovery mode + #if defined(Recovery_SUPPORT) && (Recovery_SUPPORT) + #if (F81866_KEYBOARD_PRESENT) + {0x60, 0, dsPS2K}, // KBC decode + #endif + #if (F81866_FLOPPY_PORT_PRESENT) + {0x3F0, 0, dsFDC}, // FDC decode + #endif + #endif + //Below decode is for SIO generic IO decode + #if defined(F81866_TOTAL_BASE_ADDRESS) && (F81866_TOTAL_BASE_ADDRESS != 0) + {F81866_TOTAL_BASE_ADDRESS, F81866_TOTAL_LENGTH, 0xFF}, + #endif + // !!!!Attention!!!!This is necessary + //OEM_TODO//OEM_TODO//OEM_TODO//OEM_TODO + // If your com port number > 2 , you'd add more table for more com ports. + {0x3E0, 0x10, 0xFF}, // 0x3E0~0x3F0 , open a IODecode section for UART3 4 + {0x2E0, 0x20, 0xFF}, // 0x2E0~0x2FF , open a IODecode section for UART5 6 + // Add more OEM IO decode below. +}; + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: F81866_PEI_Init_Table +// +// Description: Table filled with SIO logical devices' register value. +// Only do the necessary initialization. For example: +// 1. Program clock and multi-pin setting in global registers +// 2. Program KBC,FDC IO for recovery +// 3. Program COM port for debug +// +// Notes: +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> +SIO_DATA F81866_PEI_Init_Table[] = { + // ----------------------------- + //| Addr | DataMask | DataValue | + // ----------------------------- + + //--------------------------------------------------------------------- + // Enter Configuration Mode. + //--------------------------------------------------------------------- + {F81866_CONFIG_INDEX, 0xFF, F81866_CONFIG_MODE_ENTER_VALUE}, + {F81866_CONFIG_INDEX, 0xFF, F81866_CONFIG_MODE_ENTER_VALUE}, + + //--------------------------------------------------------------------- + // Before init all logical devices, program Global register if needed. + //--------------------------------------------------------------------- + {F81866_CONFIG_INDEX, 0xFF, 0x26}, + {F81866_CONFIG_DATA, 0x3F, F81866_CLOCK << 6}, + #if (F81866_SERIAL_PORT2_PRESENT) + {F81866_CONFIG_INDEX, 0xFF, 0x29}, + {F81866_CONFIG_DATA, 0xCF, 0x30}, + #endif + #if (F81866_SERIAL_PORT3_PRESENT) + {F81866_CONFIG_INDEX, 0xFF, 0x29}, + {F81866_CONFIG_DATA, 0x3F, 0xC0}, + #endif + #if (F81866_MOUSE_PRESENT) + {F81866_CONFIG_INDEX, 0xFF, 0x28}, + {F81866_CONFIG_DATA, 0xEF, 0x00}, + #endif + #if (F81866_SERIAL_PORT4_PRESENT) + {F81866_CONFIG_INDEX, 0xFF, 0x28}, + {F81866_CONFIG_DATA, 0xB3, 0x0C}, + #endif + #if (F81866_SERIAL_PORT5_PRESENT) + {F81866_CONFIG_INDEX, 0xFF, 0x28}, + {F81866_CONFIG_DATA, 0xBC, 0x03}, + #endif + #if (F81866_PARALLEL_PORT_PRESENT) + {F81866_CONFIG_INDEX, 0xFF, 0x28}, + {F81866_CONFIG_DATA, 0xDF, 0x00}, + {F81866_CONFIG_INDEX, 0xFF, 0x2B}, + {F81866_CONFIG_DATA, 0xFC, 0x00}, + #endif + #if (F81866_FLOPPY_PORT_PRESENT) + {F81866_CONFIG_INDEX, 0xFF, 0x28}, + {F81866_CONFIG_DATA, 0xB0, 0x00}, + #endif + // Enable PS/2 KB/MS Wake-up Function + #if (F81866_KEYBOARD_PRESENT) + {F81866_CONFIG_INDEX, 0xFF, 0x2D}, + {F81866_CONFIG_DATA, 0xF7, 0x0F}, + #endif + + //--------------------------------------------------------------------- + // Initialize the Serial Port for debug useage. Default is COMA + //--------------------------------------------------------------------- + #if defined(EFI_DEBUG) || (defined(Recovery_SUPPORT) && (SERIAL_RECOVERY_SUPPORT)) + #if (F81866_SERIAL_PORT0_PRESENT) + // Select device + {F81866_CONFIG_INDEX, 0xFF, F81866_LDN_SEL_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, F81866_LDN_UART1}, + // Program Base Addr + {F81866_CONFIG_INDEX, 0xFF, F81866_BASE1_LO_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, (UINT8)(F81866_SERIAL_PORT0_BASE_ADDRESS & 0xFF)}, + {F81866_CONFIG_INDEX, 0xFF, F81866_BASE1_HI_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, (UINT8)(F81866_SERIAL_PORT0_BASE_ADDRESS >> 8)}, + // Activate Device + {F81866_CONFIG_INDEX, 0xFF, F81866_ACTIVATE_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, F81866_ACTIVATE_VALUE}, + #endif // F81866_SERIAL_PORT0_PRESENT + #endif // #ifdef EFI_DEBUG + + //--------------------------------------------------------------------- + // Initialize the KeyBoard and floppy controller for Recovery + //--------------------------------------------------------------------- + #if defined(Recovery_SUPPORT) && (Recovery_SUPPORT) + #if (F81866_KEYBOARD_PRESENT) + // Seclect device KEYBOARD + {F81866_CONFIG_INDEX, 0xFF, F81866_LDN_SEL_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, F81866_LDN_PS2K}, + // Program Base Addr + {F81866_CONFIG_INDEX, 0xFF, F81866_BASE1_HI_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, 0x00}, + {F81866_CONFIG_INDEX, 0xFF, F81866_BASE1_LO_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, 0x60}, + // Program Interrupt + {F81866_CONFIG_INDEX, 0xFF, F81866_IRQ1_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, 0x01}, + // Activate Device + {F81866_CONFIG_INDEX, 0xFF, F81866_ACTIVATE_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, F81866_ACTIVATE_VALUE}, + #endif //F81866_KEYBOARD_PRESENT + + #if (F81866_FLOPPY_PORT_PRESENT) + // Seclect device FLOPPY + {F81866_CONFIG_INDEX, 0xFF, F81866_LDN_SEL_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, F81866_LDN_FDC}, + // Program Base Addr + {F81866_CONFIG_INDEX, 0xFF, F81866_BASE1_HI_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, 0x03}, + {F81866_CONFIG_INDEX, 0xFF, F81866_BASE1_LO_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, 0xF0}, + // Program Interrupt + {F81866_CONFIG_INDEX, 0xFF, F81866_IRQ1_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, 0x06}, + // Activate Device + {F81866_CONFIG_INDEX, 0xFF, F81866_ACTIVATE_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, F81866_ACTIVATE_VALUE}, + #endif //F81866_FLOPPY_PORT_PRESENT + #endif //#if defined(Recovery_SUPPORT) && (Recovery_SUPPORT == 1) + + //--------------------------------------------------------------------- + // Program and initialize some logical device if needed. + //--------------------------------------------------------------------- + // Seclect device KEYBOARD + {F81866_CONFIG_INDEX, 0xFF, F81866_LDN_SEL_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, F81866_LDN_PS2K}, + // >>EIP82488 [Fintek Workaround]:system will hangs up during RAID1 reboot aging with PS2KB + // >>EIPNONE LDN05h index FEh bit7& bit4 to "0". + {F81866_CONFIG_INDEX, 0xFF, 0xFE}, + {F81866_CONFIG_DATA, 0x63, 0x0C},//set bit2,bit3=1 1 + // >>EIPNONE + // <<EIP82488 + //--------------------------------------------------------------------- + // After init all logical devices, program Global register if needed. + //--------------------------------------------------------------------- + + //--------------------------------------------------------------------- + // After init all logical devices, Exit Configuration Mode. + //--------------------------------------------------------------------- + {F81866_CONFIG_INDEX, 0xFF, F81866_CONFIG_MODE_EXIT_VALUE}, +}; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif //_PEIIoTable_H +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Board/IO/F81866/F81866.ASL b/Board/IO/F81866/F81866.ASL new file mode 100644 index 0000000..52b326e --- /dev/null +++ b/Board/IO/F81866/F81866.ASL @@ -0,0 +1,902 @@ +// THIS FILE IS INCLUDED to South Bridge device scope +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866.ASL 3 4/01/13 3:20a Elviscai $ +// +// $Revision: 3 $ +// +// $Date: 4/01/13 3:20a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866.ASL $ +// +// 3 4/01/13 3:20a Elviscai +// [TAG] EIP115780 +// [Category] Bug Fix +// [Symptom] Burn in test faile while dual IO using same idex/data port +// [RootCause] Method DSTA retrned before exit config mode. +// +// 2 2/03/12 1:59a Elviscai +// Remove unused PME name block. +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] F81866.CIF +// IO_F81866.SDL +// F81866.ASL +// F81866.MAK +// F81866.SD +// F81866.UNI +// F81866DXE.C +// F81866PEI.C +// F81866PeiDebugger.C +// F81866Setup.C +// F81866Setup.H +// History.txt +// F81866.chm +// +// 4 3/21/11 9:41p Mikes +// seperate the core and oem job +// +//************************************************************************* + +//<AMI_FHDR_START> +// +// Name: <F81866.ASL> +// +// Description: Define SIO Device for ACPI OS. +// +//<AMI_FHDR_END> +//************************************************************************* +//Scope(\_SB.PCI0.SBRG) { +//----------------------------------------------------------------------- +// SET OF COMMON DATA/CONTROL METHODS USED FOR ALL LDN BASED SIO DEVICES +//----------------------------------------------------------------------- +// LIST of objects defined in this file: +// SIO specific: SIOR - Device node (_HID=0c02, UID=SPIO), SIO index/DAta IO access & SIO GPIO address space if available +// SIO specific: DCAT - Table correspondence the LDNs to Device order in Routing Table. +// SIO specific: ENFG & EXFG - Control methods to Enter and Exit configuration mode. ENFG & EXFG correspondingly +// SIO specific: LPTM - current parralel port mode +// SIO specific: UHID - PnP ID for given Serial port +// SIO specific: SIOS - SIO Chipset specific code called from _PTS +// SIO specific: SIOW - SIO Chipset specific code called from _WAK +// SIO specific: SIOH - SIO event handler, to be called from correspondent _Lxx method +// SIO specific: PowerResources & _PR0 object to control Power management for FDC, LPT, UART1,2. +// +// Generic :OpRegion & common Fields to access SIO configuration space +// Generic :CGLD - Convert Device category to LDN +// Generic :DSTA - Get device status according to ACTR register in LD IO space +// Generic :DCNT - Enable/Disable Decoding of Device resources, Route/Release resources to LPC bus +// Generic :DCRS - Returns Byte stream of device's Current resources +// Generic :DSRS - Configures new Resources to be decoded by a Device +// Device node:Motherboard resources +// SIO index/DAta IO access & SIO GPIO address space if available +Device(SIO1) { + Name(_HID, EISAID("PNP0C02")) // System board resources device node ID + Name(_UID,0x111) // Unique ID. First IO use 0x111, Second IO use 0x222 ... + + Name(CRS, ResourceTemplate(){ + IO(Decode16, 0, 0, 0, 0, IOI) // Index/Data Io address + IO(Decode16, 0, 0, 0, 0, IO1) // GP IO space + IO(Decode16, 0, 0, 0, 0, IO2) // PME IO space + IO(Decode16, 0, 0, 0, 0, IO3) // HWM IO space + }) // end CRS + + Method (_CRS, 0){ + // Reserve Super I/O Configuration Port + // 0x0 to 0xF0 already reserved + // 0x3F0 - 0x3F1 are reserved in FDC + If(LAnd(LLess(SP1O, 0x3F0), LGreater(SP1O, 0x0F0))){ + CreateWordField(CRS, ^IOI._MIN, GPI0) + CreateWordField(CRS, ^IOI._MAX, GPI1) + CreateByteField(CRS, ^IOI._LEN, GPIL) + Store(SP1O, GPI0) //Index/Data Base address + Store(SP1O, GPI1) + Store(0x02, GPIL) //IO range + } + + // Reserve SIO GP IO space + If(IO1B){ + CreateWordField(CRS, ^IO1._MIN, GP10) + CreateWordField(CRS, ^IO1._MAX, GP11) + CreateByteField(CRS, ^IO1._LEN, GPL1) + Store(IO1B, GP10) //GP IO base address + Store(IO1B, GP11) + Store(IO1L, GPL1) //IO range + } + + // Reserve SIO PME IO space + If(IO2B){ + CreateWordField(CRS, ^IO2._MIN, GP20) + CreateWordField(CRS, ^IO2._MAX, GP21) + CreateByteField(CRS, ^IO2._LEN, GPL2) + Store(IO2B, GP20) //PME IO base address + Store(IO2B, GP21) + Store(IO2L, GPL2) //IO range + } + + // Reserve SIO HWM IO space + If(IO3B){ + CreateWordField(CRS, ^IO3._MIN, GP30) + CreateWordField(CRS, ^IO3._MAX, GP31) + CreateByteField(CRS, ^IO3._LEN, GPL3) + Store(IO3B, GP30) //HWM IO base address + Store(IO3B, GP31) + Store(IO3L, GPL3) //IO range + } + Return(CRS) + } //End _CRS + + //--------------------------------------------------------------------- + // Table correspondence the LDNs to Device order in Routing Table + // Device type selection is achieved by picking the value from DCAT Package by Offset = LDN + //---------------------------------------------------------------------- + // Elements in the package contain LDN numbers for each category of devices. + // Default value 0xFF -> no device present. + // Make sure number of elements not less or equal to largest LDN + Name (DCAT, Package(0x15){ + // AMI_TODO: fill the table with the present LDN + // LDN number, 0xFF if device not present + // We keep category 0x00~0x0F as SIO_DEV_STATUS layout in GenericSio.h to Update IOST + 0x10, // 0x00 - Serial A (SP1) + 0x11, // 01 - Serial B (SP2) + 0x03, // 02 - LPT + 0x00, // 03 - FDD + 0xFF, // 04 - SB16 Audio + 0xFF, // 05 - MIDI + 0xFF, // 06 - MSS Audio + 0xFF, // 07 - AdLib sound (FM synth) + 0xFF, // 08 - Game port #1 + 0xFF, // 09 - Game port #2 + 0x05, // 0A - KBC 60 & 64 + 0xFF, // 0B - EC 62 & 66 + 0xFF, // 0C - Reserved + 0xFF, // 0D - Reserved + 0x05, // 0E - PS/2 Mouse + 0xFF, // 0F - Reserved +//----add your other device,if no,please cut and modify Package number----------// + 0xFF, // 10 - CIR + 0x12, // 11 - Serial C (SP3) + 0x13, // 12 - Serial D (SP4) + 0x14, // 13 - Serial E (SP5) + 0x15, // 14 - Serial F (SP6) + }) + + //--------------------------------------------------------------------- + // Mutex object to sincronize the access to Logical devices + //--------------------------------------------------------------------- + Mutex(MUT0, 0) + + //--------------------------------------------------------------------- + // Enter Config Mode, Select LDN + // Arg0 : Logical Device number + //--------------------------------------------------------------------- + Method(ENFG, 1) { + Acquire(MUT0, 0xFFF) + //AMI_TODO: enter config mode and Select LDN. + Store(ENTK, INDX) + Store(ENTK, INDX) + Store(Arg0, LDN) //Select LDN + } + + //--------------------------------------------------------------------- + // Exit Config Mode + //--------------------------------------------------------------------- + Method(EXFG, 0) { + //AMI_TODO: exit config mode + Store(EXTK, INDX) + Release(MUT0) + } + + //--------------------------------------------------------------------- + // Return current LPT mode : 0-plain LPT, non Zero-ECP mode + // Arg0 : Device LDN + //--------------------------------------------------------------------- + Method(LPTM, 1){ + ENFG(CGLD(Arg0)) //Enter Config Mode, Select LDN + //AMI_TODO: if it's ECP mode . + And(OPT0, 0x02, Local0) //ECP Mode? + EXFG() //Exit Config Mode + Return(Local0) + } + + //--------------------------------------------------------------------- + // Return current UART mode PnP ID : 0-plain Serial port, non Zero-IrDa mode + // Arg0 : Device Category # + //--------------------------------------------------------------------- + Method(UHID, 1){ + //AMI_TODO: Return the correct HID base on UART mode (UART/IR) + ENFG(CGLD(Arg0)) //Enter Config Mode, Select LDN + And(OPT0, 0x10, Local0) //Ir mode is active + EXFG() //Exit Config Mode + If (Local0) { //Get Uart mode : 0-Serial port, non-zero - IrDa + Return(EISAID("PNP0510")) //PnP Device ID IrDa + } + Else { + Return(EISAID("PNP0501")) //PnP Device ID 16550 Type + } + } + +//------------------------------------------------------------------------- +// !!! BELOW ARE GENERIC SIO CONTROL METHODS. DO NOT REQUIRE MODIFICATIONS +//------------------------------------------------------------------------- + +//<AMI_THDR_START> +//------------------------------------------------------------------------ +// Name: IOID +// +// Type: OperationRegion +// +// Description: Operation Region to point to SuperIO configuration space +// +// Notes: OpeRegion address is defined by 'SP1O' global name. +// 'SPIO' is a field isnside AML_Exchange data area defined in SDL file. +// +// Referrals: BIOS, AMLDATA +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> + //--------------------------------------------------------------------- + // Set of Field names to be used to access SIO configuration space. + //--------------------------------------------------------------------- + OperationRegion(IOID, // Name of Operation Region for SuperIO device + SystemIO, // Type of address space + SP1O, // Offset to start of region + 2) // Size of region in bytes + // End of Operation Region + Field(IOID, ByteAcc, NoLock,Preserve){ + INDX, 8, // Field named INDX is 8 bit wide + DATA, 8 // Field DATA is 8 bit wide + } + + //--------------------------------------------------------------------- + // Set of Field names to be used to access SIO configuration space. + //--------------------------------------------------------------------- + IndexField(INDX, DATA, ByteAcc, NoLock, Preserve){ + Offset(0x07), + LDN, 8, //Logical Device Number + + Offset(0x20), + CR20, 8, + CR21, 8, + CR22, 8, + CR23, 8, + CR24, 8, + CR25, 8, + CR26, 8, + CR27, 8, + CR28, 8, + CR29, 8, + CR2A, 8, + CR2B, 8, + CR2C, 8, + CR2D, 8, + Offset(0x30), + ACTR, 8, //Activate register + Offset(0x60), + IOAH, 8, //Base I/O High addr + IOAL, 8, //Base I/O Low addr + IOH2, 8, //Base2 I/O High addr + IOL2, 8, //Base2 I/O Low addr + Offset(0x70), + INTR, 4, //IRQ + INTT, 4, //IRQ type + Offset(0x74), + DMCH, 8, //DMA channel + Offset(0xE0), + RGE0, 8, //Option Register E0 + RGE1, 8, //Option Register E1 + RGE2, 8, //Option Register E2 + RGE3, 8, //Option Register E3 + RGE4, 8, //Option Register E4 + RGE5, 8, //Option Register E5 + RGE6, 8, //Option Register E6 + RGE7, 8, //Option Register E7 + RGE8, 8, //Option Register E8 + RGE9, 8, //Option Register E9 + Offset(0xF0), + OPT0, 8, //Option register 0xF0 + OPT1, 8, //Option register 0xF1 + OPT2, 8, //Option register 0xF2 + OPT3, 8, //Option register 0xF3 + OPT4, 8, //Option register 0xF4 + OPT5, 8, //Option register 0xF5 + OPT6, 8, //Option register 0xF6 + OPT7, 8, //Option register 0xF7 + OPT8, 8, //Option register 0xF8 + OPT9, 8, //Option register 0xF9 + } //End of indexed field + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: CGLD +// Description: Convert Device Category to Device's LDN +// Input: Arg0 : Device category # +// Output: LDN +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(CGLD, 1) { + Return(DeRefOf(Index(DCAT, Arg0))) // Return LDN + } + + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DSTA +// Description: GET SIO DEVICE STATUS according to ACTR/IOST(category0x00~0x0F) return values +// GET SIO DEVICE STATUS according to ACTR/IOAH+IOAL/IOH2+IOL2(category>0x0F) +// Input: Arg0 : Device category # +// Output: Device Status +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DSTA, 1) { + + ENFG(CGLD(Arg0)) //Enter Config Mode, Select LDN + Store(ACTR, Local0) + EXFG() //Exit Config Mode + + If(LEqual(Local0, 0xFF)) {Return(0x0)} //LDN's not decoded, Device not present. + + And(Local0, 1, Local0) //Leave only "Activate" bit + + // IOST only have 16 bits,IOST is for category 0x00~0x0F device + If(LLess(Arg0,0x10)) {Or(IOST, ShiftLeft(Local0, Arg0), IOST)} + + // Update IO device status in IOST according to the category# + // Note. Once device is detected its status bit cannot be removed + If(Local0){ + Return(0x0F) // Device present & Active + } + Else{ + If(LLess(Arg0,0x10)){//by IOST check + // Check if IO device detected in Local0(IOST) bit mask + If(And(ShiftLeft(1, Arg0), IOST)){ Return(0x0D)} // Device Detected & Not Active + // IO bit not set in Local0: device is disabled during first + // _STA(GSTA) invocationor disabled in BIOS Setup. + Else{ Return(0x00)} // Device not present + } + Else{//by Base1 & Base2 check + Or(ShiftLeft(IOAH, 8),IOAL,Local0) + If(Local0) { Return(0x0D)} // Device Detected & Not Active +// Or(ShiftLeft(IOH2, 8),IOL2,Local0) +// If(Local0) { Return(0x0D)} // Device Detected & Not Active + Return(0x00) // Device not present + } + } //Exit Config Mode + } // End Of DSTA + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DCNT +// Description: Enable/Disable Decoding of Device resources, Route/Release +// I/O & DMA Resources From, To EIO/LPC Bus +// Input: Arg0 : Device catagory # +// Arg1 : 0/1 Disable/Enable resource decoding +// Output:Nothing +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DCNT, 2) { + + ENFG(CGLD(Arg0)) //Enter Config Mode, Select LDN + + // Route/Release DMA channel from/to being ISA/PCI mode + // Note. DMA channel 0 is currently not decoded, although it can be + // used on some of SIO chipsets. + If(LAnd(LLess(DMCH,4), LNotEqual(And(DMCH, 3, Local1),0))){ + rDMA(Arg0, Arg1, Increment(Local1)) + } + + Store(Arg1, ACTR) // Update Activate Register + ShiftLeft(IOAH, 8, local1) // Get IO Base address + Or(IOAL, Local1, Local1) + + // Route/Release I/O resources from/to EIO/LPC Bus + // Arg0 Device Category + // Arg1 0/1 Disable/Enable resource decoding + // Arg2 Port to Route/Release + // Arg3 Port SIZE to Route + RRIO(Arg0, Arg1, Local1, 0x08) + + EXFG() // Exit Config Mode + } // End DCNT + +//<AMI_THDR_START> +//------------------------------------------------------------------------ +// Name: CRS1,CRS2,CRS3 +// +// Type: ResourceTemplate +// +// Description: Current Resources Buffer for Generic SIO devices +// +// Notes: Note. DMA channel 0 is currently decoded as reserved, +// although, it can be used on some of SIO chipsets. +// Add DMA0 to _PRS if it is used +// Generic Resourse template for FDC, COMx, LPT and ECP Current Resource Settings +// (to be initialized and returned by _CRS) +//------------------------------------------------------------------------- +//<AMI_THDR_END> + +// CRS buffer with all kinds of resources +Name(CRS1, ResourceTemplate(){ + IO(Decode16, 0, 0, 1, 0, IO01) + IRQNoFlags(IRQ1) {} + DMA(Compatibility, NotBusMaster, Transfer8, DMA1) {} +}) +CreateWordField(CRS1, IRQ1._INT, IRQM) //IRQ mask 0x1 +CreateByteField(CRS1, DMA1._DMA, DMAM) //DMA 0x4 +CreateWordField(CRS1, IO01._MIN, IO11) //Range 1 Min Base Word 0x8 +CreateWordField(CRS1, IO01._MAX, IO12) //Range 1 Max Base Word 0xa +CreateByteField(CRS1, IO01._LEN, LEN1) //Length 1 0xd + +// Extended CRS buffer with 2 IO ranges +Name(CRS2, ResourceTemplate(){ + IO(Decode16, 0, 0, 1, 0, IO02) + IO(Decode16, 0, 0, 1, 0, IO03) + IRQNoFlags(IRQ2) {} + DMA(Compatibility, NotBusMaster, Transfer8, DMA2) {} +}) +CreateWordField(CRS2, IRQ2._INT, IRQE) //IRQ mask 0x1 +CreateByteField(CRS2, DMA2._DMA, DMAE) //DMA 0x4 +CreateWordField(CRS2, IO02._MIN, IO21) //Range 1 Min Base Word 0x8 +CreateWordField(CRS2, IO02._MAX, IO22) //Range 1 Max Base Word 0xa +CreateByteField(CRS2, IO02._LEN, LEN2) //Length 1 0xd +CreateWordField(CRS2, IO03._MIN, IO31) //Range 2 Min Base Word 0x10 +CreateWordField(CRS2, IO03._MAX, IO32) //Range 2 Max Base Word 0x12 +CreateByteField(CRS2, IO03._LEN, LEN3) //Length 2 0x15 + +// CRS buffer without DMA resource +Name(CRS3, ResourceTemplate(){ + IO(Decode16, 0, 0, 1, 0, IO04) + IRQ(Level,ActiveLow,Shared,IRQ3){} + DMA(Compatibility, NotBusMaster, Transfer8, DMA3) {} +}) +CreateWordField(CRS3, IRQ3._INT, IRQT) //IRQ mask 0x9 +CreateByteField(CRS3, 0x0B,IRQS) //IRQ Shared/Active-Low/Edge-Triggered/=0x19 0xB +CreateByteField(CRS3, DMA3._DMA, DMAT) //DMA 0x4 +CreateWordField(CRS3, IO04._MIN, IO41) //Range 1 Min Base Word 0x2 +CreateWordField(CRS3, IO04._MAX, IO42) //Range 1 Max Base Word 0x4 +CreateByteField(CRS3, IO04._LEN, LEN4) //Length 1 0x7 + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DCRS +// Description: Get FDC, LPT, ECP, UART, IRDA resources (_CRS) +// Returns Byte stream of Current resources. May contain Resources such: +// 1 IRQ resource +// 1 DMA resource +// 1 IO Port +// Input: Arg0 : Device catagory # +// Arg1 : Use/No-Use DMA +// Output: _CRS Resource Buffer +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DCRS, 2) { + ENFG(CGLD(Arg0)) //Enter Config Mode, Select LDN + + // Write Current Settings into Buffer for 1st IO Descriptor + ShiftLeft(IOAH, 8, IO11) //Get IO Base MSB + Or(IOAL, IO11, IO11) //Get IO Base LSB + Store(IO11, IO12) //Set Max Base Word + + Store(0x08, LEN1) //set length + + // Write Current Settings into IRQ descriptor + If(INTR){ + ShiftLeft(1, INTR, IRQM) + } + Else{ + Store(0, IRQM) // No IRQ used + } + + // Write Current Settings into DMA descriptor + // Note. DMA channel 0 is currently decoded as reserved, + // although, it can be used on some of SIO chipsets. + //If(Or(LGreater(DMCH,3), LEqual(And(DMCH, 3, Local1),0))){ + If(LOr(LGreater(DMCH,3), LEqual(Arg1, 0))){ + Store(0, DMAM) // No DMA + } + Else{ + And(DMCH, 3, Local1) + ShiftLeft(1, Local1, DMAM) + } + EXFG() //Exit Config Mode + Return(CRS1) //Return Current Resources + } + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DCR2 +// Description: Get FDC, LPT, ECP, UART, IRDA resources (_CRS) +// Returns Byte stream of Current resources. May contain Resources such: +// 1 IRQ resource +// 1 DMA resource +// 2 IO Port +// Input: Arg0 : Device catagory # +// Arg1 : Use/No-Use DMA +// Output: _CRS Resource Buffer +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DCR2, 2) { + ENFG(CGLD(Arg0)) //Enter Config Mode, Select LDN + + // Write Current Settings into Buffer for 1st IO Descriptor + ShiftLeft(IOAH, 8, IO21) //Get IO Base MSB + Or(IOAL, IO21, IO21) //Get IO Base LSB + Store(IO21, IO22) //Set Max Base Word + Store(0x08, LEN2) + + // Write Current Settings into Buffer for 2nd IO Descriptor + ShiftLeft(IOH2, 8, IO31) //Get IO Base MSB + Or(IOL2, IO31, IO31) //Get IO Base LSB + Store(IO31, IO32) //Set Max Base Word + Store(0x08, LEN3) + + // Write Current Settings into IRQ descriptor + If(INTR){ + ShiftLeft(1, INTR, IRQE) + } + Else{ + Store(0, IRQE) // No IRQ used + } + + // Write Current Settings into DMA descriptor + // Note. DMA channel 0 is currently decoded as reserved, + // although, it can be used on some of SIO chipsets. + //If(Or(LGreater(DMCH,3), LEqual(And(DMCH, 3, Local1),0))){ + If(LOr(LGreater(DMCH,3), LEqual(Arg1, 0))){ + Store(0, DMAE) // No DMA + } Else { + And(DMCH, 3, Local1) + ShiftLeft(1, Local1, DMAE) + } + + EXFG() //Exit Config Mode + Return(CRS2) //Return Current Resources + } + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DCR3 +// Description: Get FDC, LPT, ECP, UART, IRDA resources (_CRS) +// Returns Byte stream of Current resources. May contain Resources such: +// 1 IRQ resource +// 1 IO Port +// Input: Arg0 : Device catagory # +// Output: _CRS Resource Buffer +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DCR3, 2) { + + ENFG(CGLD(Arg0)) // Enter Config Mode, Select LDN + + // Write Current Settings into Buffer for 1st IO Descriptor + ShiftLeft(IOAH, 8, IO41) //Get IO Base MSB + Or(IOAL, IO41, IO41) //Get IO Base LSB + Store(IO41, IO42) //Get Max Base Word + Store(0x08, LEN4) + + // Write Current Settings into IRQ descriptor + If(INTR){ + ShiftLeft(1, INTR, IRQT) + // Set IRQ Type:porting according IRTT + //AMI_TODO: + If(And(OPT0,0x01)){ + If(And(OPT0,0x02)){ + If(And(OPT6,0x08)){ + Store(0x18, IRQS) } // IRQ Type: Reserved, set as Active-Low-Level-Triggered,Shared. + Else{ + Store(0x11, IRQS) } // IRQ Type: Active-High-Edge-Triggered,Shared. + } + Else{ + If(And(OPT6,0x08)){ + Store(0x10, IRQS) } // IRQ Type: Active-High-Level-Triggered,Shared. + Else{ + Store(0x18, IRQS) } // IRQ Type: Active-Low-Level-Triggered,Shared. + } + } Else { + Store(0x01, IRQS) // IRQ Type: Active-High-Edge-Triggered,No-Shared(default) + } + + }Else{ + Store(0, IRQT) // No IRQ used + } + // Write Current Settings into DMA descriptor + // Note. DMA channel 0 is currently decoded as reserved, + // although, it can be used on some of SIO chipsets. + //If(Or(LGreater(DMCH,3), LEqual(And(DMCH, 3, Local1),0))){ + If(LOr(LGreater(DMCH,3), LEqual(Arg1, 0))){ + Store(0, DMAT) // No DMA + } Else { + And(DMCH, 3, Local1) + ShiftLeft(1, Local1, DMAT) + } + + EXFG() // Exit Config Mode + Return(CRS3) //Return Current Resources + } + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DSRS +// Description: Set FDC, LPT, ECP, UART, IRDA resources (_SRS) +// Control method can be used for configuring devices with following resource order: +// 1 IRQ resource +// 1 DMA resource +// 1 IO Port +// Input: Arg0 : PnP Resource String to set +// Arg1 : Device catagory # +// Output: Nothing +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DSRS, 2) { + If(And(LEqual(Arg1, 0x02),LPTM(Arg1) ) ) { //LPT logical device? Extended LPT mode ? + DSR2(Arg0, Arg1) + } Else { + //Set resource for other devices from CRS1, or just for Parallel Port LPT Mode + CreateWordField(Arg0, ^IRQ1._INT, IRQM) //IRQ mask 0x1 + CreateByteField(Arg0, ^DMA1._DMA, DMAM) //DMA 0x4 + CreateWordField(Arg0, ^IO01._MIN, IO11) //Range 1 Min Base Word 0x8 + + ENFG(CGLD(Arg1)) //Enter Config Mode, Select LDN + + // Set Base IO Address + And(IO11, 0xFF, IOAL) //Set IO Base LSB + ShiftRight(IO11, 0x8, IOAH) //Set IO Base MSB + + // Set IRQ + If(IRQM){ + FindSetRightBit(IRQM, Local0) + Subtract(Local0, 1, INTR) + }Else{ + Store(0, INTR) //No IRQ used + } + + // Set DMA + If(DMAM){ + FindSetRightBit(DMAM, Local0) + Subtract(Local0, 1, DMCH) + }Else{ + Store(4, DMCH) //No DMA + } + + EXFG() //Exit Config Mode + + // Enable ACTR + DCNT(Arg1, 1) //Enable Device (Routing) + + Store(Arg1, Local2) + If (LGreater(Local2, 0)){Subtract(Local2, 1, Local2)} + }//Else end + }//Method DSRS end + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DSR2 +// Description: Set FDC, LPT, ECP, UART, IRDA resources (_SRS) +// Control method can be used for configuring devices with following resource order: +// 1 IRQ resource +// 1 DMA resource +// 2 IO Port +// Input: Arg0 : PnP Resource String to set +// Arg1 : Device catagory # +// Output: Nothing +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DSR2, 2) { + CreateWordField(Arg0, ^IRQ2._INT, IRQE) //IRQ mask 0x1 + CreateByteField(Arg0, ^DMA2._DMA, DMAE) //DMA 0x4 + CreateWordField(Arg0, ^IO02._MIN, IO21) //Range 1 Min Base Word 0x8 + CreateWordField(Arg0, ^IO03._MIN, IO31) //Range 1 Min Base Word 0x8 + + ENFG(CGLD(Arg1)) //Enter Config Mode, Select LDN + + // Set Base IO Address + And(IO21, 0xFF, IOAL) //Set IO1 Base LSB + ShiftRight(IO21, 0x8, IOAH) //Set IO1 Base MSB + + And(IO31, 0xFF, IOL2) //Set IO2 Base LSB + ShiftRight(IO31, 0x8, IOH2) //Set IO2 Base MSB + + // Set IRQ + If(IRQE){ + FindSetRightBit(IRQE, Local0) + Subtract(Local0, 1, INTR) + }Else{ + Store(0, INTR) //No IRQ used + } + + // Set DMA + If(DMAE){ + FindSetRightBit(DMAE, Local0) + Subtract(Local0, 1, DMCH) + }Else{ + Store(4, DMCH) //No DMA + } + + EXFG() //Exit Config Mode + + // Enable ACTR + DCNT(Arg1, 1) //Enable Device (Routing) + + Store(Arg1, Local2) + If (LGreater(Local2, 0)){Subtract(Local2, 1, Local2)} + } + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DSR3 +// Description: Set FDC, LPT, ECP, UART, IRDA resources (_SRS) +// Control method can be used for configuring devices with following resource order: +// 1 IRQ resource +// 1 IO Port +// Input: Arg0 : PnP Resource String to set +// Arg1 : Device catagory # +// Output: Nothing +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DSR3, 2) { + CreateWordField(Arg0, ^IO04._MIN, IO41) //Range 1 Min Base Word 0x8 + CreateWordField(Arg0, ^IRQ3._INT, IRQT) //IRQ mask 0x1 + CreateByteField(Arg0, 0x0B, IRQS) //IRQ Flag + CreateByteField(Arg0, ^DMA3._DMA, DMAT) //DMA + + ENFG(CGLD(Arg1)) // Enter Config Mode, Select LDN + + // Set Base IO Address + And(IO41,0xff, IOAL) //Set IO Base LSB + ShiftRight(IO41, 0x8, IOAH) //Set IO Base MSB + + // Set IRQ + If(IRQT){ + FindSetRightBit(IRQT, Local0) + Subtract(Local0, 1, INTR) + //Set IRQ flag,AMI_TODO: + //Set IRQ flag,AMI_TODO: + If(And(IRQS,0x10)){ + Or(OPT0, 0x01, OPT0) + If(LEqual(IRQS,0x18)){ // IRQ Type: Active-Low-Level-Triggered,Shared. + And(OPT0, 0xFD, OPT0) + And(OPT6, 0xF7, OPT6) + } + Else{ + If(LEqual(IRQS,0x11)){ // IRQ Type: Active-High-Edge-Triggered,Shared. + Or(OPT0, 0x01, OPT0) + And(OPT6, 0xF7, OPT6) + } + Else{ + If(LEqual(IRQS,0x10)){ // IRQ Type: Active-High-Level-Triggered,Shared. + And(OPT0, 0xFD, OPT0) + Or(OPT6, 0x08, OPT6) + } + } + } + } + }Else{ + Store(0, INTR) //No IRQ used + } + // Set DMA + If(DMAT){ + FindSetRightBit(DMAT, Local0) + Subtract(Local0, 1, DMCH) + }Else{ + Store(4, DMCH) //No DMA + } + + EXFG() // Exit Config Mode + // Enable ACTR + DCNT(Arg1, 1) // Enable Device (Routing) + Store(Arg1, Local2) + If (LGreater(Local2, 0)){Subtract(Local2, 1, Local2)} + } + +} // End of SIO1 + +//------------------------------------------------------------------------- +// SIO_PME WAKE UP EVENTS // +//------------------------------------------------------------------------- +// Following code is the workaround for wake up on RI/Key/Mouse events +// are generated by some SuperIO. The wake up signal (SIO_PME) is +// connected to one of GPIOs of south bridge chip. +// Make sure the correspondent GPIO in south bridge is enabled to generate an SCI +//------------------------------------------------------------------------- +// Add Flag for Fix WakeUp Switch bug. +Name(PMFG, 0x00) //PME wake ststus + +//------------------------------------------------------------------------- +// SIOS - SIO Chipset specific code called from _PTS +//------------------------------------------------------------------------- +// input - Arg0 : Sleep state # +// output - nothing +//------------------------------------------------------------------------- +Method(SIOS, 1){ + // Aware wake up events in SIO chip + Store("SIOS", Debug) + + //AMI_TODO: + // 1. select sleep state + If(LNotEqual(0x05, Arg0)){ + ^SIO1.ENFG(0x0A) //Set Logical Device 0A (PME) + + // 2. enable wake-up ; Enable Keyboard, PS/2 Mouse, UART 1&2 to Generate PME. + if(\KBFG){ + Or(^SIO1.OPT0, 0x08, ^SIO1.OPT0) //enable Keyboard Wake-up bit + Or(^SIO1.RGE8, 0x01, ^SIO1.RGE8) //enable Keyboard event to wakeup system,bit0 + } + Else{ + And(^SIO1.OPT0, 0xF7, ^SIO1.OPT0) //disable Keyboard Wake-up bit + And(^SIO1.RGE8, 0xFE, ^SIO1.RGE8) //disable Keyboard event to wakeup system,bit0 + } + if(\MSFG){ + Or(^SIO1.OPT0, 0x10, ^SIO1.OPT0) //enable Mouse Wake-up bit + Or(^SIO1.RGE8, 0x02, ^SIO1.RGE8) //enable Keyboard event to wakeup system,bit1 + } + Else{ + And(^SIO1.OPT0, 0xEF, ^SIO1.OPT0) //disable Mouse Wake-up bit + And(^SIO1.RGE8, 0xFD, ^SIO1.RGE8) //disable Keyboard event to wakeup system,bit1 + } + + // 3. clear PME Status + Store(0xFF, ^SIO1.OPT1) //Clear I/O PME# Status + + // 4. Enable PME /wakeup + Or(0x0F, ^SIO1.CR2D,^SIO1.CR2D) //enable kbc/mouse wakeup + Or(0x80, ^SIO1.RGE0, ^SIO1.RGE0) //enable ERP function,bit7 + + ^SIO1.EXFG() + } +}//End of Method(SIOS, 1){ + +//----------------------------------------------------------------------- +// SIOW - SIO Chipset specific code called from _WAK +//----------------------------------------------------------------------- +// input - Sleep State # +// output - nothing +//----------------------------------------------------------------------- +Method(SIOW, 1){ + Store("SIOW", Debug) + + //AMI_TODO: + ^SIO1.ENFG(0x0A) //Set Logical Device 04 (PME) + + // 1. Clear Status + Store(^SIO1.OPT1, PMFG) // PMFG=PME Wake Status + Store(0xFF, ^SIO1.OPT1) //Clear I/O PME# Status + And(^SIO1.OPT0, 0xE7, ^SIO1.OPT0) //Clear KBC/Mouse PME Event + And(^SIO1.RGE8, 0xFC, ^SIO1.RGE8) //Clear KBC/Mouse wakeup Event + + // 2. Disable PME + And(0xF0, ^SIO1.CR2D,^SIO1.CR2D) //disable kbc/mouse wakeup + And(0x7F, ^SIO1.RGE0, ^SIO1.RGE0) //disable ERP function,bit7 + + ^SIO1.EXFG() +} + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Board/IO/F81866/F81866.CIF b/Board/IO/F81866/F81866.CIF new file mode 100644 index 0000000..c524fb7 --- /dev/null +++ b/Board/IO/F81866/F81866.CIF @@ -0,0 +1,23 @@ +<component> + name = "SuperI/O - F81866" + category = IO + LocalRoot = "Board\IO\F81866" + RefName = "F81866" +[files] +"IO_F81866.SDL" +"F81866.ASL" +"F81866.MAK" +"F81866.SD" +"F81866.UNI" +"F81866DXE.C" +"F81866PEI.C" +"F81866PeiDebugger.C" +"F81866Setup.C" +"F81866Setup.H" +"History.txt" +"F81866.chm" +[parts] +"F81866ASLFiles" +"F81866Board" +<endComponent> + diff --git a/Board/IO/F81866/F81866.MAK b/Board/IO/F81866/F81866.MAK new file mode 100644 index 0000000..ccb246e --- /dev/null +++ b/Board/IO/F81866/F81866.MAK @@ -0,0 +1,161 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* +# +#************************************************************************* +# $Header: /Alaska/BIN/IO/Fintek/F81866/F81866.MAK 2 12/14/11 9:21p Kasalinyi $ +# +# $Revision: 2 $ +# +# $Date: 12/14/11 9:21p $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/IO/Fintek/F81866/F81866.MAK $ +# +# 2 12/14/11 9:21p Kasalinyi +# [TAG] EIPNone +# [Category] Improvement +# [Description] Fix Smart Function build error +# [Files] F81866DXE.C +# F81866.SD +# F81866.MAK +# IO_F81866.SDL +# +# 1 7/20/11 4:22a Kasalinyi +# [Category] Improvement +# [Description] Initial Porting +# [Files] F81866.CIF +# IO_F81866.SDL +# F81866.ASL +# F81866.MAK +# F81866.SD +# F81866.UNI +# F81866DXE.C +# F81866PEI.C +# F81866PeiDebugger.C +# F81866Setup.C +# F81866Setup.H +# History.txt +# F81866.chm +# +# 6 3/21/11 9:41p Mikes +# seperate the core and oem job +# +#************************************************************************* +#<AMI_FHDR_START> +# +# Name: <F81866.MAK> +# +# Description: SIO module component make file +# +#<AMI_FHDR_END> +#************************************************************************* +{$(F81866_DIR)}.C{$(BUILD_DIR)}.OBJ:: + $(CC) $(CFLAGS) /D\"SIO_IoRange_Decode_LIST=$(IoRangeDecodeList)\" /Fo$(BUILD_DIR)\\ $< + +!IF "$(IODECODETYPE)"=="1" +$(BUILD_DIR)\DxeOemIoDecode.OBJ : $(F81866_DIR)\BSP\OemIoDecode.c + $(CC) $(CFLAGS) /Fo$(BUILD_DIR)\DxeOemIoDecode.OBJ $(F81866_DIR)\BSP\OemIoDecode.c + +$(BUILD_DIR)\PeiOemIoDecode.OBJ : $(F81866_DIR)\BSP\OemIoDecode.c + $(CC) $(CFLAGS) /Fo$(BUILD_DIR)\PeiOemIoDecode.OBJ $(F81866_DIR)\BSP\OemIoDecode.c + +F81866PEI_OBJ= $(BUILD_DIR)\F81866PEI.OBJ \ +$(BUILD_DIR)\PeiOemIoDecode.OBJ + +F81866DXE_OBJ= $(BUILD_DIR)\F81866DXE.OBJ \ +$(BUILD_DIR)\DxeOemIoDecode.OBJ + +!ELSE + +F81866PEI_OBJ= $(BUILD_DIR)\F81866PEI.OBJ +F81866DXE_OBJ= $(BUILD_DIR)\F81866DXE.OBJ +!ENDIF + +$(F81866PEI_OBJ) : $(F81866_DIR)\F81866.MAK $(F81866_DIR)\BSP\PeiIoTable.h +$(F81866DXE_OBJ) : $(F81866_DIR)\F81866.MAK $(F81866_DIR)\BSP\DxeIoTable.h + +!IF "$(F81866_SMF_SUPPORT)"=="1" +$(BUILD_DIR)\F81866SmartFan.OBJ : $(F81866_DIR)\BSP\F81866SmartFan.c + $(CC) $(CFLAGS) /Fo$(BUILD_DIR)\F81866SmartFan.OBJ $(F81866_DIR)\BSP\F81866SmartFan.c +!ENDIF + +CORE_PEIBin : $(F81866PEI_OBJ) $(AMICSPLib) + +!IF "$(F81866_SMF_SUPPORT)" == "1" +CORE_DXEBin : $(BUILD_DIR)\F81866SmartFan.OBJ $(F81866DXE_OBJ) $(AMICSPLib) \ +!ELSE +CORE_DXEBin : $(F81866DXE_OBJ) $(AMICSPLib) +!ENDIF + +#-------------------------------------------------------------------------- +# Create SIO Setup Screen +#-------------------------------------------------------------------------- +SetupSdbs : $(BUILD_DIR)\F81866.MAK F81866SDB + +$(BUILD_DIR)\F81866.MAK : $(F81866_DIR)\$(@B).CIF $(F81866_DIR)\$(@B).MAK $(BUILD_RULES) + $(CIF2MAK) $(F81866_DIR)\$(@B).CIF $(CIF2MAK_DEFAULTS) + +F81866SDB : $(BUILD_DIR)\F81866.mak + $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\ + /f $(BUILD_DIR)\F81866.MAK all\ + TYPE=SDB NAME=F81866 STRING_CONSUMERS=$(F81866_DIR)\F81866.SD + +all : Build_SetupStringList + +SetupBin : $(BUILD_DIR)\F81866Setup.OBJ \ +!IF "$(F81866_HWM_PRESENT)" == "1" +$(BUILD_DIR)\F81866HwmOemHooks.OBJ +!ENDIF + +Build_SetupStringList : + $(ECHO) #define STR_TABLE_LIST $(SetupStrTableList) > $(BUILD_DIR)\SetupStringList.h + + +$(BUILD_DIR)\F81866Setup.OBJ : $(F81866_DIR)\F81866Setup.C $(BUILD_DIR)\SetupStrTokens.H + $(CC) $(CFLAGS) /D\"HWM_External_Fun_LIST=$(HwmExtFunList)\" \ + /Fo$(BUILD_DIR)\ $(F81866_DIR)\F81866Setup.C + +!IF "$(F81866_HWM_PRESENT)" == "1" +$(BUILD_DIR)\F81866HwmOemHooks.OBJ : $(F81866_DIR)\BSP\F81866HwmOemHooks.c + $(CC) $(CFLAGS) /Fo$(BUILD_DIR)\ $(F81866_DIR)\BSP\F81866HwmOemHooks.c +!ENDIF + +#-------------------------------------------------------------------------- +# SB Debugger Initialization +#-------------------------------------------------------------------------- +PEI_F81866_DBG_FLAGS = $(CFLAGS) \ +!IF "$(USB_DEBUG_TRANSPORT)" == "1" + /DUSB_DEBUGGER +!ENDIF + +$(BUILD_DIR)\F81866PeiDebugger.OBJ : $(PROJECT_DIR)\$(F81866_DIR)\F81866PeiDebugger.C + $(CC) $(PEI_F81866_DBG_FLAGS) /Fo$(BUILD_DIR)\F81866PeiDebugger.OBJ $(PROJECT_DIR)\$(F81866_DIR)\F81866PeiDebugger.C + +PeiDbgPortBin : $(BUILD_DIR)\F81866PeiDebugger.OBJ $(F81866PEI_OBJ) + +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + diff --git a/Board/IO/F81866/F81866.SD b/Board/IO/F81866/F81866.SD new file mode 100644 index 0000000..27016d5 --- /dev/null +++ b/Board/IO/F81866/F81866.SD @@ -0,0 +1,1611 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866.SD 3 2/03/12 1:47a Elviscai $ +// +// $Revision: 3 $ +// +// $Date: 2/03/12 1:47a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866.SD $ +// +// 3 2/03/12 1:47a Elviscai +// [TAG] EIPNONE +// [Category] Improvement +// [Description] Remove _PRS 0x3F8/0x3E8 from UART3/4/5/6 +// +// 2 12/14/11 9:20p Kasalinyi +// [TAG] EIPNone +// [Category] Improvement +// [Description] Fix Smart Function build error +// [Files] F81866DXE.C +// F81866.UNI +// F81866.MAK +// IO_F81866.SDL +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] F81866.CIF +// IO_F81866.SDL +// F81866.ASL +// F81866.MAK +// F81866.SD +// F81866.UNI +// F81866DXE.C +// F81866PEI.C +// F81866PeiDebugger.C +// F81866Setup.C +// F81866Setup.H +// History.txt +// F81866.chm +// +// 4 3/21/11 9:41p Mikes +// seperate the core and oem job +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81866.SD> +// +// Description: SIO Form Template, Setup screen definition file +// +//<AMI_FHDR_END> +//************************************************************************* + +#ifdef SETUP_DATA_DEFINITION +/***********************************************************/ +/* Put NVRAM data definitions here. +/* For example: UINT8 Data1; +/* These definitions will be converted by the build process +/* to a definitions of SETUP_DATA fields. +/***********************************************************/ + UINT8 SmartFanEnable; + + UINT8 Fan1SmartFanMode; + UINT16 Fan1Mode0FixedSpeed; + UINT8 Fan1Mode1FixedDuty; + UINT8 Fan1Mode2AutoRpmT1; + UINT8 Fan1Mode2AutoRpmT2; + UINT8 Fan1Mode2AutoRpmT3; + UINT8 Fan1Mode2AutoRpmT4; + UINT8 Fan1Mode2AutoRpmF1; + UINT8 Fan1Mode2AutoRpmF2; + UINT8 Fan1Mode2AutoRpmF3; + UINT8 Fan1Mode2AutoRpmF4; + UINT8 Fan1Mode3AutoDutyT1; + UINT8 Fan1Mode3AutoDutyT2; + UINT8 Fan1Mode3AutoDutyT3; + UINT8 Fan1Mode3AutoDutyT4; + UINT8 Fan1Mode3AutoDutyF1; + UINT8 Fan1Mode3AutoDutyF2; + UINT8 Fan1Mode3AutoDutyF3; + UINT8 Fan1Mode3AutoDutyF4; + + UINT8 Fan2SmartFanMode; + UINT16 Fan2Mode0FixedSpeed; + UINT8 Fan2Mode1FixedDuty; + UINT8 Fan2Mode2AutoRpmT1; + UINT8 Fan2Mode2AutoRpmT2; + UINT8 Fan2Mode2AutoRpmT3; + UINT8 Fan2Mode2AutoRpmT4; + UINT8 Fan2Mode2AutoRpmF1; + UINT8 Fan2Mode2AutoRpmF2; + UINT8 Fan2Mode2AutoRpmF3; + UINT8 Fan2Mode2AutoRpmF4; + UINT8 Fan2Mode3AutoDutyT1; + UINT8 Fan2Mode3AutoDutyT2; + UINT8 Fan2Mode3AutoDutyT3; + UINT8 Fan2Mode3AutoDutyT4; + UINT8 Fan2Mode3AutoDutyF1; + UINT8 Fan2Mode3AutoDutyF2; + UINT8 Fan2Mode3AutoDutyF3; + UINT8 Fan2Mode3AutoDutyF4; + + UINT8 Fan3SmartFanMode; + UINT16 Fan3Mode0FixedSpeed; + UINT8 Fan3Mode1FixedDuty; + UINT8 Fan3Mode2AutoRpmT1; + UINT8 Fan3Mode2AutoRpmT2; + UINT8 Fan3Mode2AutoRpmT3; + UINT8 Fan3Mode2AutoRpmT4; + UINT8 Fan3Mode2AutoRpmF1; + UINT8 Fan3Mode2AutoRpmF2; + UINT8 Fan3Mode2AutoRpmF3; + UINT8 Fan3Mode2AutoRpmF4; + UINT8 Fan3Mode3AutoDutyT1; + UINT8 Fan3Mode3AutoDutyT2; + UINT8 Fan3Mode3AutoDutyT3; + UINT8 Fan3Mode3AutoDutyT4; + UINT8 Fan3Mode3AutoDutyF1; + UINT8 Fan3Mode3AutoDutyF2; + UINT8 Fan3Mode3AutoDutyF3; + UINT8 Fan3Mode3AutoDutyF4; +#endif //SETUP_DATA_DEFINITION + +//------------------------------------------------------------------------- +//Select Top level menu itmem (forset) for you pages +//------------------------------------------------------------------------- +#ifdef ADVANCED_FORM_SET + +//------------------------------------------------------------------------- +//If you need any additional type definitions add them here +//------------------------------------------------------------------------- +#ifdef FORM_SET_TYPEDEF + #include "F81866Setup.H" + #include "Token.h" +#endif + +//------------------------------------------------------------------------- +//If you need custom varstore's define them here +//------------------------------------------------------------------------- +#ifdef FORM_SET_VARSTORE + + //Callback varstore + #if BOARD_LABEL_BELOW_25 + #if EFI_SPECIFICATION_VERSION>0x20000 + AMI_CALLBACK_VARSTORE + #endif + #endif + + #ifdef SETUP_DATA_DEFINITION + AUTO_ID(FDC_V_DATA_KEY) + AUTO_ID(FDC_NV_DATA_KEY) + AUTO_ID(LPT_V_DATA_KEY) + AUTO_ID(LPT_NV_DATA_KEY) + AUTO_ID(COMA_V_DATA_KEY) + AUTO_ID(COMA_NV_DATA_KEY) + AUTO_ID(COMB_V_DATA_KEY) + AUTO_ID(COMB_NV_DATA_KEY) + AUTO_ID(COMC_V_DATA_KEY) + AUTO_ID(COMC_NV_DATA_KEY) + AUTO_ID(COMD_V_DATA_KEY) + AUTO_ID(COMD_NV_DATA_KEY) + AUTO_ID(COME_V_DATA_KEY) + AUTO_ID(COME_NV_DATA_KEY) + AUTO_ID(COMF_V_DATA_KEY) + AUTO_ID(COMF_NV_DATA_KEY) + #endif + AMI_SIO_VARSTORE(FDC, PNP0604_0) + AMI_SIO_VARSTORE(LPT, PNP0400_0) + AMI_SIO_VARSTORE(COMA, PNP0501_0) + AMI_SIO_VARSTORE(COMB, PNP0501_1) + AMI_SIO_VARSTORE(COMC, PNP0501_2) + AMI_SIO_VARSTORE(COMD, PNP0501_3) + AMI_SIO_VARSTORE(COME, PNP0501_4) + AMI_SIO_VARSTORE(COMF, PNP0501_5) + +#endif + +//------------------------------------------------------------------------- +//Define controls to be added to the top level page of the formset +//------------------------------------------------------------------------- +#ifdef FORM_SET_ITEM +#endif + +//------------------------------------------------------------------------- +//Define goto commands for the forms defined in this file +//------------------------------------------------------------------------- +#ifdef FORM_SET_GOTO + goto F81866_FORM_ID, + prompt = STRING_TOKEN(STR_F81866_SIO_FORM), + help = STRING_TOKEN(STR_F81866_SIO_FORM_HELP); + + #if F81866_HWM_PRESENT + goto HMM_CONFIG_FORM_ID, + prompt = STRING_TOKEN(STR_F81866_HMM_CONFIGURATION), + help = STRING_TOKEN(STR_F81866_HMM_CONFIGURATION_HELP); + #endif + +#endif + +//------------------------------------------------------------------------- +// Define forms +//------------------------------------------------------------------------- +#ifdef FORM_SET_FORM + + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define HWM formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + #if F81866_HWM_PRESENT + //Define HWM formset form + form formid = AUTO_ID(HMM_CONFIG_FORM_ID), + title = STRING_TOKEN(STR_F81866_HMM_CONFIGURATION); + + SUBTITLE(STRING_TOKEN(STR_PC_HEALTH)) + + SEPARATOR + // +#if F81866_SMF_SUPPORT + checkbox varid = SETUP_DATA.SmartFanEnable, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_PROMPT), + help = STRING_TOKEN(STR_F81866_SMARTFAN_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + //Goto Smart Fan Form + suppressif ideqval SETUP_DATA.SmartFanEnable == 0x00; + goto SIO_SMARTFAN_FORM_ID, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FORM), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FORM_HELP); + endif; +#endif //#if F81866_SMF_SUPPORT + // System Temperature1 + #if EFI_SPECIFICATION_VERSION>0x20000 + INTERACTIVE_TEXT(STRING_TOKEN(STR_EMPTY), STRING_TOKEN(STR_F81866_SYSTEM_TEMP1), STRING_TOKEN(STR_F81866_SYSTEM_TEMP1_VALUE), AUTO_ID(HWM_INTERACTIVE_KEY)) + #else + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_SYSTEM_TEMP1), + text = STRING_TOKEN(STR_F81866_SYSTEM_TEMP1_VALUE), + flags = INTERACTIVE, + key = HWM_INTERACTIVE_KEY; + #endif + // + // System Temperature2 + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_SYSTEM_TEMP2), + text = STRING_TOKEN(STR_F81866_SYSTEM_TEMP2_VALUE), + flags = 0, + key = 0; + // + // System Temperature3 + #if (F81866_PECI_SUPPORT) + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_SYSTEM_TEMP3), + text = STRING_TOKEN(STR_F81866_SYSTEM_TEMP3_VALUE), + flags = 0, + key = 0; + #endif + // + // System Temperature4/5/6 + #if (F81866_IBEX_SUPPORT) + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_SYSTEM_TEMP4), + text = STRING_TOKEN(STR_F81866_SYSTEM_TEMP4_VALUE), + flags = 0, + key = 0; + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_SYSTEM_TEMP5), + text = STRING_TOKEN(STR_F81866_SYSTEM_TEMP5_VALUE), + flags = 0, + key = 0; + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_SYSTEM_TEMP6), + text = STRING_TOKEN(STR_F81866_SYSTEM_TEMP6_VALUE), + flags = 0, + key = 0; + #endif + // + // System FAN1 Speed + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_FAN1_SPEED), + text = STRING_TOKEN(STR_F81866_FAN1_SPEED_VALUE), + flags = 0, + key = 0; + // + // System FAN2 Speed + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_FAN2_SPEED), + text = STRING_TOKEN(STR_F81866_FAN2_SPEED_VALUE), + flags = 0, + key = 0; + // + // System FAN3 Speed + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_FAN3_SPEED), + text = STRING_TOKEN(STR_F81866_FAN3_SPEED_VALUE), + flags = 0, + key = 0; + // + // Vin1 + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_HMM_VIN1), + text = STRING_TOKEN(STR_F81866_HMM_VIN1_VALUE), + flags = 0, + key = 0; + // + // Vin2 + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_HMM_VIN2), + text = STRING_TOKEN(STR_F81866_HMM_VIN2_VALUE), + flags = 0, + key = 0; + // + // Vin3 + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_HMM_VIN3), + text = STRING_TOKEN(STR_F81866_HMM_VIN3_VALUE), + flags = 0, + key = 0; + // + // Vin4 + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_HMM_VIN4), + text = STRING_TOKEN(STR_F81866_HMM_VIN4_VALUE), + flags = 0, + key = 0; + // + // VSB5V + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_HMM_VSB5V), + text = STRING_TOKEN(STR_F81866_HMM_VSB5V_VALUE), + flags = 0, + key = 0; + // + // VCC3V + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_HMM_VCC3V), + text = STRING_TOKEN(STR_F81866_HMM_VCC3V_VALUE), + flags = 0, + key = 0; + // + // VSB3V + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_HMM_VSB3V), + text = STRING_TOKEN(STR_F81866_HMM_VSB3V_VALUE), + flags = 0, + key = 0; + // + // VBAT + text + help = STRING_TOKEN(STR_EMPTY), + text = STRING_TOKEN(STR_F81866_HMM_VBAT), + text = STRING_TOKEN(STR_F81866_HMM_VBAT_VALUE), + flags = 0, + key = 0; + + endform;//HWM form + #endif//End of #if F81866_HWM_PRESENT +//////////////////////////////////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////Define SmartFan formset form//////////////////////////////////////// +//////////////////////////////////////////////////////////////////////////////////////////////////////// +//Smart Fan Setup setting. +#if F81866_SMF_SUPPORT + form formid = AUTO_ID(SIO_SMARTFAN_FORM_ID), + title = STRING_TOKEN(STR_F81866_SMARTFAN_FORM); + SUBTITLE(STRING_TOKEN(STR_F81866_SMARTFAN_FORM)) + + SEPARATOR + +//System FAN Smart function setting-- + + suppressif ideqval SETUP_DATA.SmartFanEnable == 0x00; + oneof varid = SETUP_DATA.Fan1SmartFanMode, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_CONFIG_HELP), + option text = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE0), value = 0, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3), value = 3, flags = DEFAULT |RESET_REQUIRED; + endoneof; + endif; + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x00 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode0FixedSpeed, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE0), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE0_HELP), + flags = RESET_REQUIRED, + minimum = 500, + maximum = 10000, + step = 1, + default = 2000, + endnumeric; + endif; + + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x01 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode1FixedDuty, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE1_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode2AutoRpmT1, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_T1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode2AutoRpmT2, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_T2), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 50, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode2AutoRpmT3, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_T3), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 40, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode2AutoRpmT4, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_T4), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 30, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode2AutoRpmF1, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_F1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 85, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode2AutoRpmF2, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_F2), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 70, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode2AutoRpmF3, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_F3), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode2AutoRpmF4, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_F4), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 50, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode3AutoDutyT1, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_T1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode3AutoDutyT2, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_T2), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 50, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode3AutoDutyT3, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_T3), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 40, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode3AutoDutyT4, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_T4), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 30, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode3AutoDutyF1, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_F1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 85, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode3AutoDutyF2, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_F2), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 70, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode3AutoDutyF3, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_F3), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan1SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan1Mode3AutoDutyF4, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_F4), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 50, + endnumeric; + endif; + + suppressif ideqval SETUP_DATA.SmartFanEnable == 0x00; + oneof varid = SETUP_DATA.Fan2SmartFanMode, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN2), + help = STRING_TOKEN(STR_F81866_SMARTFAN_CONFIG_HELP), + option text = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE0), value = 0, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3), value = 3, flags = DEFAULT |RESET_REQUIRED; + endoneof; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x00 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode0FixedSpeed, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE0), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE0_HELP), + flags = RESET_REQUIRED, + minimum = 500, + maximum = 10000, + step = 1, + default = 2000, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x01 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode1FixedDuty, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE1_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode2AutoRpmT1, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_T1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode2AutoRpmT2, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_T2), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 50, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode2AutoRpmT3, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_T3), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 40, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode2AutoRpmT4, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_T4), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 30, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode2AutoRpmF1, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_F1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 85, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode2AutoRpmF2, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_F2), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 70, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode2AutoRpmF3, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_F3), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode2AutoRpmF4, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_F4), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 50, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode3AutoDutyT1, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_T1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode3AutoDutyT2, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_T2), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 50, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode3AutoDutyT3, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_T3), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 40, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode3AutoDutyT4, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_T4), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 30, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode3AutoDutyF1, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_F1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 85, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode3AutoDutyF2, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_F2), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 70, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode3AutoDutyF3, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_F3), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan2SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan2Mode3AutoDutyF4, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_F4), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 50, + endnumeric; + endif; + + + suppressif ideqval SETUP_DATA.SmartFanEnable == 0x00; + oneof varid = SETUP_DATA.Fan3SmartFanMode, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN3), + help = STRING_TOKEN(STR_F81866_SMARTFAN_CONFIG_HELP), + option text = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE0), value = 0, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3), value = 3, flags = DEFAULT |RESET_REQUIRED; + endoneof; + endif; + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x00 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode0FixedSpeed, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE0), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE0_HELP), + flags = RESET_REQUIRED, + minimum = 500, + maximum = 10000, + step = 1, + default = 2000, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x01 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode1FixedDuty, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE1_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode2AutoRpmT1, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_T1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode2AutoRpmT2, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_T2), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 50, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode2AutoRpmT3, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_T3), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 40, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode2AutoRpmT4, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_T4), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 30, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode2AutoRpmF1, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_F1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 85, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode2AutoRpmF2, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_F2), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 70, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode2AutoRpmF3, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_F3), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x02 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode2AutoRpmF4, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_RPM_F4), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE2_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 50, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode3AutoDutyT1, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_T1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode3AutoDutyT2, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_T2), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 50, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode3AutoDutyT3, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_T3), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 40, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode3AutoDutyT4, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_T4), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 30, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode3AutoDutyF1, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_F1), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 85, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode3AutoDutyF2, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_F2), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 70, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode3AutoDutyF3, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_F3), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 60, + endnumeric; + endif; + + suppressif NOT ideqval SETUP_DATA.Fan3SmartFanMode == 0x03 + OR ideqval SETUP_DATA.SmartFanEnable == 0x00; + numeric varid = SETUP_DATA.Fan3Mode3AutoDutyF4, + prompt = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_AUTO_DUTY_F4), + help = STRING_TOKEN(STR_F81866_SMARTFAN_FAN_MODE3_HELP), + flags = RESET_REQUIRED, + minimum = 1, + maximum = 100, + step = 1, + default = 50, + endnumeric; + endif; + + endform; +#endif // F81866_SMF_SUPPORT + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SIO formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + form formid = AUTO_ID(F81866_FORM_ID), + title = STRING_TOKEN(STR_F81866_SIO_FORM); + SUBTITLE(STRING_TOKEN(STR_F81866_SIO_FORM)) + + SEPARATOR + + text + help = STRING_TOKEN(STR_F81866_SIO_FORM_HELP), + text = STRING_TOKEN(STR_F81866_SIO_PROMPT), + text = STRING_TOKEN(STR_F81866), + flags = 0, + key = 0; + + //Goto Floppy Form + suppressif ideqval FDC_V_DATA.DevImplemented == 0x00; + goto F81866_FLOPPY_FORM_ID, + prompt = STRING_TOKEN(STR_F81866_FLOPPY_FORM), + help = STRING_TOKEN(STR_F81866_FLOPPY_FORM_HELP); + endif; + + //Goto Serial 0 Form + suppressif ideqval COMA_V_DATA.DevImplemented == 0x00; + goto F81866_SERIAL0_FORM_ID, + prompt = STRING_TOKEN(STR_F81866_SERIAL0_FORM), + help = STRING_TOKEN(STR_F81866_SERIAL0_FORM_HELP); + endif; + + //Goto Serial 1 Form + suppressif ideqval COMB_V_DATA.DevImplemented == 0x00; + goto F81866_SERIAL1_FORM_ID, + prompt = STRING_TOKEN(STR_F81866_SERIAL1_FORM), + help = STRING_TOKEN(STR_F81866_SERIAL1_FORM_HELP); + endif; + + //Goto Serial 2 Form + suppressif ideqval COMC_V_DATA.DevImplemented == 0x00; + goto F81866_SERIAL2_FORM_ID, + prompt = STRING_TOKEN(STR_F81866_SERIAL2_FORM), + help = STRING_TOKEN(STR_F81866_SERIAL2_FORM_HELP); + endif; + + //Goto Serial 3 Form + suppressif ideqval COMD_V_DATA.DevImplemented == 0x00; + goto F81866_SERIAL3_FORM_ID, + prompt = STRING_TOKEN(STR_F81866_SERIAL3_FORM), + help = STRING_TOKEN(STR_F81866_SERIAL3_FORM_HELP); + endif; + + //Goto Serial 4 Form + suppressif ideqval COME_V_DATA.DevImplemented == 0x00; + goto F81866_SERIAL4_FORM_ID, + prompt = STRING_TOKEN(STR_F81866_SERIAL4_FORM), + help = STRING_TOKEN(STR_F81866_SERIAL4_FORM_HELP); + endif; + + //Goto Serial 5 Form + suppressif ideqval COMF_V_DATA.DevImplemented == 0x00; + goto F81866_SERIAL5_FORM_ID, + prompt = STRING_TOKEN(STR_F81866_SERIAL5_FORM), + help = STRING_TOKEN(STR_F81866_SERIAL5_FORM_HELP); + endif; + + //Goto Parallel Form + suppressif ideqval LPT_V_DATA.DevImplemented == 0x00; + goto F81866_PARALLEL_FORM_ID, + prompt = STRING_TOKEN(STR_F81866_PARALLEL_FORM), + help = STRING_TOKEN(STR_F81866_PARALLEL_FORM_HELP); + endif; + + endform;//SIO Form + + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define FDC formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + form formid = AUTO_ID(F81866_FLOPPY_FORM_ID), + title = STRING_TOKEN(STR_F81866_FLOPPY_FORM); + SUBTITLE(STRING_TOKEN(STR_F81866_FLOPPY_FORM)) + + SEPARATOR + + checkbox varid = FDC_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81866_FLOPPY_PROMPT), + help = STRING_TOKEN(STR_F81866_FLOPPY_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval FDC_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81866_FLOPPY_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81866_FLOPPY_CONFIG_VALUE), + flags = 0, + key = 0; + endif; //SIO_SETUP_VAR.FdcEnable == 0x00; + + SEPARATOR + + suppressif ideqval FDC_NV_DATA.DevEnable == 0x00; + oneof varid = FDC_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_FLOPPY_SETTINGS1), value = 1, flags = RESET_REQUIRED; + // option text = STRING_TOKEN(STR_F81866_FLOPPY_SETTINGS2), value = 2, flags = RESET_REQUIRED; + // option text = STRING_TOKEN(STR_F81866_FLOPPY_SETTINGS3), value = 3, flags = RESET_REQUIRED; + endoneof; + endif; //SIO_SETUP_VAR.FdcEnable == 0x00; + + suppressif ideqval FDC_NV_DATA.DevEnable == 0x00; + oneof varid = FDC_NV_DATA.DevMode, + prompt = STRING_TOKEN(STR_SELECT_MODE), + help = STRING_TOKEN(STR_F81866_FLOPPY_MODE_HELP), + option text = STRING_TOKEN(STR_F81866_FLOPPY_MODE1), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_FLOPPY_MODE2), value = 1, flags = RESET_REQUIRED; + endoneof; + endif; //SIO_SETUP_VAR.FdcEnable == 0x00; + endform; //Floppy Form + + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SP0 formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + form formid = AUTO_ID(F81866_SERIAL0_FORM_ID), + title = STRING_TOKEN(STR_F81866_SERIAL0_FORM); + SUBTITLE(STRING_TOKEN(STR_F81866_SERIAL0_FORM)) + + SEPARATOR + + checkbox varid = COMA_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81866_SERIAL_PROMPT), + help = STRING_TOKEN(STR_F81866_SERIAL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval COMA_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81866_SERIAL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81866_SERIAL0_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.ComAEnable == 0x00; + + SEPARATOR + + suppressif ideqval COMA_NV_DATA.DevEnable == 0x00; + oneof varid = COMA_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL0_SETTINGS1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS2), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS3), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS4), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS5), value = 5, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.ComAEnable == 0x00; + + endform; //Serial 0 Form + + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SP1 formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + form formid = AUTO_ID(F81866_SERIAL1_FORM_ID), + title = STRING_TOKEN(STR_F81866_SERIAL1_FORM); + SUBTITLE(STRING_TOKEN(STR_F81866_SERIAL1_FORM)) + + SEPARATOR + + checkbox varid = COMB_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81866_SERIAL_PROMPT), + help = STRING_TOKEN(STR_F81866_SERIAL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval COMB_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81866_SERIAL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81866_SERIAL1_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.ComBEnable == 0x00; + + SEPARATOR + + suppressif ideqval COMB_NV_DATA.DevEnable == 0x00; + oneof varid = COMB_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL1_SETTINGS1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS2), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS3), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS4), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS5), value = 5, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.ComBEnable == 0x00; + + endform; // Serial 1 Form + + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SP2 formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + form formid = AUTO_ID(F81866_SERIAL2_FORM_ID), + title = STRING_TOKEN(STR_F81866_SERIAL2_FORM); + SUBTITLE(STRING_TOKEN(STR_F81866_SERIAL2_FORM)) + + SEPARATOR + + checkbox varid = COMC_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81866_SERIAL_PROMPT), + help = STRING_TOKEN(STR_F81866_SERIAL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval COMC_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81866_SERIAL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81866_SERIAL2_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.ComCEnable == 0x00; + + SEPARATOR + + suppressif ideqval COMC_NV_DATA.DevEnable == 0x00; + oneof varid = COMC_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL2_SETTINGS1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS4), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS5), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS6), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS7), value = 5, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.ComCEnable == 0x00; + + endform; // Serial 2 Form + + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SP3 formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + form formid = AUTO_ID(F81866_SERIAL3_FORM_ID), + title = STRING_TOKEN(STR_F81866_SERIAL3_FORM); + SUBTITLE(STRING_TOKEN(STR_F81866_SERIAL3_FORM)) + + SEPARATOR + + checkbox varid = COMD_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81866_SERIAL_PROMPT), + help = STRING_TOKEN(STR_F81866_SERIAL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval COMD_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81866_SERIAL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81866_SERIAL3_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.ComDEnable == 0x00; + + SEPARATOR + + suppressif ideqval COMD_NV_DATA.DevEnable == 0x00; + oneof varid = COMD_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL3_SETTINGS1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS4), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS5), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS6), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS7), value = 5, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.ComDEnable == 0x00; + + endform; // Serial 3 Form + + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SP4 formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + form formid = AUTO_ID(F81866_SERIAL4_FORM_ID), + title = STRING_TOKEN(STR_F81866_SERIAL4_FORM); + SUBTITLE(STRING_TOKEN(STR_F81866_SERIAL4_FORM)) + + SEPARATOR + + checkbox varid = COME_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81866_SERIAL_PROMPT), + help = STRING_TOKEN(STR_F81866_SERIAL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval COME_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81866_SERIAL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81866_SERIAL4_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.ComEEnable == 0x00; + + SEPARATOR + + suppressif ideqval COME_NV_DATA.DevEnable == 0x00; + oneof varid = COME_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL4_SETTINGS1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS4), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS5), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS6), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS7), value = 5, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.ComEEnable == 0x00; + + endform; // Serial 4 Form + + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SP5 formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + form formid = AUTO_ID(F81866_SERIAL5_FORM_ID), + title = STRING_TOKEN(STR_F81866_SERIAL5_FORM); + SUBTITLE(STRING_TOKEN(STR_F81866_SERIAL5_FORM)) + + SEPARATOR + + checkbox varid = COMF_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81866_SERIAL_PROMPT), + help = STRING_TOKEN(STR_F81866_SERIAL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval COMF_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81866_SERIAL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81866_SERIAL5_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.ComFEnable == 0x00; + + SEPARATOR + + suppressif ideqval COMF_NV_DATA.DevEnable == 0x00; + oneof varid = COMF_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL5_SETTINGS1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS4), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS5), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS6), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL_SETTINGS7), value = 5, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.ComFEnable == 0x00; + + suppressif ideqval COMF_NV_DATA.DevEnable == 0x00; + oneof varid = COMF_NV_DATA.DevMode, + prompt = STRING_TOKEN(STR_SELECT_MODE), + help = STRING_TOKEN(STR_F81866_SERIAL_MODE_HELP), + option text = STRING_TOKEN(STR_F81866_SERIAL6_MODE1), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL6_MODE2), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_SERIAL6_MODE3), value = 2, flags = RESET_REQUIRED; + endoneof; + endif; + endform; // Serial 5 Form + + //////////////////////////////////////////////////////////////////////////////////////////////////////// + ///////////////////////////////////////Define Paralel formset form////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + form formid = AUTO_ID(F81866_PARALLEL_FORM_ID), + title = STRING_TOKEN(STR_F81866_PARALLEL_FORM); + SUBTITLE(STRING_TOKEN(STR_F81866_PARALLEL_FORM)) + + SEPARATOR + + checkbox varid = LPT_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81866_PARALLEL_PROMPT), + help = STRING_TOKEN(STR_F81866_PARALLEL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval LPT_NV_DATA.DevEnable == 0x0; + text + help = STRING_TOKEN(STR_F81866_PARALLEL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81866_PARALLEL_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.LptEnable == 0x0; + + SEPARATOR + + suppressif ideqval LPT_NV_DATA.DevEnable == 0x0 + OR ideqval LPT_NV_DATA.DevMode == 0x4 + OR ideqval LPT_NV_DATA.DevMode == 0x5 + OR ideqval LPT_NV_DATA.DevMode == 0x6; + oneof varid = LPT_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLEL_SETTINGS0), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLEL_SETTINGS1), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLEL_SETTINGS2), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLEL_SETTINGS3), value = 4, flags = RESET_REQUIRED; + // option text = STRING_TOKEN(STR_F81866_PARALLEL_SETTINGS4), value = 5, flags = RESET_REQUIRED; + // option text = STRING_TOKEN(STR_F81866_PARALLEL_SETTINGS5), value = 6, flags = RESET_REQUIRED; + // option text = STRING_TOKEN(STR_F81866_PARALLEL_SETTINGS6), value = 7, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.LptEnable == 0x0; + + suppressif ideqval LPT_NV_DATA.DevEnable == 0x0 + OR ideqval LPT_NV_DATA.DevMode == 0x1 + OR ideqval LPT_NV_DATA.DevMode == 0x2 + OR ideqval LPT_NV_DATA.DevMode == 0x3 + OR ideqval LPT_NV_DATA.DevMode == 0x0; + oneof varid = LPT_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLELE_SETTINGS0), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLELE_SETTINGS1), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLELE_SETTINGS2), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLELE_SETTINGS3), value = 4, flags = RESET_REQUIRED; + // option text = STRING_TOKEN(STR_F81866_PARALLELE_SETTINGS4), value = 5, flags = RESET_REQUIRED; + // option text = STRING_TOKEN(STR_F81866_PARALLELE_SETTINGS5), value = 6, flags = RESET_REQUIRED; + // option text = STRING_TOKEN(STR_F81866_PARALLELE_SETTINGS6), value = 7, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.LptEnable == 0x0; + + suppressif ideqval LPT_NV_DATA.DevEnable == 0x0; + oneof varid = LPT_NV_DATA.DevMode, + prompt = STRING_TOKEN(STR_SELECT_MODE), + help = STRING_TOKEN(STR_F81866_PARALLEL_MODE_HELP), + option text = STRING_TOKEN(STR_F81866_PARALLEL_MODE0), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLEL_MODE1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLEL_MODE2), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLEL_MODE3), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLEL_MODE4), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLEL_MODE5), value = 5, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLEL_MODE6), value = 6, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.LptEnable == 0x0; + + endform; // Parralel Form + +#endif //FORM_SET_FORM + +#endif//ADVANCED_FORM_SET + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Board/IO/F81866/F81866.UNI b/Board/IO/F81866/F81866.UNI Binary files differnew file mode 100644 index 0000000..07924ab --- /dev/null +++ b/Board/IO/F81866/F81866.UNI diff --git a/Board/IO/F81866/F81866.chm b/Board/IO/F81866/F81866.chm Binary files differnew file mode 100644 index 0000000..ddbf7fa --- /dev/null +++ b/Board/IO/F81866/F81866.chm diff --git a/Board/IO/F81866/F81866DXE.C b/Board/IO/F81866/F81866DXE.C new file mode 100644 index 0000000..269cbb1 --- /dev/null +++ b/Board/IO/F81866/F81866DXE.C @@ -0,0 +1,1411 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866DXE.C 3 2/03/12 2:02a Elviscai $ +// +// $Revision: 3 $ +// +// $Date: 2/03/12 2:02a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866DXE.C $ +// +// 3 2/03/12 2:02a Elviscai +// [TAG] EIPNONE +// [Category] Bug Fix +// [Solution] Add WDT_INIT routine for WDT +// +// 2 12/14/11 9:19p Kasalinyi +// [TAG] EIPNone +// [Category] Improvement +// [Description] Fix Smart Function build error +// [Files] F81866DXE.C +// F81866.UNI +// F81866.MAK +// IO_F81866.SDL +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] F81866.CIF +// IO_F81866.SDL +// F81866.ASL +// F81866.MAK +// F81866.SD +// F81866.UNI +// F81866DXE.C +// F81866PEI.C +// F81866PeiDebugger.C +// F81866Setup.C +// F81866Setup.H +// History.txt +// F81866.chm +// +// 4 3/21/11 9:41p Mikes +// seperate the core and oem job +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81866DXE.C> +// +// Description: 1. Port SIO DXE initial table and routine for genericsio.c +// 2. Define enter/exit config mode scrip table +// 3. Define SIO bootscriptable table +// +//<AMI_FHDR_END> +//************************************************************************* +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- +#include <Efi.h> +#include <Token.h> +#include <GenericSIO.h> +#include <Setup.h> +#include <Protocol\AmiSio.h> +#include <Protocol\PciIo.h> +#include <AmiCspLib.h> +#include "BSP\DxeIoTable.h" + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- +#define INITIAL_ROUTINE(name) \ +static EFI_STATUS name(\ + IN AMI_SIO_PROTOCOL *AmiSio,\ + IN EFI_PCI_IO_PROTOCOL *PciIo,\ + IN SIO_INIT_STEP InitStep\ +); + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- +EFI_BOOT_SCRIPT_SAVE_PROTOCOL * BootScriptProtocol = NULL; +#if (IODECODETYPE) +// SIO DECODE list creation code must be in this order +typedef EFI_STATUS (IO_RANGE_DECODE)( +// IN void *LpcPciIo, + IN EFI_PCI_IO_PROTOCOL *LpcPciIo, + IN UINT16 DevBase, + IN UINT8 UID, + IN SIO_DEV_TYPE Type +); +extern IO_RANGE_DECODE SIO_IoRange_Decode_LIST EndOfInitList; +static IO_RANGE_DECODE* CspIoRangeDecodeList[] = {SIO_IoRange_Decode_LIST NULL}; +#endif //#if (IODECODETYPE) + +extern VOID SioCfgMode(GSPIO *Sio, BOOLEAN Enter); +extern VOID DevSelect(SPIO_DEV *Dev); +extern VOID SioRegister(SPIO_DEV *Dev, BOOLEAN Write, UINT8 Reg, UINT8 *Val); + +//smart fan +#if F81866_SMF_SUPPORT +extern VOID F81866SmartFunction(VOID); +#endif + +EFI_STATUS LoopCspIoDecodeListInit( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN AMI_SIO_PROTOCOL *AmiSio +); + +VOID ProgramSioRegisterTable( + IN AMI_SIO_PROTOCOL *AmiSio, + IN DXE_DEVICE_INIT_DATA *Table, + IN UINT8 Count +); + +VOID ProgramIsaRegisterTable( + IN UINT16 Index, + IN UINT16 Data, + IN DXE_DEVICE_INIT_DATA *Table, + IN UINT8 Count +); + +VOID ProgramRtRegisterTable( + IN UINT16 Base, + IN DXE_DEVICE_INIT_DATA *Table, + IN UINT8 Count +); + +VOID SaveSxSioRegisterTable( + IN UINT16 Index, + IN UINT16 Data, + IN UINT8 *Table, + IN UINT8 Count +); +VOID SaveSxRtRegisterTable( + IN UINT16 Base, + IN UINT16 *Table, + IN UINT8 Count +); +VOID ClearDevResource( + IN SPIO_DEV* dev +); +//Declare initial routines for your SPIO_DEV_LST list. +INITIAL_ROUTINE(FDC_Init) + +INITIAL_ROUTINE(COM_Init) + +INITIAL_ROUTINE(LPT_Init) + +INITIAL_ROUTINE(KBC_Init) + +INITIAL_ROUTINE(PME_Init) + +INITIAL_ROUTINE(HWM_Init) + +INITIAL_ROUTINE(GPIO_Init) + +INITIAL_ROUTINE(WDT_Init) + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: F81866_DevLst +// +// Description: Table filled with SIO porting information +// +//------------+-------+-------+--------+---------+---------+-------------+------------+------------+-----------+------------+------------+-------------| +//SIO_DEV_TYP | UINT8 | UINT8 | UINT16 | BOOLEAN | BOOLEAN | UINT8 | UINT8 | UINT16 | UINT16 | UINT16 | UINT8 | SIO_INIT | +//Type | LDN | UID | PnpId | Impleme | HasSetu | Flags | AslName[5] | ResBase[2] | ResLen[2] | IrqMask[2] | DmaMask[2] | InitRoutine | +//------------+-------+-------+--------+---------+---------+-------------+------------+------------+-----------+------------+------------+-------------| +// Field "Falgs" is needed to indicate that SIO Logical Device represented +// by this table entry shares all or some resources with previous entry. +// Such situation is sutable for FDC - and PS2 controller +// This field must be filled properely in order to have driver working right. +// Here possible Flags Settings +// #define SIO_SHR_NONE 0x00 +// #define SIO_SHR_IO1 0x01 //device shares resources programmed in SIO_1_BASE_REG +// #define SIO_SHR_IO2 0x02 //device shares resources programmed in SIO_2_BASE_REG +// #define SIO_SHR_IO 0x03 //device shares resources programmed in all SIO_BASE_REG +// #define SIO_SHR_IRQ1 0x04 +// #define SIO_SHR_IRQ2 0x08 +// #define SIO_SHR_IRQ 0x0C +// #define SIO_SHR_DMA1 0x10 +// #define SIO_SHR_DMA2 0x20 +// #define SIO_SHR_DMA 0x30 +// #define SIO_SHR_ALL 0x3F +// #define SIO_NO_RES 0x80 //this bit will be set if GCD call to allocate resource succeed +// //at least one call must return SUCCESS if this flag +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> +//AMI_TODO: Please check below notes. +//1. if device has no ASL code and has IO base register to be initialized, fill it in below table +//2. If device has no IO base register to be initialized, set flag to SIO_NO_RES +//3. if more device PnpId is 0x0C08, please check the UID of these devices. +static SPIO_DEV_LST F81866_DevLst[]={ +//If device Implemented=FALSE the rest of the table will be ignored, just to avoid compilation ERROR +//Type LDN UID PnpId Implement HasSetu Share RES AslName[5] Base Length IrqMask DmaMask InitRoutine +//=============================================================================== +{dsFDC, F81866_LDN_FDC, 0, 0x0604, F81866_FLOPPY_PORT_PRESENT, TRUE, SIO_SHR_NONE, {"FDC"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, FDC_Init},//LDN 0x00 +{dsLPT, F81866_LDN_LPT, 0, 0x0400, F81866_PARALLEL_PORT_PRESENT, TRUE, SIO_SHR_NONE, {"LPTE"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, LPT_Init},//LDN 0x03 +{dsUART, F81866_LDN_UART1, 0, 0x0501, F81866_SERIAL_PORT0_PRESENT, TRUE, SIO_SHR_NONE, {"UAR1"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, COM_Init},//LDN 0x10 +{dsUART, F81866_LDN_UART2, 1, 0x0501, F81866_SERIAL_PORT1_PRESENT, TRUE, SIO_SHR_NONE, {"UAR2"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, COM_Init},//LDN 0x11 +{dsUART, F81866_LDN_UART3, 2, 0x0501, F81866_SERIAL_PORT2_PRESENT, TRUE, SIO_SHR_NONE, {"UAR3"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, COM_Init},//LDN 0x12 +{dsUART, F81866_LDN_UART4, 3, 0x0501, F81866_SERIAL_PORT3_PRESENT, TRUE, SIO_SHR_IRQ1, {"UAR4"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, COM_Init},//LDN 0x13 +{dsUART, F81866_LDN_UART5, 4, 0x0501, F81866_SERIAL_PORT4_PRESENT, TRUE, SIO_SHR_NONE, {"UAR5"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, COM_Init},//LDN 0x14 +{dsUART, F81866_LDN_UART6, 5, 0x0501, F81866_SERIAL_PORT5_PRESENT, TRUE, SIO_SHR_IRQ1, {"UAR6"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, COM_Init},//LDN 0x15 +{dsPS2CK, F81866_LDN_PS2K, 0, 0x0303, F81866_KEYBOARD_PRESENT, FALSE, SIO_SHR_NONE, {"PS2K"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, KBC_Init},//LDN 0x05 +#if F81866_MOUSE_PRESENT +{dsPS2CM, F81866_LDN_PS2M, 0, 0x0F03, F81866_MOUSE_PRESENT, FALSE, SIO_SHR_IO, {"PS2M"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, NULL},//LDN 0x05 +#endif +{dsPME, F81866_LDN_PME, 0, 0x0C08, F81866_PME_CONTROLLER_PRESENT,FALSE, SIO_NO_RES, {NULL}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, PME_Init},//LDN 0x0A +{dsHwMon, F81866_LDN_HWM, 1, 0x0C08, F81866_HWM_PRESENT, FALSE, SIO_SHR_NONE, {NULL}, {IO3B, 0}, {IO3L, 0}, {0, 0}, {0, 0}, HWM_Init},//LDN 0x04 +{dsGPIO, F81866_LDN_GPIO, 2, 0x0C08, F81866_GPIO_PORT_PRESENT, FALSE, SIO_SHR_NONE, {NULL}, {IO1B, 0}, {IO1L, 0}, {0, 0}, {0, 0}, GPIO_Init},//LDN 0x06 +{dsNone, F81866_LDN_WDT, 3, 0x0C08, F81866_WDT_PRESENT, FALSE, SIO_SHR_NONE, {NULL}, {IO2B, 0}, {IO2L, 0}, {0, 0}, {0, 0}, WDT_Init},//LDN 0x06 +//=============================================================================== +};//SPIO_DEV_LST mSpioDeviceList[] END of structure Buffer +#define F81866_DEV_CNT (sizeof(F81866_DevLst)/sizeof(SPIO_DEV_LST)) + +// Note: below bootscript table->more registers, more post time +//------------------------------------------------------------------------- +// Define the registers to save/restore in BootScriptSave table when SIO sleep +//------------------------------------------------------------------------- +static UINT8 F81866_GLOBAL_REGS[] = { + //AMI_TODO: + //Global registers. For example: + //LDN Register, Multi-fun registers and Device Specific registers + //0x07, + 0x25,0x26,0x27,0x28,0x29,0x2A,0x2B,0x2C,0x2D +}; +#define F81866_G_REG_CNT (sizeof(F81866_GLOBAL_REGS)/sizeof(UINT8)) + +//------------------------------------------------------------------------- +// Define the local registers for configure SIO +//------------------------------------------------------------------------- +static UINT8 F81866_LOCAL_REGS[] = { +//AMI_TODO: + F81866_ACTIVATE_REGISTER, //Activate Reg + F81866_BASE1_HI_REGISTER, //IO Base Registers + F81866_BASE1_LO_REGISTER, //IO Base Registers + F81866_BASE2_HI_REGISTER, //IO Base Registers + F81866_BASE2_LO_REGISTER, //IO Base Registers + F81866_IRQ1_REGISTER, //IRQ & DMA Select Regs + F81866_IRQ2_REGISTER, //IRQ & DMA Select Regs + F81866_DMA1_REGISTER, //IRQ & DMA Select Regs + F81866_DMA2_REGISTER, //IRQ & DMA Select Regs + //Logical Device Configuration Registers(Dwevice Specific) + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE, + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE, +}; +#define F81866_L_REG_CNT (sizeof(F81866_LOCAL_REGS)/sizeof(UINT8)) + +//------------------------------------------------------------------------- +// Define script variable for enter config mode +//------------------------------------------------------------------------- +static SPIO_SCRIPT F81866_OPEN_CONFIG[]={ + //AMI_TODO: + + { + 1, //BOOLEAN IdxDat; //1=IDX 0=DAT + 1, //BOOLEAN WrRd; //1=Write 0=Read + F81866_CONFIG_MODE_ENTER_VALUE //UINT8 Value; //if WrRd=0 wait for this data to come + },{ + 1, //BOOLEAN IdxDat; //1=IDX 0=DAT + 1, //BOOLEAN WrRd; //1=Write 0=Read + F81866_CONFIG_MODE_ENTER_VALUE //UINT8 Value; //if WrRd=0 wait for this data to come + } +}; + +//------------------------------------------------------------------------- +// Define script variable for exit config mode +//------------------------------------------------------------------------- +static SPIO_SCRIPT F81866_CLOSE_CONFIG[]={ + //AMI_TODO: + + { + 1, //BOOLEAN IdxDat; //1=IDX 0=DAT + 1, //BOOLEAN WrRd; //1=Write 0=Read + F81866_CONFIG_MODE_EXIT_VALUE //UINT8 Value; //if WrRd=0 wait for this data to come + } +}; + +//------------------------------------------------------------------------- +// Here comes the table telling how to enter "SIO Config Mode" +//------------------------------------------------------------------------- +static SPIO_SCRIPT_LST F81866_ENTER_CONFIG={ + cfgByteSeq, //Operation Type + (sizeof(F81866_OPEN_CONFIG))/(sizeof(SPIO_SCRIPT)), + &F81866_OPEN_CONFIG //Instruction +}; + +//------------------------------------------------------------------------- +// Here comes the table telling how to exit "SIO Config Mode" +//------------------------------------------------------------------------- +static SPIO_SCRIPT_LST F81866_EXIT_CONFIG={ + cfgByteSeq, //Operation Type + (sizeof(F81866_CLOSE_CONFIG))/(sizeof(SPIO_SCRIPT)), + &F81866_CLOSE_CONFIG //Instruction +}; + +//------------------------------------------------------------------------- +// If Spio uses complicated way to enter and exit config mode +// use cfgRoutine as Operation Type instead +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +// Here goes SPIO_LIST_ITEM structure for F81866 +//------------------------------------------------------------------------- +// value of -1 (0xF..F) means Do not check this parameter +#ifndef SB_BUS_NUM +#define SB_BUS_NUM SIO_SB_BUS_NUM +#endif +#ifndef SB_DEV_NUM +#define SB_DEV_NUM SIO_SB_DEV_NUM +#endif +#ifndef SB_FUNC_NUM +#define SB_FUNC_NUM SIO_SB_FUNC_NUM +#endif + +SPIO_LIST_ITEM F81866={ + //This Information is needed to identify right LPC bridge for the SIO + -1, //UINT32 IsaVenDevId; + -1, //UINT32 IsaSubVenId; + SB_BUS_NUM, //UINT8 IsaBusNo; + SB_DEV_NUM, //UINT8 IsaDevNo; + SB_FUNC_NUM, //UINT8 IsaFuncNo; + //This is the information Needed to access SIO Generic Registers + //for the second SIO in the system change F81866 name to to SIO2_.... + //and so on + F81866_CONFIG_INDEX, //UINT16 SioIndex; + F81866_CONFIG_DATA, //UINT16 SioData; + // Dev Select and Activate + F81866_LDN_SEL_REGISTER, //UINT8 DevSel; + F81866_ACTIVATE_REGISTER, //UINT8 Activate; + F81866_ACTIVATE_VALUE, //UINT8 ActivVal; + F81866_DEACTIVATE_VALUE, //UINT8 DeactVal; + //Generic registers location + F81866_BASE1_HI_REGISTER, //UINT8 Base1Hi; + F81866_BASE1_LO_REGISTER, //UINT8 Base1Lo; + F81866_BASE2_HI_REGISTER, //UINT8 Base2Hi; + F81866_BASE2_LO_REGISTER, //UINT8 Base2Lo; + F81866_IRQ1_REGISTER, //UINT8 Irq1; + F81866_IRQ2_REGISTER, //UINT8 Irq2; + F81866_DMA1_REGISTER, //UINT8 Dma1; + F81866_DMA2_REGISTER, //UINT8 Dma2; + //List of devices inside this SIO + F81866_DEV_CNT, //UINTN DevCount; + &F81866_DevLst[0], //SPIO_DEV_LST *SioDevList; + //List of valid registers inside SIO to check if they has to be saved + //in BOOT_SCRIPT_SAVE for S3 state Resume + //This is for global registers which are the same for all devices in SIO + F81866_G_REG_CNT, //UINTN GlobalInclRegCount; + &F81866_GLOBAL_REGS[0], //UINT8 *GlobalIncludeReg; + //This is for Local registers they are unique for each device in SIO + F81866_L_REG_CNT, //UINTN LocalInclRegCount; + &F81866_LOCAL_REGS[0], //UINT8 *LocalIncludeReg; + //How To enter/exit Configuration mode if any + &F81866_ENTER_CONFIG, //SPIO_SCRIPT_LST *EnterCfgMode; + &F81866_EXIT_CONFIG, //SPIO_SCRIPT_LST *ExitCfgMode; +}; + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: LoopCspIoDecodeListInit +// +// Description: +// This function goes throught the elinked list IoRangeDecodeList +// +// Input: +// IN EFI_PCI_IO_PROTOCOL *PciIo - Read/Write PCI config space +// IN AMI_SIO_PROTOCOL *AmiSio - contents SIO device information +// +// Output: +// EFI_NOT_FOUND - can't find the decode routine. +// EFI_SUCCESS - decode sucessfully. +// +// Modified: Nothing +// +// Referrals: None +// +// Notes: +// +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +EFI_STATUS LoopCspIoDecodeListInit( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN AMI_SIO_PROTOCOL *AmiSio ) +{ + EFI_STATUS Status; + SPIO_DEV *dev=(SPIO_DEV*)AmiSio; + #if(IODECODETYPE) + UINTN i; + + for(i=0; CspIoRangeDecodeList[i]; i++) + { + Status = CspIoRangeDecodeList[i](PciIo,dev->VlData.DevBase1, dev->DeviceInfo->UID, dev->DeviceInfo->Type); + if(Status == EFI_SUCCESS) return Status; + } + #else + Status = SbLib_SetLpcDeviceDecoding(PciIo,dev->VlData.DevBase1, dev->DeviceInfo->UID, dev->DeviceInfo->Type); + #endif + + return Status; +} +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +//!!!!!!!!!!! PORTING REQUIRED !!!!!!!!!!! PORTING REQUIRED !!!!!!!!!!!* +//!!!!!!!!!!!!!!!! must be maintained for SIO devices!!!!!!!!!!!!!!!!!!* +//------------------------------------------------------------------------- +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: XXXX_Init +// +// Description: +// Each of INIT functions will be called twice by GenericSIO after standart +// initialization(Assigning and Programming IO/IRQ/DMA resources), +// First time it will be called before Activating the device, +// If device requires some additional initialization like +// - programming SIO device registers except IO1, IO2, IRQ1, IRQ2, DMA1 DMA2 +// Second time After Installing AmiSioProtocol, and DevicePath Protocol of SIO Device. +// If device requires some additional initialization like +// - if programming of some runtime registers like SIO_GPIO, SIO_PM SIO_HHM is needed +// - implementation of some additional setup questions +// do it here +// NOTE#1 Once SIO_INIT function invoced SIO Logical device allready selected +// NOTE#2 If Device Does not require any additional initialization just set +// InitRoutine field to NULL in SioDevLst[] Table. +// +// Input: +// IN AMI_SIO_PROTOCOL *AmiSio - Logical Device's information +// IN EFI_PCI_IO_PROTOCOL *PciIo - Read/Write PCI config space +// IN SIO_INIT_STEP InitStep - Initial routine step +// +// Output: None +// EFI_STATUS +// EFI_SUCCESS - Initial step sucessfully +// EFI_INVALID_PARAMETER - not find the initial step +// +// Modified: Nothing +// +// Referrals: None +// +// Note: +// It is recommended to have a separate Initialization Routine for each SIO Device. +// it will save you some code needed to detect which device is currently selected. +// case isGetSetupData: +// SIO implementation uses separate set of NVRAM variables +// associated with each LogicalDevice who has +// SPIO_DEV.DeviceInfo->HasSetup property set to true. +// Current Setup Settings are stored in SPIO_DEV.NvData. +// If due to different look and fill we need to overwrite standard +// Setup settings, we can do it here..... +// ===================================================== +// if(SetupData==NULL){ +// Status=GetSetupData(); +// if(EFI_ERROR(Status)) return Status; +// } +// dev->NvData.DevEnable = SetupData->FdcEnable; +// dev->NvData.DevPrsId = 0;//SetupData->FdcPrsId; +// dev->NvData.DevMode = 0;//SetupData->FdcMode; +// break; +// +// case isPrsSelect: +// If LDN uses non-standard way to determine possible resources(_PRS), +// or _PRS may wary based on LD mode. Then here we can get LD mode using +// SPIO_DEV.NvData.Mode field and get corresponded to the mode _PRS Buffer +// using GetPrsFromAml() function if ACPISUPPORT is ON. Or set of functions +// EFI_STATUS SetUartPrs(SPIO_DEV *Dev); +// EFI_STATUS SetLptPrs(SPIO_DEV *Dev, BOOLEAN UseDma); +// EFI_STATUS SetFdcPrs(SPIO_DEV *Dev); +// EFI_STATUS SetPs2kPrs(SPIO_DEV *Dev); +// EFI_STATUS SetPs2mPrs(SPIO_DEV *Dev); +// EFI_STATUS SetGamePrs(SPIO_DEV *Dev); +// EFI_STATUS SetMpu401Prs(SPIO_DEV *Dev); +// Defined in GenericSio.h +// +// case isBeforeActivate: +// //If any register needs to be initialized, whle enumerating all SIO devices. +// //Use NEW SbLib_SetLpcDeviceDecoding() function to set Device Decoding Range for +// //Legacy devices. Implementation in SbGeneric.c, definition in SbCspLib.h +// //===================================================== +// +// case isAfterActivate: +// //Ttis Initialization step is used to programm any runtime registers rsiding in +// //Decvice's decoded io space like SIO_GPIOs, SIO_PM, HHM registers. +// //This Programming is needed if device doesnot have or don't need driver to do so. +// //If there are a spetial driver like could be for HHM which could get THIS device handle +// //and programm like Terminal Driver for COM ports and Floppy Driver for FDC +// //nothing needs to be done here +// +// case isAfterBootScript: +// //This initialization step is needed to +// //Use NEW SbLib_SetLpcDeviceDecoding() function to set Device Decoding Range for Legacy devices +// +//------------------------------------------------------------------------- +// <AMI_PHDR_END> + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: FDC_Init +// +// Description: +// This function provide each initial routine in genericsio.c +// +// Input: +// IN AMI_SIO_PROTOCOL *AmiSio - Logical Device's information +// IN EFI_PCI_IO_PROTOCOL *PciIo - Read/Write PCI config space +// IN SIO_INIT_STEP InitStep - Initial routine step +// +// Output: +// EFI_SUCCESS - Initial step sucessfully +// EFI_INVALID_PARAMETER - not find the initial step +// +// Modified: Nothing +// +// Referrals: None +// +// Notes: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +static EFI_STATUS FDC_Init( + IN AMI_SIO_PROTOCOL *AmiSio, + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN SIO_INIT_STEP InitStep +) +{ + EFI_STATUS Status=EFI_SUCCESS; + SPIO_DEV *dev=(SPIO_DEV*)AmiSio; + UINT8 rv; //FdcMode Register + + switch (InitStep) + { + case isGetSetupData: + // Disable IODecode? + if((!dev->DeviceInfo->Implemented) || (!dev->NvData.DevEnable)) + LoopCspIoDecodeListInit(NULL,AmiSio); + break; + + case isPrsSelect: + break; + + case isBeforeActivate: + LoopCspIoDecodeListInit(PciIo,AmiSio); // Enable IODecode + + //AMI_TODO: please check the register define and program FDC mode + + //Read FDC Mode register + Status=AmiSio->Access(AmiSio,FALSE,FALSE,0xF0,&rv); + ASSERT_EFI_ERROR(Status); + if(EFI_ERROR(Status))return Status; + + if(dev->NvData.DevMode)rv |= 0x10; //Bit00 set = FDD is Write Protect + else rv &= (UINT8)(~0x10); + + Status=AmiSio->Access(AmiSio,TRUE,FALSE,0xF0,&rv); + ASSERT_EFI_ERROR(Status); + + + break; + + case isAfterActivate: + break; + + #if(CORE_AFTER_4634) + case isAfterBootScript: + break; + #endif + + default: Status=EFI_INVALID_PARAMETER; + } //switch + + return Status; +} + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: COM_Init +// +// Description: +// This function provide each initial routine in genericsio.c +// +// Input: +// IN AMI_SIO_PROTOCOL *AmiSio - Logical Device's information +// IN EFI_PCI_IO_PROTOCOL *PciIo - Read/Write PCI config space +// IN SIO_INIT_STEP InitStep - Initial routine step +// +// Output: +// EFI_SUCCESS - Initial step sucessfully +// EFI_INVALID_PARAMETER - not find the initial step +// +// Modified: Nothing +// +// Referrals: None +// +// Notes: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +static EFI_STATUS COM_Init( + IN AMI_SIO_PROTOCOL *AmiSio, + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN SIO_INIT_STEP InitStep +) +{ + EFI_STATUS Status=EFI_SUCCESS; + SPIO_DEV *dev=(SPIO_DEV*)AmiSio; + UINT8 rv; + + switch (InitStep) + { + case isGetSetupData: + if((!dev->DeviceInfo->Implemented) || (!dev->NvData.DevEnable)) { + LoopCspIoDecodeListInit(NULL,AmiSio); + ClearDevResource(dev); + } + break; + + case isPrsSelect: + break; + + case isBeforeActivate: + + //Only decode UART1/UART2. More others UART port is decode in PEI + //Attention! Remove the more com ports to PEI decode. + if(dev->DeviceInfo->UID <= 0x02) + LoopCspIoDecodeListInit(PciIo,AmiSio); + + //Programm Device Mode register here(if NEEDED)use AmiSioProtocol + if(DXE_COM_Mode_Init_Table[dev->DeviceInfo->UID].AndData8 == 0xFF) { + rv=DXE_COM_Mode_Init_Table[dev->DeviceInfo->UID].OrData8; + } else { + Status=AmiSio->Access(AmiSio, FALSE, FALSE, 0xF0, &rv); + ASSERT_EFI_ERROR(Status); + rv &= DXE_COM_Mode_Init_Table[dev->DeviceInfo->UID].AndData8; + rv |= DXE_COM_Mode_Init_Table[dev->DeviceInfo->UID].OrData8; + } + Status=AmiSio->Access(AmiSio,TRUE,FALSE,0xF0,&rv); + + //AMI_TODO: You can program device mode as follow: + + if(dev->DeviceInfo->UID == 0x05) { + Status=AmiSio->Access(AmiSio,FALSE,FALSE,0xF1,&rv); + ASSERT_EFI_ERROR(Status); + if(EFI_ERROR(Status))return Status; + //clear Bit4~3 where COM Port mode is: + rv &= 0xE7; + switch (dev->NvData.DevMode) { + case 0: + rv |= 0x00; //Bit4~3 = 000, Disable IR1 function + break; + case 1: + rv |= 0x10; //Bit4~3 = 010, Enable IR1 function, active pulse is 1.6uS + break; + case 2: + rv |= 0x18; //Bit4~3 = 011, Enable IR1 function, active pulse is 3/16 bit time + break; + default: return EFI_INVALID_PARAMETER; + } + Status=AmiSio->Access(AmiSio,TRUE,FALSE,0xF1,&rv); + ASSERT_EFI_ERROR(Status); + } + + //Programm Serial_X IRQ Share register. + if((dev->DeviceInfo->Flags & SIO_SHR_IRQ1) && dev->ResOwner) { + //enter cfgmode + SioCfgMode(dev->Owner, TRUE); + //set device resource owner share register + DevSelect(dev->ResOwner); + SioRegister(dev->ResOwner, FALSE, 0xF0, &rv);//read reg0xF0 value + rv |= 0x01; //Bit1:share or normal + SioRegister(dev->ResOwner, TRUE, 0xF0, &rv);//write reg0xF0 value + //set device irq register + DevSelect(dev); + SioRegister(dev->ResOwner, FALSE, 0x70, &rv);//read reg0x70 value + SioRegister(dev, TRUE, 0x70, &rv);//write reg0x70 value + SioRegister(dev, FALSE, 0xF0, &rv);//read reg0xF0 value + rv |= 0x01; //Bit1:share or normal + SioRegister(dev, TRUE, 0xF0, &rv);//write reg0xF0 value + //exit cfgmode + SioCfgMode(dev->Owner, FALSE); + dev->VlData.DevIrq1=dev->ResOwner->VlData.DevIrq1; + } + + break; + + case isAfterActivate: + break; + + #if(CORE_AFTER_4634) + case isAfterBootScript: + break; + #endif + + default: Status=EFI_INVALID_PARAMETER; + }//switch + return Status; +} + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: LPT_Init +// +// Description: +// This function provide each initial routine in genericsio.c +// +// Input: +// IN AMI_SIO_PROTOCOL *AmiSio - Logical Device's information +// IN EFI_PCI_IO_PROTOCOL *PciIo - Read/Write PCI config space +// IN SIO_INIT_STEP InitStep - Initial routine step +// +// Output: +// EFI_SUCCESS - Initial step sucessfully +// EFI_INVALID_PARAMETER - not find the initial step +// +// Modified: Nothing +// +// Referrals: None +// +// Notes: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +static EFI_STATUS LPT_Init( + IN AMI_SIO_PROTOCOL *AmiSio, + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN SIO_INIT_STEP InitStep +) +{ + EFI_STATUS Status=EFI_SUCCESS; + SPIO_DEV *dev=(SPIO_DEV*)AmiSio; + UINT8 rv; //LptMode Register + + switch (InitStep) { + case isGetSetupData: + // Disable decode? + if((!dev->DeviceInfo->Implemented) || (!dev->NvData.DevEnable)) + LoopCspIoDecodeListInit(NULL,AmiSio); + break; + + case isPrsSelect: + //depend on LPT Mode it may or may not use a DMA channel + Strcpy(&dev->DeviceInfo->AslName[0],"LPTE"); + if(dev->NvData.DevMode&0x04) { + #if ACPI_SUPPORT + //if ACPI is Supported get _PRS for Extended Parallel Port from DSDT + //last parameter is 0-based index in F81866_DevLst[] table. + Status=GetPrsFromAml(dev,"EPPR", 1); + #else + //if ACPI is not supported use corresponded Function seting + //"UseDma" parameter to TRUE for Extended Parallel Port + Status=SetLptPrs(dev, TRUE); + #endif + }else { + #if ACPI_SUPPORT + //if ACPI is Supported get _PRS for Standard Parallel Port from DSDT + //last parameter is 0-based index in WPCD376I_DevLst[] table. + Status=GetPrsFromAml(dev,"LPPR", 1); + #else + //if ACPI is not supported use corresponded Function seting + //"UseDma" parameter to FALSE for Standard Parallel Port + Status=SetLptPrs(dev, FALSE); + #endif + } + ASSERT_EFI_ERROR(Status); + + break; + + case isBeforeActivate: + LoopCspIoDecodeListInit(PciIo,AmiSio); // Enable IODecode + + //Programm Device Mode register here(if NEEDED)use AmiSioProtocol + + //AMI_TODO: You can program device mode as follow: + + //Programm Device Mode register here(if NEEDED)use AmiSioProtocol + Status=AmiSio->Access(AmiSio,FALSE,FALSE,0xF0,&rv); //LPT Configuration Reg, Read the reg value + ASSERT_EFI_ERROR(Status); + if(EFI_ERROR(Status))return Status; + + //Program Lpt Mode register following SIO Specification instructions. + //Set mode:Bit2-0 set = LPT mode + //clear lowest 3 bits where LPT mode is: + rv&=0xF8; + switch (dev->NvData.DevMode) { + case 0: rv|=4; //STD Printer Mode + break; + case 1: rv|=0; //SPP Mode + break; + case 2: rv|=1; //EPP-1.9 and SPP Mode + break; + case 3: rv|=5; //EPP-1.7 and SPP Mode + break; + case 4: rv|=2; //ECP Mode + break; + case 5: rv|=3; //ECP and EPP-1.9 Mode + break; + case 6: rv|=7; //ECP and EPP-1.7 Mode + break; + default: return EFI_INVALID_PARAMETER; + } + //Program back Device Mode register + Status=AmiSio->Access(AmiSio,TRUE,FALSE,0xF0,&rv); + ASSERT_EFI_ERROR(Status); + + break; + + case isAfterActivate: + break; + + #if(CORE_AFTER_4634) + case isAfterBootScript: + break; + #endif + + default: Status=EFI_INVALID_PARAMETER; + } //switch + + return Status; +} + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: KBC_Init +// +// Description: +// This function provide each initial routine in genericsio.c +// +// Input: +// IN AMI_SIO_PROTOCOL *AmiSio - Logical Device's information +// IN EFI_PCI_IO_PROTOCOL *PciIo - Read/Write PCI config space +// IN SIO_INIT_STEP InitStep - Initial routine step +// +// Output: +// EFI_SUCCESS - Initial step sucessfully +// EFI_INVALID_PARAMETER - not find the initial step +// +// Modified: Nothing +// +// Referrals: None +// +// Notes: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +static EFI_STATUS KBC_Init( + IN AMI_SIO_PROTOCOL *AmiSio, + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN SIO_INIT_STEP InitStep +) +{ + EFI_STATUS Status=EFI_SUCCESS; + + switch (InitStep) { + case isGetSetupData: + case isPrsSelect: + case isAfterActivate: + #if(CORE_AFTER_4634) + case isAfterBootScript: + #endif + break; + + case isBeforeActivate: + LoopCspIoDecodeListInit(PciIo,AmiSio); // Enable IODecode + break; + + default: Status=EFI_INVALID_PARAMETER; + } //switch + + return Status; +} + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: PME_Init +// +// Description: +// This function provide each initial routine in genericsio.c +// +// Input: +// IN AMI_SIO_PROTOCOL *AmiSio - Logical Device's information +// IN EFI_PCI_IO_PROTOCOL *PciIo - Read/Write PCI config space +// IN SIO_INIT_STEP InitStep - Initial routine step +// +// Output: +// EFI_SUCCESS - Initial step sucessfully +// EFI_INVALID_PARAMETER - not find the initial step +// +// Modified: Nothing +// +// Referrals: None +// +// Notes: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +static EFI_STATUS PME_Init( + IN AMI_SIO_PROTOCOL *AmiSio, + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN SIO_INIT_STEP InitStep +) +{ + EFI_STATUS Status=EFI_SUCCESS; + + #if F81866_PME_CONTROLLER_PRESENT + + + switch (InitStep) { + case isGetSetupData: + break; + + case isPrsSelect: + break; + + case isBeforeActivate: + // OEM_TODO: You need to fill DXE_PME_Init_Table[] first. + + break; + + case isAfterActivate: + break; + + #if(CORE_AFTER_4634) + case isAfterBootScript: + break; + #endif + + default: Status=EFI_INVALID_PARAMETER; + } //switch + #endif + + return Status; +} + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: HWM_Init +// +// Description: +// This function provide each initial routine in genericsio.c +// +// Input: +// IN AMI_SIO_PROTOCOL *AmiSio - Logical Device's information +// IN EFI_PCI_IO_PROTOCOL *PciIo - Read/Write PCI config space +// IN SIO_INIT_STEP InitStep - Initial routine step +// +// Output: +// EFI_SUCCESS - Initial step sucessfully +// EFI_INVALID_PARAMETER - not find the initial step +// +// Modified: Nothing +// +// Referrals: None +// +// Notes: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +static EFI_STATUS HWM_Init( + IN AMI_SIO_PROTOCOL *AmiSio, + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN SIO_INIT_STEP InitStep +) +{ + EFI_STATUS Status=EFI_SUCCESS; + SPIO_DEV *dev=(SPIO_DEV*)AmiSio; + BootScriptProtocol = dev->Owner->BootScript; + + #if F81866_HWM_PRESENT + + switch (InitStep) { + case isGetSetupData: + break; + + case isPrsSelect: + break; + + case isBeforeActivate: + // HWM registers initial if needed. + // AMI_TODO: Add init function for configure HWM SIO space. + + break; + + case isAfterActivate: + // HWM registers initial if needed. + // AMI_TODO: Add init function for configure HWM SIO space. + ProgramIsaRegisterTable(F81866_HWM_BASE_ADDRESS+0x05, \ + F81866_HWM_BASE_ADDRESS+0x06, \ + DXE_HWM_Init_Table_After_Active, + sizeof(DXE_HWM_Init_Table_After_Active)/sizeof(DXE_DEVICE_INIT_DATA)); + + #if F81866_SMF_SUPPORT + F81866SmartFunction(); + #endif + break; + + #if(CORE_AFTER_4634) + case isAfterBootScript: + //AMI_TODO: + // Restore HWM registers after Sx resume, if needed. + // Below HWM read/write interface is LPC/ISA interface, + // if other interface, please re-program it. + // This, Width, Address, Count, Buffer + SaveSxSioRegisterTable(F81866_HWM_BASE_ADDRESS+0x05, \ + F81866_HWM_BASE_ADDRESS+0x06, \ + DXE_HWM_SIO_BootScript_Table, + sizeof(DXE_HWM_SIO_BootScript_Table)/sizeof(UINT8)); + break; + #endif + + + default: Status=EFI_INVALID_PARAMETER; + } //switch + #endif + + return Status; +} + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: GPIO_Init +// +// Description: +// This function provide each initial routine in genericsio.c +// +// Input: +// IN AMI_SIO_PROTOCOL *AmiSio - Logical Device's information +// IN EFI_PCI_IO_PROTOCOL *PciIo - Read/Write PCI config space +// IN SIO_INIT_STEP InitStep - Initial routine step +// +// Output: +// EFI_SUCCESS - Initial step sucessfully +// EFI_INVALID_PARAMETER - not find the initial step +// +// Modified: Nothing +// +// Referrals: None +// +// Notes: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +static EFI_STATUS GPIO_Init( + IN AMI_SIO_PROTOCOL *AmiSio, + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN SIO_INIT_STEP InitStep +) +{ + EFI_STATUS Status=EFI_SUCCESS; + #if F81866_GPIO_PORT_PRESENT + + + switch (InitStep) { + case isGetSetupData: + break; + + case isPrsSelect: + break; + + case isBeforeActivate: + + break; + case isAfterActivate: + break; + + #if(CORE_AFTER_4634) + case isAfterBootScript: + break; + #endif + + default: Status=EFI_INVALID_PARAMETER; + } //switch + #endif + + return Status; +} + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: WDT_Init +// +// Description: +// This function provide each initial routine in genericsio.c +// +// Input: +// IN AMI_SIO_PROTOCOL *AmiSio - Logical Device's information +// IN EFI_PCI_IO_PROTOCOL *PciIo - Read/Write PCI config space +// IN SIO_INIT_STEP InitStep - Initial routine step +// +// Output: +// EFI_SUCCESS - Initial step sucessfully +// EFI_INVALID_PARAMETER - not find the initial step +// +// Modified: Nothing +// +// Referrals: None +// +// Notes: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +static EFI_STATUS WDT_Init( + IN AMI_SIO_PROTOCOL *AmiSio, + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN SIO_INIT_STEP InitStep +) +{ + EFI_STATUS Status=EFI_SUCCESS; + + switch (InitStep) { + case isGetSetupData: + break; + + case isPrsSelect: + break; + + case isBeforeActivate: + + break; + case isAfterActivate: + break; + + #if(CORE_AFTER_4634) + case isAfterBootScript: + break; + #endif + + default: Status=EFI_INVALID_PARAMETER; + } //switch + + return Status; +} + +//------------------------------------------------------------------------- +//!!!!!!!!!!! Porting End !!!!!!!!!!! +//------------------------------------------------------------------------- +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: ClearDevResource +// +// Description: +// This function will Clear SIO resource +// +// Input: +// SPIO_DEV* dev +// Output: +// NONE +// +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +VOID ClearDevResource( + IN SPIO_DEV* dev) +{ + UINT8 Value8; + Value8=0x00; + SioCfgMode(dev->Owner, TRUE); + DevSelect(dev); + SioRegister(dev, TRUE,F81866_BASE1_HI_REGISTER,&Value8); + SioRegister(dev, TRUE,F81866_BASE1_LO_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81866_BASE2_HI_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81866_BASE2_LO_REGISTER,&Value8); + SioRegister(dev, TRUE,F81866_IRQ1_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81866_IRQ2_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81866_DMA1_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81866_DMA2_REGISTER,&Value8); + SioCfgMode(dev->Owner, FALSE); + return; + +} +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: ProgramSioRegisterTable +// +// Description: +// This function will Program the SIO config space. +// +// Input: +// IN DXE_DEVICE_INIT_DATA *Table - initial table +// IN UINT8 Count Table Length +// +// Output: +// NONE +// +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +VOID ProgramSioRegisterTable( + IN AMI_SIO_PROTOCOL *AmiSio, + IN DXE_DEVICE_INIT_DATA *Table, + IN UINT8 Count +) +{ + UINT8 i; + UINT8 Value8; + + for(i=0;i<Count;i++) { + if(Table[i].AndData8 == 0xFF) + Value8=Table[i].OrData8; + else { + AmiSio->Access(AmiSio, FALSE, FALSE, (UINT8)(Table[i].Reg16), &Value8); + Value8 &= Table[i].AndData8; + Value8 |= Table[i].OrData8; + } + AmiSio->Access(AmiSio, TRUE, FALSE, (UINT8)(Table[i].Reg16), &Value8); + } + + return; +} + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: ProgramIsaRegisterTable +// +// Description: +// This function will Program the SIO config space. +// +// Input: +// IN UINT16 Index - Index port +// IN UINT16 Data - Data port +// IN UINT16 *Table - initial table +// IN UINT8 Count Table Length +// +// Output: +// NONE +// +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +VOID ProgramIsaRegisterTable( + IN UINT16 Index, + IN UINT16 Data, + IN DXE_DEVICE_INIT_DATA *Table, + IN UINT8 Count +) +{ + UINT8 i; + UINT8 Value8; + + for(i=0;i<Count;i++) { + if(Table[i].AndData8 == 0xFF) + Value8=Table[i].OrData8; + else { + IoWrite8(Index, (UINT8)(Table[i].Reg16)); + Value8 = IoRead8(Data); + Value8 &= Table[i].AndData8; + Value8 |= Table[i].OrData8; + } + IoWrite8(Index, (UINT8)(Table[i].Reg16)); + IoWrite8(Data, Value8); + } + + return; +} +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: ProgramRtRegisterTable +// +// Description: +// This function will program the runtime register. +// +// Input: +// IN UINT16 Base - Runtime register IO base +// IN DXE_DEVICE_INIT_DATA *Table - initial table +// IN UINT8 Count Table Length +// +// Output: +// NONE +// +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +VOID ProgramRtRegisterTable( + IN UINT16 Base, + IN DXE_DEVICE_INIT_DATA *Table, + IN UINT8 Count + +) +{ + UINT8 i; + UINT8 Value8; + + for(i=0;i<Count;i++) { + if(Table[i].AndData8 == 0xFF) + Value8 = Table[i].OrData8; + else + Value8 = (IoRead8(Base+Table[i].Reg16) & Table[i].AndData8)|\ + Table[i].OrData8; + IoWrite8(Base+Table[i].Reg16, Value8 ); + } +} + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: SaveSxSioRegisterTable +// +// Description: +// This function will Save the SIO registers to boot script Table +// +// Input: +// IN UINT16 Index - Index port +// IN UINT16 Data - Data port +// IN UINT16 *Table - initial table +// IN UINT8 Count Table Length +// +// Output: +// NONE +// +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +VOID SaveSxSioRegisterTable( + IN UINT16 Index, + IN UINT16 Data, + IN UINT8 *Table, + IN UINT8 Count +) +{ + UINT8 i; + UINT8 Value8; + + for(i=0;i<Count;i++) { + IoWrite8(Index,Table[i]); + BOOT_SCRIPT_S3_IO_WRITE_MACRO(BootScriptProtocol, + EfiBootScriptWidthUint8, + Index, + 1, + &Table[i]); + Value8 = IoRead8(Data); + BOOT_SCRIPT_S3_IO_WRITE_MACRO(BootScriptProtocol, + EfiBootScriptWidthUint8, + Data, + 1, + &Value8); + } + + return; +} + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: SaveSxRtRegisterTable +// +// Description: +// This function will Save the runtime registers to boot script Table +// +// Input: +// IN UINT16 Index - Index port +// IN UINT16 Data - Data port +// IN UINT16 *Table - initial table +// IN UINT8 Count Table Length +// +// Output: +// NONE +// +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +VOID SaveSxRtRegisterTable( + IN UINT16 Base, + IN UINT16 *Table, + IN UINT8 Count +) +{ + UINT8 i; + UINT8 Value8; + + for(i=0;i<Count;i++) { + Value8 = IoRead8(Base+Table[i]); + BOOT_SCRIPT_S3_IO_WRITE_MACRO(BootScriptProtocol, + EfiBootScriptWidthUint8, + (Base+Table[i]), + 1, + &Value8); + } + + return; + +} + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Board/IO/F81866/F81866PEI.C b/Board/IO/F81866/F81866PEI.C new file mode 100644 index 0000000..844336a --- /dev/null +++ b/Board/IO/F81866/F81866PEI.C @@ -0,0 +1,257 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866PEI.C 1 7/20/11 4:22a Kasalinyi $ +// +// $Revision: 1 $ +// +// $Date: 7/20/11 4:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866PEI.C $ +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] F81866.CIF +// IO_F81866.SDL +// F81866.ASL +// F81866.MAK +// F81866.SD +// F81866.UNI +// F81866DXE.C +// F81866PEI.C +// F81866PeiDebugger.C +// F81866Setup.C +// F81866Setup.H +// History.txt +// F81866.chm +// +// 4 3/21/11 9:41p Mikes +// seperate the core and oem job +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81866PEI.C> +// +// Description: Porting for PEI phase.Just for necessary devices porting. +// +// +//<AMI_FHDR_END> +//************************************************************************* +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- +#include <Pei.h> +#include <Token.h> +#include <AmiLib.h> +#include <Protocol\AmiSio.h> +#include <AmiCspLib.h> +#include "BSP\PeiIoTable.h" + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- +#if (IODECODETYPE) +extern IO_RANGE_DECODE SIO_IoRange_Decode_LIST EndOfInitList; +static IO_RANGE_DECODE* CspIoRangeDecodeList[] = {SIO_IoRange_Decode_LIST NULL}; +#endif //#if (IODECODETYPE) + +EFI_STATUS PeiLoopCspIoDecodeListInit ( + IN VOID *Fun, + IN UINT16 Base, + IN UINT8 DevUid, + IN SIO_DEV_TYPE Type +); // + +VOID PeiSetLpcDeviceDecoding(VOID); // + +VOID F81866_INIT(VOID); // + +VOID PeiF81866Init ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices +); + + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: PeiF81866Init +// +// Description: +// This function provide PEI phase SIO initialization +// +// Input: +// IN EFI_FFS_FILE_HEADER *FfsHeader - Logical Device's information +// IN EFI_PEI_SERVICES **PeiServices - Read/Write PCI config space +// +// Output: None +// +// Modified: Nothing +// +// Referrals: None +// +// Note: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +VOID PeiF81866Init ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices +) +{ + F81866_INIT(); +} + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: F81866_INIT +// +// Description: +// +// This function Step through table and initialize the Logic Device +// +// Input: None +// +// Output: EFI_STATUS +// +// Modified: Nothing +// +// Referrals: None +// +// Note: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +VOID F81866_INIT(VOID) +{ + UINTN i; + + // Decode neccessary IO resource in PEI phase + PeiSetLpcDeviceDecoding(); + + // Step through table and initialize the Serial Port + for(i=0; i<(sizeof(F81866_PEI_Init_Table))/(sizeof(SIO_DATA));i++) { + // If Mask=0xFF,only write register. + if(F81866_PEI_Init_Table[i].DataMask == 0xFF) { + IoWrite8(F81866_PEI_Init_Table[i].Addr, F81866_PEI_Init_Table[i].DataValue); + } + // Read and writer register + else { + IoWrite8(F81866_PEI_Init_Table[i].Addr, \ + IoRead8(F81866_PEI_Init_Table[i].Addr) \ + & F81866_PEI_Init_Table[i].DataMask \ + | F81866_PEI_Init_Table[i].DataValue); + } + } +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: PeiLoopCspIoDecodeListInit +// +// Description: +// Looking for the suitable IoDecode Funtion circularly. +// +// Input: +// IN VOID *Fun, -- EFI_PCI_IO_PROTOCOL *LpcPciIo +// IN UINT16 Base, -- I/O base address, Base=0 means disable the decode of the device +// IN UINT8 DevUid, -- The device Unique ID,If type is 0xFF, DevUid contain the IO length +// IN SIO_DEV_TYPE Type -- device type +// +// Output: +// EFI_STATUS +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS PeiLoopCspIoDecodeListInit ( + IN VOID *Fun, + IN UINT16 Base, + IN UINT8 DevUid, + IN SIO_DEV_TYPE Type +) +{ + EFI_STATUS Status; + UINTN i = 0; + + #if(IODECODETYPE) + for(i=0; CspIoRangeDecodeList[i]; i++) + { + //decode by OEM porting with eLink function(default) + Status = CspIoRangeDecodeList[i](Fun, Base, DevUid, Type); + if(Status == EFI_SUCCESS) return Status; + } + + #else + if ( (Type != 0xFF) || (Base == 0x2E) || (Base == 0x4E) ) + // decode by chipset porting in SBGeneric.c + Status = SbLib_SetLpcDeviceDecoding(Fun, Base, DevUid, Type); + else + // decode by chipset porting in SBGeneric.c + Status = SbLib_SetLpcGenericDecoding(Fun, Base, DevUid,Type); + + #endif + + return Status; +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: PeiSetLpcDeviceDecoding +// +// Description: +// This function is used to open IoDecode for logic devices initialized in PEI +// +// Input: +// +// Output: EFI_STATUS +// +// Notes: PORTING REQUIRED +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +VOID PeiSetLpcDeviceDecoding(VOID) +{ + EFI_STATUS Status=EFI_SUCCESS; + UINT8 i; + + for(i=0;i<(sizeof(F81866_Decode_Table))/(sizeof(IO_DECODE_DATA));i++) + { + Status = PeiLoopCspIoDecodeListInit( NULL,\ + F81866_Decode_Table[i].BaseAdd,\ + F81866_Decode_Table[i].UID,\ + F81866_Decode_Table[i].Type); + } +} + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Board/IO/F81866/F81866PeiDebugger.C b/Board/IO/F81866/F81866PeiDebugger.C new file mode 100644 index 0000000..edd7c4c --- /dev/null +++ b/Board/IO/F81866/F81866PeiDebugger.C @@ -0,0 +1,117 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866PeiDebugger.C 1 7/20/11 4:22a Kasalinyi $ +// +// $Revision: 1 $ +// +// $Date: 7/20/11 4:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866PeiDebugger.C $ +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] F81866.CIF +// IO_F81866.SDL +// F81866.ASL +// F81866.MAK +// F81866.SD +// F81866.UNI +// F81866DXE.C +// F81866PEI.C +// F81866PeiDebugger.C +// F81866Setup.C +// F81866Setup.H +// History.txt +// F81866.chm +// +// 2 3/21/11 9:41p Mikes +// seperate the core and oem job +// +//************************************************************************* + +//<AMI_FHDR_START> +// +// Name: <F81866PeiDebugger.C> +// +// Description: The file contains PEI stage board component code for Template SB +// +//<AMI_FHDR_END> +//************************************************************************* +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- +#include <Efi.h> +#include <AmiLib.h> +#include <Token.h> +#include "AmiDebugPort.h" + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- +VOID F81866_INIT(); + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: SIOPEIDBG_Initialize +// +// Description: +// This eLink function is used to initialize the super I/O +// for PEI Debugger support +// +// Input: +// DebugPort -> Debug transport interface structure +// +// Output: +// EFI_STATUS +// +// Notes: PORTING REQUIRED +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS SIOPEIDBG_Initialize( + IN PEI_DBG_PORT_INFO *DebugPort +) +{ + F81866_INIT(); + + #ifndef USB_DEBUGGER + DebugPort->SerialPort.COMBaseAddr = DEBUG_COM_PORT_ADDR; + DebugPort->SerialPort.SIO_COM_LDN = DEBUG_LDN_UART; + #endif + + return EFI_SUCCESS; +} + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Board/IO/F81866/F81866Setup.C b/Board/IO/F81866/F81866Setup.C new file mode 100644 index 0000000..d5965ce --- /dev/null +++ b/Board/IO/F81866/F81866Setup.C @@ -0,0 +1,549 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866Setup.C 2 12/14/11 9:45p Kasalinyi $ +// +// $Revision: 2 $ +// +// $Date: 12/14/11 9:45p $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866Setup.C $ +// +// 2 12/14/11 9:45p Kasalinyi +// [TAG] EIPNone +// [Category] Improvement +// [Description] Fix setup screen display "??" char +// [Files] F81865Setup.C +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] F81866.CIF +// IO_F81866.SDL +// F81866.ASL +// F81866.MAK +// F81866.SD +// F81866.UNI +// F81866DXE.C +// F81866PEI.C +// F81866PeiDebugger.C +// F81866Setup.C +// F81866Setup.H +// History.txt +// F81866.chm +// +// 4 3/21/11 9:41p Mikes +// seperate the core and oem job +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81866Setup.C> +// +// Description: Setup related Routines. +// +//<AMI_FHDR_END> +//************************************************************************* +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- +#include <Efi.h> +#include <AmiDxeLib.h> +#include <GenericSio.h> +#include "F81866Setup.H" +#include "SetupStringList.h" + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- +typedef void (HWM_EXTERNAL_FUN)( + IN OUT HWM_DATA * Data +); + +typedef struct{ + UINT8 Type; + UINT8 UID; + UINT16 StrTokenV; +}STR_UID; + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- +static VOID SetSioStrings( + IN SPIO_DEV *Dev, + IN EFI_HII_HANDLE HiiHandle +); + +STR_UID SetupStringsList[] = { STR_TABLE_LIST {0xff,0xff,0xffff}}; + +//---------------------------------- +extern HWM_EXTERNAL_FUN HWM_External_Fun_LIST EndOfFunList; +static HWM_EXTERNAL_FUN* OemHwmExternalFunList[] = {HWM_External_Fun_LIST NULL}; + +void AdjustString( + IN OUT CHAR16 * Buffer, + IN CHAR16 * StringToChged, + IN UINT8 STCLen, + IN CHAR16 * HeadBuf, + IN UINT8 HeadLen, + IN BOOLEAN Flag, + IN UINT8 MidPos, + IN CHAR16 * TailBuf, + IN UINT8 TailLen +); + +UINTN +HHMEfiValueToString ( + IN OUT CHAR16 *Buffer, + IN INT64 Value, + IN UINTN Flags, + IN UINTN Width +); + +void HHMCommon( + IN UINTN RegData, + IN UINT8 Func, + IN UINT16 StrToken, + IN UINT8 RefValue, + EFI_HII_HANDLE hiiHandle +); + +///////////////////////////////////////////////////////////////////////////// +//Below function will update HII database's SIO strings, before enter setup +///////////////////////////////////////////////////////////////////////////// + +//<AMI_PHDR_START> +//--------------------------------------------------------------------------- +// Procedure: InitSioSetupStrings +// +// Description: +// This function provide SIO Setup screen display string. +// +// Input: +// IN IN UINT16 Class +// IN EFI_HII_HANDLE *HiiHandle +// +// Output: VOID +// +// Modified: Nothing +// +// Referrals: None +// +// Note: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +VOID InitSioSetupStrings( + IN EFI_HII_HANDLE HiiHandle, + IN UINT16 Class) +{ + static EFI_GUID siopg=EFI_AMI_SIO_PROTOCOL_GUID; + SPIO_DEV *dev; + UINTN i,hcnt; + EFI_HANDLE *hbuff; + EFI_STATUS Status=0; + + if(Class == ADVANCED_FORM_SET_CLASS) { + Status=pBS->LocateHandleBuffer(ByProtocol,&siopg, NULL, &hcnt,&hbuff); + if (EFI_ERROR(Status)) hcnt = 0; + for (i=0; i<hcnt; i++) { + Status = pBS->HandleProtocol ( hbuff[i],&siopg,(VOID*)&dev); + ASSERT_EFI_ERROR(Status); + if(dev->DeviceInfo->HasSetup) SetSioStrings(dev, HiiHandle); + } + } +} + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: SetSioStrings +// +// Description: +// This function provide SIO's each logic device Setup screen display string. +// +// Input: +// IN SPIO_DEV *Dev - SPIO Device Private Data section +// IN EFI_HII_HANDLE *HiiHandle +// +// Output: None +// +// Modified: Nothing +// +// Referrals: None +// +// Note: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +static VOID SetSioStrings( + IN SPIO_DEV *Dev, + IN EFI_HII_HANDLE HiiHandle) +{ + UINT8 i; + CHAR8 pString8[80]; + CHAR16 pString16[80]; + + if((!Dev->NvData.DevEnable) || (!Dev->VlData.DevImplemented)) return; + + if(Dev->VlData.DevDma1) { + if(Dev->VlData.DevIrq1) + Sprintf(pString8, "IO=%Xh; IRQ=%d; DMA=%d;", Dev->VlData.DevBase1,Dev->VlData.DevIrq1,Dev->VlData.DevDma1); + else + Sprintf(pString8, "IO=%Xh; DMA=%d;",Dev->VlData.DevBase1, Dev->VlData.DevDma1); + } + else { + if(Dev->VlData.DevIrq1) + Sprintf(pString8, "IO=%Xh; IRQ=%d;",Dev->VlData.DevBase1,Dev->VlData.DevIrq1); + else + Sprintf(pString8, "IO=%Xh;",Dev->VlData.DevBase1); + } + + for(i=0;(i < 0x80) && (pString8[i] != 0);i++) + pString16[i] = (CHAR16)pString8[i]; + pString16[i++] = 0; + + for(i=0;;i++) { + if(SetupStringsList[i].Type == 0xFF) break; + if((SetupStringsList[i].UID == Dev->DeviceInfo->UID) && \ + (SetupStringsList[i].Type == Dev->DeviceInfo->Type)) { + InitString(HiiHandle,SetupStringsList[i].StrTokenV,pString16); + return; + } + + } + return; +} + +///////////////////////////////////////////////////////////////////////////// +//Below function will update hardware monitor value dynamically +//No porting needed +///////////////////////////////////////////////////////////////////////////// + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: F81866_HWM_CallBack +// +// Description: +// Form Callback Function.Will be called every 100m Polling for data Updates. +// +// Input: +// IN EFI_HII_HANDLE HiiHandle +// IN UINT16 Class +// IN UINT16 SubClass +// IN UINT16 Key +// +// Output: VOID +// +// Modified: Nothing +// +// Referrals: None +// +// Note: +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +void F81866_HWM_CallBack( + IN EFI_HII_HANDLE HiiHandle, + IN UINT16 Class, + IN UINT16 SubClass, + IN UINT16 Key +) +{ + //EFI_STATUS Status; + HWM_DATA Data; + UINT8 i; + +//------------------------------------------------------------------------- +//AMI_TO: AMI need to porting the register where they goto read. +//------------------------------------------------------------------------- + for(i=0; OemHwmExternalFunList[i]; i++) + { + OemHwmExternalFunList[i](&Data); + HHMCommon(Data.Value, Data.Type, Data.Token, Data.OddPos, HiiHandle); + } + + return ; +} + +//<AMI_PHDR_START> +//---------------------------------------------------------------------- +// Procedure: HHMEfiValueToString +// +// Description: +// This function Adjust the String shows in setup screen +// +// Input: +// INT64 Value ->Value need change to string +// UINTN Flags ->Comma type +// UINTN Width ->Character number for value +// CHAR16 *Buffer ->Temp string for this change +// Output: +// +// OPTIONAL: +// None +// +// Returns: +// Index +// +//---------------------------------------------------------------------- +//<AMI_PHDR_END> +UINTN +HHMEfiValueToString ( + IN OUT CHAR16 *Buffer, + IN INT64 Value, + IN UINTN Flags, + IN UINTN Width +) { + CHAR16 TempBuffer[CHARACTER_NUMBER_FOR_VALUE]; + CHAR16 *TempStr; + CHAR16 *BufferPtr; + UINTN Count; + UINTN ValueCharNum; + UINTN Remainder; + CHAR16 Prefix; + UINTN Index; + BOOLEAN ValueIsNegative; + + TempStr = TempBuffer; + BufferPtr = Buffer; + Count = 0; + ValueCharNum = 0; + ValueIsNegative = FALSE; + + if (Width > CHARACTER_NUMBER_FOR_VALUE - 1) { + Width = CHARACTER_NUMBER_FOR_VALUE - 1; + } + + if (Value < 0) { + *(TempStr++) = '-'; + Value = -Value; + ValueCharNum++; + Count++; + ValueIsNegative = TRUE; + } + do { + if ((Width != 0) && (Count >= Width)) break; + + Value = (UINT64)Div64 ((UINT64)Value, 10, &Remainder); + *(TempStr++) = (CHAR16)(Remainder + '0'); + ValueCharNum++; + Count++; + + if ((Flags & COMMA_TYPE) == COMMA_TYPE) { + if (Value != 0) { + if ((ValueIsNegative && (ValueCharNum % 3 == 1)) || \ + ((!ValueIsNegative) && (ValueCharNum % 3 == 0))) { + *(TempStr++) = ','; + Count++; + } + } + } + } while (Value != 0); + + if (Flags & PREFIX_ZERO) Prefix = '0'; + else Prefix = ' '; + + Index = Count; + + if (!(Flags & LEFT_JUSTIFY)) { + for (; Index < Width; Index++) + *(TempStr++) = Prefix; + } + // + // Reverse temp string into Buffer. + // + if (Width == 0) { + while (TempStr != TempBuffer) + *(BufferPtr++) = *(--TempStr); + } + else { + Index = 0; + while ((TempStr != TempBuffer) && (Index++ < Width)) + *(BufferPtr++) = *(--TempStr); + } + *BufferPtr = 0; + + return Index; +} + + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: AdjustString +// +// Description: +// Adjust string with float point +// +// Input: +// Buffer -> defautl string. ": N/A ". Buffer length should more than 0x10 +// StringToChged -> Raw data +// STCLen -> String total length +// HeadBuf -> Header of string +// HeadLen -> Header length +// Flag -> TRUE indicate is a float data, False indicate it's a integet data. +// MidPos -> Float point position. eg: 0.076 is 0x3 +// TailBuf -> unit of string data +// TailLen -> Length of unit +// +// Output: Return string in Buffer +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +VOID AdjustString( + IN OUT CHAR16 * Buffer, + IN CHAR16 * StringToChged, + IN UINT8 STCLen, + IN CHAR16 * HeadBuf, + IN UINT8 HeadLen, + IN BOOLEAN Flag, + IN UINT8 MidPos, + IN CHAR16 * TailBuf, + IN UINT8 TailLen +) { + CHAR16 *temp = Buffer; + CHAR16 *TempSrc = StringToChged; + CHAR16 dod[] ={L"."}; + CHAR16 Zero[] ={L"0"}; + + pBS->SetMem(temp, STR_BUFFER_LENGTH * sizeof(CHAR16), 0); + + if(HeadLen) { + //Add the leading string + pBS->CopyMem(temp, HeadBuf, (HeadLen * sizeof(CHAR16))); + temp += HeadLen; + } + if (!Flag) { + //Add the float point->L"." + pBS->CopyMem(temp, TempSrc, (STCLen * sizeof(CHAR16))); //Add the string before float point + temp += STCLen; TempSrc += STCLen; + goto not_float_data; + } + + if(STCLen <= MidPos) { + //make up with a zero + pBS->CopyMem(temp, Zero, (0x01 * sizeof(CHAR16))); //Copy a 0 + temp++; + } else { + pBS->CopyMem(temp, TempSrc, ((STCLen - MidPos) * sizeof(CHAR16))); //Add the string before float point + temp += (STCLen - MidPos); TempSrc += (STCLen - MidPos); + } + pBS->CopyMem(temp, dod, 0x01 * sizeof(CHAR16)); //Add the float point->L"." + temp++; + if(STCLen < MidPos) { + //make up with a zero + pBS->CopyMem(temp, Zero, ((MidPos - STCLen) * sizeof(CHAR16)));//Copy a 0 + pBS->CopyMem(temp, TempSrc, ((STCLen) * sizeof(CHAR16))); //Add the string after float point + temp += MidPos; TempSrc += MidPos; + } else { + pBS->CopyMem(temp, TempSrc, ((MidPos) * sizeof(CHAR16))); //Add the string after float point + temp += MidPos; TempSrc += MidPos; + } + not_float_data: + if (TailLen) { + //Add the unit + pBS->CopyMem(temp, TailBuf, (TailLen * sizeof(CHAR16))); + } + return; +} + + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: HHMCommon +// +// Description: +// Update option with the data read from register +// +// Input: +// RegData -> data from SIO registers +// Func -> Fan Speed,Voltage and Temperature +// StrToken -> String token +// OddPos -> Odd position +// hiiHandle +// gblHii +// +// Output: +// Return string in Buffer +// +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +VOID HHMCommon( + IN UINTN RegData, + IN UINT8 Func, + IN UINT16 StrToken, + IN UINT8 OddPos, + IN EFI_HII_HANDLE hiiHandle +) { + CHAR16 TailRound[] = L" RPM"; //Fan uint + CHAR16 TailVoltg[] = L" V"; //Voltage uint + CHAR16 TailTempt[] = L" C"; //Temperature uint + CHAR16 LeadingMini[] = L": -"; //Fix + CHAR16 LeadingPlus[] = L": +"; //Fix + CHAR16 LeadingSpac[] = L": "; //Fix + CHAR16 AllSpace[] = L": N/A "; //Fix + CHAR16 *TempStr = AllSpace; + UINT8 StrLen; + UINT64 NData; + CHAR16 StrUp[STR_BUFFER_LENGTH] = L": N/A "; //Don't change this line + CHAR16 *StrUpdated = StrUp; + TailTempt[1]=0x2103; + NData = (UINT64)(RegData); + //The following may be ported by each SIO + //As now, it support max length is five + if(NData>9999) StrLen = 0x5; + else if(NData>999) StrLen = 0x4; + else if(NData>99) StrLen = 0x3; + else if(NData>9) StrLen = 0x2; + else StrLen = 0x1; + + //When device not present, update to 'N/A' + if(NData == 0x00) StrUpdated = StrUp; + else { + HHMEfiValueToString(TempStr, NData, 0, StrLen); + switch(Func) { + case VOLTAGE: //Indicate it's voltage + AdjustString(StrUpdated, TempStr, StrLen, LeadingPlus, 0x03,\ + OddPos?TRUE:FALSE, OddPos, TailVoltg, 0x02); + break; + case TEMPERATURE: //Indicate it's Temperature + AdjustString(StrUpdated, TempStr, StrLen, LeadingPlus, 0x03,\ + OddPos?TRUE:FALSE, OddPos, TailTempt, 0x02); + break; + case FAN_SPEED: //Indicate it's fan + AdjustString(StrUpdated, TempStr, StrLen, LeadingSpac, 0x02,\ + OddPos?TRUE:FALSE, OddPos, TailRound, 0x04); + break; + default : //Default to " N/A " + break; + } + } + InitString(hiiHandle, StrToken, StrUpdated); + + return; +} +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Board/IO/F81866/F81866Setup.H b/Board/IO/F81866/F81866Setup.H new file mode 100644 index 0000000..7c5782b --- /dev/null +++ b/Board/IO/F81866/F81866Setup.H @@ -0,0 +1,172 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81866/F81866Setup.H 1 7/20/11 4:22a Kasalinyi $ +// +// $Revision: 1 $ +// +// $Date: 7/20/11 4:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81866/F81866Setup.H $ +// +// 1 7/20/11 4:22a Kasalinyi +// [Category] Improvement +// [Description] Initial Porting +// [Files] F81866.CIF +// IO_F81866.SDL +// F81866.ASL +// F81866.MAK +// F81866.SD +// F81866.UNI +// F81866DXE.C +// F81866PEI.C +// F81866PeiDebugger.C +// F81866Setup.C +// F81866Setup.H +// History.txt +// F81866.chm +// +// 3 3/21/11 9:41p Mikes +// seperate the core and oem job +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81866Setup.H> +// +// Description: GUID or structure Of Setup related Routines. +// +//<AMI_FHDR_END> +//************************************************************************* + +#ifndef _F81866SETUP_H_ +#define _F81866SETUP_H_ +#ifdef __cplusplus +extern "C" { +#endif +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- +#include "token.h" +#include <Setup.h> +#include <SetupStrTokens.h> + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- + +//**********************************************************************// +// Belos is for SD files // +//**********************************************************************// +#define SIO_VAR_GUID \ + {0x560bf58a, 0x1e0d, 0x4d7e, 0x95, 0x3f, 0x29, 0x80, 0xa2, 0x61, 0xe0, 0x31} + +#define AMI_SIO_VARSTORE(ldxn, PNPxxxx_n) \ +varstore ldxn##_V_DATA,\ + key = ldxn##_V_DATA_KEY,\ + name = PNPxxxx_n##_VV,\ + guid = SIO_VAR_GUID;\ +varstore ldxn##_NV_DATA,\ + key = ldxn##_NV_DATA_KEY,\ + name = PNPxxxx_n##_NV,\ + guid = SIO_VAR_GUID; + +#define LDX_XV_DATA(ldxn) \ +typedef struct {\ + UINT8 DevImplemented;\ + UINT16 DevBase1;\ + UINT16 DevBase2;\ + UINT8 DevIrq1;\ + UINT8 DevIrq2;\ + UINT8 DevDma1;\ + UINT8 DevDma2;\ +} ldxn##_V_DATA;\ +typedef struct {\ + UINT8 DevEnable;\ + UINT8 DevPrsId;\ + UINT8 DevMode;\ +} ldxn##_NV_DATA; + +#pragma pack(1) + +LDX_XV_DATA(FDC) + +LDX_XV_DATA(COMA) + +LDX_XV_DATA(COMB) + +LDX_XV_DATA(COMC) + +LDX_XV_DATA(COMD) + +LDX_XV_DATA(COME) + +LDX_XV_DATA(COMF) + +LDX_XV_DATA(LPT) + +#pragma pack() + +//**********************************************************************// +// Below is for "xxSetup.c" // +//**********************************************************************// +#define STR_BUFFER_LENGTH 0x10 +//Defination of function +#define VOLTAGE 0x01 +#define TEMPERATURE 0x02 +#define FAN_SPEED 0x03 + +#define LEFT_JUSTIFY 0x01 +#define PREFIX_SIGN 0x02 +#define PREFIX_BLANK 0x04 +#define COMMA_TYPE 0x08 +#define LONG_TYPE 0x10 +#define PREFIX_ZERO 0x20 + +#define CHARACTER_NUMBER_FOR_VALUE 30 + +#pragma pack(1) + +typedef struct { + UINT16 Token; // String token value + UINT8 Type; // For what? Temperature, Fan, Voltage... + UINT16 Value; // Monitor value + UINT8 OddPos; // Value precision +} HWM_DATA; + +#pragma pack() + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Board/IO/F81866/History.txt b/Board/IO/F81866/History.txt new file mode 100644 index 0000000..9cdaef9 --- /dev/null +++ b/Board/IO/F81866/History.txt @@ -0,0 +1,127 @@ + +-----------------------------------------------------------+ + | Super I/O Release History | + | | + | IO Vendor : Fintek | + | Part Number : F81866D | + | Datasheet Version : V0.11P | + | Template Version :(INT)COMBINE_SIO_HHM_Template09| + | | + +-----------------------------------------------------------+ + +;---------------------------------------------------------------------------; +Module Label :4.6.3.5_SIO_F81866_A5 +;---------------------------------------------------------------------------; +[TAG] EIP115780 +[Category] Bug Fix +[Symptom] Burn in test faile while dual IO using same idex/data port +[RootCause] Method DSTA retrned before exit config mode. +[Files] F81866.ASL +;---------------------------------------------------------------------------; +AMI China +Engineer : ElvisCai +Release Date : 2013-04-01 +;---------------------------------------------------------------------------; + +;---------------------------------------------------------------------------; +Module Label :4.6.3.5_SIO_F81866_A4 +;---------------------------------------------------------------------------; +[TAG] EIPNONE +[Category] Bug Fix +[Solution] Remove token control, LDN05h index FEh bit7& bit4 to "0" as fixed. +[Files] PeiIoTable.h +IO_F81866.SDL +;---------------------------------------------------------------------------; +AMI China +Engineer : ElvisCai +Release Date : 2012-09-17 +;---------------------------------------------------------------------------; + +;---------------------------------------------------------------------------; +Module Label :4.6.3.5_SIO_F81866_A3 +;---------------------------------------------------------------------------; +[Description] [TAG] EIP88939 +[Description] Fix IASL5.exe compile failure +Update _FDE from Package to Buffer to fix IASL5 compile issue +[Files] FDC.asl +;---------------------------------------------------------------------------; +AMI China +Engineer : ElvisCai +Release Date : 2012-07-04 +;---------------------------------------------------------------------------; + +;---------------------------------------------------------------------------; +Module Label :(INT)4.6.3.5_SIO_F81866_A3_B +;---------------------------------------------------------------------------; +[TAG] EIP82572 +[Category] Improvement +[Description] Remove PS2 SWAP auto detection according Spec v0.13 +[Files] PeiIoTable.h +IO_F81866.SDL + +[TAG] EIP68967 +[Category] Bug Fix +[Symptom] If select the 02E8,will have a yellow bang +[Solution] Correct the IRQ flag Edge to Level +[Files] UART3.asl +;---------------------------------------------------------------------------; +AMI China +Engineer : ElvisCai +Release Date : 2012-02-17 +;---------------------------------------------------------------------------; + +;---------------------------------------------------------------------------; +Module Label :(INT)4.6.3.5_SIO_F81866_A3_A +;---------------------------------------------------------------------------; +[TAG] EIP82488 +[Category] Improvement +[Description] Fintek Workaround +[Files] PeiIoTable.h +;---------------------------------------------------------------------------; +AMI China +Engineer : KasalinYi +Release Date : 2012-02-09 +;---------------------------------------------------------------------------; + +;---------------------------------------------------------------------------; +Module Label :4.6.3.5_SIO_F81865_A2 +;---------------------------------------------------------------------------; +[Category] Improvement +[Description] Fix setup screen display "??" char +[Files] F81865Setup.C +[TAG] None +;---------------------------------------------------------------------------; +AMI China +Engineer : KasalinYi +Release Date : 2011-12-15 +;---------------------------------------------------------------------------; + +;---------------------------------------------------------------------------; +Module Label :4.6.3.5_SIO_F81865_A1 +;---------------------------------------------------------------------------; +[Category] Improvement +[Description] Fix Smart Function build error +[Files] +F81866DXE.C +F81866.SD +F81866.MAK +IO_F81866.SDL +[TAG] None +;---------------------------------------------------------------------------; +AMI China +Engineer : KasalinYi +Release Date : 2011-12-15 +;---------------------------------------------------------------------------; + +;---------------------------------------------------------------------------; +Module Label :4.6.3.5_SIO_F81865_A0 +;---------------------------------------------------------------------------; +[CATEGORY] Improvement +[REASON] Initial Porting +[SEVERITY] Medium +[FILE] Board\IO\*.* +[TAG] +;---------------------------------------------------------------------------; +AMI China +Engineer : ElvisCai +Release Date : 2011-07-19 +;---------------------------------------------------------------------------; diff --git a/Board/IO/F81866/IO_F81866.SDL b/Board/IO/F81866/IO_F81866.SDL new file mode 100644 index 0000000..5ae0a61 --- /dev/null +++ b/Board/IO/F81866/IO_F81866.SDL @@ -0,0 +1,2063 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* +# +#************************************************************************* +# $Header: /Alaska/BIN/IO/Fintek/F81866/IO_F81866.SDL 4 9/16/12 9:47p Elviscai $ +# +# $Revision: 4 $ +# +# $Date: 9/16/12 9:47p $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/IO/Fintek/F81866/IO_F81866.SDL $ +# +# 4 9/16/12 9:47p Elviscai +# [TAG] EIPNONE +# [Category] Bug Fix +# [Solution] Remove token "KB_MO_SWAP" to set it "0" as fixed +# +# 3 2/16/12 9:24p Elviscai +# [TAG] EIP82572 +# [Category] Improvement +# [Description] Remove PS2 SWAP auto detection according Spec v0.13 +# +# 2 12/14/11 9:22p Kasalinyi +# [TAG] EIPNone +# [Category] Improvement +# [Description] Fix Smart Function build error +# [Files] F81866DXE.C +# F81866.SD +# F81866.MAK +# IO_F81866.SDL +# +# 1 7/20/11 4:22a Kasalinyi +# [Category] Improvement +# [Description] Initial Porting +# [Files] F81866.CIF +# IO_F81866.SDL +# F81866.ASL +# F81866.MAK +# F81866.SD +# F81866.UNI +# F81866DXE.C +# F81866PEI.C +# F81866PeiDebugger.C +# F81866Setup.C +# F81866Setup.H +# History.txt +# F81866.chm +# +# 4 3/21/11 9:41p Mikes +# seperate the core and oem job +# +#************************************************************************* +#<AMI_FHDR_START> +# +# Name: <IO_F81866.SDL> +# +# Description: SDL file to define SIO functions +# +# +#<AMI_FHDR_END> +#************************************************************************* +IODEVICE + Name = "F81866 SIO Implementation" + ASLfile = "F81866.ASL" +End + +IODEVICE + Name = "F81866 SIO event handler" + ASLfile = "Board\IO\F81866\ACPI\SIOH.ASL" + Token = "F81866_KEYBOARD_PRESENT" "!=" "0" +End + +IODEVICE + Name = "System PS2 Keyboard Controller" + ASLfile = "Board\IO\F81866\ACPI\PS2KB.ASL" + ASLdeviceName = "PS2K" + GPEbit = 01dh + SleepNum = 03h + WakeEnabled = Yes + PWRBwake = Yes + Token = "F81866_KEYBOARD_PRESENT" "=" "1" +End + +IODEVICE + Name = "System PS2 Mouse Controller" + ASLfile = "Board\IO\F81866\ACPI\PS2MS.ASL" + ASLdeviceName = "PS2M" + GPEbit = 01dh + SleepNum = 03h + WakeEnabled = Yes + PWRBwake = Yes + Token = "F81866_MOUSE_PRESENT" "=" "1" +End + +IODEVICE + Name = "F81866 Floppy Controller" + ASLfile = "Board\IO\F81866\ACPI\FDC.ASL" + ASLdeviceName = "FDC" + Token = "F81866_FLOPPY_PORT_PRESENT" "=" "1" +End + +IODEVICE + Name = "F81866 Serial Port A" + ASLfile = "Board\IO\F81866\ACPI\UART1.ASL" + ASLdeviceName = "UAR1" + Token = "F81866_SERIAL_PORT0_PRESENT" "=" "1" +End + +IODEVICE + Name = "F81866 Serial Port B" + ASLfile = "Board\IO\F81866\ACPI\UART2.ASL" + ASLdeviceName = "UAR2" + Token = "F81866_SERIAL_PORT1_PRESENT" "=" "1" +End + +IODEVICE + Name = "F81866 Serial Port C" + ASLfile = "Board\IO\F81866\ACPI\UART3.ASL" + ASLdeviceName = "UAR3" + Token = "F81866_SERIAL_PORT2_PRESENT" "=" "1" +End + +IODEVICE + Name = "F81866 Serial Port D" + ASLfile = "Board\IO\F81866\ACPI\UART4.ASL" + ASLdeviceName = "UAR4" + Token = "F81866_SERIAL_PORT3_PRESENT" "=" "1" +End + +IODEVICE + Name = "F81866 Serial Port E" + ASLfile = "Board\IO\F81866\ACPI\UART5.ASL" + ASLdeviceName = "UAR5" + Token = "F81866_SERIAL_PORT4_PRESENT" "=" "1" +End + +IODEVICE + Name = "F81866 Serial Port F" + ASLfile = "Board\IO\F81866\ACPI\UART6.ASL" + ASLdeviceName = "UAR6" + Token = "F81866_SERIAL_PORT5_PRESENT" "=" "1" +End + +IODEVICE + Name = "F81866 Parallel Port" + ASLfile = "Board\IO\F81866\ACPI\LPTE.ASL" + ASLdeviceName = "LPTE" + Token = "F81866_PARALLEL_PORT_PRESENT" "=" "1" +End + +TOKEN + Name = "====== SIO Global Control Tokens ======" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Specfy global control tokens." + TokenType = Expression +End + +TOKEN + Name = "F81866_SUPPORT" + Value = "1" + Help = "Main switch to enable F81866 support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetH = Yes + Master = Yes +End + +TOKEN + Name = "SIO_SUPPORT" + Value = "1" + Help = "Main switch to enable SIO support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + TargetH = Yes +End + +TOKEN + Name = "IODECODETYPE" + Value = "1" + Help = "Check project actually who does IODecode Implement by :\1 - decode by this module(default),\0 - decode by chipset/oem porting" + TokenType = Boolean + TargetMAK = Yes + TargetH = Yes +End + +TOKEN + Name = "BOARD_LABEL_BELOW_25" + Value = "1" + Help = "Enable(Core<=4.6.4.0)/Disable(Core > 4.6.4.0 have defined AMI_CALLBACK_VARSTORE)" + TokenType = Boolean + TargetMAK = Yes + TargetH = Yes +End + +TOKEN + Name = "CORE_AFTER_4634" + Value = "1" + TokenType = Boolean + TargetMAK = Yes + TargetH = Yes + Token = "CORE_VERSION_VALUE" ">" "4634" +End + +TOKEN + Name = "CORE_VERSION_VALUE" + Value = "$(CORE_MAJOR_VERSION)*1000+$(CORE_MINOR_VERSION)*100+$(CORE_REVISION)*10+$(CORE_BUILD_NUMBER)" + Help = "The token value is an aggregation of all core version tokens into a single integer." + TokenType = Integer + TargetMAK = Yes + TargetH = Yes + Lock = Yes +End + +TOKEN + Name = "F81866_CONFIG_INDEX" + Value = "0x2E" + TokenType = Integer + TargetEQU = Yes + TargetH = Yes +End + +TOKEN + Name = "F81866_CONFIG_DATA" + Value = "0x2F" + TokenType = Integer + TargetEQU = Yes + TargetH = Yes +End + +TOKEN + Name = "SP1O" + Value = "$(F81866_CONFIG_INDEX)" + Help = "Super IO Index/Data configuration port for ASL." + TokenType = Integer + TargetASL = Yes +End + +TOKEN + Name = "SIO_SB_BUS_NUM" + Value = "0" + Help = "SB LPC Bus Number" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "SIO_SB_DEV_NUM" + Value = "0x1F" + Help = "SB LPC Device Number" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "SIO_SB_FUNC_NUM" + Value = "0" + Help = "SB LPC Function Number" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "====== SIO Logical Devices Numbers ======" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Specfy Devices Logical Number." + TokenType = Expression +End + +TOKEN + Name = "F81866_LDN_FDC" + Value = "0x00" + Help = "LDN for Floppy Disk Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_LDN_LPT" + Value = "0x03" + Help = "LDN for Parallel Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_LDN_HWM" + Value = "0x04" + Help = "LDN for Hardware Monitor Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_LDN_PS2M" + Value = "0x05" + Help = "LDN for PS2 Keyboard Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_LDN_PS2K" + Value = "0x05" + Help = "LDN for PS2 Mouse Controller. (it is same as PS2K specify same value)" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_LDN_GPIO" + Value = "0x06" + Help = "LDN for GPIO." + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_LDN_WDT" + Value = "0x07" + Help = "LDN for Watch Dog Timer" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_LDN_PME" + Value = "0x0A" + Help = "LDN for PME and ACPI" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_LDN_UART1" + Value = "0x10" + Help = "LDN for Serial1 Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_LDN_UART2" + Value = "0x11" + Help = "LDN for Serial2 Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_LDN_UART3" + Value = "0x12" + Help = "LDN for Serial3 Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_LDN_UART4" + Value = "0x13" + Help = "LDN for Serial4 Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_LDN_UART5" + Value = "0x14" + Help = "LDN for Serial5 Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_LDN_UART6" + Value = "0x15" + Help = "LDN for Serial6 Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "=== SIO Global Registers Settings ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "SIO Global Registers Setting" + TokenType = Expression +End + +TOKEN + Name = "F81866_CLOCK" + Value = "0" + Help = "0/1/2 for 48Mhz/14.318MHz/24MHz" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_KBC_CLOCK" + Value = "1" + Help = "0/1 for 12Mhz/8MHz" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "====== SIO Registers Layout ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Specfy Register address inside SIO Chip." + TokenType = Expression +End + +TOKEN + Name = "F81866_LDN_SEL_REGISTER" + Value = "0x07" + Help = "Logical Device Select Register Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_DEV_ID_REGISTER" + Value = "0x20" + Help = "Device Identification Register Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_ACTIVATE_REGISTER" + Value = "0x30" + Help = "Device Identification Register Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_BASE1_HI_REGISTER" + Value = "0x60" + Help = "Device BaseAddres Register#1 MSB Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_BASE1_LO_REGISTER" + Value = "0x61" + Help = "Device BaseAddres Register#1 LSB Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_BASE2_HI_REGISTER" + Value = "0x62" + Help = "Device BaseAddres Register#2 MSB Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_BASE2_LO_REGISTER" + Value = "0x63" + Help = "Device BaseAddres Register#2 LSB Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_IRQ1_REGISTER" + Value = "0x70" + Help = "Device IRQ Register#1 Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_IRQ2_REGISTER" + Value = "0x72" + Help = "Device IRQ Register#2 Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_DMA1_REGISTER" + Value = "0x74" + Help = "Device DMA Register#1 Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_DMA2_REGISTER" + Value = "0x75" + Help = "Device DMA Register#2 Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "=== Hardware monitor Registers Settings ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Hardware monitor Registers Settings" + TokenType = Expression +End + +TOKEN + Name = "F81866_PECI_SUPPORT" + Value = "1" + Help = "Intel PECI 1/0 support/not" + TokenType = Boolean + TargetH = Yes + Token = "F81866_HWM_PRESENT" "=" "1" +End + +TOKEN + Name = "F81866_I2C_ADDR" + Value = "0x5C" + Help = "I2C_ADDR[7:1] is the slave address sent by the embedded master when using a block write command" + TokenType = Integer + TargetH = Yes + Token = "F81866_PECI_SUPPORT" "=" "1" +End + +TOKEN + Name = "F81866_INTEL_SEL" + Value = "1" + Help = "This bit is used to select AMD TSI or Intel IBEX when TSI_EN is set to 1.\0: Select AMD\1: Select Intel" + TokenType = Integer + TargetH = Yes + Token = "F81866_PECI_SUPPORT" "=" "1" +End + +TOKEN + Name = "F81866_PECI_EN" + Value = "1" + Help = "Set this bit 1 to enable Intel PECI function" + TokenType = Integer + TargetH = Yes + Token = "F81866_PECI_SUPPORT" "=" "1" +End + +TOKEN + Name = "F81866_IBEX_SUPPORT" + Value = "1" + Help = "Intel PECI 1/0 support/not" + TokenType = Boolean + TargetH = Yes + Token = "F81866_HWM_PRESENT" "=" "1" +End + +TOKEN + Name = "F81866_IBEX_EN" + Value = "1" + Help = "Set this bit 1 to enable AMD TSI or Intel IBEX function" + TokenType = Integer + TargetH = Yes + Token = "F81866_IBEX_SUPPORT" "=" "1" +End + +TOKEN + Name = "F81866_TSI_OFFSET" + Value = "0" + Help = "TSI Temperature offset for the CPU\ When AMD TSI or Intel PCH SMBus is enabled, this byte is used as the offset to be added to the temperature reading of CPU." + TokenType = Integer + TargetH = Yes + Token = "F81866_PECI_SUPPORT" "=" "1" +End + +TOKEN + Name = "F81866_SMBUS_ADDR" + Value = "0x96" + Help = "When AMD TSI or Intel PCH SMBus is enabled, this byte is used as SMBUS_ADDR.\SMBUS_ADDR [7:1] is the slave address sent by the embedded master to fetch the temperature." + TokenType = Integer + TargetH = Yes + Token = "F81866_IBEX_SUPPORT" "=" "1" +End + +TOKEN + Name = "F81866_T2_MODE" + Value = "1" + Help = "0: TEMP2 is connected to a thermistor.\1: TEMP2 is connected to a BJT. (default)" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_T1_MODE" + Value = "1" + Help = "0: TEMP1 is connected to a thermistor\1: TEMP1 is connected to a BJT.(default)" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "=== SIO Logic Device Present Settings ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "All Logic Device Present / Not Present." + TokenType = Expression +End + +TOKEN + Name = "F81866_FLOPPY_PORT_PRESENT" + Value = "1" + Help = "Floppy Port Present / Not Present." + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "F81866_PARALLEL_PORT_PRESENT" + Value = "1" + Help = "LPT Port Present / Not Present." + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "F81866_HWM_PRESENT" + Value = "1" + Help = "HWM Port Present / Not Present." + TokenType = Boolean + TargetMAK = Yes + TargetH = Yes +End + +TOKEN + Name = "F81866_KEYBOARD_PRESENT" + Value = "1" + Help = "Keyboard Present / Not Present." + TokenType = Boolean + TargetMAK = Yes + TargetH = Yes +End + +TOKEN + Name = "F81866_MOUSE_PRESENT" + Value = "1" + Help = "Mouse Present / Not Present." + TokenType = Boolean + TargetMAK = Yes + TargetH = Yes +End + +TOKEN + Name = "F81866_GPIO_PORT_PRESENT" + Value = "1" + Help = "GPIO Present / Not Present." + TokenType = Boolean + TargetMAK = Yes + TargetH = Yes +End + +TOKEN + Name = "F81866_WDT_PRESENT" + Value = "1" + Help = "Watch Dog Time Present / Not Present." + TokenType = Boolean + TargetMAK = Yes + TargetH = Yes +End + +TOKEN + Name = "F81866_PME_CONTROLLER_PRESENT" + Value = "1" + Help = "Powe Management Controller Present / Not Present." + TokenType = Boolean + TargetMAK = Yes + TargetH = Yes +End + +TOKEN + Name = "F81866_SERIAL_PORT0_PRESENT" + Value = "1" + Help = "Serial Port 0 (COMA / UART1) Present / Not Present." + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "F81866_SERIAL_PORT1_PRESENT" + Value = "1" + Help = "Serial Port 1 (COMB / UART2) Present / Not Present." + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "F81866_SERIAL_PORT2_PRESENT" + Value = "1" + Help = "Serial Port 2 (COMC / UART3) Present / Not Present." + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "F81866_SERIAL_PORT3_PRESENT" + Value = "1" + Help = "Serial Port 3 (COMD / UART4) Present / Not Present." + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "F81866_SERIAL_PORT4_PRESENT" + Value = "1" + Help = "Serial Port 4 (COME / UART5) Present / Not Present." + TokenType = Boolean + TargetH = Yes + Token = "F81866_FLOPPY_PORT_PRESENT" "=" "0" +End + +TOKEN + Name = "F81866_SERIAL_PORT4_PRESENT" + Value = "0" + Help = "Serial Port 4 (COME / UART5) Present / Not Present." + TokenType = Boolean + TargetH = Yes + Token = "F81866_FLOPPY_PORT_PRESENT" "=" "1" +End + +TOKEN + Name = "F81866_SERIAL_PORT5_PRESENT" + Value = "1" + Help = "Serial Port 5 (COMF / UART6) Present / Not Present." + TokenType = Boolean + TargetH = Yes + Token = "F81866_FLOPPY_PORT_PRESENT" "=" "0" +End + +TOKEN + Name = "F81866_SERIAL_PORT5_PRESENT" + Value = "0" + Help = "Serial Port 5 (COMF / UART6) Present / Not Present." + TokenType = Boolean + TargetH = Yes + Token = "F81866_FLOPPY_PORT_PRESENT" "=" "1" +End + +TOKEN + Name = "F81866_SMF_SUPPORT" + Value = "0" + Help = "F81866 SmartFan control support" + TokenType = Boolean + TargetMAK = Yes + TargetH = Yes + Token = "F81866_HWM_PRESENT" "=" "1" +End + +TOKEN + Name = "=== SIO Activation Values ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Specfy Logical Device Activation Value." + TokenType = Expression +End + +TOKEN + Name = "F81866_CONFIG_MODE_ENTER_VALUE" + Value = "0x87" + Help = "Value to enter the SIO Configuration Mode." + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_CONFIG_MODE_EXIT_VALUE" + Value = "0xAA" + Help = "Value to enter the SIO Configuration Mode." + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "ENTK" + Value = "$(F81866_CONFIG_MODE_ENTER_VALUE)" + Help = "ASL alias for SIO Config Mode Enter Value." + TokenType = Integer + TargetASL = Yes +End + +TOKEN + Name = "EXTK" + Value = "$(F81866_CONFIG_MODE_EXIT_VALUE)" + Help = "ASL alias for SIO Config Mode Exit Value." + TokenType = Integer + TargetASL = Yes +End + +TOKEN + Name = "F81866_ACTIVATE_VALUE" + Value = "0x01" + Help = "Value to activate Device." + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_DEACTIVATE_VALUE" + Value = "0x00" + Help = "Value to deactivate Device." + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "====== SIO For Debug Setting ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "The debug Serial Port Setting." + TokenType = Expression +End + +TOKEN + Name = "DEBUG_COM_PORT_ADDR" + Value = "0x3F8" + Help = "Debug Address from Serial Port x.\Default is 0x3F8." + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "DEBUG_COM_PORT_ADDR" + Value = "$(F81866_SERIAL_PORT0_BASE_ADDRESS)" + Help = "When seiral port 1 is present, it will be used as default for serial port debug and recovery function." + TokenType = Integer + TargetH = Yes + Token = "F81866_SERIAL_PORT0_PRESENT" "=" "1" +End + +TOKEN + Name = "DEBUG_LDN_UART" + Value = "$(F81866_LDN_UART1)" + Help = "UARTx Login Devive for Debugger." + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_SERIAL_PORT0_BASE_ADDRESS" + Value = "0x03F8" + Help = "Base Address of Serial Port 0 (COMA / UART1)." + TokenType = Integer + TargetH = Yes + Token = "F81866_SERIAL_PORT0_PRESENT" "=" "1" +End + +TOKEN + Name = "====== SIO BASE ADDRESS Setting ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "SIO some base address setting " + TokenType = Expression +End + +TOKEN + Name = "F81866_TOTAL_BASE_ADDRESS" + Value = "0xA00" + Help = "It's used for IODecode, System will open TOTAL_BASE_ADDRESS+TOTAL_LENGTH IODecode for GPIO+PME+..." + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_TOTAL_LENGTH" + Value = "0x30" + Help = "IODecode base address 's length. 0xFF >= TOTAL_LENGTH >= GPIO_LENGTH + PME_LENGTH + ..." + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_GPIO_BASE_ADDRESS" + Value = "0xA00" + Help = "Base Address of GPIO. If changed, please update PeiSetLpcDeviceDecoding() in F81866PEI.c too." + TokenType = Integer + TargetH = Yes + Token = "F81866_GPIO_PORT_PRESENT" "=" "1" +End + +TOKEN + Name = "F81866_GPIO_LENGTH" + Value = "0x10" + Help = "Base Address's length of GPIO. If changed, please update PeiSetLpcDeviceDecoding() in F81866PEI.c too." + TokenType = Integer + TargetH = Yes + Token = "F81866_GPIO_PORT_PRESENT" "=" "1" +End + +TOKEN + Name = "IO1B" + Value = "$(F81866_GPIO_BASE_ADDRESS)" + Help = "Base Address of GPIO Controller." + TokenType = Integer + TargetASL = Yes + TargetH = Yes + Token = "F81866_GPIO_PORT_PRESENT" "=" "1" +End + +TOKEN + Name = "IO1L" + Value = "$(F81866_GPIO_LENGTH)" + Help = "Length of GPIO Controller." + TokenType = Integer + TargetASL = Yes + TargetH = Yes + Token = "F81866_GPIO_PORT_PRESENT" "=" "1" +End + +TOKEN + Name = "IO1B" + Value = "0" + Help = "Base Address of GPIO Controller." + TokenType = Integer + TargetASL = Yes + TargetH = Yes + Token = "F81866_GPIO_PORT_PRESENT" "=" "0" +End + +TOKEN + Name = "IO1L" + Value = "0" + Help = "Length of GPIO Controller." + TokenType = Integer + TargetASL = Yes + TargetH = Yes + Token = "F81866_GPIO_PORT_PRESENT" "=" "0" +End + +TOKEN + Name = "F81866_WDT_BASE_ADDRESS" + Value = "0xA10" + Help = "Base Address of WDT Direct Access. If changed, please update PeiSetLpcDeviceDecoding() in F81866PEI.c too." + TokenType = Integer + TargetH = Yes + Token = "F81866_WDT_PRESENT" "=" "1" +End + +TOKEN + Name = "F81866_WDT_LENGTH" + Value = "0x10" + Help = "Base Address's length of WDT Direct Access. If changed, please update PeiSetLpcDeviceDecoding() in F81866PEI.c too." + TokenType = Integer + TargetH = Yes + Token = "F81866_WDT_PRESENT" "=" "1" +End + +TOKEN + Name = "IO2B" + Value = "$(F81866_WDT_BASE_ADDRESS)" + Help = "Base Address of PME Controller." + TokenType = Integer + TargetASL = Yes + TargetH = Yes + Token = "F81866_WDT_PRESENT" "=" "1" +End + +TOKEN + Name = "IO2L" + Value = "$(F81866_WDT_LENGTH)" + Help = "Length of PME Controller." + TokenType = Integer + TargetASL = Yes + TargetH = Yes + Token = "F81866_WDT_PRESENT" "=" "1" +End + +TOKEN + Name = "IO2B" + Value = "0" + Help = "Base Address of PME Controller." + TokenType = Integer + TargetASL = Yes + TargetH = Yes + Token = "F81866_WDT_PRESENT" "=" "0" +End + +TOKEN + Name = "IO2L" + Value = "0" + Help = "Length of PME Controller." + TokenType = Integer + TargetASL = Yes + TargetH = Yes + Token = "F81866_WDT_PRESENT" "=" "0" +End + +TOKEN + Name = "F81866_HWM_BASE_ADDRESS" + Value = "0xA20" + Help = "Base Address of HWM Direct Access. If changed, please update PeiSetLpcDeviceDecoding() in F81866PEI.c too." + TokenType = Integer + TargetH = Yes + Token = "F81866_HWM_PRESENT" "=" "1" +End + +TOKEN + Name = "F81866_HWM_LENGTH" + Value = "0x10" + Help = "Base Address's length of HWM Direct Access. If changed, please update PeiSetLpcDeviceDecoding() in F81866PEI.c too." + TokenType = Integer + TargetH = Yes + Token = "F81866_HWM_PRESENT" "=" "1" +End + +TOKEN + Name = "IO3B" + Value = "$(F81866_HWM_BASE_ADDRESS)" + Help = "Base Address of HWM Controller." + TokenType = Integer + TargetASL = Yes + TargetH = Yes + Token = "F81866_HWM_PRESENT" "=" "1" +End + +TOKEN + Name = "IO3L" + Value = "$(F81866_HWM_LENGTH)" + Help = "Length of HWM Controller." + TokenType = Integer + TargetASL = Yes + TargetH = Yes + Token = "F81866_HWM_PRESENT" "=" "1" +End + +TOKEN + Name = "IO3B" + Value = "0" + Help = "Base Address of HWM Controller." + TokenType = Integer + TargetASL = Yes + TargetH = Yes + Token = "F81866_HWM_PRESENT" "=" "0" +End + +TOKEN + Name = "IO3L" + Value = "0" + Help = "Length of HWM Controller." + TokenType = Integer + TargetASL = Yes + TargetH = Yes + Token = "F81866_HWM_PRESENT" "=" "0" +End + +TOKEN + Name = "===== SIO token only been used in ASL =====" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Provide Resource properties." + TokenType = Expression +End + +TOKEN + Name = "KBFG" + Value = "0" + Help = "Keyboard wake-up flag.\This token can avoid building error without PS/2 devices." + TokenType = Integer + TargetASL = Yes + Token = "F81866_KEYBOARD_PRESENT" "=" "0" +End + +TOKEN + Name = "MSFG" + Value = "0" + Help = "Mouse wake-up flag.\This token can avoid building error without PS/2 devices." + TokenType = Integer + TargetASL = Yes + Token = "F81866_MOUSE_PRESENT" "=" "0" +End + +TOKEN + Name = "====== SIO COM Mode Select Tokens ======" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "SIO COM Mode Select Tokens." + TokenType = Expression +End + +TOKEN + Name = "F81866_COM1_RS485_Mode" + Value = "0" + Help = "Enable/disable COM1 support in Project\no effect when com1 disabled" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_COM1_RS485_RTS_INV" + Value = "0" + Help = "Enable/disable COM1 RTS# invert rs485 mode\no effect when com1 RS485 disabled" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_COM2_RS485_Mode" + Value = "0" + Help = "Enable/disable COM2 support in Project\no effect when com2 disabled" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_COM2_RS485_RTS_INV" + Value = "0" + Help = "Enable/disable COM2 RTS# invert rs485 mode\no effect when com2 RS485 disabled" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_COM3_RS485_Mode" + Value = "0" + Help = "Enable/disable COM3 support in Project\no effect when com3 disabled" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_COM3_RS485_RTS_INV" + Value = "0" + Help = "Enable/disable COM3 RTS# invert rs485 mode\no effect when com3 RS485 disabled" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_COM4_RS485_Mode" + Value = "0" + Help = "Enable/disable COM4 support in Project\no effect when com4 disabled" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_COM4_RS485_RTS_INV" + Value = "0" + Help = "Enable/disable COM4 RTS# invert rs485 mode\no effect when com4 RS485 disabled" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_COM5_RS485_Mode" + Value = "0" + Help = "Enable/disable COM5 support in Project\no effect when com5 disabled" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_COM5_RS485_RTS_INV" + Value = "0" + Help = "Enable/disable COM5 RTS# invert rs485 mode\no effect when com5 RS485 disabled" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_COM6_RS485_Mode" + Value = "0" + Help = "Enable/disable COM6 support in Project\no effect when com6 disabled" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81866_COM6_RS485_RTS_INV" + Value = "0" + Help = "Enable/disable COM6 RTS# invert rs485 mode\no effect when com6 RS485 disabled" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "====== SIO SMF Control Tokens ======" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Smart Fan control tokens." + TokenType = Expression +End + +TOKEN + Name = "FAN1_TYPE" + Value = "0" + Help = "FAN1 output type\00: Output PWM mode (push pull) to control fans.\01: Use linear fan application circuit to control fan speed by fan's power terminal.\10: Output PWM mode (open drain) to control Intel 4-wire fans." + TokenType = Integer + TargetH = Yes + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_TYPE" + Value = "0" + Help = "FAN1 output type\00: Output PWM mode (push pull) to control fans.\01: Use linear fan application circuit to control fan speed by fan's power terminal.\10: Output PWM mode (open drain) to control Intel 4-wire fans." + TokenType = Integer + TargetH = Yes + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_TYPE" + Value = "0" + Help = "FAN1 output type\00: Output PWM mode (push pull) to control fans.\01: Use linear fan application circuit to control fan speed by fan's power terminal.\10: Output PWM mode (open drain) to control Intel 4-wire fans." + TokenType = Integer + TargetH = Yes + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_FIXED_RPM" + Value = "3000" + Help = "FAN1 FIXED RPM value" + TokenType = Integer + TargetH = Yes + Range = "500-10000" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_FIXED_DUTY" + Value = "60" + Help = "FAN1 FIXED DUTY-Cycle value" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_RPM_T1" + Value = "60" + Help = "FAN1 FIXED Auto RPM setting T1" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_RPM_T2" + Value = "50" + Help = "FAN1 FIXED Auto RPM setting T2" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_RPM_T3" + Value = "40" + Help = "FAN1 FIXED Auto RPM setting T3" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_RPM_T4" + Value = "30" + Help = "FAN1 FIXED Auto RPM setting T4" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_RPM_F1" + Value = "85" + Help = "FAN1 FIXED Auto RPM setting F1" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_RPM_F2" + Value = "70" + Help = "FAN1 FIXED Auto RPM setting F2" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_RPM_F3" + Value = "60" + Help = "FAN1 FIXED Auto RPM setting F3" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_RPM_F4" + Value = "50" + Help = "FAN1 FIXED Auto RPM setting F4" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_DUTY_T1" + Value = "60" + Help = "FAN1 FIXED Auto DUTY setting T1" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_DUTY_T2" + Value = "50" + Help = "FAN1 FIXED Auto DUTY setting T2" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_DUTY_T3" + Value = "40" + Help = "FAN1 FIXED Auto DUTY setting T3" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_DUTY_T4" + Value = "30" + Help = "FAN1 FIXED Auto DUTY setting T4" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_DUTY_F1" + Value = "85" + Help = "FAN1 FIXED Auto DUTY setting F1" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_DUTY_F2" + Value = "70" + Help = "FAN1 FIXED Auto DUTY setting F2" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_DUTY_F3" + Value = "60" + Help = "FAN1 FIXED Auto DUTY setting F3" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN1_AUTO_DUTY_F4" + Value = "50" + Help = "FAN1 FIXED Auto DUTY setting F4" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_FIXED_RPM" + Value = "3000" + Help = "FAN2 FIXED RPM value" + TokenType = Integer + TargetH = Yes + Range = "500-10000" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_FIXED_DUTY" + Value = "60" + Help = "FAN2 FIXED DUTY-Cycle value" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_RPM_T1" + Value = "60" + Help = "FAN2 FIXED Auto RPM setting T1" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_RPM_T2" + Value = "50" + Help = "FAN2 FIXED Auto RPM setting T2" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_RPM_T3" + Value = "40" + Help = "FAN2 FIXED Auto RPM setting T3" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_RPM_T4" + Value = "30" + Help = "FAN2 FIXED Auto RPM setting T4" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_RPM_F1" + Value = "85" + Help = "FAN2 FIXED Auto RPM setting F1" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_RPM_F2" + Value = "70" + Help = "FAN2 FIXED Auto RPM setting F2" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_RPM_F3" + Value = "60" + Help = "FAN2 FIXED Auto RPM setting F3" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_RPM_F4" + Value = "50" + Help = "FAN2 FIXED Auto RPM setting F4" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_DUTY_T1" + Value = "60" + Help = "FAN2 FIXED Auto DUTY setting T1" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_DUTY_T2" + Value = "50" + Help = "FAN2 FIXED Auto DUTY setting T2" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_DUTY_T3" + Value = "40" + Help = "FAN2 FIXED Auto DUTY setting T3" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_DUTY_T4" + Value = "30" + Help = "FAN2 FIXED Auto DUTY setting T4" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_DUTY_F1" + Value = "85" + Help = "FAN2 FIXED Auto DUTY setting F1" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_DUTY_F2" + Value = "70" + Help = "FAN2 FIXED Auto DUTY setting F2" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_DUTY_F3" + Value = "60" + Help = "FAN2 FIXED Auto DUTY setting F3" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN2_AUTO_DUTY_F4" + Value = "50" + Help = "FAN2 FIXED Auto DUTY setting F4" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_FIXED_RPM" + Value = "3000" + Help = "FAN3 FIXED RPM value" + TokenType = Integer + TargetH = Yes + Range = "500-10000" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_FIXED_DUTY" + Value = "60" + Help = "FAN3 FIXED DUTY-Cycle value" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_RPM_T1" + Value = "60" + Help = "FAN3 FIXED Auto RPM setting T1" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_RPM_T2" + Value = "50" + Help = "FAN3 FIXED Auto RPM setting T2" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_RPM_T3" + Value = "40" + Help = "FAN3 FIXED Auto RPM setting T3" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_RPM_T4" + Value = "30" + Help = "FAN3 FIXED Auto RPM setting T4" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_RPM_F1" + Value = "85" + Help = "FAN3 FIXED Auto RPM setting F1" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_RPM_F2" + Value = "70" + Help = "FAN3 FIXED Auto RPM setting F2" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_RPM_F3" + Value = "60" + Help = "FAN3 FIXED Auto RPM setting F3" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_RPM_F4" + Value = "50" + Help = "FAN3 FIXED Auto RPM setting F4" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_DUTY_T1" + Value = "60" + Help = "FAN3 FIXED Auto DUTY setting T1" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_DUTY_T2" + Value = "50" + Help = "FAN3 FIXED Auto DUTY setting T2" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_DUTY_T3" + Value = "40" + Help = "FAN3 FIXED Auto DUTY setting T3" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_DUTY_T4" + Value = "30" + Help = "FAN3 FIXED Auto DUTY setting T4" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_DUTY_F1" + Value = "85" + Help = "FAN3 FIXED Auto DUTY setting F1" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_DUTY_F2" + Value = "70" + Help = "FAN3 FIXED Auto DUTY setting F2" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_DUTY_F3" + Value = "60" + Help = "FAN3 FIXED Auto DUTY setting F3" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "FAN3_AUTO_DUTY_F4" + Value = "50" + Help = "FAN3 FIXED Auto DUTY setting F4" + TokenType = Integer + TargetH = Yes + Range = "0-100" + Token = "F81866_SMF_SUPPORT" "=" "1" +End + +TOKEN + Name = "===== SIO Module Setting ======" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "SIO Module Setting" + TokenType = Expression +End + +PATH + Name = "F81866_DIR" +End + +MODULE + Help = "Includes F81866.MAK to Project" + File = "F81866.MAK" +End + +ELINK + Name = "PeiF81866Init," + Parent = "PeiCoreInitialize" + Priority = 1 + Help = "if SecondIO, Priority must be 2." + InvokeOrder = AfterParent +End + +ELINK + Name = "F81866," + Parent = "DxeSioList" + Priority = 1 + Help = "if SecondIO, Priority must be 2." + InvokeOrder = AfterParent +End + +ELINK + Name = "$(BUILD_DIR)\F81866.SDB" + Parent = "SETUP_SDBS" + Priority = 40 + InvokeOrder = AfterParent +End + +ELINK + Name = "$(F81866_DIR)\F81866.SD" + Parent = "SETUP_DEFINITIONS" + Priority = 40 + InvokeOrder = AfterParent +End + +ELINK + Name = "AmiSioEntryPoint," + Parent = "DxeCoreInitialize" + InvokeOrder = AfterParent +End + +ELINK + Name = "-i $(F81866_DIR)" + Parent = "SETUP_VFR_INCLUDES" + InvokeOrder = AfterParent +End + +ELINK + Name = "InitSioSetupStrings," + Parent = "SetupStringInit" + InvokeOrder = AfterParent +End + +ELINK + Name = "SIOPEIDBG_Initialize," + Parent = "PeiDebuggerInitialize" + Token = "PeiDebugger_SUPPORT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "IoRangeDecodeList" + InvokeOrder = ReplaceParent +End + +ELINK + Name = "CSP_SetLpcDeviceDecoding," + Parent = "IoRangeDecodeList" + Help = "Use this module provided example-decode function(only intel platform)" + Token = "IODECODETYPE" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "SbLib_SetLpcDeviceDecoding," + Parent = "IoRangeDecodeList" + Help = "elink Chipset/Oem porting IODecode function(take care yourname),compiler to CORE_PEIBin/CORE_DXEBin" + Token = "IODECODETYPE" "=" "0" + InvokeOrder = AfterParent +End + +ELINK + Name = "SetupStrTableList" + InvokeOrder = ReplaceParent +End + +ELINK + Name = "{dsFDC, 0x00, STRING_TOKEN(STR_F81866_FLOPPY_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsLPT, 0x00, STRING_TOKEN(STR_F81866_PARALLEL_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsUART,0x00, STRING_TOKEN(STR_F81866_SERIAL0_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsUART,0x01, STRING_TOKEN(STR_F81866_SERIAL1_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsUART,0x02, STRING_TOKEN(STR_F81866_SERIAL2_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsUART,0x03, STRING_TOKEN(STR_F81866_SERIAL3_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsUART,0x04, STRING_TOKEN(STR_F81866_SERIAL4_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsUART,0x05, STRING_TOKEN(STR_F81866_SERIAL5_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + InvokeOrder = AfterParent +End + +ELINK + Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,HWM_INTERACTIVE_KEY,F81866_HWM_CallBack)," + Parent = "SetupItemCallbacks" + Token = "F81866_HWM_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "HwmExtFunList" + InvokeOrder = ReplaceParent +End + +ELINK + Name = "GetAndUpdateTemperature1," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_HWM_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateTemperature2," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_HWM_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateTemperature3," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_PECI_SUPPORT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateTemperature4," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_IBEX_SUPPORT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateTemperature5," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_IBEX_SUPPORT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateTemperature6," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_IBEX_SUPPORT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateFan1Speed," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_HWM_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateFan2Speed," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_HWM_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateFan3Speed," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_HWM_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateVIN1Voltage," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_HWM_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateVIN2Voltage," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_HWM_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateVIN3Voltage," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_HWM_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateVIN4Voltage," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_HWM_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateVSB5VVoltage," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_HWM_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateVCC3VVoltage," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_HWM_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateVSB3VVoltage," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_HWM_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "GetAndUpdateVBATVoltage," + Parent = "HwmExtFunList" + Help = "elink HWM external function in F81866HwnOemHooks.C to HWM external function list." + Token = "F81866_HWM_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/SharkBayDT.veb b/SharkBayDT.veb index e8df3fd..fc20dc0 100644 --- a/SharkBayDT.veb +++ b/SharkBayDT.veb @@ -64,6 +64,12 @@ "Core\EM\EdkIILib\EdkIILib.cif"= "SS: Alaska;$/Alaska/SOURCE/Core\EdkIICompLib;4.6.5.4" "Include\EdkII_headers.cif"= "SS: Alaska;$/Alaska/SOURCE/Core\EdkIICompLib;4.6.5.4" "Core\EM\Capsule2_0\Capsule2_0.cif"= "SS: Alaska;$/Alaska/SOURCE/Core\Modules/Capsule2_0;4.6.5.4" +"Board\IO\F81216\F81216.CIF"= "SS: ALASKA;$/Alaska/BIN/IO/Fintek/F81216_Sec;4.6.3_SIO_F81216_Sec_A9" +"Board\IO\F81216\ACPI\DeviceASL.cif"= "SS: ALASKA;$/Alaska/BIN/IO/Fintek/F81216_Sec\F81216 Device ASL Files;4.6.3_SIO_F81216_Sec_A9" +"Board\IO\F81216\BSP\BSP.cif"= "SS: ALASKA;$/Alaska/BIN/IO/Fintek/F81216_Sec\F81216 Board;4.6.3_SIO_F81216_Sec_A9" +"Board\IO\F81866\F81866.CIF"= "SS: ALASKA;$/Alaska/BIN/IO/Fintek/F81866;4.6.3.5_SIO_F81866_A5" +"Board\IO\F81866\ACPI\DeviceASL.cif"= "SS: ALASKA;$/Alaska/BIN/IO/Fintek/F81866\F81866 Device ASL Files;4.6.3.5_SIO_F81866_A5" +"Board\IO\F81866\BSP\BSP.cif"= "SS: ALASKA;$/Alaska/BIN/IO/Fintek/F81866\F81866 Board;4.6.3.5_SIO_F81866_A5" "Board\Flash\Flash.cif"= "SS: ALASKA;$/Alaska/SOURCE/Flash_Combined_2/Core;4.6.3_Flash_Combined_2_34" "Board\Flash\FWH\FwhFlash.cif"= "SS: ALASKA;$/Alaska/SOURCE/Flash_Combined_2/Core\FWH;4.6.3_Flash_Combined_2_34" "Board\Flash\LPC\LpcFlash.cif"= "SS: ALASKA;$/Alaska/SOURCE/Flash_Combined_2/Core\LPC;4.6.3_Flash_Combined_2_34" |