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| author | raywu <raywu@aaeon.com> | 2018-07-12 13:34:53 +0800 |
|---|---|---|
| committer | raywu <raywu@aaeon.com> | 2018-07-12 13:34:53 +0800 |
| commit | 178672f3be94b6194d72413ec85c54ee622e78b9 (patch) | |
| tree | 0c8750b4623e2a80bfd3a19ba5402ca4bb771132 | |
| parent | 73a228aeffea1424ef8bc394aeb55e984f70ec98 (diff) | |
| download | zprj-178672f3be94b6194d72413ec85c54ee622e78b9.tar.xz | |
SIO AC Power Loss : Bypass Mode
| -rw-r--r-- | Board/IO/F81866/BSP/PeiIoTable.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/Board/IO/F81866/BSP/PeiIoTable.h b/Board/IO/F81866/BSP/PeiIoTable.h index a5c6d34..ff51254 100644 --- a/Board/IO/F81866/BSP/PeiIoTable.h +++ b/Board/IO/F81866/BSP/PeiIoTable.h @@ -330,7 +330,10 @@ SIO_DATA F81866_PEI_Init_Table[] = { //--------------------------------------------------------------------- // After init all logical devices, program Global register if needed. //--------------------------------------------------------------------- - + {F81866_CONFIG_INDEX, 0xFF, F81866_LDN_SEL_REGISTER}, + {F81866_CONFIG_DATA, 0xFF, F81866_LDN_PME}, + {F81866_CONFIG_INDEX, 0xFF, 0xF4}, + {F81866_CONFIG_DATA, 0xF9, 0x02}, // Bypass Mode //--------------------------------------------------------------------- // After init all logical devices, Exit Configuration Mode. //--------------------------------------------------------------------- |