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authorraywu <raywu@aaeon.com.tw>2018-11-23 15:15:07 +0800
committerraywu <raywu@aaeon.com.tw>2018-11-23 15:15:07 +0800
commit16d9c6b8f5a95724f70ad3af0dbed5cccd57b6ec (patch)
tree5115f55b9689f9f44c4b97dff6ca2885aa2b7c71
parentd09773e153cb6725d6e124c6dc42f5ea4b73348b (diff)
downloadzprj-16d9c6b8f5a95724f70ad3af0dbed5cccd57b6ec.tar.xz
DW01 - Support WDT Function
-rw-r--r--Board/EM/Setup/Advanced.vfr7
-rw-r--r--Board/IO/F81866/BSP/PeiIoTable.h2
-rw-r--r--Board/IO/F81866/F81866.ASL4
-rw-r--r--Board/IO/F81866/F81866.SD30
-rw-r--r--Board/IO/F81866/F81866.UNIbin39290 -> 39562 bytes
-rw-r--r--CRB/CRBPei.c38
-rw-r--r--Core/EM/AMITSE/commonoem.c41
7 files changed, 121 insertions, 1 deletions
diff --git a/Board/EM/Setup/Advanced.vfr b/Board/EM/Setup/Advanced.vfr
index d6a6fe7..425c9dd 100644
--- a/Board/EM/Setup/Advanced.vfr
+++ b/Board/EM/Setup/Advanced.vfr
@@ -121,6 +121,13 @@ formset guid = ADVANCED_FORM_SET_GUID,
#include <SetupDefinitions.h>
#undef FORM_SET_GOTO
+ SEPARATOR
+
+ CHECKBOX_F81866_WDT_ENABLE
+ suppressif ideqval SETUP_DATA.F81866WdtEnable == 0x0;
+ NUMERIC_F81866_WDT_TIMER
+ endif;
+
#if SETUP_GROUP_DYNAMIC_PAGES
SEPARATOR
suppressif ideqvallist DYNAMIC_PAGE_COUNT.PageCount == 0xFFFF;
diff --git a/Board/IO/F81866/BSP/PeiIoTable.h b/Board/IO/F81866/BSP/PeiIoTable.h
index ff51254..4c5e205 100644
--- a/Board/IO/F81866/BSP/PeiIoTable.h
+++ b/Board/IO/F81866/BSP/PeiIoTable.h
@@ -251,7 +251,7 @@ SIO_DATA F81866_PEI_Init_Table[] = {
{F81866_CONFIG_INDEX, 0xFF, 0x27},
{F81866_CONFIG_DATA, 0xF2, 0x04}, // GPIO_PROG_SEL = 01b , CLK_TUNE_PROG_EN = 0b
{F81866_CONFIG_INDEX, 0xFF, 0x2C},
- {F81866_CONFIG_DATA, 0x10, 0x6F},
+ {F81866_CONFIG_DATA, 0x10, 0x4F},
{F81866_CONFIG_INDEX, 0xFF, 0x27},
{F81866_CONFIG_DATA, 0xF2, 0x08}, // GPIO_PROG_SEL = 10b , CLK_TUNE_PROG_EN = 0b
{F81866_CONFIG_INDEX, 0xFF, 0x2C},
diff --git a/Board/IO/F81866/F81866.ASL b/Board/IO/F81866/F81866.ASL
index 8899ae8..ae13582 100644
--- a/Board/IO/F81866/F81866.ASL
+++ b/Board/IO/F81866/F81866.ASL
@@ -884,6 +884,10 @@ Method(SIOW, 1){
And(0xF0, ^SIO1.CR2D,^SIO1.CR2D) //disable kbc/mouse wakeup
And(0x7F, ^SIO1.RGE0, ^SIO1.RGE0) //disable ERP function,bit7
+ ^SIO1.ENFG(0x07)
+ And(^SIO1.OPT5, 0xDF, ^SIO1.OPT5)
+ Store(^SIO1.OPT5, ^SIO1.OPT5)
+
^SIO1.EXFG()
}
diff --git a/Board/IO/F81866/F81866.SD b/Board/IO/F81866/F81866.SD
index 440861f..d48621d 100644
--- a/Board/IO/F81866/F81866.SD
+++ b/Board/IO/F81866/F81866.SD
@@ -150,8 +150,38 @@
UINT8 F81866LptGpioConfiguration7xLevel[8];
UINT8 F81866LptGpioConfiguration8x[8]; // GPIO8x
UINT8 F81866LptGpioConfiguration8xLevel[8];
+
+ UINT8 F81866WdtEnable ;
+ UINT8 F81866WdtTimer ;
#endif //SETUP_DATA_DEFINITION
+#if defined(VFRCOMPILE) && !defined(CONTROLS_ARE_DEFINED)
+#define CONTROL_DEFINITION
+#endif
+
+#ifdef CONTROL_DEFINITION
+
+ #define CHECKBOX_F81866_WDT_ENABLE\
+ checkbox varid = SETUP_DATA.F81866WdtEnable,\
+ prompt = STRING_TOKEN(STR_F81866_WDT_ENABLE),\
+ help = STRING_TOKEN(STR_F81866_WDT_ENABLE),\
+ flags = 1 | MANUFACTURING | RESET_REQUIRED,\
+ key = 0,\
+ endcheckbox;
+
+ #define NUMERIC_F81866_WDT_TIMER\
+ numeric varid = SETUP_DATA.F81866WdtTimer,\
+ prompt = STRING_TOKEN(STR_F81866_WDT_TIMER),\
+ help = STRING_TOKEN(STR_F81866_WDT_TIMER),\
+ flags = 0 | RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 16,\
+ endnumeric;
+
+#endif //#ifdef CONTROL_DEFINITION
+
//-------------------------------------------------------------------------
//Select Top level menu itmem (forset) for you pages
//-------------------------------------------------------------------------
diff --git a/Board/IO/F81866/F81866.UNI b/Board/IO/F81866/F81866.UNI
index 26468f4..7b45f2d 100644
--- a/Board/IO/F81866/F81866.UNI
+++ b/Board/IO/F81866/F81866.UNI
Binary files differ
diff --git a/CRB/CRBPei.c b/CRB/CRBPei.c
index fc93a20..e8cb3ef 100644
--- a/CRB/CRBPei.c
+++ b/CRB/CRBPei.c
@@ -558,6 +558,44 @@ EFI_STATUS EFIAPI CRBPEI_Init (
F81866ExitConfigMode();
}
// Parallel Port / Gpio multi function selection _End <<
+
+ {
+ F81866EnterConfigMode() ;
+ F81866LDNSelect(F81866_LDN_WDT) ;
+
+ switch( SetupData.F81866WdtEnable ) {
+ case 1 : // WDT Enabled
+ // Disable WDT
+ F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) & ~BIT5 ) ;
+ // Clear WDT Status
+ F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) | BIT6 ) ;
+
+ // Configure WDT to Pulse Mode
+ F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) | BIT4 ) ;
+ // Configure WDT Pulse Width to 25ms
+ F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) & ~(BIT1 + BIT0) ) ;
+ F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) | BIT0 ) ;
+ // Configure WDT Polarity to Low Active
+ F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) & ~BIT2 ) ;
+ // Configure WDT Reset via WDTRST#
+ F81866ConfigRegisterWrite( 0xFA , F81866ConfigRegisterRead(0xFA) | BIT0 ) ;
+
+ // Configure WDT Timer
+ F81866ConfigRegisterWrite( 0xF6 , SetupData.F81866WdtTimer ) ;
+ F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) & ~BIT3 ) ; // Configure Timer Unit : 1 Second
+
+ // Enable WDT
+ F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) | BIT5 ) ;
+ break ;
+
+ default :
+ case 0 : // WDT Disabled
+ F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) & ~BIT5 ) ;
+ break ;
+ }
+
+ F81866ExitConfigMode() ;
+ }
}
return EFI_SUCCESS;
}
diff --git a/Core/EM/AMITSE/commonoem.c b/Core/EM/AMITSE/commonoem.c
index cdc4d35..ab5364c 100644
--- a/Core/EM/AMITSE/commonoem.c
+++ b/Core/EM/AMITSE/commonoem.c
@@ -849,6 +849,43 @@ UINT16 gRootPageOrderIndex = 0;
UINTN CurrentScreenresolutionX, CurrentScreenresolutionY;
extern UINTN gPostStatus; //EIP-140123
+VOID F81866ConfigRegisterWrite(UINT8 Index, UINT8 Data)
+{
+ IoWrite8(F81866_CONFIG_INDEX, Index);
+ IoWrite8(F81866_CONFIG_DATA, Data);
+}
+UINT8 F81866ConfigRegisterRead(UINT8 Index)
+{
+ UINT8 Data8;
+ IoWrite8(F81866_CONFIG_INDEX, Index);
+ Data8 = IoRead8(F81866_CONFIG_DATA);
+ return Data8;
+}
+VOID F81866LDNSelect(UINT8 Ldn)
+{
+ IoWrite8(F81866_CONFIG_INDEX, F81866_LDN_SEL_REGISTER);
+ IoWrite8(F81866_CONFIG_DATA, Ldn);
+}
+VOID F81866EnterConfigMode()
+{
+ IoWrite8(F81866_CONFIG_INDEX, F81866_CONFIG_MODE_ENTER_VALUE);
+ IoWrite8(F81866_CONFIG_INDEX, F81866_CONFIG_MODE_ENTER_VALUE);
+}
+VOID F81866ExitConfigMode()
+{
+ // Exit config mode
+ IoWrite8(F81866_CONFIG_INDEX, F81866_CONFIG_MODE_EXIT_VALUE);
+}
+
+VOID F81866WDTDisable()
+{
+ F81866EnterConfigMode() ;
+ F81866LDNSelect(F81866_LDN_WDT) ;
+ // WDT Disabled
+ F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) & ~BIT5 ) ;
+ F81866ExitConfigMode() ;
+}
+
//<AMI_PHDR_START>
//----------------------------------------------------------------------------
// Procedure: DrawQuietBootLogo
@@ -1639,6 +1676,7 @@ VOID CheckForKey (EFI_EVENT Event, VOID *Context)
)
{
+ F81866WDTDisable() ;
CheckandDeactivateSoftkbd();// EIP62763 : Check and Deactivate if softkbd present
PrintEnterSetupMessage();
}
@@ -1652,6 +1690,7 @@ VOID CheckForKey (EFI_EVENT Event, VOID *Context)
#endif
)
{
+ F81866WDTDisable() ;
CheckandDeactivateSoftkbd();// EIP62763 : Check and Deactivate if softkbd present
PrintEnterBBSPopupMessage ();
gBootFlow = BOOT_FLOW_CONDITION_BBS_POPUP;
@@ -1792,6 +1831,7 @@ VOID CheckForClick (EFI_EVENT Event, VOID *Context)
//<AMI_PHDR_END>
VOID BeforeLegacyBootLaunch(VOID)
{
+ F81866WDTDisable() ;
}
//<AMI_PHDR_START>
@@ -1830,6 +1870,7 @@ VOID MouseDestroy(VOID);
//<AMI_PHDR_END>
VOID BeforeEfiBootLaunch(VOID)
{
+ F81866WDTDisable() ;
StopClickEvent();//EIP 86253 : Mouse and SoftKbd does not work after displaying "No option to boot to" in POST
MouseDestroy();