summaryrefslogtreecommitdiff
path: root/Board/EM/Platform/AcpiAslWrap
diff options
context:
space:
mode:
authorraywu <raywu0301@gmail.com>2018-06-15 00:00:50 +0800
committerraywu <raywu0301@gmail.com>2018-06-15 00:00:50 +0800
commitb7c51c9cf4864df6aabb99a1ae843becd577237c (patch)
treeeebe9b0d0ca03062955223097e57da84dd618b9a /Board/EM/Platform/AcpiAslWrap
downloadzprj-b7c51c9cf4864df6aabb99a1ae843becd577237c.tar.xz
init. 1AQQW051HEADmaster
Diffstat (limited to 'Board/EM/Platform/AcpiAslWrap')
-rw-r--r--Board/EM/Platform/AcpiAslWrap/AcpiAslWrap.cif12
-rw-r--r--Board/EM/Platform/AcpiAslWrap/AcpiAslWrap.sdl50
-rw-r--r--Board/EM/Platform/AcpiAslWrap/PlatformDock.asl47
-rw-r--r--Board/EM/Platform/AcpiAslWrap/PlatformEC.asl206
-rw-r--r--Board/EM/Platform/AcpiAslWrap/PlatformExternal.asl69
-rw-r--r--Board/EM/Platform/AcpiAslWrap/PlatformPS2Wake.asl47
6 files changed, 431 insertions, 0 deletions
diff --git a/Board/EM/Platform/AcpiAslWrap/AcpiAslWrap.cif b/Board/EM/Platform/AcpiAslWrap/AcpiAslWrap.cif
new file mode 100644
index 0000000..5cd5058
--- /dev/null
+++ b/Board/EM/Platform/AcpiAslWrap/AcpiAslWrap.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "AcpiAslWrap"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\AcpiAslWrap\"
+ RefName = "AcpiAslWrap"
+[files]
+"AcpiAslWrap.sdl"
+"PlatformPS2Wake.asl"
+"PlatformEC.asl"
+"PlatformDock.asl"
+"PlatformExternal.asl"
+<endComponent>
diff --git a/Board/EM/Platform/AcpiAslWrap/AcpiAslWrap.sdl b/Board/EM/Platform/AcpiAslWrap/AcpiAslWrap.sdl
new file mode 100644
index 0000000..1040bc2
--- /dev/null
+++ b/Board/EM/Platform/AcpiAslWrap/AcpiAslWrap.sdl
@@ -0,0 +1,50 @@
+TOKEN
+ Name = "AcpiAslWrap_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable Ref code AcpiAsl Wrap support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "AcpiAslWrap_DIR"
+End
+
+ELINK
+ Name = "/I$(AcpiAslWrap_DIR)"
+ Parent = "ACPI_PLATFORM_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+#ELINK
+# Name = "$(AcpiAslWrap_DIR)\PlatformPS2Wake.ASL"
+# Parent = "INTEL_GENERIC_ASL"
+# Token = "CRB_SIO_SUPPORT" "=" "0"
+# InvokeOrder = AfterParent
+#End
+
+ELINK
+ Name = "$(AcpiAslWrap_DIR)\PlatformEC.asl"
+ Parent = "INTEL_EC_ASL"
+ Token = "PlatformAcpiTables_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(AcpiAslWrap_DIR)\PlatformDock.asl"
+ Parent = "INTEL_GENERIC_ASL"
+ InvokeOrder = AfterParent
+ Token = "FACP_FLAG_DCK_CAP" "=" "0"
+ Token = "CRB_EC_SUPPORT" "=" "1"
+End
+
+
+ELINK
+ Name = "$(AcpiAslWrap_DIR)\PlatformExternal.asl"
+ Parent = "INTEL_GENERIC_ASL"
+ InvokeOrder = AfterParent
+ Priority = 10
+End
diff --git a/Board/EM/Platform/AcpiAslWrap/PlatformDock.asl b/Board/EM/Platform/AcpiAslWrap/PlatformDock.asl
new file mode 100644
index 0000000..32558c7
--- /dev/null
+++ b/Board/EM/Platform/AcpiAslWrap/PlatformDock.asl
@@ -0,0 +1,47 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: PlatformDock.asl
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+Device (\_SB.PCI0.DOCK)
+{
+ Name(_HID, "ABCD0000")
+ Name(_CID, EISAID("PNP0C15"))
+ Name(_UID,2)
+ Method(_STA)
+ {
+ Return(0x00)
+ }
+
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/AcpiAslWrap/PlatformEC.asl b/Board/EM/Platform/AcpiAslWrap/PlatformEC.asl
new file mode 100644
index 0000000..3823368
--- /dev/null
+++ b/Board/EM/Platform/AcpiAslWrap/PlatformEC.asl
@@ -0,0 +1,206 @@
+/**************************************************************************;
+;* *;
+;* Intel Confidential *;
+;* *;
+;* Intel Corporation - ACPI Reference Code for the Sandy Bridge *;
+;* Family of Customer Reference Boards. *;
+;* *;
+;* *;
+;* Copyright (c) 1999 - 2010 Intel Corporation. All rights reserved *;
+;* This software and associated documentation (if any) is furnished *;
+;* under a license and may only be used or copied in accordance *;
+;* with the terms of the license. Except as permitted by such *;
+;* license, no part of this software or documentation may be *;
+;* reproduced, stored in a retrieval system, or transmitted in any *;
+;* form or by any means without the express written consent of *;
+;* Intel Corporation. *;
+;* *;
+;* *;
+;**************************************************************************/
+/*++
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+--*/
+
+Scope(\_SB.PCI0.LPCB)
+{
+
+Device(H_EC) // Hitachi Embedded Controller
+{
+ Name(_HID, EISAID("PNP0C09"))
+
+ Name(_UID,1)
+
+ Method(_STA)
+ {
+ Store(3, \_SB.PCI0.GFX0.CLID)
+ Return(0x00) //Hide device
+ }
+
+ Name(B1CC, 0)
+ Name(B1ST, 0)
+ Name(B2CC, 0)
+ Name(B2ST, 0)
+ Name(CFAN, 0)
+ Name(CMDR, 0)
+ Name(DOCK, 0)
+ Name(EJET, 0)
+ Name(MCAP, 0)
+ Name(PLMX, 0)
+ Name(PECH, 0)
+ Name(PECL, 0)
+ Name(PENV, 0)
+ Name(PINV, 0)
+ Name(PPSH, 0)
+ Name(PPSL, 0)
+ Name(PSTP, 0)
+ Name(RPWR, 0)
+ Name(LIDS, 0)
+ Name(LSTE, 0)
+ Name(SLPC, 0)
+ Name(VPWR, 0)
+ Name(WTMS, 0)
+ Name(AWT2, 0)
+ Name(AWT1, 0)
+ Name(AWT0, 0)
+ Name(DLED, 0)
+ Name(IBT1, 0)
+ Name(ECAV, Zero) // OS Bug Checks if EC OpRegion accessed before Embedded Controller Driver loaded
+ Name(SPT2, 0)
+ Name(PB10, 0)
+
+ // ECRD (Embedded Read Method)
+ //
+ // Handle all commands sent to EC by BIOS
+ //
+ // Arguments: (1)
+ // Arg0 - Object to Read
+ // Return Value:
+ // Read Value
+ //
+ Method(ECRD,1,Serialized, 0, IntObj, FieldUnitObj)
+ {
+ Return(DeRefOf(Arg0))
+ }
+
+ // ECWT (Embedded Write Method)
+ //
+ // Handle all commands sent to EC by BIOS
+ //
+ // Arguments: (2)
+ // Arg0 - Value to Write
+ // Arg1 - Object to Write to
+ //
+ Method(ECWT,2,Serialized,,,{IntObj, FieldUnitObj})
+ {
+ Store(Arg0,Arg1)
+ }
+
+
+ Method(ECMD,1,Serialized) // Handle all commands sent to EC by BIOS
+ {
+ If (\ECON)
+ {
+ While(\_SB.PCI0.LPCB.H_EC.CMDR){Stall(20)}
+ Store(Arg0, \_SB.PCI0.LPCB.H_EC.CMDR)
+ }
+ }
+
+ Device(BAT0)
+ {
+ Name(_HID,EISAID("PNP0C0A"))
+
+ Name(_UID,0)
+
+ Method(_STA,0)
+ {
+ Return(0) // Hide device
+ }
+ }
+
+ // Real battery code
+ //
+ Scope(\)
+ {
+ // these fields come from the Global NVS area
+ Field(GNVS,AnyAcc,Lock,Preserve)
+ {
+ Offset(30), // Battery Support Registers:
+ BNUM, 8, // (30) Battery Number Present
+ Offset(32),
+ B1SC, 8, // (32) Battery 1 Stored Capacity
+ Offset(35),
+ B1SS, 8, // (35) Battery 1 Stored Status
+ }
+ } // end Scope(\)
+
+ Device(BAT1)
+ {
+ Name(_HID,EISAID("PNP0C0A"))
+
+ Name(_UID,1)
+
+ Method(_STA,0)
+ {
+ Return(0) // Hide device
+ }
+ }
+
+ Scope(\)
+ {
+ // these fields come from the Global NVS area
+ Field(GNVS,AnyAcc,Lock,Preserve)
+ {
+ Offset(33),
+ B2SC, 8, // (33) Battery 2 Stored Capacity
+ Offset(36),
+ B2SS, 8 // (36) Battery 2 Stored Status
+ }
+ } // end Scope(\)
+ Device(BAT2)
+ {
+ Name(_HID,EISAID("PNP0C0A"))
+
+ Name(_UID,2)
+
+ Method(_STA,0)
+ {
+ Return(0) // Hide device
+ }
+ }
+
+ }
+}// end scope Scope(\_SB.PCI0.LPCB)
+ // System Bus
+
+Device (\_SB.PCI0.DOCK)
+{
+ Name(_HID, "ABCD0000")
+ Name(_CID, EISAID("PNP0C15"))
+ Name(_UID,2)
+ Method(_STA)
+ {
+ Return(0x00)
+ }
+
+}
+Scope(\_SB)
+{
+
+ // Define a Lid Switch.
+
+ Device(LID0)
+ {
+ Name(_HID,EISAID("PNP0C0D"))
+
+ Method(_STA)
+ {
+ Return(0x00)
+ }
+
+ }
+}//end scope _SB
+
+
diff --git a/Board/EM/Platform/AcpiAslWrap/PlatformExternal.asl b/Board/EM/Platform/AcpiAslWrap/PlatformExternal.asl
new file mode 100644
index 0000000..b83720e
--- /dev/null
+++ b/Board/EM/Platform/AcpiAslWrap/PlatformExternal.asl
@@ -0,0 +1,69 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: PlatformExternal.asl
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#if !defined(ASL_Remove_SaSsdt_Data_To_Dsdt) || (ASL_Remove_SaSsdt_Data_To_Dsdt == 0)
+External(LHIH)
+External(LLOW)
+External(IGDS)
+External(LIDS)
+External(BRTL)
+External(ALSE)
+External(GSMI)
+External(\_SB.PCI0.GFX0.ALSI)
+External(\_SB.PCI0.GFX0.CDCK)
+External(\_SB.PCI0.GFX0.CBLV)
+External(\_SB.PCI0.GFX0.GSSE)
+External(\_SB.PCI0.PEG0, DeviceObj)
+External(\_SB.PCI0.PEG0.PEGP, DeviceObj)
+External(\_SB.PCI0.PEG1, DeviceObj)
+External(\_SB.PCI0.PEG2, DeviceObj)
+External(\_SB.PCI0.GFX0.DD1F, DeviceObj)
+External(\_SB.PCI0.GFX0.GDCK, MethodObj)
+External(\_SB.PCI0.GFX0.GHDS, MethodObj)
+External(\_SB.PCI0.GFX0.AINT, MethodObj)
+External(\_SB.PCI0.GFX0.GLID, MethodObj)
+External(\_SB.PCI0.GFX0.GSCI, MethodObj)
+#endif
+External(\_PR.CPU0, DeviceObj)
+External(\_PR.CPU0._PSS, MethodObj)
+External(\_PR.CPU0._PPC, IntObj)
+#if !defined(ASL_EC_SUPPORT) || (ASL_EC_SUPPORT == 0)
+#if !defined(ASL_Remove_SaSsdt_Data_To_Dsdt) || (ASL_Remove_SaSsdt_Data_To_Dsdt == 0)
+External(\_SB.PCI0.GFX0.CLID)
+External(\_SB.PCI0.GFX0.IUEH, MethodObj)
+#endif
+External(\_SB.IETM, DeviceObj)
+#endif // ASL_EC_SUPPORT
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/AcpiAslWrap/PlatformPS2Wake.asl b/Board/EM/Platform/AcpiAslWrap/PlatformPS2Wake.asl
new file mode 100644
index 0000000..7f71d5f
--- /dev/null
+++ b/Board/EM/Platform/AcpiAslWrap/PlatformPS2Wake.asl
@@ -0,0 +1,47 @@
+/**************************************************************************;
+;* *;
+;* Intel Confidential *;
+;* *;
+;* Intel Corporation - ACPI Reference Code for the Sandy Bridge *;
+;* Family of Customer Reference Boards. *;
+;* *;
+;* *;
+;* Copyright (c) 1999 - 2010 Intel Corporation. All rights reserved *;
+;* This software and associated documentation (if any) is furnished *;
+;* under a license and may only be used or copied in accordance *;
+;* with the terms of the license. Except as permitted by such *;
+;* license, no part of this software or documentation may be *;
+;* reproduced, stored in a retrieval system, or transmitted in any *;
+;* form or by any means without the express written consent of *;
+;* Intel Corporation. *;
+;* *;
+;* *;
+;**************************************************************************/
+/*++
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+--*/
+
+Scope(\_SB)
+{
+ Device(PWRB)
+ {
+ Name(_HID,EISAID("PNP0C0C"))
+
+ // GPI14 = GPE30 = Waketime SCI. The PRW isn't working when
+ // placed in any of the logical locations ( PS2K, PS2M,
+ // H_EC ), so a Power Button Device was created specifically
+ // for the WAKETIME_SCI PRW.
+
+ Name(_PRW, Package(){30,4})
+
+ Method(_STA)
+ {
+ Return(0x0F)
+ }
+ }//end device PWRB
+}//end scope _SB
+
+