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authorraywu <raywu0301@gmail.com>2018-06-15 00:00:50 +0800
committerraywu <raywu0301@gmail.com>2018-06-15 00:00:50 +0800
commitb7c51c9cf4864df6aabb99a1ae843becd577237c (patch)
treeeebe9b0d0ca03062955223097e57da84dd618b9a /Board/EM
downloadzprj-b7c51c9cf4864df6aabb99a1ae843becd577237c.tar.xz
init. 1AQQW051HEADmaster
Diffstat (limited to 'Board/EM')
-rw-r--r--Board/EM/ACPI/ACPI.chmbin0 -> 166781 bytes
-rw-r--r--Board/EM/ACPI/ACPI.cif12
-rw-r--r--Board/EM/ACPI/ACPI.dxs49
-rw-r--r--Board/EM/ACPI/ACPI.mak446
-rw-r--r--Board/EM/ACPI/ACPI.sd263
-rw-r--r--Board/EM/ACPI/ACPI.sdl1872
-rw-r--r--Board/EM/ACPI/ACPI.unibin0 -> 8752 bytes
-rw-r--r--Board/EM/ACPI/ACPIBSP.CIF16
-rw-r--r--Board/EM/ACPI/ASLBSP.CIF10
-rw-r--r--Board/EM/ACPI/OEMRMISC.ASL241
-rw-r--r--Board/EM/ACPI/OEM_ACPI.C114
-rw-r--r--Board/EM/ACPI/OEM_ACPI.H94
-rw-r--r--Board/EM/ACPI/oemDSDT.asl246
-rw-r--r--Board/EM/AMITSEBoard/AMITSEBoard.cif15
-rw-r--r--Board/EM/AMITSEBoard/AMITSEBoard.mak116
-rw-r--r--Board/EM/AMITSEBoard/AMITSEBoard.sdl58
-rw-r--r--Board/EM/AMITSEBoard/OEMLogo.c88
-rw-r--r--Board/EM/AMITSEBoard/OemTokens.c102
-rw-r--r--Board/EM/AMITSEBoard/OemkeyHook.c104
-rw-r--r--Board/EM/AMITSEBoard/TseBoard.c98
-rw-r--r--Board/EM/AMITSEBoard/TseOem.h113
-rw-r--r--Board/EM/AMITSEBoard/TseOem.unibin0 -> 3032 bytes
-rw-r--r--Board/EM/AmiGopPolicy/AmiGopPolicy.c238
-rw-r--r--Board/EM/AmiGopPolicy/AmiGopPolicy.chmbin0 -> 25685 bytes
-rw-r--r--Board/EM/AmiGopPolicy/AmiGopPolicy.cif16
-rw-r--r--Board/EM/AmiGopPolicy/AmiGopPolicy.h96
-rw-r--r--Board/EM/AmiGopPolicy/AmiGopPolicy.mak124
-rw-r--r--Board/EM/AmiGopPolicy/AmiGopPolicy.sd254
-rw-r--r--Board/EM/AmiGopPolicy/AmiGopPolicy.sdl268
-rw-r--r--Board/EM/AmiGopPolicy/AmiGopPolicy.unibin0 -> 8128 bytes
-rw-r--r--Board/EM/AmiGopPolicy/AmiGopPolicyLib.c461
-rw-r--r--Board/EM/AmiGopPolicy/AmiGopPolicySetup.c1402
-rw-r--r--Board/EM/BlockS3Var/BlockS3Var.c179
-rw-r--r--Board/EM/BlockS3Var/BlockS3Var.chmbin0 -> 29677 bytes
-rw-r--r--Board/EM/BlockS3Var/BlockS3Var.cif11
-rw-r--r--Board/EM/BlockS3Var/BlockS3Var.mak72
-rw-r--r--Board/EM/BlockS3Var/BlockS3Var.sdl29
-rw-r--r--Board/EM/Csm/CSM.chmbin0 -> 447966 bytes
-rw-r--r--Board/EM/Csm/MBIOSEQU.EQU1080
-rw-r--r--Board/EM/Csm/MBIOSMAC.MAC673
-rw-r--r--Board/EM/Csm/csm.cif15
-rw-r--r--Board/EM/Csm/csm.sd264
-rw-r--r--Board/EM/Csm/csm.sdl366
-rw-r--r--Board/EM/Csm/csm.unibin0 -> 7022 bytes
-rw-r--r--Board/EM/Csm/csmoem.cif12
-rw-r--r--Board/EM/Csm/csmoem.mak83
-rw-r--r--Board/EM/Csm/csmoem.sdl68
-rw-r--r--Board/EM/Csm/csmsetup.c74
-rw-r--r--Board/EM/Csm/csmsetup.cif10
-rw-r--r--Board/EM/Csm/oem16sig.asm46
-rw-r--r--Board/EM/EcPs2Kbd/EcPs2Kbd.c280
-rw-r--r--Board/EM/EcPs2Kbd/EcPs2Kbd.chmbin0 -> 24781 bytes
-rw-r--r--Board/EM/EcPs2Kbd/EcPs2Kbd.cif13
-rw-r--r--Board/EM/EcPs2Kbd/EcPs2Kbd.dxs55
-rw-r--r--Board/EM/EcPs2Kbd/EcPs2Kbd.h83
-rw-r--r--Board/EM/EcPs2Kbd/EcPs2Kbd.mak53
-rw-r--r--Board/EM/EcPs2Kbd/EcPs2Kbd.sdl41
-rw-r--r--Board/EM/FIT/Boot_Guard_ACM_Rev1_1_PC_ES.binbin0 -> 32768 bytes
-rw-r--r--Board/EM/FIT/Boot_Guard_ACM_Rev1_2_PC_QS.binbin0 -> 32768 bytes
-rw-r--r--Board/EM/FIT/Boot_Guard_ACM_Rev1_2_PV_QS.binbin0 -> 32768 bytes
-rw-r--r--Board/EM/FIT/BpmKmGen.exebin0 -> 76800 bytes
-rw-r--r--Board/EM/FIT/CryptoCon.exebin0 -> 126976 bytes
-rw-r--r--Board/EM/FIT/CutRom.exebin0 -> 59392 bytes
-rw-r--r--Board/EM/FIT/Dxe/BootGuardDxe.c186
-rw-r--r--Board/EM/FIT/Dxe/BootGuardDxe.cif12
-rw-r--r--Board/EM/FIT/Dxe/BootGuardDxe.dxs71
-rw-r--r--Board/EM/FIT/Dxe/BootGuardDxe.h114
-rw-r--r--Board/EM/FIT/Dxe/BootGuardDxe.mak122
-rw-r--r--Board/EM/FIT/Dxe/BootGuardDxe.sdl95
-rw-r--r--Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.c350
-rw-r--r--Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.cif11
-rw-r--r--Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.h276
-rw-r--r--Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.mak46
-rw-r--r--Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.sdl91
-rw-r--r--Board/EM/FIT/FITUtil.exebin0 -> 69120 bytes
-rw-r--r--Board/EM/FIT/Fit.chmbin0 -> 80120 bytes
-rw-r--r--Board/EM/FIT/Fit.cif31
-rw-r--r--Board/EM/FIT/Fit.mak292
-rw-r--r--Board/EM/FIT/Fit.sdl390
-rw-r--r--Board/EM/FIT/FitTable.asm66
-rw-r--r--Board/EM/FIT/Pei/BootGuardPei.c285
-rw-r--r--Board/EM/FIT/Pei/BootGuardPei.cif14
-rw-r--r--Board/EM/FIT/Pei/BootGuardPei.dxs76
-rw-r--r--Board/EM/FIT/Pei/BootGuardPei.h182
-rw-r--r--Board/EM/FIT/Pei/BootGuardPei.mak119
-rw-r--r--Board/EM/FIT/Pei/BootGuardPei.sdl96
-rw-r--r--Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.c469
-rw-r--r--Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.cif11
-rw-r--r--Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.h242
-rw-r--r--Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.mak50
-rw-r--r--Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.sdl96
-rw-r--r--Board/EM/FIT/Pei/OpensslLib.libbin0 -> 132502 bytes
-rw-r--r--Board/EM/FIT/Pei/PeiCryptLib.libbin0 -> 115966 bytes
-rw-r--r--Board/EM/FIT/ReBuildFIT.bat1
-rw-r--r--Board/EM/FIT/ReserveBootGuardFvMainHashKey.bin1
-rw-r--r--Board/EM/FIT/ReserveBootGuardSigningServer.bin1
-rw-r--r--Board/EM/FIT/ReserveBpmTable.binbin0 -> 4096 bytes
-rw-r--r--Board/EM/FIT/ReserveKmTable.binbin0 -> 4096 bytes
-rw-r--r--Board/EM/FIT/Smm/FitHook.c113
-rw-r--r--Board/EM/FIT/Smm/FitHook.cif12
-rw-r--r--Board/EM/FIT/Smm/FitHook.mak77
-rw-r--r--Board/EM/FIT/Smm/FitHook.sdl94
-rw-r--r--Board/EM/FIT/keygen.exebin0 -> 122880 bytes
-rw-r--r--Board/EM/IdeAcoustic/Acoustic.c393
-rw-r--r--Board/EM/IdeAcoustic/Acoustic.chmbin0 -> 69957 bytes
-rw-r--r--Board/EM/IdeAcoustic/Acoustic.cif19
-rw-r--r--Board/EM/IdeAcoustic/Acoustic.dxs59
-rw-r--r--Board/EM/IdeAcoustic/Acoustic.h129
-rw-r--r--Board/EM/IdeAcoustic/Acoustic.mak97
-rw-r--r--Board/EM/IdeAcoustic/Acoustic.sd433
-rw-r--r--Board/EM/IdeAcoustic/Acoustic.sdl137
-rw-r--r--Board/EM/IdeAcoustic/Acoustic.unibin0 -> 10130 bytes
-rw-r--r--Board/EM/IdeAcoustic/AcousticBoard.c460
-rw-r--r--Board/EM/IdeAcoustic/AcousticSetup.c332
-rw-r--r--Board/EM/IdeBusBoard/IdeBusBoard.c664
-rw-r--r--Board/EM/IdeBusBoard/IdeBusBoard.cif11
-rw-r--r--Board/EM/IntelGigabitLan/IntelGigabitLan.cif11
-rw-r--r--Board/EM/IntelGigabitLan/IntelGigabitLan.mak59
-rw-r--r--Board/EM/IntelGigabitLan/IntelGigabitLan.sdl26
-rw-r--r--Board/EM/IntelGigabitLan/IntelGigabitLanIa32.efibin0 -> 90112 bytes
-rw-r--r--Board/EM/IntelGigabitLan/IntelGigabitLanx64.efibin0 -> 283824 bytes
-rw-r--r--Board/EM/Isct/AcpiTables/Isct.asl778
-rw-r--r--Board/EM/Isct/AcpiTables/Isct.cif12
-rw-r--r--Board/EM/Isct/AcpiTables/Isct.mak115
-rw-r--r--Board/EM/Isct/AcpiTables/Isct.sd190
-rw-r--r--Board/EM/Isct/AcpiTables/Isct.sdl99
-rw-r--r--Board/EM/Isct/AcpiTables/Isct.unibin0 -> 10436 bytes
-rw-r--r--Board/EM/Isct/Dxe/IsctAcpi.c701
-rw-r--r--Board/EM/Isct/Dxe/IsctAcpi.cif12
-rw-r--r--Board/EM/Isct/Dxe/IsctAcpi.dxs77
-rw-r--r--Board/EM/Isct/Dxe/IsctAcpi.h146
-rw-r--r--Board/EM/Isct/Dxe/IsctAcpi.mak127
-rw-r--r--Board/EM/Isct/Dxe/IsctAcpi.sdl78
-rw-r--r--Board/EM/Isct/Guid/IsctAcpiTableStorage/IsctAcpiTableStorage.c69
-rw-r--r--Board/EM/Isct/Guid/IsctAcpiTableStorage/IsctAcpiTableStorage.h64
-rw-r--r--Board/EM/Isct/Guid/IsctGuidLib.cif14
-rw-r--r--Board/EM/Isct/Guid/IsctGuidLib.inf68
-rw-r--r--Board/EM/Isct/Guid/IsctGuidLib.mak78
-rw-r--r--Board/EM/Isct/Guid/IsctGuidLib.sdl79
-rw-r--r--Board/EM/Isct/Guid/IsctPersistentData/IsctPersistentData.c60
-rw-r--r--Board/EM/Isct/Guid/IsctPersistentData/IsctPersistentData.h77
-rw-r--r--Board/EM/Isct/IsctPlatform.chmbin0 -> 65151 bytes
-rw-r--r--Board/EM/Isct/IsctPlatform.cif17
-rw-r--r--Board/EM/Isct/IsctPlatform.sdl78
-rw-r--r--Board/EM/Isct/Pei/IsctWakeReason.c837
-rw-r--r--Board/EM/Isct/Pei/IsctWakeReason.cif11
-rw-r--r--Board/EM/Isct/Pei/IsctWakeReason.dxs73
-rw-r--r--Board/EM/Isct/Pei/IsctWakeReason.mak135
-rw-r--r--Board/EM/Isct/Pei/IsctWakeReason.sdl86
-rw-r--r--Board/EM/Isct/Protocol/IsctNvsArea/IsctNvsArea.c64
-rw-r--r--Board/EM/Isct/Protocol/IsctNvsArea/IsctNvsArea.h102
-rw-r--r--Board/EM/Isct/Protocol/IsctProtocolLib.cif12
-rw-r--r--Board/EM/Isct/Protocol/IsctProtocolLib.inf66
-rw-r--r--Board/EM/Isct/Protocol/IsctProtocolLib.mak68
-rw-r--r--Board/EM/Isct/Protocol/IsctProtocolLib.sdl82
-rw-r--r--Board/EM/Isct/Smm/IsctSmm.c987
-rw-r--r--Board/EM/Isct/Smm/IsctSmm.cif11
-rw-r--r--Board/EM/Isct/Smm/IsctSmm.dxs69
-rw-r--r--Board/EM/Isct/Smm/IsctSmm.mak118
-rw-r--r--Board/EM/Isct/Smm/IsctSmm.sdl78
-rw-r--r--Board/EM/KbcSbBoard/KbcSbBoard.c90
-rw-r--r--Board/EM/KbcSbBoard/KbcSbBoard.cif8
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.c485
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.cif10
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.mak89
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.sdl78
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtInt9.asm277
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.c507
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.cif13
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.dxs6
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.h77
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.mak88
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.sdl38
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.c863
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.cif14
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.dxs68
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.h205
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.mak82
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.sdl24
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/DevicePath.c1049
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/DevicePath.h93
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.c558
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.cif14
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.dxs54
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.h209
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.mak116
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.sdl42
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.c233
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.cif13
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.dxs35
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.h60
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.inf81
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.mak113
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.sdl25
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSMIFlashElink.c128
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.c236
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.cif16
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.dxs70
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.h74
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.mak166
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.sd382
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.sdl107
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.unibin0 -> 15810 bytes
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtTseFunc.c447
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.c376
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.cif12
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.dxs70
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.h124
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.mak108
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.sdl25
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCode.cif12
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCode.mak81
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCode.sdl42
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCodeDxe.c151
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCodePei.c224
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCodeSmm.c368
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtWrapper.cif19
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AmtWrapper.sdl20
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.c300
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.cif12
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.dxs66
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.h70
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.mak79
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.sdl24
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.c883
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.cif25
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.dxs75
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.h268
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.mak117
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.sdl57
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/AsfSupport.c1919
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/AsfSupport.h270
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/BdsBoot.c809
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/BdsConnect.c175
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/BdsConsole.c251
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/BdsLib.h459
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/BdsMisc.c594
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/BmMachine.h102
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/DevicePath.c1078
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/KvmSupport.c135
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/KvmSupport.h119
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/Performance.c431
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Dxe/Performance.h87
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapper/AmtWrapper.c68
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapper/AmtWrapper.h180
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapperProtocolLib.cif11
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapperProtocolLib.mak65
-rw-r--r--Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapperProtocolLib.sdl34
-rw-r--r--Board/EM/MeWrapper/AtAmUi/AtAmUi.c1120
-rw-r--r--Board/EM/MeWrapper/AtAmUi/AtAmUi.cif14
-rw-r--r--Board/EM/MeWrapper/AtAmUi/AtAmUi.dxs42
-rw-r--r--Board/EM/MeWrapper/AtAmUi/AtAmUi.h150
-rw-r--r--Board/EM/MeWrapper/AtAmUi/AtAmUi.mak148
-rw-r--r--Board/EM/MeWrapper/AtAmUi/AtAmUi.sdl27
-rw-r--r--Board/EM/MeWrapper/AtAmUi/AtAmUiString.c242
-rw-r--r--Board/EM/MeWrapper/AtAmUi/AtAmUiString.h208
-rw-r--r--Board/EM/MeWrapper/Icc/Icc.cif13
-rw-r--r--Board/EM/MeWrapper/Icc/Icc.sdl25
-rw-r--r--Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.c1187
-rw-r--r--Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.cif12
-rw-r--r--Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.dxs116
-rw-r--r--Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.h260
-rw-r--r--Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.mak171
-rw-r--r--Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.sdl67
-rw-r--r--Board/EM/MeWrapper/Icc/IccSetup/IccCallbacks.c1272
-rw-r--r--Board/EM/MeWrapper/Icc/IccSetup/IccCallbacks.h167
-rw-r--r--Board/EM/MeWrapper/Icc/IccSetup/IccLoadDefault.c141
-rw-r--r--Board/EM/MeWrapper/Icc/IccSetup/IccSetup.cif16
-rw-r--r--Board/EM/MeWrapper/Icc/IccSetup/IccSetup.h139
-rw-r--r--Board/EM/MeWrapper/Icc/IccSetup/IccSetup.mak99
-rw-r--r--Board/EM/MeWrapper/Icc/IccSetup/IccSetup.sdl263
-rw-r--r--Board/EM/MeWrapper/Icc/IccSetup/IccSetupMenu.sd438
-rw-r--r--Board/EM/MeWrapper/Icc/IccSetup/IccSetupSubmenu.sd239
-rw-r--r--Board/EM/MeWrapper/Icc/IccSetup/IccStrings.unibin0 -> 24896 bytes
-rw-r--r--Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.cif14
-rw-r--r--Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.dxs109
-rw-r--r--Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.efibin0 -> 43840 bytes
-rw-r--r--Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.mak111
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-rw-r--r--Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticDataEnd.asm81
-rw-r--r--Board/EM/SMBIOS/SmbiosBoard.c1790
-rw-r--r--Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEdit32.objbin0 -> 25687 bytes
-rw-r--r--Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEdit64.objbin0 -> 27565 bytes
-rw-r--r--Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.c204
-rw-r--r--Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.c3213
-rw-r--r--Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.c6413
-rw-r--r--Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.cif17
-rw-r--r--Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.dxs82
-rw-r--r--Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.mak98
-rw-r--r--Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.sdl50
-rw-r--r--Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditFunc32.objbin0 -> 62125 bytes
-rw-r--r--Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditFunc64.objbin0 -> 74299 bytes
-rw-r--r--Board/EM/SMBIOS/SmbiosGetFlashData32.ffsbin0 -> 2525 bytes
-rw-r--r--Board/EM/SMBIOS/SmbiosGetFlashData64.ffsbin0 -> 2838 bytes
-rw-r--r--Board/EM/SMBIOS/Smbrun.asm890
-rw-r--r--Board/EM/Setup/Advanced.vfr184
-rw-r--r--Board/EM/Setup/AmiSetupProtocol.c270
-rw-r--r--Board/EM/Setup/Boot.vfr255
-rw-r--r--Board/EM/Setup/Chipset.vfr107
-rw-r--r--Board/EM/Setup/Exit.vfr212
-rw-r--r--Board/EM/Setup/Logo.bmpbin0 -> 43002 bytes
-rw-r--r--Board/EM/Setup/Main.vfr239
-rw-r--r--Board/EM/Setup/Security.vfr168
-rw-r--r--Board/EM/Setup/Setup.c1541
-rw-r--r--Board/EM/Setup/Setup.cif23
-rw-r--r--Board/EM/Setup/Setup.dxs63
-rw-r--r--Board/EM/Setup/Setup.mak259
-rw-r--r--Board/EM/Setup/Setup.sdl129
-rw-r--r--Board/EM/Setup/Setup.unibin0 -> 24774 bytes
-rw-r--r--Board/EM/Setup/SetupPrivate.h76
-rw-r--r--Board/EM/Sredir/LegacySredir-Board.cif9
-rw-r--r--Board/EM/Sredir/LegacySredir_Setup.C1509
-rw-r--r--Board/EM/Sredir/SerialCallback.Asm185
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.c404
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.cif11
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.dxs68
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.mak107
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.sdl35
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNVdGPU.asl710
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNViGDmisc.asl241
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNViGPU.asl963
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNvGPS.asl337
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNvVentura.asl502
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.asl196
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.cif15
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.mak134
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.sdl47
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.c988
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.cif15
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.mak101
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.sdl110
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpitables.h254
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/ATdGPUPCH.asl179
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/ATiGDmiscPCH.asl277
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/ATiGPUPCH.asl1339
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/AtiSSDTPCH.asl145
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NVdGPUPCH.asl621
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NViGDmiscPCH.asl280
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NViGPUPCH.asl1078
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvGC6PCH.asl365
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvGPSPCH.asl331
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvSSDTPCH.asl365
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvVenturaPCH.asl521
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/OpSSDTPCH.asl292
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgTpvPCH.cif12
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgTpvPCH.mak132
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgTpvPCH.sdl53
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgUltAti.cif11
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgUltNvidia.cif15
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/ATdGPU.asl204
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/ATiGDmisc.asl302
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/ATiGPU.asl1359
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/AtiSSDT.asl143
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NVdGPU.asl806
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NViGDmisc.asl306
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NViGPU.asl1108
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvGC6.asl363
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvGPS.asl356
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvSSDT.asl391
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvVentura.asl546
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/OpSSDT.asl281
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgAti.cif11
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgNvidia.cif15
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgTpvPEG.cif12
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgTpvPEG.mak131
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgTpvPEG.sdl53
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/MXM30/MXM30.cif18
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/MXM30/MXM30.mak161
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/MXM30/MXM30.sdl135
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30Dxe.c377
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30Dxe.dxs105
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30Efi.c425
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30ElkCreek4.mxmbin0 -> 102 bytes
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30ElkCreekIII.mxmbin0 -> 85 bytes
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/MXM30/MxmInt15.asm553
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/MXM30/NBCIEfi.c367
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.asl79
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.c223
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.cif13
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.dxs65
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.mak109
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.sdl67
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.ssp59
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/SgTpv.cif20
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/SgTpv.mak266
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/SgTpv.sdl40
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/SgTpvDxe.c260
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/SgTpvDxe.dxs88
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/SgTpvPei.c266
-rw-r--r--Board/EM/SwitchableGraphics/SgTpv/SgTpvPei.dxs85
-rw-r--r--Board/EM/SwitchableGraphics/SwitchableGraphics.chmbin0 -> 131323 bytes
-rw-r--r--Board/EM/SwitchableGraphics/SwitchableGraphics.cif14
-rw-r--r--Board/EM/SwitchableGraphics/SwitchableGraphics.mak100
-rw-r--r--Board/EM/SwitchableGraphics/SwitchableGraphics.sd216
-rw-r--r--Board/EM/SwitchableGraphics/SwitchableGraphics.sdl155
-rw-r--r--Board/EM/SwitchableGraphics/SwitchableGraphics.unibin0 -> 7796 bytes
-rw-r--r--Board/EM/TCG2/Common/AmiTcgBinaries.cif12
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatform.cif11
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatform.sdl213
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformDxe.c5594
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformDxe.cif15
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformDxe.dxs82
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformDxe.h425
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformDxe.mak172
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformDxe.sdl41
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformDxeLib.c1275
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformDxeLib.h201
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformDxeString.unibin0 -> 10866 bytes
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformPei.cif14
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformPei.dxs70
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformPei.h338
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformPei.sdl28
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformPeiAfterMem.c782
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformPeiAfterMem.cif9
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformPeiAfterMem.mak98
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformPeiBeforeMem.c279
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformPeiBeforeMem.cif9
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformPeiBeforeMem.mak150
-rw-r--r--Board/EM/TCG2/Common/AmiTcgPlatformPeiLib.c1907
-rw-r--r--Board/EM/TCG2/Common/LEGX16.binbin0 -> 2894 bytes
-rw-r--r--Board/EM/TCG2/Common/MPTPM.binbin0 -> 1549 bytes
-rw-r--r--Board/EM/TCG2/Common/Setup/HandleLoadDefaultsSetup.c141
-rw-r--r--Board/EM/TCG2/Common/Setup/TPMPwd.c346
-rw-r--r--Board/EM/TCG2/Common/Setup/TcgSetup.c67
-rw-r--r--Board/EM/TCG2/Common/Setup/TcgSetup.cif15
-rw-r--r--Board/EM/TCG2/Common/Setup/TcgSetup.mak123
-rw-r--r--Board/EM/TCG2/Common/Setup/TcgSetup.sd672
-rw-r--r--Board/EM/TCG2/Common/Setup/TcgSetup.sdl50
-rw-r--r--Board/EM/TCG2/Common/Setup/TcgSetup.unibin0 -> 12532 bytes
-rw-r--r--Board/EM/TCG2/Common/Setup/TcgSetupBoard.h95
-rw-r--r--Board/EM/TCG2/Common/TPM32BIN.binbin0 -> 11690 bytes
-rw-r--r--Board/EM/TCG2/Common/TcgBins.mak102
-rw-r--r--Board/EM/TCG2/Common/TcgBins.sdl42
-rw-r--r--Board/EM/TCG2/Common/TcgDxeplatform.c168
-rw-r--r--Board/EM/TCG2/Common/TcgDxeplatform.cif12
-rw-r--r--Board/EM/TCG2/Common/TcgDxeplatform.dxs70
-rw-r--r--Board/EM/TCG2/Common/TcgDxeplatform.h69
-rw-r--r--Board/EM/TCG2/Common/TcgDxeplatform.mak88
-rw-r--r--Board/EM/TCG2/Common/TcgDxeplatform.sdl28
-rw-r--r--Board/EM/TCG2/Common/TcgPeiplatform.c240
-rw-r--r--Board/EM/TCG2/Common/TcgPeiplatform.cif12
-rw-r--r--Board/EM/TCG2/Common/TcgPeiplatform.dxs70
-rw-r--r--Board/EM/TCG2/Common/TcgPeiplatform.h66
-rw-r--r--Board/EM/TCG2/Common/TcgPeiplatform.mak85
-rw-r--r--Board/EM/TCG2/Common/TcgPeiplatform.sdl16
-rw-r--r--Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.c301
-rw-r--r--Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.cif12
-rw-r--r--Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.dxs52
-rw-r--r--Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.h167
-rw-r--r--Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.mak88
-rw-r--r--Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.sdl25
-rw-r--r--Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.c441
-rw-r--r--Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.cif12
-rw-r--r--Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.dxs52
-rw-r--r--Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.h165
-rw-r--r--Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.mak88
-rw-r--r--Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.sdl25
-rw-r--r--Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.DXS85
-rw-r--r--Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.c373
-rw-r--r--Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.cif15
-rw-r--r--Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.h141
-rw-r--r--Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.mak191
-rw-r--r--Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.sdl72
-rw-r--r--Board/EM/TCG2/Common/Tpm20Acpi/TpmCrb.asl387
-rw-r--r--Board/EM/TCG2/Common/Tpm20Acpi/tcg_ppi1_2.asl256
-rw-r--r--Board/EM/TCG2/Common/Tpm20Acpi/tcg_ppi1_2_Ex.asl301
-rw-r--r--Board/EM/TCG2/Common/Tpm20PlatformDxe.c2508
-rw-r--r--Board/EM/TCG2/Common/Tpm20PlatformDxe.cif17
-rw-r--r--Board/EM/TCG2/Common/Tpm20PlatformDxe.dxs77
-rw-r--r--Board/EM/TCG2/Common/Tpm20PlatformDxe.h459
-rw-r--r--Board/EM/TCG2/Common/Tpm20PlatformDxe.mak104
-rw-r--r--Board/EM/TCG2/Common/Tpm20PlatformDxe.sdl27
-rw-r--r--Board/EM/TCG2/Common/Tpm20PlatformDxeLib.c57
-rw-r--r--Board/EM/TCG2/Common/Tpm20PlatformDxeLib.h73
-rw-r--r--Board/EM/TCG2/Common/Tpm20PlatformDxeString.unibin0 -> 7796 bytes
-rw-r--r--Board/EM/Thunderbolt/ReleaseNotes.chmbin0 -> 331307 bytes
-rw-r--r--Board/EM/Thunderbolt/TbtDxe/TbtDxe.c652
-rw-r--r--Board/EM/Thunderbolt/TbtDxe/TbtDxe.cif14
-rw-r--r--Board/EM/Thunderbolt/TbtDxe/TbtDxe.dxs54
-rw-r--r--Board/EM/Thunderbolt/TbtDxe/TbtDxe.mak104
-rw-r--r--Board/EM/Thunderbolt/TbtDxe/TbtDxe.sdl586
-rw-r--r--Board/EM/Thunderbolt/TbtDxe/TbtDxeLib.c209
-rw-r--r--Board/EM/Thunderbolt/TbtDxe/TbtDxeLib.h74
-rw-r--r--Board/EM/Thunderbolt/TbtDxe/TbtGpe.asl797
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.c415
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.cif17
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.dxs48
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.h328
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.mak95
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.sdl495
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtOemLib.c1298
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtOemLib.h216
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtOemPorting.asl13
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.c172
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.cif14
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.h70
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.mak89
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.sd1456
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.sdl386
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.unibin0 -> 29314 bytes
-rw-r--r--Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetupReset.c243
-rw-r--r--Board/EM/Thunderbolt/TbtPei/TbtPei.c638
-rw-r--r--Board/EM/Thunderbolt/TbtPei/TbtPei.cif11
-rw-r--r--Board/EM/Thunderbolt/TbtPei/TbtPei.dxs66
-rw-r--r--Board/EM/Thunderbolt/TbtPei/TbtPei.mak82
-rw-r--r--Board/EM/Thunderbolt/TbtPei/TbtPei.sdl35
-rw-r--r--Board/EM/Thunderbolt/TbtSmm/TbtSmm.c2992
-rw-r--r--Board/EM/Thunderbolt/TbtSmm/TbtSmm.cif11
-rw-r--r--Board/EM/Thunderbolt/TbtSmm/TbtSmm.dxs83
-rw-r--r--Board/EM/Thunderbolt/TbtSmm/TbtSmm.mak113
-rw-r--r--Board/EM/Thunderbolt/TbtSmm/TbtSmm.sdl120
-rw-r--r--Board/EM/Thunderbolt/Thunderbolt.cif14
-rw-r--r--Board/EM/Thunderbolt/Thunderbolt.sdl116
-rw-r--r--Board/EM/usb/amiusb.cif19
-rw-r--r--Board/EM/usb/usb.chmbin0 -> 758524 bytes
-rw-r--r--Board/EM/usb/usb.sdl481
-rw-r--r--Board/EM/usb/usbport.c1444
788 files changed, 161980 insertions, 0 deletions
diff --git a/Board/EM/ACPI/ACPI.chm b/Board/EM/ACPI/ACPI.chm
new file mode 100644
index 0000000..2031f3b
--- /dev/null
+++ b/Board/EM/ACPI/ACPI.chm
Binary files differ
diff --git a/Board/EM/ACPI/ACPI.cif b/Board/EM/ACPI/ACPI.cif
new file mode 100644
index 0000000..3a8b925
--- /dev/null
+++ b/Board/EM/ACPI/ACPI.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "ACPI"
+ category = eModule
+ LocalRoot = "BOARD\EM\ACPI\"
+ RefName = "ACPI"
+[files]
+"ACPI.chm"
+[parts]
+"ACPI_Board"
+"ACPI_CORE"
+"S3Support"
+<endComponent>
diff --git a/Board/EM/ACPI/ACPI.dxs b/Board/EM/ACPI/ACPI.dxs
new file mode 100644
index 0000000..ce86a6d
--- /dev/null
+++ b/Board/EM/ACPI/ACPI.dxs
@@ -0,0 +1,49 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: ACPI.DXS
+//
+// Description: Dependency expression file for ACPI Driver.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include <token.h>
+#if defined(AmiBoardInfo_SUPPORT) && (AmiBoardInfo_SUPPORT == 1)
+#include <Protocol\AmiBoardInfo.h>
+DEPENDENCY_START
+AMI_BOARD_INFO_PROTOCOL_GUID
+DEPENDENCY_END
+#else
+DEPENDENCY_START
+TRUE
+DEPENDENCY_END
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/ACPI/ACPI.mak b/Board/EM/ACPI/ACPI.mak
new file mode 100644
index 0000000..efed735
--- /dev/null
+++ b/Board/EM/ACPI/ACPI.mak
@@ -0,0 +1,446 @@
+#//**********************************************************************
+#//**********************************************************************
+#//** **
+#//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+#//** **
+#//** All Rights Reserved. **
+#//** **
+#//** 5555 Oakbrook Pkwy, Norcross, GA 30093 **
+#//** **
+#//** Phone: (770)-246-8600 **
+#//** **
+#//**********************************************************************
+#//**********************************************************************
+#**********************************************************************
+# $Header: /Alaska/BIN/Modules/ACPI/Template/Board/ACPI.mak 46 3/10/14 6:03p Oleksiyy $
+#
+# $Date: 3/10/14 6:03p $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/BIN/Modules/ACPI/Template/Board/ACPI.mak $
+#
+# 46 3/10/14 6:03p Oleksiyy
+# [TAG] EIP156376
+# [Category] Improvement
+# [Description] PREPARE directive is used now to guaranty that
+# AcpiOemElinks.h will be generated as sooner than it may be included in
+# any file.
+# [Files] ACPI.sdl
+# ACPI.mak
+#
+# 45 8/06/12 11:30a Oleksiyy
+# [TAG] EIP93878
+# [Category] Improvement
+# [Description] Improve T_ACPI_OEM_ID and T_ACPI_OEM_TBL_ID to acpi
+# table.
+# [Files] ACPI.mak
+#
+# 44 10/25/11 5:53p Oleksiyy
+# [TAG] EIP71540
+# [Category] Improvement
+# [Description] Fix of "any amount of spaces in table IDs replaced with
+# only one".
+# [Files] ACPI.mak and AcpiCore.c
+#
+# 43 5/14/11 2:59p Yakovlevs
+# [TAG] EIP 56526
+# [Category] New Feature
+# [Description] ACPI Manipulation Protocol. PI 1.2 Spec Vol 5 Section
+# 9.
+# [Files] AcpiCore.c; AcpiCore.h; AcpiSdtPrivate.h; Aml.c; AmlChild.c;
+# AmlNamespace.c; AmlOption.c; AmlString.c AcpiSdt.c;
+# Protocol\AcpiSdt.h.
+#
+# 42 3/18/11 4:09p Oleksiyy
+# [TAG] EIP53402
+# [Category] Improvement
+# [Description] Improving backward computability and architecture.
+# [Files] ACPI.mak, AcpiCore.cif, S3Save.cif, S3Save.mak,
+# S3Restore.mak, BootScriptExecutor.c, S3Common.cif, S3SaveState.h,
+# S3smmSaveState.h
+#
+# 41 2/03/11 4:19p Oleksiyy
+# [TAG] EIP53402
+# [Category] Improvement
+# [Description] Create new label of ACPI with separate S3 Functionality
+#
+# [Files] Acpi.cif; Acpi.sdl; Acpi.mak
+#
+# 40 12/22/10 5:09p Oleksiyy
+# [TAG] EIP49816
+# [Category] Improvement
+# [Description] Function OemAcpiSetPlatformId added as eLink
+# [Files] ACPi.mak, ACPI.sdl and OEM_ACPI.c
+#
+# 39 8/11/09 12:42p Markw
+# Link CSP library.
+#
+# 38 5/08/09 12:18p Yakovlevs
+# Made Acpi Driver use AMI Board Info Protocol if available without
+# breaking compatibility
+#
+# 37 3/26/09 4:47p Oleksiyy
+# New ACPI Core realization - improves logic, execution time and memory
+# usage of ACPI module.
+#
+# 1 2/18/09 3:50p Oleksiyy
+#
+# 35 12/01/08 6:53p Yakovlevs
+#
+# 34 11/08/07 4:54p Felixp
+# MPS_TABLE_SUPPORT updated with dependency from CSM_SUPPORT
+#
+# 33 6/10/07 10:38p Yakovlevs
+# Fixed issue for LegacyFree systems.
+# All PTS and WAK objects was excluded from DSDT.ASL if no SIO.
+# Now excluded only SIO WAKE/PTS methods.
+#
+# 32 6/05/07 3:41p Felixp
+#
+# 30 4/24/07 6:29p Felixp
+# Dependency expression for AcpiS3Save added
+#
+# 29 4/23/07 1:30p Felixp
+# Boot Script related code moved from Core to ACPI module.
+# Boot Script related code moved from Core to ACPI module.
+# PEI code added to S3 Resume PPI. DXE code added to AcpiS3Save driver.
+#
+# 28 3/21/07 7:09p Yakovlevs
+# Added support for ACPI 3.0 Header Revision.
+#
+# 27 3/19/07 12:23p Felixp
+# Dependency from token.h added
+#
+# 26 3/19/07 12:16p Felixp
+# MP Table object file added to ACPI_DXE_OBJECTS
+#
+# 25 1/23/07 3:13p Markw
+# Link CSP library to S3 Resume.
+#
+# 24 11/11/06 10:35a Felixp
+# Previous changes removed
+#
+# 22 8/01/06 4:01p Robert
+# reorganized make file
+#
+# 21 5/24/06 6:22p Ambikas
+#
+# 20 5/24/06 3:47p Ambikas
+#
+# 19 3/13/06 10:14a Felixp
+#
+# 17 1/25/06 11:49a Felixp
+# Path to ASL and IASL removed
+#
+# 16 12/12/05 11:35a Felixp
+#
+# 14 12/02/05 11:43a Felixp
+#
+# 13 12/02/05 11:42a Felixp
+#
+# 12 12/02/05 11:12a Felixp
+# include token.mak removed
+#
+# 11 12/01/05 12:20p Felixp
+# Dependency for ACPI Setup Data from $(BUILD_DIR)\ACPI.mak added
+#
+# 10 12/01/05 11:50a Markw
+#
+# 9 10/14/05 6:10p Felixp
+# Dependency Expression for AcpiS3Save removed
+#
+# 8 6/30/05 2:41p Felixp
+# acpi.sd an acpi.uni moved from ACPI-Core to ACPI-Board
+#
+# 7 6/29/05 5:45p Yakovlevs
+#
+# 6 5/25/05 1:14p Yakovlevs
+# dsdt.aml dependencies list updated
+#
+# 5 5/12/05 10:16a Markw
+# Added ACPIS3Wake.asm and AcpiPeiS3Func.c to build. Removed redunant
+# termal and fan from make file. It also exists in e-links.
+#
+# 4 5/05/05 6:40p Yakovlevs
+#
+# 3 4/29/05 3:21p Markw
+#
+# 2 4/29/05 12:19p Sivagarn
+# Created S3 related drivers
+#
+# 1 3/24/05 5:00p Sivagarn
+# Initial Checkin
+#
+#
+#**********************************************************************
+
+#<AMI_FHDR_START>
+#-----------------------------------------------------------------------
+# Name: Acpi.mak
+#
+# Description: Make file for the Acpi component
+#
+#-----------------------------------------------------------------------
+#<AMI_FHDR_END>
+
+#-----------------------------------------------------------------------
+# General definitions and rules
+#-----------------------------------------------------------------------
+all : BuildACPI
+!IF "$(AmiBoardInfo_SUPPORT)" != "1"
+all : BuildASL
+DSDT_GUID = 11D8AC35-FB8A-44d1-8D09-0B5606D321B9 # This one is for V 2.0+
+!ENDIF
+PREPARE : $(BUILD_DIR)\AcpiOemElinks.h
+$(BUILD_DIR)\AcpiOemElinks.h : $(BUILD_DIR)\token.h
+ $(ECHO) #define OEM_LIST $(OemUpdateHeader) > $(BUILD_DIR)\AcpiOemElinks.h
+!IF "$(T_ACPI_OEM_ID:|=a)"!="$(T_ACPI_OEM_ID)"
+ $(ECHO) #define ACPI_OEM_ID_MAK $(T_ACPI_OEM_ID:|=") >> $(BUILD_DIR)\AcpiOemElinks.h
+!ELSE
+ $(ECHO) #define ACPI_OEM_ID_MAK "$(T_ACPI_OEM_ID)" >> $(BUILD_DIR)\AcpiOemElinks.h
+!ENDIF
+!IF "$(T_ACPI_OEM_TBL_ID:|=a)"!="$(T_ACPI_OEM_TBL_ID)"
+ $(ECHO) #define ACPI_OEM_TBL_ID_MAK $(T_ACPI_OEM_TBL_ID:|=") >> $(BUILD_DIR)\AcpiOemElinks.h
+!ELSE
+ $(ECHO) #define ACPI_OEM_TBL_ID_MAK "$(T_ACPI_OEM_TBL_ID)" >> $(BUILD_DIR)\AcpiOemElinks.h
+!ENDIF
+
+$(BUILD_DIR)\AMICSPLIBInc.h : $(ACPI_CORE_DIR)\AcpiS3.h
+
+ACPI_CORE_DIR = $(PROJECT_DIR)\Core\Em\ACPI
+ASL_CORE_DIR = $(ACPI_CORE_DIR)
+ACPI_BOARD_DIR = $(PROJECT_DIR)\Board\Em\ACPI
+ASL_BOARD_DIR = $(ACPI_BOARD_DIR)
+ACPI_TOOLS_DIR = $(PROJECT_DIR)\TOOLS
+
+ACPI_BUILD_DIR = $(BUILD_DIR)
+BUILD_ACPI_CORE_DIR = $(BUILD_DIR)\Core\Em\ACPI
+BUILD_ACPI_BOARD_DIR = $(BUILD_DIR)\Board\Em\ACPI
+
+
+
+
+#-----------------------------------------------------------------------
+# Rules for building ACPI DXE driver
+#-----------------------------------------------------------------------
+BuildACPI : $(BUILD_DIR)\ACPI.mak ACPIBin
+
+ACPI_DXE_OBJECTS = $(BUILD_ACPI_CORE_DIR)\Acpicore.obj \
+$(BUILD_ACPI_BOARD_DIR)\OEM_ACPI.obj \
+!IFDEF PI_SPECIFICATION_VERSION
+!IF $(PI_SPECIFICATION_VERSION)>=0x10014
+$(BUILD_ACPI_CORE_DIR)\AcpiSdt.obj \
+$(BUILD_ACPI_CORE_DIR)\Aml.obj \
+$(BUILD_ACPI_CORE_DIR)\AmlChild.obj \
+$(BUILD_ACPI_CORE_DIR)\AmlNamespace.obj \
+$(BUILD_ACPI_CORE_DIR)\AmlOption.obj \
+$(BUILD_ACPI_CORE_DIR)\AmlString.obj \
+!ENDIF
+!ENDIF
+!IF "$(MPS_TABLE_SUPPORT)"=="1"
+$(BUILD_ACPI_CORE_DIR)\MPTable.obj \
+!IF "$(AmiBoardInfo_SUPPORT)" != "1"
+$(BUILD_ACPI_CORE_DIR)\MpPciIrq.obj
+!ENDIF
+!ENDIF
+
+$(BUILD_DIR)\ACPI.mak : $(ACPI_CORE_DIR)\acpicore.cif $(ACPI_BOARD_DIR)\acpiBsp.cif $(ACPI_BOARD_DIR)\acpi.mak $(BUILD_RULES)
+ $(CIF2MAK) $(ACPI_CORE_DIR)\acpicore.cif $(ACPI_BOARD_DIR)\acpiBsp.cif $(CIF2MAK_DEFAULTS)
+
+ACPIBin : $(AMIDXELIB) $(AMICSPLib)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\ACPI.mak all\
+ MAKEFILE=$(BUILD_DIR)\ACPI.MAK \
+ NAME=ACPI\
+ OBJECTS="$(ACPI_DXE_OBJECTS)" \
+ GUID=16D0A23E-C09C-407d-A14A-AD058FDD0CA1 \
+ ENTRY_POINT=AcpiNewCoreEntry \
+ "EXT_HEADERS=$(BUILD_DIR)\token.h\
+ $(BUILD_DIR)\AcpiOemElinks.h" \
+ TYPE=BS_DRIVER \
+ "MY_INCLUDES=/I$(ACPI_BOARD_DIR)" \
+ DEPEX1=$(ACPI_BOARD_DIR)\ACPI.DXS\
+ COMPRESS=1
+
+#-----------------------------------------------------------------------
+!IF "$(AmiBoardInfo_SUPPORT)"!="1"
+#-----------------------------------------------------------------------
+# MAK file for the ModulePart:ASL_CORE
+
+BuildASL : $(BUILD_DIR)\asl.ffs
+
+$(BUILD_DIR)\asl.ffs: $(PROJECT_DIR)\dsdt.aml
+ $(MAKE) /f Core\FFS.mak \
+ BUILD_DIR=$(BUILD_DIR) \
+ GUID=$(DSDT_GUID) \
+ TYPE=EFI_FV_FILETYPE_FREEFORM \
+ BINFILE=$** FFSFILE=$@ COMPRESS=1 NAME=$(**B)
+
+#----------------------------------------------------------------------------
+# In order to build AML tables (DSDT.AML & SSDT.AML)
+# ASL compiler have to be ran with DSDT.ASL and SSDT.ASL files corespondingly.
+#-----------------------------------------------------------------------
+# GENERATE ASL -> ASM Code
+#-----------------------------------------------------------------------
+
+!if "$(ACPI_ASL_COMPILER)" == "ASL.exe"
+$(PROJECT_DIR)\dsdt.aml: $(PROJECT_DIR)\DSDT.ASL $(IO_ASLS) $(PCI_ASLS) $(BUILD_DIR)\token.mak
+ $(ACPI_ASL_COMPILER) /Fo=$@ $(PROJECT_DIR)\DSDT.ASL
+!elseif "$(ACPI_ASL_COMPILER)" == "IASL.exe"
+$(PROJECT_DIR)\dsdt.aml: $(PROJECT_DIR)\DSDT.ASL $(IO_ASLS) $(PCI_ASLS) $(BUILD_DIR)\token.mak
+#dsdt.asl must be in the project directory; otherwise, will not be able to include various include files, esp. pcitree.asl
+ $(ACPI_ASL_COMPILER) -p dsdt $(PROJECT_DIR)\DSDT.ASL
+!endif
+
+!if "$(ACPI_SSDT_TBL)" == "1"
+$(ACPI_BUILD_DIR)\ssdt.aml: $(ASL_BOARD_DIR)\ssdt.asl
+!if "$(ACPI_ASL_COMPILER)" == "ASL.exe"
+ @$(ACPI_ASL_COMPILER) /Fa=$@ $**
+!elseif "$(ACPI_ASL_COMPILER)" == "IASL.exe"
+ @$(ACPI_ASL_COMPILER) -o $(BUILD_DIR)\ssdt.aml $**
+!endif
+!endif
+
+#-----------------------------------------------------------------------#
+# Description of ASL files that take part in building ACPI DSDT table
+# amlUpd.asl - OperationRegion and Field names to refer to BIOS exchange memory area
+# token.asl - SDL tokens stored in ASL name format
+# aslLib.asl - standard ASL routines (GPRW - generic PRW routine. MCTH - string compare routine)
+# PCItree.asl - file is generated by AMISDL. Defines PCI Devices tree, PCI IRQ routing information
+# oemDSDT.asl - defines Root PCI bridge resources (_CRS), _PTS(prepare to sleep),_WAK(after wake up) routines
+# irqLink.asl - Irq routing devices LINKx
+# ioRoute.asl - Chipset specific routines to route/release IO/DMA resources on ISA/LPC bus. Used only if Positive decoding is selected
+# FAN.asl - OEM Fan device(s) objects
+# TZ.asl - OEM Thermal Zone(s) objects
+# SI.asl - OEM System Indication objects
+#-----------------------------------------------------------------------
+DSDT_ASLS = \
+$(BUILD_DIR)\token.asl\
+Core\Em\ACPI\asllib.asl\
+Core\Em\ACPI\amlupd.asl\
+$(GENERIC_ASL_BEFORE_PCITREE)\
+$(BUILD_DIR)\PCItree.asl\
+$(SB_CHIPSET_DIR)\IRQLink.asl\
+#$(ASL_CORE_DIR)\irqLink.asl\
+#!IF "$(A_CPU)" == "1"
+#$(ASL_CORE_DIR)\cpu.asl\
+#!endif
+#!if "$(A_FAN)"=="1" || "$(A_THERMAL)"== "1"
+#$(ASL_CORE_DIR)\FAN.asl\
+#!endif
+#!if "$(A_THERMAL)" == "1"
+#$(ASL_CORE_DIR)\TZ.asl\
+#!endif
+#!if "$(A_SI)"=="1"
+#$(ASL_CORE_DIR)\SI.asl\
+#!endif
+$(GENERIC_ASL)
+
+ASL_SRC = $(**:\=\\)
+
+#-----------------------------------------------------------------------#
+# DSDT.ASL GENERATOR #
+#-----------------------------------------------------------------------#
+# Include any Make flag dependent ASL code in this module,
+# otherwise use OEM ASL files within ACPI_BSP_DIR for OEM modifications
+#
+# Note. 1. Do not change an order ASL files appear in above defined DSDT_ASLS list
+# 2. Any module can include own ASL files to the target DSDT.ASL
+# by adding the files to the dependency list as follows:
+# $(PROJECT_DIR)\DSDT.ASL: $(PATH)\module.asl
+#-----------------------------------------------------------------------#
+$(PROJECT_DIR)\DSDT.ASL: $(DSDT_ASLS)
+ copy << $@
+
+//==========================================================================
+// DO NOT EDIT THIS FILE
+// This file was generated automatically using NMAKE build process(ACPI.MAK)
+// If OEM changes needed, edit ASL file(s) with extension "*.asl"
+//==========================================================================
+DefinitionBlock (
+ "ami.aml",
+ "DSDT",
+!IF "$(ACPI_BUILD_TABLES_3_0)"=="1"
+ 0x02, // DSDT revision.
+!ELSE
+ 0x01, // DSDT revision.
+!ENDIF
+ // A Revision field value greater than or equal to 2 signifies that integers
+ // declared within the Definition Block are to be evaluated as 64-bit values
+ "$(T_ACPI_OEM_ID)", // OEM ID (6 byte string)
+ "$(T_ACPI_OEM_TBL_ID)", // OEM table ID (8 byte string)
+ 0x0$(PROJECT_BUILD) // OEM version of DSDT table (4 byte Integer)
+ )
+
+// BEGIN OF ASL SCOPE
+{
+// Miscellaneous services enabled in Project
+ include ("$(ASL_SRC: ="^)
+ include (")")
+// Sleep states supported by Chipset/Board.
+//----------------------------------------------------------------------
+// SSx - BIOS setup controlled enabled _Sx Sleep state status
+// Values to be written to SLP_TYPE register are provided by SBACPI.SDL (South Bridge ACPI ModulePart)
+ Name(\_S0, Package(4){$(A_S0_PKG)}) // mandatory System state
+!if "$(A_S1)"=="1"
+ if(SS1) { Name(\_S1, Package(4){$(A_S1_PKG)})}
+!endif
+!if "$(A_S2)"=="1"
+ if(SS2) { Name(\_S2, Package(4){$(A_S2_PKG)})}
+!endif
+!if "$(A_S3)"=="1"
+ if(SS3) { Name(\_S3, Package(4){$(A_S3_PKG)})}
+!endif
+!if "$(A_S4)"=="1"
+ if(SS4) { Name(\_S4, Package(4){$(A_S4_PKG)})}
+!endif
+ Name(\_S5, Package(4){$(A_S5_PKG)}) // mandatory System state
+
+ Method(PTS, 1) { // METHOD CALLED FROM _PTS (oemDSDT.asl) PRIOR TO ENTER ANY SLEEP STATE
+ If(Arg0) // entering any sleep state
+ {
+ $(ASL_PTS)
+!if "$(A_SIOW)"=="01" #IO_ASLS
+ \_SB.PCI0.SBRG.SIOS(Arg0)
+!endif
+ }
+ }
+ Method(WAK, 1) { // METHOD CALLED FROM _WAK (oemDSDT.asl) RIGHT AFTER WAKE UP
+ $(ASL_WAK)
+!if "$(A_SIOW)"=="01" #IO_ASLS
+ \_SB.PCI0.SBRG.SIOW(Arg0)
+!endif
+ }
+} // End of ASL File
+
+<<
+!ENDIF
+
+#---------------------------------------------------------------------------
+# Create NB Setup Screens
+#---------------------------------------------------------------------------
+SetupSdbs : $(BUILD_DIR)\ACPI.mak ACPISDB
+
+ACPISDB :
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\ACPI.mak all\
+ TYPE=SDB NAME=ACPI STRING_CONSUMERS=$(ACPI_BOARD_DIR)\ACPI.sd
+#---------------------------------------------------------------------------
+
+
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2009, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/ACPI/ACPI.sd b/Board/EM/ACPI/ACPI.sd
new file mode 100644
index 0000000..e4773c0
--- /dev/null
+++ b/Board/EM/ACPI/ACPI.sd
@@ -0,0 +1,263 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/BIN/Modules/ACPI/Template/Board/ACPI.sd 21 1/26/12 5:19p Oleksiyy $
+//
+// $Revision: 21 $
+//
+// $Date: 1/26/12 5:19p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Modules/ACPI/Template/Board/ACPI.sd $
+//
+// 21 1/26/12 5:19p Oleksiyy
+// [TAG] EIP81670
+// [Category] New Feature
+// [Description] ACPI, ACPI settings goto define
+// [Files] ACPI.sd
+//
+// 20 9/30/11 4:22p Oleksiyy
+// [TAG] EIP71374
+// [Category] Improvement
+// [Description] ACPI sleep state setup option update.
+// [Files] ACPI.sd, ACPI.uni and AcpiCore.c
+//
+// 19 12/06/10 4:18p Oleksiyy
+// [TAG] EIP48172
+// [Category] Improvement
+// [Description] CONTROLS_WITH_DEFAULTS section added.
+// [Files] ACPI.sd
+//
+// 18 11/24/10 4:20p Oleksiyy
+// [TAG] EIP48172
+// [Category] Improvement
+// [Description] File updated to meet Setup Customization requirements.
+// [Files] ACPI.sd
+//
+// 17 10/12/10 5:51p Oleksiyy
+// EIP 38110. Setup Page title added.
+//
+// 16 4/28/10 2:35p Oleksiyy
+// EIP 35563 "Force to ACPI ver. 1.1" ACPI setup menu (default is OFF)
+// added. If Enabled - only Tables for ver. 1.1 will be builded (FACP,
+// FACS, RSDT (no XSDT), and MADT) al other tables added by
+// means of ACPI protocols not modified.
+//
+// 15 2/19/10 12:22p Oleksiyy
+// EIP 35099: Setup question to lock legacy resources from OS added.
+// Default value controlled by DEFAULT_ACPI_LOCK_LEGACY_DEV
+// SDL token and "OFF".
+//
+// 14 11/03/09 5:29p Oleksiyy
+// EIP 30137: Support for UEFI 2.1 added
+//
+// 13 3/26/09 4:47p Oleksiyy
+// New ACPI Core realization - improves logic, execution time and memory
+// usage of ACPI module.
+//
+// 1 2/18/09 3:50p Oleksiyy
+//
+// 12 8/14/08 10:07a Fasihm
+// Added the MANUFACTURING flag to the setup questions.
+//
+// 11 4/29/08 5:34p Yakovlevs
+//
+// 10 3/12/07 6:07p Yakovlevs
+//
+// 9 2/07/07 2:52p Markw
+// Add video repost setup question.
+//
+// 8 1/23/07 11:27a Markw
+// Added video repost setup question.
+//
+// 7 11/21/05 7:22p Felixp
+// Disable editing in in user mode
+//
+// 6 11/06/05 5:04p Yakovlevs
+//
+// 5 10/05/05 5:38p Felixp
+// oneof requires 2 bytes in NVRAM
+//
+// 4 9/09/05 6:36p Girim
+// Code Cleanup and added comments.
+//
+// 3 7/12/05 2:15p Girim
+//
+// 2 6/30/05 6:10p Yakovlevs
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: ACPI.sd
+//
+// Description: ACPI Form Template
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifdef SETUP_DATA_DEFINITION
+/***********************************************************/
+/* Put NVRAM data definitions here.
+/* For example: UINT8 Data1;
+/* These definitions will be converted by the build process
+/* to a definitions of SETUP_DATA fields.
+/***********************************************************/
+ UINT8 AcpiAuto;
+ UINT16 AcpiSleepState;
+ UINT8 AcpiLockLegacyRes;
+ UINT8 AcpiHibernate;
+ UINT8 S3ResumeVideoRepost;
+ UINT8 ForceToAcpi1;
+#endif
+
+#if defined(VFRCOMPILE) && !defined(CONTROLS_ARE_DEFINED)
+#define CONTROL_DEFINITION
+#endif
+
+#ifdef CONTROL_DEFINITION
+
+ #define ACPI_CHECKBOX_ACPIAUTO\
+ checkbox varid = SETUP_DATA.AcpiAuto,\
+ prompt = STRING_TOKEN(STR_ACPI_AUTO_PROMPT),\
+ help = STRING_TOKEN(STR_ACPI_AUTO_HELP),\
+ flags = DEFAULT_AUTO_ACPI | MANUFACTURING,\
+ key = 0,\
+ endcheckbox;
+ #define ACPI_CHECKBOX_ACPIHIBERNATE\
+ checkbox varid = SETUP_DATA.AcpiHibernate,\
+ prompt = STRING_TOKEN(STR_ACPI_S4_PROMPT),\
+ help = STRING_TOKEN(STR_ACPI_S4_HELP),\
+ flags = DEFAULT_SS4 | MANUFACTURING | RESET_REQUIRED,\
+ key = 0,\
+ endcheckbox;
+ #define ACPI_ONEOF_ACPISLEEPSTATE\
+ oneof varid = SETUP_DATA.AcpiSleepState,\
+ prompt = STRING_TOKEN(STR_ACPI_SLEEP_PROMPT),\
+ help = STRING_TOKEN(STR_ACPI_SLEEP_HELP),\
+ option text = STRING_TOKEN(STR_ACPI_SLEEP_NO), value = 0, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_ACPI_SLEEP_S1), value = 1, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_ACPI_SLEEP_S3), value = 2, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_ACPI_SLEEP_AUTO), value = 3, flags = RESET_REQUIRED | MANUFACTURING | DEFAULT;\
+ endoneof;
+ #define ACPI_CHECKBOX_ACPILOCKLEGACYRES\
+ checkbox varid = SETUP_DATA.AcpiLockLegacyRes,\
+ prompt = STRING_TOKEN(STR_ACPI_LOCK_LEGACY_DEV_PROMPT),\
+ help = STRING_TOKEN(STR_ACPI_LOCK_LEGACY_DEV_HELP),\
+ flags = DEFAULT_ACPI_LOCK_LEGACY_DEV | MANUFACTURING | RESET_REQUIRED,\
+ key = 0,\
+ endcheckbox;
+ #if S3_VIDEO_REPOST_SUPPORT == 1
+ #define ACPI_ONEOF_S3RESUMEVIDEOREPOST\
+ oneof varid = SETUP_DATA.S3ResumeVideoRepost,\
+ prompt = STRING_TOKEN(STR_S3_VIDEO_REPOST_PROMPT),\
+ help = STRING_TOKEN(STR_S3_VIDEO_REPOST_HELP),\
+ option text = STRING_TOKEN(STR_ACPI_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_ACPI_ENABLED), value = 1, flags = RESET_REQUIRED;\
+ endoneof;
+ #else
+ #define ACPI_ONEOF_S3RESUMEVIDEOREPOST
+ #endif
+ #if FORCE_TO_ACPI1_SETUP_ENABLE == 1
+ #define ACPI_ONEOF_FORCETOACPI1\
+ oneof varid = SETUP_DATA.ForceToAcpi1,\
+ prompt = STRING_TOKEN(STR_FORCE_TO_ACPI1_PROMPT),\
+ help = STRING_TOKEN(STR_FORCE_TO_ACPI1_HELP),\
+ option text = STRING_TOKEN(STR_ACPI_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_ACPI_ENABLED), value = 1, flags = RESET_REQUIRED;\
+ endoneof;
+ #else
+ #define ACPI_ONEOF_FORCETOACPI1
+ #endif
+ // Define goto commands for the forms defined in this file
+ #define ACPI_GOTO_ACPISETTINGS\
+ goto ACPI_FORM_ID, \
+ prompt = STRING_TOKEN(STR_ACPI_FORM),\
+ help = STRING_TOKEN(STR_ACPI_FORM_HELP);
+
+#endif //#ifdef CONTROL_DEFINITION
+
+#ifdef CONTROLS_WITH_DEFAULTS
+
+ ACPI_CHECKBOX_ACPIAUTO
+ ACPI_CHECKBOX_ACPIHIBERNATE
+ ACPI_ONEOF_ACPISLEEPSTATE
+ ACPI_CHECKBOX_ACPILOCKLEGACYRES
+ ACPI_ONEOF_S3RESUMEVIDEOREPOST
+ ACPI_ONEOF_FORCETOACPI1
+
+#endif //#ifdef CONTROLS_WITH_DEFAULTS
+
+#ifdef ADVANCED_FORM_SET
+ #ifndef SUPPRESS_GRAYOUT_ENDIF //old Core
+ #define SUPPRESS_GRAYOUT_ENDIF endif;
+ #endif
+ #ifdef FORM_SET_ITEM
+ // Define controls to be added to the main page of the formset
+ #endif
+
+ #ifdef FORM_SET_GOTO
+ // Define goto commands for the forms defined in this file
+ ACPI_GOTO_ACPISETTINGS
+ #endif
+
+ #ifdef FORM_SET_FORM
+ // Define forms
+ #ifndef ACPI_FORM_MAIN
+ #define ACPI_FORM_MAIN
+
+ form formid = AUTO_ID(ACPI_FORM_ID),
+ title = STRING_TOKEN(STR_ACPI_FORM);
+ SUBTITLE(STRING_TOKEN(STR_ACPI_FORM))
+ SEPARATOR
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ ACPI_CHECKBOX_ACPIAUTO
+ endif;
+
+ SEPARATOR
+ suppressif ideqval SETUP_DATA.AcpiAuto == 0x1;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+
+ ACPI_CHECKBOX_ACPIHIBERNATE
+
+ ACPI_ONEOF_ACPISLEEPSTATE
+
+ ACPI_CHECKBOX_ACPILOCKLEGACYRES
+
+ ACPI_ONEOF_S3RESUMEVIDEOREPOST
+
+ ACPI_ONEOF_FORCETOACPI1
+
+ SUPPRESS_GRAYOUT_ENDIF
+ endform; // ACPI_FORM_ID
+ #endif // ACPI_FORM_MAIN
+ #endif // FORM_SET_FORM
+
+#endif // ADVANCED_FORM_SET
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/ACPI/ACPI.sdl b/Board/EM/ACPI/ACPI.sdl
new file mode 100644
index 0000000..c4c8b3d
--- /dev/null
+++ b/Board/EM/ACPI/ACPI.sdl
@@ -0,0 +1,1872 @@
+IODEVICE
+ Name = "System Misc Resources "
+ ASLfile = "core\em\acpi\RMISC.asl"
+ ASLdeviceName = "RSYS"
+ Help = "Resources which does not fit any other description"
+End
+
+IODEVICE
+ Name = "Math Coprocessor"
+ ASLfile = "core\em\acpi\MATHCO.asl"
+ ASLdeviceName = "MATH"
+End
+
+TOKEN
+ Name = "ACPI_MODULE_VER"
+ Value = "44"
+ Help = "ACPI Module Version Number.\ DO NOT CHANGE THIS VALUE"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "ACPI_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable ACPI support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "ATAD_SUPPORT"
+ Value = "0"
+ Help = "Main switch to enable ACPI Time And Alarm device support in Project. It is 0 by default, because having this device on some platforms can lead to unpredictable result. Porting may require."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ACPI_TIME_AND_ALARM_SW_SMI"
+ Value = "0x50"
+ Help = "Smi number used by ACPI Time And Alarm device."
+ TokenType = Integer
+ TargetH = Yes
+ Token = "ATAD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "ATAA"
+ Value = "$(ACPI_TIME_AND_ALARM_SW_SMI)"
+ Help = "Smi number used by ACPI Time And Alarm device which goes to ASL Name Definitions"
+ TokenType = Integer
+ TargetASL = Yes
+ Token = "ATAD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "T_ACPI_OEM_ID"
+ Value = "ALASKA"
+ Help = "ACPI OEM Id -\a string value to be filled into ACPI table headers.\ If you want use spaces as leading or and trailing symbols \you must surround the whole expression in '|'. \For example | ABC |. This will result in the generation of a \ #define ACPI_OEM_ID_MAK ' ABC ' in the file Build\AcpiOemElinks.h \(created by Acpi.mak file). All tables generated by the \Acpi eModule will have the IDs with the values from \the generated file. To see how this works, refer to \the AcpiCore.c file and search for the string ACPI_OEM_ID_MAK. \Some modules which submit their own ACPI tables may \use the old method: CONVERT_TO_STRING(T_ACPI_OEM_ID). \If they are using this method, either '|' will be included \in their table's ID fields, or a build error will \occur because the two additional '|' characters \will make the string larger than the TableId size \of 6 characters. Contact the owners of the offending modules and /ask them to use ACPI_OEM_ID_MAK as it is used in AcpiCore.c."
+ TokenType = Expression
+ TargetMAK = Yes
+ TargetH = Yes
+ Range = "1-6 characters"
+End
+
+TOKEN
+ Name = "T_ACPI_OEM_TBL_ID"
+ Value = "A M I"
+ Help = "ACPI OEM TBL Id -\a string value to be filled into ACPI table headers.\ If you want use spaces as leading or and trailing symbols \you must surround the whole expression in '|'. \For example | ABC |. This will result in the generation of a \ #define ACPI_OEM_TBL_ID_MAK ' ABC ' in the file Build\AcpiOemElinks.h \(created by Acpi.mak file). All tables generated by the \Acpi eModule will have the IDs with the values from \the generated file. To see how this works, refer to \the AcpiCore.c file and search for the string ACPI_OEM_ID_MAK. \Some modules which submit their own ACPI tables may \use the old method: CONVERT_TO_STRING(T_ACPI_OEM_ID). \If they are using this method, either '|' will be included \in their table's ID fields, or a build error will \occur because the two additional '|' characters \will make the string larger than the TableId size \of 8 characters. Contact the owners of the offending modules and /ask them to use ACPI_OEM_TBL_ID_MAK as it is used in AcpiCore.c."
+ TokenType = Expression
+ TargetMAK = Yes
+ TargetH = Yes
+ Range = "1-8 characters"
+End
+
+TOKEN
+ Name = "ACPI_OEM_REV"
+ Value = "0x01072009"
+ Help = "Just use BCD of the current date"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "8 byte length"
+End
+
+TOKEN
+ Name = "S3_BASE_MEMORY_SIZE"
+ Value = "0x40000"
+ Help = "Number of bytes for S3 resume base memory."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0x40000 = 256K, increase/decrease it in units of 0x1000 = 4K"
+End
+
+TOKEN
+ Name = "S3_MEMORY_SIZE_PER_CPU"
+ Value = "4096"
+ Help = "Number of S3 bytes reserved per CPU"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "====== ACPI Tables Creation Flags ========"
+ Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!"
+ Help = "Specfy which tables will be created by the ACPI Driver."
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "ACPI_BUILD_TABLES_1_1"
+ Value = "0"
+ Help = "Main switch to enable ACPI 1.1 tables to be build in Project"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ACPI_BUILD_TABLES_2_0"
+ Value = "1"
+ Help = "Main switch to enable ACPI 2.0 tables to be build in Project"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ACPI_BUILD_TABLES_3_0"
+ Value = "1"
+ Help = "Main switch to enable ACPI 3.0 tables to be build in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ACPI_BUILD_TABLES_4_0"
+ Value = "1"
+ Help = "Main switch to enable ACPI 4.0 tables to be build in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ACPI_BUILD_TABLES_5_0"
+ Value = "1"
+ Help = "Main switch to enable ACPI 5.0 tables to be build in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FORCE_TO_ACPI1_SETUP_ENABLE"
+ Value = "0"
+ Help = "Main switch to enable Force to ACPI 1.0 Setup question in Project"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ACPI_APIC_TBL"
+ Value = "1"
+ Help = "Main switch to enable MADT table build in Project"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "====== Sleep States Supported =========="
+ Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!"
+ Help = "Sleep States Supported By the Platform."
+ TokenType = Expression
+ Range = "4 decimal or Hex (use '0x' prefix) values separated with ','"
+End
+
+TOKEN
+ Name = "A_S1"
+ Value = "1"
+ Help = "S1 Sleep state enabled in BIOS"
+ TokenType = Boolean
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "A_S2"
+ Value = "0"
+ Help = "S2 supported"
+ TokenType = Boolean
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "A_S3"
+ Value = "1"
+ Help = "S3 supported"
+ TokenType = Boolean
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "A_S4"
+ Value = "1"
+ Help = "S4 supported"
+ TokenType = Boolean
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "====== OEM Platform Features ==========="
+ Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!"
+ Help = "Specfy some additional platform faetures supported by ACPI Name Space."
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "A_SI"
+ Value = "0"
+ Help = "Set to 1 if System has a software controllable System state LED;\System indication(LED), Implementation in SI.asl"
+ TokenType = Boolean
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "A_THERMAL"
+ Value = "0"
+ Help = "ASL Thermal management module ( implemented in TZ.ASL )\FAN module is required; SMBus interface is optional is thermal sensor accessd over SMBus."
+ TokenType = Boolean
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "A_FAN"
+ Value = "0"
+ Help = "FAN cooling device ( implementation in FAN.ASL )\Enable feature if Thermal support is selected (A_THERMAL = 1)"
+ TokenType = Boolean
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "====== No-Maskable Int Sorses ==========="
+ Value = "Specifies which I/O (S)APIC int inputs should be enabled as non-maskable."
+ Help = "Specifies which I/O (S)APIC int inputs should be enabled as non-maskable."
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "NMIs_QUANTITY"
+ Value = "0"
+ Help = "Indicates the number non-maskable I/O (S)APIC \inputs, that platform has (non, if 0). "
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "===Values for NMIs structure in MADT======="
+ Value = "If NMIs_QUANTITY more than 1 look Help"
+ Help = "If NMIs_QUANTITY more than 1 add 3 more entries (NMI_GLOBAL_SYS_INT_i, NMI_i_POLARITY and NMI_i_TRIGGER_MODE for each additional NMI"
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "NMI_GLOBAL_SYS_INT_0"
+ Value = "0"
+ Help = "The Global System Interrupt that this NMI \will signal."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "depends on system architecture"
+ Token = "NMIs_QUANTITY" ">" "0"
+End
+
+TOKEN
+ Name = "NMI_0_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "NMIs_QUANTITY" ">" "0"
+End
+
+TOKEN
+ Name = "NMI_0_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "NMIs_QUANTITY" ">" "0"
+End
+
+TOKEN
+ Name = "====== LOCAL INTERRUPT ASSIGNMENT info ==========="
+ Value = "Specifies what int sourse is connected to each local int input of each local APIC."
+ Help = "Specifies what int sourse is connected to each local int input of each local APIC. Valid only for Multy Processor platforms"
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "LOCAL_APIC_VERSION_PARAMETER"
+ Value = "0x21"
+ Help = "LAPIC/LSAPIC revision BOUNDARY. For Intel it is should be 0x21. Clone and reasign if different"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "LAPIC_QUANTITY"
+ Value = "2"
+ Help = "Indicates the number of LAPIC int lines. If more than 2 lines - add aditional set of parameters for each additional line"
+ TokenType = Integer
+ TargetH = Yes
+ Token = "NCPU" ">" "1"
+End
+
+TOKEN
+ Name = "====Parameters for each line======="
+ Value = "Dont Change names"
+ Help = "If more than 2 lines - add aditional set of parameters for each additional line"
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "LAPIC_0_INT_TYPE"
+ Value = "3"
+ Help = "Interrupt type: 0-INT; 1-NMI; 2-SMI; 3-ExtINT"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1, 2, 3"
+ Token = "LAPIC_QUANTITY" ">" "0"
+End
+
+TOKEN
+ Name = "LAPIC_0_POLARITY"
+ Value = "1"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "LAPIC_QUANTITY" ">" "0"
+End
+
+TOKEN
+ Name = "LAPIC_0_TRIGGER_MODE"
+ Value = "1"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "LAPIC_QUANTITY" ">" "0"
+End
+
+TOKEN
+ Name = "LAPIC_0_SOURCE_BUS_ID"
+ Value = "0"
+ Help = "Identifies the bus from which the interrupt signal comes."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "depends on system architecture"
+ Token = "LAPIC_QUANTITY" ">" "0"
+End
+
+TOKEN
+ Name = "LAPIC_0_SOURCE_BUS_IRQ"
+ Value = "0"
+ Help = "Identifies the interrupt signal from the source bus. Values are mapped onto source bus signals, starting from Zero."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "depends on system architecture"
+ Token = "LAPIC_QUANTITY" ">" "0"
+End
+
+TOKEN
+ Name = "LAPIC_0_DEST_ID"
+ Value = "0xFF"
+ Help = "Identifies the LAPIC to which the signal is connected. If 0xFFh - the signal is connected to all local APICs."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "depends on system architecture"
+ Token = "LAPIC_QUANTITY" ">" "0"
+End
+
+TOKEN
+ Name = "LAPIC_0_DEST_LINTIN"
+ Value = "0"
+ Help = "Identifies the LINTINn pin to which the signal is connected."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "depends on system architecture (Usualy 0 or 1)"
+ Token = "LAPIC_QUANTITY" ">" "0"
+End
+
+TOKEN
+ Name = "LAPIC_1_INT_TYPE"
+ Value = "1"
+ Help = "Interrupt type: 0-INT; 1-NMI; 2-SMI; 3-ExtINT"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1, 2, 3"
+ Token = "LAPIC_QUANTITY" ">" "1"
+End
+
+TOKEN
+ Name = "LAPIC_1_POLARITY"
+ Value = "1"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "LAPIC_QUANTITY" ">" "1"
+End
+
+TOKEN
+ Name = "LAPIC_1_TRIGGER_MODE"
+ Value = "1"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "LAPIC_QUANTITY" ">" "1"
+End
+
+TOKEN
+ Name = "LAPIC_1_SOURCE_BUS_ID"
+ Value = "0"
+ Help = "Identifies the bus fron which the interrupt signal comes."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "depends on system architecture"
+ Token = "LAPIC_QUANTITY" ">" "1"
+End
+
+TOKEN
+ Name = "LAPIC_1_SOURCE_BUS_IRQ"
+ Value = "0"
+ Help = "Identifies the interrupt signal from the source bus. Values are mapped onto source bus signals, starting from Zero."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "depends on system architecture"
+ Token = "LAPIC_QUANTITY" ">" "1"
+End
+
+TOKEN
+ Name = "LAPIC_1_DEST_ID"
+ Value = "0xFF"
+ Help = "Identifies the LAPIC to which the signal is connected. If 0FFh - the signal is connected to all local APICs."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "depends on system architecture"
+ Token = "LAPIC_QUANTITY" ">" "1"
+End
+
+TOKEN
+ Name = "LAPIC_1_DEST_LINTIN"
+ Value = "1"
+ Help = "Identifies the LINTINn pin to which the signal is connected."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "depends on system architecture (Usualy 0 or 1)"
+ Token = "LAPIC_QUANTITY" ">" "1"
+End
+
+TOKEN
+ Name = "==== Interrupt Source Override info ===="
+ Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!"
+ Help = "Interrupt Source Override information feeded to MADT table."
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "IO_APIC_VERSION_PARAMETER"
+ Value = "0x21"
+ Help = "IOAPIC/IOSAPIC revision BOUNDARY. For Intel it is should be 0x21. Clone and reasign if different"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "IRQ_00_OVERRIDE_ENABLE"
+ Value = "1"
+ Help = "Enables or disables PIC IRQ 00 Override entry in MADT\For most of the systems default value is ON and only entry required.\For Standard PC Systems IO APIC INT_00 is used to deliver 8259 PIC 'INTR' signal\and PIC IRQ 02 used as CASCAD INTERRUPT for Second 8259 PIC."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_00_APIC_INT"
+ Value = "2"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 00"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_00_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_00_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_00_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_00_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_00_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_01_OVERRIDE_ENABLE"
+ Value = "0"
+ Help = "Enables or disables PIC IRQ 01 Override entry in MADT\For most of the systems default value is OFF.\IRQ 01 is mapped to INT_IN 01."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_01_APIC_INT"
+ Value = "1"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 01"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_01_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_01_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_01_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_01_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_01_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_03_OVERRIDE_ENABLE"
+ Value = "0"
+ Help = "Enables or disables PIC IRQ 03 Override entry in MADT\For most of the systems default value is OFF.\IRQ 03 is mapped to INT_IN 03."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_03_APIC_INT"
+ Value = "3"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 03"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_03_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_03_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_03_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_03_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_03_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_04_OVERRIDE_ENABLE"
+ Value = "0"
+ Help = "Enables or disables PIC IRQ 04 Override entry in MADT\For most of the systems default value is OFF.\IRQ 04 is mapped to INT_IN 04."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_04_APIC_INT"
+ Value = "4"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 04"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_04_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_04_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_04_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_04_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_04_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_05_OVERRIDE_ENABLE"
+ Value = "0"
+ Help = "Enables or disables PIC IRQ 05 Override entry in MADT\For most of the systems default value is OFF.\IRQ 05 is mapped to INT_IN 05."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_05_APIC_INT"
+ Value = "5"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 05"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_05_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_05_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_05_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_05_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_05_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_06_OVERRIDE_ENABLE"
+ Value = "0"
+ Help = "Enables or disables PIC IRQ 06 Override entry in MADT\For most of the systems default value is OFF.\IRQ 06 is mapped to INT_IN 06."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_06_APIC_INT"
+ Value = "6"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 06"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_06_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_06_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_06_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_06_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_06_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_07_OVERRIDE_ENABLE"
+ Value = "0"
+ Help = "Enables or disables PIC IRQ 07 Override entry in MADT\For most of the systems default value is OFF.\IRQ 07 is mapped to INT_IN 07."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_07_APIC_INT"
+ Value = "7"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 07"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_07_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_07_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_07_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_07_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_07_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_08_OVERRIDE_ENABLE"
+ Value = "0"
+ Help = "Enables or disables PIC IRQ 08 Override entry in MADT\For most of the systems default value is OFF.\IRQ 08 is mapped to INT_IN 08."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_08_APIC_INT"
+ Value = "8"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 08"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_08_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_08_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_08_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_08_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_08_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_09_OVERRIDE_ENABLE"
+ Value = "1"
+ Help = "Enables or disables PIC IRQ 09 Override entry in MADT\For most of the systems default value is OFF.\IRQ 09 is mapped to INT_IN 09.\For INTEL chipsets this entry should be on\since Intel uses IRQ 09 LEVEL_TRIGGERED; ACTIVE_HIGH.\For all other chipsets IRQ 9 conforms to the spec."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_09_APIC_INT"
+ Value = "9"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 09"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_09_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_09_POLARITY"
+ Value = "1"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_09_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_09_TRIGGER_MODE"
+ Value = "3"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_09_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_10_OVERRIDE_ENABLE"
+ Value = "0"
+ Help = "Enables or disables PIC IRQ 10 Override entry in MADT\For most of the systems default value is OFF.\IRQ 10 is mapped to INT_IN 10."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_10_APIC_INT"
+ Value = "10"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 10"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_10_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_10_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_10_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_10_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_10_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_11_OVERRIDE_ENABLE"
+ Value = "0"
+ Help = "Enables or disables PIC IRQ 11 Override entry in MADT\For most of the systems default value is OFF.\IRQ 11 is mapped to INT_IN 11."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_11_APIC_INT"
+ Value = "11"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 11"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_11_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_11_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_11_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_11_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_11_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_12_OVERRIDE_ENABLE"
+ Value = "0"
+ Help = "Enables or disables PIC IRQ 12 Override entry in MADT\For most of the systems default value is OFF.\IRQ 12 is mapped to INT_IN 12."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_12_APIC_INT"
+ Value = "12"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 12"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_12_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_12_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_12_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_12_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_12_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_13_OVERRIDE_ENABLE"
+ Value = "0"
+ Help = "Enables or disables PIC IRQ 13 Override entry in MADT\For most of the systems default value is OFF.\IRQ 13 is mapped to INT_IN 13."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_13_APIC_INT"
+ Value = "13"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 13"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_13_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_13_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_13_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_13_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_13_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_14_OVERRIDE_ENABLE"
+ Value = "0"
+ Help = "Enables or disables PIC IRQ 14 Override entry in MADT\For most of the systems default value is OFF.\IRQ 14 is mapped to INT_IN 14."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_14_APIC_INT"
+ Value = "14"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 14"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_14_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_14_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_14_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_14_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_14_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_15_OVERRIDE_ENABLE"
+ Value = "0"
+ Help = "Enables or disables PIC IRQ 15 Override entry in MADT\For most of the systems default value is OFF.\IRQ 15 is mapped to INT_IN 15."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On\Off"
+End
+
+TOKEN
+ Name = "IRQ_15_APIC_INT"
+ Value = "15"
+ Help = "IOAPIC INT IN number overriding PIC IRQ 15"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..256 depends on system architecture"
+ Token = "IRQ_15_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_15_POLARITY"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Active High.\3 = Active Low."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 or 3. 2-reserved"
+ Token = "IRQ_15_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "IRQ_15_TRIGGER_MODE"
+ Value = "0"
+ Help = "0 = Conforms to specifications of bus.\1 = Edge-triggered.\3 = Level-triggered."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0, 1 and 3. 2 - reserved."
+ Token = "IRQ_15_OVERRIDE_ENABLE" "=" "1"
+End
+
+TOKEN
+ Name = "====== APIC Properties ================="
+ Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!"
+ Help = "Specfy some IO/APIC faetures ."
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "FEC00000_APIC_AUTODETECT"
+ Value = "1"
+ Help = "This will Auto Detect IO/APIC(s) which resides in MMIO region from 0xFEC0_0000 to 0xFED0_0000-1.\\ If set to 'off' ACPI initialization software will assume - system has one IO/APIC\with address provided in 'APCB' token."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On - Off"
+End
+
+TOKEN
+ Name = "PCI_BUS_APIC_AUTODETECT"
+ Value = "0"
+ Help = "This token is used to enable ACPI initialization software feature which will look for IO/APIC devices on the PCI bus.\\If set to 'off' ACPI initialization software will assume - system has one IO/APIC\with address provided in 'APCB' token."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On - Off"
+End
+
+TOKEN
+ Name = "PCI_BUS_APIC_LEAVE_ENABLE"
+ Value = "1"
+ Help = "Tells ACPI Driver not to restore previous state (it might be DISABLED) of IOAPICs discovered on PCI Bus."
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "PCI_BUS_APIC_AUTODETECT" "=" "1"
+ Range = "On - Off"
+End
+
+TOKEN
+ Name = "USE_BOARD_INFO_APIC_DATA"
+ Value = "0"
+ Help = "Force BIOS to use IOAPIC SDL data structures in order collect IOAPIC information."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On - Off"
+ Token = "AmiBoardInfo_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "SW_SMI_S4BIOS"
+ Value = "0"
+ Help = "Value to write to the SMI CMD register to enter \BIOS S4 state.\NOTE: Currently not implemented"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0-0xff 0 = not supported"
+End
+
+TOKEN
+ Name = "ACPH"
+ Value = "222"
+ Help = "North Bridge Scratchpad Data Register for patch ACPI."
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "ACPI_RSDT_TABLE_NUM"
+ Value = "0x10"
+ Help = "number of max entryes in RSDT"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "2-256"
+End
+
+TOKEN
+ Name = "ACPI_INT_MODEL"
+ Value = "1"
+ Help = "Interrupt Model for the ACPI system"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0=Dual PIC; 1=Mult APIC; 2=Mult SAPIC "
+End
+
+TOKEN
+ Name = "ACPI_APIC_FLAGS"
+ Value = "1"
+ Help = "Firmware control structure flags. See Table 5-12 for a description of this field.(ACPI 2.0 SPEC)."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0 = System has only APIC; 1 = System also has a PC-ATcompatible dual-PIC 8259; all other bits reserved an must be 0"
+End
+
+TOKEN
+ Name = "ACPI_PM_PROFILE"
+ Value = "3"
+ Help = "Power Management Profile ACPI 2.0\See acpi20.h"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0-8 0 = Unspecified; 1 = Desktop; 2 = Modile; 3 = Workstation; 4 = Enterprise Server; 5 = SOHO Server; 6 = Application PC; 7 = Performance Server; 8 = Tablet"
+ Token = "ACPI_BUILD_TABLES_2_0" "=" "1"
+End
+
+TOKEN
+ Name = "ACPI_IA_BOOT_ARCH"
+ Value = "0003h"
+ Help = "IA Boot Architecture\this token may be 'ored' see renge field for details"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "1 - IA_LEGACY; 2 - IA_8042; 4 - VGA Not Present; 8 - MSI Not Supported; 10h - PCIe ASPM Controls"
+ Token = "ACPI_BUILD_TABLES_2_0" "=" "1"
+ Token = "ATAD_SUPPORT" "=" "0"
+End
+
+TOKEN
+ Name = "ACPI_IA_BOOT_ARCH"
+ Value = "0023h"
+ Help = "IA Boot Architecture\this token may be 'ored' see renge field for details"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "1 - IA_LEGACY; 2 - IA_8042; 4 - VGA Not Present; 8 - MSI Not Supported; 10h - PCIe ASPM Controls, 20h - CMOS RTC Not Present"
+ Token = "ACPI_BUILD_TABLES_2_0" "=" "1"
+ Token = "ATAD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "P_LVL2_LAT_VAL"
+ Value = "0065h"
+ Help = "Worst case Latency for enter C2"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0-0xff"
+End
+
+TOKEN
+ Name = "P_LVL3_LAT_VAL"
+ Value = "03E9h"
+ Help = "Worst case Latency for enter C3"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0-0xff"
+End
+
+TOKEN
+ Name = "FLUSH_SIZE_VAL"
+ Value = "400h"
+ Help = "If WBINVD=0, the value of this field is the number of flush strides that need to be read (using cacheable addresses) to\completely flush dirty lines from any processor’s memory caches.\Notice that the value in FLUSH_STRIDE is typically the smallest cache line width on any of the\processor’s caches (for more information, ACPI SPEC)."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0-0xffff"
+End
+
+TOKEN
+ Name = "FLUSH_STRIDE_VAL"
+ Value = "10h"
+ Help = "If WBINVD=0, the value of this field is the cache line width, in bytes, of the processor’s memory caches. This\value is typically the smallest cache line width on any of the processor’s caches. For more information, see the\description of the FLUSH_SIZE field. (for more information, ACPI SPEC)."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0-0xffff"
+End
+
+TOKEN
+ Name = "DUTY_OFFSET_VAL"
+ Value = "1"
+ Help = "The zero-based index of where the processor’s duty cycle setting is within the processor’s P_CNT register.\(for more information, ACPI SPEC)."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0-0xf0"
+End
+
+TOKEN
+ Name = "DUTY_WIDTH_VAL"
+ Value = "3"
+ Help = "The bit width of the processor’s duty cycle setting value in the P_CNT register. Each processor’s duty cycle setting\allows the software to select a nominal processor frequency below its absolute frequency.\(for more information, ACPI SPEC)."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0-0xff: depends on 'duty_offset'"
+End
+
+TOKEN
+ Name = "FACS_FLAG_S4BIOS"
+ Value = "0"
+ Help = "Firmware control S4BIOS_F flags. See Table 5-12 for a description of this field.(ACPI 2.0 SPEC)."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0 = OS will do S4; 1 = BIOS will do S4"
+End
+
+TOKEN
+ Name = "FACS_FLAG_64BIT_WAKE_SUPPORTED"
+ Value = "0"
+ Help = "Firmware control F64BIT_WAKE_SUPPORTED_F flags. See Table 5-13 for a description of this field.(ACPI 4.0 SPEC)."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "1 = platform firmware supports a 64 bit execution environment for the waking vector; 0 = Otherwise"
+End
+
+TOKEN
+ Name = "ASSB"
+ Value = "0"
+ Help = "ACPI Sleep State Buffer for BIOS Usage."
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "AOTB"
+ Value = "0"
+ Help = "ACPI OS Type Buffer for BIOS Usage."
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "AAXB"
+ Value = "0"
+ Help = "ACPI Auxiliary Buffer for BIOS Usage."
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "HIDK"
+ Value = 'EISAID("PNP0303")'
+ TokenType = Expression
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "HIDM"
+ Value = 'EISAID("PNP0F03")'
+ TokenType = Expression
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "CIDK"
+ Value = 'EISAID("PNP030b")'
+ TokenType = Expression
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "CIDM"
+ Value = 'EISAID("PNP0F13")'
+ TokenType = Expression
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_SS4"
+ Value = "$(A_S4)"
+ Help = "Default Value for ACPI Setup S4."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_ACPI_LOCK_LEGACY_DEV"
+ Value = "0"
+ Help = "Default Value for ACPI Lock Legacy Resources."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_SS3"
+ Value = "$(A_S3)"
+ Help = "Default Value for ACPI Setup S3."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_SS2"
+ Value = "$(A_S2)"
+ Help = "Default Value for ACPI Setup S2."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_SS1"
+ Value = "$(A_S1)"
+ Help = "Default Value for ACPI Setup S1."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_AUTO_ACPI"
+ Value = "0"
+ Help = "Default Value for ACPI Auto Config."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ACPI_ASL_COMPILER"
+ Value = "IASL.exe"
+ Help = "Possible values: 'ASL.exe' and 'IASL.exe'."
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "PEHP"
+ Value = "$(PCI_EXPRESS_SUPPORT)"
+ Help = "_OSC: Pci Express Native Hot Plug Control"
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "SHPC"
+ Value = "$(HOTPLUG_SUPPORT)"
+ Help = "_OSC: Standard Hot Plug Controller (SHPC) Native Hot Plug control"
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "PEPM"
+ Value = "$(PCI_EXPRESS_SUPPORT)"
+ Help = "_OSC: Pci Express Native Power Management Events control"
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "PEER"
+ Value = "$(PCI_EXPRESS_SUPPORT)"
+ Help = "_OSC: Pci Express Advanced Error Reporting control"
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "PECS"
+ Value = "$(PCI_EXPRESS_SUPPORT)"
+ Help = "_OSC: Pci Express Capability Structure control"
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "S3_VIDEO_REPOST_SUPPORT"
+ Value = "0"
+ Help = "Switch to enable/disable S3 video repost support."
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "CSM_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "======FACP Fixed Feature Flags"
+ Value = "Fixed Feature Flags Starts Here"
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "FACP_FLAG_WBINVD"
+ Value = "1"
+ Help = "Processor properly implements a functional \equivalent to the WBINVD IA-32 instruction.\If set, signifies that the WBINVD instruction \correctly flushes the processor caches, maintains \memory coherency, and upon completion of the \instruction, all caches for the current processor \contain no cached data other than what OSPM \references and allows to be cached. If this flag is \not set, the ACPI OS is responsible for disabling \all ACPI features that need this function. This field \is maintained for ACPI 1.0 processor compatibility \on existing systems. Processors in new ACPI-\compatible systems are required to support this \function and indicate this to OSPM by setting this \field."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_WBINVD_FLUSH"
+ Value = "0"
+ Help = "If set, indicates that the hardware flushes all \caches on the WBINVD instruction and maintains \memory coherency, but does not guarantee the \caches are invalidated. This provides the complete \semantics of the WBINVD instruction, and \provides enough to support the system sleeping \states. If neither of the WBINVD flags is set, the \system will require FLUSH_SIZE and \FLUSH_STRIDE to support sleeping states. If the \FLUSH parameters are also not supported, the \machine cannot support sleeping states S1, S2, \or S3."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_PROC_C1"
+ Value = "1"
+ Help = "If ON - indicates that the C1 power state is \supported on all processors."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_P_LVL2_UP"
+ Value = "0"
+ Help = "A zero indicates that the C2 power state is \configured to only work on a uniprocessor (UP) \system. A one indicates that the C2 power state \is configured to work on a UP or multiprocessor \(MP) system."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_PWR_BUTTON"
+ Value = "0"
+ Help = "A zero indicates the power button is handled as a \fixed feature programming model; a one indicates \the power button is handled as a control method \device. If the system does not have a power \button, this value would be “1” and no sleep \button device would be present.\Independent of the value of this field, the \presence of a power button device in the \namespace indicates to OSPM that the power \button is handled as a control method device."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_SLP_BUTTON"
+ Value = "1"
+ Help = "A zero indicates the sleep button is handled as a \fixed feature programming model; a one indicates \the sleep button is handled as a control method \device.\If the system does not have a sleep button, this \value would be “1” and no sleep button device \would be present.\Independent of the value of this field, the presence \of a sleep button device in the namespace \indicates to OSPM that the sleep button is \handled as a control method device."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_FIX_RTC"
+ Value = "0"
+ Help = "A zero indicates the RTC wake status is supported \in fixed register space; a one indicates the RTC \wake status is not supported in fixed register space."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_RTC_S4"
+ Value = "1"
+ Help = "Indicates whether the RTC alarm function can \wake the system from the S4 state. The RTC \must be able to wake the system from an S1, S2, \or S3 sleep state. The RTC alarm can optionally \support waking the system from the S4 state, as \indicated by this value."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_TMR_VAL_EXT"
+ Value = "0"
+ Help = "A zero indicates TMR_VAL is implemented as a \24-bit value. A one indicates TMR_VAL is \implemented as a 32-bit value. The TMR_STS \bit is set when the most significant bit of the \TMR_VAL toggles."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_DCK_CAP"
+ Value = "0"
+ Help = "A zero indicates that the system cannot support \docking. A one indicates that the system can \support docking. Notice that this flag does not \indicate whether or not a docking station is \currently present; it only indicates that the system \is capable of docking."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_RESET_REG_SUP"
+ Value = "1"
+ Help = "If set, indicates the system supports system reset \via the FADT RESET_REG"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_SEALED_CASE"
+ Value = "0"
+ Help = "System Type Attribute. If set indicates that the \system has no internal expansion capabilities \and the case is sealed."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_HEADLESS"
+ Value = "0"
+ Help = "System Type Attribute. If set indicates the system \cannot detect the monitor or keyboard / mouse \devices."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_CPU_SW_SLP"
+ Value = "0"
+ Help = "If set, indicates to OSPM that a processor native \instruction must be executed after writing the \SLP_TYPx register."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_PCI_EXP_WAK"
+ Value = "0"
+ Help = "If set, indicates the platform supports the \PCIEXP_WAKE_STS bit in the PM1 Status \register and the PCIEXP_WAKE_EN bit in \the PM1 Enable register."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_USE_PLATFORM_CLOCK"
+ Value = "$(HPET_SUPPORT) "
+ Help = "A value of one indicates that OSPM should use a platform\provided timer to drive any monotonically non-decreasing\counters, such as OSPM performance counter services. Which\particular platform timer will be used is OSPM specific, however,\it is recommended that the timer used is based on the following\algorithm: If the HPET is exposed to OSPM, OSPM should use\the HPET. Otherwise, OSPM will use the ACPI power\management timer. A value of one indicates that the platform is\known to have a correctly implemented ACPI power management\timer.\A platform may choose to set this flag if a internal processor clock\(or clocks in a multi-processor configuration) cannot provide\consistent monotonically non-decreasing counters.\Note: If a value of zero is present, OSPM may arbitrarily choose to\use an internal processor clock or a platform timer clock for these\operations. That is, a zero does not imply that OSPM will\necessarily use the internal processor clock to generate a\monotonically non-decreasing counter to the system.\\Note:\If system supports HPET put here $(HPET_SUPPORT) token value.\"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_S4_RTC_STS_VALID"
+ Value = "$(S4_WAKE_FROM_RTC_SUPPORTED)"
+ Help = "A one indicates that the contents of the RTC_STS flag is valid when waking the system from S4.\See PM1 Status Registers Fixed Hardware Feature Status Bits for more information.\Some existing systems do not reliably set this input today, and this bit allows OSPM\to differentiate correctly functioning platforms from platforms with this errata."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_REMOTE_POWER_ON_CAPABLE"
+ Value = "$(REMOTE_POWER_ON_SUPPORTED)"
+ Help = "A one indicates that the platform is compatible with remote power on.\That is, the platform supports OSPM leaving GPE wake events armed prior to an S5 transition.\Some existing platforms do not reliably transition to S5 with wake events enabled\(for example, the platform may immediately generate a spurious wake event after completing the S5 transition).\This flag allows OSPM to differentiate correctly functioning platforms from platforms with this type of errata."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_FORCE_APIC_CLUSTER_MODEL"
+ Value = "0"
+ Help = "A one indicates that all local APICs must be \configured for the cluster destination model when \delivering interrupts in logical mode.\If this bit is set, then logical mode interrupt delivery \operation may be undefined until OSPM has moved \all local APICs to the cluster model.\Note that the cluster destination model doesn’t \apply to Itanium processor local SAPICs. This bit is \intended for xAPIC based machines that require \the cluster destination model even when 8 or \fewer local APICs are present in the machine."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FACP_FLAG_FORCE_APIC_PHYSICAL_DESTINATION_MODE"
+ Value = "0"
+ Help = "A one indicates that all local xAPICs must be \configured for physical destination mode. If this \bit is set, interrupt delivery operation in logical \destination mode is undefined. On machines that \contain fewer than 8 local xAPICs or that do not \use the xAPIC architecture, this bit is ignored."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "HW_REDUCED_ACPI"
+ Value = "0"
+ Help = "A one indicates that the ACPI Hardware Interface \is not implemented. Software-only alternatives \are used for supported fixed-features."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "LOW_POWER_S0_IDLE_CAPABLE"
+ Value = "0"
+ Help = "A one informs OSPM that the platform is able to \achieve power savings in S0 similar to or better \than those typically achieved in S3. In effect, when \this bit is set it indicates that the system will \achieve no power benefit by making a sleep transition to S3."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+
+TOKEN
+ Name = "=====End of FACP Fixed Featured Flags"
+ Value = "Fixed Featured Flags Ends here"
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "MPS_TABLE_SUPPORT"
+ Value = "0"
+ Help = "Main switch to enable MPS V 1.4 Table support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "CSM_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "MP_TABLE_LEGACY_REGION_LOCATION"
+ Value = "1"
+ Help = "if set to 1 MPS table will reside in F0000 \segment, otherwise it will be above 1MB"
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "MPS_TABLE_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "MP_TBL_TMP_BUFFER_SIZE"
+ Value = "4096"
+ Help = "Size of the Scratch Pad Buffer used to build MP Tables.\Usually 4K(4096 bytes) it enough in most cases.\ BUT for the Systems with more than 16 CPU and complicated BUS and IOAPICs infrastructure it is recommended to set it to 8K (8192 bytes)."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ACPI_THUNK_REAL_MODE_SEGMENT"
+ Value = "0x1000"
+ Help = "Segment of where ACPI thunk will be copied to."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ACPI_THUNK_STACK_TOP"
+ Value = "0x1000"
+ Help = "Offset of top of stack in ACPI THUNK."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ITKE"
+ Value = "0"
+ Help = "This will be overridden by the ITK module."
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "MBEC"
+ Value = "0xFFFF"
+ Help = "EC presence (0) or abssence (0xFFFF) in system. EC declare I/O port \ 62/66, also declared as MotherBoard Resources in rmisc.asl,\ as EC's resource. To avoid conflicts redefine \ to 0 in EC mopdule, if present"
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "IFDEF_ASL_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable the #IF statement in the ASL file."
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Range = "0 - 1"
+End
+
+TOKEN
+ Name = "ASLEXPANDER"
+ Value = "ASLExpander.exe"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "ASL_FLAGS"
+ Value = "-tc -vi"
+ Help = "use '-tc' - always;\use '-vi' - with ASLEXPANDER;\use '-cr' - for ACPI 5.0 Compiler\"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+PATH
+ Name = "ACPI_DIR"
+ Path = "Core\EM\ACPI"
+End
+
+PATH
+ Name = "ACPI_CORE_DIR"
+ Path = "Core\EM\ACPI"
+End
+
+PATH
+ Name = "ACPI_BOARD_DIR"
+ Path = "Board\EM\ACPI"
+End
+
+PATH
+ Name = "ACPI_PATH"
+ Path = "{$(ACPI_CORE_DIR);$(ACPI_BOARD_DIR)}"
+End
+
+MODULE
+ Help = "Includes ACPI.mak to Project"
+ File = "ACPI.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\ACPI.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 0
+ Help = "Includes generic ACPI setup screens to the project"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(ACPI_BOARD_DIR)\ACPI.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 0
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "GENERIC_ASL_BEFORE_PCITREE"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "GENERIC_ASL"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "Board\Em\Acpi\oemdsdt.asl"
+ Parent = "GENERIC_ASL"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\ACPI.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ASL_PTS"
+ SrcFile = "Board\eM\ACPI\ACPI.mak"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "ASL_WAK"
+ SrcFile = "Board\eM\ACPI\ACPI.mak"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "SB_OSCM_ASL"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "FANS(Arg0)"
+ Parent = "ASL_PTS"
+ Help = "Fan prepare to sleep routine. \Arg0 is a sleep state the System is targeted for.\Defined in FAN.ASL"
+ Token = "A_FAN" "=" "1"
+ Token = "A_FAN" "|" "$(A_THERMAL)"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "\_TZ.TRMS(Arg0)"
+ Parent = "ASL_PTS"
+ Help = "ThermalZone: prepare to sleep routine. \Arg0 is a sleep state the System is targeted for.\Defined in TZ.ASL"
+ Token = "A_THERMAL" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "FANW(Arg0)"
+ Parent = "ASL_WAK"
+ Help = "Fan wake up routine. \Arg0 is a sleep state the System is resuming from. \Defined in FAN.ASL"
+ Token = "A_FAN" "=" "1"
+ Token = "A_FAN" "|" "$(A_THERMAL)"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "\_TZ.TRMW(Arg0)"
+ Parent = "ASL_WAK"
+ Help = "ThermalZone: prepare to sleep routine. \Arg0 is a sleep state the System is resuming from. \Defined in TZ.ASL"
+ Token = "A_THERMAL" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "Core\EM\ACPI\OSCM.asl"
+ Parent = "GENERIC_ASL"
+ Token = "ACPI_BUILD_TABLES_3_0" "=" "1"
+ Token = "PCI_BUS_MAJOR_VER" "<=" "2"
+ Token = "PCI_BUS_MINOR_VER" "<" "3"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "Board\Em\Acpi\OEMRMISC.asl"
+ Parent = "GENERIC_ASL"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\asl.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = " "
+ Parent = "$(BUILD_DIR)\asl.ffs"
+ Token = "AmiBoardInfo_SUPPORT" "=" "1"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "OemUpdateHeader"
+ Help = "This is a list of OEM routines for ACPI tables. The routines are called during creation and publishing of all ACPI tables."
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "Core\EM\ACPI\TimeAndAlarm.asl"
+ Parent = "GENERIC_ASL"
+ Token = "ATAD_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+OUTPUTREGISTER
+ Name = "PCI_TREE_FULL_ASL"
+ Path = "Build"
+ File = "PciTree.asl"
+End
+
+OUTPUTREGISTER
+ Name = "IRQ_ASM_APIC"
+ Path = "BUILD"
+ File = "mppciirq.inc"
+ Token = "PCI_BUS_MAJOR_VER" "<" "2"
+ Token = "MPS_TABLE_SUPPORT" "=" "1"
+End
+
+OUTPUTREGISTER
+ Name = "TOKEN_ASL"
+ Path = "Build"
+ File = "token.asl"
+End
+
+OUTPUTREGISTER
+ Name = "TOKEN_ASLH"
+ Path = "Build"
+ File = "tokenAsl.h"
+ Token = "IFDEF_ASL_SUPPORT" "=" "1"
+End
diff --git a/Board/EM/ACPI/ACPI.uni b/Board/EM/ACPI/ACPI.uni
new file mode 100644
index 0000000..296210c
--- /dev/null
+++ b/Board/EM/ACPI/ACPI.uni
Binary files differ
diff --git a/Board/EM/ACPI/ACPIBSP.CIF b/Board/EM/ACPI/ACPIBSP.CIF
new file mode 100644
index 0000000..b4264df
--- /dev/null
+++ b/Board/EM/ACPI/ACPIBSP.CIF
@@ -0,0 +1,16 @@
+<component>
+ name = "ACPI - Board"
+ category = ModulePart
+ LocalRoot = "BOARD\EM\ACPI\"
+ RefName = "ACPI_BOARD"
+[files]
+"ACPI.sdl"
+"ACPI.mak"
+"ACPI.dxs"
+"OEM_ACPI.C"
+"OEM_ACPI.H"
+"ACPI.sd"
+"ACPI.uni"
+[parts]
+"ASL_BOARD"
+<endComponent>
diff --git a/Board/EM/ACPI/ASLBSP.CIF b/Board/EM/ACPI/ASLBSP.CIF
new file mode 100644
index 0000000..1820ab7
--- /dev/null
+++ b/Board/EM/ACPI/ASLBSP.CIF
@@ -0,0 +1,10 @@
+<component>
+ name = "ASL - Board"
+ category = ModulePart
+ LocalRoot = "BOARD\EM\ACPI\"
+ RefName = "ASL_BOARD"
+[files]
+"\OEMRMISC.ASL"
+"\oemDSDT.asl"
+[parts]
+<endComponent>
diff --git a/Board/EM/ACPI/OEMRMISC.ASL b/Board/EM/ACPI/OEMRMISC.ASL
new file mode 100644
index 0000000..0e466a9
--- /dev/null
+++ b/Board/EM/ACPI/OEMRMISC.ASL
@@ -0,0 +1,241 @@
+// THIS FILE IS INCLUDED to South Bridge device scope
+//**********************************************************************;
+//**********************************************************************;
+//**********************************************************************;
+//** **;
+//** (C)Copyright 1985-2005, American Megatrends, Inc. **;
+//** **;
+//** All Rights Reserved. **;
+//** **;
+//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **;
+//** **;
+//** Phone (770)-246-8600 **;
+//** **;
+//**********************************************************************;
+//**********************************************************************;
+// $Header: /Alaska/BIN/Modules/ACPI/Template/Board/OEMRMISC.ASL 6 3/26/09 4:55p Oleksiyy $
+//
+// $Revision: 6 $
+//
+// $Date: 3/26/09 4:55p $
+//****************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Modules/ACPI/Template/Board/OEMRMISC.ASL $
+//
+// 6 3/26/09 4:55p Oleksiyy
+// New ACPI Core implementation - improves logic, execution time and
+// memory usage of ACPI module.
+//
+// 1 2/18/09 3:50p Oleksiyy
+//
+// 5 4/13/07 4:19p Yakovlevs
+//
+// 4 12/12/05 9:26p Yakovlevs
+// comments changed
+//
+// 3 11/04/05 5:48p Yakovlevs
+// Rearrange resources and resolve resource conflicts
+//
+// 2 3/24/05 5:13p Sivagarn
+// Code cleanup
+//
+// 1 3/24/05 5:00p Sivagarn
+//
+//****************************************************************************
+
+
+//-----------------------------------------------------------------------
+// Any OEM Specific ISA control code to be defined in this file
+//-----------------------------------------------------------------------
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: OMSC
+//
+// Description: OEM Miscellaneous I/O and memory resources
+// This table should contain any I/O port that is not used by a specific
+// device but does not return FFh when read. Some examples of I/O ports
+// that should be reserved here are:
+// Any I/O port in the range 00 - FF that is not used by any other dev node
+// The IRQ edge/level control ports (4D0/4D1)
+//
+// Input: Nothing
+//
+// Output: _CRS buffer
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Device(OMSC) {
+
+ Name(_HID, EISAID("PNP0C02")) // System board resources device node ID
+ Name(_UID, 0x0E11) // Unique ID.
+//S.Y !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
+//All these resources has been moved to SB ASL
+
+// Name(CRS, ResourceTemplate() {
+// GP I/O space(if applicable)
+// IO(Decode16, 0, 0, 0, 0, IO1)
+// Base Address I/O APIC
+// Memory32Fixed(ReadOnly, 0x00000, 0x0, ME01 ) //Non-writeable
+// Base Address local APIC (boot strap CPU)
+// Memory32Fixed(ReadOnly, 0x00000, 0x0, ME02 ) //Non-writeable
+// } // End of ResourceTemplate
+// ) // end of CRS
+
+// Method (_CRS, 0)
+// {
+// GPIO,GPIL - General purpose I/O Base addfress & length
+// If(GPIO)
+// {
+// CreateWordField(CRS, ^IO1._MIN, GP10) // GPIO 1 Base
+// CreateWordField(CRS, ^IO1._MAX, GP11)
+// CreateByteField(CRS, ^IO1._LEN, GP1L) // GPIO length
+// Store(GPIO, GP10) // Min Base address
+// Store(GPIO, GP11) // Max Base address
+// Store(GPIL, GP1L) // Region length
+// }
+// Reserve IO & Local APIC memory ranges only if IO APIC is decoded/enabled
+// APCB,APCL - on chip I/O APIC Base address & region length
+// If(APCB)
+// {
+// CreateDwordField(CRS, ^ME01._LEN, ML01)
+// CreateDwordField(CRS, ^ME01._BAS, MB01)
+// CreateDwordField(CRS, ^ME02._LEN, ML02)
+// CreateDwordField(CRS, ^ME02._BAS, MB02)
+// Store(APCB, MB01) // Base address I/O APIC
+// Store(APCL, ML01) // Region length
+// Store(0xFEE00000, MB02) // Base address Local APIC
+// Store(0x1000, ML02) // Region length
+// }
+// Return(CRS)
+// }// End _CRS
+//S.Y !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
+
+
+
+ }
+
+//-----------------------------------------------------------------------
+// System board extension Device node for ACPI BIOS
+//-----------------------------------------------------------------------
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: RMEM
+//
+// Description: System board extension Device node for ACPI BIOS
+// Place the device under \_SB scope, As per Msft the MEM
+// Device is used to reserve Resources that are decoded out of PCI Bus
+// Important consideration :
+// Logic to reserve the memory within 0xC0000 - 0xFFFFF Extended BIOS area is based on assumption, that
+// the BIOS Post has detected all expansion ROMs in the region and made their memory ranges
+// shadowable ( copied to RAM at the same address, for performance reasons). The rest of the region is left non-Shadowable,
+// hence no memory is decoded there. Such region is decoded to PCI bus (to be reserved in PCI0._CRS)
+// Whatever memory is Shadowed, thus, decoded as non "FF"s, is required to be reserved in "SYSM" System board extension Device node,
+// unless is not already reserved by some of PCI Device drivers. There have been observed the difference of how Win9x & Win2000
+// OSes deal with Expansion ROM memory. Win9x Device drivers are tend to claim its expension ROMs regions as used
+// by the device; Win2000 never use such ROM regions for its devices. Therefore there can be different
+// approach used for different OSes in reservation unclaimed memory in "SYSM" Device node.
+// is forwarded to PCI Bus
+//
+// Input: Nothing
+//
+// Output: _CRS buffer
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Device(\_SB.RMEM)// Memory
+ {
+ Name(_HID, EISAID("PNP0C01")) // Hardware Device ID
+ Name(_UID, 1)
+/*
+ Name(CRS, ResourceTemplate()
+ {
+// Base Address 0 - 0x9FFFF , 640k DOS memory
+// Memory32Fixed(ReadWrite,0x0000, 0xA0000 ) //Writeable
+// Shadow RAM1, C0000 - E0000, 128k Expansion BIOS
+ Memory32Fixed(ReadOnly, 0x00000, 0x00000, RAM1) //Non-writeable
+// Shadow RAM2, E0000 - 1M, 128k System BIOS
+ Memory32Fixed(ReadOnly, 0xE0000, 0x20000, RAM2) //Non-writeable
+// Base Address 1M - Top of system present memory
+// Memory32Fixed(ReadWrite,0x100000,0x00000, RAM3) //Writeable
+// ROM image if decoded at top of 4GByte space
+// Memory32Fixed(ReadOnly, 0x00000, 0x00000, RESM) //Non-Writeable
+// Reserve memory range above 4GB
+// QWORDMemory( ResourceConsumer, PosDecode, MinFixed, MaxFixed,
+// Cacheable, // _MEM
+// ReadWrite, // _RW
+// 0xfffffff, // Granularity
+// 0x40000000, 0x00000000, // _MIN, _MAX
+// 0x00, // Translation
+// 0x00000000, // _LEN
+// ,,
+// 4GBR
+// )
+ })
+
+ Method (_CRS, 0)
+ {
+ CreateDwordField(CRS, ^RAM1._BAS, BAS1)
+ CreateDwordField(CRS, ^RAM1._LEN, LEN1)
+ CreateDwordField(CRS, ^RAM2._BAS, BAS2)
+ CreateDwordField(CRS, ^RAM2._LEN, LEN2)
+// CreateDwordField(CRS, ^RAM3._LEN, LEN3)
+// CreateDwordField(CRS, ^RESM._BAS, BAS4)
+// CreateDwordField(CRS, ^RESM._LEN, LEN4)
+// CreateQwordField(CRS, ^4GBR._MIN, MIN5)
+// CreateQwordField(CRS, ^4GBR._MAX, MAX5)
+// CreateQwordField(CRS, ^4GBR._LEN, LEN5)
+ If(LNotEqual(OSFL,0)) // For Win9x do not reserve 0xC0000-0xE0000,
+ // The region can already be claimed by some OS driver (video, SCSI,..)
+ {
+ If(MG1B) // If there is a non-shadowed gap in 0xc0000 - 0xfffff region
+ {
+ // Shadow RAM1, C0000 - E0000, 128k Expansion BIOS
+ If(LGreater(MG1B, 0xC0000))
+ {
+ Store(0xC0000, BAS1)
+ Subtract(MG1B, BAS1, LEN1)
+ }
+ } Else {
+ Store(0xC0000, BAS1)
+ Store(0x20000, LEN1)
+ }
+ // Shadow RAM2, E0000 - 1M, 128k System BIOS
+ If(Add(MG1B, MG1L,Local0))
+ {
+ Store(Local0, BAS2)
+ Subtract(0x100000, BAS2, LEN2)
+ }
+ }
+// MIN6 returns the System memory size (PCI0._CRS)
+ Subtract(MG2B, 0x100000, LEN3)
+// Memory hole at top of 4Gbyte
+ Add(MG2B, MG2L, BAS4)
+ Subtract(0, BAS4, LEN4)
+// above 4GB
+// Store(MG3B, MIN5)
+// Store(MG3L, MAX5)
+// Subtract(MAX5, MIN5, LEN5)
+ Return(CRS)
+ } // end of _CRS
+*/
+ }// End Memory
+
+
+//**********************************************************************;
+//**********************************************************************;
+//** **;
+//** (C)Copyright 1985-2005, American Megatrends, Inc. **;
+//** **;
+//** All Rights Reserved. **;
+//** **;
+//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **;
+//** **;
+//** Phone (770)-246-8600 **;
+//** **;
+//**********************************************************************;
+//**********************************************************************;
diff --git a/Board/EM/ACPI/OEM_ACPI.C b/Board/EM/ACPI/OEM_ACPI.C
new file mode 100644
index 0000000..a3c3b0a
--- /dev/null
+++ b/Board/EM/ACPI/OEM_ACPI.C
@@ -0,0 +1,114 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/BIN/Modules/ACPI/Template/Board/OEM_ACPI.C 3 12/22/10 5:11p Oleksiyy $
+//
+// $Revision: 3 $
+//
+// $Date: 12/22/10 5:11p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Modules/ACPI/Template/Board/OEM_ACPI.C $
+//
+// 3 12/22/10 5:11p Oleksiyy
+// [TAG] EIP49816
+// [Category] Improvement
+// [Description] Function OemAcpiSetPlatformId added as eLink
+// [Files] ACPi.mak, ACPI.sdl and OEM_ACPI.c
+//
+// 2 3/26/09 4:47p Oleksiyy
+// New ACPI Core realization - improves logic, execution time and memory
+// usage of ACPI module.
+//
+// 1 2/18/09 3:50p Oleksiyy
+//
+// 1 1/12/09 11:40a Yakovlevs
+//
+// 1 3/18/07 5:23p Felixp
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: OEM_ACPI.C
+//
+// Description: Oem hooks used in ACPI Module
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include <Efi.h>
+#include <ACPI.h>
+#include <AmiCspLib.h>
+#include <AmiDxeLib.h>
+#include "AcpiOemElinks.h"
+typedef EFI_STATUS (ACPI_OEM_FUNCTION)(IN OUT ACPI_HDR *AcpiHdr);
+
+extern ACPI_OEM_FUNCTION OEM_LIST EndOfOemList;
+ACPI_OEM_FUNCTION* AcpiOemPartsList[] = {OEM_LIST NULL};
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: OemAcpiSetPlatformId
+//
+// Description:
+// This function provides platform specific OEM_ID and OEM_TABLE_ID to
+// overwrite default ACPI Table header.
+//
+// Input:
+// IN OUT ACPI_HDR *AcpiHdr - ACPI TABLE header
+//
+// Output:
+// EFI_STATUS EFI_SUCCESS if Values overwtitten.
+// EFI_INSUPPORTED if no need to change values - use default.
+//
+// NOTE: UINT8 *AcpiOemId[6]; UINT8 *AcpiOemTblId[8] avoid buffer overrun!
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS OemAcpiSetPlatformId(IN OUT ACPI_HDR *AcpiHdr){
+ EFI_STATUS Status=EFI_UNSUPPORTED;
+//----------------------------------------
+// Any additional variables goes here...
+
+ UINTN i;
+
+//----------------------------------------
+//////////////////////////////////////////////////////////////////////////
+// PORTING GOES HERE: CALL CHIPSET SPECIFIC FUNCTION TO GET PLATFORM ID //
+// AND MODIY AcpiOemId[6], AcpiOemTblId[8] PARAMETERS ACCORDINALLY //
+//////////////////////////////////////////////////////////////////////////
+
+ for (i=0; AcpiOemPartsList[i]; i++) Status = AcpiOemPartsList[i](AcpiHdr);
+
+
+
+//////////////////////////////////////////////////////////////////////////
+// PORTING ENDS HERE //
+//////////////////////////////////////////////////////////////////////////
+ return Status;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/ACPI/OEM_ACPI.H b/Board/EM/ACPI/OEM_ACPI.H
new file mode 100644
index 0000000..e16f90a
--- /dev/null
+++ b/Board/EM/ACPI/OEM_ACPI.H
@@ -0,0 +1,94 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************//
+// $Header: /Alaska/BIN/Modules/ACPI/Template/Board/OEM_ACPI.H 3 3/26/09 4:47p Oleksiyy $
+//
+// $Revision: 3 $
+//
+// $Date: 3/26/09 4:47p $
+//**********************************************************************//
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Modules/ACPI/Template/Board/OEM_ACPI.H $
+//
+// 3 3/26/09 4:47p Oleksiyy
+// New ACPI Core realization - improves logic, execution time and memory
+// usage of ACPI module.
+//
+// 1 2/18/09 3:50p Oleksiyy
+//
+// 2 1/12/09 11:43a Yakovlevs
+// OemAcpiSetPlatformId function Definition added.
+//
+// 1 3/24/05 5:00p Sivagarn
+// Initial Checkin
+//
+// 1 2/03/05 6:41p Sivagarn
+// 0ABHI001 Check in
+//
+// 3 1/19/05 7:25p Yakovlevs
+//
+// 2 7/27/04 6:45p Yakovlevs
+//
+// 1 4/08/04 3:29p Yakovlevs
+//
+// 2 9/21/01 3:32p Yakovlevs
+// Code cleanup
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: OEM_ACPI.H
+//
+// Description: OEM specific Definitions in ACPI Module
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+//**********************************************************************//
+// !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! //
+// !!!!! When porting, should specify proper values here !!!!!! //
+// !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! //
+//**********************************************************************//
+
+#ifndef _ACPIOEM_H //To Avoid this header get compiled twice
+#define _ACPIOEM_H
+
+#include <Efi.h>
+#include <ACPI.h>
+
+
+
+
+//**********************************************************************//
+//Function Prototypes
+EFI_STATUS OemAcpiSetPlatformId(IN OUT ACPI_HDR *AcpiHdr);
+
+
+
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/ACPI/oemDSDT.asl b/Board/EM/ACPI/oemDSDT.asl
new file mode 100644
index 0000000..8dc17b9
--- /dev/null
+++ b/Board/EM/ACPI/oemDSDT.asl
@@ -0,0 +1,246 @@
+// OEM DSDT file. Main ASL Board specific file.
+//**********************************************************************;
+//**********************************************************************;
+//**********************************************************************;
+//** **;
+//** (C)Copyright 1985-2005, American Megatrends, Inc. **;
+//** **;
+//** All Rights Reserved. **;
+//** **;
+//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **;
+//** **;
+//** Phone (770)-246-8600 **;
+//** **;
+//**********************************************************************;
+//**********************************************************************;
+//**********************************************************************;
+// $Header: /Alaska/BIN/Modules/ACPI/Template/Board/oemDSDT.asl 23 4/04/11 1:44p Yakovlevs $
+//
+// $Revision: 23 $
+//
+// $Date: 4/04/11 1:44p $
+//
+//****************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Modules/ACPI/Template/Board/oemDSDT.asl $
+//
+// 23 4/04/11 1:44p Yakovlevs
+// [TAG] EIP55906
+// [Category] Improvement
+// [Description] Can the _INI Method in BOARD\EM\ACPI\oemDSDT.asl be
+// Removed
+// [Files] OemDsdt.asl
+//
+// 22 9/28/09 6:40p Yakovlevs
+// Changes to support Multy Root resource reporting features.
+// All PCI ROOT resource reporting features moved to RbRes.asl
+//
+// 21 5/14/09 6:19p Yakovlevs
+//
+// 20 4/15/08 8:59p Yakovlevs
+// Keybord and Mouse specific mehods were moved in PS2K.ASL and PS2MS.ASL
+//
+// 2 5/20/07 8:09p Yakovlevs
+//
+// 19 3/23/07 10:52a Yakovlevs
+//
+// 18 12/31/06 2:49p Yakovlevs
+// Moved Chipset Specific Code to the SB module
+//
+// 17 2/16/06 10:01a Felixp
+//
+// 15 1/25/06 11:55a Felixp
+//
+// 11 12/05/05 10:04a Yakovlevs
+//
+// 10 11/04/05 5:49p Yakovlevs
+// Rearrange resources and resolve resource conflicts
+//
+// 9 10/07/05 2:52p Markw
+// Improved calling sequence of invoking methods.
+//
+// 8 9/29/05 4:13p Markw
+// Fix by Sergiy for video to turn on when Windows wakes up.
+//
+// 7 8/03/05 7:49a Felixp
+// breakpoint is commented out
+//
+// 6 5/31/05 12:13p Yakovlevs
+//
+// 5 5/24/05 7:29p Yakovlevs
+//
+// 4 5/18/05 12:06p Yakovlevs
+//
+// 3 5/05/05 6:42p Yakovlevs
+//
+// 2 5/05/05 6:39p Yakovlevs
+//
+// 1 4/26/05 11:50a Markw
+//
+// 2 3/24/05 5:13p Sivagarn
+// Code cleanup
+//
+// 1 3/24/05 5:00p Sivagarn
+//
+//****************************************************************************
+
+//----------------------------------------------------------------------
+// List of mandatory ASL objects to be defined in this file:
+// \_SB.PCI0._CRS Root PCI0 Bus (Compatibility bus) Current Resources
+// \_PTS METHOD CALLED BY OS PRIOR TO ENTER ANY SLEEP STATE
+// \_WAK METHOD CALLED ON WAKE UP FROM ANY SLEEP STATE
+//----------------------------------------------------------------------
+
+
+//----------------------------------------------------------------------
+// List of global variables defined in amlUpd.asl
+//----------------------------------------------------------------------
+// File defines OperationRegion "BIOS" and Field names that refer to the AML-BIOS POST data exchange memory area
+// Names MG1B, MG1L, MG2B, MG2L
+
+//----------------------------------------------------------------------
+// List of global variables and Control Methods defined in aslLIB.asl
+//----------------------------------------------------------------------
+// RRIO(4) & rDMA(3). Dummy control methods. Required when I/O Positive decoding is disabled
+// OSFL(). Control Method. Rreturn value is used to distinguish the currently running OS
+// PICM. Global Name. Returns current Interrupt controller mode; updated from _PIC control method
+// MCTH(Str1, Str2). Control Method. Compares Str1 and Str2. Return Zero if strings are different.
+// GPRW(Package(x,y)) Generic Wake up Control Method to detect the Max Sleep State available in ASL Name scope
+// and Return the Package compatible with _PRW format
+// WAKP(Package). Control Method. Returns package compatible with _WAK method
+// DBG8 & DBG9 - Debug OperationRegions used to display ASL checkpoints into LED CheckPoint Card
+
+//----------------------------------------------------------------------
+// List of global variables and Control Methods defined in PCItree.asl
+//----------------------------------------------------------------------
+// Processor packages. CPUn, n - CPU ID index. IDs must match to CPU IDs defined within ACPI APIC table(TBLACPI.DAT)
+// PCI device scope objects.
+// PCI0 - Root PCI Bus device scope
+// SBRG - South Bridge device scope (LPC bridge)
+// SBRG.xxxx - various Legacy IO devices
+// Note. Use "Scope" instruction wherever access to PCI Bridge, South Bridge OR Wake up capable PC device is needed.
+// All PCI devices are defined in PCItree.asl, which is generated by AMISDL utility
+// Naming convention for above generated PCI devices:
+// PCIx - Root PCI bus and all Peer PCI buses, x - Bus number.
+// PxPy - PCI to PCI bridge, x - Bus number PCI device is decoded on, y - produced PCI Bus number.
+// Hddf - Hot pluggable Slots, dd - device number, f - function number
+// SBRG - South Bridge PCI device
+//-----------------------------------------------------------------------
+
+// Note. AMISDL generates complete PCI Bus device tree based on information provided in SDL.
+// All the PCI devices are already defined. Use "Scope(DevName)" directives in order to
+// add objects to predefined Devices.
+
+
+//Scope(\_SB) { // System Bus scope
+//
+// Scope(PCI0) { // Root PCI0 Bus (Compatibility bus) device scope
+//
+// Method(_INI,0) { // Method to be called once during PCI0 Bus initialization
+// breakpoint
+// } // Place any Chipset/OEM required init code here
+// }
+//}
+
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _PTS
+// Description: METHOD IS CALLED BY OS PRIOR TO ENTER ANY SLEEP STATE
+// Input: Arg0 = Arg0 = Sleep state System about to enter
+// Output: Nothing
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Name (WOTB, 0)
+ Name (WSSB, 0)
+ Name (WAXB, 0)
+
+ Method(_PTS, 1) {
+
+ Store(Arg0, DBG8) // DBG8 name translates to IO port 80h
+ // DBG8 name defined in aslLib.asl
+//breakpoint
+ if (LAnd(LEqual(Arg0,4),LEqual(OSFL,2))){Sleep(3000)}
+
+ PTS(Arg0) // defined in DSDT.ASL (generated by ACPI.MAK)
+
+ Store(0, Index(WAKP,0)) // clear Wake up package.
+ Store(0, Index(WAKP,1)) // clear Wake up package.
+
+ Store (ASSB, WSSB)
+ Store (AOTB, WOTB)
+ Store (AAXB, WAXB)
+
+ Store(Arg0, ASSB) // Save Sleep Level for BIOS
+ Store(OSFL(), AOTB) // Save OS Type for BIOS
+ Store(Zero, AAXB) // Clear Auxiliary Buffer
+ Store(One, \_SB.SLPS)
+ }
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------/
+//
+// Procedure: _WAK
+// Description: METHOD CALLED ON WAKE UP FROM ANY SLEEP STATE
+// Input: Arg0 = Sleep state System is resuming from
+// Output: WAKP - return package for _WAK, 2 DWORDS
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(_WAK, 1)
+ {
+ ShiftLeft(Arg0, 4, DBG8) // DBG8 name translates to IO port 80h
+// breakpoint
+ WAK(Arg0) // defined in DSDT.ASL (generated by ACPI.MAK)
+
+ If (ASSB) {
+ Store (WSSB, ASSB)
+ Store (WOTB, AOTB)
+ Store (WAXB, AAXB)
+ }
+
+ // WAKP - return package for _WAK, 2 DWORDS
+ // 0 - Status
+ // 0x00000001 - wake was signaled but failed due to lack of power
+ // 0x00000002 - wake was signaled but failed due to thermal condition
+ // other bits are reserved
+ // 1 - PSS if non-zero, the effective S-state the Power Supply realy entered
+
+// Example of how to update the wake up status. Default : 0 - no errors encountered during wake up
+// Or(DeRefOf(Index(WAKP,0)), 0, Index(WAKP,0)) // update wake up status
+
+// update WAKP buffer with resume status
+
+ if(DeRefOf(Index(WAKP,0))) // non 0 : wake up was terminated
+ {
+ Store(0, Index(WAKP,1))
+ } else { // wake up to be completed
+ Store(Arg0, Index(WAKP,1))
+ }
+ Return(WAKP)
+
+ }
+
+
+
+
+//**********************************************************************;
+//**********************************************************************;
+//** **;
+//** (C)Copyright 1985-2005, American Megatrends, Inc. **;
+//** **;
+//** All Rights Reserved. **;
+//** **;
+//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **;
+//** **;
+//** Phone (770)-246-8600 **;
+//** **;
+//**********************************************************************;
+//**********************************************************************;
diff --git a/Board/EM/AMITSEBoard/AMITSEBoard.cif b/Board/EM/AMITSEBoard/AMITSEBoard.cif
new file mode 100644
index 0000000..4fca6e3
--- /dev/null
+++ b/Board/EM/AMITSEBoard/AMITSEBoard.cif
@@ -0,0 +1,15 @@
+<component>
+ name = "AMITSE - Board"
+ category = ModulePart
+ LocalRoot = "Board\Em\AMITSEBoard"
+ RefName = "AMITSEBoard"
+[files]
+"AMITSEBoard.sdl"
+"AMITSEBoard.mak"
+"OEMLogo.c"
+"OemkeyHook.c"
+"TseBoard.c"
+"TseOem.h"
+"TseOem.uni"
+"OemTokens.c"
+<endComponent>
diff --git a/Board/EM/AMITSEBoard/AMITSEBoard.mak b/Board/EM/AMITSEBoard/AMITSEBoard.mak
new file mode 100644
index 0000000..71ea859
--- /dev/null
+++ b/Board/EM/AMITSEBoard/AMITSEBoard.mak
@@ -0,0 +1,116 @@
+##*****************************************************************##
+##*****************************************************************##
+##*****************************************************************##
+##** **##
+##** (C)Copyright 2010, American Megatrends, Inc. **##
+##** **##
+##** All Rights Reserved. **##
+##** **##
+##** 5555 Oakbrook Pkwy, Building 200,Norcross, Georgia 30093 **##
+##** **##
+##** Phone (770)-246-8600 **##
+##** **##
+##*****************************************************************##
+##*****************************************************************##
+##*****************************************************************##
+## $Archive: /Alaska/BIN/Modules/AMITSE2_0/AMITSE/AMITSEBoard/AMITSEBoard.mak $
+##
+## $Author: Arunsb $
+##
+## $Revision: 6 $
+##
+## $Date: 10/18/12 6:34a $
+##
+##*****************************************************************##
+##*****************************************************************##
+## Revision History
+## ----------------
+## $Log: /Alaska/BIN/Modules/AMITSE2_0/AMITSE/AMITSEBoard/AMITSEBoard.mak $
+#
+# 6 10/18/12 6:34a Arunsb
+# Updated for 2.16.1235 QA submission
+##
+## 7 10/10/12 12:25p Arunsb
+## Synched the source for v2.16.1232 backup with Aptio
+#
+# 5 2/19/10 12:58p Madhans
+# Updated for TSE 2.01. Refer Changelog.log for File change history.
+##
+## 6 2/19/10 8:04a Mallikarjunanv
+## updated year in copyright message
+##
+## 5 1/29/10 5:15p Madhans
+## Support to add strings from other modules without changing TSE sources.
+##
+## 4 1/27/10 4:30a Mallikarjunanv
+## Added support for AMITSESDB
+##
+## 3 12/02/09 9:21a Mallikarjunanv
+## Fixed ithe eip 30925 by updating with new Elink TSE_LIB_INCLUDES for
+## board module
+##
+## 2 6/24/09 6:33p Madhans
+## Coding Standards
+#
+# 2 6/24/09 11:54a Blaines
+# Coding standard update
+#
+# 1 6/09/09 9:53a Madhans
+# TSE 2.00.1201
+##
+## 1 6/04/09 7:49p Madhans
+## AMI TSE Advanced.
+#
+# 1 4/28/09 11:03p Madhans
+# Tse 2.0 Code complete Checkin.
+##
+## 1 4/28/09 10:25p Madhans
+## Tse 2.0 Code complete Checkin.
+##
+##
+##*****************************************************************##
+##*****************************************************************##
+
+# MAK file for the eModule:TseLite
+
+TSE_BOARD_INCLUDES = $(TSE_LIB_INCLUDES)
+
+$(BUILD_DIR)\AMITseBoard.lib : AMITseBoardLib
+
+AMITseBoardLib : $(BUILD_DIR)\AMITseBoard.mak AMITseBoardBin
+
+$(BUILD_DIR)\AMITseBoard.mak : $(TSE_BOARD_DIR)\$(@B).cif $(TSE_BOARD_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(TSE_BOARD_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+AMITseBoardBin :
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\AMITseBoard.mak all\
+ "MY_INCLUDES=$(TSE_BOARD_INCLUDES)"\
+ "UNI_INCLUDE_PATH=$(TSEBIN_DIR) $(TSE_UNI_INCLUDE_PATH)"\
+ TYPE=LIBRARY \
+ "EXT_HEADERS=$(BUILD_DIR)\token.h"\
+ LIBRARY_NAME=$(BUILD_DIR)\AMITseBoard.lib\
+ "CFLAGS=$(CFLAGS) /DTSE_FOR_APTIO_4_50"
+
+AMITSESDB : TseBoardSDB
+
+TseBoardSDB : $(BUILD_DIR)\AMITseBoard.mak
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\AMITseBoard.mak all\
+ "UNI_INCLUDE_PATH=$(TSEBIN_DIR) $(TSE_UNI_INCLUDE_PATH)"\
+ "STRING_CONSUMERS=$(TSE_BOARD_DIR)\OemTokens.c"\
+ TYPE=SDB NAME=AMITseBoard
+##*****************************************************************##
+##*****************************************************************##
+##** **##
+##** (C)Copyright 2010, American Megatrends, Inc. **##
+##** **##
+##** All Rights Reserved. **##
+##** **##
+##** 5555 Oakbrook Pkwy, Building 200,Norcross, Georgia 30093 **##
+##** **##
+##** Phone (770)-246-8600 **##
+##** **##
+##*****************************************************************##
+##*****************************************************************##
+
diff --git a/Board/EM/AMITSEBoard/AMITSEBoard.sdl b/Board/EM/AMITSEBoard/AMITSEBoard.sdl
new file mode 100644
index 0000000..ecab390
--- /dev/null
+++ b/Board/EM/AMITSEBoard/AMITSEBoard.sdl
@@ -0,0 +1,58 @@
+TOKEN
+ Name = "TSE_BOARD_MODULE_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable TSE Board Module"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "TSE_BOARD_SOURCE_SUPPORT"
+ Value = "1"
+ Help = "Allow to use Board module sources"
+ TokenType = Boolean
+ TargetH = Yes
+ TargetMAK = Yes
+End
+
+PATH
+ Name = "TSE_BOARD_DIR"
+End
+
+MODULE
+ Help = "Includes AMITseBoard.mak to Project"
+ File = "AMITseBoard.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AMITseBoard.lib"
+ Parent = "MINISETUPLIB"
+ Priority = 70
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(TSE_BOARD_DIR)\OemTokens.c"
+ Parent = "TSE_STRING_CONSUMERS_LIST"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "-i $(TSE_BOARD_DIR)"
+ Parent = "TSE_UNI_INCLUDE_PATH"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AMITseBoard.sdb"
+ Parent = "TSE_SDBS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(TSE_BOARD_DIR)\TseOem.h"
+ Parent = "AMITSE_OEM_HEADER_LIST"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/AMITSEBoard/OEMLogo.c b/Board/EM/AMITSEBoard/OEMLogo.c
new file mode 100644
index 0000000..56462b7
--- /dev/null
+++ b/Board/EM/AMITSEBoard/OEMLogo.c
@@ -0,0 +1,88 @@
+//*****************************************************************//
+//*****************************************************************//
+//*****************************************************************//
+//** **//
+//** (C)Copyright 2010, American Megatrends, Inc. **//
+//** **//
+//** All Rights Reserved. **//
+//** **//
+//** 5555 Oakbrook Pkwy, Building 200,Norcross, Georgia 30093 **//
+//** **//
+//** Phone (770)-246-8600 **//
+//** **//
+//*****************************************************************//
+//*****************************************************************//
+//*****************************************************************//
+// $Archive: /Alaska/BIN/Modules/AMITSE2_0/AMITSE/AMITSEBoard/OEMLogo.c $
+//
+// $Author: Arunsb $
+//
+// $Revision: 5 $
+//
+// $Date: 10/18/12 6:34a $
+//
+//*****************************************************************//
+//*****************************************************************//
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Modules/AMITSE2_0/AMITSE/AMITSEBoard/OEMLogo.c $
+//
+// 5 10/18/12 6:34a Arunsb
+// Updated for 2.16.1235 QA submission
+//
+// 6 10/10/12 12:25p Arunsb
+// Synched the source for v2.16.1232 backup with Aptio
+//
+// 4 2/19/10 12:58p Madhans
+// Updated for TSE 2.01. Refer Changelog.log for File change history.
+//
+// 5 2/19/10 8:04a Mallikarjunanv
+// updated year in copyright message
+//
+// 4 1/09/10 2:49a Mallikarjunanv
+//
+// 3 8/13/09 7:27a Mallikarjunanv
+// EIP-25075: Updated files to keep the Board module empty
+//
+// 2 6/24/09 6:33p Madhans
+// Coding Standards
+//
+// 2 6/24/09 11:54a Blaines
+// Coding standard update
+//
+// 1 6/09/09 9:53a Madhans
+// TSE 2.00.1201
+//
+// 1 6/04/09 7:49p Madhans
+// AMI TSE Advanced.
+//
+// 1 4/28/09 11:03p Madhans
+// Tse 2.0 Code complete Checkin.
+//
+// 1 4/28/09 10:25p Madhans
+// Tse 2.0 Code complete Checkin.
+//
+//
+//*****************************************************************//
+//*****************************************************************//
+
+#include "token.h"
+#include <EFI.h>
+#include <Protocol/AMIPostMgr.h>
+
+///To implement OEM Logo customizations
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Building 200,Norcross, Georgia 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/AMITSEBoard/OemTokens.c b/Board/EM/AMITSEBoard/OemTokens.c
new file mode 100644
index 0000000..4a71f4b
--- /dev/null
+++ b/Board/EM/AMITSEBoard/OemTokens.c
@@ -0,0 +1,102 @@
+//*****************************************************************//
+//*****************************************************************//
+//*****************************************************************//
+//** **//
+//** (C)Copyright 2010, American Megatrends, Inc. **//
+//** **//
+//** All Rights Reserved. **//
+//** **//
+//** 5555 Oakbrook Pkwy, Norcross, Georgia 30093 **//
+//** **//
+//** Phone (770)-246-8600 **//
+//** **//
+//*****************************************************************//
+//*****************************************************************//
+//*****************************************************************//
+// $Archive: /Alaska/BIN/Modules/AMITSE2_0/AMITSE/AMITSEBoard/OemTokens.c $
+//
+// $Author: Arunsb $
+//
+// $Revision: 4 $
+//
+// $Date: 10/18/12 6:34a $
+//
+//*****************************************************************//
+//*****************************************************************//
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Modules/AMITSE2_0/AMITSE/AMITSEBoard/OemTokens.c $
+//
+// 4 10/18/12 6:34a Arunsb
+// Updated for 2.16.1235 QA submission
+//
+// 5 10/10/12 12:25p Arunsb
+// Synched the source for v2.16.1232 backup with Aptio
+//
+// 3 2/19/10 12:58p Madhans
+// Updated for TSE 2.01. Refer Changelog.log for File change history.
+//
+// 4 2/19/10 8:04a Mallikarjunanv
+// updated year in copyright message
+//
+// 3 1/29/10 5:15p Madhans
+// Support to add strings from other modules without changing TSE sources.
+//
+// 2 6/24/09 6:33p Madhans
+// Coding Standards
+//
+// 1 6/09/09 9:53a Madhans
+// TSE 2.00.1201
+//
+// 1 6/04/09 7:49p Madhans
+// AMI TSE Advanced.
+//
+// 2 5/07/09 10:35a Madhans
+// Changes after Bin module
+//
+// 1 4/28/09 11:03p Madhans
+// Tse 2.0 Code complete Checkin.
+//
+// 1 4/28/09 10:25p Madhans
+// Tse 2.0 Code complete Checkin.
+//
+//
+//*****************************************************************//
+//*****************************************************************//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: oemtokens.c
+//
+// Description:
+// This file does not add any code. It has, all the string tokens that
+// are used by Minisetup, to fake the usage to strgather.exe. Add to
+// this list, the new string tokens that are defined in
+// AmiTSEStrstr.uni and to be used by Minisetup
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+
+//Following code is to force strgatherer to include these strings
+#if 0
+
+
+#endif
+
+
+//*****************************************************************//
+//*****************************************************************//
+//*****************************************************************//
+//** **//
+//** (C)Copyright 2010, American Megatrends, Inc. **//
+//** **//
+//** All Rights Reserved. **//
+//** **//
+//** 5555 Oakbrook Pkwy, Norcross, Georgia 30093 **//
+//** **//
+//** Phone (770)-246-8600 **//
+//** **//
+//*****************************************************************//
+//*****************************************************************//
+//*****************************************************************//
diff --git a/Board/EM/AMITSEBoard/OemkeyHook.c b/Board/EM/AMITSEBoard/OemkeyHook.c
new file mode 100644
index 0000000..b5eaeed
--- /dev/null
+++ b/Board/EM/AMITSEBoard/OemkeyHook.c
@@ -0,0 +1,104 @@
+//*****************************************************************//
+//*****************************************************************//
+//*****************************************************************//
+//** **//
+//** (C)Copyright 2010, American Megatrends, Inc. **//
+//** **//
+//** All Rights Reserved. **//
+//** **//
+//** 5555 Oakbrook Pkwy, Building 200,Norcross, Georgia 30093 **//
+//** **//
+//** Phone (770)-246-8600 **//
+//** **//
+//*****************************************************************//
+//*****************************************************************//
+//*****************************************************************//
+// $Archive: /Alaska/BIN/Modules/AMITSE2_0/AMITSE/AMITSEBoard/OemkeyHook.c $
+//
+// $Author: Arunsb $
+//
+// $Revision: 6 $
+//
+// $Date: 10/18/12 6:34a $
+//
+//*****************************************************************//
+//*****************************************************************//
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Modules/AMITSE2_0/AMITSE/AMITSEBoard/OemkeyHook.c $
+//
+// 6 10/18/12 6:34a Arunsb
+// Updated for 2.16.1235 QA submission
+//
+// 5 10/10/12 12:25p Arunsb
+// Synched the source for v2.16.1232 backup with Aptio
+//
+// 5 2/19/10 12:58p Madhans
+// Updated for TSE 2.01. Refer Changelog.log for File change history.
+//
+// 4 2/19/10 8:04a Mallikarjunanv
+// updated year in copyright message
+//
+// 3 8/13/09 7:27a Mallikarjunanv
+// EIP-25075: Updated files to keep the Board module empty
+//
+// 2 6/24/09 6:33p Madhans
+// Coding Standards
+//
+// 2 6/24/09 11:54a Blaines
+// Coding standard update
+//
+// 1 6/09/09 9:53a Madhans
+// TSE 2.00.1201
+//
+// 1 6/04/09 7:49p Madhans
+// AMI TSE Advanced.
+//
+// 1 4/28/09 11:03p Madhans
+// Tse 2.0 Code complete Checkin.
+//
+// 1 4/28/09 10:25p Madhans
+// Tse 2.0 Code complete Checkin.
+//
+//
+//*****************************************************************//
+//*****************************************************************//
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: oemkeyhook.c
+//
+// Description: contains oemkey hook functions
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#ifdef TSE_FOR_APTIO_4_50
+
+#include "token.h"
+#include <EFI.h>
+
+#else //#ifdef TSE_FOR_APTIO_4_50
+
+#include "minisetup.h"
+
+#endif //#ifdef TSE_FOR_APTIO_4_50
+
+#include "bootflow.h"
+
+///To implement OEM key customizations
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Building 200,Norcross, Georgia 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/AMITSEBoard/TseBoard.c b/Board/EM/AMITSEBoard/TseBoard.c
new file mode 100644
index 0000000..5b4d262
--- /dev/null
+++ b/Board/EM/AMITSEBoard/TseBoard.c
@@ -0,0 +1,98 @@
+//*****************************************************************//
+//*****************************************************************//
+//*****************************************************************//
+//** **//
+//** (C)Copyright 2010, American Megatrends, Inc. **//
+//** **//
+//** All Rights Reserved. **//
+//** **//
+//** 5555 Oakbrook Pkwy, Building 200,Norcross, Georgia 30093 **//
+//** **//
+//** Phone (770)-246-8600 **//
+//** **//
+//*****************************************************************//
+//*****************************************************************//
+//*****************************************************************//
+// $Archive: /Alaska/BIN/Modules/AMITSE2_0/AMITSE/AMITSEBoard/TseBoard.c $
+//
+// $Author: Arunsb $
+//
+// $Revision: 6 $
+//
+// $Date: 10/18/12 6:34a $
+//
+//*****************************************************************//
+//*****************************************************************//
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Modules/AMITSE2_0/AMITSE/AMITSEBoard/TseBoard.c $
+//
+// 6 10/18/12 6:34a Arunsb
+// Updated for 2.16.1235 QA submission
+//
+// 7 10/10/12 12:25p Arunsb
+// Synched the source for v2.16.1232 backup with Aptio
+//
+// 5 2/19/10 12:58p Madhans
+// Updated for TSE 2.01. Refer Changelog.log for File change history.
+//
+// 6 2/19/10 8:04a Mallikarjunanv
+// updated year in copyright message
+//
+// 5 1/09/10 2:49a Mallikarjunanv
+// Updated TSE2.01 Release sources with coding standards
+//
+// 4 8/13/09 7:27a Mallikarjunanv
+// EIP-25075: Updated files to keep the Board module empty
+//
+// 3 8/03/09 7:54a Mallikarjunanv
+// Moved the IDE Security related hook functions from Tse Binary to Tse
+// Board Module
+//
+// 2 6/24/09 6:33p Madhans
+// Coding Standards
+//
+// 2 6/24/09 11:54a Blaines
+// Coding standard update
+//
+// 1 6/09/09 9:53a Madhans
+// TSE 2.00.1201
+//
+// 1 6/04/09 7:49p Madhans
+// AMI TSE Advanced.
+//
+// 1 4/28/09 11:03p Madhans
+// Tse 2.0 Code complete Checkin.
+//
+// 1 4/28/09 10:25p Madhans
+// Tse 2.0 Code complete Checkin.
+//
+//
+//*****************************************************************//
+//*****************************************************************//
+
+#include "token.h"
+#include <EFI.h>
+#include <Protocol/AMIPostMgr.h>
+#include "PwdLib.h"
+
+// This Module is to implement the OME Functions, which can be override the existing TSE functions.
+// For Example, UEFI Callback
+// If Board module handle the Passwordwith Formcallback and return sccuess then
+// TSE will not takecare of Password handling.
+
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Building 200,Norcross, Georgia 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/AMITSEBoard/TseOem.h b/Board/EM/AMITSEBoard/TseOem.h
new file mode 100644
index 0000000..c7e9f5e
--- /dev/null
+++ b/Board/EM/AMITSEBoard/TseOem.h
@@ -0,0 +1,113 @@
+//*****************************************************************//
+//*****************************************************************//
+//*****************************************************************//
+//** **//
+//** (C)Copyright 2010, American Megatrends, Inc. **//
+//** **//
+//** All Rights Reserved. **//
+//** **//
+//** 5555 Oakbrook Pkwy, Building 200,Norcross, Georgia 30093 **//
+//** **//
+//** Phone (770)-246-8600 **//
+//** **//
+//*****************************************************************//
+//*****************************************************************//
+//*****************************************************************//
+// $Archive: /Alaska/BIN/Modules/AMITSE2_0/AMITSE/AMITSEBoard/TseOem.h $
+//
+// $Author: Arunsb $
+//
+// $Revision: 3 $
+//
+// $Date: 10/18/12 6:34a $
+//
+//*****************************************************************//
+//*****************************************************************//
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Modules/AMITSE2_0/AMITSE/AMITSEBoard/TseOem.h $
+//
+// 3 10/18/12 6:34a Arunsb
+// Updated for 2.16.1235 QA submission
+//
+// 4 10/10/12 12:25p Arunsb
+// Synched the source for v2.16.1232 backup with Aptio
+//
+// 2 2/19/10 12:58p Madhans
+// Updated for TSE 2.01. Refer Changelog.log for File change history.
+//
+// 3 2/19/10 8:04a Mallikarjunanv
+// updated year in copyright message
+//
+// 2 6/24/09 6:33p Madhans
+// Coding Standards
+//
+// 1 6/09/09 9:53a Madhans
+// TSE 2.00.1201
+//
+// 1 6/04/09 7:49p Madhans
+// AMI TSE Advanced.
+//
+// 1 4/28/09 11:03p Madhans
+// Tse 2.0 Code complete Checkin.
+//
+// 1 4/28/09 10:25p Madhans
+// Tse 2.0 Code complete Checkin.
+//
+//
+//
+//
+//*****************************************************************//
+//*****************************************************************//
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: TseOem.h
+//
+// Description:
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#ifndef _TSEOEM_H_
+#define _TSEOEM_H_
+
+///dummy structure to avoid compilation errors (moved from AMIVfr.h)
+typedef struct _TSE_SETUP_DATA
+{
+ UINT16 BootCount;
+
+/* UINT16 TimeoutValue;
+ UINT8 Access;
+ UINT16 BootCount;
+ UINT16 BootValue;
+ UINT16 HardDiskCount;
+ UINT16 CDROMCount;
+ UINT16 FloppyCount;
+ UINT16 NetworkCount;
+ UINT16 BBSValue;
+ UINT16 AMICallback;
+ AMITSESETUP AmiTseSetup;
+ UINT8 Reserved2[100];
+*/
+}TSE_SETUP_DATA;
+
+
+
+#endif ///_TSEOEM_H_
+
+//*****************************************************************//
+//*****************************************************************//
+//*****************************************************************//
+//** **//
+//** (C)Copyright 2010, American Megatrends, Inc. **//
+//** **//
+//** All Rights Reserved. **//
+//** **//
+//** 5555 Oakbrook Pkwy, Building 200,Norcross, Georgia 30093 **//
+//** **//
+//** Phone (770)-246-8600 **//
+//** **//
+//*****************************************************************//
+//*****************************************************************//
+//*****************************************************************//
diff --git a/Board/EM/AMITSEBoard/TseOem.uni b/Board/EM/AMITSEBoard/TseOem.uni
new file mode 100644
index 0000000..b070f30
--- /dev/null
+++ b/Board/EM/AMITSEBoard/TseOem.uni
Binary files differ
diff --git a/Board/EM/AmiGopPolicy/AmiGopPolicy.c b/Board/EM/AmiGopPolicy/AmiGopPolicy.c
new file mode 100644
index 0000000..745a381
--- /dev/null
+++ b/Board/EM/AmiGopPolicy/AmiGopPolicy.c
@@ -0,0 +1,238 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/AmiGopPolicy/AmiGopPolicy.c 6 5/15/14 2:22a Jameswang $
+//
+// $Revision: 6 $
+//
+// $Date: 5/15/14 2:22a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/AmiGopPolicy/AmiGopPolicy.c $
+//
+// 6 5/15/14 2:22a Jameswang
+// [TAG] EIP168961
+// [Category] Improvement
+// [Description] Changed AmiGopOutputDp from AMI_GLOBAL_VARIABLE_GUID to
+// AMI_GOP_POLICY_VARIABLE_GUID
+//
+// 5 4/03/13 4:16a Josephlin
+// Fixed CPU Exception Erro if EdidOverrideProtoco got call.
+//
+// 4 12/18/12 11:03p Josephlin
+// [TAG] EIP108311
+// [Category] Improvement
+// [Description] Create eLINK "OemGopEdidOverrideGetEdidList" for easy
+// to implement EdidOverrideProtocol in project.
+// [Files] AmiGopPolicy.c
+// AmiGopPolicy.sdl
+// AmiGopPolicy.mak
+// AmiGopPolicyLib.c
+//
+// 3 11/08/12 12:58a Josephlin
+// [TAG] N/A
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] SCT Test Fail
+// [RootCause] EFI_GLOBAL_VARIABLE guid is used in non EFI defined
+// variable.
+// [Solution] New guid AMI_GLOBAL_VARIABLE_GUID is created and used.
+// [Files] AmiGopPolicy.c
+//
+// 2 7/26/12 7:30a Josephlin
+// Update File Header.
+//
+// 1 6/29/12 3:43a Josephlin
+// [TAG] EIP91970
+// [Category] New Feature
+// [Description] Initial Release for Display Switch with UEFI GOP driver
+// support.
+// [Files] AmiGopPolicy.cif
+// AmiGopPolicy.c
+// AmiGopPolicy.h
+// AmiGopPolicy.mak
+// AmiGopPolicy.sd
+// AmiGopPolicy.sdl
+// AmiGopPolicy.uni
+// AmiGopPolicyLib.c
+// AmiGopPolicySetup.c
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiGopPolicy.c
+//
+// Description: AmiGopPolicy output initialization in the DXE stage.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+//----------------------------------------------------------------------
+// Include(s)
+//----------------------------------------------------------------------
+
+#include <Efi.h>
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+#include <Setup.h>
+#include <token.h>
+
+#include <Protocol\DevicePath.h>
+#if OEM_EDID_OVERRIDE_PROTOCOL_SUPPORT
+#include <Protocol\EdidOverride.h>
+#endif
+#include "AmiGopPolicy.h"
+
+//----------------------------------------------------------------------
+// Constant, Macro and Type Definition(s)
+//----------------------------------------------------------------------
+// Constant Definition(s)
+
+// Macro Definition(s)
+
+// Type Definition(s)
+
+// Function Prototype(s)
+
+#if OEM_EDID_OVERRIDE_PROTOCOL_SUPPORT
+EFI_STATUS AmiGopEdidOverrideGetEdid (
+ IN EFI_EDID_OVERRIDE_PROTOCOL *This,
+ IN EFI_HANDLE *ChildHandle,
+ OUT UINT32 *Attributes,
+ IN OUT UINTN *EdidSize,
+ IN OUT UINT8 **Edid
+);
+#endif
+
+//----------------------------------------------------------------------
+// Variable and External Declaration(s)
+//----------------------------------------------------------------------
+// Variable Declaration(s)
+
+// GUID Definition(s)
+
+static EFI_GUID gAmiGopPolicyVariableGuid = AMI_GOP_POLICY_VARIABLE_GUID;
+
+// Protocol Definition(s)
+
+#if OEM_EDID_OVERRIDE_PROTOCOL_SUPPORT
+EFI_EDID_OVERRIDE_PROTOCOL EfiEdidOverrideProtocol = {
+ AmiGopEdidOverrideGetEdid
+};
+#endif
+
+// External Declaration(s)
+
+// Function Definition(s)
+
+VOID ConnectDevicePath(IN EFI_DEVICE_PATH_PROTOCOL *pPath);
+
+//----------------------------------------------------------------------
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+// Name: ConnectAmiGopPolicyConOut
+//
+// Description: None.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID ConnectAmiGopPolicyConOut (VOID)
+{
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *GopDevicePath = NULL;
+ UINTN VariableSize = 0;
+
+ Status = GetEfiVariable (
+ L"AmiGopOutputDp",
+ &gAmiGopPolicyVariableGuid,
+ NULL,
+ &VariableSize,
+ &GopDevicePath);
+ if ((EFI_ERROR(Status)) || (GopDevicePath == NULL)) return ;
+
+ ConnectDevicePath(GopDevicePath);
+
+ return;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+//
+// Procedure: AmiGopPolicyEntryPoint
+//
+// Description: Installs GOP related protocols
+//
+// Input:
+// IN EFI_HANDLE ImageHandle,
+// IN EFI_SYSTEM_TABLE *SystemTable
+//
+// Output:
+// EFI_STATUS
+//
+// Modified:
+// None
+//
+// Referrals: InitAmiLib InstallMultipleProtocolInterfaces
+//
+// Notes:
+// Here is the control flow of this function:
+// 1. Initialize Ami Lib.
+// 2. Install Driver Binding Protocol
+// 3. Return EFI_SUCCESS.
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS AmiGopPolicyEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+#if OEM_EDID_OVERRIDE_PROTOCOL_SUPPORT
+ EFI_HANDLE Handle = NULL;
+
+ InitAmiLib( ImageHandle, SystemTable );
+
+ Status = pBS->InstallMultipleProtocolInterfaces(
+ &Handle,
+ &gEfiEdidOverrideProtocolGuid,
+ &EfiEdidOverrideProtocol,
+ NULL );
+#endif
+ return Status;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/AmiGopPolicy/AmiGopPolicy.chm b/Board/EM/AmiGopPolicy/AmiGopPolicy.chm
new file mode 100644
index 0000000..3d9e8d3
--- /dev/null
+++ b/Board/EM/AmiGopPolicy/AmiGopPolicy.chm
Binary files differ
diff --git a/Board/EM/AmiGopPolicy/AmiGopPolicy.cif b/Board/EM/AmiGopPolicy/AmiGopPolicy.cif
new file mode 100644
index 0000000..b5fe2f1
--- /dev/null
+++ b/Board/EM/AmiGopPolicy/AmiGopPolicy.cif
@@ -0,0 +1,16 @@
+<component>
+ name = "AmiGopPolicy"
+ category = eModule
+ LocalRoot = "Board\eM\AmiGopPolicy"
+ RefName = "AmiGopPolicy"
+[files]
+"AmiGopPolicy.c"
+"AmiGopPolicy.h"
+"AmiGopPolicy.chm"
+"AmiGopPolicy.mak"
+"AmiGopPolicy.sd"
+"AmiGopPolicy.sdl"
+"AmiGopPolicy.uni"
+"AmiGopPolicyLib.c"
+"AmiGopPolicySetup.c"
+<endComponent>
diff --git a/Board/EM/AmiGopPolicy/AmiGopPolicy.h b/Board/EM/AmiGopPolicy/AmiGopPolicy.h
new file mode 100644
index 0000000..db3910f
--- /dev/null
+++ b/Board/EM/AmiGopPolicy/AmiGopPolicy.h
@@ -0,0 +1,96 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/AmiGopPolicy/AmiGopPolicy.h 3 5/15/14 2:39a Jameswang $
+//
+// $Revision: 3 $
+//
+// $Date: 5/15/14 2:39a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/AmiGopPolicy/AmiGopPolicy.h $
+//
+// 3 5/15/14 2:39a Jameswang
+// [TAG] EIP168961
+// [Category] New Feature
+// [Description] Added AMI_GOP_POLICY_VARIABLE_GUID.
+//
+// 2 7/26/12 7:30a Josephlin
+// Update File Header.
+//
+// 1 6/29/12 3:43a Josephlin
+// [TAG] EIP91970
+// [Category] New Feature
+// [Description] Initial Release for Display Switch with UEFI GOP driver
+// support.
+// [Files] AmiGopPolicy.cif
+// AmiGopPolicy.c
+// AmiGopPolicy.h
+// AmiGopPolicy.mak
+// AmiGopPolicy.sd
+// AmiGopPolicy.sdl
+// AmiGopPolicy.uni
+// AmiGopPolicyLib.c
+// AmiGopPolicySetup.c
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiGopPolicy.h
+//
+// Description: AmiGopPolicy Header File.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifndef _AMI_GOP_POLICY_H_
+#define _AMI_GOP_POLICY_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define AMI_GOP_POLICY_VARIABLE_GUID \
+ {0xc143929c, 0xbf5d, 0x423b, 0x99, 0x9b, 0xf, 0x2d, 0xd2, 0xb6, 0x1f, 0xf7}
+
+#pragma pack(1)
+
+typedef struct _AMI_GOP_POLICY_SETUP_DATA
+{
+ UINT8 GopDeviceCount;
+ UINT8 GopOutputCount;
+} AMI_GOP_POLICY_SETUP_DATA;
+
+#pragma pack()
+
+/****** DO NOT WRITE BELOW THIS LINE *******/
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/AmiGopPolicy/AmiGopPolicy.mak b/Board/EM/AmiGopPolicy/AmiGopPolicy.mak
new file mode 100644
index 0000000..ea48a5d
--- /dev/null
+++ b/Board/EM/AmiGopPolicy/AmiGopPolicy.mak
@@ -0,0 +1,124 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/AmiGopPolicy/AmiGopPolicy.mak 5 12/18/12 11:03p Josephlin $
+#
+# $Revision: 5 $
+#
+# $Date: 12/18/12 11:03p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/AmiGopPolicy/AmiGopPolicy.mak $
+#
+# 5 12/18/12 11:03p Josephlin
+# [TAG] EIP108311
+# [Category] Improvement
+# [Description] Create eLINK "OemGopEdidOverrideGetEdidList" for easy
+# to implement EdidOverrideProtocol in project.
+# [Files] AmiGopPolicy.c
+# AmiGopPolicy.sdl
+# AmiGopPolicy.mak
+# AmiGopPolicyLib.c
+#
+# 4 7/26/12 7:30a Josephlin
+# Update File Header.
+#
+# 3 7/23/12 5:20a Josephlin
+# Fixed build error occured in VIA platform issue.
+#
+# 2 7/23/12 3:32a Josephlin
+# 1. Added input argument SetupData for eLink OemGopSwitchHookList.
+# 2. Created token "AmiGopPolicySetupFile" and "AmiGopPolicySetupString"
+# for override sd and uni file.
+# 3. Rename AmiGopPolicyCallback to AmiGopSwitchCallback in case user
+# confuse.
+#
+# 1 6/29/12 3:44a Josephlin
+# [TAG] EIP91970
+# [Category] New Feature
+# [Description] Initial Release for Display Switch with UEFI GOP driver
+# support.
+# [Files] AmiGopPolicy.cif
+# AmiGopPolicy.c
+# AmiGopPolicy.h
+# AmiGopPolicy.mak
+# AmiGopPolicy.sd
+# AmiGopPolicy.sdl
+# AmiGopPolicy.uni
+# AmiGopPolicyLib.c
+# AmiGopPolicySetup.c
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: AmiGopPolicy.mak
+#
+# Description: Make file that builds AmiGopPolicy components and link
+# them to respective binary.
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+all : AmiGopPolicy
+
+AmiGopPolicy : $(BUILD_DIR)\AmiGopPolicy.mak
+
+#----------------------------------------------------------------------
+# Generic eModule dependencies
+#----------------------------------------------------------------------
+$(BUILD_DIR)\AmiGopPolicy.mak : $(AMIGOPPOLICY_DIR)\AmiGopPolicy.cif $(AMIGOPPOLICY_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(AMIGOPPOLICY_DIR)\AmiGopPolicy.cif $(CIF2MAK_DEFAULTS)
+
+AMI_CSP_LIB_OBJS = $(AMI_CSP_LIB_OBJS) \
+$(BUILD_DIR)\AmiGopPolicy.obj \
+$(BUILD_DIR)\AmiGopPolicyLib.obj
+
+{$(AMIGOPPOLICY_DIR)}.c{$(BUILD_DIR)}.obj::
+ $(CC) $(CFLAGS) \
+ /D\"OEM_GOP_DEVICE_CHECK_LIST=$(OemGopDeviceCheckList)\"\
+ /D\"OEM_GOP_SWITCH_HOOK_LIST=$(OemGopSwitchHookList)\"\
+ /D\"OEM_GOP_EDID_OVERRIDE_GET_EDID_LIST=$(OemGopEdidOverrideGetEdidList)\"\
+ /Fo$(BUILD_DIR)\ $<
+
+$(BUILD_DIR)\AmiGopPolicy.obj : $(AMIGOPPOLICY_DIR)\AmiGopPolicy.c
+$(BUILD_DIR)\AmiGopPolicyLib.obj : $(AMIGOPPOLICY_DIR)\AmiGopPolicyLib.c
+
+#----------------------------------------------------------------------
+# Create eModule Setup Screens
+#----------------------------------------------------------------------
+SetupSdbs : $(BUILD_DIR)\AmiGopPolicy.sdb
+SetupBin : $(BUILD_DIR)\AmiGopPolicySetup.obj $(AMICSPLib)
+
+$(BUILD_DIR)\AmiGopPolicy.sdb : $(AmiGopPolicySetupData) $(AmiGopPolicySetupString)
+ $(STRGATHER) -i INCLUDE -parse -newdb -db $(BUILD_DIR)\AmiGopPolicy.sdb $(AmiGopPolicySetupString)
+ $(STRGATHER) -scan -db $(BUILD_DIR)\AmiGopPolicy.sdb -od $(BUILD_DIR)\AmiGopPolicy.sdb $(AmiGopPolicySetupData)
+
+$(BUILD_DIR)\AmiGopPolicySetup.obj : $(AMIGOPPOLICY_DIR)\AmiGopPolicySetup.c $(BUILD_DIR)\SetupStrTokens.h
+ $(CC) $(CFLAGS) /Fo$(BUILD_DIR)\ $(AMIGOPPOLICY_DIR)\AmiGopPolicySetup.c
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#********************************************************************** \ No newline at end of file
diff --git a/Board/EM/AmiGopPolicy/AmiGopPolicy.sd b/Board/EM/AmiGopPolicy/AmiGopPolicy.sd
new file mode 100644
index 0000000..4bdc910
--- /dev/null
+++ b/Board/EM/AmiGopPolicy/AmiGopPolicy.sd
@@ -0,0 +1,254 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/AmiGopPolicy/AmiGopPolicy.sd 3 6/26/14 3:19a Josephlin $
+//
+// $Revision: 3 $
+//
+// $Date: 6/26/14 3:19a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/AmiGopPolicy/AmiGopPolicy.sd $
+//
+// 3 6/26/14 3:19a Josephlin
+// [TAG] EIP168961
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] All output device are displayed to "Unknow" if CSM has not
+// disabled.
+// [RootCause] In EIP168961, this module had changed module specific
+// variable's GUID not equal to AMI_GLOBAL_VARIABLE_GUID but without
+// changed AmiGopPolicy.sd.
+// [Solution] Change guid from SETUP_GUID to
+// AMI_GOP_POLICY_VARIABLE_GUID.
+// [Files] AmiGopPolicy.sd
+//
+// 2 7/26/12 7:30a Josephlin
+// Update File Header.
+//
+// 1 6/29/12 3:44a Josephlin
+// [TAG] EIP91970
+// [Category] New Feature
+// [Description] Initial Release for Display Switch with UEFI GOP driver
+// support.
+// [Files] AmiGopPolicy.cif
+// AmiGopPolicy.c
+// AmiGopPolicy.h
+// AmiGopPolicy.mak
+// AmiGopPolicy.sd
+// AmiGopPolicy.sdl
+// AmiGopPolicy.uni
+// AmiGopPolicyLib.c
+// AmiGopPolicySetup.c
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiGopPolicy.sd
+//
+// Description: AmiGopPolicy Setup Form.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifdef SETUP_DATA_DEFINITION
+// Put NVRAM data definitions here.
+// For example: UINT8 Data1;
+// These definitions will be converted by the build process
+// to a definitions of SETUP_DATA fields.
+ UINT8 GopOutputSelect;
+#endif //SETUP_DATA_DEFINITION
+
+#ifdef FORM_SET_TYPEDEF
+ #include "AmiGopPolicy.h"
+#endif
+
+//Select Top level menu itmem (forset) for you pages
+#ifdef ADVANCED_FORM_SET
+ #ifndef SUPPRESS_GRAYOUT_ENDIF //old Core
+ #define SUPPRESS_GRAYOUT_ENDIF endif;
+ #endif
+
+ #ifdef FORM_SET_VARSTORE
+ varstore AMI_GOP_POLICY_SETUP_DATA,
+ key = AUTO_ID(AMI_GOP_POLICY_SETUP_DATA_ID),
+ name = AmiGopPolicySetupData,
+ guid = AMI_GOP_POLICY_VARIABLE_GUID;
+ #endif
+
+#ifdef FORM_SET_GOTO
+// Define goto commands for the forms defined in this file
+// goto ID_OF_MY_FORM,
+// prompt = STRING_TOKEN(STR_FORM_TITLE),
+// help = STRING_TOKEN(STR_FORM_HELP);
+ suppressif ideqval AMI_GOP_POLICY_SETUP_DATA.GopDeviceCount == 0x0;
+ goto AGP_FORM_ID,
+ prompt = STRING_TOKEN(STR_TITLE),
+ help = STRING_TOKEN(STR_TITLE_HELP);
+ endif; //suppressif GopDeviceCount < 1
+#endif //FORM_SET_GOTO
+
+#ifdef FORM_SET_FORM
+// Define forms
+// form formid = AUTO_ID(ID_OF_MY_FORM),
+// title = STRING_TOKEN(STR_FORM_TITLE);
+// endform;
+ form formid = AUTO_ID(AGP_FORM_ID),
+ title = STRING_TOKEN(STR_TITLE);
+
+ //suppressif ideqval AMI_GOP_POLICY_SETUP_DATA.GopDeviceCount == 0x0;
+ SUBTITLE(STRING_TOKEN(STR_GOP_DEVICE_NAME_0))
+ SUBTITLE(STRING_TOKEN(STR_GOP_DRIVER_NAME_0))
+
+ suppressif NOT ideqval AMI_GOP_POLICY_SETUP_DATA.GopOutputCount == 0x1;
+ oneof varid = SETUP_DATA.GopOutputSelect,
+ prompt = STRING_TOKEN(STR_GOP_OUTPUT_SELECT),
+ help = STRING_TOKEN(STR_GOP_OUTPUT_HELP),
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_0), value = 0, flags = DEFAULT | MANUFACTURING | INTERACTIVE, key = AUTO_ID(AGP_KEY_0);
+ endoneof;
+ endif; //suppressif GopOutputCount != 1
+
+ suppressif NOT ideqval AMI_GOP_POLICY_SETUP_DATA.GopOutputCount == 0x2;
+ oneof varid = SETUP_DATA.GopOutputSelect,
+ prompt = STRING_TOKEN(STR_GOP_OUTPUT_SELECT),
+ help = STRING_TOKEN(STR_GOP_OUTPUT_HELP),
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_0), value = 0, flags = DEFAULT | MANUFACTURING | INTERACTIVE, key = AUTO_ID(AGP_KEY_1);
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_1), value = 1, flags = 0;
+ endoneof;
+ endif; //suppressif GopOutputCount != 2
+
+ suppressif NOT ideqval AMI_GOP_POLICY_SETUP_DATA.GopOutputCount == 0x3;
+ oneof varid = SETUP_DATA.GopOutputSelect,
+ prompt = STRING_TOKEN(STR_GOP_OUTPUT_SELECT),
+ help = STRING_TOKEN(STR_GOP_OUTPUT_HELP),
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_0), value = 0, flags = DEFAULT | MANUFACTURING | INTERACTIVE, key = AUTO_ID(AGP_KEY_2);
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_1), value = 1, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_2), value = 2, flags = 0;
+ endoneof;
+ endif; //suppressif GopOutputCount != 3
+
+ suppressif NOT ideqval AMI_GOP_POLICY_SETUP_DATA.GopOutputCount == 0x4;
+ oneof varid = SETUP_DATA.GopOutputSelect,
+ prompt = STRING_TOKEN(STR_GOP_OUTPUT_SELECT),
+ help = STRING_TOKEN(STR_GOP_OUTPUT_HELP),
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_0), value = 0, flags = DEFAULT | MANUFACTURING | INTERACTIVE, key = AUTO_ID(AGP_KEY_3);
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_1), value = 1, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_2), value = 2, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_3), value = 3, flags = 0;
+ endoneof;
+ endif; //suppressif GopOutputCount != 4
+
+ suppressif NOT ideqval AMI_GOP_POLICY_SETUP_DATA.GopOutputCount == 0x5;
+ oneof varid = SETUP_DATA.GopOutputSelect,
+ prompt = STRING_TOKEN(STR_GOP_OUTPUT_SELECT),
+ help = STRING_TOKEN(STR_GOP_OUTPUT_HELP),
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_0), value = 0, flags = DEFAULT | MANUFACTURING | INTERACTIVE, key = AUTO_ID(AGP_KEY_4);
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_1), value = 1, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_2), value = 2, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_3), value = 3, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_4), value = 4, flags = 0;
+ endoneof;
+ endif; //suppressif GopOutputCount != 5
+
+ suppressif NOT ideqval AMI_GOP_POLICY_SETUP_DATA.GopOutputCount == 0x6;
+ oneof varid = SETUP_DATA.GopOutputSelect,
+ prompt = STRING_TOKEN(STR_GOP_OUTPUT_SELECT),
+ help = STRING_TOKEN(STR_GOP_OUTPUT_HELP),
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_0), value = 0, flags = DEFAULT | MANUFACTURING | INTERACTIVE, key = AUTO_ID(AGP_KEY_5);
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_1), value = 1, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_2), value = 2, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_3), value = 3, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_4), value = 4, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_5), value = 5, flags = 0;
+ endoneof;
+ endif; //suppressif GopOutputCount != 6
+
+ suppressif NOT ideqval AMI_GOP_POLICY_SETUP_DATA.GopOutputCount == 0x7;
+ oneof varid = SETUP_DATA.GopOutputSelect,
+ prompt = STRING_TOKEN(STR_GOP_OUTPUT_SELECT),
+ help = STRING_TOKEN(STR_GOP_OUTPUT_HELP),
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_0), value = 0, flags = DEFAULT | MANUFACTURING | INTERACTIVE, key = AUTO_ID(AGP_KEY_6);
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_1), value = 1, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_2), value = 2, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_3), value = 3, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_4), value = 4, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_5), value = 5, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_6), value = 6, flags = 0;
+ endoneof;
+ endif; //suppressif GopOutputCount != 7
+
+ suppressif NOT ideqval AMI_GOP_POLICY_SETUP_DATA.GopOutputCount == 0x8;
+ oneof varid = SETUP_DATA.GopOutputSelect,
+ prompt = STRING_TOKEN(STR_GOP_OUTPUT_SELECT),
+ help = STRING_TOKEN(STR_GOP_OUTPUT_HELP),
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_0), value = 0, flags = DEFAULT | MANUFACTURING | INTERACTIVE, key = AUTO_ID(AGP_KEY_7);
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_1), value = 1, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_2), value = 2, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_3), value = 3, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_4), value = 4, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_5), value = 5, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_6), value = 6, flags = 0;
+ option text = STRING_TOKEN(STR_GOP_OUTPUT_NAME_7), value = 7, flags = 0;
+ endoneof;
+ endif; //suppressif GopOutputCount != 8
+ //endif; //suppressif GopDeviceCount < 1
+/*
+ SEPARATOR
+
+ suppressif ideqval AMI_GOP_POLICY_SETUP_DATA.GopDeviceCount == 0x0 OR
+ ideqval AMI_GOP_POLICY_SETUP_DATA.GopDeviceCount == 0x1;
+ SUBTITLE(STRING_TOKEN(STR_GOP_DEVICE_NAME_1))
+ SUBTITLE(STRING_TOKEN(STR_GOP_DRIVER_NAME_1))
+ endif; //suppressif GopDeviceCount < 2
+
+ SEPARATOR
+
+ suppressif ideqval AMI_GOP_POLICY_SETUP_DATA.GopDeviceCount == 0x0 OR
+ ideqval AMI_GOP_POLICY_SETUP_DATA.GopDeviceCount == 0x1 OR
+ ideqval AMI_GOP_POLICY_SETUP_DATA.GopDeviceCount == 0x2;
+ SUBTITLE(STRING_TOKEN(STR_GOP_DEVICE_NAME_2))
+ SUBTITLE(STRING_TOKEN(STR_GOP_DRIVER_NAME_2))
+ endif; //suppressif GopDeviceCount < 3
+
+ SEPARATOR
+
+ suppressif ideqval AMI_GOP_POLICY_SETUP_DATA.GopDeviceCount == 0x0 OR
+ ideqval AMI_GOP_POLICY_SETUP_DATA.GopDeviceCount == 0x1 OR
+ ideqval AMI_GOP_POLICY_SETUP_DATA.GopDeviceCount == 0x2 OR
+ ideqval AMI_GOP_POLICY_SETUP_DATA.GopDeviceCount == 0x3;
+ SUBTITLE(STRING_TOKEN(STR_GOP_DEVICE_NAME_3))
+ SUBTITLE(STRING_TOKEN(STR_GOP_DRIVER_NAME_3))
+ endif; //suppressif GopDeviceCount < 4
+*/
+ endform;
+
+#endif //FORM_SET_FORM
+
+#endif //ADVANCED_FORM_SET
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/AmiGopPolicy/AmiGopPolicy.sdl b/Board/EM/AmiGopPolicy/AmiGopPolicy.sdl
new file mode 100644
index 0000000..61cbe39
--- /dev/null
+++ b/Board/EM/AmiGopPolicy/AmiGopPolicy.sdl
@@ -0,0 +1,268 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/AmiGopPolicy/AmiGopPolicy.sdl 5 12/18/12 11:02p Josephlin $
+#
+# $Revision: 5 $
+#
+# $Date: 12/18/12 11:02p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/AmiGopPolicy/AmiGopPolicy.sdl $
+#
+# 5 12/18/12 11:02p Josephlin
+# [TAG] EIP108311
+# [Category] Improvement
+# [Description] Create eLINK "OemGopEdidOverrideGetEdidList" for easy
+# to implement EdidOverrideProtocol in project.
+# [Files] AmiGopPolicy.c
+# AmiGopPolicy.sdl
+# AmiGopPolicy.mak
+# AmiGopPolicyLib.c
+#
+# 4 7/26/12 7:30a Josephlin
+# Update File Header.
+#
+# 3 7/25/12 5:29a Josephlin
+# [TAG] EIP93957
+# [Category] Improvement
+# [Description] Added ELINK for sd and uni file overriding. This would
+# be more flexible then we are using token.
+# [Files] AmiGopPolicy.sdl
+#
+# 2 7/23/12 3:32a Josephlin
+# 1. Added input argument SetupData for eLink OemGopSwitchHookList.
+# 2. Created token "AmiGopPolicySetupFile" and "AmiGopPolicySetupString"
+# for override sd and uni file.
+# 3. Rename AmiGopPolicyCallback to AmiGopSwitchCallback in case user
+# confuse.
+#
+# 1 6/29/12 3:44a Josephlin
+# [TAG] EIP91970
+# [Category] New Feature
+# [Description] Initial Release for Display Switch with UEFI GOP driver
+# support.
+# [Files] AmiGopPolicy.cif
+# AmiGopPolicy.c
+# AmiGopPolicy.h
+# AmiGopPolicy.mak
+# AmiGopPolicy.sd
+# AmiGopPolicy.sdl
+# AmiGopPolicy.uni
+# AmiGopPolicyLib.c
+# AmiGopPolicySetup.c
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: AmiGopPolicy.sdl
+#
+# Description: AmiGopPolicy parameters file.
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "AmiGopPolicy"
+ Value = "1"
+ Help = "Main Switch to Enable AmiGopPolicy in Platform"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "OEM_EDID_OVERRIDE_PROTOCOL_SUPPORT"
+ Value = "0"
+ Help = "If set, Include EDID Override Protocol support in Project."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "AmiGopPolicySetupData"
+ Value = "$(AMI_GOP_POLICY_SD_FILE)"
+ TokenType = File
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "AmiGopPolicySetupString"
+ Value = "$(AMI_GOP_POLICY_UNI_FILE)"
+ TokenType = File
+ TargetMAK = Yes
+End
+
+PATH
+ Name = "AMIGOPPOLICY_DIR"
+End
+
+MODULE
+ File = "AmiGopPolicy.mak"
+End
+
+ELINK
+ Name = "AMI_GOP_POLICY_SD_FILE"
+ Help = "AmiGopPolicy Setup Data file. Note: This eLink only permit to include one file."
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "AMI_GOP_POLICY_UNI_FILE"
+ Help = "AmiGopPolicy Setup Data file. Note: This eLink only permit to include one file."
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(AMIGOPPOLICY_DIR)\AmiGopPolicy.sd"
+ Parent = "AMI_GOP_POLICY_SD_FILE"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(AMIGOPPOLICY_DIR)\AmiGopPolicy.uni"
+ Parent = "AMI_GOP_POLICY_UNI_FILE"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ConnectAmiGopPolicyConOut,"
+ Parent = "ConnectVgaConOut,"
+ InvokeOrder = BeforeParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AmiGopPolicy.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 90
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(AmiGopPolicySetupData)"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 90
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "InitAmiGopPolicyStrings,"
+ Parent = "SetupStringInit"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "AmiGopPolicyEntryPoint,"
+ Parent = "BdsEntryInitialize"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "OemGopDeviceCheckList"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "AmiDefaultGopDeviceCheck,"
+ Parent = "OemGopDeviceCheckList"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "OemGopSwitchHookList"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "AmiDefaultGopSwitchFunction,"
+ Parent = "OemGopSwitchHookList"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "OemGopEdidOverrideGetEdidList"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "AmiDefaultGopEdidOverrideGetEdid,"
+ Parent = "OemGopEdidOverrideGetEdidList"
+ Token = "OEM_EDID_OVERRIDE_PROTOCOL_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,AGP_KEY_0,AmiGopSwitchCallback),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,AGP_KEY_1,AmiGopSwitchCallback),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,AGP_KEY_2,AmiGopSwitchCallback),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,AGP_KEY_3,AmiGopSwitchCallback),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,AGP_KEY_4,AmiGopSwitchCallback),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,AGP_KEY_5,AmiGopSwitchCallback),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,AGP_KEY_6,AmiGopSwitchCallback),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,AGP_KEY_7,AmiGopSwitchCallback),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/AmiGopPolicy/AmiGopPolicy.uni b/Board/EM/AmiGopPolicy/AmiGopPolicy.uni
new file mode 100644
index 0000000..5d15b5b
--- /dev/null
+++ b/Board/EM/AmiGopPolicy/AmiGopPolicy.uni
Binary files differ
diff --git a/Board/EM/AmiGopPolicy/AmiGopPolicyLib.c b/Board/EM/AmiGopPolicy/AmiGopPolicyLib.c
new file mode 100644
index 0000000..00d9f3c
--- /dev/null
+++ b/Board/EM/AmiGopPolicy/AmiGopPolicyLib.c
@@ -0,0 +1,461 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/AmiGopPolicy/AmiGopPolicyLib.c 9 12/18/12 11:04p Josephlin $
+//
+// $Revision: 9 $
+//
+// $Date: 12/18/12 11:04p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/AmiGopPolicy/AmiGopPolicyLib.c $
+//
+// 9 12/18/12 11:04p Josephlin
+// [TAG] EIP108311
+// [Category] Improvement
+// [Description] Create eLINK "OemGopEdidOverrideGetEdidList" for easy
+// to implement EdidOverrideProtocol in project.
+// [Files] AmiGopPolicy.c
+// AmiGopPolicy.sdl
+// AmiGopPolicy.mak
+// AmiGopPolicyLib.c
+//
+// 8 10/29/12 5:53a Josephlin
+// [TAG] EIP103432
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] System hang up druing display switching with external GOP
+// card.
+// [RootCause] Compiler optimize issue.
+// [Solution] Using the optimize pragma to prevent system hang up druing
+// display switching.
+//
+// 7 8/23/12 5:50a Josephlin
+// Change eLink handling processing to consider the hierarchy of
+// xxxxxHookList. This is able to avoid that get incorrect status.
+//
+// 6 8/23/12 2:41a Josephlin
+// Remove unnecessary conditionally including to fix build fail problem if
+// CSM_SUPPORT = OFF.
+//
+// 5 7/30/12 5:31a Josephlin
+// Removed bus number checking in AmiDefaultGopDeviceCheck() to consider
+// the DSC-only platform supporting.
+//
+// 3 7/26/12 7:30a Josephlin
+// Update File Header.
+//
+// 2 7/23/12 3:32a Josephlin
+// 1. Added input argument SetupData for eLink OemGopSwitchHookList.
+// 2. Created token "AmiGopPolicySetupFile" and "AmiGopPolicySetupString"
+// for override sd and uni file.
+// 3. Rename AmiGopPolicyCallback to AmiGopSwitchCallback in case user
+// confuse.
+//
+// 1 6/29/12 3:44a Josephlin
+// [TAG] EIP91970
+// [Category] New Feature
+// [Description] Initial Release for Display Switch with UEFI GOP driver
+// support.
+// [Files] AmiGopPolicy.cif
+// AmiGopPolicy.c
+// AmiGopPolicy.h
+// AmiGopPolicy.mak
+// AmiGopPolicy.sd
+// AmiGopPolicy.sdl
+// AmiGopPolicy.uni
+// AmiGopPolicyLib.c
+// AmiGopPolicySetup.c
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiGopPolicyLib.c
+//
+// Description: AmiGopPolicy initialization code in the Library stage
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+//----------------------------------------------------------------------
+// Include(s)
+//----------------------------------------------------------------------
+
+#include <Efi.h>
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+#include <Setup.h>
+#include <token.h>
+#include <AmiLoadCsmPolicy.h>
+
+#include <Protocol\DevicePath.h>
+#if OEM_EDID_OVERRIDE_PROTOCOL_SUPPORT
+#include <Protocol\EdidOverride.h>
+#endif
+
+//----------------------------------------------------------------------
+// Constant, Macro and Type Definition(s)
+//----------------------------------------------------------------------
+// Constant Definition(s)
+
+// Macro Definition(s)
+
+// Type Definition(s)
+
+typedef EFI_STATUS (OEM_GOP_DEVICE_CHECK) (
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE DriverBindingHandle,
+ IN EFI_PCI_IO_PROTOCOL *PciIo
+);
+
+typedef EFI_STATUS (OEM_GOP_SWITCH_HOOK) (
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE DriverBindingHandle,
+ IN SETUP_DATA *SetupData,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
+);
+
+#if OEM_EDID_OVERRIDE_PROTOCOL_SUPPORT
+typedef EFI_STATUS (OEM_GOP_EDID_OVERRIDE_GET_EDID) (
+ IN EFI_EDID_OVERRIDE_PROTOCOL *This,
+ IN EFI_HANDLE *ChildHandle,
+ OUT UINT32 *Attributes,
+ IN OUT UINTN *EdidSize,
+ IN OUT UINT8 **Edid
+);
+#endif
+
+extern OEM_GOP_DEVICE_CHECK OEM_GOP_DEVICE_CHECK_LIST EndOfOemGopDeviceCheckList;
+extern OEM_GOP_SWITCH_HOOK OEM_GOP_SWITCH_HOOK_LIST EndOfOemGopSwitchHookList;
+#if OEM_EDID_OVERRIDE_PROTOCOL_SUPPORT
+extern OEM_GOP_EDID_OVERRIDE_GET_EDID OEM_GOP_EDID_OVERRIDE_GET_EDID_LIST EndOfOemGopEdidOverrideGetEdidList;
+#endif
+
+// Function Prototype(s)
+
+EFI_STATUS ConnectGopDevicePath (
+ IN EFI_HANDLE DriverBindingHandle,
+ IN EFI_DEVICE_PATH_PROTOCOL *pPath );
+
+//----------------------------------------------------------------------
+// Variable and External Declaration(s)
+//----------------------------------------------------------------------
+// Variable Declaration(s)
+
+OEM_GOP_DEVICE_CHECK* OemGopDeviceCheckList[] = {OEM_GOP_DEVICE_CHECK_LIST NULL};
+OEM_GOP_SWITCH_HOOK* OemGopSwitchHookList[] = {OEM_GOP_SWITCH_HOOK_LIST NULL};
+#if OEM_EDID_OVERRIDE_PROTOCOL_SUPPORT
+OEM_GOP_EDID_OVERRIDE_GET_EDID* OemGopEdidOverrideGetEdidList[] = {OEM_GOP_EDID_OVERRIDE_GET_EDID_LIST NULL};
+#endif
+
+// GUID Definition(s)
+
+static EFI_GUID gAmiCsmThunkProtocolGuid = AMI_CSM_THUNK_PROTOCOL_GUID;
+
+// Protocol Definition(s)
+
+// External Declaration(s)
+
+// Function Definition(s)
+
+//----------------------------------------------------------------------
+
+#pragma optimize("", off)
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+// Name: AmiGopDeviceCheck
+//
+// Description: None.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+AmiGopDeviceCheck (
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE DriverBindingHandle,
+ IN EFI_PCI_IO_PROTOCOL *PciIo )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ UINTN i;
+
+ for (i = 0; OemGopDeviceCheckList[i] != NULL; i++) {
+ Status = OemGopDeviceCheckList[i] (ControllerHandle, DriverBindingHandle, PciIo);
+ if(!EFI_ERROR(Status)) break;
+ }
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+// Name: AmiDefaultGopDeviceCheck
+//
+// Description: Check if this VGA supports Display Switching function.
+//
+// Input: IN EFI_HANDLE ControllerHandle
+// IN EFI_HANDLE DriverBindingHandle
+// IN EFI_PCI_IO_PROTOCOL *PciIo
+//
+// Output: None.
+//
+// Notes: Display Switching function may failed because the GOP
+// Driver is not supporting. Please contact VGA vendor to
+// check for this function supporting.
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+AmiDefaultGopDeviceCheck (
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE DriverBindingHandle,
+ IN EFI_PCI_IO_PROTOCOL *PciIo )
+{
+ EFI_STATUS Status;
+ UINT8 PciClassCode;
+
+ if (!PciIo) return EFI_INVALID_PARAMETER;
+
+ // Check if this is ThunkDriver
+ Status = pBS->OpenProtocol(
+ DriverBindingHandle,
+ &gAmiCsmThunkProtocolGuid,
+ NULL,
+ NULL,
+ NULL,
+ EFI_OPEN_PROTOCOL_TEST_PROTOCOL);
+ if (!EFI_ERROR(Status)) return EFI_UNSUPPORTED;
+
+ // Check if this is VGA controller
+ Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, PCI_BCC, 1, &PciClassCode);
+ if (EFI_ERROR(Status) || (PciClassCode != PCI_CL_DISPLAY)) return EFI_UNSUPPORTED;
+
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+// Name: AmiGopSwitchHook
+//
+// Description: None.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+AmiGopSwitchHook (
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE DriverBindingHandle,
+ IN SETUP_DATA *SetupData,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ UINTN i;
+
+ for (i = 0; OemGopSwitchHookList[i] != NULL; i++) {
+ Status = OemGopSwitchHookList[i] (ControllerHandle, DriverBindingHandle, SetupData, DevicePath);
+ if(!EFI_ERROR(Status)) break;
+ }
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+// Name: AmiDefaultGopSwitchFunction
+//
+// Description: None.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+AmiDefaultGopSwitchFunction (
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE DriverBindingHandle,
+ IN SETUP_DATA *SetupData,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ Status = pBS->DisconnectController (ControllerHandle, NULL, NULL);
+ Status = ConnectGopDevicePath(DriverBindingHandle, DevicePath);
+
+ return Status;
+}
+
+#if OEM_EDID_OVERRIDE_PROTOCOL_SUPPORT
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+// Name: AmiGopEdidOverrideGetEdid
+//
+// Description: None.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+AmiGopEdidOverrideGetEdid (
+ IN EFI_EDID_OVERRIDE_PROTOCOL *This,
+ IN EFI_HANDLE *ChildHandle,
+ OUT UINT32 *Attributes,
+ IN OUT UINTN *EdidSize,
+ IN OUT UINT8 **Edid )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ UINTN i;
+
+ for (i = 0; OemGopEdidOverrideGetEdidList[i] != NULL; i++) {
+ Status = OemGopEdidOverrideGetEdidList[i] (This, ChildHandle, Attributes, EdidSize, Edid);
+ if(!EFI_ERROR(Status)) break;
+ }
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+// Name: AmiDefaultGopEdidOverrideGetEdid
+//
+// Description: None.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+AmiDefaultGopEdidOverrideGetEdid (
+ IN EFI_EDID_OVERRIDE_PROTOCOL *This,
+ IN EFI_HANDLE *ChildHandle,
+ OUT UINT32 *Attributes,
+ IN OUT UINTN *EdidSize,
+ IN OUT UINT8 **Edid )
+{
+ EFI_STATUS Status = EFI_UNSUPPORTED;
+
+ return EFI_UNSUPPORTED;
+}
+#endif
+
+#pragma optimize("", on)
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+// Name: ConnectGopDevicePath
+//
+// Description: None.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+ConnectGopDevicePath (
+ IN EFI_HANDLE DriverBindingHandle,
+ IN EFI_DEVICE_PATH_PROTOCOL *pPath )
+{
+ EFI_HANDLE Handle;
+ EFI_STATUS Status;
+ EFI_STATUS ConnectStatus = EFI_UNSUPPORTED;
+
+ if (pPath == NULL) return EFI_INVALID_PARAMETER;
+ while (TRUE)
+ {
+ EFI_DEVICE_PATH_PROTOCOL *pLastPath=NULL, *pFirstNode = pPath;
+ if (isEndNode(pPath))
+ {
+ if (pPath->SubType == END_ENTIRE_SUBTYPE) break;
+ pPath++;
+ continue;
+ }
+ while(TRUE){
+ EFI_DEVICE_PATH_PROTOCOL *Dp;
+ UINT8 SubType;
+
+ pPath = pFirstNode;
+
+ //LocateDevicePath can not work with multi-instance device paths.
+ //Prepare single instance device path and call LocateDevicePath
+ Dp = DPGetEndNode(pPath);
+ SubType = Dp->SubType;
+ Dp->SubType=END_ENTIRE_SUBTYPE;
+ Status = pBS->LocateDevicePath(&gEfiDevicePathProtocolGuid, &pPath, &Handle);
+ Dp->SubType=SubType;
+ if (EFI_ERROR(Status)) break;
+
+ if (pPath==pLastPath) break;
+ pLastPath = pPath;
+ ConnectStatus = pBS->ConnectController(Handle, &DriverBindingHandle, pPath, TRUE);
+ if (EFI_ERROR(ConnectStatus)) break;
+ else return ConnectStatus;
+ }
+ while (!isEndNode(pPath))
+ pPath = NEXT_NODE(pPath);
+ }
+
+ return ConnectStatus;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/AmiGopPolicy/AmiGopPolicySetup.c b/Board/EM/AmiGopPolicy/AmiGopPolicySetup.c
new file mode 100644
index 0000000..cfcefc2
--- /dev/null
+++ b/Board/EM/AmiGopPolicy/AmiGopPolicySetup.c
@@ -0,0 +1,1402 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/AmiGopPolicy/AmiGopPolicySetup.c 9 7/17/14 5:36a Josephlin $
+//
+// $Revision: 9 $
+//
+// $Date: 7/17/14 5:36a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/AmiGopPolicy/AmiGopPolicySetup.c $
+//
+// 9 7/17/14 5:36a Josephlin
+// [TAG] EIP176969
+// [Category] Improvement
+// [Description] Change "#else if" to "#elif" to improve compiling
+// efficiency.
+// [Files] AmiGopPolicySetup.c
+//
+// 8 5/15/14 2:25a Jameswang
+// [TAG] EIP168961
+// [Category] Improvement
+// [Description] - Do not set EFI_VARIABLE_RUNTIME_ACCESS for all
+// variables: AmiGopPolicySetupData and AmiGopOutputDp.
+// - Do not change attribute of Setup variable.
+// - Fixed hanging at InitAmiGopPolicyStrings() if the length of GOP
+// driver name >= 0x40. GetDriverName() added a length argument.
+// - Change module specific variable's GUID not equal to
+// AMI_GLOBAL_VARIABLE_GUID.
+//
+// 7 11/07/12 5:00a Josephlin
+// [TAG] N/A
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] SCT Test Fail
+// [RootCause] EFI_GLOBAL_VARIABLE guid is used in non EFI defined
+// variable.
+// [Solution] New guid AMI_GLOBAL_VARIABLE_GUID is created and used.
+// [Files] AmiGopPolicySetup.c
+//
+// 6 10/28/12 11:59p Josephlin
+// [TAG] EIP103432
+// [Category] Improvement
+// [Description] Add nVidia GOP switch function support for AmiGopPolicy
+// module.
+// [Files] AmiGopPolicySetup.c
+//
+// 5 9/07/12 3:43a Josephlin
+// [TAG] EIP97375
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] If switch the output from HDMI to CRT then save and exit,
+// the setup value still keep in HDMI.
+// [RootCause] Incorrect input value (void **) for MemCmp().
+// [Solution] Change the input type to (void *) for MemCmp().
+// [Files] AmiGopPolicySetup.c
+//
+// 4 8/03/12 3:38a Josephlin
+// [TAG] EIP96705
+// [Category] Improvement
+// [Description] If ComponentName2 Protocol doesn't supports "en-us",
+// try to use first language of SupportedLanguages. This is able to avoid
+// Driver & Device name display "Unknow" always.
+// [Files] AmiGopPolicySetup.c
+//
+// 3 7/26/12 7:30a Josephlin
+// Update File Header.
+//
+// 2 7/23/12 3:32a Josephlin
+// 1. Added input argument SetupData for eLink OemGopSwitchHookList.
+// 2. Created token "AmiGopPolicySetupFile" and "AmiGopPolicySetupString"
+// for override sd and uni file.
+// 3. Rename AmiGopPolicyCallback to AmiGopSwitchCallback in case user
+// confuse.
+//
+// 1 6/29/12 3:45a Josephlin
+// [TAG] EIP91970
+// [Category] New Feature
+// [Description] Initial Release for Display Switch with UEFI GOP driver
+// support.
+// [Files] AmiGopPolicy.cif
+// AmiGopPolicy.c
+// AmiGopPolicy.h
+// AmiGopPolicy.mak
+// AmiGopPolicy.sd
+// AmiGopPolicy.sdl
+// AmiGopPolicy.uni
+// AmiGopPolicyLib.c
+// AmiGopPolicySetup.c
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiGopPolicySetup.c
+//
+// Description: AmiGopPolicy Setup Routines.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+//----------------------------------------------------------------------
+// Include(s)
+//----------------------------------------------------------------------
+
+#include <Efi.h>
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include "AmiCspLib.h"
+#include <Setup.h>
+#include <SetupStrTokens.h>
+#include <Token.h>
+#include "AmiGopPolicy.h"
+
+#include <Protocol\ComponentName.h>
+#include <Protocol\DevicePath.h>
+#include <Protocol\GraphicsOutput.h>
+#include <Protocol\DriverBinding.h>
+#include <Protocol\EdidDiscovered.h>
+
+//----------------------------------------------------------------------
+// Constant, Macro and Type Definition(s)
+//----------------------------------------------------------------------
+// Constant Definition(s)
+
+// Macro Definition(s)
+
+// Type Definition(s)
+
+// Function Prototype(s)
+
+BOOLEAN GetDriverName (
+ IN EFI_HANDLE DriverBindingHandle,
+ IN UINT16 Length,
+ OUT CHAR8 *String
+);
+
+BOOLEAN GetDeviceName (
+ IN EFI_HANDLE DriverBindingHandle,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildControllerHandle,
+ OUT CHAR8 *String
+);
+
+EFI_STATUS GetDriverBindingHandle (
+ IN EFI_HANDLE ControllerHandle,
+ OUT EFI_HANDLE *DriverBindingHandle
+);
+
+EFI_STATUS GetDriverHandleBuffer (
+ IN EFI_HANDLE Controller,
+ OUT UINTN *DriverHandleCount,
+ OUT EFI_HANDLE **DriverHandleBuffer
+);
+
+EFI_STATUS GetDeviceHandlesManagedByDriver (
+ IN EFI_HANDLE DriverBindingHandle,
+ OUT UINTN *ControllerHandleCount,
+ OUT EFI_HANDLE **ControllerHandleBuffer
+);
+
+EFI_STATUS GetChildDeviceHandlesManagedByDriver (
+ IN EFI_HANDLE DriverBindingHandle,
+ IN EFI_HANDLE ControllerHandle,
+ OUT UINTN *ChildControllerHandleCount,
+ OUT EFI_HANDLE **ChildControllerHandleBuffer
+);
+
+EFI_STATUS GetEdidDiscoveredHandlesManagedByDriver (
+ IN EFI_HANDLE DriverBindingHandle,
+ IN EFI_HANDLE ControllerHandle
+);
+
+EFI_STATUS GetOutputDeviceHandlesManagedByDriver (
+ IN EFI_HANDLE DriverBindingHandle,
+ IN EFI_HANDLE ControllerHandle,
+ OUT UINTN *OutputHandleCount,
+ OUT EFI_HANDLE **OutputHandleBuffer
+);
+
+EFI_STATUS AmiGopDeviceCheck (
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE DriverBindingHandle,
+ IN EFI_PCI_IO_PROTOCOL *PciIo
+);
+
+EFI_STATUS AmiGopSwitchHook (
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE DriverBindingHandle,
+ IN SETUP_DATA *SetupData,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
+);
+
+//----------------------------------------------------------------------
+// Variable and External Declaration(s)
+//----------------------------------------------------------------------
+// Variable Declaration(s)
+
+T_ITEM_LIST OutputHndList = { 0, 0, NULL };
+
+UINT16 sDeviceName[] = {
+ STRING_TOKEN(STR_GOP_DEVICE_NAME_0),
+ STRING_TOKEN(STR_GOP_DEVICE_NAME_1),
+ STRING_TOKEN(STR_GOP_DEVICE_NAME_2),
+ STRING_TOKEN(STR_GOP_DEVICE_NAME_3),
+ };
+
+UINT16 sDriverName[] = {
+ STRING_TOKEN(STR_GOP_DRIVER_NAME_0),
+ STRING_TOKEN(STR_GOP_DRIVER_NAME_1),
+ STRING_TOKEN(STR_GOP_DRIVER_NAME_2),
+ STRING_TOKEN(STR_GOP_DRIVER_NAME_3),
+ };
+
+UINT16 sOutputName[] = {
+ STRING_TOKEN(STR_GOP_OUTPUT_NAME_0),
+ STRING_TOKEN(STR_GOP_OUTPUT_NAME_1),
+ STRING_TOKEN(STR_GOP_OUTPUT_NAME_2),
+ STRING_TOKEN(STR_GOP_OUTPUT_NAME_3),
+ STRING_TOKEN(STR_GOP_OUTPUT_NAME_4),
+ STRING_TOKEN(STR_GOP_OUTPUT_NAME_5),
+ STRING_TOKEN(STR_GOP_OUTPUT_NAME_6),
+ STRING_TOKEN(STR_GOP_OUTPUT_NAME_7)
+ };
+
+// GUID Definition(s)
+
+static EFI_GUID gAmiGopPolicyVariableGuid = AMI_GOP_POLICY_VARIABLE_GUID;
+static EFI_GUID gSetupGuid = SETUP_GUID;
+
+// Protocol Definition(s)
+
+// External Declaration(s)
+
+extern EFI_GUID gEfiComponentName2ProtocolGuid;
+
+// Function Definition(s)
+
+//----------------------------------------------------------------------
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+//
+// Procedure: InitAmiGopPolicyStrings
+//
+// Description: Initializes AmiGopPolicy Setup String
+//
+// Parameters: HiiHandle - Handle to HII database
+// Class - Indicates the setup class
+//
+// Returns: None
+//
+// Notes:
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID InitAmiGopPolicyStrings (
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ UINTN VariableSize = 0;
+ AMI_GOP_POLICY_SETUP_DATA AmiGopPolicySetupData;
+
+ UINTN ControllerHandleCount = 0;
+ EFI_HANDLE *ControllerHandleBuffer = NULL;
+ EFI_HANDLE ControllerHandle;
+ UINTN ControllerHandleIndex;
+
+ EFI_HANDLE DriverBindingHandle;
+
+ EFI_PCI_IO_PROTOCOL *PciIo;
+
+ UINTN ChildHandleCount = 0;
+ EFI_HANDLE *ChildHandleBuffer = NULL;
+ EFI_HANDLE ChildHandle;
+ UINTN ChildHandleIndex = 0;
+ EFI_DEVICE_PATH_PROTOCOL *ChildHandleDp;
+ CHAR16 ChildHandleDpVar[0x40];
+ EFI_DEVICE_PATH_PROTOCOL *AmiGopOutputDp = NULL;
+
+ UINTN SetupSize;
+ SETUP_DATA SetupData;
+
+ CHAR8 String[0x40];
+
+ UINTN Index = 0;
+ UINTN SelectIndex = 0;
+
+ UINT32 VarAttr;
+
+ if (Class != ADVANCED_FORM_SET_CLASS) return;
+
+ // Save default AmiGopPolicySetupData on memory.
+ AmiGopPolicySetupData.GopDeviceCount = 0;
+ AmiGopPolicySetupData.GopOutputCount = 0;
+ VariableSize = sizeof(AMI_GOP_POLICY_SETUP_DATA);
+ Status = pRS->SetVariable (
+ L"AmiGopPolicySetupData",
+ &gAmiGopPolicyVariableGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ VariableSize,
+ &AmiGopPolicySetupData );
+
+ // Init String buffer
+ pBS->SetMem(String, sizeof(String), 0);
+
+ //
+ // Get all drivers handles which has PCI IO Protocol
+ //
+ Status = pBS->LocateHandleBuffer(
+ ByProtocol,
+ &gEfiPciIoProtocolGuid,
+ NULL,
+ &ControllerHandleCount,
+ &ControllerHandleBuffer);
+ if (EFI_ERROR(Status)) return;
+
+ for (ControllerHandleIndex = 0; ControllerHandleIndex < ControllerHandleCount; ControllerHandleIndex++) {
+ ControllerHandle = ControllerHandleBuffer[ControllerHandleIndex];
+ Status = pBS->HandleProtocol (ControllerHandle, &gEfiPciIoProtocolGuid, &PciIo);
+ if (EFI_ERROR(Status)) continue;
+
+ Status = GetDriverBindingHandle (ControllerHandle, &DriverBindingHandle);
+ if (EFI_ERROR(Status)) continue;
+
+ Status = AmiGopDeviceCheck (ControllerHandle, DriverBindingHandle, PciIo);
+ if (EFI_ERROR(Status)) continue;
+
+ if (GetDeviceName(DriverBindingHandle, ControllerHandle, NULL, String)) {
+ InitString(HiiHandle, sDeviceName[Index], L"%S", String);
+ pBS->SetMem(String, sizeof(String), 0);
+ }
+
+ if (GetDriverName(DriverBindingHandle, 0x40, String)) {
+ InitString(HiiHandle, sDriverName[Index], L"%S", String);
+ pBS->SetMem(String, sizeof(String), 0);
+ }
+
+ Status = GetOutputDeviceHandlesManagedByDriver (DriverBindingHandle, ControllerHandle, &ChildHandleCount, &ChildHandleBuffer);
+ if (!EFI_ERROR(Status)) {
+ VariableSize = 0;
+ Status = GetEfiVariable (
+ L"AmiGopOutputDp",
+ &gAmiGopPolicyVariableGuid,
+ NULL,
+ &VariableSize,
+ &AmiGopOutputDp);
+ for (ChildHandleIndex = 0; ChildHandleIndex < ChildHandleCount; ChildHandleIndex++) {
+ ChildHandle = ChildHandleBuffer[ChildHandleIndex];
+ if (GetDeviceName(DriverBindingHandle, ControllerHandle, ChildHandle, String)) {
+ Status = pBS->OpenProtocol (
+ ChildHandle,
+ &gEfiDevicePathProtocolGuid,
+ (VOID**)&ChildHandleDp,
+ NULL,
+ NULL,
+ EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL);
+ if (!EFI_ERROR(Status)) {
+ Swprintf (ChildHandleDpVar, L"ChildHandleDpVar%01x", ChildHandleIndex);
+ Status = pRS->SetVariable (
+ ChildHandleDpVar,
+ &gAmiGopPolicyVariableGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ DPLength (ChildHandleDp),
+ ChildHandleDp );
+ if (AmiGopOutputDp != NULL) {
+ if (MemCmp (AmiGopOutputDp, ChildHandleDp, DPLength(ChildHandleDp)) == 0) {
+ SelectIndex = ChildHandleIndex;
+ }
+ }
+ }
+ InitString(HiiHandle, sOutputName[ChildHandleIndex], L"%S", String);
+ pBS->SetMem(String, sizeof(String), 0);
+ }
+ }
+ }
+
+ Index ++;
+ }
+
+ pBS->FreePool(AmiGopOutputDp);
+ pBS->FreePool(ControllerHandleBuffer);
+
+ // Update Gop Output Device Count
+ SetupSize = sizeof(SETUP_DATA);
+ Status = pRS->GetVariable(L"Setup", &gSetupGuid, &VarAttr, &SetupSize, &SetupData);
+ if (!EFI_ERROR(Status)) {
+ SetupData.GopOutputSelect = (UINT8)SelectIndex;
+ Status = pRS->SetVariable(
+ L"Setup",
+ &gSetupGuid,
+ VarAttr,
+ sizeof(SETUP_DATA),
+ &SetupData);
+ }
+
+ // Save AmiGopPolicySetupData on memory.
+ AmiGopPolicySetupData.GopDeviceCount = (UINT8)Index;
+ AmiGopPolicySetupData.GopOutputCount = (UINT8)ChildHandleIndex;
+ VariableSize = sizeof(AMI_GOP_POLICY_SETUP_DATA);
+ Status = pRS->SetVariable (
+ L"AmiGopPolicySetupData",
+ &gAmiGopPolicyVariableGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ VariableSize,
+ &AmiGopPolicySetupData );
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+//
+// Procedure: AmiGopSwitchCallback
+//
+// Description: None.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS AmiGopSwitchCallback (
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class,
+ IN UINT16 SubClass,
+ IN UINT16 Key )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ SETUP_DATA *SetupData = NULL;
+ UINTN SetupSize = sizeof(SETUP_DATA);
+ UINTN VariableSize = 0;
+ CALLBACK_PARAMETERS *CallbackParameters = NULL;
+
+ UINTN ControllerHandleCount = 0;
+ EFI_HANDLE *ControllerHandleBuffer = NULL;
+ EFI_HANDLE ControllerHandle;
+ UINTN ControllerHandleIndex;
+
+ EFI_PCI_IO_PROTOCOL *PciIo;
+
+ EFI_HANDLE DriverBindingHandle;
+ EFI_DRIVER_BINDING_PROTOCOL *DriverBinding = NULL;
+
+ UINTN DriverHandleCount = 0;
+ EFI_HANDLE *DriverHandleBuffer = NULL;
+
+ UINTN ChildHandleCount = 0;
+ EFI_HANDLE *ChildHandleBuffer = NULL;
+ UINTN ChildHandleIndex;
+ CHAR16 ChildHandleDpVar[0x40];
+
+ EFI_DEVICE_PATH_PROTOCOL *GopDevicePath = NULL;
+ UINTN GopDevicePathLength = 0;
+
+ EFI_GRAPHICS_OUTPUT_PROTOCOL *Gop = NULL;
+ UINTN HorizontalResolution = 0;
+ UINTN VerticalResolution = 0;
+ UINTN GopHandleCount = 0;
+ EFI_HANDLE *GopHandleBuffer = NULL;
+ UINTN GopHandleIndex;
+ UINTN SizeOfInfo = 0;
+ UINT32 Mode;
+ UINT32 MaxMode = 0;
+ EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info = NULL;
+
+ //
+ // Get Setup Buffer
+ //
+ CallbackParameters = GetCallbackParameters();
+
+#if ((TSE_BUILD >= 0x1224) && (EFI_SPECIFICATION_VERSION >= 0x2000A))
+ if (CallbackParameters->Action != EFI_BROWSER_ACTION_CHANGED) return Status;
+#elif ((TSE_BUILD > 0x1208) && (EFI_SPECIFICATION_VERSION >= 0x2000A))
+ if (CallbackParameters->Action != EFI_BROWSER_ACTION_CHANGING) return Status;
+#endif
+
+ Status = pBS->AllocatePool (EfiBootServicesData, SetupSize, &SetupData);
+ if(EFI_ERROR(Status)) return Status;
+
+#if defined(EFI_SPECIFICATION_VERSION) && EFI_SPECIFICATION_VERSION > 0x20000
+ Status = HiiLibGetBrowserData (&SetupSize, SetupData, &gSetupGuid, L"Setup");
+ if(EFI_ERROR(Status)) return Status;
+#else
+ SetupData = (SETUP_DATA*)CallbackParameters->Data->NvRamMap;
+#endif
+
+ //
+ // Get all drivers handles which has PCI IO Protocol
+ //
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiPciIoProtocolGuid,
+ NULL,
+ &ControllerHandleCount,
+ &ControllerHandleBuffer);
+ if (EFI_ERROR(Status)) return Status;
+
+ for (ControllerHandleIndex = 0; ControllerHandleIndex < ControllerHandleCount; ControllerHandleIndex++) {
+ ControllerHandle = ControllerHandleBuffer[ControllerHandleIndex];
+ Status = pBS->HandleProtocol (ControllerHandle, &gEfiPciIoProtocolGuid, &PciIo);
+ if (EFI_ERROR(Status)) continue;
+
+ //
+ // Get Driver Binding Protocol for this VGA
+ //
+ Status = GetDriverBindingHandle (ControllerHandle, &DriverBindingHandle);
+ if (EFI_ERROR(Status)) continue;
+
+ Status = AmiGopDeviceCheck (ControllerHandle, DriverBindingHandle, PciIo);
+ if (EFI_ERROR(Status)) continue;
+
+ Status = pBS->OpenProtocol(
+ DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid,
+ (VOID**)&DriverBinding,
+ NULL,
+ NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ if (EFI_ERROR(Status)) continue;
+
+ //
+ // Find out Current GOP Output Mode
+ //
+ if (!EFI_ERROR(GetOutputDeviceHandlesManagedByDriver (DriverBindingHandle, ControllerHandle, &ChildHandleCount, &ChildHandleBuffer))) {
+ for (ChildHandleIndex = 0; ChildHandleIndex < ChildHandleCount; ChildHandleIndex++) {
+ Status = pBS->OpenProtocol (
+ ChildHandleBuffer[ChildHandleIndex],
+ &gEfiGraphicsOutputProtocolGuid,
+ (VOID**)&Gop,
+ NULL,
+ NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ if (!EFI_ERROR(Status)) {
+ HorizontalResolution = Gop->Mode->Info->HorizontalResolution;
+ VerticalResolution = Gop->Mode->Info->VerticalResolution;
+ break;
+ }
+ }
+ }
+
+ //
+ // Get User Selected Gop Output Handle.
+ //
+ Swprintf (ChildHandleDpVar, L"ChildHandleDpVar%01x", SetupData->GopOutputSelect);
+ GopDevicePathLength = 0;
+ Status = GetEfiVariable (
+ ChildHandleDpVar,
+ &gAmiGopPolicyVariableGuid,
+ NULL,
+ &GopDevicePathLength,
+ &GopDevicePath);
+ if (EFI_ERROR(Status)) continue;
+
+ Status = AmiGopSwitchHook (ControllerHandle, DriverBindingHandle, SetupData, GopDevicePath);
+ if (!EFI_ERROR(Status)) {
+ //
+ // Save AmiGop Outut Device path for next boot
+ //
+ Status = pRS->SetVariable (
+ L"AmiGopOutputDp",
+ &gAmiGopPolicyVariableGuid,
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ DPLength(GopDevicePath),
+ GopDevicePath);
+ if (EFI_ERROR(Status)) continue;
+
+ //
+ // Set GOP Output Mode
+ //
+ Status = GetOutputDeviceHandlesManagedByDriver (DriverBindingHandle, ControllerHandle, &GopHandleCount, &GopHandleBuffer);
+ if (!EFI_ERROR(Status)) {
+ for (GopHandleIndex = 0; GopHandleIndex < GopHandleCount; GopHandleIndex++) {
+ Status = pBS->OpenProtocol (
+ GopHandleBuffer[GopHandleIndex],
+ &gEfiGraphicsOutputProtocolGuid,
+ (VOID**)&Gop,
+ NULL,
+ NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ if (!EFI_ERROR(Status)) {
+ if ((HorizontalResolution == Gop->Mode->Info->HorizontalResolution) &&
+ (VerticalResolution == Gop->Mode->Info->VerticalResolution))
+ break;
+ MaxMode = Gop->Mode->MaxMode;
+ for (Mode = 0; Mode <= MaxMode; Mode++) {
+ if (!EFI_ERROR (Gop->QueryMode (Gop, Mode, &SizeOfInfo, &Info))) {
+ if ((HorizontalResolution == Info->HorizontalResolution) &&
+ (VerticalResolution == Info->VerticalResolution)) {
+ Status = Gop->SetMode (Gop, Mode);
+ if (!EFI_ERROR(Status)) break;
+ }
+ }
+ }
+ }
+ }
+ }
+ }
+ }
+ pBS->FreePool(SetupData);
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+//
+// Procedure: GetDriverName
+//
+// Description: Get driver's name from DriverBindingHandle first using
+// LANGUAGE_CODE_ENGLISH then "eng" codes.
+//
+// Input: DriverBindingHandle - handle with gEfiComponentName2ProtocolGuid
+// Length - Length of name to be copied to String including null
+//
+// Output: String - driver name got
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+BOOLEAN
+GetDriverName (
+ IN EFI_HANDLE DriverBindingHandle,
+ IN UINT16 Length,
+ OUT CHAR8 *String )
+{
+ EFI_STATUS Status;
+ CHAR16 *DriverName;
+ EFI_COMPONENT_NAME_PROTOCOL *ComponentName;
+ CHAR8 *Lang = NULL;
+ CHAR8 *TempChar;
+
+ //
+ // Get driver name from UEFI 2.0 Component Name 2 protocol interface.
+ //
+ Status = pBS->OpenProtocol(
+ DriverBindingHandle,
+ &gEfiComponentName2ProtocolGuid,
+ (VOID**)&ComponentName,
+ NULL,
+ NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ if (!EFI_ERROR(Status)) {
+ Status = ComponentName->GetDriverName(ComponentName, LANGUAGE_CODE_ENGLISH, &DriverName);
+ if (EFI_ERROR(Status)) {
+ //
+ // Driver does not support "en-us", try to get SupportedLanguages
+ //
+ pBS->AllocatePool(EfiBootServicesData, Strlen(ComponentName->SupportedLanguages)+1, &Lang);
+ if (Lang != NULL) {
+ Strcpy(Lang, ComponentName->SupportedLanguages);
+ TempChar = Strstr(Lang, ";");
+ if (TempChar != NULL) *TempChar = 0x0000;
+ Status = ComponentName->GetDriverName(ComponentName, Lang, &DriverName);
+ pBS->FreePool(Lang);
+ Lang = NULL;
+ }
+ }
+ if (!EFI_ERROR(Status)) {
+ DriverName[Length-1]=0; // avoid overflowed, copy only length
+ Sprintf(String, "%S", DriverName);
+ return TRUE;
+ }
+ }
+
+ //
+ // If it fails to get the driver name from Component Name protocol interface, we should fall back on
+ // EFI 1.1 Component Name protocol interface.
+ //
+ Status = pBS->OpenProtocol(
+ DriverBindingHandle,
+ &gEfiComponentNameProtocolGuid,
+ (VOID**)&ComponentName,
+ NULL,
+ NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ if (!EFI_ERROR(Status)) {
+ Status = ComponentName->GetDriverName(ComponentName, "eng", &DriverName);
+ if (!EFI_ERROR(Status)) {
+ DriverName[Length-1]=0; // avoid overflowed, copy only length
+ Sprintf(String, "%S", DriverName);
+ return TRUE;
+ }
+ }
+
+ return FALSE;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Name: GetDriverBindingHandle
+//
+// Description: None.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+GetDriverBindingHandle (
+ IN EFI_HANDLE ControllerHandle,
+ OUT EFI_HANDLE *DriverBindingHandle )
+{
+ EFI_STATUS Status;
+ UINTN HandleCount;
+ EFI_HANDLE *HandleBuffer;
+ UINTN HandleIndex;
+ EFI_GUID **ProtocolGuidArray;
+ UINTN ArrayCount;
+ UINTN ProtocolIndex;
+ EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfo;
+ UINTN OpenInfoCount;
+ UINTN OpenInfoIndex;
+ UINTN Index;
+
+ Status = pBS->LocateHandleBuffer(
+ AllHandles,
+ NULL,
+ NULL,
+ &HandleCount,
+ &HandleBuffer);
+ if (EFI_ERROR(Status)) return EFI_NOT_FOUND;
+
+ for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) {
+ ProtocolGuidArray = NULL;
+ Status = pBS->ProtocolsPerHandle(
+ HandleBuffer[HandleIndex],
+ &ProtocolGuidArray,
+ &ArrayCount);
+ if (EFI_ERROR(Status)) continue;
+
+ for (ProtocolIndex = 0; ProtocolIndex < ArrayCount; ProtocolIndex++) {
+ Status = pBS->OpenProtocolInformation(
+ HandleBuffer[HandleIndex],
+ ProtocolGuidArray[ProtocolIndex],
+ &OpenInfo,
+ &OpenInfoCount);
+ if (EFI_ERROR(Status)) continue;
+
+ for (OpenInfoIndex = 0; OpenInfoIndex < OpenInfoCount; OpenInfoIndex++) {
+ if (OpenInfo[OpenInfoIndex].ControllerHandle == ControllerHandle) {
+ if ((OpenInfo[OpenInfoIndex].Attributes & EFI_OPEN_PROTOCOL_BY_DRIVER) == EFI_OPEN_PROTOCOL_BY_DRIVER) {
+ for(Index = 0; Index < HandleCount; Index++) {
+ if(HandleBuffer[Index] == OpenInfo[OpenInfoIndex].AgentHandle) {
+ *DriverBindingHandle=HandleBuffer[Index];
+ pBS->FreePool(OpenInfo);
+ pBS->FreePool(ProtocolGuidArray);
+ pBS->FreePool(HandleBuffer);
+ return EFI_SUCCESS;
+ }
+ }
+ }
+ }
+ }
+ if (OpenInfo != NULL) pBS->FreePool(OpenInfo);
+ }
+ if (ProtocolGuidArray != NULL) pBS->FreePool(ProtocolGuidArray);
+ }
+ if (HandleBuffer != NULL) pBS->FreePool(HandleBuffer);
+ return EFI_NOT_FOUND;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Name: GetDriverHandleBuffer
+//
+// Description: None.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+GetDriverHandleBuffer (
+ IN EFI_HANDLE Controller,
+ OUT UINTN *DriverHandleCount,
+ OUT EFI_HANDLE **DriverHandleBuffer )
+{
+ EFI_STATUS Status;
+ UINTN HandleCount;
+ BOOLEAN *HandleBufferMap;
+ EFI_HANDLE *HandleBuffer;
+ UINTN HandleIndex;
+ EFI_GUID **ProtocolGuidArray;
+ UINTN ArrayCount;
+ UINTN ProtocolIndex;
+ EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfo;
+ UINTN OpenInfoCount;
+ UINTN OpenInfoIndex;
+ UINTN Index;
+ UINTN AvailableIndex = 0;
+
+ Status = pBS->LocateHandleBuffer(
+ AllHandles,
+ NULL,
+ NULL,
+ &HandleCount,
+ &HandleBuffer);
+ if (EFI_ERROR(Status)) return EFI_NOT_FOUND;
+
+ HandleBufferMap = MallocZ (sizeof (BOOLEAN) * HandleCount);
+ for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) {
+ HandleBufferMap[HandleIndex] = FALSE;
+ }
+
+ for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) {
+ ProtocolGuidArray = NULL;
+ Status = pBS->ProtocolsPerHandle(
+ HandleBuffer[HandleIndex],
+ &ProtocolGuidArray,
+ &ArrayCount);
+ if (EFI_ERROR(Status)) continue;
+
+ for (ProtocolIndex = 0; ProtocolIndex < ArrayCount; ProtocolIndex++) {
+ Status = pBS->OpenProtocolInformation(
+ HandleBuffer[HandleIndex],
+ ProtocolGuidArray[ProtocolIndex],
+ &OpenInfo,
+ &OpenInfoCount);
+ if (EFI_ERROR(Status)) continue;
+
+ for (OpenInfoIndex = 0; OpenInfoIndex < OpenInfoCount; OpenInfoIndex++) {
+ if (OpenInfo[OpenInfoIndex].ControllerHandle == Controller) {
+ if ((OpenInfo[OpenInfoIndex].Attributes & EFI_OPEN_PROTOCOL_BY_DRIVER) == EFI_OPEN_PROTOCOL_BY_DRIVER) {
+ for (Index = 0; Index < HandleCount; Index++) {
+ if (HandleBuffer[Index] == OpenInfo[OpenInfoIndex].AgentHandle) {
+ HandleBufferMap[Index] = TRUE;
+ (*DriverHandleCount)++;
+ }
+ }
+ }
+ }
+ }
+ pBS->FreePool(OpenInfo);
+ }
+ pBS->FreePool(ProtocolGuidArray);
+ }
+
+ if (*DriverHandleCount > 0) {
+ //
+ // Copy the found device handle to returned buffer
+ //
+ *DriverHandleBuffer = MallocZ (sizeof (EFI_HANDLE) * (*DriverHandleCount));
+ for (HandleIndex = 0, AvailableIndex = 0; HandleIndex < HandleCount; HandleIndex++) {
+ if (HandleBufferMap[HandleIndex]) {
+ (*DriverHandleBuffer)[AvailableIndex] = HandleBuffer[HandleIndex];
+ AvailableIndex++;
+ }
+ }
+ }
+
+ pBS->FreePool(HandleBuffer);
+
+ if (*DriverHandleCount > 0)
+ return EFI_SUCCESS;
+ else
+ return EFI_NOT_FOUND;
+}
+
+// <AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: GetDeviceHandlesManagedByDriver
+//
+// Description:
+// Get all device handles which are being opened by a specific driver. The
+// rountine will allocate pool buffer for the found device handles, and it
+// is the caller's responsibility to safe free the buffer.
+//
+// Input:
+// IN EFI_HANDLE DriverBindingHandle - the handle of a driver which
+// contains the binding protocol
+// OUT UINTN ControllerHandleCount - the number of available device handles
+// returned in ControllerHandleBuffer
+// OUT EFI_HANDLE ControllerHandleBuffer - a pointer to the buffer to return
+// the array of device handles
+//
+// Output:
+// EFI_STATUS
+// If returned status is not succeful or find no available device,
+// the *ControllerHandleBuffer will be NULL
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+// <AMI_PHDR_END>
+
+EFI_STATUS
+GetDeviceHandlesManagedByDriver (
+ IN EFI_HANDLE DriverBindingHandle,
+ OUT UINTN *ControllerHandleCount,
+ OUT EFI_HANDLE **ControllerHandleBuffer )
+{
+ UINTN HandleCount;
+ EFI_HANDLE *HandleBuffer;
+ BOOLEAN *HandleBufferMap;
+ EFI_STATUS Status;
+ UINTN HandleIndex;
+ UINTN AvailableIndex;
+ EFI_GUID **ProtocolGuidArray;
+ UINTN ArrayCount;
+ UINTN ProtocolIndex;
+ EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfo;
+ UINTN OpenInfoCount;
+ UINTN OpenInfoIndex;
+
+ *ControllerHandleCount = 0;
+ *ControllerHandleBuffer = NULL;
+ HandleCount = 0;
+ HandleBuffer = NULL;
+
+ if (DriverBindingHandle == NULL) {
+ Status = EFI_INVALID_PARAMETER;
+ goto Error;
+ }
+
+ //
+ // Retrieve the list of all handles from the handle database
+ //
+ Status = pBS->LocateHandleBuffer (
+ AllHandles,
+ NULL,
+ NULL,
+ &HandleCount,
+ &HandleBuffer
+ );
+ if (EFI_ERROR (Status)) goto Error;
+
+ //
+ //Create a map for HandleBuffer. If a handle in HandleBuffer is the wanted device handle, its map item is true.
+ //
+ HandleBufferMap = MallocZ (sizeof (BOOLEAN) * HandleCount);
+ for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) {
+ HandleBufferMap[HandleIndex] = FALSE;
+ }
+
+ for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) {
+ //
+ // Check if it is a device handle
+ //
+ Status = pBS->OpenProtocol (
+ HandleBuffer[HandleIndex],
+ &gEfiDevicePathProtocolGuid,
+ NULL,
+ NULL,
+ NULL,
+ EFI_OPEN_PROTOCOL_TEST_PROTOCOL);
+ if (EFI_ERROR(Status)) continue;
+
+ //
+ // Retrieve the list of all the protocols on each handle
+ //
+ Status = pBS->ProtocolsPerHandle (
+ HandleBuffer[HandleIndex],
+ &ProtocolGuidArray,
+ &ArrayCount);
+
+ if (!EFI_ERROR (Status)) {
+ for (ProtocolIndex = 0; ProtocolIndex < ArrayCount; ProtocolIndex++) {
+ //
+ // Retrieve the list of agents that have opened each protocol
+ //
+ Status = pBS->OpenProtocolInformation (
+ HandleBuffer[HandleIndex],
+ ProtocolGuidArray[ProtocolIndex],
+ &OpenInfo,
+ &OpenInfoCount);
+ if (!EFI_ERROR (Status)) {
+ for (OpenInfoIndex = 0; OpenInfoIndex < OpenInfoCount; OpenInfoIndex++) {
+ if (OpenInfo[OpenInfoIndex].AgentHandle == DriverBindingHandle) {
+ if ((OpenInfo[OpenInfoIndex].Attributes & EFI_OPEN_PROTOCOL_BY_DRIVER) == EFI_OPEN_PROTOCOL_BY_DRIVER) {
+ //
+ // HandleBufferMap[HandleIndex] is the wanted device handle, find it in the handlebuffer
+ // A bus driver maybe open a Controller with BY_DRIVER attribute for different protocol many times,
+ //
+ HandleBufferMap[HandleIndex] = TRUE;
+ }
+ }
+ }
+ pBS->FreePool (OpenInfo);
+ }
+ }
+ pBS->FreePool (ProtocolGuidArray);
+ }
+ }
+
+ //
+ // count how many device handles are found
+ //
+ for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) {
+ if (HandleBufferMap[HandleIndex]) {
+ (*ControllerHandleCount)++;
+ }
+ }
+
+ if (*ControllerHandleCount > 0) {
+ //
+ // Copy the found device handle to returned buffer
+ //
+ *ControllerHandleBuffer = MallocZ (sizeof (EFI_HANDLE) * (*ControllerHandleCount));
+ for (HandleIndex = 0, AvailableIndex = 0; HandleIndex < HandleCount; HandleIndex++) {
+ if (HandleBufferMap[HandleIndex]) {
+ (*ControllerHandleBuffer)[AvailableIndex] = HandleBuffer[HandleIndex];
+ AvailableIndex++;
+ }
+ }
+ }
+
+ if (HandleBuffer != NULL) pBS->FreePool (HandleBuffer);
+ return EFI_SUCCESS;
+
+Error:
+
+ if (HandleBuffer != NULL) pBS->FreePool (HandleBuffer);
+ return Status;
+}
+
+// <AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: GetChildDeviceHandlesManagedByDriver
+//
+// Description:
+// Get all child device handles which are being opened by a specific driver.
+// The rountine will allocate pool buffer for the found child device handles,
+// and it is the caller's responsibility to safe free the buffer.
+//
+// Input:
+// IN EFI_HANDLE DriverBindingHandle - the handle of a driver which
+// contains the binding protocol
+// IN EFI_HANDLE ControllerHandle - the device controller handle be opened
+// by its child device
+// OUT UINTN ChildControllerHandleCount - the number of available
+// device handles returned in
+// ControllerHandleBuffer
+// OUT EFI_HANDLE ChildControllerHandleBuffer - a pointer to the buffer to
+// return the array of child
+// device handles
+//
+// Output:
+// EFI_STATUS
+// If returned status is not succeful or find no available device,
+// the *ChildControllerHandleBuffer will be NULL
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+// <AMI_PHDR_END>
+
+EFI_STATUS
+GetChildDeviceHandlesManagedByDriver (
+ IN EFI_HANDLE DriverBindingHandle,
+ IN EFI_HANDLE ControllerHandle,
+ OUT UINTN *ChildControllerHandleCount,
+ OUT EFI_HANDLE **ChildControllerHandleBuffer )
+{
+ UINTN HandleCount;
+ EFI_HANDLE *HandleBuffer;
+ BOOLEAN *HandleBufferMap;
+ EFI_STATUS Status;
+ UINTN HandleIndex;
+ UINTN AvailableIndex;
+ EFI_GUID **ProtocolGuidArray;
+ UINTN ArrayCount;
+ UINTN ProtocolIndex;
+ EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfo;
+ UINTN OpenInfoCount;
+ UINTN OpenInfoIndex;
+
+ *ChildControllerHandleCount = 0;
+ *ChildControllerHandleBuffer = NULL;
+ HandleCount = 0;
+ HandleBuffer = NULL;
+
+ if ((DriverBindingHandle == NULL) || (ControllerHandle == NULL)) {
+ Status = EFI_INVALID_PARAMETER;
+ goto Error;
+ }
+
+ //
+ // Retrieve the list of all handles from the handle database
+ //
+ Status = pBS->LocateHandleBuffer (
+ AllHandles,
+ NULL,
+ NULL,
+ &HandleCount,
+ &HandleBuffer);
+ if (EFI_ERROR(Status)) goto Error;
+
+ //
+ // Create a map for HandleBuffer. If a handle in HandleBuffer is the wanted device handle, its map item is true.
+ //
+ HandleBufferMap = MallocZ (sizeof (BOOLEAN) * HandleCount);
+ for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) {
+ HandleBufferMap[HandleIndex] = FALSE;
+ }
+
+ //
+ // Retrieve the list of all the protocols on each handle
+ //
+ Status = pBS->ProtocolsPerHandle (
+ ControllerHandle,
+ &ProtocolGuidArray,
+ &ArrayCount);
+ if (!EFI_ERROR (Status)) {
+ for (ProtocolIndex = 0; ProtocolIndex < ArrayCount; ProtocolIndex++) {
+ //
+ // Retrieve the list of agents that have opened each protocol
+ //
+ Status = pBS->OpenProtocolInformation (
+ ControllerHandle,
+ ProtocolGuidArray[ProtocolIndex],
+ &OpenInfo,
+ &OpenInfoCount);
+ if (!EFI_ERROR (Status)) {
+ for (OpenInfoIndex = 0; OpenInfoIndex < OpenInfoCount; OpenInfoIndex++) {
+ if (OpenInfo[OpenInfoIndex].AgentHandle == DriverBindingHandle) {
+ if ((OpenInfo[OpenInfoIndex].Attributes & EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER) == EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER) {
+ //
+ // OpenInfo[OpenInfoIndex].ControllerHandle is the wanted child device handle, find it in the handlebuffer
+ // A bus driver maybe open a Controller with BY_CHILD_CONTROLLER attribute for different protocol many times,
+ //
+ for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) {
+ if (OpenInfo[OpenInfoIndex].ControllerHandle == HandleBuffer[HandleIndex]) {
+ HandleBufferMap[HandleIndex] = TRUE;
+ }
+ }
+ }
+ }
+ }
+ pBS->FreePool (OpenInfo);
+ }
+ }
+ pBS->FreePool (ProtocolGuidArray);
+ }
+
+ //
+ // count how many device handles are found
+ //
+ for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) {
+ if (HandleBufferMap[HandleIndex]) {
+ (*ChildControllerHandleCount)++;
+ }
+ }
+
+ if (*ChildControllerHandleCount > 0) {
+ //
+ // Copy the found device handle to returned buffer
+ //
+ *ChildControllerHandleBuffer = MallocZ (sizeof (EFI_HANDLE) * (*ChildControllerHandleCount));
+ for (HandleIndex = 0, AvailableIndex = 0; HandleIndex < HandleCount; HandleIndex++) {
+ if (HandleBufferMap[HandleIndex]) {
+ (*ChildControllerHandleBuffer)[AvailableIndex] = HandleBuffer[HandleIndex];
+ AvailableIndex++;
+ }
+ }
+ }
+
+ if (HandleBuffer != NULL) pBS->FreePool (HandleBuffer);
+ return EFI_SUCCESS;
+
+Error:
+ if (HandleBuffer != NULL) pBS->FreePool (HandleBuffer);
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+//
+// Procedure: GetEdidDiscoveredHandlesManagedByDriver
+//
+// Description: None.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+GetEdidDiscoveredHandlesManagedByDriver (
+ IN EFI_HANDLE DriverBindingHandle,
+ IN EFI_HANDLE ControllerHandle )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ UINTN ChildHandleCount = 0;
+ EFI_HANDLE *ChildHandleBuffer = NULL;
+ UINTN ChildHandleIndex = 0;
+
+ Status = GetChildDeviceHandlesManagedByDriver (DriverBindingHandle, ControllerHandle, &ChildHandleCount, &ChildHandleBuffer);
+ if (EFI_ERROR(Status)) return Status;
+
+ for (ChildHandleIndex = 0; ChildHandleIndex < ChildHandleCount; ChildHandleIndex++) {
+ Status = pBS->OpenProtocol(
+ ChildHandleBuffer[ChildHandleIndex],
+ &gEfiEdidDiscoveredProtocolGuid,
+ NULL, NULL, NULL,
+ EFI_OPEN_PROTOCOL_TEST_PROTOCOL);
+ if (EFI_ERROR(Status)) Status = GetEdidDiscoveredHandlesManagedByDriver (DriverBindingHandle, ChildHandleBuffer[ChildHandleIndex]);
+ else AppendItemLst(&OutputHndList, &ChildHandleBuffer[ChildHandleIndex]);
+ }
+
+ return EFI_SUCCESS;
+}
+
+// <AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: GetOutputDeviceHandlesManagedByDriver
+//
+// Description:
+// Get all output device handles which are produced by a specific driver.
+// The rountine will allocate pool buffer for the found output device handles,
+// and it is the caller's responsibility to safe free the buffer.
+//
+// Input:
+// IN EFI_HANDLE DriverBindingHandle - the handle of a driver which contains
+// the binding protocol
+// IN EFI_HANDLE ControllerHandle - the device controller handle be opened
+// by its child device
+// OUT UINTN OutputHandleCount - the number of available device handles
+// returned in OutputHandleBuffer.
+// OUT EFI_HANDLE OutputHandleBuffer - a pointer to the buffer to return
+// the array of Output device handles.
+//
+// Output:
+// EFI_STATUS
+// If returned status is not succeful or find no available device,
+// the *OutputHandleBuffer will be NULL
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+// <AMI_PHDR_END>
+
+EFI_STATUS
+GetOutputDeviceHandlesManagedByDriver (
+ IN EFI_HANDLE DriverBindingHandle,
+ IN EFI_HANDLE ControllerHandle,
+ OUT UINTN *OutputHandleCount,
+ OUT EFI_HANDLE **OutputHandleBuffer )
+{
+ EFI_STATUS Status;
+ UINTN HandleIndex = 0;
+
+ *OutputHandleCount = 0;
+ *OutputHandleBuffer = NULL;
+
+ Status = GetEdidDiscoveredHandlesManagedByDriver (DriverBindingHandle, ControllerHandle);
+ if (OutputHndList.ItemCount) {
+ *OutputHandleCount = OutputHndList.ItemCount;
+ *OutputHandleBuffer = MallocZ(sizeof(EFI_HANDLE) * (*OutputHandleCount));
+ for (HandleIndex = 0; HandleIndex < *OutputHandleCount; HandleIndex++) {
+ (*OutputHandleBuffer)[HandleIndex] = *(EFI_HANDLE*)(OutputHndList.Items[HandleIndex]);
+ }
+ }
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+//
+// Procedure: GetDeviceName
+//
+// Description: None.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+BOOLEAN
+GetDeviceName (
+ IN EFI_HANDLE DriverBindingHandle,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildControllerHandle,
+ OUT CHAR8 *String )
+{
+ EFI_STATUS Status;
+ CHAR16 *DeviceName;
+ EFI_COMPONENT_NAME_PROTOCOL *ComponentName;
+ CHAR8 *Lang = NULL;
+ CHAR8 *TempChar;
+
+
+ //
+ // Get driver name from UEFI 2.0 Component Name 2 protocol interface.
+ //
+ Status = pBS->OpenProtocol(
+ DriverBindingHandle,
+ &gEfiComponentName2ProtocolGuid,
+ (VOID**)&ComponentName,
+ NULL,
+ NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ if (!EFI_ERROR(Status)) {
+ Status = ComponentName->GetControllerName(ComponentName, ControllerHandle, ChildControllerHandle, LANGUAGE_CODE_ENGLISH, &DeviceName);
+ if (EFI_ERROR(Status)) {
+ //
+ // Driver does not support "en-us", try to get SupportedLanguages
+ //
+ pBS->AllocatePool(EfiBootServicesData, Strlen(ComponentName->SupportedLanguages)+1, &Lang);
+ if (Lang != NULL) {
+ Strcpy(Lang, ComponentName->SupportedLanguages);
+ TempChar = Strstr(Lang, ";");
+ if (TempChar != NULL) *TempChar = 0x0000;
+ Status = ComponentName->GetControllerName(ComponentName, ControllerHandle, ChildControllerHandle, Lang, &DeviceName);
+ pBS->FreePool(Lang);
+ Lang = NULL;
+ }
+ }
+ if (!EFI_ERROR(Status)) {
+ Sprintf(String, "%S", DeviceName);
+ return TRUE;
+ }
+ }
+
+ //
+ // If it fails to get the driver name from Component Name protocol interface, we should fall back on
+ // EFI 1.1 Component Name protocol interface.
+ //
+ Status = pBS->OpenProtocol(
+ DriverBindingHandle,
+ &gEfiComponentNameProtocolGuid,
+ (VOID**)&ComponentName,
+ NULL,
+ NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ if (!EFI_ERROR(Status)) {
+ Status = ComponentName->GetControllerName(ComponentName, ControllerHandle, ChildControllerHandle, "eng", &DeviceName);
+ if (!EFI_ERROR(Status)) {
+ Sprintf(String, "%S", DeviceName);
+ return TRUE;
+ }
+ }
+
+ return FALSE;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/BlockS3Var/BlockS3Var.c b/Board/EM/BlockS3Var/BlockS3Var.c
new file mode 100644
index 0000000..2d1e903
--- /dev/null
+++ b/Board/EM/BlockS3Var/BlockS3Var.c
@@ -0,0 +1,179 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2015, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/BlockS3Var/BlockS3Var.c 1 6/18/15 4:02a Calvinchen $
+//
+// $Revision: 1 $
+//
+// $Date: 6/18/15 4:02a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/BlockS3Var/BlockS3Var.c $
+//
+// 1 6/18/15 4:02a Calvinchen
+// [TAG] EIP224171
+// [Category] New Feature
+// [Description] Initial check-in for New Security Vulnerabilities :
+// Intel-TA-201505-001
+// [Files] BlockS3Var.cif
+// BlockS3Var.chm
+// BlockS3Var.sdl
+// BlockS3Var.mak
+// BlockS3Var.c
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: BlockedS3Var.C
+//
+// Description: This file contains code for blocking Variables at runtime.
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+//----------------------------------------------------------------------------
+// Include(s)
+//----------------------------------------------------------------------------
+
+
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+#include <BlockedS3Var.h>
+
+//----------------------------------------------------------------------------
+// Constant, Macro and Type Definition(s)
+//----------------------------------------------------------------------------
+// Constant Definition(s)
+#define BDS_CONNECT_DRIVERS_PROTOCOL_GUID \
+ { 0x3aa83745, 0x9454, 0x4f7a, { 0xa7, 0xc0, 0x90, 0xdb, 0xd0, 0x2f, 0xab, 0x8e } }
+
+// Type Definition(s)
+typedef struct {
+ CHAR16 *Name;
+ EFI_GUID Guid;
+} VAR_STRUCT;
+
+// Function Prototype(s)
+VOID BdsEvtFunc (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+);
+
+//----------------------------------------------------------------------------
+// Variable and External Declaration(s)
+//----------------------------------------------------------------------------
+// Variable Declaration(s)
+VAR_STRUCT gBlockedS3VarList[] = { BLOCKED_S3_VAR_ELINK
+ {NULL, {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }}};
+static BOOLEAN gInitializationCompleted = FALSE;
+static BOOLEAN gEndOfDxe = FALSE;
+static EFI_GUID gBdsConnectDriversProtocolGuid = BDS_CONNECT_DRIVERS_PROTOCOL_GUID;
+
+// External Declaration(s)
+extern EFI_BOOT_SERVICES *pBS;
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: SetVariableS3Hook
+//
+// Description: This function checks the input Variable whether it needs to
+// be blocked or not.
+//
+// Input: VariableName - Pointer to Variable Name in Unicode
+// VendorGuid - Pointer to Variable GUID
+// Attributes - Attributes of the Variable
+// DataSize - Size of the Variable
+// Data - Pointer to memory where Variable data is stored
+//
+// Output: EFI_STATUS
+// EFI_UNSUPPORTED - The Variable isn't found.
+// EFI_WRITE_PROTECTED - The Variable is found.
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS SetVariableS3Hook (
+ IN CHAR16 *VariableName,
+ IN EFI_GUID *VendorGuid,
+ IN UINT32 Attributes,
+ IN UINTN DataSize,
+ IN VOID *Data )
+{
+ EFI_STATUS Status;
+ EFI_EVENT BdsEvt;
+ VOID *Registration = NULL;
+ UINT32 i;
+
+ if (gBlockedS3VarList[0].Name == NULL) return EFI_UNSUPPORTED; // no Variable needs to be checked.
+
+ if (!gInitializationCompleted) {
+ gInitializationCompleted = TRUE;
+ if (!pSmst) {
+ Status = pBS->CreateEvent(EVT_NOTIFY_SIGNAL, TPL_CALLBACK, BdsEvtFunc, NULL, &BdsEvt);
+ if (EFI_ERROR(Status)) {
+ TRACE((TRACE_ALWAYS,"Unable to create BDS event\n"));
+ return Status;
+ }
+ pBS->RegisterProtocolNotify (\
+ &gBdsConnectDriversProtocolGuid, BdsEvt, &Registration);
+ }
+ }
+
+ if (gEndOfDxe || pSmst) {
+ for (i = 0; gBlockedS3VarList[i].Name != NULL; i++) {
+ if (!Wcscmp(VariableName, gBlockedS3VarList[i].Name) && !guidcmp(VendorGuid, &gBlockedS3VarList[i].Guid)) {
+ return EFI_WRITE_PROTECTED;
+ }
+ }
+ }
+
+ return EFI_UNSUPPORTED;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: BdsEvtFunc
+//
+// Description: This function is called when BDS is ready to connect drivers.
+//
+// Input: Event - Event of callback
+// Context - Context of callback.
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+BdsEvtFunc (
+ IN EFI_EVENT Event,
+ IN VOID *Context )
+{
+ gEndOfDxe = TRUE;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2015, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/BlockS3Var/BlockS3Var.chm b/Board/EM/BlockS3Var/BlockS3Var.chm
new file mode 100644
index 0000000..64f8113
--- /dev/null
+++ b/Board/EM/BlockS3Var/BlockS3Var.chm
Binary files differ
diff --git a/Board/EM/BlockS3Var/BlockS3Var.cif b/Board/EM/BlockS3Var/BlockS3Var.cif
new file mode 100644
index 0000000..0210efc
--- /dev/null
+++ b/Board/EM/BlockS3Var/BlockS3Var.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "Block S3 Variable"
+ category = eModule
+ LocalRoot = "Board\EM\BlockS3Var\"
+ RefName = "BlockS3Var"
+[files]
+"BlockS3Var.chm"
+"BlockS3Var.sdl"
+"BlockS3Var.mak"
+"BlockS3Var.c"
+<endComponent>
diff --git a/Board/EM/BlockS3Var/BlockS3Var.mak b/Board/EM/BlockS3Var/BlockS3Var.mak
new file mode 100644
index 0000000..e273548
--- /dev/null
+++ b/Board/EM/BlockS3Var/BlockS3Var.mak
@@ -0,0 +1,72 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2015, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/BlockS3Var/BlockS3Var.mak 1 6/18/15 4:02a Calvinchen $
+#
+# $Revision: 1 $
+#
+# $Date: 6/18/15 4:02a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/BlockS3Var/BlockS3Var.mak $
+#
+# 1 6/18/15 4:02a Calvinchen
+# [TAG] EIP224171
+# [Category] New Feature
+# [Description] Initial check-in for New Security Vulnerabilities :
+# Intel-TA-201505-001
+# [Files] BlockS3Var.cif
+# BlockS3Var.chm
+# BlockS3Var.sdl
+# BlockS3Var.mak
+# BlockS3Var.c
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: BlockS3Var.mak
+#
+# Description: This make file builds Blocked S3 Variable eModule
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+Prepare : $(BUILD_DIR)/BlockedS3Var.h
+
+$(BUILD_DIR)/BlockedS3Var.h : $(BUILD_DIR)/token.mak
+ $(ECHO) \
+ #define BLOCKED_S3_VAR_ELINK $(BLOCKED_S3_VAR_LIST)$(EOL)\
+> $(BUILD_DIR)/BlockedS3Var.h
+
+NvramDxeBin : $(BUILD_DIR)\BlockS3Var.obj
+
+BLOCKED_S3_VAR_CFLAGS=$(CFLAGS) /D\"BLOCKED_S3_VAR_LIST=$(BLOCKED_S3_VAR_LIST)\"
+
+$(BUILD_DIR)\BlockS3Var.obj : $(BLOCK_S3_VAR_DIR)\BlockS3Var.c
+ $(CC) $(BLOCKED_S3_VAR_CFLAGS) /Fo$(BUILD_DIR)\ $(BLOCK_S3_VAR_DIR)\BlockS3Var.c
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2015, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#********************************************************************** \ No newline at end of file
diff --git a/Board/EM/BlockS3Var/BlockS3Var.sdl b/Board/EM/BlockS3Var/BlockS3Var.sdl
new file mode 100644
index 0000000..6bc1e88
--- /dev/null
+++ b/Board/EM/BlockS3Var/BlockS3Var.sdl
@@ -0,0 +1,29 @@
+TOKEN
+ Name = "BlockS3Var_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable BlockS3Var support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "BLOCK_S3_VAR_DIR"
+End
+
+MODULE
+ Help = "Includes BlockS3Var.mak to Project"
+ File = "BlockS3Var.mak"
+End
+
+ELINK
+ Name = "BLOCKED_S3_VAR_LIST"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "SetVariableS3Hook,"
+ Parent = "SetVariableHook"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/Csm/CSM.chm b/Board/EM/Csm/CSM.chm
new file mode 100644
index 0000000..bd06c00
--- /dev/null
+++ b/Board/EM/Csm/CSM.chm
Binary files differ
diff --git a/Board/EM/Csm/MBIOSEQU.EQU b/Board/EM/Csm/MBIOSEQU.EQU
new file mode 100644
index 0000000..d467f9f
--- /dev/null
+++ b/Board/EM/Csm/MBIOSEQU.EQU
@@ -0,0 +1,1080 @@
+;Inclusion guard
+ifndef _mbiosequ_equ_
+_mbiosequ_equ_ equ 1
+.586p
+.xlist
+
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2001, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+;** **
+;** Phone (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
+;****************************************************************************
+; $Header: /Alaska/SOURCE/Modules/CSM/Generic/OEM Hooks/MBIOSEQU.EQU 1 5/16/06 2:39p Olegi $
+;
+; $Revision: 1 $
+;
+; $Date: 5/16/06 2:39p $
+;****************************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/SOURCE/Modules/CSM/Generic/OEM Hooks/MBIOSEQU.EQU $
+;
+; 1 5/16/06 2:39p Olegi
+;
+; 16 4/23/03 3:38p Anandj
+; Added error type 'NO_PS2_MOUSE_ERR'.
+;
+; 15 1/28/03 4:01p Dickh
+; New module id for osb_logo_module_id (On Screen Branding) added.
+;
+; 14 1/16/03 3:29p Dickh
+; Added comment for module IDs F0 - FF (they are allocated for OEM use).
+;
+; 13 12/23/02 1:23p Anandj
+; Currently BIOS supports 5 error types.
+; Informal, Fatal, Warning, General and CMOS related enumerated 1 to 5.
+; Types 6 and 7 are reserved for future BIOS core use. Error types 8 to F
+; are to be used by OEM.
+;
+; 12 12/20/02 12:51p Kevinm
+; Moved the structure SETUP_ATA_TABLE_STRUC here from SETUP.ASM.
+;
+; 11 9/11/02 11:17a Kevinm
+; Updated to support up to 4 IDE channels.
+;
+; 10 5/24/02 1:40p Anandj
+; Added 'DISPLAY_TOKEN_MESSAGE_UNBUFFERED' in the ouput API equates
+;
+; 9 5/01/02 10:37a Anandj
+; Added a new error type PASSWORD_CHECK_ERROR_NON_CRITICAL the default
+; behavior is set to warning.
+;
+; 8 4/09/02 5:07p Juand
+; Added CID_CUSTOM_FOR_OEM as requested by INTEL.
+;
+; 7 12/14/01 10:55a Juand
+; Defined bits three and four for the variable boot_block_flag.
+;
+; 6 12/04/01 9:42a Anandj
+; Fixed the problem in the header of e820_info_struc
+;
+; 5 12/03/01 11:30a Anandj
+; updated header for e820_info_struc
+;
+; 4 11/29/01 9:31a Anandj
+; Additional memory type 'ram_os_1M' to support memory above 4GB
+; the upper bit means he granularity is 1MB.
+; While reporting we have to convert memory in no of bytes and reset the
+; upper bit for memory type.
+;
+; 3 10/02/01 7:06p Sudhakaro
+; Removed the invalid VSS prefix ("*").
+;
+; 2 10/02/01 6:10p Sudhakaro
+; Changed MIDs to CIDs to avoid confusion with ROM module IDs.
+;
+; 12 9/08/01 7:33a Sudhakaro
+; Removed currently unused error code "UNKNOWN_BIOS_ERR".
+;
+; 11 8/28/01 8:28p Sudhakaro
+; Added the equate CURSOR_COLUMN_FOR_IDE_INFO, being used in IDE
+; information display.
+;
+; 10 8/22/01 6:09p Kevinm
+; Added a module id for PARTIES logo.
+;
+; 9 8/17/01 7:39p Sudhakaro
+; Kernel error codes are redefined to have lower byte of error codes
+; directly mapped to SMBIOS error bits for errors defined in SMBIOS spec.
+;
+; 8 8/15/01 2:06p Sudhakaro
+; Module IDs are allocated for all different components of BIOS. Error
+; codes are modified to have Module ID in the upper byte.
+;
+; 7 8/13/01 3:44p Sudhakaro
+; Added the equate CDS_0Eh_DATE_TIME_ERR_BIT for Bit-2 of CMOS Diagnostic
+; Status Byte.
+;
+; 6 7/24/01 9:30a Anandj
+; Macro eK_PROC is moved to mbiosmac.mac.
+;
+; 5 7/24/01 9:01a Anandj
+; Macros IO_DELAY and IO_DELAY_BB are moved to mbiosmac.mac.
+;
+; 4 7/10/01 5:34p Chrism
+; Deleted reference to num_proc_port
+;
+; 2 5/31/01 3:24p Anandj
+; Changed the IO_DELAY macro and created IO_DELAY_BB for stackless use
+;
+; 1 5/25/01 1:38p Anandj
+; First Check in on CORE database
+;
+; 5 5/10/01 4:51p Sudhakaro
+; Updated to use the macro SET_ORG instead of ORG directive, so that
+; MAPGUARD can detect the code overlap problems.
+;
+; 4 5/01/01 3:04p Sudhakaro
+; Updated for <INS> and <END> key functionality during POST by shared
+; data segment (BBLK_DSEG) between BootBlock and POST modules.
+;
+; 2 3/28/01 12:42p Sudhakaro
+; Updated for TBLv1.1 integration
+;
+; 9 3/01/01 5:01p Juand
+; Added include ek.equ for Table Driven POST. Removed multiple copyright
+; blocks.
+;
+; 8 2/21/01 1:54p Juand
+; Deleted temporary module id 30h that was being used for the BIGBIOS
+; module.
+; Created two new module_ids for SLAB and BCP data
+;
+; 7 2/20/01 9:22a Juand
+; Deleted unused equates.
+;
+; 6 2/05/01 10:49a Juand
+; Removed I2O equate.
+;
+; 5 1/11/01 5:29p Juand
+; Removed int13 odule Header
+;
+; 4 12/14/00 6:04p Juand
+; Removed RUNTIME Header structure definition.
+;
+; 3 11/21/00 1:50p Juand
+; BigBIOS changes.
+;
+; 2 1/31/00 7:04p Juand
+; Added Inclusion guard.
+;
+; 1 11/29/99 11:48a Debkumar
+; Initial CheckIn for Core 7.00.
+;
+; 2 3/16/99 6:27p Robertj
+; Added initial ADM code (beta version)
+;
+; 3 1/05/98 11:42a Debkumar
+; New module IDs added. ARMD emulation type added.
+;
+; 1 9/16/97 11:22a Debkumar
+; Files changed from 063000 to 063001
+;
+; 3 5/23/97 7:41a Debkumar
+; Equates added for ACPI Table Module ID (0Fh) and ACPI AML Module ID
+; (10h)
+;
+; 2 3/12/97 3:51p Debkumar
+; Module ID for OEM Logo Module added.
+;
+; 1 1/31/97 11:30a Debkumar
+; New files for 62700.
+;
+; 2 1/09/97 3:42p Debkumar
+; Equates added for Password used, FDD/HDD access control bits used in
+; 40:EA.
+;
+; 1 1/02/97 10:50a Debkumar
+; Started with 6.26.02 files.
+;
+; 9 12/30/96 2:03p Debkumar
+; ROMID and INT13 module IDs added.
+;
+; 1 11/04/96 6:06p Debkumar
+;
+; 8 11/01/96 11:40a Debkumar
+; ROMID Module ID equate (0Ch) added.
+;
+; 2 8/28/96 9:14a Mandal
+; Synchronized with bestlink current changes for 6.26 release with USB
+; support, INT10.BIN module, HDISK/CDROM changes.
+;
+; 6 4/03/96 6:33p Mandal
+; MPS module ID added.
+;
+; 3 2/19/96 6:47p Mandal
+; BBLK_RUNTIME_INTERFACE_MODULE_ID equate added.
+;
+; 2 1/12/96 5:06p Dickh
+; Added SourceSafe keywords to track revision history.
+;****************************************************************************
+;****************************************************************************
+
+
+;---------------------------------------;
+; COMPRESSED BIOS EQUATES ;
+;---------------------------------------;
+setup_binary_module_id equ 04h ; SETUP Binary identifier
+bblk_runtime_interface_module_id equ 08h; Module containing uncompress routine
+notebook_module_id equ 0Ah ; NoteBook BIOS Module identifier
+romid_module_id equ 0Ch ; ROMID Module identifier
+oem_logo_module_id equ 0Eh ; OEM Logo Module identifier
+acpi_table_module_id equ 0Fh ; ACPI Table Module identifier
+acpi_aml_module_id equ 10h ; ACPI AML Code Module identifier
+micro_code_module_id equ 11h ; P6 Micro Code Module identifier
+ micro_code_patch_length equ 08h ; #of bytes added to Micro code..this
+ ; helps us update BIOS checksum when
+ ; micro code gets updated in runtime
+ ; IF THIS EUQATE GETS CHANGED, NECESSARY
+ ; CHANGES NEEDS TO BE DONE IN CORE.MAK FILE
+memory_size_module_id equ 15h ; Memory Sizing Module identifier
+bios_debug_module_id equ 17h ; BIOS Debug Module identifier
+adm_module_id equ 18h ; Display Manager Module identifier
+adm_font_module_id equ 19h ; Font Module identifier
+small_logo_module_id equ 1ah ; Small Logo(s) Module identifer
+slab_module_id equ 1bh ; Single Link Arch BIOS Module identifier
+bcp_info_module_id equ 1ch ; BCP data area module identifier
+ ; 1D-1F..Reserved for future use
+ ; 20-2F..For User defined module
+pci_option_rom_id equ 20h ; PCI Option ROM identifier
+multi_language_module_id equ 21h ; Multi Language identifier
+ ; 30-3F..Reserved for future use
+serial_redir_module_id equ 2fh
+parties_logo_module_id equ 30h
+osb_logo_module_id equ 31h ; On Screen Branding Logo Package
+ ; F0-FF..Reserved for OEM use, these
+ ; IDs should never be used by AMI.
+
+
+;-----------------------------------------------------------------------;
+; BOOT DRIVE EQUATES ;
+;-----------------------------------------------------------------------;
+hdd0_boot_drive equ 01h
+hdd1_boot_drive equ hdd0_boot_drive+1
+hdd2_boot_drive equ hdd1_boot_drive+1
+hdd3_boot_drive equ hdd2_boot_drive+1
+hdd4_boot_drive equ hdd3_boot_drive+1
+hdd5_boot_drive equ hdd4_boot_drive+1
+hdd6_boot_drive equ hdd5_boot_drive+1
+hdd7_boot_drive equ hdd6_boot_drive+1
+fdd0_boot_drive equ hdd7_boot_drive+1
+fdd1_boot_drive equ fdd0_boot_drive+1
+afd_boot_drive equ fdd1_boot_drive+1
+afd_hdd_boot_drive equ afd_boot_drive+1
+cd_boot_drive equ afd_hdd_boot_drive+1
+scsi_boot_drive equ cd_boot_drive+1
+network_boot_drive equ scsi_boot_drive+1
+
+
+;---------------------------------------;
+; MISCELLANEOUS EQUATES ;
+;---------------------------------------;
+level_1_int equ 70h ; master int controller base
+level_2_int equ 08 ; slave int controller base
+beep_one_on_time equ 0e0h ; speaker on time
+beep_one_off_time equ 0d0h ; speaker off time
+beep_one_envelope_time equ 080h ; envelope time for single beep
+beep_error_off_time equ 6 ; silence period for error beep
+
+
+;---------------------------------------;
+; 8254 TIMER EQUATES ;
+;---------------------------------------;
+timer_control_port equ 43h ; 8254 control register
+timer_2_port equ 42h ; 8254 ch_2 select
+timer_1_port equ 41h ; 8254 ch_1 select
+timer_0_port equ 40h ; 8254 ch_0 select
+timer_delta_wait_time equ 10h ; time for delta count test
+timer_delta_count_diff equ 10 ; tollerable delta count diff
+timer_delta_1_data equ 0ffh ; data for delta count 1 test
+timer_delta_2_data equ 0eeh ; data for delta count 2 test
+refresh_delta_count_diff equ 10 ; refresh duty tolerance.
+
+
+;---------------------------------------;
+; 8042 KB CONTROLLER EQUATES ;
+;---------------------------------------;
+kb_stat_port equ 64h ; keyboard status port
+sound_port equ 61h ; parity,refresh,sound,timer ..
+refresh_port equ 61h
+kb_data_port equ 60h ; keyboard data port
+kb_buffer_wait_time equ 12 ; kb buffer full loop count
+
+
+;---------------------------------------;
+; CMOS EQUATES ;
+;---------------------------------------;
+cmos_addr_port equ 70h ; address selection port
+cmos_data_port equ 71h ; data r/w port
+shutdown_code_1 equ 01 ; shutdown after memory error
+shutdown_code_2 equ 02 ; v_mode exception shut code
+shutdown_code_3 equ 03 ; shutdown after memory test
+shutdown_code_6 equ 06 ; to display memory size
+
+
+;---------------------------------------;
+; VIRTUAL MODE EQUATES ;
+;---------------------------------------;
+v_mode_msw equ 0001h ; virtual mode machine status
+v_mode_idt_size equ 0100h ; virtual mode IDT segment size
+v_mode_dum_size equ 0000h ; virtual mode dummy seg size
+v_mode_dum_offs equ 0000h ; virtual mode dummy offset
+v_mode_ds_size equ 0fc00h ; virtual mode (DS) seg size
+v_mode_ds_offs equ 0400h ; virtual mode (DS) offset
+v_mode_es_size equ 0ffffh ; virtual mode (ES) seg size
+v_mode_es_offs equ 0000h ; virtual mode (ES) offset
+v_mode_ss_size equ 0100h ; virtual mode (SS) seg size
+v_mode_ss_offs equ 0300h ; virtual mode (SS) offset
+v_mode_cs_size equ 0ffffh ; virtual mode (CS) seg size
+v_mode_cs_offs equ 0000h ; virtual mode (CS) offset
+v_mode_es_entry equ 40h ; virtual mode (ES) entry ,,
+
+
+;---------------------------------------;
+; 8237 DMA CONTROLLER EQUTES ;
+;---------------------------------------;
+dma_1_byte_ptr_ff_reset equ 0ch ; DMA unit 1 byte ptr f/f clear
+dma_unit_1_command_port equ 08h ; DMA unit 1 command port
+dma_unit_1_base equ 00h ; DMA unit 1 base
+dma_unit_1_mask_clear equ 0eh ; DMA unit 1 mask clear
+dma_unit_1_mode equ 0bh ; DMA unit 1 mode
+dma_unit_1_master_clear equ 0dh ; DMA unit 1 reset port
+dma_2_byte_ptr_ff_reset equ 0d8h ; DMA unit 2 byte ptr f/f clear
+dma_unit_2_master_clear equ 0dah ; DMA unit 2 reset port
+dma_unit_2_command_port equ 0d0h ; DMA unit 2 command port
+dma_unit_2_base equ 0c0h ; DMA unit 2 base
+dma_unit_2_mask_clear equ 0dch ; DMA unit 2 mask clear
+dma_unit_2_mode equ 0d6h ; DMA unit 2 mode
+dma_unit_2_writ_req_reg equ 0d2h ; DMA unit 2 write request
+dma_unit_2_mask_s_r_reg equ 0d4h ; DMA unit 2 mask set reset
+dma_page_base equ 80h ; DMA page register base
+dma_page_ch_1 equ 87h ; DMA page channel 1
+dma_page_ch_2 equ 83h ; DMA page channel 2
+dma_page_registers equ 16 ; DMA page registers count
+dma_channel_registers equ 8 ; DMA channel registers count
+
+
+;---------------------------------------;
+; 8259 INTERRUPT CNTLR EQUATES ;
+;---------------------------------------;
+i_m_m_port equ 21h ; interrupt master mask port
+i_s_m_port equ 0a1h ; interrupt slave mask port
+i_c_m_port equ 20h ; interrupt cntlr master port
+i_c_s_port equ 0a0h ; interrupt cntlr slave port
+
+
+
+;---------------------------------------;
+; E-820 information structure ;
+;---------------------------------------;
+
+;<AMI_SHDR_START>
+;----------------------------------------------------------------------------
+; Name: e820_info_struc
+;
+; Fields: Name Type Description
+; ------------------------------------------------------------
+; start_addr DWORD 32-bit start address
+; size_bytes DWORD size in bytes
+; mem_type byte memory type
+;
+; Description: Structure used to define E820 information by the BIOS as well
+; as emodules.
+;
+; different available memory types are
+; "!!!! only Following types are reported to OS !!!!"
+; ram_os(01h) - memory type available to OS
+; ram_res(02h) - memory type reserved by system and
+; must not be used by OS
+; ram_acpi_data(03h)- ACPI Reclaim data area
+; ram_acpi_nvs(04h)- ACPI NVS area
+;
+; "!!!! FOR BIOS INTERNAL PURPOSE ONLY !!!!"
+; ram_dummy(0FFh) Dummy entry for BIOS internal use.
+; "!!!! Addition for memory above 4GB !!!!"
+; ram_os_1M(081h) - memory type available to OS the upper
+; bit means he granularity is 1MB.
+; While reporting we have to convert
+; memory in no of bytes and reset the
+; upper bit for memory type.
+;
+;
+;
+;----------------------------------------------------------------------------
+;<AMI_SHDR_END>
+
+e820_info_struc struc
+ start_addr dd ? ; 32-bit start address
+ size_bytes dd ? ; size in bytes
+ mem_type db ? ; memory type
+e820_info_struc ends
+
+ram_os equ 01h ; memory type available to OS
+ram_res equ 02h ; memory type reserved by system and
+ ; must not be used by OS
+ram_acpi_data equ 03h ; ACPI Reclaim data area
+ram_acpi_nvs equ 04h ; ACPI NVS area
+ram_dummy equ 0FFh ; Dummy entry for BIOS internal use.
+
+; Addition for memory above 4GB "!!!! FOR INTERNAL PURPOSE ONLY !!!!"
+ram_os_1M equ 081h ; memory type available to OS
+ ; the upper bit means he granularity
+ ; is 1MB.
+ ; While reporting we have to convert
+ ; memory in no of bytes and reset the
+ ; upper bit for memory type.
+ ;
+
+;---------------------------------------;
+; FDD/HDD Access Control Equates ;
+; in 40:EA (OEM_SUPPORT_BYTE) ;
+;---------------------------------------;
+password_used_bit equ 00000001b; Bit-0 = 0..No Password or Supervisor Password used
+ ; 1..User Password used
+fdd_remove_bit equ 00000010b; Bit-1 = 0..FDD is present
+ ; 1..FDD is removed
+fdd_access_control_bit equ 00000100b; Bit-2 = 0..FDD R/W
+ ; 1..FDD R/O
+hdd_access_control_bit equ 00001000b; Bit-3 = 0..HDD R/W
+ ; 1..HDD R/O
+ ; Bit7-4 = Not Used
+;---------------------------------------;
+; ARMD Device Emulation Type ;
+;---------------------------------------;
+armd_fdd_emulation equ 00h ; 00 -> ARMD to be emulated as Floppy
+armd_hdd_emulation equ 01h ; 01 -> ARMD to be emulated as Hard Disk
+;------------- BIOS_SCRATCH ------------;
+bios_f_shadow_bit equ 00000001b; F000 shadow information
+ ; 0 = Disabled
+ ; 1 = Enabled
+bios_e_shadow_bit equ 00000010b; E000 shadow information
+ ; 0 = Disabled
+ ; 1 = Enabled
+ ; Bit3-2........NOT USED
+floppy_error_bit equ 00010000b; POST Floppy Error Status
+ ; 0 = FDD ok
+ ; 1 = FDD error
+acpi_aware_os_bit equ 00100000b; ACPI Aware OS Information
+ ; 0 = Not an ACPI Aware OS
+ ; 1 = ACPI Aware OS
+bios_post_complete_bit equ 01000000b; BIOS POST information
+ ; 0 = POST not complete
+ ; 1 = POST complete
+int19_display_bit equ 10000000b; Active display during INT19
+ ; 0 = BIOS display
+ ; 1 = OEM display
+
+;------------- RT_CMOS_BYTE ------------;
+rt_cmos_os2_bit equ 10000000b; bit-7 = OS2 compatibilty mode
+rt_cmos_ps2_bit equ 01000000b; bit-6 = PS2 Mouse support
+rt_cmos_virus_bit equ 00100000b; bit-5 = virus protection
+rt_cmos_password_bit equ 00010000b; bit-4 = password check
+rt_cmos_parity_bit equ 00001000b; bit-3 = parity check
+rt_cmos_6064_bit equ 00000100b; bit-2 = 60/64 emulation
+ ; bit1-0..not used
+
+;-----------------------------------------------------------------------;
+; CONTROLLER_DETAILS_STRUC ;
+;-----------------------------------------------------------------------;
+CHANNEL_DETAILS_STRUC struc
+ wBasePortAddress dw ? ; Base Port Address
+ wControlPortAddress dw ? ; Control Port Address
+ wBusMasterPortAddress dw ? ; Bus Master Port Address
+ wPtrISR dw ? ; ptr to IRQ ISR
+ bIRQ db ? ; IRQ Value
+ wBusDeviceFunction dw ? ; Bus#, Device#, Function#
+CHANNEL_DETAILS_STRUC ends
+
+;-----------------------------------------------------------------------;
+; bMiscInfo Details ;
+;-----------------------------------------------------------------------;
+; following information is built from setup question
+i13_virus_protection_bit equ 00000001b; bit-0 = virus protection information
+ ; 0 = disabled, 1 = enabled
+; following information is built from IDE_PARAM_VALIDATE_BIT in _MISC_INFO byte
+i13_ata_parameter_validate_bit equ 00000010b; bit-1 = ATA parameter validate information
+ ; 0 = do not vaildate user selection
+ ; 1 = validate user selection
+i13_fdd_setup_bit equ 00000100b; bit-2 = FDD init information
+ ; 0 = do not execute FDD setup
+ ; 1 = execute FDD setup
+i13_display_smart_status_bit equ 00001000b; bit-3 = Display SMART staus information
+ ; 0 = do not display SMART status
+ ; 1 = display SMART status
+i13_display_dma_status_bit equ 00010000b; bit-4 = Display DMA staus information
+ ; 0 = do not display DMA status
+i13_activate_INT13_ISR_bit equ 00100000b; bit-5 = 1 to
+
+; ; Bit7-5= not used
+
+;-----------------------------------------------------------------------;
+; ATA(PI) INFORMATION USED BY SETUP SERVER ;
+;-----------------------------------------------------------------------;
+SETUP_ATA_INFO_STRUC struc
+ bType db ? ; device type 0/1/2/3 for None/HDD/CDROM/ARMD
+ wInfo dw ? ; bit-mapped information (bit definitions, see below)
+ wCylinder dw ? ; #of cylinders (1-based)
+ bHead db ? ; #of heads (1-based)
+ bSPT db ? ; #of sectors per track
+ dNoOfSectors dd ? ; total #of sectors
+ bPIOMode db ? ; PIO Mode
+ bADMAMode db ? ; Async DMA Mode (single/multi word depends on the INFO Word)
+ bUDMAMode db ? ; Sync (Ultra) DMA Mode
+ bMultiSector db ? ; #of sectors that can be xferred in one interrupt
+ bSizeString db 8 dup (?); ASCIIZ Size string
+ bVendorString db 41 dup (?); ASCIIZ Vendor string
+SETUP_ATA_INFO_STRUC ends
+
+;-----------------------------------------------------------------------;
+; SETUP_ATA_TABLE ;
+; this table contains the information regarding the base address and the;
+; device selection value to be used by BIOS for auto-detecting all the ;
+; ATA(PI) devices before going to Setup. ;
+;-----------------------------------------------------------------------;
+SETUP_ATA_TABLE_STRUC STRUC
+ wBasePortAddress dw ? ; base port address
+ bDeviceSelection db ? ; 80h/81h for master/slave
+SETUP_ATA_TABLE_STRUC ENDS
+
+;-----------------------------------------------------------------------;
+; INFO WORD DETAILS in SETUP_ATA_INFO_STRUC ;
+;-----------------------------------------------------------------------;
+chs_bit equ 00000001b; bit-0 = 1..CHS information valid
+pio_bit equ 00000010b; bit-1 = 1..PIO supported
+block_bit equ 00000100b; bit-2 = 1..block xfer supported
+lba_bit equ 00001000b; bit-3 = 1..LBA translation supported
+smart_bit equ 00010000b; bit-4 = 1..SMART supported
+async_sw_dma_bit equ 00100000b; bit-5 = 1..Async SingleWord DMA supported
+async_mw_dma_bit equ 01000000b; bit-6 = 1..Async MultiWord DMA supported
+sync_dma_bit equ 10000000b; bit-7 = 1..Sync DMA supported
+
+;-----------------------------------------------------------------------;
+; BOOT_BLOCK_FLAG ;
+; these bits define the different programming options based on the keys ;
+; pressed during power-on. ;
+;-----------------------------------------------------------------------;
+; NOTE: the HALT_AFTER_PRGRAM_BIT is build during BIOS building, all other
+; bits are set/reset properly in recovery code according to the forced
+; recovery condition (e.g. key-strokes pressed) during power-on.
+halt_after_program_bit equ 00000001b; bit-0 = 0..reset after programming
+ ; 1..halt after programming
+destroy_cmos_bit equ 00000010b; bit-1 = 0..do not destroy cmos
+ ; 1..destroy cmos
+destroy_nvram_bit equ 00000100b; bit-2 = 0..do not destroy NVRAM
+ ; 1..destroy NVRAM
+recovery_request_bit equ 00001000b; bit-3 = 0..Do not force FLASH recovery
+ ; 1..Force FLASH recovery
+recovery_result_bit equ 00010000b; bit-4 = 0..FLASH recovery success
+ ; 1..FLASH recovery failed
+ ; bit-5.....reserved for future use
+rom_checksum_bit equ 01000000b; bit-6 = 0..existing ROM checksum good
+ ; 1..existing ROM checksum bad
+flash_program_bit equ 10000000b; bit-7 = 0..do not program Flash part
+ ; 1..program Flash part
+
+;-----------------------------------------------------------------------;
+; ATAPI DEVICE SUPPORT IN BOOT BLOCK RECOVERY ;
+;-----------------------------------------------------------------------;
+; ATAPI_HARDWARE_ENTRY ;
+;-----------------------------------------------------------------------;
+ATAPI_HARDWARE_ENTRY_STRUC struc
+ wBasePort dw ? ; Base Port Address
+ wControlPort dw ? ; Control Port Address
+ bDriveSelection db ? ; Drive Selection Parameter
+ bIRQ db ? ; IRQ used
+ATAPI_HARDWARE_ENTRY_STRUC ends
+
+;-----------------------------------------------------------------------;
+; ATAPI_HARDWARE_INFO ;
+;-----------------------------------------------------------------------;
+ATAPI_HARDWARE_INFO_STRUC struc
+ wNoEntry dw ? ; #of entries present
+ATAPI_HARDWARE_INFO_STRUC ends
+
+
+;-----------------------------------------------------------------------;
+; WFM LOCKOUT CAPABILITIES BIT MAP DEFINITION ;
+;-----------------------------------------------------------------------;
+; 1 0
+; 5432109876543210
+wfm_hard_onoff_bit equ 0000000000000001b; bit-0, Reserved (No longer used)
+wfm_soft_onoff_bit equ 0000000000000010b; bit-1, Soft On/Off
+wfm_reset_switch_bit equ 0000000000000100b; bit-2, Reset Button
+wfm_mouse_bit equ 0000000000001000b; bit-3, Mouse
+wfm_ctrl_alt_del_bit equ 0000000000010000b; bit-4, Ctrl-Alt-Del
+wfm_all_key_ecad_bit equ 0000000000100000b; bit-5, All Keyboard Activity except Ctrl-Alt-Del
+
+wfm_not_used_bits equ 1111111111000000b; bit15-6..Not used
+
+
+;-----------------------------------------------------------------------;
+; INFORMATION ABOUT THE MEMORY SIZING MODULE OUTSIDE BOOTBLOCK ;
+;-----------------------------------------------------------------------;
+; MEMORY SIZING MODULE INFO STRUCTURE ;
+; this information will be present at the start of memory sizing code. ;
+;-----------------------------------------------------------------------;
+MEMORY_SIZING_INFO_STRUC struc
+ dEntryOffset dd 1 dup (?) ; entry offset of memory sizing code
+ wEntrySelector dw 1 dup (?) ; entry selector of memory sizing code
+ wOffsetGDTLabel dw 1 dup (?) ; pointer to GDT Label having GDT table address and length
+ wOffsetGDTTable dw 1 dup (?) ; pointer to GDT Table
+MEMORY_SIZING_INFO_STRUC ends
+
+;-----------------------------------------------------------------------;
+; GDT LABEL STRUCTURE IN MEMORY SIZING MODULE ;
+; the GDT Label contains information about the length and the physical ;
+; address of the GDT table. ;
+;-----------------------------------------------------------------------;
+MEMORY_SIZING_GDT_LABEL_STRUC struc
+ wLength dw 1 dup (?) ; length (0-based) of GDT table
+ dGDTTableAddress dd 1 dup (?) ; 32Bit physical address of GDT table
+MEMORY_SIZING_GDT_LABEL_STRUC ends
+
+;-----------------------------------------------------------------------;
+; GDT TABLE STRUCTURE IN MEMORY SIZING MODULE ;
+; the GDT Table information which is present in memory sizing module. ;
+;-----------------------------------------------------------------------;
+MEMORY_SIZING_GDT_TABLE_STRUC struc
+ bDummyDescriptor db 8 dup (?) ; dummy descriptor
+ bMemorySizeCodeDescriptor db 8 dup (?) ; memory sizing code descriptor
+ bMemorySizeDataDescriptor db 8 dup (?) ; memory sizing data descriptor
+ b4GBCodeDescriptor db 8 dup (?) ; Flat mode code descriptor
+ b4GBDataDescriptor db 8 dup (?) ; Flat mode data descriptor
+ bF000CodeDescriptor db 8 dup (?) ; F000 code descriptor
+ bF000DataDescriptor db 8 dup (?) ; F000 data descriptor
+MEMORY_SIZING_GDT_TABLE_STRUC ends
+
+;-----------------------------------------------------------------------;
+ss_value_for_cs equ offset MEMORY_SIZING_GDT_TABLE_STRUC.bMemorySizeDataDescriptor
+ss_value_for_f000 equ offset MEMORY_SIZING_GDT_TABLE_STRUC.bF000DataDescriptor
+flat_ds_value equ offset MEMORY_SIZING_GDT_TABLE_STRUC.b4GBDataDescriptor
+;-----------------------------------------------------------------------;
+
+
+;-----------------------------------------------------------------------;
+CDROM_BUF_LENGTH equ 80h
+;-----------------------------------------------------------------------;
+
+
+;============================================================================
+; For eKernel [Start]
+;============================================================================
+ASCII_CHAR_CR EQU 0Dh
+ASCII_CHAR_LF EQU 0Ah
+TRUE EQU 0FFh
+FALSE EQU 00
+
+
+;----------------------------------------------------------------------------
+; Structure used in TDB
+;----------------------------------------------------------------------------
+
+stTblEntryNEAR STRUCT
+ EntryPtr DW 0000h
+stTblEntryNEAR ENDS
+
+
+stIDAndTblEntryNEAR STRUCT
+ EntryID DW 0000h
+ EntryPtr DW 0000h
+stIDAndTblEntryNEAR ENDS
+
+
+stTblEntryFAR STRUCT
+ EntryPtr DD 0000h
+stTblEntryFAR ENDS
+
+
+stIDAndTblEntryFAR STRUCT
+ EntryID DW 0000h
+ EntryPtr DD 0000h
+stIDAndTblEntryFAR ENDS
+
+
+;============================================================================
+; B I T E Q U A T E S
+;============================================================================
+BIT_0 EQU 01h
+BIT_1 EQU 02h
+BIT_2 EQU 04h
+BIT_3 EQU 008h
+BIT_4 EQU 010h
+BIT_5 EQU 020h
+BIT_6 EQU 040h
+BIT_7 EQU 080h
+BIT_8 EQU 0100h
+BIT_9 EQU 0200h
+BIT_10 EQU 0400h
+BIT_11 EQU 0800h
+BIT_12 EQU 01000h
+BIT_13 EQU 02000h
+BIT_14 EQU 04000h
+BIT_15 EQU 08000h
+BIT_16 EQU 010000h
+BIT_17 EQU 020000h
+BIT_18 EQU 040000h
+BIT_19 EQU 080000h
+BIT_20 EQU 0100000h
+BIT_21 EQU 0200000h
+BIT_22 EQU 0400000h
+BIT_23 EQU 0800000h
+BIT_24 EQU 01000000h
+BIT_25 EQU 02000000h
+BIT_26 EQU 04000000h
+BIT_27 EQU 08000000h
+BIT_28 EQU 010000000h
+BIT_29 EQU 020000000h
+BIT_30 EQU 040000000h
+BIT_31 EQU 080000000h
+
+BIT0 equ 001h
+BIT1 equ 002h
+BIT2 equ 004h
+BIT3 equ 008h
+BIT4 equ 010h
+BIT5 equ 020h
+BIT6 equ 040h
+BIT7 equ 080h
+BIT8 equ 100h
+BIT9 equ 200h
+BIT10 equ 400h
+BIT11 equ 800h
+BIT12 equ 1000h
+BIT13 equ 2000h
+BIT14 equ 4000h
+BIT15 equ 8000h
+BIT16 equ 10000h
+BIT17 equ 20000h
+BIT18 equ 40000h
+BIT19 equ 80000h
+BIT20 equ 100000h
+BIT21 equ 200000h
+BIT22 equ 400000h
+BIT23 equ 800000h
+BIT24 equ 1000000h
+BIT25 equ 2000000h
+BIT26 equ 4000000h
+BIT27 equ 8000000h
+BIT28 equ 10000000h
+BIT29 equ 20000000h
+BIT30 equ 40000000h
+BIT31 equ 80000000h
+
+
+;============================================================================
+; C M O S
+;============================================================================
+CMOS_DIAG_STS_0Eh EQU 08Eh
+ CDS_0Eh_DATE_TIME_ERR_BIT EQU BIT_2
+ CDS_0Eh_HDD_ERR_BIT EQU BIT_3
+ CDS_0Eh_INVALID_CONFIG_BIT EQU BIT_5
+ CDS_0Eh_BAD_CHECKSUM_BIT EQU BIT_6
+ CDS_0Eh_RTC_LOST_POWER_BIT EQU BIT_7
+CMOS_SHUTDOWN_STS_0Fh EQU 08Fh
+CMOS_MACHINE_CONFIG_14h EQU 094h
+CMOS_BASE_MEM_LOW_15h EQU 095h
+CMOS_BASE_MEM_HIGH_16h EQU 096h
+CMOS_KB_MEM_LOW_17h EQU 097h
+CMOS_KB_MEM_HIGH_18h EQU 098h
+CMOS_KB_MEM_LOW_30h EQU 0B0h
+ CMOS_30h_FLASH_UPDATE_REQ_SIGN EQU 055AAh
+CMOS_KB_MEM_HIGH_31h EQU 0B1h
+CMOS_SCRATCH_33h EQU 0B3h
+ CSCR_33h_CACHE_GOOD_BIT EQU 00000001b
+ CSCR_33h_SOFT_RESET_BIT EQU 00000100b
+ CSCR_33h_FLASH_UPDATE_REQ_BIT EQU 01000000b
+ CSCR_33h_MEM_EXPANSION_BIT EQU 10000000b
+CMOS_SCRATCH_34h EQU 0B4h
+CSCR_34h_NVRAM_PRESENT_BIT EQU 10000000b
+CMOS_MB_MEM_LOW_35h EQU 0B5h
+CMOS_MB_MEM_HIGH_36h EQU 0B6h
+
+
+;============================================================================
+; C O M P O N E N T I D s F O R B I O S C O M P O N E N T S
+;============================================================================
+;; 000h-03Fh : CIDs for CORE compnents.
+CID_KERNEL EQU 000h
+CID_CPU EQU 001h
+CID_FLASH EQU 002h
+CID_SUPER_IO EQU 003h
+;; 040h-04Fh : CIDs for CHIPSET compnents.
+CID_CHIPSET_BASE EQU 040h
+CID_NORTH_BRIDGE EQU 041h
+CID_SOUTH_BRIDGE EQU 042h
+;; 050h-06Fh : CIDs for BOARD compnents.
+CID_BOARD_BASE EQU 050h
+CID_OEM EQU 051h
+;; 070h-07Fh : CIDs RESERVED for future use.
+CID_CUSTOM_FOR_OEM EQU 070h
+;; 080h-0BFh : CIDs for optional eMODULEs.
+CID_SMI EQU 080h
+CID_USB EQU 081h
+CID_ACPI EQU 082h
+CID_SMBIOS EQU 083h
+CID_SREDIR EQU 084h
+CID_DEBUGGER EQU 085h
+;; 0C0h-0F9h : CIDs RESERVED for future use.
+;; 0FAh-0FFh : CIDs for temperory usage till a unique CID is allocated.
+CID_TEMP_0 EQU 0FAh
+CID_TEMP_1 EQU 0FBh
+CID_TEMP_2 EQU 0FCh
+CID_TEMP_3 EQU 0FDh
+CID_TEMP_4 EQU 0FEh
+CID_UNDEFINED EQU 0FFh
+
+
+;============================================================================
+; B I O S T A B L E S
+;============================================================================
+
+
+;----------------------------------------------------------------------------
+; BIOS Table Types
+;----------------------------------------------------------------------------
+TT_DUMMY EQU 000h
+;;TT_MEM_MAPPED_DEV_INIT EQU 010h
+TT_IO_MAPPED_DEV_INIT EQU 020h
+TT_PCI_DEV_INIT EQU 030h
+TT_QBASED_PCI_DEV_INIT EQU 031h
+
+
+;----------------------------------------------------------------------------
+; Structures used in BIOS tables
+;----------------------------------------------------------------------------
+stBTblInfo STRUCT
+ bTblType DB TT_DUMMY
+ dProcessingFunc DD 00000000h
+stBTblInfo ENDS
+
+
+stBTblHdr STRUCT
+ bTblType DB TT_DUMMY
+ wTblStart DW 0000h
+ wTblEnd DW 0000h
+ dwData1 DW 0000h
+ dData2 DD 00000000h
+stBTblHdr ENDS
+
+
+stReg STRUCT
+ bRegIndex DB 0FFh
+ bANDMask DB 0FFh
+ bORMask DB 00h
+stReg ENDS
+
+
+stQBasedReg STRUCT
+ wSetupQst DW 0FFFFh
+ bRegIndex DB 0FFh
+ bMappedBitMask DB 00h
+ dCallBackFn DD 0000000h
+stQBasedReg ENDS
+
+
+;============================================================================
+; E R R O R M A N A G E R
+;============================================================================
+;----------------------------------------------------------------------------
+; Structure to define Error Objects
+;----------------------------------------------------------------------------
+stBIOSError STRUCT
+ wErrorCode DW 00000h;Bit[0-7] - Error number.
+ ;Bit[8-15] - Module ID.
+
+ wErrorAttrib DW 00000h;Bit[0-3] - Error type.
+ ERROR_TYPE_MASK EQU 0000Fh
+ ET_NOT_AN_ERR EQU 00000h
+ ET_INFORMAL EQU 00001h
+ ET_WARNING EQU 00002h
+ ET_GENERAL EQU 00003h
+ ET_CMOS_RELATED EQU 00004h
+ ET_FATAL EQU 00005h
+ ; EQU 00006h ;Reserved for CORE
+ ; EQU 00007h ;Furure use.
+
+ ET_OEM1 EQU 00008h ; Types 08-0Fh : can be used bye OEMs
+
+ MAPS_TO_SMBIOS_ERR_BIT EQU BIT_4 ;Bit[4]-Set for SMBIOS mapped errs.
+ ;Bit[5-15] - RESERVED.
+
+ wDisplayErrorInfoProcOffset DW 00h; = 0FFFFh for string token.
+ wDisplayErrorInfoProcSeg DW 00h; = Token number for string token.
+stBIOSError ENDS
+
+;----------------------------------------------------------------------------
+; Error Codes mapped to SMBIOS Error Bits
+;----------------------------------------------------------------------------
+;All commented error codes are not implemented in the current CORE.
+TIMER_COUNT_RW_ERR EQU (CID_KERNEL SHL 8) + 000h ;Bit-00
+;MASTER_PIC_ERR EQU (CID_KERNEL SHL 8) + 001h ;Bit-01
+;SLAVE_PIC_ERR EQU (CID_KERNEL SHL 8) + 002h ;Bit-02
+CMOS_BATTERY_ERR EQU (CID_KERNEL SHL 8) + 003h ;Bit-03
+CMOS_DIAG_STS_ERR EQU (CID_KERNEL SHL 8) + 004h ;Bit-04
+CMOS_CHECKSUM_ERR EQU (CID_KERNEL SHL 8) + 005h ;Bit-05
+;CMOS_CONFIG_ERR EQU (CID_KERNEL SHL 8) + 006h ;Bit-06
+;MOUSE_KBD_SWAP_ERR EQU (CID_KERNEL SHL 8) + 007h ;Bit-07
+KBD_LOCK_ERR EQU (CID_KERNEL SHL 8) + 008h ;Bit-08
+NO_KBD_ERR EQU (CID_KERNEL SHL 8) + 009h ;Bit-09
+KBC_BAT_TEST_ERR EQU (CID_KERNEL SHL 8) + 00Ah ;Bit-10
+CMOS_MEMORY_SIZE_ERR EQU (CID_KERNEL SHL 8) + 00Bh ;Bit-11
+RAM_RW_TEST_ERR EQU (CID_KERNEL SHL 8) + 00Ch ;Bit-12
+;CACHE_MEMORY_ERR EQU (CID_KERNEL SHL 8) + 00Dh ;Bit-13
+FDD_0_ERR EQU (CID_KERNEL SHL 8) + 00Eh ;Bit-14
+FDD_1_ERR EQU (CID_KERNEL SHL 8) + 00Fh ;Bit-15
+FLOPPY_CONTROLLER_ERR EQU (CID_KERNEL SHL 8) + 010h ;Bit-16
+;ATA_DRIVES_REDUCED_ERR EQU (CID_KERNEL SHL 8) + 011h ;Bit-17
+CMOS_DATE_TIME_ERR EQU (CID_KERNEL SHL 8) + 012h ;Bit-18
+;DDC_MONITOR_CONFIG_CHANGE_ERR EQU (CID_KERNEL SHL 8) + 013h ;Bit-19
+NO_PS2_MOUSE_ERR EQU (CID_KERNEL SHL 8) + 014h ;Bit-20
+
+ ;; No specific errors are defined for Bit[21-38]
+
+ ;; in SMBIOS Specification-V2.3. Some of these bits are for OEM
+ ;; asignment. So, as per as the CORE is conserned, we can use the
+ ;; corressponding error codes (Error codes from 14h-26h) to define
+ ;; non-SMBIOS mapped errors, if needed in future.
+
+;PCI_MEM_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 027h ;Bit-39
+;PCI_IO_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 028h ;Bit-40
+;PCI_IRQ_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 029h ;Bit-41
+;PNP_MEM_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 02Ah ;Bit-42
+;PNP_MEM32_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 02Bh ;Bit-43
+;PNP_IO_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 02Ch ;Bit-44
+;PNP_IRQ_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 02Dh ;Bit-45
+;PNP_DMA_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 02Eh ;Bit-46
+;PNP_SERIAL_ID_CHECKSUM_ERR EQU (CID_KERNEL SHL 8 + 02Fh ;Bit-47
+;PNP_RS_DATA_CHECKSUM_ERR EQU (CID_KERNEL SHL 8) + 030h ;Bit-48
+;STATIC_RS_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 031h ;Bit-49
+;NVRAM_CHECKSUM_ERR EQU (CID_KERNEL SHL 8) + 032h ;Bit-50
+;SYSTEM_DEV_RS_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 033h ;Bit-51
+;NO_PRIMARY_OUTPUT_DEV_ERR EQU (CID_KERNEL SHL 8) + 034h ;Bit-52
+;NO_PRIMARY_INPUT_DEV_ERR EQU (CID_KERNEL SHL 8) + 035h ;Bit-53
+;NO_PRIMARY_BOOT_DEV_ERR EQU (CID_KERNEL SHL 8) + 036h ;Bit-54
+;NVRAM_CLEARED_BY_JUMPER_ERR EQU (CID_KERNEL SHL 8) + 037h ;Bit-55
+;INVALID_NVRAM_DATA_ERR EQU (CID_KERNEL SHL 8) + 038h ;Bit-56
+;FDC_RS_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 039h ;Bit-57
+;PRI_ATA_RS_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 03Ah ;Bit-58
+;SEC_ATA_RS_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 03Bh ;Bit-59
+;PARALLEL_PORT_RS_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 03Ch ;Bit-60
+;SERIAL_PORT1_RS_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 03Dh ;Bit-61
+;SERIAL_PORT2_RS_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 03Eh ;Bit-62
+;AUDIO_RS_CONFLICT_ERR EQU (CID_KERNEL SHL 8) + 03Fh ;Bit-63
+
+;----------------------------------------------------------------------------
+; Error Codes NOT mapped to SMBIOS Error Bits
+;----------------------------------------------------------------------------
+REFRESH_TIMER_ERR EQU (CID_KERNEL SHL 8) + 040h
+DISPLAY_MEMORY_ERR EQU (CID_KERNEL SHL 8) + 041h
+CMOS_DISPLAY_ERR EQU (CID_KERNEL SHL 8) + 042h
+INSERT_FUNC_KEY_ERR EQU (CID_KERNEL SHL 8) + 043h
+DMAC_PAGE_REG_ERR EQU (CID_KERNEL SHL 8) + 044h
+DMAC1_CH_REG_ERR EQU (CID_KERNEL SHL 8) + 045h
+DMAC2_CH_REG_ERR EQU (CID_KERNEL SHL 8) + 046h
+PMM_MEM_ALLOC_ERR EQU (CID_KERNEL SHL 8) + 047h
+PASSWORD_CHECK_ERR EQU (CID_KERNEL SHL 8) + 048h
+SEGMENT_REG_ERR EQU (CID_KERNEL SHL 8) + 049h
+ADM_MODULE_ERR EQU (CID_KERNEL SHL 8) + 04Ah
+LANGUAGE_MODULE_ERR EQU (CID_KERNEL SHL 8) + 04Bh
+KBC_INTERFACE_ERR EQU (CID_KERNEL SHL 8) + 04Ch
+HDD_0_ERR EQU (CID_KERNEL SHL 8) + 04Dh
+HDD_1_ERR EQU (CID_KERNEL SHL 8) + 04Eh
+HDD_2_ERR EQU (CID_KERNEL SHL 8) + 04Fh
+HDD_3_ERR EQU (CID_KERNEL SHL 8) + 050h
+HDD_4_ERR EQU (CID_KERNEL SHL 8) + 051h
+HDD_5_ERR EQU (CID_KERNEL SHL 8) + 052h
+HDD_6_ERR EQU (CID_KERNEL SHL 8) + 053h
+HDD_7_ERR EQU (CID_KERNEL SHL 8) + 054h
+ATAPI_0_ERR EQU (CID_KERNEL SHL 8) + 055h
+ATAPI_1_ERR EQU (CID_KERNEL SHL 8) + 056h
+ATAPI_2_ERR EQU (CID_KERNEL SHL 8) + 057h
+ATAPI_3_ERR EQU (CID_KERNEL SHL 8) + 058h
+ATAPI_4_ERR EQU (CID_KERNEL SHL 8) + 059h
+ATAPI_5_ERR EQU (CID_KERNEL SHL 8) + 05Ah
+ATAPI_6_ERR EQU (CID_KERNEL SHL 8) + 05Bh
+ATAPI_7_ERR EQU (CID_KERNEL SHL 8) + 05Ch
+ATA_SMART_FEATURE_ERR EQU (CID_KERNEL SHL 8) + 05Dh
+PASSWORD_CHECK_ERR_NON_CRITICAL EQU (CID_KERNEL SHL 8) + 05Eh
+DUMMY_BIOS_ERR EQU (CID_KERNEL SHL 8) + 0FFh
+
+UNDEFINED_BIOS_ERROR EQU (CID_UNDEFINED SHL 8) + 0FFh
+;----------------------------------------------------------------------------
+; Error Attributes
+;----------------------------------------------------------------------------
+ATTRIB_DUMMY_BIOS_ERR EQU ET_NOT_AN_ERR
+
+;----------------------------------------------------------------------------
+; Structure to define beeps codes for BIOS errors
+;----------------------------------------------------------------------------
+stBeepCode STRUCT
+ wErrorCode DW 00000h;Error Code.
+ bBeepCode DB 000h ;Associated beep code.
+stBeepCode ENDS
+
+;----------------------------------------------------------------------------
+; Beep Codes
+;----------------------------------------------------------------------------
+BC_REFRESH_TIMER_ERR EQU 001h
+BC_RAM_RW_TEST_ERR EQU 003h
+BC_KBC_BAT_TEST_ERR EQU 006h
+except_err_beep_count EQU 007h ; Exception interrupt.
+BC_DISPLAY_MEMORY_ERR EQU 0008h
+
+
+;============================================================================
+; I N P U T D E V I C E
+;============================================================================
+;----------------------------------------------------------------------------
+; Structure to define BIOS key objects
+;----------------------------------------------------------------------------
+stBIOSKey STRUCT
+ wScanCode DW 00000h
+ dORMaskForUserReq DD 00000h
+stBIOSKey ENDS
+
+
+;============================================================================
+; O U T P U T D E V I C E
+;============================================================================
+CURSOR_POS_FOR_BIOS_VERSION_INFO EQU 01300h
+CURSOR_COLUMN_FOR_IDE_INFO EQU 0Ch
+DEFAULT_TEXT_ATTRIB EQU 07h
+
+;----------------------------------------------------------------------------
+; Output API equates
+;----------------------------------------------------------------------------
+GET_VIDEO_MODE_FN EQU 00h
+SET_VIDEO_MODE_FN EQU 01h
+GET_CURSOR_POS_FN EQU 02h
+SET_CURSOR_POS_FN EQU 03h
+SET_CURSOR_TYPE_FN EQU 04h
+DISPLAY_ATTRIB_CHAR_FN EQU 05h
+READ_ATTRIB_CHAR_FN EQU 06h
+DISPLAY_ATTRIB_TOKEN_MSG_FN EQU 07h
+LAST_RT_OUTPUT_API_FN EQU 07h
+DISPLAY_LOGO_FN EQU 08h
+DISPLAY_TOKEN_MESSAGE_UNBUFFERED EQU 09h
+;============================================================================
+; For eKernel [End]
+;============================================================================
+
+
+
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2001, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+;** **
+;** Phone (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
+.list
+;End of Inclusion guard
+endif ;_mbiosequ_equ_
+
+
+
diff --git a/Board/EM/Csm/MBIOSMAC.MAC b/Board/EM/Csm/MBIOSMAC.MAC
new file mode 100644
index 0000000..63d9b5a
--- /dev/null
+++ b/Board/EM/Csm/MBIOSMAC.MAC
@@ -0,0 +1,673 @@
+;Inclusion guard
+ifndef _mbiosmac_mac_
+_mbiosmac_mac_ equ 1
+.xlist
+
+;*****************************************************************;
+;*****************************************************************;
+;** **;
+;** (C)Copyright 1985-2000, American Megatrends, Inc. **;
+;** **;
+;** All Rights Reserved. **;
+;** **;
+;** 6145-F Northbelt Pkwy, Norcross, GA 30071 **;
+;** **;
+;** Phone (770)-246-8600 **;
+;** **;
+;*****************************************************************;
+;*****************************************************************;
+;*****************************************************************;
+; $Header: /Alaska/SOURCE/Modules/CSM/Generic/OEM Hooks/MBIOSMAC.MAC 1 5/16/06 2:39p Olegi $
+;
+; $Revision: 1 $
+;
+; $Date: 5/16/06 2:39p $
+;*****************************************************************;
+;*****************************************************************;
+; Revision History
+; ----------------
+; $Log: /Alaska/SOURCE/Modules/CSM/Generic/OEM Hooks/MBIOSMAC.MAC $
+;
+; 1 5/16/06 2:39p Olegi
+;
+; 3 9/27/02 5:49p Anandj
+; Added SET_ORG_PLUS macro
+;
+; 2 8/06/02 3:46p Dickh
+; Surrounded RT_CHECK_POINT and check_point_ini macros with
+; indef statements so that they can be overridden.
+;
+; 4 7/24/01 9:30a Anandj
+; Macro eK_PROC is moved to mbiosmac.mac.
+;
+; 3 7/24/01 9:01a Anandj
+; Macros IO_DELAY and IO_DELAY_BB are moved to mbiosmac.mac.
+;
+; 2 5/31/01 3:22p Anandj
+; Deleted IO_DELAY macro
+;
+; 1 5/25/01 2:34p Anandj
+;
+; 1 5/25/01 1:38p Anandj
+; First Check in on CORE database
+;
+; 3 5/10/01 4:51p Sudhakaro
+; Updated to use the macro SET_ORG instead of ORG directive, so that
+; MAPGUARD can detect the code overlap problems.
+;
+; 2 3/28/01 12:42p Sudhakaro
+; Updated for TBLv1.1 integration
+;
+; 1 3/26/01 4:36p Vivekc
+;
+; 1 3/22/01 1:49p Vivekc
+;
+; 3 3/01/01 5:01p Juand
+; Removed unused macros.
+;
+; 2 11/21/00 1:50p Juand
+; BigBIOS changes.
+;
+; 1 4/28/00 10:53a Olegi
+;
+; 2 1/31/00 7:04p Juand
+; Added Inclusion guard.
+;
+; 1 11/29/99 11:48a Debkumar
+; Initial CheckIn for Core 7.00.
+;
+; 2 3/16/99 6:27p Robertj
+; Added initial ADM code (beta version)
+;
+; 1 6/05/97 12:33p Debkumar
+;
+; 1 1/31/97 11:30a Debkumar
+; New files for 62700.
+;
+; 1 1/02/97 10:50a Debkumar
+; Started with 6.26.02 files.
+;
+; 6 9/03/96 5:18p Mandal
+; 6.26 for USA
+;
+; 1 6/17/96 2:39p Mandal
+;
+; 5 3/21/96 6:44p Mandal
+; AMI address changed.
+;
+; 4 3/21/96 6:09p Mandal
+; (c)1996 and phone no changed.
+;
+; 3 2/19/96 6:49p Mandal
+; IO_DELAY macro modified.
+;
+;*****************************************************************;
+;---------------------------------------;
+; RET_SP ;
+;---------------------------------------;
+ret_sp macro dummy ; call routine without stack
+ local llll, lll ; local label
+ even
+ mov sp, offset cs:lll ; return address
+ jmp dummy
+lll:
+ dw offset cs:llll ; return address
+llll:
+endm
+;---------------------------------------;
+; JMP_SP ;
+;---------------------------------------;
+jmp_sp macro dummy ; goto routine & back (via SP)
+ local llll ; local label
+ mov sp, offset cs:llll ; return address
+ jmp dummy
+llll:
+endm
+;---------------------------------------;
+; JMP_BP ;
+;---------------------------------------;
+jmp_bp macro dummy ; goto routine & back (via SI)
+ local llll ; local label
+ mov bp, offset cs:llll ; return address
+ jmp dummy
+llll:
+endm
+;---------------------------------------;
+; JMP_CX ;
+;---------------------------------------;
+jmp_cx macro dummy ; goto routine & back (via SI)
+ local llll ; local label
+ mov cx, offset cs:llll ; return address
+ jmp dummy
+llll:
+endm
+;---------------------------------------;
+; JMP_SI ;
+;---------------------------------------;
+jmp_si macro dummy ; goto routine & back (via SI)
+ local llll ; local label
+ mov si, offset cs:llll ; return address
+ jmp dummy
+llll:
+endm
+;---------------------------------------;
+; JMP_DI ;
+;---------------------------------------;
+jmp_di macro dummy ; goto routine & back (via DI)
+ local llll ; local label
+ mov di, offset cs:llll ; return address
+ jmp dummy
+llll:
+endm
+;---------------------------------------;
+; DES_TAB ;
+;---------------------------------------;
+des_tab macro v_mode_seg_size,seg_low_word,seg_high_byte,access_right
+ dw v_mode_seg_size
+ dw seg_low_word ; low word for descriptor
+ db seg_high_byte ; descriptor high byte
+ db access_right ; access right byte
+ dw 0000h ; reserved word
+endm
+
+;---------------------------------------;
+; CHECK_POINT_INI ;
+;---------------------------------------;
+ifndef check_point_ini
+check_point_ini macro xx
+ mov al,xx
+ out 80h,al
+endm
+endif
+
+ifndef RT_CHECK_POINT
+RT_CHECK_POINT MACRO CP
+ mov al, CP
+ out 80h, al
+ENDM
+endif
+
+;<AMI_MHDR_START>
+;----------------------------------------------------------------------------
+; Name: IO_DELAY
+;
+; Description: This macro can be used to introduced a delay of one IO
+; read operation. Use this macro only when the stack is
+; availabel.
+;
+; Input:
+;----------------------------------------------------------------------------
+;<AMI_MHDR_END>
+IO_DELAY MACRO
+ push ax
+ in al, refresh_port
+ pop ax
+ENDM
+
+;<AMI_MHDR_START>
+;----------------------------------------------------------------------------
+; Name: IO_DELAY_BB
+;
+; Description: This macro can be used to introduced a delay two jumps.
+; The idea is, the jump will cause CPU to flush its instruction
+; cache and will introduce some delay. In the newer CPUs this macro
+; will introduce hardly any delay.
+; This macro can be used without stack.
+;
+; Input:
+;----------------------------------------------------------------------------
+;<AMI_MHDR_END>
+IO_DELAY_bb MACRO
+ jcxz $+2
+ jcxz $+2
+
+ENDM
+
+
+;<AMI_MHDR_START>
+;----------------------------------------------------------------------------
+; Name: SET_ORG
+;
+; Description: This macro can be used as a replacement to "ORG" directive
+; in source files. The advantage in using this macro instead
+; of "ORG" directive is that it generates necessary labels for
+; for mapgaurd utility, so that any possible code overlaps
+; betweens ORGs can be detected during build time itself.
+;
+; Input: OrgValue - Value for ORG.
+; GuardTag - Tag name for mapgaurd utility.
+;----------------------------------------------------------------------------
+;<AMI_MHDR_END>
+
+SET_ORG MACRO OrgValue, GuardTag
+
+ PUBLIC orgguard_&GuardTag&_&OrgValue&_start
+orgguard_&GuardTag&_&OrgValue&_start LABEL BYTE
+ ORG OrgValue
+ PUBLIC orgguard_&GuardTag&_&OrgValue&_end
+orgguard_&GuardTag&_&OrgValue&_end LABEL BYTE
+
+ENDM
+
+;<AMI_MHDR_START>
+;----------------------------------------------------------------------------
+; Name: SET_ORG_PLUS
+;
+; Description: This macro can be used as a replacement to "ORG" directive
+; in source files. The advantage in using this macro instead
+; of "ORG" directive is that it generates necessary labels for
+; for mapgaurd utility, so that any possible code overlaps
+; betweens ORGs can be detected during build time itself.
+;
+; Input: OrgBase - Value for ORG base
+; OrgPlus - Offset from the OrgBase.
+; GuardTag - Tag name for mapgaurd utility.
+;----------------------------------------------------------------------------
+;<AMI_MHDR_END>
+SET_ORG_Plus MACRO OrgBase, OrgPlus, GuardTag
+ PUBLIC orgguard_&GuardTag&_&OrgPlus&_&OrgBase&_start
+orgguard_&GuardTag&_&OrgPlus&_&OrgBase&_start LABEL BYTE
+ ORG OrgBase + OrgPlus
+ PUBLIC orgguard_&GuardTag&_&OrgPlus&_&OrgBase&_end
+orgguard_&GuardTag&_&OrgPlus&_&OrgBase&_end LABEL BYTE
+ENDM
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mEXTERN_NEAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mEXTERN_NEAR MACRO LabelName
+
+ EXTERN LabelName:NEAR ; Define the label as a NEAR EXTERN.
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mEXTERN_FAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mEXTERN_FAR MACRO LabelName
+
+ EXTERN LabelName:FAR ; Define the label as a FAR EXTERN.
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mSTART_PROC_NEAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mSTART_PROC_NEAR MACRO LabelName
+
+LabelName PROC NEAR PUBLIC
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mBODY_CALL_PROC_NEAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mBODY_CALL_PROC_NEAR MACRO LabelID, LabelName
+
+ call LabelName
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mBODY_JMP_PROC_NEAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mBODY_JMP_PROC_NEAR MACRO LabelID, LabelName
+
+ jmp LabelName
+ PUBLIC LabelName&End
+LabelName&End::
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mEND_PROC_NEAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mEND_PROC_NEAR MACRO LabelName
+
+ ret
+LabelName ENDP
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mEND_PROC_WITH_JMP_NEAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mEND_PROC_WITH_JMP_NEAR MACRO LabelName
+
+ EXTERN LabelName&End:NEAR
+ jmp LabelName&End
+LabelName ENDP
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mSTART_PROC_FAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mSTART_PROC_FAR MACRO LabelName
+
+LabelName PROC FAR PUBLIC
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mBODY_CALL_PROC_FAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mBODY_CALL_PROC_FAR MACRO LabelID, LabelName
+
+ call LabelName
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mBODY_JMP_PROC_FAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mBODY_JMP_PROC_FAR MACRO LabelID, LabelName
+
+ jmp LabelName
+ PUBLIC LabelName&End
+LabelName&End::
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mEND_PROC_FAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mEND_PROC_FAR MACRO LabelName
+
+ ret
+LabelName ENDP
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mEND_PROC_WITH_JMP_FAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mEND_PROC_WITH_JMP_FAR MACRO LabelName
+
+ EXTERN LabelName&End:FAR
+ jmp LabelName&End
+LabelName ENDP
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mSTART_TBL
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mSTART_TBL MACRO LabelName
+
+ PUBLIC LabelName
+LabelName LABEL BYTE
+
+ENDM
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mBODY_TBL_ENTRY_NEAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mBODY_TBL_ENTRY_NEAR MACRO LabelID, LabelName
+
+ stTblEntryNEAR <LabelName>
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mBODY_ID_AND_TBL_ENTRY_NEAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mBODY_ID_AND_TBL_ENTRY_NEAR MACRO LabelID, LabelName
+
+ stIDAndTblEntryNEAR <LabelID, LabelName>
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mBODY_ID_AND_TBL_CSM_ENTRY_NEAR
+;
+; Description: This macro is used to declare a function entry with an ID and
+; a NEAR function. The EXTERN declaration is done WITHIN the 16 bit segment.
+; This is useful if the macro is used to create a binary using EXE2BIN;
+; if EXTRERN is declared outside the segment, then EXE2BIN will not work.
+;
+; Notes: EXTERN definition only for functions (Prog. Guide pg 253)
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mBODY_ID_AND_TBL_CSM_ENTRY_NEAR MACRO LabelID, LabelName
+
+ EXTERN LabelName:NEAR
+ stIDAndTblEntryNEAR <LabelID, LabelName>
+
+ENDM
+
+mEND_TBL_CSM MACRO LabelName
+ stIDAndTblEntryNEAR <0FFFFh, 0>
+LabelName&End LABEL BYTE
+ENDM
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mBODY_TBL_ENTRY_FAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mBODY_TBL_ENTRY_FAR MACRO LabelID, LabelName
+
+ stTblEntryFAR <LabelName>
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mBODY_ID_AND_TBL_ENTRY_FAR
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mBODY_ID_AND_TBL_ENTRY_FAR MACRO LabelID, LabelName
+
+ stIDAndTblEntryFAR <LabelID, LabelName>
+
+ENDM
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Name: mEND_TBL
+;
+; Description:
+;
+; Input:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mEND_TBL MACRO LabelName
+
+ PUBLIC LabelName&End
+LabelName&End LABEL BYTE
+
+ENDM
+
+
+
+;*****************************************************************;
+;*****************************************************************;
+;** **;
+;** (C)Copyright 1985-2000, American Megatrends, Inc. **;
+;** **;
+;** All Rights Reserved. **;
+;** **;
+;** 6145-F Northbelt Pkwy, Norcross, GA 30071 **;
+;** **;
+;** Phone (770)-246-8600 **;
+;** **;
+;*****************************************************************;
+;*****************************************************************;
+;---------------------------------------;
+.list
+
+;End of Inclusion guard
+endif ;_mbiosmac_mac_
diff --git a/Board/EM/Csm/csm.cif b/Board/EM/Csm/csm.cif
new file mode 100644
index 0000000..cb5fc07
--- /dev/null
+++ b/Board/EM/Csm/csm.cif
@@ -0,0 +1,15 @@
+<component>
+ name = "CSM"
+ category = eModule
+ LocalRoot = "Board\eM\Csm\"
+ RefName = "CSM"
+[files]
+"csm.sdl"
+"CSM.chm"
+[parts]
+"CSMCORE"
+"CSM16"
+"CSMSB"
+"CsmProtocols"
+"CSMSETUP"
+<endComponent>
diff --git a/Board/EM/Csm/csm.sd b/Board/EM/Csm/csm.sd
new file mode 100644
index 0000000..9106247
--- /dev/null
+++ b/Board/EM/Csm/csm.sd
@@ -0,0 +1,264 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CSM/Generic/csm.sd 23 8/06/14 4:23p Fasihm $
+//
+// $Revision: 23 $
+//
+// $Date: 8/06/14 4:23p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CSM/Generic/csm.sd $
+//
+// 23 8/06/14 4:23p Fasihm
+// [TAG] EIP180681
+// [Category] Improvement
+// [Severity] Normal
+// [Symptom] Aptio 4 CSM: Clean the setup settings and options.
+// [Solution] INT19 trap setup question removed, cleaned code.
+// [Files]
+// Board\EM\Csm\csm.sd
+// Board\EM\Csm\csm.uni
+// Core\EM\CSM\CsmBsp.c
+// Core\EM\CSM\CsmOpROM.c
+//
+// 22 10/18/13 4:01p Olegi
+// [TAG] EIP139866
+// [Description] Create interface to manage LegacyToEfi CSM feature
+// [Files] csm.uni
+// csm.sd
+//
+// 21 10/07/13 9:05a Olegi
+// EIP135289
+// Legacy2Efi changes
+//
+// 20 6/20/12 4:58p Olegi
+//
+// 19 6/04/12 5:43p Olegi
+//
+// 18 12/23/11 2:42p Olegi
+// [TAG] EIP79228
+// [Category] Improvement
+// [Description] Implement CSM_INT19_TRAP_IMMEDIATE_ACTION functionality
+// [Files] csm.uni
+// csm.sd
+//
+// 17 10/09/11 11:36p Olegi
+//
+// 16 10/03/11 3:40p Olegi
+// CSM opt-out changes
+//
+// 15 3/10/11 1:59a Rameshr
+// [TAG]- EIP 54231
+// [Category]-IMPROVEMENT
+// [Description]- Display the virus warning message when writting into MBR
+// of HDD. This support added for IDE, AHCI and USB HD devices.
+// [Files]- CsmOem.cif, Csm.uni, Csm.sdl, Csm.sd, Amilegacy16.bin,
+// AI13.Bin, Ui13.bin, VirusProtect module
+//
+// 14 12/03/10 11:18a Olegi
+// [TAG] EIP48174
+// [Category] Spec Update
+// [Severity] Normal
+// [Description] Update SD file according to the new Setup Customization
+// guidelines.
+// [Files] CSM.SD
+//
+// 13 1/12/10 11:52a Olegi
+// Updated copyright message.
+//
+// 12 11/10/09 8:37a Olegi
+// EIP30139: HII2.1 compliance.
+//
+// 11 2/10/09 4:55p Olegi
+// Added CSM16 version in Boot page. EIP#19133.
+//
+// 10 12/09/08 10:17a Olegi
+// Added KeepGateA20Active question.
+//
+// 9 8/29/08 9:59a Fasihm
+// Added the manufacturing flag to the commented question also.
+//
+// 8 7/31/08 6:40p Fasihm
+// Added the MANUFACTURING flag to the setup questions.
+//
+// 7 1/31/08 11:55a Olegi
+// "Bootup Numlock State" moved to Core
+//
+// 6 12/03/07 4:12p Olegi
+//
+// 5 7/31/07 3:37p Olegi
+//
+// 4 6/21/07 10:34a Olegi
+//
+// 3 6/04/07 10:46a Olegi
+//
+// 2 6/02/07 11:26a Olegi
+//
+// 1 5/21/07 4:54p Olegi
+//
+//**********************************************************************
+
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: CSM.SD
+//
+// Description: CSM Setup data definitions, currently go under Boot page
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifdef SETUP_DATA_DEFINITION
+ UINT8 ExpansionCardText;
+ UINT8 ZipEmulation;
+ UINT8 KeepGA20Active;
+// UINT8 CsmSupport;
+#endif
+
+#if defined(VFRCOMPILE) && !defined(CONTROLS_ARE_DEFINED)
+#define CONTROL_DEFINITION
+#endif
+#ifdef CONTROL_DEFINITION
+
+#define CSM_ONEOF_KEEPGA20ACTIVE\
+ oneof varid = SETUP_DATA.KeepGA20Active,\
+ prompt = STRING_TOKEN(STR_CSM_GA20_ACTIVE),\
+ help = STRING_TOKEN(STR_CSM_GA20_ACTIVE_HELP),\
+ option text = STRING_TOKEN(STR_CSM_GA20_ACTIVE_UPONREQUEST), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_CSM_GA20_ACTIVE_ALWAYS), value = 1, flags = 0, key = 0;\
+ endoneof;
+
+#define CSM_ONEOF_EXPANSIONCARDTEXT\
+ oneof varid = SETUP_DATA.ExpansionCardText,\
+ prompt = STRING_TOKEN(STR_CSM_OPROM_DISPLAY_MODE),\
+ help = STRING_TOKEN(STR_CSM_OPROM_DISPLAY_MODE_HELP),\
+ option text = STRING_TOKEN(STR_CSM_OPROM_DISPLAY_FORCE_BIOS), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_CSM_OPROM_DISPLAY_KEEP_CURRENT), value = 0, flags = 0, key = 0;\
+ endoneof;
+
+
+#if CSM_SET_ZIP_EMULATION_TYPE
+
+#define CSM_ONEOF_ZIPEMULATION\
+ oneof varid = SETUP_DATA.ZipEmulation,\
+ prompt = STRING_TOKEN(STR_CSM_ZIP_EMULATION_PROMPT),\
+ help = STRING_TOKEN(STR_CSM_ZIP_EMULATION_HELP),\
+ option text = STRING_TOKEN(STR_CSM_ZIP_EMULATION_FDD), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_CSM_ZIP_EMULATION_HDD), value = 1, flags = 0, key = 0;\
+ endoneof;
+
+#else
+#define CSM_ONEOF_ZIPEMULATION
+#endif //#if CSM_SET_ZIP_EMULATION_TYPE
+/*
+#define CSM_ONEOF_CSMSUPPORT\
+ oneof varid = SETUP_DATA.CsmSupport,\
+ prompt = STRING_TOKEN(STR_CSM_SUPPORT_PROMPT),\
+ help = STRING_TOKEN(STR_CSM_SUPPORT_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = 0, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+*/
+
+#endif //#ifdef CONTROL_DEFINITION
+
+#ifdef CONTROLS_WITH_DEFAULTS
+
+ CSM_ONEOF_KEEPGA20ACTIVE
+ CSM_ONEOF_EXPANSIONCARDTEXT
+ CSM_ONEOF_ZIPEMULATION
+#endif //#ifdef CONTROLS_WITH_DEFAULTS
+
+//Select Top level menu itmem (forset) for you pages
+#ifdef BOOT_FORM_SET
+ #ifndef SUPPRESS_GRAYOUT_ENDIF //old Core
+ #define SUPPRESS_GRAYOUT_ENDIF endif;
+ #endif
+
+#ifdef FORM_SET_TYPEDEF
+//If you need any additional type definitions add them here
+//typedef struct{
+// UINT8 MyField;
+//} MyVariable;
+#endif
+
+#ifdef FORM_SET_VARSTORE
+//If you need custom varstore's define them here
+// varstore MY_VARIABLE,
+// key = AUTO_ID(MY_VARSTORE_ID),
+// name = MyVariable,
+// guid = SETUP_GUID;
+#endif
+
+#ifdef FORM_SET_ITEM
+// Define controls to be added to the top level page of the formset
+// checkbox varid = SETUP_DATA.MyCombobox,
+// prompt = STRING_TOKEN(...),
+// help = STRING_TOKEN(...),
+// flags = 0 | MANUFACTURING, // Flags behavior for checkbox is overloaded so that it equals a DEFAULT value. 1 = ON, 0 = off
+// endcheckbox;
+
+#endif
+
+#ifdef FORM_SET_GOTO
+// Define goto commands for the forms defined in this file
+ goto CSM_FORM_ID,
+ prompt = STRING_TOKEN(STR_CSM_FORM),
+ help = STRING_TOKEN(STR_CSM_FORM_HELP);
+#endif
+
+#ifdef FORM_SET_FORM
+// Define forms
+ form formid = AUTO_ID(CSM_FORM_ID),
+ title = STRING_TOKEN(STR_CSM_FORM);
+
+ SUBTITLE(STRING_TOKEN(STR_CSM_FORM))
+ SEPARATOR
+
+ text
+ help = STRING_TOKEN(STR_CSM_MODULE_VERSION),
+ text = STRING_TOKEN(STR_CSM_MODULE_VERSION),
+ text = STRING_TOKEN(STR_CSM_MODULE_VERSION_VALUE),
+ flags = 0,
+ key = 0;
+ SEPARATOR
+
+ CSM_ONEOF_KEEPGA20ACTIVE
+ CSM_ONEOF_EXPANSIONCARDTEXT
+
+#if CSM_SET_ZIP_EMULATION_TYPE
+ CSM_ONEOF_ZIPEMULATION
+#endif
+
+ endform;
+#endif
+
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Csm/csm.sdl b/Board/EM/Csm/csm.sdl
new file mode 100644
index 0000000..5aaf973
--- /dev/null
+++ b/Board/EM/Csm/csm.sdl
@@ -0,0 +1,366 @@
+TOKEN
+ Name = "CSM_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable AMI CSM support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "CSM16_VERSION_MAJOR"
+ Value = "7"
+ Help = "CSM16 major version"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "CSM16_VERSION_MINOR"
+ Value = "76"
+ Help = "CSM16 minor version"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "CSM_VERSION_BUILD"
+ Value = "81"
+ Help = "CSM module build version"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PCI_ROMS_OUTSIDE_CSM"
+ Value = "0"
+ Help = "PCI ROMs for onboard PCI devices are not included in CSM.FFS; FindEmbeddedRom locates a protocol to find them.\NOTE: this is a temporary token, it will be needed until PCI ROM loading capability is included in the CORE label. After this checking can be replaced with checking for CORE version."
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "AGGRESSIVELY_JOINED_E820_ENTRIES"
+ Value = "0"
+ Help = "Turning on this flag would allow only one Type2 memory region above 1MB.\This reduces the total number of E820 entries and could be critical for some OSes that do not tolerate too many E820 entries (FreeBSD 6.0).\Note: when flag is turned on, some memory regions that are available will be declared reserved so OS gets less memory."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PMM_EBDA_LOMEM_SIZE"
+ Value = "0x60000"
+ Help = "Amount of memory below 1MB in bytes to be allocated for EBDA and PMM. This size should be a multiple of 32K.\Value should not exceed 512 KB, the remaining part of 640K will be given to IVT, BDA, non-BBS compliant OpROMs. It can also be allocated by other EFI drivers, used for PCI3.0 OpROM execution, etc.\Recommended value is 128 KB."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PMM_LOMEM_SIZE"
+ Value = "0x30000"
+ Help = "The total amount of memory below 1MB available for PMM allocations, in bytes. This size should be a multiple of 32K.\Value should not exceed PMM_EBDA_LOMEM_SIZE as the remaining part of it will be given for EBDA."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PMM_HIMEM_SIZE"
+ Value = "0x9600000"
+ Help = "PMM area size in bytes above 1MB to be allocated in bytes; this size should 64K aligned."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "LEGACY_TO_EFI_DEFAULT"
+ Value = "0"
+ Help = "Default setting for legacy to EFI feature.\Enabled: legacy boot options can be mixed with UEFI. Disabled: if legacy boot fails, next boot attempts are limited to legacy devices only - no UEFI boot will be tried."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "LEGACY_TO_EFI_BOOTRECORD_RETURN"
+ Value = "0"
+ Help = "This token controls the LegacyToEfi feature after legacy boot gives control to the boot record\Disabled: next boot option can be Legacy only.\Enabled: next boot option can be either Legacy or UEFI."
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "LEGACY_TO_EFI_DEFAULT" "=" "1"
+End
+
+TOKEN
+ Name = "LEGACY_TO_EFI_BOOT_BUFFER_SIZE"
+ Value = "0x300000"
+ Help = "Size of buffer used to save memory context before legacy boot."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "OPROM_MAX_ADDRESS"
+ Value = "0xE7FFF"
+ Help = "The last address that can be used by Option ROM."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Range = "0xC7FFF...0xEBFFF"
+End
+
+TOKEN
+ Name = "SKIP_EARLY_BCV_DEVICES"
+ Value = "{0x3f20105a}"
+ Help = "List of VID/DIDs (combined to DWORD) that may affect POST if BCV is executed immediately after Option ROM initialization. Separate with commas.\To force skipping ALL BCVs put 0xFFFFFFFF in the beginning of the list."
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "INT15_D042_SWSMI"
+ Value = "0x44"
+ Help = "SW SMI value to be used in INT15 func D042"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0...0FFh"
+End
+
+TOKEN
+ Name = "USB_SWSMI"
+ Value = "0x31"
+ Help = "SW SMI value to be used in legacy USB"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0...0FFh"
+End
+
+TOKEN
+ Name = "CSM_SET_ZIP_EMULATION_TYPE"
+ Value = "0"
+ Help = "Enable this token to see the option of ZIP drive emulation selection in the Setup."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FLEXBOOT"
+ Value = "0"
+ Help = "0 - Boot devices are grouped by the device type\1 - Flat list boot devices implementation."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "CSM_CREATES_ATA_ATAPI_STRINGS"
+ Value = "1"
+ Help = "If set, CSM module will produce the names for ATA/ATAPI devices; if reset, names come from TSE."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PXE_BASECODE_ROM"
+ Value = "0"
+ Help = "Enable/disable PXE base code.\Enable it for the projects that have splitted PXE ROMs. Note that the other part of the PXE - UNDI - will be included as PCI Option ROM.\"
+ TokenType = Boolean
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "MAX_ADDITIONAL_P2P_BRIDGES"
+ Value = "32"
+ Help = "The number of P2P bridges that can be processed in addition to the ones defined in BusNumXlat.INC."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "1...0FFh"
+End
+
+TOKEN
+ Name = "INTERRUPTS_TO_PRESERVE"
+ Value = "{0x13, 0x40, 0x08}"
+ Help = "List of interrupts to be saved after CSM Init call and restored before LegacyBoot.\The default list is defined in CSM.SDL and contains three interrups: int13, int15, and int40."
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "CSM_DEFAULT_VMODE_SWITCHING"
+ Value = "0"
+ Help = "0 - switch video mode from graphics to text before executing the Option ROM, switch back to graphics afterwards\1 - use text mode during all Option ROMs execution time, no video mode switching during this time frame."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0...1"
+End
+
+TOKEN
+ Name = "PXE_BASECODE_ROM_FILE"
+ Value = "AddOn\Pxebase.lom"
+ Help = "PXE base code ROM file."
+ TokenType = File
+ TargetMAK = Yes
+ Token = "PXE_BASECODE_ROM" "=" "1"
+End
+
+TOKEN
+ Name = "AMILEGACY16_BIN"
+ Value = "addon\amilegacy16.bin"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+PATH
+ Name = "CSMCORE_DIR"
+ Path = "core\em\csm"
+ Help = "AMI CSM Core files source directory"
+End
+
+PATH
+ Name = "CSMBOARD_DIR"
+End
+
+TOKEN
+ Name = "CSM_VGA_64BITBAR_WORKAROUND"
+ Value = "0"
+ Help = "VBE is limited to 32 bit for an address of Video Linear Buffer.\If this token is on, the code will attempt to build the correct 64-bit linear buffer address."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+PATH
+ Name = "X86THUNK_DIR"
+ Path = "core\em\csm\thunk\x86"
+ Help = "x86 thunk files source directory"
+End
+
+PATH
+ Name = "CSM_SETUP_DIR"
+End
+
+MODULE
+ Help = "Includes csm.mak into project"
+ Path = "$(CSMCORE_DIR)"
+ File = "csm.mak"
+End
+
+MODULE
+ Help = "Includes x86Thunk.mak into project"
+ Path = "$(X86THUNK_DIR)"
+ File = "x86thunk.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\csm.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 30
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(CSM_SETUP_DIR)\csm.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 30
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\csmcore.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\x86thunk.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "OEM_SERVICE_ROM_LIST"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_CUSTOM_INFS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "InitCsmStrings,"
+ Parent = "SetupStringInit"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "CSM_GET_OPROM_VIDEO_SWITCHING_MODE_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_GET_CUSTOM_PCI_PIRQ_MASK_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_GET_GATE_A20_INFORMATION_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_GET_NMI_INFORMATION_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_GET_OEM_INT_DATA_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_GET_PLATFORM_HANDLE_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_GET_PLATFORM_PCI_EMBEDDED_ROM_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_GET_PLATFORM_EMBEDDED_ROM_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_CHECK_OEM_PCI_SIBLINGS_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_ENABLE_OEM_PCI_SIBLINGS_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_GET_ROUTING_TABLE_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_BSP_UPDATE_PRT_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_BSP_PREPARE_TO_BOOT_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_INIT_LEGACY_MEMORY_FUNCTIONS"
+ InvokeOrder = ReplaceParent
+End
diff --git a/Board/EM/Csm/csm.uni b/Board/EM/Csm/csm.uni
new file mode 100644
index 0000000..fea891f
--- /dev/null
+++ b/Board/EM/Csm/csm.uni
Binary files differ
diff --git a/Board/EM/Csm/csmoem.cif b/Board/EM/Csm/csmoem.cif
new file mode 100644
index 0000000..b68cce2
--- /dev/null
+++ b/Board/EM/Csm/csmoem.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "CSM16 OEM Hooks"
+ category = ModulePart
+ LocalRoot = "Board\eM\Csm\"
+ RefName = "CSM_OEM_HOOKS"
+[files]
+"MBIOSMAC.MAC"
+"MBIOSEQU.EQU"
+"csmoem.sdl"
+"csmoem.mak"
+"oem16sig.asm"
+<endComponent>
diff --git a/Board/EM/Csm/csmoem.mak b/Board/EM/Csm/csmoem.mak
new file mode 100644
index 0000000..796c1ac
--- /dev/null
+++ b/Board/EM/Csm/csmoem.mak
@@ -0,0 +1,83 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/CSM/Generic/OEM Hooks/csmoem.mak 6 1/12/10 11:50a Olegi $
+#
+# $Revision: 6 $
+#
+# $Date: 1/12/10 11:50a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/CSM/Generic/OEM Hooks/csmoem.mak $
+#
+# 6 1/12/10 11:50a Olegi
+# Copyright message updated.
+#
+# 5 4/01/09 1:05p Olegi
+#
+# 4 12/04/07 11:06a Olegi
+#
+# 3 5/24/07 12:13p Fasihm
+# Updated code to match the code review standards.
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: CSMOEM.MAK
+#
+# Description: CSM OEM implementation makefile
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+$(CSM_OEM_BIN_FILE): $(BUILD_DIR)\csmoem.exe
+ exe2bin $*.exe $@
+
+# Note: in the following rule OUTPOST file has to go first
+$(BUILD_DIR)\csmoem.exe: $(BUILD_DIR)\CSMKRNL.OBJ $(CSM_OEMINT_OBJS) $(CSM_OEM16_OBJS) $(BUILD_DIR)\oem16sig.obj $(CSM_OEMSIG_OBJS)
+ $(ASMLINK) @<<
+$(**: = +^
+),
+$*.exe,
+$*.map,,,
+<<
+
+#$(BUILD_DIR)\CSMKRNL.OBJ: $(BUILD_DIR)\CSMKRNL.ASM
+# @copy $(CSM_OEM_DIR)\mbiosequ.equ $(BUILD_DIR)
+# @copy $(CSM_OEM_DIR)\mbiosmac.mac $(BUILD_DIR)
+# $(ASM) /c /Fo$(BUILD_DIR)\ $(BUILD_DIR)\CSMKRNL.ASM
+
+$(BUILD_DIR)\CSMKRNL.OBJ: $(CSM_OEM_DIR)\CSMKRNL.ASM
+ $(ASM) /c /Fo$(BUILD_DIR)\ $(CSM_OEM_DIR)\CSMKRNL.ASM
+
+$(BUILD_DIR)\oem16sig.obj: $(CSM_OEM_DIR)\oem16sig.asm
+ $(ASM) /c /Fo$(BUILD_DIR)\ $(CSM_OEM_DIR)\oem16sig.asm
+
+all: $(CSM_OEM_BIN_FILE)
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/Csm/csmoem.sdl b/Board/EM/Csm/csmoem.sdl
new file mode 100644
index 0000000..0844817
--- /dev/null
+++ b/Board/EM/Csm/csmoem.sdl
@@ -0,0 +1,68 @@
+TOKEN
+ Name = "CSM_OEM_SUPPORT"
+ Value = "1"
+ Help = "Enable/disable CSM OEM support."
+ TokenType = Boolean
+ TargetMAK = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "CSM_OEM_BIN_FILE"
+ Value = "$(BUILD_DIR)\csmoem.bin"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+PATH
+ Name = "CSM_OEM_DIR"
+End
+
+MODULE
+ File = "csmoem.mak"
+End
+
+ELINK
+ Name = "CsmOemInterrupts"
+ Segment = "CSMOEM_CSEG"
+ mBODY = "mBODY_ID_AND_TBL_CSM_ENTRY_NEAR"
+ mEND = "mEND_TBL_CSM"
+ InvokeOrder = TableFunction
+ OutPOST = Yes
+End
+
+ELINK
+ Name = "CsmOem16Functions"
+ Segment = "CSMOEM_CSEG"
+ mBODY = "mBODY_ID_AND_TBL_CSM_ENTRY_NEAR"
+ mEND = "mEND_TBL_CSM"
+ InvokeOrder = TableFunction
+ OutPOST = Yes
+End
+
+ELINK
+ Name = "CSM_OEMINT_OBJS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_OEM16_OBJS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "CSM_OEMSIG_OBJS"
+ InvokeOrder = ReplaceParent
+End
+
+OUTPUTREGISTER
+ Name = "EKERNEL_POST"
+ Path = "BOARD\EM\CSM\"
+ File = "CSMKRNL.ASM"
+End
+
+SEGMENT
+ Name = "CSMOEM_CSEG"
+ Format = "SEGMENT PARA PUBLIC 'CODE' USE16"
+End
+
diff --git a/Board/EM/Csm/csmsetup.c b/Board/EM/Csm/csmsetup.c
new file mode 100644
index 0000000..42d8ed5
--- /dev/null
+++ b/Board/EM/Csm/csmsetup.c
@@ -0,0 +1,74 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//****************************************************************************
+// $Header: /Alaska/SOURCE/Modules/CSM/Generic/csmsetup.c 4 1/12/10 11:52a Olegi $
+//
+// $Revision: 4 $
+//
+// $Date: 1/12/10 11:52a $
+//
+//****************************************************************************
+
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: CSMSETUP.C
+//
+// Description: CSM Setup related functions
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <Setup.h>
+#include <SetupStrTokens.h>
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: InitCsmStrings
+//
+// Description: This function is eLink'ed with the chain executed right before
+// the Setup.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID InitCsmStrings(EFI_HII_HANDLE HiiHandle, UINT16 Class)
+{
+ UINT8 MjCsmVer = *(UINT8*)0xF0018;
+ UINT8 MnCsmVer = *(UINT8*)0xF0019;
+
+ //example: InitString(HiiHandle, STRING_TOKEN(STR_USB_MODULE_VERSION_VALUE), L"%d", 25);
+ // Module version
+
+ InitString(HiiHandle, STRING_TOKEN(STR_CSM_MODULE_VERSION_VALUE),
+ L"%02x.%02x", MjCsmVer, MnCsmVer);
+
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Csm/csmsetup.cif b/Board/EM/Csm/csmsetup.cif
new file mode 100644
index 0000000..cd1e574
--- /dev/null
+++ b/Board/EM/Csm/csmsetup.cif
@@ -0,0 +1,10 @@
+<component>
+ name = "CSM Setup"
+ category = ModulePart
+ LocalRoot = "board\em\csm"
+ RefName = "CSMSETUP"
+[files]
+"\csm.uni"
+"\csm.sd"
+"\csmsetup.c"
+<endComponent>
diff --git a/Board/EM/Csm/oem16sig.asm b/Board/EM/Csm/oem16sig.asm
new file mode 100644
index 0000000..defb1df
--- /dev/null
+++ b/Board/EM/Csm/oem16sig.asm
@@ -0,0 +1,46 @@
+
+ TITLE OEM16SIG.ASM - The OEM signature definition file
+
+;**********************************************************************
+;**********************************************************************
+;** **
+;** (C)Copyright 1985-2010, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;**********************************************************************
+;**********************************************************************
+
+;****************************************************************************
+; $Header: /Alaska/SOURCE/Modules/CSM/Generic/OEM Hooks/oem16sig.asm 2 1/12/10 11:50a Olegi $
+;
+; $Revision: 2 $
+;
+; $Date: 1/12/10 11:50a $
+;****************************************************************************
+
+OEM16SIG_CSEG SEGMENT PARA PUBLIC 'CODE' USE16
+
+ db "$OEM$FUN"
+
+OEM16SIG_CSEG ENDS
+
+END
+
+;**********************************************************************
+;**********************************************************************
+;** **
+;** (C)Copyright 1985-2010, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;**********************************************************************
+;**********************************************************************
diff --git a/Board/EM/EcPs2Kbd/EcPs2Kbd.c b/Board/EM/EcPs2Kbd/EcPs2Kbd.c
new file mode 100644
index 0000000..daab843
--- /dev/null
+++ b/Board/EM/EcPs2Kbd/EcPs2Kbd.c
@@ -0,0 +1,280 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/EcPs2Kbd/EcPs2Kbd.c 3 6/29/10 3:01p Stacyh $
+//
+// $Revision: 3 $
+//
+// $Date: 6/29/10 3:01p $
+//
+//*****************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/EcPs2Kbd/EcPs2Kbd.c $
+//
+// 3 6/29/10 3:01p Stacyh
+// Added fix for EIP# 39388: SCT Execution test
+// failed-4.6.3.5_VeB_0ABUC_004
+//
+// 2 6/03/08 10:07a Stacyh
+// Added code to install a device path for PS2 Mouse.
+// Added code to create/update the SIO_DEV_STATUS EFI variable
+//
+// 1 5/30/08 4:23p Stacyh
+//
+//
+//*****************************************************************************
+
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: EcPs2Kbd.C
+//
+// Description: This file contains code necessary to install the EC PS2 devices
+// for EFI, ACPI and DOS.
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include "token.h"
+#include "EcPs2Kbd.h"
+
+static EFI_GUID gSioDevStatusVarGuid = SIO_DEV_STATUS_VAR_GUID;
+
+static PS2_KBD_DEVICE_PATH mEcPs2KbdDevicePath[1][1] = {
+ {
+ ACPI_DEVICE_PATH,
+ ACPI_DP,
+ (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
+ (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8),
+ EISA_PNP_ID(0x303),
+ 0,
+ END_DEVICE_PATH_TYPE,
+ END_ENTIRE_DEVICE_PATH_SUBTYPE,
+ END_DEVICE_PATH_LENGTH,
+ 0
+ }
+};
+
+static PS2_KBD_DEVICE_PATH mEcPs2MsDevicePath[1][1] = {
+ {
+ ACPI_DEVICE_PATH,
+ ACPI_DP,
+ (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
+ (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8),
+ EISA_PNP_ID(0xF03),
+ 0,
+ END_DEVICE_PATH_TYPE,
+ END_ENTIRE_DEVICE_PATH_SUBTYPE,
+ END_DEVICE_PATH_LENGTH,
+ 0
+ }
+};
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: ConnectDevicePath
+//
+// Description: This function connects the EFI device to its parent device.
+//
+// Input: pPath - Pointer to an EFI device path.
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID ConnectDevicePath (
+ IN EFI_DEVICE_PATH_PROTOCOL *pPath)
+{
+ EFI_HANDLE Handle;
+ EFI_STATUS Status;
+
+ while (TRUE)
+ {
+ EFI_DEVICE_PATH_PROTOCOL *pLastPath = NULL;
+ EFI_DEVICE_PATH_PROTOCOL *pFirstNode = pPath;
+
+ if (isEndNode(pPath))
+ {
+ if (pPath->SubType == END_ENTIRE_SUBTYPE) break;
+ pPath++;
+ continue;
+ }
+
+ while (TRUE) {
+ EFI_DEVICE_PATH_PROTOCOL *Dp;
+ UINT8 SubType;
+
+ pPath = pFirstNode;
+
+ // LocateDevicePath can not work with multi-instance device paths.
+ // Prepare single instance device path and call LocateDevicePath.
+
+ Dp = DPGetEndNode(pPath);
+ SubType = Dp->SubType;
+ Dp->SubType = END_ENTIRE_SUBTYPE;
+ Status = pBS->LocateDevicePath(&gEfiDevicePathProtocolGuid, \
+ &pPath, &Handle);
+ Dp->SubType = SubType;
+ if (EFI_ERROR(Status)) break;
+
+ if (isEndNode(pPath))
+ {
+ // Last time let's do it recursively.
+
+ pBS->ConnectController(Handle, NULL, NULL, TRUE);
+ break;
+ }
+ if (pPath == pLastPath) break;
+ pLastPath = pPath;
+ if (EFI_ERROR(pBS->ConnectController(Handle, NULL, pPath, FALSE)))
+ break;
+ }
+
+ while (!isEndNode(pPath))
+ pPath = NEXT_NODE(pPath);
+ }
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: EcPs2KbdEntry
+//
+// Description: This function installs the Device Path for the EC Ps2.
+//
+// Input: ImageHandle Image handle
+// SystemTable Pointer to the system table
+//
+// Output: EFI_STATUS Returned from PCI read call
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS EcPs2KbdEntry (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable)
+{
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *KbTmpDp = NULL;
+ EFI_DEVICE_PATH_PROTOCOL *MsTmpDp = NULL;
+ ACPI_HID_DEVICE_PATH RbDp;
+ PCI_DEVICE_PATH PciDp;
+ PS2KBD_DEV *PrivateData;
+ SIO_DEV_STATUS SioDevStatusVar;
+ UINTN SioDevStatusVarSize = sizeof(SIO_DEV_STATUS);
+ UINT32 SioDevStatusVarAttributes = 0;
+
+ InitAmiLib(ImageHandle,SystemTable);
+
+ // Get root bridge device path
+ RbDp.Header.Type = ACPI_DEVICE_PATH;
+ RbDp.Header.SubType = ACPI_DP;
+ SET_NODE_LENGTH(&RbDp.Header, ACPI_DEVICE_PATH_LENGTH);
+ RbDp.HID = EISA_PNP_ID(0x0A03);
+ RbDp.UID = 0;
+ KbTmpDp = DPAddNode(KbTmpDp, &RbDp.Header);
+ MsTmpDp = DPAddNode(MsTmpDp, &RbDp.Header);
+ ConnectDevicePath(KbTmpDp);
+ ConnectDevicePath(MsTmpDp);
+
+ // Get PCI device path
+ PciDp.Header.SubType = HW_PCI_DP;
+ PciDp.Header.Type = HARDWARE_DEVICE_PATH;
+ SET_NODE_LENGTH(&PciDp.Header, HW_PCI_DEVICE_PATH_LENGTH);
+ PciDp.Function = SB_FUN_NUMBER;
+ PciDp.Device = SB_DEV_NUMBER;
+ KbTmpDp = DPAddNode(KbTmpDp, &PciDp.Header);
+ MsTmpDp = DPAddNode(MsTmpDp, &PciDp.Header);
+ ConnectDevicePath(KbTmpDp);
+ ConnectDevicePath(MsTmpDp);
+
+
+ // Install PS2 Keyboard Device Path
+ Status = pBS->AllocatePool (EfiBootServicesData, sizeof (PS2KBD_DEV), \
+ &PrivateData);
+ ASSERT (!EFI_ERROR (Status));
+
+ KbTmpDp = DPAddNode(KbTmpDp, (EFI_DEVICE_PATH_PROTOCOL *) \
+ &mEcPs2KbdDevicePath [0][0]);
+ ConnectDevicePath(KbTmpDp);
+ PrivateData->DevicePath = KbTmpDp;
+ PrivateData->Handle = NULL;
+
+ Status = pBS->InstallProtocolInterface (&PrivateData->Handle, \
+ &gEfiDevicePathProtocolGuid, EFI_NATIVE_INTERFACE, \
+ PrivateData->DevicePath);
+
+ if (EFI_ERROR (Status)) {
+ pBS->FreePool (PrivateData);
+ return EFI_DEVICE_ERROR;
+ }
+
+ // Install PS2 Mouse Device Path
+ Status = pBS->AllocatePool (EfiBootServicesData, sizeof (PS2KBD_DEV), \
+ &PrivateData);
+ ASSERT (!EFI_ERROR (Status));
+
+ MsTmpDp = DPAddNode(MsTmpDp, (EFI_DEVICE_PATH_PROTOCOL *) \
+ &mEcPs2MsDevicePath [0][0]);
+ ConnectDevicePath(MsTmpDp);
+ PrivateData->DevicePath = MsTmpDp;
+ PrivateData->Handle = NULL;
+
+ Status = pBS->InstallProtocolInterface (&PrivateData->Handle, \
+ &gEfiDevicePathProtocolGuid, EFI_NATIVE_INTERFACE, \
+ PrivateData->DevicePath);
+
+ if (EFI_ERROR (Status)) {
+ pBS->FreePool (PrivateData);
+ return EFI_DEVICE_ERROR;
+ }
+
+ // Create/Update SIO_DEV_STATUS EFI variable
+ Status = pRS->GetVariable(SIO_DEV_STATUS_VAR_NAME, &gSioDevStatusVarGuid,
+ &SioDevStatusVarAttributes, &SioDevStatusVarSize,
+ &SioDevStatusVar.DEV_STATUS);
+
+ if (EFI_ERROR(Status)) {
+ SioDevStatusVar.DEV_STATUS = 0;
+ SioDevStatusVarAttributes = EFI_VARIABLE_BOOTSERVICE_ACCESS;
+ }
+
+ SioDevStatusVar.Key60_64 = 1;
+ SioDevStatusVar.Ps2Mouse = 1;
+
+ Status = pRS->SetVariable(SIO_DEV_STATUS_VAR_NAME, &gSioDevStatusVarGuid,
+ SioDevStatusVarAttributes, SioDevStatusVarSize,
+ &SioDevStatusVar);
+
+ return Status;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/EcPs2Kbd/EcPs2Kbd.chm b/Board/EM/EcPs2Kbd/EcPs2Kbd.chm
new file mode 100644
index 0000000..907d4c5
--- /dev/null
+++ b/Board/EM/EcPs2Kbd/EcPs2Kbd.chm
Binary files differ
diff --git a/Board/EM/EcPs2Kbd/EcPs2Kbd.cif b/Board/EM/EcPs2Kbd/EcPs2Kbd.cif
new file mode 100644
index 0000000..c38168b
--- /dev/null
+++ b/Board/EM/EcPs2Kbd/EcPs2Kbd.cif
@@ -0,0 +1,13 @@
+<component>
+ name = "EcPs2Kbd"
+ category = eModule
+ LocalRoot = "Board\em\EcPs2Kbd"
+ RefName = "EcPs2Kbd"
+[files]
+"EcPs2Kbd.sdl"
+"EcPs2Kbd.c"
+"EcPs2Kbd.mak"
+"EcPs2Kbd.h"
+"EcPs2Kbd.dxs"
+"EcPs2Kbd.chm"
+<endComponent>
diff --git a/Board/EM/EcPs2Kbd/EcPs2Kbd.dxs b/Board/EM/EcPs2Kbd/EcPs2Kbd.dxs
new file mode 100644
index 0000000..e24542c
--- /dev/null
+++ b/Board/EM/EcPs2Kbd/EcPs2Kbd.dxs
@@ -0,0 +1,55 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2008, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/EcPs2Kbd/EcPs2Kbd.dxs 2 5/30/08 4:26p Stacyh $
+//
+// $Revision: 2 $
+//
+// $Date: 5/30/08 4:26p $
+//
+//*****************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/EcPs2Kbd/EcPs2Kbd.dxs $
+//
+// 2 5/30/08 4:26p Stacyh
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: EcPs2Kbd.dxs
+//
+// Description: Dependency expression file for EcPs2Kbd DXE driver
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+DEPENDENCY_START
+ TRUE
+DEPENDENCY_END
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2008, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/EcPs2Kbd/EcPs2Kbd.h b/Board/EM/EcPs2Kbd/EcPs2Kbd.h
new file mode 100644
index 0000000..50736e8
--- /dev/null
+++ b/Board/EM/EcPs2Kbd/EcPs2Kbd.h
@@ -0,0 +1,83 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2008, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/EcPs2Kbd/EcPs2Kbd.h 3 7/18/11 5:58p Stacyh $
+//
+// $Revision: 3 $
+//
+// $Date: 7/18/11 5:58p $
+//
+//*****************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/EcPs2Kbd/EcPs2Kbd.h $
+//
+// 3 7/18/11 5:58p Stacyh
+// [TAG] EIP65200
+// [Category] Improvement
+// [Description] Port EcPs2Kbd to be compliant with PI 1.2, and UEFI
+// 2.3.1 specifications.
+// [Files] EcPs2Kbd.h
+//
+// 2 6/03/08 10:05a Stacyh
+//
+// 1 5/30/08 4:23p Stacyh
+//
+//
+//*****************************************************************************
+
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: EcPs2Kbd.h
+//
+// Description: defines needed for EcPs2Kbd.
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include <GenericSIO.h>
+#include <Protocol\DevicePath.h>
+#include <AmiDxeLib.h>
+
+#define END_DEVICE_PATH_TYPE 0x7f
+#define END_ENTIRE_DEVICE_PATH_SUBTYPE 0xff
+
+typedef struct {
+ ACPI_HID_DEVICE_PATH AcpiDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} PS2_KBD_DEVICE_PATH;
+
+
+typedef struct _PS2KBD_DEV {
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_HANDLE Handle;
+} PS2KBD_DEV;
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2008, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/EcPs2Kbd/EcPs2Kbd.mak b/Board/EM/EcPs2Kbd/EcPs2Kbd.mak
new file mode 100644
index 0000000..d980b9e
--- /dev/null
+++ b/Board/EM/EcPs2Kbd/EcPs2Kbd.mak
@@ -0,0 +1,53 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2008, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: <EcPs2Kbd.mak>
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+{$(ECPS2KBD_DIR)}.c{$(BUILD_DIR)}.obj::
+ $(CC) $(CFLAGS) /Fo$(BUILD_DIR)\\ $<
+
+all : EcPs2Kbd
+
+EcPs2Kbd : $(BUILD_DIR)\EcPs2Kbd.mak EcPs2KbdBin
+
+$(BUILD_DIR)\EcPs2Kbd.mak : $(ECPS2KBD_DIR)\$(@B).cif $(ECPS2KBD_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(ECPS2KBD_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+EcPs2KbdBin : $(AMIDXELIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\EcPs2Kbd.mak all\
+ GUID=2F72309E-D5B0-4a9d-84A9-1AB38C698F78\
+ ENTRY_POINT=EcPs2KbdEntry\
+ TYPE=BS_DRIVER \
+ COMPRESS=1
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2008, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/EcPs2Kbd/EcPs2Kbd.sdl b/Board/EM/EcPs2Kbd/EcPs2Kbd.sdl
new file mode 100644
index 0000000..46d09b6
--- /dev/null
+++ b/Board/EM/EcPs2Kbd/EcPs2Kbd.sdl
@@ -0,0 +1,41 @@
+TOKEN
+ Name = "EcPs2Kbd_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "SB_DEV_NUMBER"
+ Value = "0x1f"
+ Help = "South Bridge (LPC Bridge) PCI Device Number"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SB_FUN_NUMBER"
+ Value = "0x00"
+ Help = "South Bridge (LPC Bridge) PCI Function Number"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+PATH
+ Name = "ECPS2KBD_DIR"
+End
+
+MODULE
+ Help = "Includes EcPs2Kbd.MAK into BUILD PROCESS"
+ File = "EcPs2Kbd.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\EcPs2Kbd.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/FIT/Boot_Guard_ACM_Rev1_1_PC_ES.bin b/Board/EM/FIT/Boot_Guard_ACM_Rev1_1_PC_ES.bin
new file mode 100644
index 0000000..93da68e
--- /dev/null
+++ b/Board/EM/FIT/Boot_Guard_ACM_Rev1_1_PC_ES.bin
Binary files differ
diff --git a/Board/EM/FIT/Boot_Guard_ACM_Rev1_2_PC_QS.bin b/Board/EM/FIT/Boot_Guard_ACM_Rev1_2_PC_QS.bin
new file mode 100644
index 0000000..d495bd9
--- /dev/null
+++ b/Board/EM/FIT/Boot_Guard_ACM_Rev1_2_PC_QS.bin
Binary files differ
diff --git a/Board/EM/FIT/Boot_Guard_ACM_Rev1_2_PV_QS.bin b/Board/EM/FIT/Boot_Guard_ACM_Rev1_2_PV_QS.bin
new file mode 100644
index 0000000..88ff342
--- /dev/null
+++ b/Board/EM/FIT/Boot_Guard_ACM_Rev1_2_PV_QS.bin
Binary files differ
diff --git a/Board/EM/FIT/BpmKmGen.exe b/Board/EM/FIT/BpmKmGen.exe
new file mode 100644
index 0000000..b0b6de9
--- /dev/null
+++ b/Board/EM/FIT/BpmKmGen.exe
Binary files differ
diff --git a/Board/EM/FIT/CryptoCon.exe b/Board/EM/FIT/CryptoCon.exe
new file mode 100644
index 0000000..5ce7893
--- /dev/null
+++ b/Board/EM/FIT/CryptoCon.exe
Binary files differ
diff --git a/Board/EM/FIT/CutRom.exe b/Board/EM/FIT/CutRom.exe
new file mode 100644
index 0000000..910e46c
--- /dev/null
+++ b/Board/EM/FIT/CutRom.exe
Binary files differ
diff --git a/Board/EM/FIT/Dxe/BootGuardDxe.c b/Board/EM/FIT/Dxe/BootGuardDxe.c
new file mode 100644
index 0000000..4c4ccb0
--- /dev/null
+++ b/Board/EM/FIT/Dxe/BootGuardDxe.c
@@ -0,0 +1,186 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardDxe.c 1 2/25/13 1:11a Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/25/13 1:11a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardDxe.c $
+//
+// 1 2/25/13 1:11a Bensonlai
+// [TAG] EIP114386
+// [Category] Spec Update
+// [Severity] Important
+// [Description] [SBY] Ultrabook for Shark Bay Platform - : Boot Guard
+// for 4th Gen Intel Core Processor based on Mobile U-Processor Line -
+// BIOS Writer's Guide - Rev 0.8.1
+// [Files] BootGuardDxe.cif
+// BootGuardDxe.c
+// BootGuardDxe.h
+// BootGuardDxe.sdl
+// BootGuardDxe.dxs
+// BootGuardDxe.mak
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: BootGuardDxe.c
+//
+// Description: Chain of trust for Dxe
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include "BootGuardDxe.h"
+
+VOID
+BootGuardDxeCallback (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+)
+{
+ EFI_INPUT_KEY Key;
+ EFI_STATUS Status;
+
+ gST->ConOut->ClearScreen (gST->ConOut);
+
+ gST->ConOut->OutputString (
+ gST->ConOut,
+ L"Anchor Cove verified DXE that is fail\n\r"
+ );
+
+ gST->ConOut->OutputString (
+ gST->ConOut,
+ L"System will shutdown\n\r"
+ );
+
+ gST->ConOut->OutputString (
+ gST->ConOut,
+ L"Press any key\n\r"
+ );
+
+ do {
+ Status = gST->ConIn->ReadKeyStroke (gST->ConIn, &Key);
+ } while (Status != EFI_SUCCESS);
+
+ gRT->ResetSystem (EfiResetShutdown, EFI_SUCCESS, 0, NULL);
+ EFI_DEADLOOP ();
+
+ gBS->CloseEvent (Event);
+}
+
+VOID
+BootGuardDxeRegisterCallBack (
+ VOID
+)
+{
+ EFI_EVENT Event;
+ VOID *NotifyReg;
+ EFI_STATUS Status;
+
+ Status = gBS->CreateEvent (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ BootGuardDxeCallback,
+ NULL,
+ &Event
+ );
+
+ if ( EFI_ERROR(Status) ) {
+ ASSERT_EFI_ERROR (Status);
+ return;
+ }
+
+ Status = gBS->RegisterProtocolNotify (
+ &gNotifyProtocolGuid ,
+ Event,
+ &NotifyReg
+ );
+
+ if ( EFI_ERROR(Status) ) {
+ ASSERT_EFI_ERROR (Status);
+ return;
+ }
+
+ return;
+}
+
+EFI_STATUS
+BootGuardDxeEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_GUID AmiBootGuardHobGuid = AMI_ANCHOR_COVE_HOB_GUID;
+ AMI_ANCHOR_COVE_HOB *AmiBootGuardHobPtr;
+ PCH_SERIES PchSeries = GetPchSeries();
+ EFI_BOOT_MODE BootMode;
+ EFI_PEI_HOB_POINTERS HobList;
+
+ if ( PchSeries != PchLp ) {
+ return EFI_SUCCESS;
+ }
+
+ if ( IsBootGuardSupported() == FALSE ) {
+ return EFI_SUCCESS;
+ }
+
+ DEBUG ((EFI_D_INFO, "[BootGuardDxe.c] : Entry Point...\n"));
+
+ //
+ // Check Boot Type
+ //
+ EfiGetSystemConfigurationTable (&gEfiHobListGuid, (VOID **) &HobList.Raw);
+ if (HobList.Header->HobType != EFI_HOB_TYPE_HANDOFF) {
+ DEBUG ((EFI_D_ERROR, "[BootGuardDxe.c] : Get HOB fail\n"));
+ return EFI_SUCCESS;
+ }
+
+ BootMode = HobList.HandoffInformationTable->BootMode;
+ if ( BootMode == BOOT_IN_RECOVERY_MODE ) {
+ DEBUG ((EFI_D_ERROR, "[BootGuardDxe.c] : In the BOOT_IN_RECOVERY_MODE\n"));
+ return EFI_SUCCESS;
+ }
+
+ AmiBootGuardHobPtr = GetFirstGuidHob (&AmiBootGuardHobGuid);
+ if (AmiBootGuardHobPtr == NULL) {
+ DEBUG ((EFI_D_ERROR, "[BootGuardDxe.c] : AmiBootGuard DXE Hob not available\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ if ( AmiBootGuardHobPtr->AmiBootGuardVerificationforPEItoDXEFlag == 0 ) {
+ BootGuardDxeRegisterCallBack();
+ }
+
+ DEBUG ((EFI_D_INFO, "[BootGuardDxe.c] : Entry End...\n"));
+
+ return EFI_SUCCESS;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/FIT/Dxe/BootGuardDxe.cif b/Board/EM/FIT/Dxe/BootGuardDxe.cif
new file mode 100644
index 0000000..ea40b8e
--- /dev/null
+++ b/Board/EM/FIT/Dxe/BootGuardDxe.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "BootGuardDxe"
+ category = ModulePart
+ LocalRoot = "Board\EM\FIT\Dxe"
+ RefName = "BootGuardDxe"
+[files]
+"BootGuardDxe.c"
+"BootGuardDxe.h"
+"BootGuardDxe.sdl"
+"BootGuardDxe.dxs"
+"BootGuardDxe.mak"
+<endComponent>
diff --git a/Board/EM/FIT/Dxe/BootGuardDxe.dxs b/Board/EM/FIT/Dxe/BootGuardDxe.dxs
new file mode 100644
index 0000000..2034306
--- /dev/null
+++ b/Board/EM/FIT/Dxe/BootGuardDxe.dxs
@@ -0,0 +1,71 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardDxe.dxs 1 2/25/13 1:11a Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/25/13 1:11a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardDxe.dxs $
+//
+// 1 2/25/13 1:11a Bensonlai
+// [TAG] EIP114386
+// [Category] Spec Update
+// [Severity] Important
+// [Description] [SBY] Ultrabook for Shark Bay Platform - : Boot Guard
+// for 4th Gen Intel Core Processor based on Mobile U-Processor Line -
+// BIOS Writer's Guide - Rev 0.8.1
+// [Files] BootGuardDxe.cif
+// BootGuardDxe.c
+// BootGuardDxe.h
+// BootGuardDxe.sdl
+// BootGuardDxe.dxs
+// BootGuardDxe.mak
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: BootGuardDxe.dxs
+//
+// Description: Dependency expression file for BootGuardDxe Driver.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include "AutoGen.h"
+#include "DxeDepex.h"
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+#include EFI_ARCH_PROTOCOL_DEFINITION (Variable)
+#endif
+
+DEPENDENCY_START
+ EFI_VARIABLE_ARCH_PROTOCOL_GUID
+DEPENDENCY_END
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/FIT/Dxe/BootGuardDxe.h b/Board/EM/FIT/Dxe/BootGuardDxe.h
new file mode 100644
index 0000000..a5d49a7
--- /dev/null
+++ b/Board/EM/FIT/Dxe/BootGuardDxe.h
@@ -0,0 +1,114 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardDxe.h 2 3/07/13 5:41a Bensonlai $
+//
+// $Revision: 2 $
+//
+// $Date: 3/07/13 5:41a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardDxe.h $
+//
+// 2 3/07/13 5:41a Bensonlai
+// [TAG] EIP117307
+// [Category] Improvement
+// [Description] [Boot Guard] Implementation of speed up the post time
+// for Chain of Trust
+// [Files] BootGuardDxe.h, BootGuardPei.c, BootGuardPei.h,
+// BpmKmGen.exe, ReserveBootGuardFvMainHashKey.bin
+//
+// 1 2/25/13 1:11a Bensonlai
+// [TAG] EIP114386
+// [Category] Spec Update
+// [Severity] Important
+// [Description] [SBY] Ultrabook for Shark Bay Platform - : Boot Guard
+// for 4th Gen Intel Core Processor based on Mobile U-Processor Line -
+// BIOS Writer's Guide - Rev 0.8.1
+// [Files] BootGuardDxe.cif
+// BootGuardDxe.c
+// BootGuardDxe.h
+// BootGuardDxe.sdl
+// BootGuardDxe.dxs
+// BootGuardDxe.mak
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: BootGuardDxe.h
+//
+// Description: Header file for BootGuardDxe
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifndef _BootGuardDxe_H_
+#define _BootGuardDxe_H_
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+#include "CpuAccess.h"
+#include "PchAccess.h"
+#include "PchPlatformLib.h"
+#include "BootGuardLibrary.h"
+#include <token.h>
+#endif
+
+#define BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID \
+ { 0xdbc9fd21, 0xfad8, 0x45b0, 0x9e, 0x78, 0x27, 0x15, 0x88, 0x67, 0xcc, 0x93 }
+
+EFI_GUID gNotifyProtocolGuid = BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID;
+
+//
+// GUID for the AMI_ANCHOR_COVE Module
+//
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#define AMI_ANCHOR_COVE_HOB_GUID \
+ { \
+ 0xb60ab175, 0x498d, 0x429d, 0xad, 0xba, 0xa, 0x62, 0x2c, 0x58, 0x16, 0xe2 \
+ }
+#else
+#define AMI_ANCHOR_COVE_HOB_GUID \
+ { \
+ 0xb60ab175, 0x498d, 0x429d, \
+ { \
+ 0xad, 0xba, 0xa, 0x62, 0x2c, 0x58, 0x16, 0xe2 \
+ } \
+ }
+#endif
+
+#pragma pack (1)
+
+typedef struct {
+ EFI_HOB_GUID_TYPE EfiHobGuidType;
+ UINT8 AmiBootGuardVerificationforPEItoDXEFlag;
+} AMI_ANCHOR_COVE_HOB;
+
+#pragma pack ()
+
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/FIT/Dxe/BootGuardDxe.mak b/Board/EM/FIT/Dxe/BootGuardDxe.mak
new file mode 100644
index 0000000..72c3c26
--- /dev/null
+++ b/Board/EM/FIT/Dxe/BootGuardDxe.mak
@@ -0,0 +1,122 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardDxe.mak 1 2/25/13 1:11a Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 2/25/13 1:11a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardDxe.mak $
+#
+# 1 2/25/13 1:11a Bensonlai
+# [TAG] EIP114386
+# [Category] Spec Update
+# [Severity] Important
+# [Description] [SBY] Ultrabook for Shark Bay Platform - : Boot Guard
+# for 4th Gen Intel Core Processor based on Mobile U-Processor Line -
+# BIOS Writer's Guide - Rev 0.8.1
+# [Files] BootGuardDxe.cif
+# BootGuardDxe.c
+# BootGuardDxe.h
+# BootGuardDxe.sdl
+# BootGuardDxe.dxs
+# BootGuardDxe.mak
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: BootGuardDxe.mak
+#
+# Description: Make file for BootGuardDxe
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+all : BootGuardDxe
+
+BootGuardDxe : $(BUILD_DIR)\BootGuardDxe.mak BootGuardDxe_Bin
+
+$(BUILD_DIR)\BootGuardDxe.mak : $(BOOT_GUARD_DXE_PATH)\$(@B).cif $(BOOT_GUARD_DXE_PATH)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(BOOT_GUARD_DXE_PATH)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+BootGuardDxe_INCLUDES=\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(EDK_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+ $(PROJECT_CPU_INCLUDES)\
+
+BootGuardDxe_LIBS=\
+ $(EDKPROTOCOLLIB)\
+ $(EFIGUIDLIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EDKFRAMEWORKGUIDLIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGlueBaseMemoryLib_LIB)\
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeServicesTableLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueUefiBootServicesTableLib_LIB)\
+ $(EdkIIGlueUefiDevicePathLib_LIB)\
+ $(EdkIIGlueBasePciLibPciExpress_LIB)\
+ $(EdkIIGlueEdkDxeRuntimeDriverLib_LIB)\
+ $(EdkIIGlueDxeHobLib_LIB)\
+ $(PchPlatformDxeLib_LIB)\
+ $(CpuPlatformLib_LIB)\
+ $(BootGuardLib_LIB)\
+
+BootGuardDxe_DEFINES=\
+ $(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=BootGuardDxeEntryPoint"\
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_DXE_SERVICES_TABLE_LIB__ \
+ /D __EDKII_GLUE_DXE_HOB_LIB__ \
+
+BootGuardDxe_Bin : $(BootGuardDxe_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\BootGuardDxe.mak all\
+ "MY_INCLUDES=$(BootGuardDxe_INCLUDES)"\
+ "MY_DEFINES=$(BootGuardDxe_DEFINES)"\
+ GUID=1DB43EC9-DF5F-4cf5-AAF0-0E85DB4E149A \
+ ENTRY_POINT=_ModuleEntryPoint \
+ EDKIIModule=DXEDRIVER\
+ TYPE=BS_DRIVER \
+ DEPEX1=$(BOOT_GUARD_DXE_PATH)\BootGuardDxe.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ COMPRESS=1\
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/FIT/Dxe/BootGuardDxe.sdl b/Board/EM/FIT/Dxe/BootGuardDxe.sdl
new file mode 100644
index 0000000..10527a0
--- /dev/null
+++ b/Board/EM/FIT/Dxe/BootGuardDxe.sdl
@@ -0,0 +1,95 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardDxe.sdl 2 3/06/13 2:54a Bensonlai $
+#
+# $Revision: 2 $
+#
+# $Date: 3/06/13 2:54a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardDxe.sdl $
+#
+# 2 3/06/13 2:54a Bensonlai
+# [TAG] EIP116907
+# [Category] Improvement
+# [Description] BpmKmGen.exe generates KM / BPM tables and
+# BootGuardFvMainHash key separately
+# [Files] BpmKmGen.exe, Fit.sdl, Fit.mak, BootGuardPei.sdl,
+# BootGuardDxe.sdl
+#
+# 1 2/25/13 1:11a Bensonlai
+# [TAG] EIP114386
+# [Category] Spec Update
+# [Severity] Important
+# [Description] [SBY] Ultrabook for Shark Bay Platform - : Boot Guard
+# for 4th Gen Intel Core Processor based on Mobile U-Processor Line -
+# BIOS Writer's Guide - Rev 0.8.1
+# [Files] BootGuardDxe.cif
+# BootGuardDxe.c
+# BootGuardDxe.h
+# BootGuardDxe.sdl
+# BootGuardDxe.dxs
+# BootGuardDxe.mak
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: BootGuardDxe.sdl
+#
+# Description: SDL file for BootGuardDxe
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "BOOT_GUARD_DXE_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Help = "Main switch to enable BootGuardDxe support in Project"
+ Token = "INTEL_BOOT_GUARD_CHAIN_OF_TRUST_SUPPORT" "=" "1"
+End
+
+MODULE
+ File = "BootGuardDxe.mak"
+ Help = "Includes BootGuardDxe.mak to Project"
+End
+
+PATH
+ Name = "BOOT_GUARD_DXE_PATH"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\BootGuardDxe.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.c b/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.c
new file mode 100644
index 0000000..16a317b
--- /dev/null
+++ b/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.c
@@ -0,0 +1,350 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.c 2 10/29/13 5:15a Bensonlai $
+//
+// $Revision: 2 $
+//
+// $Date: 10/29/13 5:15a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.c $
+//
+// 2 10/29/13 5:15a Bensonlai
+// [TAG] EIPNone
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] Build error when enable the DEBUG mode.
+//
+// 1 9/06/13 6:17a Bensonlai
+// [TAG] EIP135513
+// [Category] New Feature
+// [Description] Implementation of Boot Guard of PTT flow for WHCK test.
+// [Files] BootGuardTPM2Dxe.cif
+// BootGuardTPM2Dxe.c
+// BootGuardTPM2Dxe.h
+// BootGuardTPM2Dxe.sdl
+// BootGuardTPM2Dxe.mak
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: BootGuardTPM2Dxe.c
+//
+// Description: TPM2 Initialization Flow for Boot Guard
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include <Efi.h>
+#include <Pei.h>
+#include "BootGuardTPM2Dxe.h"
+#include <token.h>
+#include "CpuRegs.h"
+#include <AmiDxeLib.h>
+#include "Include\Library\Tpm20.h"
+#include <Protocol\TcgService\TcgService.h>
+
+UINT32
+EFIAPI
+AsmReadMsr32 (
+ IN UINT32 Index
+);
+
+#define DEBUG(arg)
+
+VOID *
+EFIAPI
+GlueCopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+);
+
+VOID *
+EFIAPI
+GlueZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+);
+
+VOID *
+EFIAPI
+GlueAllocatePool (
+ IN UINTN AllocationSize
+);
+
+#define CopyMem(_DESTINATIONBUFFER, _SOURCEBUFFER, _LENGTH) GlueCopyMem(_DESTINATIONBUFFER, _SOURCEBUFFER, _LENGTH)
+#define ZeroMem(_BUFFER, _LENGTH) GlueZeroMem(_BUFFER, _LENGTH)
+#define AllocatePool(_SIZE) GlueAllocatePool(_SIZE)
+
+#pragma pack(push, 1)
+
+typedef union {
+ UINT8 sha1[SHA1_DIGEST_SIZE];
+ UINT8 sha256[SHA256_DIGEST_SIZE];
+} TPM_COMM_DIGEST_UNION;
+
+typedef struct {
+ UINT16 HashAlgId;
+ TPM_COMM_DIGEST_UNION Digest;
+} TPM_COMM_DIGEST;
+
+#pragma pack(pop)
+
+EFI_STATUS
+Tpm20Hash(
+ IN CONST UINT8 *DataToHash,
+ IN UINTN DataSize,
+ OUT TPM_COMM_DIGEST *Digest
+);
+
+EFI_STATUS
+TpmDxeLogEventI(
+ IN VOID *NewEventHdr,
+ IN UINT8 *NewEventData
+);
+
+#define ACM_STATUS (*(UINT32*)0xFED30328)
+
+EFI_STATUS LogDetailPCREvent(
+ VOID
+)
+{
+ UINT8 FoundACM = 0, FoundKM = 0, FoundBPM = 0;
+ UINT32 u32HashLen = 0;
+ UINT8 byteEventBuf[0x200];
+ TCG_PCR_EVENT *TcgEvent = (TCG_PCR_EVENT*)&byteEventBuf[0];
+ UINT32 EventNum = 0, FitEntryPointer = 0, FitEntryNumber = 0, i = 0;
+ UINTN Len;
+ CHAR8 DetailPCRStr[] = "Boot Guard Measured S-CRTM";
+ EFI_STATUS Status = EFI_SUCCESS;
+ BOOT_POLICY *BP = NULL;
+ FIT_ENTRY *FitEntry = NULL;
+ KEY_MANIFEST_STRAUCTURE *KmStructure = NULL;
+ BpmStruct *BpmStructure = NULL;
+
+ ZeroMem(
+ byteEventBuf,
+ sizeof(byteEventBuf)
+ );
+
+ Len = sizeof(DetailPCRStr)+1;
+
+ TcgEvent->PCRIndex = 0;
+ TcgEvent->EventType = EV_S_CRTM_VERSION;
+ TcgEvent->EventSize = (UINT32)Len;
+
+ DEBUG((-1, "[BootGuardTPM2Dxe.c] : Enter LogDetailPCREvent(...)\n"));
+
+ GlueCopyMem(
+ TcgEvent->Event,
+ DetailPCRStr,
+ Len
+ );
+
+ // On page 44.
+ // The pHashData must be the format .
+ // SHA-1 {
+ // 1) One byte containing the lower 8 bit of the BP.RSTR
+ // 2) One byte contain the lower 8 bits of BP.TYPE
+ // ....
+ // 7) Digest of Hashed IBB Segments(s)
+
+ BP = AllocatePool( sizeof (BOOT_POLICY));
+ if ( NULL == BP ) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ DEBUG(( -1, "MSR[0x%x]:[%08x]\n", MSR_BOOT_GUARD_SACM_INFO, AsmReadMsr32 (MSR_BOOT_GUARD_SACM_INFO) ));
+ DEBUG(( -1, "ACM_STATUS:[%08x]\n", ACM_STATUS ));
+
+ BP->RSTR0 = (AsmReadMsr32 (MSR_BOOT_GUARD_SACM_INFO) & BIT4) ? 1 : 0;
+ BP->RSTR1 = (ACM_STATUS & BIT21) ? 1 : 0;
+ BP->RSTR2 = (ACM_STATUS & BIT22) ? 1 : 0;
+ BP->RSTR3 = (ACM_STATUS & BIT23) ? 1 : 0;
+ BP->RSTR4 = (ACM_STATUS & BIT24) ? 1 : 0;
+ BP->RSTR5 = 0;
+ BP->RSTR6 = 0;
+ BP->RSTR7 = 0;
+
+ BP->TYPE0 = (AsmReadMsr32 (MSR_BOOT_GUARD_SACM_INFO) & BIT5) ? 1 : 0;
+ BP->TYPE1 = (AsmReadMsr32 (MSR_BOOT_GUARD_SACM_INFO) & BIT6) ? 1 : 0;
+ BP->TYPE2 = (ACM_STATUS & BIT20) ? 1 : 0;
+ BP->TYPE3 = 0;
+ BP->TYPE4 = 0;
+ BP->TYPE5 = 0;
+ BP->TYPE6 = 0;
+ BP->TYPE7 = 0;
+
+ BP->ACM_SVN = ACMSVN;
+ {
+ FitEntryPointer = MmioRead32(IBB_ENTRYPOINT_M);
+ if ( FitEntryPointer == 0xFFFFFFFF ) {
+ DEBUG((-1, "[BootGuardTPM2Dxe.c] : FitEntryPointer(%lx) is empty\n", FitEntryPointer));
+ }
+
+ FitEntry = (FIT_ENTRY*)FitEntryPointer;
+ if ( FitEntry->TblAddress != EFI_SIGNATURE_64 ('_', 'F', 'I', 'T', '_', ' ', ' ', ' ') ) {
+ DEBUG((-1, "[BootGuardTPM2Dxe.c] : [Type 0] FitEntry->TblAddress(%lx) is error\n", FitEntry->TblAddress));
+ }
+
+ FitEntryNumber = FitEntry->TblSIZE;
+
+ FoundACM = 0;
+ for(i=1; i<FitEntryNumber; i++) {
+ FitEntry = (FIT_ENTRY*)(FitEntryPointer + i*16);
+ if ( FitEntry->TblType == 0x02 ) { // FIT type 0x02 - Anc ACM location
+ FoundACM =1;
+ break;
+ }
+ }
+
+ if ( FoundACM == 0 ) {
+ DEBUG((-1, "[BootGuardTPM2Dxe.c] : Can't find the Boot Guard ACM"));
+ }
+
+ DEBUG((-1, "\n[BootGuardTPM2Dxe.c] : BP->ACM_Signature \n"));
+
+ for ( i=0; i<256; i++ ) {
+ if (i % 16 == 0) DEBUG((-1, "\n"));
+ BP->ACM_Signature[i] = MmioRead8( FitEntry->TblAddress + 0x184 + i );
+ DEBUG((-1, "%02x ", BP->ACM_Signature[i]));
+ }
+
+ DEBUG((-1, "\n"));
+
+ FoundKM = 0;
+ for(i=1; i<FitEntryNumber; i++) {
+ FitEntry = (FIT_ENTRY*)(FitEntryPointer + i*16);
+ if ( FitEntry->TblType == 0x0B ) { // FIT Type 0x0B - Key Manifest
+ FoundKM =1;
+ break;
+ }
+ }
+
+ if ( FoundKM == 0 ) {
+ DEBUG((-1, "[BootGuardTPM2Dxe.c] : Can't find the Boot Guard KM"));
+ }
+
+ KmStructure = (KEY_MANIFEST_STRAUCTURE*)FitEntry->TblAddress;
+ DEBUG((-1, "\nKmStructure:\n"));
+
+ for ( i=0; i<256; i++ ) {
+ if (i % 16 == 0) DEBUG((-1, "\n"));
+ BP->Key_Manifest_Signature[i] = KmStructure->KeyManifestSignature.Signature.Signature[i];
+ DEBUG((-1, "%02x ", BP->Key_Manifest_Signature[i]));
+ }
+
+ DEBUG((-1, "\n"));
+
+ FoundBPM = 0;
+ for(i=1; i<FitEntryNumber; i++) {
+ FitEntry = (FIT_ENTRY*)(FitEntryPointer + i*16);
+ if ( FitEntry->TblType == 0x0C ) { // FIT type 0x0C - Boot Policy Manifest
+ FoundBPM =1;
+ break;
+ }
+ }
+
+ if ( FoundBPM == 0 ) {
+ DEBUG((-1, "[BootGuardTPM2Dxe.c] :Can't find the Boot Guard BPM"));
+ }
+
+ BpmStructure = (BpmStruct*)FitEntry->TblAddress;
+ DEBUG((-1, "\nBpmStructure:\n"));
+
+ for ( i=0; i<256; i++ ) {
+ if (i % 16 == 0) DEBUG((-1, "\n"));
+ BP->Boot_Policy_Manifest_Signature[i] = BpmStructure->Bpm_Signature_Element.KeySignature.Signature.Signature[i];
+ DEBUG((-1, "%02x ", BP->Boot_Policy_Manifest_Signature[i]));
+ }
+
+ DEBUG((-1, "\n\nBpmStructure->Digest_of_Hashed_IBB_Segment:\n\n"));
+
+ for ( i=0; i<32; i++ ) {
+ if (i % 16 == 0) DEBUG((-1, "\n"));
+ BP->Digest_of_Hashed_IBB_Segment[i] = BpmStructure->Ibb_Element.Digest.HashBuffer[i];
+ DEBUG((-1, "%02x ", BP->Digest_of_Hashed_IBB_Segment[i]));
+ }
+
+ DEBUG((-1, "\n"));
+ }
+
+ {
+ TPM_COMM_DIGEST Digest;
+
+ u32HashLen = sizeof (BOOT_POLICY);
+ Tpm20Hash( (UINT8*)BP, u32HashLen, &Digest );
+ CopyMem(&TcgEvent->Digest, &Digest.Digest.sha1, SHA1_DIGEST_SIZE);
+ }
+ Status = TpmDxeLogEventI (
+ (VOID*)TcgEvent,
+ &TcgEvent->Event[0]);
+
+ return Status;
+}
+
+EFI_STATUS ACM_PostSuccess(
+ VOID
+)
+{
+ UINT32 MsrValue;
+
+ MsrValue = (UINT32) AsmReadMsr32 (MSR_BOOT_GUARD_SACM_INFO);
+ if ( ((MsrValue & B_NEM_INIT) == B_NEM_INIT) &&
+ ((MsrValue & B_MEASURED) == B_MEASURED) &&
+ ((MsrValue & V_TPM_PRESENT_PTT) == V_TPM_PRESENT_PTT) &&
+ ((MsrValue & B_TPM_SUCCESS) == B_TPM_SUCCESS) ) {
+ DEBUG((-1, "[BootGuardTPM2Dxe.c] : ACM_PostSuccess(...) : EFI_SUCCESS\n"));
+ return EFI_SUCCESS;
+ }
+
+ DEBUG((-1, "[BootGuardTPM2Dxe.c] : ACM_PostSuccess(...) : EFI_UNSUPPORTED\n"));
+ return EFI_UNSUPPORTED;
+}
+
+EFI_STATUS
+BootGuardMeasureCRTMVersion(
+ VOID )
+{
+ EFI_STATUS Status;
+ DEBUG((-1, "[BootGuardTPM2Dxe.c] : Enter BootGuardMeasureCRTMVersion(...)\n"));
+
+ Status = ACM_PostSuccess( );
+ if( !EFI_ERROR(Status) )
+ {
+ Status = LogDetailPCREvent();
+ }
+
+ DEBUG((-1, "[BootGuardTPM2Dxe.c] : End of BootGuardMeasureCRTMVersion\n"));
+
+ return EFI_SUCCESS;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.cif b/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.cif
new file mode 100644
index 0000000..704be62
--- /dev/null
+++ b/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "BootGuardTPM2Dxe"
+ category = ModulePart
+ LocalRoot = "Board\EM\FIT\Dxe\BootGuardTPM2Dxe"
+ RefName = "BootGuardTPM2Dxe"
+[files]
+"BootGuardTPM2Dxe.c"
+"BootGuardTPM2Dxe.h"
+"BootGuardTPM2Dxe.sdl"
+"BootGuardTPM2Dxe.mak"
+<endComponent>
diff --git a/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.h b/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.h
new file mode 100644
index 0000000..7ab934a
--- /dev/null
+++ b/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.h
@@ -0,0 +1,276 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.h 1 9/06/13 6:17a Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 9/06/13 6:17a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.h $
+//
+// 1 9/06/13 6:17a Bensonlai
+// [TAG] EIP135513
+// [Category] New Feature
+// [Description] Implementation of Boot Guard of PTT flow for WHCK test.
+// [Files] BootGuardTPM2Dxe.cif
+// BootGuardTPM2Dxe.c
+// BootGuardTPM2Dxe.h
+// BootGuardTPM2Dxe.sdl
+// BootGuardTPM2Dxe.mak
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: BootGuardTPM2Dxe.c
+//
+// Description: TPM2 Initialization Flow for Boot Guard
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifndef _BOOT_GUARD_TPM2_H_
+#define _BOOT_GUARD_TPM2_H_
+
+#ifndef _EFI_MMIO_ACCESS_H_
+#define _EFI_MMIO_ACCESS_H_
+
+#define MmioAddress(BaseAddr, Register) \
+ ( (UINTN)BaseAddr + (UINTN)(Register) )
+
+// 32-bit
+#define Mmio32Ptr(BaseAddr, Register) \
+ ( (volatile UINT32 *)MmioAddress(BaseAddr, Register) )
+
+#define Mmio32(BaseAddr, Register) \
+ *Mmio32Ptr(BaseAddr, Register)
+
+#define MmioRead32(Addr) \
+ Mmio32(Addr, 0)
+
+#define MmioWrite32(Addr, Value) \
+ (Mmio32(Addr, 0) = (UINT32)Value)
+
+#define MmioRW32(Addr, set, reset) \
+ (Mmio32(Addr, 0) = ((Mmio32(Addr, 0) & (UINT32)~(reset)) | (UINT32)set))
+
+// 16-bit
+#define Mmio16Ptr(BaseAddr, Register) \
+ ( (volatile UINT16 *)MmioAddress(BaseAddr, Register) )
+
+#define Mmio16(BaseAddr, Register) \
+ *Mmio16Ptr(BaseAddr, Register)
+
+#define MmioRead16(Addr) \
+ Mmio16(Addr, 0)
+
+#define MmioWrite16(Addr, Value) \
+ (Mmio16(Addr, 0) = (UINT16)Value)
+
+#define MmioRW16(Addr, set, reset) \
+ (Mmio16(Addr, 0) = ((Mmio16(Addr, 0) & (UINT16)~(reset)) | (UINT16)set))
+
+// 8-bit
+#define Mmio8Ptr(BaseAddr, Register) \
+ ( (volatile UINT8 *)MmioAddress(BaseAddr, Register) )
+
+#define Mmio8(BaseAddr, Register) \
+ *Mmio8Ptr(BaseAddr, Register)
+
+#define MmioRead8(Addr) \
+ Mmio8(Addr, 0)
+
+#define MmioWrite8(Addr, Value) \
+ (Mmio8(Addr, 0) = (UINT8)Value)
+
+#define MmioRW8(Addr, set, reset) \
+ (Mmio8(Addr, 0) = ((Mmio8(Addr, 0) & (UINT8)~(reset)) | (UINT8)set))
+
+#endif
+
+//
+// Define macros to build data structure signatures from characters.
+//
+#define EFI_SIGNATURE_16(A, B) ((A) | (B << 8))
+#define EFI_SIGNATURE_32(A, B, C, D) (EFI_SIGNATURE_16 (A, B) | (EFI_SIGNATURE_16 (C, D) << 16))
+#define EFI_SIGNATURE_64(A, B, C, D, E, F, G, H) \
+ (EFI_SIGNATURE_32 (A, B, C, D) | ((UINT64) (EFI_SIGNATURE_32 (E, F, G, H)) << 32))
+
+#define IBB_ENTRYPOINT_M 0xFFFFFFC0
+
+#pragma pack(1)
+
+typedef struct _BOOT_POLICY
+{
+ UINT8 RSTR0:1;
+ UINT8 RSTR1:1;
+ UINT8 RSTR2:1;
+ UINT8 RSTR3:1;
+ UINT8 RSTR4:1;
+ UINT8 RSTR5:1;
+ UINT8 RSTR6:1;
+ UINT8 RSTR7:1;
+ UINT8 TYPE0:1;
+ UINT8 TYPE1:1;
+ UINT8 TYPE2:1;
+ UINT8 TYPE3:1;
+ UINT8 TYPE4:1;
+ UINT8 TYPE5:1;
+ UINT8 TYPE6:1;
+ UINT8 TYPE7:1;
+ UINT16 ACM_SVN;
+ UINT8 ACM_Signature[256];
+ UINT8 Key_Manifest_Signature[256];
+ UINT8 Boot_Policy_Manifest_Signature[256];
+ UINT8 Digest_of_Hashed_IBB_Segment[32];
+} BOOT_POLICY;
+
+typedef struct _FIT_ENTRY
+{
+ UINT64 TblAddress;
+ UINT32 TblSIZE;
+ UINT16 TblVer;
+ UINT8 TblType;
+ UINT8 TblChkSum;
+} FIT_ENTRY;
+
+//
+// Manifest definition
+//
+#define TPM_ALG_SHA1 0x4
+#define TPM_ALG_SHA256 0xB
+#define SHA1_DIGEST_SIZE 20
+#define SHA256_DIGEST_SIZE 32
+
+typedef struct {
+ UINT16 HashAlg;
+ UINT16 Size;
+ UINT8 HashBuffer[SHA256_DIGEST_SIZE];
+} HASH_STRUCTURE;
+
+#define RSA_PUBLIC_KEY_STRUCT_KEY_SIZE_DEFAULT 2048
+#define RSA_PUBLIC_KEY_STRUCT_KEY_LEN_DEFAULT (RSA_PUBLIC_KEY_STRUCT_KEY_SIZE_DEFAULT/8)
+#define RSA_PUBLIC_KEY_STRUCT_KEY_EXPONENT_DEFAULT 0x10001 // NOT 0x10001
+typedef struct {
+ UINT8 Version;
+ UINT16 KeySize;
+ UINT32 Exponent;
+ UINT8 Modulus[RSA_PUBLIC_KEY_STRUCT_KEY_LEN_DEFAULT];
+} RSA_PUBLIC_KEY_STRUCT;
+
+#define RSASSA_SIGNATURE_STRUCT_KEY_SIZE_DEFAULT 2048
+#define RSASSA_SIGNATURE_STRUCT_KEY_LEN_DEFAULT (RSASSA_SIGNATURE_STRUCT_KEY_SIZE_DEFAULT/8)
+typedef struct {
+ UINT8 Version;
+ UINT16 KeySize;
+ UINT16 HashAlg;
+ UINT8 Signature[RSASSA_SIGNATURE_STRUCT_KEY_LEN_DEFAULT];
+} RSASSA_SIGNATURE_STRUCT;
+
+typedef struct {
+ UINT8 Version;
+ UINT16 KeyAlg;
+ RSA_PUBLIC_KEY_STRUCT Key;
+ UINT16 SigScheme;
+ RSASSA_SIGNATURE_STRUCT Signature;
+} KEY_SIGNATURE_STRUCT;
+
+typedef struct {
+ UINT8 StructureID[8];
+ UINT8 StructVersion;
+ UINT8 HdrStructVersion;
+ UINT8 PMBPMVersion;
+ UINT8 BPSVN_BPM;
+ UINT8 ACMSVN_BPM;
+ UINT8 Reserved;
+ UINT16 NEMDataStack;
+} BOOT_POLICY_MANIFEST_HEADER;
+
+typedef struct {
+ UINT16 Reserved;
+ UINT16 Flags;
+ UINT32 Base;
+ UINT32 Size;
+} IBB_SEGMENT_ELEMENT;
+
+typedef struct {
+ UINT8 StructureID[8];
+ UINT8 StructVersion;
+ UINT8 SetNumber;
+ UINT8 Reserved;
+ UINT8 PBETValue;
+ UINT32 Flags;
+ UINT64 IBB_MCHBAR;
+ UINT64 VTD_BAR;
+ UINT32 PMRL_Base;
+ UINT32 PMRL_Limit;
+ UINT64 PMRH_Base;
+ UINT64 PMRH_Limit;
+ HASH_STRUCTURE PostIbbHash;
+ UINT32 EntryPoint;
+ HASH_STRUCTURE Digest;
+ UINT8 SegmentCount; // 1 ~ 8
+ IBB_SEGMENT_ELEMENT IBBSegment[1];
+} IBB_ELEMENT;
+
+typedef struct {
+ UINT8 StructureID[8];
+ UINT8 StructVersion;
+ UINT16 PMDataSize;
+//UINT8 PMData[PMDataSize];
+} PLATFORM_MANUFACTURER_ELEMENT;
+
+typedef struct {
+ UINT8 StructureID[8];
+ UINT8 StructVersion;
+ KEY_SIGNATURE_STRUCT KeySignature;
+} BOOT_POLICY_MANIFEST_SIGNATURE_ELEMENT;
+
+typedef struct {
+ BOOT_POLICY_MANIFEST_HEADER Bpm_Header;
+ IBB_ELEMENT Ibb_Element;
+ //PLATFORM_MANUFACTURER_ELEMENT Platform_Manufacture_Element;
+ BOOT_POLICY_MANIFEST_SIGNATURE_ELEMENT Bpm_Signature_Element;
+} BpmStruct;
+
+typedef struct {
+ UINT8 StructureID[8];
+ UINT8 StructVersion;
+ UINT8 KeyManifestVersion;
+ UINT8 KMSVN;
+ UINT8 KeyManifestID;
+ HASH_STRUCTURE BPKey;
+ KEY_SIGNATURE_STRUCT KeyManifestSignature;
+} KEY_MANIFEST_STRAUCTURE;
+
+#pragma pack()
+
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.mak b/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.mak
new file mode 100644
index 0000000..74259e1
--- /dev/null
+++ b/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.mak
@@ -0,0 +1,46 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: BootGuardTPM2Dxe.mak
+#
+# Description: TPM2 Initialization Flow for Boot Guard
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TpmDrvBin : $(BUILD_DIR)\BootGuardTPM2Dxe.obj
+
+TPM2_INCLUDE=\
+ /I$(TpmDrv_DIR)\
+ /I$(TCG_DIR)\
+
+$(BUILD_DIR)\BootGuardTPM2Dxe.obj : $(BootGuardTPM2Dxe_PATH)\BootGuardTPM2Dxe.c
+ $(CC) $(CFLAGS) /I$(PROJECT_DIR) /I$(PROJECT_DIR)\Include $(TPM2_INCLUDE) $(PROJECT_CPU_INCLUDES) /Fo$(BUILD_DIR)\BootGuardTPM2Dxe.obj $(BootGuardTPM2Dxe_PATH)\BootGuardTPM2Dxe.c
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.sdl b/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.sdl
new file mode 100644
index 0000000..25872fe
--- /dev/null
+++ b/Board/EM/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.sdl
@@ -0,0 +1,91 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.sdl 2 10/29/13 5:16a Bensonlai $
+#
+# $Revision: 2 $
+#
+# $Date: 10/29/13 5:16a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Dxe/BootGuardTPM2Dxe/BootGuardTPM2Dxe.sdl $
+#
+# 2 10/29/13 5:16a Bensonlai
+# [TAG] EIPNone
+# [Category] Bug Fix
+# [Severity] Important
+# [Symptom] Build error when enable the DEBUG mode.
+#
+# 1 9/06/13 6:17a Bensonlai
+# [TAG] EIP135513
+# [Category] New Feature
+# [Description] Implementation of Boot Guard of PTT flow for WHCK test.
+# [Files] BootGuardTPM2Dxe.cif
+# BootGuardTPM2Dxe.c
+# BootGuardTPM2Dxe.h
+# BootGuardTPM2Dxe.sdl
+# BootGuardTPM2Dxe.mak
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: BootGuardTPM2Dxe.sdl
+#
+# Description: SDL file for BootGuard TPM2
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "BootGuardTPM2Dxe_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable BootGuardTPM2Dxe support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Token = "TpmDrv_SUPPORT" "=" "1"
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+PATH
+ Name = "BootGuardTPM2Dxe_PATH"
+End
+
+MODULE
+ File = "BootGuardTPM2Dxe.mak"
+ Help = "Includes BootGuardTPM2Dxe.mak to Project"
+End
+
+ELINK
+ Name = "BootGuardMeasureCRTMVersion,"
+ Parent = "TcgPreMeasurementList"
+ InvokeOrder = AfterParent
+End
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/FIT/FITUtil.exe b/Board/EM/FIT/FITUtil.exe
new file mode 100644
index 0000000..cfa4b8d
--- /dev/null
+++ b/Board/EM/FIT/FITUtil.exe
Binary files differ
diff --git a/Board/EM/FIT/Fit.chm b/Board/EM/FIT/Fit.chm
new file mode 100644
index 0000000..a09cb38
--- /dev/null
+++ b/Board/EM/FIT/Fit.chm
Binary files differ
diff --git a/Board/EM/FIT/Fit.cif b/Board/EM/FIT/Fit.cif
new file mode 100644
index 0000000..e1d0527
--- /dev/null
+++ b/Board/EM/FIT/Fit.cif
@@ -0,0 +1,31 @@
+<component>
+ name = "Intel FIT"
+ category = eModule
+ Rank = 39
+ LocalRoot = "Board\EM\FIT"
+ RefName = "FIT"
+[files]
+"Fit.chm"
+"Fit.sdl"
+"Fit.mak"
+"FitTable.asm"
+"ReserveBpmTable.bin"
+"ReserveKmTable.bin"
+"Boot_Guard_ACM_Rev1_1_PC_ES.bin"
+"Boot_Guard_ACM_Rev1_2_PC_QS.bin"
+"Boot_Guard_ACM_Rev1_2_PV_QS.bin"
+"ReserveBootGuardFvMainHashKey.bin"
+"ReserveBootGuardSigningServer.bin"
+"FITUtil.exe"
+"CryptoCon.exe"
+"CutRom.exe"
+"BpmKmGen.exe"
+"keygen.exe"
+"ReBuildFIT.bat"
+[parts]
+"BootGuardPei"
+"BootGuardDxe"
+"BootGuardTPMPei"
+"FitHook"
+"BootGuardTPM2Dxe"
+<endComponent>
diff --git a/Board/EM/FIT/Fit.mak b/Board/EM/FIT/Fit.mak
new file mode 100644
index 0000000..3c5829c
--- /dev/null
+++ b/Board/EM/FIT/Fit.mak
@@ -0,0 +1,292 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1987-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30071 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Fit.mak 16 6/04/13 3:48a Bensonlai $
+#
+# $Revision: 16 $
+#
+# $Date: 6/04/13 3:48a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Fit.mak $
+#
+# 16 6/04/13 3:48a Bensonlai
+# [TAG] EIP125148
+# [Category] Spec Update
+# [Severity] Normal
+# [Description] [SBY ULT] Boot Guard for 4th Gen Intel Core Processor
+# based on Mobile U-Processor Line - BIOS Writer's Guide - Rev 1.0
+#
+# 15 5/23/13 4:41a Bensonlai
+# [TAG] EIP124550
+# [Category] New Feature
+# [Description] Support signing server for Boot Guard
+#
+# 14 5/13/13 4:42a Bensonlai
+#
+# 13 3/27/13 1:19a Bensonlai
+# [TAG] EIP118856
+# [Category] Spec Update
+# [Severity] Critical
+# [Description] [SBY ULT] Boot Guard ACM SDK Rev 1.0 PV Release for
+# Shark Bay ULT Platforms
+# [Files] Boot_Guard_ACM_Rev1_0_ES.bin, Boot_Guard_ACM_Rev1_0_QS.bin,
+# Boot_Guard_ACM_Rev1_0_PV.bin, BpmKmGen.exe, Fit.cif, Fit.sdl, Fit.mak
+#
+# 12 3/20/13 12:02a Bensonlai
+# [TAG] EIP118400
+# [Category] Improvement
+# [Description] Add a token for attribution of FV_DATA
+# [Files] Fit.mak, Fit.sdl
+#
+# 11 3/06/13 2:49a Bensonlai
+# [TAG] EIP116907
+# [Category] Improvement
+# [Description] BpmKmGen.exe generates KM / BPM tables and
+# BootGuardFvMainHash key separately
+# [Files] BpmKmGen.exe, Fit.sdl, Fit.mak, BootGuardPei.sdl,
+# BootGuardDxe.sdl
+#
+# 10 2/27/13 4:39a Bensonlai
+# [TAG] None
+# [Category] Improvement
+# [Description] Removing the FV_BLANK
+#
+# 9 2/25/13 1:21a Bensonlai
+# [TAG] EIP114386
+# [Category] Spec Update
+# [Severity] Important
+# [Description] [SBY] Ultrabook for Shark Bay Platform - : Boot Guard
+# for 4th Gen Intel Core Processor based on Mobile U-Processor Line -
+# BIOS Writer's Guide - Rev 0.8.1
+# [Files] FIT\*.*
+#
+# 8 1/14/13 1:57a Bensonlai
+# [TAG] EIP110952
+# [Category] New Feature
+# [Description] [SBY] Anchor Cove function to continue chain of trust
+# for verification
+# [Files] AnchorCovePei.cif, AnchorCovePei.c, AnchorCovePei.h,
+# AnchorCovePei.dxs, AnchorCovePei.sdl, AnchorCovePei.mak,
+# PeiCryptLib.lib, OpensslLib.lib
+# AnchorCoveDxe.c, AnchorCoveDxe.h, AnchorCoveDxe.sdl, AnchorCoveDxe.dxs,
+# AnchorCoveDxe.mak
+# FITUtil.exe, BpmKmGen.exe, Fit.mak, ReserveAnchorCoveFvMainHashKey.bin
+#
+# 7 1/04/13 5:56a Bensonlai
+# [TAG] EIP110784
+# [Category] Improvement
+# [Description] Anchor Cove ACM SDK Rev0.8 Beta Release for Shark Bay ULT
+# Platforms.
+# [Files] AnC_ACM_Rev0_8.bin, FitTable.asm, Fit.sdl, FITUtil.exe,
+# BpmKmGen.exe, ReserveBpmTable.bin
+#
+# 6 12/21/12 4:08a Bensonlai
+# [TAG] EIP110217
+# [Category] New Feature
+# [Description] Support Fault Tolerant Boot Block Update for Intel FIT
+# [Files] Fit.mak, Fit.sdl, FITUtil.exe
+#
+# 5 12/12/12 6:15a Bensonlai
+# [TAG] EIP108904
+# [Category] Improvement
+# [Description] GenFFS utility is not PI 1.2 compliant.
+# Please use FWBuild to generate FFS for FIT.
+#
+# GenFFS utility will populate signature "5A" for FFS with fixed
+# checksum.
+# PI 1.2 requires this signature to be "AA". GenFFS does not support
+# passing PI version.Please check the attachment to change Genffs usage
+# to FWBuild.
+# [Files] Fit.mak, Fit.sdl
+#
+# 4 11/12/12 1:03a Bensonlai
+# [TAG] None
+# [Category] Bug Fix
+# [Severity] Critical
+# [Symptom] Fixed build error when disabled ULT_SUPPORT
+# [RootCause] We don't detect the Anchor Cove flag.
+# [Solution] Add Anchor Cove flag.
+#
+# 3 11/09/12 3:34a Bensonlai
+# [TAG] EIP104159
+# [Category] New Feature
+# [Description] Supported ULT Anchor Cove BIOS Writer's Guide - Rev
+# 0.7.1
+#
+# 2 10/04/12 1:42a Bensonlai
+# [TAG] None
+# [Category] New Feature
+# [Description] 1. Implementation of the Intel Anchor Cove for mobile
+# platforms.
+# 2. Implementation of FIT table using FFS.
+# 3. Updated the FITUtil.exe to support the ACM, KM and BPM for Intel
+# Anchor Cove.
+# [Files] Fit.sdl
+# Fit.mak
+# FitTable.asm
+# BpmTable.asm
+# KmTable.asm
+# FITUtil.exe
+# Fit.cif
+#
+# 1 6/19/12 11:26p Davidhsieh
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: Fit.mak
+#
+# Description: MAK file for Intel FIT module building
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+!IF "$(INTEL_BOOT_GUARD_SUPPORT)"=="1"
+!IF "$(IS_FV_DATA_ALIGNMENT64K)"!="0"
+!ERROR The FV_DATA_BASE needs to align 64K, please check your FV_BB_BASE or FV_DATA_BASE for Boot Guard
+!ENDIF
+!ENDIF
+
+all : $(BUILD_DIR)\Fit.mak FitTableBin
+
+$(BUILD_DIR)\Fit.mak : $(FIT_DIR)\$(@B).cif $(FIT_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(FIT_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+!IF "$(INTEL_BOOT_GUARD_SUPPORT)"=="1"
+!IF "$(INTEL_BOOT_GUARD_SIGNING_SERVER_SUPPROT)"=="1"
+FitTableBin : $(BUILD_DIR)\FitTable.ffs $(BUILD_DIR)\BootGuardBpmBinary.ffs $(BUILD_DIR)\BootGuardKmBinary.ffs $(BUILD_DIR)\BootGuardAcmBinary.ffs $(BUILD_DIR)\ReserveBootGuardFvMainHashKey.ffs $(BUILD_DIR)\ReserveBootGuardSigningServer.ffs
+!ELSE
+FitTableBin : $(BUILD_DIR)\FitTable.ffs $(BUILD_DIR)\BootGuardBpmBinary.ffs $(BUILD_DIR)\BootGuardKmBinary.ffs $(BUILD_DIR)\BootGuardAcmBinary.ffs $(BUILD_DIR)\ReserveBootGuardFvMainHashKey.ffs
+!ENDIF
+!ELSE
+FitTableBin : $(BUILD_DIR)\FitTable.ffs
+!ENDIF
+
+$(BUILD_DIR)\FitTable.bin : $(FIT_DIR)\FitTable.asm $(BUILD_DIR)\Fit.mak
+ $(MAKE) /$(MAKEFLAGS)\
+ /f $(BUILD_DIR)\Fit.mak bin\
+ OBJECTS=$(BUILD_DIR)\$(FIT_DIR)\FitTable.obj\
+ NAME=FitTable\
+ MAKEFILE=$(BUILD_DIR)\Fit.mak \
+ TYPE=BINARY
+
+$(BUILD_DIR)\FitTable.ffs : $(BUILD_DIR)\FitTable.bin
+ $(MAKE) /f Core\FFS.mak \
+ BUILD_DIR=$(BUILD_DIR) \
+ GUID=B52282EE-9B66-44B9-B1CF-7E5040F787C1\
+ TYPE=EFI_FV_FILETYPE_RAW \
+ FFS_ALIGNMENT=1 FFS_CHECKSUM=0\
+ RAWFILE=$(BUILD_DIR)\FitTable.bin FFSFILE=$(BUILD_DIR)\FitTable.ffs COMPRESS=0 NAME=FitTable
+
+$(BUILD_DIR)\$(BootGuardBpmBinary) :
+ copy $(FIT_DIR)\$(BootGuardBpmBinary) $(BUILD_DIR)\$(BootGuardBpmBinary) $(SILENT_OUT)
+
+$(BUILD_DIR)\BootGuardBpmBinary.ffs : $(BUILD_DIR)\$(BootGuardBpmBinary)
+ $(MAKE) /f Core\FFS.mak \
+ BUILD_DIR=$(BUILD_DIR) \
+ GUID=C30FFF4A-10C6-4C0F-A454-FD319BAF6CE6\
+ TYPE=EFI_FV_FILETYPE_RAW \
+ FFS_ALIGNMENT=1 FFS_CHECKSUM=0\
+ RAWFILE=$(BUILD_DIR)\$(BootGuardBpmBinary) FFSFILE=$(BUILD_DIR)\BootGuardBpmBinary.ffs COMPRESS=0 NAME=BootGuardBpmBinary
+
+$(BUILD_DIR)\$(BootGuardKmBinary) :
+ copy $(FIT_DIR)\$(BootGuardKmBinary) $(BUILD_DIR)\$(BootGuardKmBinary) $(SILENT_OUT)
+
+$(BUILD_DIR)\BootGuardKmBinary.ffs : $(BUILD_DIR)\$(BootGuardKmBinary)
+ $(MAKE) /f Core\FFS.mak \
+ BUILD_DIR=$(BUILD_DIR) \
+ GUID=7C9A98F8-2B2B-4027-8F16-F7D277D58025\
+ TYPE=EFI_FV_FILETYPE_RAW \
+ FFS_ALIGNMENT=1 FFS_CHECKSUM=0\
+ RAWFILE=$(BUILD_DIR)\$(BootGuardKmBinary) FFSFILE=$(BUILD_DIR)\BootGuardKmBinary.ffs COMPRESS=0 NAME=BootGuardKmBinary
+
+$(BUILD_DIR)\$(BootGuardAcmBinary) :
+ copy $(FIT_DIR)\$(BootGuardAcmBinary) $(BUILD_DIR)\$(BootGuardAcmBinary) $(SILENT_OUT)
+
+$(BUILD_DIR)\BootGuardAcmBinary.ffs : $(BUILD_DIR)\$(BootGuardAcmBinary)
+ $(MAKE) /f Core\FFS.mak \
+ BUILD_DIR=$(BUILD_DIR) \
+ GUID=6520F532-2A27-4195-B331-C0854683E0BA\
+ TYPE=EFI_FV_FILETYPE_RAW \
+ FFS_ALIGNMENT=7 FFS_CHECKSUM=1\
+ RAWFILE=$(BUILD_DIR)\$(BootGuardAcmBinary) FFSFILE=$(BUILD_DIR)\BootGuardAcmBinary.ffs COMPRESS=0 NAME=BootGuardAcmBinary
+
+RESERVE_BOOT_GUARD_FV_MAIN_HASH_KEY_FFS_FILE_RAW_GUID = CBC91F44-A4BC-4a5b-8696-703451D0B053
+
+$(BUILD_DIR)\ReserveBootGuardFvMainHashKey.ffs : $(FIT_DIR)\ReserveBootGuardFvMainHashKey.bin
+ $(MAKE) /f Core\FFS.mak \
+ BUILD_DIR=$(BUILD_DIR) \
+ GUID=$(RESERVE_BOOT_GUARD_FV_MAIN_HASH_KEY_FFS_FILE_RAW_GUID)\
+ TYPE=EFI_FV_FILETYPE_FREEFORM \
+ FFS_ALIGNMENT=1 FFS_CHECKSUM=0\
+ BINFILE=$** FFSFILE=$@ COMPRESS=0 NAME=ReserveBootGuardFvMainHashKey
+
+RESERVE_BOOT_GUARD_SIGNING_SERVER_FFS_FILE_RAW_GUID = 1068E0ED-5C8E-4724-B011-2C5F95065DF2
+
+$(BUILD_DIR)\ReserveBootGuardSigningServer.ffs : $(FIT_DIR)\ReserveBootGuardSigningServer.bin
+ $(MAKE) /f Core\FFS.mak \
+ BUILD_DIR=$(BUILD_DIR) \
+ GUID=$(RESERVE_BOOT_GUARD_SIGNING_SERVER_FFS_FILE_RAW_GUID)\
+ TYPE=EFI_FV_FILETYPE_FREEFORM \
+ FFS_ALIGNMENT=1 FFS_CHECKSUM=0\
+ BINFILE=$** FFSFILE=$@ COMPRESS=0 NAME=ReserveBootGuardSigningServer
+
+AFTER_FV:
+FV_DATA_DESCRIPTOR=FV(\
+ name=FV_DATA, address=$(FV_DATA_BASE),\
+ offset=$(FV_DATA_BASE)-$(FLASH_BASE),\
+ size=$(FV_DATA_SIZE), file_list=$(FV_DATA),\
+ attr=$(FV_DATA_ATTR),\
+)
+
+FIT_UCODE_FIXUP:
+!IF "$(INTEL_BOOT_GUARD_SUPPORT)"=="1"
+ if not exist $(BOOT_GUARD_BPM_PRIVATE_KEY_FILENAME) $(FIT_DIR)\keygen.exe $(BOOT_GUARD_BPM_PRIVATE_KEY_FILENAME) $(BOOT_GUARD_BPM_PUBLIC_KEY_FILENAME) $(BOOT_GUARD_PBULIC_KEY_EXPONENT)
+ if not exist $(BOOT_GUARD_KM_PRIVATE_KEY_FILENAME) $(FIT_DIR)\keygen.exe $(BOOT_GUARD_KM_PRIVATE_KEY_FILENAME) $(BOOT_GUARD_KM_PUBLIC_KEY_FILENAME) $(BOOT_GUARD_PBULIC_KEY_EXPONENT)
+ if exist $(BOOT_GUARD_BPM_PUBLIC_KEY_FILENAME) del $(BOOT_GUARD_BPM_PUBLIC_KEY_FILENAME)
+ if exist $(BOOT_GUARD_KM_PUBLIC_KEY_FILENAME) del $(BOOT_GUARD_KM_PUBLIC_KEY_FILENAME)
+!ENDIF
+ $(FIT_DIR)\FITUtil.exe $(AMI_ROM) $(FITEntryPointToOtherFVBBRomAddress)
+!IF "$(INTEL_BOOT_GUARD_SUPPORT)"=="1"
+
+!IF "$(INTEL_BOOT_GUARD_CHAIN_OF_TRUST_SUPPORT)"=="1"
+ $(FIT_DIR)\BpmKmGen.exe -PFVMAIN $(AMI_ROM) $(FIT_DIR) $(BIOS_STARTING_ADDRESS) $(DXE_SEGMENT_BASE) $(DXE_SEGMENT_SIZE)
+!ENDIF
+
+!IF "$(INTEL_BOOT_GUARD_SIGNING_SERVER_SUPPROT)"=="1"
+ $(FIT_DIR)\BpmKmGen.exe -SDATA $(AMI_ROM) $(BootGuardTokens)
+ $(FIT_DIR)\BpmKmGen.exe -SBPMKM $(AMI_ROM) $(FIT_DIR) $(BOOT_GUARD_BPM_PRIVATE_KEY_FILENAME) $(BOOT_GUARD_KM_PRIVATE_KEY_FILENAME)
+!ELSE
+ $(FIT_DIR)\BpmKmGen.exe -PBPMKM $(AMI_ROM) $(FIT_DIR) $(BOOT_GUARD_BPM_PRIVATE_KEY_FILENAME) $(BOOT_GUARD_KM_PRIVATE_KEY_FILENAME) $(BootGuardTokens)
+!ENDIF
+
+!ENDIF
+
+AFTER_ROM: FIT_UCODE_FIXUP
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1987-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30071 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/FIT/Fit.sdl b/Board/EM/FIT/Fit.sdl
new file mode 100644
index 0000000..7b5c226
--- /dev/null
+++ b/Board/EM/FIT/Fit.sdl
@@ -0,0 +1,390 @@
+TOKEN
+ Name = "INTEL_FIT_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable Intel FIT in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "INTEL_BOOT_GUARD_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable Intel Boot Guard in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "ULT_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "INTEL_BOOT_GUARD_CHAIN_OF_TRUST_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable Intel Boot Guard Chain of Trust in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "INTEL_BOOT_GUARD_SIGNING_SERVER_SUPPROT"
+ Value = "1"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "INTEL_FIT_TABLE_ADDRESS"
+ Help = "The address must be 0xFFFFFFFF. It will be updated by the FITUtil.exe"
+ Value = "0xFFFFFFFF"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+ELINK
+ Name = "FV_DATA"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(FV_DATA_DESCRIPTOR)"
+ Parent = "ROM_IMAGE"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\FitTable.ffs"
+ Parent = "FV_DATA"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\BootGuardBpmBinary.ffs"
+ Parent = "FV_DATA"
+ InvokeOrder = AfterParent
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BootGuardBpmBinary"
+ Value = "ReserveBpmTable.bin"
+ TokenType = File
+ TargetMAK = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\BootGuardKmBinary.ffs"
+ Parent = "FV_DATA"
+ InvokeOrder = AfterParent
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BootGuardKmBinary"
+ Value = "ReserveKmTable.bin"
+ TokenType = File
+ TargetMAK = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\BootGuardAcmBinary.ffs"
+ Parent = "FV_DATA"
+ InvokeOrder = AfterParent
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BOOT_GUARD_ACM"
+ Value = "2"
+ Help = "MUST use the correct ACM binary for the matching CPUs, else platform will not behave as expected. Pre-ES and ES CPU set the token to 0, Pre-QS and QS CPU set the token to 1 and PV ME FW set the token to 2"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BootGuardAcmBinary"
+ Value = "Boot_Guard_ACM_Rev1_1_PC_ES.bin"
+ Help = "The ACM is for Pre-ES and ES CPU samples ONLY!"
+ TokenType = File
+ TargetMAK = Yes
+ Token = "BOOT_GUARD_ACM" "=" "0"
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BootGuardAcmBinary"
+ Value = "Boot_Guard_ACM_Rev1_2_PC_QS.bin"
+ Help = "The ACM is for Pre-QS and QS or newer CPU samples ONLY! NOTE: PC_QS is only for development platform."
+ TokenType = File
+ TargetMAK = Yes
+ Token = "BOOT_GUARD_ACM" "=" "1"
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BootGuardAcmBinary"
+ Value = "Boot_Guard_ACM_Rev1_2_PV_QS.bin"
+ Help = "PV Image should be used with PV ME FW. The ACM is for Pre-QS and QS or newer CPU samples ONLY!"
+ TokenType = File
+ TargetMAK = Yes
+ Token = "BOOT_GUARD_ACM" "=" "2"
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "ACMSVN"
+ Value = "0"
+ Help = "ACMSVN:0 for ES binaries"
+ TokenType = File
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "BOOT_GUARD_ACM" "=" "0"
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "ACMSVN"
+ Value = "0"
+ Help = "ACMSVN:0 for PC_QS binaries"
+ TokenType = File
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "BOOT_GUARD_ACM" "=" "1"
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "ACMSVN"
+ Value = "3"
+ Help = "ACMSVN:3 for PV_QS binary"
+ TokenType = File
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "BOOT_GUARD_ACM" "=" "2"
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BOOT_GUARD_BPM_PRIVATE_KEY_FILENAME"
+ Value = "$(FIT_DIR)\BpmPrivate.key"
+ TokenType = File
+ TargetMAK = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BOOT_GUARD_BPM_PUBLIC_KEY_FILENAME"
+ Value = "$(FIT_DIR)\BpmPublic.key"
+ TokenType = File
+ TargetMAK = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BOOT_GUARD_KM_PRIVATE_KEY_FILENAME"
+ Value = "$(FIT_DIR)\KmPrivate.key"
+ TokenType = File
+ TargetMAK = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BOOT_GUARD_KM_PUBLIC_KEY_FILENAME"
+ Value = "$(FIT_DIR)\KmPublic.key"
+ TokenType = File
+ TargetMAK = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BOOT_GUARD_PBULIC_KEY_EXPONENT"
+ Help = "The token for the KeyGen.exe"
+ Value = "0x10001"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BPM_IBB_MCHBAR"
+ Help = "BpmKmGen.exe only support the decimal value"
+ Value = "$(NB_MCH_BASE_ADDRESS) + 0"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BPM_VTD_BAR"
+ Help = "BpmKmGen.exe only support the decimal value"
+ Value = "$(NB_VTD_BASE_ADDRESS) + 0"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "IS_FV_DATA_ALIGNMENT64K"
+ Help = "BpmKmGen.exe only support the decimal value"
+ Value = "($(FV_DATA_BASE)&0x0000FFFF)"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BPM_IBB_SEGMENT_BASE"
+ Help = "BpmKmGen.exe only support the decimal value"
+ Value = "$(FV_BB_BASE) + 0"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BPM_IBB_SEGMENT_SIZE"
+ Help = "BpmKmGen.exe only support the decimal value"
+ Value = "$(FV_BB_BLOCKS) * $(FLASH_BLOCK_SIZE)"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "KM_KEY_MANIFEST_ID"
+ Help = "BpmKmGen.exe only support the decimal value, and this field must match the Key Manifest ID of Secure boot of FITC."
+ Value = "1"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "DXE_SEGMENT_BASE"
+ Help = "BpmKmGen.exe only support the decimal value"
+ Value = "$(FV_MAIN_BASE) + 0"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "DXE_SEGMENT_SIZE"
+ Help = "BpmKmGen.exe only support the decimal value"
+ Value = "$(FV_MAIN_BLOCKS) * $(FLASH_BLOCK_SIZE)"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BIOS_STARTING_ADDRESS"
+ Help = "Support the decimal value"
+ Value = "0xFFFFFFFF - $(FLASH_SIZE) + 1"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FITEntryPointToOtherFVBBRomAddress"
+ Help = "FitUtil.exe only support the decimal value. If you don't have other FV_BB, please set the OtherFVBBRomAddress to 0."
+ Value = "0"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FITEntryPointToOtherFVBBRomAddress"
+ Help = "FitUtil.exe only support the decimal value. If you don't have other FV_BB, please set the OtherFVBBRomAddress to 0."
+ Value = "$(FT_FV_BB_BASE) + $(FV_BB_BLOCKS) * $(FLASH_BLOCK_SIZE) - $(BIOS_STARTING_ADDRESS) - 0x40"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "FAULT_TOLERANT_BOOTBLOCK_UPDATE" "=" "1"
+End
+
+
+TOKEN
+ Name = "FV_DATA_ATTR"
+ Help = "The token is attribution of FV_DATA"
+ Value = ""
+ TokenType = File
+ TargetMAK = Yes
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "BootGuardTokens"
+ Value = "$(BPM_IBB_MCHBAR) $(BPM_VTD_BAR) $(BPM_IBB_SEGMENT_BASE) $(BPM_IBB_SEGMENT_SIZE) $(BIOS_STARTING_ADDRESS) $(KM_KEY_MANIFEST_ID) $(ACMSVN)"
+ Help = "Support the decimal value"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\ReserveBootGuardSigningServer.ffs"
+ Parent = "FV_DATA"
+ InvokeOrder = AfterParent
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+ Token = "INTEL_BOOT_GUARD_SIGNING_SERVER_SUPPROT" "=" "1"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\ReserveBootGuardFvMainHashKey.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+PATH
+ Name = "FIT_DIR"
+End
+
+MODULE
+ Help = "Includes Fit.mak to Project"
+ File = "Fit.mak"
+End
+
+ELINK
+ Name = "/D BOOT_GUARD_SUPPORT_FLAG=1"
+ Parent = "GLOBAL_DEFINES"
+ InvokeOrder = AfterParent
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
diff --git a/Board/EM/FIT/FitTable.asm b/Board/EM/FIT/FitTable.asm
new file mode 100644
index 0000000..ca45f86
--- /dev/null
+++ b/Board/EM/FIT/FitTable.asm
@@ -0,0 +1,66 @@
+include token.equ
+
+FitEntry Struct
+ TblAddress DQ 0
+ TblSIZE DD 0 ;only 3 bytes valid,
+ TblVer DW 0
+ TblType DB 0
+ TblChkSum DB 0
+FitEntry ENDS
+
+
+ifndef EFIx64
+.model small
+endif
+
+.data
+ Type0Entry FitEntry <' _TIF_', 0, 100h, 00h, 0> ; FIT type 0x00 - FIT Header Entry
+ Type1Entry FitEntry <0FFFFFFFFh, 0, 100h, 01h, 0> ; FIT type 0x01 - Microcode Update Entry
+IFDEF MKF_INTEL_BOOT_GUARD_SUPPORT
+IF MKF_INTEL_BOOT_GUARD_SUPPORT
+ Type2Entry FitEntry <0FFFFFFFFh, 0, 100h, 02h, 0> ; FIT type 0x02 - Anc ACM location
+ TypebEntry FitEntry <0FFFFFFFFh, 241h, 100h, 0Bh, 0> ; FIT Type 0x0B - Key Manifest
+ TypecEntry FitEntry <0FFFFFFFFh, 2BBh, 100h, 0Ch, 0> ; FIT type 0x0C - Boot Policy Manifest
+ENDIF
+ENDIF
+
+ ; Reserve
+ DQ 0FFFFFFFFFFFFFFFFh
+ DQ 0FFFFFFFFFFFFFFFFh
+
+ ; Reserve
+ DQ 0FFFFFFFFFFFFFFFFh
+ DQ 0FFFFFFFFFFFFFFFFh
+
+ ; Reserve
+ DQ 0FFFFFFFFFFFFFFFFh
+ DQ 0FFFFFFFFFFFFFFFFh
+
+ ; Reserve
+ DQ 0FFFFFFFFFFFFFFFFh
+ DQ 0FFFFFFFFFFFFFFFFh
+
+ ; Reserve
+ DQ 0FFFFFFFFFFFFFFFFh
+ DQ 0FFFFFFFFFFFFFFFFh
+
+ ; Reserve
+ DQ 0FFFFFFFFFFFFFFFFh
+ DQ 0FFFFFFFFFFFFFFFFh
+
+ ; Reserve
+ DQ 0FFFFFFFFFFFFFFFFh
+ DQ 0FFFFFFFFFFFFFFFFh
+
+ ; Reserve
+ DQ 0FFFFFFFFFFFFFFFFh
+ DQ 0FFFFFFFFFFFFFFFFh
+
+ ; Reserve
+ DQ 0FFFFFFFFFFFFFFFFh
+ DQ 0FFFFFFFFFFFFFFFFh
+
+ ; Reserve
+ DQ 0FFFFFFFFFFFFFFFFh
+ DQ 0FFFFFFFFFFFFFFFFh
+END
diff --git a/Board/EM/FIT/Pei/BootGuardPei.c b/Board/EM/FIT/Pei/BootGuardPei.c
new file mode 100644
index 0000000..1421634
--- /dev/null
+++ b/Board/EM/FIT/Pei/BootGuardPei.c
@@ -0,0 +1,285 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardPei.c 2 3/07/13 5:43a Bensonlai $
+//
+// $Revision: 2 $
+//
+// $Date: 3/07/13 5:43a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardPei.c $
+//
+// 2 3/07/13 5:43a Bensonlai
+// [TAG] EIP117307
+// [Category] Improvement
+// [Description] [Boot Guard] Implementation of speed up the post time
+// for Chain of Trust
+// [Files] BootGuardDxe.h, BootGuardPei.c, BootGuardPei.h,
+// BpmKmGen.exe, ReserveBootGuardFvMainHashKey.bin
+//
+// 1 2/25/13 1:15a Bensonlai
+// [TAG] EIP114386
+// [Category] Spec Update
+// [Severity] Important
+// [Description] [SBY] Ultrabook for Shark Bay Platform - : Boot Guard
+// for 4th Gen Intel Core Processor based on Mobile U-Processor Line -
+// BIOS Writer's Guide - Rev 0.8.1
+// [Files] BootGuardPei.cif
+// BootGuardPei.c
+// BootGuardPei.h
+// BootGuardPei.dxs
+// BootGuardPei.sdl
+// BootGuardPei.mak
+// PeiCryptLib.lib
+// OpensslLib.lib
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: BootGuardPei.c
+//
+// Description: Chain of trust for Pei
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#include "BootGuardPei.h"
+
+EFI_GUID ReserveBootGuardFvMainHashKeyGuid = RESERVE_BOOT_GUARD_FV_MAIN_HASH_KEY_FFS_FILE_RAW_GUID;
+
+STATIC EFI_PEI_NOTIFY_DESCRIPTOR BootGuardVerificationForPeiToDxeHandoffEndOfPeiNotifyDesc = {
+ (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gEndOfPeiSignalPpiGuid,
+ BootGuardVerificationForPeiToDxeHandoffEndOfPei
+};
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: LocateBootGuardFvMainHashKey
+//
+// Description: Loads binary from RAW section of X firwmare volume
+//
+//
+// Output: Buffer - returns a pointer to allocated memory. Caller
+// must free it when done.
+// Size - returns the size of the binary loaded into the
+// buffer.
+//
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+LocateBootGuardFvMainHashKey (
+ IN EFI_PEI_SERVICES **PpSv,
+ IN OUT VOID **Buffer
+)
+{
+ EFI_STATUS Status;
+ EFI_FIRMWARE_VOLUME_HEADER *pFV;
+ UINTN FvNum=0;
+ EFI_FFS_FILE_HEADER *ppFile=NULL;
+ BOOLEAN Found = FALSE;
+
+ Status = (*PpSv)->FfsFindNextVolume (PpSv, FvNum, &pFV);
+
+ while ( TRUE ) {
+ Status = (*PpSv)->FfsFindNextVolume( PpSv, FvNum, &pFV );
+ if ( EFI_ERROR( Status ) ) {
+ return Status;
+ }
+
+ ppFile = NULL;
+
+ while ( TRUE ) {
+ Status = (*PpSv)->FfsFindNextFile( PpSv,
+ EFI_FV_FILETYPE_FREEFORM,
+ pFV,
+ &ppFile );
+
+ if ( Status == EFI_NOT_FOUND ) {
+ break;
+ }
+
+ if (CompareGuid( &ppFile->Name, &ReserveBootGuardFvMainHashKeyGuid )) {
+ Found = TRUE;
+ break;
+ }
+ }
+
+ if ( Found ) {
+ break;
+ } else {
+ FvNum++;
+ }
+ }
+
+ Status = (*PpSv)->FfsFindSectionData( PpSv,
+ EFI_SECTION_RAW,
+ ppFile,
+ Buffer );
+
+ if ( EFI_ERROR( Status ) ) {
+ return EFI_NOT_FOUND;
+ }
+
+ return Status;
+}
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: BootGuardVerificationForPeiToDxeHandoffEndOfPei
+//
+// Description: BootGuardVerificationForPeiToDxeHandoffEndOfPei at end of Pei
+// handler.
+//
+// Output: PeiServices - Pointer to PEI Services Table.
+// NotifyDesc - Pointer to the descriptor for the Notification
+// event that caused this function to execute.
+// Ppi - Pointer to the PPI data associated with
+// this function.
+//
+//<AMI_PHDR_END>
+//**********************************************************************
+STATIC
+EFI_STATUS
+BootGuardVerificationForPeiToDxeHandoffEndOfPei (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
+ IN VOID *Ppi
+)
+{
+ EFI_STATUS Status;
+ UINTN BootGuardHashDataSize = 0, i;
+ UINT8 CurrentBootGuardFvMainHash256Val[32];
+ VOID *BootGuardSha256Context;
+ UINT8 *BootGuardOrgFvMainHash256;
+ AMI_BOOT_GUARD_HOB *AmiBootGuardHobPtr;
+ EFI_GUID AmiBootGuardHobGuid = AMI_BOOT_GUARD_HOB_GUID;
+ EFI_BOOT_MODE BootMode;
+ RESERVE_BOOT_GUARD_FV_MAIN_HASH_KEY *ReserveBootGuardFvMainHashKey;
+
+ Status = PeiServicesGetBootMode (&BootMode);
+ if ( EFI_ERROR( Status ) ) {
+ DEBUG ((EFI_D_ERROR, "[BootGuardPei.c] Get Boot Mode is fail\n"));
+ return Status;
+ }
+
+ if ( BootMode == BOOT_IN_RECOVERY_MODE ) {
+ DEBUG ((EFI_D_ERROR, "[BootGuardPei.c] In the BOOT_IN_RECOVERY_MODE\n"));
+ return Status;
+ }
+
+ if ( BootMode == BOOT_ON_S3_RESUME ) {
+ DEBUG ((EFI_D_ERROR, "[BootGuardPei.c] In the BOOT_ON_S3_RESUME\n"));
+ return Status;
+ }
+
+ Status = (*PeiServices)->CreateHob (PeiServices, EFI_HOB_TYPE_GUID_EXTENSION, sizeof (AMI_BOOT_GUARD_HOB), (VOID **) &AmiBootGuardHobPtr);
+ if ( EFI_ERROR( Status ) ) {
+ DEBUG ((EFI_D_ERROR, "[BootGuardPei.c] CreateHob is fail for AmiBootGuardHobPtr\n"));
+ return Status;
+ }
+
+ AmiBootGuardHobPtr->EfiHobGuidType.Name = AmiBootGuardHobGuid;
+ AmiBootGuardHobPtr->AmiBootGuardVerificationforPEItoDXEFlag = 0;
+ BootGuardHashDataSize = Sha256GetContextSize ();
+ Status = ((*PeiServices)->AllocatePool) (PeiServices, BootGuardHashDataSize, &BootGuardSha256Context);
+ if ( EFI_ERROR( Status ) ) {
+ DEBUG ((EFI_D_ERROR, "[BootGuardPei.c] AllocatePool is fail for BootGuardSha256Context\n"));
+ return Status;
+ }
+
+ BootGuardOrgFvMainHash256 = AllocateZeroPool (32);
+ if (BootGuardOrgFvMainHash256 == NULL) {
+ DEBUG ((EFI_D_ERROR, "[BootGuardPei.c] AllocateZeroPool is fail for BootGuardOrgFvMainHash256\n"));
+ return Status;
+ }
+
+ Status = LocateBootGuardFvMainHashKey(PeiServices , &BootGuardOrgFvMainHash256);
+ if ( EFI_ERROR( Status ) ) {
+ DEBUG ((EFI_D_ERROR, "[BootGuardPei.c] LocateBootGuardFvMainHashKey is fail\n"));
+ return Status;
+ }
+
+ ReserveBootGuardFvMainHashKey = (RESERVE_BOOT_GUARD_FV_MAIN_HASH_KEY*)BootGuardOrgFvMainHash256;
+
+ for ( i = 0; i < sizeof(ReserveBootGuardFvMainHashKey->BootGuardFvMainHashKey); i++ ) {
+ DEBUG ((EFI_D_ERROR, "[BootGuardPei.c] BootGuardOrgFvMainHash256[%x]= %x.\n", i, ReserveBootGuardFvMainHashKey->BootGuardFvMainHashKey[i]));
+ }
+ DEBUG ((EFI_D_ERROR, "\n[BootGuardPei.c] BootGuardFvMainUsedLength= %x.\n", ReserveBootGuardFvMainHashKey->BootGuardFvMainUsedLength));
+
+ Sha256Init (BootGuardSha256Context);
+ Sha256Update (BootGuardSha256Context, (UINT8 *)(DXE_SEGMENT_BASE), (UINTN)ReserveBootGuardFvMainHashKey->BootGuardFvMainUsedLength);
+ Sha256Final (BootGuardSha256Context, CurrentBootGuardFvMainHash256Val);
+
+ for ( i = 0; i < sizeof (CurrentBootGuardFvMainHash256Val); i++ ) {
+ DEBUG ((EFI_D_ERROR, "[BootGuardPei.c] CurrentBootGuardFvMainHash256Val[%x]= %x.\n", i, CurrentBootGuardFvMainHash256Val[i]));
+ }
+
+ if ( !CompareMem(BootGuardOrgFvMainHash256, CurrentBootGuardFvMainHash256Val, 32) ) {
+ AmiBootGuardHobPtr->AmiBootGuardVerificationforPEItoDXEFlag = 1;
+ } else {
+ AmiBootGuardHobPtr->AmiBootGuardVerificationforPEItoDXEFlag = 0;
+ }
+
+ DEBUG ((EFI_D_ERROR, "[BootGuardPei.c] AmiBootGuardHobPtr->AmiBootGuardVerificationforPEItoDXEFlag= %x.\n", AmiBootGuardHobPtr->AmiBootGuardVerificationforPEItoDXEFlag));
+
+ return Status;
+}
+
+EFI_STATUS
+BootGuardPeiEntryPoint (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+)
+{
+ EFI_STATUS Status;
+ PCH_SERIES PchSeries = GetPchSeries();
+
+ if ( PchSeries != PchLp ) {
+ return EFI_SUCCESS;
+ }
+
+ if ( IsBootGuardSupported() == FALSE ) {
+ return EFI_SUCCESS;
+ }
+
+ if ( (UINT32)AsmReadMsr64 (MSR_BOOT_GUARD_SACM_INFO) == 0 ) {
+ DEBUG ((EFI_D_ERROR, "[BootGuardPei.c] Boot Guard is disabled by Anchor Cove Profile Configuration in the Intel Fitc\n"));
+ return EFI_SUCCESS;
+ }
+
+ Status = PeiServicesNotifyPpi (&BootGuardVerificationForPeiToDxeHandoffEndOfPeiNotifyDesc);
+ if ( EFI_ERROR( Status ) ) {
+ return Status;
+ }
+
+ return Status;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/FIT/Pei/BootGuardPei.cif b/Board/EM/FIT/Pei/BootGuardPei.cif
new file mode 100644
index 0000000..afb57a5
--- /dev/null
+++ b/Board/EM/FIT/Pei/BootGuardPei.cif
@@ -0,0 +1,14 @@
+<component>
+ name = "BootGuardPei"
+ category = ModulePart
+ LocalRoot = "Board\EM\FIT\Pei"
+ RefName = "BootGuardPei"
+[files]
+"BootGuardPei.c"
+"BootGuardPei.h"
+"BootGuardPei.dxs"
+"BootGuardPei.sdl"
+"BootGuardPei.mak"
+"PeiCryptLib.lib"
+"OpensslLib.lib"
+<endComponent>
diff --git a/Board/EM/FIT/Pei/BootGuardPei.dxs b/Board/EM/FIT/Pei/BootGuardPei.dxs
new file mode 100644
index 0000000..920a857
--- /dev/null
+++ b/Board/EM/FIT/Pei/BootGuardPei.dxs
@@ -0,0 +1,76 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardPei.dxs 1 2/25/13 1:15a Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/25/13 1:15a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardPei.dxs $
+//
+// 1 2/25/13 1:15a Bensonlai
+// [TAG] EIP114386
+// [Category] Spec Update
+// [Severity] Important
+// [Description] [SBY] Ultrabook for Shark Bay Platform - : Boot Guard
+// for 4th Gen Intel Core Processor based on Mobile U-Processor Line -
+// BIOS Writer's Guide - Rev 0.8.1
+// [Files] BootGuardPei.cif
+// BootGuardPei.c
+// BootGuardPei.h
+// BootGuardPei.dxs
+// BootGuardPei.sdl
+// BootGuardPei.mak
+// PeiCryptLib.lib
+// OpensslLib.lib
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: BootGuardPei.dxs
+//
+// Description: BootGuardPei dependency file
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#include "AutoGen.h"
+#include "PeimDepex.h"
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+#include EFI_PPI_DEPENDENCY (Variable)
+
+#include EFI_PPI_DEPENDENCY (PchPeiInitDone)
+#endif
+
+DEPENDENCY_START
+ PEI_READ_ONLY_VARIABLE_ACCESS_PPI_GUID AND
+ PCH_PEI_INIT_DONE_PPI_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/FIT/Pei/BootGuardPei.h b/Board/EM/FIT/Pei/BootGuardPei.h
new file mode 100644
index 0000000..ca604d6
--- /dev/null
+++ b/Board/EM/FIT/Pei/BootGuardPei.h
@@ -0,0 +1,182 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardPei.h 2 3/07/13 5:43a Bensonlai $
+//
+// $Revision: 2 $
+//
+// $Date: 3/07/13 5:43a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardPei.h $
+//
+// 2 3/07/13 5:43a Bensonlai
+// [TAG] EIP117307
+// [Category] Improvement
+// [Description] [Boot Guard] Implementation of speed up the post time
+// for Chain of Trust
+// [Files] BootGuardDxe.h, BootGuardPei.c, BootGuardPei.h,
+// BpmKmGen.exe, ReserveBootGuardFvMainHashKey.bin
+//
+// 1 2/25/13 1:15a Bensonlai
+// [TAG] EIP114386
+// [Category] Spec Update
+// [Severity] Important
+// [Description] [SBY] Ultrabook for Shark Bay Platform - : Boot Guard
+// for 4th Gen Intel Core Processor based on Mobile U-Processor Line -
+// BIOS Writer's Guide - Rev 0.8.1
+// [Files] BootGuardPei.cif
+// BootGuardPei.c
+// BootGuardPei.h
+// BootGuardPei.dxs
+// BootGuardPei.sdl
+// BootGuardPei.mak
+// PeiCryptLib.lib
+// OpensslLib.lib
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: BootGuardPei.h
+//
+// Description: Header file for BootGuardPei
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#ifndef _BOOT_GUARD_PEI_H_
+#define _BOOT_GUARD_PEI_H_
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGluePeim.h"
+#include "CpuAccess.h"
+#include "PchAccess.h"
+#include "PchPlatformLib.h"
+#include "BootGuardLibrary.h"
+#include <Token.h>
+#endif
+
+#define RESERVE_BOOT_GUARD_FV_MAIN_HASH_KEY_FFS_FILE_RAW_GUID \
+ {0xcbc91f44, 0xa4bc, 0x4a5b, 0x86, 0x96, 0x70, 0x34, 0x51, 0xd0, 0xb0, 0x53}
+
+#if defined(BUILD_WITH_GLUELIB)
+#undef SetMem
+VOID *
+SetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+)
+{
+ return GlueSetMem (Buffer, Length, Value);
+}
+
+#undef CopyMem
+VOID *
+EFIAPI
+CopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+)
+{
+ return GlueCopyMem (DestinationBuffer, SourceBuffer, Length);
+}
+#endif
+
+//
+// Hash functions definitionS
+//
+UINTN
+EFIAPI
+Sha256GetContextSize (
+ VOID
+);
+
+BOOLEAN
+EFIAPI
+Sha256Init (
+ IN OUT VOID *Sha256Context
+);
+
+BOOLEAN
+EFIAPI
+Sha256Update (
+ IN OUT VOID *Sha256Context,
+ IN CONST VOID *Data,
+ IN UINTN DataLength
+);
+
+BOOLEAN
+EFIAPI
+Sha256Final (
+ IN OUT VOID *Sha256Context,
+ OUT UINT8 *HashValue
+);
+
+STATIC
+EFI_STATUS
+BootGuardVerificationForPeiToDxeHandoffEndOfPei (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
+ IN VOID *Ppi
+);
+
+//
+// GUID to AMI_BOOT_GUARD Module
+//
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#define AMI_BOOT_GUARD_HOB_GUID \
+ { \
+ 0xb60ab175, 0x498d, 0x429d, 0xad, 0xba, 0xa, 0x62, 0x2c, 0x58, 0x16, 0xe2 \
+ }
+#else
+#define AMI_BOOT_GUARD_HOB_GUID \
+ { \
+ 0xb60ab175, 0x498d, 0x429d, \
+ { \
+ 0xad, 0xba, 0xa, 0x62, 0x2c, 0x58, 0x16, 0xe2 \
+ } \
+ }
+#endif
+
+#pragma pack (1)
+
+typedef struct {
+ EFI_HOB_GUID_TYPE EfiHobGuidType;
+ UINT8 AmiBootGuardVerificationforPEItoDXEFlag;
+} AMI_BOOT_GUARD_HOB;
+
+typedef struct {
+ UINT8 BootGuardFvMainHashKey[32];
+ UINT32 BootGuardFvMainUsedLength;
+} RESERVE_BOOT_GUARD_FV_MAIN_HASH_KEY;
+
+#pragma pack ()
+
+#endif
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/FIT/Pei/BootGuardPei.mak b/Board/EM/FIT/Pei/BootGuardPei.mak
new file mode 100644
index 0000000..b1c6ca1
--- /dev/null
+++ b/Board/EM/FIT/Pei/BootGuardPei.mak
@@ -0,0 +1,119 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardPei.mak 1 2/25/13 1:15a Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 2/25/13 1:15a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardPei.mak $
+#
+# 1 2/25/13 1:15a Bensonlai
+# [TAG] EIP114386
+# [Category] Spec Update
+# [Severity] Important
+# [Description] [SBY] Ultrabook for Shark Bay Platform - : Boot Guard
+# for 4th Gen Intel Core Processor based on Mobile U-Processor Line -
+# BIOS Writer's Guide - Rev 0.8.1
+# [Files] BootGuardPei.cif
+# BootGuardPei.c
+# BootGuardPei.h
+# BootGuardPei.dxs
+# BootGuardPei.sdl
+# BootGuardPei.mak
+# PeiCryptLib.lib
+# OpensslLib.lib
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: BootGuardPei.mak
+#
+# Description: Make file for BootGuardPei
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+all : BootGuardPei
+
+BootGuardPei : $(BUILD_DIR)\BootGuardPei.mak BootGuardPeiBin
+
+$(BUILD_DIR)\BootGuardPei.mak : $(BOOT_GUARD_PEI_PATH)\BootGuardPei.cif $(BOOT_GUARD_PEI_PATH)\BootGuardPei.mak $(BUILD_RULES)
+ $(CIF2MAK) $(BOOT_GUARD_PEI_PATH)\BootGuardPei.cif $(CIF2MAK_DEFAULTS)
+
+BOOT_GUARD_PEI_INCLUDES = \
+ $(EdkIIGlueLib_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+ $(PROJECT_CPU_INCLUDES)\
+
+BOOT_GUARD_PEI_DEFINES=\
+ $(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=BootGuardPeiEntryPoint"\
+ /D __EDKII_GLUE_BASE_LIB__ \
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__\
+ /D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_PEI_SERVICES_LIB__ \
+ /D __EDKII_GLUE_PEI_MEMORY_ALLOCATION_LIB__ \
+ /D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ \
+ /D __EDKII_GLUE_PEI_HOB_LIB__ \
+
+BOOT_GUARD_PEI_LIBS = \
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+ $(EdkIIGlueBaseLibIA32_LIB)\
+ $(EdkIIGlueBasePrintLib_LIB)\
+ $(EdkIIGluePeiMemoryAllocationLib_LIB)\
+ $(EdkIIGluePeiDebugLibReportStatusCode_LIB)\
+ $(EdkIIGluePeiReportStatusCodeLib_LIB)\
+ $(EdkIIGluePeiServicesLib_LIB)\
+ $(EdkIIGlueBasePciLibPciExpress_LIB)\
+ $(EdkIIGlueBasePostCodeLibPort80_LIB)\
+ $(EDKFRAMEWORKPPILIB)\
+ $(EdkIIGluePeiHobLib_LIB)\
+ $(PchPlatformPeiLib_LIB)\
+ $(CpuPlatformLib_LIB)\
+ $(BootGuardLib_LIB)\
+
+BootGuardPeiBin: $(BOOT_GUARD_PEI_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\BootGuardPei.mak all\
+ NAME=BootGuardPei \
+ MAKEFILE=$(BUILD_DIR)\BootGuardPei.mak \
+ "MY_INCLUDES=$(BOOT_GUARD_PEI_INCLUDES)"\
+ "MY_DEFINES=$(BOOT_GUARD_PEI_DEFINES)" \
+ GUID=B41956E1-7CA2-42db-9562-168389F0F066 \
+ ENTRY_POINT=_ModuleEntryPoint "EXT_HEADERS=$(BUILD_DIR)\token.h"\
+ TYPE=PEIM \
+ EDKIIModule=PEIM\
+ DEPEX1=$(BOOT_GUARD_PEI_PATH)\BootGuardPei.dxs \
+ DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX \
+ COMPRESS=0
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/FIT/Pei/BootGuardPei.sdl b/Board/EM/FIT/Pei/BootGuardPei.sdl
new file mode 100644
index 0000000..30dd493
--- /dev/null
+++ b/Board/EM/FIT/Pei/BootGuardPei.sdl
@@ -0,0 +1,96 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardPei.sdl 2 3/06/13 2:51a Bensonlai $
+#
+# $Revision: 2 $
+#
+# $Date: 3/06/13 2:51a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardPei.sdl $
+#
+# 2 3/06/13 2:51a Bensonlai
+# [TAG] EIP116907
+# [Category] Improvement
+# [Description] BpmKmGen.exe generates KM / BPM tables and
+# BootGuardFvMainHash key separately
+# [Files] BpmKmGen.exe, Fit.sdl, Fit.mak, BootGuardPei.sdl,
+# BootGuardDxe.sdl
+#
+# 1 2/25/13 1:15a Bensonlai
+# [TAG] EIP114386
+# [Category] Spec Update
+# [Severity] Important
+# [Description] [SBY] Ultrabook for Shark Bay Platform - : Boot Guard
+# for 4th Gen Intel Core Processor based on Mobile U-Processor Line -
+# BIOS Writer's Guide - Rev 0.8.1
+# [Files] BootGuardPei.cif
+# BootGuardPei.c
+# BootGuardPei.h
+# BootGuardPei.dxs
+# BootGuardPei.sdl
+# BootGuardPei.mak
+# PeiCryptLib.lib
+# OpensslLib.lib
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: BootGuardPei.sdl
+#
+# Description: SDL file for BootGuardPei
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "BOOT_GUARD_PEI_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable BOOT_GUARD_PEI_SUPPORT in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Token = "INTEL_BOOT_GUARD_CHAIN_OF_TRUST_SUPPORT" "=" "1"
+End
+
+MODULE
+ Help = "Includes BootGuardPei.mak to Project"
+ File = "BootGuardPei.mak"
+End
+
+PATH
+ Name = "BOOT_GUARD_PEI_PATH"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\BootGuardPei.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+End
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.c b/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.c
new file mode 100644
index 0000000..5959528
--- /dev/null
+++ b/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.c
@@ -0,0 +1,469 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.c 3 9/06/13 6:10a Bensonlai $
+//
+// $Revision: 3 $
+//
+// $Date: 9/06/13 6:10a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.c $
+//
+// 3 9/06/13 6:10a Bensonlai
+// [TAG] EIP135513
+// [Category] Improvement
+// [Description] Support the TPM1.2 for WHCK test
+//
+// 2 7/25/13 11:02p Bensonlai
+// [TAG] EIP130647
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] Detail PCR is incorrect for Boot Guard.
+// [RootCause] Coding error.
+//
+// 1 6/04/13 5:15a Bensonlai
+// [TAG] EIP125148
+// [Category] Spec Update
+// [Severity] Normal
+// [Description] [SBY ULT] Boot Guard for 4th Gen Intel Core Processor
+// based on Mobile U-Processor Line - BIOS Writer's Guide - Rev 1.0
+// [Files] BootGuardTPMPei.cif
+// BootGuardTPMPei.c
+// BootGuardTPMPei.h
+// BootGuardTPMPei.sdl
+// BootGuardTPMPei.mak
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: BootGuardTPMPei.c
+//
+// Description: TPM Initialization Flow for Boot Guard
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include <Efi.h>
+#include <Pei.h>
+#include <TcgCommon.h>
+#include <AmiPeiLib.h>
+#include <TcgMisc.h>
+#include "PPI\TcgService\TcgTcmService.h"
+#include "PPI\TcgService\TcgService.h"
+#include "PPI\TpmDevice\TpmDevice.h"
+#include "PPI\CpuIo.h"
+#include "PPI\LoadFile.h"
+#include <Ppi\ReadOnlyVariable.h>
+#include "AmiTcgPlatformPei.h"
+#include "TcgPlatformSetupPeiPolicy.h"
+#include <Token.h>
+#include "CpuRegs.h"
+#include <AmiCspLibInc.h>
+#include "BootGuardTPMPei.h"
+
+static
+EFI_STATUS
+__stdcall __FillCallbackContext(
+ IN EFI_PEI_SERVICES **PeiService,
+ OUT TCG_PEI_CALLBACK_CONTEXT *CallbackContext )
+{
+ EFI_GUID _gPeiTpmPpiGuid = PEI_TPM_PPI_GUID;
+ CallbackContext->PeiServices = PeiService;
+ return (*PeiService)->LocatePpi(
+ PeiService,
+ &_gPeiTpmPpiGuid,
+ 0,
+ NULL,
+ &CallbackContext->TpmDevice
+ );
+}
+
+#define TCGPASSTHROUGH( cb, in, out ) \
+ TcgCommonPassThrough( \
+ cb, \
+ sizeof (in) / sizeof (*(in)), \
+ (in), \
+ sizeof (out) / sizeof (*(out)), \
+ (out) \
+ )
+
+EFI_STATUS TcgCommonSha1Complete(
+ IN VOID *CallbackContext,
+ IN VOID *Data,
+ IN UINT32 DataLen,
+ OUT TCG_DIGEST *Digest )
+{
+ TPM_1_2_CMD_SHA1COMPLETE cmdSHA1Complete;
+ TPM_1_2_RET_HEADER retSHA1Complete;
+ TPM_TRANSMIT_BUFFER InBuffer[2], OutBuffer[2];
+
+ if ( DataLen >= 64 )
+ {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ cmdSHA1Complete.Header.Tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ cmdSHA1Complete.Header.ParamSize = TPM_H2NL(sizeof(cmdSHA1Complete) + DataLen);
+ cmdSHA1Complete.Header.Ordinal = TPM_H2NL( TPM_ORD_SHA1Complete );
+
+// if(AutoSupportType()){
+// cmdSHA1Complete.Header.Ordinal = TPM_H2NL(TCM_ORD_SHA1Complete);
+// }
+
+ cmdSHA1Complete.NumBytes = TPM_H2NL( DataLen );
+
+ InBuffer[0].Buffer = &cmdSHA1Complete;
+ InBuffer[0].Size = sizeof (cmdSHA1Complete);
+ InBuffer[1].Buffer = Data;
+ InBuffer[1].Size = DataLen;
+
+ OutBuffer[0].Buffer = &retSHA1Complete;
+ OutBuffer[0].Size = sizeof (retSHA1Complete);
+ OutBuffer[1].Buffer = Digest;
+ OutBuffer[1].Size = sizeof (*Digest);
+
+ return TCGPASSTHROUGH( CallbackContext, InBuffer, OutBuffer );
+}
+
+EFI_STATUS
+SHA1HashFunc (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN UINT8 *HashData,
+ IN UINT32 HashDataLen,
+ OUT TCG_DIGEST *Digest
+)
+{
+ EFI_STATUS Status;
+ UINT32 Sha1MaxBytes;
+ TCG_PEI_CALLBACK_CONTEXT Context;
+
+ Status = __FillCallbackContext( PeiServices, &Context );
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+ Status = Context.TpmDevice->Init( Context.TpmDevice, PeiServices );
+
+ if ( EFI_ERROR( Status )) {
+ goto Exit;
+ }
+
+ Status = TcgCommonSha1Start( &Context, TCG_ALG_SHA, &Sha1MaxBytes );
+
+ if ( EFI_ERROR( Status )) {
+ goto Exit;
+ }
+
+ Status = TcgCommonSha1Update(
+ &Context,
+ HashData,
+ HashDataLen,
+ Sha1MaxBytes
+ );
+
+ if ( EFI_ERROR( Status )) {
+ goto Exit;
+ }
+
+ HashData += (HashDataLen & ~63);
+ HashDataLen &= 63;
+
+ Status = TcgCommonSha1Complete(
+ &Context,
+ (UINT8 *)HashData,
+ (UINT32)HashDataLen,
+ Digest
+ );
+
+ if ( EFI_ERROR( Status )) {
+ goto Exit;
+ }
+
+Exit:
+ Context.TpmDevice->Close( Context.TpmDevice, PeiServices );
+ return Status;
+}
+
+EFI_STATUS ACM_PostSuccess(
+ IN EFI_PEI_SERVICES **PeiServices
+)
+{
+ UINT32 MsrValue;
+
+ MsrValue = (UINT32) ReadMsr (MSR_BOOT_GUARD_SACM_INFO);
+ if ( ((MsrValue & B_NEM_INIT) == B_NEM_INIT) &&
+ ((MsrValue & B_MEASURED) == B_MEASURED) &&
+ (((MsrValue & V_TPM_PRESENT_DTPM_12) == V_TPM_PRESENT_DTPM_12) || ((MsrValue & V_TPM_PRESENT_DTPM_20) == V_TPM_PRESENT_DTPM_20)) &&
+ ((MsrValue & B_TPM_SUCCESS) == B_TPM_SUCCESS) ) {
+ PEI_TRACE((-1, PeiServices, "[BootGuardTPMPei.c] : ACM_PostSuccess : EFI_SUCCESS\n"));
+ return EFI_SUCCESS;
+ }
+
+ PEI_TRACE((-1, PeiServices, "[BootGuardTPMPei.c] : ACM_PostSuccess : EFI_UNSUPPORTED\n"));
+ return EFI_UNSUPPORTED;
+}
+
+EFI_STATUS LogDetailPCREvent(
+ IN EFI_PEI_SERVICES **PeiServices
+)
+{
+ UINT8 FoundACM, FoundKM, FoundBPM;
+ UINT32 u32HashLen = 0;
+ EFI_TCG_PCR_EVENT TcgEvent;
+ UINT32 EventNum, FitEntryPointer, FitEntryNumber, i;
+ UINTN Len;
+ CHAR8 DetailPCRStr[] = "Boot Guard Measured S-CRTM";
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCG_PPI *TcgPpi = NULL;
+ EFI_STATUS Status;
+ BOOT_POLICY *BP;
+ FIT_ENTRY *FitEntry;
+ KEY_MANIFEST_STRAUCTURE *KmStructure;
+ BpmStruct *BpmStructure;
+
+ Len = sizeof(DetailPCRStr) < sizeof(EFI_GUID) ? sizeof(DetailPCRStr) : sizeof(EFI_GUID);
+
+ TcgEvent.Header.PCRIndex = 0;
+ TcgEvent.Header.EventType = EV_S_CRTM_VERSION;
+ TcgEvent.Header.EventDataSize = Len;
+
+ PEI_TRACE((-1, PeiServices, "[BootGuardTPMPei.c] Starting 1"));
+
+ MemCpy(
+ &TcgEvent.Event.SCrtmVersion,
+ DetailPCRStr,
+ Len
+ );
+
+ Status = LocateTcgPpi(PeiServices,&TpmPpi, &TcgPpi);
+ if(EFI_ERROR(Status))return EFI_NOT_FOUND;
+
+ // On page 44.
+ // The pHashData must be the format .
+ // SHA-1 {
+ // 1) One byte containing the lower 8 bit of the BP.RSTR
+ // 2) One byte contain the lower 8 bits of BP.TYPE
+ // ....
+ // 7) Digest of Hashed IBB Segments(s)
+
+ Status = (*PeiServices)->AllocatePool(PeiServices, sizeof (BOOT_POLICY),&BP);
+ if ( EFI_ERROR( Status ) ) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ BP->RSTR0 = (ReadMsr (MSR_BOOT_GUARD_SACM_INFO) & BIT4) ? 1 : 0;
+ BP->RSTR1 = (MmioRead32 (ACM_STATUS) & BIT21) ? 1 : 0;
+ BP->RSTR2 = (MmioRead32 (ACM_STATUS) & BIT22) ? 1 : 0;
+ BP->RSTR3 = (MmioRead32 (ACM_STATUS) & BIT23) ? 1 : 0;
+ BP->RSTR4 = (MmioRead32 (ACM_STATUS) & BIT24) ? 1 : 0;
+ BP->RSTR5 = 0;
+ BP->RSTR6 = 0;
+ BP->RSTR7 = 0;
+
+ BP->TYPE0 = (ReadMsr (MSR_BOOT_GUARD_SACM_INFO) & BIT5) ? 1 : 0;
+ BP->TYPE1 = (ReadMsr (MSR_BOOT_GUARD_SACM_INFO) & BIT6) ? 1 : 0;
+ BP->TYPE2 = (MmioRead32 (ACM_STATUS) & BIT20) ? 1 : 0;
+ BP->TYPE3 = 0;
+ BP->TYPE4 = 0;
+ BP->TYPE5 = 0;
+ BP->TYPE6 = 0;
+ BP->TYPE7 = 0;
+
+ BP->ACM_SVN = ACMSVN;
+ {
+ FitEntryPointer = MmioRead32(IBB_ENTRYPOINT_M);
+ if ( FitEntryPointer == 0xFFFFFFFF ) {
+ PEI_TRACE((-1, PeiServices, "[BootGuardTPMPei.c] : FitEntryPointer(%lx) is empty\n", FitEntryPointer));
+ ASSERT_PEI_ERROR( PeiServices, EFI_NOT_READY );
+ }
+
+ FitEntry = (FIT_ENTRY*)FitEntryPointer;
+ if ( FitEntry->TblAddress != EFI_SIGNATURE_64 ('_', 'F', 'I', 'T', '_', ' ', ' ', ' ') ) {
+ PEI_TRACE((-1, PeiServices, "[BootGuardTPMPei.c] : [Type 0] FitEntry->TblAddress(%lx) is error\n", FitEntry->TblAddress));
+ ASSERT_PEI_ERROR( PeiServices, EFI_NOT_READY );
+ }
+
+ FitEntryNumber = FitEntry->TblSIZE;
+
+ FoundACM = 0;
+ for(i=1; i<FitEntryNumber; i++) {
+ FitEntry = (FIT_ENTRY*)(FitEntryPointer + i*16);
+ PEI_TRACE((-1, PeiServices, "[BootGuardTPMPei.c] : FitEntry->TblType = %x\n", FitEntry->TblType));
+ if ( FitEntry->TblType == 0x02 ) { // FIT type 0x02 - Anc ACM location
+ FoundACM =1;
+ break;
+ }
+ }
+
+ if ( FoundACM == 0 ) {
+ PEI_TRACE((-1, PeiServices, "[BootGuardTPMPei.c] : Can't find the Boot Guard ACM"));
+ ASSERT_PEI_ERROR( PeiServices, EFI_NOT_READY );
+ }
+
+ PEI_TRACE((-1, PeiServices, "BP->ACM_Signature \n"));
+
+ for ( i=0; i<256; i++ ) {
+ if (i % 16 == 0) PEI_TRACE((-1, PeiServices, "\n"));
+ BP->ACM_Signature[i] = MmioRead8( FitEntry->TblAddress + 0x184 + i );
+ PEI_TRACE((-1, PeiServices, "%02x ", BP->ACM_Signature[i]));
+ }
+
+ FoundKM = 0;
+ for(i=1; i<FitEntryNumber; i++) {
+ FitEntry = (FIT_ENTRY*)(FitEntryPointer + i*16);
+ PEI_TRACE((-1, PeiServices, "[BootGuardTPMPei.c] : FitEntry->TblType = %x\n", FitEntry->TblType));
+ if ( FitEntry->TblType == 0x0B ) { // FIT Type 0x0B - Key Manifest
+ FoundKM =1;
+ break;
+ }
+ }
+
+ if ( FoundKM == 0 ) {
+ PEI_TRACE((-1, PeiServices, "[BootGuardTPMPei.c] : Can't find the Boot Guard KM"));
+ ASSERT_PEI_ERROR( PeiServices, EFI_NOT_READY );
+ }
+
+ KmStructure = (KEY_MANIFEST_STRAUCTURE*)FitEntry->TblAddress;
+ PEI_TRACE((-1, PeiServices, "\nKmStructure:\n"));
+
+ for ( i=0; i<256; i++ ) {
+ if (i % 16 == 0) PEI_TRACE((-1, PeiServices, "\n"));
+ BP->Key_Manifest_Signature[i] = KmStructure->KeyManifestSignature.Signature.Signature[i];
+ PEI_TRACE((-1, PeiServices, "%02x ", BP->Key_Manifest_Signature[i]));
+ }
+
+ FoundBPM = 0;
+ for(i=1; i<FitEntryNumber; i++) {
+ FitEntry = (FIT_ENTRY*)(FitEntryPointer + i*16);
+ PEI_TRACE((-1, PeiServices, "[BootGuardTPMPei.c] : FitEntry->TblType = %x\n", FitEntry->TblType));
+ if ( FitEntry->TblType == 0x0C ) { // FIT type 0x0C - Boot Policy Manifest
+ FoundBPM =1;
+ break;
+ }
+ }
+
+ if ( FoundBPM == 0 ) {
+ PEI_TRACE((-1, PeiServices, "[BootGuardTPMPei.c] : Can't find the Boot Guard BPM"));
+ ASSERT_PEI_ERROR( PeiServices, EFI_NOT_READY );
+ }
+
+ BpmStructure = (BpmStruct*)FitEntry->TblAddress;
+ PEI_TRACE((-1, PeiServices, "\nBpmStructure:\n"));
+
+ for ( i=0; i<256; i++ ) {
+ if (i % 16 == 0) PEI_TRACE((-1, PeiServices, "\n"));
+ BP->Boot_Policy_Manifest_Signature[i] = BpmStructure->Bpm_Signature_Element.KeySignature.Signature.Signature[i];
+ PEI_TRACE((-1, PeiServices, "%02x ", BP->Boot_Policy_Manifest_Signature[i]));
+ }
+
+ PEI_TRACE((-1, PeiServices, "\n\nBpmStructure->Digest_of_Hashed_IBB_Segment:\n\n"));
+
+ for ( i=0; i<32; i++ ) {
+ if (i % 16 == 0) PEI_TRACE((-1, PeiServices, "\n"));
+ BP->Digest_of_Hashed_IBB_Segment[i] = BpmStructure->Ibb_Element.Digest.HashBuffer[i];
+ PEI_TRACE((-1, PeiServices, "%02x ", BP->Digest_of_Hashed_IBB_Segment[i]));
+ }
+
+ PEI_TRACE((-1, PeiServices, "\n"));
+ }
+
+ SHA1HashFunc( PeiServices, (UINT8*)BP, u32HashLen, &TcgEvent.Header.Digest );
+
+ Status = TcgPpi->TCGLogEvent(TcgPpi, PeiServices, (TCG_PCR_EVENT*)&TcgEvent, &EventNum);
+
+ return Status;
+}
+
+/*
+EFI_STATUS LogAuthorityPCREvent(
+ IN EFI_PEI_SERVICES **PeiServices
+)
+{
+ UINT8* pHashData = NULL;
+ UINT32 u32HashLen = 0;
+
+ EFI_TCG_PCR_EVENT TcgEvent;
+ UINT32 EventNum;
+ UINTN Len;
+ CHAR16 AuthorityPCRStr[] = L"Boot Guard Measured S-CRTM";
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCG_PPI *TcgPpi = NULL;
+ EFI_STATUS Status;
+
+ Len = sizeof(AuthorityPCRStr) < sizeof(EFI_GUID) ? sizeof(AuthorityPCRStr) : sizeof(EFI_GUID);
+
+ TcgEvent.Header.PCRIndex = 6;
+ TcgEvent.Header.EventType = EV_EFI_VARIABLE_DRIVER_CONFIG;
+ TcgEvent.Header.EventDataSize = Len;
+
+ MemCpy(
+ &TcgEvent.Event.SCrtmVersion,
+ AuthorityPCRStr,
+ Len
+ );
+
+ Status = LocateTcgPpi(PeiServices,&TpmPpi, &TcgPpi);
+ if(EFI_ERROR(Status))return EFI_NOT_FOUND;
+
+ // On page 45~46.
+ // The pHashData must be the format .
+ // SHA-1 {
+ // 1) One byte containing the lower 8 bit of the BP.RSTR
+ // 2) One byte contain the lower 8 bits of BP.TYPE
+ // ....
+ // 7) One byte indicating status of verified boot.
+
+// SHA1HashFunc( PeiServices, pHashData, u32HashLen, &TcgEvent.Header.Digest );
+
+ Status = TcgPpi->TCGLogEvent(TcgPpi, PeiServices, (TCG_PCR_EVENT*)&TcgEvent, &EventNum);
+ return Status;
+}
+*/
+
+EFI_STATUS
+BootGuardMeasureCRTMVersion(
+ IN EFI_PEI_SERVICES **PeiServices )
+{
+ EFI_STATUS Status;
+ PEI_TRACE((-1, PeiServices, "[BootGuardTPMPei.c] Start of BootGuardMeasureCRTMVersion\n"));
+
+ Status = ACM_PostSuccess( PeiServices );
+ if( !EFI_ERROR(Status) )
+ {
+ PEI_TRACE((-1, PeiServices, "[BootGuardTPMPei.c] Start the LogDetailPCREvent\n"));
+ Status = LogDetailPCREvent( PeiServices );
+ ASSERT_PEI_ERROR( PeiServices, Status );
+// Status = LogAuthorityPCREvent( PeiServices );
+// ASSERT_PEI_ERROR( PeiServices, Status );
+ }
+
+ PEI_TRACE((-1, PeiServices, "[BootGuardTPMPei.c] End of BootGuardMeasureCRTMVersion\n"));
+
+ return MeasureCRTMVersion( PeiServices );
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.cif b/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.cif
new file mode 100644
index 0000000..91cf398
--- /dev/null
+++ b/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "BootGuardTPMPei"
+ category = ModulePart
+ LocalRoot = "Board\EM\FIT\Pei\BootGuardTPMPei"
+ RefName = "BootGuardTPMPei"
+[files]
+"BootGuardTPMPei.c"
+"BootGuardTPMPei.h"
+"BootGuardTPMPei.sdl"
+"BootGuardTPMPei.mak"
+<endComponent>
diff --git a/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.h b/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.h
new file mode 100644
index 0000000..5d03aa0
--- /dev/null
+++ b/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.h
@@ -0,0 +1,242 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.h 2 7/25/13 11:03p Bensonlai $
+//
+// $Revision: 2 $
+//
+// $Date: 7/25/13 11:03p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.h $
+//
+// 2 7/25/13 11:03p Bensonlai
+// [TAG] EIP130647
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] Detail PCR is incorrect for Boot Guard.
+// [RootCause] Coding error.
+//
+// 1 6/04/13 5:15a Bensonlai
+// [TAG] EIP125148
+// [Category] Spec Update
+// [Severity] Normal
+// [Description] [SBY ULT] Boot Guard for 4th Gen Intel Core Processor
+// based on Mobile U-Processor Line - BIOS Writer's Guide - Rev 1.0
+// [Files] BootGuardTPMPei.cif
+// BootGuardTPMPei.c
+// BootGuardTPMPei.h
+// BootGuardTPMPei.sdl
+// BootGuardTPMPei.mak
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: BootGuardTPMPei.c
+//
+// Description: TPM Initialization Flow for Boot Guard
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifndef _BOOT_GUARD_TPM_PEI_H_
+#define _BOOT_GUARD_TPM_PEI_H_
+
+//
+// Define macros to build data structure signatures from characters.
+//
+#define EFI_SIGNATURE_16(A, B) ((A) | (B << 8))
+#define EFI_SIGNATURE_32(A, B, C, D) (EFI_SIGNATURE_16 (A, B) | (EFI_SIGNATURE_16 (C, D) << 16))
+#define EFI_SIGNATURE_64(A, B, C, D, E, F, G, H) \
+ (EFI_SIGNATURE_32 (A, B, C, D) | ((UINT64) (EFI_SIGNATURE_32 (E, F, G, H)) << 32))
+
+#define IBB_ENTRYPOINT_M 0xFFFFFFC0
+#define ACM_STATUS 0xFED30328
+
+// The LocateTcgPPi(...) entry is call the AmiTcgPlatformPeiLib.obj
+EFI_STATUS LocateTcgPpi(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_TPM_PPI **gTpmDevicePpi,
+ IN PEI_TCG_PPI **gTcgPpi
+);
+
+#pragma pack(1)
+typedef struct _TCG_PEI_CALLBACK_CONTEXT
+{
+ PEI_TPM_PPI *TpmDevice;
+ EFI_PEI_SERVICES **PeiServices;
+} TCG_PEI_CALLBACK_CONTEXT;
+
+typedef struct _BOOT_POLICY
+{
+ UINT8 RSTR0:1;
+ UINT8 RSTR1:1;
+ UINT8 RSTR2:1;
+ UINT8 RSTR3:1;
+ UINT8 RSTR4:1;
+ UINT8 RSTR5:1;
+ UINT8 RSTR6:1;
+ UINT8 RSTR7:1;
+ UINT8 TYPE0:1;
+ UINT8 TYPE1:1;
+ UINT8 TYPE2:1;
+ UINT8 TYPE3:1;
+ UINT8 TYPE4:1;
+ UINT8 TYPE5:1;
+ UINT8 TYPE6:1;
+ UINT8 TYPE7:1;
+ UINT16 ACM_SVN;
+ UINT8 ACM_Signature[256];
+ UINT8 Key_Manifest_Signature[256];
+ UINT8 Boot_Policy_Manifest_Signature[256];
+ UINT8 Digest_of_Hashed_IBB_Segment[32];
+} BOOT_POLICY;
+
+typedef struct _FIT_ENTRY
+{
+ UINT64 TblAddress;
+ UINT32 TblSIZE;
+ UINT16 TblVer;
+ UINT8 TblType;
+ UINT8 TblChkSum;
+} FIT_ENTRY;
+
+//
+// Manifest definition
+//
+#define TPM_ALG_SHA1 0x4
+#define TPM_ALG_SHA256 0xB
+#define SHA1_DIGEST_SIZE 20
+#define SHA256_DIGEST_SIZE 32
+
+typedef struct {
+ UINT16 HashAlg;
+ UINT16 Size;
+ UINT8 HashBuffer[SHA256_DIGEST_SIZE];
+} HASH_STRUCTURE;
+
+#define RSA_PUBLIC_KEY_STRUCT_KEY_SIZE_DEFAULT 2048
+#define RSA_PUBLIC_KEY_STRUCT_KEY_LEN_DEFAULT (RSA_PUBLIC_KEY_STRUCT_KEY_SIZE_DEFAULT/8)
+#define RSA_PUBLIC_KEY_STRUCT_KEY_EXPONENT_DEFAULT 0x10001 // NOT 0x10001
+typedef struct {
+ UINT8 Version;
+ UINT16 KeySize;
+ UINT32 Exponent;
+ UINT8 Modulus[RSA_PUBLIC_KEY_STRUCT_KEY_LEN_DEFAULT];
+} RSA_PUBLIC_KEY_STRUCT;
+
+#define RSASSA_SIGNATURE_STRUCT_KEY_SIZE_DEFAULT 2048
+#define RSASSA_SIGNATURE_STRUCT_KEY_LEN_DEFAULT (RSASSA_SIGNATURE_STRUCT_KEY_SIZE_DEFAULT/8)
+typedef struct {
+ UINT8 Version;
+ UINT16 KeySize;
+ UINT16 HashAlg;
+ UINT8 Signature[RSASSA_SIGNATURE_STRUCT_KEY_LEN_DEFAULT];
+} RSASSA_SIGNATURE_STRUCT;
+
+typedef struct {
+ UINT8 Version;
+ UINT16 KeyAlg;
+ RSA_PUBLIC_KEY_STRUCT Key;
+ UINT16 SigScheme;
+ RSASSA_SIGNATURE_STRUCT Signature;
+} KEY_SIGNATURE_STRUCT;
+
+typedef struct {
+ UINT8 StructureID[8];
+ UINT8 StructVersion;
+ UINT8 HdrStructVersion;
+ UINT8 PMBPMVersion;
+ UINT8 BPSVN_BPM;
+ UINT8 ACMSVN_BPM;
+ UINT8 Reserved;
+ UINT16 NEMDataStack;
+} BOOT_POLICY_MANIFEST_HEADER;
+
+typedef struct {
+ UINT16 Reserved;
+ UINT16 Flags;
+ UINT32 Base;
+ UINT32 Size;
+} IBB_SEGMENT_ELEMENT;
+
+typedef struct {
+ UINT8 StructureID[8];
+ UINT8 StructVersion;
+ UINT8 SetNumber;
+ UINT8 Reserved;
+ UINT8 PBETValue;
+ UINT32 Flags;
+ UINT64 IBB_MCHBAR;
+ UINT64 VTD_BAR;
+ UINT32 PMRL_Base;
+ UINT32 PMRL_Limit;
+ UINT64 PMRH_Base;
+ UINT64 PMRH_Limit;
+ HASH_STRUCTURE PostIbbHash;
+ UINT32 EntryPoint;
+ HASH_STRUCTURE Digest;
+ UINT8 SegmentCount; // 1 ~ 8
+ IBB_SEGMENT_ELEMENT IBBSegment[1];
+} IBB_ELEMENT;
+
+typedef struct {
+ UINT8 StructureID[8];
+ UINT8 StructVersion;
+ UINT16 PMDataSize;
+//UINT8 PMData[PMDataSize];
+} PLATFORM_MANUFACTURER_ELEMENT;
+
+typedef struct {
+ UINT8 StructureID[8];
+ UINT8 StructVersion;
+ KEY_SIGNATURE_STRUCT KeySignature;
+} BOOT_POLICY_MANIFEST_SIGNATURE_ELEMENT;
+
+typedef struct {
+ BOOT_POLICY_MANIFEST_HEADER Bpm_Header;
+ IBB_ELEMENT Ibb_Element;
+ //PLATFORM_MANUFACTURER_ELEMENT Platform_Manufacture_Element;
+ BOOT_POLICY_MANIFEST_SIGNATURE_ELEMENT Bpm_Signature_Element;
+} BpmStruct;
+
+typedef struct {
+ UINT8 StructureID[8];
+ UINT8 StructVersion;
+ UINT8 KeyManifestVersion;
+ UINT8 KMSVN;
+ UINT8 KeyManifestID;
+ HASH_STRUCTURE BPKey;
+ KEY_SIGNATURE_STRUCT KeyManifestSignature;
+} KEY_MANIFEST_STRAUCTURE;
+
+#pragma pack()
+
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.mak b/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.mak
new file mode 100644
index 0000000..0967d28
--- /dev/null
+++ b/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.mak
@@ -0,0 +1,50 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: BootGuardTPMPei.mak
+#
+# Description: TPM Initialization Flow for Boot Guard
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TCG_FILE_INCLUDE=\
+ /I$(TcgPlatformSetupPeiPolicy_DIR)\
+ /I$(TCG_DIR)\
+ /I$(AMI_TCG_PLATFORM_PEI_DIR)
+
+AMI_TCG_LIB_OBJECTS = $(AMI_TCG_LIB_OBJECTS) \
+$(BUILD)\BootGuardTPMPei.obj
+
+Make_AMITTCG_LIB : $(BUILD_DIR)\BootGuardTPMPei.obj
+
+$(BUILD_DIR)\BootGuardTPMPei.obj : $(BootGuardTPMPei_PATH)\BootGuardTPMPei.c
+ $(CC) $(CFLAGS) /I$(PROJECT_DIR) /I$(PROJECT_DIR)\Include $(TCG_FILE_INCLUDE) $(PROJECT_CPU_INCLUDES) /Fo$(BUILD_DIR)\BootGuardTPMPei.obj $(BootGuardTPMPei_PATH)\BootGuardTPMPei.c
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.sdl b/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.sdl
new file mode 100644
index 0000000..e2c81a1
--- /dev/null
+++ b/Board/EM/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.sdl
@@ -0,0 +1,96 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.sdl 3 10/29/13 5:18a Bensonlai $
+#
+# $Revision: 3 $
+#
+# $Date: 10/29/13 5:18a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Pei/BootGuardTPMPei/BootGuardTPMPei.sdl $
+#
+# 3 10/29/13 5:18a Bensonlai
+#
+# 2 9/06/13 6:10a Bensonlai
+# [TAG] EIP135513
+# [Category] Improvement
+# [Description] Support the TPM1.2 for WHCK test
+#
+# 1 6/04/13 5:15a Bensonlai
+# [TAG] EIP125148
+# [Category] Spec Update
+# [Severity] Normal
+# [Description] [SBY ULT] Boot Guard for 4th Gen Intel Core Processor
+# based on Mobile U-Processor Line - BIOS Writer's Guide - Rev 1.0
+# [Files] BootGuardTPMPei.cif
+# BootGuardTPMPei.c
+# BootGuardTPMPei.h
+# BootGuardTPMPei.sdl
+# BootGuardTPMPei.mak
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: BootGuardTPMPei.sdl
+#
+# Description: SDL file for BootGuardTPMPei
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "BootGuardTPMPei_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable BootGuardTPMPei support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Token = "TCG_SUPPORT" "=" "1"
+ Token = "INTEL_BOOT_GUARD_SUPPORT" "=" "1"
+End
+
+PATH
+ Name = "BootGuardTPMPei_PATH"
+End
+
+MODULE
+ File = "BootGuardTPMPei.mak"
+ Help = "Includes BootGuardTPMPei.mak to Project"
+End
+
+TOKEN
+ Name = "MEASURE_CRTM_VERSION_PEI_FUNCTION"
+ Value = "BootGuardMeasureCRTMVersion"
+ Help = "Function to measure crtm version. Input:EFI_PEI_SERVICES **. AMI function Modified Pcr 0"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/FIT/Pei/OpensslLib.lib b/Board/EM/FIT/Pei/OpensslLib.lib
new file mode 100644
index 0000000..290a4fa
--- /dev/null
+++ b/Board/EM/FIT/Pei/OpensslLib.lib
Binary files differ
diff --git a/Board/EM/FIT/Pei/PeiCryptLib.lib b/Board/EM/FIT/Pei/PeiCryptLib.lib
new file mode 100644
index 0000000..b05426c
--- /dev/null
+++ b/Board/EM/FIT/Pei/PeiCryptLib.lib
Binary files differ
diff --git a/Board/EM/FIT/ReBuildFIT.bat b/Board/EM/FIT/ReBuildFIT.bat
new file mode 100644
index 0000000..4a694d0
--- /dev/null
+++ b/Board/EM/FIT/ReBuildFIT.bat
@@ -0,0 +1 @@
+FITUtil.exe BIOS.rom 0 \ No newline at end of file
diff --git a/Board/EM/FIT/ReserveBootGuardFvMainHashKey.bin b/Board/EM/FIT/ReserveBootGuardFvMainHashKey.bin
new file mode 100644
index 0000000..2d30da2
--- /dev/null
+++ b/Board/EM/FIT/ReserveBootGuardFvMainHashKey.bin
@@ -0,0 +1 @@
+ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ \ No newline at end of file
diff --git a/Board/EM/FIT/ReserveBootGuardSigningServer.bin b/Board/EM/FIT/ReserveBootGuardSigningServer.bin
new file mode 100644
index 0000000..a56146f
--- /dev/null
+++ b/Board/EM/FIT/ReserveBootGuardSigningServer.bin
@@ -0,0 +1 @@
+ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ \ No newline at end of file
diff --git a/Board/EM/FIT/ReserveBpmTable.bin b/Board/EM/FIT/ReserveBpmTable.bin
new file mode 100644
index 0000000..08e7df1
--- /dev/null
+++ b/Board/EM/FIT/ReserveBpmTable.bin
Binary files differ
diff --git a/Board/EM/FIT/ReserveKmTable.bin b/Board/EM/FIT/ReserveKmTable.bin
new file mode 100644
index 0000000..08e7df1
--- /dev/null
+++ b/Board/EM/FIT/ReserveKmTable.bin
Binary files differ
diff --git a/Board/EM/FIT/Smm/FitHook.c b/Board/EM/FIT/Smm/FitHook.c
new file mode 100644
index 0000000..303b640
--- /dev/null
+++ b/Board/EM/FIT/Smm/FitHook.c
@@ -0,0 +1,113 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*****************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Smm/FitHook.c 1 7/03/13 10:06p Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 7/03/13 10:06p $
+//*****************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Smm/FitHook.c $
+//
+// 1 7/03/13 10:06p Bensonlai
+// [TAG] EIP128151
+// [Category] Improvement
+// [Description] Implement an option(/b) to flash FV_DATA region uisng
+// AFU flash utility.
+// [Files] FitHook.cif
+// FitHook.c
+// FitHook.sdl
+// FitHook.mak
+//
+//*****************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: FitHook.c
+//
+// Description: SW SMI hook.
+//
+//<AMI_FHDR_END>
+//*****************************************************************************
+
+#include <AmiDxeLib.h>
+#include <Protocol/SmiFlash.h>
+#include "token.h"
+
+#define FLASH_DEVICE_BASE_ADDRESS (0xFFFFFFFF-FLASH_SIZE+1)
+#define FV_DATA_BLOCK_ADDRESS (FV_DATA_BASE-FLASH_DEVICE_BASE_ADDRESS)
+#define FV_DATA_BLOCK_END (FV_DATA_BLOCK_ADDRESS+FV_DATA_SIZE)
+#define FV_DATA_TABLE_OFFSET (0xFFFFFFFF-FV_DATA_BASE+1)
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: AppendFvDataToAFU_UpdateBlockTypeId
+//
+// Description: This function is SW SMI hook that sets Flash Block Description
+// type for AMI AFU utility. (EIP#58139)
+//
+// Input:
+// SwSmiNum - SW SMI value number
+// Buffer - Flash descriptor address
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID AppendFvDataToAFU_UpdateBlockTypeId (
+ IN UINT8 SwSmiNum,
+ IN UINT64 Buffer )
+{
+ BLOCK_DESC *BlockDesc;
+ UINTN i;
+
+ // return if SW SMI value is not "Get Flash Info"
+ if (SwSmiNum != SMIFLASH_GET_FLASH_INFO)
+ return;
+
+ BlockDesc = (BLOCK_DESC*)&((INFO_BLOCK*)Buffer)->Blocks;
+
+ for (i = 0; i < ((INFO_BLOCK*)Buffer)->TotalBlocks; i++) {
+
+ TRACE((TRACE_ALWAYS,"AppendFvDataToAFU_UpdateBlockTypeId: %08X(%08X), Block %08X\n", FV_DATA_BLOCK_ADDRESS, FV_DATA_BLOCK_END, BlockDesc[i].StartAddress));
+
+ if (BlockDesc[i].StartAddress < FV_DATA_BLOCK_ADDRESS)
+ continue;
+
+ if (BlockDesc[i].StartAddress >= FV_DATA_BLOCK_END)
+ continue;
+
+ TRACE((TRACE_ALWAYS,"AppendFvDataToAFU_UpdateBlockTypeId: Found Blocks %08X\n",BlockDesc[i].StartAddress));
+
+ BlockDesc[i].Type = BOOT_BLOCK;
+ }
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/FIT/Smm/FitHook.cif b/Board/EM/FIT/Smm/FitHook.cif
new file mode 100644
index 0000000..50c2dc7
--- /dev/null
+++ b/Board/EM/FIT/Smm/FitHook.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "FitHook"
+ category = ModulePart
+ LocalRoot = "Board\EM\FIT\Smm"
+ RefName = "FitHook"
+
+[files]
+"FitHook.c"
+"FitHook.sdl"
+"FitHook.mak"
+
+<endComponent>
diff --git a/Board/EM/FIT/Smm/FitHook.mak b/Board/EM/FIT/Smm/FitHook.mak
new file mode 100644
index 0000000..78b432e
--- /dev/null
+++ b/Board/EM/FIT/Smm/FitHook.mak
@@ -0,0 +1,77 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Smm/FitHook.mak 1 7/03/13 10:06p Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 7/03/13 10:06p $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Smm/FitHook.mak $
+#
+# 1 7/03/13 10:06p Bensonlai
+# [TAG] EIP128151
+# [Category] Improvement
+# [Description] Implement an option(/b) to flash FV_DATA region uisng
+# AFU flash utility.
+# [Files] FitHook.cif
+# FitHook.c
+# FitHook.sdl
+# FitHook.mak
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: FitHook.mak
+#
+# Description: Make file for FitHook eModule.
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+
+all : FitHook
+
+FitHook : $(BUILD_DIR)\FitHook.mak FitHookBin
+
+$(BUILD_DIR)\FitHook.mak : $(FIT_HOOK_PATH)\$(@B).cif $(FIT_HOOK_PATH)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(FIT_HOOK_PATH)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+FitHookObjs = $(BUILD_DIR)\$(FIT_HOOK_PATH)\FitHook.obj
+
+FitHookBin : $(AMIDXELIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\FitHook.mak all\
+ "CFLAGS=$(CFLAGS:/W4=/W3) /I$(OFBD_DIR)" \
+ OBJECTS="$(FitHookObjs)" \
+ NAME=FitHook \
+ TYPE=LIBRARY LIBRARY_NAME=$(FIT_HOOK_LIB)
+
+$(FIT_HOOK_LIB) : FitHook
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/FIT/Smm/FitHook.sdl b/Board/EM/FIT/Smm/FitHook.sdl
new file mode 100644
index 0000000..d8af9f7
--- /dev/null
+++ b/Board/EM/FIT/Smm/FitHook.sdl
@@ -0,0 +1,94 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Smm/FitHook.sdl 2 7/26/13 1:18a Bensonlai $
+#
+# $Revision: 2 $
+#
+# $Date: 7/26/13 1:18a $
+#
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/FIT/Smm/FitHook.sdl $
+#
+# 2 7/26/13 1:18a Bensonlai
+#
+# 1 7/03/13 10:06p Bensonlai
+# [TAG] EIP128151
+# [Category] Improvement
+# [Description] Implement an option(/b) to flash FV_DATA region uisng
+# AFU flash utility.
+# [Files] FitHook.cif
+# FitHook.c
+# FitHook.sdl
+# FitHook.mak
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: FitHook.sdl
+#
+# Description: SDL file for FitHook
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "FIT_HOOK_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Help = "Main switch to enable FitHook support in Project"
+End
+
+MODULE
+ Help = "Includes FitHook.mak to Project"
+ File = "FitHook.mak"
+End
+
+PATH
+ Name = "FIT_HOOK_PATH"
+End
+
+ELINK
+ Name = "AppendFvDataToAFU_UpdateBlockTypeId,"
+ Parent = "SMIFlashEndHandlerList"
+ InvokeOrder = AfterParent
+End
+
+TOKEN
+ Name = "FIT_HOOK_LIB"
+ Value = "$(BUILD_DIR)\FitHook.lib"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\FitHook.lib"
+ Parent = "PRESERVE_LIB"
+ InvokeOrder = AfterParent
+End
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2013, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
diff --git a/Board/EM/FIT/keygen.exe b/Board/EM/FIT/keygen.exe
new file mode 100644
index 0000000..7367328
--- /dev/null
+++ b/Board/EM/FIT/keygen.exe
Binary files differ
diff --git a/Board/EM/IdeAcoustic/Acoustic.c b/Board/EM/IdeAcoustic/Acoustic.c
new file mode 100644
index 0000000..f52d7c1
--- /dev/null
+++ b/Board/EM/IdeAcoustic/Acoustic.c
@@ -0,0 +1,393 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/HddAcoustic/Acoustic.c 5 12/19/11 1:09a Rameshr $
+//
+// $Revision: 5 $
+//
+// $Date: 12/19/11 1:09a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/HddAcoustic/Acoustic.c $
+//
+// 5 12/19/11 1:09a Rameshr
+// [TAG] EIP77527
+// [Category] Improvement
+// [Description] IdeSecurity, IdeAcoustic and IdeSmart changes should be
+// done based on the Core Version checking.
+// [Files] IdeSecurity.c, IdeSmart.c , Acoustic.c
+//
+// 4 12/05/11 6:22p Rajkumarkc
+// [TAG] EIP77142
+// [Category] Improvement
+// [Description] Added the function 'IdeNonDataCommandExp' in the
+// 'IDE_BUS_PROTOCOL' and removed the existing function
+// 'IdeNonDataCommand' for supporting the upper 24bits of LBA.
+// [Files]
+// Ata.c, IdeBus.c, Idebus.h, PIDEBus.h, Acoustic.c, IdeSecurity.c,
+// IdeSMART.c
+//
+// 3 2/10/11 11:25a Pats
+// [TAG] - EIP 52920
+// [Category]- Function Request
+// [Severity]- Minor
+// [Symptom] - The Acoustic mode (Bypass/Quiet/Max Performance) of port 5
+// is invalid on AMD SB700.
+// [RootCause] - Special case where 2nd controller counts by incrementing
+// device number only not handled properly
+// [Solution] - Modified functions that handle this case.
+// [Files] - Acoustic.c, AcousticBoard.c, AcousticSetup.c
+//
+// 2 1/07/11 12:07p Pats
+// Changed the name of a variable from SataPortIndex to IdeDevice, for
+// consistancy. No coding change.
+//
+// 1 1/05/11 12:22a Rameshr
+// Initial check-in for Hdd Acoustic Management Support.
+//
+//**********************************************************************
+
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: Acoustic.c
+//
+// Description: Initialize and provide a protocol for the Acoustic support.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include <Efi.h>
+#include <Dxe.h>
+
+#include "Acoustic.h"
+
+extern EFI_GUID gAcousticSetupProtocolguid;
+
+EFI_GUID gEfiDiskInfoProtocolGuid = EFI_DISK_INFO_PROTOCOL_GUID;
+EFI_GUID gEfiBlockIoProtocolGuid = EFI_BLOCK_IO_PROTOCOL_GUID;
+EFI_GUID gEfiAhciBusProtocolGuid = AHCI_BUS_INIT_PROTOCOL_GUID;
+EFI_GUID gEfiIdeBusInitProtocolGuid = IDE_BUS_INIT_PROTOCOL_GUID;
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: AcousticEntryPoint
+//
+// Description: This routine is the entry point for the Acoustic driver. It
+// Initializes various controllers and installs Driver Binding
+// protocol
+//
+// Input: ImageHandle Handle to this driver image
+// SystemTable Pointer to the system table
+//
+// Output: EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+AcousticEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ InitAmiLib(ImageHandle, SystemTable);
+
+#ifdef Debug_Level_1
+ TRACE((-1,"AcousticEntryPoint Status = %x\n", Status));
+#endif
+
+ Acoustic_BoardInit (ImageHandle, SystemTable);
+
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: AcousticProgramming
+//
+// Description: This function is called after all the controllers have been
+// dispatched and at the end of BDS phase.
+//
+//
+// Input: IN EFI_EVENT Event
+// IN VOID *Context
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+AcousticProgramming (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+)
+{
+ EFI_STATUS Status;
+ EFI_DISK_INFO_PROTOCOL *DiskInfo;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_DEVICE_PATH_PROTOCOL *Dp;
+ ACOUSTIC_SETUP_PROTOCOL *AcousticSetupProtocol;
+ IDENTIFY_DATA *IdentifyDriveInfo = NULL;
+ UINT32 IdeDevice, IdeChannel, PortIndex;
+ UINTN i, j, Number, Number1;
+ EFI_HANDLE *Controller_Handle = NULL, *Device_Handle = NULL, Handle = NULL;
+ SETUP_DATA *SetupData = NULL;
+ UINT32 BufferSize;
+ UINT16 CurrentLevel;
+ UINT8 SubClassCode;
+
+ Status = pBS->CloseEvent (Event);
+
+ Status = pBS->LocateHandleBuffer(ByProtocol,&gAcousticSetupProtocolguid, NULL, &Number, &Controller_Handle);
+ if (EFI_ERROR(Status)) {
+ return;
+ }
+ //
+ // Get the Identify Data
+ //
+ Status = pBS->AllocatePool(EfiBootServicesData, sizeof (IDENTIFY_DATA), &IdentifyDriveInfo);
+ ASSERT_EFI_ERROR (Status);
+
+ for(i=0; i<Number; i++) {
+ Status = pBS->HandleProtocol(Controller_Handle[i],&gAcousticSetupProtocolguid,&AcousticSetupProtocol);
+ if (EFI_ERROR(Status)) {
+ continue;
+ }
+
+ Status = pBS->LocateHandleBuffer(ByProtocol,&gEfiDiskInfoProtocolGuid, NULL, &Number1, &Device_Handle);
+ if (EFI_ERROR(Status)) {
+ continue;
+ }
+
+ for(j = 0; j < Number1; j++) {
+ //
+ // Now try to locate the Controller on which the device is connected
+ //
+ Status = pBS->HandleProtocol(Device_Handle[j],&gEfiDevicePathProtocolGuid,&Dp);
+ if (EFI_ERROR(Status)) {
+ continue;
+ }
+
+ Status = pBS->LocateDevicePath(&gEfiPciIoProtocolGuid, &Dp, &Handle);
+ //
+ // If the controller handle doesn't match then it is a different IDE controller
+ //
+ if (Handle != Controller_Handle[i]) {
+ continue;
+ }
+
+ Status = pBS->HandleProtocol(Device_Handle[j], &gEfiDiskInfoProtocolGuid, &DiskInfo);
+ if (EFI_ERROR(Status)) {
+ continue;
+ }
+
+ Status = pBS->HandleProtocol(Controller_Handle[i], &gEfiPciIoProtocolGuid, &PciIo);
+ if (EFI_ERROR(Status)) {
+ continue;
+ }
+
+ Status = PciIo->Pci.Read(PciIo, EfiPciIoWidthUint8, 0xA, 1, &SubClassCode);
+ //
+ // Get the location of the drive
+ //
+ Status = DiskInfo->WhichIde (DiskInfo, &IdeChannel, &IdeDevice);
+
+ if (SubClassCode == 1) { // Ide mode
+ PortIndex = (IdeChannel * 2) + IdeDevice;
+ if (PortIndex == 1 || PortIndex == 2) {
+ PortIndex ^= 3;
+ }
+ } else {
+ PortIndex = IdeChannel;
+ }
+#if SECOND_CONTROLLER_COUNTS_BY_DEVICE
+ if ( (SubClassCode == 1) && \
+ (AcousticSetupProtocol->ControllerNumber == 1) ) {
+ PortIndex = IdeDevice;
+ }
+#endif
+ AcousticSetupProtocol->DeviceDetected[PortIndex] = 1;
+
+ BufferSize = sizeof (IDENTIFY_DATA);
+
+ Status = DiskInfo->Identify (DiskInfo, IdentifyDriveInfo, &BufferSize);
+ ASSERT_EFI_ERROR (Status);
+ if (EFI_ERROR(Status)) {
+ continue;
+ }
+ //
+ // Does it support Acoustics?
+ //
+ if (!(IdentifyDriveInfo->Command_Set_Supported_83 & AUTOMATIC_ACOUSTIC_FEATURE_SET_SUPPORTED)) {
+ AcousticSetupProtocol->AcousticSupportIndv[PortIndex] = 0;
+ continue;
+ }
+ //
+ // Get the drive's current acoustic value
+ //
+ CurrentLevel = (IdentifyDriveInfo->Acoustic_Level_94);
+ //
+ // Acoustic is supported by the drive
+ //
+ AcousticSetupProtocol->AcousticSupportIndv[PortIndex] = 1;
+
+ if (AcousticSetupProtocol->AcousticLevelIndv[PortIndex] != ACOUSTIC_SUPPORT_DISABLE) {
+ if (AcousticSetupProtocol->AcousticLevelIndv[PortIndex] == ACOUSTIC_LEVEL_BYPASS) {
+ if ( (CurrentLevel & 0xFF) != (CurrentLevel >> 8) ) { // If not already set
+ Status = IssueSetFeatureCmd(Controller_Handle[i],
+ Device_Handle[j],
+ ACOUSTIC_MANAGEMENT_ENABLE,
+ (UINT8)(IdentifyDriveInfo->Acoustic_Level_94 >> 8));
+ }
+ } else {
+ if ( AcousticSetupProtocol->AcousticLevelIndv[PortIndex] != (UINT8)(CurrentLevel & 0xFF) ) {
+ Status = IssueSetFeatureCmd(Controller_Handle[i],
+ Device_Handle[j],
+ ACOUSTIC_MANAGEMENT_ENABLE,
+ AcousticSetupProtocol->AcousticLevelIndv[PortIndex]);
+ }
+ }
+ } else {
+ //
+ // Acoustic disabled in Setup but not in drive then issue cmd
+ //
+ if (IdentifyDriveInfo->Command_Set_Enabled_86 & AUTOMATIC_ACOUSTIC_FEATURE_SET_SUPPORTED) {
+ Status = IssueSetFeatureCmd(Controller_Handle[i],
+ Device_Handle[j],
+ ACOUSTIC_MANAGEMENT_DISABLE,
+ 0);
+ }
+ }
+ }
+ }
+
+ pBS->FreePool (IdentifyDriveInfo);
+
+ if (Controller_Handle) {
+ pBS->FreePool (Controller_Handle);
+ }
+
+ if (Device_Handle) {
+ pBS->FreePool (Device_Handle);
+ }
+
+ return;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: IssueSetFeatureCmd
+//
+// Description: This function issues the SetFeature cmd
+//
+// Input: EFI_HANDLE ControllerHandle,
+// EFI_HANDLE DeviceHandle,
+// UINT8 SubCommand,
+// UINT8 Mode
+//
+// Output: Status
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+IssueSetFeatureCmd (
+ EFI_HANDLE ControllerHandle,
+ EFI_HANDLE DeviceHandle,
+ UINT8 SubCommand,
+ UINT8 Mode
+)
+{
+ EFI_STATUS Status;
+ EFI_BLOCK_IO_PROTOCOL *BlockIO;
+ AHCI_BUS_PROTOCOL *AhciBusInterface;
+ SATA_DEVICE_INTERFACE *SataDevInterface;
+ IDE_BUS_PROTOCOL *IdeBusInterface;
+ COMMAND_STRUCTURE CommandStructure = {0};
+
+ Status = pBS->HandleProtocol(DeviceHandle, &gEfiBlockIoProtocolGuid, &BlockIO);
+ ASSERT_EFI_ERROR(Status);
+
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+ //
+ // Check if IDE/AHCI by check if IDEBus/AHCUBus Protocol is installed
+ //
+ Status = pBS->OpenProtocol( ControllerHandle,
+ &gEfiIdeBusInitProtocolGuid,
+ &IdeBusInterface,
+ TheImageHandle,
+ ControllerHandle,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL );
+ if(!EFI_ERROR(Status)) {
+ //
+ // We are in IDE mode
+ //
+ IdeBusInterface = ((IDE_BLOCK_IO *)BlockIO)->IdeBusInterface;
+
+ //
+ // Idebus API changed from Core 4.6.5.2. Added Core Version check for the OLD
+ // Core support.
+ //
+#if defined CORE_COMBINED_VERSION && (CORE_COMBINED_VERSION > 0x4028b)
+
+ Status = IdeBusInterface->IdeNonDataCommand(IdeBusInterface,
+ SubCommand, Mode, 0, 0, 0, 0, 0,
+ 0, 0, IdeBusInterface->IdeDevice.Device << 4,
+ SET_FEATURE_COMMAND);
+#else
+ Status = IdeBusInterface->IdeNonDataCommand(IdeBusInterface,
+ SubCommand, Mode, 0,
+ 0, 0, IdeBusInterface->IdeDevice.Device << 4,
+ SET_FEATURE_COMMAND);
+#endif
+ return Status;
+ }
+
+ Status = pBS->OpenProtocol( ControllerHandle,
+ &gEfiAhciBusProtocolGuid,
+ &AhciBusInterface,
+ TheImageHandle,
+ ControllerHandle,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL );
+
+ if(!EFI_ERROR(Status)) {
+ SataDevInterface = ((SATA_BLOCK_IO *)BlockIO)->SataDevInterface;
+ //
+ // It is in AHCI mode
+ //
+ CommandStructure.Command = SET_FEATURE_COMMAND;
+ CommandStructure.Features = SubCommand;
+ CommandStructure.SectorCount = Mode;
+ Status = AhciBusInterface->ExecuteNonDataCommand (SataDevInterface, CommandStructure);
+ }
+
+ return Status;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/IdeAcoustic/Acoustic.chm b/Board/EM/IdeAcoustic/Acoustic.chm
new file mode 100644
index 0000000..8914423
--- /dev/null
+++ b/Board/EM/IdeAcoustic/Acoustic.chm
Binary files differ
diff --git a/Board/EM/IdeAcoustic/Acoustic.cif b/Board/EM/IdeAcoustic/Acoustic.cif
new file mode 100644
index 0000000..7d2c90c
--- /dev/null
+++ b/Board/EM/IdeAcoustic/Acoustic.cif
@@ -0,0 +1,19 @@
+<component>
+ name = "IdeAcoustic"
+ category = eModule
+ LocalRoot = "Board\EM\IdeAcoustic"
+ RefName = "Acoustic"
+[files]
+"Acoustic.sdl"
+"Acoustic.mak"
+"Acoustic.c"
+"Acoustic.h"
+"AcousticBoard.c"
+"AcousticSetup.c"
+"Acoustic.dxs"
+"Acoustic.sd"
+"Acoustic.uni"
+"Acoustic.chm"
+[parts]
+"AcousticProtocol"
+<endComponent>
diff --git a/Board/EM/IdeAcoustic/Acoustic.dxs b/Board/EM/IdeAcoustic/Acoustic.dxs
new file mode 100644
index 0000000..65610ee
--- /dev/null
+++ b/Board/EM/IdeAcoustic/Acoustic.dxs
@@ -0,0 +1,59 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/HddAcoustic/Acoustic.dxs 1 1/05/11 12:22a Rameshr $
+//
+// $Revision: 1 $
+//
+// $Date: 1/05/11 12:22a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/HddAcoustic/Acoustic.dxs $
+//
+// 1 1/05/11 12:22a Rameshr
+// Initial check-in for Hdd Acoustic Management Support.
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: Acoustic.DXS
+//
+// Description: This file is the dependency file for the Acoustic
+// driver
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+DEPENDENCY_START
+ TRUE
+DEPENDENCY_END
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/IdeAcoustic/Acoustic.h b/Board/EM/IdeAcoustic/Acoustic.h
new file mode 100644
index 0000000..9097ae7
--- /dev/null
+++ b/Board/EM/IdeAcoustic/Acoustic.h
@@ -0,0 +1,129 @@
+//**********************************************************************//
+//**********************************************************************//
+//** **//
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **//
+//** **//
+//** All Rights Reserved. **//
+//** **//
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **//
+//** **//
+//** Phone: (770)-246-8600 **//
+//** **//
+//**********************************************************************//
+//**********************************************************************//
+//**********************************************************************//
+// $Header: /Alaska/SOURCE/Modules/HddAcoustic/Acoustic.h 2 1/05/11 6:32p Pats $
+//
+// $Revision: 2 $
+//
+// $Date: 1/05/11 6:32p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/HddAcoustic/Acoustic.h $
+//
+// 2 1/05/11 6:32p Pats
+// Removed inlcude of SB.h, and all south bridge-specific defines.
+//
+// 1 1/05/11 12:22a Rameshr
+// Initial check-in for Hdd Acoustic Management Support.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: Acoustic.h
+//
+// Description: Acoustic header file
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#ifndef _Acoustic_H
+#define _Acoustic_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <Token.h>
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <pci.h>
+#include <Setup.h>
+#include <Protocol\AcousticProtocol.h>
+#include <Protocol\PciIo.h>
+#include <Protocol\DevicePath.h>
+#include <protocol\BlockIo.h>
+#include <Protocol\PDiskInfo.h>
+#include <Protocol\PIDEController.h>
+#include <Protocol\PIDEBus.h>
+#include <Protocol\PciRootBridgeIo.h>
+#include <Protocol\DriverBinding.h>
+#include <Protocol\PAhciBus.h>
+
+//
+// PCI Defines
+//
+#ifndef PCI_SCC
+#define PCI_SCC 0x000A // Sub Class Code Register
+#endif
+#ifndef PCI_CL_MASS_STOR_SCL_IDE
+#define PCI_CL_MASS_STOR_SCL_IDE 0x01 // Ide Mode
+#endif
+#define MmPciAddress(Base, Bus, Device, Function, Register) \
+ ( (UINTN)(Base) + \
+ (UINTN)(Bus << 20) + \
+ (UINTN)(Device << 15) + \
+ (UINTN)(Function << 12) + \
+ (UINTN)(Register) )
+
+//
+// Constant Defines
+//
+#define AUTOMATIC_ACOUSTIC_FEATURE_SET_SUPPORTED 0x0200
+
+//
+// Function defines
+//
+EFI_STATUS
+Acoustic_BoardInit (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+);
+
+EFI_STATUS
+AcousticEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+);
+
+EFI_STATUS
+IssueSetFeatureCmd (
+ EFI_HANDLE ControllerHandle,
+ EFI_HANDLE DeviceHandle,
+ UINT8 SubCommand,
+ UINT8 Mode
+);
+
+extern EFI_GUID gEfiDevicePathProtocolGuid;
+
+/****** DO NOT WRITE BELOW THIS LINE *******/
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+//**********************************************************************//
+//**********************************************************************//
+//** **//
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **//
+//** **//
+//** All Rights Reserved. **//
+//** **//
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **//
+//** **//
+//** Phone: (770)-246-8600 **//
+//** **//
+//**********************************************************************//
+//**********************************************************************//
diff --git a/Board/EM/IdeAcoustic/Acoustic.mak b/Board/EM/IdeAcoustic/Acoustic.mak
new file mode 100644
index 0000000..b63ae9f
--- /dev/null
+++ b/Board/EM/IdeAcoustic/Acoustic.mak
@@ -0,0 +1,97 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/HddAcoustic/Acoustic.mak 1 1/05/11 12:22a Rameshr $
+#
+# $Revision: 1 $
+#
+# $Date: 1/05/11 12:22a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/HddAcoustic/Acoustic.mak $
+#
+# 1 1/05/11 12:22a Rameshr
+# Initial check-in for Hdd Acoustic Management Support.
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: Acoustic.mak
+#
+# Description: Make file for the Acoustic Module
+#
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+all : Acoustic
+
+Acoustic : $(BUILD_DIR)\Acoustic.mak AcousticBin
+
+$(BUILD_DIR)\Acoustic.mak : $(ACOUSTIC_DIR)\Acoustic.cif $(ACOUSTIC_DIR)\Acoustic.mak $(BUILD_RULES)
+ $(CIF2MAK) $(ACOUSTIC_DIR)\Acoustic.cif $(CIF2MAK_DEFAULTS)
+
+Acoustic_OBJECTS = \
+ $(BUILD_DIR)\$(ACOUSTIC_DIR)\Acoustic.obj\
+ $(BUILD_DIR)\$(ACOUSTIC_DIR)\AcousticBoard.obj\
+
+Acoustic_INCLUDES = \
+ /I$(PROJECT_DIR)\
+ /I$(SB_CHIPSET_DIR)\
+ /I$(ACOUSTIC_DIR)\
+ /I$(SB_BOARD_DIR)\
+
+
+AcousticBin : $(AMIDXELIB) $(AMICSPLib) $(EFIDRIVERLIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ "MY_INCLUDES=$(Acoustic_INCLUDES)"\
+ /f $(BUILD_DIR)\Acoustic.mak all\
+ GUID=0639408B-19A6-4b5d-BAFB-12A2F5114032\
+ ENTRY_POINT=AcousticEntryPoint\
+ TYPE=BS_DRIVER \
+ COMPRESS=1 HAS_RESOURCES=1\
+ "OBJECTS=$(Acoustic_OBJECTS)"
+
+#---------------------------------------------------------------------------
+# Create Acoustic Setup Screens
+#---------------------------------------------------------------------------
+!IF "$(LOCAL_ACOUSTIC_SETUP)"=="1"
+
+SetupSdbs : $(BUILD_DIR)\Acoustic.mak ACOUSTICSDB
+SetupBin : $(BUILD_DIR)\AcousticSetup.obj
+
+ACOUSTICSDB :
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\Acoustic.mak all\
+ TYPE=SDB NAME=Acoustic MAKEFILE=$(BUILD_DIR)\Acoustic.Mak STRING_CONSUMERS=$(ACOUSTIC_DIR)\Acoustic.sd
+
+$(BUILD_DIR)\AcousticSetup.obj : $(ACOUSTIC_DIR)\AcousticSetup.c $(BUILD_DIR)\SetupStrTokens.h
+ $(CC) $(CFLAGS) /Fo$(BUILD_DIR)\ $(ACOUSTIC_DIR)\AcousticSetup.c
+
+!ENDIF
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/IdeAcoustic/Acoustic.sd b/Board/EM/IdeAcoustic/Acoustic.sd
new file mode 100644
index 0000000..962015b
--- /dev/null
+++ b/Board/EM/IdeAcoustic/Acoustic.sd
@@ -0,0 +1,433 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/HddAcoustic/Acoustic.sd 3 9/22/11 4:17a Rameshr $
+//
+// $Revision: 3 $
+//
+// $Date: 9/22/11 4:17a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/HddAcoustic/Acoustic.sd $
+//
+// 3 9/22/11 4:17a Rameshr
+// [TAG] EIP68563
+// [Category] Improvement
+// [Description] Manufacturing Mode not set for the Acoustic setup
+// options.
+// [Files] Acoustic.sd
+//
+// 2 1/11/11 12:02a Rameshr
+// Coding Error Resolved.
+//
+// 1 1/05/11 12:22a Rameshr
+// Initial check-in for Hdd Acoustic Management Support.
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: Acoustic.SD
+//
+// Description: Acoustic driver Setup data definitions
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifdef SETUP_DATA_DEFINITION
+/***********************************************************/
+/* Put NVRAM data definitions here.
+/* For example: UINT8 Data1;
+/* These definitions will be converted by the build process
+/* to a definitions of SETUP_DATA fields.
+/***********************************************************/
+#define DEV 0
+
+#if (EFI_SPECIFICATION_VERSION > 0x00020000)
+ #define DEV00 0
+ #define DEV01 1
+ #define DEV02 2
+ #define DEV03 3
+ #define DEV04 4
+ #define DEV05 5
+ #define DEV06 6
+ #define DEV07 7
+ #define DEV08 8
+ #define DEV09 9
+ #define DEV10 10
+ #define DEV11 11
+ #define DEV12 12
+ #define DEV13 13
+#else
+ #define DEV00 1
+ #define DEV01 2
+ #define DEV02 3
+ #define DEV03 4
+ #define DEV04 5
+ #define DEV05 6
+ #define DEV06 7
+ #define DEV07 8
+ #define DEV08 9
+ #define DEV09 10
+ #define DEV10 11
+ #define DEV11 12
+ #define DEV12 13
+ #define DEV13 14
+#endif
+ UINT8 AcousticPwrMgmt;
+ UINT8 AcousticLevel;
+//
+// Porting required
+//
+// Add more elements if there are more than 6 SATA ports
+ UINT8 AcousticSupported[ACOUSTIC_DEVICE_COUNT];
+ UINT8 AcousticLevelIndv[ACOUSTIC_DEVICE_COUNT];
+ UINT8 AcDevicePresent[ACOUSTIC_DEVICE_COUNT];
+#endif
+
+#if defined(VFRCOMPILE) && !defined(CONTROLS_ARE_DEFINED)
+#define CONTROL_DEFINITION
+#endif
+#ifdef CONTROL_DEFINITION
+
+#define ACOUSTIC_ONEOF_ACOUSTICPWRMGMT\
+ oneof varid = SETUP_DATA.AcousticPwrMgmt,\
+ prompt = STRING_TOKEN(STR_AUTO_ACOUSTIC),\
+ help = STRING_TOKEN(STR_AUTO_ACOUSTIC_HELP),\
+ option text = STRING_TOKEN(STR_ENABLED_STRING), value = 1, flags = 0, key = 0;\
+ option text = STRING_TOKEN(STR_DISABLED_STRING), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#if !INDIVIDUAL_ACOUSTIC_SUPPORT
+
+#define ACOUSTIC_ONEOF_ACOUSTICLEVEL\
+ oneof varid = SETUP_DATA.AcousticLevel,\
+ prompt = STRING_TOKEN(STR_AUTO_ACOUSTIC_MODE),\
+ help = STRING_TOKEN(STR_AUTO_ACOUSTIC_MODE_HELP),\
+ option text = STRING_TOKEN(STR_BYPASS_STRING), value = 0xFF, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_QUIET_STRING), value = 0x80, flags = 0, key = 0;\
+ option text = STRING_TOKEN(STR_MAXIMUM_PERFORMANCE_STRING), value = 0xFE, flags = 0, key = 0;\
+ endoneof;
+
+#else
+ #define ACOUSTIC_ONEOF_ACOUSTICLEVEL
+#endif // END #if !INDIVIDUAL_ACOUSTIC_SUPPORT
+
+#if INDIVIDUAL_ACOUSTIC_SUPPORT
+
+#define ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_PRESENT(DEV)\
+ oneof varid = SETUP_DATA.AcousticLevelIndv[DEV],\
+ prompt = STRING_TOKEN(STR_AUTO_ACOUSTIC_MODE_INDV),\
+ help = STRING_TOKEN(STR_AUTO_ACOUSTIC_MODE_HELP),\
+ option text = STRING_TOKEN(STR_BYPASS_STRING), value = 0xFF, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_QUIET_STRING), value = 0x80, flags = 0, key = 0;\
+ option text = STRING_TOKEN(STR_MAXIMUM_PERFORMANCE_STRING), value = 0xFE, flags = 0, key = 0;\
+ endoneof;
+
+#define ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTSUPPORTED(DEV)\
+ oneof varid = SETUP_DATA.AcousticLevelIndv[DEV],\
+ prompt = STRING_TOKEN(STR_AUTO_ACOUSTIC_MODE_INDV),\
+ help = STRING_TOKEN(STR_AUTO_ACOUSTIC_MODE_HELP),\
+ option text = STRING_TOKEN(STR_NOT_SUPPORTED), value = 0xFF, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTAVAILABLE(DEV)\
+ oneof varid = SETUP_DATA.AcousticLevelIndv[DEV],\
+ prompt = STRING_TOKEN(STR_AUTO_ACOUSTIC_MODE_INDV),\
+ help = STRING_TOKEN(STR_AUTO_ACOUSTIC_MODE_HELP),\
+ option text = STRING_TOKEN(STR_NOT_AVAILABLE), value = 0xFF, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#else
+ #define ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_PRESENT(DEV)
+ #define ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTSUPPORTED(DEV)
+ #define ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTAVAILABLE(DEV)
+#endif // END #if INDIVIDUAL_ACOUSTIC_SUPPORT
+#endif // END #ifdef CONTROL_DEFINITION
+
+#ifdef CONTROLS_WITH_DEFAULTS
+ ACOUSTIC_ONEOF_ACOUSTICPWRMGMT
+ ACOUSTIC_ONEOF_ACOUSTICLEVEL
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_PRESENT(DEV)
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTSUPPORTED(DEV)
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTAVAILABLE(DEV)
+#endif // END #ifdef CONTROLS_WITH_DEFAULTS
+
+#ifdef ADVANCED_FORM_SET
+
+#ifndef SUPPRESS_GRAYOUT_ENDIF
+#define SUPPRESS_GRAYOUT_ENDIF endif;
+#endif
+
+#ifdef FORM_SET_TYPEDEF
+//
+//If you need any additional type definitions add them here
+//
+#endif
+
+#ifdef FORM_SET_VARSTORE
+//
+//If you need custom varstore's define them here
+//
+#endif
+
+ #ifdef FORM_SET_ITEM
+//
+// Define controls to be added to the main page of the formset
+//
+
+ #endif
+
+ #ifdef FORM_SET_GOTO
+ //
+ // Define goto commands for the forms defined in this file
+ //
+ goto SATA_ACOUSTIC_DEVICE_OPTIONS_FORM_ID,
+ prompt = STRING_TOKEN(STR_ACOUSTIC_SUBTITLE),
+ help = STRING_TOKEN(STR_ACOUSTIC_SUBTITLE_HELP);
+ #endif
+
+ #ifdef FORM_SET_FORM
+ //
+ // Define forms
+ //
+
+ #ifndef ACOUSTIC_FORM_MAIN
+ #define ACOUSTIC_FORM_MAIN
+ form formid = AUTO_ID(SATA_ACOUSTIC_DEVICE_OPTIONS_FORM_ID),
+ title = STRING_TOKEN(STR_SATA_ACOUSTIC_OPTIONS_FORM_TITLE);
+
+ SEPARATOR
+ SUBTITLE(STRING_TOKEN(STR_ACOUSTIC_SUBTITLE))
+ SEPARATOR
+
+ ACOUSTIC_ONEOF_ACOUSTICPWRMGMT
+
+ #if !INDIVIDUAL_ACOUSTIC_SUPPORT
+ suppressif ideqval SETUP_DATA.AcousticPwrMgmt == 0x0;
+ ACOUSTIC_ONEOF_ACOUSTICLEVEL
+ endif;
+ #endif
+
+ #if INDIVIDUAL_ACOUSTIC_SUPPORT
+ SEPARATOR
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV00] == 0x0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ACSATA_PORT0),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ACHDD_0),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ endif;
+
+ suppressif ideqval SETUP_DATA.AcousticPwrMgmt == 0x0 OR ideqval SETUP_DATA.AcousticSupported[DEV00] == 0x0;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_PRESENT(DEV00)
+ endif;
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV00] == 0x0 OR
+ ideqval SETUP_DATA.AcousticSupported[DEV00] == 0x1 OR
+ ideqval SETUP_DATA.AcousticPwrMgmt == 0x0;
+ grayoutif ideqval SETUP_DATA.AcousticPwrMgmt == 0x1;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTSUPPORTED(DEV00)
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV00] == 0x0 OR ideqval SETUP_DATA.AcousticPwrMgmt == 0x1;
+ grayoutif ideqval SETUP_DATA.AcousticPwrMgmt == 0x0;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTAVAILABLE(DEV00)
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV01] == 0x0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ACSATA_PORT1),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ACHDD_1),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ endif;
+
+ suppressif ideqval SETUP_DATA.AcousticPwrMgmt == 0x0 OR ideqval SETUP_DATA.AcousticSupported[DEV01] == 0x0;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_PRESENT(DEV01)
+ endif;
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV01] == 0x0 OR
+ ideqval SETUP_DATA.AcousticSupported[DEV01] == 0x1 OR
+ ideqval SETUP_DATA.AcousticPwrMgmt == 0x0;
+ grayoutif ideqval SETUP_DATA.AcousticPwrMgmt == 0x1;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTSUPPORTED(DEV01)
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV01] == 0x0 OR ideqval SETUP_DATA.AcousticPwrMgmt == 0x1;
+ grayoutif ideqval SETUP_DATA.AcousticPwrMgmt == 0x0;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTAVAILABLE(DEV01)
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV02] == 0x0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ACSATA_PORT2),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ACHDD_2),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ endif;
+
+ suppressif ideqval SETUP_DATA.AcousticPwrMgmt == 0x0 OR ideqval SETUP_DATA.AcousticSupported[DEV02] == 0x0;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_PRESENT(DEV02)
+ endif;
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV02] == 0x0 OR
+ ideqval SETUP_DATA.AcousticSupported[DEV02] == 0x1 OR
+ ideqval SETUP_DATA.AcousticPwrMgmt == 0x0;
+ grayoutif ideqval SETUP_DATA.AcousticPwrMgmt == 0x1;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTSUPPORTED(DEV02)
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV02] == 0x0 OR ideqval SETUP_DATA.AcousticPwrMgmt == 0x1;
+ grayoutif ideqval SETUP_DATA.AcousticPwrMgmt == 0x0;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTAVAILABLE(DEV02)
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV03] == 0x0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ACSATA_PORT3),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ACHDD_3),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ endif;
+
+ suppressif ideqval SETUP_DATA.AcousticPwrMgmt == 0x0 OR ideqval SETUP_DATA.AcousticSupported[DEV03] == 0x0;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_PRESENT(DEV03)
+ endif;
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV03] == 0x0 OR
+ ideqval SETUP_DATA.AcousticSupported[DEV03] == 0x1 OR
+ ideqval SETUP_DATA.AcousticPwrMgmt == 0x0;
+ grayoutif ideqval SETUP_DATA.AcousticPwrMgmt == 0x1;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTSUPPORTED(DEV03)
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV03] == 0x0 OR ideqval SETUP_DATA.AcousticPwrMgmt == 0x1;
+ grayoutif ideqval SETUP_DATA.AcousticPwrMgmt == 0x0;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTAVAILABLE(DEV03)
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV04] == 0x0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ACSATA_PORT4),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ACHDD_4),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ endif;
+
+ suppressif ideqval SETUP_DATA.AcousticPwrMgmt == 0x0 OR ideqval SETUP_DATA.AcousticSupported[DEV04] == 0x0;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_PRESENT(DEV04)
+ endif;
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV04] == 0x0 OR
+ ideqval SETUP_DATA.AcousticSupported[DEV04] == 0x1 OR
+ ideqval SETUP_DATA.AcousticPwrMgmt == 0x0;
+ grayoutif ideqval SETUP_DATA.AcousticPwrMgmt == 0x1;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTSUPPORTED(DEV04)
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV04] == 0x0 OR ideqval SETUP_DATA.AcousticPwrMgmt == 0x1;
+ grayoutif ideqval SETUP_DATA.AcousticPwrMgmt == 0x0;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTAVAILABLE(DEV04)
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV05] == 0x0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ACSATA_PORT5),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ACHDD_5),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ endif;
+
+ suppressif ideqval SETUP_DATA.AcousticPwrMgmt == 0x0 OR ideqval SETUP_DATA.AcousticSupported[DEV05] == 0x0;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_PRESENT(DEV05)
+ endif;
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV05] == 0x0 OR
+ ideqval SETUP_DATA.AcousticSupported[DEV05] == 0x1 OR
+ ideqval SETUP_DATA.AcousticPwrMgmt == 0x0;
+ grayoutif ideqval SETUP_DATA.AcousticPwrMgmt == 0x1;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTSUPPORTED(DEV05)
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.AcDevicePresent[DEV05] == 0x0 OR ideqval SETUP_DATA.AcousticPwrMgmt == 0x1;
+ grayoutif ideqval SETUP_DATA.AcousticPwrMgmt == 0x0;
+ ACOUSTIC_ONEOF_ACOUSTICLEVELINDV_NOTAVAILABLE(DEV05)
+ SUPPRESS_GRAYOUT_ENDIF
+
+ #endif
+
+ endform;//end form SATA_DEVICE_OPTIONS_FORM_ID
+#endif // END #if ACOUSTIC_FORM_MAIN
+
+ #endif // FORM_SET_ITEM
+
+#endif // ADVANCED_FORM_SET
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/IdeAcoustic/Acoustic.sdl b/Board/EM/IdeAcoustic/Acoustic.sdl
new file mode 100644
index 0000000..4303871
--- /dev/null
+++ b/Board/EM/IdeAcoustic/Acoustic.sdl
@@ -0,0 +1,137 @@
+TOKEN
+ Name = ACOUSTIC_MANAGEMENT_DRIVER_SUPPORT
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Help = "Main switch to enable Acoustic Management support in Project"
+End
+
+PATH
+ Name = "ACOUSTIC_DIR"
+End
+
+MODULE
+ Help = "Includes Aoustic.mak to Project"
+ File = "Acoustic.mak"
+End
+
+TOKEN
+ Name = "INDIVIDUAL_ACOUSTIC_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "ACOUSTIC_MANAGEMENT_DRIVER_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "ACOUSTIC_DEVICE_COUNT"
+ Value = "6"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Help = "Default number of devices that may have Acoustic support. If you need to add more than 6 devices acoustic.sd and AcousticSetup.c file also needs to be changed"
+End
+
+TOKEN
+ Name = "IDE_CONTROLLER_LOCATION"
+ Value = "{0, 0x1F, 2}"
+ TokenType = Expression
+ TargetH = Yes
+ Help = "Bus, Device and Function of the First IDE (SATA) controller."
+ Token = "ACOUSTIC_MANAGEMENT_DRIVER_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "NUMBER_OF_PORTS_ON_FIRST_CONTROLLER"
+ Value = "4"
+ TokenType = Integer
+ TargetH = Yes
+ Help = "Number of Ports on First IDE (SATA) controller."
+ Token = "ACOUSTIC_MANAGEMENT_DRIVER_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "SECOND_CONTROLLER_LOCATION"
+ Value = "{0, 0x1F, 5}"
+ TokenType = Expression
+ TargetH = Yes
+ Help = "Location of second IDE (SATA) controller (if any)."
+ Token = "ACOUSTIC_MANAGEMENT_DRIVER_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "NUMBER_OF_PORTS_ON_SECOND_CONTROLLER"
+ Value = "2"
+ TokenType = Integer
+ TargetH = Yes
+ Help = "Number of Ports on second IDE (SATA) controller (if any)."
+ Token = "ACOUSTIC_MANAGEMENT_DRIVER_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "SECOND_CONTROLLER_COUNTS_BY_DEVICE"
+ Value = "0"
+ TokenType = BOOLEAN
+ TargetH = Yes
+ Help = "ON - Second controller increments the device no. only for ports after 0. OFF - Second controller increments like first controller."
+ Token = "ACOUSTIC_MANAGEMENT_DRIVER_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "ACOUSTIC_MANAGEMENT_SUPPORT"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Help = "Keep this Token always OFF."
+ Lock = Yes
+ Token = "ACOUSTIC_MANAGEMENT_DRIVER_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "LOCAL_ACOUSTIC_SETUP"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Help = "ON - Setup questions are in this module./OFF - Setup questions are with SATA Driver."
+ Token = "ACOUSTIC_MANAGEMENT_DRIVER_SUPPORT" "=" "1"
+End
+
+ELINK
+ Name = "InitAcousticStrings,"
+ Parent = "SetupStringInit"
+ InvokeOrder = AfterParent
+ Token = "LOCAL_ACOUSTIC_SETUP" "=" "1"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\Acoustic.sdb"
+ Parent = "SETUP_SDBS"
+ Token = "LOCAL_ACOUSTIC_SETUP" "=" "1"
+ Priority = 30
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(ACOUSTIC_DIR)\Acoustic.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Token = "LOCAL_ACOUSTIC_SETUP" "=" "1"
+ Priority = 30
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\Acoustic.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/IdeAcoustic/Acoustic.uni b/Board/EM/IdeAcoustic/Acoustic.uni
new file mode 100644
index 0000000..3bc1610
--- /dev/null
+++ b/Board/EM/IdeAcoustic/Acoustic.uni
Binary files differ
diff --git a/Board/EM/IdeAcoustic/AcousticBoard.c b/Board/EM/IdeAcoustic/AcousticBoard.c
new file mode 100644
index 0000000..449a2e4
--- /dev/null
+++ b/Board/EM/IdeAcoustic/AcousticBoard.c
@@ -0,0 +1,460 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/HddAcoustic/AcousticBoard.c 6 6/09/14 10:02a Anbuprakashp $
+//
+// $Revision: 6 $
+//
+// $Date: 6/09/14 10:02a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/HddAcoustic/AcousticBoard.c $
+//
+// 6 6/09/14 10:02a Anbuprakashp
+// [TAG] EIP172447
+// [Category] Improvement
+// [Description] Runtime attribute set for the some of the variable used
+// by HddAcoustic driver(Aptio-IV) that needs to be reviewed
+// [Files] AcousticBoard.c
+//
+// 5 3/05/12 3:12a Rameshr
+// [TAG] EIP82971
+// [Category] Improvement
+// [Description] Added dynamich PCIe base Support in IdeAcoustic
+// [Files] AcousticBoard.c, AcousticSetup.c
+//
+// 4 2/10/11 11:27a Pats
+// [TAG] - EIP 52920
+// [Category]- Function Request
+// [Severity]- Minor
+// [Symptom] - The Acoustic mode (Bypass/Quiet/Max Performance) of port 5
+// is invalid on AMD SB700.
+// [RootCause] - Special case where 2nd controller counts by incrementing
+// device number only not handled properly
+// [Solution] - Modified functions that handle this case.
+// [Files] - Acoustic.c, AcousticBoard.c, AcousticSetup.c
+//
+// 3 1/07/11 12:14p Pats
+// Handles counting of devices on second controller differently depending
+// on token SECOND_CONTROLLER_COUNTS_BY_DEVICE.
+//
+// 2 1/06/11 4:38p Pats
+// On some platforms, the 2nd controller is present, but not used, in AHCI
+// mode. The 2nd controller should not be registered in this case.
+// InstallAcousticPlatformProtocol() is modified to not register the 2nd
+// controller in AHCI mode.
+//
+// 1 1/05/11 12:22a Rameshr
+// Initial check-in for Hdd Acoustic Management Support.
+//
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AcousticBoard.C
+//
+// Description: This file contains DXE stage board component code for Acoustic
+// support
+//
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include "Acoustic.h"
+
+#define BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID \
+ {0xdbc9fd21, 0xfad8, 0x45b0, 0x9e, 0x78, 0x27, 0x15, 0x88, 0x67, 0xcc, 0x93}
+
+EFI_GUID BdsAllDriversConnectedProtocolGuid = BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID;
+EFI_GUID SetupEnterProtocolGuid = AMITSE_SETUP_ENTER_GUID;
+EFI_GUID gSetupGuid = SETUP_GUID;
+EFI_GUID gAcousticSetupProtocolguid = ACOUSTIC_SETUP_PROTOCOL_GUID;
+
+VOID *gAcousticNotifyReg = NULL;
+VOID *gAcousticProgNotifyReg = NULL;
+VOID *gAcousticSetupNotifyReg = NULL;
+UINT8 gIdeControllerLocation[] = IDE_CONTROLLER_LOCATION;
+UINT8 gIdeControllerLocation2[] = SECOND_CONTROLLER_LOCATION;
+
+ACOUSTIC_SETUP_PROTOCOL *gAcousticSetupProtocol2 = NULL;
+ACOUSTIC_SETUP_PROTOCOL *gAcousticSetupProtocol5 = NULL;
+
+VOID InstallAcousticPlatformProtocol(IN EFI_EVENT Event, IN VOID *Context);
+VOID SetupEntryCallback(IN EFI_EVENT Event, IN VOID *Context);
+VOID AcousticProgramming(IN EFI_EVENT Event, IN VOID *Context);
+
+#if DYNAMIC_PCIEXBASE_SUPPORT
+UINT32 GetPciBaseAddr(VOID);
+#define PCIEX_BASE GetPciBaseAddr()
+#else
+#define PCIEX_BASE PCIEX_BASE_ADDRESS
+#endif
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: Acoustic_BoardInit
+//
+// Description: This function installs the the ACOUSTIC_SETUP_PROTOCOL which
+// would be used in ahci/ide bus driver.
+//
+// Input: ImageHandle - ImageHandle of the loaded driver
+// SystemTable - Pointer to the System Table
+//
+// Output: EFI_SUCCESS
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+Acoustic_BoardInit (
+IN EFI_HANDLE ImageHandle,
+IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+ EFI_EVENT Event;
+
+ InitAmiLib(ImageHandle, SystemTable);
+
+#if LOCAL_ACOUSTIC_SETUP
+ Status = RegisterProtocolCallback( &gEfiPciIoProtocolGuid,
+ InstallAcousticPlatformProtocol,
+ NULL,
+ &Event,
+ &gAcousticNotifyReg );
+ ASSERT_EFI_ERROR(Status);
+#endif
+
+ Status = RegisterProtocolCallback( &BdsAllDriversConnectedProtocolGuid,
+ AcousticProgramming,
+ NULL,
+ &Event,
+ &gAcousticProgNotifyReg );
+
+ ASSERT_EFI_ERROR(Status);
+ //
+ //Install callback on entring into Setup
+ //
+ Status = RegisterProtocolCallback( &SetupEnterProtocolGuid,
+ SetupEntryCallback,
+ NULL,
+ &Event,
+ &gAcousticSetupNotifyReg);
+ ASSERT_EFI_ERROR(Status);
+
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: InstallAcousticPlatformProtocol
+//
+// Description: This function initializes some Setup values and Acoustic
+// Protocol values.
+//
+// Input: IN EFI_EVENT Event
+// IN VOID *Context
+//
+// Output: None
+//
+// Notes: This needs to be ported for each controller.
+// gAcousticSetupProtocolguid needs to be installed for each IDE/SATA
+// controller on the system.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+InstallAcousticPlatformProtocol (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+)
+{
+ EFI_STATUS Status;
+ UINTN BufferSize = sizeof (EFI_HANDLE);
+ EFI_HANDLE Handle;
+ UINTN PciSeg;
+ UINTN PciBus;
+ UINTN PciDev;
+ UINTN PciFun;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT8 i;
+ SETUP_DATA *SetupData = NULL;
+ UINTN VariableSize = NULL;
+ ACOUSTIC_SETUP_PROTOCOL *gAcousticSetupProtocol;
+ UINTN PciAddress;
+ UINT8 SataMode;
+ //
+ // Callback on PCIIo Protocol
+ //
+ Status = pBS->LocateHandle( ByRegisterNotify,
+ NULL,
+ gAcousticNotifyReg,
+ &BufferSize,
+ &Handle );
+ ASSERT_EFI_ERROR(Status);
+
+ if (EFI_ERROR(Status)) {
+ return;
+ }
+ //
+ // Locate PciIo protocol installed on Handle
+ //
+ Status = pBS->HandleProtocol( Handle, &gEfiPciIoProtocolGuid, &PciIo );
+ ASSERT_EFI_ERROR(Status);
+ //
+ // Get PCI Device Bus/Device/Function Numbers
+ //
+ Status = PciIo->GetLocation( PciIo, &PciSeg, &PciBus, &PciDev, &PciFun );
+ ASSERT_EFI_ERROR(Status);
+
+ if (EFI_ERROR(Status)) {
+ return;
+ }
+ if ( ((PciBus == gIdeControllerLocation[0]) && \
+ (PciDev == gIdeControllerLocation[1]) && \
+ (PciFun == gIdeControllerLocation[2])) || \
+ ((PciBus == gIdeControllerLocation2[0]) && \
+ (PciDev == gIdeControllerLocation2[1]) && \
+ (PciFun == gIdeControllerLocation2[2])) ) {
+
+ PciAddress = MmPciAddress(PCIEX_BASE,
+ gIdeControllerLocation[0],
+ gIdeControllerLocation[1],
+ gIdeControllerLocation[2],
+ PCI_SCC);
+
+ SataMode = *((volatile UINT8 *)(UINTN)(PciAddress));
+
+ if ( (PciBus == gIdeControllerLocation2[0]) && \
+ (PciDev == gIdeControllerLocation2[1]) && \
+ (PciFun == gIdeControllerLocation2[2]) && \
+ (SataMode != PCI_CL_MASS_STOR_SCL_IDE) ) {
+ return; // If in AHCI mode, don't register 2nd controller.
+ }
+
+ Status = pBS->AllocatePool (EfiBootServicesData,
+ sizeof(ACOUSTIC_SETUP_PROTOCOL),
+ (VOID**)&gAcousticSetupProtocol);
+ if (EFI_ERROR(Status)) {
+ return;
+ }
+
+ Status = pBS->AllocatePool(EfiBootServicesData,
+ ACOUSTIC_DEVICE_COUNT,
+ &gAcousticSetupProtocol->AcousticSupportIndv);
+
+ ASSERT_EFI_ERROR (Status);
+ if (EFI_ERROR(Status)) {
+ return;
+ }
+
+ pBS->SetMem(gAcousticSetupProtocol->AcousticSupportIndv, ACOUSTIC_DEVICE_COUNT, 0);
+
+ Status = pBS->AllocatePool(EfiBootServicesData,
+ ACOUSTIC_DEVICE_COUNT,
+ &gAcousticSetupProtocol->AcousticLevelIndv);
+
+ ASSERT_EFI_ERROR (Status);
+ if (EFI_ERROR(Status)) {
+ return;
+ }
+
+ pBS->SetMem(gAcousticSetupProtocol->AcousticLevelIndv, ACOUSTIC_DEVICE_COUNT, 0);
+
+ Status = pBS->AllocatePool(EfiBootServicesData,
+ ACOUSTIC_DEVICE_COUNT,
+ &gAcousticSetupProtocol->DeviceDetected);
+
+ ASSERT_EFI_ERROR (Status);
+ if (EFI_ERROR(Status)) {
+ return;
+ }
+
+ pBS->SetMem(gAcousticSetupProtocol->DeviceDetected, ACOUSTIC_DEVICE_COUNT, 0);
+
+ gAcousticSetupProtocol->ControllerNumber = 0;
+
+ if ( (PciBus == gIdeControllerLocation2[0]) && \
+ (PciDev == gIdeControllerLocation2[1]) && \
+ (PciFun == gIdeControllerLocation2[2]) ) {
+ gAcousticSetupProtocol->ControllerNumber = 1;
+ }
+
+ Status = GetEfiVariable( L"Setup",
+ &gSetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData);
+
+ if (!EFI_ERROR(Status)) {
+ gAcousticSetupProtocol->DeviceCount = ACOUSTIC_DEVICE_COUNT;
+ gAcousticSetupProtocol->AcousticPwrMgmt = SetupData->AcousticPwrMgmt;
+ gAcousticSetupProtocol->AcousticLevel = SetupData->AcousticLevel;
+
+#if INDIVIDUAL_ACOUSTIC_SUPPORT
+ if ( (PciBus == gIdeControllerLocation2[0]) && \
+ (PciDev == gIdeControllerLocation2[1]) && \
+ (PciFun == gIdeControllerLocation2[2]) ) {
+ for (i = 0; i < NUMBER_OF_PORTS_ON_SECOND_CONTROLLER ; i++ ) { // Only 2 ports on 2nd controller
+ if (gAcousticSetupProtocol->AcousticPwrMgmt) {
+ gAcousticSetupProtocol->AcousticLevelIndv[i] =
+ SetupData->AcousticLevelIndv[i+NUMBER_OF_PORTS_ON_FIRST_CONTROLLER];
+ } else {
+ gAcousticSetupProtocol->AcousticLevelIndv[i] = ACOUSTIC_SUPPORT_DISABLE;
+ }
+ }
+ } else {
+ for (i = 0; i<ACOUSTIC_DEVICE_COUNT; i++ ) {
+ if (gAcousticSetupProtocol->AcousticPwrMgmt) {
+ gAcousticSetupProtocol->AcousticLevelIndv[i] = SetupData->AcousticLevelIndv[i];
+ } else {
+ gAcousticSetupProtocol->AcousticLevelIndv[i] = ACOUSTIC_SUPPORT_DISABLE;
+ }
+ }
+ }
+#else
+ for (i = 0; i<ACOUSTIC_DEVICE_COUNT; i++ ){
+ if (gAcousticSetupProtocol->AcousticPwrMgmt) {
+ gAcousticSetupProtocol->AcousticLevelIndv[i] = SETUP_DATA.AcousticLevel;
+ } else {
+ gAcousticSetupProtocol->AcousticLevelIndv[i] = ACOUSTIC_SUPPORT_DISABLE;
+ }
+ }
+
+#endif
+ } else {
+ //
+ //Incase setup data is not available, initilaize with some defaults
+ //
+ gAcousticSetupProtocol->AcousticPwrMgmt = ACOUSTIC_SUPPORT_DISABLE;
+ gAcousticSetupProtocol->AcousticLevel = ACOUSTIC_LEVEL_BYPASS;
+#if INDIVIDUAL_ACOUSTIC_SUPPORT
+ for (i = 0; i<ACOUSTIC_DEVICE_COUNT; i++ ){
+ gAcousticSetupProtocol->AcousticLevelIndv[i] = ACOUSTIC_LEVEL_BYPASS;
+ }
+#endif
+ }
+ //
+ //Install AcousticSetup Protocol on the ""Controller""
+ //
+ Status = pBS->InstallProtocolInterface(
+ &Handle,
+ &gAcousticSetupProtocolguid,
+ EFI_NATIVE_INTERFACE,
+ gAcousticSetupProtocol
+ );
+
+ if ( (PciBus == gIdeControllerLocation2[0]) && \
+ (PciDev == gIdeControllerLocation2[1]) && \
+ (PciFun == gIdeControllerLocation2[2]) ) {
+ gAcousticSetupProtocol5 = gAcousticSetupProtocol;
+ } else {
+ gAcousticSetupProtocol2 = gAcousticSetupProtocol;
+ }
+ }
+
+ if (SetupData) {
+ pBS->FreePool (SetupData);
+ }
+
+ if (gAcousticSetupProtocol2 && gAcousticSetupProtocol5) {
+ Status = pBS->CloseEvent (Event);
+ }
+
+ return;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SetupEntryCallback
+//
+// Description: This function loads setup variables with Acoustic protocol values
+//
+// Input: IN EFI_EVENT Event
+// IN VOID *Context
+//
+// Output: None
+//
+// Notes: This needs to be ported for each controller.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+SetupEntryCallback (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+)
+{
+ EFI_STATUS Status;
+ SETUP_DATA *SetupData = NULL;
+ UINTN VariableSize = NULL;
+ UINT8 i;
+ UINT32 SetupDataAttributes = 0;
+
+ //
+ // Kill the Event once It's exected.
+ //
+ Status = pBS->CloseEvent (Event);
+ //
+ // If the protocol not used, return
+ //
+ if (gAcousticSetupProtocol2 == NULL) return;
+
+ Status = GetEfiVariable( L"Setup",
+ &gSetupGuid,
+ &SetupDataAttributes,
+ &VariableSize,
+ &SetupData);
+
+ for (i = 0; i < gAcousticSetupProtocol2->DeviceCount; i++) {
+ SetupData->AcousticSupported[i] = gAcousticSetupProtocol2->AcousticSupportIndv[i];
+ SetupData->AcDevicePresent[i] = gAcousticSetupProtocol2->DeviceDetected[i];
+ }
+
+ if ( gAcousticSetupProtocol5 != NULL ) {
+ for (i = 0; i < NUMBER_OF_PORTS_ON_SECOND_CONTROLLER ; i++) { // Only 2 ports on 2nd controller
+ SetupData->AcousticSupported[i + NUMBER_OF_PORTS_ON_FIRST_CONTROLLER] =
+ gAcousticSetupProtocol5->AcousticSupportIndv[i];
+ SetupData->AcDevicePresent[i + NUMBER_OF_PORTS_ON_FIRST_CONTROLLER] =
+ gAcousticSetupProtocol5->DeviceDetected[i];
+ }
+ }
+
+ Status = pRS->SetVariable(L"Setup",
+ &gSetupGuid,
+ SetupDataAttributes,
+ sizeof(SETUP_DATA),
+ SetupData);
+
+ if (SetupData) {
+ pBS->FreePool (SetupData);
+ }
+
+ return;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/IdeAcoustic/AcousticSetup.c b/Board/EM/IdeAcoustic/AcousticSetup.c
new file mode 100644
index 0000000..605d33b
--- /dev/null
+++ b/Board/EM/IdeAcoustic/AcousticSetup.c
@@ -0,0 +1,332 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/HddAcoustic/AcousticSetup.c 7 3/05/12 3:14a Rameshr $
+//
+// $Revision: 7 $
+//
+// $Date: 3/05/12 3:14a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/HddAcoustic/AcousticSetup.c $
+//
+// 7 3/05/12 3:14a Rameshr
+// [TAG] EIP82971
+// [Category] Improvement
+// [Description] Added dynamich PCIe base Support in IdeAcoustic
+// [Files] AcousticBoard.c, AcousticSetup.c
+//
+// 6 1/24/12 1:42a Rameshr
+// [TAG] EIP67652
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Build error when token SB_SETUP_SUPPORT disabled
+// [RootCause] Unresolved external symbol
+// gEfiDiskInfoProtocolGuid,SwapEntries referenced in function
+// InitAcousticStrings
+// [Solution] Added gEfiDiskInfoProtocolGuid and SwapEntries function
+// locally
+// [Files] AcousticSetup.c
+//
+// 5 2/10/11 11:28a Pats
+// [TAG] - EIP 52920
+// [Category]- Function Request
+// [Severity]- Minor
+// [Symptom] - The Acoustic mode (Bypass/Quiet/Max Performance) of port 5
+// is invalid on AMD SB700.
+// [RootCause] - Special case where 2nd controller counts by incrementing
+// device number only not handled properly
+// [Solution] - Modified functions that handle this case.
+// [Files] - Acoustic.c, AcousticBoard.c, AcousticSetup.c
+//
+// 4 1/07/11 5:52p Pats
+// Added processing for SECOND_CONTROLLER_COUNTS_BY_DEVICE token.
+//
+// 3 1/07/11 12:15p Pats
+// Changed how devices on second controller are handled.
+//
+// 2 1/05/11 6:33p Pats
+// Made more generic. Removed all south bridge-specific references.
+//
+// 1 1/05/11 12:22a Rameshr
+// Initial check-in for Hdd Acoustic Management Support.
+//
+//**********************************************************************
+
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AcousticSetup.c
+//
+// Description: This file contains functions used by the Acoustic module
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include <SetupStrTokens.h>
+#if (EFI_SPECIFICATION_VERSION >= 0x0002000A)
+#include <UefiHii.h>
+#else
+#include <Protocol\HII.h>
+#endif
+#include <Protocol\DevicePath.h>
+#include "Acoustic.h"
+
+#if DYNAMIC_PCIEXBASE_SUPPORT
+UINT32 GetPciBaseAddr(VOID);
+#define PCIEX_BASE GetPciBaseAddr()
+#else
+#define PCIEX_BASE PCIEX_BASE_ADDRESS
+#endif
+#if LOCAL_ACOUSTIC_SETUP
+#include <Protocol\PDiskInfo.h>
+
+static EFI_GUID gEfiDiskInfoProtocolGuid = EFI_DISK_INFO_PROTOCOL_GUID;
+
+UINT8 gIdeControllerLocation[] = IDE_CONTROLLER_LOCATION;
+UINT8 gIdeControllerLocation2[] = SECOND_CONTROLLER_LOCATION;
+
+//
+// Add more elements if there are more than 6 SATA ports
+//
+STRING_REF DevStrings[] = {
+STRING_TOKEN( STR_ACHDD_0 ),
+STRING_TOKEN( STR_ACHDD_1 ),
+STRING_TOKEN( STR_ACHDD_2 ),
+STRING_TOKEN( STR_ACHDD_3 ),
+STRING_TOKEN( STR_ACHDD_4 ),
+STRING_TOKEN( STR_ACHDD_5 ),
+};
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: Swap_Entries
+//
+// Description:
+//
+// Inpuut: IN CHAR8 *Data,
+// IN UINT16 Size
+//
+// Output: None
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID Swap_Entries (
+ IN CHAR8 *Data,
+ IN UINT16 Size
+)
+{
+ UINT16 Index;
+ CHAR8 Temp8;
+
+ for (Index = 0; (Index+1) < Size; Index+=2) {
+ Temp8 = Data[Index];
+ Data[Index] = Data[Index + 1];
+ Data[Index + 1] = Temp8;
+ }
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: InitAcousticStrings
+//
+// Description: Initialize Acoustic misc configuration strings.
+//
+// Input:
+// IN EFI_HII_HANDLE HiiHandle
+// IN UINT16 Class
+//
+// Output:
+// VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID
+InitAcousticStrings(
+ EFI_HII_HANDLE HiiHandle,
+ UINT16 Class
+)
+{
+ EFI_STATUS Status;
+ PCI_DEVICE_PATH *PciDevicePath;
+ CHAR8 *NewString;
+ UINT8 Index;
+ UINT8 SataMode;
+ UINTN HandleCount;
+ EFI_HANDLE *HandleBuffer;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathNode;
+ EFI_DISK_INFO_PROTOCOL *DiskInfo;
+ UINT32 IdeDevice, IdeChannel;
+ IDENTIFY_DATA *IdentifyDriveInfo = NULL;
+ UINT32 BufferSize = 0;
+ STRING_REF Token;
+ CHAR8 ModelNumber[43];
+ UINTN PciAddress;
+ UINT8 IdeControllerLocation[] = IDE_CONTROLLER_LOCATION;
+
+ if (Class == ADVANCED_FORM_SET_CLASS) {
+ Status = pBS->AllocatePool(EfiBootServicesData, 43, &NewString);
+ ASSERT_EFI_ERROR(Status);
+
+ PciDevicePath = NULL;
+
+ PciAddress = MmPciAddress(PCIEX_BASE,
+ IdeControllerLocation[0],
+ IdeControllerLocation[1],
+ IdeControllerLocation[2],
+ PCI_SCC);
+
+ SataMode = *((volatile UINT8 *)(UINTN)(PciAddress));
+
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiDiskInfoProtocolGuid,
+ NULL,
+ &HandleCount,
+ &HandleBuffer
+ );
+ if (EFI_ERROR(Status)) {
+ HandleCount = 0;
+ }
+
+ for (Index = 0; Index < HandleCount; Index++) {
+ Status = pBS->HandleProtocol (
+ HandleBuffer[Index],
+ &gEfiDevicePathProtocolGuid,
+ (VOID *) &DevicePath
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ DevicePathNode = DevicePath;
+ while (!isEndNode (DevicePathNode)) {
+ if ((DevicePathNode->Type == HARDWARE_DEVICE_PATH) &&
+ (DevicePathNode->SubType == HW_PCI_DP)) {
+ PciDevicePath = (PCI_DEVICE_PATH *) DevicePathNode;
+ break;
+ }
+
+ DevicePathNode = NEXT_NODE (DevicePathNode);
+ }
+
+ if (PciDevicePath == NULL) {
+ continue;
+ }
+
+ if ( ((PciDevicePath->Device == gIdeControllerLocation[1]) && \
+ (PciDevicePath->Function == gIdeControllerLocation[2])) || \
+ ((PciDevicePath->Device == gIdeControllerLocation2[1]) && \
+ (PciDevicePath->Function == gIdeControllerLocation2[2])) ) {
+ Status = pBS->HandleProtocol (
+ HandleBuffer[Index],
+ &gEfiDiskInfoProtocolGuid,
+ &DiskInfo
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = DiskInfo->WhichIde (
+ DiskInfo,
+ &IdeChannel,
+ &IdeDevice
+ );
+ if (SataMode == PCI_CL_MASS_STOR_SCL_IDE) { // IDE MODE
+
+ IdeDevice = (IdeChannel * 2) + IdeDevice;
+
+#if SECOND_CONTROLLER_COUNTS_BY_DEVICE
+ if ( (PciDevicePath->Device == gIdeControllerLocation2[1]) && \
+ (PciDevicePath->Function == gIdeControllerLocation2[2]) ) { //Port 4, 5 in SATA2
+ IdeDevice += 4;
+ }
+#endif
+ if (IdeDevice == 1 || IdeDevice == 2) { // SINDX ¡V Serial ATA Index (D31:F2)
+ IdeDevice ^= 3; // Port 0 = Primary Master
+ } // Port 2 = Primary Slave
+#if !SECOND_CONTROLLER_COUNTS_BY_DEVICE
+ if ( (PciDevicePath->Device == gIdeControllerLocation2[1]) && \
+ (PciDevicePath->Function == gIdeControllerLocation2[2]) ) { //Port 4, 5 in SATA2
+ IdeDevice += 4;
+ }
+#endif
+ IdeChannel = IdeDevice;
+ } // SATA MODE
+ Token = DevStrings[IdeChannel];
+
+ Status = pBS->AllocatePool(EfiBootServicesData, sizeof (IDENTIFY_DATA), &IdentifyDriveInfo);
+ ASSERT_EFI_ERROR (Status);
+
+ pBS->SetMem(IdentifyDriveInfo, sizeof (IDENTIFY_DATA), 0);
+
+ BufferSize = sizeof (IDENTIFY_DATA);
+ Status = DiskInfo->Identify (
+ DiskInfo,
+ IdentifyDriveInfo,
+ &BufferSize
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ } else {
+ //
+ // Off board
+ //
+ continue;
+ }
+
+ pBS->SetMem(ModelNumber, 42, 0x20);
+ pBS->CopyMem (ModelNumber+2, IdentifyDriveInfo->Model_Number_27, 40);
+ Swap_Entries (ModelNumber+2, 40);
+ ModelNumber[42] = '\0';
+
+ Sprintf(NewString, "%a", ModelNumber);
+
+ InitString(
+ HiiHandle,
+ Token,
+ L"%a",
+ NewString
+ );
+
+ if (IdentifyDriveInfo) {
+ pBS->FreePool (IdentifyDriveInfo);
+ IdentifyDriveInfo = NULL;
+ }
+ }
+
+ if (HandleBuffer) {
+ pBS->FreePool (HandleBuffer);
+ }
+
+ pBS->FreePool (NewString);
+ }
+}
+#endif
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/IdeBusBoard/IdeBusBoard.c b/Board/EM/IdeBusBoard/IdeBusBoard.c
new file mode 100644
index 0000000..b21bc57
--- /dev/null
+++ b/Board/EM/IdeBusBoard/IdeBusBoard.c
@@ -0,0 +1,664 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/BIN/Core/Modules/IdeBus/IdeBusBoard.c 2 9/27/11 2:50a Rajeshms $
+//
+// $Revision: 2 $
+//
+// $Date: 9/27/11 2:50a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Core/Modules/IdeBus/IdeBusBoard.c $
+//
+// 2 9/27/11 2:50a Rajeshms
+// [TAG] EIP69295
+// [Category] Improvement
+// [Description] The Timeout values used by IDE and AHCI drivers are
+// made as SDL tokens, so that the timeout values can be varied.
+// [Files] IdeBusBoard.c, CORE_DXE.sdl, AhciSmm.h, AhciBus.h, IDESMM.h,
+// Ata.c, Atapi.c, IdeBus.c, IdeBus.h, IdeBusMaster.c, IdeBusBoard.h
+//
+// 1 8/25/10 5:37a Rameshr
+// New Feature: EIP 37748
+// Description: Move all the IDEBus Source driver SDL token into IdeBus
+// Bin Driver.
+// FilesModified: Ata.c, Atapi.c, idebus.c, IdeBus.h,
+// IdebuscomponentName.c, IdeBusmaster.c IdeBusSrc.mak IdebusSrc.sdl
+// IdeHpa.c, IdePowerManagement.c
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IdeBusBoard.c
+//
+// Description: Installs PlatformIdeProtocol Interface and Initializes it.
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#include <AmiDxeLib.h>
+#include <EFI.h>
+#include <Dxe.h>
+#include <Token.h>
+#include <Protocol\IdeBusBoard.h>
+
+#include <Protocol\PciIo.h>
+#include <Protocol\PIDEController.h>
+#include <Protocol\IdeControllerInit.h>
+#include <Protocol\ComponentName.h>
+
+EFI_GUID PlatformIdeProtocolGuid = PLATFORM_IDE_PROTOCOL_GUID;
+
+PLATFORM_IDE_PROTOCOL PlatformIdeProtocol= {
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: Revision
+//
+// Description: Variable contains the Revision of PLATFORM_IDE_PROTOCOL.
+//
+// Notes: UINT8
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+PLATFORM_IDE_PROTOCOL_REVISION,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: MasterSlaveEnumeration
+//
+// Description: Variable to replace MASTER_SLAVE_ENUMERATION token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+#ifdef MASTER_SLAVE_ENUMERATION
+ MASTER_SLAVE_ENUMERATION
+#else
+ 0
+#endif
+ ,
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: IdeBusMasterSupport
+//
+// Description: Variable to replace IDEBUSMASTER_SUPPORT token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef IDEBUSMASTER_SUPPORT
+ IDEBUSMASTER_SUPPORT
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: AtapiBusMasterSupport
+//
+// Description: Variable to replace ATAPI_BUSMASTER_SUPPORT token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef ATAPI_BUSMASTER_SUPPORT
+ ATAPI_BUSMASTER_SUPPORT
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: AcousticManagementSupport
+//
+// Description: Variable to replace ACOUSTIC_MANAGEMENT_SUPPORT token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef ACOUSTIC_MANAGEMENT_SUPPORT
+ ACOUSTIC_MANAGEMENT_SUPPORT
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: IdePowerManagementSupport
+//
+// Description: Variable to replace IDE_POWER_MANAGEMENT_SUPPORT token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef IDE_POWER_MANAGEMENT_SUPPORT
+ IDE_POWER_MANAGEMENT_SUPPORT
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: StandbyTimeout
+//
+// Description: Variable to replace STANDBY_TIMEOUT token.
+//
+// Notes: INT16
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef STANDBY_TIMEOUT
+ STANDBY_TIMEOUT
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: AdvPowerManagementSupport
+//
+// Description: Variable to replace ADVANCED_POWER_MANAGEMENT_SUPPORT token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef ADVANCED_POWER_MANAGEMENT_SUPPORT
+ ADVANCED_POWER_MANAGEMENT_SUPPORT
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: AdvPowerManagementLevel
+//
+// Description: Variable to replace ADVANCED_POWER_MANAGEMENT_LEVEL token.
+//
+// Notes: UINT8
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef ADVANCED_POWER_MANAGEMENT_LEVEL
+ ADVANCED_POWER_MANAGEMENT_LEVEL
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: PowerupInStandbySupport
+//
+// Description: Variable to replace POWERUP_IN_STANDBY_SUPPORT token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef POWERUP_IN_STANDBY_SUPPORT
+ POWERUP_IN_STANDBY_SUPPORT
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: PowerupInStandbyMode
+//
+// Description: Variable to replace POWERUP_IN_STANDBY_MODE token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef POWERUP_IN_STANDBY_MODE
+ POWERUP_IN_STANDBY_MODE
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: IdePwrManagementInterfaceSupport
+//
+// Description: Variable to replace IDE_POWER_MANAGEMENT_INTERFACE_SUPPORT token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef IDE_POWER_MANAGEMENT_INTERFACE_SUPPORT
+ IDE_POWER_MANAGEMENT_INTERFACE_SUPPORT
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: HostProtectedAreaSupport
+//
+// Description: Variable to replace HOST_PROTECTED_AREA_SUPPORT token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef HOST_PROTECTED_AREA_SUPPORT
+ HOST_PROTECTED_AREA_SUPPORT
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: IdeHPSupport
+//
+// Description: Variable to replace IDE_HP_SUPPORT token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef IDE_HP_SUPPORT
+ IDE_HP_SUPPORT
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: EfiIdeProtocol
+//
+// Description: Variable to replace EFI_IDE_PROTOCOL token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef EFI_IDE_PROTOCOL
+ EFI_IDE_PROTOCOL
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: AhciCompatibleMode
+//
+// Description: Variable to replace AHCI_COMPATIBLE_MODE token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef AHCI_COMPATIBLE_MODE
+ AHCI_COMPATIBLE_MODE
+#else
+ 0
+#endif
+ ,
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: SBIdeSupport
+//
+// Description: Variable to replace SBIDE_SUPPORT token.
+//
+// Notes: const BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef SBIDE_SUPPORT
+ SBIDE_SUPPORT
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: HddPowerLossInS3
+//
+// Description: Variable to replace HDD_POWER_LOSS_IN_S3 token.
+//
+// Notes: const BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef HDD_POWER_LOSS_IN_S3
+ HDD_POWER_LOSS_IN_S3
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: DiPMSupport
+//
+// Description: Variable to replace DiPM_SUPPORT token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef DiPM_SUPPORT
+ DiPM_SUPPORT
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: DisableSoftSetPrev
+//
+// Description: Variable to replace DISABLE_SOFT_SET_PREV token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef DISABLE_SOFT_SET_PREV
+ DISABLE_SOFT_SET_PREV
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: ForceHddPasswordPrompt
+//
+// Description: Variable to replace FORCE_HDD_PASSWORD_PROMPT token.
+//
+// Notes: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef FORCE_HDD_PASSWORD_PROMPT
+ FORCE_HDD_PASSWORD_PROMPT
+#else
+ 0
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: gIdeControllerProtocolGuid
+//
+// Description: Variable contains Ide Controller Protocol GUID.
+//
+// Notes: const EFI_GUID
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#if defined EFI_IDE_PROTOCOL && EFI_IDE_PROTOCOL == 1
+ EFI_IDE_CONTROLLER_INIT_PROTOCOL_GUID
+#else
+ IDE_CONTROLLER_PROTOCOL_GUID
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: gComponentNameProtocolGuid
+//
+// Description: Variable contains Component Name Protocol GUID.
+//
+// Notes: const EFI_GUID
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef EFI_COMPONENT_NAME2_PROTOCOL_GUID
+ EFI_COMPONENT_NAME2_PROTOCOL_GUID
+#else
+ EFI_COMPONENT_NAME_PROTOCOL_GUID
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: S3BusyClearTimeout
+//
+// Description: Variable to replace S3_BUSY_CLEAR_TIMEOUT token.
+//
+// Notes: const EFI_GUID
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef S3_BUSY_CLEAR_TIMEOUT
+ S3_BUSY_CLEAR_TIMEOUT
+#else
+ 10000
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: DmaAtaCompleteCommandTimeout
+//
+// Description: Variable to replace DMA_ATA_COMMAND_COMPLETE_TIMEOUT token.
+//
+// Notes: const EFI_GUID
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef DMA_ATA_COMMAND_COMPLETE_TIMEOUT
+ DMA_ATA_COMMAND_COMPLETE_TIMEOUT
+#else
+ 5000
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: DmaAtaPiCompleteCommandTimeout
+//
+// Description: Variable to replace DMA_ATAPI_COMMAND_COMPLETE_TIMEOUT token.
+//
+// Notes: const EFI_GUID
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef DMA_ATAPI_COMMAND_COMPLETE_TIMEOUT
+ DMA_ATAPI_COMMAND_COMPLETE_TIMEOUT
+#else
+ 16000
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: AtaPiResetCommandTimeout
+//
+// Description: Variable to replace ATAPI_RESET_COMMAND_TIMEOUT token.
+//
+// Notes: const EFI_GUID
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef ATAPI_RESET_COMMAND_TIMEOUT
+ ATAPI_RESET_COMMAND_TIMEOUT
+#else
+ 5000
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: AtaPiBusyClearTimeout
+//
+// Description: Variable to replace ATAPI_BUSY_CLEAR_TIMEOUT token.
+//
+// Notes: const EFI_GUID
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef ATAPI_BUSY_CLEAR_TIMEOUT
+ ATAPI_BUSY_CLEAR_TIMEOUT
+#else
+ 16000
+#endif
+ ,
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: PoweonBusyClearTimeout
+//
+// Description: Variable to replace DMA_ATA_COMMAND_COMPLETE_TIMEOUT token.
+//
+// Notes: const EFI_GUID
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#ifdef POWERON_BUSY_CLEAR_TIMEOUT
+ POWERON_BUSY_CLEAR_TIMEOUT
+#else
+ 10000
+#endif
+};
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: IdeBusBoardEntryPoint
+//
+// Description: Installs PlatformIdeProtocol Interface
+//
+// Input:
+// IN EFI_HANDLE ImageHandle,
+// IN EFI_SYSTEM_TABLE *SystemTable
+//
+// Output:
+// EFI_STATUS
+//
+// Modified:
+//
+// Referrals: InitAmiLib, InstallProtocolInterface
+//
+// Notes:
+// Here is the control flow of this function:
+// 1. Initialize Ami Lib.
+// 2. Install PlatformIdeProtocol.
+// 3. Return EFI_SUCCESS.
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+IdeBusBoardEntryPoint (
+IN EFI_HANDLE ImageHandle,
+IN EFI_SYSTEM_TABLE *SystemTable )
+{
+ EFI_STATUS Status;
+ InitAmiLib(ImageHandle,SystemTable);
+ Status = pBS->InstallProtocolInterface(\
+ &ImageHandle,\
+ &PlatformIdeProtocolGuid,\
+ EFI_NATIVE_INTERFACE,\
+ &PlatformIdeProtocol\
+ );
+ return Status;
+}
+
+#ifndef EFI_COMPONENT_NAME2_PROTOCOL_GUID //old Core Support
+//*************************************************************************
+//<AMI_PHDR_START>
+//
+// Name: LanguageCodesEqual
+//
+// Description:
+// BOOLEAN LanguageCodesEqual(CONST CHAR8* LangCode1, CONST CHAR8* LangCode2)
+// compares two language codes and returns TRUE if they are equal.
+//
+// Input:
+// CONST CHAR8* LangCode1 - first language code
+// CONST CHAR8* LangCode2 - second language code
+//
+// Output:
+// BOOLEAN TRUE - the language codes are equal
+// FALSE - the language codes are not equal
+//
+//<AMI_PHDR_END>
+//*************************************************************************
+BOOLEAN LanguageCodesEqual(
+ CONST CHAR8* LangCode1, CONST CHAR8* LangCode2
+){
+ return LangCode1[0]==LangCode2[0]
+ && LangCode1[1]==LangCode2[1]
+ && LangCode1[2]==LangCode2[2];
+}
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/IdeBusBoard/IdeBusBoard.cif b/Board/EM/IdeBusBoard/IdeBusBoard.cif
new file mode 100644
index 0000000..141029e
--- /dev/null
+++ b/Board/EM/IdeBusBoard/IdeBusBoard.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "IdeBusBoard"
+ category = ModulePart
+ LocalRoot = "Board\EM\IdeBusBoard\"
+ RefName = "IdeBusBoard"
+[files]
+"IdeBusBoard.c"
+[parts]
+"IdeBusBoardProtocol"
+"IdeBusBoardProtocol"
+<endComponent>
diff --git a/Board/EM/IntelGigabitLan/IntelGigabitLan.cif b/Board/EM/IntelGigabitLan/IntelGigabitLan.cif
new file mode 100644
index 0000000..aa2bbdb
--- /dev/null
+++ b/Board/EM/IntelGigabitLan/IntelGigabitLan.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "IntelGigabitLan"
+ category = eModule
+ LocalRoot = "Board\EM\IntelGigabitLan\"
+ RefName = "IntelGigabitLan"
+[files]
+"IntelGigabitLan.sdl"
+"IntelGigabitLan.mak"
+"IntelGigabitLanIa32.efi"
+"IntelGigabitLanx64.efi"
+<endComponent>
diff --git a/Board/EM/IntelGigabitLan/IntelGigabitLan.mak b/Board/EM/IntelGigabitLan/IntelGigabitLan.mak
new file mode 100644
index 0000000..b29395e
--- /dev/null
+++ b/Board/EM/IntelGigabitLan/IntelGigabitLan.mak
@@ -0,0 +1,59 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2004, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/BIN/Modules/Network/Intel/INTELGIGABITLAN/IntelGigabitLan.mak 1 6/11/09 5:24p Hari $
+#
+# Revision: 1 $
+#
+# $Date: 6/11/09 5:24p $
+#**********************************************************************
+# Revision History
+# ----------------
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: Zoar.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all : IntelGigabitLan
+
+IntelGigabitLan : $(BUILD_DIR)\IntelGigabitLan.ffs
+
+!IF "$(x64_BUILD)"=="1"
+$(BUILD_DIR)\IntelGigabitLan.ffs : $(IntelGigabitLan_DIR)\IntelGigabitLanx64.efi
+!ELSE
+$(BUILD_DIR)\IntelGigabitLan.ffs : $(IntelGigabitLan_DIR)\IntelGigabitLanIa32.efi
+!ENDIF
+ $(MAKE) /f Core\FFS.mak \
+ BUILD_DIR=$(BUILD_DIR) \
+ GUID=4953F720-006D-41f5-990D-0AC7742ABB60 \
+ TYPE=EFI_FV_FILETYPE_DRIVER \
+ PEFILE=$** FFSFILE=$@ COMPRESS=1 NAME=$(**B)
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2004, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#********************************************************************** \ No newline at end of file
diff --git a/Board/EM/IntelGigabitLan/IntelGigabitLan.sdl b/Board/EM/IntelGigabitLan/IntelGigabitLan.sdl
new file mode 100644
index 0000000..7ea08d2
--- /dev/null
+++ b/Board/EM/IntelGigabitLan/IntelGigabitLan.sdl
@@ -0,0 +1,26 @@
+TOKEN
+ Name = "IntelGigabitLan_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable Intel Gigabit Lan network chip support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "IntelGigabitLan_DIR"
+End
+
+MODULE
+ Help = "Includes IntelGigabitLan.mak to Project"
+ File = "IntelGigabitLan.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\IntelGigabitLan.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/IntelGigabitLan/IntelGigabitLanIa32.efi b/Board/EM/IntelGigabitLan/IntelGigabitLanIa32.efi
new file mode 100644
index 0000000..e048daf
--- /dev/null
+++ b/Board/EM/IntelGigabitLan/IntelGigabitLanIa32.efi
Binary files differ
diff --git a/Board/EM/IntelGigabitLan/IntelGigabitLanx64.efi b/Board/EM/IntelGigabitLan/IntelGigabitLanx64.efi
new file mode 100644
index 0000000..b270b72
--- /dev/null
+++ b/Board/EM/IntelGigabitLan/IntelGigabitLanx64.efi
Binary files differ
diff --git a/Board/EM/Isct/AcpiTables/Isct.asl b/Board/EM/Isct/AcpiTables/Isct.asl
new file mode 100644
index 0000000..a98416b
--- /dev/null
+++ b/Board/EM/Isct/AcpiTables/Isct.asl
@@ -0,0 +1,778 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctAcpiTables/Isct.asl 7 7/11/14 9:52a Mirayang $
+//
+// $Revision: 7 $
+//
+// $Date: 7/11/14 9:52a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctAcpiTables/Isct.asl $
+//
+// 7 7/11/14 9:52a Mirayang
+// Remove override.
+//
+// 6 7/08/14 5:09a Mirayang
+// EIP142924 iSCT 5.0 for Shark Bay Platform
+//
+// 5 5/14/13 6:29a Bensonlai
+// [TAG] EIP123328
+// [Category] Spec Update
+// [Severity] Normal
+// [Description] [SBY] Intel Smart Connect Technology 4.x BIOS Reference
+// Code
+//
+// 4 3/27/13 9:13a Bensonlai
+// [TAG] EIP118307
+// [Category] New Feature
+// [Description] Implementation of the ISCT Platform Design
+// Specification 0.8.
+// [Files] Isct.asl, IsctAcpi.c, IsctAcpi.mak
+//
+// 3 1/14/13 12:03a Bensonlai
+// [TAG] EIP112064
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] [ISCT] GWLS,SWLS,GWWS and SWWS are fail while set wake up
+// timer to RTC
+// [Solution] Implement the GWLS,SWLS,GWWS and SWWS while set wake up
+// timer to RTC
+// [Files] Isct.asl
+//
+// 2 1/13/13 5:14a Bensonlai
+// [TAG] EIP112064
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] [ISCT] GWLS,SWLS,GWWS and SWWS are fail while set wake up
+// timer to RTC
+// [Solution] Implement the GWLS,SWLS,GWWS and SWWS while set wake up
+// timer to RTC
+// [Files] Isct.asl
+//
+// 1 9/02/12 11:18p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: Isct.asl
+//
+// Description: This file provides the ACPI methods for the iSCT agent to use.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+DefinitionBlock (
+ "IsctAcpi.aml",
+ "SSDT",
+ 1,
+ "Intel_",
+ "IsctTabl",
+ 0x1000
+ )
+
+{
+ External(ICNF) //Isct Configuration
+ External(\_SB.PCI0.LPCB.H_EC.IBT1) // Isct Byte1 for EC
+ External(\_SB.PCI0.LPCB.H_EC.IBT2) // Isct Byte2 for EC
+ External(\_SB.PCI0.LPCB.H_EC.ECMD, MethodObj) // EC Command method
+ External(\_SB.PCI0.LPCB.H_EC.WTMS) // EC Wake Timer Settings
+ External(\_SB.PCI0.LPCB.H_EC.AWT0) // EC Wake Timer Value (BIT7-0)
+ External(\_SB.PCI0.LPCB.H_EC.AWT1) // EC Wake Timer Value (BIT15-8)
+ External(\_SB.PCI0.LPCB.H_EC.AWT2) // EC Wake Timer Value (BIT23-16)
+ External(\_SB.PCI0.LPCB.H_EC.LSTE) // Lid State (Lid Open = 1)
+ External(\_SB.IFFS.FFSS)
+
+ External(\_SB.PCI0.GFX0.TCHE) // Technology enabled indicator
+ External(\_SB.PCI0.GFX0.STAT) // State Indicator
+ External(\_SB.PCI0.GFX0.ASLE) // Reg 0xE4, ASLE interrupt register
+ External(\_SB.PCI0.GFX0.ASLC) // ASLE interrupt command/status
+ External(\_SB.PCI0.GFX0.PARD, MethodObj) // Check if the driver is ready to handle ASLE interrupts
+ External(\ADBG, MethodObj) // Print message to ACPI Debug Buffer
+
+ Scope (\_SB)
+ {
+ Device (IAOE)
+ {
+ OperationRegion(ISCT,SystemMemory,0xFFFF0008,0xAA58)
+ Field(ISCT,AnyAcc,Lock,Preserve)
+ {
+ WKRS, 8, // (0) ISCT Wake Reason
+ AOCE, 8, // (1) ISCT is Enabled
+ FFSE, 8, // (2) IFFS Enabled
+ ITMR, 8, // (3) ISCT Timer Type: 0 = EC, 1 = RTC
+ ECTM, 32, // (4) ISCT EC Timer
+ RCTM, 32, // (8) ISCT RTC Timer
+ GNPT, 32, // (12)ISCT GlobalNvs Ptr
+ ATOW, 8, // (16)ISCT timer over write, 1 = overwrited as ISCT timer
+ }
+ Name (_HID, "INT33A0")
+ Name (_CID, "PNP0C02")
+ Name (_UID, 0x00)
+
+ Name (IBT1, 0) // Isct Byte1 for EC (local)
+ Name (IBT2, 0) // Isct Byte2 for EC (local)
+ Name (INSB, 0) // Isct Notification Status Bit
+ Name (WTMS, 0) // EC Wake Timer Settings (local)
+ Name (AWT0, 0) // EC Wake Timer Value (BIT7-0) (local)
+ Name (AWT1, 0) // EC Wake Timer Value (BIT15-8) (local)
+ Name (AWT2, 0) // EC Wake Timer Value (BIT23-16) (local)
+ Name (PTSL, 0) // Platform Sleep Level
+ Name (SLPD, 0) // Sleep duration for when using NetDetect (dummy)
+ Name (IMDS, 0) // Isct Mode Select Bits
+ // Bits: Description
+ // 0 Reserved
+ // 1 ISCT Wake Mode Select: 0 = Normal ISCT Wake Mode, 1 = Extended ISCT Wake Mode
+ // 2 Wake From S4: 0 = No Wake from S4, 1 = Wake from S4
+ // 3-7 Reserved
+ Name (IWDT, 0) // Isct Wake Duration Time
+
+ /**
+ GABS - Get ISCT BIOS Enablign Setting
+ Input: None
+ Return:
+ Bits Description
+ - 0 ISCT Configured: 0 = Disabled, 1 = Enabled
+ - 1 ISCT Notification Control: 0 = Unsupported, 1 = Supported
+ - 2 ISCT WLAN Power Control : 0 = Unsupported, 1 = Supported
+ - 3 ISCT WWAN Power Control : 0 = Unsupported, 1 = Supported
+ - 4 Must be set to 1 (BIOS Program Timer)
+ - 5 Sleep duration value format: 0 = Actual time, 1 = Duration in Seconds
+ - 6 RF Kill Switch Type: 0 = Software, 1 = Hardware
+ - 7 Wake from S4: 0 = Unsupported, 1 = Supported
+ **/
+ Method (GABS, 0, NotSerialized) {
+ Return (ICNF)
+ }
+
+ //
+ // GAOS - Get ISCT Function Status
+ // Input: None
+ // Return:
+ // Bits Description
+ // 0 ISCT Mode: 0 = Disabled, 1 = Enabled
+ // 1 ISCT Wake Mode Select: 0 = ISCT Wake Mode, 1 = Extended ISCT Wake
+ // 2 - 7 Reserved
+ //
+ Method (GAOS, 0, NotSerialized)
+ {
+ //
+ // Check for RTC Timer, else EC timer
+ //
+ If (LEqual(ITMR, 1))
+ {
+ // Get Isct Mode Enable and Get Isct Wake Mode Select
+ //
+ Return(Or(And(IBT1, 0x01), And(IMDS, 0x06)))
+ }
+ Else
+ {
+ //
+ //Get Isct Mode Enable
+ //
+ If (CondRefOf(\_SB.PCI0.LPCB.H_EC.IBT1))
+ {
+ Store(\_SB.PCI0.LPCB.H_EC.IBT1, Local0)
+ }
+ Else
+ {
+ Store(IBT1, Local0)
+ }
+ And(Local0, 0x01, Local0)
+ //
+ // Get Isct Wake Mode Select
+ //
+ Or(Local0, And(IMDS, 0x02), Local0)
+ Return (Local0)
+ }
+ }
+
+ /**
+ SAOS - Set ISCT Function Status
+ Input:
+ Bits Description
+ - 0 ISCT Mode: 0 = Disabled, 1 = Enabled
+ - 1 ISCT Wake Mode Select: 0 = Normal ISCT Wake Mode, 1 = Extended ISCT Wake Mode
+ - 2 Wake From S4: 0 = No Wake from S4, 1 = Wake from S4
+ - 3 - 7 Reserved
+ **/
+ Method (SAOS, 1, NotSerialized)
+ {
+ //
+ // If Graphics Driver supports disable display notification in ISCT mode
+ //
+ If (And(\_SB.PCI0.GFX0.TCHE, 0x100))
+ {
+ //
+ // Check for RTC Timer, else EC timer
+ //
+ If (LEqual(ITMR, 1))
+ {
+ //
+ // If iSCT Mode and agent is disabling iSCT Mode and the iSCT Wake Reason indicates display off
+ // Then notify graphics driver to turn on display
+ //
+ If (LAnd(LAnd(And(IBT1, 0x01), LNot(And(Arg0, 0x01))), And(\_SB.IAOE.WKRS, 0x10))) {
+ If (LNot(\_SB.PCI0.GFX0.PARD()))
+ {
+ Store(And(\_SB.PCI0.GFX0.STAT, Not(0x03)), \_SB.PCI0.GFX0.STAT) // STAT[1:0] = 00, Normal Resume to S0
+
+ Store(Or(\_SB.PCI0.GFX0.ASLC, 0x100), \_SB.PCI0.GFX0.ASLC) // ASLC[8] = 1, ISCT State Change Request
+
+ Store(0x01, \_SB.PCI0.GFX0.ASLE) // Generate ASLE interrupt
+ }
+ }
+ } else {
+ If(CondRefOf(\_SB.PCI0.LPCB.H_EC.IBT1)) {
+ //
+ // If ISCT Mode and Wake Reason was ISCT wake (EC Timer or Network PME) and agent is disabling ISCT Mode
+ // Then notify graphics driver to turn on display
+ //
+ If (LAnd(LAnd(And(\_SB.PCI0.LPCB.H_EC.IBT1, 0x01), LOr(And(\_SB.IAOE.WKRS, 0x02), And(\_SB.IAOE.WKRS, 0x10))), LNot(And(Arg0, 0x01)))) {
+ If (LNot(\_SB.PCI0.GFX0.PARD()))
+ {
+ Store(And(\_SB.PCI0.GFX0.STAT, Not(0x03)), \_SB.PCI0.GFX0.STAT) // STAT[1:0] = 00, Normal Resume to S0
+
+ Store(Or(\_SB.PCI0.GFX0.ASLC, 0x100), \_SB.PCI0.GFX0.ASLC) // ASLC[8] = 1, ISCT State Change Request
+
+ Store(0x01, \_SB.PCI0.GFX0.ASLE) // Generate ASLE interrupt
+ }
+ }
+ }
+ }
+ }
+
+ //
+ // Check for RTC Timer, else EC timer
+ //
+ If (LEqual(ITMR, 1))
+ {
+ //
+ // Set Isct Wake Mode Selection and Wake from S4
+ //
+ Store(And(Arg0, 0x06), IMDS)
+ /// @note: Low Power Fan control for Extended Wake
+ //
+ // Set Isct Mode Enable
+ //
+ Or(And(IBT1, 0xFE), And(Arg0, 0x01), IBT1)
+ }
+ Else
+ {
+ //
+ //Set Isct Mode Enable
+ //
+ If (CondRefOf(\_SB.PCI0.LPCB.H_EC.IBT1))
+ {
+ Store(\_SB.PCI0.LPCB.H_EC.IBT1, Local0)
+ }
+ Else
+ {
+ Store(IBT1, Local0)
+ }
+ And(Local0, 0xFE, Local0)
+ Or(Local0, And(Arg0, 0x01), Local0)
+ //
+ // Set Isct Wake Mode Select
+ //
+ Store(And(Arg0, 0x02), IMDS)
+ //TBD: Low Power Fan control
+ If (CondRefOf(\_SB.PCI0.LPCB.H_EC.IBT1))
+ {
+ Store(Local0, \_SB.PCI0.LPCB.H_EC.IBT1)
+ //Send EC IsctUpdateCommand - 0x2B
+ \_SB.PCI0.LPCB.H_EC.ECMD (0x2B)
+ }
+ Else
+ {
+ Store(Local0, IBT1)
+ }
+ }
+ }
+
+ //
+ // GANS - Get ISCT Notification Status
+ // Input: None
+ // Return:
+ // Bits Description
+ // 0 ISCT Notification : 0 = Disabled, 1 = Enabled
+ // 1 - 7 Reserved
+ //
+ Method (GANS, 0, NotSerialized)
+ {
+ Return (INSB)
+ }
+
+ //
+ // SANS - Set ISCT Notification Status
+ // Input:
+ // Bits Description
+ // 0 ISCT Notification : 0 = Disabled, 1 = Enabled
+ // 1 - 7 Reserved
+ //
+ Method (SANS, 1, NotSerialized)
+ {
+ Store(And(Arg0, 0x01), INSB)
+ }
+
+ //
+ // GWLS - Get WLAN Module Status
+ // Input: None
+ // Return:
+ // Bits Description
+ // 0 Reserved(set to 0)
+ // 1 WLAN Module Powered in S3: 0 = Disabled, 1 = Enabled
+ // 2 WLAN Module Powered in S4: 0 = Disabled, 1 = Enabled
+ // 3 WLAN Module Powered in S5: 0 = Disabled, 1 = Enabled
+ // 4 - 7 Reserved
+ //
+ Method (GWLS, 0, NotSerialized)
+ {
+ If(LEqual(And(ICNF, 0x04), Zero))
+ {
+ Return (Zero)
+ }
+ //
+ // Check for RTC Timer, else EC timer
+ //
+ If (LEqual(ITMR, 1))
+ {
+ Store(One, Local0)
+ Store(IBT1, Local1)
+ Or(Local0, And(Local1, 0x0E), Local0)
+ Return (Local0)
+ }
+ Else
+ {
+ //
+ // Set WLAN Wireless Disable Bit to 1 if EC
+ //
+ If (CondRefOf(\_SB.PCI0.LPCB.H_EC.IBT2))
+ {
+ Store(\_SB.PCI0.LPCB.H_EC.IBT2, Local0)
+ Or(Local0, 1, Local0)
+ }
+
+ //
+ // Get WLAN Powered States
+ //
+ If (CondRefOf(\_SB.PCI0.LPCB.H_EC.IBT1))
+ {
+ Store(\_SB.PCI0.LPCB.H_EC.IBT1, Local1)
+ }
+ Else
+ {
+ Store(IBT1, Local1)
+ }
+ Or(Local0, And(Local1, 0x0E), Local0)
+
+ Return (Local0)
+ }
+ }
+ //
+ // SWLS - Set WLAN Module Status
+ // Input:
+ // Bits Description
+ // 0 N/A (WLAN Wireless Disable is Read only) Always set to 0
+ // 1 WLAN Module Powered in S3: 0 = Disabled, 1 = Enabled
+ // 2 WLAN Module Powered in S4: 0 = Disabled, 1 = Enabled
+ // 3 WLAN Module Powered in S5: 0 = Disabled, 1 = Enabled
+ // 4 - 7 Reserved
+ //
+ Method (SWLS, 1, NotSerialized)
+ {
+ If(LEqual(And(ICNF, 0x04), Zero))
+ {
+ Return
+ }
+ //
+ // Check for RTC Timer, else EC timer
+ //
+ If (LEqual(ITMR, 1))
+ {
+ Store(IBT1, Local0)
+
+ //
+ // Set new Power States
+ //
+ And(Local0, 0xF1, Local0)
+ Or(Local0, And(Arg0, 0x0E), Local0)
+ If(CondRefOf(\_SB.IFFS.FFSS))
+ {
+ If(LAnd(And(\_SB.IFFS.FFSS, 0x03), And(Arg0,0x02)))
+ {
+ Or(Local0, 0x04, Local0)
+ }
+ }
+ Store(Local0, IBT1)
+ }
+ Else
+ {
+ //
+ // Read ISCTByte1 from EC
+ //
+ If (CondRefOf(\_SB.PCI0.LPCB.H_EC.IBT1))
+ {
+ Store(\_SB.PCI0.LPCB.H_EC.IBT1, Local0)
+ }
+ Else
+ {
+ Store(IBT1, Local0)
+ }
+
+ //
+ // Set new Power States
+ //
+ And(Local0, 0xF1, Local0)
+ Or(Local0, And(Arg0, 0x0E), Local0)
+
+ //
+ // If RapidStart is enabled and WLAN powered in S3, enable power in S4
+ //
+ If(CondRefOf(\_SB.IFFS.FFSS))
+ {
+ If(LAnd(And(\_SB.IFFS.FFSS, 0x03), And(Arg0,0x02)))
+ {
+ Or(Local0, 0x04, Local0)
+ }
+ }
+
+ //
+ // Save ISCTByte1 to EC
+ //
+ If (CondRefOf(\_SB.PCI0.LPCB.H_EC.IBT1))
+ {
+ Store(Local0, \_SB.PCI0.LPCB.H_EC.IBT1)
+ //Send EC IsctUpdateCommand - 0x2B
+ \_SB.PCI0.LPCB.H_EC.ECMD (0x2B)
+ }
+ Else
+ {
+ Store(Local0, IBT1)
+ }
+ }
+ }
+
+ //
+ // GWWS - Get WWAN Module Status
+ // Input: None
+ // Return:
+ // Bits Description
+ // 0 WWAN Wireless Disable (W_DISABLE#) :0 = Disabled, 1 = Enabled
+ // 1 WWAN Module Powered in S3: 0 = Disabled, 1 = Enabled
+ // 2 WWAN Module Powered in S4: 0 = Disabled, 1 = Enabled
+ // 3 WWAN Module Powered in S5: 0 = Disabled, 1 = Enabled
+ // 4 - 7 Reserved
+ //
+ Method (GWWS, 0, NotSerialized)
+ {
+ If(LEqual(And(ICNF, 0x08), Zero))
+ {
+ Return (Zero)
+ }
+ //
+ // Check for RTC Timer, else EC timer
+ //
+ If (LEqual(ITMR, 1))
+ {
+ Store(One, Local0)
+ Store(IBT1, Local1)
+ Or(Local0, ShiftRight(And(Local1, 0x70), 3), Local0)
+ Return (Local0)
+ }
+ Else
+ {
+ //
+ // Set WWAN Wireless Disable Bit to 1 if EC
+ //
+ If (CondRefOf(\_SB.PCI0.LPCB.H_EC.IBT2))
+ {
+ Store(\_SB.PCI0.LPCB.H_EC.IBT2, Local0)
+ ShiftRight(Or(Local0, 2), 1, Local0)
+ }
+
+ //
+ // Get WWAN Powered States
+ //
+ If (CondRefOf(\_SB.PCI0.LPCB.H_EC.IBT1))
+ {
+ Store(\_SB.PCI0.LPCB.H_EC.IBT1, Local1)
+ }
+ Else
+ {
+ Store(IBT1, Local1)
+ }
+ Or(Local0, ShiftRight(And(Local1, 0x70), 3), Local0)
+
+ Return (Local0)
+ }
+ }
+
+ //
+ // SWWS - Set WWAN Module Status
+ // Input:
+ // Bits Description
+ // 0 N/A (WWAN Wireless Disable is Read only) Always set to 0
+ // 1 WWAN Module Powered in S3: 0 = Disabled, 1 = Enabled
+ // 2 WWAN Module Powered in S4: 0 = Disabled, 1 = Enabled
+ // 3 WWAN Module Powered in S5: 0 = Disabled, 1 = Enabled
+ // 4 - 7 Reserved
+ //
+ Method (SWWS, 1, NotSerialized)
+ {
+ If(LEqual(And(ICNF, 0x08), Zero))
+ {
+ Return
+ }
+ //
+ // Check for RTC Timer, else EC timer
+ //
+ If (LEqual(ITMR, 1))
+ {
+ Store(IBT1, Local0)
+ //
+ // Set new Power States
+ //
+ And(Local0, 0x8F, Local0)
+ Or(Local0, ShiftLeft(And(Arg0, 0x0E), 3), Local0)
+
+ //
+ // If RapidStart is enabled and WWAN powered in S3, enable power in S4
+ //
+ If(CondRefOf(\_SB.IFFS.FFSS))
+ {
+ If(LAnd(And(\_SB.IFFS.FFSS, 0x03), And(Arg0,2)))
+ {
+ Or(Local0, ShiftLeft(0x04, 3), Local0)
+ }
+ }
+ Store(Local0, IBT1)
+ }
+ Else
+ {
+ //
+ // Read ISCTByte1 from EC
+ //
+ If (CondRefOf(\_SB.PCI0.LPCB.H_EC.IBT1))
+ {
+ Store(\_SB.PCI0.LPCB.H_EC.IBT1, Local0)
+ }
+ Else
+ {
+ Store(IBT1, Local0)
+ }
+
+ //
+ // Set new Power States
+ //
+ And(Local0, 0x8F, Local0)
+ Or(Local0, ShiftLeft(And(Arg0, 0x0E), 3), Local0)
+
+ //
+ // If RapidStart is enabled and WWAN powered in S3, enable power in S4
+ //
+ If(CondRefOf(\_SB.IFFS.FFSS))
+ {
+ If(LAnd(And(\_SB.IFFS.FFSS, 0x03), And(Arg0,2)))
+ {
+ Or(Local0, ShiftLeft(0x04, 3), Local0)
+ }
+ }
+
+ //
+ // Save ISCTByte1 to EC
+ //
+ If (CondRefOf(\_SB.PCI0.LPCB.H_EC.IBT1))
+ {
+ Store(Local0, \_SB.PCI0.LPCB.H_EC.IBT1)
+ //Send EC IsctUpdateCommand - 0x2B
+ \_SB.PCI0.LPCB.H_EC.ECMD (0x2B)
+ }
+ Else
+ {
+ Store(Local0, IBT1)
+ }
+ }
+ }
+
+ //
+ // SASD - Set Intel Smart Connect Technology Sleep Duration
+ // Input:
+ // Bits Description
+ // 0 - 30 Sleep Duration
+ // 31 : 0 = Sleep Duration in seconds
+ // 1 = Actual time
+ //
+ Method (SASD, 1, NotSerialized)
+ {
+ //
+ // Arg0 = 0 - NetDetect support
+ // > 0 - EC / RTC Based Timer
+ // Bit31 : 0 - Sleep Duration in seconds
+ // 1 - Actual Time
+ //
+ If(LAnd(And(ICNF, 0x10), LGreater(Arg0, 0)))
+ {
+ //
+ // See if RTC (1) or EC (0) Timer
+ //
+ If (LEqual(ITMR, 1))
+ {
+ Store(Arg0, RCTM)
+ }
+ Else
+ {
+ Store(Arg0, ECTM)
+ }
+
+ If (LAnd(CondRefOf(\_SB.PCI0.LPCB.H_EC.WTMS), LEqual(PTSL, 0x03)))
+ {
+ Store(And(ECTM, 0xFF), \_SB.PCI0.LPCB.H_EC.AWT0)
+ Store(ShiftRight(And(ECTM, 0xFF00), 8), \_SB.PCI0.LPCB.H_EC.AWT1)
+ Store(ShiftRight(And(ECTM, 0xFF0000), 16), \_SB.PCI0.LPCB.H_EC.AWT2)
+ //
+ // Enable EC timer - BIT7
+ // Enable wake from S3 on timer exiry - BIT0
+ //
+ Store(\_SB.PCI0.LPCB.H_EC.WTMS, Local0)
+ Store(Or(0x81,Local0), \_SB.PCI0.LPCB.H_EC.WTMS)
+ }
+ Else
+ {
+ Store(And(ECTM, 0xFF), AWT0)
+ Store(ShiftRight(And(ECTM, 0xFF00), 8), AWT1)
+ Store(ShiftRight(And(ECTM, 0xFF0000), 16), AWT2)
+ Store(WTMS, Local0)
+ Store(Or(0x81,Local0), WTMS)
+ }
+ }
+ Else
+ {
+ If (LEqual(ITMR, 1))
+ {
+ Store(0, RCTM)
+ } else {
+ If(CondRefOf(\_SB.PCI0.LPCB.H_EC.WTMS))
+ {
+ Store(0, ECTM)
+ Store(0, \_SB.PCI0.LPCB.H_EC.WTMS)
+ }
+ }
+
+ Store(Arg0, SLPD)
+ }
+ } // Method (SASD)
+
+ //
+ // GPWR - Get Wake Reason
+ // Input: None
+ // Return:
+ // Bits Description
+ // 0 User Pressed Power Button: 0 = False, 1 = True
+ // 1 EC / RTC caused wake (requested by iSCT agent): 0 = False, 1 = True
+ // 2 RTC Timer caused wake: 0 = False, 1 = True
+ // 3 Wake due to PME (Not Network Wake): 0 = False, 1 = True
+ // 4 Internal BIOS bit PME (Known Network Wake): 0 = False, 1 = True (Reserved for Agent- Must be 0)
+ // 5 - 7 Reserved
+ //
+ Method (GPWR, 0, NotSerialized)
+ {
+ //
+ // Return Wake Reason
+ //
+ If(And(WKRS,0x2F))
+ {
+ //
+ // Mask out the Internal BIOS Network PME bit and the reserved bits.
+ //
+ Return(And(WKRS, 0x2F))
+ }
+ Else
+ {
+ Return(0)
+ }
+ } // Method (GPWR)
+
+ //
+ // GPCS - Get Platform Component State
+ // Input: None
+ // Return:
+ // Bits Description
+ // 0 LID State: 0 - Closed, 1 - Open
+ // 1 - 7 Reserved
+ //
+ Method (GPCS, 0, NotSerialized)
+ {
+ //
+ // See if EC (0) or RTC (1) Timer
+ //
+ If (LEqual(ITMR, 0))
+ {
+ If (CondRefOf(\_SB.PCI0.LPCB.H_EC.LSTE))
+ {
+ Return(And(\_SB.PCI0.LPCB.H_EC.LSTE,0x01))
+ }
+ }
+ Else
+ {
+ Return(1)
+ }
+ } // Method (GPCS)
+
+ //
+ // GAWD - Get Isct Wake Duration
+ // Input: None
+ // Return:
+ // Bits Description
+ // 0 - 7 Isct Wake Duration
+ //
+ Method (GAWD, 0, NotSerialized)
+ {
+ Return (IWDT)
+ }
+
+ //
+ // SAWD - Set Isct Wake Duration
+ // Input:
+ // Bits Description
+ // 0 - 7 Isct Wake Duration
+ //
+ Method (SAWD, 1, NotSerialized)
+ {
+ Store (Arg0, IWDT)
+ //TBD Set EC Watchdog Timer
+ }
+
+ } // Device (IAOE)
+ } // Scope (\_SB)
+} // End SSDT
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
diff --git a/Board/EM/Isct/AcpiTables/Isct.cif b/Board/EM/Isct/AcpiTables/Isct.cif
new file mode 100644
index 0000000..4a8df02
--- /dev/null
+++ b/Board/EM/Isct/AcpiTables/Isct.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "IsctAcpiTables"
+ category = ModulePart
+ LocalRoot = "Board\EM\Isct\AcpiTables"
+ RefName = "IsctAcpiTables"
+[files]
+"Isct.sdl"
+"Isct.mak"
+"Isct.sd"
+"Isct.uni"
+"Isct.asl"
+<endComponent>
diff --git a/Board/EM/Isct/AcpiTables/Isct.mak b/Board/EM/Isct/AcpiTables/Isct.mak
new file mode 100644
index 0000000..8b49139
--- /dev/null
+++ b/Board/EM/Isct/AcpiTables/Isct.mak
@@ -0,0 +1,115 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctAcpiTables/Isct.mak 2 5/27/13 10:54p Bensonlai $
+#
+# $Revision: 2 $
+#
+# $Date: 5/27/13 10:54p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctAcpiTables/Isct.mak $
+#
+# 2 5/27/13 10:54p Bensonlai
+# [TAG] EIP125007
+# [Category] Improvement
+# [Description] [ISCT] Change IASL compiler path
+#
+# 1 9/02/12 11:18p Bensonlai
+# Intel Smart Connect Technology initially releases.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: Isct.mak
+#
+# Description: Make file to build Isct ASL components
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all : BuildIsct
+
+BuildIsct : $(BUILD_DIR)\Isct.ffs
+
+#---------------------------------------------------------------------------
+# Generic AcpiPlatform dependencies
+#---------------------------------------------------------------------------
+$(BUILD_DIR)\Isct.mak : $(INTEL_ISCT_DIR)\Isct.cif $(BUILD_RULES)
+ $(CIF2MAK) $(INTEL_ISCT_DIR)\Isct.cif $(CIF2MAK_DEFAULTS)
+
+#---------------------------------------------------------------------------
+# Create ISCT Setup Screens
+#---------------------------------------------------------------------------
+SetupSdbs : $(BUILD_DIR)\Isct.mak ISCTSDB
+
+ISCTSDB :
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\Isct.mak all \
+ TYPE=SDB NAME=Isct STRING_CONSUMERS=$(INTEL_ISCT_DIR)\Isct.sd
+
+#-----------------------------------------------------------------------
+# ASL compiler definition
+#-----------------------------------------------------------------------
+!IF "$(ACPIPLATFORM_ASL_COMPILER)"==""
+!ERROR It is an invalid path, please check your ASL compiler path.
+!ENDIF
+
+IASL = $(ACPIPLATFORM_ASL_COMPILER)
+#-----------------------------------------------------------------------
+$(BUILD_DIR)\Isct.aml : $(ISCT_ASL_FILE)
+ @cl /C /EP $(ISCT_ASL_FILE) > $(BUILD_DIR)\Isct.asl
+ $(IASL) -p $(BUILD_DIR)\Isct.aml $(BUILD_DIR)\Isct.asl
+
+$(BUILD_DIR)\Isct.sec: $(BUILD_DIR)\Isct.aml
+ $(GENSECTION) -I $*.aml -O $@ -S EFI_SECTION_RAW
+
+#Note. Expand the package with Isct tables.
+# DXE phase will load the tables
+# and update Aml contents if provided in IsctAcpi.c
+
+$(BUILD_DIR)\Isct.ffs: $(BUILD_DIR)\Isct.sec
+ $(GENFFSFILE) -B $(BUILD_DIR) -V -o $@ -P1 <<$(BUILD_DIR)\Isct.pkg
+
+PACKAGE.INF
+[.]
+BASE_NAME = Isct
+FFS_FILEGUID = FA2DDC38-3F19-4218-B53E-D9D79D626767
+FFS_FILETYPE = EFI_FV_FILETYPE_FREEFORM
+FFS_ATTRIB_CHECKSUM = TRUE
+
+IMAGE_SCRIPT =
+{
+ Compress (dummy) {
+ $(PROJECT_DIR)\$(BUILD_DIR)\Isct.sec
+ }
+}
+<<KEEP
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Isct/AcpiTables/Isct.sd b/Board/EM/Isct/AcpiTables/Isct.sd
new file mode 100644
index 0000000..9278d87
--- /dev/null
+++ b/Board/EM/Isct/AcpiTables/Isct.sd
@@ -0,0 +1,190 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctAcpiTables/Isct.sd 2 8/02/13 3:30a Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 8/02/13 3:30a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctAcpiTables/Isct.sd $
+//
+// 2 8/02/13 3:30a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Hide the item of timer choice on the platforms which
+// don't have EC
+//
+// 1 9/02/12 11:18p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: Isct.sd
+//
+// Description: Create the setup item for Isct.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifdef SETUP_DATA_DEFINITION
+//---------------------------------------------------------------------------
+// Put NVRAM data definitions here.
+// For example: UINT8 Data1;
+// These definitions will be converted by the build process
+// to a definitions of SETUP_DATA fields.
+//---------------------------------------------------------------------------
+ UINT8 IsctConfiguration;
+ UINT8 ISCTNOTIFICATION;
+ UINT8 ISCTWLAN;
+ UINT8 ISCTWWAN;
+ UINT8 ISCTRFKillSwitch;
+ UINT8 IsctTimerChoice;
+#endif
+
+#if defined(VFRCOMPILE) && !defined(CONTROLS_ARE_DEFINED)
+#define CONTROL_DEFINITION
+#endif
+//---------------------------------------------------------------------------
+
+//---------------------------------------------------------------------------
+#ifdef CONTROL_DEFINITION
+
+#define ISCT_ONEOF_CONFIGURATION\
+ oneof varid = SETUP_DATA.IsctConfiguration,\
+ prompt = STRING_TOKEN(STR_ISCT_CONFIGURATION_PROMPT),\
+ help = STRING_TOKEN(STR_ISCT_CONFIGURATION_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ISCT_ONEOF_NOTIFICATION\
+ oneof varid = SETUP_DATA.ISCTNOTIFICATION,\
+ prompt = STRING_TOKEN(STR_ISCT_NOTIFICATION_PROMPT),\
+ help = STRING_TOKEN(STR_ISCT_NOTIFICATION_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ISCT_ONEOF_WLAN\
+ oneof varid = SETUP_DATA.ISCTWLAN,\
+ prompt = STRING_TOKEN(STR_ISCT_WLAN_PROMPT),\
+ help = STRING_TOKEN(STR_ISCT_WLAN_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ISCT_ONEOF_WWAN\
+ oneof varid = SETUP_DATA.ISCTWWAN,\
+ prompt = STRING_TOKEN(STR_ISCT_WWAN_PROMPT),\
+ help = STRING_TOKEN(STR_ISCT_WWAN_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ISCT_ONEOF_RFKILLSWITCH\
+ oneof varid = SETUP_DATA.ISCTRFKillSwitch,\
+ prompt = STRING_TOKEN(STR_ISCT_RF_KILL_SWITCH_PROMPT),\
+ help = STRING_TOKEN(STR_ISCT_RF_KILL_SWITCH_HELP),\
+ option text = STRING_TOKEN(STR_ISCT_SOFTWARE), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ISCT_HARDWARE), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ISCT_ONEOF_TIMERCHIOICE\
+ oneof varid = SETUP_DATA.IsctTimerChoice,\
+ prompt = STRING_TOKEN(STR_ISCT_TIMER_SELECTION_PROMPT),\
+ help = STRING_TOKEN(STR_ISCT_TIMER_SELECTION_HELP),\
+ option text = STRING_TOKEN(STR_ISCT_EC_TIMER), value = 0, flags = DEFAULT | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ISCT_RTC_TIMER), value = 1, flags = MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#endif // CONTROL_DEFINITION
+
+#ifdef CONTROLS_WITH_DEFAULTS
+ ISCT_ONEOF_CONFIGURATION
+ ISCT_ONEOF_NOTIFICATION
+ ISCT_ONEOF_WLAN
+ ISCT_ONEOF_WWAN
+ ISCT_ONEOF_RFKILLSWITCH
+ ISCT_ONEOF_TIMERCHIOICE
+#endif // CONTROLS_WITH_DEFAULTS
+
+//---------------------------------------------------------------------------
+// ADVANCED - CRB Configuration Form
+//---------------------------------------------------------------------------
+#ifdef ADVANCED_FORM_SET
+
+ #ifndef SUPPRESS_GRAYOUT_ENDIF //old Core
+ #define SUPPRESS_GRAYOUT_ENDIF endif;
+ #endif
+
+ #ifdef FORM_SET_GOTO
+ // Define goto commands for the forms defined in this file
+ goto ISCTCONFIGURATION_FORM_ID,
+ prompt = STRING_TOKEN(STR_ISCTCONFIGURATION_FORM),
+ help = STRING_TOKEN(STR_ISCTCONFIGURATION_HELP);
+ #endif
+
+ #ifdef FORM_SET_FORM
+ // Define forms
+ #ifndef ISCTCONFIGURATION_FORM_SETUP
+ #define ISCTCONFIGURATION_FORM_SETUP
+
+ form formid = AUTO_ID(ISCTCONFIGURATION_FORM_ID),
+ title = STRING_TOKEN(STR_ISCTCONFIGURATION_FORM);
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ ISCT_ONEOF_CONFIGURATION
+ endif;
+
+ SEPARATOR
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval SETUP_DATA.IsctConfiguration == 0;
+ ISCT_ONEOF_NOTIFICATION
+ ISCT_ONEOF_WLAN
+ ISCT_ONEOF_WWAN
+ ISCT_ONEOF_RFKILLSWITCH
+ #if defined (PCH_SKU) && (PCH_SKU == 1)
+ #if defined (LVC_BOARD) && (LVC_BOARD == 0)
+ ISCT_ONEOF_TIMERCHIOICE
+ #endif
+ #endif
+ SUPPRESS_GRAYOUT_ENDIF
+
+ endform; // ISCT_FORM_ID
+
+ #endif // ISCTCONFIGURATION_FORM_SETUP
+ #endif // FORM_SET_FORM
+
+#endif // ADVANCED_FORM_SET
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Isct/AcpiTables/Isct.sdl b/Board/EM/Isct/AcpiTables/Isct.sdl
new file mode 100644
index 0000000..7e60112
--- /dev/null
+++ b/Board/EM/Isct/AcpiTables/Isct.sdl
@@ -0,0 +1,99 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctAcpiTables/Isct.sdl 1 9/02/12 11:18p Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 9/02/12 11:18p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctAcpiTables/Isct.sdl $
+#
+# 1 9/02/12 11:18p Bensonlai
+# Intel Smart Connect Technology initially releases.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: Isct.sdl
+#
+# Description: SDL file for Isct
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "ISCT_SUPPORT"
+ Value = "1"
+ Help = "Always On Always Connected"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "ISCT_ASL_FILE"
+ Value = "$(INTEL_ISCT_DIR)\Isct.asl"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+PATH
+ Name = "INTEL_ISCT_DIR"
+End
+
+MODULE
+ Help = "Includes Isct.mak to Project"
+ File = "Isct.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\Isct.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 40
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(INTEL_ISCT_DIR)\Isct.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 40
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\Isct.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Isct/AcpiTables/Isct.uni b/Board/EM/Isct/AcpiTables/Isct.uni
new file mode 100644
index 0000000..f295d22
--- /dev/null
+++ b/Board/EM/Isct/AcpiTables/Isct.uni
Binary files differ
diff --git a/Board/EM/Isct/Dxe/IsctAcpi.c b/Board/EM/Isct/Dxe/IsctAcpi.c
new file mode 100644
index 0000000..6809e27
--- /dev/null
+++ b/Board/EM/Isct/Dxe/IsctAcpi.c
@@ -0,0 +1,701 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctDxeAcpi/IsctAcpi.c 14 7/16/14 12:20a Mirayang $
+//
+// $Revision: 14 $
+//
+// $Date: 7/16/14 12:20a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctDxeAcpi/IsctAcpi.c $
+//
+// 14 7/16/14 12:20a Mirayang
+// Add complete function with iRST.
+//
+// 13 7/11/14 10:51a Mirayang
+//
+// 12 7/11/14 10:30a Mirayang
+// Fix iRST bulid error.
+//
+// 11 7/08/14 5:10a Mirayang
+// EIP142924 iSCT 5.0 for Shark Bay Platform
+//
+// 10 5/13/14 4:51a Mirayang
+// [TAG] EIP167033
+// [Category] Improvement
+// [Description] Variable's attribute needs to be reviewed by iSCT
+// component driver
+// [Files] IsctAcpi.c
+//
+// 9 8/02/13 3:26a Joshchou
+//
+// 8 6/02/13 10:52a Joshchou
+// [TAG] EIP125348
+// [Category] Improvement
+// [Description] [SBY] Intel Smart Connect Technology BIOS Sample Code
+// 052413 Update
+//
+// 7 3/27/13 9:14a Bensonlai
+// [TAG] EIP118307
+// [Category] New Feature
+// [Description] Implementation of the ISCT Platform Design
+// Specification 0.8.
+// [Files] Isct.asl, IsctAcpi.c, IsctAcpi.mak
+//
+// 6 12/05/12 3:32a Bensonlai
+// [TAG] EIP107708
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] RTC can't wake
+// [RootCause] RTC didn't support Actual time yet.
+// [Solution] RTC only supports "duration in seconds".
+// [Files] IsctAcpi.c
+//
+// 5 11/20/12 8:02a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Because GlobalNvsArea.h has changed the ICNF to
+// IsctCfg, we modified the ICNF to IsctCfg.
+//
+// 4 10/29/12 2:32a Bensonlai
+// [TAG] EIP105047
+// [Category] Improvement
+// [Description] ISCT build error when RapidStart_SUPPORT is Disabled in
+// Sharkbay platform.
+//
+// 3 10/15/12 6:55a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] [Category] Improvement
+// [Description] Rename the IFFS to RapidStart for updating the
+// 4.6.5.3_iRST-RC_071_006
+// [Files] IsctAcpi.c
+//
+// 2 9/26/12 2:04a Bensonlai
+// [TAG] None
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] System hung up when ISCT enabled on the debug mode
+// [RootCause] Because we don't check the EFI stauts and use the
+// ASSERT_EFI_ERROR directly.
+// [Solution] Added the EFI stauts for checking.
+// [Files] IsctAcpi.c, IsctWakeReason.c and IsctWakeReason.c
+//
+// 1 9/02/12 11:19p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IsctAcpi.c
+//
+// Description: This Dxe driver will initialize ISCT Persistent Data Variable and also verify ISCT Store valid or not
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+
+
+#include EFI_GUID_DEFINITION (AcpiVariable)
+#include EFI_GUID_DEFINITION (IsctAcpiTableStorage)
+#include EFI_GUID_DEFINITION (IsctPersistentData)
+
+#include EFI_PROTOCOL_PRODUCER (IsctNvsArea)
+#include EFI_PROTOCOL_CONSUMER (FirmwareVolume)
+#include EFI_PROTOCOL_CONSUMER (IgdOpRegion)
+#include EFI_PROTOCOL_DEPENDENCY (AcpiTable)
+
+#endif
+
+#include "IsctAcpi.h"
+ISCT_NVS_AREA_PROTOCOL mIsctNvsAreaProtocol;
+
+//
+// GUID to AMI_ISCT Module
+//
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+
+#define AMI_ISCT_HOB_GUID \
+ { \
+ 0x1af7b744, 0xcdfc, 0x4825, 0xa1, 0x77, 0xca, 0x48, 0xd2, 0xdf, 0xe2, 0xc6 \
+ }
+#else
+#define AMI_ISCT_HOB_GUID \
+ { \
+ 0x1af7b744, 0xcdfc, 0x4825, \
+ { \
+ 0xa1, 0x77, 0xca, 0x48, 0xd2, 0xdf, 0xe2, 0xc6 \
+ } \
+ }
+#endif
+
+#pragma pack (1)
+
+typedef struct {
+ EFI_HOB_GUID_TYPE EfiHobGuidType;
+ UINT16 ISCT_PM1_STS;
+ UINT8 WakeReason;
+} AMI_ISCT_HOB;
+
+#pragma pack ()\
+
+EFI_STATUS
+IsctDxeUpdateSetupVariableToACPIGNVS (
+ IN OUT SETUP_DATA *gSetupData
+ )
+/*++
+
+Routine Description:
+
+ Update ISCT SetupVariable to ACPI GNVS
+
+Arguments:
+
+Returns:
+
+ EFI_SUCCESS Isct ACPI GNVS are updated successfully
+ EFI_NOT_FOUND Isct ACPI GNVS not found
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_GUID gEfiGlobalNvsAreaProtocolGuid = EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID;
+ EFI_GLOBAL_NVS_AREA_PROTOCOL *GlobalNvsAreaProtocol;
+ EFI_GLOBAL_NVS_AREA *mGlobalNvsAreaPtr;
+
+ Status = gBS->LocateProtocol( &gEfiGlobalNvsAreaProtocolGuid, NULL, &GlobalNvsAreaProtocol );
+ if ( EFI_ERROR(Status) ) {
+ return Status;
+ }
+ mGlobalNvsAreaPtr = GlobalNvsAreaProtocol->Area;
+
+ //
+ // Intel Smart Connect Technology 4.0 Spec (Document Number: 507302)
+ //
+ // Table 4-2. IAOE Control Method GABS
+ // Bit0 Intel Smart Connect Technology Configured: 0 = Disabled, 1 = Enabled
+ // Bit1 Intel Smart Connect Technology Notification Control: 0 = Unsupported, 1 = Supported
+ // Bit2 Intel Smart Connect Technology WLAN Power Control:0 = Unsupported, 1 = Supported
+ // Bit3 Intel Smart Connect Technology WWAN Power Control: 0 = Unsupported, 1 = Supported
+ // Bit4 Must be set to 1
+ // Bit5 Sleep duration value format: 0 = Actual time, 1 = duration in seconds (see SASD for actual format)
+ // Bit6 RF Kill Support (Radio On/Off): 0 = Soft Switch, 1 = Physical Switch
+ // Bit7 Reserved (must set to 0)
+ //
+ // ISCT configuration
+ //
+ mGlobalNvsAreaPtr->IsctCfg = 0;
+ if (gSetupData->IsctConfiguration) {
+ mGlobalNvsAreaPtr->IsctCfg = mGlobalNvsAreaPtr->IsctCfg | BIT0;
+
+ if (gSetupData->ISCTNOTIFICATION) {
+ mGlobalNvsAreaPtr->IsctCfg = mGlobalNvsAreaPtr->IsctCfg | BIT1;
+ }
+ if (gSetupData->ISCTWLAN) {
+ mGlobalNvsAreaPtr->IsctCfg = mGlobalNvsAreaPtr->IsctCfg | BIT2;
+ }
+ if (gSetupData->ISCTWWAN) {
+ mGlobalNvsAreaPtr->IsctCfg = mGlobalNvsAreaPtr->IsctCfg | BIT3;
+ }
+ mGlobalNvsAreaPtr->IsctCfg = mGlobalNvsAreaPtr->IsctCfg | BIT4;
+ mGlobalNvsAreaPtr->IsctCfg = mGlobalNvsAreaPtr->IsctCfg | BIT5; // Duration in seconds
+
+ if (gSetupData->ISCTRFKillSwitch) {
+ mGlobalNvsAreaPtr->IsctCfg = mGlobalNvsAreaPtr->IsctCfg | BIT6;
+ }
+// ami override start
+ mGlobalNvsAreaPtr->IsctCfg |= BIT7; // Isct Wake from S4 Supported
+// ami override end
+ }
+
+ return Status;
+}
+
+STATIC
+EFI_STATUS
+InitializeIsctAcpiTables (
+ VOID
+ )
+/*++
+
+Routine Description:
+
+ Initialize ISCT ACPI tables
+
+Arguments:
+
+Returns:
+
+ EFI_SUCCESS Isct ACPI tables are initialized successfully
+ EFI_NOT_FOUND Isct ACPI tables not found
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ EFI_FV_FILETYPE FileType;
+ UINT32 FvStatus;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINTN Size;
+ UINTN Index;
+ EFI_FIRMWARE_VOLUME_PROTOCOL *FwVol;
+ INTN Instance;
+ EFI_ACPI_COMMON_HEADER *CurrentTable;
+ UINT8 *CurrPtr;
+ UINT8 *EndPtr;
+ UINT32 *Signature;
+ EFI_ACPI_DESCRIPTION_HEADER *IsctAcpiTable;
+ BOOLEAN LoadTable;
+ UINTN TableHandle;
+ EFI_ACPI_TABLE_VERSION Version;
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
+
+ FwVol = NULL;
+ IsctAcpiTable = NULL;
+
+ Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, &AcpiTable);
+ if ( EFI_ERROR(Status) ) {
+ DEBUG((EFI_D_INFO, "ISCT :gBS->LocateProtocol -> AcpiTable Status = %x\n", Status));
+ return Status;
+ }
+
+ //
+ // Locate protocol.
+ // There is little chance we can't find an FV protocol
+ //
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiFirmwareVolumeProtocolGuid,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ if ( EFI_ERROR(Status) ) {
+ DEBUG((EFI_D_INFO, "ISCT :gBS->LocateHandleBuffer Status = %x\n", Status));
+ return Status;
+ }
+
+ //
+ // Looking for FV with ACPI storage file
+ //
+ for (Index = 0; Index < NumberOfHandles; Index++) {
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = gBS->HandleProtocol (
+ HandleBuffer[Index],
+ &gEfiFirmwareVolumeProtocolGuid,
+ &FwVol
+ );
+ if ( EFI_ERROR(Status) ) {
+ DEBUG((EFI_D_INFO, "ISCT :gBS->HandleProtocol Status = %x\n", Status));
+ return Status;
+ }
+
+ //
+ // See if it has the ACPI storage file
+ //
+ Size = 0;
+ FvStatus = 0;
+ Status = FwVol->ReadFile (
+ FwVol,
+ &gIsctAcpiTableStorageGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+ DEBUG((EFI_D_INFO, "ISCT :FwVol->ReadFile Status = %x\n", Status));
+ //
+ // If we found it, then we are done
+ //
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+ //
+ // Free any allocated buffers
+ //
+ FreePool (HandleBuffer);
+
+ //
+ // Sanity check that we found our data file
+ //
+ if (FwVol == NULL) {
+ return EFI_NOT_FOUND;
+ }
+ //
+ // By default, a table belongs in all ACPI table versions published.
+ //
+ Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0;
+
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ // Read tables from the storage file.
+ //
+ Instance = 0;
+ CurrentTable = NULL;
+ while (Status == EFI_SUCCESS) {
+ Status = FwVol->ReadSection (
+ FwVol,
+ &gIsctAcpiTableStorageGuid,
+ EFI_SECTION_RAW,
+ Instance,
+ &CurrentTable,
+ &Size,
+ &FvStatus
+ );
+ DEBUG((EFI_D_INFO, "ISCT :FwVol->ReadSection Status = %x\n", Status));
+
+ if (!EFI_ERROR (Status)) {
+ LoadTable = FALSE;
+ //
+ // Check the table ID to modify the table
+ //
+ if (((EFI_ACPI_DESCRIPTION_HEADER *) CurrentTable)->OemTableId == EFI_SIGNATURE_64 ('I', 's', 'c', 't', 'T', 'a', 'b', 'l')) {
+ IsctAcpiTable = (EFI_ACPI_DESCRIPTION_HEADER *) CurrentTable;
+ DEBUG((EFI_D_ERROR, "ISCT :Find out IsctTabl\n"));
+ //
+ // Locate the SSDT package
+ //
+ CurrPtr = (UINT8 *) IsctAcpiTable;
+ EndPtr = CurrPtr + IsctAcpiTable->Length;
+
+ for (; CurrPtr <= EndPtr; CurrPtr++) {
+ Signature = (UINT32 *) (CurrPtr + 3);
+ if (*Signature == EFI_SIGNATURE_32 ('I', 'S', 'C', 'T')) {
+ LoadTable = TRUE;
+ if((*(UINT32 *) (CurrPtr + 3 + sizeof (*Signature) + 2) == 0xFFFF0008)) {
+ //
+ // ISCT NVS Area address
+ //
+ *(UINT32 *) (CurrPtr + 3 + sizeof (*Signature) + 2) = (UINT32) (UINTN) mIsctNvsAreaProtocol.Area;
+ DEBUG((EFI_D_INFO, "ISCT :Modify OpRegion Address to %x\n", (*(UINT32 *) (CurrPtr + 3 + sizeof (*Signature) + 2))));
+ }
+
+ if((*(UINT16 *) (CurrPtr + 3 + sizeof (*Signature) + 2 + sizeof (UINT32) + 1) == 0xAA58)) {
+ //
+ // ISCT NVS Area size
+ //
+ *(UINT16 *) (CurrPtr + 3 + sizeof (*Signature) + 2 + sizeof (UINT32) + 1) = sizeof (ISCT_NVS_AREA);
+ DEBUG((EFI_D_INFO, "ISCT :Modify OpRegion Size to %x\n", *(UINT16 *) (CurrPtr + 3 + sizeof (*Signature) + 2 + sizeof (UINT32) + 1)));
+ }
+
+ ///
+ /// Add the table
+ ///
+ if (LoadTable) {
+ TableHandle = 0;
+ Status = AcpiTable->InstallAcpiTable (
+ AcpiTable,
+ CurrentTable,
+ CurrentTable->Length,
+ &TableHandle
+ );
+ if ( EFI_ERROR(Status) ) {
+ return Status;
+ }
+ }
+ return EFI_SUCCESS;
+ }
+ }
+ }
+ //
+ // Increment the instance
+ //
+ Instance++;
+ CurrentTable = NULL;
+ }
+ }
+
+ return Status;
+}
+
+VOID
+IsctOnReadyToBoot (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+/*++
+
+Routine Description:
+
+ Install Isct ACPI tables only when Isct is enabled
+
+Arguments:
+
+ Event - The event that triggered this notification function
+ Context - Pointer to the notification functions context
+
+Returns:
+
+ None
+
+--*/
+{
+ EFI_STATUS Status;
+ IGD_OPREGION_PROTOCOL *IgdOpRegionProtocol;
+
+ DEBUG ((EFI_D_INFO, "IsctOnReadyToBoot()\n"));
+
+ Status = InitializeIsctAcpiTables ();
+ if ( EFI_ERROR(Status) ) {
+ DEBUG((EFI_D_INFO, "Initializes ISCT SSDT tables Status = %x\n", Status));
+ return;
+ }
+
+ gBS->CloseEvent (Event);
+
+ //
+ // Notify the Graphics Driver that Isct is enabled
+ //
+ Status = gBS->LocateProtocol (
+ &gIgdOpRegionProtocolGuid,
+ NULL,
+ &IgdOpRegionProtocol
+ );
+ if (Status == EFI_SUCCESS) {
+ IgdOpRegionProtocol->OpRegion->Header.PCON |= 0x60;
+ DEBUG((EFI_D_INFO, "IsctOnReadyToBoot() PCON = 0x%x\n", IgdOpRegionProtocol->OpRegion->Header.PCON));
+ } else {
+ DEBUG ((EFI_D_ERROR, "IsctOnReadyToBoot() Unable to locate IgdOpRegionProtocol"));
+ }
+}
+
+EFI_STATUS
+IsctDxeEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+/*++
+
+Routine Description:
+
+ ISCT DXE driver entry point function
+
+Arguments:
+
+ ImageHandle - Image handle for this driver image
+ SystemTable - Pointer to the EFI System Table
+
+Returns:
+
+ EFI_OUT_OF_RESOURCES - no enough memory resource when installing reference code information protocol
+ EFI_SUCCESS - function completed successfully
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_EVENT Event;
+ PLATFORM_INFO_PROTOCOL *PlatformInfoProtocol;
+ ISCT_NVS_AREA *IsctNvs;
+ ISCT_PERSISTENT_DATA mIsctData;
+ UINT8 IsctEnabled;
+ AMI_ISCT_HOB *IsctDataHob;
+ EFI_GUID SetupGuid = SYSTEM_CONFIGURATION_GUID;
+ SETUP_DATA SetupData;
+ UINTN VarSize;
+ VOID *HobList;
+ EFI_GUID gIsctDataHobGuid = AMI_ISCT_HOB_GUID;
+
+ DEBUG ((EFI_D_INFO, "IsctDxe: Entry Point...\n"));
+
+ VarSize = sizeof (SETUP_DATA);
+ Status = gRT->GetVariable (
+ L"Setup",
+ &SetupGuid,
+ NULL,
+ &VarSize,
+ &SetupData
+ );
+ if ( EFI_ERROR(Status) ) {
+ DEBUG ((EFI_D_INFO, "ISCT: Get Variable Status = %x\n", Status));
+ return Status;
+ }
+
+ IsctEnabled = SetupData.IsctConfiguration;
+
+ if(IsctEnabled == 0) {
+ DEBUG ((EFI_D_INFO, "ISCT is Disabled \n"));
+ return EFI_SUCCESS;
+ }
+
+ Status = gBS->LocateProtocol (
+ &gPlatformInfoProtocolGuid,
+ NULL,
+ &PlatformInfoProtocol
+ );
+ if ( EFI_ERROR(Status) ) {
+ return Status;
+ }
+
+ //
+ // Allocate pools for ISCT Global NVS area
+ //
+ Status = (gBS->AllocatePool) (EfiReservedMemoryType, sizeof (ISCT_NVS_AREA), &mIsctNvsAreaProtocol.Area);
+ if ( EFI_ERROR (Status) ) {
+ DEBUG ((EFI_D_ERROR, "Error to allocate pool for ISCT_NVS_AREA"));
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+ ZeroMem ((VOID *) mIsctNvsAreaProtocol.Area, sizeof (ISCT_NVS_AREA));
+
+//ami override start
+// Status = (gBS->AllocatePool) (EfiReservedMemoryType, sizeof (ISCT_PERSISTENT_DATA), &mIsctNvsAreaProtocol.IsctData);
+// if ( EFI_ERROR (Status) ) {
+// DEBUG ((EFI_D_ERROR, "Error to allocate pool for ISCT_PERSISTENT_DATA"));
+// ASSERT_EFI_ERROR (Status);
+// return Status;
+// }
+// ZeroMem ((VOID *) mIsctNvsAreaProtocol.IsctData, sizeof (ISCT_PERSISTENT_DATA));
+//ami override end
+
+ IsctNvs = mIsctNvsAreaProtocol.Area;
+
+//ami override start
+// IsctNvs->IsctNvsPtr = (UINT32) (UINTN) IsctNvs;
+//ami override end
+ //
+ // Isct WA: Add option for use of RTC timer on Mobile systems until EC wake through GP27 is working
+ //
+ IsctNvs->IsctTimerChoice = SetupData.IsctTimerChoice; //get timer choice from setup options
+ if(PlatformInfoProtocol->PlatformFlavor == FlavorDesktop) {
+ IsctNvs->IsctTimerChoice = 1; //use RTC timer for Desktop
+ }
+#if defined (LVC_BOARD) && (LVC_BOARD == 1)
+ IsctNvs->IsctTimerChoice = 1; //use RTC timer for Lava Cayon Crb
+#endif
+
+
+ IsctNvs->IsctEnabled = 1;
+#ifdef RAPID_START_FLAG
+ IsctNvs->RapidStartEnabled = SetupData.RapidStartEnabled;
+#else
+ IsctNvs->RapidStartEnabled = 0;
+#endif
+
+//ami override start
+ //
+ // Assign IsctData pointer to GlobalNvsArea
+ //
+ mIsctData.IsctNvsPtr = (UINT32) (UINTN) IsctNvs;
+ mIsctData.IsctOverWrite = FALSE;
+//ami override end
+
+ //
+ // Look for Isct Data Hob
+ //
+ IsctDataHob = NULL;
+ Status = EfiGetSystemConfigurationTable (&gEfiHobListGuid, &HobList);
+ DEBUG ((EFI_D_INFO, "Get Isct Data HOB, Guid:%g \n", gIsctDataHobGuid));
+ IsctDataHob = (AMI_ISCT_HOB*)GetNextGuidHob (&gIsctDataHobGuid, HobList);
+ if (IsctDataHob == NULL) {
+ DEBUG ((EFI_D_ERROR, "Isct Data HOB not available\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ //
+ // Populate wake reason with hob data. Will be 0 for S5.
+ //
+
+ IsctNvs->IsctWakeReason = IsctDataHob->WakeReason;
+ DEBUG ((EFI_D_INFO, "Isct Data HOB found- Update Isct NVS with Wake Reason: %x\n", IsctNvs->IsctWakeReason));
+
+
+
+ //
+ // Install ISCT Global NVS protocol
+ //
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &ImageHandle,
+ &gIsctNvsAreaProtocolGuid,
+ &mIsctNvsAreaProtocol,
+ NULL
+ );
+ DEBUG((EFI_D_INFO, "Install IsctNvsAreaProtocolGuid = 0x%x\n", Status));
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "Error to install ISCT_NVS_AREA_PROTOCOL"));
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+
+ //
+ // Save ISCT Data to Variable
+ //
+ Status = gRT->SetVariable (
+ ISCT_PERSISTENT_DATA_NAME,
+ &gIsctPersistentDataGuid,
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
+ sizeof (ISCT_PERSISTENT_DATA),
+ &mIsctData
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG((EFI_D_INFO, "ISCT DXE: Save ISCT Data to Variable Status = %x\n", Status));
+ return Status;
+ }
+
+ //
+ // Update SetupVariable to ACPI GNVS
+ //
+ Status = IsctDxeUpdateSetupVariableToACPIGNVS (&SetupData);
+ if ( EFI_ERROR(Status) ) {
+ return Status;
+ }
+
+ //
+ // Register ready to boot event for ISCT
+ //
+
+ Status = EfiCreateEventReadyToBootEx (
+ EFI_TPL_NOTIFY,
+ IsctOnReadyToBoot,
+ NULL,
+ &Event
+ );
+ DEBUG((EFI_D_INFO, "Create ReadyToBoot event for ISCT Status = %x\n", Status));
+ if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+
+
+ DEBUG ((EFI_D_INFO, "(IsctDxe) entry End...\n"));
+
+ return EFI_SUCCESS;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Isct/Dxe/IsctAcpi.cif b/Board/EM/Isct/Dxe/IsctAcpi.cif
new file mode 100644
index 0000000..9a52eb6
--- /dev/null
+++ b/Board/EM/Isct/Dxe/IsctAcpi.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "IsctDxeAcpi"
+ category = ModulePart
+ LocalRoot = "Board\EM\Isct\Dxe"
+ RefName = "IsctAcpi"
+[files]
+"IsctAcpi.c"
+"IsctAcpi.h"
+"IsctAcpi.sdl"
+"IsctAcpi.dxs"
+"IsctAcpi.mak"
+<endComponent>
diff --git a/Board/EM/Isct/Dxe/IsctAcpi.dxs b/Board/EM/Isct/Dxe/IsctAcpi.dxs
new file mode 100644
index 0000000..046b302
--- /dev/null
+++ b/Board/EM/Isct/Dxe/IsctAcpi.dxs
@@ -0,0 +1,77 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctDxeAcpi/IsctAcpi.dxs 1 9/02/12 11:19p Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 9/02/12 11:19p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctDxeAcpi/IsctAcpi.dxs $
+//
+// 1 9/02/12 11:19p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IsctAcpi.dxs
+//
+// Description: Dependency expression file for IsctAcpi Driver.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include "AutoGen.h"
+#include "DxeDepex.h"
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+
+#if (EFI_SPECIFICATION_VERSION >= 0x0002000A)
+#include EFI_PROTOCOL_DEPENDENCY (AcpiTable)
+#else
+#include EFI_PROTOCOL_DEPENDENCY (AcpiSupport)
+#endif
+#include EFI_PROTOCOL_DEPENDENCY (FirmwareVolume)
+#include EFI_PROTOCOL_DEPENDENCY (GlobalNvsArea)
+
+#endif
+
+DEPENDENCY_START
+#if (EFI_SPECIFICATION_VERSION >= 0x0002000A)
+ EFI_ACPI_TABLE_PROTOCOL_GUID AND
+#else
+ EFI_ACPI_SUPPORT_GUID AND
+#endif
+ EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID AND
+ EFI_FIRMWARE_VOLUME_PROTOCOL_GUID
+DEPENDENCY_END
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Isct/Dxe/IsctAcpi.h b/Board/EM/Isct/Dxe/IsctAcpi.h
new file mode 100644
index 0000000..1dd5a0a
--- /dev/null
+++ b/Board/EM/Isct/Dxe/IsctAcpi.h
@@ -0,0 +1,146 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctDxeAcpi/IsctAcpi.h 2 6/02/13 10:52a Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 6/02/13 10:52a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctDxeAcpi/IsctAcpi.h $
+//
+// 2 6/02/13 10:52a Joshchou
+// [TAG] EIP125348
+// [Category] Improvement
+// [Description] [SBY] Intel Smart Connect Technology BIOS Sample Code
+// 052413 Update
+//
+// 1 9/02/12 11:19p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IsctAcpi.h
+//
+// Description: AMI Override for IsctAcpi
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+//
+// AMI Override for ISCT
+//
+
+#ifndef _ISCTACPI_H_
+#define _ISCTACPI_H_
+
+#include <token.h>
+#include <SetupDataDefinition.h>
+#define SYSTEM_CONFIGURATION_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+
+#include "Board\EM\Platform\PlatformInfo\PlatformInfo.h"
+#include EFI_PROTOCOL_PRODUCER (GlobalNvsArea)
+
+EFI_GUID gPlatformInfoProtocolGuid = EFI_PLATFORM_INFO_PROTOCOL_GUID;
+EFI_GUID gIsctNvsAreaProtocolGuid = ISCT_NVS_AREA_PROTOCOL_GUID;
+EFI_GUID gIsctPersistentDataGuid = ISCT_PERSISTENT_DATA_GUID;
+
+
+#ifndef BIT0
+#define BIT0 0x0001
+#define BIT1 0x0002
+#define BIT2 0x0004
+#define BIT3 0x0008
+#define BIT4 0x0010
+#define BIT5 0x0020
+#define BIT6 0x0040
+#define BIT7 0x0080
+#define BIT8 0x0100
+#define BIT9 0x0200
+#define BIT10 0x0400
+#define BIT11 0x0800
+#define BIT12 0x1000
+#define BIT13 0x2000
+#define BIT14 0x4000
+#define BIT15 0x8000
+#define BIT16 0x00010000
+#define BIT17 0x00020000
+#define BIT18 0x00040000
+#define BIT19 0x00080000
+#define BIT20 0x00100000
+#define BIT21 0x00200000
+#define BIT22 0x00400000
+#define BIT23 0x00800000
+#define BIT24 0x01000000
+#define BIT25 0x02000000
+#define BIT26 0x04000000
+#define BIT27 0x08000000
+#define BIT28 0x10000000
+#define BIT29 0x20000000
+#define BIT30 0x40000000
+#define BIT31 0x80000000
+#define BIT32 0x100000000
+#define BIT33 0x200000000
+#define BIT34 0x400000000
+#define BIT35 0x800000000
+#define BIT36 0x1000000000
+#define BIT37 0x2000000000
+#define BIT38 0x4000000000
+#define BIT39 0x8000000000
+#define BIT40 0x10000000000
+#define BIT41 0x20000000000
+#define BIT42 0x40000000000
+#define BIT43 0x80000000000
+#define BIT44 0x100000000000
+#define BIT45 0x200000000000
+#define BIT46 0x400000000000
+#define BIT47 0x800000000000
+#define BIT48 0x1000000000000
+#define BIT49 0x2000000000000
+#define BIT50 0x4000000000000
+#define BIT51 0x8000000000000
+#define BIT52 0x10000000000000
+#define BIT53 0x20000000000000
+#define BIT54 0x40000000000000
+#define BIT55 0x80000000000000
+#define BIT56 0x100000000000000
+#define BIT57 0x200000000000000
+#define BIT58 0x400000000000000
+#define BIT59 0x800000000000000
+#define BIT60 0x1000000000000000
+#define BIT61 0x2000000000000000
+#define BIT62 0x4000000000000000
+#define BIT63 0x8000000000000000
+#endif
+
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Isct/Dxe/IsctAcpi.mak b/Board/EM/Isct/Dxe/IsctAcpi.mak
new file mode 100644
index 0000000..c221e2e
--- /dev/null
+++ b/Board/EM/Isct/Dxe/IsctAcpi.mak
@@ -0,0 +1,127 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctDxeAcpi/IsctAcpi.mak 3 7/11/14 10:37a Mirayang $
+#
+# $Revision: 3 $
+#
+# $Date: 7/11/14 10:37a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctDxeAcpi/IsctAcpi.mak $
+#
+# 3 7/11/14 10:37a Mirayang
+# Fix iRST bulid error.
+#
+# 2 3/27/13 9:14a Bensonlai
+# [TAG] EIP118307
+# [Category] New Feature
+# [Description] Implementation of the ISCT Platform Design
+# Specification 0.8.
+# [Files] Isct.asl, IsctAcpi.c, IsctAcpi.mak
+#
+# 1 9/02/12 11:19p Bensonlai
+# Intel Smart Connect Technology initially releases.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: IsctAcpi.mak
+#
+# Description: Make file to build IsctAcpi components
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+all : IsctAcpi
+
+IsctAcpi : $(BUILD_DIR)\IsctAcpi.mak IsctAcpi_Bin
+
+$(BUILD_DIR)\IsctAcpi.mak : $(IsctAcpi_DIR)\$(@B).cif $(IsctAcpi_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(IsctAcpi_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+IsctAcpi_INCLUDES=\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(EDK_INCLUDES)\
+ $(PLATFORM_INFO_PROTOCOL_INCLUDES)\
+ /I$(ISCT_PLATFORM_DIR)\
+ /I$(IntelPlatformProtocolLib_DIR)\
+ $(INTEL_MCH_INCLUDES)\
+
+IsctAcpi_LIBS=\
+ $(EDKPROTOCOLLIB)\
+ $(EFIGUIDLIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EDKFRAMEWORKGUIDLIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGlueBaseMemoryLib_LIB)\
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeServicesTableLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueUefiBootServicesTableLib_LIB)\
+ $(EdkIIGlueUefiDevicePathLib_LIB)\
+ $(EdkIIGlueBasePciLibPciExpress_LIB)\
+ $(EdkIIGlueEdkDxeRuntimeDriverLib_LIB)\
+ $(IsctGuidLib_LIB)\
+ $(IsctProtocolLib_LIB)\
+ $(EdkIIGlueDxeHobLib_LIB)\
+ $(INTEL_SA_PROTOCOL_LIB)\
+
+IsctAcpi_DEFINES=\
+ $(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=IsctDxeEntryPoint"\
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_DXE_SERVICES_TABLE_LIB__ \
+ /D __EDKII_GLUE_DXE_HOB_LIB__ \
+
+IsctAcpi_Bin : $(IsctAcpi_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\IsctAcpi.mak all\
+ "MY_INCLUDES=$(IsctAcpi_INCLUDES)"\
+ "MY_DEFINES=$(IsctAcpi_DEFINES)"\
+ GUID=4839023B-4C12-4EB2-B2B8-C91B42D878A0 \
+ ENTRY_POINT=_ModuleEntryPoint \
+ EDKIIModule=DXEDRIVER\
+ TYPE=BS_DRIVER \
+ DEPEX1=$(IsctAcpi_DIR)\IsctAcpi.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ COMPRESS=1\
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Isct/Dxe/IsctAcpi.sdl b/Board/EM/Isct/Dxe/IsctAcpi.sdl
new file mode 100644
index 0000000..ba8ec59
--- /dev/null
+++ b/Board/EM/Isct/Dxe/IsctAcpi.sdl
@@ -0,0 +1,78 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctDxeAcpi/IsctAcpi.sdl 1 9/02/12 11:19p Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 9/02/12 11:19p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctDxeAcpi/IsctAcpi.sdl $
+#
+# 1 9/02/12 11:19p Bensonlai
+# Intel Smart Connect Technology initially releases.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: IsctAcpi.sdl
+#
+# Description: SDL file for IsctAcpi
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "IsctAcpi_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Help = "Main switch to enable ISCT support in Project in DXE Phase"
+End
+
+MODULE
+ File = "IsctAcpi.mak"
+ Help = "Includes IsctAcpi.mak to Project"
+End
+
+PATH
+ Name = "IsctAcpi_DIR"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\IsctAcpi.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Isct/Guid/IsctAcpiTableStorage/IsctAcpiTableStorage.c b/Board/EM/Isct/Guid/IsctAcpiTableStorage/IsctAcpiTableStorage.c
new file mode 100644
index 0000000..7ba5953
--- /dev/null
+++ b/Board/EM/Isct/Guid/IsctAcpiTableStorage/IsctAcpiTableStorage.c
@@ -0,0 +1,69 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctGuidLib/IsctAcpiTableStorage/IsctAcpiTableStorage.c 1 9/02/12 11:20p Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 9/02/12 11:20p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctGuidLib/IsctAcpiTableStorage/IsctAcpiTableStorage.c $
+//
+// 1 9/02/12 11:20p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IsctAcpiTableStorage.c
+//
+// Description: The GUID definition for Isct ACPI table storage file name
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+//
+// Statements that include other files
+//
+#include "EdkIIGlueDxe.h"
+#include "IsctAcpiTableStorage.h"
+
+//
+// Protocol GUID definition
+//
+EFI_GUID gIsctAcpiTableStorageGuid = ISCT_ACPI_TABLE_STORAGE_GUID;
+
+//
+// Protocol description
+//
+EFI_GUID_STRING
+ (&gIsctAcpiTableStorageGuid, "Isct ACPI Table Storage File Name", "Isct ACPI Table Storage file name GUID");
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Isct/Guid/IsctAcpiTableStorage/IsctAcpiTableStorage.h b/Board/EM/Isct/Guid/IsctAcpiTableStorage/IsctAcpiTableStorage.h
new file mode 100644
index 0000000..822c7a6
--- /dev/null
+++ b/Board/EM/Isct/Guid/IsctAcpiTableStorage/IsctAcpiTableStorage.h
@@ -0,0 +1,64 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctGuidLib/IsctAcpiTableStorage/IsctAcpiTableStorage.h 1 9/02/12 11:20p Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 9/02/12 11:20p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctGuidLib/IsctAcpiTableStorage/IsctAcpiTableStorage.h $
+//
+// 1 9/02/12 11:20p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IsctAcpiTableStorage.h
+//
+// Description: GUID definition for the Isct ACPI table storage file name
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifndef _ISCT_ACPI_TABLE_STORAGE_H_
+#define _ISCT_ACPI_TABLE_STORAGE_H_
+//FA2DDC38-3F19-4218-B53E-D9D79D626767
+#define ISCT_ACPI_TABLE_STORAGE_GUID \
+ { \
+ 0xfa2ddc38, 0x3f19, 0x4218, 0xb5, 0x3e, 0xd9, 0xd7, 0x9d, 0x62, 0x67, 0x67 \
+ }
+
+extern EFI_GUID gIsctAcpiTableStorageGuid;
+
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Isct/Guid/IsctGuidLib.cif b/Board/EM/Isct/Guid/IsctGuidLib.cif
new file mode 100644
index 0000000..153db99
--- /dev/null
+++ b/Board/EM/Isct/Guid/IsctGuidLib.cif
@@ -0,0 +1,14 @@
+<component>
+ name = "IsctGuidLib"
+ category = ModulePart
+ LocalRoot = "Board\EM\Isct\Guid"
+ RefName = "IsctGuidLib"
+[files]
+"IsctGuidLib.sdl"
+"IsctGuidLib.mak"
+"IsctGuidLib.inf"
+"IsctAcpiTableStorage\IsctAcpiTableStorage.c"
+"IsctAcpiTableStorage\IsctAcpiTableStorage.h"
+"IsctPersistentData\IsctPersistentData.c"
+"IsctPersistentData\IsctPersistentData.h"
+<endComponent>
diff --git a/Board/EM/Isct/Guid/IsctGuidLib.inf b/Board/EM/Isct/Guid/IsctGuidLib.inf
new file mode 100644
index 0000000..b361803
--- /dev/null
+++ b/Board/EM/Isct/Guid/IsctGuidLib.inf
@@ -0,0 +1,68 @@
+#
+# This file contains a 'Sample Driver' and is licensed as such
+# under the terms of your license agreement with Intel or your
+# vendor. This file may be modified by the user, subject to
+# the additional terms of the license agreement
+#
+#/*++
+#
+# Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved
+# This software and associated documentation (if any) is furnished
+# under a license and may only be used or copied in accordance
+# with the terms of the license. Except as permitted by such
+# license, no part of this software or documentation may be
+# reproduced, stored in a retrieval system, or transmitted in any
+# form or by any means without the express written consent of
+# Intel Corporation.
+#
+# Module Name:
+#
+# PlatformPolicyUpdatePeiLib.inf
+#
+# Abstract:
+#
+# Component description file for PEI DxePlatformPolicyUpdateLib Library
+#
+#--*/
+
+[defines]
+BASE_NAME = IsctGuidLib
+COMPONENT_TYPE = LIBRARY
+
+[sources.common]
+ IsctAcpiTableStorage\IsctAcpiTableStorage.c
+ IsctAcpiTableStorage\IsctAcpiTableStorage.h
+ IsctPersistentData\IsctPersistentData.c
+ IsctPersistentData\IsctPersistentData.h
+
+[sources.ia32]
+
+[sources.x64]
+
+[sources.ipf]
+
+[includes.common]
+ .
+ $(BUILD_DIR)\$(PROCESSOR)
+ $(EDK_SOURCE)\Foundation\Efi
+ $(EDK_SOURCE)\Foundation\Include
+ $(EDK_SOURCE)\Foundation\Efi\Include
+ $(EDK_SOURCE)\Foundation\Framework\Include
+
+#
+# EDK II Glue Library utilizes some standard headers from EDK
+#
+ $(EFI_SOURCE)
+ $(EDK_SOURCE)\Foundation
+ $(EDK_SOURCE)\Foundation\Framework
+ $(EDK_SOURCE)\Foundation\Include\IndustryStandard
+ $(EDK_SOURCE)\Foundation\Core\Dxe
+ $(EDK_SOURCE)\Foundation\Include\Pei
+ $(EDK_SOURCE)\Foundation\Library\Pei\Include
+ $(EDK_SOURCE)\Foundation\Library\Dxe\Include
+ $(EDK_SOURCE)\Foundation\Library\EdkIIGlueLib\Include
+# $(PLATFORM_ECP_PACKAGE)\Include
+
+[libraries.common]
+
+[nmake.common]
diff --git a/Board/EM/Isct/Guid/IsctGuidLib.mak b/Board/EM/Isct/Guid/IsctGuidLib.mak
new file mode 100644
index 0000000..09b58ad
--- /dev/null
+++ b/Board/EM/Isct/Guid/IsctGuidLib.mak
@@ -0,0 +1,78 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctGuidLib/IsctGuidLib.mak 1 9/02/12 11:20p Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 9/02/12 11:20p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctGuidLib/IsctGuidLib.mak $
+#
+# 1 9/02/12 11:20p Bensonlai
+# Intel Smart Connect Technology initially releases.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: IsctGuidLib.mak
+#
+# Description: Make file to build IsctSmm components.
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+all : IsctGuidLib
+
+$(IsctGuidLib_LIB) : IsctGuidLib
+
+IsctGuidLib : $(BUILD_DIR)\IsctGuidLib.mak IsctGuidLibBin
+
+$(BUILD_DIR)\IsctGuidLib.mak : $(IsctGuidLib_DIR)\$(@B).cif $(IsctGuidLib_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(IsctGuidLib_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+IsctGuidLib_INCLUDES =\
+ $(EDK_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+ $(EdkIIGlueLib_INCLUDES)\
+
+IsctGuidLibBin :
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\IsctGuidLib.mak all\
+ "MY_INCLUDES=$(IsctGuidLib_INCLUDES)" \
+ TYPE=LIBRARY
+!IF "$(x64_BUILD)"=="1"
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS) BUILD_DIR=$(BUILD_DIR)\IA32\
+ /f $(BUILD_DIR)\IsctGuidLib.mak all\
+ "MY_INCLUDES=$(IsctGuidLib_INCLUDES)" \
+ TYPE=PEI_LIBRARY
+!ENDIF
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Isct/Guid/IsctGuidLib.sdl b/Board/EM/Isct/Guid/IsctGuidLib.sdl
new file mode 100644
index 0000000..ed843c9
--- /dev/null
+++ b/Board/EM/Isct/Guid/IsctGuidLib.sdl
@@ -0,0 +1,79 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctGuidLib/IsctGuidLib.sdl 1 9/02/12 11:20p Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 9/02/12 11:20p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctGuidLib/IsctGuidLib.sdl $
+#
+# 1 9/02/12 11:20p Bensonlai
+# Intel Smart Connect Technology initially releases.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: IsctGuidLib.sdl
+#
+# Description: SDL file for IsctGuidLib
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "IsctGuidLib_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Help = "Main switch to enable ISCT GUID LIB support in Project"
+End
+
+MODULE
+ File = "IsctGuidLib.mak"
+ Help = "Includes IsctGuidLib.mak to Project"
+End
+
+PATH
+ Name = "IsctGuidLib_DIR"
+End
+
+TOKEN
+ Name = "IsctGuidLib_LIB"
+ Value = "$$(LIB_BUILD_DIR)\IsctGuidLib.lib"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Isct/Guid/IsctPersistentData/IsctPersistentData.c b/Board/EM/Isct/Guid/IsctPersistentData/IsctPersistentData.c
new file mode 100644
index 0000000..fd06f89
--- /dev/null
+++ b/Board/EM/Isct/Guid/IsctPersistentData/IsctPersistentData.c
@@ -0,0 +1,60 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctGuidLib/IsctPersistentData/IsctPersistentData.c 1 9/02/12 11:20p Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 9/02/12 11:20p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctGuidLib/IsctPersistentData/IsctPersistentData.c $
+//
+// 1 9/02/12 11:20p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IsctPersistentData.c
+//
+// Description: The GUID definition for Isct Persistent Data
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include "EdkIIGlueDxe.h"
+#include "IsctPersistentData.h"
+
+EFI_GUID gIsctPersistentDataGuid = ISCT_PERSISTENT_DATA_GUID;
+
+EFI_GUID_STRING
+ (&gIsctPersistentDataGuid, "Isct Persistent Data", "Isct Persistent Data GUID");
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Isct/Guid/IsctPersistentData/IsctPersistentData.h b/Board/EM/Isct/Guid/IsctPersistentData/IsctPersistentData.h
new file mode 100644
index 0000000..7846751
--- /dev/null
+++ b/Board/EM/Isct/Guid/IsctPersistentData/IsctPersistentData.h
@@ -0,0 +1,77 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctGuidLib/IsctPersistentData/IsctPersistentData.h 2 7/16/14 1:59a Mirayang $
+//
+// $Revision: 2 $
+//
+// $Date: 7/16/14 1:59a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctGuidLib/IsctPersistentData/IsctPersistentData.h $
+//
+// 2 7/16/14 1:59a Mirayang
+// Add complete function with iRST.
+//
+// 1 9/02/12 11:20p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IsctPersistentData.h
+//
+// Description: GUID definition for the Isct Persistent Data
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifndef _ISCT_PERSISTENT_DATA_H_
+#define _ISCT_PERSISTENT_DATA_H_
+
+// GUID {69A20012-B167-4e35-A999-98EE0835F02E}
+#define ISCT_PERSISTENT_DATA_GUID \
+ { \
+ 0x69a20012, 0xb167, 0x4e35, 0xa9, 0x99, 0x98, 0xee, 0x8, 0x35, 0xf0, 0x2e \
+ }
+
+#define ISCT_PERSISTENT_DATA_NAME L"IsctData"
+
+extern EFI_GUID gIsctPersistentDataGuid;
+
+#pragma pack(1)
+typedef struct {
+ UINT32 IsctNvsPtr;
+ UINT8 IsctOverWrite;
+} ISCT_PERSISTENT_DATA;
+#pragma pack()
+
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Isct/IsctPlatform.chm b/Board/EM/Isct/IsctPlatform.chm
new file mode 100644
index 0000000..e29fe7f
--- /dev/null
+++ b/Board/EM/Isct/IsctPlatform.chm
Binary files differ
diff --git a/Board/EM/Isct/IsctPlatform.cif b/Board/EM/Isct/IsctPlatform.cif
new file mode 100644
index 0000000..a73fd75
--- /dev/null
+++ b/Board/EM/Isct/IsctPlatform.cif
@@ -0,0 +1,17 @@
+<component>
+ name = "Intel Smart Connect Technology"
+ category = eModule
+ LocalRoot = "Board\EM\Isct"
+ RefName = "IsctPlatform"
+[files]
+"IsctPlatform.sdl"
+"IsctPlatform.chm"
+
+[parts]
+"IsctAcpiTables"
+"IsctPeiWakeReason"
+"IsctAcpi"
+"IsctSmm"
+"IsctGuidLib"
+"IsctProtocolLib"
+<endComponent>
diff --git a/Board/EM/Isct/IsctPlatform.sdl b/Board/EM/Isct/IsctPlatform.sdl
new file mode 100644
index 0000000..37a9e7f
--- /dev/null
+++ b/Board/EM/Isct/IsctPlatform.sdl
@@ -0,0 +1,78 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctPlatform.sdl 2 9/26/12 2:14a Bensonlai $
+#
+# $Revision: 2 $
+#
+# $Date: 9/26/12 2:14a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctPlatform.sdl $
+#
+# 2 9/26/12 2:14a Bensonlai
+# [TAG] None
+# [Category] Improvement
+# [Files] IsctPlatform.sdl
+# IsctPlatform.chm
+#
+# 1 9/02/12 11:17p Bensonlai
+# Intel Smart Connect Technology initially releases.
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: IsctPlatform.sdl
+#
+# Description: SDL file for IsctPlatform
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "ISCT_PLATFORM_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable ISCT support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "ISCT_PLATFORM_DIR"
+End
+
+ELINK
+ Name = "/D ISCT_FLAG"
+ Parent = "GLOBAL_DEFINES"
+ InvokeOrder = AfterParent
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Isct/Pei/IsctWakeReason.c b/Board/EM/Isct/Pei/IsctWakeReason.c
new file mode 100644
index 0000000..502aae6
--- /dev/null
+++ b/Board/EM/Isct/Pei/IsctWakeReason.c
@@ -0,0 +1,837 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctPeiWakeReason/IsctWakeReason.c 11 7/16/14 12:22a Mirayang $
+//
+// $Revision: 11 $
+//
+// $Date: 7/16/14 12:22a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctPeiWakeReason/IsctWakeReason.c $
+//
+// 11 7/16/14 12:22a Mirayang
+// Add complete function with iRST.
+//
+// 10 7/11/14 10:27a Mirayang
+// iRST bulid error.
+//
+// 9 7/08/14 5:07a Mirayang
+// EIP 142924 iSCT 5.0 for Shark Bay Platform
+//
+// 8 10/29/13 4:21a Joshchou
+// [TAG] EIP138184
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] Panel will light up when entering into S0-iSCT from
+// Rapid-Start-S4(iFFS)
+// [RootCause] We only judge the boot mode of S3,but it will resume from
+// S4 when enable iRST.
+// [Solution] Add the judgement of S4 resume
+//
+// 7 6/02/13 10:54a Joshchou
+// [TAG] EIP125348
+// [Category] Improvement
+// [Description] [SBY] Intel Smart Connect Technology BIOS Sample Code
+// 052413 Update
+//
+// 6 5/15/13 8:31a Bensonlai
+//
+// 5 5/14/13 6:28a Bensonlai
+// [TAG] EIP123328
+// [Category] Spec Update
+// [Severity] Normal
+// [Description] [SBY] Intel Smart Connect Technology 4.x BIOS Reference
+// Code
+//
+// 4 3/27/13 9:19a Bensonlai
+// [TAG] EIP119288
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] When KB or mouse device plugged in P/S2, USB2.0 ports, it
+// showed "PME Wake up event" by tool.
+// [Solution] Change the USB2.0 wake reason to User pressed power button
+// or HID event
+// [Files] IsctWakeReason.c
+//
+// 3 1/11/13 5:09a Bensonlai
+// [TAG] EIP112019
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] [ISCT] The wake up reason is incorrect for PME wake
+// [RootCause] The PME status be cleared before IsctWakeReason.c.
+// [Solution] Move the IsctGetWakeReason to gAmiPeiCompleteMRCGuid
+// [Files] IsctWakeReason.c
+//
+// 2 9/26/12 2:10a Bensonlai
+// [TAG] EIPNone
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] System hung up when ISCT enabled on the debug mode
+// [RootCause] Because we don't check the EFI stauts and use the
+// ASSERT_EFI_ERROR directly.
+// [Solution] Added the EFI stauts for checking.
+// [Files] IsctAcpi.c, IsctWakeReason.c and IsctWakeReason.c
+//
+// 1 9/02/12 11:18p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IsctWakeReason.c
+//
+// Description: Provide Wake Reason for ISCT.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGluePeim.h"
+#endif
+#include "PchAccess.h"
+//#include "PeiPlatformHookLib.h"
+#include "PchPlatformLib.h"
+#include "Pci.h"
+// ami override Start
+//#include "SetupVariable.h"
+#include <token.h>
+#include <SetupDataDefinition.h>
+#if defined (RapidStart_SUPPORT) && (RapidStart_SUPPORT == 1)
+#include <Ppi\RapidStart\RapidStart.h>
+#endif
+#define SYSTEM_CONFIGURATION_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+
+#define KSC_D_PORT 0x62
+#define KSC_C_PORT 0x66
+#define KSC_S_IBF 0x02 /// Input buffer is full/empty
+#define KSC_S_OBF 0x01 /// Output buffer is full/empty
+#define KSC_TIME_OUT 0x20000
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+//
+// GUID to AMI_ISCT Module
+//
+
+#define AMI_ISCT_HOB_GUID \
+ { \
+ 0x1af7b744, 0xcdfc, 0x4825, 0xa1, 0x77, 0xca, 0x48, 0xd2, 0xdf, 0xe2, 0xc6 \
+ }
+#else
+#define AMI_ISCT_HOB_GUID \
+ { \
+ 0x1af7b744, 0xcdfc, 0x4825, \
+ { \
+ 0xa1, 0x77, 0xca, 0x48, 0xd2, 0xdf, 0xe2, 0xc6 \
+ } \
+ }
+#endif
+
+#pragma pack (1)
+
+typedef struct {
+ EFI_HOB_GUID_TYPE EfiHobGuidType;
+ UINT16 ISCT_PM1_STS;
+ UINT8 WakeReason;
+} AMI_ISCT_HOB;
+
+#pragma pack ()
+// ami override End
+
+#include EFI_GUID_DEFINITION (IsctPersistentData)
+#include EFI_PPI_DEFINITION (EndOfPeiSignal)
+//#include EFI_PPI_DEFINITION (MemoryDiscovered)
+
+EFI_GUID gEfiPeiEndOfPeiPhasePpiGuid = EFI_PEI_END_OF_PEI_PHASE_PPI_GUID;
+
+
+#define KSC_GETWAKE_STATUS 0x35
+#define KSC_CLEARWAKE_STATUS 0x36
+
+EFI_STATUS
+IsctGetWakeReason (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
+ IN VOID *Ppi
+ );
+
+STATIC EFI_PEI_NOTIFY_DESCRIPTOR mIsctGetWakeReasonNotifyDesc = {
+ (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gEfiPeiEndOfPeiPhasePpiGuid,
+ IsctGetWakeReason
+};
+
+
+
+
+/**
+ Checks for a PCIe Network Device attached to the root ports to see if it caused the PME
+
+ @retval 1 An attached PCIe Network device caused a PME.
+ @retval 0 No PME caused by network device
+**/
+UINT8
+IsNetworkDevicePME (
+ )
+/*++
+
+Routine Description:
+
+ Checks for a PCIe Network Device attached to the root ports to see if it caused the PME
+
+Arguments:
+
+ None
+
+Returns:
+
+ UINT8 NetworkWakePME - 1 An attached PCIe Network device caused a PME.
+ 0 No PME caused by network device
+
+--*/
+{
+ UINT8 NetworkWakePME;
+ UINT8 RpFunction;
+ UINTN RpBase;
+ UINTN EpBase;
+ UINT8 CapPtr;
+ UINT8 NxtPtr;
+ UINT8 CapID;
+ UINT8 PMCreg;
+ UINT8 PMCSR;
+// ami override Start
+ UINT8 SecBusNum;
+// ami override End
+ NetworkWakePME = 0;
+
+ //
+ // Scan PCH PCI-EX slots (Root Port) : Device 28 Function 0~7
+ //
+ for (RpFunction = 0; RpFunction < GetPchMaxPciePortNum (); RpFunction ++) {
+ RpBase = MmPciAddress (0, DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS, RpFunction, 0);
+ DEBUG ((EFI_D_INFO, "IsctPei: PCI-EX Root Port: 0x%x ...\n", RpFunction));
+
+ if ((MmioRead16 (RpBase + R_PCH_PCIE_SLSTS) & B_PCH_PCIE_SLSTS_PDS) != 0 && MmioRead16 (RpBase + R_PCH_PCIE_VENDOR_ID) == V_PCH_PCIE_VENDOR_ID) {
+// ami override Start
+ //
+ // Set WLAN PortBus = 1 to Read Endpoint.
+ //
+// MmioAndThenOr32(RpBase + R_PCH_PCIE_BNUM, 0xFF0000FF, 0x00010100);
+ SecBusNum = (UINT8) (MmioRead32 (RpBase + R_PCH_PCIE_BNUM) >> 8);
+// EpBase = MmPciAddress (0, 1, 0, 0, 0);
+ EpBase = MmPciAddress (0, SecBusNum, 0, 0, 0);
+// ami override End
+
+ //
+ // A config write is required in order for the device to re-capture the Bus number,
+ // according to PCI Express Base Specification, 2.2.6.2
+ // Write to a read-only register VendorID to not cause any side effects.
+ //
+ MmioWrite16 (EpBase + R_PCH_PCIE_VENDOR_ID, 0);
+
+ //
+ // Check to see if the Device is a Network Device
+ //
+ if ((MmioRead16 (EpBase + PCI_CLASSCODE_OFFSET + 0x01) & 0xFF00) == (PCI_CLASS_NETWORK << 8)) { //PCI_CLASS_NETWORK_OTHER
+ DEBUG ((EFI_D_INFO, "IsctPei: Found a network device on Root Port - 0x%x and device ID is - 0x%x\n", RpFunction, MmioRead16 (EpBase + R_PCH_PCIE_DEVICE_ID)));
+
+ //
+ // Find out PMCSR register
+ //
+ CapPtr = MmioRead8 (EpBase + R_PCH_PCIE_CAPP);
+ CapID = MmioRead8 (EpBase + CapPtr);
+ NxtPtr = (UINT8) (MmioRead16 (EpBase + CapPtr) >> 8);
+ PMCreg = CapPtr;
+
+ while (CapID != 0x01) {
+ CapID = MmioRead8 (EpBase + NxtPtr);
+ if (CapID == 0x01) {
+ PMCreg = NxtPtr;
+ break;
+ }
+ NxtPtr = (UINT8) (MmioRead16 (EpBase + NxtPtr) >> 8);
+
+ if (NxtPtr == 0){
+ PMCreg = 0;
+ break;
+ }
+ }
+
+ if (PMCreg != 0) {
+ PMCSR = PMCreg + 0x04;
+
+ //
+ // Check whether PME enabled. Set NetworkWakePME to 1 if device caused PME.
+ //
+ if (MmioRead16 (EpBase + PMCSR) & BIT15) {
+ NetworkWakePME = 1;
+ DEBUG ((EFI_D_INFO, "IsctPei: The network device 0x%x caused the PME\n", MmioRead16 (EpBase + R_PCH_PCIE_DEVICE_ID)));
+// ami override Start
+ //
+ // Restore bus numbers on the WLAN bridge.
+ //
+// MmioAnd32(RpBase + R_PCH_PCIE_BNUM, 0xFF0000FF);
+// ami override End
+ break;
+ }
+ }
+// ami override Start
+ //
+ // Restore bus numbers on the WLAN bridge.
+ //
+// MmioAnd32(RpBase + R_PCH_PCIE_BNUM, 0xFF0000FF);
+// ami override End
+ }
+ }
+ }
+
+ return NetworkWakePME;
+}
+
+EFI_STATUS
+IsctGetWakeReason (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
+ IN VOID *Ppi
+ )
+/*++
+
+Routine Description:
+
+ Get system Wake Reason and save into CMOS 72/73 for ACPI ASL to use.
+
+Arguments:
+
+ PeiServices General purpose services available to every PEIM.
+
+Returns:
+
+--*/
+{
+ EFI_STATUS Status;
+ UINT32 PmBase;
+ UINT16 PM1STS;
+ UINT16 USB29VID;
+ UINT16 USB29STS;
+ UINT16 USB26VID;
+ UINT16 USB26STS;
+ UINT16 xHCIVID;
+ UINT16 xHCISTS;
+ UINT16 LanVID;
+ UINT16 LanSTS;
+ UINT8 WakeReason;
+ UINT8 KscStatus;
+ UINT8 WakeStatus;
+ UINTN Count;
+ UINTN Size;
+ UINT8 PcieWake;
+ ISCT_PERSISTENT_DATA IsctData;
+ PEI_READ_ONLY_VARIABLE_PPI *ReadOnlyVariable;
+ UINT8 *IsctNvsPtr;
+ PCH_SERIES PchSeries;
+// ami override Start
+ AMI_ISCT_HOB *AmiIsctHobPtr;
+ EFI_GUID AmiIsctHobGuid = AMI_ISCT_HOB_GUID;
+ EFI_GUID gIsctPersistentDataGuid = ISCT_PERSISTENT_DATA_GUID;
+
+#if defined(RapidStart_SUPPORT) && (RapidStart_SUPPORT == 1)
+ RAPID_START_PPI *RapidStartPpi;
+ BOOLEAN RapidStartWake;
+ EFI_GUID gRapidStartPpiGuid = RAPID_START_PPI_GUID;
+ //
+ // Get Rapid Start wake info
+ //
+ RapidStartPpi = NULL;
+ RapidStartWake = FALSE;
+ Status = PeiServicesLocatePpi (
+ &gRapidStartPpiGuid,
+ 0,
+ NULL,
+ (VOID **) &RapidStartPpi
+ );
+ if (Status == EFI_SUCCESS) {
+ DEBUG ((EFI_D_INFO, "IsctPeiME: RapidStartPpi Found\n"));
+ if (RapidStartPpi->GetMode (RapidStartPpi) == RapidStartEntry) {
+ DEBUG ((EFI_D_INFO, "IsctPei: RapidStart Transition Wake\n"));
+ RapidStartWake = TRUE;
+ } else {
+ DEBUG ((EFI_D_INFO, "IsctPei: Not RapidStart Transition Wake\n"));
+ }
+ }
+#endif
+// ami override End
+
+ //
+ // Locate PEI Read Only Variable PPI.
+ //
+ Status = (*PeiServices)->LocatePpi (
+ PeiServices,
+ &gPeiReadOnlyVariablePpiGuid,
+ 0,
+ NULL,
+ &ReadOnlyVariable
+ );
+
+ if ( EFI_ERROR(Status) ) {
+ return Status;
+ }
+
+ Size = sizeof (ISCT_PERSISTENT_DATA);
+ Status = ReadOnlyVariable->PeiGetVariable (
+ PeiServices,
+ ISCT_PERSISTENT_DATA_NAME,
+ &gIsctPersistentDataGuid,
+ NULL,
+ &Size,
+ &IsctData
+ );
+
+ if ( EFI_ERROR(Status) ) {
+ DEBUG ((EFI_D_INFO, "IsctPei: GetVariable for IsctData Status = %x \n", Status));
+ return Status;
+ }
+
+ DEBUG ((EFI_D_INFO, "IsctPei: IsctNvsPtr = %x \n", IsctData.IsctNvsPtr));
+
+ //
+ // Clear Isct Wake Reason
+ //
+ DEBUG ((EFI_D_INFO, "IsctPei: Previous Isct Wake Reason = %x \n", *(UINT8 *) IsctData.IsctNvsPtr));
+ IsctNvsPtr = (UINT8 *) IsctData.IsctNvsPtr;
+ *IsctNvsPtr = 0;
+ WakeReason = 0;
+ PcieWake = 0;
+
+ DEBUG ((EFI_D_INFO, "IsctPei: Address for Isct Nvs Region = %x \n", IsctNvsPtr));
+ DEBUG ((EFI_D_INFO, "IsctPei: Timer Value saved for RTC timer = %x \n", *(UINT32 *)(IsctData.IsctNvsPtr + 0x8)));
+
+ PchSeries = GetPchSeries();
+ //
+ // Initialize base address for Power Management
+ //
+ PmBase = PchLpcPciCfg16 (R_PCH_LPC_ACPI_BASE) & B_PCH_LPC_ACPI_BASE_BAR;
+
+// ami override Start
+ AmiIsctHobPtr = GetFirstGuidHob (&AmiIsctHobGuid);
+ if (AmiIsctHobPtr == NULL) {
+ DEBUG ((EFI_D_ERROR, "IsctPei: AmiIsctHobPtr not available\n"));
+ return EFI_NOT_FOUND;
+ }
+
+// PM1STS = IoRead16(PmBase + R_PCH_ACPI_PM1_STS);
+ PM1STS = AmiIsctHobPtr->ISCT_PM1_STS;
+//ami override End//
+ PM1STS &= (B_PCH_ACPI_PM1_STS_PWRBTN | B_PCH_ACPI_PM1_STS_RTC | BIT14);
+
+ //
+ // Check PM1_STS
+ //
+ DEBUG ((EFI_D_INFO, "IsctPei: PM1_STS Value= %x \n", PM1STS));
+ DEBUG ((EFI_D_INFO, " Bit set in PM1_STS: \n"));
+ switch (PM1STS){
+ case B_PCH_ACPI_PM1_STS_PWRBTN:
+ WakeReason |= 0x01; //User event
+ DEBUG ((EFI_D_INFO, " PowerButton\n"));
+ break;
+ case B_PCH_ACPI_PM1_STS_RTC:
+ WakeReason |= 0x04; //RTC Timer
+ DEBUG ((EFI_D_INFO, " RTC Timer\n"));
+ break;
+ case BIT14: //PCIe Wake
+ PcieWake = 1;
+ WakeReason |= 0x08; //PME
+ DEBUG ((EFI_D_INFO, " PCIe PME\n"));
+ break;
+ default:
+ WakeReason = 0;
+ DEBUG ((EFI_D_INFO, " Unknown\n"));
+ break;
+ }
+ DEBUG ((EFI_D_INFO, "IsctPei: PCIe Wake: %x\n", PcieWake));
+
+ //
+ // EHCI PME : Offset 0x54(15)
+ //
+ USB29VID = MmioRead16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_USB,
+ PCI_FUNCTION_NUMBER_PCH_EHCI,
+ R_PCH_USB_VENDOR_ID
+ ));
+
+ USB29STS = MmioRead16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_USB,
+ PCI_FUNCTION_NUMBER_PCH_EHCI,
+ R_PCH_EHCI_PWR_CNTL_STS
+ )) & (B_PCH_EHCI_PWR_CNTL_STS_PME_STS | B_PCH_EHCI_PWR_CNTL_STS_PME_EN);
+
+ if (USB29VID != 0xFFFF && USB29VID != 0){
+ if (USB29STS == 0x8100){
+ DEBUG ((EFI_D_INFO, "IsctPei: EHCI Wake\n"));
+ WakeReason |= 0x01; //User event
+ }
+ }
+
+ if (PchSeries == PchH) {
+ USB26VID = MmioRead16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_USB_EXT,
+ PCI_FUNCTION_NUMBER_PCH_EHCI,
+ R_PCH_USB_VENDOR_ID
+ ));
+
+ USB26STS = MmioRead16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_USB_EXT,
+ PCI_FUNCTION_NUMBER_PCH_EHCI,
+ R_PCH_EHCI_PWR_CNTL_STS
+ )) & (B_PCH_EHCI_PWR_CNTL_STS_PME_STS | B_PCH_EHCI_PWR_CNTL_STS_PME_EN);
+
+ if (USB26VID != 0xFFFF && USB26VID != 0){
+ if (USB26STS == 0x8100){
+ DEBUG ((EFI_D_INFO, "IsctPei: EHCI Wake\n"));
+ WakeReason |= 0x01; //User Event
+ }
+ }
+ }
+
+ //
+ // Intel GigaLAN PME : Offset 0xCC(15)
+ //
+ LanVID = MmioRead16 (
+ MmPciAddress (
+ 0,
+ PCI_BUS_NUMBER_PCH_LAN,
+ PCI_DEVICE_NUMBER_PCH_LAN,
+ PCI_FUNCTION_NUMBER_PCH_LAN,
+ R_PCH_LAN_VENDOR_ID
+ ));
+
+ LanSTS = MmioRead16 (
+ MmPciAddress (
+ 0,
+ PCI_BUS_NUMBER_PCH_LAN,
+ PCI_DEVICE_NUMBER_PCH_LAN,
+ PCI_FUNCTION_NUMBER_PCH_LAN,
+ R_PCH_LAN_PMCS
+ )) & (B_PCH_LAN_PMCS_PMES | B_PCH_LAN_PMCS_PMEE);
+
+
+ if (LanVID != 0xFFFF && LanVID != 0){
+ if (LanSTS == 0x8100){
+ DEBUG ((EFI_D_INFO, "IsctPei: LAN PME Wake\n"));
+ WakeReason |= 0x08; //PME
+ }
+ }
+
+ //
+ // xHCI PME : Offset 0x74(15)
+ //
+ xHCIVID = MmioRead16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_XHCI,
+ PCI_FUNCTION_NUMBER_PCH_XHCI,
+ R_PCH_USB_VENDOR_ID
+ ));
+
+ xHCISTS = MmioRead16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_XHCI,
+ PCI_FUNCTION_NUMBER_PCH_XHCI,
+ R_PCH_XHCI_PWR_CNTL_STS
+ )) & (B_PCH_XHCI_PWR_CNTL_STS_PME_STS | B_PCH_XHCI_PWR_CNTL_STS_PME_EN);
+
+
+ if (xHCIVID != 0xFFFF && xHCIVID != 0){
+ if (xHCISTS == 0x8100){
+ DEBUG ((EFI_D_INFO, "IsctPei: xHCI Wake\n"));
+ WakeReason |= 0x08; //PME
+ }
+ }
+
+ //
+ // Check if IsctTimerChoice is set to EC timer
+ //
+ if (*(UINT8 *)((UINTN)(IsctData.IsctNvsPtr + 0x3)) == 0) {
+ DEBUG ((EFI_D_INFO, "IsctPei: EC timer is being used\n"));
+ //
+ // Check KSC Input Buffer
+ //
+ Count = 0;
+ KscStatus = IoRead8 (KSC_C_PORT);
+
+ while (((KscStatus & KSC_S_IBF) != 0) && (Count < KSC_TIME_OUT)) {
+ KscStatus = IoRead8 (KSC_C_PORT);
+ Count++;
+ }
+
+ //
+ // Send EC GetWakeStatus command
+ //
+ IoWrite8(KSC_C_PORT, KSC_GETWAKE_STATUS);
+
+ //
+ // Check KSC Output Buffer
+ //
+ Count = 0;
+ KscStatus = IoRead8 (KSC_C_PORT);
+
+ while (((KscStatus & KSC_S_OBF) == 0) && (Count < KSC_TIME_OUT)) {
+ KscStatus = IoRead8 (KSC_C_PORT);
+ Count++;
+ }
+
+ //
+ // Receive wake reason
+ //
+ WakeStatus = IoRead8 (KSC_D_PORT);
+
+ //
+ // Check KSC Input Buffer
+ //
+ Count = 0;
+ KscStatus = IoRead8 (KSC_C_PORT);
+
+ while (((KscStatus & KSC_S_IBF) != 0) && (Count < KSC_TIME_OUT)) {
+ KscStatus = IoRead8 (KSC_C_PORT);
+ Count++;
+ }
+
+ //
+ // Send EC ClearWakeStatus command
+ //
+ IoWrite8(KSC_C_PORT, KSC_CLEARWAKE_STATUS);
+ DEBUG ((EFI_D_INFO, "IsctPei: EC Wake Status: %x\n", WakeStatus));
+ switch (WakeStatus){
+ case BIT1: // Lid Wake
+ WakeReason |= 0x01; //Bit0 is user event wake
+ break;
+ case BIT2: // Keyboard/Mouse Wake
+ WakeReason |= 0x01; //Bit0 is user event wake
+ break;
+ case BIT3: // EC Timer Wake
+ WakeReason |= 0x02; //Bit1 is EC timer wake
+ break;
+ case BIT4: // PCIe Wake
+ WakeReason |= 0x08; //Wake due to PME
+ break;
+ default: // Unknown
+ WakeReason |= 0x00;
+ break;
+ }
+ //
+ // Override because of EC timer wake from FFS_S3 or S4 (Need EC support it!)
+ //
+ if ((PM1STS == B_PCH_ACPI_PM1_STS_PWRBTN) && (WakeStatus == BIT3)) {
+ WakeReason = 0x02;
+ }
+ }
+
+// ami override Start
+#if defined(RapidStart_SUPPORT) && (RapidStart_SUPPORT == 1)
+ DEBUG ((EFI_D_INFO, "IsctPei: IsctData.IsctOverWrite : %d \n",IsctData.IsctOverWrite));
+
+ DEBUG ((EFI_D_INFO, "IsctPei: RapidStartWake : %d \n",RapidStartWake));
+
+ if ((WakeReason & 0x04) == 0x04) {
+ if ((RapidStartWake == FALSE) && (IsctData.IsctOverWrite == TRUE)) {
+ DEBUG ((EFI_D_INFO, "IsctPei: RapidStartWake == FALSE && IsctData.IsctOverWrite == TRUE. \n"));
+ WakeReason |= 0x0002;
+ WakeReason &= ~0x04;
+ }
+ }
+#else
+ //
+ //If RTC wake, check if IsctOverWrite is set to OS
+ //
+ if (WakeReason == 0x04) {
+ if ((IsctData.IsctOverWrite)) == 0) {
+ WakeReason = 0x04;
+ } else {
+ WakeReason = 0x02;
+ }
+ }
+#endif
+// ami override End
+
+ //
+ // Check for Network Device PME from PCIe if PME wake reason
+ //
+ if(PcieWake == 1) //PME
+ {
+ DEBUG ((EFI_D_INFO, "IsctPei: PME wake reason- check if from network device\n"));
+ if(IsNetworkDevicePME())
+ {
+ WakeReason |= BIT4;
+ DEBUG ((EFI_D_INFO, "IsctPei: IsNetworkDevicePME() returned Yes\n"));
+ }
+ }
+
+ //
+ // Set Isct Wake Reason
+ //
+ DEBUG ((EFI_D_INFO, "IsctPei: Wake Reason reported to Agent= %x \n", WakeReason));
+ *(UINT8 *)IsctData.IsctNvsPtr = WakeReason;
+ AmiIsctHobPtr->WakeReason = WakeReason;
+ return EFI_SUCCESS;
+}
+
+
+EFI_STATUS
+EFIAPI
+IsctPeiEntryPoint (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+/*++
+
+Routine Description:
+
+ Set up
+
+Arguments:
+
+ PeiServices General purpose services available to every PEIM.
+
+Returns:
+
+--*/
+{
+ EFI_STATUS Status;
+ UINT8 IsctEnabled;
+ EFI_GUID SetupGuid = SYSTEM_CONFIGURATION_GUID;
+ PEI_READ_ONLY_VARIABLE_PPI *ReadOnlyVariable;
+ SETUP_DATA SetupData;
+ UINTN VariableSize;
+// ami override Start
+
+ EFI_BOOT_MODE BootMode;
+ AMI_ISCT_HOB *AmiIsctHobPtr;
+ EFI_GUID AmiIsctHobGuid = AMI_ISCT_HOB_GUID;
+ UINT32 PmBase;
+
+ DEBUG ((EFI_D_ERROR, "IsctPei Entry Point\n"));
+ IsctEnabled = 0;
+
+ //
+ // Locate PEI Read Only Variable PPI.
+ //
+ Status = (**PeiServices).LocatePpi (
+ PeiServices,
+ &gPeiReadOnlyVariablePpiGuid,
+ 0,
+ NULL,
+ &ReadOnlyVariable
+ );
+ if ( EFI_ERROR(Status) ) {
+ DEBUG ((EFI_D_ERROR, "IsctPei: LocatePpi is fail\n"));
+ return Status;
+ }
+
+ //
+ // Get Setup Variable
+ //
+ VariableSize = sizeof (SETUP_DATA);
+ Status = ReadOnlyVariable->PeiGetVariable (
+ PeiServices,
+ L"Setup",
+ &SetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData
+ );
+ if ( EFI_ERROR(Status) ) {
+ DEBUG ((EFI_D_ERROR, "IsctPei: Setup is fail\n"));
+ return Status;
+ }
+
+ IsctEnabled = SetupData.IsctConfiguration;
+
+ if (IsctEnabled == 0) {
+ DEBUG ((EFI_D_INFO, "Isct Disabled\n"));
+ return EFI_SUCCESS;
+ }
+ else {
+// ami override Start
+ Status = PeiServicesGetBootMode (&BootMode);
+ if ( EFI_ERROR( Status ) ) {
+ DEBUG ((EFI_D_ERROR, "IsctPei: Get Boot Mode is fail\n"));
+ return Status;
+ }
+
+
+ Status = (*PeiServices)->CreateHob (PeiServices, EFI_HOB_TYPE_GUID_EXTENSION, sizeof (AMI_ISCT_HOB), (VOID **) &AmiIsctHobPtr);
+ if ( EFI_ERROR( Status ) ) {
+ DEBUG ((EFI_D_ERROR, "IsctPei: CreateHob is fail for AmiIsctHobPtr\n"));
+ return Status;
+ }
+
+ //
+ // Initialize base address for Power Management
+ //
+ PmBase = PchLpcPciCfg16 (R_PCH_LPC_ACPI_BASE) & B_PCH_LPC_ACPI_BASE_BAR;
+
+ AmiIsctHobPtr->EfiHobGuidType.Name = AmiIsctHobGuid;
+ AmiIsctHobPtr->ISCT_PM1_STS = IoRead16(PmBase + R_PCH_ACPI_PM1_STS);
+ DEBUG ((EFI_D_ERROR, "IsctPei: AmiIsctHobPtr->ISCT_PM1_STS = %x \n", AmiIsctHobPtr->ISCT_PM1_STS));
+
+
+ //
+ // Get Rapid Start wake info
+ //
+ if ( (BootMode == BOOT_ON_S3_RESUME) || (BootMode == BOOT_ON_S4_RESUME) ) {
+
+ Status = PeiServicesNotifyPpi (&mIsctGetWakeReasonNotifyDesc);
+ if ( EFI_ERROR(Status) ) {
+ DEBUG ((EFI_D_INFO, "IsctPei: Notify EFI_PEI_END_OF_PEI_PHASE_PPI_GUID Status = %x \n", Status));
+ return Status;
+ }
+
+ return Status;
+ }
+// ami override end
+ }
+
+ return EFI_SUCCESS;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Isct/Pei/IsctWakeReason.cif b/Board/EM/Isct/Pei/IsctWakeReason.cif
new file mode 100644
index 0000000..631341a
--- /dev/null
+++ b/Board/EM/Isct/Pei/IsctWakeReason.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "IsctPeiWakeReason"
+ category = ModulePart
+ LocalRoot = "Board\EM\Isct\Pei"
+ RefName = "IsctPeiWakeReason"
+[files]
+"IsctWakeReason.c"
+"IsctWakeReason.dxs"
+"IsctWakeReason.sdl"
+"IsctWakeReason.mak"
+<endComponent>
diff --git a/Board/EM/Isct/Pei/IsctWakeReason.dxs b/Board/EM/Isct/Pei/IsctWakeReason.dxs
new file mode 100644
index 0000000..f367bfe
--- /dev/null
+++ b/Board/EM/Isct/Pei/IsctWakeReason.dxs
@@ -0,0 +1,73 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctPeiWakeReason/IsctWakeReason.dxs 2 9/26/12 2:08a Bensonlai $
+//
+// $Revision: 2 $
+//
+// $Date: 9/26/12 2:08a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctPeiWakeReason/IsctWakeReason.dxs $
+//
+// 2 9/26/12 2:08a Bensonlai
+// [TAG] Nono
+// [Category] Improvement
+// [Description] Modified comment
+// [Files] IsctWakeReason.dxs
+// IsctWakeReason.sdl
+// IsctWakeReason.mak
+//
+// 1 9/02/12 11:18p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IsctWakeReason.dxs
+//
+// Description: Dependency expression file for IsctWakeReason Driver.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include "AutoGen.h"
+#include "PeimDepex.h"
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+#include EFI_PPI_DEPENDENCY (Variable)
+
+#include EFI_PPI_DEPENDENCY (PchPeiInitDone)
+#endif
+
+DEPENDENCY_START
+ PEI_READ_ONLY_VARIABLE_ACCESS_PPI_GUID AND
+ PCH_PEI_INIT_DONE_PPI_GUID
+DEPENDENCY_END
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Isct/Pei/IsctWakeReason.mak b/Board/EM/Isct/Pei/IsctWakeReason.mak
new file mode 100644
index 0000000..ccb3b7d
--- /dev/null
+++ b/Board/EM/Isct/Pei/IsctWakeReason.mak
@@ -0,0 +1,135 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctPeiWakeReason/IsctWakeReason.mak 5 7/16/14 12:22a Mirayang $
+#
+# $Revision: 5 $
+#
+# $Date: 7/16/14 12:22a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctPeiWakeReason/IsctWakeReason.mak $
+#
+# 5 7/16/14 12:22a Mirayang
+# Add complete function with iRST.
+#
+# 4 7/11/14 10:29a Mirayang
+# Fix iRST bulid error.
+#
+# 3 7/08/14 5:08a Mirayang
+# EIP142924 iSCT 5.0 for Shark Bay Platform
+#
+# 2 9/26/12 2:08a Bensonlai
+# [TAG] Nono
+# [Category] Improvement
+# [Description] Modified comment
+# [Files] IsctWakeReason.dxs
+# IsctWakeReason.sdl
+# IsctWakeReason.mak
+#
+# 1 9/02/12 11:18p Bensonlai
+# Intel Smart Connect Technology initially releases.
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: IsctWakeReason.mak
+#
+# Description: Make file to build IsctWakeReason components
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+all : IsctWakeReason
+IsctWakeReason : $(BUILD_DIR)\IsctWakeReason.mak IsctWakeReasonBin
+
+$(BUILD_DIR)\IsctWakeReason.mak : $(IsctWakeReason_DIR)\$(@B).cif $(IsctWakeReason_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(IsctWakeReason_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+IsctWakeReason_INCLUDES=\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+ $(INTEL_MCH_INCLUDES)\
+ /I$(ISCT_PLATFORM_DIR)\
+ /I$(IntelPlatformProtocolLib_DIR)\
+!IFDEF RapidStart_SUPPORT
+!IF "$(RapidStart_SUPPORT)" == "1"
+ $(RAPIDSTART_INCLUDES)\
+!ENDIF
+!ENDIF
+
+IsctWakeReason_DEFINES=\
+ $(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=IsctPeiEntryPoint"\
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__\
+ /D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_PEI_SERVICES_LIB__ \
+ /D __EDKII_GLUE_PEI_MEMORY_ALLOCATION_LIB__ \
+ /D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ \
+ /D __EDKII_GLUE_PEI_HOB_LIB__ \
+
+IsctWakeReason_LIBS =\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+ $(EdkIIGlueBaseLibIA32_LIB)\
+ $(EdkIIGlueBasePrintLib_LIB)\
+ $(EdkIIGluePeiMemoryAllocationLib_LIB)\
+ $(EdkIIGluePeiDebugLibReportStatusCode_LIB)\
+ $(EdkIIGluePeiReportStatusCodeLib_LIB)\
+ $(EdkIIGluePeiServicesLib_LIB)\
+ $(EdkIIGlueBasePciLibPciExpress_LIB)\
+ $(EdkIIGlueBasePostCodeLibPort80_LIB)\
+ $(EDKFRAMEWORKPPILIB)\
+ $(PchPlatformPeiLib_LIB)\
+ $(IntelPchPpiLib_LIB)\
+ $(EdkIIGluePeiHobLib_LIB) \
+ $(IsctGuidLib_LIB)\
+!IFDEF RapidStart_SUPPORT
+!IF "$(RapidStart_SUPPORT)" == "1"
+ $(RapidStartPpiLib_LIB)\
+!ENDIF
+!ENDIF
+
+IsctWakeReasonBin : $(IsctWakeReason_LIBS) $(PEILIB)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS) \
+ /f $(BUILD_DIR)\IsctWakeReason.mak all \
+ NAME=IsctWakeReason \
+ MAKEFILE=$(BUILD_DIR)\IsctWakeReason.mak \
+ GUID=0C3B7B59-28E5-4C99-85E5-D0116DBFAAF2 \
+ ENTRY_POINT=_ModuleEntryPoint \
+ "MY_INCLUDES = $(IsctWakeReason_INCLUDES)" \
+ "MY_DEFINES = $(IsctWakeReason_DEFINES)" \
+ TYPE=PEIM \
+ EDKIIModule=PEIM \
+ DEPEX1=$(IsctWakeReason_DIR)\IsctWakeReason.dxs \
+ DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX \
+ COMPRESS=0
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Isct/Pei/IsctWakeReason.sdl b/Board/EM/Isct/Pei/IsctWakeReason.sdl
new file mode 100644
index 0000000..a1b22c6
--- /dev/null
+++ b/Board/EM/Isct/Pei/IsctWakeReason.sdl
@@ -0,0 +1,86 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctPeiWakeReason/IsctWakeReason.sdl 2 9/26/12 2:08a Bensonlai $
+#
+# $Revision: 2 $
+#
+# $Date: 9/26/12 2:08a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctPeiWakeReason/IsctWakeReason.sdl $
+#
+# 2 9/26/12 2:08a Bensonlai
+# [TAG] Nono
+# [Category] Improvement
+# [Description] Modified comment
+# [Files] IsctWakeReason.dxs
+# IsctWakeReason.sdl
+# IsctWakeReason.mak
+#
+# 1 9/02/12 11:18p Bensonlai
+# Intel Smart Connect Technology initially releases.
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: IsctWakeReason.sdl
+#
+# Description: SDL file for IsctWakeReason
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "IsctWakeReason_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Help = "Main switch to enable IsctWakeReason support in PEI Phase"
+End
+
+MODULE
+ Help = "Includes IsctWakeReason.mak to Project"
+ File = "IsctWakeReason.mak"
+End
+
+PATH
+ Name = "IsctWakeReason_DIR"
+ Help = "IsctWakeReason DIR"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\IsctWakeReason.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+End
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Isct/Protocol/IsctNvsArea/IsctNvsArea.c b/Board/EM/Isct/Protocol/IsctNvsArea/IsctNvsArea.c
new file mode 100644
index 0000000..024cab8
--- /dev/null
+++ b/Board/EM/Isct/Protocol/IsctNvsArea/IsctNvsArea.c
@@ -0,0 +1,64 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctProtocolLib/IsctNvsArea/IsctNvsArea.c 1 9/02/12 11:20p Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 9/02/12 11:20p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctProtocolLib/IsctNvsArea/IsctNvsArea.c $
+//
+// 1 9/02/12 11:20p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IsctNvsArea.c
+//
+// Description: Isct NVS Area description protocol implementation.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include "EdkIIGlueDxe.h"
+
+#include "IsctNvsArea.h"
+
+EFI_GUID gIsctNvsAreaProtocolGuid = ISCT_NVS_AREA_PROTOCOL_GUID;
+
+EFI_GUID_STRING
+ (
+ &gIsctNvsAreaProtocolGuid, "ISCT NVS Area Protocol",
+ "Protocol describing ISCT ACPI NVS memory region used by ACPI subsystem."
+ );
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Isct/Protocol/IsctNvsArea/IsctNvsArea.h b/Board/EM/Isct/Protocol/IsctNvsArea/IsctNvsArea.h
new file mode 100644
index 0000000..5802aa7
--- /dev/null
+++ b/Board/EM/Isct/Protocol/IsctNvsArea/IsctNvsArea.h
@@ -0,0 +1,102 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctProtocolLib/IsctNvsArea/IsctNvsArea.h 1 9/02/12 11:20p Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 9/02/12 11:20p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctProtocolLib/IsctNvsArea/IsctNvsArea.h $
+//
+// 1 9/02/12 11:20p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IsctNvsArea.h
+//
+// Description: Data structures defined in this protocol are not naturally aligned.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifndef _ISCT_NVS_AREA_H_
+#define _ISCT_NVS_AREA_H_
+
+//
+// Includes
+//
+//
+// Forward reference for pure ANSI compatability
+//
+EFI_FORWARD_DECLARATION (ISCT_NVS_AREA_PROTOCOL);
+
+//
+// Isct NVS Area Protocol GUID
+//
+#define ISCT_NVS_AREA_PROTOCOL_GUID \
+ { \
+ 0x6614a586, 0x788c, 0x47e2, 0x89, 0x2d, 0x72, 0xe2, 0xc, 0x34, 0x48, 0x90 \
+ }
+
+//
+// Extern the GUID for protocol users.
+//
+extern EFI_GUID gIsctNvsAreaProtocolGuid;
+
+//
+// Isct NVS Area definition
+//
+#pragma pack(1)
+typedef struct {
+ UINT8 IsctWakeReason; //(0): Wake Reason
+ UINT8 IsctEnabled; //(1): 1 - Enabled, 0 - Disabled
+ UINT8 RapidStartEnabled; //(2): IFFS service enabled
+ UINT8 IsctTimerChoice; //(3): 1 - RTC timer, 0 - EC timer
+ UINT32 EcDurationTime; //(4): EC Duration Time
+ UINT32 RtcDurationTime; //(8): RTC Duration Time
+ UINT32 IsctNvsPtr; //(12): Ptr of Isct GlobalNvs
+ UINT8 IsctOverWrite; //(16): 1 - Isct , 0 - OS RTC
+} ISCT_NVS_AREA;
+#pragma pack()
+
+//
+// Isct NVS Area Protocol
+//
+typedef struct _ISCT_NVS_AREA_PROTOCOL {
+ ISCT_NVS_AREA *Area;
+ VOID *IsctData;
+} ISCT_NVS_AREA_PROTOCOL;
+
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Isct/Protocol/IsctProtocolLib.cif b/Board/EM/Isct/Protocol/IsctProtocolLib.cif
new file mode 100644
index 0000000..c96731d
--- /dev/null
+++ b/Board/EM/Isct/Protocol/IsctProtocolLib.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "IsctProtocolLib"
+ category = ModulePart
+ LocalRoot = "Board\EM\Isct\Protocol"
+ RefName = "IsctProtocolLib"
+[files]
+"IsctProtocolLib.inf"
+"IsctProtocolLib.mak"
+"IsctProtocolLib.sdl"
+"IsctNvsArea\IsctNvsArea.h"
+"IsctNvsArea\IsctNvsArea.c"
+<endComponent>
diff --git a/Board/EM/Isct/Protocol/IsctProtocolLib.inf b/Board/EM/Isct/Protocol/IsctProtocolLib.inf
new file mode 100644
index 0000000..ea1f31d
--- /dev/null
+++ b/Board/EM/Isct/Protocol/IsctProtocolLib.inf
@@ -0,0 +1,66 @@
+#
+# This file contains a 'Sample Driver' and is licensed as such
+# under the terms of your license agreement with Intel or your
+# vendor. This file may be modified by the user, subject to
+# the additional terms of the license agreement
+#
+#/*++
+#
+# Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved
+# This software and associated documentation (if any) is furnished
+# under a license and may only be used or copied in accordance
+# with the terms of the license. Except as permitted by such
+# license, no part of this software or documentation may be
+# reproduced, stored in a retrieval system, or transmitted in any
+# form or by any means without the express written consent of
+# Intel Corporation.
+#
+# Module Name:
+#
+# PlatformPolicyUpdatePeiLib.inf
+#
+# Abstract:
+#
+# Component description file for PEI DxePlatformPolicyUpdateLib Library
+#
+#--*/
+
+[defines]
+BASE_NAME = IsctProtocolLib
+COMPONENT_TYPE = LIBRARY
+
+[sources.common]
+ IsctNvsArea\IsctNvsArea.h
+ IsctNvsArea\IsctNvsArea.c
+
+[sources.ia32]
+
+[sources.x64]
+
+[sources.ipf]
+
+[includes.common]
+ .
+ $(BUILD_DIR)\$(PROCESSOR)
+ $(EDK_SOURCE)\Foundation\Efi
+ $(EDK_SOURCE)\Foundation\Include
+ $(EDK_SOURCE)\Foundation\Efi\Include
+ $(EDK_SOURCE)\Foundation\Framework\Include
+
+#
+# EDK II Glue Library utilizes some standard headers from EDK
+#
+ $(EFI_SOURCE)
+ $(EDK_SOURCE)\Foundation
+ $(EDK_SOURCE)\Foundation\Framework
+ $(EDK_SOURCE)\Foundation\Include\IndustryStandard
+ $(EDK_SOURCE)\Foundation\Core\Dxe
+ $(EDK_SOURCE)\Foundation\Include\Pei
+ $(EDK_SOURCE)\Foundation\Library\Pei\Include
+ $(EDK_SOURCE)\Foundation\Library\Dxe\Include
+ $(EDK_SOURCE)\Foundation\Library\EdkIIGlueLib\Include
+# $(PLATFORM_ECP_PACKAGE)\Include
+
+[libraries.common]
+
+[nmake.common]
diff --git a/Board/EM/Isct/Protocol/IsctProtocolLib.mak b/Board/EM/Isct/Protocol/IsctProtocolLib.mak
new file mode 100644
index 0000000..0645759
--- /dev/null
+++ b/Board/EM/Isct/Protocol/IsctProtocolLib.mak
@@ -0,0 +1,68 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctProtocolLib/IsctProtocolLib.mak 1 9/02/12 11:20p Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 9/02/12 11:20p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctProtocolLib/IsctProtocolLib.mak $
+#
+# 1 9/02/12 11:20p Bensonlai
+# Intel Smart Connect Technology initially releases.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: IsctProtocolLib.mak
+#
+# Description: Make file to build IsctProtocolLib components
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+all : IsctProtocolLib
+
+$(BUILD_DIR)\IsctProtocolLib.lib : IsctProtocolLib
+
+IsctProtocolLib : $(BUILD_DIR)\IsctProtocolLib.mak IsctProtocolLibBin
+
+$(BUILD_DIR)\IsctProtocolLib.mak : $(IsctProtocolLib_DIR)\$(@B).cif $(IsctProtocolLib_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(IsctProtocolLib_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+IsctProtocolLibBin :
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\IsctProtocolLib.mak all\
+ "MY_INCLUDES=$(EDK_INCLUDES) $(MISCFRAMEWORK_INCLUDES) $(EdkIIGlueLib_INCLUDES)" \
+ TYPE=LIBRARY
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Isct/Protocol/IsctProtocolLib.sdl b/Board/EM/Isct/Protocol/IsctProtocolLib.sdl
new file mode 100644
index 0000000..add6e76
--- /dev/null
+++ b/Board/EM/Isct/Protocol/IsctProtocolLib.sdl
@@ -0,0 +1,82 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctProtocolLib/IsctProtocolLib.sdl 1 9/02/12 11:20p Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 9/02/12 11:20p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctProtocolLib/IsctProtocolLib.sdl $
+#
+# 1 9/02/12 11:20p Bensonlai
+# Intel Smart Connect Technology initially releases.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: IsctProtocolLib.sdl
+#
+# Description: SDL file for IsctProtocolLib
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = IsctProtocolLib_SUPPORT
+ Value = 1
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Help = "Main switch to enable IsctProtocolLib support in Project"
+End
+
+MODULE
+ Help = "Includes IsctProtocolLib.mak to Project"
+ File = "IsctProtocolLib.mak"
+End
+
+PATH
+ Name = "IsctProtocolLib_DIR"
+End
+
+ELINK
+ Name = "IsctProtocolLib_LIB"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\IsctProtocolLib.lib"
+ Parent = "IsctProtocolLib_LIB"
+ InvokeOrder = AfterParent
+End
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Isct/Smm/IsctSmm.c b/Board/EM/Isct/Smm/IsctSmm.c
new file mode 100644
index 0000000..9f9e95d
--- /dev/null
+++ b/Board/EM/Isct/Smm/IsctSmm.c
@@ -0,0 +1,987 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctSmm/IsctSmm.c 8 7/16/14 12:28a Mirayang $
+//
+// $Revision: 8 $
+//
+// $Date: 7/16/14 12:28a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctSmm/IsctSmm.c $
+//
+// 8 7/16/14 12:28a Mirayang
+// Add complete function with iRST.
+//
+// 7 7/11/14 10:31a Mirayang
+// Fix iRST bulid error.
+//
+// 6 7/08/14 5:11a Mirayang
+// EIP142924 iSCT 5.0 for Shark Bay Platform
+//
+// 5 6/02/13 10:53a Joshchou
+// [TAG] EIP125348
+// [Category] Improvement
+// [Description] [SBY] Intel Smart Connect Technology BIOS Sample Code
+// 052413 Update
+//
+// 4 1/18/13 12:49a Bensonlai
+// [TAG] EIP112016
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] ISCT can't use the actual time to wake up the system.
+// [RootCause] Only support duration time
+// [Solution] Implementation of the actual time for ISCT
+// [Files] IsctSmm.c
+//
+// 3 1/11/13 4:43a Bensonlai
+// [TAG] EIP112016
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] ISCT can't use the actual time to wake up the system.
+// [RootCause] Only support duration time
+// [Solution] Implementation of the actual time for ISCT
+// [Files] IsctSmm.c
+//
+// 2 9/26/12 2:01a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Modified comment
+// [Files]
+//
+// 1 9/02/12 11:19p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IsctSmm.c
+//
+// Description: Main implementation source file for the Isct SMM driver
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+
+#include "PchRegs.h"
+
+#include EFI_PROTOCOL_CONSUMER (LoadedImage)
+#include EFI_PROTOCOL_DEPENDENCY (SmmBase)
+#include EFI_PROTOCOL_DEPENDENCY (SmmSxDispatch)
+#include EFI_PROTOCOL_DEPENDENCY (DevicePath)
+#include EFI_PROTOCOL_DEPENDENCY (IsctNvsArea)
+#include EFI_GUID_DEFINITION (IsctPersistentData)
+#endif
+
+#include <token.h>
+//
+// Module global variables
+//
+EFI_GUID gIsctNvsAreaProtocolGuid = ISCT_NVS_AREA_PROTOCOL_GUID;
+
+ISCT_PERSISTENT_DATA *mIsctData;
+ISCT_NVS_AREA *mIsctNvs;
+// ami override start
+EFI_RUNTIME_SERVICES *mySMMgRT = NULL;
+// ami override end
+
+STATIC UINT8 mDaysOfMonthInfo[] = {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
+
+#define R_PCH_RTC_INDEX_ALT 0x74
+#define R_PCH_RTC_TARGET_ALT 0x75
+#define R_PCH_RTC_EXT_INDEX_ALT 0x76
+#define R_PCH_RTC_EXT_TARGET_ALT 0x77
+
+#define R_PCH_RTC_REGC 0x0C
+#define B_PCH_RTC_REGC_AF 0x20
+
+#define RTC_INDEX_MASK 0x7F
+#define RTC_BANK_SIZE 0x80
+
+#define R_PCH_RTC_SECOND 0x00
+#define R_PCH_RTC_ALARM_SECOND 0x01
+#define R_PCH_RTC_MINUTE 0x02
+#define R_PCH_RTC_ALARM_MINUTE 0x03
+#define R_PCH_RTC_HOUR 0x04
+#define R_PCH_RTC_ALARM_HOUR 0x05
+#define R_PCH_RTC_DAY_OF_WEEK 0x06
+#define R_PCH_RTC_DAY_OF_MONTH 0x07
+#define R_PCH_RTC_MONTH 0x08
+#define R_PCH_RTC_YEAR 0x09
+
+#define DAY_IN_SEC (24 * 60 * 60)
+// ami override Start
+#if defined(RapidStart_SUPPORT) && (RapidStart_SUPPORT == 1)
+#define RAPID_START_FLAG_ENTRY_DONE BIT0
+#endif
+// ami override End
+
+#pragma pack(1)
+typedef struct {
+ UINT16 Year;
+ UINT8 Month;
+ UINT8 Date;
+ UINT8 Hour;
+ UINT8 Minute;
+ UINT8 Second;
+} RTC_TIME;
+#pragma pack()
+
+// ami override Start
+#define EFI_SMM_RUNTIME_SERVICES_TABLE_GUID \
+ { 0x395c33fe, 0x287f, 0x413e, { 0xa0, 0x55, 0x80, 0x88, 0xc0, 0xe1, 0xd4, 0x3e } }
+
+EFI_GUID SmmRtServTableGuid = EFI_SMM_RUNTIME_SERVICES_TABLE_GUID;
+EFI_SMM_BASE_PROTOCOL *mSmmBase;
+EFI_SMM_SYSTEM_TABLE *mSmst = NULL;
+
+VOID* InternalGetSmstConfigurationTable(IN EFI_GUID *TableGuid) {
+ EFI_CONFIGURATION_TABLE *Table;
+ UINTN i;
+ EFI_STATUS Status;
+
+ if (mSmmBase == NULL) {
+ Status = gBS->LocateProtocol (&gEfiSmmBaseProtocolGuid, NULL, &mSmmBase);
+ if (EFI_ERROR(Status) || mSmmBase == NULL)return NULL;
+ }
+
+ if (mSmst == NULL ) {
+ if (mSmmBase!=NULL) {
+ Status = mSmmBase->GetSmstLocation (mSmmBase, &mSmst);
+ if (EFI_ERROR(Status) || mSmst == NULL)return NULL;
+ }
+ }
+
+ if (mSmst != NULL) {
+ Table = mSmst->SmmConfigurationTable;
+ i = mSmst->NumberOfTableEntries;
+
+ for (; i; --i,++Table)
+ {
+ if (CompareGuid(&Table->VendorGuid,TableGuid))
+ return Table->VendorTable;
+ }
+ }
+ return NULL;
+}
+// ami override End
+
+UINT8
+RtcRead (
+ IN UINT8 Location
+ )
+/*++
+
+Routine Description:
+
+ Read specific RTC/CMOS RAM
+
+Arguments:
+
+ Location Point to RTC/CMOS RAM offset for read
+
+Returns:
+
+ The data of specific location in RTC/CMOS RAM.
+
+--*/
+{
+ UINT8 RtcIndexPort;
+ UINT8 RtcDataPort;
+
+ //
+ // CMOS access registers (using alternative access not to handle NMI bit)
+ //
+ if (Location < RTC_BANK_SIZE) {
+ //
+ // First bank
+ //
+ RtcIndexPort = R_PCH_RTC_INDEX_ALT;
+ RtcDataPort = R_PCH_RTC_TARGET_ALT;
+ } else {
+ //
+ // Second bank
+ //
+ RtcIndexPort = R_PCH_RTC_EXT_INDEX_ALT;
+ RtcDataPort = R_PCH_RTC_EXT_TARGET_ALT;
+ }
+
+ IoWrite8 (RtcIndexPort, Location & RTC_INDEX_MASK);
+ return IoRead8 (RtcDataPort);
+}
+
+BOOLEAN
+RtcIsAlarmEnabled (
+ VOID
+ )
+/*++
+
+Routine Description:
+
+ Check if RTC Alarm has been enabled.
+
+Arguments:
+
+ None
+
+Returns:
+
+ TRUE RTC Alarm is enabled
+ FALSE RTC Alarm is not enabled
+
+--*/
+{
+ return (RtcRead (R_PCH_RTC_REGB) & B_PCH_RTC_REGB_AIE) != 0;
+}
+
+STATIC
+VOID
+RtcWaitEndOfUpdate (
+ VOID
+ )
+/*++
+
+Routine Description:
+
+ Wait for updating RTC process finished.
+
+Arguments:
+
+ None
+
+Returns:
+
+ None
+
+--*/
+{
+ while (RtcRead (R_PCH_RTC_REGA) & B_PCH_RTC_REGA_UIP) {
+ }
+}
+
+EFI_STATUS
+RtcGetAlarm (
+ OUT RTC_TIME *tm
+ )
+/*++
+
+Routine Description:
+
+ Get current RTC Alarm time.
+
+Arguments:
+
+ tm A structure which will be updated with current RTC Alarm time
+
+Returns:
+
+ EFI_NOT_STARTED RTC Alarm has not been enabled yet.
+ EFI_SUCCESS RTC Alarm enabled and RTC_TIME structure contain current Alarm time setting.
+
+--*/
+{
+ ASSERT (tm != NULL);
+ if (!RtcIsAlarmEnabled ()) {
+ return EFI_NOT_STARTED;
+ }
+
+ RtcWaitEndOfUpdate ();
+ tm->Second = BcdToDecimal8 (RtcRead (R_PCH_RTC_ALARM_SECOND));
+ tm->Minute = BcdToDecimal8 (RtcRead (R_PCH_RTC_ALARM_MINUTE));
+ tm->Hour = BcdToDecimal8 (RtcRead (R_PCH_RTC_ALARM_HOUR));
+ tm->Date = BcdToDecimal8 (RtcRead (R_PCH_RTC_REGD) & 0x3F);
+ tm->Month = 0;
+ tm->Year = 0;
+ return EFI_SUCCESS;
+}
+
+VOID
+RtcWrite (
+ IN UINT8 Location,
+ IN UINT8 Value
+ )
+/*++
+
+Routine Description:
+
+ Write specific RTC/CMOS RAM
+
+Arguments:
+
+ Location Point to RTC/CMOS RAM offset for write
+ Value The data that will be written to RTC/CMOS RAM
+
+Returns:
+
+ None
+
+--*/
+{
+ UINT8 RtcIndexPort;
+ UINT8 RtcDataPort;
+
+ //
+ // CMOS access registers (using alternative access not to handle NMI bit)
+ //
+ if (Location < RTC_BANK_SIZE) {
+ //
+ // First bank
+ //
+ RtcIndexPort = R_PCH_RTC_INDEX_ALT;
+ RtcDataPort = R_PCH_RTC_TARGET_ALT;
+ } else {
+ //
+ // Second bank
+ //
+ RtcIndexPort = R_PCH_RTC_EXT_INDEX_ALT;
+ RtcDataPort = R_PCH_RTC_EXT_TARGET_ALT;
+ }
+
+ IoWrite8 (RtcIndexPort, Location & RTC_INDEX_MASK);
+ IoWrite8 (RtcDataPort, Value);
+}
+
+EFI_STATUS
+RtcSetAlarm (
+ IN RTC_TIME *tm
+ )
+/*++
+
+Routine Description:
+
+ Set RTC Alarm with specific time
+
+Arguments:
+
+ tm A time interval structure which will be used to setup an RTC Alarm
+
+Returns:
+
+ EFI_SUCCESS RTC Alarm has been enabled with specific time interval
+
+--*/
+{
+ UINT8 RegB;
+
+ ASSERT (tm != NULL);
+ //EFI_DEADLOOP();
+ RegB = RtcRead (R_PCH_RTC_REGB);
+
+ RtcWaitEndOfUpdate ();
+
+ //
+ // Inhibit update cycle
+ //
+ RtcWrite (R_PCH_RTC_REGB, RegB | B_PCH_RTC_REGB_SET);
+
+ RtcWrite (R_PCH_RTC_ALARM_SECOND, DecimalToBcd8 (tm->Second));
+ RtcWrite (R_PCH_RTC_ALARM_MINUTE, DecimalToBcd8 (tm->Minute));
+ RtcWrite (R_PCH_RTC_ALARM_HOUR, DecimalToBcd8 (tm->Hour));
+ RtcWrite (R_PCH_RTC_REGD, DecimalToBcd8 (tm->Date));
+
+ //
+ // Allow update cycle and enable wake alarm
+ //
+ RegB &= ~B_PCH_RTC_REGB_SET;
+ RtcWrite (R_PCH_RTC_REGB, RegB | B_PCH_RTC_REGB_AIE);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+RtcGetTime (
+ OUT RTC_TIME *tm
+ )
+/*++
+
+Routine Description:
+
+ Get current RTC time
+
+Arguments:
+
+ tm RTC time structure including Second, Minute and Hour, Date, Month, Year.
+
+Returns:
+
+ EFI_SUCCESS Operation successfully and RTC_TIME structure contained current time.
+
+--*/
+{
+ ASSERT (tm != NULL);
+ RtcWaitEndOfUpdate ();
+ tm->Second = BcdToDecimal8 (RtcRead (R_PCH_RTC_SECOND));
+ tm->Minute = BcdToDecimal8 (RtcRead (R_PCH_RTC_MINUTE));
+ tm->Hour = BcdToDecimal8 (RtcRead (R_PCH_RTC_HOUR));
+ tm->Date = BcdToDecimal8 (RtcRead (R_PCH_RTC_DAY_OF_MONTH));
+ tm->Month = BcdToDecimal8 (RtcRead (R_PCH_RTC_MONTH));
+ tm->Year = (UINT16)BcdToDecimal8 (RtcRead (R_PCH_RTC_YEAR)) + 2000;
+ return EFI_SUCCESS;
+}
+
+STATIC
+UINT32
+TimeToSeconds (
+ IN RTC_TIME *tm
+ )
+/*++
+
+Routine Description:
+
+ Convert RTC_TIME structure data to seconds
+
+Arguments:
+
+ tm A time data structure including second, minute and hour fields.
+
+Returns:
+
+ A number of seconds converted from given RTC_TIME structure data.
+
+--*/
+{
+ ASSERT (tm->Hour < 24);
+ ASSERT (tm->Minute < 60);
+ ASSERT (tm->Second < 60);
+ return ((tm->Hour * 60) + tm->Minute) * 60 + tm->Second;
+}
+
+STATIC
+VOID
+SecondsToTime (
+ OUT RTC_TIME *tm,
+ IN UINT32 Seconds
+ )
+/*++
+
+Routine Description:
+
+ Convert seconds to RTC_TIME structure data
+
+Arguments:
+
+ tm A time data structure which will be updated with converted value.
+ Seconds Total seconds that will be converted into RTC_TIME
+
+Returns:
+
+ None
+
+--*/
+{
+ tm->Second = Seconds % 60;
+ Seconds /= 60;
+ tm->Minute = Seconds % 60;
+ Seconds /= 60;
+ tm->Hour = Seconds % 24;
+ tm->Date = 0;
+}
+
+BOOLEAN
+IsLeapYear (
+ IN UINT16 Year
+)
+/*++
+
+Routine Description:
+
+ Check if it is leap year
+
+Arguments:
+
+ Year year to be check
+
+Returns:
+
+ True year is leap year
+ FALSE year is not a leap year
+
+--*/
+{
+ return (Year%4 == 0) && ((Year%100 != 0) || (Year%400 == 0));
+}
+
+UINT8
+DaysOfMonth (
+ IN UINT16 Year,
+ IN UINT8 Month
+)
+/*++
+
+Routine Description:
+
+ Get days of the month
+
+Arguments:
+
+ Year Year number
+ Month Month number, January is 1, Feburary is 2, ... December is 12.
+
+Returns:
+
+ Days Number of day of the Month of the Year
+
+--*/
+{
+ UINT8 Days;
+ if (Month < 1 || Month > 12) {
+ return 0;
+ }
+ Days = mDaysOfMonthInfo[Month-1];
+ if (Month == 2) {
+ Days += IsLeapYear(Year);
+ }
+ return (Days);
+}
+
+BOOLEAN
+IsOver2Days (
+ IN RTC_TIME *tm1,
+ IN RTC_TIME *tm2
+)
+/*++
+
+Routine Description:
+
+ check if tm2 is after 2 days of tm1
+
+Arguments:
+
+ tm1 First time to compare
+ tm2 Second time to compare
+
+Returns:
+
+ True tm2 is 2 days after tm1
+ FALSE tm2 is not 2 days after tm1
+
+--*/
+{
+ BOOLEAN RetVal;
+ RetVal = TRUE;
+ if (tm2->Date > tm1->Date) {
+ if (tm2->Date - tm1->Date == 1) {
+ RetVal = FALSE;;
+ }
+ } else if ((DaysOfMonth (tm1->Year, tm1->Month) == tm1->Date) && (tm2->Date == 1)) {
+ RetVal = FALSE;;
+ }
+ return RetVal;
+}
+
+EFI_STATUS
+GetISCTTime (
+ IN UINT32 ISCTRtcDurationTime,
+ OUT RTC_TIME *tm
+)
+{
+ ASSERT (tm != NULL);
+ ISCTRtcDurationTime &= ~BIT31;
+ tm->Second = (UINT8)(ISCTRtcDurationTime & 0x3F);
+ tm->Minute = (UINT8)((ISCTRtcDurationTime >> 6) & 0x3F);
+ tm->Hour = (UINT8)((ISCTRtcDurationTime >> 12) & 0x1F);
+ tm->Date = (UINT8)((ISCTRtcDurationTime >> 17) & 0x1F);
+ tm->Month = (UINT8)((ISCTRtcDurationTime >> 22) & 0x0F);
+ tm->Year = (UINT8)((ISCTRtcDurationTime >> 26) & 0x1F) + 2000;
+ return EFI_SUCCESS;
+}
+
+// ami override Start
+#if defined(RapidStart_SUPPORT) && (RapidStart_SUPPORT == 1)
+EFI_STATUS
+RapidStartGetFlag (
+ OUT UINT8 *Value
+ )
+{
+ *Value = RtcRead (FFS_NV_FLAG_REG);
+ return EFI_SUCCESS;
+}
+// ami override End
+#endif
+
+STATIC
+EFI_STATUS
+IsctSxEntryCallback (
+ IN UINT8 SleepState
+ )
+/*++
+
+Routine Description:
+
+ ISCT S3/S4 entry callback SMI handler
+
+Arguments:
+
+ SleepState - Which sleep state is being entered
+
+Returns:
+
+ EFI_SUCCESS - Function executed successfully
+
+--*/
+{
+ EFI_STATUS Status;
+ RTC_TIME rtc_tm;
+ RTC_TIME wake_tm;
+ RTC_TIME alarm_tm;
+ RTC_TIME Isct_Actual_tm;
+ UINT32 IsctDuration;
+ UINT32 CurrentTime;
+ UINT32 AlarmTime;
+ UINT32 WakeTime;
+ UINT16 PmBase;
+ UINT8 RegB;
+ BOOLEAN UseIsctTimer;
+ BOOLEAN Over2Days;
+//ami override begin
+ ISCT_PERSISTENT_DATA IsctData;
+ UINTN VarSize;
+ UINT32 Attributes = 0;
+#if defined(RapidStart_SUPPORT) && (RapidStart_SUPPORT == 1)
+ BOOLEAN RapidStartFlag;
+#endif
+// ami override End
+ //
+ // Check iFFS exist. If iFFS exist, iFFS will handler RTC comparing.
+ //
+
+ if ( mIsctNvs->RtcDurationTime == 0) {
+ return EFI_SUCCESS;
+ }
+
+// ami override Start
+#if defined(RapidStart_SUPPORT) && (RapidStart_SUPPORT == 1)
+ Status = RapidStartGetFlag (&RapidStartFlag);
+ if ( !EFI_ERROR (Status) && ((RapidStartFlag & RAPID_START_FLAG_ENTRY_DONE) != 0)) {
+ DEBUG ((EFI_D_INFO, "IsctSMM: RapidStartFlag \n"));
+ return EFI_SUCCESS;
+ }
+#endif
+// ami override End
+
+ UseIsctTimer = FALSE;
+ Over2Days = FALSE;
+ mIsctNvs->IsctOverWrite = 0;
+ IsctDuration = mIsctNvs->RtcDurationTime;
+
+ //
+ // Make sure RTC is in BCD and 24h format
+ //
+ RegB = RtcRead (R_PCH_RTC_REGB);
+ RegB |= B_PCH_RTC_REGB_HOURFORM;
+ RegB &= ~B_PCH_RTC_REGB_DM;
+ RtcWrite (R_PCH_RTC_REGB, RegB);
+
+ //
+ // Get RTC Timer and convert RTC_TIME to seconds
+ //
+ Status = RtcGetTime (&rtc_tm);
+ if ( EFI_ERROR(Status) ) {
+ return Status;
+ }
+
+ CurrentTime = TimeToSeconds (&rtc_tm);
+ if ( (IsctDuration & BIT31) == BIT31 ) { //Actual time
+ GetISCTTime(IsctDuration, &Isct_Actual_tm);
+ IsctDuration = TimeToSeconds (&Isct_Actual_tm);
+ IsctDuration -= CurrentTime;
+ }
+ Status = RtcGetAlarm (&wake_tm);
+ if (Status == EFI_SUCCESS) {
+ AlarmTime = TimeToSeconds (&wake_tm);
+ //
+ // When OS set alarm date to zero,
+ // that would mean the alarm date is today or next day depending alarm time,
+ // and the alarm will happen in 24 hour.
+ if (wake_tm.Date != 0 && wake_tm.Date != rtc_tm.Date) {
+ //
+ // OS Wake-up time is over 1 day
+ //
+ AlarmTime += DAY_IN_SEC;
+ if (IsOver2Days (&rtc_tm, &wake_tm)) {
+ //
+ // OS Wake-up time is over 2 day
+ //
+ UseIsctTimer = TRUE;
+ Over2Days = TRUE;
+ }
+ } else if (AlarmTime < CurrentTime && wake_tm.Date == 0) {
+ //
+ // When alarm time behind current time and alarm date is zero,
+ // OS set the alarm for next day
+ //
+ AlarmTime += DAY_IN_SEC;
+ }
+
+ if ((IsctDuration <= (AlarmTime - CurrentTime)) && (Over2Days == FALSE)) {
+ UseIsctTimer = TRUE;
+ }
+ } else {
+ UseIsctTimer = TRUE;
+ }
+
+ //
+ // if ISCT Timer <= OS RTC alarm timer, then overwrite RTC alarm by ISCT timer
+ //
+ if (UseIsctTimer == TRUE) {
+ WakeTime = CurrentTime + IsctDuration;
+ SecondsToTime (&alarm_tm, WakeTime);
+ Status = RtcSetAlarm (&alarm_tm);
+ ASSERT_EFI_ERROR (Status);
+
+ PmBase = (UINT16) (PciRead32 (
+ PCI_LIB_ADDRESS (DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_LPC,
+ PCI_FUNCTION_NUMBER_PCH_LPC,
+ R_PCH_LPC_ACPI_BASE)
+ ) & B_PCH_LPC_ACPI_BASE_BAR);
+
+ //
+ // Clear RTC PM1 status
+ //
+ IoWrite16 (PmBase + R_PCH_ACPI_PM1_STS, B_PCH_ACPI_PM1_STS_RTC);
+
+ //
+ // set RTC_EN bit in PM1_EN to wake up from the alarm
+ //
+ IoWrite16 (
+ PmBase + R_PCH_ACPI_PM1_EN,
+ (IoRead16 (PmBase + R_PCH_ACPI_PM1_EN) | B_PCH_ACPI_PM1_EN_RTC)
+ );
+
+ mIsctNvs->IsctOverWrite = 1;
+ }
+
+// ami override Start
+
+ //
+ // Update Isct RTC usage flag in ISCT persistent data struct.
+ //
+ VarSize = sizeof (ISCT_PERSISTENT_DATA);
+
+ Status = mySMMgRT->GetVariable( ISCT_PERSISTENT_DATA_NAME,
+ &gIsctPersistentDataGuid,
+ &Attributes,
+ &VarSize,
+ &IsctData );
+
+ if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+
+ IsctData.IsctOverWrite = mIsctNvs->IsctOverWrite;
+
+ Status = mySMMgRT->SetVariable( ISCT_PERSISTENT_DATA_NAME,
+ &gIsctPersistentDataGuid,
+ Attributes,
+ VarSize,
+ &IsctData );
+
+ if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+//ami override end
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+IsctS3EntryCallback (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_SX_DISPATCH_CONTEXT *DispatchContext
+ )
+/**
+ ISCT S3 entry callback SMI handler
+
+ @param[in] DispatchHandle - The handle of this callback, obtained when registering
+ @param[in] DispatchContext - Pointer to the EFI_SMM_SW_DISPATCH_CONTEXT
+ @param[in] CommBuffer - Physical address of memory data passed from non-SMM to SMM mode
+ @param[in] CommBufferSize - Size of the CommBuffer
+**/
+{
+ EFI_STATUS Status;
+ DEBUG((EFI_D_INFO, "Inside ISCT S3 Entry SMM handler \n"));
+ Status = IsctSxEntryCallback(0x3);
+ if(Status == EFI_SUCCESS) {
+ return EFI_SUCCESS;
+ } else {
+ return EFI_ABORTED;
+ }
+}
+
+STATIC
+EFI_STATUS
+IsctS4EntryCallback (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_SX_DISPATCH_CONTEXT *DispatchContext
+ )
+/*++
+
+Routine Description:
+
+ ISCT S4 entry callback SMI handler
+
+Arguments:
+
+ DispatchHandle - The handle of this callback, obtained when registering
+ DispatchContext - Pointer to the EFI_SMM_SW_DISPATCH_CONTEXT
+
+Returns:
+
+ EFI_SUCCESS - Function executed successfully
+ EFI_ABORTED - An error occurred.
+
+--*/
+{
+ EFI_STATUS Status;
+
+ Status = IsctSxEntryCallback(0x4);
+ if(Status == EFI_SUCCESS) {
+ return EFI_SUCCESS;
+ } else {
+ return EFI_ABORTED;
+ }
+}
+// ami override End
+
+EFI_STATUS
+InstallIsctSmm (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+/*++
+
+Routine Description:
+
+ Isct SMM driver entry point function.
+
+Arguments:
+
+ ImageHandle - image handle for this driver image
+ SystemTable - pointer to the EFI System Table
+
+Returns:
+
+ EFI_SUCCESS - driver initialization completed successfully
+
+--*/
+{
+ EFI_STATUS Status;
+// ami override Start
+ EFI_HANDLE DispatchHandleS3;
+ EFI_HANDLE DispatchHandleS4;
+// ami override End
+ EFI_SMM_SX_DISPATCH_PROTOCOL *SxDispatchProtocol;
+ EFI_SMM_SX_DISPATCH_CONTEXT EntryDispatchContext;
+ ISCT_NVS_AREA_PROTOCOL *IsctNvsAreaProtocol;
+// ami override Start
+ VOID *ptrRs;
+// ami override End
+ DEBUG ((EFI_D_INFO, "IsctSmm Entry Point- Install\n"));
+
+// ami override Start
+ ptrRs = InternalGetSmstConfigurationTable(&SmmRtServTableGuid);
+ if (ptrRs!=NULL) mySMMgRT = ptrRs;
+// ami override End
+
+ //
+ // Located ISCT Nvs Protocol
+ //
+ Status = gBS->LocateProtocol (
+ &gIsctNvsAreaProtocolGuid,
+ NULL,
+ &IsctNvsAreaProtocol
+ );
+ DEBUG((EFI_D_INFO, "(ISCT SMM) Located ISCT Nvs protocol Status = %x\n", Status));
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "No ISCT Nvs protocol available\n"));
+ return EFI_SUCCESS;
+ }
+
+
+ if (IsctNvsAreaProtocol->Area->IsctEnabled == 0) {
+ DEBUG ((EFI_D_INFO, "ISCT is Disbaled \n"));
+ return EFI_SUCCESS;
+ }
+
+ //
+ // Assign NvsPointer to Global Module Variable
+ //
+ mIsctData = IsctNvsAreaProtocol->IsctData;
+ mIsctNvs = IsctNvsAreaProtocol->Area;
+
+ //
+ // Loacted SxDispatchProtocol
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiSmmSxDispatchProtocolGuid,
+ NULL,
+ &SxDispatchProtocol
+ );
+ if ( EFI_ERROR(Status) ) {
+ DEBUG((EFI_D_INFO, "(ISCT SMM) Located SxDispatchProtocol protocol Status = %x\n", Status));
+ return Status;
+ }
+// ami override Start
+ //
+ // Register S3 entry phase call back function
+ //
+ EntryDispatchContext.Type = SxS3;
+ EntryDispatchContext.Phase = SxEntry;
+ Status = SxDispatchProtocol->Register (
+ SxDispatchProtocol,
+ IsctS3EntryCallback,
+ &EntryDispatchContext,
+ &DispatchHandleS3
+ );
+ DEBUG((EFI_D_INFO, "(ISCT SMM) Register IsctS3EntryCallback Status = %x\n", Status));
+ EntryDispatchContext.Type = SxS4;
+ Status = SxDispatchProtocol->Register (
+ SxDispatchProtocol,
+ IsctS4EntryCallback,
+ &EntryDispatchContext,
+ &DispatchHandleS4
+ );
+ DEBUG((EFI_D_INFO, "(ISCT SMM) Register S4 IsctSxEntryCallback Status = %x\n", Status));
+ if (EFI_ERROR (Status)) {
+ DEBUG((EFI_D_INFO, "IsctSxEntryCallback failed to load.\n"));
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+// ami override End
+ return EFI_SUCCESS;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Isct/Smm/IsctSmm.cif b/Board/EM/Isct/Smm/IsctSmm.cif
new file mode 100644
index 0000000..1c0f19d
--- /dev/null
+++ b/Board/EM/Isct/Smm/IsctSmm.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "IsctSmm"
+ category = ModulePart
+ LocalRoot = "Board\EM\Isct\Smm"
+ RefName = "IsctSmm"
+[files]
+"IsctSmm.c"
+"IsctSmm.dxs"
+"IsctSmm.sdl"
+"IsctSmm.mak"
+<endComponent>
diff --git a/Board/EM/Isct/Smm/IsctSmm.dxs b/Board/EM/Isct/Smm/IsctSmm.dxs
new file mode 100644
index 0000000..24979e0
--- /dev/null
+++ b/Board/EM/Isct/Smm/IsctSmm.dxs
@@ -0,0 +1,69 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctSmm/IsctSmm.dxs 1 9/02/12 11:19p Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 9/02/12 11:19p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctSmm/IsctSmm.dxs $
+//
+// 1 9/02/12 11:19p Bensonlai
+// Intel Smart Connect Technology initially releases.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IsctSmm.dxs
+//
+// Description: Dependency expression file for IsctSmm Driver.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include "AutoGen.h"
+#include "DxeDepex.h"
+
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+
+#include EFI_PROTOCOL_DEPENDENCY (SmmBase)
+#include EFI_PROTOCOL_DEPENDENCY (SmmSxDispatch)
+#include EFI_ARCH_PROTOCOL_DEFINITION (Variable)
+#endif
+
+DEPENDENCY_START
+ EFI_SMM_BASE_PROTOCOL_GUID AND
+ EFI_SMM_SX_DISPATCH_PROTOCOL_GUID AND
+ EFI_VARIABLE_ARCH_PROTOCOL_GUID
+DEPENDENCY_END
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Isct/Smm/IsctSmm.mak b/Board/EM/Isct/Smm/IsctSmm.mak
new file mode 100644
index 0000000..932d3ba
--- /dev/null
+++ b/Board/EM/Isct/Smm/IsctSmm.mak
@@ -0,0 +1,118 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctSmm/IsctSmm.mak 1 9/02/12 11:19p Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 9/02/12 11:19p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctSmm/IsctSmm.mak $
+#
+# 1 9/02/12 11:19p Bensonlai
+# Intel Smart Connect Technology initially releases.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: IsctSmm.mak
+#
+# Description: Make file to build IsctSmm components
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+EDK : IsctSmm
+
+IsctSmm : $(BUILD_DIR)\IsctSmm.mak IsctSmmBin
+
+$(BUILD_DIR)\IsctSmm.mak : $(IsctSmm_DIR)\$(@B).cif $(IsctSmm_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(IsctSmm_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+IsctSmm_INCLUDES=\
+ $(INTEL_PCH_INCLUDES)\
+ $(INTEL_MCH_INCLUDES)\
+ $(EdkIIGlueLib_INCLUDES)\
+ /I$(IntelPlatformProtocolLib_DIR)\
+ /I$(ISCT_PLATFORM_DIR)\
+
+IsctSmm_DEFINES = $(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=InstallIsctSmm"\
+ /D __EDKII_GLUE_BASE_LIB__ \
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__ \
+ /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_SMM_RUNTIME_DXE_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_UEFI_LIB__ \
+ /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \
+ /D __EDKII_GLUE_UEFI_DEVICE_PATH_LIB__ \
+ /D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ \
+
+IsctSmm_LIB_LINKS =\
+ $(EFIPROTOCOLLIB)\
+ $(EDKPROTOCOLLIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(ArchProtocolLib)\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGlueBaseMemoryLib_LIB)\
+ $(EdkIIGlueDxeMemoryAllocationLib_LIB)\
+ $(EdkIIGlueDxeServicesTableLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueSmmRuntimeDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueBasePciLibPciExpress_LIB)\
+ $(EdkIIGlueUefiLib_LIB)\
+ $(EdkIIGlueUefiBootServicesTableLib_LIB)\
+ $(EdkIIGlueUefiDevicePathLib_LIB)\
+ $(PchPlatformSmmLib_LIB)\
+ $(INTEL_PCH_PROTOCOL_LIB)\
+ $(IsctGuidLib_LIB)\
+ $(IsctProtocolLib_LIB)\
+
+IsctSmmBin: $(IsctSmm_LIB_LINKS)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\IsctSmm.mak all \
+ "MY_INCLUDES=$(IsctSmm_INCLUDES)" \
+ "MY_DEFINES=$(IsctSmm_DEFINES)" \
+ GUID=DBD5B6BA-6734-4C5D-BF53-2C210D93A012\
+ ENTRY_POINT=_ModuleEntryPoint \
+ TYPE=BS_DRIVER\
+ EDKIIModule=SMMDRIVER\
+ DEPEX1=$(IsctSmm_DIR)\IsctSmm.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ COMPRESS=1
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Isct/Smm/IsctSmm.sdl b/Board/EM/Isct/Smm/IsctSmm.sdl
new file mode 100644
index 0000000..da11043
--- /dev/null
+++ b/Board/EM/Isct/Smm/IsctSmm.sdl
@@ -0,0 +1,78 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctSmm/IsctSmm.sdl 1 9/02/12 11:19p Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 9/02/12 11:19p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ISCT/IsctSmm/IsctSmm.sdl $
+#
+# 1 9/02/12 11:19p Bensonlai
+# Intel Smart Connect Technology initially releases.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: IsctSmm.sdl
+#
+# Description: SDL file for IsctSmm
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "IsctSmm_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable IsctSmm support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "IsctSmm_DIR"
+End
+
+MODULE
+ File = "IsctSmm.mak"
+ Help = "Includes IsctSmm.mak to Project"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\IsctSmm.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/KbcSbBoard/KbcSbBoard.c b/Board/EM/KbcSbBoard/KbcSbBoard.c
new file mode 100644
index 0000000..981ca77
--- /dev/null
+++ b/Board/EM/KbcSbBoard/KbcSbBoard.c
@@ -0,0 +1,90 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
+// $Header: /Alaska/SOURCE/Modules/KbcEmulation/SouthBridge/Intel/LynxPoint/KbcSbBoard.c 1 7/03/12 5:50a Rameshr $
+//
+// $Revision: 1 $
+//
+// $Date: 7/03/12 5:50a $
+//
+//****************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/KbcEmulation/SouthBridge/Intel/LynxPoint/KbcSbBoard.c $
+//
+// 1 7/03/12 5:50a Rameshr
+// [TAG] EIP94194
+// [Category] New Feature
+// [Description] Initial Check-in for LynxPoint chipset.
+// [Files] KbcSbBoard.cif
+// KbcSbBoard.c
+//
+//
+//****************************************************************************
+
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: KbcSbboard.c
+//
+// Description: South Bridge Board module for KbcEmulation
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+#include "KbcEmul.h"
+#ifdef FRAMEWORK_AP4
+#include "token.h"
+#include "protocol/usbpolicy.h"
+#else
+#include "tokens.h"
+#endif
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: GetRMhStatus
+//
+// Description: Returns the RMH status
+//
+// Input: None
+//
+// Output: None
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN
+GetRMhStatus ()
+{
+
+ //
+ // For Intel 8 series (Lynx Point), return RMH is enabled by default .
+ //
+
+ return TRUE;
+
+}
+
+
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
diff --git a/Board/EM/KbcSbBoard/KbcSbBoard.cif b/Board/EM/KbcSbBoard/KbcSbBoard.cif
new file mode 100644
index 0000000..a10fd68
--- /dev/null
+++ b/Board/EM/KbcSbBoard/KbcSbBoard.cif
@@ -0,0 +1,8 @@
+<component>
+ name = "KbcSouthBridge - LynxPoint"
+ category = ModulePart
+ LocalRoot = "Board\em\KbcSbBoard"
+ RefName = "KbcSbBoard"
+[files]
+"KbcSbBoard.c"
+<endComponent>
diff --git a/Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.c b/Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.c
new file mode 100644
index 0000000..4315c31
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.c
@@ -0,0 +1,485 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/ASF Verbosity/ASFVerbosity.c 2 4/24/12 12:46a Klzhan $
+//
+// $Revision: 2 $
+//
+// $Date: 4/24/12 12:46a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/ASF Verbosity/ASFVerbosity.c $
+//
+// 2 4/24/12 12:46a Klzhan
+// Update module to latest
+//
+// 1 2/08/12 1:10a Klzhan
+// Initial Check in
+//
+// 2 6/10/11 4:21a Klzhan
+// Update ASF_INDUSTRY_IANA and ASF_INTEL_IANA ID.
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: ASFVerbosity.c
+//
+// Description: Shows ASF POST Message
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include <AmiDxeLib.h>
+#include <Protocol\ConsoleControl.h>
+#include <Protocol\SimpleTextOut.h>
+#include <Protocol\SmBios.h>
+#include <Protocol\SmbiosGetFlashDataProtocol.h>
+#include <ReferenceCode\ME\Protocol\AlertStandardFormat\AlertStandardFormat.h>
+#include <ReferenceCode\ME\Library\Amt\Include\Amt.h>
+
+#define AMI_EFI_SOL_POST_MESSAGE_GUID \
+{ 0xf42f3752, 0x12e, 0x4812, 0x99, 0xe6, 0x49, 0xf9, 0x43, 0x4, 0x84, 0x54 }
+
+#define SOL_NORMAL 0x00
+#define SOL_VERB 0x40
+#define SOL_QUIET 0x20
+#define SOL_BLANK 0x60
+#define SOL_SETUP 0x00
+
+EFI_GUID guidEfiVar = EFI_GLOBAL_VARIABLE;
+EFI_GUID gSmbiosProtocolGuid = EFI_SMBIOS_PROTOCOL_GUID;
+EFI_GUID gConsoleControlProtocolGuid = EFI_CONSOLE_CONTROL_PROTOCOL_GUID;
+EFI_GUID gAmiEfiSolPostMessageGuid = AMI_EFI_SOL_POST_MESSAGE_GUID;
+
+
+SMBIOS_TABLE_ENTRY_POINT *SmBiosTableEntryPoint = 0;
+
+static CHAR16 *SolString[] = {
+ L"Intel Corporation. Copyright 2004-2009.\r\n",
+ L"Intel Active Management Technology - Serial Over LAN operational mode.\r\n\r\n",
+ L"BIOS Revision: ",
+ L"\r\n\r\nBIOS Settings: <F2>\r\n",
+#if defined SETUP_BBS_POPUP_ENABLE && SETUP_BBS_POPUP_ENABLE
+ L"One Time Boot Menu: <F7>\r\n",
+#else
+ L"\r\n",
+#endif
+ L"Intel(R) AMT Client BIOS Setup Entry\r\n",
+ L"Intel Remote PC Assist Technology - Serial Over LAN operational mode.\r\n\r\n",
+};
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name: DMIHDR
+//
+// Description: This structure represents DMI variable
+//
+// Fields: Name Type Description
+// ------------------------------------------------------------------
+// Type UINT8 Type of DMI variable
+// Length UINT8 Length of the variable
+// Handle UINT16 SmBios handle for DMI
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Handle;
+} DMIHDR;
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: AsciiStrLength
+//
+// Description: Computes Ascii string length including 0-terminator
+//
+// Input:
+// IN CHAR8 *String Pointer to input ASCII string
+//
+//
+//
+// Output:
+// UINTN
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINTN AsciiStrLength(IN CHAR8* String)
+{
+
+ UINTN Length = 0;
+ if (String == NULL)
+ return Length;
+ while (String[Length++] != 0);
+
+ return Length;
+}
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: AsciiToUnicode
+//
+// Description: Transfer Ascii code to Unicode
+//
+// Input:
+// IN CHAR8 *String Pointer to input ASCII string
+//
+//
+//
+// Output:
+// UINTN
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID AsciiToUnicode (
+ IN CHAR8 *AsciiString,
+ OUT CHAR16 *UnicodeString
+)
+{
+ UINT8 Index = 0;
+
+ while (AsciiString[Index] != 0) {
+ UnicodeString[Index] = (CHAR16) AsciiString[Index];
+ Index++;
+ }
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: AsciiToUnicodeSmBiosString
+//
+// Description: Converts Ascii string to Unicode string
+//
+// Input:
+// IN CHAR8 *AsciiString Pointer to input Ascii string
+// OUT CHAR16* UnicodeString Pointer to output Unicode string
+//
+//
+// Output:
+// VOID
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID AsciiToUnicodeSmBiosString
+(
+ IN CHAR8* AsciiString,
+ OUT CHAR16* UnicodeString
+)
+{
+
+
+ do {
+ *(UnicodeString++) = (CHAR16)*AsciiString ;
+ } while (*(AsciiString++) != 0);
+
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: GetSmBiosStructureLength
+//
+// Description: Finds the length of SmBios structure
+//
+// Input:
+// IN VOID* SmBiosStructure Pointer to SmBios structure
+//
+// Output:
+// UINTN
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINTN GetSmBiosStructureLength
+(
+ IN VOID* SmBiosStructure
+)
+{
+
+ UINT8* SmBiosStringsBlockPtr;
+ UINTN Length = 0;
+ SmBiosStringsBlockPtr = (UINT8*) SmBiosStructure + \
+ ((DMIHDR*)SmBiosStructure)->Length;
+ while ( *(CHAR16*)(SmBiosStringsBlockPtr + Length) != 0) Length++;
+
+ // determine the right value
+ return ((DMIHDR*)SmBiosStructure)->Length + Length + 2;
+}
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: GetSmBiosStructureByHandle
+//
+// Description: Finds SmBios structure given a handle
+//
+// Input:
+// IN UINT16 Handle Handle to SmBios structure
+//
+// Output:
+// VOID* Pointer to SmBios structure
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID* GetSmBiosStructureByHandle
+(
+ IN UINT16 Handle
+)
+{
+
+ UINT8* SmBiosStructurePtr = (UINT8*)(SmBiosTableEntryPoint->TableAddress);
+ UINT8* SmBiosEnd = SmBiosStructurePtr + SmBiosTableEntryPoint->TableLength;
+
+ while (SmBiosStructurePtr < SmBiosEnd) {
+
+ if (((DMIHDR*)SmBiosStructurePtr)->Handle == Handle)
+ return SmBiosStructurePtr;
+ SmBiosStructurePtr += GetSmBiosStructureLength(SmBiosStructurePtr);
+ }
+
+ return NULL;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: GetSmBiosAsciiString
+//
+// Description: Finds SmBios data (Ascii string) inside SmBios structure
+//
+// Input:
+// IN VOID* SmBiosStructure Pointer to SmBios structure
+// IN UINT8 StringNumber SmBios String number
+//
+// Output:
+// CHAR8*
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+CHAR8* GetSmBiosAsciiString
+(
+ IN VOID* SmBiosStructure,
+ IN UINT8 StringOffset
+)
+{
+
+ CHAR8* SmBiosStringPtr;
+ UINT8 StringNumber = *((UINT8*)SmBiosStructure + StringOffset);
+
+ SmBiosStringPtr = (CHAR8*)SmBiosStructure + \
+ ((DMIHDR*)SmBiosStructure)->Length;
+ if (StringNumber == 0)
+ return NULL;
+
+ if (SmBiosStructure != NULL)
+ while ( (StringNumber--) != 1)
+ SmBiosStringPtr += AsciiStrLength(SmBiosStringPtr);
+
+ return SmBiosStringPtr;
+}
+EFI_ASF_BOOT_OPTIONS *mAsfBootOptions = NULL;
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: DisplaySolMessageEvent
+//
+// Description: Dispaly Sol Message
+//
+// Input:
+//
+//
+//
+// Output:
+//
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID DisplaySolMessageEvent(IN EFI_EVENT Event, IN VOID *Context)
+{
+ EFI_STATUS Status;
+ UINT8 i;
+ UINT8 CastlePeak;
+ UINTN Size = 0;
+ CHAR8 *SmBiosData = NULL;
+ CHAR16 *SmBiosString;
+ EFI_SMBIOS_PROTOCOL *SmbiosProtocol;
+ EFI_CONSOLE_CONTROL_SCREEN_MODE ScreenMode;
+ EFI_CONSOLE_CONTROL_PROTOCOL *ConsoleControl;
+ EFI_GUID gEfiAlertStandardFormatProtocolGuid = EFI_ALERT_STANDARD_FORMAT_PROTOCOL_GUID;
+ EFI_ALERT_STANDARD_FORMAT_PROTOCOL *Asf;
+ Status = pBS->LocateProtocol (
+ &gEfiAlertStandardFormatProtocolGuid,
+ NULL,
+ &Asf
+ );
+ if (EFI_ERROR (Status))
+ return;
+
+ Status = Asf->GetBootOptions (Asf, &mAsfBootOptions);
+ if((mAsfBootOptions->IanaId != ASF_INTEL_CONVERTED_IANA) &&
+ (mAsfBootOptions->IanaId != ASF_INDUSTRY_CONVERTED_IANA))
+ return;
+ Status = pBS->LocateProtocol (&gSmbiosProtocolGuid, NULL, &SmbiosProtocol);
+ if (EFI_ERROR(Status))return;
+
+ Status = pBS->LocateProtocol (&gEfiConsoleControlProtocolGuid, \
+ NULL, (VOID**)&ConsoleControl);
+ if (EFI_ERROR(Status))return;
+
+
+ SmBiosTableEntryPoint = SmbiosProtocol->SmbiosGetTableEntryPoint();
+
+ SmBiosData = GetSmBiosAsciiString( GetSmBiosStructureByHandle(0x00), 0x05);
+
+ Size = AsciiStrLength(SmBiosData) + 1;
+
+ Status = pBS->AllocatePool(EfiBootServicesData, \
+ Size*sizeof(CHAR16), &SmBiosString);
+ if (EFI_ERROR(Status))return;
+
+ if (SmBiosData[0] != 0x20) {
+ MemSet(SmBiosString, Size*sizeof(CHAR16), 0);
+ AsciiToUnicodeSmBiosString(SmBiosData, SmBiosString);
+ }
+
+ CastlePeak = FALSE;
+ ConsoleControl->GetMode(ConsoleControl, &ScreenMode, NULL, NULL);
+ if (ScreenMode == EfiConsoleControlScreenGraphics) {
+ ConsoleControl->SetMode( ConsoleControl, EfiConsoleControlScreenText );
+ }
+ pST->ConOut->EnableCursor( pST->ConOut, FALSE );
+ pST->ConOut->ClearScreen( pST->ConOut);
+ pST->ConOut->SetCursorPosition( pST->ConOut, 0, 0 );
+
+ TRACE((-1,"mAsfBootOptions->BootOptions = %08x",mAsfBootOptions->BootOptions));
+
+ // SOL Normal Mode and SOL Setup Mode
+ switch (((mAsfBootOptions->BootOptions)>>8)) {
+ case SOL_NORMAL:
+ case SOL_VERB:
+
+ for (i = 0; i <= 4; i++) {
+ // AMT or Castle Peak ?
+ if (i == 1 && CastlePeak) {
+ pST->ConOut->OutputString ( pST->ConOut, SolString[6]);
+ } else pST->ConOut->OutputString ( pST->ConOut, SolString[i]);
+
+ if (i == 2)pST->ConOut->OutputString ( pST->ConOut, SmBiosString );
+ }
+
+ break;
+
+ case SOL_QUIET:
+ pST->ConOut->OutputString ( pST->ConOut, SolString[0]);
+ pST->ConOut->OutputString ( pST->ConOut, L"\n\r");
+ pST->ConOut->OutputString ( pST->ConOut, SolString[2]);
+ pST->ConOut->OutputString ( pST->ConOut, SmBiosString);
+ pST->ConOut->OutputString ( pST->ConOut, L"\n\r\n\r" );
+ break;
+
+ case SOL_BLANK:
+ break;
+ default:
+ break;
+ }//switch
+
+ // SOL_SETUP
+ if ((mAsfBootOptions->SpecialCommandParam & BIT3))
+ pST->ConOut->OutputString ( pST->ConOut, SolString[5]);
+
+ // Kill Event
+ pBS->CloseEvent(Event);
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: SolPostMessage
+//
+// Description: Sol Post Message
+//
+// Input: NULL
+//
+//
+// Output: EFI_STATUS
+//
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS SolPostMessage(VOID)
+{
+ EFI_STATUS Status;
+ VOID* Registration;
+ EFI_EVENT gEvtSolMessage;
+
+
+ //
+ // Register for callback to 'AmiEfiSolPostMessage' protocol installation
+ //
+ Status = pBS->CreateEvent(
+ EFI_EVENT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ DisplaySolMessageEvent,
+ NULL,
+ &gEvtSolMessage
+ );
+ ASSERT_EFI_ERROR(Status);
+
+
+ //
+ // Register for protocol notifications on this event
+ //
+ Status = pBS->RegisterProtocolNotify (&gAmiEfiSolPostMessageGuid,
+ gEvtSolMessage,
+ &Registration);
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS ASFVerbosityEntryPoint(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ InitAmiLib(ImageHandle, SystemTable);
+ SolPostMessage();
+ return EFI_SUCCESS;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.cif b/Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.cif
new file mode 100644
index 0000000..23ba968
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.cif
@@ -0,0 +1,10 @@
+<component>
+ name = "ASF Verbosity"
+ category = ModulePart
+ LocalRoot = "Board\EM\MEWrapper\AmtWrapper\ASFVerbosity"
+ RefName = "ASFVerbosity"
+[files]
+"ASFVerbosity.mak"
+"ASFVerbosity.sdl"
+"ASFVerbosity.c"
+<endComponent>
diff --git a/Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.mak b/Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.mak
new file mode 100644
index 0000000..64a3a0a
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.mak
@@ -0,0 +1,89 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/ASF Verbosity/ASFVerbosity.mak 1 2/08/12 1:10a Klzhan $
+#
+# $Revision: 1 $
+#
+# $Date: 2/08/12 1:10a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/ASF Verbosity/ASFVerbosity.mak $
+#
+# 1 2/08/12 1:10a Klzhan
+# Initial Check in
+#
+# 1 2/25/11 1:44a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:10a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+
+#<AMI_FHDR_START>
+#-----------------------------------------------------------------------
+#
+# Name: ASFVerbosity.mak
+#
+# Description: This make file build ASFVerbosity
+# components and link them to respective binary
+#
+#-----------------------------------------------------------------------
+#<AMI_FHDR_END>
+
+all : ASFVERB
+
+BUILD_ASF_VWEBOSITY_DIR = $(BUILD_DIR)\$(ASF_VWEBOSITY_DIR)
+
+#---------------------------------------------------------------------------
+# Generic AMT dependencies
+#---------------------------------------------------------------------------
+$(BUILD_DIR)\ASFVerbosity.mak : $(ASF_VWEBOSITY_DIR)\ASFVerbosity.cif $(BUILD_RULES)
+ $(CIF2MAK) $(ASF_VWEBOSITY_DIR)\ASFVerbosity.cif $(CIF2MAK_DEFAULTS)
+#---------------------------------------------------------------------------
+
+#---------------------------------------------------------------------------
+# Create ASF Verbosity DXE Component
+#---------------------------------------------------------------------------
+ASFVERB: $(BUILD_DIR)\ASFVerbosity.mak ASFVERBBin
+
+ASFVERBBin : $(AMIDXELIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\ASFVerbosity.mak all\
+ GUID=4f4ff580-b8a0-4332-a6b0-e2e568e36c9c \
+ ENTRY_POINT=ASFVerbosityEntryPoint \
+ TYPE=BS_DRIVER \
+ COMPRESS=1
+#---------------------------------------------------------------------------
+
+
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.sdl b/Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.sdl
new file mode 100644
index 0000000..acb2810
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/ASFVerbosity/ASFVerbosity.sdl
@@ -0,0 +1,78 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/ASF Verbosity/ASFVerbosity.sdl 1 2/08/12 1:10a Klzhan $
+#
+# $Revision: 1 $
+#
+# $Date: 2/08/12 1:10a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/ASF Verbosity/ASFVerbosity.sdl $
+#
+# 1 2/08/12 1:10a Klzhan
+# Initial Check in
+#
+# 1 2/25/11 1:44a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:10a Klzhan
+# Initial Check-in.
+#
+# 1 10/05/25 5:56p Klzhan
+# Initial Check-in with RC 0.71.
+#
+#**********************************************************************
+
+TOKEN
+ Name = "ASF_VERB_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "ASF_VWEBOSITY_DIR"
+End
+
+MODULE
+ Help = "Includes AMTSetup.mak to Project"
+ File = "ASFVerbosity.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\ASFVerbosity.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtInt9.asm b/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtInt9.asm
new file mode 100644
index 0000000..a40f50e
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtInt9.asm
@@ -0,0 +1,277 @@
+
+ TITLE AMTINT9.ASM -- OEM INTERRUPT IMPLEMENTATION
+
+;*************************************************************************
+;*************************************************************************
+;** **
+;** (C)Copyright 1985-2010, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;*************************************************************************
+;*************************************************************************
+;
+; $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtLockKBD/AmtInt9.asm 1 2/08/12 1:10a Klzhan $
+;
+; $Date: 2/08/12 1:10a $
+;
+;****************************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtLockKBD/AmtInt9.asm $
+;
+; 1 2/08/12 1:10a Klzhan
+; Initial Check in
+;
+; 2 7/13/11 4:03a Klzhan
+; Fix Lock KBD can't work without SOL enable.
+;
+; 1 2/25/11 1:45a Klzhan
+; Initial Check-in
+;
+; 1 12/03/10 5:11a Klzhan
+; Initial Check-in.
+;
+;
+;****************************************************************************
+;<AMI_FHDR_START>
+;
+; Name: AMTInt9.asm
+;
+; Description: Hook Int 9 for Legacy Serial Redirection.
+;
+;<AMI_FHDR_END>
+;****************************************************************************
+
+;----------------------------------------------------------------------------
+; INCLUDE FILES
+;----------------------------------------------------------------------------
+include token.equ
+;----------------------------------------------------------------------------
+; EQUATES & STRUCTURES
+;----------------------------------------------------------------------------
+refresh_port equ 61h
+kb_data_port equ 60h ; keyboard data port
+kb_stat_port equ 64h ; keyboard status port
+kbcCMDPort EQU 64h ; Keyboard controller command port
+enKeyboardCMD EQU 0aeh ; Enable keyboard command
+diKeyboardCMD EQU 0adh ; Disable keyboard command
+IBFTimeoutCount EQU 0f000h ; Check keyboart input buffer count
+kbcIBF EQU 00000010b; Keyboard input buffer full
+;----------------------------------------------------------------------------
+; EXTERNS USED
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; CSMOEM_CSEG S E G M E N T STARTS
+;----------------------------------------------------------------------------
+CSMOEM_CSEG SEGMENT PARA PUBLIC 'CODE' USE16
+ ASSUME cs:CSMOEM_CSEG, ds:CSMOEM_CSEG
+.386p
+;----------------------------------------------------------------------------
+
+OldIntHandler LABEL DWORD
+ IntSegSav dw 0
+ IntOfsSav dw 0
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: AMTINT09Proc
+;
+; Description:
+;
+; Input:
+;
+; Output:
+;
+; Modified:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+AMTINT09Proc PROC NEAR PUBLIC
+ pushf
+ cmp cs:dSredirInterruptPtr, 0
+ jnz lock_local_keyboard
+ popf
+ jmp DWORD PTR cs:[OldIntHandler]
+lock_local_keyboard:
+ push ds
+ push si
+ ; DS:SI = *dSredirInterruptPtr
+ lds si, DWORD PTR cs:dSredirInterruptPtr
+; cmp WORD PTR ds:[si], 0 ; does interrutp come from redirection ?
+ test BYTE PTR ds:[si], 1 ; does interrutp come from redirection ?
+ jz not_serial_redirection_interrupt ; br not redirection interrupt
+ ; jmp to original Int 9 vector to service redirection interrupt
+ pushf
+ push cs
+ push OFFSET returnFromInt9
+ push DWORD PTR cs:OldIntHandler
+ retf
+returnFromInt9:
+; mov WORD PTR ds:[si], 0 ; clear redirection interrupt flag
+ mov BYTE PTR ds:[si], 0 ; clear redirection interrupt flag
+ jmp redirection_return_to_caller
+not_serial_redirection_interrupt:
+ ; do nothing and return to caller.
+ push ax
+ call disable_keyboard
+ call enable_keyboard
+ ; clear EOI
+ mov al, 20h ; end of INT code
+ out 20h, al ; out to INT CONTROLLER port
+ pop ax
+redirection_return_to_caller:
+ pop si
+ pop ds
+ popf
+ retf 2
+
+AMTINT09Proc ENDP
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+; Procedure: CheckKBCController
+;
+; Description: Check KBC controller present.
+;
+; Input: None.
+;
+; Output: None.
+;
+; Modified: ZF = 0 KBC controller present.
+; = 1 No KBC controller.
+;
+; Referrals:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+CheckKBCController PROC NEAR
+ push ax
+ in al, kb_stat_port
+ cmp al, 0ffh
+ pop ax
+ ret
+CheckKBCController ENDP
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+; Procedure: enable_keyboard
+;
+; Description: Enables KBD interface. Also CPU interrupt will be enabled
+; here.
+;
+; Input: None.
+;
+; Output: None.
+;
+; Modified: AL.
+;
+; Referrals: ib_free.
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+enable_keyboard PROC NEAR PUBLIC
+
+ call CheckKBCController
+ jz short Enable_keyboardExit
+ call ib_free ; Wait for input buffer free.
+ mov al, enKeyboardCMD ; CMD to enable KBD interface.
+ out kbcCMDPort, al ; Write command to KBC.
+ call ib_free ; Wait for input buffer free.
+Enable_keyboardExit: ;(BUG4128+)
+ sti
+ ret
+
+enable_keyboard ENDP
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+; Procedure: disable_keyboard
+;
+; Description: Disables KBD interface and reads the data from KBC data port.
+;
+; Input: None.
+;
+; Output: AL - Data read from KBC data port.
+;
+; Modified: AL.
+;
+; Referrals: ib_free.
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+disable_keyboard PROC NEAR PUBLIC
+ call CheckKBCController
+ jz short Disable_keyboardExit
+ call ib_free ; Wait for input buffer free.
+ mov al, diKeyboardCMD ; CMD to disable KBD interface.
+ out kbcCMDPort, al ; Write command to KBC.
+ call ib_free ; Wait for input buffer free.
+ in al, kb_data_port ; Read the data.(BUG2673+)
+Disable_keyboardExit: ;
+ ret
+
+disable_keyboard ENDP
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+; Procedure: ib_free
+;
+; Description: This routine waits until the KBC input buffer is free.
+;
+; Input: None.
+;
+; Output: None.
+;
+; Modified: AL.
+;
+; Referrals: None.
+;
+; Notes: DO NOT USE STACK. This routine may be called with RET_SP
+; macro.
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+ib_free PROC NEAR PUBLIC
+ push cx
+ mov cx, IBFTimeoutCount
+IbFreeLp:
+ in al, kb_stat_port
+ call CheckKBCController
+ jz short IbFreeExit
+ out 0ebh, al
+ out 0ebh, al
+ out 0ebh, al
+ test al, kbcIBF
+ loopnz IbFreeLp
+IbFreeExit:
+ pop cx
+ ret
+ib_free ENDP
+
+;----------------------------------------------------------------------------
+LockKeyBoardSignature DB '$LKb'
+dSredirInterruptPtr DD 0
+dLockKBD DD 0
+;----------------------------------------------------------------------------
+; CSMOEM_CSEG S E G M E N T ENDS
+;----------------------------------------------------------------------------
+CSMOEM_CSEG ENDS
+END
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2009, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone (770)-246-8600 **
+;** **
+;****************************************************************************
+;**************************************************************************** \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.c b/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.c
new file mode 100644
index 0000000..aea8c99
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.c
@@ -0,0 +1,507 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtLockKBD/AmtLockKBD.c 4 4/30/13 3:35a Tristinchou $
+//
+// $Revision: 4 $
+//
+// $Date: 4/30/13 3:35a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtLockKBD/AmtLockKBD.c $
+//
+// 4 4/30/13 3:35a Tristinchou
+// [TAG] EIP119188
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] Lock keyboard will be no function
+// [Solution] Lock keyboard directly
+// [Files] AmtLockKBD.c
+//
+// 3 12/11/12 2:40a Klzhan
+// Fix exception error when Secure Boot Enabled.
+//
+// 2 4/24/12 12:45a Klzhan
+// Update module to latest
+//
+// 1 2/08/12 1:10a Klzhan
+// Initial Check in
+//
+// 4 7/24/11 10:12a Klzhan
+// Remove un-used debug message.
+//
+// 3 7/13/11 4:03a Klzhan
+// Fix Lock KBD can't work without SOL enable.
+//
+// 2 6/28/11 7:32a Klzhan
+// Enable Legacy SreDir before getting signature.
+//
+// 1 2/25/11 1:45a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AMTLockKBD.c
+//
+// Description: AMT Lock KeyBoard Functions.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include <token.h>
+#include <EFI.h>
+#include <DXE.h>
+#include <AmiDxeLib.h>
+#include <..\Include\Protocol\ConsoleControl.h>
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+#include "..\core\em\csm\csm.h"
+#endif
+#include "..\Include\Protocol\DevicePath.h"
+#include "..\Include\Protocol\DataHub.h"
+#include "..\Include\Protocol\SimpleTextIn.h"
+#include "..\Include\Protocol\SimpleTextInEx.h"
+#include <ReferenceCode\ME\Protocol\AlertStandardFormat\AlertStandardFormat.h>
+#include "Protocol\LegacySredir.h"
+#include <Protocol\SmmPowerButtonDispatch.h>
+
+//============================================================================
+// Local defines for transaction types
+//============================================================================
+#define EFI_SIGNATURE_16(A,B) ((A) | ((B)<<8))
+#define EFI_SIGNATURE_32(A,B,C,D) \
+ (EFI_SIGNATURE_16((A),(B)) | (EFI_SIGNATURE_16((C),(D)) << 16))
+
+#define AMT_INT9_SIGNATURE EFI_SIGNATURE_32 ('$', 'L', 'K', 'b')
+#define SREDIR_FLAG_SIGNATURE EFI_SIGNATURE_32 ('$', 'S', 'r', 'F')
+
+#define BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID \
+ { 0xdbc9fd21, 0xfad8, 0x45b0, 0x9e, 0x78, 0x27, 0x15, 0x88, 0x67, 0xcc, 0x93 }
+EFI_GUID gBdsAllDriversConnectedProtocolGuid = \
+ BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID;
+EFI_GUID gEfiSimpleTextInExProtocolGuid = \
+ EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL_GUID;
+EFI_GUID gEfiSimpleTextInProtocolGuid = EFI_SIMPLE_TEXT_INPUT_PROTOCOL_GUID;
+EFI_GUID ConInStartedProtocolGuid = CONSOLE_IN_DEVICES_STARTED_PROTOCOL_GUID;
+
+#define BDS_CONNECT_DRIVERS_PROTOCOL_GUID \
+ { 0x3aa83745, 0x9454, 0x4f7a, 0xa7, 0xc0, 0x90, 0xdb, 0xd0, 0x2f, 0xab, 0x8e }
+EFI_GUID gEfiSmmPowerButtonDispatchProtocolGuid = \
+ EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL_GUID;
+EFI_GUID gBdsConnectDriversProtocolGuid = \
+ BDS_CONNECT_DRIVERS_PROTOCOL_GUID;
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: ClearPowerButtonSmi
+//
+// Description: This routine disables Power Button SMI if Lock Power Button
+// bit of Boot Option BitMask is set.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+ClearPowerButtonSmi (VOID)
+{
+ UINT32 dPwrMgValue;
+
+ // Read PM_1 Status/Enable Register
+ dPwrMgValue = IoRead32(PM_BASE_ADDRESS);
+ dPwrMgValue |= BIT08; // clear Power Button Status
+ dPwrMgValue &= ~BIT24; // clear Power Button Enable
+ IoWrite32 ( PM_BASE_ADDRESS, dPwrMgValue );
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: DisablePowerButtonSmiEvent
+//
+// Description: This routine disables Power Button SMI if Lock Power Button
+// bit of Boot Option BitMask is set.
+//
+// Input: EFI_EVENT - Event
+// VOID* - Context
+//
+// Output: EFI_STATUS
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+DisablePowerButtonSmiEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL *PowerButton;
+
+ Status = pBS->LocateProtocol ( &gEfiSmmPowerButtonDispatchProtocolGuid, \
+ NULL, \
+ &PowerButton );
+ if(EFI_ERROR( Status )) return Status;
+
+ ClearPowerButtonSmi();
+
+ pBS->CloseEvent(Event);
+
+ return EFI_SUCCESS;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: ASFRegisterPowerButtonCallBack
+//
+// Description: This routine register a Protocol Callback for Lock Power Button
+// if Lock Power Button bit of Boot Option BitMask is set.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+ASFRegisterPowerButtonCallBack (VOID)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_EVENT EvtASFSmmPwrBtn, EvtASFBdsConnectDrivers;
+ VOID *RgnASFSmmPwrBtn, *RgnASFBdsConnectDrivers;
+
+ // Clear Power Button Status before Power Button SMI is registered.
+ Status = RegisterProtocolCallback ( \
+ &gEfiSmmPowerButtonDispatchProtocolGuid, \
+ DisablePowerButtonSmiEvent, \
+ NULL, \
+ &EvtASFSmmPwrBtn, \
+ &RgnASFSmmPwrBtn );
+
+ DisablePowerButtonSmiEvent ( EvtASFSmmPwrBtn, NULL );
+
+ Status = RegisterProtocolCallback ( \
+ &gBdsConnectDriversProtocolGuid, \
+ DisablePowerButtonSmiEvent, \
+ NULL, \
+ &EvtASFBdsConnectDrivers, \
+ &RgnASFBdsConnectDrivers );
+ return ;
+}
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: GetLegacyDriverSignaturePtr
+//
+// Description: Aux roution to find the Signature in Legacy Reagon
+//
+// Input:
+//
+// Output:
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINT32
+GetLegacyDriverSignaturePtr (
+ IN UINT32 dStartAddress,
+ IN UINT32 dSize,
+ IN UINT32 dSignature
+)
+{
+ UINT8 *pStartAddr = (UINT8 *)(UINTN)dStartAddress;
+
+ for ( ;(UINTN)pStartAddr < (UINTN)(dStartAddress + dSize); pStartAddr++ )
+ if ( *(UINT32 *)pStartAddr == dSignature ) return ((UINT32)pStartAddr);
+ return FALSE;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: LegacyBiosLockLocalKeyboard
+//
+// Description: Sub-roution lock keyboard.
+//
+// Input:
+//
+// Output:
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+LegacyBiosLockLocalKeyboard (VOID)
+{
+
+ EFI_STATUS Status;
+ UINT32 dAMTInt9Ptr = 0, dSRedirFlagPtr = 0;
+ EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
+ BIOS_INFO *Private;
+
+ // Get AMT Int 9h signature pointer.
+ dAMTInt9Ptr = GetLegacyDriverSignaturePtr ( \
+ 0xe0000, 0x20000, AMT_INT9_SIGNATURE );
+ // Get Legacy Serial Redirection Flag signature pointer.
+ dSRedirFlagPtr = GetLegacyDriverSignaturePtr ( \
+ 0x90000, 0x10000, SREDIR_FLAG_SIGNATURE );
+ if ( !dAMTInt9Ptr ) return ;
+ // Locate Legacy Bios Protocol for lock/unlock shadow ram.
+ Status = pBS->LocateProtocol ( &gEfiLegacyBiosProtocolGuid, \
+ NULL, \
+ &LegacyBios );
+ if ( EFI_ERROR( Status ) ) return;
+ Private = (BIOS_INFO *) LegacyBios;
+ // Unlock Shadow ram.
+ Private->iRegion->UnLock ( Private->iRegion, 0xE0000, 0x20000, NULL );
+ // Update Legacy Serial Redirection Flag pointer to AMT Int 9h.
+ if(!dSRedirFlagPtr)
+ dSRedirFlagPtr = (dAMTInt9Ptr + 4);
+ *(UINT32*)(dAMTInt9Ptr + 4) = (UINT32)(((UINTN)dSRedirFlagPtr & 0xFFFF) + \
+ (((UINTN)dSRedirFlagPtr & 0xF0000) << 12) + \
+ sizeof ( SREDIR_FLAG_SIGNATURE ));
+ // Lock Shadow ram.
+ Private->iRegion->Lock ( Private->iRegion, 0xE0000, 0x20000, NULL );
+
+}
+#endif
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: EventAllConsoleDevicesStarted
+//
+// Description: Sub-Roution to check if need disable keyboard or not
+// from IntelAMT extersion ASF Boot Option Message.
+//
+// Input:
+//
+// Output:
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+EventAllConsoleDevicesStarted
+(
+ IN EFI_EVENT Event,
+ IN VOID *Context
+)
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *SimpleTextInHandle;
+ UINTN HandleNum, Index;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathNode;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_SIMPLE_TEXT_INPUT_PROTOCOL *SimpleTextIn;
+ EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *SimpleTextInEx;
+ PCI_DEVICE_PATH *PciDevicePath;
+ EFI_GUID gEfiAlertStandardFormatProtocolGuid = EFI_ALERT_STANDARD_FORMAT_PROTOCOL_GUID;
+ EFI_ALERT_STANDARD_FORMAT_PROTOCOL *Asf;
+ EFI_ASF_BOOT_OPTIONS *mAsfBootOptions;
+
+ Status = pBS->LocateProtocol (
+ &gEfiAlertStandardFormatProtocolGuid,
+ NULL,
+ &Asf
+ );
+
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+
+ Status = Asf->GetBootOptions (Asf, &mAsfBootOptions);
+ // If not Lock keyboard, return !!
+ if(!((mAsfBootOptions->BootOptions) & 0x20))
+ return;
+
+ // 2. Uninstall all the console spliter drivers except SOL.
+ // Locate Simple Text Input Protocol Handle Buffer.
+ Status = pBS->LocateHandleBuffer ( ByProtocol, \
+ &gEfiSimpleTextInProtocolGuid, \
+ NULL, \
+ &HandleNum, \
+ &SimpleTextInHandle );
+ if ( EFI_ERROR ( Status ) ) return ;
+
+ // Search USB keyboard and Generic PS2 Keyboard Device Path.
+ for ( Index = 0; Index < HandleNum; Index++ ) {
+
+ // Locate Simple Text Input Protocol.
+ Status = pBS->HandleProtocol ( SimpleTextInHandle[Index], \
+ &gEfiDevicePathProtocolGuid, \
+ (VOID *)&DevicePath );
+ if ( EFI_ERROR ( Status ) ) continue;
+
+ DevicePathNode = DevicePath;
+ while ( !isEndNode ( DevicePathNode ) ) {
+ PciDevicePath = (PCI_DEVICE_PATH *) DevicePathNode;
+ // Is USB Device Path or Generic SIO Device Path (SouthBridge)?
+ if ((( DevicePathNode->Type == MESSAGING_DEVICE_PATH ) && \
+ ( DevicePathNode->SubType == MSG_USB_DP )) || \
+ (( DevicePathNode->Type == HARDWARE_DEVICE_PATH ) && \
+ ( DevicePathNode->SubType == HW_PCI_DP ) && \
+ ( PciDevicePath->Device == 0x1f ) && \
+ ( PciDevicePath->Function == 0 ))) {
+
+ // Locate Simple Text Input Protocol.
+ Status = pBS->HandleProtocol ( SimpleTextInHandle[Index], \
+ &gEfiSimpleTextInProtocolGuid, \
+ (VOID **)&SimpleTextIn );
+ if ( EFI_ERROR ( Status ) ) break;
+
+ // Uninstall Simple Text Input Protocol for stopping keyboard.
+ Status = pBS->UninstallProtocolInterface ( \
+ SimpleTextInHandle[Index], \
+ &gEfiSimpleTextInProtocolGuid, \
+ SimpleTextIn );
+ if ( EFI_ERROR ( Status ) ) break;
+
+ // Locate Simple Text Input EX Protocol.
+ Status = pBS->HandleProtocol ( \
+ SimpleTextInHandle[Index], \
+ &gEfiSimpleTextInExProtocolGuid, \
+ (VOID **)&SimpleTextInEx );
+ if ( EFI_ERROR ( Status ) ) break;
+
+ // Uninstall Simple Text Input EX Protocol for stopping
+ // SIO keyboard.
+ Status = pBS->UninstallProtocolInterface ( \
+ SimpleTextInHandle[Index], \
+ &gEfiSimpleTextInExProtocolGuid, \
+ SimpleTextInEx );
+ break;
+ }
+ DevicePathNode = NEXT_NODE ( DevicePathNode );
+ }
+ }
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: LockLegacyKBD
+//
+// Description: Sub-Roution to check if need disable keyboard or not
+// from IntelAMT extersion ASF Boot Option Message.
+//
+// Input:
+//
+// Output:
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+LockLegacyKBD
+(
+ IN EFI_EVENT Event,
+ IN VOID *Context
+)
+{
+ // 1. Hook Int 9h for locking local keyboard but keep the Legacy SOL
+ // working in CSM and Legacy OS.
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+ LegacyBiosLockLocalKeyboard ();
+#endif
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: AMTLOCKKBDEntryPoint
+//
+// Description: Lock keyboard Entrypoint.
+//
+// Input:
+//
+// Output:
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS AMTLOCKKBDEntryPoint(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+ EFI_EVENT ConInConnectEvt;
+ VOID *ConInNotifyReg;
+ EFI_EVENT ConInExConnectEvt;
+ VOID *ConInExNotifyReg;
+ EFI_EVENT AllDriverConnectEvt;
+ VOID *AllDriverExNotifyReg;
+
+ EFI_GUID gEfiAlertStandardFormatProtocolGuid = EFI_ALERT_STANDARD_FORMAT_PROTOCOL_GUID;
+ EFI_ALERT_STANDARD_FORMAT_PROTOCOL *Asf;
+ EFI_ASF_BOOT_OPTIONS *mAsfBootOptions;
+
+ InitAmiLib(ImageHandle, SystemTable);
+ Status = pBS->LocateProtocol (&gEfiAlertStandardFormatProtocolGuid, \
+ NULL, &Asf );
+ if (EFI_ERROR (Status)) return Status;
+
+ Status = Asf->GetBootOptions (Asf, &mAsfBootOptions);
+ if (EFI_ERROR (Status)) return Status;
+
+ // If not Lock keyboard, return !!
+ if (mAsfBootOptions->BootOptions & 0x20) {
+
+ Status = RegisterProtocolCallback(
+ &gEfiSimpleTextInExProtocolGuid,
+ EventAllConsoleDevicesStarted,
+ NULL,
+ &ConInExConnectEvt,
+ &ConInExNotifyReg);
+
+ Status = RegisterProtocolCallback(
+ &gEfiSimpleTextInProtocolGuid,
+ EventAllConsoleDevicesStarted,
+ NULL,
+ &ConInConnectEvt,
+ &ConInNotifyReg);
+
+ Status = RegisterProtocolCallback(
+ &gBdsAllDriversConnectedProtocolGuid,
+ LockLegacyKBD,
+ NULL,
+ &AllDriverConnectEvt,
+ &AllDriverExNotifyReg);
+
+ }
+ if (mAsfBootOptions->BootOptions & 0x2) ASFRegisterPowerButtonCallBack ();
+ return EFI_SUCCESS;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.cif b/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.cif
new file mode 100644
index 0000000..33e5afa
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.cif
@@ -0,0 +1,13 @@
+<component>
+ name = "AmtLockKBD"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\AmtWrapper\AmtLockKBD\"
+ RefName = "AmtLockKBD"
+[files]
+"AmtLockKBD.sdl"
+"AmtLockKBD.mak"
+"AmtLockKBD.c"
+"AmtLockKBD.h"
+"AmtLockKBD.dxs"
+"AmtInt9.asm"
+<endComponent>
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.dxs b/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.dxs
new file mode 100644
index 0000000..87b05c8
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.dxs
@@ -0,0 +1,6 @@
+#include <ReferenceCode\ME\Protocol\AlertStandardFormat\AlertStandardFormat.h>
+
+DEPENDENCY_START
+ EFI_ALERT_STANDARD_FORMAT_PROTOCOL_GUID
+DEPENDENCY_END
+
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.h b/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.h
new file mode 100644
index 0000000..6e23ec6
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.h
@@ -0,0 +1,77 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtLockKBD/AmtLockKBD.h 1 2/08/12 1:10a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:10a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtLockKBD/AmtLockKBD.h $
+//
+// 1 2/08/12 1:10a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:45a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AMTLockKBD.h
+//
+// Description: AMT Lock KeyBoard Includes.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#ifndef _AMT_INT16_H
+#define _AMT_INT16_H
+
+#include "Tiano.h"
+#include "EfiDriverLib.h"
+#include "Protocol\AmtWrapper\AmtWrapper.h"
+
+#include EFI_PROTOCOL_CONSUMER (AmtWrapper)
+#include EFI_PROTOCOL_CONSUMER (LegacyBios)
+
+#define AMT_INT16_CSM_GUID \
+ {0x6046e678, 0x24ef, 0x4005, 0xba, 0x39, 0xbd, 0xa1, 0x1f, 0x6d, 0x55, 0x5d}
+
+EFI_GUID gEfiFirmwareVolumeProtocolGuid = EFI_FIRMWARE_VOLUME_PROTOCOL_GUID;
+EFI_GUID gAmtInt16CsmGuid = AMT_INT16_CSM_GUID;
+EFI_GUID gLegacyBiosProtocolGuid = EFI_LEGACY_BIOS_PROTOCOL_GUID;
+EFI_GUID gEfiAmtWrapperProtocolGuid = EFI_AMT_WRAPPER_PROTOCOL_GUID;
+EFI_GUID gEfiEventReadyToBootGuid = EFI_EVENT_GROUP_READY_TO_BOOT;
+
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.mak b/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.mak
new file mode 100644
index 0000000..0680ae3
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.mak
@@ -0,0 +1,88 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtLockKBD/AmtLockKBD.mak 1 2/08/12 1:10a Klzhan $
+#
+# $Revision: 1 $
+#
+# $Date: 2/08/12 1:10a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtLockKBD/AmtLockKBD.mak $
+#
+# 1 2/08/12 1:10a Klzhan
+# Initial Check in
+#
+# 1 2/25/11 1:45a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:11a Klzhan
+# Initial Check-in.
+#
+#**********************************************************************
+
+#<AMI_FHDR_START>
+#---------------------------------------------------------------------------
+# Name: AMTLockKBD.mak
+#
+# Description: AMT Lock KeyBoard.
+#
+#---------------------------------------------------------------------------
+#<AMI_FHDR_END>
+all : AMTLOCKKBD $(BUILD_DIR)\AmtInt9.obj
+
+AMT_LOCKKBD_BUILD_DIR = $(BUILD_DIR)\$(AmtLockKBD_DIR)
+
+#---------------------------------------------------------------------------
+# Generic AMT dependencies
+#---------------------------------------------------------------------------
+$(BUILD_DIR)\AmtLockKBD.mak : $(AmtLockKBD_DIR)\AmtLockKBD.cif $(BUILD_RULES)
+ $(CIF2MAK) $(AmtLockKBD_DIR)\AmtLockKBD.cif $(CIF2MAK_DEFAULTS)
+
+$(BUILD_DIR)\AmtInt9.obj: $(AmtLockKBD_DIR)\AmtInt9.asm
+ $(ASM16) /c /nologo /Fo$(BUILD_DIR)\ $(AmtLockKBD_DIR)\AmtInt9.asm
+
+#---------------------------------------------------------------------------
+
+AMT_LOCKKBD_OBJECTS = \
+$(BUILD_DIR)\$(AmtLockKBD_DIR)\AmtLockKBD.obj
+
+#---------------------------------------------------------------------------
+# Create ASF Verbosity DXE Component
+#---------------------------------------------------------------------------
+AMTLOCKKBD: $(BUILD_DIR)\AmtLockKBD.mak AMTLOCKKBDBin
+
+AMTLOCKKBDBin : $(AMIDXELIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\AmtLockKBD.mak all\
+ MAKEFILE=$(BUILD_DIR)\AmtLockKBD.mak \
+ OBJECTS="$(AMT_LOCKKBD_OBJECTS)" \
+ GUID=5507247A-846B-4f22-B55F-72B4049435EF \
+ ENTRY_POINT=AMTLOCKKBDEntryPoint \
+ TYPE=BS_DRIVER \
+ COMPRESS=1
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.sdl b/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.sdl
new file mode 100644
index 0000000..ad810bd
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtLockKBD/AmtLockKBD.sdl
@@ -0,0 +1,38 @@
+TOKEN
+ Name = "AmtLockKBD_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Help = "Main switch to enable AmtInt16 support in Project"
+End
+
+MODULE
+ Help = "Includes AmtInt16.mak to Project"
+ File = "AmtLockKBD.mak"
+End
+
+PATH
+ Name = "AmtLockKBD_DIR"
+End
+
+ELINK
+ Name = "AMTINT09Proc"
+ Parent = "CsmOemInterrupts"
+ ProcID = 09h
+ SrcFile = "Board\EM\MEWrapper\AmtWrapper\Dxe\AmtInt9.asm"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AmtInt9.obj"
+ Parent = "CSM_OEMINT_OBJS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AmtLockKBD.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.c b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.c
new file mode 100644
index 0000000..774d8f9
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.c
@@ -0,0 +1,863 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPetAlert/AmtPetAlert.c 8 6/18/14 3:16a Larryliu $
+//
+// $Revision: 8 $
+//
+// $Date: 6/18/14 3:16a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPetAlert/AmtPetAlert.c $
+//
+// 8 6/18/14 3:16a Larryliu
+// [TAG] EIP173999
+// [Category] Improvement
+// [Description] [HWR]Remove useless comments from Intel ME
+// component.(except RC)
+// [Files] AmtPetAlert.c
+//
+// 6 5/14/14 9:38p Tristinchou
+// [TAG] EIP160730
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 5 12/25/12 12:56a Klzhan
+// Fix AMT_TC007 fail.
+//
+// 4 11/07/12 8:45a Klzhan
+// Improvement : Set Booted HDD as expected Boot device
+//
+// 3 9/19/12 6:58a Klzhan
+// Correct PET Alert behavior.
+//
+// 2 6/05/12 2:33a Klzhan
+// [TAG] EIP90325
+// [Category] Improvement
+// [Description] To pass Win8 SCT test.
+//
+// 1 2/08/12 1:10a Klzhan
+// Initial Check in
+//
+// 2 6/30/11 5:49a Klzhan
+// Fix AMT TC007 fail with Fixed bootorder.
+//
+// 1 2/25/11 1:45a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AmtPetAlert.c
+//
+// Description: AMT Pet Alert Functions.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include "AmtPetAlert.h"
+#include <ReferenceCode\ME\Protocol\AlertStandardFormat\AlertStandardFormat.h>
+
+EFI_GUID gEfiAmtWrapperProtocolGuid = EFI_AMT_WRAPPER_PROTOCOL_GUID;
+EFI_GUID gEfiSetupGuid = SETUP_GUID;
+EFI_GUID gEfiGlobalVariableGuid = EFI_GLOBAL_VARIABLE_GUID;
+EFI_GUID gEfiLegacyBiosProtocolGuid = EFI_LEGACY_BIOS_PROTOCOL_GUID;
+EFI_GUID gEfiEventReadyToBootGuid = EFI_EVENT_GROUP_READY_TO_BOOT;
+EFI_GUID gEfiDiskInfoProtocolGuid = EFI_DISK_INFO_PROTOCOL_GUID;
+EFI_GUID gEfiDevicePathProtocolGuid = EFI_DEVICE_PATH_PROTOCOL_GUID;
+EFI_GUID gEfiHeciProtocolGuid = HECI_PROTOCOL_GUID;
+EFI_GUID gEfiBlockIoProtocolGuid = EFI_BLOCK_IO_PROTOCOL_GUID;
+EFI_GUID gEfiSimpleFileSystemProtocolGuid = EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID;
+
+VOID
+InitializeAmtPetAlert (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+ EFI_EVENT ReadyToBootEvent;
+ EFI_EVENT LegacyBootEvent;
+
+ EfiInitializeDriverLib (ImageHandle, SystemTable);
+
+ //
+ // Register Ready to Boot Event for AMT Wrapper
+ //
+ Status = EfiCreateEventReadyToBoot(
+ EFI_TPL_CALLBACK,
+ AmtPetAlertReadyToBoot,
+ (VOID *)&ImageHandle,
+ &ReadyToBootEvent
+ );
+
+ Status = EfiCreateEventLegacyBoot(
+ EFI_TPL_CALLBACK,
+ AmtPetAlertLegacyBoot,
+ NULL,
+ &LegacyBootEvent
+ );
+
+ return;
+}
+
+VOID SwapEntries (
+ IN CHAR8 *Data,
+ IN UINT16 Size
+)
+{
+ UINT16 Index;
+ CHAR8 Temp8;
+
+ for (Index = 0; (Index+1) < Size; Index+=2) {
+ Temp8 = Data[Index];
+ Data[Index] = Data[Index + 1];
+ Data[Index + 1] = Temp8;
+ }
+}
+
+CHAR8 *
+ConvertChar16ToChar8 (
+ IN CHAR16 *Src
+)
+{
+ UINTN l;
+ CHAR8 *Output;
+ CHAR8 *Dest;
+ EFI_STATUS Status;
+
+ l = EfiStrLen(Src) + 1;
+ Status = gBS->AllocatePool(
+ EfiBootServicesData,
+ l,
+ &Output
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ Dest = Output;
+ while (*Src) {
+ *Dest++ = (UINT8) (*Src++);
+ }
+ *Dest = 0;
+
+ return Output;
+}
+
+// Example 1: 16 10 0F 6F 02 68 08 FF FF 00 00 40 13 XX XX XX
+// Example 2: 15 10 0F 6F 02 68 10 FF FF 22 00 AA 13 03 03 02
+BOOT_AUDIT_ENTRY PetAlertWithoutChange = {
+ 0x15, 0x10, 0x0F, 0x6F, 0x02, 0x68, 0x08, 0xFF, 0xFF, 0x22, 0x00, 0x40, 0x13, 0x00, 0x00, 0x00
+};
+
+BOOT_AUDIT_ENTRY PetAlertWithChange = {
+ 0x15, 0x10, 0x0F, 0x6F, 0x02, 0x68, 0x10, 0xFF, 0xFF, 0x22, 0x00, 0xAA, 0x13, 0x03, 0x03, 0x02
+};
+
+EFI_STATUS
+SendBaeMessage(
+ BOOT_AUDIT_ENTRY *Buffer
+)
+{
+ EFI_HECI_PROTOCOL *Heci;
+ UINT32 HeciLength;
+ BOOT_AUDIT_ENTRY_PACK Pack;
+ UINT32 MeStatus;
+ EFI_STATUS TempStatus;
+ EFI_STATUS Status;
+
+ gBS->CopyMem(&Pack.Data, Buffer, sizeof(BOOT_AUDIT_ENTRY));
+ Pack.Command = EFI_ASF_MESSAGE_COMMAND_MESSAGE; // 0x04
+ Pack.ByteCount = sizeof(BOOT_AUDIT_ENTRY);
+ HeciLength = sizeof(BOOT_AUDIT_ENTRY_PACK); // length include Command & ByteCount
+
+ Status = gBS->LocateProtocol (
+ &gEfiHeciProtocolGuid,
+ NULL,
+ &Heci
+ );
+ if (!EFI_ERROR(Status)) {
+ TempStatus = Heci->GetMeStatus(&MeStatus);
+ ASSERT_EFI_ERROR(TempStatus);
+
+ //
+ // Only send ASF Push Progress code when ME is ready. Ignore FW Init Status.
+ //
+ if (ME_STATUS_ME_STATE_ONLY(MeStatus) == ME_READY) {
+ Status = Heci->SendMsg(
+ (UINT32*)&Pack,
+ HeciLength,
+ BIOS_ASF_HOST_ADDR,
+ HECI_ASF_MESSAGE_ADDR
+ );
+ if (EFI_ERROR(Status)) {
+
+ }
+ } else {
+
+ }
+ } else {
+
+ }
+
+ return Status;
+}
+
+EFI_STATUS
+PetAlert(
+ UINT8 DeviceType,
+ CHAR8 *HarddriveTag
+)
+{
+ PET_ALERT_CFG PetAlertCfg[4];
+ UINTN VarSize;
+ UINT32 VarAttr;
+ BOOLEAN BootChange = FALSE;
+ EFI_STATUS Status;
+ UINT8 BootHDD = 0, i;
+
+ VarSize = sizeof(PetAlertCfg);
+ Status = gRT->GetVariable (
+ L"PetAlertCfg",
+ &gEfiAmtWrapperProtocolGuid,
+ &VarAttr,
+ &VarSize,
+ &PetAlertCfg
+ );
+ if (EFI_ERROR (Status)) {
+ VarAttr = EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS;
+
+ PetAlertCfg[0].BootQueue = DeviceType;
+ PetAlertCfg[1].BootQueue = DeviceType;
+ PetAlertCfg[2].BootQueue = DeviceType;
+ PetAlertCfg[3].BootQueue = DeviceType;
+
+ if(DeviceType == BBS_TYPE_HARDDRIVE)
+ EfiAsciiStrCpy(PetAlertCfg[0].BootHarddriveTag, HarddriveTag);
+ else
+ EfiAsciiStrCpy(PetAlertCfg[0].BootHarddriveTag, "");
+ EfiAsciiStrCpy(PetAlertCfg[1].BootHarddriveTag, "");
+ EfiAsciiStrCpy(PetAlertCfg[2].BootHarddriveTag, "");
+ EfiAsciiStrCpy(PetAlertCfg[3].BootHarddriveTag, "");
+ BootChange = TRUE;
+ }else
+ {
+ if(DeviceType != BBS_HARDDISK)
+ BootChange = TRUE;
+ else
+ // If Boot HDD, check ModelSerialNumber
+ {
+ // last boot is not HD boot
+ if(PetAlertCfg[0].BootQueue != DeviceType)
+ {
+ BootChange = TRUE;
+ }else
+ {
+ // If this HDD is "excepted" or not
+ for(i = 0 ; i < 4 ; i++)
+ {
+ if((!EfiAsciiStrCmp(HarddriveTag,PetAlertCfg[i].BootHarddriveTag)))
+ BootHDD++;
+ }
+ // Not "Excepted", Set BootChanged
+ if(BootHDD == 0)
+ BootChange = TRUE;
+ }
+ }
+ if((DeviceType == BBS_HARDDISK) && BootChange)
+ PetAlertWithChange.EventData3 = 0x02;
+ // Not Frist Boot, update PET BAE variable.
+ PetAlertCfg[3].BootQueue = PetAlertCfg[2].BootQueue;
+ PetAlertCfg[2].BootQueue = PetAlertCfg[1].BootQueue;
+ PetAlertCfg[1].BootQueue = PetAlertCfg[0].BootQueue;
+ PetAlertCfg[0].BootQueue = DeviceType;
+
+ // Update for HDD string
+ EfiAsciiStrCpy(PetAlertCfg[3].BootHarddriveTag, PetAlertCfg[2].BootHarddriveTag);
+ EfiAsciiStrCpy(PetAlertCfg[2].BootHarddriveTag, PetAlertCfg[1].BootHarddriveTag);
+ EfiAsciiStrCpy(PetAlertCfg[1].BootHarddriveTag, PetAlertCfg[0].BootHarddriveTag);
+ EfiAsciiStrCpy(PetAlertCfg[0].BootHarddriveTag, HarddriveTag);
+ }
+
+ if (BootChange)
+ SendBaeMessage(&PetAlertWithChange);
+ else
+ SendBaeMessage(&PetAlertWithoutChange);
+
+ VarSize = sizeof(PetAlertCfg);
+ Status = gRT->SetVariable (
+ L"PetAlertCfg",
+ &gEfiAmtWrapperProtocolGuid,
+ VarAttr,
+ VarSize,
+ PetAlertCfg
+ );
+
+ return Status;
+}
+
+BOOLEAN
+ComparePathNode(
+ IN EFI_DEVICE_PATH_PROTOCOL *PathNode1,
+ IN EFI_DEVICE_PATH_PROTOCOL *PathNode2
+)
+{
+ BOOLEAN st = FALSE;
+ UINTN Size1, Size2;
+ UINT8 *p1, *p2;
+
+ if (PathNode1 == PathNode2) {
+ st = TRUE;
+ } else if (PathNode1 == NULL) {
+ } else if (PathNode2 == NULL) {
+ } else {
+ Size1 = DevicePathNodeLength(PathNode1);
+ Size2 = DevicePathNodeLength(PathNode2);
+ p1 = (UINT8 *)PathNode1;
+ p2 = (UINT8 *)PathNode2;
+ if ((Size1 == Size2)
+ && (DevicePathType(PathNode1) == DevicePathType(PathNode2))
+ && (EfiCompareMem(p1+1, p2+1, Size1-1) == 0)) {
+ st = TRUE;
+ }
+ }
+
+ return st;
+}
+
+UINT8
+GetDeviceType(
+ IN EFI_DEVICE_PATH_PROTOCOL *DevPath
+ )
+{
+ UINT8 DeviceType = 0;
+ EFI_DEVICE_PATH_PROTOCOL *DevPathNode;
+
+ //
+ // Find HDD Node in BootDevPath
+ //
+ DevPathNode = BdsLibUnpackDevicePath(DevPath);
+ ASSERT (DevPathNode);
+
+ while (!IsDevicePathEnd(DevPathNode)) {
+ if (DevicePathType(DevPathNode) == MEDIA_DEVICE_PATH) {
+ if (DevicePathSubType(DevPathNode) == MEDIA_HARDDRIVE_DP) {
+ DeviceType = BBS_TYPE_HARDDRIVE; // 2
+ break;
+ } else if (DevicePathSubType(DevPathNode) == MEDIA_CDROM_DP) {
+ DeviceType = BBS_TYPE_CDROM; // 3
+ break;
+ } else if (DevicePathSubType(DevPathNode) == MEDIA_FILEPATH_DP) {
+ DeviceType = BBS_TYPE_FLOPPY; // 1
+ break;
+ }
+ }
+ //
+ // Next device path node
+ //
+ DevPathNode = NextDevicePathNode(DevPathNode);
+ }
+
+ return DeviceType;
+}
+
+EFI_DEVICE_PATH_PROTOCOL *
+GetMediaPathNode (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevPath
+)
+{
+ EFI_DEVICE_PATH_PROTOCOL *DevPathNode;
+ EFI_DEVICE_PATH_PROTOCOL *MediaPathNode = NULL;
+
+ //
+ // Find HDD Node in BootDevPath
+ //
+ DevPathNode = BdsLibUnpackDevicePath(DevPath);
+ ASSERT (DevPathNode);
+
+ while (!IsDevicePathEnd(DevPathNode)) {
+ if (DevicePathType(DevPathNode) == MEDIA_FILEPATH_DP) {
+ MediaPathNode = DevPathNode;
+ break;
+ }
+ //
+ // Next device path node
+ //
+ DevPathNode = NextDevicePathNode(DevPathNode);
+ }
+
+ return MediaPathNode;
+}
+
+BOOLEAN
+CompareMediaPathNode(
+ IN EFI_DEVICE_PATH_PROTOCOL *DevPath1,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevPath2
+)
+{
+ EFI_DEVICE_PATH_PROTOCOL *PathNode1;
+ EFI_DEVICE_PATH_PROTOCOL *PathNode2;
+ BOOLEAN st = FALSE;
+
+ PathNode1 = GetMediaPathNode(DevPath1);
+ PathNode2 = GetMediaPathNode(DevPath2);
+ st = ComparePathNode(PathNode1, PathNode2);
+
+ return st;
+}
+
+VOID
+Trim(
+ CHAR8 *sDesc,
+ CHAR8 *sSrc
+)
+{
+ UINTN p1 ,p2;
+ CHAR8 ch;
+ UINTN i,l;
+
+ p1 = 0xFF;
+ p2 = 0xFF;
+ i = 0;
+ for(;;) {
+ ch = *(sSrc+i);
+ if (ch == 0) {
+ break;
+ } else if (ch != 0x20) {
+ p2 = i;
+ if (p1 == 0xFF) {
+ p1 = i;
+ }
+ }
+ i++;
+ }
+
+ l = (p2 - p1) + 1;
+ gBS->CopyMem(sDesc, sSrc+p1, l);
+ *(sDesc+l) = 0;
+}
+
+EFI_STATUS
+GetModelSerialNumber(
+ IN EFI_HANDLE Handle,
+ OUT CHAR8 *ModelSerialNumber
+)
+{
+ EFI_STATUS Status = EFI_NOT_FOUND;
+ EFI_DISK_INFO_PROTOCOL *DiskInfo;
+ IDENTIFY_DATA *IdentifyDriveInfo = NULL;
+ UINT32 BufferSize;
+ CHAR8 ModelNumber[42];
+ CHAR8 SerialNumber[22];
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath = NULL;
+
+ EfiAsciiStrCpy(ModelSerialNumber, "");
+
+ for(;;) {
+ Status = gBS->HandleProtocol(
+ Handle,
+ &gEfiDevicePathProtocolGuid,
+ &DevicePath);
+ if (EFI_ERROR(Status))
+ break;
+
+ Status = gBS->LocateDevicePath (
+ &gEfiDiskInfoProtocolGuid,
+ &DevicePath,
+ &Handle
+ );
+ if (EFI_ERROR (Status)) {
+ break;
+ }
+
+ Status = gBS->HandleProtocol (
+ Handle,
+ &gEfiDiskInfoProtocolGuid,
+ &DiskInfo
+ );
+ if (EFI_ERROR(Status))
+ break;
+
+ Status = gBS->AllocatePool(
+ EfiBootServicesData,
+ sizeof (IDENTIFY_DATA),
+ &IdentifyDriveInfo
+ );
+ if (EFI_ERROR(Status))
+ break;
+
+ gBS->SetMem(IdentifyDriveInfo, sizeof (IDENTIFY_DATA), 0);
+ BufferSize = sizeof (IDENTIFY_DATA);
+ Status = DiskInfo->Identify (
+ DiskInfo,
+ IdentifyDriveInfo,
+ &BufferSize
+ );
+ if (EFI_ERROR(Status))
+ break;
+
+ gBS->CopyMem(SerialNumber, IdentifyDriveInfo->Serial_Number_10, 20);
+ SwapEntries (SerialNumber, 20);
+ SerialNumber[20] = '\0';
+ Trim(SerialNumber, SerialNumber);
+
+ gBS->CopyMem(ModelNumber, IdentifyDriveInfo->Model_Number_27, 40);
+ SwapEntries (ModelNumber, 40);
+ ModelNumber[40] = '\0';
+ Trim(ModelNumber, ModelNumber);
+
+ EfiAsciiStrCpy(ModelSerialNumber, ModelNumber);
+ EfiAsciiStrCat(ModelSerialNumber, "_");
+ EfiAsciiStrCat(ModelSerialNumber, SerialNumber);
+
+ Status = EFI_SUCCESS;
+ break;
+ }
+
+ if (IdentifyDriveInfo != NULL)
+ gBS->FreePool(IdentifyDriveInfo);
+
+ return Status;
+}
+
+EFI_DEVICE_PATH_PROTOCOL *
+GetDevicePathFromBBS(
+ UINT8 DeviceType,
+ CHAR8 *ModelSerialNumber
+
+)
+{
+ EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
+ UINT16 HddCount = 0;
+ HDD_INFO *LocalHddInfo = NULL;
+ UINT16 BbsCount = 0;
+ BBS_TABLE *BbsTable;
+ EFI_STATUS Status;
+ BBS_TABLE *BbsEntry;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath = NULL;
+ UINTN i;
+ EFI_HANDLE Handle;
+ UINTN DeviceIndex;
+ UINTN DevicePriority;
+
+ Status = gBS->LocateProtocol (&gEfiLegacyBiosProtocolGuid, NULL, &LegacyBios);
+ if (!EFI_ERROR (Status)) {
+ Status = LegacyBios->GetBbsInfo (
+ LegacyBios,
+ &HddCount,
+ &LocalHddInfo,
+ &BbsCount,
+ &BbsTable
+ );
+ if (!EFI_ERROR (Status)) {
+ //
+ // Find match index by prioridy
+ //
+ DeviceIndex = (UINTN)-1;
+ DevicePriority = (UINTN)-1;
+ for (i = 0; i < BbsCount; i++) {
+ BbsEntry = BbsTable+i;
+ if (BbsEntry->BootPriority == BBS_IGNORE_ENTRY)
+ continue;
+ if (BbsEntry->DeviceType == DeviceType) {
+ if (DevicePriority > BbsEntry->BootPriority) {
+ DevicePriority = BbsEntry->BootPriority;
+ DeviceIndex = i;
+ }
+ }
+ }
+
+ //
+ // Get model and serial number
+ //
+ if (DeviceIndex != (UINTN)-1) {
+ BbsEntry = BbsTable + DeviceIndex;
+ Handle = *(VOID**)(&BbsEntry->IBV1);
+ GetModelSerialNumber(Handle, ModelSerialNumber);
+ }
+ }
+ }
+
+ return DevicePath;
+}
+
+EFI_STATUS
+NotifyPetAlert(
+ EFI_EVENT Event,
+ VOID *ParentImageHandle
+)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ UINTN i;
+ UINT16 BootCurrent;
+ UINTN VarSize;
+ CHAR16 BootXXXX[16];
+ EFI_LOAD_OPTION *BootOption = NULL;
+ UINT8 *pDP;
+ BBS_BBS_DEVICE_PATH *bDP; // DP for BBS
+ UINTN LegacyBoot = 1;
+ EFI_DEVICE_PATH_PROTOCOL *BootDevicePath = NULL;
+ UINT8 DeviceType;
+ CHAR8 ModelSerialNumber[64];
+ EFI_ASF_BOOT_OPTIONS *mAsfBootOptions;
+ EFI_ALERT_STANDARD_FORMAT_PROTOCOL *Asf;
+ EFI_GUID gEfiAlertStandardFormatProtocolGuid = EFI_ALERT_STANDARD_FORMAT_PROTOCOL_GUID;
+
+ Status = gBS->LocateProtocol (
+ &gEfiAlertStandardFormatProtocolGuid,
+ NULL,
+ &Asf
+ );
+
+ if (EFI_ERROR (Status)) return Status;
+ Status = Asf->GetBootOptions (Asf, &mAsfBootOptions);
+ if (EFI_ERROR (Status)) mAsfBootOptions = NULL;
+
+ EfiAsciiStrCpy(ModelSerialNumber, "");
+
+ //
+ // BootCurrent
+ //
+ VarSize = sizeof (UINT16);
+ Status = gRT->GetVariable (
+ L"BootCurrent",
+ &gEfiGlobalVariableGuid,
+ NULL,
+ &VarSize,
+ &BootCurrent
+ );
+ if (!EFI_ERROR (Status)) {
+ } else {
+ BootCurrent = 0;
+ }
+
+ SPrint(BootXXXX, sizeof(BootXXXX), L"Boot%04x", BootCurrent);
+
+ VarSize = 0;
+ Status = gRT->GetVariable (
+ BootXXXX,
+ &gEfiGlobalVariableGuid,
+ NULL,
+ &VarSize,
+ NULL
+ );
+ if (Status != EFI_BUFFER_TOO_SMALL) {
+ return Status;
+ }
+
+ //
+ // Allocate Memory for BootXXXX
+ //
+ Status = gBS->AllocatePool(
+ EfiBootServicesData,
+ VarSize,
+ &BootOption
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ Status = gRT->GetVariable (
+ BootXXXX,
+ &gEfiGlobalVariableGuid,
+ NULL,
+ &VarSize,
+ BootOption
+ );
+ if (!EFI_ERROR (Status)) {
+ pDP = (UINT8*)(BootOption+1);
+ pDP += (EfiStrLen((CHAR16*)pDP) + 1) * sizeof(CHAR16);
+
+ BootDevicePath = EfiDuplicateDevicePath((EFI_DEVICE_PATH_PROTOCOL *)pDP);
+
+ //
+ // Free Memory for BootXXXX
+ //
+ if (BootOption != NULL) {
+ gBS->FreePool(BootOption);
+ BootOption = NULL;
+ }
+ }
+
+ if (BootDevicePath != NULL) {
+ bDP = (BBS_BBS_DEVICE_PATH *)BootDevicePath;
+ if (bDP->Header.Type == BBS_DEVICE_PATH && bDP->Header.SubType == BBS_BBS_DP) {
+ LegacyBoot = 1;
+ } else {
+ LegacyBoot = 0;
+ }
+ }
+
+ //-------------------------------------------------------------------------
+ // EFI Boot
+ //-------------------------------------------------------------------------
+ if (LegacyBoot == 0) {
+ UINTN HandleCount;
+ EFI_HANDLE *HandleBuffer;
+ EFI_HANDLE Handle;
+ EFI_DEVICE_PATH_PROTOCOL *DPath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *BootDeviceHandle;
+
+ if (BootDevicePath == NULL) {
+ //
+ // Boot to EFI Shell
+ //
+ //Need Save "BootXXXX" in setup when launch entry after add boot option without Save
+ }
+ else {
+ DevicePath = EfiDuplicateDevicePath(BootDevicePath);
+ Status = gBS->LocateDevicePath (
+ &gEfiSimpleFileSystemProtocolGuid,
+ &DevicePath,
+ &BootDeviceHandle
+ );
+ if (EFI_ERROR (Status)) {
+ BootDeviceHandle = NULL;
+ }
+
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiSimpleFileSystemProtocolGuid,
+ NULL,
+ &HandleCount,
+ &HandleBuffer
+ );
+ if (!EFI_ERROR (Status)) {
+ for (i = 0; i < HandleCount; i ++) {
+ BOOLEAN st;
+
+ Handle = HandleBuffer[i];
+ Status = gBS->HandleProtocol (
+ Handle,
+ &gEfiDevicePathProtocolGuid,
+ &DPath
+ );
+ if (!EFI_ERROR (Status)) {
+ //
+ // !!! CompareMedia only work with HDD & CD-ROM !!!
+ //
+ st = CompareMediaPathNode(BootDevicePath, DPath);
+ if (st == FALSE) {
+ //
+ // for USB MassStorage
+ //
+ if (Handle == BootDeviceHandle) {
+ st = TRUE;
+ }
+ }
+
+ if (st) {
+ DeviceType = GetDeviceType(BootDevicePath);
+
+ if (DeviceType == BBS_TYPE_HARDDRIVE) {
+ GetModelSerialNumber(Handle, ModelSerialNumber);
+ } else {
+ EfiAsciiStrCpy(ModelSerialNumber, "");
+ }
+ PetAlert(DeviceType, ModelSerialNumber);
+ }
+ }
+ }
+ if (HandleBuffer != NULL) {
+ gBS->FreePool (HandleBuffer);
+ }
+ }
+ }
+ }
+ //-------------------------------------------------------------------------
+ // Legacy Boot
+ //-------------------------------------------------------------------------
+ else {
+ if (BootDevicePath != NULL) {
+ bDP = (BBS_BBS_DEVICE_PATH *)BootDevicePath;
+ DeviceType = (UINT8) bDP->DeviceType;
+ } else {
+ DeviceType = BBS_TYPE_HARDDRIVE;
+ }
+ if ((mAsfBootOptions != NULL) && (mAsfBootOptions->SubCommand == 0x16)) {
+ switch (mAsfBootOptions->SpecialCommand ) {
+ case 1: DeviceType = BBS_TYPE_EMBEDDED_NETWORK;
+ break;
+ case 2:
+ case 3: DeviceType = BBS_TYPE_HARDDRIVE;
+ break;
+ case 5: DeviceType = BBS_TYPE_CDROM;
+ break;
+ }
+ }
+
+ switch (DeviceType) {
+ case BBS_TYPE_EMBEDDED_NETWORK:
+ case BBS_TYPE_FLOPPY:
+ case BBS_TYPE_CDROM:
+ PetAlert(DeviceType, NULL);
+ break;
+
+ case BBS_TYPE_HARDDRIVE:
+ GetDevicePathFromBBS(BBS_TYPE_HARDDRIVE, ModelSerialNumber);
+ PetAlert(DeviceType, ModelSerialNumber);
+ break;
+
+ default:
+ //
+ // Add code for process if run here
+ //
+ PetAlert(DeviceType, NULL);
+ break;
+ }
+ }
+
+ return Status;
+}
+
+EFI_STATUS
+AmtPetAlertReadyToBoot(
+ EFI_EVENT Event,
+ VOID *ParentImageHandle
+)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ Status = NotifyPetAlert(Event, ParentImageHandle);
+
+ return Status;
+}
+
+EFI_STATUS
+AmtPetAlertLegacyBoot(
+ EFI_EVENT Event,
+ VOID *ParentImageHandle
+)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ return Status;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.cif b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.cif
new file mode 100644
index 0000000..d346ae9
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.cif
@@ -0,0 +1,14 @@
+<component>
+ name = "AmtPetAlert"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\AmtWrapper\AmtPetAlert\"
+ RefName = "AmtPetAlert"
+[files]
+"AmtPetAlert.sdl"
+"AmtPetAlert.mak"
+"AmtPetAlert.c"
+"AmtPetAlert.h"
+"AmtPetAlert.dxs"
+"DevicePath.h"
+"DevicePath.c"
+<endComponent>
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.dxs b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.dxs
new file mode 100644
index 0000000..29ac1c9
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.dxs
@@ -0,0 +1,68 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPetAlert/AmtPetAlert.dxs 1 2/08/12 1:10a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:10a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPetAlert/AmtPetAlert.dxs $
+//
+// 1 2/08/12 1:10a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:45a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AmtPeiAlert.dxs
+//
+// Description: This file is the dependency file for AmtPetAlert driver.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include <Protocol\Variable.h>
+
+#include EFI_PROTOCOL_DEFINITION (ActiveManagement)
+#include EFI_PROTOCOL_DEFINITION (Heci)
+
+DEPENDENCY_START
+ EFI_HECI_PROTOCOL_GUID AND
+ EFI_ACTIVE_MANAGEMENT_PROTOCOL_GUID AND
+ EFI_VARIABLE_ARCH_PROTOCOL_GUID AND
+ EFI_VARIABLE_WRITE_ARCH_PROTOCOL_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.h b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.h
new file mode 100644
index 0000000..de37961
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.h
@@ -0,0 +1,205 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPetAlert/AmtPetAlert.h 1 2/08/12 1:10a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:10a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPetAlert/AmtPetAlert.h $
+//
+// 1 2/08/12 1:10a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:45a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AmtPetAlert.h
+//
+// Description: Header file of AmtPetAlert module.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#ifndef __AMT_PET_ALERT_H__
+#define __AMT_PET_ALERT_H__
+
+#include "Tiano.h"
+#include "EfiDriverLib.h"
+#include "EfiPrintLib.h"
+#include "EfiCommonLib.h"
+#include "Amt.h"
+#include "EfiScriptLib.h"
+#include "AmtLib.h"
+#include "MeLib.h"
+#include "Include\Protocol\PDiskInfo.h"
+#include "DevicePath.h"
+#include "HeciRegs.h"
+
+#include EFI_PROTOCOL_CONSUMER (AmtPlatformPolicy)
+#include EFI_PROTOCOL_CONSUMER (AmtWrapper)
+#include EFI_PROTOCOL_CONSUMER (DiskInfo)
+#include EFI_PROTOCOL_CONSUMER (Heci)
+#include EFI_PROTOCOL_CONSUMER (BlockIo)
+#include EFI_PROTOCOL_CONSUMER (SimpleFileSystem)
+#include EFI_PROTOCOL_DEFINITION (LegacyBios)
+#include EFI_GUID_DEFINITION (GlobalVariable)
+
+#define SETUP_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+//#define EFI_GLOBAL_VARIABLE_GUID { 0x8BE4DF61, 0x93CA, 0x11D2, 0xAA, 0x0D, 0x00, 0xE0, 0x98, 0x03, 0x2B, 0x8C }
+
+// Based on ATA/ATAPI-6
+typedef struct _IDENTIFY_DATA{
+
+ UINT16 General_Config_0;
+ UINT16 Reserved_1;
+ UINT16 Special_Config_2;
+ UINT16 Reserved_3;
+ UINT16 Reserved_4;
+ UINT16 Reserved_5;
+ UINT16 Reserved_6;
+ UINT16 Reserved_7;
+ UINT16 Reserved_8;
+ UINT16 Reserved_9;
+ UINT8 Serial_Number_10[20];
+ UINT16 Reserved_20;
+ UINT16 Reserved_21;
+ UINT16 Reserved_22;
+ UINT8 Firmware_Revision_23[8];
+ UINT8 Model_Number_27[40];
+ UINT16 Maximum_Sector_Multiple_Command_47;
+ UINT16 Reserved_48;
+ UINT16 Capabilities_49;
+ UINT16 Capabilities_50;
+ UINT16 PIO_Mode_51;
+ UINT16 Reserved_52;
+ UINT16 Valid_Bits_53;
+ UINT16 Reserved_54_58[5];
+ UINT16 Valid_Bits_59;
+ UINT32 Addressable_Sector_60;
+ UINT16 SingleWord_DMA_62;
+ UINT16 MultiWord_DMA_63;
+ UINT16 PIO_Mode_64;
+ UINT16 Min_Multiword_DMA_timing_65;
+ UINT16 Manuf_Multiword_DMA_timing_66;
+ UINT16 Min_PIO_Mode_timing_67;
+ UINT16 Min_PIO_Mode_timing_68;
+ UINT16 Reserved_69_74[6];
+ UINT16 Queue_Depth_75;
+ UINT16 Reserved_76_79[4];
+ UINT16 Major_Revision_80;
+ UINT16 Minor_Revision_81;
+ UINT16 Command_Set_Supported_82;
+ UINT16 Command_Set_Supported_83;
+ UINT16 Command_Set_Supported_84;
+ UINT16 Command_Set_Enabled_85;
+ UINT16 Command_Set_Enabled_86;
+ UINT16 Command_Set_Enabled_87;
+ UINT16 UDMA_Mode_88;
+ UINT16 Time_security_Earse_89;
+ UINT16 Time_Esecurity_Earse_90;
+ UINT16 Current_Power_Level_91;
+ UINT16 Master_Password_Rev_92;
+ UINT16 Hard_Reset_Value_93;
+ UINT16 Acoustic_Level_94;
+ UINT16 Reserved_95_99[5];
+ UINT64 LBA_48;
+ UINT16 Reserved_104_126[23];
+ UINT16 Status_Notification_127;
+ UINT16 Security_Status_128;
+ UINT16 Reserved_129_159[31];
+ UINT16 CFA_Power_Mode_160;
+ UINT16 Reserved_161_175[15];
+ UINT16 Media_Serial_Number_176_205[30];
+ UINT16 Reserved_206_254[49];
+ UINT16 Checksum_255;
+} IDENTIFY_DATA;
+
+#pragma pack(push,1)
+typedef struct {
+ UINT32 Attributes;
+ UINT16 FilePathListLength;
+} EFI_LOAD_OPTION;
+
+// Example 1: 16 10 0F 6F 02 68 08 FF FF 00 00 40 13 XX XX XX
+// Example 2: 15 10 0F 6F 02 68 10 FF FF 22 00 AA 13 03 03 02
+
+typedef struct {
+ UINT8 SubCommand; // 0x00
+ UINT8 VersionNumber; // 0x01
+ UINT8 EventSensorType; // 0x02
+ UINT8 EventType; // 0x03
+ UINT8 EventOffset; // 0x04
+ UINT8 EventSourceType; // 0x05
+ UINT8 EventSeverity; // 0x06
+ UINT8 SensorDevice; // 0x07
+ UINT8 Sensornumber; // 0x08
+ UINT8 Entity; // 0x09
+ UINT8 EntityInstance; // 0x0A
+ UINT8 EventData1; // 0x0B
+ UINT8 EventData2; // 0x0C
+ UINT8 EventData3; // 0x0D
+ UINT8 EventData4; // 0x0E
+ UINT8 EventData5; // 0x0F
+} BOOT_AUDIT_ENTRY;
+
+typedef struct {
+ UINT8 Command;
+ UINT8 ByteCount;
+ BOOT_AUDIT_ENTRY Data;
+} BOOT_AUDIT_ENTRY_PACK;
+
+typedef struct {
+ UINT8 BootQueue;
+ UINT8 BootHarddriveTag[64];
+} PET_ALERT_CFG;
+
+#pragma pack(pop)
+
+EFI_STATUS
+AmtPetAlertReadyToBoot(
+ EFI_EVENT Event,
+ VOID *ParentImageHandle
+);
+
+EFI_STATUS
+AmtPetAlertLegacyBoot(
+ EFI_EVENT Event,
+ VOID *ParentImageHandle
+);
+
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.mak b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.mak
new file mode 100644
index 0000000..cf5d5a4
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.mak
@@ -0,0 +1,82 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPetAlert/AmtPetAlert.mak 1 2/08/12 1:10a Klzhan $
+#
+# $Revision: 1 $
+#
+# $Date: 2/08/12 1:10a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPetAlert/AmtPetAlert.mak $
+#
+# 1 2/08/12 1:10a Klzhan
+# Initial Check in
+#
+# 1 2/25/11 1:45a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:11a Klzhan
+# Initial Check-in.
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#---------------------------------------------------------------------------
+# Name: AmtPetAlert.mak
+#
+# Description: Makefile for AMT Pet Alert Module.
+#
+#---------------------------------------------------------------------------
+#<AMI_FHDR_END>
+#---------------------------------------------------------------------------
+# Create AMT PET Alert Screens
+#---------------------------------------------------------------------------
+All : AmtPetAlert
+
+AmtPetAlert : $(BUILD_DIR)\AmtPetAlert.mak AmtPetAlertBin
+
+$(BUILD_DIR)\AmtPetAlert.mak : $(AMT_PET_ALERT_DIR)\$(@B).cif $(AMT_PET_ALERT_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(AMT_PET_ALERT_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+AmtPetAlert_INCLUDES= \
+ $(EDK_INCLUDES) \
+ $(MISCFRAMEWORK_INCLUDES) \
+ $(ME_INCLUDES) \
+ $(IndustryStandard_INCLUDES)\
+
+AmtPetAlertBin : $(EFIDRIVERLIB) $(EDKFRAMEWORKPROTOCOLLIB) $(PRINTLIB) $(EFICOMMONLIB)
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\AmtPetAlert.mak all \
+ "MY_INCLUDES=$(AmtPetAlert_INCLUDES)"\
+ GUID=290EA249-6E88-423c-B0DA-75CDDE7920CC \
+ TYPE=BS_DRIVER \
+ ENTRY_POINT=InitializeAmtPetAlert \
+ DEPEX1=$(AMT_PET_ALERT_DIR)\AmtPetAlert.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ COMPRESS=1
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.sdl b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.sdl
new file mode 100644
index 0000000..36ac23b
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/AmtPetAlert.sdl
@@ -0,0 +1,24 @@
+TOKEN
+ Name = "AmtPetAlert_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable AMT PET Alert support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "AMT_PET_ALERT_DIR"
+End
+
+MODULE
+ Help = "Includes AmtPetAlert.mak to Project"
+ File = "AmtPetAlert.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AmtPetAlert.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/DevicePath.c b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/DevicePath.c
new file mode 100644
index 0000000..0aec0b3
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/DevicePath.c
@@ -0,0 +1,1049 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPetAlert/DevicePath.c 1 2/08/12 1:10a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:10a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPetAlert/DevicePath.c $
+//
+// 1 2/08/12 1:10a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:45a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+//
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: DevicePath.c
+//
+// Description: DevicePath functions for AMT Pet Alert.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include "DevicePath.h"
+
+EFI_GUID UnknownDeviceGuid = UNKNOWN_DEVICE_GUID;
+
+EFI_GUID mEfiMsgPcAnsiGuid = DEVICE_PATH_MESSAGING_PC_ANSI;
+EFI_GUID mEfiMsgVt100Guid = DEVICE_PATH_MESSAGING_VT_100;
+EFI_GUID mEfiMsgVt100PlusGuid = DEVICE_PATH_MESSAGING_VT_100_PLUS;
+EFI_GUID mEfiMsgVt100Utf8Guid = DEVICE_PATH_MESSAGING_VT_UTF8;
+
+VOID *
+ReallocatePool (
+ IN VOID *OldPool,
+ IN UINTN OldSize,
+ IN UINTN NewSize
+)
+/*++
+
+Routine Description:
+
+ Adjusts the size of a previously allocated buffer.
+
+Arguments:
+
+ OldPool - A pointer to the buffer whose size is being adjusted.
+
+ OldSize - The size of the current buffer.
+
+ NewSize - The size of the new buffer.
+
+Returns:
+
+ EFI_SUCEESS - The requested number of bytes were allocated.
+
+ EFI_OUT_OF_RESOURCES - The pool requested could not be allocated.
+
+ EFI_INVALID_PARAMETER - The buffer was invalid.
+
+--*/
+{
+ VOID *NewPool;
+
+ NewPool = NULL;
+ if (NewSize)
+ {
+ NewPool = EfiLibAllocateZeroPool (NewSize);
+ }
+
+ if (OldPool)
+ {
+ if (NewPool)
+ {
+ EfiCopyMem (NewPool, OldPool, OldSize < NewSize ? OldSize : NewSize);
+ }
+
+ gBS->FreePool (OldPool);
+ }
+
+ return NewPool;
+}
+
+CHAR16 *
+CatPrint (
+ IN OUT POOL_PRINT *Str,
+ IN CHAR16 *fmt,
+ ...
+)
+/*++
+
+Routine Description:
+
+ Concatenates a formatted unicode string to allocated pool.
+ The caller must free the resulting buffer.
+
+Arguments:
+
+ Str - Tracks the allocated pool, size in use, and
+ amount of pool allocated.
+
+ fmt - The format string
+
+Returns:
+
+ Allocated buffer with the formatted string printed in it.
+ The caller must free the allocated buffer. The buffer
+ allocation is not packed.
+
+--*/
+{
+ UINT16 *AppendStr;
+ VA_LIST args;
+ UINTN strsize;
+
+ AppendStr = EfiLibAllocateZeroPool (0x1000);
+ if (AppendStr == NULL)
+ {
+ return Str->str;
+ }
+
+ VA_START (args, fmt);
+ VSPrint (AppendStr, 0x1000, fmt, args);
+ VA_END (args);
+ if (NULL == Str->str)
+ {
+ strsize = EfiStrSize (AppendStr);
+ Str->str = EfiLibAllocateZeroPool (strsize);
+ ASSERT (Str->str != NULL);
+ }
+ else
+ {
+ strsize = EfiStrSize (AppendStr) + EfiStrSize (Str->str) - sizeof (UINT16);
+ Str->str = ReallocatePool (
+ Str->str,
+ EfiStrSize (Str->str),
+ strsize
+ );
+ ASSERT (Str->str != NULL);
+ }
+
+ Str->maxlen = MAX_CHAR * sizeof (UINT16);
+ if (strsize < Str->maxlen)
+ {
+ EfiStrCat (Str->str, AppendStr);
+ Str->len = strsize - sizeof (UINT16);
+ }
+
+ gBS->FreePool (AppendStr);
+ return Str->str;
+}
+
+EFI_DEVICE_PATH_PROTOCOL *
+BdsLibUnpackDevicePath (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevPath
+)
+/*++
+
+Routine Description:
+
+ Function unpacks a device path data structure so that all the nodes
+ of a device path are naturally aligned.
+
+Arguments:
+
+ DevPath - A pointer to a device path data structure
+
+Returns:
+
+ If the memory for the device path is successfully allocated, then a
+ pointer to the new device path is returned. Otherwise, NULL is returned.
+
+--*/
+{
+ EFI_DEVICE_PATH_PROTOCOL *Src;
+ EFI_DEVICE_PATH_PROTOCOL *Dest;
+ EFI_DEVICE_PATH_PROTOCOL *NewPath;
+ UINTN Size;
+
+ //
+ // Walk device path and round sizes to valid boundries
+ //
+ Src = DevPath;
+ Size = 0;
+ for (;;)
+ {
+ Size += DevicePathNodeLength (Src);
+ Size += ALIGN_SIZE (Size);
+
+ if (IsDevicePathEnd (Src))
+ {
+ break;
+ }
+
+ Src = NextDevicePathNode (Src);
+ }
+ //
+ // Allocate space for the unpacked path
+ //
+ NewPath = EfiLibAllocateZeroPool (Size);
+ if (NewPath)
+ {
+
+ ASSERT (((UINTN) NewPath) % MIN_ALIGNMENT_SIZE == 0);
+
+ //
+ // Copy each node
+ //
+ Src = DevPath;
+ Dest = NewPath;
+ for (;;)
+ {
+ Size = DevicePathNodeLength (Src);
+ EfiCopyMem (Dest, Src, Size);
+ Size += ALIGN_SIZE (Size);
+ SetDevicePathNodeLength (Dest, Size);
+ Dest->Type |= EFI_DP_TYPE_UNPACKED;
+ Dest = (EFI_DEVICE_PATH_PROTOCOL *) (((UINT8 *) Dest) + Size);
+
+ if (IsDevicePathEnd (Src))
+ {
+ break;
+ }
+
+ Src = NextDevicePathNode (Src);
+ }
+ }
+
+ return NewPath;
+}
+
+VOID
+DevPathPci (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ PCI_DEVICE_PATH *Pci;
+
+ Pci = DevPath;
+ CatPrint (Str, L"Pci(%x|%x)", Pci->Device, Pci->Function);
+}
+
+VOID
+DevPathPccard (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ PCCARD_DEVICE_PATH *Pccard;
+
+ Pccard = DevPath;
+ CatPrint (Str, L"Pcmcia(Function%x)", Pccard->FunctionNumber);
+}
+
+VOID
+DevPathMemMap (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ MEMMAP_DEVICE_PATH *MemMap;
+
+ MemMap = DevPath;
+ CatPrint (
+ Str,
+ L"MemMap(%d:%.lx-%.lx)",
+ MemMap->MemoryType,
+ MemMap->StartingAddress,
+ MemMap->EndingAddress
+ );
+}
+
+VOID
+DevPathController (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ CONTROLLER_DEVICE_PATH *Controller;
+
+ Controller = DevPath;
+ CatPrint (Str, L"Ctrl(%d)", Controller->Controller);
+}
+
+VOID
+DevPathVendor (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+/*++
+
+Routine Description:
+
+ Convert Vendor device path to device name
+
+Arguments:
+
+ Str - The buffer store device name
+ DevPath - Pointer to vendor device path
+
+Returns:
+
+ When it return, the device name have been stored in *Str.
+
+--*/
+{
+ VENDOR_DEVICE_PATH *Vendor;
+ CHAR16 *Type;
+ INT32 *Temp;
+
+ Vendor = DevPath;
+ Temp = (INT32 *) (&Vendor->Guid);
+
+ switch (DevicePathType (&Vendor->Header))
+ {
+ case HARDWARE_DEVICE_PATH:
+ //
+ // If the device is a winntbus device, we will give it a readable device name.
+ //
+ Type = L"Hw";
+ break;
+
+ case MESSAGING_DEVICE_PATH:
+ //
+ // If the device is a winntbus device, we will give it a readable device name.
+ //
+ if (EfiCompareGuid (&Vendor->Guid, &mEfiMsgPcAnsiGuid))
+ {
+ CatPrint (Str, L"%s", L"PC-ANSI");
+ return ;
+ }
+ else if (EfiCompareGuid (&Vendor->Guid, &mEfiMsgVt100Guid))
+ {
+ CatPrint (Str, L"%s", L"VT100");
+ return ;
+ }
+ else if (EfiCompareGuid (&Vendor->Guid, &mEfiMsgVt100PlusGuid))
+ {
+ CatPrint (Str, L"%s", L"VT100+");
+ return ;
+ }
+ else if (EfiCompareGuid (&Vendor->Guid, &mEfiMsgVt100Utf8Guid))
+ {
+ CatPrint (Str, L"%s", L"VT100-UTF8");
+ return ;
+ }
+ else
+ {
+ Type = L"Msg";
+ break;
+ }
+
+ case MEDIA_DEVICE_PATH:
+ Type = L"Media";
+ break;
+
+ default:
+ Type = L"?";
+ break;
+ }
+
+ CatPrint (Str, L"Ven%s(%g)", Type, &Vendor->Guid);
+}
+
+VOID
+DevPathAcpi (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ ACPI_HID_DEVICE_PATH *Acpi;
+
+ Acpi = DevPath;
+ if ((Acpi->HID & PNP_EISA_ID_MASK) == PNP_EISA_ID_CONST)
+ {
+ CatPrint (Str, L"Acpi(PNP%04x,%x)", EISA_ID_TO_NUM (Acpi->HID), Acpi->UID);
+ }
+ else
+ {
+ CatPrint (Str, L"Acpi(%08x,%x)", Acpi->HID, Acpi->UID);
+ }
+}
+
+VOID
+DevPathAtapi (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ ATAPI_DEVICE_PATH *Atapi;
+
+ Atapi = DevPath;
+ CatPrint (
+ Str,
+ L"Ata(%s,%s)",
+ Atapi->PrimarySecondary ? L"Secondary" : L"Primary",
+ Atapi->SlaveMaster ? L"Slave" : L"Master"
+ );
+}
+
+VOID
+DevPathScsi (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ SCSI_DEVICE_PATH *Scsi;
+
+ Scsi = DevPath;
+ CatPrint (Str, L"Scsi(Pun%x,Lun%x)", Scsi->Pun, Scsi->Lun);
+}
+
+VOID
+DevPathFibre (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ FIBRECHANNEL_DEVICE_PATH *Fibre;
+
+ Fibre = DevPath;
+ CatPrint (Str, L"Fibre(Wwn%lx,Lun%x)", Fibre->WWN, Fibre->Lun);
+}
+
+VOID
+DevPath1394 (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ F1394_DEVICE_PATH *F1394;
+
+ F1394 = DevPath;
+ CatPrint (Str, L"1394(%g)", &F1394->Guid);
+}
+
+VOID
+DevPathUsb (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ USB_DEVICE_PATH *Usb;
+
+ Usb = DevPath;
+ CatPrint (Str, L"Usb(%x, %x)", Usb->ParentPortNumber, Usb->InterfaceNumber);
+}
+
+VOID
+DevPathUsbClass (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ USB_CLASS_DEVICE_PATH *UsbClass;
+
+ UsbClass = DevPath;
+ CatPrint (
+ Str,
+ L"Usb Class(%x, %x, %x, %x, %x)",
+ UsbClass->VendorId,
+ UsbClass->ProductId,
+ UsbClass->DeviceClass,
+ UsbClass->DeviceSubClass,
+ UsbClass->DeviceProtocol
+ );
+}
+
+VOID
+DevPathI2O (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ I2O_DEVICE_PATH *I2O;
+
+ I2O = DevPath;
+ CatPrint (Str, L"I2O(%x)", I2O->Tid);
+}
+
+VOID
+DevPathMacAddr (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ MAC_ADDR_DEVICE_PATH *MAC;
+ UINTN HwAddressSize;
+ UINTN Index;
+
+ MAC = DevPath;
+
+ HwAddressSize = sizeof (EFI_MAC_ADDRESS);
+ if (MAC->IfType == 0x01 || MAC->IfType == 0x00)
+ {
+ HwAddressSize = 6;
+ }
+
+ CatPrint (Str, L"Mac(");
+
+ for (Index = 0; Index < HwAddressSize; Index++)
+ {
+ CatPrint (Str, L"%02x", MAC->MacAddress.Addr[Index]);
+ }
+
+ CatPrint (Str, L")");
+}
+
+VOID
+DevPathIPv4 (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ IPv4_DEVICE_PATH *IP;
+
+ IP = DevPath;
+ CatPrint (
+ Str,
+ L"IPv4(%d.%d.%d.%d:%d)",
+ IP->RemoteIpAddress.Addr[0],
+ IP->RemoteIpAddress.Addr[1],
+ IP->RemoteIpAddress.Addr[2],
+ IP->RemoteIpAddress.Addr[3],
+ IP->RemotePort
+ );
+}
+
+VOID
+DevPathIPv6 (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ IPv6_DEVICE_PATH *IP;
+
+ IP = DevPath;
+ CatPrint (Str, L"IP-v6(not-done)");
+}
+
+VOID
+DevPathInfiniBand (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ INFINIBAND_DEVICE_PATH *InfiniBand;
+
+ InfiniBand = DevPath;
+ CatPrint (Str, L"InfiniBand(not-done)");
+}
+
+VOID
+DevPathUart (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ UART_DEVICE_PATH *Uart;
+ CHAR8 Parity;
+
+ Uart = DevPath;
+ switch (Uart->Parity)
+ {
+ case 0:
+ Parity = 'D';
+ break;
+
+ case 1:
+ Parity = 'N';
+ break;
+
+ case 2:
+ Parity = 'E';
+ break;
+
+ case 3:
+ Parity = 'O';
+ break;
+
+ case 4:
+ Parity = 'M';
+ break;
+
+ case 5:
+ Parity = 'S';
+ break;
+
+ default:
+ Parity = 'x';
+ break;
+ }
+
+ if (Uart->BaudRate == 0)
+ {
+ CatPrint (Str, L"Uart(DEFAULT %c", Parity);
+ }
+ else
+ {
+ CatPrint (Str, L"Uart(%d %c", Uart->BaudRate, Parity);
+ }
+
+ if (Uart->DataBits == 0)
+ {
+ CatPrint (Str, L"D");
+ }
+ else
+ {
+ CatPrint (Str, L"%d", Uart->DataBits);
+ }
+
+ switch (Uart->StopBits)
+ {
+ case 0:
+ CatPrint (Str, L"D)");
+ break;
+
+ case 1:
+ CatPrint (Str, L"1)");
+ break;
+
+ case 2:
+ CatPrint (Str, L"1.5)");
+ break;
+
+ case 3:
+ CatPrint (Str, L"2)");
+ break;
+
+ default:
+ CatPrint (Str, L"x)");
+ break;
+ }
+}
+
+VOID
+DevPathHardDrive (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ HARDDRIVE_DEVICE_PATH *Hd;
+
+ Hd = DevPath;
+ switch (Hd->SignatureType)
+ {
+ case SIGNATURE_TYPE_MBR:
+ CatPrint (
+ Str,
+ L"HD(Part%d,Sig%08x)",
+ Hd->PartitionNumber,
+ *((UINT32 *) (&(Hd->Signature[0])))
+ );
+ break;
+
+ case SIGNATURE_TYPE_GUID:
+ CatPrint (
+ Str,
+ L"HD(Part%d,Sig%g)",
+ Hd->PartitionNumber,
+ (EFI_GUID *) &(Hd->Signature[0])
+ );
+ break;
+
+ default:
+ CatPrint (
+ Str,
+ L"HD(Part%d,MBRType=%02x,SigType=%02x)",
+ Hd->PartitionNumber,
+ Hd->MBRType,
+ Hd->SignatureType
+ );
+ break;
+ }
+}
+
+VOID
+DevPathCDROM (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ CDROM_DEVICE_PATH *Cd;
+
+ Cd = DevPath;
+ CatPrint (Str, L"CDROM(Entry%x)", Cd->BootEntry);
+}
+
+VOID
+DevPathFilePath (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ FILEPATH_DEVICE_PATH *Fp;
+
+ Fp = DevPath;
+ CatPrint (Str, L"%s", Fp->PathName);
+}
+
+VOID
+DevPathMediaProtocol (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ MEDIA_PROTOCOL_DEVICE_PATH *MediaProt;
+
+ MediaProt = DevPath;
+ CatPrint (Str, L"%g", &MediaProt->Protocol);
+}
+
+VOID
+DevPathFvFilePath (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvFilePath;
+
+ FvFilePath = DevPath;
+ CatPrint (Str, L"%g", &FvFilePath->NameGuid);
+}
+
+VOID
+DevPathBssBss (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ BBS_BBS_DEVICE_PATH *Bbs;
+ CHAR16 *Type;
+
+ Bbs = DevPath;
+ switch (Bbs->DeviceType)
+ {
+ case BBS_TYPE_FLOPPY:
+ Type = L"Floppy";
+ break;
+
+ case BBS_TYPE_HARDDRIVE:
+ Type = L"Harddrive";
+ break;
+
+ case BBS_TYPE_CDROM:
+ Type = L"CDROM";
+ break;
+
+ case BBS_TYPE_PCMCIA:
+ Type = L"PCMCIA";
+ break;
+
+ case BBS_TYPE_USB:
+ Type = L"Usb";
+ break;
+
+ case BBS_TYPE_EMBEDDED_NETWORK:
+ Type = L"Net";
+ break;
+
+ default:
+ Type = L"?";
+ break;
+ }
+ //
+ // Since current Print function hasn't implemented %a (for ansi string)
+ // we will only print Unicode strings.
+ //
+ CatPrint (Str, L"Legacy-%s", Type);
+}
+
+VOID
+DevPathEndInstance (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ CatPrint (Str, L",");
+}
+
+VOID
+DevPathNodeUnknown (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ CatPrint (Str, L"?");
+}
+
+DEVICE_PATH_STRING_TABLE DevPathTable[] = {
+ HARDWARE_DEVICE_PATH,
+ HW_PCI_DP,
+ DevPathPci,
+ HARDWARE_DEVICE_PATH,
+ HW_PCCARD_DP,
+ DevPathPccard,
+ HARDWARE_DEVICE_PATH,
+ HW_MEMMAP_DP,
+ DevPathMemMap,
+ HARDWARE_DEVICE_PATH,
+ HW_VENDOR_DP,
+ DevPathVendor,
+ HARDWARE_DEVICE_PATH,
+ HW_CONTROLLER_DP,
+ DevPathController,
+ ACPI_DEVICE_PATH,
+ ACPI_DP,
+ DevPathAcpi,
+ MESSAGING_DEVICE_PATH,
+ MSG_ATAPI_DP,
+ DevPathAtapi,
+ MESSAGING_DEVICE_PATH,
+ MSG_SCSI_DP,
+ DevPathScsi,
+ MESSAGING_DEVICE_PATH,
+ MSG_FIBRECHANNEL_DP,
+ DevPathFibre,
+ MESSAGING_DEVICE_PATH,
+ MSG_1394_DP,
+ DevPath1394,
+ MESSAGING_DEVICE_PATH,
+ MSG_USB_DP,
+ DevPathUsb,
+ MESSAGING_DEVICE_PATH,
+ MSG_USB_CLASS_DP,
+ DevPathUsbClass,
+ MESSAGING_DEVICE_PATH,
+ MSG_I2O_DP,
+ DevPathI2O,
+ MESSAGING_DEVICE_PATH,
+ MSG_MAC_ADDR_DP,
+ DevPathMacAddr,
+ MESSAGING_DEVICE_PATH,
+ MSG_IPv4_DP,
+ DevPathIPv4,
+ MESSAGING_DEVICE_PATH,
+ MSG_IPv6_DP,
+ DevPathIPv6,
+ MESSAGING_DEVICE_PATH,
+ MSG_INFINIBAND_DP,
+ DevPathInfiniBand,
+ MESSAGING_DEVICE_PATH,
+ MSG_UART_DP,
+ DevPathUart,
+ MESSAGING_DEVICE_PATH,
+ MSG_VENDOR_DP,
+ DevPathVendor,
+ MEDIA_DEVICE_PATH,
+ MEDIA_HARDDRIVE_DP,
+ DevPathHardDrive,
+ MEDIA_DEVICE_PATH,
+ MEDIA_CDROM_DP,
+ DevPathCDROM,
+ MEDIA_DEVICE_PATH,
+ MEDIA_VENDOR_DP,
+ DevPathVendor,
+ MEDIA_DEVICE_PATH,
+ MEDIA_FILEPATH_DP,
+ DevPathFilePath,
+ MEDIA_DEVICE_PATH,
+ MEDIA_PROTOCOL_DP,
+ DevPathMediaProtocol,
+ MEDIA_DEVICE_PATH,
+ MEDIA_FV_FILEPATH_DP,
+ DevPathFvFilePath,
+ BBS_DEVICE_PATH,
+ BBS_BBS_DP,
+ DevPathBssBss,
+ END_DEVICE_PATH_TYPE,
+ END_INSTANCE_DEVICE_PATH_SUBTYPE,
+ DevPathEndInstance,
+ 0,
+ 0,
+ NULL
+ };
+
+CHAR16 *
+DevicePathToStr (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevPath
+)
+/*++
+
+ Turns the Device Path into a printable string. Allcoates
+ the string from pool. The caller must SafeFreePool the returned
+ string.
+
+--*/
+{
+ POOL_PRINT Str;
+ EFI_DEVICE_PATH_PROTOCOL *DevPathNode;
+ VOID (*DumpNode) (POOL_PRINT *, VOID *);
+
+ UINTN Index;
+ UINTN NewSize;
+
+ EfiZeroMem (&Str, sizeof (Str));
+
+ if (DevPath == NULL)
+ {
+ goto Done;
+ }
+ //
+ // Unpacked the device path
+ //
+ DevPath = BdsLibUnpackDevicePath (DevPath);
+ ASSERT (DevPath);
+
+ //
+ // Process each device path node
+ //
+ DevPathNode = DevPath;
+ while (!IsDevicePathEnd (DevPathNode))
+ {
+ //
+ // Find the handler to dump this device path node
+ //
+ DumpNode = NULL;
+ for (Index = 0; DevPathTable[Index].Function; Index += 1)
+ {
+
+ if (DevicePathType (DevPathNode) == DevPathTable[Index].Type &&
+ DevicePathSubType (DevPathNode) == DevPathTable[Index].SubType
+ )
+ {
+ DumpNode = DevPathTable[Index].Function;
+ break;
+ }
+ }
+ //
+ // If not found, use a generic function
+ //
+ if (!DumpNode)
+ {
+ DumpNode = DevPathNodeUnknown;
+ }
+ //
+ // Put a path seperator in if needed
+ //
+ if (Str.len && DumpNode != DevPathEndInstance)
+ {
+ CatPrint (&Str, L"/");
+ }
+ //
+ // Print this node of the device path
+ //
+ DumpNode (&Str, DevPathNode);
+
+ //
+ // Next device path node
+ //
+ DevPathNode = NextDevicePathNode (DevPathNode);
+ }
+ //
+ // Shrink pool used for string allocation
+ //
+ gBS->FreePool (DevPath);
+
+Done:
+ NewSize = (Str.len + 1) * sizeof (CHAR16);
+ Str.str = ReallocatePool (Str.str, NewSize, NewSize);
+ ASSERT (Str.str != NULL);
+ Str.str[Str.len] = 0;
+ return Str.str;
+}
+
+EFI_DEVICE_PATH_PROTOCOL *
+LibDuplicateDevicePathInstance (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevPath
+)
+/*++
+
+Routine Description:
+
+ Function creates a device path data structure that identically matches the
+ device path passed in.
+
+Arguments:
+
+ DevPath - A pointer to a device path data structure.
+
+Returns:
+
+ The new copy of DevPath is created to identically match the input.
+ Otherwise, NULL is returned.
+
+--*/
+{
+ EFI_DEVICE_PATH_PROTOCOL *NewDevPath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathInst;
+ EFI_DEVICE_PATH_PROTOCOL *Temp;
+ UINTN Size;
+
+ //
+ // get the size of an instance from the input
+ //
+ Temp = DevPath;
+ DevicePathInst = EfiDevicePathInstance (&Temp, &Size);
+
+ //
+ // Make a copy
+ //
+ NewDevPath = NULL;
+ if (Size)
+ {
+ NewDevPath = EfiLibAllocateZeroPool (Size);
+ ASSERT (NewDevPath != NULL);
+ }
+
+ if (NewDevPath)
+ {
+ EfiCopyMem (NewDevPath, DevicePathInst, Size);
+ }
+
+ return NewDevPath;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/DevicePath.h b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/DevicePath.h
new file mode 100644
index 0000000..1f73827
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPetAlert/DevicePath.h
@@ -0,0 +1,93 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPetAlert/DevicePath.h 1 2/08/12 1:10a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:10a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPetAlert/DevicePath.h $
+//
+// 1 2/08/12 1:10a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:45a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+//
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: DevicePath.c
+//
+// Description: DevicePath functions for AMT Pet Alert.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include "Tiano.h"
+#include "EfiPrintLib.h"
+#include "EfiDriverLib.h"
+
+//
+// Internal definitions
+//
+typedef struct {
+ CHAR16 *str;
+ UINTN len;
+ UINTN maxlen;
+} POOL_PRINT;
+
+typedef struct {
+ UINT8 Type;
+ UINT8 SubType;
+ VOID (*Function) (POOL_PRINT *, VOID *);
+} DEVICE_PATH_STRING_TABLE;
+
+//
+// Define Maxmim characters that will be accepted
+//
+#define MAX_CHAR 480
+#define MAX_CHAR_SIZE (MAX_CHAR * 2)
+
+#define MIN_ALIGNMENT_SIZE 4
+#define ALIGN_SIZE(a) ((a % MIN_ALIGNMENT_SIZE) ? MIN_ALIGNMENT_SIZE - (a % MIN_ALIGNMENT_SIZE) : 0)
+
+CHAR16 *
+DevicePathToStr (
+ EFI_DEVICE_PATH_PROTOCOL *DevPath
+);
+
+EFI_DEVICE_PATH_PROTOCOL *
+BdsLibUnpackDevicePath (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevPath
+);
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.c b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.c
new file mode 100644
index 0000000..bdc8193
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.c
@@ -0,0 +1,558 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.c 11 9/21/15 10:12p Tristinchou $
+//
+// $Revision: 11 $
+//
+// $Date: 9/21/15 10:12p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.c $
+//
+// 11 9/21/15 10:12p Tristinchou
+// [TAG] EIP238392
+// [Category] Improvement
+// [Description] Disable USB provision while Intel AMT is disabled in
+// setup
+//
+// 10 5/14/14 9:45p Tristinchou
+// [TAG] EIP160730
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 9 12/16/13 9:55p Tristinchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Free memory while error occur in InstallDiskInfo()
+//
+// 8 8/27/13 4:21a Tristinchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Fix system hangs while boot with ME 1.5MB firmware.
+// [Files] AmtPlatformPolicy.c
+//
+// 7 8/22/13 8:51a Tristinchou
+// [TAG] EIP131034
+// [Category] Improvement
+// [Description] The system will hang after create/ reset/delete raid
+// mode
+// [Files] AmtPlatformPolicy.c
+//
+// 6 11/07/12 8:47a Klzhan
+// Clear Cira request item after loaded.
+//
+// 5 9/19/12 6:56a Klzhan
+// Fix Windows capsule update fail.
+//
+// 4 7/02/12 11:39p Klzhan
+// [TAG] EIP94113
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC0.6
+//
+// 3 5/14/12 4:50a Klzhan
+// [TAG] EIP89952
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC 0.56
+// [Files] AmtPlatformPolicy.c
+// AmtPlatformPolicy.h
+// AmtPlatformPolicy.sdl
+// AmtPlatformPolicy.mak
+// AmtPlatformPolicy.dxs
+// AmtPlatformPolicy.cif
+//
+// 2 4/24/12 12:41a Klzhan
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 8 9/29/11 11:47p Klzhan
+// Fill Amt Wrapper protocol with setup data.
+//
+// 7 9/26/11 6:19a Klzhan
+// [TAG] EIP70516
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME 8.0 RC 0.8
+// [Files] AmtPlatformPolicy.c
+// AmtPlatformPolicy.h
+// AmtPlatformPolicy.sdl
+// AmtPlatformPolicy.mak
+// AmtPlatformPolicy.dxs
+// AmtPlatformPolicy.cif
+//
+// 6 7/08/11 4:23a Klzhan
+// [TAG] EIP64189
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC to 0.7
+//
+// 5 5/24/11 5:01a Klzhan
+// Add support ME RC 0.60
+//
+// 4 4/18/11 9:45a Klzhan
+// [TAG] EIP58005
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Move ME FW downgrade related code to ME platform
+// policy.
+//
+// 3 4/18/11 9:17a Klzhan
+// Improvement : Update DXE_PLATFORM_AMT_POLICY_PROTOCOL_REVISION from 7
+// to A.
+//
+// 2 3/29/11 3:48a Klzhan
+// A token to keep ME always in Disable Mode.
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+//
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AmtPlatformPolicy.c
+//
+// Description:
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include "AmtPlatformPolicy.h"
+#include "token.h"
+#include <SetupDataDefinition.h>
+DXE_AMT_POLICY_PROTOCOL mDxePlatformAmtPolicy = { 0 };
+INSTALL_DISK_INFO_PROTOCOL mInstallDiskInfo = { InstallDiskInfo };
+UINT64 mPciDeviceFilterOutTable[] = { EFI_MAX_ADDRESS, };
+#define SETUP_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+
+#define AMT_READY_TO_BOOT_PROTOCOL_GUID \
+ { \
+ 0x40b09b5a, 0xf0ef, 0x4627, 0x93, 0xd5, 0x27, 0xf0, 0x4b, 0x75, 0x4d, 0x5 \
+ }
+
+#define END_DEVICE_PATH 0x7F
+#define END_DEVICE_PATH1 0xFF
+#define NODE_LENGTH(pPath) (*(UINT16*)&(pPath)->Length[0])
+#define NEXT_NODE(pPath) ((EFI_DEVICE_PATH_PROTOCOL*)((UINT8*)(pPath)+NODE_LENGTH(pPath)))
+#define isEndNode(pDp) ((pDp)->Type==END_DEVICE_PATH||(pDp)->Type==END_DEVICE_PATH1)
+EFI_GUID gAmtReadyToBootProtocolGuid = AMT_READY_TO_BOOT_PROTOCOL_GUID;
+EFI_GUID gEfiDiskInfoProtocolGuid = EFI_DISK_INFO_PROTOCOL_GUID;
+EFI_GUID gDevicePathProtocolGuid = EFI_DEVICE_PATH_PROTOCOL_GUID;
+UINT8 GetDevicePathSubtype(EFI_DEVICE_PATH_PROTOCOL *Dp, UINT8 Type);
+
+//
+// Driver entry point
+//
+EFI_DRIVER_ENTRY_POINT (AmtPlatformPolicyEntryPoint)
+EFI_STATUS
+EFIAPI
+InstallDiskInfo (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINTN BlockIoHandleCount = 0;
+ UINTN DiskInfoHandleCount = 0;
+ EFI_HANDLE *BlockIoHandleBuffer = NULL;
+ EFI_HANDLE *DiskInfoHandleBuffer = NULL;
+ UINTN UsedBlockIoHandle = 0;
+ UINTN UsedDiskInfoHandle = 0;
+ EFI_DISK_INFO_PROTOCOL *DiskInfoProtocol;
+ EFI_DISK_INFO_PROTOCOL *DiskInfoProtocolBuffer;
+ EFI_BLOCK_IO_PROTOCOL *BlockIoProtocol;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathProtocol;
+ UINT8 DevicePathSubtype = 0;
+ IDENTIFY_DATA *IdentifyData = NULL;
+ UINT32 BufferSize = sizeof (IDENTIFY_DATA);
+ UINT8 ThisDiskInfoHandleIsHdd = 0; // 1 is HDD, 0 is ODD
+ UINT8 ThisBlockIoHandleIsHdd = 0; // 1 is HDD, 0 is ODD
+
+ //Locate all handle which have BlockIo
+ Status = gBS->LocateHandleBuffer(
+ ByProtocol,
+ &gEfiBlockIoProtocolGuid,
+ NULL,
+ &BlockIoHandleCount,
+ &BlockIoHandleBuffer );
+ if(EFI_ERROR(Status))
+ goto ErrorExit;
+
+ //Locate all handle which have DiskInfo
+ Status = gBS->LocateHandleBuffer(
+ ByProtocol,
+ &gEfiDiskInfoProtocolGuid,
+ NULL,
+ &DiskInfoHandleCount,
+ &DiskInfoHandleBuffer );
+ if(EFI_ERROR(Status))
+ goto ErrorExit;
+
+ if( DiskInfoHandleCount != 0 )
+ {
+ for( UsedBlockIoHandle = 0 ; UsedBlockIoHandle < BlockIoHandleCount ; UsedBlockIoHandle++ )
+ {
+ ThisBlockIoHandleIsHdd = 0;
+ //Block to install DiskInfoProtocol to USB
+ Status = gBS->HandleProtocol(
+ BlockIoHandleBuffer[UsedBlockIoHandle],
+ &gDevicePathProtocolGuid,
+ &DevicePathProtocol);
+ if( !EFI_ERROR(Status) )
+ {
+ DevicePathSubtype = GetDevicePathSubtype( DevicePathProtocol, MESSAGING_DEVICE_PATH );
+ }
+ if( DevicePathSubtype == MSG_USB_DP ||
+ DevicePathSubtype == MSG_USB_CLASS_DP )
+ {
+ continue;
+ }
+ //Block to install DiskInfoProtocol to Partition
+ Status = gBS->HandleProtocol(
+ BlockIoHandleBuffer[UsedBlockIoHandle],
+ &gEfiBlockIoProtocolGuid,
+ &BlockIoProtocol);
+ if(EFI_ERROR(Status))
+ goto ErrorExit;
+
+ if( BlockIoProtocol->Media->LogicalPartition )
+ {
+ continue;
+ }
+
+ //Handle is HDD or ODD
+ if( BlockIoProtocol->Media->RemovableMedia == 0 )
+ {
+ ThisBlockIoHandleIsHdd = 1;
+ }
+
+ for( UsedDiskInfoHandle = 0 ; UsedDiskInfoHandle < DiskInfoHandleCount ; UsedDiskInfoHandle++ )
+ {
+ ThisDiskInfoHandleIsHdd = 0;
+ if( DiskInfoHandleBuffer[UsedDiskInfoHandle] == NULL )
+ {
+ continue;
+ }
+
+ //Handle is HDD or ODD
+ Status = gBS->HandleProtocol(
+ DiskInfoHandleBuffer[UsedDiskInfoHandle],
+ &gEfiDiskInfoProtocolGuid,
+ &DiskInfoProtocol);
+ if(EFI_ERROR(Status))
+ goto ErrorExit;
+
+ IdentifyData = AllocatePool(BufferSize);
+ if( IdentifyData == NULL )
+ goto ErrorExit;
+
+ Status = DiskInfoProtocol->Identify( DiskInfoProtocol, IdentifyData, &BufferSize );
+ if(EFI_ERROR(Status))
+ goto ErrorExit;
+
+ if( IdentifyData->LBA_48 !=0 )
+ {
+ ThisDiskInfoHandleIsHdd = 1;
+ }
+
+ //If handles the same type( HDD or ODD)
+ if( ThisDiskInfoHandleIsHdd == ThisBlockIoHandleIsHdd )
+ {
+ Status = gBS->HandleProtocol(
+ BlockIoHandleBuffer[UsedBlockIoHandle],
+ &gEfiDiskInfoProtocolGuid,
+ &DiskInfoProtocolBuffer );
+ //If this BlockIoHandle isn't installed DiskInfoProtocol
+ if(EFI_ERROR(Status))
+ {
+ Status = gBS->InstallMultipleProtocolInterfaces(
+ &BlockIoHandleBuffer[UsedBlockIoHandle],
+ &gEfiDiskInfoProtocolGuid,
+ DiskInfoProtocol,
+ NULL );
+ if( !EFI_ERROR(Status) )
+ {
+ FreePool(IdentifyData);
+ //Release used handle pointer
+ DiskInfoHandleBuffer[UsedDiskInfoHandle] = NULL;
+ break;
+ }
+ }
+ }
+ FreePool(IdentifyData);
+ }
+ }
+ }
+ FreePool(BlockIoHandleBuffer);
+ FreePool(DiskInfoHandleBuffer);
+
+ return EFI_SUCCESS;
+
+ErrorExit:
+ if( BlockIoHandleBuffer != NULL )
+ FreePool(BlockIoHandleBuffer);
+ if( DiskInfoHandleBuffer != NULL )
+ FreePool(DiskInfoHandleBuffer);
+ if( IdentifyData != NULL )
+ FreePool(IdentifyData);
+
+ return EFI_NOT_FOUND;
+}
+
+UINT8 GetDevicePathSubtype(EFI_DEVICE_PATH_PROTOCOL *Dp, UINT8 Type)
+{
+ UINT8 SubType;
+
+ if (Dp == NULL) return 0;
+ SubType = 0;
+
+ for( ; !(isEndNode(Dp)); Dp=NEXT_NODE(Dp))
+ if (Dp->Type == Type) SubType = Dp->SubType;
+ return SubType;
+}
+
+//
+// Function implementations
+//
+EFI_STATUS
+EFIAPI
+AmtPlatformPolicyEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+/*++
+
+Routine Description:
+
+ Initilize Intel AMT DXE Platform Policy
+
+Arguments:
+
+ ImageHandle Image handle of this driver.
+ SystemTable Global system service table.
+
+Returns:
+
+ EFI_SUCCESS Initialization complete.
+ EFI_UNSUPPORTED The chipset is unsupported by this driver.
+ EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver.
+ EFI_DEVICE_ERROR Device error, driver exits abnormally.
+
+--*/
+{
+ EFI_STATUS Status;
+ UINT32 SetupVarAttr;
+ UINTN VariableSize;
+ UINT32 MebxVarAttr;
+ ME_BIOS_EXTENSION_SETUP MeBiosExtensionSetupData;
+ SETUP_DATA SetupData;
+ EFI_GUID gSetupGuid = SETUP_GUID;
+ DXE_MBP_DATA_PROTOCOL *mBIOSPayLoad;
+ EFI_HANDLE Handle;
+
+ EfiInitializeDriverLib (ImageHandle, SystemTable);
+
+ Handle = NULL;
+
+ Status = gBS->LocateProtocol (
+ &gMeBiosPayloadDataProtocolGuid,
+ NULL,
+ &mBIOSPayLoad
+ );
+ if( EFI_ERROR(Status) ) {
+ // Install Dummy MeBios Payload Data Protocol for avoiding relating driver
+ // not run. (For EIP#96807 - EFI Capsule Update)
+ SetupVarAttr = 0;
+ VariableSize = sizeof(SETUP_DATA);
+ Status = gRT->GetVariable( L"Setup", &gSetupGuid, \
+ &SetupVarAttr, &VariableSize, &SetupData );
+ if( EFI_ERROR(Status) ) return Status;
+ {
+ DXE_MBP_DATA_PROTOCOL mMbpData;
+ ZeroMem (&mMbpData, sizeof (DXE_MBP_DATA_PROTOCOL));
+ mMbpData.Revision = DXE_MBP_DATA_PROTOCOL_REVISION_2;
+ mMbpData.MeBiosPayload.FwPlatType.RuleData.Fields.IntelMeFwImageType = SetupData.MeImageType;
+ mMbpData.Handle = NULL;
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &mMbpData.Handle,
+ &gMeBiosPayloadDataProtocolGuid,
+ &mMbpData,
+ NULL
+ );
+ if (!EFI_ERROR(Status)) mBIOSPayLoad = &mMbpData;
+ }
+ }
+ if (mBIOSPayLoad->MeBiosPayload.FwPlatType.RuleData.Fields.IntelMeFwImageType != INTEL_ME_5MB_FW) {
+ return EFI_UNSUPPORTED;
+ }
+
+ Status = gBS->InstallProtocolInterface (
+ &Handle,
+ &gAmtReadyToBootProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &mInstallDiskInfo
+ );
+
+ SetupVarAttr = 0;
+ VariableSize = sizeof(SETUP_DATA);
+ //
+ // Get iAMT configuration from Setup Data
+ //
+ Status = gRT->GetVariable(
+ L"Setup",
+ &gSetupGuid,
+ &SetupVarAttr,
+ &VariableSize,
+ &SetupData );
+
+ //
+ // AMT DXE Policy Init
+ //
+ mDxePlatformAmtPolicy.Revision = DXE_PLATFORM_AMT_POLICY_PROTOCOL_REVISION_1;
+///////////////////////////////////////////////////////////////////////////
+ if (EFI_ERROR(Status)) // Default Setting for AMT
+ {
+ //
+ // Initialzie the Me Configuration
+ //
+ mDxePlatformAmtPolicy.AmtConfig.AsfEnabled = 1;
+ mDxePlatformAmtPolicy.AmtConfig.iAmtEnabled = 1;
+ mDxePlatformAmtPolicy.AmtConfig.WatchDog = 0;
+ mDxePlatformAmtPolicy.AmtConfig.WatchDogTimerOs = 0;
+ mDxePlatformAmtPolicy.AmtConfig.WatchDogTimerBios = 0;
+ mDxePlatformAmtPolicy.AmtConfig.CiraRequest = 0;
+ mDxePlatformAmtPolicy.AmtConfig.CiraTimeout = 0;
+ mDxePlatformAmtPolicy.AmtConfig.UnConfigureMe = 0;
+ mDxePlatformAmtPolicy.AmtConfig.HideUnConfigureMeConfirm = 0;
+ mDxePlatformAmtPolicy.AmtConfig.MebxDebugMsg = 0;
+ mDxePlatformAmtPolicy.AmtConfig.USBProvision = 0;
+ mDxePlatformAmtPolicy.AmtConfig.FWProgress = 1;
+ mDxePlatformAmtPolicy.AmtConfig.iAmtbxSelectionScreen = 0;
+ mDxePlatformAmtPolicy.AmtConfig.iAmtbxHotkeyPressed = 0;
+ mDxePlatformAmtPolicy.AmtConfig.AtEnabled = 1;
+ mDxePlatformAmtPolicy.AmtConfig.ManageabilityMode = 1;
+ //
+ // Oem Resolution Settings
+ //
+ mDxePlatformAmtPolicy.AmtConfig.MebxNonUiTextMode = 0; // MEBX_TEXT_AUTO
+ mDxePlatformAmtPolicy.AmtConfig.MebxUiTextMode = 0; // MEBX_TEXT_AUTO
+ mDxePlatformAmtPolicy.AmtConfig.MebxGraphicsMode = 0; // MEBX_GRAPHICS_AUTO
+
+ } else {
+ mDxePlatformAmtPolicy.AmtConfig.AsfEnabled = SetupData.Asf;
+ mDxePlatformAmtPolicy.AmtConfig.iAmtEnabled = SetupData.Amt;
+ mDxePlatformAmtPolicy.AmtConfig.WatchDog = SetupData.WatchDog;
+ mDxePlatformAmtPolicy.AmtConfig.WatchDogTimerOs = SetupData.WatchDogTimerOs;
+ mDxePlatformAmtPolicy.AmtConfig.WatchDogTimerBios = SetupData.WatchDogTimerBios;
+ mDxePlatformAmtPolicy.AmtConfig.CiraRequest = SetupData.AmtCiraRequest;
+ mDxePlatformAmtPolicy.AmtConfig.CiraTimeout = SetupData.AmtCiraTimeout;
+ mDxePlatformAmtPolicy.AmtConfig.UnConfigureMe = SetupData.UnConfigureMe;
+ mDxePlatformAmtPolicy.AmtConfig.HideUnConfigureMeConfirm = SetupData.HideUnConfigureMeConfirm;
+ mDxePlatformAmtPolicy.AmtConfig.MebxDebugMsg = SetupData.MebxDebugMsg;
+ mDxePlatformAmtPolicy.AmtConfig.USBProvision = SetupData.USBProvision;
+ mDxePlatformAmtPolicy.AmtConfig.FWProgress = SetupData.FWProgress;
+ mDxePlatformAmtPolicy.AmtConfig.iAmtbxSelectionScreen = SetupData.AmtbxSelectionScreen;
+ mDxePlatformAmtPolicy.AmtConfig.iAmtbxHotkeyPressed = SetupData.AmtbxHotKeyPressed;
+ mDxePlatformAmtPolicy.AmtConfig.AtEnabled = 1;
+ mDxePlatformAmtPolicy.AmtConfig.ManageabilityMode = 1;
+ //
+ // Oem Resolution Settings
+ //
+ mDxePlatformAmtPolicy.AmtConfig.MebxNonUiTextMode = 0; // MEBX_TEXT_AUTO
+ mDxePlatformAmtPolicy.AmtConfig.MebxUiTextMode = 0; // MEBX_TEXT_AUTO
+ mDxePlatformAmtPolicy.AmtConfig.MebxGraphicsMode = 0; // MEBX_GRAPHICS_AUTO
+
+ if(SetupData.AmtbxHotKeyPressed == 1)
+ SetupData.AmtbxHotKeyPressed = 0;
+
+ if(SetupData.AmtCiraRequest == 1)
+ SetupData.AmtCiraRequest = 0;
+
+ if(SetupData.UnConfigureMe == 1)
+ SetupData.UnConfigureMe = 0;
+
+ if(SetupData.Amt == 0)
+ mDxePlatformAmtPolicy.AmtConfig.USBProvision = USB_PROVISION_DEFAULT_WITHOUT_AMT;
+ }
+
+///////////////////////////////////////////////////////////////////////////
+ mDxePlatformAmtPolicy.AmtConfig.PciDeviceFilterOutTable = (UINT32) (UINTN) mPciDeviceFilterOutTable;
+ //
+ // Please don't change the default value of ForcMebxSyncUp and
+ // This let customer to force MEBX execution if they need and
+ //
+ mDxePlatformAmtPolicy.AmtConfig.ForcMebxSyncUp = 0;
+
+ //
+ // Get BIOS Sync-up data from MEBx to AMT platform policy
+ //
+ MebxVarAttr = 0;
+ VariableSize = sizeof (MeBiosExtensionSetupData);
+ Status = gRT->GetVariable (
+ gEfiMeBiosExtensionSetupName,
+ &gEfiMeBiosExtensionSetupGuid,
+ &MebxVarAttr,
+ &VariableSize,
+ &MeBiosExtensionSetupData
+ );
+ if (EFI_ERROR (Status)) {
+ mDxePlatformAmtPolicy.AmtConfig.ManageabilityMode = 0;
+ } else {
+ mDxePlatformAmtPolicy.AmtConfig.ManageabilityMode = MeBiosExtensionSetupData.PlatformMngSel;
+ }
+ //
+ // Install protocol to to allow access to this Policy.
+ //
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &ImageHandle,
+ &gDxePlatformAmtPolicyGuid,
+ &mDxePlatformAmtPolicy,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Get iAMT configuration from Setup Data
+ //
+ VariableSize = sizeof(SETUP_DATA);
+ Status = gRT->SetVariable (
+ L"Setup",
+ &gSetupGuid,
+ SetupVarAttr,
+ VariableSize,
+ &SetupData );
+
+ return Status;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.cif b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.cif
new file mode 100644
index 0000000..7cffe71
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.cif
@@ -0,0 +1,14 @@
+<component>
+ name = "AmtPlatformPolicy"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\AmtWrapper\AmtPlatformPolicy"
+ RefName = "AmtPlatformPolicy"
+[files]
+"AmtPlatformPolicy.c"
+"AmtPlatformPolicy.h"
+"AmtPlatformPolicy.sdl"
+"AmtPlatformPolicy.mak"
+"AmtPlatformPolicy.dxs"
+[parts]
+"AmtPeiPolicyInit"
+<endComponent>
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.dxs b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.dxs
new file mode 100644
index 0000000..fe01967
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.dxs
@@ -0,0 +1,54 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.dxs 1 2/08/12 1:09a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:09a $
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AmtDPlatformPolicy.DXS
+//
+// Description: This file is the dependency file for the NB DXE
+// driver
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include "EfiDepex.h"
+#include EFI_PROTOCOL_DEFINITION (MePlatformPolicy)
+
+DEPENDENCY_START
+ DXE_PLATFORM_ME_POLICY_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.h b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.h
new file mode 100644
index 0000000..ea8f278
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.h
@@ -0,0 +1,209 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.h 4 8/22/13 8:52a Tristinchou $
+//
+// $Revision: 4 $
+//
+// $Date: 8/22/13 8:52a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.h $
+//
+// 4 8/22/13 8:52a Tristinchou
+// [TAG] EIP131034
+// [Category] Improvement
+// [Description] The system will hang after create/ reset/delete raid
+// mode
+// [Files] AmtPlatformPolicy.h
+//
+// 3 5/14/12 4:50a Klzhan
+// [TAG] EIP89952
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC 0.56
+// [Files] AmtPlatformPolicy.c
+// AmtPlatformPolicy.h
+// AmtPlatformPolicy.sdl
+// AmtPlatformPolicy.mak
+// AmtPlatformPolicy.dxs
+// AmtPlatformPolicy.cif
+//
+// 2 4/24/12 12:41a Klzhan
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 2 9/26/11 6:19a Klzhan
+// [TAG] EIP70516
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME 8.0 RC 0.8
+// [Files] AmtPlatformPolicy.c
+// AmtPlatformPolicy.h
+// AmtPlatformPolicy.sdl
+// AmtPlatformPolicy.mak
+// AmtPlatformPolicy.dxs
+// AmtPlatformPolicy.cif
+//
+// 1 2/25/11 1:45a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+#ifndef _DXE_AMT_PLATFORM_POLICY_H_
+#define _DXE_AMT_PLATFORM_POLICY_H_
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+#endif
+
+#include EFI_PROTOCOL_DEFINITION (MeBiosPayloadData)
+#include EFI_PROTOCOL_PRODUCER (AmtPlatformPolicy)
+#include EFI_GUID_DEFINITION (MeBiosExtensionSetup)
+#include "MeLib.h"
+#include "Include\Protocol\PDiskInfo.h"
+#include "Include\Protocol\PIDEController.h"
+// Debug #include "AmtPlatformPolicyUpdateDxeLib.h"
+
+typedef
+struct _INSTALL_DISK_INFO_PROTOCOL INSTALL_DISK_INFO_PROTOCOL;
+
+// Based on ATA/ATAPI-6
+#pragma pack (1)
+typedef struct _IDENTIFY_DATA{
+
+ UINT16 General_Config_0;
+ UINT16 Reserved_1;
+ UINT16 Special_Config_2;
+ UINT16 Reserved_3;
+ UINT16 Reserved_4;
+ UINT16 Reserved_5;
+ UINT16 Reserved_6;
+ UINT16 Reserved_7;
+ UINT16 Reserved_8;
+ UINT16 Reserved_9;
+ UINT8 Serial_Number_10[20];
+ UINT16 Reserved_20;
+ UINT16 Reserved_21;
+ UINT16 Reserved_22;
+ UINT8 Firmware_Revision_23[8];
+ UINT8 Model_Number_27[40];
+ UINT16 Maximum_Sector_Multiple_Command_47;
+ UINT16 Reserved_48;
+ UINT16 Capabilities_49;
+ UINT16 Capabilities_50;
+ UINT16 PIO_Mode_51;
+ UINT16 Reserved_52;
+ UINT16 Valid_Bits_53;
+ UINT16 Reserved_54_58[5];
+ UINT16 Valid_Bits_59;
+ UINT32 Addressable_Sector_60;
+ UINT16 SingleWord_DMA_62;
+ UINT16 MultiWord_DMA_63;
+ UINT16 PIO_Mode_64;
+ UINT16 Min_Multiword_DMA_timing_65;
+ UINT16 Manuf_Multiword_DMA_timing_66;
+ UINT16 Min_PIO_Mode_timing_67;
+ UINT16 Min_PIO_Mode_timing_68;
+ UINT16 Reserved_69_74[6];
+ UINT16 Queue_Depth_75;
+ UINT16 Reserved_76_79[4];
+ UINT16 Major_Revision_80;
+ UINT16 Minor_Revision_81;
+ UINT16 Command_Set_Supported_82;
+ UINT16 Command_Set_Supported_83;
+ UINT16 Command_Set_Supported_84;
+ UINT16 Command_Set_Enabled_85;
+ UINT16 Command_Set_Enabled_86;
+ UINT16 Command_Set_Enabled_87;
+ UINT16 UDMA_Mode_88;
+ UINT16 Time_security_Earse_89;
+ UINT16 Time_Esecurity_Earse_90;
+ UINT16 Current_Power_Level_91;
+ UINT16 Master_Password_Rev_92;
+ UINT16 Hard_Reset_Value_93;
+ UINT16 Acoustic_Level_94;
+ UINT16 Reserved_95_99[5];
+ UINT64 LBA_48;
+ UINT16 Reserved_104_126[23];
+ UINT16 Status_Notification_127;
+ UINT16 Security_Status_128;
+ UINT16 Reserved_129_159[31];
+ UINT16 CFA_Power_Mode_160;
+ UINT16 Reserved_161_175[15];
+ UINT16 Media_Serial_Number_176_205[30];
+ UINT16 Reserved_206_254[49];
+ UINT16 Checksum_255;
+} IDENTIFY_DATA;
+#pragma pack ()
+
+EFI_STATUS
+AmtDxePolicyInitEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN OUT EFI_SYSTEM_TABLE *SystemTable
+ )
+/*++
+
+Routine Description:
+
+ Initilize Intel AMT DXE Platform Policy
+
+Arguments:
+
+ ImageHandle - Image handle of this driver.
+ SystemTable - Global system service table.
+
+Returns:
+
+ EFI_SUCCESS Initialization complete.
+ EFI_UNSUPPORTED The chipset is unsupported by this driver.
+ EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver.
+ EFI_DEVICE_ERROR Device error, driver exits abnormally.
+
+--*/
+;
+EFI_STATUS
+EFIAPI
+InstallDiskInfo (
+ VOID
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *INSTALL_DISK_INFO) (
+ VOID
+ );
+
+typedef struct _INSTALL_DISK_INFO_PROTOCOL {
+ INSTALL_DISK_INFO Install;
+}INSTALL_DISK_INFO_PROTOCOL;
+
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.mak b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.mak
new file mode 100644
index 0000000..6cd33ff
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.mak
@@ -0,0 +1,116 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.mak 3 4/24/12 12:41a Klzhan $
+#
+# $Revision: 3 $
+#
+# $Date: 4/24/12 12:41a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.mak $
+#
+# 3 4/24/12 12:41a Klzhan
+#
+# 2 2/23/12 8:59a Klzhan
+# Support New EDK
+#
+# 1 2/08/12 1:08a Klzhan
+# Initial Check in
+#
+# 2 9/26/11 6:19a Klzhan
+# [TAG] EIP70516
+# [Category] Spec Update
+# [Severity] Important
+# [Description] Update ME 8.0 RC 0.8
+# [Files] AmtPlatformPolicy.c
+# AmtPlatformPolicy.h
+# AmtPlatformPolicy.sdl
+# AmtPlatformPolicy.mak
+# AmtPlatformPolicy.dxs
+# AmtPlatformPolicy.cif
+#
+# 1 2/25/11 1:45a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:11a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: AmtPlatformPolicy.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+All : AmtPlatformPolicy
+
+AmtPlatformPolicy : $(BUILD_DIR)\AmtPlatformPolicy.mak AmtPlatformPolicyBin
+
+$(BUILD_DIR)\AmtPlatformPolicy.mak : $(AmtPlatformPolicy_DIR)\$(@B).cif $(AmtPlatformPolicy_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(AmtPlatformPolicy_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+AmtPlatformPolicy_INCLUDES=\
+ $(EdkIIGlueLib_INCLUDES) \
+ $(ME_INCLUDES) \
+ $(MISCFRAMEWORK_INCLUDES) \
+ $(NB_INCLUDES)\
+ $(SB_INCLUDES)\
+ /I$(PROJECT_DIR)\
+ /IInclude\
+
+AmtPlatformPolicy_LIBS=\
+ $(EFIDRIVERLIB)\
+ $(MeProtocolLib_LIB)\
+ $(MeLibDxe_LIB)\
+ $(MeGuidLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EdkIIGlueBaseLib_LIB)\
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueUefiLib_LIB)\
+
+AmtPlatformPolicyBin : $(AmtPlatformPolicy_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\AmtPlatformPolicy.mak all\
+ GUID=1be65202-9318-492d-a551-08df2bd60aee\
+ "MY_INCLUDES = $(AmtPlatformPolicy_INCLUDES)" \
+ ENTRY_POINT=AmtPlatformPolicyEntryPoint\
+ DEPEX1=$(AmtPlatformPolicy_DIR)\AmtPlatformPolicy.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ TYPE=BS_DRIVER\
+ COMPRESS=1
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.sdl b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.sdl
new file mode 100644
index 0000000..bb2e57d
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/AmtPlatformPolicy.sdl
@@ -0,0 +1,42 @@
+TOKEN
+ Name = "AmtPlatformPolicy_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable AmtPlatformPolicy support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "AmtPlatformPolicy_DIR"
+End
+
+MODULE
+ Help = "Includes AmtPlatformPolicy.mak to Project"
+ File = "AmtPlatformPolicy.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AmtPlatformPolicy.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+TOKEN
+ Name = "USB_PROVISION_DEFAULT_WITHOUT_AMT"
+ Value = "0"
+ Help = "If set to 1, usb provision is functional when AMT disable"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SW_SMI_POST_COMPLETE"
+ Value = "0xBB"
+ Help = "Value to be written into SMI command register \to set POST Complete flag for indicating that the POST is complete"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0-0xff"
+End
+
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.c b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.c
new file mode 100644
index 0000000..0a3ecc2
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.c
@@ -0,0 +1,233 @@
+/*++
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+--*/
+
+/*++
+
+Copyright (c) 1999 - 2010 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ AmtPeiPolicyInit.c
+
+Abstract:
+
+ This file is SampleCode for Intel AMT PEI Platform Policy initialzation.
+
+--*/
+#include "AmtPeiPolicyInit.h"
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+#define __UEFI_HII__H__
+#define __HII_CONFIG_ACCESS__H__
+#include EFI_PROTOCOL_DEFINITION (HiiConfigAccess)
+#else
+#ifndef GUID_VARIABLE_DECLARATION
+#define GUID_VARIABLE_DECLARATION(Variable, Guid) extern EFI_GUID Variable
+#endif
+#define __UEFI_HII__H__
+#define __HII_PROTOCOL_H__
+#define _HII_H_
+#endif
+
+#include <Setup.h>
+
+#include EFI_PPI_DEFINITION (Variable)
+#include EFI_GUID_DEFINITION (MeBiosExtensionSetup)
+#include <ActiveManagement\AlertStandardFormat\Heci\Common\AlertStandardFormatCommon.h>
+#include <Guid\AmtForcePushPetPolicy\AmtForcePushPetPolicy.h>
+
+EFI_GUID gSetupGuid = SETUP_GUID;
+EFI_GUID gEfiMeBiosExtensionSetupGuid = EFI_ME_BIOS_EXTENSION_SETUP_GUID;
+CHAR16 gEfiMeBiosExtensionSetupName[] = EFI_ME_BIOS_EXTENSION_SETUP_VARIABLE_NAME;
+EFI_GUID gPeiReadOnlyVariablePpiGuid = PEI_READ_ONLY_VARIABLE_ACCESS_PPI_GUID;
+EFI_GUID gAmtForcePushPetPolicyGuid = AMT_FORCE_PUSH_PET_POLICY_GUID;
+
+EFI_STATUS
+CreateAmtForcePushPetPolicyHob(
+ IN EFI_PEI_SERVICES **PeiServices
+);
+
+//
+// Function implementations
+//
+EFI_STATUS
+AmtPeiPolicyInitEntryPoint (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+/*++
+
+Routine Description:
+
+ Initilize Intel AMT PEI Platform Policy
+
+Arguments:
+
+ FfsHeader Pointer to Firmware File System file header.
+ PeiServices General purpose services available to every PEIM.
+
+Returns:
+
+ EFI_STATUS
+
+--*/
+{
+ EFI_STATUS Status;
+ PEI_AMT_PLATFORM_POLICY_PPI *AmtPlatformPolicyPpi;
+ EFI_PEI_PPI_DESCRIPTOR *AmtPlatformPolicyPpiDesc;
+ EFI_PEI_READ_ONLY_VARIABLE_PPI *VariableServices;
+ UINTN VariableSize;
+ SETUP_DATA SetupData;
+ ME_BIOS_EXTENSION_SETUP MeBiosExtensionSetupData;
+ //
+ // Allocate descriptor and PPI structures
+ //
+ AmtPlatformPolicyPpi = (PEI_AMT_PLATFORM_POLICY_PPI *) AllocateZeroPool (sizeof (PEI_AMT_PLATFORM_POLICY_PPI));
+ ASSERT (AmtPlatformPolicyPpi != NULL);
+ if (AmtPlatformPolicyPpi == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ AmtPlatformPolicyPpiDesc = (EFI_PEI_PPI_DESCRIPTOR *) AllocateZeroPool (sizeof (EFI_PEI_PPI_DESCRIPTOR));
+ ASSERT (AmtPlatformPolicyPpiDesc != NULL);
+ if (AmtPlatformPolicyPpiDesc == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Initialize the PPI
+ //
+ AmtPlatformPolicyPpiDesc->Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
+ AmtPlatformPolicyPpiDesc->Guid = &gPeiAmtPlatformPolicyPpiGuid;
+
+ // Locate Variable Ppi
+ Status = (*PeiServices)->LocatePpi (PeiServices, &gPeiReadOnlyVariablePpiGuid, 0, NULL, &VariableServices);
+
+ //
+ // Make sure we have a PPI, if not, just return.
+ //
+ if (!VariableServices) {
+ return EFI_SUCCESS;
+ }
+ //
+ // Get Setup Variable
+ //
+
+ VariableSize = sizeof (SETUP_DATA);
+ Status = VariableServices->PeiGetVariable (
+ PeiServices,
+ L"Setup",
+ &gSetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData
+ );
+ //
+ // Update the REVISION number
+ //
+ AmtPlatformPolicyPpi->Revision = PEI_AMT_PLATFORM_POLICY_PPI_REVISION_5;
+
+ //
+ // Initialize the Platform Configuration
+ //
+ if (Status != EFI_SUCCESS) {
+ AmtPlatformPolicyPpi->iAmtEnabled = 0;
+ AmtPlatformPolicyPpi->WatchDog = 0;
+ AmtPlatformPolicyPpi->WatchDogTimerBios = 0;
+ AmtPlatformPolicyPpi->WatchDogTimerOs = 0;
+ AmtPlatformPolicyPpi->AsfEnabled = 1;
+ AmtPlatformPolicyPpi->FWProgress = 1;
+ } else {
+ AmtPlatformPolicyPpi->iAmtEnabled = SetupData.Amt;
+ AmtPlatformPolicyPpi->WatchDog = SetupData.WatchDog;
+ AmtPlatformPolicyPpi->WatchDogTimerBios = SetupData.WatchDogTimerBios;
+ AmtPlatformPolicyPpi->WatchDogTimerOs = SetupData.WatchDogTimerOs;
+ AmtPlatformPolicyPpi->AsfEnabled = SetupData.Asf;
+ AmtPlatformPolicyPpi->FWProgress = SetupData.FWProgress;
+ }
+
+ //
+ // Get BIOS Sync-up data from MEBx to AMT platform policy
+ //
+ VariableSize = sizeof (MeBiosExtensionSetupData);
+ Status = VariableServices->PeiGetVariable(
+ PeiServices,
+ gEfiMeBiosExtensionSetupName,
+ &gEfiMeBiosExtensionSetupGuid,
+ NULL,
+ &VariableSize,
+ &MeBiosExtensionSetupData
+ );
+ if (Status != EFI_SUCCESS) {
+ AmtPlatformPolicyPpi->ManageabilityMode = 0;
+ } else {
+ AmtPlatformPolicyPpi->ManageabilityMode = MeBiosExtensionSetupData.PlatformMngSel;
+ }
+
+// Debug UpdatePeiAmtPlatformPolicy (PeiServices, AmtPlatformPolicyPpi);
+
+ AmtPlatformPolicyPpiDesc->Ppi = AmtPlatformPolicyPpi;
+ //
+ // Install the ME PEI Platform Policy PPI
+ //
+ Status = (**PeiServices).InstallPpi (PeiServices, AmtPlatformPolicyPpiDesc);
+ ASSERT_PEI_ERROR (PeiServices, Status);
+
+ CreateAmtForcePushPetPolicyHob(PeiServices);
+
+ return Status;
+}
+EFI_FRAMEWORK_MESSAGE_TYPE mAmtForcePushPetPolicy[] = {
+ EfiAsfMessageChassisIntrusion,
+ EfiAsfMessageUserAuthenticationInvalid,
+ EfiAsfMessageHddAuthenticationInvalid,
+};
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: CreateAmtForcePushPetPolicyHob
+//
+// Description: Create AMT force push pet policy HOB.
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+CreateAmtForcePushPetPolicyHob(
+IN EFI_PEI_SERVICES **PeiServices
+)
+{
+ EFI_STATUS Status;
+ EFI_HOB_GUID_TYPE *Hob;
+
+ // Build the GUID'd HOB for DXE
+ Status = (*PeiServices)->CreateHob (
+ PeiServices,
+ EFI_HOB_TYPE_GUID_EXTENSION,
+ (UINT16) (sizeof (EFI_HOB_GUID_TYPE) + sizeof(mAmtForcePushPetPolicy)),
+ &Hob
+ );
+ if (EFI_ERROR (Status))return Status;
+
+ ((EFI_HOB_GUID_TYPE *)(Hob))->Name = gAmtForcePushPetPolicyGuid;
+
+ Hob++;
+
+ GlueCopyMem (Hob, mAmtForcePushPetPolicy, sizeof(mAmtForcePushPetPolicy));
+
+ return EFI_SUCCESS;
+}
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.cif b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.cif
new file mode 100644
index 0000000..c6c717e
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.cif
@@ -0,0 +1,13 @@
+<component>
+ name = "AmtPeiPolicyInit"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\AmtWrapper\AmtPlatformPolicy\Pei"
+ RefName = "AmtPeiPolicyInit"
+[files]
+"AmtPeiPolicyInit.c"
+"AmtPeiPolicyInit.h"
+"AmtPeiPolicyInit.sdl"
+"AmtPeiPolicyInit.mak"
+"AmtPeiPolicyInit.dxs"
+"AmtPeiPolicyInit.inf"
+<endComponent>
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.dxs b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.dxs
new file mode 100644
index 0000000..abfebdd
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.dxs
@@ -0,0 +1,35 @@
+/*++
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+--*/
+
+/*++
+
+Copyright (c) 1999 - 2010 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ MePeiPolicyInit.dxs
+
+Abstract:
+
+ Dependency expression source file.
+
+--*/
+
+#include "EfiDepex.h"
+
+DEPENDENCY_START
+ TRUE
+DEPENDENCY_END
+
+
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.h b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.h
new file mode 100644
index 0000000..a4426bf
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.h
@@ -0,0 +1,60 @@
+/*++
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+--*/
+
+/*++
+
+Copyright (c) 1999 - 2010 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ AmtPeiPolicyInit.h
+
+Abstract:
+
+ Header file for the AmtPeiPolicyInit PEIM.
+
+--*/
+#ifndef _AMT_PEI_PLATFORM_POLICY_H_
+#define _AMT_PEI_PLATFORM_POLICY_H_
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGluePeim.h"
+#endif
+
+#include EFI_PPI_DEFINITION (AmtPlatformPolicyPei)
+// Debug #include "AmtPlatformPolicyUpdatePeiLib.h"
+
+EFI_STATUS
+AmtPeiPolicyInitEntryPoint (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+/*++
+
+Routine Description:
+
+ Initilize Intel AMT PEI Platform Policy
+
+Arguments:
+
+ FfsHeader Pointer to Firmware File System file header.
+ PeiServices General purpose services available to every PEIM.
+
+Returns:
+
+ EFI_STATUS
+
+--*/
+;
+#endif
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.inf b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.inf
new file mode 100644
index 0000000..f039471
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.inf
@@ -0,0 +1,81 @@
+#
+#/*++
+# This file contains a 'Sample Driver' and is licensed as such
+# under the terms of your license agreement with Intel or your
+# vendor. This file may be modified by the user, subject to
+# the additional terms of the license agreement
+#--*/
+#
+#/*++
+#
+# Copyright (c) 1999 - 2010 Intel Corporation. All rights reserved
+# This software and associated documentation (if any) is furnished
+# under a license and may only be used or copied in accordance
+# with the terms of the license. Except as permitted by such
+# license, no part of this software or documentation may be
+# reproduced, stored in a retrieval system, or transmitted in any
+# form or by any means without the express written consent of
+# Intel Corporation.
+#
+# Module Name:
+#
+# AmtPeiPolicyInit.inf
+#
+# Abstract:
+#
+# Component description file for the AmtPeiPolicyInit PEIM.
+#
+#--*/
+
+
+[defines]
+BASE_NAME = AmtPeiPolicyInit
+FILE_GUID = A05ECE52-15A8-424e-BFD3-FCF3D566A09C
+COMPONENT_TYPE = PE32_PEIM
+
+[sources.common]
+ AmtPeiPolicyInit.c
+ AmtPeiPolicyInit.h
+#
+# Edk II Glue Driver Entry Point
+#
+ EdkIIGluePeimEntryPoint.c
+
+[includes.common]
+ $(EFI_SOURCE)\$(PROJECT_ME_ROOT)
+
+#
+# EDK II Glue Library utilizes some standard headers from EDK
+#
+ $(EDK_SOURCE)\Foundation
+ $(EDK_SOURCE)\Foundation\Core\Dxe
+ $(EDK_SOURCE)\Foundation\Efi
+ $(EDK_SOURCE)\Foundation\Efi\Include
+ $(EDK_SOURCE)\Foundation\Framework
+ $(EDK_SOURCE)\Foundation\Framework\Include
+ $(EDK_SOURCE)\Foundation\Include
+ $(EDK_SOURCE)\Foundation\Include\IndustryStandard
+ $(EDK_SOURCE)\Foundation\Include\Pei
+ $(EDK_SOURCE)\Foundation\Library\Dxe\Include
+ $(EDK_SOURCE)\Foundation\Library\EdkIIGlueLib\Include
+
+[libraries.common]
+ MeLibPpi
+ PeiLib
+ EdkIIGlueBaseLib
+ EdkIIGlueBaseMemoryLib
+ EdkIIGluePeiDebugLibReportStatusCode
+ EdkIIGluePeiReportStatusCodeLib
+ EdkIIGluePeiServicesLib
+ EdkIIGluePeiMemoryAllocationLib
+
+[nmake.common]
+ IMAGE_ENTRY_POINT= _ModuleEntryPoint
+ DPX_SOURCE=AmtPeiPolicyInit.dxs
+ C_FLAGS = $(C_FLAGS) /D "__EDKII_GLUE_MODULE_ENTRY_POINT__=AmtPeiPolicyInitEntryPoint" \
+ /D __EDKII_GLUE_BASE_LIB__ \
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_PEI_SERVICES_LIB__ \
+ /D __EDKII_GLUE_PEI_MEMORY_ALLOCATION_LIB__ \
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.mak b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.mak
new file mode 100644
index 0000000..ee122c7
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.mak
@@ -0,0 +1,113 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPlatformPolicy/AmtPeiPolicyInit/AmtPeiPolicyInit.mak 2 2/23/12 8:59a Klzhan $
+#
+# $Revision: 2 $
+#
+# $Date: 2/23/12 8:59a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtPlatformPolicy/AmtPeiPolicyInit/AmtPeiPolicyInit.mak $
+#
+# 2 2/23/12 8:59a Klzhan
+# Support New EDK
+#
+# 1 2/08/12 1:09a Klzhan
+#
+# 1 3/29/11 5:03a Klzhan
+#
+# 1 2/25/11 1:45a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:11a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: AmtPlatformPolicy.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+All : AmtPeiPolicyInit
+
+AmtPeiPolicyInit : $(BUILD_DIR)\AmtPeiPolicyInit.mak AmtPeiPolicyInitBin
+
+$(BUILD_DIR)\AmtPeiPolicyInit.mak : $(AmtPeiPlatformPolicy_DIR)\$(@B).cif $(AmtPeiPlatformPolicy_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(AmtPeiPlatformPolicy_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+AmtPeiPlatformPolicy_INCLUDES=\
+ $(EDK_INCLUDES) \
+ $(ME_INCLUDES) \
+ $(MISCFRAMEWORK_INCLUDES) \
+ $(NB_INCLUDES)\
+ $(SB_INCLUDES)\
+ /I$(PROJECT_DIR)\
+ /IInclude\
+
+
+AmtPeiPlatformPolicy_DEFINES=$(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=AmtPeiPolicyInitEntryPoint"\
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__\
+ /D __EDKII_GLUE_PEI_SERVICES_LIB__ \
+ /D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ \
+
+AmtPeiPlatformPolicy_LIBS=\
+ $(EDKPROTOCOLLIB)\
+ $(MeLibPpi_LIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+ $(EdkIIGlueBaseLibIA32_LIB)\
+ $(EdkIIGluePeiServicesLib_LIB)\
+ $(EdkIIGluePeiHobLib_LIB)\
+ $(EdkIIGluePeiMemoryAllocationLib_LIB)\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGluePeiDebugLibReportStatusCode_LIB)\
+ $(EdkIIGluePeiReportStatusCodeLib_LIB)\
+ $(PEILIB)
+
+
+AmtPeiPolicyInitBin : $(AmtPeiPlatformPolicy_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\AmtPeiPolicyInit.mak all\
+ GUID=A05ECE52-15A8-424e-BFD3-FCF3D566A09C\
+ "MY_INCLUDES = $(AmtPeiPlatformPolicy_INCLUDES)" \
+ "MY_DEFINES=$(AmtPeiPlatformPolicy_DEFINES)"\
+ ENTRY_POINT=AmtPeiPolicyInitEntryPoint\
+ TYPE=PEIM\
+ EDKIIModule=PEIM\
+ DEPEX1=$(AmtPeiPlatformPolicy_DIR)\AmtPeiPolicyInit.dxs\
+ DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX\
+ COMPRESS=0
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.sdl b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.sdl
new file mode 100644
index 0000000..15734dd
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtPlatformPolicy/Pei/AmtPeiPolicyInit.sdl
@@ -0,0 +1,25 @@
+TOKEN
+ Name = "AmtPeiPlatformPolicy_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable AmtPlatformPolicy support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "AmtPeiPlatformPolicy_DIR"
+End
+
+MODULE
+ Help = "Includes AmtPlatformPolicy.mak to Project"
+ File = "AmtPeiPolicyInit.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AmtPeiPolicyInit.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSMIFlashElink.c b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSMIFlashElink.c
new file mode 100644
index 0000000..0716540
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSMIFlashElink.c
@@ -0,0 +1,128 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSetup/AmtSMIFlashElink.c 3 5/14/14 9:48p Tristinchou $
+//
+// $Revision: 3 $
+//
+// $Date: 5/14/14 9:48p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSetup/AmtSMIFlashElink.c $
+//
+// 3 5/14/14 9:48p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 2 9/19/12 6:38a Klzhan
+// Check MebxVariable exist or not before restore.
+//
+// 1 4/24/12 12:38a Klzhan
+// Update modulepart to latest
+//
+// 1 2/16/12 9:01a Klzhan
+// [TAG] EIP83223
+// [Category] Improvement
+// [Description] Restore MEBiosExtensionSetup when NVRam updated by AFU.
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AMTSMIFlashElink.c
+//
+// Description: AMT TSE Functions.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include <AmiDxeLib.h>
+#include "MeBiosExtensionSetup\MeBiosExtensionSetup.h"
+
+ME_BIOS_EXTENSION_SETUP BiosExtensionSetup;
+UINT32 mMebxSetupVariableDataAttr;
+UINTN mMebxSetupVariableDataSize;
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+// Procedure: PreserveMEBXSyncData
+//
+// Description: Restore the MEBiosExtensionSetup variable
+//
+// Input: NONE
+//
+// Output: NONE
+//
+// Returns: NONE
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID PreserveMEBXSyncData (VOID)
+{
+
+ EFI_STATUS Status;
+
+ mMebxSetupVariableDataSize = sizeof(ME_BIOS_EXTENSION_SETUP);
+ Status = pRS->GetVariable ( gEfiMeBiosExtensionSetupName,
+ &gEfiMeBiosExtensionSetupGuid,
+ &mMebxSetupVariableDataAttr,
+ &mMebxSetupVariableDataSize,
+ &BiosExtensionSetup);
+
+ if(EFI_ERROR(Status))
+ mMebxSetupVariableDataSize = 0;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+// Procedure: RestoreMEBXSyncData
+//
+// Description: Restore the MEBiosExtensionSetup variable
+//
+// Input: NONE
+//
+// Output: NONE
+//
+// Returns: NONE
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID RestoreMEBXSyncData (VOID)
+{
+ EFI_STATUS Status;
+
+ if(mMebxSetupVariableDataSize == 0)
+ return;
+
+ Status = pRS->SetVariable ( gEfiMeBiosExtensionSetupName,
+ &gEfiMeBiosExtensionSetupGuid,
+ mMebxSetupVariableDataAttr,
+ mMebxSetupVariableDataSize,
+ &BiosExtensionSetup );
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.c b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.c
new file mode 100644
index 0000000..a643c62
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.c
@@ -0,0 +1,236 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSetup/AmtSetup.c 5 5/14/14 9:48p Tristinchou $
+//
+// $Revision: 5 $
+//
+// $Date: 5/14/14 9:48p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSetup/AmtSetup.c $
+//
+// 5 5/14/14 9:48p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 4 9/19/12 6:37a Klzhan
+// Fix entry point return type.
+//
+// 3 6/05/12 2:05a Klzhan
+// [TAG] EIP91581
+// [Category] Improvement
+// [Description] Avoid system crash when HECI reset
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 2 7/14/11 7:45a Klzhan
+// Add "Disable ME" setup item.
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+//
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AMTSetup.c
+//
+// Description: AMT TSE Functions.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include "Token.h"
+#include "Efi.h"
+#include "EfiDriverLib.h"
+#include "EfiCommonLib.h"
+#include "Amt.h"
+#include "EfiScriptLib.h"
+#include "AmtLib.h"
+#include "Include\Protocol\LegacySredir.h"
+#include "AmtSetup.h"
+#include <SetupDataDefinition.h>
+#include "MELib.h"
+#include EFI_PROTOCOL_CONSUMER (AmtPlatformPolicy)
+#include EFI_PROTOCOL_CONSUMER (AmtWrapper)
+#include EFI_PROTOCOL_DEFINITION (MeBiosPayloadData)
+#include "Protocol\AmtWrapper\AmtWrapper.h"
+
+EFI_GUID gEfiAmtWrapperProtocolGuid = EFI_AMT_WRAPPER_PROTOCOL_GUID;
+
+#define SETUP_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+EFI_GUID gEfiSetupGuid = SETUP_GUID;
+
+VOID
+SetMEDisable (
+ IN UINT8 Grayout
+)
+{
+#if defined(iAMT_SUPPORT) && (iAMT_SUPPORT == 1)
+ SETUP_DATA gSetupData;
+ UINTN SetupDataSize;
+ EFI_STATUS Status;
+ EFI_HECI_PROTOCOL *Heci;
+ UINT32 MeMode;
+ DXE_MBP_DATA_PROTOCOL *mBIOSPayLoad;
+
+ Status = gBS->LocateProtocol (
+ &gEfiHeciProtocolGuid,
+ NULL,
+ &Heci
+ );
+
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+
+ Status = Heci->GetMeMode (&MeMode);
+
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+
+ SetupDataSize = sizeof(SETUP_DATA);
+ Status = gRT->GetVariable ( L"Setup", \
+ &gEfiSetupGuid, \
+ NULL, \
+ &SetupDataSize, \
+ &gSetupData );
+
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+
+ Status = gBS->LocateProtocol(&gMeBiosPayloadDataProtocolGuid,
+ NULL, &mBIOSPayLoad);
+
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+
+ if(gSetupData.MEDisabled)
+ {
+ // AT in Inactive mode, and no SOL or IDER or KVM session
+ // can't set ME to disabled
+ if((MeMode == ME_MODE_NORMAL) &&
+ (mBIOSPayLoad->MeBiosPayload.AtState.State == 0) &&
+ (Grayout == 0))
+ {
+ Status = HeciSetMeDisableMsg();
+ if(!EFI_ERROR(Status))
+ {
+ Status = HeciSendCbmResetRequest (CBM_RR_REQ_ORIGIN_BIOS_POST, CBM_HRR_GLOBAL_RESET);
+ if(!EFI_ERROR(Status))
+ EFI_DEADLOOP();
+ }
+ }
+ }else
+ {
+ if(MeMode == ME_MODE_TEMP_DISABLED)
+ {
+ Status = HeciSetMeEnableMsg();
+ if(!EFI_ERROR(Status))
+ {
+ Status = HeciSendCbmResetRequest (CBM_RR_REQ_ORIGIN_BIOS_POST, CBM_HRR_GLOBAL_RESET);
+ if(!EFI_ERROR(Status))
+ EFI_DEADLOOP();
+ }
+ }
+ }
+#endif
+}
+
+
+EFI_STATUS
+InitializeAmtSetup (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ SETUP_AMT_FEATURES SetupAmtFeatures;
+ EFI_STATUS Status;
+ UINT32 VarAttr;
+ UINTN VariableSize;
+ UINTN Update = 0;
+ UINT8 GrayOut;
+ AMT_WRAPPER_PROTOCOL *pAmtWrapper = NULL;
+
+
+ EfiInitializeDriverLib (ImageHandle, SystemTable);
+
+ Status = gBS->LocateProtocol(
+ &gEfiAmtWrapperProtocolGuid,
+ NULL,
+ &pAmtWrapper);
+
+ ASSERT_EFI_ERROR(Status);
+
+ VariableSize = sizeof(SETUP_AMT_FEATURES);
+ Status = gRT->GetVariable(
+ L"SetupAmtFeatures",
+ &gEfiSetupGuid,
+ &VarAttr,
+ &VariableSize,
+ &SetupAmtFeatures);
+
+ if ( pAmtWrapper->ActiveManagementEnableIdeR() ||
+ pAmtWrapper->ActiveManagementEnableSol() ||
+ pAmtWrapper->ActiveManagementEnableKvm()) {
+ GrayOut = 1;
+ } else {
+ GrayOut = 0;
+ }
+
+ if (SetupAmtFeatures.GrayOut != GrayOut) {
+ SetupAmtFeatures.GrayOut = GrayOut;
+ Update = 1;
+ }
+
+ if (Update || EFI_ERROR(Status)) {
+ if( Status == EFI_NOT_FOUND )
+ VarAttr = EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS;
+ Status = gRT->SetVariable(
+ L"SetupAmtFeatures",
+ &gEfiSetupGuid,
+ VarAttr,
+ sizeof(SETUP_AMT_FEATURES),
+ &SetupAmtFeatures);
+ ASSERT_EFI_ERROR(Status);
+ }
+ SetMEDisable(GrayOut);
+
+
+ return EFI_SUCCESS;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.cif b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.cif
new file mode 100644
index 0000000..58618a7
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.cif
@@ -0,0 +1,16 @@
+<component>
+ name = "AmtSetup"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\AmtWrapper\AmtSetup"
+ RefName = "AmtSetup"
+[files]
+"AmtSetup.sdl"
+"AmtSetup.mak"
+"AmtSetup.c"
+"AmtSetup.sd"
+"AmtSetup.uni"
+"AmtSetup.h"
+"AmtSetup.dxs"
+"AmtTseFunc.c"
+"AmtSMIFlashElink.c"
+<endComponent>
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.dxs b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.dxs
new file mode 100644
index 0000000..057c0e5
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.dxs
@@ -0,0 +1,70 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSetup/AmtSetup.dxs 1 2/08/12 1:08a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:08a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSetup/AmtSetup.dxs $
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+//
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AMTSetup.dxs
+//
+// Description: AMT TSE dependency file.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include <Protocol\Variable.h>
+#include "Protocol\AmtWrapper\AmtWrapper.h"
+
+#include EFI_PROTOCOL_DEFINITION (ActiveManagement)
+
+DEPENDENCY_START
+ EFI_VARIABLE_ARCH_PROTOCOL_GUID AND
+ EFI_VARIABLE_WRITE_ARCH_PROTOCOL_GUID AND
+ EFI_ACTIVE_MANAGEMENT_PROTOCOL_GUID AND
+ EFI_AMT_WRAPPER_PROTOCOL_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.h b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.h
new file mode 100644
index 0000000..00b842c
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.h
@@ -0,0 +1,74 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSetup/AmtSetup.h 1 2/08/12 1:08a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:08a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSetup/AmtSetup.h $
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+//
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AMTSetup.sd
+//
+// Description: AMT TSE makfile.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#ifndef __AMT_SETUP_H__
+#define __AMT_SETUP_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//This structure is used for setup.
+typedef struct {
+ UINT8 GrayOut;
+} SETUP_AMT_FEATURES;
+
+
+/****** DO NOT WRITE BELOW THIS LINE *******/
+#ifdef __cplusplus
+}
+#endif
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.mak b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.mak
new file mode 100644
index 0000000..e5cedb1
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.mak
@@ -0,0 +1,166 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSetup/AmtSetup.mak 3 4/24/12 12:38a Klzhan $
+#
+# $Revision: 3 $
+#
+# $Date: 4/24/12 12:38a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSetup/AmtSetup.mak $
+#
+# 3 4/24/12 12:38a Klzhan
+# Update modulepart to latest
+#
+# 2 2/23/12 8:58a Klzhan
+# Support New EDK
+#
+# 1 2/08/12 1:08a Klzhan
+# Initial Check in
+#
+# 2 7/14/11 7:45a Klzhan
+# Add "Disable ME" setup item.
+#
+# 1 2/25/11 1:44a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:11a Klzhan
+# Initial Check-in.
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#---------------------------------------------------------------------------
+# Name: AMTSetup.sd
+#
+# Description: AMT TSE makfile.
+#
+#---------------------------------------------------------------------------
+#<AMI_FHDR_END>
+
+#---------------------------------------------------------------------------
+# Create AMT Setup Screens
+#---------------------------------------------------------------------------
+All : AmtSetup
+
+AmtSetup : $(BUILD_DIR)\AmtSetup.mak AmtSetupBin
+#AmtSetup : $(BUILD_DIR)\AmtSetup.mak AmtSetupBin
+AmtTseFunc_lib : $(BUILD_DIR)\AmtSetup.mak AmtTseSetupBin
+
+
+SetupSdbs : $(BUILD_DIR)\AmtSetup.sdb
+
+$(BUILD_DIR)\AmtSetup.sdb : $(AMT_SETUP_DIR)\$(@B).sd $(AMT_SETUP_DIR)\$(@B).uni
+ $(STRGATHER) -i INCLUDE -parse -newdb -db $(BUILD_DIR)\$(@B).sdb $(AMT_SETUP_DIR)\$(@B).uni
+ $(STRGATHER) -scan -db $(BUILD_DIR)\$(@B).sdb -od $(BUILD_DIR)\$(@B).sdb $(AMT_SETUP_DIR)\$(@B).sd
+
+$(BUILD_DIR)\AmtSetup.mak : $(AMT_SETUP_DIR)\$(@B).cif $(AMT_SETUP_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(AMT_SETUP_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+AmtSetup_INCLUDES= \
+ $(EDK_INCLUDES) \
+ $(MISCFRAMEWORK_INCLUDES) \
+ $(ME_INCLUDES) \
+ $(IndustryStandard_INCLUDES)\
+
+AmtSetup_CFLAGS=$(CFLAGS) \
+ -I $(TSEBIN_DIR)\Inc \
+ -I $(TSEBIN_DIR)\
+ -I ReferenceCode\ME\Protocol\
+ -I Board\EM\MeWrapper\AmtWrapper\Protocol
+
+AmtTseSetup_INCLUDES= \
+ /I$(PROJECT_DIR) \
+ $(EDK_INCLUDES) \
+ $(MISCFRAMEWORK_INCLUDES) \
+ $(ME_INCLUDES) \
+ /IInclude\Protocol\
+ /IInclude\IndustryStandard\
+ /IInclude\
+
+SetupData : $(BUILD_DIR)\AmtTseFunc.obj
+
+$(BUILD_DIR)\AmtTseFunc.obj : $(AMT_SETUP_DIR)\AmtTseFunc.c
+ $(CC) $(AmtSetup_CFLAGS) /Fo$(BUILD_DIR)\ $(AMT_SETUP_DIR)\AmtTseFunc.c
+
+AMT_SETUPLIB_OBJECTS = $(BUILD_DIR)\$(AMT_SETUP_DIR)\AmtTseFunc.obj
+AMT_SETUP_OBJECTS = $(BUILD_DIR)\$(AMT_SETUP_DIR)\AmtSetup.obj
+
+AMT_SETUP_LIBS=\
+ $(EFIDRIVERLIB)\
+ $(MeLibDxe_LIB)\
+ $(EfiScriptLib_LIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+ $(EFIPROTOCOLLIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EdkIIGlueBaseLib_LIB)\
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueDxeMemoryAllocationLib_LIB)\
+ $(EFIGUIDLIB)\
+ $(EDKPROTOCOLLIB)\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGlueBaseMemoryLib_LIB)\
+ $(EdkIIGlueEdkDxeRuntimeDriverLib_LIB)\
+ $(EdkIIGlueUefiLib_LIB)\
+ $(EdkIIGlueDxeHobLib_LIB)\
+
+AmtSetupBin : $(AMT_SETUP_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\AmtSetup.mak all \
+ "MY_INCLUDES=$(AmtSetup_INCLUDES)"\
+ GUID=773CB08B-511A-4bd5-85AD-41D4F4B64A52 \
+ TYPE=BS_DRIVER \
+ "OBJECTS=$(AMT_SETUP_OBJECTS)"\
+ ENTRY_POINT=InitializeAmtSetup \
+ DEPEX1=$(AMT_SETUP_DIR)\AmtSetup.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ COMPRESS=1
+
+#---------------------------------------------------------------------------
+# Create Restore BIOSExtesionSetup Restore Component
+#---------------------------------------------------------------------------
+AmtSMIFlashElink : $(BUILD_DIR)\AmtSetup.mak AmtSMIFlashElinkBin
+
+AmtSMIFlashElinkObjs = $(BUILD_DIR)\$(AMT_SETUP_DIR)\AmtSMIFlashElink.obj
+
+AmtSMIFlashElinkBin : $(AMIDXELIB) $(MeGuidLib_LIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\AmtSetup.mak all\
+ "CFLAGS=$(CFLAGS:/W4=/W3) /I$(MeGuidLib_DIR)" \
+ OBJECTS="$(AmtSMIFlashElinkObjs)" \
+ NAME=AmtSetup \
+ TYPE=LIBRARY LIBRARY_NAME=$(AMT_SMIFLASH_LIB)
+
+$(AMT_SMIFLASH_LIB) : AmtSMIFlashElink
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.sd b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.sd
new file mode 100644
index 0000000..8f9bd1a
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.sd
@@ -0,0 +1,382 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSetup/AmtSetup.sd 5 9/24/15 3:04a Tristinchou $
+//
+// $Revision: 5 $
+//
+// $Date: 9/24/15 3:04a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSetup/AmtSetup.sd $
+//
+// 5 9/24/15 3:04a Tristinchou
+// [TAG] EIP238392
+// [Category] Improvement
+// [Description] Change USB Provisioning default to disable
+//
+// 4 8/02/13 5:02a Klzhan
+// [TAG] EIP131372
+// [Category] Improvement
+// [Description] Fix build error when disable AT_SUPPORT
+//
+// 3 11/06/12 7:13a Klzhan
+// Pass SharkBay AT test.
+//
+// 2 4/24/12 12:38a Klzhan
+// Update modulepart to latest
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 3 7/14/11 7:45a Klzhan
+// Add "Disable ME" setup item.
+//
+// 2 5/19/11 5:30a Klzhan
+// Remove un-use AMT setup item.
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AMTSetup.sd
+//
+// Description: AMT TSE sd file.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#ifdef SETUP_DATA_DEFINITION
+/***********************************************************/
+/* Put NVRAM data definitions here.
+/* For example: UINT8 Data1;
+/* These definitions will be converted by the build process
+/* to a definitions of SETUP_DATA fields.
+/***********************************************************/
+ //
+ // Intel AMT
+ //
+ UINT8 Amt;
+ UINT8 AmtbxPrompt;
+ UINT8 AmtbxHotKeyPressed;
+ UINT8 AmtbxSelectionScreen;
+ UINT8 FWVerbose;
+ UINT8 HideUnConfigureMeConfirm;
+ UINT8 MebxDebugMsg;
+ UINT8 UnConfigureMe;
+ UINT8 AmtSpiLock;
+ UINT16 AmtWaitTimer;
+ UINT8 AmtCiraRequest;
+ UINT8 AmtCiraTimeout;
+ UINT8 USBProvision;
+ UINT8 FWProgress;
+ UINT8 MEDisabled;
+ //
+ // ASF
+ //
+ UINT8 Asf;
+
+ //
+ // WatchDog
+ //
+ UINT8 WatchDog;
+ UINT16 WatchDogTimerOs;
+ UINT16 WatchDogTimerBios;
+
+#endif
+
+//---------------------------------------------------------------------------
+#if defined(VFRCOMPILE) && !defined(CONTROLS_ARE_DEFINED)
+#define CONTROL_DEFINITION
+#endif
+//---------------------------------------------------------------------------
+
+//---------------------------------------------------------------------------
+#ifdef CONTROL_DEFINITION
+
+#define AMT_ONEOF_AMT\
+ oneof varid = SETUP_DATA.Amt,\
+ prompt = STRING_TOKEN(STR_AMT_PROMPT),\
+ help = STRING_TOKEN(STR_AMT_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+
+#define AMT_CHECKBOX_AMTBX_HOTKEYPRESSED\
+ checkbox varid = SETUP_DATA.AmtbxHotKeyPressed,\
+ prompt = STRING_TOKEN(STR_AMTBX_HOTKEY_PRESSED_PROMPT),\
+ help = STRING_TOKEN(STR_AMTBX_HOTKEY_PRESSED_HELP),\
+ flags = 0 | RESET_REQUIRED,\
+ key = 0,\
+ endcheckbox;
+
+#define AMT_CHECKBOX_AMTBX_SELECTSECTION\
+ checkbox varid = SETUP_DATA.AmtbxSelectionScreen,\
+ prompt = STRING_TOKEN(STR_AMTBX_SELECTION_SCREEN_PROMPT),\
+ help = STRING_TOKEN(STR_AMTBX_SELECTION_SCREEN_HELP),\
+ flags = 0 | RESET_REQUIRED,\
+ key = 0,\
+ endcheckbox;
+
+
+#define AMT_CHECKBOX_HIDEUNCONFIGUREDMECONFIRM\
+ checkbox varid = SETUP_DATA.HideUnConfigureMeConfirm,\
+ prompt = STRING_TOKEN(STR_AMT_HIDE_CONFIRMATION_UNCONFIGURE_ME_PROMPT),\
+ help = STRING_TOKEN(STR_AMT_HIDE_CONFIRMATION_UNCONFIGURE_ME_HELP),\
+ flags = 0 | RESET_REQUIRED,\
+ key = 0,\
+ endcheckbox;
+
+#define AMT_CHECKBOX_MEBX_DEBUGMSG\
+ checkbox varid = SETUP_DATA.MebxDebugMsg,\
+ prompt = STRING_TOKEN(STR_AMT_MEBX_DEBUG_MSG_PROMPT),\
+ help = STRING_TOKEN(STR_AMT_MEBX_DEBUG_MSG_HELP),\
+ flags = 0 | RESET_REQUIRED,\
+ key = 0,\
+ endcheckbox;
+
+#define AMT_CHECKBOX_UNCONFIGUREME\
+ checkbox varid = SETUP_DATA.UnConfigureMe,\
+ prompt = STRING_TOKEN(STR_AMT_UNCONFIGURE_ME_PROMPT),\
+ help = STRING_TOKEN(STR_AMT_UNCONFIGURE_ME_HELP),\
+ flags = 0 | RESET_REQUIRED,\
+ key = 0,\
+ endcheckbox;
+
+#define AMT_NUMERIC_AMT_WAITTIMER\
+ numeric varid = SETUP_DATA.AmtWaitTimer,\
+ prompt = STRING_TOKEN (STR_AMT_WAIT_TIMER_PROMPT),\
+ help = STRING_TOKEN (STR_AMT_WAIT_TIMER_HELP),\
+ minimum = 0,\
+ maximum = 65535,\
+ step = 1,\
+ default = 0,\
+ endnumeric;
+ // Stepping of 0 equates to a manual entering
+ // of a value, otherwise it will auto-increment
+ // with a left/right arrow
+
+#define AMT_ONEOF_MEDISABLED\
+ oneof varid = SETUP_DATA.MEDisabled,\
+ prompt = STRING_TOKEN(STR_SET_ME_DISABLED_PROMPT),\
+ help = STRING_TOKEN(STR_SET_ME_DISABLED_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define AMT_ONEOF_ASF\
+ oneof varid = SETUP_DATA.Asf,\
+ prompt = STRING_TOKEN(STR_ASF_PROMPT),\
+ help = STRING_TOKEN(STR_ASF_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define AMT_CHECKBOX_AMT_CIRAREQUEST\
+ checkbox varid = SETUP_DATA.AmtCiraRequest,\
+ prompt = STRING_TOKEN(STR_AMT_CIRA_REQUEST_PROMPT),\
+ help = STRING_TOKEN(STR_AMT_CIRA_REQUEST_HELP),\
+ flags = 0 | RESET_REQUIRED,\
+ key = 0,\
+ endcheckbox;
+
+#define AMT_ONEOF_USB_PROVISION\
+ oneof varid = SETUP_DATA.USBProvision,\
+ prompt = STRING_TOKEN(STR_AMT_USB_CONFIGURE_PROMPT),\
+ help = STRING_TOKEN(STR_AMT_USB_CONFIGURE_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define AMT_ONEOF_FW_PROGRESS\
+ oneof varid = SETUP_DATA.FWProgress,\
+ prompt = STRING_TOKEN(STR_AMT_PET_PROGRESS_PROMPT),\
+ help = STRING_TOKEN(STR_AMT_PET_PROGRESS_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+
+#define AMT_NUMERIC_AMT_CIRATIMEOUT\
+ numeric varid = SETUP_DATA.AmtCiraTimeout, \
+ prompt = STRING_TOKEN (STR_AMT_CIRA_TIMEOUT_PROMPT),\
+ help = STRING_TOKEN (STR_AMT_CIRA_TIMEOUT_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 0, \
+ endnumeric;
+ // Stepping of 0 equates to a manual entering
+ // of a value, otherwise it will auto-increment
+ // with a left/right arrow
+
+#define AMT_ONEOF_WATCHDOG\
+ oneof varid = SETUP_DATA.WatchDog,\
+ prompt = STRING_TOKEN(STR_WATCHDOG_PROMPT),\
+ help = STRING_TOKEN(STR_WATCHDOG_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define AMT_NUMERIC_WATCHDOG_TIMEROS\
+ numeric varid = SETUP_DATA.WatchDogTimerOs,\
+ prompt = STRING_TOKEN (STR_WATCHDOG_TIMER_OS_PROMPT),\
+ help = STRING_TOKEN (STR_WATCHDOG_TIMER_OS_HELP),\
+ minimum = 0,\
+ maximum = 65535,\
+ step = 1,\
+ default = 0,\
+ endnumeric;
+
+#define AMTSETUP_NUMERIC_WATCHDOG_TIMERBIOS\
+ numeric varid = SETUP_DATA.WatchDogTimerBios,\
+ prompt = STRING_TOKEN (STR_WATCHDOG_TIMER_BIOS_PROMPT),\
+ help = STRING_TOKEN (STR_WATCHDOG_TIMER_BIOS_HELP),\
+ minimum = 0,\
+ maximum = 65535,\
+ step = 1,\
+ default = 0,\
+ endnumeric;
+
+#endif // CONTROL_DEFINITION
+//---------------------------------------------------------------------------
+
+//---------------------------------------------------------------------------
+#ifdef CONTROLS_WITH_DEFAULTS
+ AMT_ONEOF_AMT
+ AMT_CHECKBOX_AMTBX_HOTKEYPRESSED
+ AMT_CHECKBOX_AMTBX_SELECTSECTION
+ AMT_CHECKBOX_HIDEUNCONFIGUREDMECONFIRM
+ AMT_CHECKBOX_MEBX_DEBUGMSG
+ AMT_CHECKBOX_UNCONFIGUREME
+ AMT_NUMERIC_AMT_WAITTIMER
+ AMT_ONEOF_MEDISABLED
+ AMT_ONEOF_ASF
+ AMT_CHECKBOX_AMT_CIRAREQUEST
+ AMT_ONEOF_USB_PROVISION
+ AMT_ONEOF_FW_PROGRESS
+ AMT_NUMERIC_AMT_CIRATIMEOUT
+ AMT_ONEOF_WATCHDOG
+ AMT_NUMERIC_WATCHDOG_TIMEROS
+ AMTSETUP_NUMERIC_WATCHDOG_TIMERBIOS
+#endif // CONTROLS_WITH_DEFAULTS
+
+//**********************************************************************
+// Advanced - ASF Configuration Form
+//**********************************************************************
+
+#ifdef ADVANCED_FORM_SET
+
+#ifdef FORM_SET_TYPEDEF
+ #include "AmtSetup.h"
+ #include <MeSetup.h>
+#endif
+
+ #ifdef FORM_SET_ITEM
+ // Define controls to be added to the main page of the formset
+
+ #endif
+
+ #ifdef FORM_SET_VARSTORE
+ varstore SETUP_AMT_FEATURES,
+ key = AUTO_ID(AMT_FEATURES_ID),
+ name = SetupAmtFeatures,
+ guid = SETUP_GUID;
+ #endif
+
+ #ifdef FORM_SET_GOTO
+ // Define goto commands for the forms defined in this file
+ suppressif NOT ideqval SETUP_DATA.MeFirmwareInfo == NORMAL_MODE
+ AND NOT ideqval SETUP_DATA.MeFirmwareInfo == TEMP_DISABLE_MODE;
+ grayoutif ideqval SETUP_AMT_FEATURES.GrayOut == 1;
+ goto AMT_FORM_ID,
+ prompt = STRING_TOKEN(STR_AMT_FORM),
+ help = STRING_TOKEN(STR_AMT_FORM_HELP);
+ SUPPRESS_GRAYOUT_ENDIF
+ #endif
+
+ #ifdef FORM_SET_FORM
+
+ // Define forms
+ #ifndef AMT_FORM_SETUP
+ #define AMT_FORM_SETUP
+
+ form formid = AUTO_ID(AMT_FORM_ID),
+ title = STRING_TOKEN(STR_AMT_FORM);
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ AMT_ONEOF_AMT
+ endif;
+
+
+ grayoutif ideqval SETUP_DATA.Amt == 0 OR ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ AMT_CHECKBOX_AMTBX_HOTKEYPRESSED
+ AMT_CHECKBOX_AMTBX_SELECTSECTION
+ AMT_CHECKBOX_HIDEUNCONFIGUREDMECONFIRM
+ AMT_CHECKBOX_MEBX_DEBUGMSG
+ AMT_CHECKBOX_UNCONFIGUREME
+ AMT_NUMERIC_AMT_WAITTIMER
+
+#if TdtWrapper_SUPPORT
+ grayoutif ideqval TDT_VOLATILE_SETUP_DATA.TdtEnroll == 1;
+ AMT_ONEOF_MEDISABLED
+ endif;
+#else
+ AMT_ONEOF_MEDISABLED
+#endif
+ AMT_ONEOF_ASF
+ AMT_CHECKBOX_AMT_CIRAREQUEST
+ AMT_ONEOF_USB_PROVISION
+ AMT_ONEOF_FW_PROGRESS
+ endif;
+
+ grayoutif ideqval SETUP_DATA.AmtCiraRequest == 0 OR ideqval SETUP_DATA.Amt == 0 OR ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ AMT_NUMERIC_AMT_CIRATIMEOUT
+ endif;
+
+ grayoutif ideqval SETUP_DATA.Asf == 0 OR ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ AMT_ONEOF_WATCHDOG
+ endif;
+
+ grayoutif ideqval SETUP_DATA.Asf == 0 OR ideqval SETUP_DATA.WatchDog == 0 OR ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ AMT_NUMERIC_WATCHDOG_TIMEROS
+ AMTSETUP_NUMERIC_WATCHDOG_TIMERBIOS
+ endif;
+
+ endform;
+ #endif // AMT_FORM_SETUP
+ #endif
+#endif // ADVANCED_FORM_SET
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.sdl b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.sdl
new file mode 100644
index 0000000..8840618
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.sdl
@@ -0,0 +1,107 @@
+TOKEN
+ Name = "iAMT_Setup"
+ Value = "1"
+ Help = "Main switch to enable iAMT Setup support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "AMT_SETUP_DIR"
+End
+
+MODULE
+ Help = "Includes AmtSetup.mak to Project"
+ File = "AmtSetup.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AmtSetup.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 30
+ Help = "Includes generic iAMT setup screens to the project"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(AMT_SETUP_DIR)\AmtSetup.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 30
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "iAMTProcessProceedToBootHook,"
+ Parent = "ProcessProceedToBoot,"
+ Help = "iAMT hook into TSE for TSE specific functions "
+ Token = "iAMT_SUPPORT" "=" "1"
+ InvokeOrder = BeforeParent
+End
+
+ELINK
+ Name = "iAMTProcessEnterSetupHook,"
+ Parent = "PostManagerHandShakeHook,"
+ Help = "iAMT hook into TSE for TSE specific functions "
+ Token = "iAMT_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AmtSetup.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AmtTseFunc.obj"
+ Parent = "AMITSE_Objects"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "AMTSETUP_LIB"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "iAMTProcessConInAvailabilityHook,"
+ Parent = "ProcessConInAvailability,"
+ Help = "iAMT hook into TSE for TSE specific functions "
+ Token = "iAMT_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+
+ELINK
+ Name = "AMTBypassPasswordCheck,"
+ Parent = "ProcessConInAvailabilityHook,"
+ Priority = 0
+ InvokeOrder = AfterParent
+End
+
+TOKEN
+ Name = "AMT_SMIFLASH_LIB"
+ Value = "$(BUILD_DIR)\AmtSetup.lib"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AmtSetup.lib"
+ Parent = "PRESERVE_LIB"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "PreserveMEBXSyncData,"
+ Parent = "SMIFlashPreUpdateList"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "RestoreMEBXSyncData,"
+ Parent = "SMIFlashEndUpdateList"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.uni b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.uni
new file mode 100644
index 0000000..a0e84b7
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtSetup.uni
Binary files differ
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtTseFunc.c b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtTseFunc.c
new file mode 100644
index 0000000..ee41845
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSetup/AmtTseFunc.c
@@ -0,0 +1,447 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSetup/AmtTseFunc.c 3 5/14/14 9:49p Tristinchou $
+//
+// $Revision: 3 $
+//
+// $Date: 5/14/14 9:49p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSetup/AmtTseFunc.c $
+//
+// 3 5/14/14 9:49p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 2 4/24/12 12:38a Klzhan
+// Update modulepart to latest
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AMTTseFunc.c
+//
+// Description: AMT TSE Functions.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*
+#include <EFI.h>
+#include "EfiDriverLib.h"
+#include "EfiCommonLib.h"
+#include "AmtSetup.h"
+#include "token.h"
+#include "EfiBootScript.h"
+#include <AMIVfr.h>
+#include <Core\EM\AMITSE\Inc\variable.h>
+
+#include EFI_PROTOCOL_CONSUMER (AmtPlatformPolicy)
+#include EFI_PROTOCOL_CONSUMER (AmtWrapper)
+#include EFI_PROTOCOL_CONSUMER (AlertStandardFormat)
+#include EFI_PROTOCOL_DEFINITION (BootScriptSave)
+#include EFI_GUID_DEFINITION (AcpiVariable)
+*/
+#include <Setup.h>
+#include <TseCommon.h>
+//#include <ME.h>
+//#include "Board\EM\AMT\Setup\AMT.h"
+#include "variable.h"
+#include "AmtWrapper\AmtWrapper.h"
+#include "AlertStandardFormat\AlertStandardFormat.h"
+#define SETUP_GUID \
+ { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+
+#define BOOT_MANAGER_GUID \
+ { 0xB4909CF3, 0x7B93, 0x4751, 0x9B, 0xD8, 0x5B, 0xA8, 0x22, 0x0B, 0x9B, 0xB2 }
+
+#define EFI_BOOT_SCRIPT_SAVE_PROTOCOL_GUID \
+ { \
+ 0x470e1529, 0xb79e, 0x4e32, 0xa0, 0xfe, 0x6a, 0x15, 0x6d, 0x29, 0xf9, 0xb2 \
+ }
+
+#define AMI_EFI_SOL_POST_MESSAGE_GUID \
+ { 0xf42f3752, 0x12e, 0x4812, 0x99, 0xe6, 0x49, 0xf9, 0x43, 0x4, 0x84, 0x54 }
+
+#define EFI_GLOBAL_VARIABLE \
+ {0x8BE4DF61,0x93CA,0x11d2,0xAA,0xD,0x0,0xE0,0x98,0x03,0x2B,0x8C}
+
+//EFI_BOOT_SCRIPT_SAVE_PROTOCOL *gBootScriptSave;
+EFI_GUID gEfiAmtWrapperProtocolGuidTse = EFI_AMT_WRAPPER_PROTOCOL_GUID;
+EFI_GUID gEfiAlertStandardFormatProtocolGuid = EFI_ALERT_STANDARD_FORMAT_PROTOCOL_GUID;
+static UINTN ScriptDone = 0;
+extern BOOLEAN gEnterSetup;
+
+VOID CheckForKey( EFI_EVENT Event, VOID *Context );
+VOID AMTBypassPasswordRestore(VOID);
+
+extern EFI_BOOT_SERVICES *gBS;
+extern EFI_SYSTEM_TABLE *gST;
+extern EFI_RUNTIME_SERVICES *gRT;
+//*******************************************************************************
+//<AMI_PHDR_START>
+// Procedure: iAMTCheckForKey
+//
+// Description:
+//
+// Input: Event: Timer event.
+// Context: Event context; always NULL
+//
+// Output: VOID
+//
+//<AMI_PHDR_END>
+//*******************************************************************************
+VOID iAMTCheckForKey( EFI_EVENT Event, VOID *Context)
+{
+ // Console Lock by uninstall Protocol,
+ // So remove this.
+ //CheckForKey((EFI_EVENT)NULL, NULL );
+
+}
+
+
+//*******************************************************************************
+//<AMI_PHDR_START>
+// Procedure: iAMTProcessProceedToBootHook
+//
+// Description:
+//
+// Input: Event: Timer event.
+// Context: Event context; always NULL
+//
+// Output: VOID
+//
+//<AMI_PHDR_END>
+//*******************************************************************************
+VOID iAMTProcessProceedToBootHook ( EFI_EVENT Event, VOID *Context)
+{
+ AMT_WRAPPER_PROTOCOL *pAmtWrapper = NULL;
+ EFI_STATUS Status;
+ EFI_ALERT_STANDARD_FORMAT_PROTOCOL *AsfCheck;
+ EFI_ASF_BOOT_OPTIONS *mInternalAsfBootOptions;
+
+ if (pAmtWrapper == NULL) {
+ Status = gBS->LocateProtocol(&gEfiAmtWrapperProtocolGuidTse, NULL, &pAmtWrapper);
+ }
+
+ //case IDER
+ if (pAmtWrapper != NULL) {
+ if (pAmtWrapper->ActiveManagementEnableIdeR()||pAmtWrapper->ActiveManagementEnableSol()){
+ Status = pAmtWrapper->BdsBootViaAsf();
+ return;
+ }
+ }
+
+ //case ASF
+ //Get the ASF options
+ //if set then we have to do and Asfboot
+ Status = gBS->LocateProtocol (
+ &gEfiAlertStandardFormatProtocolGuid,
+ NULL,
+ &AsfCheck
+ );
+
+ if (EFI_ERROR (Status)) {
+// DEBUG ((EFI_D_ERROR, "Info : Error gettings ASF protocol -> %r\n", Status));
+ return;
+ }
+
+ Status = AsfCheck->GetBootOptions (AsfCheck, &mInternalAsfBootOptions);
+
+ if (mInternalAsfBootOptions->SubCommand != ASF_BOOT_OPTIONS_PRESENT) {
+ return;
+ }else{
+ Status = pAmtWrapper->BdsBootViaAsf();
+ return;
+ }
+}
+
+
+//*******************************************************************************
+//<AMI_PHDR_START>
+// Procedure: iAMTProcessEnterSetupHook
+//
+// Description:
+//
+// Input: Event: Timer event.
+// Context: Event context; always NULL
+//
+// Output: VOID
+//
+//<AMI_PHDR_END>
+//*******************************************************************************
+VOID iAMTProcessEnterSetupHook ( EFI_EVENT Event, VOID *Context)
+{
+ EFI_STATUS Status;
+ UINT16 count = 0;
+ EFI_GUID BootManGuid = BOOT_MANAGER_GUID;
+ AMT_WRAPPER_PROTOCOL *pAmtWrapper = NULL;
+
+ if (pAmtWrapper == NULL)
+ Status = gBS->LocateProtocol(&gEfiAmtWrapperProtocolGuidTse, NULL, &pAmtWrapper);
+ if (pAmtWrapper != NULL) {
+ if (pAmtWrapper->ActiveManagementEnableIdeR()) {
+ count = 0xFFFF;
+ }
+ }
+ if (count == 0xFFFF){
+ gRT->SetVariable( L"BootManager", &BootManGuid, EFI_VARIABLE_BOOTSERVICE_ACCESS,sizeof(count),&count );}
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: AMTBypassPasswordRestore
+//
+// Description: This function is a hook called when TSE determines
+// that SETUP utility has to be displayed. This function
+// is available as ELINK. In the generic implementation
+// setup password is prompted in this function.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN iAMTProcessConInAvailabilityHook (VOID)
+{
+ AMT_WRAPPER_PROTOCOL *pAmtWrapper = NULL;
+ EFI_HANDLE SolPostMessageHandle = NULL;
+ EFI_STATUS Status;
+ EFI_GUID gAmiEfiSolPostMessageGuid = AMI_EFI_SOL_POST_MESSAGE_GUID;
+
+ // Handle EnterSetup Flag here !!
+ if (pAmtWrapper == NULL){
+ Status = gBS->LocateProtocol(&gEfiAmtWrapperProtocolGuidTse, NULL, &pAmtWrapper);
+ }
+ if(EFI_ERROR(Status))
+ return FALSE;
+ if(pAmtWrapper->ActiveManagementEnterSetup())
+ gEnterSetup = TRUE;
+
+ // Install Protocol here, Trig Callback event to show SOL message.
+ Status = gBS->InstallMultipleProtocolInterfaces(
+ &SolPostMessageHandle,
+ &gAmiEfiSolPostMessageGuid,
+ NULL,
+ NULL);
+
+
+ return FALSE;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: AMTBypassPasswordRestore
+//
+// Description: This function is a hook called when TSE determines
+// that SETUP utility has to be displayed. This function
+// is available as ELINK. In the generic implementation
+// setup password is prompted in this function.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID AMTBypassPasswordRestore(VOID)
+{
+
+ EFI_STATUS Status;
+ UINT32 VarAttr;
+ UINTN VariableSize;
+ EFI_GUID gAmiTseSetupGuid = AMITSESETUP_GUID;
+ AMITSESETUP AmiTseData;
+#if defined(TSE_ADVANCED_BIN_SUPPORT)
+ AMITSESETUP *pSetupVariable;
+#endif
+ VariableSize = sizeof(AMITSESETUP);
+ Status = gRT->GetVariable ( L"AMITSESetupBackup", \
+ &gAmiTseSetupGuid, \
+ &VarAttr, \
+ &VariableSize, \
+ &AmiTseData );
+
+ // If we get this variable, restore it back
+ if (!EFI_ERROR (Status)) {
+
+ VariableSize = sizeof(AMITSESETUP);
+ Status = gRT->SetVariable ( L"AMITSESetup", \
+ &gAmiTseSetupGuid, \
+ VarAttr, \
+ VariableSize, \
+ &AmiTseData );
+
+ VariableSize = 0;
+ Status = gRT->SetVariable ( L"AMITSESetupBackup", \
+ &gAmiTseSetupGuid, \
+ VarAttr, \
+ VariableSize, \
+ &AmiTseData );
+#if defined(TSE_ADVANCED_BIN_SUPPORT)
+ VariableSize = sizeof(AMITSESETUP);
+ pSetupVariable = VarGetVariable( VARIABLE_ID_AMITSESETUP, &VariableSize );
+ if ( ( pSetupVariable == NULL ) || ( VariableSize != sizeof(AMITSESETUP) ) )
+ pSetupVariable = VarGetNvram( VARIABLE_ID_AMITSESETUP, &VariableSize );
+ MemCopy(pSetupVariable->UserPassword, AmiTseData.UserPassword,
+ sizeof(pSetupVariable->UserPassword));
+ MemCopy(pSetupVariable->AdminPassword, AmiTseData.AdminPassword,
+ sizeof(pSetupVariable->AdminPassword));
+ VarSetNvram( VARIABLE_ID_AMITSESETUP, \
+ pSetupVariable, sizeof(AMITSESETUP));
+#endif
+ }
+
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: AMTBypassPasswordCheck
+//
+// Description: ELink to ProcessConInAvailabilityHook.
+// If AMT Bypass user password, Delete AMITSESetup.
+//
+// Input: VOID
+//
+// Output: BOOLEAN. Should return TRUE if the screen was used to
+// ask password; FALSE if the screen was not used to ask
+// password.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN AMTBypassPasswordCheck(VOID)
+{
+ EFI_STATUS Status;
+ UINT32 VarAttr;
+ UINTN VariableSize;
+ EFI_GUID gAmiTseSetupGuid = AMITSESETUP_GUID;
+ AMITSESETUP AmiTseData;
+#if defined(TSE_ADVANCED_BIN_SUPPORT)
+ AMITSESETUP *pSetupVariable;
+#endif
+ UINTN VarSize=0;
+ EFI_ALERT_STANDARD_FORMAT_PROTOCOL *Asf;
+ EFI_ASF_BOOT_OPTIONS *mAsfBootOptions;
+ EFI_GUID gSetupGuid = SETUP_GUID;
+ mAsfBootOptions = NULL;
+ //
+ // Get Protocol for ASF
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiAlertStandardFormatProtocolGuid,
+ NULL,
+ &Asf
+ );
+ if (EFI_ERROR (Status)) {
+// DEBUG ((EFI_D_ERROR, "Info : Error gettings ASF protocol -> %r\n", Status));
+ return FALSE;
+ }
+
+ Status = Asf->GetBootOptions (Asf, &mAsfBootOptions);
+ // Configuration data resert.
+ if(mAsfBootOptions->BootOptions & 0x8000)
+ {
+ // Delete Variable.
+ VarAttr = 0;
+ VariableSize = 0;
+ Status = gRT->GetVariable(
+ L"Setup",
+ &gSetupGuid,
+ &VarAttr,
+ &VariableSize,
+ &VarSize );
+ if( EFI_ERROR(Status) && (Status != EFI_BUFFER_TOO_SMALL) )
+ VarAttr = EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS;
+
+ VariableSize = 0;
+ gRT->SetVariable(
+ L"Setup",
+ &gSetupGuid,
+ VarAttr,
+ VariableSize,
+ &VarSize);
+ }
+ // ByPass Password
+ if(mAsfBootOptions->BootOptions & 0x0800)
+ {
+ VarAttr = 0;
+ VariableSize = sizeof(AMITSESETUP);
+ Status = gRT->GetVariable ( L"AMITSESetup", \
+ &gAmiTseSetupGuid, \
+ &VarAttr, \
+ &VariableSize, \
+ &AmiTseData );
+
+ // No Password installed just return
+ if (Status == EFI_NOT_FOUND) {
+ return 0;
+ }
+ // If exist , store a backup then delete AMITSESetup
+
+ VariableSize = sizeof(AMITSESETUP);
+ Status = gRT->SetVariable ( L"AMITSESetupBackup", \
+ &gAmiTseSetupGuid, \
+ VarAttr, \
+ VariableSize, \
+ &AmiTseData );
+ Status = gRT->SetVariable ( L"AMITSESetup", \
+ &gAmiTseSetupGuid, \
+ VarAttr, \
+ 0, \
+ &AmiTseData );
+#if defined(TSE_ADVANCED_BIN_SUPPORT)
+ pSetupVariable = VarGetVariable( VARIABLE_ID_AMITSESETUP, &VarSize );
+ if ( ( pSetupVariable == NULL ) || ( VarSize != sizeof(AMITSESETUP) ) )
+ pSetupVariable = VarGetNvram( VARIABLE_ID_AMITSESETUP, &VarSize );
+ MemSet(pSetupVariable->UserPassword, \
+ sizeof(pSetupVariable->UserPassword), 0);
+ MemSet(pSetupVariable->AdminPassword, \
+ sizeof(pSetupVariable->AdminPassword), 0);
+ VarSetNvram( VARIABLE_ID_AMITSESETUP, \
+ pSetupVariable, sizeof(AMITSESETUP));
+#endif
+ }else
+ {
+ // If not bypass password , check AMITSESetupBackup vairblae
+ AMTBypassPasswordRestore();
+ }
+
+ return 0;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.c b/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.c
new file mode 100644
index 0000000..123be0f
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.c
@@ -0,0 +1,376 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSmbios/AmtSmbios.c 4 6/21/13 3:39a Klzhan $
+//
+// $Revision: 4 $
+//
+// $Date: 6/21/13 3:39a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSmbios/AmtSmbios.c $
+//
+// 4 6/21/13 3:39a Klzhan
+// [TAG] EIPNone
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] ME FW drop support of type 129
+//
+// 3 9/19/12 6:57a Klzhan
+// Update IDER secure boot flag.
+//
+// 2 4/24/12 12:43a Klzhan
+// Update module to latest
+//
+// 1 2/08/12 1:09a Klzhan
+// Initial Check in
+//
+// 3 7/11/11 5:32a Klzhan
+// Close Event after SMBIOS 129 130 created.
+//
+// 2 5/03/11 6:19a Klzhan
+// [TAG] EIP59457
+// [Category] Bug Fix
+// [RootCause] Copy wrong size in SMBios type 129.
+// [Files] AmtSmbios.c
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+//
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AMTSmbios.c
+//
+// Description: AMT Smbios Functions.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include "AMTSmbios.h"
+#include "Tiano.h"
+#include "EfiDriverLib.h"
+#include "SaAccess.h"
+#include "PchAccess.h"
+#include "EdkIIGluePcd.h"
+#include "EdkIIGluePcdPciExpressLib.h"
+#include "EdkIIGlueConfig.h"
+#include "EdkIIGlueIoLib.h"
+#include "EdkIIGluePciExpressLib.h"
+#include "EdkIIGlueUefiLib.h"
+#include "SbSetupData.h"
+#include EFI_PROTOCOL_CONSUMER (MeBiosPayloadData)
+EFI_GUID gEfiSmbiosProtocolGuid = EFI_SMBIOS_PROTOCOL_GUID;
+EFI_GUID gEfiEventReadyToBootGuid = EFI_EVENT_GROUP_READY_TO_BOOT;
+EFI_GUID gEfiMeBiosExtensionSetupGuid = EFI_ME_BIOS_EXTENSION_SETUP_GUID;
+CHAR16 gEfiMeBiosExtensionSetupName[] = EFI_ME_BIOS_EXTENSION_SETUP_VARIABLE_NAME;
+EFI_GUID gEfiGlobalVariableGuid = EFI_GLOBAL_VARIABLE_GUID;
+
+EFI_EVENT mLegacyBootEvent;
+
+#if VA_SUPPORT
+EFI_GUID gEfiVaNVMVariableGuid = EFI_VA_NVM_VARIABLE_GUID;
+#endif
+
+EFI_RUNTIME_SERVICES *gRT;
+EFI_BOOT_SERVICES *gBS;
+DXE_MBP_DATA_PROTOCOL MbpData;
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: GetMeFwInfoFromMBP
+//
+// Description: Get ME Fw Info From MBP data
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+GetMeFwInfoFromMBP (
+ IN OUT ME_CAP *MECapability
+ )
+{
+ MEFWCAPS_SKU FwCapsSku;
+
+ MECapability->MeEnabled = 1;
+
+ FwCapsSku.Data = MbpData.MeBiosPayload.FwCapsSku.FwCapabilities.Data;
+
+ if (FwCapsSku.Fields.IntelAT) {
+ MECapability->AtSupported = 1;
+ }
+
+ if (FwCapsSku.Fields.KVM) {
+ MECapability->IntelKVM = 1;
+ }
+
+ switch (MbpData.MeBiosPayload.FwPlatType.RuleData.Fields.PlatformBrand) {
+ case INTEL_AMT_BRAND:
+ MECapability->IntelAmtFw = 1;
+ MECapability->LocalWakeupTimer = 1;
+ break;
+
+ case INTEL_STAND_MANAGEABILITY_BRAND:
+ MECapability->IntelAmtFwStandard = 1;
+ break;
+
+ case INTEL_SMALL_BUSINESS_TECHNOLOGY_BRAND:
+ MECapability->IntelSmallBusiness = 1;
+ break;
+ }
+
+ MECapability->MeMajorVer = MbpData.MeBiosPayload.FwVersionName.MajorVersion;
+ MECapability->MeMinorVer = MbpData.MeBiosPayload.FwVersionName.MinorVersion;
+ MECapability->MeBuildNo = MbpData.MeBiosPayload.FwVersionName.BuildVersion;
+ MECapability->MeHotFixNo = MbpData.MeBiosPayload.FwVersionName.HotfixVersion;
+
+ return EFI_SUCCESS;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: UpdateAmtSmbiosTable
+//
+// Description: SMBIOS tables 81, 82 and 83 are filled here
+//
+// Input: EFI_EVENT Event,
+// VOID *ParentImageHandle
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+UpdateAmtSmbiosTable(
+ EFI_EVENT Event,
+ VOID *ParentImageHandle
+)
+{
+ EFI_STATUS Status;
+ EFI_MISC_OEM_TYPE_0x81 Data81;
+ EFI_MISC_OEM_TYPE_0x82 Data82;
+ EFI_SMBIOS_PROTOCOL *mSmbiosProtocol;
+ UINT32 Attributes;
+ UINTN DataSize;
+ ME_BIOS_EXTENSION_SETUP MeBiosExtensionSetup;
+ UINT32 MeEnabled;
+ ME_CAP MeCapabilities;
+#if VA_SUPPORT
+ EFI_VA_NVM_VAR VaNVMVar;
+#endif
+
+
+ Status = MePolicyLibInit();
+ ASSERT_EFI_ERROR(Status);
+
+ Status = AmtPolicyLibInit();
+ ASSERT_EFI_ERROR(Status);
+
+ mSmbiosProtocol = NULL;
+ Status = gBS->LocateProtocol(
+ &gEfiSmbiosProtocolGuid,
+ NULL,
+ &mSmbiosProtocol
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ //Clear all data
+ gBS->SetMem (&Data81, sizeof(EFI_MISC_OEM_TYPE_0x81), 0);
+ gBS->SetMem (&Data82, sizeof(EFI_MISC_OEM_TYPE_0x82), 0);
+ gBS->SetMem (&MeCapabilities, sizeof(ME_CAP), 0);
+
+ //fill
+ Data81.Header.Type = 0x81;
+ Data81.Header.Length = 8;
+ Data81.Header.Handle = 0;
+ Data81.DescString = 1;
+ Data81.StructureVersion = 1;
+ Data81.SystemId = 2;
+ if(AsfSupported())
+ Data81.Attribute = 1;
+ else
+ Data81.Attribute = 0;
+
+ gBS->CopyMem (
+ Data81.DescStringAscii,
+ EFI_OEM_ASF_DESCRIPTIONSTRING,
+ sizeof (EFI_OEM_ASF_DESCRIPTIONSTRING)
+ );
+
+ gBS->CopyMem (
+ Data81.SystemIdAscii,
+ EFI_OEM_ASF_SYSTEMIDSTRING,
+ (sizeof (EFI_OEM_ASF_SYSTEMIDSTRING) - 1)
+ );
+ //
+ Data82.Header.Type = 0x82;
+ Data82.Header.Length = 0x14;
+ Data82.Header.Handle = 0;
+ gBS->CopyMem (
+ Data82.AmtSignature,
+ AMT_Signature,
+ sizeof (UINT32)
+ );
+
+// Data82
+
+ if(AmtSupported()){
+ MeEnabled = *((volatile UINT32 *)(UINTN)((PciMeRegBase) + FW_STATUS_REGISTER));
+ //
+ // Make sure Me is in normal mode & hasn't any error
+ //
+ if ((MeEnabled & 0xFF000) == 0) {
+ Status = GetMeFwInfoFromMBP(&MeCapabilities);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ }
+
+ if( MeCapabilities.IntelAmtFw ==1) {
+ Data82.AmtSupported = 1;
+ }
+
+ Attributes = EFI_VARIABLE_NON_VOLATILE;
+ DataSize = sizeof (ME_BIOS_EXTENSION_SETUP);
+ Status = gRT->GetVariable (
+ gEfiMeBiosExtensionSetupName,
+ &gEfiMeBiosExtensionSetupGuid,
+ &Attributes,
+ &DataSize,
+ &MeBiosExtensionSetup
+ );
+
+ if (!EFI_ERROR(Status)) {
+ if(MeCapabilities.IntelAmtFw == 1) {
+ if(MeBiosExtensionSetup.PlatformMngSel & MNT_ON) {
+ Data82.AmtEnabled = 1;
+ } else {
+ Data82.AmtEnabled = 0;
+ }
+
+ if(MeBiosExtensionSetup.AmtSolIder & IDER_ENABLE) {
+ Data82.IderEnabled = 1;
+ } else {
+ Data82.IderEnabled = 0;
+ }
+
+ if (MeBiosExtensionSetup.AmtSolIder & SOL_ENABLE) {
+ Data82.SolEnabled = 1;
+ } else {
+ Data82.SolEnabled = 0;
+ }
+ Data82.NetworkEnabled = 1; // If AMT enabled, LAN is always enabled
+
+ }
+
+ if(MeCapabilities.IntelKVM) {
+ if (MeBiosExtensionSetup.KvmEnable & KVM_ENABLE) {
+ Data82.KvmEnabled = 1;
+ } else {
+ Data82.KvmEnabled = 0;
+ }
+ }
+ }
+ }
+ else {
+ Data82.AmtEnabled = 0;
+ Data82.IderEnabled = 0;
+ Data82.SolEnabled = 0;
+ Data82.KvmEnabled = 0;
+ Data82.NetworkEnabled = 0;
+ }
+
+ Data82.ExtendedData = 0xA5;
+ Data82.OemCapabilities1 = 0x2F;
+ Data82.OemCapabilities2 = 0x02;
+#if defined(SecureBoot_SUPPORT) && (SecureBoot_SUPPORT == 1)
+ Data82.OemCapabilities3 = 1;
+#else
+ Data82.OemCapabilities3 = 0;
+#endif
+ Data82.OemCapabilities4 = 0;
+
+ Status = mSmbiosProtocol->SmbiosAddStructure((UINT8 *)&Data82, sizeof(EFI_MISC_OEM_TYPE_0x82));
+ gBS->CloseEvent(Event);
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: iAMTSMBiosDriverEntryPoint
+//
+// Description: iAMT SMBIOS driver entry point
+//
+// Input: EFI_HANDLE ImageHandle,
+// EFI_SYSTEM_TABLE *SystemTable
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+AmtSmbiosEntryPoint(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+ DXE_MBP_DATA_PROTOCOL *MbpDataBuf;
+ EfiInitializeDriverLib (ImageHandle, SystemTable);
+
+ Status = gBS->LocateProtocol (&gMeBiosPayloadDataProtocolGuid, NULL, &MbpDataBuf);
+
+ gBS->CopyMem (
+ &MbpData,
+ MbpDataBuf,
+ sizeof (DXE_MBP_DATA_PROTOCOL)
+ );
+ Status = EfiCreateEventReadyToBootEx(
+ EFI_TPL_CALLBACK,
+ UpdateAmtSmbiosTable,
+ (VOID *)&ImageHandle,
+ &mLegacyBootEvent
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.cif b/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.cif
new file mode 100644
index 0000000..b84bee9
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "AmtSmbios"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\AmtWrapper\AmtSmbios\"
+ RefName = "AmtSmbios"
+[files]
+"AmtSmbios.sdl"
+"AmtSmbios.mak"
+"AmtSmbios.c"
+"AmtSmbios.dxs"
+"AmtSmbios.h"
+<endComponent>
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.dxs b/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.dxs
new file mode 100644
index 0000000..b95943c
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.dxs
@@ -0,0 +1,70 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSmbios/AmtSmbios.dxs 1 2/08/12 1:09a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:09a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSmbios/AmtSmbios.dxs $
+//
+// 1 2/08/12 1:09a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+//
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AMTSmbios.dxs
+//
+// Description: AMT Smbios dependency file.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include "EfiDepex.h"
+
+#include "Protocol\SmbiosGetFlashDataProtocol.h"
+#include EFI_PROTOCOL_DEFINITION (AmtPlatformPolicy)
+#include EFI_PROTOCOL_DEFINITION (Heci)
+#include EFI_PROTOCOL_DEFINITION (MePlatformPolicy)
+
+DEPENDENCY_START
+ EFI_SMBIOS_PROTOCOL_GUID AND
+ DXE_PLATFORM_AMT_POLICY_GUID AND
+ EFI_HECI_PROTOCOL_GUID AND
+ DXE_PLATFORM_ME_POLICY_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.h b/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.h
new file mode 100644
index 0000000..7a7d30b
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.h
@@ -0,0 +1,124 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSmbios/AmtSmbios.h 1 2/08/12 1:09a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:09a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSmbios/AmtSmbios.h $
+//
+// 1 2/08/12 1:09a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 2 12/16/10 3:47a Klzhan
+// Remove un-use structure.
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+//
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AMTSmbios.dxs
+//
+// Description: AMT Smbios include file.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include "Token.h"
+#include <Tiano.h>
+#include <Include\Protocol\SMBios.h>
+#include <Include\Protocol\SmbiosGetFlashDataProtocol.h>
+#include <AmtLib.h>
+#include <MeLib.h>
+#include "CpuFuncs.h"
+
+#include EFI_GUID_DEFINITION (MeBiosExtensionSetup)
+#include EFI_GUID_DEFINITION (GlobalVariable)
+#include EFI_PROTOCOL_DEFINITION (PciIo)
+#include EFI_PROTOCOL_CONSUMER (PciRootBridgeIo)
+#include EFI_PROTOCOL_DEPENDENCY (SaPlatformPolicy)
+#include EFI_PROTOCOL_CONSUMER (Heci)
+#include EFI_PROTOCOL_CONSUMER (TcgService)
+
+#if VA_SUPPORT
+#include EFI_PROTOCOL_DEFINITION(PlatformVaPolicy)
+#endif
+
+#define EFI_OEM_ASF_DESCRIPTIONSTRING "Intel_ASF"
+#define EFI_OEM_ASF_SYSTEMIDSTRING "Intel_ASF_001"
+#define AMT_Signature "$AMT"
+
+#define PciMeRegBase PCIEX_BASE_ADDRESS + (UINT32) (22 << 15)
+#define FW_STATUS_REGISTER 0x40
+
+//
+// This is definition for SMBIOS Oem data type 0x81
+//
+#pragma pack (1)
+typedef struct {
+ SMBIOS_STRUCTURE_HEADER Header;
+ UINT8 DescString;// String number
+ UINT8 StructureVersion;
+ UINT8 SystemId;// String number
+ UINT8 Attribute;
+ UINT8 DescStringAscii[sizeof(EFI_OEM_ASF_DESCRIPTIONSTRING)];
+ UINT8 SystemIdAscii[sizeof(EFI_OEM_ASF_SYSTEMIDSTRING)-1];
+ UINT16 Zero; //terminator
+} EFI_MISC_OEM_TYPE_0x81;
+
+//
+// This is definition for SMBIOS Oem data type 0x82
+//
+typedef struct {
+ SMBIOS_STRUCTURE_HEADER Header;
+ UINT8 AmtSignature[4];
+ UINT8 AmtSupported;
+ UINT8 AmtEnabled;
+ UINT8 IderEnabled;
+ UINT8 SolEnabled;
+ UINT8 NetworkEnabled;
+ UINT8 ExtendedData;
+ UINT8 OemCapabilities1;
+ UINT8 OemCapabilities2;
+ UINT8 OemCapabilities3;
+ UINT8 OemCapabilities4;
+ UINT8 KvmEnabled;
+ UINT8 Reserved;
+ UINT16 Zero; //terminator
+} EFI_MISC_OEM_TYPE_0x82;
+
+#pragma pack ()
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.mak b/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.mak
new file mode 100644
index 0000000..1a1f3eb
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.mak
@@ -0,0 +1,108 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSmbios/AmtSmbios.mak 2 2/23/12 8:59a Klzhan $
+#
+# $Revision: 2 $
+#
+# $Date: 2/23/12 8:59a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtSmbios/AmtSmbios.mak $
+#
+# 2 2/23/12 8:59a Klzhan
+# Support New EDK
+#
+# 1 2/08/12 1:09a Klzhan
+# Initial Check in
+#
+# 1 2/25/11 1:44a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:11a Klzhan
+# Initial Check-in.
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#---------------------------------------------------------------------------
+# Name: AMTSmbios.dxs
+#
+# Description: AMT Smbios Makfile.
+#
+#---------------------------------------------------------------------------
+#<AMI_FHDR_END>
+# MAK file for the ModulePart:AmtSmbios
+all : AmtSmbios
+
+$(BUILD_DIR)\AmtSmbios.mak : $(AmtSmbios_DIR)\$(@B).cif $(AmtSmbios_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(AmtSmbios_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+AmtSmbios : $(BUILD_DIR)\AmtSmbios.mak AmtSmbiosBin
+
+AmtSmbios_INCLUDES=\
+ $(ME_INCLUDES)\
+ $(EDK_INCLUDES)\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+ $(INTEL_MCH_INCLUDES)\
+ $(NB_INCLUDES)\
+ /I$(BOARD_DIR) \
+ $(MISCFRAMEWORK_INCLUDES)\
+
+
+AmtSmbios_LIBS=\
+ $(AmtLibDxe_LIB)\
+ $(MeLibDxe_LIB)\
+ $(EDKPROTOCOLLIB)\
+ $(EFIDRIVERLIB)\
+ $(CPUIA32LIB)\
+ $(VaProtocolLib_LIB)\
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EdkIIGlueUefiLib_LIB)\
+
+AmtSmbiosBin : $(AmtSmbios_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\AmtSmbios.mak all \
+ NAME=AmtSmbios \
+ MAKEFILE=$(BUILD_DIR)\AmtSmbios.mak \
+ "MY_INCLUDES=$(AmtSmbios_INCLUDES)" \
+ GUID=A8C67255-E029-4b1a-968E-ECA6E9C11C73 \
+ ENTRY_POINT=AmtSmbiosEntryPoint \
+ DEPEX1=$(AmtSmbios_DIR)\AmtSmbios.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ TYPE=BS_DRIVER \
+ COMPRESS=1
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.sdl b/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.sdl
new file mode 100644
index 0000000..d39f449
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtSmbios/AmtSmbios.sdl
@@ -0,0 +1,25 @@
+TOKEN
+ Name = "AmtSmbios_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable iAmtSmbios support in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "AmtSmbios_DIR"
+ Help = "AMT Smbios file source directory"
+End
+
+MODULE
+ Help = "Includes AmtSmbios.mak to Project"
+ File = "AmtSmbios.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AmtSmbios.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCode.cif b/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCode.cif
new file mode 100644
index 0000000..dcc3413
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCode.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "AmtStatusCode"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\AmtWrapper\AmtStatusCode"
+ RefName = "AmtStatusCode"
+[files]
+"AmtStatusCode.sdl"
+"AmtStatusCode.mak"
+"AmtStatusCodePei.c"
+"AmtStatusCodeDxe.c"
+"AmtStatusCodeSmm.c"
+<endComponent>
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCode.mak b/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCode.mak
new file mode 100644
index 0000000..d75f602
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCode.mak
@@ -0,0 +1,81 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtStatusCode/AmtStatusCode.mak 1 2/08/12 1:10a Klzhan $
+#
+# $Revision: 1 $
+#
+# $Date: 2/08/12 1:10a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtStatusCode/AmtStatusCode.mak $
+#
+# 1 2/08/12 1:10a Klzhan
+# Initial Check in
+#
+# 1 2/25/11 1:44a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:10a Klzhan
+# Initial Check-in.
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#---------------------------------------------------------------------------
+# Name: AMTStatusCode.mak
+#
+# Description: AMT Status Code Makfile.
+#
+#---------------------------------------------------------------------------
+#<AMI_FHDR_END>
+
+#---------------------------------------------------------------------------
+# AMT StatusCode for DXE
+#---------------------------------------------------------------------------
+CORE_DXEBin : $(BUILD_DIR)\$(STATUS_CODE_DIR)\AmtStatusCodeDxe.obj
+
+$(BUILD_DIR)\$(STATUS_CODE_DIR)\AmtStatusCodeDxe.obj : $(AmtStatusCode_DIR)\AmtStatusCodeDxe.c
+ $(CC) $(CFLAGS:/W4=/W3) /DTIANO_RELEASE_VERSION=0x00080006 /DDXE_STATUS_CODE $(AlertStandardFormatDxe_INCLUDES) $(EDK_INCLUDES) $(STATUS_CODE_INCLUDES) /Fo$(BUILD_DIR)\$(STATUS_CODE_DIR)\AmtStatusCodeDxe.obj $(AmtStatusCode_DIR)\AmtStatusCodeDxe.c
+
+#---------------------------------------------------------------------------
+# AMT StatusCode for PEI
+#---------------------------------------------------------------------------
+CORE_PEIBin : $(BUILD_DIR)\$(STATUS_CODE_DIR)\AmtStatusCodePei.obj
+
+$(BUILD_DIR)\$(STATUS_CODE_DIR)\AmtStatusCodePei.obj : $(AmtStatusCode_DIR)\AmtStatusCodePei.c
+ $(CCPEI) $(CFLAGS:/W4=/W3) /DTIANO_RELEASE_VERSION=0x00080006 /DPEI_STATUS_CODE /IEDK\Foundation\Include\IA32 $(AlertStandardFormatPei_INCLUDES) $(EDK_INCLUDES) $(ME_INCLUDES) $(STATUS_CODE_INCLUDES) /Fo$(BUILD_DIR)\$(STATUS_CODE_DIR)\AmtStatusCodePei.obj $(AmtStatusCode_DIR)\AmtStatusCodePei.c
+
+#---------------------------------------------------------------------------
+# AMT StatusCode for SMM
+#---------------------------------------------------------------------------
+SmmStatusCodeBin : $(BUILD_DIR)\$(SmmStatusCode_DIR)\AmtStatusCodeSmm.obj
+
+$(BUILD_DIR)\$(SmmStatusCode_DIR)\AmtStatusCodeSmm.obj : $(AmtStatusCode_DIR)\AmtStatusCodeSmm.c
+ $(CC) $(CFLAGS:/W4=/W3) /DTIANO_RELEASE_VERSION=0x00080006 /DSMM_STATUS_CODE $(AlertStandardFormat_INCLUDES) $(ME_INCLUDES) $(STATUS_CODE_INCLUDES) $(CORE_INCLUDES) /Fo$(BUILD_DIR)\$(SmmStatusCode_DIR)\AmtStatusCodeSmm.obj $(AmtStatusCode_DIR)\AmtStatusCodeSmm.c
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCode.sdl b/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCode.sdl
new file mode 100644
index 0000000..f83c100
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCode.sdl
@@ -0,0 +1,42 @@
+TOKEN
+ Name = "AmtStatusCode_SUPPORT"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Help = "Main switch to enable AmtStatusCode support in Project"
+End
+
+MODULE
+ Help = "Includes AmtStatusCode.mak to Project"
+ File = "AmtStatusCode.mak"
+End
+
+PATH
+ Name = "AmtStatusCode_DIR"
+End
+
+ELINK
+ Name = "AmtStatusCode,"
+ Parent = "ReportMiscStatus"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "AmtStatusInit,"
+ Parent = "StatusCodeInitialize"
+ InvokeOrder = AfterParent
+End
+
+#ELINK
+# Name = "SmmAmtStatusCode,"
+# Parent = "SmmReportMiscStatus"
+# InvokeOrder = AfterParent
+#End
+
+#ELINK
+# Name = "SmmAmtStatusInit,"
+# Parent = "SmmStatusCodeInitialize"
+# InvokeOrder = AfterParent
+#End
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCodeDxe.c b/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCodeDxe.c
new file mode 100644
index 0000000..7cae372
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCodeDxe.c
@@ -0,0 +1,151 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtStatusCode/AmtStatusCodeDxe.c 1 2/08/12 1:10a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:10a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtStatusCode/AmtStatusCodeDxe.c $
+//
+// 1 2/08/12 1:10a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+//
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AMTStatusDxeCode.c
+//
+// Description: Processes ASF messages for DXE.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+
+Module Name:
+
+ AmtStatusCodeDxe.c
+
+Abstract:
+ Processes ASF messages
+
+--*/
+
+#include "Tiano.h"
+#include "Pei.h"
+#include EFI_PPI_DEFINITION (StatusCode)
+
+VOID AmtStatusCode(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId OPTIONAL,
+ IN EFI_STATUS_CODE_DATA *Data OPTIONAL
+)
+/*++
+Routine Description:
+
+ Provides an interface that a software module can call to report an ASF DXE status code.
+
+Arguments:
+
+ PeiServices - PeiServices pointer.
+
+ Type - Indicates the type of status code being reported.
+
+ Value - Describes the current status of a hardware or software entity.
+ This included information about the class and subclass that is
+ used to classify the entity as well as an operation.
+
+ Instance - The enumeration of a hardware or software entity within
+ the system. Valid instance numbers start with 1.
+
+ CallerId - This optional parameter may be used to identify the caller.
+ This parameter allows the status code driver to apply different
+ rules to different callers.
+
+ Data - This optional parameter may be used to pass additional data.
+
+Returns:
+
+ None
+
+--*/
+{
+ //
+ // Do nothing, because AMT ASF driver will handle that.
+ //
+ return ;
+}
+
+EFI_STATUS
+AmtStatusInit(
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+)
+/*++
+Routine Description:
+
+ Init routine for DXE ASF StatusCode.
+
+Arguments:
+
+ FfsHeader - FfsHeader pointer.
+ PeiServices - PeiServices pointer.
+
+Returns:
+
+ EFI_SUCCESS - The function completed successfully
+
+--*/
+{
+ //
+ // Do nothing, because AMT ASF driver will handle that.
+ //
+ return EFI_SUCCESS;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCodePei.c b/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCodePei.c
new file mode 100644
index 0000000..8cf18ba
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCodePei.c
@@ -0,0 +1,224 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtStatusCode/AmtStatusCodePei.c 1 2/08/12 1:10a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:10a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtStatusCode/AmtStatusCodePei.c $
+//
+// 1 2/08/12 1:10a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+//
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AMTStatusCodePei.c
+//
+// Description: Processes ASF messages for Pei.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+
+Module Name:
+
+ AmtStatusCodePei.c
+
+Abstract:
+ Processes ASF messages
+
+--*/
+
+#include "Tiano.h"
+#include "Pei.h"
+#include EFI_PPI_DEFINITION (StatusCode)
+
+#include EFI_PPI_DEFINITION (AmtStatusCode)
+
+EFI_GUID mPeiAmtStatusCodePpiGuid = PEI_AMT_STATUS_CODE_PPI_GUID;
+EFI_GUID mAmtPETQueueHobGuid = AMT_PET_QUEUE_HOB_GUID;
+
+EFI_STATUS
+AmtQueuePetMessage (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value
+ )
+/*++
+Routine Description:
+
+ This routine puts PET message to MessageQueue, which will be sent later.
+
+Arguments:
+
+ PeiServices - PeiServices pointer.
+ Type - StatusCode message type.
+ Value - StatusCode message value.
+
+Returns:
+
+ EFI_SUCCESS - The function completed successfully
+
+--*/
+{
+ AMT_PET_QUEUE_HOB *PETQueueHob;
+ EFI_STATUS Status;
+
+ // Create PET queue hob
+ Status = (**PeiServices).CreateHob ( PeiServices, \
+ EFI_HOB_TYPE_GUID_EXTENSION, \
+ sizeof(AMT_PET_QUEUE_HOB), \
+ &PETQueueHob );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ PETQueueHob->EfiHobGuidType.Name = mAmtPETQueueHobGuid;
+ PETQueueHob->Type = Type;
+ PETQueueHob->Value = Value;
+
+ return EFI_SUCCESS;
+}
+
+VOID AmtStatusCode(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId OPTIONAL,
+ IN EFI_STATUS_CODE_DATA *Data OPTIONAL
+)
+/*++
+Routine Description:
+
+ Provides an interface that a software module can call to report an ASF PEI status code.
+
+Arguments:
+
+ PeiServices - PeiServices pointer.
+
+ Type - Indicates the type of status code being reported.
+
+ Value - Describes the current status of a hardware or software entity.
+ This included information about the class and subclass that is
+ used to classify the entity as well as an operation.
+
+ Instance - The enumeration of a hardware or software entity within
+ the system. Valid instance numbers start with 1.
+
+ CallerId - This optional parameter may be used to identify the caller.
+ This parameter allows the status code driver to apply different
+ rules to different callers.
+
+ Data - This optional parameter may be used to pass additional data.
+
+Returns:
+
+ None
+
+--*/
+{
+ PEI_AMT_STATUS_CODE_PPI *AmtStatusCode;
+ EFI_STATUS Status;
+
+ Status = (*PeiServices)->LocatePpi( PeiServices, \
+ &mPeiAmtStatusCodePpiGuid, \
+ 0, \
+ NULL, \
+ &AmtStatusCode );
+ if ( EFI_ERROR (Status) ) {
+ if (((Type & EFI_STATUS_CODE_TYPE_MASK) != EFI_PROGRESS_CODE) &&
+ ((Type & EFI_STATUS_CODE_TYPE_MASK) != EFI_ERROR_CODE)) {
+ return ;
+ }
+
+ // Register to Hob
+
+ // Create PET queue hob
+ AmtQueuePetMessage (PeiServices, Type, Value);
+
+ return ;
+ }
+
+ AmtStatusCode->ReportStatusCode (
+ PeiServices,
+ AmtStatusCode,
+ Type,
+ Value,
+ Instance,
+ CallerId,
+ Data
+ );
+
+ return ;
+}
+
+EFI_STATUS
+AmtStatusInit(
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+)
+/*++
+Routine Description:
+
+ Init routine for PEI ASF StatusCode.
+
+Arguments:
+
+ FfsHeader - FfsHeader pointer.
+ PeiServices - PeiServices pointer.
+
+Returns:
+
+ EFI_SUCCESS - The function completed successfully
+
+--*/
+{
+ return EFI_SUCCESS;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCodeSmm.c b/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCodeSmm.c
new file mode 100644
index 0000000..63b3919
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtStatusCode/AmtStatusCodeSmm.c
@@ -0,0 +1,368 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtStatusCode/AmtStatusCodeSmm.c 1 2/08/12 1:10a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:10a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtStatusCode/AmtStatusCodeSmm.c $
+//
+// 1 2/08/12 1:10a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:11a Klzhan
+// Initial Check-in.
+//
+//**********************************************************************
+//
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: AMTStatusCodePei.c
+//
+// Description: Processes ASF messages for Pei.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+
+Module Name:
+
+ AmtStatusCodeSmm.c
+
+Abstract:
+ Processes ASF messages
+
+--*/
+
+#include "Tiano.h"
+#include "Pei.h"
+#include EFI_PROTOCOL_DEFINITION (SmmBase)
+#include EFI_PROTOCOL_DEFINITION (SmmStatusCode)
+#include "Protocol/AmtStatusCodeSmm/AmtStatusCodeSmm.h"
+//#include EFI_PROTOCOL_DEFINITION (AmtStatusCodeSmm)
+
+EFI_GUID mAmtSmmStatusCodeProtocolGuid = AMT_SMM_STATUS_CODE_PROTOCOL_GUID;
+EFI_GUID gAmtSmmPETQueueProtocolGuid = AMT_SMM_PET_QUEUE_PROTOCOL_GUID;
+
+AMT_SMM_PET_QUEUE_PROTOCOL gAmtSmmPETQueue;
+AMT_SMM_PET_QUEUE_PROTOCOL *gAmtSmmPETQueueProtocol;
+
+AMT_SMM_STATUS_CODE_PROTOCOL *mAmtSmmStatusCode;
+
+EFI_SYSTEM_TABLE *pST;
+EFI_BOOT_SERVICES *pBS;
+EFI_RUNTIME_SERVICES *pRS;
+EFI_SMM_BASE_PROTOCOL *pSmmBase;
+EFI_SMM_SYSTEM_TABLE *pSmst;
+
+VOID
+AmtInitializeListHead (
+ EFI_LIST_ENTRY *List
+ )
+{
+ List->ForwardLink = List;
+ List->BackLink = List;
+}
+
+VOID
+AmtInsertTailList (
+ EFI_LIST_ENTRY *ListHead,
+ EFI_LIST_ENTRY *Entry
+ )
+{
+ EFI_LIST_ENTRY *_ListHead;
+ EFI_LIST_ENTRY *_BackLink;
+
+ _ListHead = ListHead;
+ _BackLink = _ListHead->BackLink;
+ Entry->ForwardLink = _ListHead;
+ Entry->BackLink = _BackLink;
+ _BackLink->ForwardLink = Entry;
+ _ListHead->BackLink = Entry;
+}
+
+EFI_STATUS
+AmtQueuePetMessage (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value
+ )
+/*++
+Routine Description:
+
+ This routine puts PET message to MessageQueue, which will be sent later.
+
+Arguments:
+
+ PeiServices - PeiServices pointer.
+ Type - StatusCode message type.
+ Value - StatusCode message value.
+
+Returns:
+
+ EFI_SUCCESS - The function completed successfully
+
+--*/
+{
+ AMT_SMM_PET_QUEUE_NODE *NewNode;
+ EFI_STATUS Status;
+
+ Status = pSmmBase->SmmAllocatePool (
+ pSmmBase,
+ EfiRuntimeServicesData,
+ sizeof (AMT_SMM_PET_QUEUE_NODE),
+ &NewNode
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ NewNode->Signature = AMT_SMM_PET_QUEUE_NODE_SIGNATURE;
+ NewNode->Type = Type;
+ NewNode->Value = Value;
+ AmtInsertTailList (&gAmtSmmPETQueueProtocol->MessageList, &NewNode->Link);
+
+ return EFI_SUCCESS;
+}
+
+VOID SmmAmtStatusCode(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId OPTIONAL,
+ IN EFI_STATUS_CODE_DATA *Data OPTIONAL
+)
+/*++
+Routine Description:
+
+ Provides an interface that a software module can call to report an ASF DXE status code.
+
+Arguments:
+
+ PeiServices - PeiServices pointer.
+
+ Type - Indicates the type of status code being reported.
+
+ Value - Describes the current status of a hardware or software entity.
+ This included information about the class and subclass that is
+ used to classify the entity as well as an operation.
+
+ Instance - The enumeration of a hardware or software entity within
+ the system. Valid instance numbers start with 1.
+
+ CallerId - This optional parameter may be used to identify the caller.
+ This parameter allows the status code driver to apply different
+ rules to different callers.
+
+ Data - This optional parameter may be used to pass additional data.
+
+Returns:
+
+ None
+
+--*/
+{
+ if (mAmtSmmStatusCode == NULL) {
+ if (((Type & EFI_STATUS_CODE_TYPE_MASK) != EFI_PROGRESS_CODE) &&
+ ((Type & EFI_STATUS_CODE_TYPE_MASK) != EFI_ERROR_CODE)) {
+ return ;
+ }
+
+ // Register to Queue
+ AmtQueuePetMessage (PeiServices, Type, Value);
+
+ return ;
+ }
+
+ mAmtSmmStatusCode->ReportStatusCode (
+ mAmtSmmStatusCode,
+ Type,
+ Value,
+ Instance,
+ CallerId,
+ Data
+ );
+
+ return ;
+}
+
+VOID
+EFIAPI
+AmtCallback (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+/*++
+Routine Description:
+
+ ASF SMM StatusCode Callback.
+
+Arguments:
+
+ Event - ASF StatusCode Callback Event.
+
+ Context - ASF StatusCode Callback Context.
+
+Returns:
+
+ None
+
+--*/
+{
+ pBS->LocateProtocol ( &mAmtSmmStatusCodeProtocolGuid, NULL, &mAmtSmmStatusCode );
+
+ return;
+}
+
+EFI_STATUS
+AmtCreateMessageQueue (
+ VOID
+ )
+/*++
+Routine Description:
+
+ This routine creats PET MessageQueue.
+
+Arguments:
+
+ None
+
+Returns:
+
+ EFI_SUCCESS - The function completed successfully
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_HANDLE Handle;
+
+ Status = pBS->LocateProtocol (
+ &gAmtSmmPETQueueProtocolGuid,
+ NULL,
+ &gAmtSmmPETQueueProtocol
+ );
+ if (!EFI_ERROR (Status)) {
+ return EFI_SUCCESS;
+ }
+
+ //
+ // Create Queue for later usage
+ //
+ gAmtSmmPETQueueProtocol = &gAmtSmmPETQueue;
+
+ AmtInitializeListHead (&gAmtSmmPETQueueProtocol->MessageList);
+ Handle = NULL;
+ Status = pBS->InstallProtocolInterface (
+ &Handle,
+ &gAmtSmmPETQueueProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &gAmtSmmPETQueue
+ );
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+SmmAmtStatusInit(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+/*++
+Routine Description:
+
+ Init routine for SMM ASF StatusCode.
+
+Arguments:
+
+ FfsHeader - FfsHeader pointer.
+ PeiServices - PeiServices pointer.
+
+Returns:
+
+ EFI_SUCCESS - The function completed successfully
+
+--*/
+{
+ EFI_STATUS Status;
+ VOID *AmtRegistration;
+ EFI_EVENT Event;
+
+ pST=SystemTable;
+ pBS=SystemTable->BootServices;
+ pRS=SystemTable->RuntimeServices;
+ Status = pBS->LocateProtocol(&gEfiSmmBaseProtocolGuid, NULL, &pSmmBase);
+ Status = pSmmBase->GetSmstLocation(pSmmBase,&pSmst);
+
+ AmtCreateMessageQueue ();
+
+ Status = pBS->LocateProtocol ( &mAmtSmmStatusCodeProtocolGuid, NULL, &mAmtSmmStatusCode );
+ if ( !EFI_ERROR (Status) ) return EFI_SUCCESS;
+
+ //
+ // Create the event
+ //
+ Status = pBS->CreateEvent (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ AmtCallback,
+ NULL,
+ &Event
+ );
+ if (EFI_ERROR (Status)) return Status;
+
+ //
+ // Register for protocol notifactions on this event
+ // NOTE: Because this protocol will be installed in SMM, it is safety to
+ // register ProtocolNotify here. This event will be triggered in SMM later.
+ //
+ Status = pBS->RegisterProtocolNotify (
+ &mAmtSmmStatusCodeProtocolGuid,
+ Event,
+ &AmtRegistration
+ );
+ if (EFI_ERROR (Status)) return Status;
+
+ return EFI_SUCCESS;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtWrapper.cif b/Board/EM/MeWrapper/AmtWrapper/AmtWrapper.cif
new file mode 100644
index 0000000..7d6a54b
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtWrapper.cif
@@ -0,0 +1,19 @@
+<component>
+ name = "AmtWrapper"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\AmtWrapper\"
+ RefName = "AmtWrapper"
+[files]
+"AmtWrapper.sdl"
+[parts]
+"AmtWrapperDxe"
+"AmtSetup"
+"AmtPlatformPolicy"
+"AsfTable"
+"AmtWrapperProtocolLib"
+"AmtSmbios"
+"AmtPetAlert"
+"AmtStatusCode"
+"AmtLockKBD"
+"ASFVerbosity"
+<endComponent>
diff --git a/Board/EM/MeWrapper/AmtWrapper/AmtWrapper.sdl b/Board/EM/MeWrapper/AmtWrapper/AmtWrapper.sdl
new file mode 100644
index 0000000..1ccfb2b
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AmtWrapper.sdl
@@ -0,0 +1,20 @@
+TOKEN
+ Name = "AmtWrapper_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Help = "Main switch to enable AMT Wrapper support in Project"
+ Token = "iAMT_SUPPORT" "=" "1"
+End
+
+PATH
+ Name = "AmtWrapper_DIR"
+End
+
+ELINK
+ Name = "/I$(AmtWrapper_DIR)"
+ Parent = "ME_INCLUDES"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.c b/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.c
new file mode 100644
index 0000000..4deedd4
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.c
@@ -0,0 +1,300 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AsfTable/AsfTable.c 3 6/18/14 3:14a Larryliu $
+//
+// $Revision: 3 $
+//
+// $Date: 6/18/14 3:14a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AsfTable/AsfTable.c $
+//
+// 3 6/18/14 3:14a Larryliu
+// [TAG] EIP173999
+// [Category] Improvement
+// [Description] [HWR]Remove useless comments from Intel ME
+// component.(except RC)
+// [Files] AsfTable.c
+//
+// 1 2/08/12 1:09a Klzhan
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AsfTable.c
+//
+// Description: Create ASF Acpi table
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include "AsfTable.h"
+
+EFI_GUID gAcpiSupportGuid = EFI_ACPI_SUPPORT_GUID;
+
+EFI_STATUS
+AsfBuildTbl(
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ );
+
+//----------------------------------------------------------------------------
+// Variable declaration
+//----------------------------------------------------------------------------
+VOID *mAsfRegistration;
+
+//
+// Driver entry point
+//
+EFI_DRIVER_ENTRY_POINT (AsfTableEntryPoint);
+
+//
+// Function implementations
+//
+EFI_STATUS
+EFIAPI
+AsfTableEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_EVENT FilterEvent;
+ EFI_STATUS Status;
+
+ //
+ // Initialize the EFI Driver Library
+ //
+ EfiInitializeDriverLib (ImageHandle, SystemTable);
+
+ Status = gBS->CreateEvent ( EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ AsfBuildTbl,
+ NULL,
+ &FilterEvent);
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ // Register for protocol notifactions on this event
+ Status = gBS->RegisterProtocolNotify ( &gAcpiSupportGuid,
+ FilterEvent,
+ &mAsfRegistration);
+
+ ASSERT_EFI_ERROR (Status);
+
+ gBS->SignalEvent (FilterEvent);
+
+ return Status;
+}
+
+//-----------------------------------------------------------------------------
+// ASF Table
+//-----------------------------------------------------------------------------
+//The table shound be runtime build like as ASFBSP
+//
+// ASF Definitions
+//
+#define EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE_REVISION 0x20
+
+// need to update to asl asf 2.0 table....
+EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE ASF_TABLE = {
+ EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE_SIGNATURE,
+ sizeof (EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE),
+ EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE_REVISION,
+ 0, // to make sum of entire table == 0
+
+ // OEM identification
+ 'I', 'N', 'T', 'E', 'L', ' ',
+
+ // OEM table identification
+ ((((((((((((('D' << 8) + '8') << 8) + '6') << 8) + '5') << 8) + 'G') << 8) + 'C') << 8) + 'H') << 8) + ' ', // OEM table identification
+
+ 1, // OEM revision number
+ ((((('M' << 8) + 'S') << 8) + 'F') << 8) + 'T', // ASL compiler vendor ID
+ 1000000, // ASL compiler revision number
+
+ //
+ // ASF_INFO
+ //
+ 0x00, // Type "ASF_INFO"
+ 0x00, // Reserved
+ sizeof (EFI_ACPI_ASF_INFO), // Length
+ 0xFF, // Min Watchdog Reset Value
+ 0xFF, // Min ASF Sensor Inter-poll Wait Time
+ 0x0001, // System ID
+ 0x57010000, // IANA Manufacture ID for Intel
+ 0x00, // Feature Flag
+ 0x00, 0x00, 0x00, // Reserved
+
+ //
+ // ASF_ALRT
+ //
+
+ 0x01, // Type "ASF_ALRT"
+ 0x00, // Reserved
+ sizeof (EFI_ACPI_ASF_ALRT), // Length
+ 0x00, // Assertion Event Bit Mask
+ 0x00, // Deassertion Event Bit Mask
+ 0x03, // Number Of Alerts
+ 0x0C, // Array Element Length
+ //
+ // ICH Slave SMBUS Read devices
+ //
+ 0x89, 0x04, 0x01, 0x01, 0x05, 0x6F, 0x00, 0x68, 0x08, 0x88, 0x17, 0x00, // Device 0
+ 0x89, 0x04, 0x04, 0x04, 0x07, 0x6F, 0x00, 0x68, 0x20, 0x88, 0x03, 0x00, // Device 1
+ 0x89, 0x05, 0x01, 0x01, 0x19, 0x6F, 0x00, 0x68, 0x20, 0x88, 0x22, 0x00, // Device 2
+
+ //
+ // ASF_RCTL
+ //
+ 0x02, // Type "ASF_RCTL"
+ 0x00, // Reserved
+ sizeof (EFI_ACPI_ASF_RCTL), // Length
+ 0x04, // Number of Controls
+ 0x04, // Array Element Length
+ 0x0000, // Reserved
+ //
+ // ICH Slave SMBUS Write cmds
+ //
+ 0x00, 0x88, 0x00, 0x03, // Control 0 --> Reset system
+ 0x01, 0x88, 0x00, 0x02, // Control 1 --> Power Off system
+ 0x02, 0x88, 0x00, 0x01, // Control 2 --> Power On system
+ 0x03, 0x88, 0x00, 0x04, // Control 3 --> Power Cycle Reset (off then on)
+
+ //
+ // ASF_RCMP
+ //
+ 0x03, // Type "ASF_RCMP"
+ 0x00, // Reserved
+ sizeof (EFI_ACPI_ASF_RMCP), // Length
+
+ // Remote Control Capabilities supported Bit Masks
+ // =============================================
+ // System Firmware Capabilities Bit Mask Started
+ // =============================================
+ 0x21, // System Firmware Capabilities Bit Mask
+ // (two MSBytes are Rsvd,
+
+ // Bit7 RSVD
+ // Bit6 Support Sleep Button LOCK
+ // Bit5 Support KBD LOCK
+ // Bit4-3 RSVD
+ // Bit2 Support Reset Button LOCK
+ // Bit1 Support Power Button LOCK
+ // Bit0 Support Verbosity/ Blank Screen
+ 0xF8,
+ // Bit7 Support Configration Data Reset
+ // Bit6 Support Verbosity/ Quiet
+ // Bit5 Support Verbosity/ Verbose
+ // Bit4 Support Force Progress Event
+ // Bit3 Support User Password Bypass
+ // Bit2:0 RSVD
+ 0x00,
+ 0x00,
+ // =============================================
+ // Special Commands Bit Mask Started
+ // =============================================
+ 0x00, // RSVD
+ 0x13,
+ // Bit7:5 RSVD
+ // Bit4 Support Force CD/DVD Boot Command
+ // Bit3 Support Force Diagnostic Boot Command
+ // Bit2 Support Force Hard Drive Safe-mode Boot Command
+ // Bit1 Support Force Hard Drive Boot Command
+ // Bit0 Support Force PXE Boot Command
+ // =============================================
+ // System Capabilities Bit Mask Started
+ // =============================================
+ 0xF0, // System Capabilities Bit Mask (Supports Reset,
+ // Power-Up,Power-Down, Power-Cycle Reset
+ // for compat and secure port.
+ 0x00, // Boot Option Complete Code
+ 0x57010000, // IANA ID for Intel Manufacturer
+ 0x00, // Special Command
+ 0x00, 0x00, // Special Command Parameter
+ 0x00, 0x01, // Boot Options
+ 0x00, 0x00, // OEM Parameters
+
+ //
+ // ASF_ADDR
+ //
+ 0x84, // Type "ASF_ADDR", last record
+ 0x00, // Reserved
+ sizeof (EFI_ACPI_ASF_ADDR), // Length
+ 0x00, // SEEPROM Address
+ ASF_ADDR_DEVICE_ARRAY_LENGTH, // Number Of Devices
+ 0x5C, 0x68, 0x88, 0xC2, 0xD2, // Fixed SMBus Address (Heceta 6, 82573E device - static def (also an ARP addr),
+ 0xDC, 0xA0, 0xA2, 0xA4, 0xA6, // ICH Slave Device, SMB ARP, CK410, DB400/800, SDRAM SPD devices
+ 0xC8 // TEKOA Slave Device
+};
+
+EFI_STATUS
+AsfBuildTbl(
+ IN EFI_EVENT Event,
+ IN VOID *Context
+)
+{
+ EFI_STATUS Status;
+ UINTN AsfTableHandle=0;
+ EFI_ACPI_SUPPORT_PROTOCOL *AcpiSupport;
+ VOID *AsfStruc;
+
+ AsfStruc = (VOID *)&ASF_TABLE;
+
+ Status = gBS->LocateProtocol(&gAcpiSupportGuid,
+ NULL,
+ &AcpiSupport);
+ if (EFI_ERROR (Status))
+ {
+ return EFI_ABORTED;
+ }
+
+ Status = AcpiSupport->SetAcpiTable (AcpiSupport,
+ AsfStruc,
+ TRUE,
+ (EFI_ACPI_TABLE_VERSION_2_0|EFI_ACPI_TABLE_VERSION_1_0B),
+ &AsfTableHandle);
+ if (EFI_ERROR(Status))
+ {
+ // Handle the error appropriately
+ return EFI_ABORTED;
+ }
+
+ return Status;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.cif b/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.cif
new file mode 100644
index 0000000..bf83bbb
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "AsfTable"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\AmtWrapper\AsfTable"
+ RefName = "AsfTable"
+[files]
+"AsfTable.c"
+"AsfTable.h"
+"AsfTable.sdl"
+"AsfTable.mak"
+"AsfTable.dxs"
+<endComponent>
diff --git a/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.dxs b/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.dxs
new file mode 100644
index 0000000..1d031bb
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.dxs
@@ -0,0 +1,66 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AsfTable/AsfTable.dxs 1 2/08/12 1:09a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:09a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AsfTable/AsfTable.dxs $
+//
+// 1 2/08/12 1:09a Klzhan
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AsfTable.DXS
+//
+// Description: This file is the dependency file for the AsfTable driver
+//
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+DEPENDENCY_START
+ TRUE
+DEPENDENCY_END
+
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.h b/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.h
new file mode 100644
index 0000000..09cfc72
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.h
@@ -0,0 +1,70 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AsfTable/AsfTable.h 1 2/08/12 1:09a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:09a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AsfTable/AsfTable.h $
+//
+// 1 2/08/12 1:09a Klzhan
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AsfTable.h
+//
+// Description: Header file for ASF Acpi table
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#ifndef _ASF_TABLE_H_
+#define _ASF_TABLE_H_
+
+#include "Efi.h"
+#include "EfiDriverLib.h"
+#include "EfiCommonLib.h"
+#include "AlertStandardFormatTable.h"
+
+#include EFI_PROTOCOL_DEFINITION (AcpiSupport)
+
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.mak b/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.mak
new file mode 100644
index 0000000..65f6576
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.mak
@@ -0,0 +1,79 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AsfTable/AsfTable.mak 1 2/08/12 1:09a Klzhan $
+#
+# $Revision: 1 $
+#
+# $Date: 2/08/12 1:09a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AsfTable/AsfTable.mak $
+#
+# 1 2/08/12 1:09a Klzhan
+#
+# 1 2/25/11 1:44a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:10a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: AsfTable.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+EDK : AsfTable
+
+AsfTable : $(BUILD_DIR)\AsfTable.mak AsfTableBin
+
+$(BUILD_DIR)\AsfTable.mak : $(AsfTable_DIR)\$(@B).cif $(AsfTable_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(AsfTable_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+ASF_TABLE_INCLUDES=\
+ $(EDK_INCLUDES)\
+ $(MISCFRAMEWORK_INCLUDES)\
+ $(ME_INCLUDES)\
+ $(IndustryStandard_INCLUDES)\
+
+AsfTableBin : $(EFIDRIVERLIB) $(EFICOMMONLIB) $(PRINTLIB)
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\AsfTable.mak all\
+ GUID=E72527CF-505B-4b50-99CD-A32467FA4AA4\
+ "MY_INCLUDES=$(ASF_TABLE_INCLUDES)" \
+ ENTRY_POINT=AsfTableEntryPoint \
+ TYPE=BS_DRIVER LIBRARIES= \
+ DEPEX1=$(AsfTable_DIR)\AsfTable.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ COMPRESS=1\
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.sdl b/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.sdl
new file mode 100644
index 0000000..b370431
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/AsfTable/AsfTable.sdl
@@ -0,0 +1,24 @@
+TOKEN
+ Name = "AsfTable_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable AsfTable support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "AsfTable_DIR"
+End
+
+MODULE
+ Help = "Includes AsfTable.mak to Project"
+ File = "AsfTable.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AsfTable.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.c b/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.c
new file mode 100644
index 0000000..b5d4c0a
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.c
@@ -0,0 +1,883 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/AmtWrapperDxe.c 10 6/18/14 3:08a Larryliu $
+//
+// $Revision: 10 $
+//
+// $Date: 6/18/14 3:08a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/AmtWrapperDxe.c $
+//
+// 10 6/18/14 3:08a Larryliu
+// [TAG] EIP173999
+// [Category] Improvement
+// [Description] [HWR]Remove useless comments from Intel ME
+// component.(except RC)
+// [Files] AmtWrapperDxe.c
+//
+// 8 5/14/14 9:52p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 7 9/12/13 5:26a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Correct gSerialOverLanDevicePath
+//
+// 6 4/18/13 1:55a Klzhan
+// [TAG] EIP119190
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] BIOS doesn't wait for KVM pass code input.
+// [RootCause] The Con Out Start protocol GUID is different in AMI and
+// ME RC.
+// [Solution] Install ME RC ConOut Protocol when AMI ConOut Protocol
+// installed.
+// [Files] AmtWrapperDxe.c
+// AmtWrapperDxe.h
+//
+// 5 4/08/13 3:06a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Support New Security protocol.
+//
+// 4 10/30/12 8:33a Klzhan
+// Correct Secure IDER boot
+//
+// 3 8/14/12 7:24a Klzhan
+// Support UEFI IDER boot.
+//
+// 2 4/24/12 12:36a Klzhan
+// Update modulepart to latest
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 3 6/21/11 3:42a Klzhan
+// Fix comnpiler error if PCI COM is 0.
+//
+// 2 3/29/11 3:18a Klzhan
+// Remove un-used code.
+//
+// 1 2/25/11 1:43a Klzhan
+// Initial Check-in
+//
+// 2 12/28/10 2:00a Klzhan
+// Improvement : Enable/Disable Terminal item for SOL redirection.
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AmtWrapperDxe.c
+//
+// Description: Amt Wrapper Functions
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+Copyright (c) 2009 Intel Corporation. All rights reserved.
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+--*/
+#if EFI_SPECIFICATION_VERSION>0x20000
+#include "token.h"
+#define _HII_H_
+#define _FORM_CALLBACK_H_
+#define _GLOBAL_VARIABLE_GUID_H_
+#ifndef GUID_VARIABLE_DECLARATION
+#define GUID_VARIABLE_DECLARATION(Variable, Guid) extern EFI_GUID Variable
+#endif
+#include "AmtWrapperDxe.h"
+#else
+#include "AmtWrapperDxe.h"
+#include "token.h"
+#define __UEFI_HII__H__
+#define __HII_PROTOCOL_H__
+#define _HII_H_
+#endif
+#if defined(Terminal_SUPPORT) && (Terminal_SUPPORT == 1)
+#include "Core\Em\Terminal\TerminalSetupVar.h"
+#endif
+#include <SetupDataDefinition.h>
+#if defined(CORE_COMBINED_VERSION) && CORE_COMBINED_VERSION >=0x4028e
+#include <Protocol\Security2.h>
+#else
+#include <Protocol\Security.h>
+#endif
+
+#include <Amt.h>
+#include EFI_GUID_DEFINITION(ConsoleOutDevice)
+
+#define SETUP_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+
+AMT_WRAPPER_PROTOCOL AmtWrapperInstance = {
+ AmtWrapperInit,
+ AmtWrapperGet,
+ AmtWrapperSet,
+ AmtWrapperEnableSol,
+ AmtWrapperEnableIdeR,
+ AmtWrapperPauseBoot,
+ AmtWrapperEnterSetup,
+ //AsfSupportInit,
+ AmtWrapperBdsBootViaAsf,
+ BdsLibUpdateConsoleVariable,
+ ActiveManagementConsoleLocked,
+ AmtWrapperEnableKvm,
+ AmtWrapperInitializationKvm
+ };
+
+extern EFI_ACTIVE_MANAGEMENT_PROTOCOL *mActiveManagement;
+extern EFI_ASF_BOOT_OPTIONS *mAsfBootOptions;
+#if defined(LEGACYSREDIR_SUPPORT) && (LEGACYSREDIR_SUPPORT == 1)
+EFI_GUID gEfiLegacySredirProtocolGuid = EFI_LEGACY_SREDIR_PROTOCOL_GUID;
+#endif
+EFI_GUID gSetupGuid = SETUP_GUID;
+EFI_GUID gEfiAmtWrapperProtocolGuid = EFI_AMT_WRAPPER_PROTOCOL_GUID;
+EFI_GUID gEfiMeBiosExtensionSetupGuid = EFI_ME_BIOS_EXTENSION_SETUP_GUID;
+CHAR16 gEfiMeBiosExtensionSetupName[] = EFI_ME_BIOS_EXTENSION_SETUP_VARIABLE_NAME;
+
+PLATFORM_PCI_SERIAL_OVER_LAN_DEVICE_PATH gSerialOverLanDevicePath = {
+ gPciRootBridge,
+ {
+ HARDWARE_DEVICE_PATH,
+ HW_PCI_DP,
+ (UINT8)(sizeof(PCI_DEVICE_PATH)),
+ (UINT8)((sizeof(PCI_DEVICE_PATH)) >> 8),
+ SOL_FUNCTION_NUMBER,
+ ME_DEVICE_NUMBER
+ },
+ {
+ MESSAGING_DEVICE_PATH,
+ MSG_UART_DP,
+ (UINT8)(sizeof(UART_DEVICE_PATH)),
+ (UINT8)((sizeof(UART_DEVICE_PATH)) >> 8),
+ 0,
+ 115200,
+ 8,
+ 1,
+ 1
+ },
+ {
+ MESSAGING_DEVICE_PATH,
+ MSG_VENDOR_DP,
+ (UINT8)(sizeof(VENDOR_DEVICE_PATH)),
+ (UINT8)((sizeof(VENDOR_DEVICE_PATH)) >> 8),
+ DEVICE_PATH_MESSAGING_PC_ANSI
+ },
+ gEndEntire
+ };
+
+
+EFI_HANDLE mBdsImageHandle;
+UINT16 gPlatformBootTimeOutDefault = 1;
+
+
+//
+// Driver entry point
+//
+EFI_DRIVER_ENTRY_POINT (AmtWrapperDxeEntryPoint);
+
+//
+// Function implementations
+//
+#if defined(CORE_COMBINED_VERSION) && CORE_COMBINED_VERSION >=0x4028e
+EFI_STATUS EmptyFileAuthentication
+(
+ IN CONST EFI_SECURITY2_ARCH_PROTOCOL *This,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *File,
+ IN VOID *FileBuffer,
+ IN UINTN FileSize,
+ IN BOOLEAN BootPolicy
+)
+#else
+EFI_STATUS EmptyFileAuthentication
+(
+ IN EFI_SECURITY_ARCH_PROTOCOL *This,
+ IN UINT32 AuthenticationStatus,
+ IN EFI_DEVICE_PATH_PROTOCOL *File
+)
+#endif
+{
+ if (File==NULL) return EFI_INVALID_PARAMETER;
+ return EFI_SUCCESS;
+}
+
+VOID
+EFIAPI
+InstallEDKConOutStartProtocol (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+
+ gBS->InstallProtocolInterface(
+ &mBdsImageHandle, &gEfiConsoleOutDeviceGuid, EFI_NATIVE_INTERFACE, NULL);
+
+ gBS->CloseEvent (Event);
+}
+
+EFI_STATUS
+EFIAPI
+AmtWrapperDxeEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+/*++
+
+Routine Description:
+
+ Entry point for the Active Management Driver.
+
+Arguments:
+
+ ImageHandle Image handle of this driver.
+ SystemTable Global system service table.
+
+Returns:
+
+ EFI_SUCCESS Initialization complete.
+ EFI_UNSUPPORTED The chipset is unsupported by this driver.
+ EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver.
+ EFI_DEVICE_ERROR Device error, driver exits abnormally.
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_EVENT ReadyToBootEvent;
+ EFI_GUID gSetupGuid = SETUP_GUID;
+ UINTN VariableSize = sizeof(SETUP_DATA);
+ SETUP_DATA SetupDataBuffer;
+ SETUP_DATA *SetupData = &SetupDataBuffer;
+ VOID *AfterConsolOutNotifyReg;
+ EFI_EVENT AfterConsolOutInstalledEvent;
+ EFI_GUID AmiConOutStartProtocolGuid = AMI_CONSOLE_OUT_DEVICES_STARTED_PROTOCOL_GUID;
+
+ mBdsImageHandle = ImageHandle;
+ //
+ // Initialize the EFI Driver Library
+ //
+ EfiInitializeDriverLib (ImageHandle, SystemTable);
+ INITIALIZE_SCRIPT (ImageHandle, SystemTable);
+
+ mAsfBootOptions = NULL;
+ mActiveManagement = NULL;
+
+ InitAmtWrapperLib();
+ //
+ // Install the EFI_ACTIVE_MANAGEMENT_PROTOCOL interface
+ //
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &ImageHandle,
+ &gEfiAmtWrapperProtocolGuid, &AmtWrapperInstance,
+ NULL
+ );
+
+ // This event is for KVM function, because ConOut Start GUID is different from AMI to ME RC.
+ Status = gBS->CreateEvent (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_NOTIFY,
+ InstallEDKConOutStartProtocol,
+ NULL,
+ &AfterConsolOutInstalledEvent
+ );
+
+ Status = gBS->RegisterProtocolNotify (
+ &AmiConOutStartProtocolGuid,
+ AfterConsolOutInstalledEvent,
+ &AfterConsolOutNotifyReg
+ );
+
+#if defined(Terminal_SUPPORT) && (Terminal_SUPPORT == 1)
+ // Enable/Disable Sol redirection
+ SetSOLCOMEnable(AmtWrapperEnableSol());
+#endif
+ //
+ // Register Ready to Boot Event for AMT Wrapper
+ //
+#if defined(EFI_EVENT_SIGNAL_READY_TO_BOOT) && EFI_SPECIFICATION_VERSION<0x20000
+ Status = gBS->CreateEvent(
+ EFI_EVENT_SIGNAL_READY_TO_BOOT | EFI_EVENT_NOTIFY_SIGNAL_ALL,
+ EFI_TPL_CALLBACK,
+ AmtWrapperReadyToBoot,
+ (VOID *)&ImageHandle,
+ &ReadyToBootEvent
+ );
+#else
+ Status = EfiCreateEventReadyToBoot(
+ EFI_TPL_CALLBACK,
+ AmtWrapperReadyToBoot,
+ (VOID *)&ImageHandle,
+ &ReadyToBootEvent
+ );
+#endif
+
+ return Status;
+}
+
+#if defined(Terminal_SUPPORT) && (Terminal_SUPPORT == 1)
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SetSOLCOMEnable
+//
+// Description: Enable/Disable SOL COM.
+//
+// Input:
+//
+// Output:
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+SetSOLCOMEnable(
+ IN BOOLEAN Enabled
+)
+{
+ UINT32 ComPort;
+ UINT32 SetupVarAttr;
+ UINTN SetupDataSize;
+ SETUP_DATA gSetupData;
+ EFI_STATUS Status;
+#if (TOTAL_PCI_SERIAL_PORTS > 0)
+ UINT32 i = 0;
+ EFI_GUID gTerminalVarGuid = TERMINAL_VAR_GUID;
+ UINTN PciSerialPortsLocationVarSize =
+ sizeof(PCI_SERIAL_PORTS_LOCATION_VAR);
+ UINT32 PciSerialPortsLocationVarAttributes=0;
+ PCI_SERIAL_PORTS_LOCATION_VAR PciSerialPortsLocationVar;
+ UINT32 gTotalSioSerialPorts = TOTAL_SIO_SERIAL_PORTS;
+ Status = gRT->GetVariable(L"PciSerialPortsLocationVar",
+ &gTerminalVarGuid,
+ &PciSerialPortsLocationVarAttributes,
+ &PciSerialPortsLocationVarSize,
+ &PciSerialPortsLocationVar);
+
+ if(EFI_ERROR(Status)) {
+ ComPort = gTotalSioSerialPorts;
+ }
+
+ ComPort = gTotalSioSerialPorts;
+
+ for (i = 0; i < TOTAL_PCI_SERIAL_PORTS; i++) {
+ if ((PciSerialPortsLocationVar.Device[i] == SOL_DEVICE_NUMBER) &&
+ (PciSerialPortsLocationVar.Function[i] == SOL_FUNCTION_NUMBER)) {
+ ComPort = gTotalSioSerialPorts+i;
+ break;
+ }
+ }
+#else
+ return;
+#endif
+
+ SetupVarAttr = 0;
+ SetupDataSize = sizeof(SETUP_DATA);
+ Status = gRT->GetVariable( \
+ L"Setup", \
+ &gSetupGuid, \
+ &SetupVarAttr, \
+ &SetupDataSize, \
+ &gSetupData );
+
+ if(Enabled)
+ gSetupData.ConsoleRedirectionEnable[ComPort] = 1;
+ else
+ gSetupData.ConsoleRedirectionEnable[ComPort] = 0;
+
+ Status = gRT->SetVariable( \
+ L"Setup", \
+ &gSetupGuid, \
+ SetupVarAttr, \
+ SetupDataSize, \
+ &gSetupData );
+}
+#endif
+
+EFI_STATUS
+BdsRefreshBbsTableForBoot (
+ IN BDS_COMMON_OPTION *Entry
+)
+{
+ return EFI_NOT_FOUND;
+}
+
+VOID
+PrintBbsTable (
+ IN BBS_TABLE *LocalBbsTable
+)
+{
+ UINT16 Idx;
+
+ DEBUG ((EFI_D_ERROR, "\n"));
+ DEBUG ((EFI_D_ERROR, " NO Prio bb/dd/ff cl/sc Type Stat segm:offs\n"));
+ DEBUG ((EFI_D_ERROR, "=============================================\n"));
+ for (Idx = 0; Idx < MAX_BBS_ENTRIES; Idx++)
+ {
+ if (LocalBbsTable[Idx].BootPriority == BBS_IGNORE_ENTRY)
+ {
+ continue;
+ }
+
+ DEBUG (
+ (EFI_D_ERROR,
+ " %02x: %04x %02x/%02x/%02x %02x/02%x %04x %04x %04x:%04x\n",
+ (UINTN) Idx,
+ (UINTN) LocalBbsTable[Idx].BootPriority,
+ (UINTN) LocalBbsTable[Idx].Bus,
+ (UINTN) LocalBbsTable[Idx].Device,
+ (UINTN) LocalBbsTable[Idx].Function,
+ (UINTN) LocalBbsTable[Idx].Class,
+ (UINTN) LocalBbsTable[Idx].SubClass,
+ (UINTN) LocalBbsTable[Idx].DeviceType,
+ (UINTN) * (UINT16 *) &LocalBbsTable[Idx].StatusFlags,
+ (UINTN) LocalBbsTable[Idx].BootHandlerSegment,
+ (UINTN) LocalBbsTable[Idx].BootHandlerOffset,
+ (UINTN) ((LocalBbsTable[Idx].MfgStringSegment << 4) + LocalBbsTable[Idx].MfgStringOffset),
+ (UINTN) ((LocalBbsTable[Idx].DescStringSegment << 4) + LocalBbsTable[Idx].DescStringOffset))
+ );
+ }
+
+ DEBUG ((EFI_D_ERROR, "\n"));
+}
+
+BOOLEAN
+AmtWrapperGet(
+ IN UINTN Index,
+ IN OUT VOID *pVar
+)
+{
+ BOOLEAN st = FALSE;
+
+ InitAmtWrapperLib();
+
+ if (Index == GET_SOL_DP) {
+ *((PLATFORM_PCI_SERIAL_OVER_LAN_DEVICE_PATH **)pVar) = &gSerialOverLanDevicePath;
+ st = TRUE;
+ } else if (Index == GET_TIME_OUT) {
+ *((UINT16 *)pVar) = BdsLibGetTimeout();
+ st = TRUE;
+ } else if (Index == GET_BOOT_OPTION) {
+ *((UINT16 *)pVar) = mAsfBootOptions->BootOptions;
+ st = TRUE;
+ } else if (Index == GET_IS_SOL) {
+ *((UINTN *)pVar) = IsSOL(*((EFI_HANDLE *)pVar));
+ st = TRUE;
+ } else if (Index == GET_IS_IDER) {
+ *((UINTN *)pVar) = IsIDER(*((EFI_HANDLE *)pVar));
+ st = TRUE;
+ }
+
+ return st;
+}
+
+UINTN IsSOL(
+ IN EFI_HANDLE Controller
+)
+{
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINTN Segment=0;
+ UINTN Bus=0;
+ UINTN Device=0;
+ UINTN Function=0;
+ UINTN flag = FALSE;
+
+ Status = gBS->HandleProtocol(Controller,
+ &gEfiPciIoProtocolGuid,
+ &PciIo);
+ if (!EFI_ERROR(Status)) {
+ Status = PciIo->GetLocation(PciIo,
+ &Segment,
+ &Bus,
+ &Device,
+ &Function);
+ if (!EFI_ERROR(Status)) {
+ if (Device == SOL_DEVICE_NUMBER && Function == SOL_FUNCTION_NUMBER) {
+ flag = TRUE;
+ }
+ }
+ }
+
+ return flag;
+}
+
+UINTN IsIDER(
+ IN EFI_HANDLE Controller
+)
+{
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINTN Segment=0;
+ UINTN Bus=0;
+ UINTN Device=0;
+ UINTN Function=0;
+ UINTN flag = FALSE;
+
+ Status = gBS->HandleProtocol(Controller,
+ &gEfiPciIoProtocolGuid,
+ &PciIo);
+ if (!EFI_ERROR(Status)) {
+ Status = PciIo->GetLocation(PciIo,
+ &Segment,
+ &Bus,
+ &Device,
+ &Function);
+ if (!EFI_ERROR(Status)) {
+ if (Device == IDER_DEVICE_NUMBER && Function == IDER_FUNCTION_NUMBER) {
+ flag = TRUE;
+ }
+ }
+ }
+
+ return flag;
+}
+
+UINT16 ConvertSetupDataToUART(
+ UINT8 Parity,
+ UINT8 DataBits,
+ UINT8 StopBits
+)
+{
+ UINT16 DataParityStopBit = 0;
+
+ switch (Parity) {
+ case NoParity:
+ DataParityStopBit &= ~(PAREN | EVENPAR | STICPAR);
+ break;
+ case EvenParity:
+ DataParityStopBit |= (PAREN | EVENPAR);
+ DataParityStopBit &= ~STICPAR;
+ break;
+ case OddParity:
+ DataParityStopBit |= PAREN;
+ DataParityStopBit &= ~(EVENPAR | STICPAR);
+ break;
+ case SpaceParity:
+ DataParityStopBit |= (PAREN | EVENPAR | STICPAR);
+ break;
+ case MarkParity:
+ DataParityStopBit |= (PAREN | STICPAR);
+ DataParityStopBit &= ~EVENPAR;
+ break;
+ }
+
+ // Set stop bits.
+ switch (StopBits) {
+ case OneStopBit :
+ DataParityStopBit &= ~STOPB;
+ break;
+ case OneFiveStopBits :
+ case TwoStopBits :
+ DataParityStopBit |= STOPB;
+ break;
+ }
+
+ // Set data bits.
+ DataParityStopBit &= ~SERIALDB;
+ DataParityStopBit |= (UINT8)((DataBits - 5) & 0x03);
+
+ return DataParityStopBit;
+}
+
+BOOLEAN
+AmtWrapperSet(
+ IN UINTN Index,
+ IN OUT VOID *pVar
+)
+{
+#if defined(LEGACYSREDIR_SUPPORT) && (LEGACYSREDIR_SUPPORT == 1)
+ EFI_LEGACY_SREDIR_PROTOCOL *pLegacySredir;
+ UINT64 PciAddress;
+ UINT32 SerialAddress;
+ UINT8 SerialIRQ;
+ EFI_STATUS Status;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ BOOLEAN st = FALSE;
+
+ InitAmtWrapperLib();
+
+ if (Index == SET_BIOS_WDT_START) {
+ AsfStartWatchDog(ASF_START_BIOS_WDT);
+ st = TRUE;
+ }
+ else if (Index == SET_OS_WDT_START) {
+ AsfStartWatchDog(ASF_START_OS_WDT);
+ st = TRUE;
+ }
+ else if (Index == SET_WDT_STOP) {
+ AsfStopWatchDog();
+ st = TRUE;
+ }
+ else if (Index == SET_OS_SOL) {
+ Status = gBS->LocateProtocol(&gEfiLegacySredirProtocolGuid, NULL, &pLegacySredir);
+ ASSERT_EFI_ERROR(Status);
+
+ Status = gBS->LocateProtocol(&gEfiPciRootBridgeIoProtocolGuid, NULL, &PciRootBridgeIo);
+ ASSERT_EFI_ERROR(Status);
+
+ PciAddress = EFI_PCI_ADDRESS (SOL_BUS_NUMBER, SOL_DEVICE_NUMBER, SOL_FUNCTION_NUMBER, 0x10);
+ PciRootBridgeIo->Pci.Read (
+ PciRootBridgeIo,
+ EfiPciWidthUint32,
+ PciAddress,
+ 1,
+ &SerialAddress
+ );
+ SerialAddress &= ~1; // mask IO/MEM bit
+
+ PciAddress = EFI_PCI_ADDRESS (SOL_BUS_NUMBER, SOL_DEVICE_NUMBER, SOL_FUNCTION_NUMBER, 0x3C);
+ PciRootBridgeIo->Pci.Read (
+ PciRootBridgeIo,
+ EfiPciWidthUint8,
+ PciAddress,
+ 1,
+ &SerialIRQ
+ );
+/*
+ UID = TOTAL_SIO_SERIAL_PORTS;
+ gEfiComParameters.BaseAddress = (UINT16)SerialAddress;
+ gEfiComParameters.SerialIRQ = (UINT8)SerialIRQ;
+
+ VariableSize = sizeof(SETUP_DATA);
+ Status = gRT->GetVariable(
+ L"Setup",
+ &gSetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData);
+ ASSERT(!EFI_ERROR(Status));
+
+ gEfiComParameters.Baudrate = BaudRates[SetupData.BaudRate[UID]];
+ gEfiComParameters.TerminalType = TerminalTypes[SetupData.TerminalType[UID]];
+ gEfiComParameters.FlowControl = SetupData.FlowControl[UID];
+
+ gEfiComParameters.DataParityStop = ConvertSetupDataToUART(
+ SetupData.Parity[UID],
+ SetupData.DataBits[UID],
+ SetupData.StopBits[UID]);
+
+ if (SREDIR_DISPLAY_MODE == DISPLAY_BY_80x24)
+ gEfiComParameters.LegacyOsResolution = 0;
+ else if (SREDIR_DISPLAY_MODE == DISPLAY_BY_80x25)
+ gEfiComParameters.LegacyOsResolution = 1;
+ else
+ gEfiComParameters.LegacyOsResolution = SetupData.LegacyOsResolution[UID];
+*/
+ Status = pLegacySredir->EnableLegacySredir(pLegacySredir);
+
+ ASSERT_EFI_ERROR (Status);
+ st = TRUE;
+ }
+
+ return st;
+#else
+ return FALSE;
+#endif
+}
+
+EFI_STATUS
+AmtWrapperInit(
+ IN EFI_HANDLE ImageHandle,
+ IN OUT EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ mBdsImageHandle = ImageHandle;
+ InitAmtWrapperLib();
+
+ return EFI_SUCCESS;
+}
+
+
+VOID
+InitAmtWrapperLib(VOID)
+{
+ if (mActiveManagement == NULL)
+ AmtLibInit();
+
+ if (mAsfBootOptions == NULL) {
+ BdsAsfInitialization();
+ }
+}
+
+BOOLEAN
+AmtWrapperEnableSol(
+ IN VOID
+)
+{
+ BOOLEAN st;
+
+ InitAmtWrapperLib();
+ st = ActiveManagementEnableSol();
+ if(((mAsfBootOptions->OemParameters) & 0x01) && (mAsfBootOptions != NULL))
+ st = TRUE;
+ else
+ st = FALSE;
+ return st;
+}
+
+BOOLEAN
+AmtWrapperEnableIdeR(
+ IN VOID
+)
+{
+ BOOLEAN st;
+ EFI_STATUS Status;
+#if defined(CORE_COMBINED_VERSION) && CORE_COMBINED_VERSION >=0x4028e
+ EFI_SECURITY2_ARCH_PROTOCOL *mSecurity;
+#else
+ EFI_SECURITY_ARCH_PROTOCOL *mSecurity;
+#endif
+
+ InitAmtWrapperLib();
+ st = ActiveManagementEnableIdeR();
+ if(!st)
+ return st;
+ // IDER enabled and Enforce Secure Boot enabled
+ if((mAsfBootOptions->SpecialCommandParam & ENFORCE_SECURE_BOOT)
+ != ENFORCE_SECURE_BOOT)
+ {
+#if defined(CORE_COMBINED_VERSION) && CORE_COMBINED_VERSION >=0x4028e
+ EFI_GUID gEfiSecurity2ArchProtocolGuid = EFI_SECURITY2_ARCH_PROTOCOL_GUID;
+ Status = gBS->LocateProtocol(&gEfiSecurity2ArchProtocolGuid,
+
+#else
+ Status = gBS->LocateProtocol(&gEfiSecurityArchProtocolGuid,
+#endif
+ NULL, &mSecurity);
+
+ if(EFI_ERROR(Status))
+ return st;
+ // Set a empty File Authentication to skip Secure check.
+ // This will not been restore, because IDER boot fail system HALT
+
+#if defined(CORE_COMBINED_VERSION) && CORE_COMBINED_VERSION >=0x4028e
+ mSecurity->FileAuthentication = EmptyFileAuthentication;
+#else
+ mSecurity->FileAuthenticationState = EmptyFileAuthentication;
+#endif
+ }
+
+ return st;
+}
+
+BOOLEAN
+AmtWrapperPauseBoot(
+ IN VOID
+)
+{
+ BOOLEAN st;
+
+ InitAmtWrapperLib();
+ st = ActiveManagementPauseBoot();
+
+ return st;
+}
+
+BOOLEAN
+AmtWrapperEnterSetup(
+ IN VOID
+)
+{
+ BOOLEAN st;
+
+ InitAmtWrapperLib();
+ st = ActiveManagementEnterSetup();
+
+ return st;
+}
+
+EFI_STATUS
+AmtWrapperBdsBootViaAsf(
+ IN VOID
+)
+{
+ EFI_STATUS Status = EFI_NOT_FOUND;
+
+ InitAmtWrapperLib();
+
+ if (mActiveManagement != NULL && mAsfBootOptions != NULL) {
+ Status = BdsBootViaAsf();
+ }
+
+ return Status;
+}
+
+
+
+EFI_STATUS
+AmtWrapperReadyToBoot(
+ EFI_EVENT Event,
+ VOID *ParentImageHandle
+)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+
+ return Status;
+}
+
+BOOLEAN
+AmtWrapperEnableKvm(
+ IN VOID
+)
+{
+ BOOLEAN Status;
+
+ Status = ActiveManagementEnableKvm();
+
+ return Status;
+}
+
+BOOLEAN
+AmtWrapperInitializationKvm(
+ IN VOID
+)
+{
+ BOOLEAN Status;
+
+ Status = BdsKvmInitialization();
+
+ return Status;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.cif b/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.cif
new file mode 100644
index 0000000..91f7c3b
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.cif
@@ -0,0 +1,25 @@
+<component>
+ name = "AmtWrapperDxe"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\AmtWrapper\Dxe"
+ RefName = "AmtWrapperDxe"
+[files]
+"AmtWrapperDxe.sdl"
+"AmtWrapperDxe.c"
+"AmtWrapperDxe.h"
+"AmtWrapperDxe.mak"
+"AmtWrapperDxe.dxs"
+"AsfSupport.c"
+"AsfSupport.h"
+"DevicePath.c"
+"Performance.c"
+"Performance.h"
+"BdsBoot.c"
+"BdsConnect.c"
+"BdsConsole.c"
+"BdsLib.h"
+"BdsMisc.c"
+"BmMachine.h"
+"KvmSupport.c"
+"KvmSupport.h"
+<endComponent>
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.dxs b/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.dxs
new file mode 100644
index 0000000..4e8ab21
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.dxs
@@ -0,0 +1,75 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/AmtWrapperDxe.dxs 1 2/08/12 1:08a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:08a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/AmtWrapperDxe.dxs $
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:43a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AmtWrapperDxe.dxs
+//
+// Description: Dependency file for AMTWrapperDxe module.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include "EfiDepex.h"
+
+#include EFI_PROTOCOL_DEFINITION (BootScriptSave)
+#include EFI_PROTOCOL_DEPENDENCY (PciRootBridgeIo)
+#include EFI_PROTOCOL_DEFINITION (AlertStandardFormat)
+#include EFI_PROTOCOL_DEFINITION (ActiveManagement)
+
+DEPENDENCY_START
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID AND
+ EFI_ACTIVE_MANAGEMENT_PROTOCOL_GUID AND
+ EFI_ALERT_STANDARD_FORMAT_PROTOCOL_GUID AND
+ EFI_BOOT_SCRIPT_SAVE_PROTOCOL_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.h b/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.h
new file mode 100644
index 0000000..2bc4540
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.h
@@ -0,0 +1,268 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/AmtWrapperDxe.h 3 4/18/13 1:55a Klzhan $
+//
+// $Revision: 3 $
+//
+// $Date: 4/18/13 1:55a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/AmtWrapperDxe.h $
+//
+// 3 4/18/13 1:55a Klzhan
+// [TAG] EIP119190
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] BIOS doesn't wait for KVM pass code input.
+// [RootCause] The Con Out Start protocol GUID is different in AMI and
+// ME RC.
+// [Solution] Install ME RC ConOut Protocol when AMI ConOut Protocol
+// installed.
+// [Files] AmtWrapperDxe.c
+// AmtWrapperDxe.h
+//
+// 2 4/24/12 12:36a Klzhan
+// Update modulepart to latest
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:43a Klzhan
+// Initial Check-in
+//
+// 2 12/28/10 2:00a Klzhan
+// Improvement : Enable/Disable Terminal item for SOL redirection.
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AmtWrapperDxe.h
+//
+// Description: Header file for Amt Wrapper Dxe module
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#ifndef _AMT_WRAPPER_DXE_H_
+#define _AMT_WRAPPER_DXE_H_
+
+#include "Efi.h"
+#include "EfiDriverLib.h"
+#include "EfiCommonLib.h"
+#include "BdsLib.h"
+#include "EfiScriptLib.h"
+#if defined(LEGACYSREDIR_SUPPORT) && (LEGACYSREDIR_SUPPORT == 1)
+#include "Protocol\LegacySredir.h"
+#endif
+#include "AmtLib.h"
+#include "MeAccess.h"
+
+#include EFI_PROTOCOL_CONSUMER (AmtPlatformPolicy)
+#include EFI_PROTOCOL_CONSUMER (AmtWrapper)
+#include EFI_PROTOCOL_CONSUMER (BootScriptSave)
+#include EFI_PROTOCOL_CONSUMER (PciRootBridgeIo)
+#include EFI_PROTOCOL_CONSUMER (ActiveManagement)
+#include EFI_PROTOCOL_CONSUMER (PciIo)
+#include EFI_PROTOCOL_CONSUMER (SerialIo)
+
+#include EFI_GUID_DEFINITION (MeBiosExtensionSetup)
+
+#define R_PCI_SVID 0x2C
+
+#define DISPLAY_SCREEN 0x01 // for LegacySredr CSM16
+#define SUPPORT8025 0x02 // for LegacySredr CSM16
+
+// define for SREDIR_DISPLAY_MODE
+#define DISPLAY_BY_SETUP 0x00
+#define DISPLAY_BY_80x24 0x01
+#define DISPLAY_BY_80x25 0x02
+
+#define STOPB 0x4 // Bit2: Number of Stop Bits
+#define PAREN 0x8 // Bit3: Parity Enable
+#define EVENPAR 0x10 // Bit4: Even Parity Select
+#define STICPAR 0x20 // Bit5: Sticky Parity
+#define SERIALDB 0x3 // Bit0-1: Number of Serial
+ //
+
+#define EFI_WIN_NT_THUNK_PROTOCOL_GUID \
+ { 0x58c518b1, 0x76f3, 0x11d4, 0xbc, 0xea, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 }
+
+#define EFI_WIN_NT_BUS_DRIVER_IO_PROTOCOL_GUID \
+ { 0x96eb4ad6, 0xa32a, 0x11d4, 0xbc, 0xfd, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 }
+
+#define EFI_WIN_NT_SERIAL_PORT_GUID \
+ { 0xc95a93d, 0xa006, 0x11d4, 0xbc, 0xfa, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 }
+
+#define AMI_CONSOLE_OUT_DEVICES_STARTED_PROTOCOL_GUID \
+ { 0xef9a3971, 0xc1a0, 0x4a93, 0xbd, 0x40, 0x5a, 0xa1, 0x65, 0xf2, 0xdc, 0x3a }
+
+typedef struct {
+ ACPI_HID_DEVICE_PATH PciRootBridge;
+ PCI_DEVICE_PATH SerialOverLAN;
+ UART_DEVICE_PATH Uart;
+ VENDOR_DEVICE_PATH TerminalType;
+ EFI_DEVICE_PATH_PROTOCOL End;
+} PLATFORM_PCI_SERIAL_OVER_LAN_DEVICE_PATH;
+
+#define gPciRootBridge \
+ { \
+ ACPI_DEVICE_PATH, \
+ ACPI_DP, \
+ (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)), \
+ (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8), \
+ EISA_PNP_ID (0x0A03), 0 \
+ }
+
+#define gEndEntire \
+ { \
+ END_DEVICE_PATH_TYPE,\
+ END_ENTIRE_DEVICE_PATH_SUBTYPE,\
+ END_DEVICE_PATH_LENGTH,\
+ 0\
+ }
+
+VOID
+SetSOLCOMEnable(
+ IN BOOLEAN Enabled
+);
+
+EFI_STATUS
+AmtWrapperInit(
+ IN EFI_HANDLE ImageHandle,
+ IN OUT EFI_SYSTEM_TABLE *SystemTable
+);
+
+BOOLEAN
+AmtWrapperGet(
+ UINTN Index,
+ VOID *pVar
+);
+
+BOOLEAN
+AmtWrapperSet(
+ UINTN Index,
+ VOID *pVar
+);
+
+BOOLEAN
+ActiveManagementPauseBoot (
+ IN VOID
+);
+
+BOOLEAN
+ActiveManagementEnterSetup (
+ IN VOID
+);
+
+BOOLEAN
+ActiveManagementEnableSol (
+ IN VOID
+);
+
+BOOLEAN
+ActiveManagementEnableIdeR (
+ IN VOID
+);
+
+EFI_STATUS
+BdsAsfInitialization (
+ IN VOID
+);
+
+EFI_STATUS
+BdsBootViaAsf (
+ IN VOID
+);
+
+VOID
+InitAmtWrapperLib(
+ IN VOID
+);
+
+BOOLEAN
+AmtWrapperEnableKvm(
+ IN VOID
+);
+
+BOOLEAN
+AmtWrapperInitializationKvm(
+ IN VOID
+);
+
+BOOLEAN
+AmtWrapperEnableSol(
+ IN VOID
+);
+
+BOOLEAN
+AmtWrapperEnableIdeR(
+ IN VOID
+);
+
+BOOLEAN
+AmtWrapperPauseBoot(
+ IN VOID
+);
+
+BOOLEAN
+AmtWrapperEnterSetup(
+ IN VOID
+);
+
+EFI_STATUS
+AmtWrapperBdsBootViaAsf(
+ IN VOID
+);
+
+EFI_STATUS
+AmtWrapperReadyToBoot(
+ EFI_EVENT Event,
+ VOID *ParentImageHandle
+);
+
+BOOLEAN
+BdsKvmInitialization (
+ IN VOID
+);
+
+UINTN IsSOL(
+ IN EFI_HANDLE Controller
+);
+
+UINTN IsIDER(
+ IN EFI_HANDLE Controller
+);
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.mak b/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.mak
new file mode 100644
index 0000000..21f25ce
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.mak
@@ -0,0 +1,117 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/AmtWrapperDxe.mak 2 2/23/12 8:58a Klzhan $
+#
+# $Revision: 2 $
+#
+# $Date: 2/23/12 8:58a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/AmtWrapperDxe.mak $
+#
+# 2 2/23/12 8:58a Klzhan
+# Support New EDK
+#
+# 1 2/08/12 1:08a Klzhan
+# Initial Check in
+#
+# 2 9/15/11 2:12a Klzhan
+# Remove AMI Lib.
+#
+# 1 2/25/11 1:43a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:10a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name: AmtWrapperDxe.mak
+#
+# Description: Makfile for Amt Wrapper Dxe module
+#
+#----------------------------------------------------------------------------
+#<AMI_FHDR_END>
+EDK : AmtWrapperDxe
+
+AmtWrapperDxe : $(BUILD_DIR)\AmtWrapperDxe.mak AmtWrapperDxeBin
+
+$(BUILD_DIR)\AmtWrapperDxe.mak : $(AmtWrapperDxe_DIR)\$(@B).cif $(AmtWrapperDxe_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(AmtWrapperDxe_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+AmtWrapperDxe_INCLUDES=\
+ $(EDK_INCLUDES)\
+ $(MISCFRAMEWORK_INCLUDES)\
+ $(ME_INCLUDES)\
+ $(INTEL_MCH_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+ $(IndustryStandard_INCLUDES)\
+ $(EdkIIGlueLib_INCLUDES)\
+ /IInclude\
+ $(NB_INCLUDES)
+
+
+AmtWrapperDxe_LIBS=\
+ $(EFISCRIPTLIB)\
+ $(EFIDRIVERLIB)\
+ $(EFICOMMONLIB)\
+ $(PRINTLIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+ $(EFIGUIDLIB)\
+ $(AmtProtocolLib_LIB)\
+ $(AmtLibDxe_LIB)\
+ $(MeLibDxe_LIB)\
+ $(AmtGuidLib_LIB)\
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EdkIIGlueDxeServicesTableLib_LIB)\
+
+AmtWrapperDxeBin : $(AmtWrapperDxe_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\AmtWrapperDxe.mak all\
+ GUID=D77C900D-A1C7-41c5-B989-0C3D37FCA432\
+ "MY_INCLUDES=$(AmtWrapperDxe_INCLUDES)" \
+ ENTRY_POINT=AmtWrapperDxeEntryPoint\
+ DEPEX1=$(AmtWrapperDxe_DIR)\AmtWrapperDxe.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ TYPE=BS_DRIVER\
+ COMPRESS=1
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.sdl b/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.sdl
new file mode 100644
index 0000000..cf027e3
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/AmtWrapperDxe.sdl
@@ -0,0 +1,57 @@
+TOKEN
+ Name = "AmtWrapperDxe_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable AMT Wrapper DXE support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "AmtWrapperDxe_DIR"
+End
+
+MODULE
+ Help = "Includes AmtWrapperDxe.mak to Project"
+ File = "AmtWrapperDxe.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AmtWrapperDxe.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+TOKEN
+ Name = "SREDIR_DISPLAY_MODE"
+ Value = "0"
+ Help = "0:Legacy Redirection by Setup Setting\1:Force Legacy Redirection to 80x24\2:Force Legacy Redirection to 80x25"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0 - 2"
+End
+
+ELINK
+ Name = "{0x8086,0x1C3A},"
+ Parent = "InvalidPciComDeviceList"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "{0x8086,0x1C3B},"
+ Parent = "InvalidPciComDeviceList"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "{0x8086,0x1E3A},"
+ Parent = "InvalidPciComDeviceList"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "{0x8086,0x1E3B},"
+ Parent = "InvalidPciComDeviceList"
+ InvokeOrder = AfterParent
+End \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/AsfSupport.c b/Board/EM/MeWrapper/AmtWrapper/Dxe/AsfSupport.c
new file mode 100644
index 0000000..425a608
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/AsfSupport.c
@@ -0,0 +1,1919 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/AsfSupport.c 10 5/14/14 9:52p Tristinchou $
+//
+// $Revision: 10 $
+//
+// $Date: 5/14/14 9:52p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/AsfSupport.c $
+//
+// 10 5/14/14 9:52p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 9 1/08/14 10:23p Tristinchou
+// [TAG] EIP144445
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] AMT IDER Floppy failed on HSW ULT
+// [RootCause] IDER Device ID is different on HSW ULT
+// [Solution] Determine the bus, device and function number directly
+//
+// 8 9/24/13 4:22a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Raise TPL is not needed
+//
+// 7 4/08/13 3:10a Klzhan
+// [TAG] EIPNone
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] TC015 fail
+//
+// 6 3/01/13 4:38a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Boot to legacy when UEFI boot fail.
+// Correct secure boot fail behavior
+//
+// 5 2/25/13 7:05a Klzhan
+// [TAG] EIP113605
+// [Category] Improvement
+// [Description] Support IDER Floppy BOOT.
+//
+// 4 10/30/12 8:30a Klzhan
+// Improvement : Boot to Legacy when EFI boot fail.
+// Improvement : Correct Secure IDER Boot.
+//
+// 3 8/14/12 7:26a Klzhan
+// Support UEFI IDER boot.
+//
+// 2 4/24/12 12:36a Klzhan
+// Update modulepart to latest
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 3 7/08/11 4:20a Klzhan
+//
+// 2 6/16/11 4:56a Klzhan
+// Update IDER related code.
+//
+// 1 2/25/11 1:43a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AsfSupport.c
+//
+// Description:
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+ This file contains an 'Intel Peripheral Driver' and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+--*/
+
+/*++
+
+Copyright (c) 2005-2008 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+
+Module Name:
+
+ AsfSupport.c
+
+Abstract:
+
+ Support routines for ASF boot options in the BDS
+
+--*/
+
+#include "AsfSupport.h"
+
+#pragma pack(push,1)
+
+typedef struct {
+ UINT32 Attributes;
+ UINT16 FilePathListLength;
+} EFI_LOAD_OPTION;
+#pragma pack(pop)
+
+//
+// Global variables
+//
+EFI_ASF_BOOT_OPTIONS *mAsfBootOptions;
+
+static EFI_DEVICE_PATH_PROTOCOL EndDevicePath[] = {
+ END_DEVICE_PATH_TYPE,
+ END_ENTIRE_DEVICE_PATH_SUBTYPE,
+ END_DEVICE_PATH_LENGTH,
+ 0
+};
+
+//
+// Legacy Device Order
+//
+typedef struct {
+ UINT32 Type;
+ UINT16 Length;
+ UINT16 Device[1];
+} LEGACY_DEVICE_ORDER;
+
+#define LEGACY_DEV_ORDER_GUID \
+ { \
+ 0xA56074DB, 0x65FE, 0x45F7, 0xBD, 0x21, 0x2D, 0x2B, 0xDD, 0x8E, 0x96, 0x52 \
+ }
+
+EFI_GUID gLegacyDeviceOrderGuid = LEGACY_DEV_ORDER_GUID;
+
+EFI_STATUS
+BdsAsfInitialization (
+ IN VOID
+ )
+/*++
+
+Routine Description:
+
+ Retrieve the ASF boot options previously recorded by the ASF driver.
+
+Arguments:
+
+ None.
+
+Returns:
+
+ Initialize Boot Options global variable and AMT protocol
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_ALERT_STANDARD_FORMAT_PROTOCOL *Asf;
+
+ mAsfBootOptions = NULL;
+
+ //
+ // Amt Library Init
+ //
+ Status = AmtLibInit ();
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "Info : Error init AmtLibInit -> %r\n", Status));
+ return Status;
+ }
+ //
+ // Get Protocol for ASF
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiAlertStandardFormatProtocolGuid,
+ NULL,
+ &Asf
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "Info : Error gettings ASF protocol -> %r\n", Status));
+ return Status;
+ }
+
+ Status = Asf->GetBootOptions (Asf, &mAsfBootOptions);
+
+ return Status;
+}
+
+BDS_COMMON_OPTION *
+BdsCreateBootOption (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN CHAR16 *Description
+ )
+/*++
+
+Routine Description:
+
+ This function will create a BootOption from the give device path and
+ description string.
+
+Arguments:
+
+ DevicePath - The device path which the option represent
+ Description - The description of the boot option
+
+Returns:
+
+ BDS_COMMON_OPTION - A BDS_COMMON_OPTION pointer
+
+--*/
+{
+ BDS_COMMON_OPTION *Option;
+
+ Option = EfiLibAllocateZeroPool (sizeof (BDS_COMMON_OPTION));
+ if (Option == NULL) {
+ return NULL;
+ }
+
+ Option->Signature = BDS_LOAD_OPTION_SIGNATURE;
+ Option->DevicePath = EfiLibAllocateZeroPool (EfiDevicePathSize (DevicePath));
+ EfiCopyMem (Option->DevicePath, DevicePath, EfiDevicePathSize (DevicePath));
+
+ Option->Attribute = LOAD_OPTION_ACTIVE;
+ Option->Description = EfiLibAllocateZeroPool (EfiStrSize (Description));
+ EfiCopyMem (Option->Description, Description, EfiStrSize (Description));
+
+ return Option;
+}
+
+EFI_DEVICE_PATH_PROTOCOL *
+BdsCreateShellDevicePath (
+ VOID
+ )
+/*++
+
+Routine Description:
+
+ This function will create a SHELL BootOption to boot.
+
+Arguments:
+
+ None.
+
+Returns:
+
+ Shell Device path for booting.
+
+--*/
+{
+ UINTN FvHandleCount;
+ EFI_HANDLE *FvHandleBuffer;
+ UINTN Index;
+ EFI_STATUS Status;
+#if (PI_SPECIFICATION_VERSION < 0x00010000)
+ EFI_FIRMWARE_VOLUME_PROTOCOL *Fv;
+#else
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *Fv;
+#endif
+ EFI_FV_FILETYPE Type;
+ UINTN Size;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINT32 AuthenticationStatus;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ MEDIA_FW_VOL_FILEPATH_DEVICE_PATH ShellNode;
+
+ DevicePath = NULL;
+ Status = EFI_SUCCESS;
+
+ gBS->LocateHandleBuffer (
+ ByProtocol,
+ #if (PI_SPECIFICATION_VERSION < 0x00010000)
+ &gEfiFirmwareVolumeProtocolGuid,
+ #else
+ &gEfiFirmwareVolume2ProtocolGuid,
+ #endif
+ NULL,
+ &FvHandleCount,
+ &FvHandleBuffer
+ );
+
+ for (Index = 0; Index < FvHandleCount; Index++) {
+ gBS->HandleProtocol (
+ FvHandleBuffer[Index],
+ #if (PI_SPECIFICATION_VERSION < 0x00010000)
+ &gEfiFirmwareVolumeProtocolGuid,
+ #else
+ &gEfiFirmwareVolume2ProtocolGuid,
+ #endif
+ (VOID **) &Fv
+ );
+
+ Status = Fv->ReadFile (
+ Fv,
+ &gEfiShellFileGuid,
+ NULL,
+ &Size,
+ &Type,
+ &Attributes,
+ &AuthenticationStatus
+ );
+ if (EFI_ERROR (Status)) {
+ //
+ // Skip if no shell file in the FV
+ //
+ continue;
+ } else {
+ //
+ // Found the shell
+ //
+ break;
+ }
+ }
+
+ if (EFI_ERROR (Status)) {
+ //
+ // No shell present
+ //
+ if (FvHandleCount) {
+ gBS->FreePool (FvHandleBuffer);
+ }
+
+ return NULL;
+ }
+ //
+ // Build the shell boot option
+ //
+ DevicePath = EfiDevicePathFromHandle (FvHandleBuffer[Index]);
+
+ //
+ // Build the shell device path
+ //
+ ShellNode.Header.Type = MEDIA_DEVICE_PATH;
+ ShellNode.Header.SubType = MEDIA_FV_FILEPATH_DP;
+ SetDevicePathNodeLength (&ShellNode.Header, sizeof (MEDIA_FW_VOL_FILEPATH_DEVICE_PATH));
+ EfiCopyMem (&ShellNode.NameGuid, &gEfiShellFileGuid, sizeof (EFI_GUID));
+ DevicePath = EfiAppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *) &ShellNode);
+
+ if (FvHandleCount) {
+ gBS->FreePool (FvHandleBuffer);
+ }
+
+ return DevicePath;
+}
+
+static
+EFI_DEVICE_PATH_PROTOCOL *
+BdsCreatePxeDevicePath (
+ IN UINT16 DeviceIndex
+ )
+/*++
+
+Routine Description:
+
+ This function will create a PXE BootOption to boot.
+
+Arguments:
+
+ DeviceIndex - PXE handle index
+
+Returns:
+
+ PXE Device path for booting.
+
+--*/
+{
+ UINTN Index;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINTN NumberLoadFileHandles;
+ EFI_HANDLE *LoadFileHandles;
+ VOID *ProtocolInstance;
+
+ DevicePath = NULL;
+ Status = EFI_SUCCESS;
+
+ //
+ // We want everything connected up for PXE
+ //
+ BdsLibConnectAllDriversToAllControllers ();
+
+ //
+ // Parse Network Boot Device
+ //
+ gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiSimpleNetworkProtocolGuid,
+ NULL,
+ &NumberLoadFileHandles,
+ &LoadFileHandles
+ );
+ for (Index = 0; Index < NumberLoadFileHandles; Index++) {
+ Status = gBS->HandleProtocol (
+ LoadFileHandles[Index],
+ &gEfiLoadFileProtocolGuid,
+ (VOID **) &ProtocolInstance
+ );
+ if (EFI_ERROR (Status)) {
+ //
+ // try next handle
+ //
+ continue;
+ } else {
+ if (Index == DeviceIndex) {
+ //
+ // Found a PXE handle
+ //
+ break;
+ } else {
+ Status = EFI_UNSUPPORTED;
+ }
+ }
+ }
+
+ if (EFI_ERROR (Status)) {
+ //
+ // No PXE present
+ //
+ if (NumberLoadFileHandles) {
+ gBS->FreePool (LoadFileHandles);
+ }
+
+ return NULL;
+ }
+ //
+ // Build the PXE device path
+ //
+ DevicePath = EfiDevicePathFromHandle (LoadFileHandles[Index]);
+
+ if (NumberLoadFileHandles) {
+ gBS->FreePool (LoadFileHandles);
+ }
+
+ return DevicePath;
+}
+
+static
+VOID
+GetAmtBusDevFcnVal (
+ OUT UINT32 *Bus,
+ OUT UINT32 *Device,
+ OUT UINT32 *Function
+ )
+/*++
+
+Routine Description:
+
+ This function will get Bus, Device and Function.
+
+Arguments:
+
+ Bus - AMT Bus
+ Device - AMT Device
+ Function - AMT Function
+
+Returns:
+
+ None.
+
+--*/
+{
+ UINT32 Index;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ UINT64 Address;
+ DATA32_UNION Data32Union;
+ EFI_STATUS Status;
+
+ *Bus = 0;
+ *Device = 0;
+ *Function = 0;
+
+ //
+ // Locate root bridge IO protocol
+ //
+ Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, &PciRootBridgeIo);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Need to fill in IDER bus dev function so find this for Tekoa i82573E here.
+ //
+ for (Index = 0; Index < 0x255; Index++) {
+ Address = EFI_PCI_ADDRESS (
+ Index,
+ ME_DEVICE_NUMBER, //
+ IDER_FUNCTION_NUMBER, // fun 2 IDER capability
+ PCI_VENDOR_ID_OFFSET
+ );
+ Status = PciRootBridgeIo->Pci.Read (
+ PciRootBridgeIo,
+ EfiPciWidthUint32,
+ Address,
+ 1,
+ &Data32Union
+ );
+ if ((Data32Union.Data16[0] == V_ME_IDER_VENDOR_ID) &&
+ (Data32Union.Data16[1] == V_ME_IDER_DEVICE_ID)) {
+ //
+ // LOM i82573E is always Device 0 and function 2 so or this 8 bit value of 0x02
+ // into bus number discovered. Bus # upper byte and Dev-Fcn lower byte.
+ //
+ *Bus = Index;
+ *Device = ME_DEVICE_NUMBER;
+ *Function = IDER_FUNCTION_NUMBER;
+ break;
+ }
+ }
+}
+
+UINTN
+GetFirstIndexByType (
+ UINT16 DevType
+ )
+/*++
+
+Routine Description:
+
+ Boot HDD by BIOS Default Priority
+
+Arguments:
+
+ DevType - Boot device whose device type
+
+Returns:
+
+ None
+
+--*/
+{
+ EFI_STATUS Status;
+ UINTN LegacyDevOrderSize;
+ LEGACY_DEVICE_ORDER *LegacyDevOrder;
+ UINTN Index;
+ UINT8 *p;
+ UINTN o;
+
+ Index = 0;
+ o = 0;
+
+ LegacyDevOrderSize = 0;
+ LegacyDevOrder = NULL;
+
+ Status = gRT->GetVariable (
+ L"LegacyDevOrder",
+ &gLegacyDeviceOrderGuid,
+ NULL,
+ &LegacyDevOrderSize,
+ NULL
+ );
+
+ if (Status == EFI_BUFFER_TOO_SMALL) {
+ LegacyDevOrder = EfiLibAllocateZeroPool (LegacyDevOrderSize);
+ if (LegacyDevOrder != NULL) {
+ Status = gRT->GetVariable (
+ L"LegacyDevOrder",
+ &gLegacyDeviceOrderGuid,
+ NULL,
+ &LegacyDevOrderSize,
+ LegacyDevOrder
+ );
+ if (!EFI_ERROR (Status)) {
+ p = (UINT8 *) LegacyDevOrder;
+ o = 0;
+ for (o = 0; o < LegacyDevOrderSize; o += sizeof (LegacyDevOrder->Type) + LegacyDevOrder->Length) {
+ LegacyDevOrder = (LEGACY_DEVICE_ORDER *) (p + o);
+ if (LegacyDevOrder->Type == DevType) {
+ Index = LegacyDevOrder->Device[0];
+ }
+ }
+ }
+ }
+ }
+
+ return Index;
+}
+
+static
+EFI_STATUS
+RefreshBbsTableForBoot (
+ IN UINT16 DeviceIndex,
+ IN UINT16 DevType,
+ IN UINT16 BbsCount,
+ IN OUT BBS_TABLE *BbsTable
+ )
+/*++
+
+Routine Description:
+
+ Update the table with our required boot device
+
+Arguments:
+
+ DeviceIndex - Boot device whose device index
+ DevType - Boot device whose device type
+ BbsCount - Number of BBS_TABLE structures
+ BbsTable - BBS entry
+
+Returns:
+
+ EFI_STATUS
+
+--*/
+{
+ EFI_STATUS Status;
+ UINTN Index;
+ UINT16 BootDeviceIndex;
+ UINT16 TempIndex;
+
+ Status = EFI_NOT_FOUND;
+ TempIndex = 1;
+
+ BootDeviceIndex = DeviceIndex;
+
+ //
+ // Find the first present boot device whose device type
+ // matches the DevType, we use it to boot first. This is different
+ // from the other Bbs table refresh since we are looking for the device type
+ // index instead of the first device to match the device type.
+ //
+ // And set other present boot devices' priority to BBS_UNPRIORITIZED_ENTRY
+ // their priority will be set by LegacyBiosPlatform protocol by default
+ //
+ if (DeviceIndex > 0) {
+ for (Index = 0; Index < BbsCount; Index++) {
+ if (BbsTable[Index].BootPriority == BBS_IGNORE_ENTRY) {
+ continue;
+ }
+
+ BbsTable[Index].BootPriority = BBS_DO_NOT_BOOT_FROM;
+
+ if (BbsTable[Index].DeviceType == DevType) {
+ if (TempIndex++ == DeviceIndex) {
+ BbsTable[Index].BootPriority = 0;
+ Status = EFI_SUCCESS;
+ continue;
+ }
+ }
+ }
+ } else {
+ //
+ // Boot HDD by BIOS Default Priority
+ //
+ Index = GetFirstIndexByType (DevType);
+ BbsTable[Index].BootPriority = 0;
+ Status = EFI_SUCCESS;
+ }
+
+ return Status;
+}
+
+static
+EFI_STATUS
+RefreshBbsTableForIdeRBoot (
+ IN UINT16 DeviceIndex,
+ IN UINT16 DevType,
+ IN UINT16 BbsCount,
+ IN OUT BBS_TABLE *BbsTable
+ )
+/*++
+
+Routine Description:
+
+ Update the table with IdeR boot device
+
+Arguments:
+
+ DeviceIndex - Boot device whose device index
+ DevType - Boot device whose device type
+ BbsCount - Number of BBS_TABLE structures
+ BbsTable - BBS entry
+
+Returns:
+
+ EFI_STATUS
+
+--*/
+{
+ EFI_STATUS Status;
+ UINTN Index;
+ BOOLEAN IderDeviceFound;
+
+ Status = EFI_NOT_FOUND;
+
+ IderDeviceFound = FALSE;
+
+ //
+ // Find the first present boot device whose device type
+ // matches the DevType, we use it to boot first.
+ //
+ // And set other present boot devices' priority to BBS_DO_NOT_BOOT_FROM
+ // their priority will be set by LegacyBiosPlatform protocol by default
+ //
+ for (Index = 0; Index < BbsCount; Index++) {
+ if (BBS_IGNORE_ENTRY == BbsTable[Index].BootPriority) {
+ continue;
+ }
+
+ BbsTable[Index].BootPriority = BBS_DO_NOT_BOOT_FROM;
+
+ if ( (BbsTable[Index].Bus == ME_BUS) &&
+ (BbsTable[Index].Device == ME_DEVICE_NUMBER) &&
+ (BbsTable[Index].Function == IDER_FUNCTION_NUMBER) ) {
+ if (DeviceIndex == 0 && IderDeviceFound != TRUE) {
+ BbsTable[Index].BootPriority = 0;
+ IderDeviceFound = TRUE;
+ Status = EFI_SUCCESS;
+ } else {
+ DeviceIndex--;
+ }
+
+ continue;
+ }
+ }
+
+ return Status;
+}
+static
+EFI_DEVICE_PATH_PROTOCOL *
+BuildDevicePathFromBootOrder
+(
+ VOID
+)
+{
+ UINT8 BootMediaType = 0;
+ UINT8 BootMediaSubType = 0;
+ BOOLEAN IDERBoot = FALSE, IDERFloppy = FALSE;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath = NULL;
+ UINT16 *BootOrder;
+ EFI_LOAD_OPTION *BootOption;
+ UINTN BootOrderSize;
+ UINTN BootOptionSize;
+ CHAR16 BootVarName[9];
+ UINTN i;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *Dp, *DevicePathNode;
+ EFI_DEVICE_PATH_PROTOCOL *DummyDp;
+ UINTN BufferSize = 0;
+ if (ActiveManagementEnableIdeR ()) {
+ //
+ // Check if any media exist in Ider device
+ //
+ if (BdsCheckIderMedia ()) {
+
+ // IDER Floppy
+ if(mAsfBootOptions->SpecialCommandParam == 1)
+ {
+ IDERFloppy = TRUE;
+ }
+
+ // IDER CD
+ if((mAsfBootOptions->SpecialCommandParam == 0x101) ||
+ (mAsfBootOptions->SpecialCommandParam == 0x103))
+ {
+ BootMediaType = MEDIA_DEVICE_PATH;
+ BootMediaSubType = MEDIA_CDROM_DP;
+ }
+ IDERBoot = TRUE;
+ }
+ }else
+ {
+ switch (mAsfBootOptions->SpecialCommand) {
+ case FORCE_PXE:
+ if (mAsfBootOptions->SpecialCommandParam != 0) {
+ //
+ // ASF spec says 0 currently only option
+ //
+ return NULL;
+ }
+ BootMediaType = MESSAGING_DEVICE_PATH;
+ BootMediaSubType = MSG_MAC_ADDR_DP;
+ break;
+
+ case FORCE_HARDDRIVE:
+ case FORCE_SAFEMODE:
+ BootMediaType = MEDIA_DEVICE_PATH;
+ BootMediaSubType = MEDIA_HARDDRIVE_DP;
+ break;
+
+ case FORCE_DIAGNOSTICS:
+ if (mAsfBootOptions->SpecialCommandParam != 0) {
+ //
+ // ASF spec says 0 currently only option
+ //
+ return NULL;
+ }
+
+ DevicePath = BdsCreateShellDevicePath ();
+
+ //
+ // We want everything connected up for shell
+ //
+ BdsLibConnectAllDriversToAllControllers ();
+ break;
+
+ case FORCE_CDDVD:
+ BootMediaType = MEDIA_DEVICE_PATH;
+ BootMediaSubType = MEDIA_CDROM_DP;
+ break;
+
+ default:
+ return NULL;
+ break;
+ }
+ }//else IDER check
+ // Get Device Path from BootXXXX
+ BootOrder = NULL;
+ BootOption = NULL;
+ BootOrderSize = 0;
+
+ Status = gRT->GetVariable(
+ L"BootOrder",
+ &gEfiGlobalVariableGuid,
+ NULL,
+ &BootOrderSize,
+ NULL
+ );
+
+ if (Status == EFI_BUFFER_TOO_SMALL)
+ {
+ BootOrder = EfiLibAllocateZeroPool(BootOrderSize);
+ if (BootOrder != NULL)
+ {
+ Status = gRT->GetVariable(
+ L"BootOrder",
+ &gEfiGlobalVariableGuid,
+ NULL,
+ &BootOrderSize,
+ BootOrder
+ );
+ if (!EFI_ERROR(Status))
+ {
+ for (i=0; i<BootOrderSize/sizeof(UINT16); i++)
+ {
+ SPrint(BootVarName, sizeof(BootVarName), L"Boot%04x", BootOrder[i] );
+ BootOptionSize = 0;
+ Status = gRT->GetVariable(
+ BootVarName,
+ &gEfiGlobalVariableGuid,
+ NULL,
+ &BootOptionSize,
+ NULL
+ );
+ if (Status == EFI_BUFFER_TOO_SMALL)
+ {
+ BootOption = EfiLibAllocateZeroPool(BootOptionSize);
+ if (BootOption != NULL)
+ {
+ Status = gRT->GetVariable(
+ BootVarName,
+ &gEfiGlobalVariableGuid,
+ NULL,
+ &BootOptionSize,
+ BootOption);
+ if (!EFI_ERROR(Status))
+ {
+ Dp = (EFI_DEVICE_PATH_PROTOCOL *) (
+ //
+ // skip the header
+ //
+ (UINT8 *) (BootOption + 1)
+ //
+ // skip the string
+ //
+ + (EfiStrLen ((CHAR16 *) (BootOption + 1)) + 1) * sizeof (CHAR16));
+ DevicePathNode = Dp;
+ while (!EfiIsDevicePathEnd (DevicePathNode))
+ {
+ // Skip USB device
+ /*
+ if((DevicePathNode->Type == MESSAGING_DEVICE_PATH) &&
+ (DevicePathNode->SubType == MSG_USB_DP))
+ break;
+ */
+
+ if( IDERBoot &&
+ (DevicePathNode->Type == MESSAGING_DEVICE_PATH) &&
+ (DevicePathNode->SubType == MSG_SATA_DP))
+ break;
+
+ // Do something special for IDER Floppy,
+ // In AMT commander tool, If redirect to Floppy and CD image
+ // The device path are almost the same
+ if(IDERFloppy &&
+ (DevicePathNode->Type == MESSAGING_DEVICE_PATH) &&
+ (DevicePathNode->SubType == MSG_ATAPI_DP))
+ {
+ EFI_DEVICE_PATH_PROTOCOL *tDP =
+ EfiNextDevicePathNode (DevicePathNode);
+ // IDER CD image has Next Device Path Node, but Floppy doesn't
+ if(EfiIsDevicePathEnd (tDP))
+ {
+ // Correct Pointer of DP, Fix freepool hang issue
+ BufferSize =
+ (UINTN)((UINTN *)BootOptionSize -
+ ((UINTN *)Dp -
+ (UINTN *)BootOption))/sizeof(UINT8);
+
+ Status = gBS->AllocatePool(
+ EfiBootServicesData, BufferSize, &DummyDp );
+
+ if(!EFI_ERROR(Status))
+ {
+ gBS->CopyMem(
+ (VOID*)DummyDp, (VOID*)Dp, BufferSize );
+ }
+ else
+ {
+ Status = gBS->FreePool(BootOption);
+ Status = gBS->FreePool(BootOrder);
+ return NULL;
+ }
+ Status = gBS->FreePool(BootOption);
+ Status = gBS->FreePool(BootOrder);
+ return DummyDp;
+ }
+ break;
+ }
+ if((DevicePathNode->Type == BootMediaType) &&
+ (DevicePathNode->SubType == BootMediaSubType))
+ {
+ // Correct Pointer of DP, Fix freepool hang issue
+ BufferSize =
+ (UINTN)((UINTN *)BootOptionSize -
+ ((UINTN *)Dp -
+ (UINTN *)BootOption))/sizeof(UINT8);
+
+ Status = gBS->AllocatePool(
+ EfiBootServicesData, BufferSize, &DummyDp );
+
+ if(!EFI_ERROR(Status))
+ {
+ gBS->CopyMem(
+ (VOID*)DummyDp, (VOID*)Dp, BufferSize );
+ }
+ else
+ {
+ Status = gBS->FreePool(BootOption);
+ Status = gBS->FreePool(BootOrder);
+ return NULL;
+
+ }
+ Status = gBS->FreePool(BootOption);
+ Status = gBS->FreePool(BootOrder);
+ return DummyDp;
+ }
+
+ DevicePathNode = EfiNextDevicePathNode (DevicePathNode);
+ }
+ }
+ gBS->FreePool (BootOption);
+ }
+ }
+ }
+ }
+ gBS->FreePool (BootOrder);
+ }
+ }
+
+ return DevicePath;
+}
+static
+EFI_DEVICE_PATH_PROTOCOL *
+BdsCreateLegacyBootDevicePath (
+ IN UINT16 DeviceType,
+ IN UINT16 DeviceIndex,
+ IN BOOLEAN IdeRBoot
+ )
+/*++
+
+Routine Description:
+
+ Build the BBS Device Path for this boot selection
+
+Arguments:
+
+ DeviceType - Boot device whose device type
+ DeviceIndex - Boot device whose device index
+ IdeRBoot - If IdeRBoot is TRUE then check Ider device
+
+Returns:
+
+ EFI_STATUS
+
+--*/
+{
+ EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
+ BBS_BBS_DEVICE_PATH BbsDevicePathNode;
+ BBS_TABLE *BbsTable;
+ UINT16 HddCount;
+ UINT16 BbsCount;
+ HDD_INFO *LocalHddInfo;
+ UINT16 Index;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_STATUS Status;
+
+ HddCount = 0;
+ BbsCount = 0;
+ LocalHddInfo = NULL;
+
+ Index = DeviceIndex;
+
+ //
+ // Make sure the Legacy Boot Protocol is available
+ //
+ Status = gBS->LocateProtocol (&gEfiLegacyBiosProtocolGuid, NULL, &LegacyBios);
+ if (EFI_ERROR (Status)) {
+ return NULL;
+ }
+ //
+ // Get BBS table instance
+ //
+ Status = LegacyBios->GetBbsInfo (
+ LegacyBios,
+ &HddCount,
+ &LocalHddInfo,
+ &BbsCount,
+ &BbsTable
+ );
+ if (EFI_ERROR (Status)) {
+ return NULL;
+ }
+ //
+ // For debug
+ //
+ PrintBbsTable (BbsTable);
+
+ //
+ // Update the table with our required boot device
+ //
+ if (IdeRBoot) {
+ Status = RefreshBbsTableForIdeRBoot (
+ Index,
+ DeviceType,
+ BbsCount,
+ BbsTable
+ );
+ } else {
+ Status = RefreshBbsTableForBoot (
+ Index,
+ DeviceType,
+ BbsCount,
+ BbsTable
+ );
+ }
+ //
+ // For debug
+ //
+ PrintBbsTable (BbsTable);
+
+ if (EFI_ERROR (Status)) {
+ //
+ // Device not found - do normal boot
+ //
+ gST->ConOut->OutputString (
+ gST->ConOut,
+ L"Can't Find Boot Device by Boot Option !!\r\n"
+ );
+ while(1);
+ return NULL;
+ }
+ //
+ // Build the BBS Device Path for this boot selection
+ //
+ DevicePath = EfiLibAllocateZeroPool (sizeof (EFI_DEVICE_PATH_PROTOCOL));
+ if (DevicePath == NULL) {
+ return NULL;
+ }
+
+ BbsDevicePathNode.Header.Type = BBS_DEVICE_PATH;
+ BbsDevicePathNode.Header.SubType = BBS_BBS_DP;
+ SetDevicePathNodeLength (&BbsDevicePathNode.Header, sizeof (BBS_BBS_DEVICE_PATH));
+ BbsDevicePathNode.DeviceType = DeviceType;
+ BbsDevicePathNode.StatusFlag = 0;
+ BbsDevicePathNode.String[0] = 0;
+
+ DevicePath = EfiAppendDevicePathNode (
+ EndDevicePath,
+ (EFI_DEVICE_PATH_PROTOCOL *) &BbsDevicePathNode
+ );
+ if (NULL == DevicePath) {
+ return NULL;
+ }
+
+ return DevicePath;
+}
+
+EFI_STATUS
+AsfDoLegacyBoot (
+ IN BDS_COMMON_OPTION *Option
+ )
+/*++
+
+Routine Description:
+
+ Boot the legacy system with the boot option
+
+Arguments:
+
+ Option - The legacy boot option which have BBS device path
+
+Returns:
+
+ EFI_UNSUPPORTED - There is no legacybios protocol, do not support
+ legacy boot.
+
+ EFI_STATUS - Return the status of LegacyBios->LegacyBoot ().
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
+
+ Status = gBS->LocateProtocol (&gEfiLegacyBiosProtocolGuid, NULL, &LegacyBios);
+ if (EFI_ERROR (Status)) {
+ //
+ // If no LegacyBios protocol we do not support legacy boot
+ //
+ return EFI_UNSUPPORTED;
+ }
+ //
+ // Write boot to OS performance data to a file
+ //
+ WRITE_BOOT_TO_OS_PERFORMANCE_DATA;
+
+ DEBUG ((EFI_D_INFO | EFI_D_LOAD, "Legacy Boot: %S\n", Option->Description));
+ return LegacyBios->LegacyBoot (
+ LegacyBios,
+ (BBS_BBS_DEVICE_PATH *) Option->DevicePath,
+ Option->LoadOptionsSize,
+ Option->LoadOptions
+ );
+}
+
+BOOLEAN CompareDP(
+ EFI_DEVICE_PATH_PROTOCOL *dp1,
+ EFI_DEVICE_PATH_PROTOCOL *dp2
+ )
+{
+ UINTN s1,s2;
+ BOOLEAN st = FALSE;
+
+ s1 = EfiDevicePathSize(dp1);
+
+ s2 = EfiDevicePathSize(dp2);
+
+ if (s1 == s2) {
+ if (EfiCompareMem(dp1, dp2, s1) == 0)
+ st = TRUE;
+ }
+
+ return st;
+}
+
+
+UINT16 GetBootCurrent(
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
+)
+{
+ UINT16 *BootOrder;
+ EFI_LOAD_OPTION *BootOption;
+ UINTN BootOrderSize; //size of BootOrder Variable
+ UINTN BootOptionSize;
+ CHAR16 BootVarName[9];
+ UINTN i;
+ EFI_STATUS Status;
+ BOOLEAN st;
+ UINT16 BootCurrent;
+ EFI_DEVICE_PATH_PROTOCOL *Dp;
+
+ BootOrder = NULL;
+ BootOption = NULL;
+ BootCurrent = 0;
+ BootOrderSize = 0;
+
+ Status = gRT->GetVariable(
+ L"BootOrder",
+ &gEfiGlobalVariableGuid,
+ NULL,
+ &BootOrderSize,
+ NULL
+ );
+
+ if (Status == EFI_BUFFER_TOO_SMALL) {
+ BootOrder = EfiLibAllocateZeroPool(BootOrderSize);
+ if (BootOrder != NULL){
+ Status = gRT->GetVariable(
+ L"BootOrder",
+ &gEfiGlobalVariableGuid,
+ NULL,
+ &BootOrderSize,
+ BootOrder
+ );
+ if (!EFI_ERROR(Status)) {
+ for (i=0; i<BootOrderSize/sizeof(UINT16); i++){
+ SPrint(BootVarName, sizeof(BootVarName), L"Boot%04x", BootOrder[i] );
+ BootOptionSize = 0;
+ Status = gRT->GetVariable(
+ BootVarName,
+ &gEfiGlobalVariableGuid,
+ NULL,
+ &BootOptionSize,
+ NULL
+ );
+ if (Status == EFI_BUFFER_TOO_SMALL) {
+ BootOption = EfiLibAllocateZeroPool(BootOptionSize);
+ if (BootOption != NULL){
+ Status = gRT->GetVariable(
+ BootVarName,
+ &gEfiGlobalVariableGuid,
+ NULL,
+ &BootOptionSize,
+ BootOption
+ );
+ if (!EFI_ERROR(Status)) {
+ Dp = (EFI_DEVICE_PATH_PROTOCOL*)
+ ( //skip the header
+ (UINT8*)(BootOption+1)
+ //skip the string
+ +(EfiStrLen((CHAR16*)(BootOption+1))+1)*sizeof(CHAR16)
+ );
+ st = CompareDP(Dp, DevicePath);
+ if (st == TRUE) {
+ BootCurrent = BootOrder[i];
+ }
+ }
+ gBS->FreePool(BootOption);
+ }
+ }
+ }
+ }
+ gBS->FreePool(BootOrder);
+ }
+ }
+ return BootCurrent;
+}
+
+EFI_STATUS
+AsfBootViaBootOption (
+ IN BDS_COMMON_OPTION * Option,
+ IN EFI_DEVICE_PATH_PROTOCOL * DevicePath,
+ OUT UINTN *ExitDataSize,
+ OUT CHAR16 **ExitData OPTIONAL
+ )
+/*++
+
+Routine Description:
+
+ Process the boot option follow the EFI 1.1 specification and
+ special treat the legacy boot option with BBS_DEVICE_PATH.
+
+Arguments:
+
+ Option - The boot option need to be processed
+ DevicePath - The device path which describe where to load
+ the boot image or the legcy BBS device path
+ to boot the legacy OS
+ ExitDataSize - Returned directly from gBS->StartImage ()
+ ExitData - Returned directly from gBS->StartImage ()
+
+Returns:
+
+ EFI_SUCCESS - Status from gBS->StartImage (),
+ or BdsBootByDiskSignatureAndPartition ()
+ EFI_NOT_FOUND - If the Device Path is not found in the system
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_HANDLE Handle;
+ EFI_HANDLE ImageHandle;
+ EFI_DEVICE_PATH_PROTOCOL *TempDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *FilePath;
+ EFI_LOADED_IMAGE_PROTOCOL *ImageInfo;
+ EFI_EVENT ReadyToBootEvent;
+ EFI_ACPI_S3_SAVE_PROTOCOL *AcpiS3Save;
+ UINT32 VarAttr;
+ UINTN VarSize;
+
+ *ExitDataSize = 0;
+ *ExitData = NULL;
+
+ //
+ // Notes: put EFI64 ROM Shadow Solution
+ //
+ EFI64_SHADOW_ALL_LEGACY_ROM ();
+
+ //
+ // Notes: this code can be remove after the s3 script table
+ // hook on the event EFI_EVENT_SIGNAL_READY_TO_BOOT or
+ // EFI_EVENT_SIGNAL_LEGACY_BOOT
+ //
+ Status = gBS->LocateProtocol (&gEfiAcpiS3SaveGuid, NULL, &AcpiS3Save);
+ if (!EFI_ERROR (Status)) {
+ AcpiS3Save->S3Save (AcpiS3Save, NULL);
+ }
+ //
+ // If it's Device Path that starts with a hard drive path,
+ // this routine will do the booting.
+ //
+ Status = BdsBootByDiskSignatureAndPartition (
+ Option,
+ (HARDDRIVE_DEVICE_PATH *) DevicePath,
+ Option->LoadOptionsSize,
+ Option->LoadOptions,
+ ExitDataSize,
+ ExitData
+ );
+ if (!EFI_ERROR (Status)) {
+ //
+ // If we found a disk signature and partition device path return success
+ //
+ return EFI_SUCCESS;
+ }
+ //
+ // Signal the EFI_EVENT_SIGNAL_READY_TO_BOOT event
+ //
+
+
+ Option->BootCurrent = GetBootCurrent(DevicePath);
+
+ //
+ // Get Variable Attribute
+ //
+ VarAttr = 0;
+ VarSize = 0;
+ Status = gRT->GetVariable(
+ L"BootCurrent",
+ &gEfiGlobalVariableGuid,
+ &VarAttr,
+ &VarSize,
+ NULL );
+ if( Status != EFI_BUFFER_TOO_SMALL )
+ {
+ VarAttr = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS;
+ VarSize = sizeof(UINT16);
+ }
+
+ //
+ // Set Boot Current
+ //
+ gRT->SetVariable(
+ L"BootCurrent",
+ &gEfiGlobalVariableGuid,
+ VarAttr,
+ VarSize,
+ &Option->BootCurrent );
+
+ //
+ // Abstract: Modified for EFI 2.0 required
+ //
+#if defined(EFI_EVENT_SIGNAL_READY_TO_BOOT) && EFI_SPECIFICATION_VERSION < 0x20000
+ Status = gBS->CreateEvent (
+ EFI_EVENT_SIGNAL_READY_TO_BOOT | EFI_EVENT_NOTIFY_SIGNAL_ALL,
+ EFI_TPL_CALLBACK,
+ NULL,
+ NULL,
+ &ReadyToBootEvent
+ );
+#else
+ Status = EfiCreateEventReadyToBoot (
+ EFI_TPL_CALLBACK,
+ NULL,
+ NULL,
+ &ReadyToBootEvent
+ );
+#endif
+ if (!EFI_ERROR (Status)) {
+ gBS->SignalEvent (ReadyToBootEvent);
+ gBS->CloseEvent (ReadyToBootEvent);
+ }
+
+ if ((DevicePathType (Option->DevicePath) == BBS_DEVICE_PATH) &&
+ (DevicePathSubType (Option->DevicePath) == BBS_BBS_DP)
+ ) {
+ //
+ // Check to see if we should legacy BOOT. If yes then do the legacy boot
+ //
+ return AsfDoLegacyBoot (Option);
+ }
+
+ DEBUG ((EFI_D_INFO | EFI_D_LOAD, "Booting EFI 1.1 way %S\n", Option->Description));
+
+ Status = gBS->LoadImage (
+ TRUE,
+ mBdsImageHandle,
+ DevicePath,
+ NULL,
+ 0,
+ &ImageHandle
+ );
+
+ //
+ // If we didn't find an image, we may need to load the default
+ // boot behavior for the device.
+ //
+ if (EFI_ERROR (Status)) {
+ //
+ // Find a Simple File System protocol on the device path. If the remaining
+ // device path is set to end then no Files are being specified, so try
+ // the removable media file name.
+ //
+ TempDevicePath = DevicePath;
+ Status = gBS->LocateDevicePath (
+ &gEfiSimpleFileSystemProtocolGuid,
+ &TempDevicePath,
+ &Handle
+ );
+ if (!EFI_ERROR (Status) && IsDevicePathEnd (TempDevicePath)) {
+ FilePath = EfiFileDevicePath (Handle, DEFAULT_REMOVABLE_FILE_NAME);
+ if (FilePath) {
+ Status = gBS->LoadImage (
+ TRUE,
+ mBdsImageHandle,
+ FilePath,
+ NULL,
+ 0,
+ &ImageHandle
+ );
+ if (EFI_ERROR (Status)) {
+ // System Halt when IDER boot fail !!
+ if(ActiveManagementEnableIdeR () && ((Status == EFI_SECURITY_VIOLATION) || (Status == EFI_ACCESS_DENIED)))
+ {
+ gST->ConOut->OutputString (
+ gST->ConOut,
+ L"IDER Boot Fail, system halt !! \r\n");
+
+ while(1);
+ }
+ //
+ // The DevicePath failed, and it's not a valid
+ // removable media device.
+ //
+ goto Done;
+ }
+ }
+ } else {
+ Status = EFI_NOT_FOUND;
+ }
+ }
+
+ if (EFI_ERROR (Status)) {
+ //
+ // It there is any error from the Boot attempt exit now.
+ //
+ goto Done;
+ }
+ //
+ // Provide the image with it's load options
+ //
+ Status = gBS->HandleProtocol (ImageHandle, &gEfiLoadedImageProtocolGuid, &ImageInfo);
+ ASSERT_EFI_ERROR (Status);
+
+ if (Option->LoadOptionsSize != 0) {
+ ImageInfo->LoadOptionsSize = Option->LoadOptionsSize;
+ ImageInfo->LoadOptions = Option->LoadOptions;
+ }
+ //
+ // Before calling the image, enable the Watchdog Timer for
+ // the 5 Minute period
+ //
+ gBS->SetWatchdogTimer (5 * 60, 0x0000, 0x00, NULL);
+
+ Status = gBS->StartImage (ImageHandle, ExitDataSize, ExitData);
+ DEBUG ((EFI_D_INFO | EFI_D_LOAD, "Image Return Status = %r\n", Status));
+ // System Halt when IDER boot fail !!
+ if(ActiveManagementEnableIdeR ())
+ {
+ gST->ConOut->OutputString (
+ gST->ConOut,
+ L"IDER Boot Fail, system halt !! \r\n");
+
+ while(1);
+ }
+
+ //
+ // Clear the Watchdog Timer after the image returns
+ //
+ gBS->SetWatchdogTimer (0x0000, 0x0000, 0x0000, NULL);
+
+Done:
+ //
+ // Clear Boot Current
+ //
+ gRT->SetVariable(
+ L"BootCurrent",
+ &gEfiGlobalVariableGuid,
+ VarAttr,
+ 0,
+ &Option->BootCurrent );
+
+ return Status;
+}
+
+EFI_STATUS
+BdsAsfBoot (
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ )
+/*++
+
+Routine Description:
+
+ Found out ASF boot options.
+
+Arguments:
+
+ DevicePath - The device path which describe where to load
+ the boot image or the legcy BBS device path
+ to boot the legacy OS
+
+Returns:
+
+ EFI_STATUS
+
+--*/
+{
+ BOOLEAN EfiBoot;
+
+ EfiBoot = FALSE;
+
+ //
+ // First we check ASF boot options Special Command
+ //
+ switch (mAsfBootOptions->SpecialCommand) {
+ //
+ // No additional special command is included; the Special Command Parameter has no
+ // meaning.
+ //
+ case NOP:
+ break;
+
+ //
+ // The Special Command Parameter can be used to specify a PXE
+ // parameter. When the parameter value is 0, the system default PXE device is booted. All
+ // other values for the PXE parameter are reserved for future definition by this specification.
+ //
+ case FORCE_PXE:
+ if (mAsfBootOptions->SpecialCommandParam != 0) {
+ //
+ // ASF spec says 0 currently only option
+ //
+ return EFI_UNSUPPORTED;
+ }
+
+ if (EfiBoot == TRUE) {
+ *DevicePath = BdsCreatePxeDevicePath (mAsfBootOptions->SpecialCommandParam);
+ } else {
+ *DevicePath = BdsCreateLegacyBootDevicePath (BBS_EMBED_NETWORK, mAsfBootOptions->SpecialCommandParam, FALSE);
+ }
+ break;
+
+ //
+ // The Special Command Parameter identifies the boot-media index for
+ // the managed client. When the parameter value is 0, the default hard-drive is booted, when the
+ // parameter value is 1, the primary hard-drive is booted; when the value is 2, the secondary
+ // hard-drive is booted ¡V and so on.
+ //
+ case FORCE_HARDDRIVE:
+ //
+ // The Special Command Parameter identifies the boot-media
+ // index for the managed client. When the parameter value is 0, the default hard-drive is
+ // booted, when the parameter value is 1, the primary hard-drive is booted; when the value is 2,
+ // the secondary hard-drive is booted ¡V and so on.
+ //
+ case FORCE_SAFEMODE:
+ *DevicePath = BdsCreateLegacyBootDevicePath (BBS_TYPE_HARDDRIVE, mAsfBootOptions->SpecialCommandParam, FALSE);
+ break;
+
+ //
+ // The Special Command Parameter can be used to specify a
+ // diagnostic parameter. When the parameter value is 0, the default diagnostic media is booted.
+ // All other values for the diagnostic parameter are reserved for future definition by this
+ // specification.
+ //
+ case FORCE_DIAGNOSTICS:
+ if (mAsfBootOptions->SpecialCommandParam != 0) {
+ //
+ // ASF spec says 0 currently only option
+ //
+ return EFI_UNSUPPORTED;
+ }
+
+ *DevicePath = BdsCreateShellDevicePath ();
+
+ //
+ // We want everything connected up for shell
+ //
+ BdsLibConnectAllDriversToAllControllers ();
+ break;
+
+ //
+ // The Special Command Parameter identifies the boot-media index for
+ // the managed client. When the parameter value is 0, the default CD/DVD is booted, when the
+ // parameter value is 1, the primary CD/DVD is booted; when the value is 2, the secondary
+ // CD/DVD is booted ¡V and so on.
+ //
+ case FORCE_CDDVD:
+ *DevicePath = BdsCreateLegacyBootDevicePath (BBS_TYPE_CDROM, mAsfBootOptions->SpecialCommandParam, FALSE);
+ break;
+
+ default:
+ return EFI_UNSUPPORTED;
+ break;
+ }
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+BdsAmtBoot (
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ )
+/*++
+
+Routine Description:
+
+ Check IdeR boot device and Asf boot device
+
+Arguments:
+
+ DevicePath - The device path which describe where to load
+ the boot image or the legcy BBS device path
+ to boot the legacy OS
+
+Returns:
+
+ EFI_STATUS
+
+--*/
+{
+ EFI_STATUS Status;
+
+ //
+ // OEM command values; the interpretation of the Special Command and associated Special
+ // Command Parameters is defined by the entity associated with the Enterprise ID.
+ //
+ if (ActiveManagementEnableIdeR ()) {
+ //
+ // Check if any media exist in Ider device
+ //
+ if (BdsCheckIderMedia ()) {
+ *DevicePath = BdsCreateLegacyBootDevicePath (
+ BBS_TYPE_CDROM,
+ (mAsfBootOptions->SpecialCommandParam & IDER_BOOT_DEVICE_MASK) >> IDER_BOOT_DEVICE_SHIFT,
+ TRUE
+ );
+ }
+
+ Status = EFI_SUCCESS;
+ } else {
+ Status = BdsAsfBoot (DevicePath);
+ }
+
+ return Status;
+}
+
+EFI_STATUS
+BdsBootViaAsf (
+ IN VOID
+ )
+/*++
+
+Routine Description:
+
+ Process ASF boot options and if available, attempt the boot
+
+Arguments:
+
+ None.
+
+Returns:
+
+ EFI_SUCCESS - The command completed successfully
+ Other - Error!!
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ BDS_COMMON_OPTION *BootOption;
+ UINTN ExitDataSize;
+ CHAR16 *ExitData;
+
+ Status = EFI_SUCCESS;
+ DevicePath = NULL;
+
+ //
+ // Check if ASF Boot Options is present.
+ //
+ if (mAsfBootOptions->SubCommand != ASF_BOOT_OPTIONS_PRESENT) {
+ return EFI_NOT_FOUND;
+ }
+
+ DevicePath = BuildDevicePathFromBootOrder();
+
+ if(DevicePath != NULL)
+ {
+
+ BootOption = BdsCreateBootOption (DevicePath, L"ASF Boot");
+ if (BootOption != NULL) {
+ Status = AsfBootViaBootOption (BootOption, BootOption->DevicePath, &ExitDataSize, &ExitData);
+ if (EFI_ERROR (Status)) {
+ gBS->FreePool (BootOption);
+ }
+
+ gBS->FreePool (DevicePath);
+ }
+ }
+ // UEFI BOOT fail, try Legacy Boot
+ switch (mAsfBootOptions->IanaId)
+ {
+ case ASF_INTEL_CONVERTED_IANA:
+ Status = BdsAmtBoot (&DevicePath);
+ break;
+
+ case ASF_INDUSTRY_CONVERTED_IANA:
+ Status = BdsAsfBoot (&DevicePath);
+ break;
+ }
+ //
+ // If device path was set, the we have a boot option to use
+ //
+ if (DevicePath == NULL) {
+ return EFI_UNSUPPORTED;
+ }
+
+ BootOption = BdsCreateBootOption (DevicePath, L"ASF Boot");
+ if (BootOption == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ Status = AsfBootViaBootOption (BootOption, BootOption->DevicePath, &ExitDataSize, &ExitData);
+ if (EFI_ERROR (Status)) {
+ gBS->FreePool (BootOption);
+ }
+
+ gBS->FreePool (DevicePath);
+
+ return Status;
+}
+
+BOOLEAN
+BdsCheckIderMedia (
+ IN VOID
+ )
+/*++
+
+Routine Description:
+ This will return if Media in IDE-R is present.
+
+Arguments:
+ None.
+
+Returns:
+ True Media is present.
+ False Media is not present.
+
+--*/
+{
+ UINTN HandleNum;
+ EFI_HANDLE *HandleBuf;
+ EFI_HANDLE Handle;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *DPath;
+ UINTN Index;
+ UINTN EventIndex;
+ EFI_INPUT_KEY Key;
+ EFI_BLOCK_IO_PROTOCOL *BlkIo;
+ EFI_DISK_INFO_PROTOCOL *DiskInfo;
+ EFI_BLOCK_IO_MEDIA *BlkMedia;
+ VOID *Buffer;
+ UINT8 IdeBootDevice;
+ UINT32 IdeChannel;
+ UINT32 IdeDevice;
+
+ IdeBootDevice = ActiveManagementIderBootDeviceGet ();
+
+ DEBUG ((EFI_D_INFO | EFI_D_LOAD, "Ide Channel Device Index = %d\n", IdeBootDevice));
+
+ //
+ // Make sure the Legacy Boot Protocol is available
+ //
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiBlockIoProtocolGuid,
+ NULL,
+ &HandleNum,
+ &HandleBuf
+ );
+ if (EFI_ERROR (Status)) {
+ return FALSE;
+ }
+
+ for (Index = 0; Index < HandleNum; Index++) {
+ Status = gBS->HandleProtocol (
+ HandleBuf[Index],
+ &gEfiDevicePathProtocolGuid,
+ &DPath
+ );
+ if (!EFI_ERROR (Status)) {
+ Status = gBS->LocateDevicePath (
+ &gEfiIderControllerDriverProtocolGuid,
+ &DPath,
+ &Handle
+ );
+ if (!EFI_ERROR (Status)) {
+ Status = gBS->HandleProtocol (
+ HandleBuf[Index],
+ &gEfiBlockIoProtocolGuid,
+ &BlkIo
+ );
+
+ Status = gBS->HandleProtocol (
+ HandleBuf[Index],
+ &gEfiDiskInfoProtocolGuid,
+ &DiskInfo
+ );
+
+ DiskInfo->WhichIde (DiskInfo, &IdeChannel, &IdeDevice);
+
+ if (IdeBootDevice != (UINT8) (IdeChannel * 2 + IdeDevice)) {
+ continue;
+ }
+
+ if (BlkIo->Media->MediaPresent) {
+ if (HandleBuf != NULL) {
+ gBS->FreePool (HandleBuf);
+ }
+ return TRUE;
+ } else {
+ while (TRUE) {
+ BlkMedia = BlkIo->Media;
+ Buffer = EfiLibAllocatePool (BlkMedia->BlockSize);
+ if (Buffer) {
+ BlkIo->ReadBlocks (
+ BlkIo,
+ BlkMedia->MediaId,
+ 0,
+ BlkMedia->BlockSize,
+ Buffer
+ );
+ gBS->FreePool (Buffer);
+ }
+
+ if (BlkMedia->MediaPresent) {
+ if (HandleBuf != NULL) {
+ gBS->FreePool (HandleBuf);
+ }
+ return TRUE;
+ }
+
+ gST->ConOut->OutputString (
+ gST->ConOut,
+ L"Boot disk missing, please insert boot disk and press ENTER\r\n"
+ );
+ Key.ScanCode = 0;
+ Key.UnicodeChar = 0;
+ gBS->RestoreTPL (EFI_TPL_APPLICATION);
+ while (!(Key.ScanCode == 0 && Key.UnicodeChar == L'\r')) {
+ Status = gBS->WaitForEvent (1, &(gST->ConIn->WaitForKey), &EventIndex);
+ gST->ConIn->ReadKeyStroke (gST->ConIn, &Key);
+ }
+
+ gBS->RaiseTPL (EFI_TPL_DRIVER);
+ }
+
+ if (HandleBuf != NULL) {
+ gBS->FreePool (HandleBuf);
+ }
+ return FALSE;
+ }
+ }
+ }
+ }
+
+ if (HandleBuf != NULL) {
+ gBS->FreePool (HandleBuf);
+ }
+ return FALSE;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/AsfSupport.h b/Board/EM/MeWrapper/AmtWrapper/Dxe/AsfSupport.h
new file mode 100644
index 0000000..050724f
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/AsfSupport.h
@@ -0,0 +1,270 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/AsfSupport.h 1 2/08/12 1:08a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:08a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/AsfSupport.h $
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:43a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AsfSupport.h
+//
+// Description: ASF BDS Support include file
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+ This file contains an 'Intel Peripheral Driver' and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+--*/
+
+/*++
+
+Copyright (c) 2005-2008 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+
+Module Name:
+
+ AsfSupport.h
+
+Abstract:
+
+ ASF BDS Support include file
+
+--*/
+
+#ifndef _ASF_SUPPORT_H_
+#define _ASF_SUPPORT_H_
+
+#include "Tiano.h"
+#include "EfiDriverLib.h"
+#include "BdsLib.h"
+#include "Pci22.h"
+#include "Amt.h"
+#include "AmtLib.h"
+#include "MeAccess.h"
+
+#include EFI_PROTOCOL_DEFINITION (LegacyBios)
+#include EFI_PROTOCOL_DEFINITION (SimpleNetwork)
+#include EFI_PROTOCOL_DEFINITION (FirmwareVolume)
+#include EFI_PROTOCOL_DEFINITION (PciRootBridgeIo)
+#include EFI_PROTOCOL_DEFINITION (FormBrowser)
+
+#include EFI_PROTOCOL_CONSUMER (AlertStandardformat)
+#include EFI_PROTOCOL_CONSUMER (DiskInfo)
+
+#include EFI_PROTOCOL_DEFINITION (IderControllerDriver)
+
+typedef union {
+ UINT32 Data32;
+ UINT16 Data16[2];
+} DATA32_UNION;
+
+EFI_STATUS
+BdsAsfInitialization (
+ IN VOID
+ )
+/*++
+
+Routine Description:
+
+ Retrieve the ASF boot options previously recorded by the ASF driver.
+
+Arguments:
+
+ None.
+
+Returns:
+
+ Initialize Boot Options global variable and AMT protocol
+
+--*/
+;
+
+EFI_STATUS
+BdsBootViaAsf (
+ IN VOID
+ )
+/*++
+
+Routine Description:
+
+ Process ASF boot options and if available, attempt the boot
+
+Arguments:
+
+ None.
+
+Returns:
+
+ EFI_SUCCESS - The command completed successfully
+ Other - Error!!
+
+--*/
+;
+
+VOID
+PrintBbsTable (
+ IN BBS_TABLE *LocalBbsTable
+ )
+/*++
+
+Routine Description:
+
+ Dump all devices of BBS.
+
+Arguments:
+
+ LocalBbsTable - BBS table entry.
+
+Returns:
+
+ None.
+
+--*/
+;
+
+EFI_STATUS
+BdsLibDoLegacyBoot (
+ IN BDS_COMMON_OPTION *Option
+ )
+/*++
+
+Routine Description:
+
+ Boot the legacy system with the boot option
+
+Arguments:
+
+ Option - The legacy boot option which have BBS device path
+
+Returns:
+
+ EFI_UNSUPPORTED - There is no legacybios protocol, do not support
+ legacy boot.
+
+ EFI_STATUS - Return the status of LegacyBios->LegacyBoot ().
+
+--*/
+;
+
+BOOLEAN
+BdsCheckIderMedia (
+ IN VOID
+ )
+/*++
+
+Routine Description:
+ This will return if Media in IDE-R is present.
+
+Arguments:
+ None.
+
+Returns:
+ True Media is present.
+ False Media is not present.
+
+--*/
+;
+
+EFI_DEVICE_PATH_PROTOCOL *
+BdsCreateShellDevicePath (
+ IN VOID
+ )
+/*++
+
+Routine Description:
+
+ This function will create a SHELL BootOption to boot.
+
+Arguments:
+
+ None.
+
+Returns:
+
+ Shell Device path for booting.
+
+--*/
+;
+
+BDS_COMMON_OPTION *
+BdsCreateBootOption (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN CHAR16 *Description
+ )
+/*++
+
+Routine Description:
+
+ This function will create a BootOption from the give device path and
+ description string.
+
+Arguments:
+
+ DevicePath - The device path which the option represent
+ Description - The description of the boot option
+
+Returns:
+
+ BDS_COMMON_OPTION - A BDS_COMMON_OPTION pointer
+
+--*/
+;
+
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsBoot.c b/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsBoot.c
new file mode 100644
index 0000000..15a57b1
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsBoot.c
@@ -0,0 +1,809 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/BdsBoot.c 2 5/14/14 9:52p Tristinchou $
+//
+// $Revision: 2 $
+//
+// $Date: 5/14/14 9:52p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/BdsBoot.c $
+//
+// 2 5/14/14 9:52p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:43a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: BdsBoot.c
+//
+// Description: Create or Process Boot option by AMT.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2004, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ BdsBoot.c
+
+Abstract:
+
+ BDS Lib functions which relate with create or process the boot
+ option.
+
+--*/
+
+#include "BdsLib.h"
+
+BOOLEAN mEnumBootDevice = FALSE;
+
+EFI_STATUS
+BdsLibDoLegacyBoot (
+ IN BDS_COMMON_OPTION *Option
+ )
+/*++
+
+Routine Description:
+
+ Boot the legacy system with the boot option
+
+Arguments:
+
+ Option - The legacy boot option which have BBS device path
+
+Returns:
+
+ EFI_UNSUPPORTED - There is no legacybios protocol, do not support
+ legacy boot.
+
+ EFI_STATUS - Return the status of LegacyBios->LegacyBoot ().
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
+
+ Status = gBS->LocateProtocol (&gEfiLegacyBiosProtocolGuid, NULL, &LegacyBios);
+ if (EFI_ERROR (Status)) {
+ //
+ // If no LegacyBios protocol we do not support legacy boot
+ //
+ return EFI_UNSUPPORTED;
+ }
+ //
+ // Notes: if we seperate the int 19, then we don't need to refresh BBS
+ //
+ BdsRefreshBbsTableForBoot (Option);
+
+ //
+ // Write boot to OS performance data to a file
+ //
+ WRITE_BOOT_TO_OS_PERFORMANCE_DATA;
+
+ DEBUG ((EFI_D_INFO | EFI_D_LOAD, "Legacy Boot: %S\n", Option->Description));
+ return LegacyBios->LegacyBoot (
+ LegacyBios,
+ (BBS_BBS_DEVICE_PATH *) Option->DevicePath,
+ Option->LoadOptionsSize,
+ Option->LoadOptions
+ );
+}
+
+EFI_STATUS
+BdsLibBootViaBootOption (
+ IN BDS_COMMON_OPTION * Option,
+ IN EFI_DEVICE_PATH_PROTOCOL * DevicePath,
+ OUT UINTN *ExitDataSize,
+ OUT CHAR16 **ExitData OPTIONAL
+ )
+/*++
+
+Routine Description:
+
+ Process the boot option follow the EFI 1.1 specification and
+ special treat the legacy boot option with BBS_DEVICE_PATH.
+
+Arguments:
+
+ Option - The boot option need to be processed
+
+ DevicePath - The device path which describe where to load
+ the boot image or the legcy BBS device path
+ to boot the legacy OS
+
+ ExitDataSize - Returned directly from gBS->StartImage ()
+
+ ExitData - Returned directly from gBS->StartImage ()
+
+Returns:
+
+ EFI_SUCCESS - Status from gBS->StartImage (),
+ or BdsBootByDiskSignatureAndPartition ()
+
+ EFI_NOT_FOUND - If the Device Path is not found in the system
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_HANDLE Handle;
+ EFI_HANDLE ImageHandle;
+ EFI_DEVICE_PATH_PROTOCOL *TempDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *FilePath;
+ EFI_LOADED_IMAGE_PROTOCOL *ImageInfo;
+ EFI_EVENT ReadyToBootEvent;
+ EFI_ACPI_S3_SAVE_PROTOCOL *AcpiS3Save;
+ EFI_LIST_ENTRY TempBootLists;
+ UINT32 VarAttr;
+ UINTN VarSize;
+//;;## EFI_TCG_PLATFORM_PROTOCOL *TcgPlatformProtocol;
+
+ *ExitDataSize = 0;
+ *ExitData = NULL;
+
+ //
+ // Notes: put EFI64 ROM Shadow Solution
+ //
+ EFI64_SHADOW_ALL_LEGACY_ROM ();
+
+ //
+ // Notes: this code can be remove after the s3 script table
+ // hook on the event EFI_EVENT_SIGNAL_READY_TO_BOOT or
+ // EFI_EVENT_SIGNAL_LEGACY_BOOT
+ //
+ Status = gBS->LocateProtocol (&gEfiAcpiS3SaveGuid, NULL, &AcpiS3Save);
+ if (!EFI_ERROR (Status)) {
+ AcpiS3Save->S3Save (AcpiS3Save, NULL);
+ }
+ //
+ // If it's Device Path that starts with a hard drive path,
+ // this routine will do the booting.
+ //
+ Status = BdsBootByDiskSignatureAndPartition (
+ Option,
+ (HARDDRIVE_DEVICE_PATH *) DevicePath,
+ Option->LoadOptionsSize,
+ Option->LoadOptions,
+ ExitDataSize,
+ ExitData
+ );
+ if (!EFI_ERROR (Status)) {
+ //
+ // If we found a disk signature and partition device path return success
+ //
+ return EFI_SUCCESS;
+ }
+ //
+ // Signal the EFI_EVENT_SIGNAL_READY_TO_BOOT event
+ //
+
+// AMI Override: Replace
+// Abstract: Modified for EFI 2.0 required
+#if defined(EFI_EVENT_SIGNAL_READY_TO_BOOT) && EFI_SPECIFICATION_VERSION<0x20000
+ Status = gBS->CreateEvent(
+ EFI_EVENT_SIGNAL_READY_TO_BOOT | EFI_EVENT_NOTIFY_SIGNAL_ALL,
+ EFI_TPL_CALLBACK,
+ NULL,
+ NULL,
+ &ReadyToBootEvent
+ );
+#else
+ Status = EfiCreateEventReadyToBoot(
+ EFI_TPL_CALLBACK,
+ NULL,
+ NULL,
+ &ReadyToBootEvent
+ );
+#endif
+// AMI Override End
+ if (!EFI_ERROR (Status)) {
+ gBS->SignalEvent (ReadyToBootEvent);
+ gBS->CloseEvent (ReadyToBootEvent);
+ }
+ //
+ // Set Boot Current
+ //
+ VarAttr = 0;
+ VarSize = 0;
+
+ Status = gRT->GetVariable(
+ L"BootCurrent",
+ &gEfiGlobalVariableGuid,
+ &VarAttr,
+ &VarSize,
+ NULL );
+ if( EFI_ERROR(Status) && (Status != EFI_BUFFER_TOO_SMALL) )
+ {
+ VarAttr = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS;
+ VarSize = sizeof(UINT16);
+ }
+
+ gRT->SetVariable(
+ L"BootCurrent",
+ &gEfiGlobalVariableGuid,
+ VarAttr,
+ VarSize,
+ &Option->BootCurrent );
+
+ if ((DevicePathType (Option->DevicePath) == BBS_DEVICE_PATH) &&
+ (DevicePathSubType (Option->DevicePath) == BBS_BBS_DP)
+ ) {
+ //
+ // Check to see if we should legacy BOOT. If yes then do the legacy boot
+ //
+ return BdsLibDoLegacyBoot (Option);
+ }
+
+ //
+ // If the boot option point to Internal FV shell, make sure it is valid
+ //
+ Status = BdsLibUpdateFvFileDevicePath (&DevicePath, &gEfiShellFileGuid);
+ if (!EFI_ERROR(Status)) {
+ if (Option->DevicePath != NULL) {
+ gBS->FreePool(Option->DevicePath);
+ }
+ Option->DevicePath = EfiLibAllocateZeroPool (EfiDevicePathSize (DevicePath));
+ EfiCopyMem (Option->DevicePath, DevicePath, EfiDevicePathSize (DevicePath));
+ //
+ // Update the shell boot option
+ //
+ InitializeListHead (&TempBootLists);
+ BdsLibRegisterNewOption (&TempBootLists, DevicePath, L"EFI Internal Shell", L"BootOrder");
+ //
+ // free the temporary device path created by BdsLibUpdateFvFileDevicePath()
+ //
+ gBS->FreePool (DevicePath);
+ DevicePath = Option->DevicePath;
+ }
+/* //;;##
+ //
+ // Measure GPT Table
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiTcgPlatformProtocolGuid,
+ NULL,
+ &TcgPlatformProtocol
+ );
+ if (!EFI_ERROR (Status)) {
+ Status = TcgPlatformProtocol->MeasureGptTable (DevicePath);
+ }
+*/ //;;##
+
+ //
+ // Drop the TPL level from EFI_TPL_DRIVER to EFI_TPL_APPLICATION
+ //
+ gBS->RestoreTPL (EFI_TPL_APPLICATION);
+
+ DEBUG ((EFI_D_INFO | EFI_D_LOAD, "Booting EFI 1.1 way %S\n", Option->Description));
+
+ Status = gBS->LoadImage (
+ TRUE,
+ mBdsImageHandle,
+ DevicePath,
+ NULL,
+ 0,
+ &ImageHandle
+ );
+
+ //
+ // If we didn't find an image, we may need to load the default
+ // boot behavior for the device.
+ //
+ if (EFI_ERROR (Status)) {
+ //
+ // Find a Simple File System protocol on the device path. If the remaining
+ // device path is set to end then no Files are being specified, so try
+ // the removable media file name.
+ //
+ TempDevicePath = DevicePath;
+ Status = gBS->LocateDevicePath (
+ &gEfiSimpleFileSystemProtocolGuid,
+ &TempDevicePath,
+ &Handle
+ );
+ if (!EFI_ERROR (Status) && IsDevicePathEnd (TempDevicePath)) {
+ FilePath = EfiFileDevicePath (Handle, DEFAULT_REMOVABLE_FILE_NAME);
+ if (FilePath) {
+ Status = gBS->LoadImage (
+ TRUE,
+ mBdsImageHandle,
+ FilePath,
+ NULL,
+ 0,
+ &ImageHandle
+ );
+ if (EFI_ERROR (Status)) {
+ //
+ // The DevicePath failed, and it's not a valid
+ // removable media device.
+ //
+ goto Done;
+ }
+ }
+ } else {
+ Status = EFI_NOT_FOUND;
+ }
+ }
+
+ if (EFI_ERROR (Status)) {
+ //
+ // It there is any error from the Boot attempt exit now.
+ //
+ goto Done;
+ }
+ //
+ // Provide the image with it's load options
+ //
+ Status = gBS->HandleProtocol (ImageHandle, &gEfiLoadedImageProtocolGuid, &ImageInfo);
+ ASSERT_EFI_ERROR (Status);
+
+ if (Option->LoadOptionsSize != 0) {
+ ImageInfo->LoadOptionsSize = Option->LoadOptionsSize;
+ ImageInfo->LoadOptions = Option->LoadOptions;
+ }
+ //
+ // Before calling the image, enable the Watchdog Timer for
+ // the 5 Minute period
+ //
+ gBS->SetWatchdogTimer (5 * 60, 0x0000, 0x00, NULL);
+
+ Status = gBS->StartImage (ImageHandle, ExitDataSize, ExitData);
+ DEBUG ((EFI_D_INFO | EFI_D_LOAD, "Image Return Status = %r\n", Status));
+
+ //
+ // Clear the Watchdog Timer after the image returns
+ //
+ gBS->SetWatchdogTimer (0x0000, 0x0000, 0x0000, NULL);
+
+Done:
+ //
+ // Clear Boot Current
+ //
+ gRT->SetVariable(
+ L"BootCurrent",
+ &gEfiGlobalVariableGuid,
+ VarAttr,
+ 0,
+ &Option->BootCurrent );
+
+ //
+ // Raise the TPL level back to EFI_TPL_DRIVER
+ //
+ gBS->RaiseTPL (EFI_TPL_DRIVER);
+
+ return Status;
+}
+
+EFI_STATUS
+BdsBootByDiskSignatureAndPartition (
+ IN BDS_COMMON_OPTION * Option,
+ IN HARDDRIVE_DEVICE_PATH * HardDriveDevicePath,
+ IN UINT32 LoadOptionsSize,
+ IN VOID *LoadOptions,
+ OUT UINTN *ExitDataSize,
+ OUT CHAR16 **ExitData OPTIONAL
+ )
+/*++
+
+Routine Description:
+
+ Check to see if a hard ware device path was passed in. If it was then search
+ all the block IO devices for the passed in hard drive device path.
+
+Arguments:
+
+ Option - The current processing boot option.
+
+ HardDriveDevicePath - EFI Device Path to boot, if it starts with a hard
+ drive device path.
+
+ LoadOptionsSize - Passed into gBS->StartImage ()
+ via the loaded image protocol.
+
+ LoadOptions - Passed into gBS->StartImage ()
+ via the loaded image protocol.
+
+ ExitDataSize - returned directly from gBS->StartImage ()
+
+ ExitData - returned directly from gBS->StartImage ()
+
+Returns:
+
+ EFI_SUCCESS - Status from gBS->StartImage (),
+ or BootByDiskSignatureAndPartition ()
+
+ EFI_NOT_FOUND - If the Device Path is not found in the system
+
+--*/
+{
+ EFI_STATUS Status;
+ UINTN BlockIoHandleCount;
+ EFI_HANDLE *BlockIoBuffer;
+ EFI_DEVICE_PATH_PROTOCOL *BlockIoDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *BlockIoHdDevicePath;
+ HARDDRIVE_DEVICE_PATH *TmpHdPath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePath;
+ UINTN Index;
+ BOOLEAN DevicePathMatch;
+ HARDDRIVE_DEVICE_PATH *TempPath;
+
+ *ExitDataSize = 0;
+ *ExitData = NULL;
+
+ if ( !((DevicePathType (&HardDriveDevicePath->Header) == MEDIA_DEVICE_PATH) &&
+ (DevicePathSubType (&HardDriveDevicePath->Header) == MEDIA_HARDDRIVE_DP))
+ ) {
+ //
+ // If the HardDriveDevicePath does not start with a Hard Drive Device Path
+ // exit.
+ //
+ return EFI_NOT_FOUND;
+ }
+ //
+ // The boot device have already been connected
+ //
+ Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiBlockIoProtocolGuid, NULL, &BlockIoHandleCount, &BlockIoBuffer);
+ if (EFI_ERROR (Status) || BlockIoHandleCount == 0) {
+ //
+ // If there was an error or there are no device handles that support
+ // the BLOCK_IO Protocol, then return.
+ //
+ return EFI_NOT_FOUND;
+ }
+ //
+ // Loop through all the device handles that support the BLOCK_IO Protocol
+ //
+ for (Index = 0; Index < BlockIoHandleCount; Index++) {
+
+ Status = gBS->HandleProtocol (BlockIoBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID *) &BlockIoDevicePath);
+ if (EFI_ERROR (Status) || BlockIoDevicePath == NULL) {
+ continue;
+ }
+ //
+ // Make PreviousDevicePath == the device path node before the end node
+ //
+ DevicePath = BlockIoDevicePath;
+ BlockIoHdDevicePath = NULL;
+
+ //
+ // find HardDriver device path node
+ //
+ while (!IsDevicePathEnd (DevicePath)) {
+ if ((DevicePathType (DevicePath) == MEDIA_DEVICE_PATH) &&
+ (DevicePathSubType (DevicePath) == MEDIA_HARDDRIVE_DP)
+ ) {
+ BlockIoHdDevicePath = DevicePath;
+ break;
+ }
+
+ DevicePath = NextDevicePathNode (DevicePath);
+ }
+
+ if (BlockIoHdDevicePath == NULL) {
+ continue;
+ }
+ //
+ // See if the harddrive device path in blockio matches the orig Hard Drive Node
+ //
+ DevicePathMatch = FALSE;
+
+ TmpHdPath = (HARDDRIVE_DEVICE_PATH *) BlockIoHdDevicePath;
+ TempPath = (HARDDRIVE_DEVICE_PATH *) BdsLibUnpackDevicePath ((EFI_DEVICE_PATH_PROTOCOL *) HardDriveDevicePath);
+
+ //
+ // Only several fields will be checked. NOT whole NODE
+ //
+ if ( TmpHdPath->PartitionNumber == TempPath->PartitionNumber &&
+ TmpHdPath->MBRType == TempPath->MBRType &&
+ TmpHdPath->SignatureType == TempPath->SignatureType &&
+ EfiCompareGuid ((EFI_GUID *) TmpHdPath->Signature, (EFI_GUID *) TempPath->Signature)) {
+ //
+ // Get the matched device path
+ //
+ DevicePathMatch = TRUE;
+ }
+ //
+ // Only do the boot, when devicepath match
+ //
+ if (DevicePathMatch) {
+ //
+ // Combine the Block IO and Hard Drive Device path together and try
+ // to boot from it.
+ //
+ DevicePath = NextDevicePathNode ((EFI_DEVICE_PATH_PROTOCOL *) HardDriveDevicePath);
+ NewDevicePath = EfiAppendDevicePath (BlockIoDevicePath, DevicePath);
+
+ //
+ // Recursive boot with new device path
+ //
+ Status = BdsLibBootViaBootOption (Option, NewDevicePath, ExitDataSize, ExitData);
+ if (!EFI_ERROR (Status)) {
+ break;
+ }
+ }
+ }
+
+ gBS->FreePool (BlockIoBuffer);
+ return Status;
+}
+
+
+EFI_STATUS
+EFIAPI
+BdsLibUpdateFvFileDevicePath (
+ IN OUT EFI_DEVICE_PATH_PROTOCOL ** DevicePath,
+ IN EFI_GUID *FileGuid
+ )
+/*++
+
+Routine Description:
+ According to a file guild, check a Fv file device path is valid. If it is invalid,
+ try to return the valid device path.
+ FV address maybe changes for memory layout adjust from time to time, use this funciton
+ could promise the Fv file device path is right.
+
+Arguments:
+ DevicePath - on input, the Fv file device path need to check
+ on output, the updated valid Fv file device path
+
+ FileGuid - the Fv file guild
+
+Returns:
+ EFI_INVALID_PARAMETER - the input DevicePath or FileGuid is invalid parameter
+ EFI_UNSUPPORTED - the input DevicePath does not contain Fv file guild at all
+ EFI_ALREADY_STARTED - the input DevicePath has pointed to Fv file, it is valid
+ EFI_SUCCESS - has successfully updated the invalid DevicePath, and return the updated
+ device path in DevicePath
+
+--*/
+{
+ EFI_DEVICE_PATH_PROTOCOL *TempDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *LastDeviceNode;
+ EFI_STATUS Status;
+ EFI_GUID *GuidPoint;
+ UINTN Index;
+ UINTN FvHandleCount;
+ EFI_HANDLE *FvHandleBuffer;
+ EFI_FV_FILETYPE Type;
+ UINTN Size;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINT32 AuthenticationStatus;
+ BOOLEAN FindFvFile;
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
+#if (PI_SPECIFICATION_VERSION < 0x00010000)
+ EFI_FIRMWARE_VOLUME_PROTOCOL *Fv;
+#else
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *Fv;
+#endif
+ MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FvFileNode;
+ EFI_HANDLE FoundFvHandle;
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePath;
+
+ if ((DevicePath == NULL) || (*DevicePath == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+ if (FileGuid == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+ //
+ // Check whether the device path point to the default the input Fv file
+ //
+ TempDevicePath = *DevicePath;
+ LastDeviceNode = TempDevicePath;
+ while (!EfiIsDevicePathEnd (TempDevicePath)) {
+ LastDeviceNode = TempDevicePath;
+ TempDevicePath = EfiNextDevicePathNode (TempDevicePath);
+ }
+ GuidPoint = EfiGetNameGuidFromFwVolDevicePathNode (
+ (MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *) LastDeviceNode
+ );
+ if (GuidPoint == NULL) {
+ //
+ // if this option does not points to a Fv file, just return EFI_UNSUPPORTED
+ //
+ return EFI_UNSUPPORTED;
+ }
+ if (!EfiCompareGuid (GuidPoint, FileGuid)) {
+ //
+ // If the Fv file is not the input file guid, just return EFI_UNSUPPORTED
+ //
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Check whether the input Fv file device path is valid
+ //
+ TempDevicePath = *DevicePath;
+ FoundFvHandle = NULL;
+ Status = gBS->LocateDevicePath (
+ #if (PI_SPECIFICATION_VERSION < 0x00010000)
+ &gEfiFirmwareVolumeProtocolGuid,
+ #else
+ &gEfiFirmwareVolume2ProtocolGuid,
+ #endif
+ &TempDevicePath,
+ &FoundFvHandle
+ );
+ if (!EFI_ERROR (Status)) {
+ Status = gBS->HandleProtocol (
+ FoundFvHandle,
+ #if (PI_SPECIFICATION_VERSION < 0x00010000)
+ &gEfiFirmwareVolumeProtocolGuid,
+ #else
+ &gEfiFirmwareVolume2ProtocolGuid,
+ #endif
+ (VOID **) &Fv
+ );
+ if (!EFI_ERROR (Status)) {
+ //
+ // Set FV ReadFile Buffer as NULL, only need to check whether input Fv file exist there
+ //
+ Status = Fv->ReadFile (
+ Fv,
+ FileGuid,
+ NULL,
+ &Size,
+ &Type,
+ &Attributes,
+ &AuthenticationStatus
+ );
+ if (!EFI_ERROR (Status)) {
+ return EFI_ALREADY_STARTED;
+ }
+ }
+ }
+
+ //
+ // Look for the input wanted FV file in current FV
+ // First, try to look for in Bds own FV. Bds and input wanted FV file usually are in the same FV
+ //
+ FindFvFile = FALSE;
+ FoundFvHandle = NULL;
+ Status = gBS->HandleProtocol (
+ mBdsImageHandle,
+ &gEfiLoadedImageProtocolGuid,
+ &LoadedImage
+ );
+ if (!EFI_ERROR (Status)) {
+ Status = gBS->HandleProtocol (
+ LoadedImage->DeviceHandle,
+ #if (PI_SPECIFICATION_VERSION < 0x00010000)
+ &gEfiFirmwareVolumeProtocolGuid,
+ #else
+ &gEfiFirmwareVolume2ProtocolGuid,
+ #endif
+ (VOID **) &Fv
+ );
+ if (!EFI_ERROR (Status)) {
+ Status = Fv->ReadFile (
+ Fv,
+ FileGuid,
+ NULL,
+ &Size,
+ &Type,
+ &Attributes,
+ &AuthenticationStatus
+ );
+ if (!EFI_ERROR (Status)) {
+ FindFvFile = TRUE;
+ FoundFvHandle = LoadedImage->DeviceHandle;
+ }
+ }
+ }
+ //
+ // Second, if fail to find, try to enumerate all FV
+ //
+ if (!FindFvFile) {
+ FvHandleBuffer = NULL;
+ gBS->LocateHandleBuffer (
+ ByProtocol,
+ #if (PI_SPECIFICATION_VERSION < 0x00010000)
+ &gEfiFirmwareVolumeProtocolGuid,
+ #else
+ &gEfiFirmwareVolume2ProtocolGuid,
+ #endif
+ NULL,
+ &FvHandleCount,
+ &FvHandleBuffer
+ );
+ for (Index = 0; Index < FvHandleCount; Index++) {
+ gBS->HandleProtocol (
+ FvHandleBuffer[Index],
+ #if (PI_SPECIFICATION_VERSION < 0x00010000)
+ &gEfiFirmwareVolumeProtocolGuid,
+ #else
+ &gEfiFirmwareVolume2ProtocolGuid,
+ #endif
+ (VOID **) &Fv
+ );
+
+ Status = Fv->ReadFile (
+ Fv,
+ FileGuid,
+ NULL,
+ &Size,
+ &Type,
+ &Attributes,
+ &AuthenticationStatus
+ );
+ if (EFI_ERROR (Status)) {
+ //
+ // Skip if input Fv file not in the FV
+ //
+ continue;
+ }
+ FindFvFile = TRUE;
+ FoundFvHandle = FvHandleBuffer[Index];
+ break;
+ }
+
+ if (FvHandleBuffer !=NULL ) {
+ gBS->FreePool (FvHandleBuffer);
+ }
+ }
+
+ if (FindFvFile) {
+ //
+ // Build the shell device path
+ //
+ NewDevicePath = EfiDevicePathFromHandle (FoundFvHandle);
+ EfiInitializeFwVolDevicepathNode (&FvFileNode, FileGuid);
+ NewDevicePath = EfiAppendDevicePathNode (NewDevicePath, (EFI_DEVICE_PATH_PROTOCOL *) &FvFileNode);
+ *DevicePath = NewDevicePath;
+ return EFI_SUCCESS;
+ }
+ return EFI_NOT_FOUND;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsConnect.c b/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsConnect.c
new file mode 100644
index 0000000..597727f
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsConnect.c
@@ -0,0 +1,175 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/BdsConnect.c 1 2/08/12 1:08a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:08a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/BdsConnect.c $
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:43a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: BdsConnect.c
+//
+// Description: Connect the device for AMT Boot.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2004, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ BdsConnect.c
+
+Abstract:
+
+ BDS Lib functions which relate with connect the device
+
+--*/
+#include "BdsLib.h"
+#include "EdkIIGlueUefiLib.h"
+
+EFI_STATUS
+BdsLibConnectAllEfi (
+ VOID
+ )
+/*++
+
+Routine Description:
+
+ This function will connect all current system handles recursively. The
+ connection will finish until every handle's child handle created if it have.
+
+Arguments:
+
+ None
+
+Returns:
+
+ EFI_SUCCESS - All handles and it's child handle have been connected
+
+ EFI_STATUS - Return the status of gBS->LocateHandleBuffer().
+
+--*/
+{
+ EFI_STATUS Status;
+ UINTN HandleCount;
+ EFI_HANDLE *HandleBuffer;
+ UINTN Index;
+
+ Status = gBS->LocateHandleBuffer (
+ AllHandles,
+ NULL,
+ NULL,
+ &HandleCount,
+ &HandleBuffer
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ for (Index = 0; Index < HandleCount; Index++) {
+ Status = gBS->ConnectController (HandleBuffer[Index], NULL, NULL, TRUE);
+ }
+
+ gBS->FreePool (HandleBuffer);
+
+ return EFI_SUCCESS;
+}
+
+VOID
+BdsLibConnectAllDriversToAllControllers (
+ VOID
+ )
+/*++
+
+Routine Description:
+
+ Connects all drivers to all controllers.
+ This function make sure all the current system driver will manage
+ the correspoinding controllers if have. And at the same time, make
+ sure all the system controllers have driver to manage it if have.
+
+Arguments:
+
+ None
+
+Returns:
+
+ None
+
+--*/
+{
+ EFI_STATUS Status;
+
+ Status = EfiGetSystemConfigurationTable (&gEfiDxeServicesTableGuid, (VOID**) &gDS);
+
+ do {
+ //
+ // Connect All EFI 1.10 drivers following EFI 1.10 algorithm
+ //
+ BdsLibConnectAllEfi ();
+
+ //
+ // Check to see if it's possible to dispatch an more DXE drivers.
+ // The BdsLibConnectAllEfi () may have made new DXE drivers show up.
+ // If anything is Dispatched Status == EFI_SUCCESS and we will try
+ // the connect again.
+ //
+ Status = gDS->Dispatch ();
+
+ } while (!EFI_ERROR (Status));
+
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsConsole.c b/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsConsole.c
new file mode 100644
index 0000000..b55a0a1
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsConsole.c
@@ -0,0 +1,251 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/BdsConsole.c 2 5/14/14 9:53p Tristinchou $
+//
+// $Revision: 2 $
+//
+// $Date: 5/14/14 9:53p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/BdsConsole.c $
+//
+// 2 5/14/14 9:53p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:43a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: BdsConsole.c
+//
+// Description: Connect the Console device for AMT.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2004, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ BdsConsole.c
+
+Abstract:
+
+ BDS Lib functions which contain all the code to connect console device
+
+--*/
+
+#include "BdsLib.h"
+#include "EfiPrintLib.h"
+
+EFI_STATUS
+BdsLibUpdateConsoleVariable (
+ IN CHAR16 *ConVarName,
+ IN EFI_DEVICE_PATH_PROTOCOL *CustomizedConDevicePath,
+ IN EFI_DEVICE_PATH_PROTOCOL *ExclusiveDevicePath
+ )
+/*++
+
+Routine Description:
+
+ This function update console variable based on ConVarName, it can
+ add or remove one specific console device path from the variable
+
+Arguments:
+
+ ConVarName - Console related variable name, ConIn, ConOut, ErrOut.
+
+ CustomizedConDevicePath - The console device path which will be added to
+ the console variable ConVarName, this parameter
+ can not be multi-instance.
+
+ ExclusiveDevicePath - The console device path which will be removed
+ from the console variable ConVarName, this
+ parameter can not be multi-instance.
+
+Returns:
+
+ EFI_UNSUPPORTED - Add or remove the same device path.
+
+ EFI_SUCCESS - Success add or remove the device path from
+ the console variable.
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *VarConsole;
+ UINTN DevicePathSize;
+ EFI_DEVICE_PATH_PROTOCOL *Instance;
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePath;
+ UINT32 VarAttr;
+ UINTN VarSize;
+
+
+ VarConsole = NULL;
+ DevicePathSize = 0;
+ NewDevicePath = NULL;
+ Status = EFI_UNSUPPORTED;
+
+ //
+ // Notes: check the device path point, here should check
+ // with compare memory
+ //
+ if (CustomizedConDevicePath == ExclusiveDevicePath) {
+ return EFI_UNSUPPORTED;
+ }
+ //
+ // Delete the ExclusiveDevicePath from current default console
+ //
+ VarConsole = BdsLibGetVariableAndSize (
+ ConVarName,
+ &gEfiGlobalVariableGuid,
+ &DevicePathSize
+ );
+
+ if (ExclusiveDevicePath != NULL && VarConsole != NULL) {
+ if (BdsLibMatchDevicePaths (VarConsole, ExclusiveDevicePath)) {
+
+ Instance = EfiDevicePathInstance (&VarConsole, &DevicePathSize);
+
+ while (VarConsole != NULL) {
+ if (EfiCompareMem (
+ Instance,
+ ExclusiveDevicePath,
+ DevicePathSize - sizeof (EFI_DEVICE_PATH_PROTOCOL)
+ ) == 0) {
+ //
+ // Remove the match part
+ //
+ NewDevicePath = EfiAppendDevicePathInstance (NewDevicePath, VarConsole);
+ break;
+ } else {
+ //
+ // Continue the next instance
+ //
+ NewDevicePath = EfiAppendDevicePathInstance (NewDevicePath, Instance);
+ }
+
+ Instance = EfiDevicePathInstance (&VarConsole, &DevicePathSize);
+ }
+ //
+ // Reset the console variable with new device path
+ //
+ VarAttr = 0;
+ VarSize = 0;
+
+ Status = gRT->GetVariable(
+ ConVarName,
+ &gEfiGlobalVariableGuid,
+ &VarAttr,
+ &VarSize,
+ NULL );
+ if( EFI_ERROR(Status) && Status != EFI_BUFFER_TOO_SMALL )
+ {
+ VarAttr = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE;
+ VarSize = EfiDevicePathSize( NewDevicePath );
+ }
+
+ gRT->SetVariable(
+ ConVarName,
+ &gEfiGlobalVariableGuid,
+ VarAttr,
+ VarSize,
+ NewDevicePath );
+ }
+ }
+ //
+ // Try to append customized device path
+ //
+ VarConsole = BdsLibGetVariableAndSize (
+ ConVarName,
+ &gEfiGlobalVariableGuid,
+ &DevicePathSize
+ );
+
+ if (CustomizedConDevicePath != NULL) {
+ if (!BdsLibMatchDevicePaths (VarConsole, CustomizedConDevicePath)) {
+ //
+ // In the first check, the default console variable will be null,
+ // just append current customized device path
+ //
+ VarConsole = EfiAppendDevicePathInstance (VarConsole, CustomizedConDevicePath);
+
+ //
+ // Update the variable of the default console
+ //
+ VarAttr = 0;
+ VarSize = 0;
+
+ Status = gRT->GetVariable(
+ ConVarName,
+ &gEfiGlobalVariableGuid,
+ &VarAttr,
+ &VarSize,
+ NULL );
+ if( EFI_ERROR(Status) && Status != EFI_BUFFER_TOO_SMALL )
+ {
+ VarAttr = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE;
+ VarSize = EfiDevicePathSize( NewDevicePath );
+ }
+
+ gRT->SetVariable(
+ ConVarName,
+ &gEfiGlobalVariableGuid,
+ VarAttr,
+ VarSize,
+ VarConsole );
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsLib.h b/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsLib.h
new file mode 100644
index 0000000..5a4e10a
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsLib.h
@@ -0,0 +1,459 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/BdsLib.h 1 2/08/12 1:08a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:08a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/BdsLib.h $
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 3 9/21/11 8:52a Klzhan
+// [TAG] EIP69500
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Compiler error when DXE_PERFORMANCE is on
+// [RootCause] EDK Library doesn't support this function.
+// [Files] BdsLib.h
+// Performance.c
+//
+// 1 2/25/11 1:43a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: BdsConsole.h
+//
+// Description: BDS library definition, include the file and data structure
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2004, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ BdsLib.h
+
+Abstract:
+
+ BDS library definition, include the file and data structure
+
+--*/
+
+#ifndef _BDS_LIB_H_
+#define _BDS_LIB_H_
+
+#include "Tiano.h"
+#include "EfiDriverLib.h"
+#include "EfiPrintLib.h"
+#include "BmMachine.h"
+#include "EfiHobLib.h"
+
+#include EFI_PROTOCOL_DEFINITION (SerialIo)
+#include EFI_PROTOCOL_DEFINITION (BlockIo)
+#include EFI_PROTOCOL_DEFINITION (LegacyBios)
+#include EFI_PROTOCOL_DEFINITION (AcpiS3Save)
+#include EFI_PROTOCOL_DEFINITION (LoadedImage)
+#include EFI_PROTOCOL_DEFINITION (SimpleFileSystem)
+#include EFI_PROTOCOL_DEFINITION (SimpleNetwork)
+#include EFI_PROTOCOL_DEFINITION (LoadFile)
+#include EFI_PROTOCOL_DEFINITION (PlatformDriverOverride)
+#include EFI_PROTOCOL_DEFINITION (ConsoleControl)
+#include EFI_PROTOCOL_DEFINITION (UgaDraw)
+#include EFI_PROTOCOL_DEFINITION (Hii)
+#include EFI_PROTOCOL_DEFINITION (FirmwareVolume)
+
+#include EFI_PROTOCOL_DEFINITION (TcgService)
+#include EFI_GUID_DEFINITION (PcAnsi)
+#include EFI_GUID_DEFINITION (Hob)
+#include EFI_GUID_DEFINITION (HotPlugDevice)
+#include EFI_GUID_DEFINITION (GlobalVariable)
+#include EFI_GUID_DEFINITION (EfiShell)
+#include EFI_GUID_DEFINITION (ConsoleInDevice)
+#include EFI_GUID_DEFINITION (ConsoleOutDevice)
+#include EFI_GUID_DEFINITION (StandardErrorDevice)
+
+//
+// Include the performance head file and defind macro to add perf data
+//
+#ifdef EFI_DXE_PERFORMANCE
+#include "Performance.h"
+#define WRITE_BOOT_TO_OS_PERFORMANCE_DATA WriteBootToOsPerformanceData ()
+#else
+#define WRITE_BOOT_TO_OS_PERFORMANCE_DATA
+#endif
+
+extern EFI_HANDLE mBdsImageHandle;
+
+//
+// Constants which are variable names used to access variables
+//
+#define VarLegacyDevOrder L"LegacyDevOrder"
+
+//
+// Data structures and defines
+//
+#define FRONT_PAGE_QUESTION_ID 0x0000
+#define FRONT_PAGE_DATA_WIDTH 0x01
+
+//
+// ConnectType
+//
+#define CONSOLE_OUT 0x00000001
+#define STD_ERROR 0x00000002
+#define CONSOLE_IN 0x00000004
+#define CONSOLE_ALL (CONSOLE_OUT | CONSOLE_IN | STD_ERROR)
+
+//
+// Load Option Attributes defined in EFI Specification
+//
+#define LOAD_OPTION_ACTIVE 0x00000001
+#define LOAD_OPTION_FORCE_RECONNECT 0x00000002
+#define IS_LOAD_OPTION_TYPE(_c, _Mask) (BOOLEAN) (((_c) & (_Mask)) != 0)
+
+//
+// Define Maxmim characters that will be accepted
+//
+#define MAX_CHAR 480
+#define MAX_CHAR_SIZE (MAX_CHAR * 2)
+
+#define MIN_ALIGNMENT_SIZE 4
+#define ALIGN_SIZE(a) ((a % MIN_ALIGNMENT_SIZE) ? MIN_ALIGNMENT_SIZE - (a % MIN_ALIGNMENT_SIZE) : 0)
+
+//
+// This data structure is the part of BDS_CONNECT_ENTRY that we can hard code.
+//
+#define BDS_LOAD_OPTION_SIGNATURE EFI_SIGNATURE_32 ('B', 'd', 'C', 'O')
+
+typedef struct {
+
+ UINTN Signature;
+ EFI_LIST_ENTRY Link;
+
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+ CHAR16 *OptionName;
+ UINTN OptionNumber;
+ UINT16 BootCurrent;
+ UINT32 Attribute;
+ CHAR16 *Description;
+ VOID *LoadOptions;
+ UINT32 LoadOptionsSize;
+
+} BDS_COMMON_OPTION;
+
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINTN ConnectType;
+} BDS_CONSOLE_CONNECT_ENTRY;
+
+//
+// Lib Functions
+//
+
+//
+// Bds boot relate lib functions
+//
+EFI_STATUS
+BdsLibUpdateBootOrderList (
+ IN EFI_LIST_ENTRY *BdsOptionList,
+ IN CHAR16 *VariableName
+ );
+
+VOID
+BdsLibBootNext (
+ VOID
+ );
+
+EFI_STATUS
+BdsLibBootViaBootOption (
+ IN BDS_COMMON_OPTION * Option,
+ IN EFI_DEVICE_PATH_PROTOCOL * DevicePath,
+ OUT UINTN *ExitDataSize,
+ OUT CHAR16 **ExitData OPTIONAL
+ );
+
+EFI_STATUS
+BdsLibEnumerateAllBootOption (
+ IN OUT EFI_LIST_ENTRY *BdsBootOptionList
+ );
+
+VOID
+BdsLibBuildOptionFromHandle (
+ IN EFI_HANDLE Handle,
+ IN EFI_LIST_ENTRY *BdsBootOptionList
+ );
+
+VOID
+BdsLibBuildOptionFromShell (
+ IN EFI_HANDLE Handle,
+ IN EFI_LIST_ENTRY *BdsBootOptionList
+ );
+
+//
+// Bds misc lib functions
+//
+UINT16
+BdsLibGetTimeout (
+ VOID
+ );
+
+EFI_STATUS
+BdsLibGetBootMode (
+ OUT EFI_BOOT_MODE *BootMode
+ );
+
+VOID
+BdsLibLoadDrivers (
+ IN EFI_LIST_ENTRY *BdsDriverLists
+ );
+
+EFI_STATUS
+BdsLibBuildOptionFromVar (
+ IN EFI_LIST_ENTRY *BdsCommonOptionList,
+ IN CHAR16 *VariableName
+ );
+
+VOID *
+BdsLibGetVariableAndSize (
+ IN CHAR16 *Name,
+ IN EFI_GUID *VendorGuid,
+ OUT UINTN *VariableSize
+ );
+
+EFI_STATUS
+BdsLibOutputStrings (
+ IN EFI_SIMPLE_TEXT_OUT_PROTOCOL *ConOut,
+ ...
+ );
+
+BDS_COMMON_OPTION *
+BdsLibVariableToOption (
+ IN OUT EFI_LIST_ENTRY *BdsCommonOptionList,
+ IN CHAR16 *VariableName
+ );
+
+EFI_STATUS
+BdsLibRegisterNewOption (
+ IN EFI_LIST_ENTRY *BdsOptionList,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN CHAR16 *String,
+ IN CHAR16 *VariableName
+ );
+
+//
+// Bds connect or disconnect driver lib funcion
+//
+VOID
+BdsLibConnectAllDriversToAllControllers (
+ VOID
+ );
+
+VOID
+BdsLibConnectAll (
+ VOID
+ );
+
+EFI_STATUS
+BdsLibConnectDevicePath (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePathToConnect
+ );
+
+EFI_STATUS
+BdsLibConnectAllEfi (
+ VOID
+ );
+
+EFI_STATUS
+BdsLibDisconnectAllEfi (
+ VOID
+ );
+
+//
+// Bds console relate lib functions
+//
+VOID
+BdsLibConnectAllConsoles (
+ VOID
+ );
+
+EFI_STATUS
+BdsLibConnectAllDefaultConsoles (
+ VOID
+ );
+
+EFI_STATUS
+BdsLibUpdateConsoleVariable (
+ IN CHAR16 *ConVarName,
+ IN EFI_DEVICE_PATH_PROTOCOL *CustomizedConDevicePath,
+ IN EFI_DEVICE_PATH_PROTOCOL *ExclusiveDevicePath
+ );
+
+EFI_STATUS
+BdsLibConnectConsoleVariable (
+ IN CHAR16 *ConVarName
+ );
+
+//
+// Bds device path relate lib functions
+//
+EFI_DEVICE_PATH_PROTOCOL *
+BdsLibUnpackDevicePath (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevPath
+ );
+
+BOOLEAN
+BdsLibMatchDevicePaths (
+ IN EFI_DEVICE_PATH_PROTOCOL *Multi,
+ IN EFI_DEVICE_PATH_PROTOCOL *Single
+ );
+
+CHAR16 *
+DevicePathToStr (
+ EFI_DEVICE_PATH_PROTOCOL *DevPath
+ );
+
+VOID *
+EfiLibGetVariable (
+ IN CHAR16 *Name,
+ IN EFI_GUID *VendorGuid
+ );
+
+//
+// Internal definitions
+//
+typedef struct {
+ CHAR16 *str;
+ UINTN len;
+ UINTN maxlen;
+} POOL_PRINT;
+
+typedef struct {
+ UINT8 Type;
+ UINT8 SubType;
+ VOID (*Function) (POOL_PRINT *, VOID *);
+} DEVICE_PATH_STRING_TABLE;
+
+//
+// Internal functions
+//
+EFI_STATUS
+BdsBootByDiskSignatureAndPartition (
+ IN BDS_COMMON_OPTION * Option,
+ IN HARDDRIVE_DEVICE_PATH * HardDriveDevicePath,
+ IN UINT32 LoadOptionsSize,
+ IN VOID *LoadOptions,
+ OUT UINTN *ExitDataSize,
+ OUT CHAR16 **ExitData OPTIONAL
+ );
+
+//
+// Notes: EFI 64 shadow all option rom
+//
+#ifdef EFI64
+#define EFI64_SHADOW_ALL_LEGACY_ROM() ShadowAllOptionRom ();
+VOID
+ShadowAllOptionRom();
+#else
+#define EFI64_SHADOW_ALL_LEGACY_ROM()
+#endif
+
+//
+// BBS support macros and functions
+//
+
+#if defined(EFI32) || defined(EFIX64)
+#define REFRESH_LEGACY_BOOT_OPTIONS \
+ BdsDeleteAllInvalidLegacyBootOptions ();\
+ BdsAddNonExistingLegacyBootOptions (); \
+ BdsUpdateLegacyDevOrder ()
+#else
+#define REFRESH_LEGACY_BOOT_OPTIONS
+#endif
+
+EFI_STATUS
+BdsDeleteAllInvalidLegacyBootOptions (
+ VOID
+ );
+
+EFI_STATUS
+BdsAddNonExistingLegacyBootOptions (
+ VOID
+ );
+
+EFI_STATUS
+BdsUpdateLegacyDevOrder (
+ VOID
+ );
+
+EFI_STATUS
+BdsRefreshBbsTableForBoot (
+ IN BDS_COMMON_OPTION *Entry
+ );
+
+extern VOID
+WriteBootToOsPerformanceData (
+ VOID
+ );
+
+BOOLEAN
+BdsLibIsValidEFIBootOptDevicePath (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevPath,
+ IN BOOLEAN CheckMedia
+ );
+
+EFI_STATUS
+EFIAPI
+BdsLibUpdateFvFileDevicePath (
+ IN OUT EFI_DEVICE_PATH_PROTOCOL ** DevicePath,
+ IN EFI_GUID *FileGuid
+ );
+
+#endif // _BDS_LIB_H_
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsMisc.c b/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsMisc.c
new file mode 100644
index 0000000..2b23d21
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/BdsMisc.c
@@ -0,0 +1,594 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/BdsMisc.c 2 5/14/14 9:53p Tristinchou $
+//
+// $Revision: 2 $
+//
+// $Date: 5/14/14 9:53p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/BdsMisc.c $
+//
+// 2 5/14/14 9:53p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:43a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: BdsMisc.h
+//
+// Description: Misc BDS library function
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2004 - 2005, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ BdsMisc.c
+
+Abstract:
+
+ Misc BDS library function
+
+--*/
+
+#include "BdsLib.h"
+
+extern UINT16 gPlatformBootTimeOutDefault;
+
+UINT16
+BdsLibGetTimeout (
+ VOID
+ )
+/*++
+
+Routine Description:
+
+ Return the default value for system Timeout variable.
+
+Arguments:
+
+ None
+
+Returns:
+
+ Timeout value.
+
+--*/
+{
+ UINT16 Timeout;
+ UINT32 VarAttr;
+ UINTN Size;
+ EFI_STATUS Status;
+
+ //
+ // Return Timeout variable or 0xffff if no valid
+ // Timeout variable exists.
+ //
+ VarAttr = 0;
+ Size = sizeof(UINT16);
+ Status = gRT->GetVariable(
+ L"Timeout",
+ &gEfiGlobalVariableGuid,
+ &VarAttr,
+ &Size,
+ &Timeout );
+ if (!EFI_ERROR (Status)) {
+ return Timeout;
+ }
+
+ if( EFI_ERROR (Status) && (Status != EFI_BUFFER_TOO_SMALL) )
+ {
+ VarAttr = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE;
+ Size = sizeof(UINT16);
+ }
+ //
+ // To make the current EFI Automatic-Test activity possible, just add
+ // following code to make AutoBoot enabled when this variable is not
+ // present.
+ // This code should be removed later.
+ //
+ Timeout = gPlatformBootTimeOutDefault;
+
+ //
+ // Notes: Platform should set default variable if non exists on all error cases!!!
+ //
+ Status = gRT->SetVariable(
+ L"Timeout",
+ &gEfiGlobalVariableGuid,
+ VarAttr,
+ Size,
+ &Timeout );
+
+ return Timeout;
+}
+UINT16
+BdsLibGetFreeOptionNumber (
+ IN CHAR16 *VariableName
+ )
+/*++
+
+Routine Description:
+ Get the Option Number that does not used
+ Try to locate the specific option variable one by one untile find a free number
+
+Arguments:
+ VariableName - Indicate if the boot#### or driver#### option
+
+Returns:
+ The Minimal Free Option Number
+
+--*/
+{
+ UINT16 Number;
+ UINTN Index;
+ CHAR16 StrTemp[10];
+ UINT16 *OptionBuffer;
+ UINTN OptionSize;
+
+ //
+ // Try to find the minimum free number from 0, 1, 2, 3....
+ //
+ Index = 0;
+ do {
+ if (*VariableName == 'B') {
+ SPrint (StrTemp, sizeof (StrTemp), L"Boot%04x", Index);
+ } else {
+ SPrint (StrTemp, sizeof (StrTemp), L"Driver%04x", Index);
+ }
+ //
+ // try if the option number is used
+ //
+ OptionBuffer = BdsLibGetVariableAndSize (
+ StrTemp,
+ &gEfiGlobalVariableGuid,
+ &OptionSize
+ );
+ if (OptionBuffer == NULL) {
+ break;
+ }
+ Index++;
+ } while (1);
+
+ Number = (UINT16) Index;
+ return Number;
+}
+
+EFI_STATUS
+BdsLibRegisterNewOption (
+ IN EFI_LIST_ENTRY *BdsOptionList,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN CHAR16 *String,
+ IN CHAR16 *VariableName
+ )
+/*++
+
+Routine Description:
+
+ This function will register the new boot#### or driver#### option base on
+ the VariableName. The new registered boot#### or driver#### will be linked
+ to BdsOptionList and also update to the VariableName. After the boot#### or
+ driver#### updated, the BootOrder or DriverOrder will also be updated.
+
+Arguments:
+
+ BdsOptionList - The header of the boot#### or driver#### link list
+
+ DevicePath - The device path which the boot####
+ or driver#### option present
+
+ String - The description of the boot#### or driver####
+
+ VariableName - Indicate if the boot#### or driver#### option
+
+Returns:
+
+ EFI_SUCCESS - The boot#### or driver#### have been success registered
+
+ EFI_STATUS - Return the status of gRT->SetVariable ().
+
+--*/
+{
+ EFI_STATUS Status;
+ UINTN Index;
+ UINT16 MaxOptionNumber;
+ UINT16 RegisterOptionNumber;
+ UINT16 *TempOptionPtr;
+ UINTN TempOptionSize;
+ UINT16 *OptionOrderPtr;
+ VOID *OptionPtr;
+ UINTN OptionSize;
+ UINT8 *TempPtr;
+ EFI_DEVICE_PATH_PROTOCOL *OptionDevicePath;
+ CHAR16 *Description;
+ CHAR16 OptionName[10];
+ BOOLEAN UpdateDescription;
+ UINT16 BootOrderEntry;
+ UINTN OrderItemNum;
+ UINT32 VarAttr;
+ UINTN VarSize;
+
+
+ OptionPtr = NULL;
+ OptionSize = 0;
+ TempPtr = NULL;
+ OptionDevicePath = NULL;
+ Description = NULL;
+ MaxOptionNumber = 0;
+ OptionOrderPtr = NULL;
+ UpdateDescription = FALSE;
+ EfiZeroMem (OptionName, sizeof (OptionName));
+
+ TempOptionSize = 0;
+ TempOptionPtr = BdsLibGetVariableAndSize (
+ VariableName,
+ &gEfiGlobalVariableGuid,
+ &TempOptionSize
+ );
+
+ //
+ // Compare with current option variable
+ //
+ for (Index = 0; Index < TempOptionSize / sizeof (UINT16); Index++) {
+
+ if (*VariableName == 'B') {
+ SPrint (OptionName, sizeof (OptionName), L"Boot%04x", TempOptionPtr[Index]);
+ } else {
+ SPrint (OptionName, sizeof (OptionName), L"Driver%04x", TempOptionPtr[Index]);
+ }
+
+ OptionPtr = BdsLibGetVariableAndSize (
+ OptionName,
+ &gEfiGlobalVariableGuid,
+ &OptionSize
+ );
+ if (OptionPtr == NULL) {
+ continue;
+ }
+ TempPtr = OptionPtr;
+ TempPtr += sizeof (UINT32) + sizeof (UINT16);
+ Description = (CHAR16 *) TempPtr;
+ TempPtr += EfiStrSize ((CHAR16 *) TempPtr);
+ OptionDevicePath = (EFI_DEVICE_PATH_PROTOCOL *) TempPtr;
+
+ //
+ // Notes: the description may will change base on the GetStringToken
+ //
+ if (EfiCompareMem (OptionDevicePath, DevicePath, EfiDevicePathSize (OptionDevicePath)) == 0) {
+ if (EfiCompareMem (Description, String, EfiStrSize (Description)) == 0) {
+ //
+ // Got the option, so just return
+ //
+ gBS->FreePool (OptionPtr);
+ gBS->FreePool (TempOptionPtr);
+ return EFI_SUCCESS;
+ } else {
+ //
+ // Option description changed, need update.
+ //
+ UpdateDescription = TRUE;
+ gBS->FreePool (OptionPtr);
+ break;
+ }
+ }
+
+ gBS->FreePool (OptionPtr);
+ }
+
+ OptionSize = sizeof (UINT32) + sizeof (UINT16) + EfiStrSize (String) + EfiDevicePathSize (DevicePath);
+ OptionPtr = EfiLibAllocateZeroPool (OptionSize);
+ TempPtr = OptionPtr;
+ *(UINT32 *) TempPtr = LOAD_OPTION_ACTIVE;
+ TempPtr += sizeof (UINT32);
+ *(UINT16 *) TempPtr = (UINT16) EfiDevicePathSize (DevicePath);
+ TempPtr += sizeof (UINT16);
+ EfiCopyMem (TempPtr, String, EfiStrSize (String));
+ TempPtr += EfiStrSize (String);
+ EfiCopyMem (TempPtr, DevicePath, EfiDevicePathSize (DevicePath));
+
+ if (UpdateDescription) {
+ //
+ // The number in option#### to be updated
+ //
+ RegisterOptionNumber = TempOptionPtr[Index];
+ } else {
+ //
+ // The new option#### number
+ //
+ RegisterOptionNumber = BdsLibGetFreeOptionNumber(VariableName);
+ }
+
+ if (*VariableName == 'B') {
+ SPrint (OptionName, sizeof (OptionName), L"Boot%04x", RegisterOptionNumber);
+ } else {
+ SPrint (OptionName, sizeof (OptionName), L"Driver%04x", RegisterOptionNumber);
+ }
+
+ VarAttr = 0;
+ VarSize = 0;
+
+ Status = gRT->GetVariable(
+ OptionName,
+ &gEfiGlobalVariableGuid,
+ &VarAttr,
+ &VarSize,
+ NULL );
+ if( EFI_ERROR (Status) && (Status != EFI_BUFFER_TOO_SMALL) )
+ {
+ VarAttr = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE;
+ VarSize = OptionSize;
+ }
+
+ Status = gRT->SetVariable (
+ OptionName,
+ &gEfiGlobalVariableGuid,
+ VarAttr,
+ VarSize,
+ OptionPtr );
+ //
+ // Return if only need to update a changed description or fail to set option.
+ //
+ if (EFI_ERROR (Status) || UpdateDescription) {
+ gBS->FreePool (OptionPtr);
+ gBS->FreePool (TempOptionPtr);
+ return Status;
+ }
+
+ gBS->FreePool (OptionPtr);
+
+ //
+ // Update the option order variable
+ //
+
+ //
+ // If no option order
+ //
+ if (TempOptionSize == 0) {
+ VarAttr = 0;
+ VarSize = 0;
+
+ Status = gRT->GetVariable(
+ VariableName,
+ &gEfiGlobalVariableGuid,
+ &VarAttr,
+ &VarSize,
+ NULL );
+ if( EFI_ERROR (Status) && (Status != EFI_BUFFER_TOO_SMALL) )
+ {
+ VarAttr = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE;
+ VarSize = sizeof(UINT16);
+ }
+
+ BootOrderEntry = 0;
+
+ Status = gRT->SetVariable(
+ VariableName,
+ &gEfiGlobalVariableGuid,
+ VarAttr,
+ VarSize,
+ &BootOrderEntry );
+ if (EFI_ERROR (Status)) {
+ gBS->FreePool (TempOptionPtr);
+ return Status;
+ }
+ return EFI_SUCCESS;
+ }
+ //
+ // Append the new option number to the original option order
+ //
+ OrderItemNum = (TempOptionSize / sizeof (UINT16)) + 1 ;
+ OptionOrderPtr = EfiLibAllocateZeroPool ( OrderItemNum * sizeof (UINT16));
+ EfiCopyMem (OptionOrderPtr, TempOptionPtr, (OrderItemNum - 1) * sizeof (UINT16));
+
+ OptionOrderPtr[Index] = RegisterOptionNumber;
+
+ VarAttr = 0;
+ VarSize = 0;
+
+ Status = gRT->GetVariable(
+ VariableName,
+ &gEfiGlobalVariableGuid,
+ &VarAttr,
+ &VarSize,
+ NULL );
+ if( EFI_ERROR (Status) && (Status != EFI_BUFFER_TOO_SMALL) )
+ {
+ VarAttr = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE;
+ VarSize = OrderItemNum * sizeof(UINT16);
+ }
+
+ Status = gRT->SetVariable(
+ VariableName,
+ &gEfiGlobalVariableGuid,
+ VarAttr,
+ VarSize,
+ OptionOrderPtr );
+ if (EFI_ERROR (Status)) {
+ gBS->FreePool (TempOptionPtr);
+ gBS->FreePool (OptionOrderPtr);
+ return Status;
+ }
+
+ gBS->FreePool (TempOptionPtr);
+ gBS->FreePool (OptionOrderPtr);
+
+ return EFI_SUCCESS;
+}
+
+
+VOID *
+BdsLibGetVariableAndSize (
+ IN CHAR16 *Name,
+ IN EFI_GUID *VendorGuid,
+ OUT UINTN *VariableSize
+ )
+/*++
+
+Routine Description:
+
+ Read the EFI variable (VendorGuid/Name) and return a dynamically allocated
+ buffer, and the size of the buffer. If failure return NULL.
+
+Arguments:
+
+ Name - String part of EFI variable name
+
+ VendorGuid - GUID part of EFI variable name
+
+ VariableSize - Returns the size of the EFI variable that was read
+
+Returns:
+
+ Dynamically allocated memory that contains a copy of the EFI variable.
+ Caller is responsible freeing the buffer.
+
+ NULL - Variable was not read
+
+--*/
+{
+ EFI_STATUS Status;
+ UINTN BufferSize;
+ VOID *Buffer;
+
+ Buffer = NULL;
+
+ //
+ // Pass in a zero size buffer to find the required buffer size.
+ //
+ BufferSize = 0;
+ Status = gRT->GetVariable (Name, VendorGuid, NULL, &BufferSize, Buffer);
+ if (Status == EFI_BUFFER_TOO_SMALL) {
+ //
+ // Allocate the buffer to return
+ //
+ Buffer = EfiLibAllocateZeroPool (BufferSize);
+ if (Buffer == NULL) {
+ return NULL;
+ }
+ //
+ // Read variable into the allocated buffer.
+ //
+ Status = gRT->GetVariable (Name, VendorGuid, NULL, &BufferSize, Buffer);
+ if (EFI_ERROR (Status)) {
+ BufferSize = 0;
+ }
+ }
+
+ *VariableSize = BufferSize;
+ return Buffer;
+}
+
+BOOLEAN
+BdsLibMatchDevicePaths (
+ IN EFI_DEVICE_PATH_PROTOCOL *Multi,
+ IN EFI_DEVICE_PATH_PROTOCOL *Single
+ )
+/*++
+
+Routine Description:
+
+ Function compares a device path data structure to that of all the nodes of a
+ second device path instance.
+
+Arguments:
+
+ Multi - A pointer to a multi-instance device path data structure.
+
+ Single - A pointer to a single-instance device path data structure.
+
+Returns:
+
+ TRUE - If the Single is contained within Multi
+
+ FALSE - The Single is not match within Multi
+
+
+--*/
+{
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathInst;
+ UINTN Size;
+
+ if (!Multi || !Single) {
+ return FALSE;
+ }
+
+ DevicePath = Multi;
+ DevicePathInst = EfiDevicePathInstance (&DevicePath, &Size);
+ Size -= sizeof (EFI_DEVICE_PATH_PROTOCOL);
+
+ //
+ // Search for the match of 'Single' in 'Multi'
+ //
+ while (DevicePathInst != NULL) {
+ //
+ // If the single device path is found in multiple device paths,
+ // return success
+ //
+ if (Size == 0) {
+ return FALSE;
+ }
+
+ if (EfiCompareMem (Single, DevicePathInst, Size) == 0) {
+ return TRUE;
+ }
+
+ gBS->FreePool (DevicePathInst);
+ DevicePathInst = EfiDevicePathInstance (&DevicePath, &Size);
+ Size -= sizeof (EFI_DEVICE_PATH_PROTOCOL);
+ }
+
+ return FALSE;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/BmMachine.h b/Board/EM/MeWrapper/AmtWrapper/Dxe/BmMachine.h
new file mode 100644
index 0000000..4ba1760
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/BmMachine.h
@@ -0,0 +1,102 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/BmMachine.h 2 10/30/12 8:23a Klzhan $
+//
+// $Revision: 2 $
+//
+// $Date: 10/30/12 8:23a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/BmMachine.h $
+//
+// 2 10/30/12 8:23a Klzhan
+// [TAG] EIP92074
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] AMT EFI Boot fail
+// [RootCause] File path incorrect.
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:43a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: BmMachine.h
+//
+// Description: Boot Manager Machine type
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2004, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ BmMachine.h
+
+Abstract:
+
+ Boot Manager Machine type
+
+
+
+Revision History
+
+--*/
+
+#ifndef _BM_MACHINE_H
+#define _BM_MACHINE_H
+#include "Token.h"
+
+#if x64_BUILD
+#define DEFAULT_REMOVABLE_FILE_NAME L"\\EFI\\BOOT\\BOOTX64.EFI"
+#else
+#define DEFAULT_REMOVABLE_FILE_NAME L"\\EFI\\BOOT\\BOOTIA32.EFI"
+#endif
+
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/DevicePath.c b/Board/EM/MeWrapper/AmtWrapper/Dxe/DevicePath.c
new file mode 100644
index 0000000..7fa871e
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/DevicePath.c
@@ -0,0 +1,1078 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/DevicePath.c 1 2/08/12 1:08a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:08a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/DevicePath.c $
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:43a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: DevicePath.h
+//
+// Description:
+// BDS internal function define the default device path string, it can be
+// replaced by platform device path.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2004, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ DevicePath.c
+
+Abstract:
+
+ BDS internal function define the default device path string, it can be
+ replaced by platform device path.
+
+--*/
+
+#include "Tiano.h"
+#include "EfiPrintLib.h"
+#include "bdslib.h"
+
+EFI_GUID UnknownDeviceGuid = UNKNOWN_DEVICE_GUID;
+
+EFI_GUID mEfiMsgPcAnsiGuid = DEVICE_PATH_MESSAGING_PC_ANSI;
+EFI_GUID mEfiMsgVt100Guid = DEVICE_PATH_MESSAGING_VT_100;
+EFI_GUID mEfiMsgVt100PlusGuid = DEVICE_PATH_MESSAGING_VT_100_PLUS;
+EFI_GUID mEfiMsgVt100Utf8Guid = DEVICE_PATH_MESSAGING_VT_UTF8;
+
+VOID *
+ReallocatePool (
+ IN VOID *OldPool,
+ IN UINTN OldSize,
+ IN UINTN NewSize
+)
+/*++
+
+Routine Description:
+
+ Adjusts the size of a previously allocated buffer.
+
+Arguments:
+
+ OldPool - A pointer to the buffer whose size is being adjusted.
+
+ OldSize - The size of the current buffer.
+
+ NewSize - The size of the new buffer.
+
+Returns:
+
+ EFI_SUCEESS - The requested number of bytes were allocated.
+
+ EFI_OUT_OF_RESOURCES - The pool requested could not be allocated.
+
+ EFI_INVALID_PARAMETER - The buffer was invalid.
+
+--*/
+{
+ VOID *NewPool;
+
+ NewPool = NULL;
+ if (NewSize)
+ {
+ NewPool = EfiLibAllocateZeroPool (NewSize);
+ }
+
+ if (OldPool)
+ {
+ if (NewPool)
+ {
+ EfiCopyMem (NewPool, OldPool, OldSize < NewSize ? OldSize : NewSize);
+ }
+
+ gBS->FreePool (OldPool);
+ }
+
+ return NewPool;
+}
+
+CHAR16 *
+CatPrint (
+ IN OUT POOL_PRINT *Str,
+ IN CHAR16 *fmt,
+ ...
+)
+/*++
+
+Routine Description:
+
+ Concatenates a formatted unicode string to allocated pool.
+ The caller must free the resulting buffer.
+
+Arguments:
+
+ Str - Tracks the allocated pool, size in use, and
+ amount of pool allocated.
+
+ fmt - The format string
+
+Returns:
+
+ Allocated buffer with the formatted string printed in it.
+ The caller must free the allocated buffer. The buffer
+ allocation is not packed.
+
+--*/
+{
+ UINT16 *AppendStr;
+ VA_LIST args;
+ UINTN strsize;
+
+ AppendStr = EfiLibAllocateZeroPool (0x1000);
+ if (AppendStr == NULL)
+ {
+ return Str->str;
+ }
+
+ VA_START (args, fmt);
+ VSPrint (AppendStr, 0x1000, fmt, args);
+ VA_END (args);
+ if (NULL == Str->str)
+ {
+ strsize = EfiStrSize (AppendStr);
+ Str->str = EfiLibAllocateZeroPool (strsize);
+ ASSERT (Str->str != NULL);
+ }
+ else
+ {
+ strsize = EfiStrSize (AppendStr) + EfiStrSize (Str->str) - sizeof (UINT16);
+ Str->str = ReallocatePool (
+ Str->str,
+ EfiStrSize (Str->str),
+ strsize
+ );
+ ASSERT (Str->str != NULL);
+ }
+
+ Str->maxlen = MAX_CHAR * sizeof (UINT16);
+ if (strsize < Str->maxlen)
+ {
+ EfiStrCat (Str->str, AppendStr);
+ Str->len = strsize - sizeof (UINT16);
+ }
+
+ gBS->FreePool (AppendStr);
+ return Str->str;
+}
+
+EFI_DEVICE_PATH_PROTOCOL *
+BdsLibUnpackDevicePath (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevPath
+)
+/*++
+
+Routine Description:
+
+ Function unpacks a device path data structure so that all the nodes
+ of a device path are naturally aligned.
+
+Arguments:
+
+ DevPath - A pointer to a device path data structure
+
+Returns:
+
+ If the memory for the device path is successfully allocated, then a
+ pointer to the new device path is returned. Otherwise, NULL is returned.
+
+--*/
+{
+ EFI_DEVICE_PATH_PROTOCOL *Src;
+ EFI_DEVICE_PATH_PROTOCOL *Dest;
+ EFI_DEVICE_PATH_PROTOCOL *NewPath;
+ UINTN Size;
+
+ //
+ // Walk device path and round sizes to valid boundries
+ //
+ Src = DevPath;
+ Size = 0;
+ for (;;)
+ {
+ Size += DevicePathNodeLength (Src);
+ Size += ALIGN_SIZE (Size);
+
+ if (IsDevicePathEnd (Src))
+ {
+ break;
+ }
+
+ Src = NextDevicePathNode (Src);
+ }
+ //
+ // Allocate space for the unpacked path
+ //
+ NewPath = EfiLibAllocateZeroPool (Size);
+ if (NewPath)
+ {
+
+ ASSERT (((UINTN) NewPath) % MIN_ALIGNMENT_SIZE == 0);
+
+ //
+ // Copy each node
+ //
+ Src = DevPath;
+ Dest = NewPath;
+ for (;;)
+ {
+ Size = DevicePathNodeLength (Src);
+ EfiCopyMem (Dest, Src, Size);
+ Size += ALIGN_SIZE (Size);
+ SetDevicePathNodeLength (Dest, Size);
+ Dest->Type |= EFI_DP_TYPE_UNPACKED;
+ Dest = (EFI_DEVICE_PATH_PROTOCOL *) (((UINT8 *) Dest) + Size);
+
+ if (IsDevicePathEnd (Src))
+ {
+ break;
+ }
+
+ Src = NextDevicePathNode (Src);
+ }
+ }
+
+ return NewPath;
+}
+
+VOID
+DevPathPci (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ PCI_DEVICE_PATH *Pci;
+
+ Pci = DevPath;
+ CatPrint (Str, L"Pci(%x|%x)", Pci->Device, Pci->Function);
+}
+
+VOID
+DevPathPccard (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ PCCARD_DEVICE_PATH *Pccard;
+
+ Pccard = DevPath;
+ CatPrint (Str, L"Pcmcia(Function%x)", Pccard->FunctionNumber);
+}
+
+VOID
+DevPathMemMap (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ MEMMAP_DEVICE_PATH *MemMap;
+
+ MemMap = DevPath;
+ CatPrint (
+ Str,
+ L"MemMap(%d:%.lx-%.lx)",
+ MemMap->MemoryType,
+ MemMap->StartingAddress,
+ MemMap->EndingAddress
+ );
+}
+
+VOID
+DevPathController (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ CONTROLLER_DEVICE_PATH *Controller;
+
+ Controller = DevPath;
+ CatPrint (Str, L"Ctrl(%d)", Controller->Controller);
+}
+
+VOID
+DevPathVendor (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+/*++
+
+Routine Description:
+
+ Convert Vendor device path to device name
+
+Arguments:
+
+ Str - The buffer store device name
+ DevPath - Pointer to vendor device path
+
+Returns:
+
+ When it return, the device name have been stored in *Str.
+
+--*/
+{
+ VENDOR_DEVICE_PATH *Vendor;
+ CHAR16 *Type;
+ INT32 *Temp;
+
+ Vendor = DevPath;
+ Temp = (INT32 *) (&Vendor->Guid);
+
+ switch (DevicePathType (&Vendor->Header))
+ {
+ case HARDWARE_DEVICE_PATH:
+ //
+ // If the device is a winntbus device, we will give it a readable device name.
+ //
+ Type = L"Hw";
+ break;
+
+ case MESSAGING_DEVICE_PATH:
+ //
+ // If the device is a winntbus device, we will give it a readable device name.
+ //
+ if (EfiCompareGuid (&Vendor->Guid, &mEfiMsgPcAnsiGuid))
+ {
+ CatPrint (Str, L"%s", L"PC-ANSI");
+ return ;
+ }
+ else if (EfiCompareGuid (&Vendor->Guid, &mEfiMsgVt100Guid))
+ {
+ CatPrint (Str, L"%s", L"VT100");
+ return ;
+ }
+ else if (EfiCompareGuid (&Vendor->Guid, &mEfiMsgVt100PlusGuid))
+ {
+ CatPrint (Str, L"%s", L"VT100+");
+ return ;
+ }
+ else if (EfiCompareGuid (&Vendor->Guid, &mEfiMsgVt100Utf8Guid))
+ {
+ CatPrint (Str, L"%s", L"VT100-UTF8");
+ return ;
+ }
+ else
+ {
+ Type = L"Msg";
+ break;
+ }
+
+ case MEDIA_DEVICE_PATH:
+ Type = L"Media";
+ break;
+
+ default:
+ Type = L"?";
+ break;
+ }
+
+ CatPrint (Str, L"Ven%s(%g)", Type, &Vendor->Guid);
+}
+
+VOID
+DevPathAcpi (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ ACPI_HID_DEVICE_PATH *Acpi;
+
+ Acpi = DevPath;
+ if ((Acpi->HID & PNP_EISA_ID_MASK) == PNP_EISA_ID_CONST)
+ {
+ CatPrint (Str, L"Acpi(PNP%04x,%x)", EISA_ID_TO_NUM (Acpi->HID), Acpi->UID);
+ }
+ else
+ {
+ CatPrint (Str, L"Acpi(%08x,%x)", Acpi->HID, Acpi->UID);
+ }
+}
+
+VOID
+DevPathAtapi (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ ATAPI_DEVICE_PATH *Atapi;
+
+ Atapi = DevPath;
+ CatPrint (
+ Str,
+ L"Ata(%s,%s)",
+ Atapi->PrimarySecondary ? L"Secondary" : L"Primary",
+ Atapi->SlaveMaster ? L"Slave" : L"Master"
+ );
+}
+
+VOID
+DevPathScsi (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ SCSI_DEVICE_PATH *Scsi;
+
+ Scsi = DevPath;
+ CatPrint (Str, L"Scsi(Pun%x,Lun%x)", Scsi->Pun, Scsi->Lun);
+}
+
+VOID
+DevPathFibre (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ FIBRECHANNEL_DEVICE_PATH *Fibre;
+
+ Fibre = DevPath;
+ CatPrint (Str, L"Fibre(Wwn%lx,Lun%x)", Fibre->WWN, Fibre->Lun);
+}
+
+VOID
+DevPath1394 (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ F1394_DEVICE_PATH *F1394;
+
+ F1394 = DevPath;
+ CatPrint (Str, L"1394(%g)", &F1394->Guid);
+}
+
+VOID
+DevPathUsb (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ USB_DEVICE_PATH *Usb;
+
+ Usb = DevPath;
+ CatPrint (Str, L"Usb(%x, %x)", Usb->ParentPortNumber, Usb->InterfaceNumber);
+}
+
+VOID
+DevPathUsbClass (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ USB_CLASS_DEVICE_PATH *UsbClass;
+
+ UsbClass = DevPath;
+ CatPrint (
+ Str,
+ L"Usb Class(%x, %x, %x, %x, %x)",
+ UsbClass->VendorId,
+ UsbClass->ProductId,
+ UsbClass->DeviceClass,
+ UsbClass->DeviceSubClass,
+ UsbClass->DeviceProtocol
+ );
+}
+
+VOID
+DevPathI2O (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ I2O_DEVICE_PATH *I2O;
+
+ I2O = DevPath;
+ CatPrint (Str, L"I2O(%x)", I2O->Tid);
+}
+
+VOID
+DevPathMacAddr (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ MAC_ADDR_DEVICE_PATH *MAC;
+ UINTN HwAddressSize;
+ UINTN Index;
+
+ MAC = DevPath;
+
+ HwAddressSize = sizeof (EFI_MAC_ADDRESS);
+ if (MAC->IfType == 0x01 || MAC->IfType == 0x00)
+ {
+ HwAddressSize = 6;
+ }
+
+ CatPrint (Str, L"Mac(");
+
+ for (Index = 0; Index < HwAddressSize; Index++)
+ {
+ CatPrint (Str, L"%02x", MAC->MacAddress.Addr[Index]);
+ }
+
+ CatPrint (Str, L")");
+}
+
+VOID
+DevPathIPv4 (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ IPv4_DEVICE_PATH *IP;
+
+ IP = DevPath;
+ CatPrint (
+ Str,
+ L"IPv4(%d.%d.%d.%d:%d)",
+ IP->RemoteIpAddress.Addr[0],
+ IP->RemoteIpAddress.Addr[1],
+ IP->RemoteIpAddress.Addr[2],
+ IP->RemoteIpAddress.Addr[3],
+ IP->RemotePort
+ );
+}
+
+VOID
+DevPathIPv6 (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ IPv6_DEVICE_PATH *IP;
+
+ IP = DevPath;
+ CatPrint (Str, L"IP-v6(not-done)");
+}
+
+VOID
+DevPathInfiniBand (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ INFINIBAND_DEVICE_PATH *InfiniBand;
+
+ InfiniBand = DevPath;
+ CatPrint (Str, L"InfiniBand(not-done)");
+}
+
+VOID
+DevPathUart (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ UART_DEVICE_PATH *Uart;
+ CHAR8 Parity;
+
+ Uart = DevPath;
+ switch (Uart->Parity)
+ {
+ case 0:
+ Parity = 'D';
+ break;
+
+ case 1:
+ Parity = 'N';
+ break;
+
+ case 2:
+ Parity = 'E';
+ break;
+
+ case 3:
+ Parity = 'O';
+ break;
+
+ case 4:
+ Parity = 'M';
+ break;
+
+ case 5:
+ Parity = 'S';
+ break;
+
+ default:
+ Parity = 'x';
+ break;
+ }
+
+ if (Uart->BaudRate == 0)
+ {
+ CatPrint (Str, L"Uart(DEFAULT %c", Parity);
+ }
+ else
+ {
+ CatPrint (Str, L"Uart(%d %c", Uart->BaudRate, Parity);
+ }
+
+ if (Uart->DataBits == 0)
+ {
+ CatPrint (Str, L"D");
+ }
+ else
+ {
+ CatPrint (Str, L"%d", Uart->DataBits);
+ }
+
+ switch (Uart->StopBits)
+ {
+ case 0:
+ CatPrint (Str, L"D)");
+ break;
+
+ case 1:
+ CatPrint (Str, L"1)");
+ break;
+
+ case 2:
+ CatPrint (Str, L"1.5)");
+ break;
+
+ case 3:
+ CatPrint (Str, L"2)");
+ break;
+
+ default:
+ CatPrint (Str, L"x)");
+ break;
+ }
+}
+
+VOID
+DevPathHardDrive (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ HARDDRIVE_DEVICE_PATH *Hd;
+
+ Hd = DevPath;
+ switch (Hd->SignatureType)
+ {
+ case SIGNATURE_TYPE_MBR:
+ CatPrint (
+ Str,
+ L"HD(Part%d,Sig%08x)",
+ Hd->PartitionNumber,
+ *((UINT32 *) (&(Hd->Signature[0])))
+ );
+ break;
+
+ case SIGNATURE_TYPE_GUID:
+ CatPrint (
+ Str,
+ L"HD(Part%d,Sig%g)",
+ Hd->PartitionNumber,
+ (EFI_GUID *) &(Hd->Signature[0])
+ );
+ break;
+
+ default:
+ CatPrint (
+ Str,
+ L"HD(Part%d,MBRType=%02x,SigType=%02x)",
+ Hd->PartitionNumber,
+ Hd->MBRType,
+ Hd->SignatureType
+ );
+ break;
+ }
+}
+
+VOID
+DevPathCDROM (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ CDROM_DEVICE_PATH *Cd;
+
+ Cd = DevPath;
+ CatPrint (Str, L"CDROM(Entry%x)", Cd->BootEntry);
+}
+
+VOID
+DevPathFilePath (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ FILEPATH_DEVICE_PATH *Fp;
+
+ Fp = DevPath;
+ CatPrint (Str, L"%s", Fp->PathName);
+}
+
+VOID
+DevPathMediaProtocol (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ MEDIA_PROTOCOL_DEVICE_PATH *MediaProt;
+
+ MediaProt = DevPath;
+ CatPrint (Str, L"%g", &MediaProt->Protocol);
+}
+
+VOID
+DevPathFvFilePath (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvFilePath;
+
+ FvFilePath = DevPath;
+ CatPrint (Str, L"%g", &FvFilePath->NameGuid);
+}
+
+VOID
+DevPathBssBss (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ BBS_BBS_DEVICE_PATH *Bbs;
+ CHAR16 *Type;
+
+ Bbs = DevPath;
+ switch (Bbs->DeviceType)
+ {
+ case BBS_TYPE_FLOPPY:
+ Type = L"Floppy";
+ break;
+
+ case BBS_TYPE_HARDDRIVE:
+ Type = L"Harddrive";
+ break;
+
+ case BBS_TYPE_CDROM:
+ Type = L"CDROM";
+ break;
+
+ case BBS_TYPE_PCMCIA:
+ Type = L"PCMCIA";
+ break;
+
+ case BBS_TYPE_USB:
+ Type = L"Usb";
+ break;
+
+ case BBS_TYPE_EMBEDDED_NETWORK:
+ Type = L"Net";
+ break;
+
+ default:
+ Type = L"?";
+ break;
+ }
+ //
+ // Since current Print function hasn't implemented %a (for ansi string)
+ // we will only print Unicode strings.
+ //
+ CatPrint (Str, L"Legacy-%s", Type);
+}
+
+VOID
+DevPathEndInstance (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ CatPrint (Str, L",");
+}
+
+VOID
+DevPathNodeUnknown (
+ IN OUT POOL_PRINT *Str,
+ IN VOID *DevPath
+)
+{
+ CatPrint (Str, L"?");
+}
+
+DEVICE_PATH_STRING_TABLE DevPathTable[] = {
+ HARDWARE_DEVICE_PATH,
+ HW_PCI_DP,
+ DevPathPci,
+ HARDWARE_DEVICE_PATH,
+ HW_PCCARD_DP,
+ DevPathPccard,
+ HARDWARE_DEVICE_PATH,
+ HW_MEMMAP_DP,
+ DevPathMemMap,
+ HARDWARE_DEVICE_PATH,
+ HW_VENDOR_DP,
+ DevPathVendor,
+ HARDWARE_DEVICE_PATH,
+ HW_CONTROLLER_DP,
+ DevPathController,
+ ACPI_DEVICE_PATH,
+ ACPI_DP,
+ DevPathAcpi,
+ MESSAGING_DEVICE_PATH,
+ MSG_ATAPI_DP,
+ DevPathAtapi,
+ MESSAGING_DEVICE_PATH,
+ MSG_SCSI_DP,
+ DevPathScsi,
+ MESSAGING_DEVICE_PATH,
+ MSG_FIBRECHANNEL_DP,
+ DevPathFibre,
+ MESSAGING_DEVICE_PATH,
+ MSG_1394_DP,
+ DevPath1394,
+ MESSAGING_DEVICE_PATH,
+ MSG_USB_DP,
+ DevPathUsb,
+ MESSAGING_DEVICE_PATH,
+ MSG_USB_CLASS_DP,
+ DevPathUsbClass,
+ MESSAGING_DEVICE_PATH,
+ MSG_I2O_DP,
+ DevPathI2O,
+ MESSAGING_DEVICE_PATH,
+ MSG_MAC_ADDR_DP,
+ DevPathMacAddr,
+ MESSAGING_DEVICE_PATH,
+ MSG_IPv4_DP,
+ DevPathIPv4,
+ MESSAGING_DEVICE_PATH,
+ MSG_IPv6_DP,
+ DevPathIPv6,
+ MESSAGING_DEVICE_PATH,
+ MSG_INFINIBAND_DP,
+ DevPathInfiniBand,
+ MESSAGING_DEVICE_PATH,
+ MSG_UART_DP,
+ DevPathUart,
+ MESSAGING_DEVICE_PATH,
+ MSG_VENDOR_DP,
+ DevPathVendor,
+ MEDIA_DEVICE_PATH,
+ MEDIA_HARDDRIVE_DP,
+ DevPathHardDrive,
+ MEDIA_DEVICE_PATH,
+ MEDIA_CDROM_DP,
+ DevPathCDROM,
+ MEDIA_DEVICE_PATH,
+ MEDIA_VENDOR_DP,
+ DevPathVendor,
+ MEDIA_DEVICE_PATH,
+ MEDIA_FILEPATH_DP,
+ DevPathFilePath,
+ MEDIA_DEVICE_PATH,
+ MEDIA_PROTOCOL_DP,
+ DevPathMediaProtocol,
+ MEDIA_DEVICE_PATH,
+ MEDIA_FV_FILEPATH_DP,
+ DevPathFvFilePath,
+ BBS_DEVICE_PATH,
+ BBS_BBS_DP,
+ DevPathBssBss,
+ END_DEVICE_PATH_TYPE,
+ END_INSTANCE_DEVICE_PATH_SUBTYPE,
+ DevPathEndInstance,
+ 0,
+ 0,
+ NULL
+ };
+
+CHAR16 *
+DevicePathToStr (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevPath
+)
+/*++
+
+ Turns the Device Path into a printable string. Allcoates
+ the string from pool. The caller must SafeFreePool the returned
+ string.
+
+--*/
+{
+ POOL_PRINT Str;
+ EFI_DEVICE_PATH_PROTOCOL *DevPathNode;
+ VOID (*DumpNode) (POOL_PRINT *, VOID *);
+
+ UINTN Index;
+ UINTN NewSize;
+
+ EfiZeroMem (&Str, sizeof (Str));
+
+ if (DevPath == NULL)
+ {
+ goto Done;
+ }
+ //
+ // Unpacked the device path
+ //
+ DevPath = BdsLibUnpackDevicePath (DevPath);
+ ASSERT (DevPath);
+
+ //
+ // Process each device path node
+ //
+ DevPathNode = DevPath;
+ while (!IsDevicePathEnd (DevPathNode))
+ {
+ //
+ // Find the handler to dump this device path node
+ //
+ DumpNode = NULL;
+ for (Index = 0; DevPathTable[Index].Function; Index += 1)
+ {
+
+ if (DevicePathType (DevPathNode) == DevPathTable[Index].Type &&
+ DevicePathSubType (DevPathNode) == DevPathTable[Index].SubType
+ )
+ {
+ DumpNode = DevPathTable[Index].Function;
+ break;
+ }
+ }
+ //
+ // If not found, use a generic function
+ //
+ if (!DumpNode)
+ {
+ DumpNode = DevPathNodeUnknown;
+ }
+ //
+ // Put a path seperator in if needed
+ //
+ if (Str.len && DumpNode != DevPathEndInstance)
+ {
+ CatPrint (&Str, L"/");
+ }
+ //
+ // Print this node of the device path
+ //
+ DumpNode (&Str, DevPathNode);
+
+ //
+ // Next device path node
+ //
+ DevPathNode = NextDevicePathNode (DevPathNode);
+ }
+ //
+ // Shrink pool used for string allocation
+ //
+ gBS->FreePool (DevPath);
+
+Done:
+ NewSize = (Str.len + 1) * sizeof (CHAR16);
+ Str.str = ReallocatePool (Str.str, NewSize, NewSize);
+ ASSERT (Str.str != NULL);
+ Str.str[Str.len] = 0;
+ return Str.str;
+}
+
+EFI_DEVICE_PATH_PROTOCOL *
+LibDuplicateDevicePathInstance (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevPath
+)
+/*++
+
+Routine Description:
+
+ Function creates a device path data structure that identically matches the
+ device path passed in.
+
+Arguments:
+
+ DevPath - A pointer to a device path data structure.
+
+Returns:
+
+ The new copy of DevPath is created to identically match the input.
+ Otherwise, NULL is returned.
+
+--*/
+{
+ EFI_DEVICE_PATH_PROTOCOL *NewDevPath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathInst;
+ EFI_DEVICE_PATH_PROTOCOL *Temp;
+ UINTN Size;
+
+ //
+ // get the size of an instance from the input
+ //
+ Temp = DevPath;
+ DevicePathInst = EfiDevicePathInstance (&Temp, &Size);
+
+ //
+ // Make a copy
+ //
+ NewDevPath = NULL;
+ if (Size)
+ {
+ NewDevPath = EfiLibAllocateZeroPool (Size);
+ ASSERT (NewDevPath != NULL);
+ }
+
+ if (NewDevPath)
+ {
+ EfiCopyMem (NewDevPath, DevicePathInst, Size);
+ }
+
+ return NewDevPath;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/KvmSupport.c b/Board/EM/MeWrapper/AmtWrapper/Dxe/KvmSupport.c
new file mode 100644
index 0000000..dab3fe4
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/KvmSupport.c
@@ -0,0 +1,135 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/KvmSupport.c 1 2/08/12 1:08a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:08a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/KvmSupport.c $
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: KvmSupport.c
+//
+// Description: Support routines for KVM init in the BDS
+//
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+ This file contains an 'Intel Peripheral Driver' and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+--*/
+
+/*++
+
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+
+Module Name:
+
+ KvmSupport.c
+
+Abstract:
+
+ Support routines for KVM init in the BDS
+
+--*/
+// Remove for RC 0.8
+/*
+#include "KvmSupport.h"
+
+BOOLEAN
+BdsKvmInitialization (
+ IN VOID
+ )
+*/
+/*++
+
+Routine Description:
+
+ Request KVM message.
+
+Arguments:
+
+ None.
+
+Returns:
+
+ True KVM Boot Option is an active.
+
+--*/
+/*
+{
+ EFI_STATUS Status;
+ UINT32 ResponseCode;
+
+ if(ActiveManagementEnableKvm() == TRUE) {
+ Status = HeciQueryKvmRequest(QUERY_REQUEST, &ResponseCode);
+ if (EFI_ERROR (Status)) {
+ gST->ConOut->ClearScreen (gST->ConOut);
+ gST->ConOut->OutputString (gST->ConOut, L"Error!! Times up and the KVM session was cancelled!!");
+ Status = HeciQueryKvmRequest(CANCEL_REQUEST, &ResponseCode);
+ } else if (ResponseCode == KVM_SESSION_CANCELLED) {
+ gST->ConOut->ClearScreen (gST->ConOut);
+ gST->ConOut->OutputString (gST->ConOut, L"Error!! The request has rejected and the KVM session was cancelled!!");
+ } else {
+ return TRUE;
+ }
+ }
+
+ return FALSE;
+}
+*/
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/KvmSupport.h b/Board/EM/MeWrapper/AmtWrapper/Dxe/KvmSupport.h
new file mode 100644
index 0000000..2058d6b
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/KvmSupport.h
@@ -0,0 +1,119 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/KvmSupport.h 1 2/08/12 1:08a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:08a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/KvmSupport.h $
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: KvmSupport.h
+//
+// Description: KVM BDS Support include file
+//
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+ This file contains an 'Intel Peripheral Driver' and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+--*/
+
+/*++
+
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+
+Module Name:
+
+ KvmSupport.h
+
+Abstract:
+
+ KVM BDS Support include file
+
+--*/
+#ifndef _KVM_SUPPORT_H_
+#define _KVM_SUPPORT_H_
+
+#include "Tiano.h"
+#include "EfiDriverLib.h"
+#include "BdsLib.h"
+#include "AmtLib.h"
+#include "MeLib.h"
+
+BOOLEAN
+BdsKvmInitialization (
+ IN VOID
+ )
+/*++
+
+Routine Description:
+
+ Request KVM message.
+
+Arguments:
+
+ None.
+
+Returns:
+
+ True KVM Boot Option is an active.
+
+--*/
+;
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/Performance.c b/Board/EM/MeWrapper/AmtWrapper/Dxe/Performance.c
new file mode 100644
index 0000000..deb51a4
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/Performance.c
@@ -0,0 +1,431 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/Performance.c 3 5/14/14 9:53p Tristinchou $
+//
+// $Revision: 3 $
+//
+// $Date: 5/14/14 9:53p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/Performance.c $
+//
+// 3 5/14/14 9:53p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 2 9/19/12 6:35a Klzhan
+// Fix Build error when Performance is enabled.
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 2 9/21/11 9:00a Klzhan
+// [TAG] EIP69500
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Compiler Error when DXE_PERFORMANCE is on
+// [RootCause] EDK Library doesn't support this function.
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: Performance.c
+//
+// Description: help to get the system performance
+//
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2004 - 2005, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ Performance.c
+
+Abstract:
+
+ This file include the file which can help to get the system
+ performance, all the function will only include if the performance
+ switch is set.
+
+--*/
+
+#include "Tiano.h"
+#include "EfiDriverLib.h"
+#include "EfiPrintLib.h"
+
+#ifndef GUID_VARIABLE_DECLARATION
+#define GUID_VARIABLE_DECLARATION(Variable, Guid) extern EFI_GUID Variable
+#endif
+
+//#define EFI_DXE_PERFORMANCE
+
+#ifdef EFI_DXE_PERFORMANCE
+#include "EfiImage.h"
+#include "Include\Protocol\Performance.h"
+
+VOID
+ConvertChar16ToChar8 (
+ IN CHAR8 *Dest,
+ IN CHAR16 *Src
+ )
+{
+ while (*Src) {
+ *Dest++ = (UINT8) (*Src++);
+ }
+
+ *Dest = 0;
+}
+#include <token.h>
+#include EFI_ARCH_PROTOCOL_CONSUMER (Cpu)
+#include EFI_GUID_DEFINITION (GlobalVariable)
+
+
+extern EFI_STATUS GetTimerValue ( UINT64 *TimerValue );//extern UINT64 GetCpuTimer ();
+extern UINT64 DivU64x32 (UINT64 Dividend,UINTN Divisor,UINTN *Remainder);
+extern CHAR8 *EfiAsciiStrCpy (CHAR8 *Destination,CHAR8 *Source );
+
+#define Div64(a,b,c) DivU64x32(a,b,c)
+#define Strcpy(a,b) EfiAsciiStrCpy(a,b)
+//**********************************************************************
+// PERFORMANCE FUNCTIONS AND STRUCTURES
+//**********************************************************************
+
+#define EFI_PERF_PEI_ENTRY_MAX_NUM 50
+
+typedef struct {
+ CHAR8 Token[EFI_PERF_PDBFILENAME_LENGTH];
+ UINT32 Duration;
+} EFI_PERF_DATA;
+
+typedef struct {
+ UINT64 BootToOs;
+ UINT64 S3Resume;
+ UINT32 S3EntryNum;
+ EFI_PERF_DATA S3Entry[EFI_PERF_PEI_ENTRY_MAX_NUM];
+ UINT64 CpuFreq;
+ UINT64 BDSRaw;
+ UINT32 Count;
+ UINT32 Signiture;
+} EFI_PERF_HEADER;
+//*************************************************************************
+//<AMI_PHDR_START>
+//
+// Name: WriteBootToOsPerformanceData
+//
+// Description:
+// VOID WriteBootToOsPerformanceData() allocates a block of memory and
+// writes performance data into it.
+//
+// Input:
+// VOID.
+//
+// Output:
+// VOID.
+//
+// Modified:
+//
+// Referrals:
+// GetCpuTimer
+// Div64
+// Strcpy
+//
+// Notes:
+// This function must only be called once; by default, it is called by BDS.
+//
+//<AMI_PHDR_END>
+//*************************************************************************
+VOID WriteBootToOsPerformanceData (){
+ static EFI_PHYSICAL_ADDRESS AcpiLowMemoryBase = 0;
+ static BOOLEAN FirstCall = TRUE;
+
+ EFI_STATUS Status;
+ EFI_CPU_ARCH_PROTOCOL *Cpu;
+ EFI_PERFORMANCE_PROTOCOL *DrvPerf;
+ UINT32 AcpiLowMemoryLength;
+ UINT32 LimitCount;
+ EFI_PERF_HEADER PerfHeader;
+ EFI_PERF_DATA PerfData;
+ EFI_GAUGE_DATA *DumpData;
+ EFI_HANDLE *Handles;
+ UINTN NoHandles;
+ UINT8 *Ptr;
+ UINT8 *PdbFileName;
+ UINT32 Index;
+ UINT64 Ticker;
+ UINT64 Freq;
+ UINT32 Duration;
+ UINT64 CurrentTicker;
+ UINT64 TimerPeriod;
+ EFI_GUID gEfiGlobalVariableGuid = EFI_GLOBAL_VARIABLE_GUID;
+ IN CHAR8 *Dest;
+ IN CHAR16 *Src;
+ UINT32 VarAttr;
+ UINTN VarSize;
+
+
+
+ // Retrive time stamp count as early as possilbe
+ GetTimerValue(&Ticker);//Ticker = GetCpuTimer (); //Bruce[c]
+
+ // Allocate a block of memory that contain performance data to OS for the first call
+ if(FirstCall)
+ {
+ Status = gBS->AllocatePages (
+ AllocateAnyPages,
+ EfiRuntimeServicesData,
+ 4,
+ &AcpiLowMemoryBase
+ );
+ if (EFI_ERROR (Status)) {
+ return ;
+ }
+ }
+
+ AcpiLowMemoryLength = EFI_PAGES_TO_SIZE(4);
+
+ Ptr = (UINT8 *) ((UINT32) AcpiLowMemoryBase + sizeof (EFI_PERF_HEADER));
+ LimitCount = (AcpiLowMemoryLength - sizeof (EFI_PERF_HEADER)) / sizeof (EFI_PERF_DATA);
+
+ // Get performance architecture protocol
+ Status = gBS->LocateProtocol (
+ &gEfiPerformanceProtocolGuid,
+ NULL,
+ &DrvPerf
+ );
+ if (EFI_ERROR (Status)) {
+ gBS->FreePages (AcpiLowMemoryBase, 4);
+ return ;
+ }
+ // Initialize performance data structure
+ gBS->SetMem (&PerfHeader, sizeof (EFI_PERF_HEADER), 0);
+
+ // Get CPU frequency
+ Status = gBS->LocateProtocol (
+ &gEfiCpuArchProtocolGuid,
+ NULL,
+ &Cpu
+ );
+ if (EFI_ERROR (Status)) {
+ gBS->FreePages (AcpiLowMemoryBase, 4);
+ return ;
+ }
+ // Get Cpu Frequency
+ Status = Cpu->GetTimerValue (Cpu, 0, &(CurrentTicker), &TimerPeriod);
+ if (EFI_ERROR (Status)) {
+ gBS->FreePages (AcpiLowMemoryBase, 4);
+ return ;
+ }
+
+ Freq = Div64(1000000000000, (UINTN) TimerPeriod, NULL);
+ PerfHeader.CpuFreq = Freq;
+
+ // Record current raw performance data
+ PerfHeader.BDSRaw = Ticker;
+
+ // Put Detailed performance data into memory
+ Handles = NULL;
+ Status = gBS->LocateHandleBuffer (
+ AllHandles,
+ NULL,
+ NULL,
+ &NoHandles,
+ &Handles
+ );
+ if (EFI_ERROR (Status)) {
+ gBS->FreePages (AcpiLowMemoryBase, 1);
+ return ;
+ }
+
+ // Get DXE drivers performance
+ for (Index = 0; Index < NoHandles; Index++) {
+ Ticker = 0;
+ PdbFileName = NULL;
+ DumpData = DrvPerf->GetGauge (
+ DrvPerf, // Context
+ NULL, // Handle
+ NULL, // Token
+ NULL, // Host
+ NULL // PrecGauge
+ );
+ while (DumpData) {
+ if (DumpData->Handle == Handles[Index]) {
+ PdbFileName = &(DumpData->PdbFileName[0]);
+ if (DumpData->StartTick < DumpData->EndTick) {
+ Ticker += (DumpData->EndTick - DumpData->StartTick);
+ }
+ }
+
+ DumpData = DrvPerf->GetGauge (
+ DrvPerf, // Context
+ NULL, // Handle
+ NULL, // Token
+ NULL, // Host
+ DumpData // PrecGauge
+ );
+ }
+
+ Duration = (UINT32) Div64 (
+ Ticker,
+ (UINT32) Freq,
+ NULL
+ );
+
+ if (Duration > 0) {
+ gBS->SetMem (&PerfData, sizeof (EFI_PERF_DATA), 0);
+
+ if (PdbFileName != NULL) {
+ Strcpy (PerfData.Token, PdbFileName);
+ }
+
+ PerfData.Duration = Duration;
+
+ gBS->CopyMem (Ptr, &PerfData, sizeof (EFI_PERF_DATA));
+ Ptr += sizeof (EFI_PERF_DATA);
+
+ PerfHeader.Count++;
+ if (PerfHeader.Count == LimitCount) {
+ goto Done;
+ }
+ }
+ }
+
+ gBS->FreePool (Handles);
+
+ // Get inserted performance data
+ DumpData = DrvPerf->GetGauge (
+ DrvPerf, // Context
+ NULL, // Handle
+ NULL, // Token
+ NULL, // Host
+ NULL // PrecGauge
+ );
+ while (DumpData) {
+ if ((DumpData->Handle) || (DumpData->StartTick > DumpData->EndTick)) {
+ DumpData = DrvPerf->GetGauge (
+ DrvPerf, // Context
+ NULL, // Handle
+ NULL, // Token
+ NULL, // Host
+ DumpData // PrecGauge
+ );
+ continue;
+ }
+
+ gBS->SetMem (&PerfData, sizeof (EFI_PERF_DATA), 0);
+
+ //convert CHAR16 string to CHAR8 string
+ Src = DumpData->Token;
+ Dest = (UINT8 *) PerfData.Token;
+ while (*Src) *Dest++ = (UINT8) (*Src++);
+ *Dest = 0;
+
+ PerfData.Duration = (UINT32) Div64 (
+ DumpData->EndTick - DumpData->StartTick,
+ (UINT32) Freq,
+ NULL
+ );
+
+ gBS->CopyMem(Ptr, &PerfData, sizeof (EFI_PERF_DATA));
+ Ptr += sizeof (EFI_PERF_DATA);
+
+ PerfHeader.Count++;
+ if (PerfHeader.Count == LimitCount) {
+ goto Done;
+ }
+
+ DumpData = DrvPerf->GetGauge (
+ DrvPerf, // Context
+ NULL, // Handle
+ NULL, // Token
+ NULL, // Host
+ DumpData // PrecGauge
+ );
+ }
+
+Done:
+ PerfHeader.Signiture = 0x66726550;
+
+ // Put performance data to memory
+ gBS->CopyMem (
+ (UINTN *) (UINTN) AcpiLowMemoryBase,
+ &PerfHeader,
+ sizeof (EFI_PERF_HEADER)
+ );
+
+ if(FirstCall)
+ {
+ VarAttr = 0;
+ VarSize = 0;
+
+ Status = gRT->GetVariable(
+ L"PerfDataMemAddr",
+ &gEfiGlobalVariableGuid,
+ &VarAttr,
+ &VarSize,
+ NULL );
+ if( EFI_ERROR(Status) && Status != EFI_BUFFER_TOO_SMALL )
+ {
+ VarAttr = EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS;
+ VarSize = sizeof(UINT32);
+ }
+
+ gRT->SetVariable (
+ L"PerfDataMemAddr",
+ &gEfiGlobalVariableGuid,
+ VarAttr,
+ VarSize,
+ (VOID *) &AcpiLowMemoryBase );
+
+ FirstCall = FALSE;
+ }
+}
+
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/MeWrapper/AmtWrapper/Dxe/Performance.h b/Board/EM/MeWrapper/AmtWrapper/Dxe/Performance.h
new file mode 100644
index 0000000..4fffd9e
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Dxe/Performance.h
@@ -0,0 +1,87 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/Performance.h 1 2/08/12 1:08a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:08a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperDxe/Performance.h $
+//
+// 1 2/08/12 1:08a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:44a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: Performance.h
+//
+// Description: This file included the performance relete function header
+// and definition.
+//
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2004, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ Performance.h
+
+Abstract:
+
+ This file included the performance relete function header and
+ definition.
+
+--*/
+
+#ifndef _PERF_H_
+#define _PERF_H_
+
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapper/AmtWrapper.c b/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapper/AmtWrapper.c
new file mode 100644
index 0000000..d6fc5c3
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapper/AmtWrapper.c
@@ -0,0 +1,68 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperProtocolLib/AmtWrapper/AmtWrapper.c 1 2/08/12 1:09a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:09a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperProtocolLib/AmtWrapper/AmtWrapper.c $
+//
+// 1 2/08/12 1:09a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:42a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AmtWrapper.c
+//
+// Description: Amt Wrapper Define file
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include "Efi.h"
+
+#include EFI_PROTOCOL_DEFINITION(AmtWrapper)
+
+EFI_GUID gEfiAmtWrapperProtocolGuid = EFI_AMT_WRAPPER_PROTOCOL_GUID;
+
+EFI_GUID_STRING(&gEfiAmtWrapperProtocolGuid, "AMT Wrapper Protocol", "AMT Wrapper Protocol");
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapper/AmtWrapper.h b/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapper/AmtWrapper.h
new file mode 100644
index 0000000..57ef64c
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapper/AmtWrapper.h
@@ -0,0 +1,180 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperProtocolLib/AmtWrapper/AmtWrapper.h 1 2/08/12 1:09a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:09a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperProtocolLib/AmtWrapper/AmtWrapper.h $
+//
+// 1 2/08/12 1:09a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:43a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AmtWrapper.c
+//
+// Description: Amt Wrapper Define file
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#ifndef _EFI_BDS_ASF_H
+#define _EFI_BDS_ASF_H
+
+#define EFI_AMT_WRAPPER_PROTOCOL_GUID \
+ { 0xd54f49f6, 0xdd4, 0x4276, 0xb0, 0x9c, 0xdf, 0xe1, 0xfd, 0x80, 0x85, 0xf0 }
+
+EFI_FORWARD_DECLARATION (AMT_WRAPPER_PROTOCOL);
+
+typedef
+EFI_STATUS
+(EFIAPI *AMT_WRAPPER_INIT) (
+ EFI_HANDLE ImageHandle,
+ EFI_SYSTEM_TABLE *SystemTable
+);
+
+typedef
+BOOLEAN
+(EFIAPI *AMT_WRAPPER_GET) (
+ UINTN Index,
+ VOID *pVar
+);
+
+typedef
+BOOLEAN
+(EFIAPI *AMT_WRAPPER_SET) (
+ UINTN Index,
+ VOID *pVar
+);
+
+typedef
+BOOLEAN
+(EFIAPI *ACTIVE_MANAGEMENT_ENABLE_KVM) (
+ IN VOID
+);
+
+typedef
+BOOLEAN
+(EFIAPI *AMT_INITIALIZATION_KVM) (
+ IN VOID
+);
+
+typedef
+BOOLEAN
+(EFIAPI *ACTIVE_MANAGEMENT_ENABLE_SOL) (
+ IN VOID
+);
+
+typedef
+BOOLEAN
+(EFIAPI *ACTIVE_MANAGEMENT_ENABLE_IDER) (
+ IN VOID
+);
+
+/*
+typedef
+EFI_STATUS
+(EFIAPI *AMT_WRAPPER_INITIALIZATION) (
+ IN VOID
+);
+*/
+
+typedef
+EFI_STATUS
+(EFIAPI *BDS_BOOT_VIA_ASF) (
+ IN VOID
+);
+
+typedef
+BOOLEAN
+(EFIAPI *ACTIVE_MANAGEMENT_PAUSE_BOOT) (
+ IN VOID
+);
+
+typedef
+BOOLEAN
+(EFIAPI *ACTIVE_MANAGEMENT_ENTER_SETUP) (
+ IN VOID
+);
+
+typedef
+BOOLEAN
+(EFIAPI *ACTIVE_MANAGEMENT_CONSOLE_LOCKED) (
+ IN VOID
+);
+typedef
+EFI_STATUS
+(EFIAPI *BDSLIB_UPDATE_CONSOLE_VARIABLE) (
+ IN CHAR16 *ConVarName,
+ IN EFI_DEVICE_PATH_PROTOCOL *CustomizedConDevicePath,
+ IN EFI_DEVICE_PATH_PROTOCOL *ExclusiveDevicePath
+);
+
+typedef struct _AMT_WRAPPER_PROTOCOL {
+ AMT_WRAPPER_INIT AmtWrapperInit;
+ AMT_WRAPPER_GET AmtWrapperGet;
+ AMT_WRAPPER_SET AmtWrapperSet;
+ ACTIVE_MANAGEMENT_ENABLE_SOL ActiveManagementEnableSol;
+ ACTIVE_MANAGEMENT_ENABLE_IDER ActiveManagementEnableIdeR;
+ ACTIVE_MANAGEMENT_PAUSE_BOOT ActiveManagementPauseBoot;
+ ACTIVE_MANAGEMENT_ENTER_SETUP ActiveManagementEnterSetup;
+ //AMT_WRAPPER_INITIALIZATION AsfSupportInit;
+ BDS_BOOT_VIA_ASF BdsBootViaAsf;
+ BDSLIB_UPDATE_CONSOLE_VARIABLE BdsLibUpdateConsoleVariable;
+ ACTIVE_MANAGEMENT_CONSOLE_LOCKED ActiveManagementConsoleLocked;
+ ACTIVE_MANAGEMENT_ENABLE_KVM ActiveManagementEnableKvm;
+ AMT_INITIALIZATION_KVM AmtInitializationKvm;
+} AMT_WRAPPER_PROTOCOL;
+
+#define GET_SOL_DP 1
+#define GET_TIME_OUT 2 // return UINT16
+#define GET_BOOT_OPTION 3 // return UINT16
+#define GET_IS_SOL 4 // return UINT16
+#define GET_IS_IDER 5 // return UINT16
+
+#define SET_BIOS_WDT_START 1
+#define SET_WDT_STOP 2
+#define SET_OS_SOL 3
+#define SET_OS_WDT_START 4
+
+#endif //_EFI_HECI_H
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapperProtocolLib.cif b/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapperProtocolLib.cif
new file mode 100644
index 0000000..403d469
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapperProtocolLib.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "AmtWrapperProtocolLib"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\AmtWrapper\Protocol"
+ RefName = "AmtWrapperProtocolLib"
+[files]
+"AmtWrapperProtocolLib.sdl"
+"AmtWrapperProtocolLib.mak"
+"AmtWrapper\AmtWrapper.h"
+"AmtWrapper\AmtWrapper.c"
+<endComponent>
diff --git a/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapperProtocolLib.mak b/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapperProtocolLib.mak
new file mode 100644
index 0000000..551df9d
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapperProtocolLib.mak
@@ -0,0 +1,65 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/AmtWrapper/AmtWrapperProtocolLib/AmtWrapperProtocolLib.mak 1 2/08/12 1:09a Klzhan $
+#
+# $Revision: 1 $
+#
+# $Date: 2/08/12 1:09a $
+#**********************************************************************
+# Revision History
+# ----------------
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: AmtWrapperProtocolLib.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all : AmtWrapperProtocolLib
+
+$(BUILD_DIR)\AmtWrapperProtocolLib.lib : AmtWrapperProtocolLib
+
+AmtWrapperProtocolLib : $(BUILD_DIR)\AmtWrapperProtocolLib.mak AmtWrapperProtocolLibBin
+
+$(BUILD_DIR)\AmtWrapperProtocolLib.mak : $(AmtWrapperProtocolLib_DIR)\$(@B).cif $(AmtWrapperProtocolLib_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(AmtWrapperProtocolLib_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+AmtWrapperProtocolLib_INCLUDES=\
+ $(EDK_INCLUDES) \
+ $(ME_INCLUDES) \
+ $(MISCFRAMEWORK_INCLUDES)
+
+AmtWrapperProtocolLibBin :
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\AmtWrapperProtocolLib.mak all\
+ "MY_INCLUDES=$(AmtWrapperProtocolLib_INCLUDES)" \
+ TYPE=LIBRARY \
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#********************************************************************** \ No newline at end of file
diff --git a/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapperProtocolLib.sdl b/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapperProtocolLib.sdl
new file mode 100644
index 0000000..bc00d62
--- /dev/null
+++ b/Board/EM/MeWrapper/AmtWrapper/Protocol/AmtWrapperProtocolLib.sdl
@@ -0,0 +1,34 @@
+TOKEN
+ Name = "AmtWrapperProtocolLib_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable AmtWrapperProtocolLib support in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "AmtWrapperProtocolLib_DIR"
+End
+
+ELINK
+ Name = "/I$(AmtWrapperProtocolLib_DIR)\AmtWrapper"
+ Parent = "ME_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+MODULE
+ Help = "Includes AmtWrapperProtocolLib.mak to Project"
+ File = "AmtWrapperProtocolLib.mak"
+End
+
+ELINK
+ Name = "AmtWrapperProtocolLib_LIB"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AmtWrapperProtocolLib.lib"
+ Parent = "AmtWrapperProtocolLib_LIB"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/MeWrapper/AtAmUi/AtAmUi.c b/Board/EM/MeWrapper/AtAmUi/AtAmUi.c
new file mode 100644
index 0000000..8a2cffe
--- /dev/null
+++ b/Board/EM/MeWrapper/AtAmUi/AtAmUi.c
@@ -0,0 +1,1120 @@
+/** @file
+ This file contines rouines responsible for handling the UI.
+
+@copyright
+ Copyright (c) 2012 - 2013 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+
+**/
+#include "AtAmUi.h"
+#include EFI_PROTOCOL_CONSUMER (ConsoleControl)
+#include EFI_PROTOCOL_CONSUMER (GraphicsOutput)
+DXE_AT_POLICY_PROTOCOL *mDxePlatformAtPolicy;
+EFI_GUID gAlertAtHandlerGuid = ME_ALERT_AT_HANDLER_GUID;
+EFI_GUID gEfiAtAmProtocolGuid = EFI_ATAM_PROTOCOL_GUID;
+EFI_EVENT gAlertAtHandlerEvent;
+EFI_ATAM_PROTOCOL *mAtAm = NULL;
+
+//
+// Driver entry point
+//
+EFI_DRIVER_ENTRY_POINT (AtAmUiEntryPoint);
+
+/**
+ ATAM UI driver entry point.
+
+ @param[in] ImageHandle Handle for this drivers loaded image protocol.
+ @param[in] SystemTable EFI system table.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_UNSUPPORTED The function is unsupported by this driver
+**/
+EFI_STATUS
+AtAmUiEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ EfiInitializeDriverLib (ImageHandle, SystemTable);
+ Status = gBS->LocateProtocol (
+ &gDxePlatformAtPolicyGuid,
+ NULL,
+ &mDxePlatformAtPolicy
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: No AT Platform Policy Protocol available"));
+ return Status;
+ }
+ ASSERT_EFI_ERROR (Status);
+
+ if (mDxePlatformAtPolicy->At.AtAmBypass == 1) {
+ return EFI_SUCCESS;
+ }
+
+ if (mAtAm == NULL) {
+ Status = gBS->LocateProtocol (
+ &gEfiAtAmProtocolGuid,
+ NULL,
+ (VOID **) &mAtAm
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: ATAM Protocol failed, Status = %r\n", Status));
+ return Status;
+ } else {
+ DEBUG ((EFI_D_ERROR, "ATAM: ATAM Protocol success, Status = %r\n", Status));
+ }
+ }
+
+ Status = gBS->CreateEventEx (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ AtAmUiCallback,
+ NULL,
+ &gAlertAtHandlerGuid,
+ &gAlertAtHandlerEvent
+ );
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: AT - Error Creating Event to Process Suspend Mode\n"));
+ }
+
+ return Status;
+}
+EFI_CONSOLE_CONTROL_PROTOCOL *ConsoleControl;
+EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput;
+EFI_CONSOLE_CONTROL_SCREEN_MODE ScreenMode;
+EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *GraphicsModeInfo;
+UINTN UgaBltSize = 0;
+EFI_UGA_PIXEL *UgaBlt = NULL;
+INT32 TextMode;
+UINTN StyleGetTextMode();
+
+VOID
+GraphicsSave
+(
+ VOID
+)
+{
+ UINTN SizeOfGraphicsModeInfo;
+
+ EFI_STATUS
+ Status = gBS->LocateProtocol( &gEfiConsoleControlProtocolGuid, NULL, &ConsoleControl);
+
+ if(EFI_ERROR(Status))
+ {
+ ConsoleControl = NULL;
+ return;
+ }
+
+ Status = ConsoleControl->GetMode(ConsoleControl, &ScreenMode, NULL, NULL);
+ if(ScreenMode == EfiConsoleControlScreenText)
+ {
+ ConsoleControl = NULL;
+ return;
+ }
+
+ Status = gBS->LocateProtocol( &gEfiGraphicsOutputProtocolGuid, NULL, &GraphicsOutput);
+ if(EFI_ERROR(Status))
+ {
+ GraphicsOutput = NULL;
+ return;
+ }
+
+ Status = GraphicsOutput->QueryMode( GraphicsOutput, GraphicsOutput->Mode->Mode,
+ &SizeOfGraphicsModeInfo ,&GraphicsModeInfo);
+ if(EFI_ERROR(Status))
+ {
+ GraphicsModeInfo = NULL;
+ return;
+ }
+
+ UgaBltSize = GraphicsModeInfo->HorizontalResolution *
+ GraphicsModeInfo->VerticalResolution *
+ sizeof(EFI_UGA_PIXEL);
+
+ UgaBlt = AllocateZeroPool (UgaBltSize);
+ if( UgaBlt == NULL )
+ return;
+
+ Status = GraphicsOutput->Blt(
+ GraphicsOutput,
+ UgaBlt,
+ EfiBltVideoToBltBuffer,
+ 0, 0,
+ 0, 0,
+ GraphicsModeInfo->HorizontalResolution,
+ GraphicsModeInfo->VerticalResolution,
+ 0);
+
+ Status = ConsoleControl->SetMode( ConsoleControl, EfiConsoleControlScreenText );
+ TextMode = gST->ConOut->Mode->Mode;
+ gST->ConOut->SetMode(gST->ConOut, StyleGetTextMode());
+}
+
+VOID
+GraphicsRestore
+(
+ VOID
+)
+{
+ if(!ConsoleControl)
+ return;
+
+ gST->ConOut->SetMode(gST->ConOut, TextMode);
+ ConsoleControl->SetMode( ConsoleControl, EfiConsoleControlScreenGraphics );
+
+ if(!GraphicsOutput)
+ return;
+
+ if(!UgaBlt || !GraphicsModeInfo)
+ return;
+
+ GraphicsOutput->Blt(
+ GraphicsOutput,
+ UgaBlt,
+ EfiBltBufferToVideo,
+ 0, 0,
+ 0, 0,
+ GraphicsModeInfo->HorizontalResolution,
+ GraphicsModeInfo->VerticalResolution,
+ 0);
+
+ ZeroMem(UgaBlt, UgaBltSize);
+ FreePool(UgaBlt);
+}
+/**
+ ATAM UI callback.
+
+ @param[in] Event The event registered
+ @param[in] Context Event context. Not used in this event handler.
+
+ @retval None
+**/
+VOID
+EFIAPI
+AtAmUiCallback (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+ DXE_AT_POLICY_PROTOCOL *pAtPlatformPolicy;
+ AT_STATE_INFO AtStateInfo;
+ EFI_TPL TplBackup;
+
+ pAtPlatformPolicy = NULL;
+
+ DEBUG ((EFI_D_ERROR, "ATAM: AtAmUiCallback \n"));
+ //
+ // change TPL to APPLICATION as required by ConIn to function
+ //
+ TplBackup = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+ gBS->RestoreTPL (TplBackup);
+ if (TplBackup != TPL_APPLICATION) {
+ gBS->RestoreTPL(TPL_APPLICATION);
+ }
+
+ Status = gBS->LocateProtocol (
+ &gDxePlatformAtPolicyGuid,
+ NULL,
+ (VOID **) &pAtPlatformPolicy
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: ATAM LocateProtocol failed. \n"));
+ }
+
+ if (mAtAm == NULL) {
+ Status = gBS->LocateProtocol (
+ &gEfiAtAmProtocolGuid,
+ NULL,
+ (VOID **) &mAtAm
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: ATAM Protocol failed, Status = %r\n", Status));
+ }
+ }
+
+ mAtAm->AtAmGetAtStateInfo (mAtAm, &AtStateInfo);
+
+ if (AtStateInfo.State == AT_STATE_STOLEN && pAtPlatformPolicy->At.AtPba == 1 && pAtPlatformPolicy->At.AtSupported == 0) {
+ AtAmUiTheftNotification ();
+
+ } else if (AtStateInfo.State == AT_STATE_STOLEN && AtStateInfo.flags.LockState == 1 && AtStateInfo.flags.AuthenticateModule == AT_AM_SELECTION_ATAM) {
+ GraphicsSave();
+ AtAmUiRecovery ();
+ GraphicsRestore();
+ } else if (AtStateInfo.State == AT_STATE_SUSPEND) {
+ GraphicsSave();
+ AtAmUiExitSuspendState ();
+ GraphicsRestore();
+ } else if (AtStateInfo.State == AT_STATE_ACTIVE) {
+ if (pAtPlatformPolicy->At.AtEnterSuspendState) {
+ GraphicsSave();
+ AtAmUiEnterSuspendState ();
+ GraphicsRestore();
+ }
+ }
+
+ //
+ // Restore TPL
+ //
+ if (TplBackup != TPL_APPLICATION) {
+ gBS->RaiseTPL(TplBackup);
+ }
+
+
+ return;
+}
+
+/**
+ Function handling entering suspend mode.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures.
+**/
+EFI_STATUS
+AtAmUiEnterSuspendState (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINT8 *PasswordASCII;
+ CHAR16 *PasswordUNICODE;
+ CHAR16 *UniCodeNonceStr;
+ UINT32 NumOfAttempts;
+ UINT8 NonceStr[STR_NONCE_LENGTH];
+ UINT32 CRow;
+ UINT32 CCol;
+ UINT8 *IsvString;
+ UINT32 IsvId;
+ AT_BIOS_RECOVERY_CONFIG RecoveryConfig;
+
+ Status = EFI_SUCCESS;
+ NumOfAttempts = ATAMUI_SUSPEND_ATTEMPTS;
+
+ UniCodeNonceStr = AllocateZeroPool ((STR_NONCE_LENGTH + 1) * sizeof (CHAR16));
+ PasswordASCII = AllocateZeroPool ((ATAM_SETUP_PASSWORD_LENGTH + 1) * sizeof (UINT8));
+ PasswordUNICODE = AllocateZeroPool ((ATAM_SETUP_PASSWORD_LENGTH + 1) * sizeof (CHAR16));
+ IsvString = AllocateZeroPool ((RECOVERY_STRING_LENGTH + 1) * sizeof (UINT8));
+
+ if (PasswordASCII == NULL || PasswordUNICODE == NULL || UniCodeNonceStr == NULL || IsvString == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ if (mAtAm == NULL) {
+ Status = gBS->LocateProtocol (
+ &gEfiAtAmProtocolGuid,
+ NULL,
+ (VOID **) &mAtAm
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: ATAM Protocol failed, Status = %r\n", Status));
+ }
+ }
+
+ AtAmUiStrGetCursor (&CRow, &CCol);
+
+ do {
+ AtAmUiStrClearScreen ();
+
+ RecoveryConfig.IsvPlatformId[0] = L'\0';
+ Status = mAtAm->AtAmGetRecoveryConfig (mAtAm, &RecoveryConfig);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: AtAmGetRecoveryConfig command failed, Status = %r\n", Status));
+ }
+ if (RecoveryConfig.IsvPlatformId[0] != L'\0') {
+ AtAmUiStrSetCursor(4, 13);
+ AtAmUiStrDisplayFix (STR_ATAMUI_PLATFORM_ID, FALSE);
+ AtAmUiStrDisplay ((CHAR16 *) RecoveryConfig.IsvPlatformId);
+ }
+
+ AtAmUiStrSetCursor(4, 14);
+ Status = mAtAm->AtAmGetIsvId (mAtAm, IsvString, &IsvId);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: AtAmGetIsvId command failed, Status = %r\n", Status));
+ }
+ AtAmUiStrDisplay ((CHAR16 *) IsvString);
+
+ AtAmUiStrEnableCursor (FALSE);
+
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_ENTER_INFO, TRUE);
+
+ AtAmUiStrSetCursor (4, 2);
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_REFER, FALSE);
+ Status = mAtAm->AtAmGetNonce (mAtAm, NonceStr);
+ if (Status == EFI_SUCCESS) {
+ Uint8ToUnicode (NonceStr, UniCodeNonceStr);
+ AtAmUiStrDisplay ((UINT16 *) UniCodeNonceStr);
+ } else {
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_NONCE_FAILED, FALSE);
+ DEBUG ((EFI_D_ERROR, "ATAM: Get Nonce failed, Status = %r\n", Status));
+ }
+
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_ENTER_TOKEN, TRUE);
+ AtAmUiStrEnableCursor (TRUE);
+ AtAmUiGetPassword (PasswordASCII, ATAM_SETUP_PASSWORD_LENGTH, PasswordUNICODE, 1);
+ AtAmUiStrEnableCursor (FALSE);
+
+ Status = mAtAm->AtAmSetSuspendState (mAtAm, ATAM_ENTER_SUSPEND_STATE, PasswordASCII);
+ if (Status != EFI_SUCCESS) {
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_ENTER_FAILED, TRUE);
+ AtAmUiDelay (2 * AT_AM_UI_1_SECOND);
+ }
+
+ } while (--NumOfAttempts && (Status != EFI_SUCCESS));
+
+ if (Status == EFI_SUCCESS) {
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_ENTER_SUCCESS, TRUE);
+ } else {
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_ATTEMPT_EXC, TRUE);
+ }
+
+ ZeroMem (UniCodeNonceStr, (STR_NONCE_LENGTH + 1) * sizeof (UINT16));
+ ZeroMem (PasswordASCII, (ATAM_SETUP_PASSWORD_LENGTH + 1) * sizeof (CHAR8));
+ ZeroMem (PasswordUNICODE, (ATAM_SETUP_PASSWORD_LENGTH + 1) * sizeof (CHAR16));
+
+ FreePool (UniCodeNonceStr);
+ FreePool (PasswordASCII);
+ FreePool (PasswordUNICODE);
+
+ AtAmUiDelay (AT_AM_UI_1_SECOND);
+
+ AtAmUiStrClearScreen ();
+ AtAmUiStrSetCursor (CCol, CRow);
+
+ return Status;
+}
+
+/**
+ Function handling exiting suspend mode.
+
+ @param[in] None
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures.
+**/
+EFI_STATUS
+AtAmUiExitSuspendState (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINT8 *PasswordASCII;
+ CHAR16 *PasswordUNICODE;
+ CHAR16 *UniCodeNonceStr;
+ UINT32 NumOfAttempts;
+ UINT8 NonceStr[STR_NONCE_LENGTH];
+ EFI_INPUT_KEY Key;
+ UINT32 CRow;
+ UINT32 CCol;
+ UINT8 *IsvString;
+ UINT32 IsvId;
+ AT_BIOS_RECOVERY_CONFIG RecoveryConfig;
+
+ Status = EFI_SUCCESS;
+ NumOfAttempts = 3;
+
+ UniCodeNonceStr = AllocateZeroPool ((STR_NONCE_LENGTH + 1) * sizeof (CHAR16));
+ PasswordASCII = AllocateZeroPool ((ATAM_SETUP_PASSWORD_LENGTH + 1) * sizeof (UINT8));
+ PasswordUNICODE = AllocateZeroPool ((ATAM_SETUP_PASSWORD_LENGTH + 1) * sizeof (CHAR16));
+ IsvString = AllocateZeroPool ((RECOVERY_STRING_LENGTH + 1) * sizeof (UINT8));
+
+ if (PasswordASCII == NULL || PasswordUNICODE == NULL || UniCodeNonceStr == NULL || IsvString == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ if (mAtAm == NULL) {
+ Status = gBS->LocateProtocol (
+ &gEfiAtAmProtocolGuid,
+ NULL,
+ (VOID **) &mAtAm
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: ATAM Protocol failed, Status = %r\n", Status));
+ }
+ }
+
+ AtAmUiStrGetCursor (&CRow, &CCol);
+
+ do {
+ AtAmUiStrClearScreen ();
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_EXIT_QUESTION, TRUE);
+
+ AtAmUiStrGetChar (&Key);
+ if (Key.UnicodeChar == L'y' || Key.UnicodeChar == L'Y' || Key.UnicodeChar == L'n' || Key.UnicodeChar == L'N') {
+ AtAmUiStrEnableCursor(FALSE);
+ break;
+ }
+ } while (1);
+
+ if (Key.UnicodeChar == L'y' || Key.UnicodeChar == L'Y') {
+ do {
+ AtAmUiStrClearScreen ();
+
+ RecoveryConfig.IsvPlatformId[0] = L'\0';
+ Status = mAtAm->AtAmGetRecoveryConfig (mAtAm, &RecoveryConfig);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: AtAmGetRecoveryConfig command failed, Status = %r\n", Status));
+ }
+ if (RecoveryConfig.IsvPlatformId[0] != L'\0') {
+ AtAmUiStrSetCursor(4, 13);
+ AtAmUiStrDisplayFix (STR_ATAMUI_PLATFORM_ID, FALSE);
+ AtAmUiStrDisplay ((CHAR16 *) RecoveryConfig.IsvPlatformId);
+ }
+
+ AtAmUiStrSetCursor(4, 14);
+ Status = mAtAm->AtAmGetIsvId (mAtAm, IsvString, &IsvId);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: AtAmGetIsvId command failed, Status = %r\n", Status));
+ }
+ AtAmUiStrDisplay ((CHAR16 *) IsvString);
+
+ AtAmUiStrEnableCursor (FALSE);
+
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_EXIT_INFO, TRUE);
+
+ AtAmUiStrSetCursor (4, 3);
+ AtAmUiStrDisplayFix (STR_ATAMUI_RES_REFER, FALSE);
+ mAtAm->AtAmGetNonce (mAtAm, NonceStr);
+ Uint8ToUnicode (NonceStr, UniCodeNonceStr);
+ AtAmUiStrDisplay ((UINT16 *) UniCodeNonceStr);
+
+ AtAmUiStrSetCursor (4, 4);
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_ENTER_TOKEN, FALSE);
+
+ AtAmUiStrEnableCursor (TRUE);
+ AtAmUiGetPassword (PasswordASCII, ATAM_SETUP_PASSWORD_LENGTH, PasswordUNICODE, 1);
+ AtAmUiStrEnableCursor (FALSE);
+
+ AtAmUiStrDisplayFix (STR_ATAMUI_CHECKING_AUTHENT, TRUE);
+
+ Status = mAtAm->AtAmSetSuspendState (mAtAm, ATAM_EXIT_SUSPEND_STATE, PasswordASCII);
+ if (Status != EFI_SUCCESS) {
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_AUTH_FAILED, FALSE);
+ AtAmUiDelay (AT_AM_UI_1_SECOND);
+ }
+
+ AtAmUiDelay (AT_AM_UI_1_SECOND);
+ } while (--NumOfAttempts && (Status != EFI_SUCCESS));
+
+ if (Status == EFI_SUCCESS) {
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_EXIT_SUCCESS, TRUE);
+
+ } else {
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_ATTEMPT_EXC, TRUE);
+ AtAmUiDelay (AT_AM_UI_1_SECOND);
+ }
+ } else if (Key.UnicodeChar == L'n' || Key.UnicodeChar == L'N') {
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_STAY, TRUE);
+ AtAmUiDelay (2 *AT_AM_UI_1_SECOND);
+ }
+
+ ZeroMem (UniCodeNonceStr, (STR_NONCE_LENGTH + 1) * sizeof (UINT16));
+ ZeroMem (PasswordASCII, (ATAM_SETUP_PASSWORD_LENGTH + 1) * sizeof (CHAR8));
+ ZeroMem (PasswordUNICODE, (ATAM_SETUP_PASSWORD_LENGTH + 1) * sizeof (CHAR16));
+
+ FreePool (UniCodeNonceStr);
+ FreePool (PasswordASCII);
+ FreePool (PasswordUNICODE);
+
+ AtAmUiDelay (AT_AM_UI_1_SECOND);
+
+ AtAmUiStrClearScreen ();
+ AtAmUiStrSetCursor (CCol, CRow);
+
+ return Status;
+}
+
+VOID
+EFIAPI
+ShowAtTimerCallback (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ UINT32 TimerLeft;
+ UINT32 TimerInterval;
+ static CHAR16 *TimeLeftStr = NULL;
+ EFI_STATUS Status;
+ UINT32 CRow;
+ UINT32 CCol;
+
+ if(!TimeLeftStr)
+ TimeLeftStr = AllocateZeroPool ((ATAM_TIMER_STRING_LENGTH + 1) * sizeof (CHAR16));
+
+ AtAmUiStrGetCursor (&CRow, &CCol);
+ Status = mAtAm->AtAmGetTimer (mAtAm, &TimerLeft, &TimerInterval);
+
+ if(EFI_ERROR(Status))
+ return;
+
+ UnicodeValueToString (TimeLeftStr, 0, TimerLeft, 0);
+ AtAmUiStrDisplayFix (STR_ATAMUI_TIME_LEFT, TRUE);
+ AtAmUiStrDisplay ((CHAR16 *) TimeLeftStr);
+ AtAmUiStrDisplayFix (STR_ATAMUI_TIME_LEFT_SEC,FALSE);
+
+ AtAmUiStrSetCursor(CCol,CRow);
+}
+// Set the default TEXT MODE resolution the same with TSE
+#define MAX_ROWS (UINT8)(31)
+#define MAX_COLS (UINT8)(100)
+UINTN StyleGetTextMode()
+{
+ EFI_STATUS Status;
+ INT32 i;
+ UINTN ModeRows, ModeCols;
+
+
+ // Default Implementation
+ for ( i = 0; i < gST->ConOut->Mode->MaxMode; i++ )
+ {
+ Status = gST->ConOut->QueryMode( gST->ConOut, i, &ModeCols, &ModeRows );
+
+ if ( EFI_ERROR( Status ) )
+ continue;
+
+ if ( ( MAX_COLS <= ModeCols ) && ( MAX_ROWS <= ModeRows ) )
+ return i;
+ }
+
+ // return MaxMode if the mode wasn't found
+ return i;
+}
+/**
+ Function handling recovery proccess.
+
+ @param[in] None
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures.
+**/
+EFI_STATUS
+AtAmUiRecovery (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_INPUT_KEY Key;
+ UINT32 PassType;
+ UINT8 IsAuthenticated;
+ AT_STATE_INFO StateInfo;
+ UINT32 TimerLeft;
+ UINT32 TimerInterval;
+ UINT8 *PasswordASCII;
+ CHAR16 *PasswordUNICODE;
+ CHAR16 *TimeLeftStr;
+ UINT8 *IsvString;
+ UINT32 CRow;
+ UINT32 CCol;
+ UINT32 NumberOfAttempts;
+ UINT32 IsvId;
+ CHAR16 *UniCodeNonceStr;
+ UINT8 NonceStr[STR_NONCE_LENGTH];
+
+ IsAuthenticated = 0;
+
+ PasswordASCII = AllocateZeroPool ((ATAM_SETUP_PASSWORD_LENGTH + 1) * sizeof (UINT8));
+ PasswordUNICODE = AllocateZeroPool ((ATAM_SETUP_PASSWORD_LENGTH + 1) * sizeof (CHAR16));
+ TimeLeftStr = AllocateZeroPool ((ATAM_TIMER_STRING_LENGTH + 1) * sizeof (CHAR16));
+ IsvString = AllocateZeroPool ((RECOVERY_STRING_LENGTH + 1) * sizeof (UINT8));
+ UniCodeNonceStr = AllocateZeroPool ((STR_NONCE_LENGTH + 1) * sizeof (CHAR16));
+
+ if (PasswordASCII == NULL || PasswordUNICODE == NULL || TimeLeftStr == NULL || IsvString == NULL || UniCodeNonceStr == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ if (mAtAm == NULL) {
+ Status = gBS->LocateProtocol (
+ &gEfiAtAmProtocolGuid,
+ NULL,
+ (VOID **) &mAtAm
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: ATAM Protocol failed, Status = %r\n", Status));
+ }
+ }
+
+ AtAmUiStrGetCursor (&CRow, &CCol);
+
+ NumberOfAttempts = 3;
+
+ do {
+ AtAmUiStrClearScreen ();
+ AtAmUiDisplayIsvStrings ();
+
+ do {
+ AtAmUiStrEnableCursor (FALSE);
+
+ AtAmUiStrSetCursor(4, 20);
+ Status = mAtAm->AtAmGetIsvId (mAtAm, IsvString, &IsvId);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: AtAmGetIsvId command failed, Status = %r\n", Status));
+ }
+ AtAmUiStrDisplay ((CHAR16 *) IsvString);
+
+ mAtAm->AtAmGetAtStateInfo (mAtAm, &StateInfo);
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_DUE_TO, TRUE);
+ switch (StateInfo.LastTheftTrigger) {
+ case 1:
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_TIME, FALSE);
+ break;
+
+ case 2:
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_STOLEN, FALSE);
+ break;
+
+ case 3:
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_THRESHOLD, FALSE);
+ break;
+
+ case 4:
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_ATTACK, FALSE);
+
+ default:
+ break;
+ }
+
+ mAtAm->AtAmGetTimer (mAtAm, &TimerLeft, &TimerInterval);
+ UnicodeValueToString (TimeLeftStr, 0, TimerLeft, 0);
+
+ AtAmUiStrDisplayFix (STR_ATAMUI_TIME_LEFT, TRUE);
+ AtAmUiStrDisplay ((CHAR16 *) TimeLeftStr);
+ AtAmUiStrDisplayFix (STR_ATAMUI_TIME_LEFT_SEC,FALSE);
+
+ AtAmUiStrDisplayFix (STR_ATAMUI_SELECT_PASS, TRUE);
+
+ AtAmUiStrDisplayFix (STR_ATAMUI_SELECT_OPTION, TRUE);
+
+ AtAmUiStrGetChar (&Key);
+ if (Key.UnicodeChar == L'1' || Key.UnicodeChar == L'2') {
+ break;
+ }
+
+ AtAmUiStrDisplayFix (STR_ATAMUI_INVALID_SELECT, TRUE);
+ } while (1);
+
+ AtAmUiStrClearScreen ();
+ AtAmUiDisplayIsvStrings ();
+ AtAmUiStrSetCursor(4, 20);
+ AtAmUiStrDisplay ((CHAR16 *) IsvString);
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_DUE_TO, TRUE);
+ switch (StateInfo.LastTheftTrigger) {
+ case 1:
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_TIME, FALSE);
+ break;
+
+ case 2:
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_STOLEN, FALSE);
+ break;
+
+ case 3:
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_THRESHOLD, FALSE);
+ break;
+
+ case 4:
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_ATTACK, FALSE);
+
+ default:
+ break;
+ }
+ mAtAm->AtAmGetTimer (mAtAm, &TimerLeft, &TimerInterval);
+ UnicodeValueToString (TimeLeftStr, 0, TimerLeft, 0);
+ AtAmUiStrDisplayFix (STR_ATAMUI_TIME_LEFT, TRUE);
+ AtAmUiStrDisplay ((CHAR16 *) TimeLeftStr);
+ AtAmUiStrDisplayFix (STR_ATAMUI_TIME_LEFT_SEC,FALSE);
+
+ switch (Key.UnicodeChar) {
+ case L'1':
+ PassType = AT_CREDENTIAL_TYPE_USER_PASSPHRASE;
+ AtAmUiStrDisplayFix (STR_ATAMUI_USER_PASS, TRUE);
+ AtAmUiStrDisplayFix (STR_ATAMUI_RECO_ENTER_PASS, TRUE);
+ AtAmUiStrEnableCursor (TRUE);
+ AtAmUiGetPassword (PasswordASCII, ATAM_SETUP_PASSWORD_LENGTH, PasswordUNICODE, 0);
+ AtAmUiStrEnableCursor (FALSE);
+ AtAmUiStrDisplayFix (STR_ATAMUI_CHECKING_PASS, TRUE);
+ AtAmUiDelay (AT_AM_UI_1_SECOND);
+ Status = mAtAm->AtAmVerifyPassword (mAtAm, PasswordASCII, PassType, &IsAuthenticated);
+ DEBUG ((EFI_D_ERROR, "ATAM: IsAuthenticated %x\n", IsAuthenticated));
+
+ break;
+
+ case L'2':
+ AtAmUiStrDisplayFix (STR_ATAMUI_RECO_REFER, TRUE);
+ Status = mAtAm->AtAmGetNonce (mAtAm, NonceStr);
+ if (Status == EFI_SUCCESS) {
+ Uint8ToUnicode (NonceStr, UniCodeNonceStr);
+ AtAmUiStrDisplay ((UINT16 *) UniCodeNonceStr);
+ } else {
+ AtAmUiStrDisplayFix (STR_ATAMUI_SUS_NONCE_FAILED, FALSE);
+ DEBUG ((EFI_D_ERROR, "ATAM: Get Nonce failed, Status = %r\n", Status));
+ }
+ AtAmUiStrDisplayFix (STR_ATAMUI_SERV_BASED_RECOV, TRUE);
+ AtAmUiStrSetCursor(4, 6);
+ AtAmUiStrDisplayFix (STR_ATAMUI_RECO_SEC_TOKEN, FALSE);
+
+ PassType = AT_CREDENTIAL_TYPE_SRTK;
+
+ AtAmUiStrEnableCursor (TRUE);
+ AtAmUiGetPassword (PasswordASCII, ATAM_SETUP_PASSWORD_LENGTH, PasswordUNICODE, 1);
+ AtAmUiStrEnableCursor (FALSE);
+
+ AtAmUiStrDisplayFix (STR_ATAMUI_CHECKING_PASS, TRUE);
+ AtAmUiDelay (AT_AM_UI_1_SECOND);
+ Status = mAtAm->AtAmVerifyPassword (mAtAm, PasswordASCII, PassType, &IsAuthenticated);
+ DEBUG ((EFI_D_ERROR, "ATAM: IsAuthenticated %x\n", IsAuthenticated));
+
+ break;
+
+ default:
+ DEBUG ((EFI_D_ERROR, "ATAM: Option not supported. \n"));
+
+ break;
+ }
+
+ ZeroMem (PasswordASCII, (ATAM_SETUP_PASSWORD_LENGTH + 1) * sizeof (UINT8));
+ ZeroMem (PasswordUNICODE, (ATAM_SETUP_PASSWORD_LENGTH + 1) * sizeof (CHAR16));
+
+ NumberOfAttempts--;
+
+ if (NumberOfAttempts && IsAuthenticated == 0) {
+ AtAmUiStrDisplayFix (STR_ATAMUI_RECO_TRY_AGAIN, TRUE);
+ AtAmUiDelay (AT_AM_UI_1_SECOND);
+ }
+
+ } while (NumberOfAttempts && (IsAuthenticated == 0));
+
+ FreePool (TimeLeftStr);
+ FreePool (PasswordASCII);
+ FreePool (PasswordUNICODE);
+ FreePool (IsvString);
+ FreePool (UniCodeNonceStr);
+
+ if (IsAuthenticated == 1) {
+ AtAmUiStrDisplayFix (STR_ATAMUI_RECO_SUCCESS, TRUE);
+ AtAmUiDelay (2 * AT_AM_UI_1_SECOND);
+ } else {
+ AtAmUiStrDisplayFix (STR_ATAMUI_RECO_FAILED, TRUE);
+ AtAmUiDelay (2 * AT_AM_UI_1_SECOND);
+ gRT->ResetSystem (EfiResetShutdown, EFI_SUCCESS, 0, NULL);
+ }
+
+ AtAmUiDelay (AT_AM_UI_1_SECOND);
+ AtAmUiStrClearScreen ();
+ AtAmUiStrSetCursor(CCol, CRow);
+
+ return Status;
+}
+
+/**
+ Function displaing Ivs strings.
+
+ @param[in] None
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures.
+**/
+EFI_STATUS
+AtAmUiDisplayIsvStrings (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ CHAR16 *IsvIdString;
+ AT_BIOS_RECOVERY_CONFIG RecoveryConfig;
+ UINT8 *IsvString;
+ UINT32 IsvId;
+ UINT32 CRow;
+ UINT32 CCol;
+
+ IsvId = 0;
+
+ DEBUG ((EFI_D_ERROR, "ATAM: AtAmUiDisplayIsvStrings. \n"));
+
+ IsvIdString = AllocateZeroPool (ISV_PLATFORM_ID_LENGTH * sizeof (CHAR16));
+ IsvString = AllocateZeroPool ((RECOVERY_STRING_LENGTH + 1) * sizeof (UINT8));
+ if (IsvIdString == NULL || IsvString == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ if (mAtAm == NULL) {
+ Status = gBS->LocateProtocol (
+ &gEfiAtAmProtocolGuid,
+ NULL,
+ (VOID **) &mAtAm
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: ATAM Protocol failed, Status = %r\n", Status));
+ }
+ }
+
+ AtAmUiStrGetCursor (&CRow, &CCol);
+
+ Status = mAtAm->AtAmGetIsvId (mAtAm, IsvString, &IsvId);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: AtAmGetIsvId command failed, Status = %r\n", Status));
+ }
+
+ RecoveryConfig.IsvPlatformId[0] = L'\0';
+ Status = mAtAm->AtAmGetRecoveryConfig (mAtAm, &RecoveryConfig);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: AtAmGetRecoveryConfig command failed, Status = %r\n", Status));
+ }
+
+ if (RecoveryConfig.IsvPlatformId[0] != L'\0') {
+ AtAmUiStrDisplayFix (STR_ATAMUI_PLATFORM_ID, TRUE);
+ AtAmUiStrDisplay ((CHAR16 *) RecoveryConfig.IsvPlatformId);
+ }
+
+ if (IsvId != 0) {
+ UnicodeValueToString (IsvIdString, 0, (UINT32) IsvId, 0);
+ AtAmUiStrDisplayFix (STR_ATAMUI_PROVIDER_ID, TRUE);
+ AtAmUiStrDisplay (IsvIdString);
+ }
+
+ FreePool (IsvString);
+ FreePool (IsvIdString);
+
+ return Status;
+}
+
+/**
+ This GetRecoveryPassword() process the AT recovery password user input.
+
+ @param[out] PasswordASCII Pointer to an array of ASCII user input
+ @param[in] MaxPasswordLength Integer value for max password length
+ @param[out] PasswordUNICODE Pointer to an array of UNICODE user input
+ @param[in] ShowPassword TRUE - password is shown, FALSE - pasword is hidden by *
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_OUT_OF_RESOURCES Do not have enough resources to allocate memory or password too long.
+**/
+EFI_STATUS
+AtAmUiGetPassword (
+ OUT UINT8 *PasswordASCII,
+ IN INTN MaxPasswordLength,
+ OUT CHAR16 *PasswordUNICODE,
+ IN UINT8 ShowPassword
+ )
+{
+ INTN StrIndex;
+ EFI_INPUT_KEY Key = { 0, 0 };
+ CHAR16 StarChar[2] = { L' ', L'\0' };
+
+ DEBUG ((EFI_D_ERROR, "ATAM: AtAmUiGetRecoveryPassword \n"));
+
+ PasswordASCII[0] = L'\0';
+ PasswordUNICODE[0] = L'\0';
+
+ Key.UnicodeChar = 0;
+ Key.ScanCode = 0;
+ StrIndex = 0;
+
+ DEBUG ((EFI_D_ERROR, "ATAM: Wait for Key \n"));
+
+ AtAmUiStrEnableCursor (TRUE);
+ do {
+ Key.ScanCode = 0;
+ Key.UnicodeChar = 0;
+ AtAmUiStrGetChar (&Key);
+ DEBUG ((EFI_D_ERROR, "ATAM: PasswordUNICODE: %s\n", PasswordUNICODE));
+
+ switch (Key.UnicodeChar) {
+ case CHAR_NULL:
+ ///
+ /// Non-printable characters handling: do not print caps/numlock, pgup/dn, Fx, cursors etc.
+ /// When escape pressed, return with empty password and ask for password again
+ ///
+ if (Key.ScanCode == SCAN_ESC) {
+ PasswordASCII[0] = L'\0';
+ PasswordUNICODE[0] = L'\0';
+ StrIndex = 0;
+ return EFI_SUCCESS;
+ }
+ break;
+
+ case CHAR_CARRIAGE_RETURN:
+ ///
+ /// Enter handling: when enter pressed, return with the password
+ ///
+ StrIndex = 0;
+
+ DEBUG ((EFI_D_ERROR, "ATAM: Passphrase Entered: %s\n", PasswordUNICODE));
+ return EFI_SUCCESS;
+
+ case CHAR_BACKSPACE:
+ ///
+ /// Backspace handling
+ ///
+ if (StrIndex > 0) {
+ StrIndex--;
+ PasswordASCII[StrIndex] = L'\0';
+ PasswordUNICODE[StrIndex] = L'\0';
+ ///
+ /// Backspace printing on screen
+ ///
+ AtAmUiStrDisplay (L"\b \b");
+ }
+ break;
+
+ default:
+ ///
+ /// Normal (printable) characters handling
+ /// Do not hide password on screen for Server Token Password recovery (usrRsp=2)
+ /// Hide password with '*' for User Password recovery (usrRsp=1)
+ ///
+ StarChar[0] = (ShowPassword == 1) ? Key.UnicodeChar : L'*';
+
+ if (StrIndex >= 0 && StrIndex < MaxPasswordLength) {
+ ///
+ /// Index in range
+ ///
+ PasswordASCII[StrIndex] = (UINT8) Key.UnicodeChar;
+ PasswordUNICODE[StrIndex] = Key.UnicodeChar;
+ StrIndex++;
+ ///
+ /// Print hidden (*) or unhidden password character
+ ///
+ AtAmUiStrDisplay (StarChar);
+ } else if (StrIndex < 0) {
+ ///
+ /// Index out of range: StrIndex < 0 - should never go here
+ ///
+ AtAmUiStrEnableCursor (FALSE);
+ StrIndex = 0;
+ } else {
+ ///
+ /// Index out of range: StrIndex >= ATAM_SETUP_PASSWORD_LENGTH - max password length (49 chars) exceeded,
+ /// only backspace, enter or escape will be accepted
+ ///
+ DEBUG ((EFI_D_ERROR, "ATAM: Password Length Exceeded\n"));
+ }
+ break;
+ }
+
+ } while (1);
+
+ AtAmUiStrEnableCursor (FALSE);
+
+ return EFI_TIMEOUT;
+}
+
+/**
+ Function displaing Ivs strings.
+
+ @param[in] None
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures.
+**/
+EFI_STATUS
+AtAmUiTheftNotification (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ AT_STATE_INFO StateInfo;
+ UINT32 TimerLeft;
+ UINT32 TimerInterval;
+ UINT8 *IsvString;
+ UINT32 IsvId;
+ CHAR16 *TimeLeftStr;
+ UINT8 PbaFailedExceeded;
+ UINT16 PbaFailedAttempts;
+ UINT16 PbaFailedThreshold;
+
+ DEBUG ((EFI_D_ERROR, "ATAM: AtAmUiTheftNotification\n"));
+
+ Status = EFI_SUCCESS;
+ PbaFailedExceeded = FALSE;
+
+ Status = gBS->LocateProtocol (
+ &gEfiAtAmProtocolGuid,
+ NULL,
+ (VOID **) &mAtAm
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: ATAM failed = %r\n", Status));
+ return Status;
+ }
+
+ Status = mAtAm->AtAmGetPbaCounter(&PbaFailedExceeded, &PbaFailedAttempts, &PbaFailedThreshold);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: AtAmGetIsvId = %r\n", Status));
+ return Status;
+ }
+
+ if (PbaFailedThreshold >= PbaFailedAttempts) {
+ return EFI_SUCCESS;
+ } else {
+
+ IsvString = AllocateZeroPool ((RECOVERY_STRING_LENGTH + 1) * sizeof (UINT8));
+ TimeLeftStr = AllocateZeroPool ((ATAM_TIMER_STRING_LENGTH + 1) * sizeof (CHAR16));
+
+ if (IsvString == NULL || TimeLeftStr == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ AtAmUiStrClearScreen ();
+
+ AtAmUiDisplayIsvStrings ();
+
+ AtAmUiStrEnableCursor (FALSE);
+
+ AtAmUiStrSetCursor(4, 20);
+ Status = mAtAm->AtAmGetIsvId (mAtAm, IsvString, &IsvId);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "ATAM: AtAmGetIsvId, Status = %r\n", Status));
+ }
+
+ AtAmUiStrDisplay ((CHAR16 *) IsvString);
+
+ mAtAm->AtAmGetAtStateInfo (mAtAm, &StateInfo);
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_DUE_TO, TRUE);
+ switch (StateInfo.LastTheftTrigger) {
+ case 1:
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_TIME, FALSE);
+ break;
+
+ case 2:
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_STOLEN, FALSE);
+ break;
+
+ case 3:
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_THRESHOLD, FALSE);
+ break;
+
+ case 4:
+ AtAmUiStrDisplayFix (STR_ATAMUI_LOCK_ATTACK, FALSE);
+
+ default:
+ break;
+ }
+
+ mAtAm->AtAmGetTimer (mAtAm, &TimerLeft, &TimerInterval);
+ UnicodeValueToString (TimeLeftStr, 0, TimerLeft, 0);
+
+ AtAmUiStrDisplayFix (STR_ATAMUI_TIME_LEFT, TRUE);
+ AtAmUiStrDisplay ((CHAR16 *) TimeLeftStr);
+ AtAmUiStrDisplayFix (STR_ATAMUI_TIME_LEFT_SEC,FALSE);
+
+ AtAmUiDelay ((PbaFailedAttempts - PbaFailedThreshold) * 10 * AT_AM_UI_1_SECOND);
+
+ AtAmUiStrClearScreen ();
+
+ return Status;
+ }
+}
+
diff --git a/Board/EM/MeWrapper/AtAmUi/AtAmUi.cif b/Board/EM/MeWrapper/AtAmUi/AtAmUi.cif
new file mode 100644
index 0000000..f59551d
--- /dev/null
+++ b/Board/EM/MeWrapper/AtAmUi/AtAmUi.cif
@@ -0,0 +1,14 @@
+<component>
+ name = "AtAmUi"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\AtAmUi\"
+ RefName = "AtAmUi"
+[files]
+"AtAmUi.dxs"
+"AtAmUi.mak"
+"AtAmUi.sdl"
+"AtAmUi.c"
+"AtAmUi.h"
+"AtAmUiString.c"
+"AtAmUiString.h"
+<endComponent>
diff --git a/Board/EM/MeWrapper/AtAmUi/AtAmUi.dxs b/Board/EM/MeWrapper/AtAmUi/AtAmUi.dxs
new file mode 100644
index 0000000..7a69567
--- /dev/null
+++ b/Board/EM/MeWrapper/AtAmUi/AtAmUi.dxs
@@ -0,0 +1,42 @@
+/** @file
+ Dependency expression file for AtAmUi Invocation Driver.
+
+@copyright
+ Copyright (c) 2012 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains an 'Intel Peripheral Driver' and uniquely
+ identified as "Intel Reference Module" and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+
+**/
+
+
+#include "AutoGen.h"
+#include "DxeDepex.h"
+
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+#include EFI_PROTOCOL_DEPENDENCY (MeBiosPayloadData)
+#include EFI_PROTOCOL_DEFINITION (Heci)
+#include EFI_PROTOCOL_DEFINITION (At)
+#include EFI_PROTOCOL_DEFINITION (AtAm)
+#include EFI_PROTOCOL_DEFINITION (AtPlatformPolicy)
+#endif
+
+DEPENDENCY_START
+ EFI_AT_PROTOCOL_GUID AND
+ DXE_PLATFORM_AT_POLICY_GUID AND
+ EFI_HECI_PROTOCOL_GUID AND
+ ME_BIOS_PAYLOAD_DATA_PROTOCOL_GUID AND
+ EFI_ATAM_PROTOCOL_GUID
+DEPENDENCY_END
diff --git a/Board/EM/MeWrapper/AtAmUi/AtAmUi.h b/Board/EM/MeWrapper/AtAmUi/AtAmUi.h
new file mode 100644
index 0000000..04e356f
--- /dev/null
+++ b/Board/EM/MeWrapper/AtAmUi/AtAmUi.h
@@ -0,0 +1,150 @@
+/** @file
+ Header file.
+
+@copyright
+ Copyright (c) 2013 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+**/
+#ifndef _ATAMUI_H_
+#define _ATAMUI_H_
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+#include "AtAmUiString.h"
+#include "AtAm.h"
+#include "AtHi.h"
+#include "AtAmHelper.h"
+#endif
+
+#include EFI_PROTOCOL_CONSUMER (AtAm)
+#include EFI_PROTOCOL_CONSUMER (AtPlatformPolicy)
+
+///
+/// Intel ME Alert AT Handler Event GUID
+/// The event is used to execute AtAmUiCallback () when the system is ready to launch ATAM UI
+/// The event is signaled after consoles are ready in BDS phase.
+///
+#define ME_ALERT_AT_HANDLER_GUID \
+ { \
+ 0xb441df87, 0x8d94, 0x4811, 0x85, 0xf7, 0xf, 0x9a, 0x7b, 0xf8, 0x9d, 0x2a \
+ }
+
+#define ATAMUI_SUSPEND_ATTEMPTS 3
+
+/**
+ ATAM UI callback.
+
+ @param[in] Event The event registered
+ @param[in] Context Event context. Not used in this event handler.
+
+ @retval None
+**/
+VOID
+EFIAPI
+AtAmUiCallback (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+;
+
+/**
+ Function handling entering suspend mode.
+
+ @param[in] None
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures.
+**/
+EFI_STATUS
+AtAmUiTheftNotification (
+ VOID
+ )
+;
+
+/**
+ Function handling displaing theft notification.
+
+ @param[in] None
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures.
+**/
+EFI_STATUS
+AtAmUiEnterSuspendState (
+ VOID
+ )
+;
+
+/**
+ Function handling exiting suspend mode.
+
+ @param[in] None
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures.
+**/
+EFI_STATUS
+AtAmUiExitSuspendState (
+ VOID
+ )
+;
+
+/**
+ Function handling recovery proccess.
+
+ @param[in] None
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures.
+**/
+EFI_STATUS
+AtAmUiRecovery (
+ VOID
+ )
+;
+
+/**
+ Function displaing Ivs strings.
+
+ @param[in] None
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures.
+**/
+EFI_STATUS
+AtAmUiDisplayIsvStrings (
+ VOID
+ )
+;
+
+/**
+ This GetRecoveryPassword() process the AT recovery password user input.
+
+ @param[out] PasswordASCII Pointer to an array of ASCII user input
+ @param[in] MaxPasswordLength Integer value for max password length
+ @param[out] PasswordUNICODE Pointer to an array of UNICODE user input
+ @param[in] ShowPassword TRUE - password is shown, FALSE - pasword is hidden by *
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_OUT_OF_RESOURCES Do not have enough resources to allocate memory or password too long.
+**/
+EFI_STATUS
+AtAmUiGetPassword (
+ OUT UINT8 *PasswordASCII,
+ IN INTN MaxPasswordLength,
+ OUT CHAR16 *PasswordUNICODE,
+ IN UINT8 ShowPassword
+ )
+;
+#endif
diff --git a/Board/EM/MeWrapper/AtAmUi/AtAmUi.mak b/Board/EM/MeWrapper/AtAmUi/AtAmUi.mak
new file mode 100644
index 0000000..958ee72
--- /dev/null
+++ b/Board/EM/MeWrapper/AtAmUi/AtAmUi.mak
@@ -0,0 +1,148 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/ATAMUI/AtAmUi.mak 1 8/29/12 3:02a Klzhan $
+#
+# $Revision: 1 $
+#
+# $Date: 8/29/12 3:02a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/ATAMUI/AtAmUi.mak $
+#
+# 1 8/29/12 3:02a Klzhan
+# [TAG] EIPNone
+# [Category] Spec Update
+# [Severity] Important
+# [Description] Support AT5
+# [Files] AtAmUi.cif
+# AtAmUi.dxs
+# AtAmUi.mak
+# AtAmUi.sdl
+# AtAmUi.c
+# AtAmUi.h
+# AtAmUiString.c
+# AtAmUiString.h
+#
+# 2 2/23/12 8:58a Klzhan
+# Support New EDK
+#
+# 1 2/08/12 1:08a Klzhan
+# Initial Check in
+#
+# 2 9/15/11 2:12a Klzhan
+# Remove AMI Lib.
+#
+# 1 2/25/11 1:43a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:10a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name: AmtWrapperDxe.mak
+#
+# Description: Makfile for Amt Wrapper Dxe module
+#
+#----------------------------------------------------------------------------
+#<AMI_FHDR_END>
+EDK : AtAmUi
+
+AtAmUi : $(BUILD_DIR)\AtAmUi.mak AtAmUiBin
+
+$(BUILD_DIR)\AtAmUi.mak : $(AtAmUi_DIR)\AtAmUi.mak $(BUILD_RULES)
+ $(CIF2MAK) $(AtAmUi_DIR)\AtAmUi.cif $(CIF2MAK_DEFAULTS)
+
+AtAmUi_INCLUDES=\
+ $(EDK_INCLUDES)\
+ $(MISCFRAMEWORK_INCLUDES)\
+ $(ME_INCLUDES)\
+ $(INTEL_MCH_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+ $(IndustryStandard_INCLUDES)\
+ $(EdkIIGlueLib_INCLUDES)\
+ /IInclude\
+ $(NB_INCLUDES)\
+ /I$(AtAmDxe_DIR)\
+ /I$(AtDxeLib_DIR)\
+
+AtAmUi_LIBS=\
+ $(EFISCRIPTLIB)\
+ $(EFIDRIVERLIB)\
+ $(EFICOMMONLIB)\
+ $(PRINTLIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+ $(EFIGUIDLIB)\
+ $(AmtProtocolLib_LIB)\
+ $(AmtLibDxe_LIB)\
+ $(MeLibDxe_LIB)\
+ $(AmtGuidLib_LIB)\
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EdkIIGlueDxeServicesTableLib_LIB)\
+ $(EdkIIGlueBasePrintLib_LIB) \
+ $(AtDxeLib_LIB)\
+
+AtAmUi_DEFINES = $(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=AtAmUiEntryPoint"\
+ /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\
+ /D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ \
+ /D __EDKII_GLUE_BASE_LIB__ \
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_UEFI_DEVICE_PATH_LIB__ \
+ /D __EDKII_GLUE_UEFI_LIB__\
+ /D __EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__ \
+
+
+AtAmUiBin : $(AtAmUi_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\AtAmUi.mak all\
+ GUID=D2BC3092-92BB-4B21-A26B-CE6f7C3E9857\
+ "MY_INCLUDES=$(AtAmUi_INCLUDES)" \
+ "MY_DEFINES=$(AtAmUi_DEFINES)"\
+ ENTRY_POINT=AtAmUiEntryPoint\
+ DEPEX1=$(AtAmUi_DIR)\AtAmUi.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ TYPE=BS_DRIVER\
+ COMPRESS=1
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/MeWrapper/AtAmUi/AtAmUi.sdl b/Board/EM/MeWrapper/AtAmUi/AtAmUi.sdl
new file mode 100644
index 0000000..ce0ff64
--- /dev/null
+++ b/Board/EM/MeWrapper/AtAmUi/AtAmUi.sdl
@@ -0,0 +1,27 @@
+TOKEN
+ Name = "AtAMUI_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable TdtWrapper support in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Token = "AT_SUPPORT" "=" "1"
+End
+
+
+PATH
+ Name = "AtAmUi_DIR"
+End
+
+MODULE
+ Help = "Includes TdtWrapper.mak to Project"
+ File = "AtAmUi.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AtAmUi.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/MeWrapper/AtAmUi/AtAmUiString.c b/Board/EM/MeWrapper/AtAmUi/AtAmUiString.c
new file mode 100644
index 0000000..021844b
--- /dev/null
+++ b/Board/EM/MeWrapper/AtAmUi/AtAmUiString.c
@@ -0,0 +1,242 @@
+/** @file
+ This file contines function used for handling strings.
+
+@copyright
+ Copyright (c) 2012 - 2013 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+**/
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+#include "AtAmUiString.h"
+#endif
+
+AT_AM_UI_STRING AtAmUiUSStringIDTab[] = {
+ {STR_ATAMUI_LOCKED_TEXT, 4, 20, L"This device has been locked and may have been lost.\r\n If found, Please use the following information to return the device\r\n "},
+ {STR_ATAMUI_PLATFORM_ID, 4, 23, L"Platform ID: "},
+ {STR_ATAMUI_PROVIDER_ID, 4, 24, L"Intel(R) Anti-Theft Technology service provider Id: "},
+ {STR_ATAMUI_LOCK_DUE_TO, 4, 2, L"This computer has been disabled using Intel(R) Anti-Theft Technology due to: "},
+ {STR_ATAMUI_SELECT_PASS, 4, 5, L"Please select one of the following for platform recovery:\r\n 1 - Passphrase\r\n 2 - Server Recovery Token"},
+ {STR_ATAMUI_TIME_LEFT, 4, 4, L"Time Left to enter Passphrase: "},
+ {STR_ATAMUI_USER_PASS, 4, 5, L"System Recovery"},
+ {STR_ATAMUI_RECO_ENTER_PASS, 4, 6, L"Enter Passphrase: "},
+ {STR_ATAMUI_SERV_BASED_RECOV, 4, 6, L"Server Based Recovery"},
+ {STR_ATAMUI_INVALID_SELECT, 4, 10, L"Invalid Selection, Press 1 or 2 "},
+ {STR_ATAMUI_LOCK_TIME, 4, 0, L"Disable Timer expired"},
+ {STR_ATAMUI_LOCK_STOLEN, 4, 0, L"Stolen Message received"},
+ {STR_ATAMUI_LOCK_THRESHOLD, 4, 0, L"Logon Threshold exceeded"},
+ {STR_ATAMUI_LOCK_ATTACK, 4, 0, L"Platform Attack detected"},
+ {STR_ATAMUI_CHECKING_PASS, 4, 8, L"Checking Recovery Password..."},
+ {STR_ATAMUI_RECO_TRY_AGAIN, 4, 10, L"Recovery Failed. Please try again ..."},
+ {STR_ATAMUI_RECO_FAILED, 4, 11, L"Intel(R) Anti-Theft Technology Recovery Failed.\r\n System will shutdown..."},
+ {STR_ATAMUI_RECO_SUCCESS, 4, 11, L"Intel(R) Anti-Theft Technology Recovery Successful.\r\n System Boot Continue ....."},
+ {STR_ATAMUI_SUS_ENTER_INFO, 4, 1, L"User Has Requested To Enter Intel(R) Anti-Theft Technology Suspend Mode....."},
+ {STR_ATAMUI_RES_REFER, 4, 5, L"Refer the following Platform Resume ID to IT: "},
+ {STR_ATAMUI_RECO_REFER, 4, 5, L"Refer the following Platform Recovery ID to IT: "},
+ {STR_ATAMUI_SUS_REFER, 4, 5, L"Refer the following Platform Suspend ID to IT: "},
+ {STR_ATAMUI_SUS_ENTER_TOKEN, 4, 4, L"Enter Suspend Token: "},
+ {STR_ATAMUI_SUS_ATTEMPT_EXC, 4, 9, L"Exceeded Max Attempts - Exiting .... "},
+ {STR_ATAMUI_SUS_ENTER_SUCCESS,4, 5, L"Successfully Put Platform in Suspended Mode"},
+ {STR_ATAMUI_SUS_ENTER_FAILED, 4, 5, L"Failed to Put Platform into Suspended Mode"},
+ {STR_ATAMUI_SUS_AUTH_FAILED, 4, 5, L"Failed to Authenticate "},
+ {STR_ATAMUI_SUS_EXIT_QUESTION,4, 1, L"Intel(R) Anti-Theft Technology in Suspended State: Exit? (y/n)?"},
+ {STR_ATAMUI_SUS_EXIT_INFO, 4, 2, L"Exit Intel(R) Anti-Theft Technology Suspend Mode....."},
+ {STR_ATAMUI_SUS_EXIT_SUCCESS, 4, 7, L"Successfully Exited Suspend Mode"},
+ {STR_ATAMUI_SUS_STAY, 4, 7, L"Stay in Suspend Mode...."},
+ {STR_ATAMUI_SUS_NONCE_FAILED, 0, 0, L"NONCE unknown"},
+ {STR_ATAMUI_TIME_LEFT_SEC, 0, 0, L" seconds "},
+ {STR_ATAMUI_SELECT_OPTION, 4, 9, L"Select one of the above options to proceed ..."},
+ {STR_ATAMUI_CHECKING_AUTHENT, 4, 6, L"Checking Authentication .."},
+ {STR_ATAMUI_RECO_SEC_TOKEN, 4, 6, L"Server Recovery Token: "}
+};
+
+UINTN AtAmUiUSStringIDTabEntries = sizeof (AtAmUiUSStringIDTab) / sizeof (AT_AM_UI_STRING);
+
+/**
+ This function gets character inputted.
+
+ @param[out] Key Pointer to buffer for keystroke.
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiStrGetChar (
+ OUT EFI_INPUT_KEY *Key
+ )
+{
+ EFI_STATUS Status;
+ UINTN Delay = 300000;
+ Status = EFI_SUCCESS;
+
+ Key->UnicodeChar = L'\0';
+ Key->ScanCode = 0;
+ while (Delay) {
+ Status = gST->ConIn->ReadKeyStroke (gST->ConIn, Key);
+ if (!(EFI_ERROR (Status))) {
+ break;
+ }
+ Delay --;
+ }
+
+ return Status;
+}
+
+/**
+ This routine displays the string out to the screen based on defined strings.
+ It uses X and Y to calculate the start location of string where it will be displayed. Function
+ uses string ID to indicate which strings are going to be shown by AtAmUiDisplay(). There will
+ be UseXY flag to indicate if there will be used coordinates from Strings library or not. If
+ not, the cursor will be moved behind last printed sign. It will be used to print e.g. '*' sign
+ during password entering. In graphic mode it is overridden by requirement. In graphic mode, X
+ and Y can be calculated the start location of string.
+
+ @param[in] StringID Unique string ID crated as enum type of AT_AM_UI_STRING_ID
+ @param[in] UseXY Set the current cursor position for the displayed string if it is TRUE
+ FALSE - don't use coordinates from String library. Cursor is moved behind
+ last printed sign.
+ TRUE - Use coordinates from String library.
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiStrDisplayFix (
+ IN UINT32 StringID,
+ IN BOOLEAN UseXY
+ )
+{
+ EFI_STATUS Status;
+ UINTN i;
+
+ for (i = 0; i < AtAmUiUSStringIDTabEntries; i++) {
+ if (AtAmUiUSStringIDTab[i].StrID == StringID) {
+ if (UseXY) {
+ Status = AtAmUiStrSetCursor (AtAmUiUSStringIDTab[i].X, AtAmUiUSStringIDTab[i].Y);
+ }
+
+ Status = AtAmUiStrDisplay (AtAmUiUSStringIDTab[i].String);
+ return Status;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
+/**
+ This routine displays the string out to the screen.
+ For multi-language support, a language table is expected to be selected by customization here. For example,
+ the default language table is US-English in AtAmUiUSStringTab[], a second language table is created by
+ customization in AtAmUiSECStringTab[].
+
+ @param[in] String The NULL-terminated Unicode string to be displayed on the output device(s)
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiStrDisplay (
+ IN CHAR16 *String
+ )
+{
+
+ return gST->ConOut->OutputString (gST->ConOut, String);
+}
+
+/**
+ This routine clears the screen.
+ In graphic mode it is overridden by requirement.
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiStrClearScreen (
+ VOID
+ )
+{
+
+ return gST->ConOut->ClearScreen (gST->ConOut);
+}
+
+/**
+ In text mode it is used to set the place of cursor row and cursor column.
+ In graphic mode it is overridden by requirement.
+
+ @param[in] CCol The column position to set the cursor to
+ @param[in] CRow The row position to set the cursor to
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiStrSetCursor (
+ IN UINT32 CCol,
+ IN UINT32 CRow
+ )
+{
+
+ return gST->ConOut->SetCursorPosition (gST->ConOut, CCol, CRow);
+}
+
+/**
+ This function enables or disables cursor.
+ In graphic mode it is overridden by requirement.
+
+ @param[in] Enabled If TRUE, the cursor is set to be visible. If FALSE, the cursor is set to be invisible.
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiStrEnableCursor (
+ IN BOOLEAN Enabled
+ )
+{
+
+ return gST->ConOut->EnableCursor (gST->ConOut, Enabled);
+}
+
+/**
+ In text mode it returns the place of cursor row and cursor column.
+ In graphic mode it is overridden by requirement.
+
+ @param[out] CRow The pointer to return current cursor row
+ @param[out] CCol The pointer to return current cursor column
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiStrGetCursor (
+ OUT UINT32 *CRow,
+ OUT UINT32 *CCol
+ )
+{
+ *CRow = gST->ConOut->Mode->CursorRow;
+ *CCol = gST->ConOut->Mode->CursorColumn;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Function handling delay code.
+ In graphic mode it is overridden by requirement.
+
+ @param[in] delay The number of microseconds to stall execution.
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiDelay (
+ IN UINT32 delay
+ )
+{
+
+ return gBS->Stall (delay);;
+}
+
diff --git a/Board/EM/MeWrapper/AtAmUi/AtAmUiString.h b/Board/EM/MeWrapper/AtAmUi/AtAmUiString.h
new file mode 100644
index 0000000..0331127
--- /dev/null
+++ b/Board/EM/MeWrapper/AtAmUi/AtAmUiString.h
@@ -0,0 +1,208 @@
+/** @file
+ Heder file.
+
+@copyright
+ Copyright (c) 2012 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+**/
+
+#ifndef _ATAMUISTRING_H_
+#define _ATAMUISTRING_H_
+
+typedef enum _AT_AM_UI_STRING_ID {
+ STR_ATAMUI_LOCKED_TEXT,
+ STR_ATAMUI_PLATFORM_ID,
+ STR_ATAMUI_PROVIDER_ID,
+ STR_ATAMUI_LOCK_DUE_TO,
+ STR_ATAMUI_SELECT_PASS,
+ STR_ATAMUI_TIME_LEFT,
+ STR_ATAMUI_USER_PASS,
+ STR_ATAMUI_SERV_BASED_RECOV,
+ STR_ATAMUI_INVALID_SELECT,
+ STR_ATAMUI_LOCK_TIME,
+ STR_ATAMUI_LOCK_STOLEN,
+ STR_ATAMUI_LOCK_THRESHOLD,
+ STR_ATAMUI_LOCK_ATTACK,
+ STR_ATAMUI_CHECKING_PASS,
+ STR_ATAMUI_RECO_TRY_AGAIN,
+ STR_ATAMUI_RECO_FAILED,
+ STR_ATAMUI_RECO_SUCCESS,
+ STR_ATAMUI_SUS_ENTER_INFO,
+ STR_ATAMUI_RES_REFER,
+ STR_ATAMUI_RECO_REFER,
+ STR_ATAMUI_SUS_REFER,
+ STR_ATAMUI_SUS_ENTER_TOKEN,
+ STR_ATAMUI_SUS_ATTEMPT_EXC,
+ STR_ATAMUI_SUS_ENTER_SUCCESS,
+ STR_ATAMUI_SUS_ENTER_FAILED,
+ STR_ATAMUI_SUS_AUTH_FAILED,
+ STR_ATAMUI_SUS_EXIT_QUESTION,
+ STR_ATAMUI_SUS_EXIT_INFO,
+ STR_ATAMUI_SUS_EXIT_SUCCESS,
+ STR_ATAMUI_SUS_STAY,
+ STR_ATAMUI_SUS_NONCE_FAILED,
+ STR_ATAMUI_RECO_ENTER_PASS,
+ STR_ATAMUI_TIME_LEFT_SEC,
+ STR_ATAMUI_SELECT_OPTION,
+ STR_ATAMUI_CHECKING_AUTHENT,
+ STR_ATAMUI_FAILED_TO_AUTHENT,
+ STR_ATAMUI_RECO_SEC_TOKEN,
+
+ //
+ // this has to be a last element of this enum
+ //
+ STR_ATAMUI_END_OF_TAB
+} AT_AM_UI_STRING_ID;
+
+///
+/// Strings will be kept in array. There can be created many tables with strings in various
+/// languages. A language table can be selected within AtAmUiStrDisplay () to display string in
+/// targeted language with the unique string ID. The same unique string ID is applied to all
+/// language tables
+///
+typedef struct _AT_AM_UI_STRING {
+ UINTN StrID; ///< Unique string ID crated as enum type AT_AM_UI_STRING_ID
+ UINT8 X; ///< The place of cursor row to be display
+ UINT8 Y; ///< The place of cursor column to be display
+ CHAR16 *String; ///< Pointer to the string
+} AT_AM_UI_STRING;
+
+#define AT_AM_UI_1_SECOND 1000000
+
+/**
+ This function gets character inputted.
+
+ @param[out] Key Pointer to buffer for keystroke.
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiStrGetChar (
+ OUT EFI_INPUT_KEY *Key
+ )
+;
+
+/**
+ This routine displays the string out to the screen based on defined strings.
+ It uses X and Y to calculate the start location of string where it will be displayed. Function
+ uses string ID to indicate which strings are going to be shown by AtAmUiDisplay(). There will
+ be UseXY flag to indicate if there will be used coordinates from Strings library or not. If
+ not, the cursor will be moved behind last printed sign. It will be used to print e.g. '*' sign
+ during password entering. In graphic mode it is overridden by requirement. In graphic mode, X
+ and Y can be calculated the start location of string.
+
+ @param[in] StringID Unique string ID crated as enum type of AT_AM_UI_STRING_ID
+ @param[in] UseXY Set the current cursor position for the displayed string if it is TRUE
+ FALSE - don't use coordinates from String library. Cursor is moved behind
+ last printed sign.
+ TRUE - Use coordinates from String library.
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiStrDisplayFix (
+ IN UINT32 StringID,
+ IN BOOLEAN UseXY
+ )
+;
+
+/**
+ This routine displays the string out to the screen.
+ For multi-language support, a language table is expected to be selected by customization here. For example,
+ the default language table is US-English in AtAmUiUSStringTab[], a second language table is created by
+ customization in AtAmUiSECStringTab[].
+
+ @param[in] String The NULL-terminated Unicode string to be displayed on the output device(s)
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiStrDisplay (
+ IN CHAR16 *String
+ )
+;
+
+/**
+ This routine clears the screen.
+ In graphic mode it is overridden by requirement.
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiStrClearScreen (
+ VOID
+ )
+;
+
+/**
+ In text mode it is used to set the place of cursor row and cursor column.
+ In graphic mode it is overridden by requirement.
+
+ @param[in] CCol The column position to set the cursor to be displayed
+ @param[in] CRow The row position to set the cursor to be displayed
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiStrSetCursor (
+ IN UINT32 CCol,
+ IN UINT32 CRow
+ )
+;
+
+/**
+ This function enables or disables cursor.
+ In graphic mode it is overridden by requirement.
+
+ @param[in] Enabled If TRUE, the cursor is set to be visible. If FALSE, the cursor is set to be invisible.
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiStrEnableCursor (
+ IN BOOLEAN Enabled
+ )
+;
+
+/**
+ In text mode it returns the place of cursor row and cursor column.
+ In graphic mode it is overridden by requirement.
+
+ @param[out] CRow The pointer to return current cursor row
+ @param[out] CCol The pointer to return current cursor column
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiStrGetCursor (
+ OUT UINT32 *CRow,
+ OUT UINT32 *CCol
+ )
+;
+
+/**
+ Function handling delay code.
+ In graphic mode it is overridden by requirement.
+
+ @param[in] delay The number of microseconds to stall execution.
+
+ @retval EFI_SUCCESS The function completed successfully.
+**/
+EFI_STATUS
+AtAmUiDelay (
+ IN UINT32 delay
+ )
+;
+
+#endif
diff --git a/Board/EM/MeWrapper/Icc/Icc.cif b/Board/EM/MeWrapper/Icc/Icc.cif
new file mode 100644
index 0000000..43ca476
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/Icc.cif
@@ -0,0 +1,13 @@
+<component>
+ name = "Icc"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\Icc\"
+ RefName = "Icc"
+[files]
+"Icc.sdl"
+[parts]
+"IccProtocolLib"
+"IccPlatform"
+"IccSetup"
+"IccOverClocking"
+<endComponent>
diff --git a/Board/EM/MeWrapper/Icc/Icc.sdl b/Board/EM/MeWrapper/Icc/Icc.sdl
new file mode 100644
index 0000000..5fef879
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/Icc.sdl
@@ -0,0 +1,25 @@
+TOKEN
+ Name = "ICC_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable ICC support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "Icc_DIR"
+End
+
+ELINK
+ Name = "ICC_INCLUDES"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "/I$(Icc_DIR)"
+ Parent = "ICC_INCLUDES"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.c b/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.c
new file mode 100644
index 0000000..4098481
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.c
@@ -0,0 +1,1187 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccPlatform/IccPlatform.c 9 5/14/14 9:56p Tristinchou $
+//
+// $Revision: 9 $
+//
+// $Date: 5/14/14 9:56p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccPlatform/IccPlatform.c $
+//
+// 9 5/14/14 9:56p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 8 4/19/13 4:08a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Check DIMM Changed, and update WDT Protocol for XTU
+//
+// 7 1/28/13 5:01a Klzhan
+// Improvement : System might not power on after changing CPU when
+// Overclocking.
+//
+// 6 1/14/13 3:15a Klzhan
+//
+// 5 12/24/12 6:34a Klzhan
+// [TAG] EIP109624
+// [Category] New Feature
+// [Description] Support Lock Icc registers.
+//
+// 4 12/19/12 2:34a Klzhan
+// Update for overclocking.
+//
+// 3 9/19/12 5:54a Klzhan
+// 1. Fix Build Error when Performance is on(IccPlatform.mak).
+// 2. Avoid time-out in ICC setup Page when return from Shell.
+// 3. Remove un-used wait for Fw Init Done.
+//
+// 2 4/24/12 12:28a Klzhan
+//
+// 1 2/08/12 1:06a Klzhan
+// Initial Check in
+//
+// 5 7/27/11 3:21a Klzhan
+// Add Elinks for PCIE and PCI config.
+// Note: Don't List GBE port on this Elink.
+//
+// 4 7/15/11 12:45a Klzhan
+//
+// 3 7/08/11 4:22a Klzhan
+// [TAG] EIP64189
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC to 0.7
+//
+// 2 6/27/11 8:39a Klzhan
+// Support new ICC control library
+//
+// 1 2/25/11 1:42a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: IccPlatform.c
+//
+// Description: Platform-specific ICC code
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+Copyright (c) 2009-2010 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ IccPlatform.c
+
+Abstract:
+
+ Platform-specific ICC code
+
+--*/
+#define __EDKII_GLUE_MEMORY_ALLOCATION_LIB_H__
+#define __EDKII_GLUE_BASE_MEMORY_LIB_H__
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+#endif
+#include EFI_PROTOCOL_PRODUCER(IccOverClocking)
+#include EFI_PROTOCOL_PRODUCER(MeBiosPayLoadData)
+#ifdef CougarPoint_SUPPORT
+#include EFI_PROTOCOL_PRODUCER (Wdt)
+#endif
+#if EFI_SPECIFICATION_VERSION>0x20000
+#define __HII_CONFIG_ACCESS__H__
+#else
+#include EFI_PROTOCOL_DEFINITION (Hii)
+#endif
+#include "MeLib.h"
+#include "PchAccess.h"
+#include "IccSetup.h"
+#include "EfiPerf.h"
+//
+// without these include guards, setup.h would include AMI EFI definitions conflicting with those from EDK
+//
+#define __UEFI_HII__H__
+#define __HII_PROTOCOL_H__
+#define _HII_H_
+#define __FORM_CALLBACK_PROTOCOL_H__
+#include "Setup.h"
+#include "IccPlatform.h"
+#include "Board\EM\Platform\PlatformSetup.h"
+#if WdtPei_SUPPORT
+#include "ppi\Wdt\Wdt.h"
+#endif
+UINT64 mNonce;
+EFI_EVENT mFeedEvent;
+ICC_CONFIG mIccConfig;
+
+ICC_OVERCLOCKING_PROTOCOL* gIccOverClockingProtocol;
+
+typedef VOID (ICC_CLOCK_UPDATE) (PLATFORM_PCIE_SLOTS* PCIE_SLOT, PLATFORM_PCI_SLOTS* PCI_SLOT);
+extern ICC_CLOCK_UPDATE OEM_CLOCK_UPDATE_FUNC EndOfOemClockUpdateFunc;
+ICC_CLOCK_UPDATE* OemClockUpdate[] = {OEM_CLOCK_UPDATE_FUNC NULL};
+DXE_MBP_DATA_PROTOCOL *mBIOSPayLoad;
+#if defined PERF_TUNE_SUPPORT && PERF_TUNE_SUPPORT == 1
+
+#define __EFI__H__
+#define __HOB__H__
+#include <Protocol\PerfTuneProtocol.h>
+EFI_GUID gPerfTune3xProtocolGuid = PERF_TUNE_ASL_PROTOCOL_GUID;
+EFI_GUID gPerfTuneDataHobGuid = AMI_PERF_TUNE_DATA_HOB_GUID;
+EFI_GUID gHobListGuid = EFI_HOB_LIST_GUID;
+BOOLEAN gFound = FALSE;
+BOOLEAN gBootCurrent = FALSE;
+UINT16 gCurrentFrequency;
+UINT16 gPEGDMIRatio;
+ICC_CLOCK_SETTINGS gClocksetting;
+
+//----------------------------CPU Ratio GACI DATA----------------------------
+// GACI_DATA DevNameGaciData { ControlID,NumberOfValues,Precision,Flags,DefaultDataValue,MinDataValue,MaxDataValue,MinDisplayValue,MaxDisplayValue}
+static GACI_DATA IccFreqGaciData = {BIOS_HOST_CLOCK_IMPLEMENTATION, 8001, 2, 0, 10000, 10000, 18000, 10000, 18000};
+
+static GACI_DATA IccPegDmiGaciData = {BIOS_PEG_DMI_RATIO_IMPLEMENTATION, 0xFFFF, 2, 0, 0, 0, 0, 0, 0};
+#endif
+
+#define ICC_CLOCK_COUNT 8
+UINT8 ClockID;
+#define MAX(a, b) ((a) > (b) ? (a) : (b))
+#define MIN(a, b) ((a) > (b) ? (b) : (a))
+#ifndef TRACE_ALWAYS
+#define TRACE_ALWAYS -1
+#endif
+typedef struct _CLOCK_DISPLAY_VALUES {
+ UINT16 ClkFreqMax;
+ UINT16 ClkFreqMin;
+ UINT16 ClkFreqCurrent;
+ UINT16 SscPercentMax;
+ UINT16 SscPercentCurrent;
+ UINT16 ClockUsage;
+ UINT8 SscChangeAllowed;
+ UINT8 SscModeUpAvailable;
+ UINT8 SscModeCenterAvailable;
+ UINT8 SscModeDownAvailable;
+ UINT8 SscModeCurrent;
+} CLOCK_DISPLAY_VALUES;
+
+typedef struct _ICC_CLK_REQUEST {
+ UINT16 Frequency;
+ UINT16 SscPercent;
+ UINT8 SscAllowed;
+ UINT8 SscMode;
+ UINT8 EveryBoot;
+} ICC_CLK_REQUEST;
+
+#define IMMEDIATE 0
+#define TEMPORARY 1
+#define PERMANENT 2
+
+#define SSC_MODE_UP 2
+#define SSC_MODE_CENTER 1
+#define SSC_MODE_DOWN 0
+
+#if defined PERF_TUNE_SUPPORT && PERF_TUNE_SUPPORT == 1
+VOID PerfTuneIcc(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable)
+{
+ VOID *pPerfTuneDataHobList = NULL;
+ PERF_TUNE_DATA_HOB *pBiosSettingData;
+ BIOS_SETTING_DATA BiosSettingData;
+ UINT16 RequestFrequency,PEGDMIRatio,bPEGDMIRatio;
+ ICC_CLOCK_SETTINGS RequestSetting;
+ EFI_GUID SetupGuid = SETUP_GUID;
+ EFI_STATUS Status;
+ BOOLEAN freqConsolidationBypass = TRUE;
+ ICC_LIB_STATUS IccStatus;
+ EFI_PEI_HOB_POINTERS GuidHob;
+ WDT_PROTOCOL *InternalWdtProtocol;
+ UINTN VarSize = sizeof(BIOS_SETTING_DATA);
+ BIOS_SETTING_DATA DefaultData;
+ EFI_GUID EfiSetupGuid = SETUP_GUID;
+
+ //
+ // Get Hob list
+ //
+ Status = EfiLibGetSystemConfigurationTable (&gEfiHobListGuid, &GuidHob.Raw);
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+
+ for (Status = EFI_NOT_FOUND; EFI_ERROR (Status);) {
+ if (END_OF_HOB_LIST (GuidHob)) {
+ Status = EFI_NOT_FOUND;
+ break;
+ }
+ if (GET_HOB_TYPE (GuidHob) == EFI_HOB_TYPE_GUID_EXTENSION) {
+ if (EfiCompareGuid (&gPerfTuneDataHobGuid, &GuidHob.Guid->Name)) {
+ Status = EFI_SUCCESS;
+ pBiosSettingData = (PERF_TUNE_DATA_HOB *)(GuidHob.Raw);
+ break;
+ }
+ }
+ GuidHob.Raw = GET_NEXT_HOB (GuidHob);
+ }
+
+ if (EFI_ERROR(Status)) return;
+
+ if(pBiosSettingData->IsCpuChanged || pBiosSettingData->IsDimmChanged){
+ Status = gRT->GetVariable(
+ L"OcDefault",
+ &EfiSetupGuid,
+ NULL,
+ &VarSize,
+ &DefaultData
+ );
+
+ BiosSettingData = pBiosSettingData->PerfTuneDataHob;
+ RequestFrequency = DefaultData.HostClockFreq;
+ PEGDMIRatio = DefaultData.PEGDMIRatio;
+ }else{
+ BiosSettingData = pBiosSettingData->PerfTuneDataHob;
+ RequestFrequency = BiosSettingData.HostClockFreq;
+ PEGDMIRatio = BiosSettingData.PEGDMIRatio;
+ }
+
+ if ( (PEGDMIRatio == 100) || (PEGDMIRatio == 0) || (PEGDMIRatio == 0xFFFF)){
+ bPEGDMIRatio = 0;
+ }else if ( (PEGDMIRatio == 125) || (PEGDMIRatio == 1)){
+ bPEGDMIRatio = 1;
+ }else if ( (PEGDMIRatio == 167) || (PEGDMIRatio == 2) ){
+ bPEGDMIRatio = 2;
+ }else if ( (PEGDMIRatio == 250) || (PEGDMIRatio == 3) ){
+ bPEGDMIRatio = 3;
+ }else{
+ bPEGDMIRatio = 0;
+ }
+
+ // Return if Overclocking Bclk not found
+ if((!gFound) || ((RequestFrequency == gCurrentFrequency) &&
+ (bPEGDMIRatio == gPEGDMIRatio) && !(pBiosSettingData->IsCpuChanged || pBiosSettingData->IsDimmChanged)) ) return;
+
+ if (bPEGDMIRatio == gPEGDMIRatio){
+ gBootCurrent = FALSE;
+ RequestSetting.Frequency = RequestFrequency * 10000;
+ RequestSetting.SscMode = gClocksetting.SscMode;
+ if (bPEGDMIRatio==0){
+ RequestSetting.SscPercent = 0x32;
+ }else{
+ RequestSetting.SscPercent = 0;
+ }
+ RequestSetting.DmiPegRatio = bPEGDMIRatio;
+ gIccOverClockingProtocol->SetCurrentClockSettings(ClockID,
+ RequestSetting,
+ &IccStatus);
+ gIccOverClockingProtocol->GetCurrentClockSettings
+ (ClockID, &RequestSetting, &IccStatus);
+
+
+ RequestFrequency = RequestSetting.Frequency/10000;
+ PEGDMIRatio = RequestSetting.DmiPegRatio;
+ }else{
+ gBootCurrent = TRUE;
+ RequestSetting.Frequency = RequestFrequency * 10000;
+ RequestSetting.SscMode = gClocksetting.SscMode;
+ if (bPEGDMIRatio==0){
+ RequestSetting.SscPercent = 0x32;
+ }else{
+ RequestSetting.SscPercent = 0;
+ }
+ RequestSetting.DmiPegRatio = bPEGDMIRatio;
+ gIccOverClockingProtocol->SetBootClockSettings(ClockID,
+ RequestSetting,
+ &IccStatus);
+
+ gIccOverClockingProtocol->GetBootClockSettings
+ (ClockID, &RequestSetting, &IccStatus);
+
+
+ RequestFrequency = RequestSetting.Frequency/10000;
+ PEGDMIRatio = RequestSetting.DmiPegRatio;
+ }
+
+ if(IccStatus == ICC_LIB_STATUS_SUCCESS)
+ {
+ // OverClocking Success
+ // ReStore back to OcCurrent
+ BiosSettingData.HostClockFreq = RequestFrequency;
+ IccFreqGaciData.DefaultDataValue = RequestFrequency;
+ if ( PEGDMIRatio == 0 ){
+ BiosSettingData.PEGDMIRatio = 100;
+ IccPegDmiGaciData.DefaultDataValue = 100;
+ }else if ( PEGDMIRatio == 1 ){
+ BiosSettingData.PEGDMIRatio = 125;
+ IccPegDmiGaciData.DefaultDataValue = 125;
+ }else if ( PEGDMIRatio == 2 ){
+ BiosSettingData.PEGDMIRatio = 167;
+ IccPegDmiGaciData.DefaultDataValue = 167;
+ }else if ( PEGDMIRatio == 3 ){
+ BiosSettingData.PEGDMIRatio = 250;
+ IccPegDmiGaciData.DefaultDataValue = 250;
+ }
+
+ Status = gRT->SetVariable(
+ L"OcCurrent",
+ &SetupGuid,
+ EFI_VARIABLE_NON_VOLATILE |
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ sizeof(BIOS_SETTING_DATA),
+ &BiosSettingData );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ if (gBootCurrent == TRUE){
+ Status = gBS->LocateProtocol(&gWdtProtocolGuid, NULL, &InternalWdtProtocol);
+ if(!EFI_ERROR(Status))
+ {
+ InternalWdtProtocol->AllowKnownReset();
+ }
+ IoWrite8 (0xCF9,0x06);//Setting REG/DMI ratio have to reset.
+ EFI_DEADLOOP();
+ }
+
+ return;
+}
+
+VOID
+IccXtuHandler(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ UINT8 i;
+ EFI_STATUS Status;
+ PERF_TUNE_ASL_PROTOCOL *PerfTune3xProtocol;
+ UINTN Len = 0;
+ UINT8 *Buffer = NULL;
+ EFI_GUID IccOverClockingProtocolGuid = ICC_OVERCLOCKING_PROTOCOL_GUID;
+
+ Status = gBS->LocateProtocol(&IccOverClockingProtocolGuid, NULL, &gIccOverClockingProtocol);
+ if(EFI_ERROR(Status)) return;
+ Status = gBS->LocateProtocol(&gPerfTune3xProtocolGuid, NULL, &PerfTune3xProtocol);
+ if(EFI_ERROR(Status)) return;
+
+ for(i = 0; i < ICC_CLOCK_COUNT ; i++)
+ {
+ ICC_LIB_STATUS IccStatus;
+ ICC_CLOCK_RANGES ClockRange;
+
+ gIccOverClockingProtocol->GetClockRanges(i, &ClockRange, &IccStatus);
+
+ if ( (ClockRange.UsageMask & (1<<ICC_CLOCK_USAGE_BCLK) ) &&
+ (ClockRange.UsageMask & (1<<ICC_CLOCK_USAGE_DMI) ) &&
+ (ClockRange.UsageMask & (1<<ICC_CLOCK_USAGE_PEG) ) &&
+ (IccStatus == ICC_LIB_STATUS_SUCCESS)
+ ) {
+ if (ClockRange.FrequencyMax != ClockRange.FrequencyMin)
+ gIccOverClockingProtocol->GetCurrentClockSettings
+ (i, &gClocksetting, &IccStatus);
+ if(IccStatus != ICC_LIB_STATUS_SUCCESS)
+ break;
+
+
+ gCurrentFrequency = gClocksetting.Frequency/10000;
+
+ // Init GACI Data
+ IccFreqGaciData.MinDataValue = ClockRange.FrequencyMin/10000;
+ IccFreqGaciData.MinDisplayValue = ClockRange.FrequencyMin/10000;
+
+ IccFreqGaciData.MaxDataValue = ClockRange.FrequencyMax/10000;
+ IccFreqGaciData.MaxDisplayValue = ClockRange.FrequencyMax/10000;
+
+ IccFreqGaciData.DefaultDataValue = gCurrentFrequency;//ClockRange.FrequencyMin/10000;
+ IccFreqGaciData.NumberOfValues = IccFreqGaciData.MaxDataValue - IccFreqGaciData.MinDataValue + 1;
+ gFound = TRUE;
+ ClockID = i;
+
+ gPEGDMIRatio = gClocksetting.DmiPegRatio;
+
+ if ( gPEGDMIRatio == 0 ){
+ IccPegDmiGaciData.DefaultDataValue = 100;
+ }else if ( gPEGDMIRatio == 1 ){
+ IccPegDmiGaciData.DefaultDataValue = 125;
+ }else if ( gPEGDMIRatio == 2 ){
+ IccPegDmiGaciData.DefaultDataValue = 167;
+ }else if ( gPEGDMIRatio == 3 ){
+ IccPegDmiGaciData.DefaultDataValue = 250;
+ }
+ break;
+ }
+ }
+ PerfTuneIcc(ImageHandle,SystemTable);
+ // reference clock frequency
+ Len = sizeof(IccFreqGaciData);
+ Status = gBS->AllocatePool(EfiBootServicesData, Len, &Buffer);
+ gBS->SetMem(Buffer, Len, 0 );
+
+ gBS->CopyMem(Buffer, &IccFreqGaciData, sizeof(IccFreqGaciData));
+ gBS->CopyMem(Buffer + sizeof(IccFreqGaciData), &IccFreqGaciData, sizeof(IccFreqGaciData));
+ Status = PerfTune3xProtocol->SetGaciData(Buffer, Len);
+ //PEG/DMI Ratio
+ Len = sizeof(IccPegDmiGaciData);
+ Status = gBS->AllocatePool(EfiBootServicesData, Len, &Buffer);
+ gBS->SetMem(Buffer, Len, 0 );
+
+ gBS->CopyMem(Buffer, &IccPegDmiGaciData, sizeof(IccPegDmiGaciData));
+ Status = PerfTune3xProtocol->SetGaciData(Buffer, Len);
+ return;
+}
+#endif
+
+EFI_STATUS
+IccPlatformEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINT8 OldProfile;
+#ifdef CougarPoint_SUPPORT
+ UINT8 WdtStatus = V_PCH_OC_WDT_CTL_STATUS_OK;
+ WDT_PROTOCOL *WdtProtocol;
+#endif
+
+
+ DEBUG ((EFI_D_INFO, "(ICC) Entry Point to ICC_Platform\n"));
+
+ Status = ReadMainSetupData (&mIccConfig);
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "(ICC) Failed to read setup data! Status = %r\n", Status));
+ return Status;
+ }
+ Status = HeciGetIccProfile (&OldProfile);
+ Status = gBS->LocateProtocol(&gMeBiosPayloadDataProtocolGuid, NULL, &mBIOSPayLoad);
+ if(EFI_ERROR(Status))
+ {
+ DEBUG ((EFI_D_ERROR, "(ICC) Get BIOS PayLoad Data Protocol fail !! Status = %r \n", Status));
+ mBIOSPayLoad = NULL;
+ }
+#ifdef CougarPoint_SUPPORT
+ Status = gBS->LocateProtocol(&gWdtProtocolGuid, NULL, &WdtProtocol);
+ if ( EFI_ERROR(Status) ) {
+ DEBUG ((EFI_D_ERROR, "(ICC) Failed to locate Wdt protocol, Status = %r\n",Status));
+ return EFI_SUCCESS;
+ }
+ WdtStatus = WdtProtocol->CheckStatus();
+
+ if (mIccConfig.ClocksModified != ICC_SETTINGS_NOT_MODIFIED && WdtStatus == V_PCH_OC_WDT_CTL_STATUS_FAILURE) {
+ IccFailureNotification();
+ }
+#endif
+
+ ASSERT_EFI_ERROR (Status);
+
+ if (mIccConfig.ProfileSelection != OPTION_DISABLED) {
+ ProfileSelection(mIccConfig.SelectedIccProfile);
+ };
+
+ IccMessages();
+
+#if defined PERF_TUNE_SUPPORT && PERF_TUNE_SUPPORT == 1
+ IccXtuHandler(ImageHandle,SystemTable);
+#endif
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+ClockFailureReport (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+/*++
+Routine Description:
+ Displays error message just below the "press DEL to enter setup" message
+ and forces user to enter setup. This is used when BIOS-initiated changes
+ to ICC registers caused platform instability and need to be cancelled
+Arguments:
+ Event - not used
+ Context - not used
+Returns:
+ EFI_SUCCESS if everything's OK
+--*/
+{
+ EFI_STATUS Status;
+ EFI_INPUT_KEY Key;
+ UINT32 VarAttr;
+ UINTN VarSize;
+ UINT32 BootFlow;
+ EFI_GUID guidBootFlow = BOOT_FLOW_VARIABLE_GUID;
+
+ Status = EFI_SUCCESS;
+
+ DEBUG ((EFI_D_INFO, "(ICC) ClockFailureReport\n"));
+
+ gST->ConOut->OutputString (
+ gST->ConOut,
+ L"Boot attempt failed after platform clock settings were modified by BIOS!\r\n"
+ );
+ gST->ConOut->OutputString (gST->ConOut, L"Press any key to enter SETUP.\r\n");
+ do {
+ Status = gBS->CheckEvent (gST->ConIn->WaitForKey);
+ } while (Status == EFI_NOT_READY);
+ Status = gST->ConIn->ReadKeyStroke (gST->ConIn, &Key);
+
+ VarAttr = 0;
+ VarSize = sizeof(BootFlow);
+ Status = gRT->GetVariable(
+ L"BootFlow",
+ &guidBootFlow,
+ &VarAttr,
+ &VarSize,
+ &BootFlow );
+ if( EFI_ERROR(Status) )
+ {
+ VarAttr = EFI_VARIABLE_BOOTSERVICE_ACCESS;
+ VarSize = sizeof(BootFlow);
+ }
+
+ BootFlow = BOOT_FLOW_CONDITION_FIRST_BOOT;
+ gRT->SetVariable(
+ L"BootFlow",
+ &guidBootFlow,
+ VarAttr,
+ VarSize,
+ &BootFlow );
+
+ return Status;
+}
+
+EFI_STATUS
+DetectUsedClocks (
+ OUT UINT32*UsedClocks,
+ OUT UINT32*AllClocks
+ )
+/*++
+Routine Description:
+ Detects which PCI/PCIE clocks are not needed and can be turned off.
+ For PCIE, PCIE bridge is accessed, one of its registers knows if there are cards
+ present in slots
+ For PCI, this function tries to access PCI devices that would exist if PCI
+ cards were put into slots. If such access fails, then slot must be empty and
+ its clock can be turned off
+Arguments:
+ UsedClocks: bitmask for Clock Enable: 1 = enable, 0 = disable
+ AllClocks: bitmask for Clock Enable Mask: 1 = Clock Enable bit is valid, 0 = ignore Clock Enable bit
+Returns:
+ EFI_SUCCESS in all circumstances except when required protocols can't be located
+--*/
+{
+ UINT32 i;
+ UINT8 PciQnt;
+ UINT8 PciExpressQnt;
+// UINT32 BusNumberRegister;
+ UINT8 BusNumber = 0;
+ UINT8 FunctionNumber;
+ UINT16 VendorID;
+ UINT16 SlotStatus;
+ UINT32 Rcba;
+ UINT32 RootPortFunctionNumber = 0;
+ UINT8 SkipPciDetection = 0;
+ EFI_STATUS Status;
+ EFI_GUID SetupGuid = SETUP_GUID;
+ SETUP_DATA SetupData;
+ UINTN VariableSize;
+ PLATFORM_PCIE_SLOTS PciExpressSlots[] = {PCIE_CLOCK_CONFIG{0,0,0}};
+ PLATFORM_PCI_SLOTS PciSlots[] = {PCI_CLOCK_CONFIG{0,0,0}};
+ //
+ // all PCI/PCIE-related clocks are turned off by default and only turned on when needed
+ // such negative logic covers situation where two or more slots share one clock
+ //
+ for (i = 0; OemClockUpdate[i] != NULL; i++)
+ OemClockUpdate[i](PciExpressSlots, PciSlots);
+
+
+ *UsedClocks = 0xFFFFFFFF;
+ *AllClocks = 0x0;
+
+ PciQnt = (sizeof (PciSlots) / sizeof (PLATFORM_PCI_SLOTS)) - 1;
+ PciExpressQnt = (sizeof (PciExpressSlots) / sizeof (PLATFORM_PCIE_SLOTS)) - 1;
+
+ for (i = 0; i < PciQnt; i++) {
+ *UsedClocks &= ~(PciSlots[i].Clock);
+ *AllClocks |= PciSlots[i].Clock;
+ }
+
+ for (i = 0; i < PciExpressQnt; i++) {
+ *UsedClocks &= ~(PciExpressSlots[i].Clock);
+ *AllClocks |= PciExpressSlots[i].Clock;
+ }
+
+ // PCI Express
+ //
+ //
+ // read RootPortFunctionNumber register, it knows (pcie bridge's function number) - to - (physical slot) mapping
+ //
+ if (PciExpressQnt > 0) {
+
+ Rcba = MmioRead32 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_LPC,
+ PCI_FUNCTION_NUMBER_PCH_LPC,
+ R_PCH_LPC_RCBA
+ )
+ );
+
+ Rcba &= B_PCH_LPC_RCBA_BAR;
+ RootPortFunctionNumber = MmioRead32 ((UINTN) (Rcba + R_PCH_RCRB_RPFN));
+ }
+ //
+ // detect cards in PCIE slots
+ //
+ for (i = 0; i < PciExpressQnt; i++) {
+ FunctionNumber =
+ (
+ RootPortFunctionNumber >>
+ (S_PCH_RCRB_PRFN_RP_FIELD * PciExpressSlots[i].RootPortNumber)
+ ) & 0x00000007;
+
+
+ VendorID = MmioRead16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS,
+ FunctionNumber,
+ R_PCH_PCIE_VENDOR_ID
+ )
+ );
+
+ SlotStatus = MmioRead16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS,
+ FunctionNumber,
+ R_PCH_PCIE_SLSTS
+ )
+ );
+//********************************************************************************
+ VariableSize = sizeof (SETUP_DATA);
+ Status = gRT->GetVariable (
+ L"Setup",
+ &SetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ PciExpressSlots[i].HotPlugSupport = SetupData.PcieRootPortHPE[i];
+//*********************************************************************************
+ if (PciExpressSlots[i].HotPlugSupport == 1 ||
+ (VendorID != 0xFFFF && ((SlotStatus & B_PCH_PCIE_SLSTS_PDS) != 0))
+ ) {
+ *UsedClocks |= PciExpressSlots[i].Clock;
+ }
+ }
+
+ DEBUG ((EFI_D_INFO, "(ICC) PCI(E) Clocks Disabled: 0x%08x\n", (*AllClocks & ~(*UsedClocks)) ));
+ DEBUG ((EFI_D_INFO, "(ICC) PCI(E) Clocks Enabled: 0x%08x\n", (*AllClocks & *UsedClocks ) ));
+ DEBUG ((EFI_D_INFO, "(ICC) Clocks left alone: 0x%08x\n", ~(*AllClocks) ));
+
+ return EFI_SUCCESS;
+
+}
+
+EFI_STATUS
+EFIAPI
+IccFailureNotification (
+ VOID
+ )
+/*++
+Routine Description:
+ This function should only be called if Watchdog timer expiration was detected
+ after BIOS changes ICC settings. Error message is displayed and BIOS setup is entered.
+Arguments:
+ none
+Returns:
+ EFI_SUCCESS if everything's OK
+--*/
+{
+ EFI_EVENT Event;
+ VOID *EventPointer;
+ EFI_GUID AllDriversConnectedProtocolGuid = BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID;
+ EFI_STATUS Status;
+
+ Status = gBS->CreateEvent (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ ClockFailureReport,
+ NULL,
+ &Event
+ );
+ if (!EFI_ERROR (Status)) {
+ Status = gBS->RegisterProtocolNotify (
+ &AllDriversConnectedProtocolGuid,
+ Event,
+ &EventPointer
+ );
+ }
+
+ DEBUG ((EFI_D_INFO, "(ICC) ClockFailureReport event registration; Status = 0x%02x\n", Status));
+ return Status;
+}
+
+EFI_STATUS
+OnReadyToBoot (
+IN EFI_EVENT Event,
+IN VOID *Context
+)
+{
+ EFI_GUID IccSetupDataGuid = ICC_VOLATILE_SETUP_DATA_GUID;
+ UINT8 ReadyToBoot = 1;
+ EFI_STATUS Status;
+
+ Status = gRT->SetVariable (
+ L"AfterReadyToBoot",
+ &IccSetupDataGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ sizeof(UINT8),
+ &ReadyToBoot
+ );
+
+ return EFI_SUCCESS;
+}
+EFI_STATUS
+IccMessages (
+ VOID
+ )
+/*++
+Routine Description:
+ Schedules SetClockEnables and LockRegisters Icc heci messages to be executed after PCI enumeration is done
+Arguments:
+ none
+Returns:
+ EFI_SUCCESS if everything's OK
+--*/
+{
+ EFI_EVENT Event;
+ VOID *EventPointer;
+ EFI_GUID AllDriversConnectedProtocolGuid = BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID;
+ EFI_STATUS Status;
+ EFI_EVENT ReadytoBootEvent;
+ EFI_GUID EfiEventReadyToBootGuid = EFI_EVENT_GROUP_READY_TO_BOOT;
+
+ Status = gBS->CreateEvent (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ SendIccMessages,
+ NULL,
+ &Event
+ );
+ if (!EFI_ERROR (Status)) {
+ Status = gBS->RegisterProtocolNotify (
+ &AllDriversConnectedProtocolGuid,
+ Event,
+ &EventPointer
+ );
+ }
+
+ DEBUG ((EFI_D_INFO, "(ICC) IccMessages event registration; Status = 0x%02x\n", Status));
+#if (EFI_SPECIFICATION_VERSION < 0x00020000)
+ gBS->CreateEvent (
+ EFI_EVENT_SIGNAL_READY_TO_BOOT | EFI_EVENT_NOTIFY_SIGNAL_ALL,
+ TPL_CALLBACK,
+ OnReadyToBoot,
+ NULL,
+ &ReadytoBootEvent
+ );
+#else
+ gBS->CreateEventEx (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ OnReadyToBoot,
+ NULL,
+ &EfiEventReadyToBootGuid,
+ &ReadytoBootEvent
+ );
+#endif
+ return Status;
+}
+
+
+UINT8
+ReadIccSoftStraps (
+ VOID
+ )
+/*++
+Routine Description:
+ Reads soft straps from flash to check who is responsible for selecting ICC clock profile.
+Arguments:
+Returns:
+ PROFILE_SELECTED_BY_BIOS
+ PROFILE_SELECTED_BY_ME
+--*/
+{
+ UINT32 PchRootComplexBar;
+ UINT32 Softstrap10;
+
+ PchRootComplexBar = MmioRead32 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_LPC,
+ PCI_FUNCTION_NUMBER_PCH_LPC,
+ R_PCH_LPC_RCBA
+ )
+ );
+
+ PchRootComplexBar &= ~BIT0;
+
+ MmioAndThenOr32 (
+ PchRootComplexBar + R_PCH_SPI_FDOC,
+ (UINT32) (~(B_PCH_SPI_FDOC_FDSS_MASK | B_PCH_SPI_FDOC_FDSI_MASK)),
+ (UINT32) (V_PCH_SPI_FDOC_FDSS_PCHS | SOFTSTRAP10)
+ );
+
+ Softstrap10 = MmioRead32 (PchRootComplexBar + R_PCH_SPI_FDOD);
+
+ if (Softstrap10 & CLOCK_PROFILE_SELECTOR) {
+ return PROFILE_SELECTED_BY_ME;
+ }
+ return PROFILE_SELECTED_BY_BIOS;
+}
+
+EFI_STATUS
+ReadMainSetupData (
+ OUT ICC_CONFIG* IccConfig
+ )
+/*++
+Routine Description:
+ reads SETUP_DATA and creates IccConfig with all Icc-related setup informations
+Arguments:
+Returns:
+ filled SETUP_DATA struct
+--*/
+{
+ EFI_STATUS Status;
+ UINT32 SetupVarAttr;
+ UINTN VariableSize;
+ UINT32 Attributes;
+ EFI_GUID SetupGuid = SETUP_GUID;
+ EFI_GUID IccPersistentDataGuid = ICC_PERSISTENT_DATA_GUID;
+ SETUP_DATA SetupData;
+ ICC_PERSISTENT_DATA IccPersistentData;
+
+ DEBUG ((EFI_D_ERROR, "(ICC) ReadMainSetupData\n"));
+
+ SetupVarAttr = 0;
+ VariableSize = sizeof (SETUP_DATA);
+
+ Status = gRT->GetVariable(
+ L"Setup",
+ &SetupGuid,
+ &SetupVarAttr,
+ &VariableSize,
+ &SetupData );
+ if( EFI_ERROR(Status) ) {
+ DEBUG ((EFI_D_ERROR, "Failed to read SETUP_DATA! Status = %r\n", Status));
+ return Status;
+ }
+
+ VariableSize = sizeof (ICC_PERSISTENT_DATA);
+
+ Status = gRT->GetVariable (
+ L"IccPersistentData",
+ &IccPersistentDataGuid,
+ &Attributes,
+ &VariableSize,
+ &IccPersistentData
+ );
+ if (EFI_ERROR (Status)) {
+ IccPersistentData.ClocksModified = ICC_SETTINGS_NOT_MODIFIED;
+ }
+
+ IccConfig->ClocksModified = IccPersistentData.ClocksModified;
+
+ IccConfig->SelectedIccProfile = SetupData.IccSelectedProfile;
+
+ if ( ReadIccSoftStraps () != PROFILE_SELECTED_BY_BIOS ) {
+ IccConfig->ProfileSelection = OPTION_DISABLED;
+ } else {
+ IccConfig->ProfileSelection = OPTION_ENABLED;
+ }
+
+ IccConfig->LockIccRegisters = OPTION_ENABLED;
+
+ //
+ // in LockMask, 0 means lock and 1 means don't lock this particular register
+ //
+ if (SetupData.IccLockRegisters == OPTION_LOCK_STATIC) {
+ IccConfig->LockMask[2] = STATIC_REGISTERS_MASK2;
+ IccConfig->LockMask[1] = STATIC_REGISTERS_MASK1;
+ IccConfig->LockMask[0] = STATIC_REGISTERS_MASK0;
+ } else {
+ IccConfig->LockMask[2] = 0;
+ IccConfig->LockMask[1] = 0;
+ IccConfig->LockMask[0] = 0;
+ }
+
+ if (SetupData.IccSetClockEnables == OPTION_ENABLED) {
+ IccConfig->SetClkEnables = OPTION_ENABLED;
+ } else {
+ IccConfig->SetClkEnables = OPTION_DISABLED;
+ }
+
+ if (IccConfig->ProfileSelection != SetupData.IccDisplayProfile) {
+ SetupData.IccDisplayProfile = IccConfig->ProfileSelection;
+ Status = gRT->SetVariable(
+ L"Setup",
+ &SetupGuid,
+ SetupVarAttr,
+ sizeof(SETUP_DATA),
+ &SetupData );
+ }
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+ProfileSelection (
+ IN UINT8 NewProfile
+ )
+/*++
+Routine Description:
+ Chooses ICC clock profile to be used by platform for future boots.
+Arguments:
+ NewProfile - requested clock profile
+Returns:
+ nothing (and the platform reboots) if profile was changed
+ EFI_SUCCESS if there was no need to change profile
+ other result if HECI communication failed
+--*/
+{
+ EFI_STATUS Status;
+ UINT8 OldProfile;
+
+ Status = HeciGetIccProfile (&OldProfile);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "(ICC) Failed to read clock profile, status = %r.\n", Status));
+ return Status;
+ }
+
+ if (NewProfile != OldProfile) {
+ Status = HeciSetIccProfile (NewProfile);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "(ICC) Failed to change clock profile, status = %r.\n", Status));
+ return Status;
+ }
+
+ DEBUG ((EFI_D_INFO, "(ICC) Clock Profile was changed, rebooting platform.\n"));
+ Status = HeciSendCbmResetRequest(CBM_RR_REQ_ORIGIN_BIOS_POST, CBM_HRR_GLOBAL_RESET);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "(ICC) Failed to trigger reset, status = %r.\n", Status));
+ return Status;
+ }
+
+ EFI_DEADLOOP();
+ }
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+WaitForFwInitComplete (
+ UINT32 mSeconds
+)
+/*++
+Routine Description:
+ waits for Fw init complete - safety measure to prevent sending Heci messages
+ while FW can't receive them.
+Arguments:
+ mSeconds - limit for wait time, in miliseconds
+Returns:
+ EFI_SUCCESS if Fw init is complete
+ EFI_TIMEOUT if init is still not complete after allocated time
+ other errors when something's wrong with Heci protocol
+--*/
+{
+ EFI_HECI_PROTOCOL *Heci;
+ UINT32 MeStatus;
+ UINT32 MeMode;
+ UINT32 RetryCount;
+ EFI_STATUS Status;
+
+ RetryCount = 0;
+
+ Status = gBS->LocateProtocol (
+ &gEfiHeciProtocolGuid,
+ NULL,
+ &Heci
+ );
+
+ if (EFI_ERROR(Status)) {
+ DEBUG ((EFI_D_ERROR, "(ICC) Failed to locate Heci protocol! Status = %r\n", Status));
+ return Status;
+ }
+
+ Status = Heci->GetMeMode (&MeMode);
+ if (EFI_ERROR (Status) || (MeMode != ME_MODE_NORMAL)) {
+ return EFI_UNSUPPORTED;
+ }
+
+ PERF_START (0, L"Icc waiting for FwInitComplete", NULL, 0) ;
+ while (1) {
+ Heci->GetMeStatus (&MeStatus);
+ if (ME_STATUS_IS_ME_FW_INIT_COMPLETE (MeStatus)) {
+ PERF_END (0, L"Icc waiting for FwInitComplete", NULL, 0) ;
+ DEBUG ((EFI_D_INFO, "(ICC) Waited %d ms for FwInitComplete.\n", RetryCount));
+ return EFI_SUCCESS;
+ }
+ if (RetryCount > mSeconds) {
+ PERF_END (0, L"Icc waiting for FwInitComplete", NULL, 0) ;
+ DEBUG ((EFI_D_ERROR, "(ICC) Time out! Waited %d ms for FwInitComplete.\n", RetryCount));
+ return EFI_TIMEOUT;
+ }
+ RetryCount++;
+ gBS->Stall (1000);//1ms
+ }
+}
+
+EFI_STATUS
+SendIccMessages (
+IN EFI_EVENT Event,
+IN VOID *Context
+)
+/*++
+Routine Description:
+ Sends SetClockEnables and LockRegisters Icc Heci messages
+Arguments:
+ none
+Returns:
+ nothing
+--*/
+{
+ EFI_STATUS Status;
+ UINT8 ResponseMode = 1, AccessMode = 0;/*0 - set, 1 - get*/
+ ICC_LOCK_REGS_INFO IccLockRegs;
+ EFI_GUID SetupGuid = SETUP_GUID;
+ SETUP_DATA SetupData;
+ UINTN VariableSize;
+
+ DEBUG ((EFI_D_INFO, "(ICC) Send Icc Heci Messages\n"));
+
+ if (mIccConfig.ProfileSelection != OPTION_DISABLED) {
+ ProfileSelection(mIccConfig.SelectedIccProfile);
+ };
+
+ VariableSize = sizeof (SETUP_DATA);
+ Status = gRT->GetVariable (
+ L"Setup",
+ &SetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData);
+
+ ASSERT_EFI_ERROR (Status);
+
+ if (mIccConfig.SetClkEnables == OPTION_ENABLED) {
+ DetectUsedClocks (&mIccConfig.ClkEnables,
+ &mIccConfig.ClkEnablesMask
+ );
+
+ Status = HeciSetIccClockEnables (mIccConfig.ClkEnables,
+ mIccConfig.ClkEnablesMask,
+ ResponseMode
+ );
+ }
+
+ if(mBIOSPayLoad)
+ {
+ gBS->CopyMem(&(IccLockRegs.RegBundles),
+ &(mBIOSPayLoad->MeBiosPayload.IccProfile.IccLockRegInfo.RegBundles),
+ sizeof(ICC_REG_BUNDLES));
+
+ gBS->CopyMem((IccLockRegs.RegMask),
+ (mBIOSPayLoad->MeBiosPayload.IccProfile.IccLockRegInfo.RegMask),
+ sizeof(UINT32) * IccLockRegs.RegBundles.BundlesCnt);
+
+ VariableSize = sizeof(UINT32) * 3;
+ Status = gRT->GetVariable(
+ L"IccLockDefault",
+ &SetupGuid,
+ NULL,
+ &VariableSize,
+ IccLockRegs.RegMask );
+ if( Status == EFI_NOT_FOUND )
+ {
+ Status = gRT->SetVariable(
+ L"IccLockDefault",
+ &SetupGuid,
+ EFI_VARIABLE_NON_VOLATILE |
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ VariableSize,
+ IccLockRegs.RegMask );
+ }
+ if(SetupData.IccLockRegisters == 3)
+ {
+ IccLockRegs.RegBundles.AU = 0;
+ IccLockRegs.RegBundles.BundlesCnt = 3;
+ }
+
+ if(SetupData.IccLockRegisters == 4)
+ {
+ IccLockRegs.RegBundles.BundlesCnt = 0;
+ IccLockRegs.RegBundles.AU = 0;
+ }
+
+ if(SetupData.IccLockRegisters == 5)
+ {
+ IccLockRegs.RegBundles.BundlesCnt = 0;
+ IccLockRegs.RegBundles.AU = 1;
+ }
+
+ Status = HeciLockIccRegisters (AccessMode, ResponseMode, &IccLockRegs);
+
+ }
+
+ return EFI_SUCCESS;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.cif b/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.cif
new file mode 100644
index 0000000..7677f59
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "IccPlatform"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\Icc\IccPlatform"
+ RefName = "IccPlatform"
+[files]
+"IccPlatform.sdl"
+"IccPlatform.dxs"
+"IccPlatform.mak"
+"IccPlatform.c"
+"IccPlatform.h"
+<endComponent> \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.dxs b/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.dxs
new file mode 100644
index 0000000..a2912b9
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.dxs
@@ -0,0 +1,116 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccPlatform/IccPlatform.dxs 2 5/13/13 2:41a Klzhan $
+//
+// $Revision: 2 $
+//
+// $Date: 5/13/13 2:41a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccPlatform/IccPlatform.dxs $
+//
+// 2 5/13/13 2:41a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Fix build error when Icc_OverClocking_support is
+// disabled
+//
+// 1 2/08/12 1:06a Klzhan
+// Initial Check in
+//
+// 2 6/27/11 8:39a Klzhan
+// Support New XTU protocol.
+//
+// 1 2/25/11 1:42a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: IccPlatform.dxs
+//
+// Description: Platform-specific ICC code
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ IccPlatform.dxs
+
+Abstract:
+
+ Platform-specific ICC code
+
+--*/
+#include "Token.h"
+#include "AutoGen.h"
+#include "DxeDepex.h"
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+#endif
+#include EFI_PROTOCOL_DEPENDENCY (PciRootBridgeIo)
+#include EFI_PROTOCOL_DEPENDENCY (Wdt)
+#include EFI_PROTOCOL_DEPENDENCY (PchInfo)
+#include "Protocol\IccOverClocking\IccOverClocking.h"
+#if defined PERF_TUNE_SUPPORT && PERF_TUNE_SUPPORT == 1
+
+#define PERF_TUNE_ASL_PROTOCOL_GUID \
+ {0x32519f22, 0x3eb, 0x47b6, 0xb3, 0xef, 0xdb, 0x93, 0x98, 0xd6, 0x4e, 0x45}
+#endif
+
+DEPENDENCY_START
+#if defined PERF_TUNE_SUPPORT && PERF_TUNE_SUPPORT == 1
+ PERF_TUNE_ASL_PROTOCOL_GUID AND
+#endif
+#if IccOverClocking_SUPPORT
+ ICC_OVERCLOCKING_PROTOCOL_GUID AND
+#endif
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID AND
+ WDT_PROTOCOL_GUID AND
+ EFI_PCH_INFO_PROTOCOL_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.h b/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.h
new file mode 100644
index 0000000..fb4bda4
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.h
@@ -0,0 +1,260 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccPlatform/IccPlatform.h 1 2/08/12 1:06a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:06a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccPlatform/IccPlatform.h $
+//
+// 1 2/08/12 1:06a Klzhan
+// Initial Check in
+//
+// 4 7/27/11 3:21a Klzhan
+// Add Elinks for PCIE and PCI config.
+// Note: Don't List GBE port on this Elink.
+//
+// 3 7/15/11 12:45a Klzhan
+//
+// 2 6/27/11 8:38a Klzhan
+// Remove un-use define.
+//
+// 1 2/25/11 1:42a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: IccPlatform.h
+//
+// Description: Platform-specific ICC code
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+/*++
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ IccPlatform.h
+
+Abstract:
+
+ Platform-specific ICC code
+
+--*/
+
+#ifdef CougarPoint_SUPPORT
+#define SOFTSTRAP10 R_PCH_SPI_STRP10
+#else
+#define SOFTSTRAP10 R_PCH_SPI_PCHSTRP10
+#endif
+
+#define ICC_INIT_TIMEOUT 5000 // ms
+
+#define RETAIN_CLOCK_ENABLES_AT_RESUME_FROM_S3 0x1
+#define CLOCK_PROFILE_SELECTOR BIT22
+
+#define PROFILE_SELECTED_BY_BIOS 0
+#define PROFILE_SELECTED_BY_ME 1
+
+//
+// 96-bit mask of registers to be locked by LockIccRegister heci message
+// 0 = lock, 1 = don't
+// see CPT c-spec for register names
+//
+#define STATIC_REGISTERS_MASK2 0x00000000
+#define STATIC_REGISTERS_MASK1 0x0F0f0013
+#define STATIC_REGISTERS_MASK0 0x00000000
+
+#define OPTION_DISABLED 0
+#define OPTION_ENABLED 1
+#define OPTION_MANUAL 2
+#define OPTION_AUTO 3
+#define OPTION_LOCK_STATIC 4
+#define OPTION_LOCK_ALL 5
+#define OPTION_USE_OEM 6
+#define OPTION_OVERRIDE 7
+//
+// OCLKEN (ICC clock enables) register bit definitions
+//
+#define CLOCK_Flex0 BIT0
+#define CLOCK_Flex1 BIT1
+#define CLOCK_Flex2 BIT2
+#define CLOCK_Flex3 BIT3
+#define CLOCK_PCI_Clock0 BIT7
+#define CLOCK_PCI_Clock1 BIT8
+#define CLOCK_PCI_Clock2 BIT9
+#define CLOCK_PCI_Clock3 BIT10
+#define CLOCK_PCI_Clock4 BIT11
+#define CLOCK_SRC0 BIT16
+#define CLOCK_SRC1 BIT17
+#define CLOCK_SRC2 BIT18
+#define CLOCK_SRC3 BIT19
+#define CLOCK_SRC4 BIT20
+#define CLOCK_SRC5 BIT21
+#define CLOCK_SRC6 BIT22
+#define CLOCK_SRC7 BIT23
+#define CLOCK_CSI_SRC8 BIT24
+#define CLOCK_CSI_DP BIT25
+#define CLOCK_PEG_A BIT26
+#define CLOCK_PEG_B BIT27
+#define CLOCK_DMI BIT28
+
+#define BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID \
+ {0xdbc9fd21, 0xfad8, 0x45b0, 0x9e, 0x78, 0x27, 0x15, 0x88, 0x67, 0xcc, 0x93}
+
+typedef struct {
+ UINT32 Clock;
+ UINT8 DeviceNumber;
+ BOOLEAN HotPlugSupport;
+} PLATFORM_PCI_SLOTS;
+
+typedef struct {
+ UINT32 Clock;
+ UINT8 RootPortNumber;
+ BOOLEAN HotPlugSupport;
+} PLATFORM_PCIE_SLOTS;
+
+typedef struct _ICC_CONFIG {
+ UINT8 LockIccRegisters;
+ UINT8 SetClkEnables;
+ UINT8 ProfileSelection;
+ UINT8 SelectedIccProfile;
+ UINT32 LockMask[3];
+ UINT32 ClkEnables;
+ UINT32 ClkEnablesMask;
+ UINT8 ClocksModified;
+} ICC_CONFIG;
+
+VOID
+DisableProfileSelection (
+ VOID
+ );
+
+EFI_STATUS
+ProfileSelection (
+ IN UINT8 NewProfile
+ );
+
+EFI_STATUS
+DetectUsedClocks (
+ OUT UINT32 *UsedClocks,
+ OUT UINT32 *AllClocks
+ );
+
+EFI_STATUS
+CallSetClockEnables (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ );
+
+EFI_STATUS
+ReadMainSetupData (
+ ICC_CONFIG* IccConfig
+ );
+
+UINT8
+ReadIccSoftStraps (
+ VOID
+ );
+
+EFI_STATUS
+WaitForFwInitComplete (
+ UINT32 uSeconds
+ );
+
+EFI_STATUS
+IccFailureNotification (
+ VOID
+ );
+
+EFI_STATUS
+SendIccMessages (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ );
+
+EFI_STATUS
+IccMessages (
+ VOID
+ );
+
+#ifdef CougarPoint_SUPPORT
+
+EFI_STATUS
+WdtSupport (
+ VOID
+ );
+
+EFI_STATUS
+FeedWatchdog (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ );
+
+EFI_STATUS
+StopFeedingWatchdog (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ );
+
+#endif;
+
+#if defined PERF_TUNE_SUPPORT && PERF_TUNE_SUPPORT == 1
+typedef struct _ACPI_HDR {
+ UINT32 Signature;
+ UINT32 Length;
+ UINT8 Revision;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 OemTblId[8];
+ UINT32 OemRev;
+ UINT32 CreatorId;
+ UINT32 CreatorRev;
+} ACPI_HDR,*PACPI_HDR;
+#endif;
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.mak b/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.mak
new file mode 100644
index 0000000..71bca92
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.mak
@@ -0,0 +1,171 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccPlatform/IccPlatform.mak 5 9/27/12 6:23a Klzhan $
+#
+# $Revision: 5 $
+#
+# $Date: 9/27/12 6:23a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccPlatform/IccPlatform.mak $
+#
+# 5 9/27/12 6:23a Klzhan
+# Fix build error
+#
+# 4 9/19/12 5:54a Klzhan
+# 1. Fix Build Error when Performance is on(IccPlatform.mak).
+# 2. Avoid time-out in ICC setup Page when return from Shell.
+# 3. Remove un-used wait for Fw Init Done.
+#
+# 3 4/24/12 12:28a Klzhan
+#
+# 2 2/23/12 8:57a Klzhan
+# Support New EDK
+#
+# 1 2/08/12 1:06a Klzhan
+# Initial Check in
+#
+# 4 9/06/11 6:38a Klzhan
+# Remove __EDKII_GLUE_EDK_DXE_RUNTIME_DRIVER_LIB__
+#
+# 3 7/27/11 3:21a Klzhan
+# Add Elinks for PCIE and PCI config.
+# Note: Don't List GBE port on this Elink.
+#
+# 2 7/15/11 12:45a Klzhan
+#
+# 1 2/25/11 1:42a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:10a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name: IccPlatform.mak
+#
+# Description: MakFile for Platform-specific ICC code
+#
+#----------------------------------------------------------------------------
+#<AMI_FHDR_END>
+all : IccPlatform
+
+$(BUILD_DIR)\IccPlatform.mak : $(IccPlatform_DIR)\$(@B).cif $(BUILD_RULES)
+ $(CIF2MAK) $(IccPlatform_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+IccPlatform : $(BUILD_DIR)\IccPlatform.mak IccPlatform_Bin
+
+IccPlatform_INCLUDES=\
+ $(EDK_INCLUDES)\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(ME_INCLUDES)\
+ $(MISCFRAMEWORK_INCLUDES)\
+ $(INTEL_MCH_INCLUDES)\
+ $(NB_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+ $(ICC_INCLUDES)\
+ /I$(PROJECT_DIR)\
+ /IInclude\
+
+IccPlatform_LIBS=\
+ $(EDKPROTOCOLLIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+ $(EFISCRIPTLIB)\
+ $(EFIGUIDLIB)\
+ $(MeProtocolLib_LIB)\
+ $(MeLibDxe_LIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+ $(EdkIIGlueBasePrintLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EdkIIGlueBaseMemoryLib_LIB)\
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueEdkDxeRuntimeDriverLib_LIB)\
+ $(EdkIIGluePeiDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueUefiBootServicesTableLib_LIB)\
+ $(EdkIIGlueUefiLib_LIB)\
+ $(EdkIIGlueDxeMemoryAllocationLib_LIB)\
+ $(EdkIIGlueDxeServicesTableLib_LIB)\
+ $(EdkIIGlueBasePciCf8Lib_LIB)\
+ $(EFIDRIVERLIB)\
+ $(INTEL_PCH_PROTOCOL_LIB)\
+
+DxeCpuBuildDefine = \
+!IF "$(x64_BUILD)"=="1"
+ /DMDE_CPU_X64\
+!ELSE
+ /DMDE_CPU_IA32\
+!ENDIF
+
+IccPlatform_DEFINES=\
+ $(MY_DEFINES)\
+ $(DxeCpuBuildDefine)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=IccPlatformEntryPoint"\
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_PEI_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\
+
+ICC_ELINKS = \
+/D\"OEM_CLOCK_UPDATE_FUNC=$(OEMClockUpdateFunc)\"\
+!IF "$(OEMPCIEClockConfig)" == ""
+/D\"PCIE_CLOCK_CONFIG=$(PCIEClockConfig)\"\
+!ELSE
+/D\"PCIE_CLOCK_CONFIG=$(OEMPCIEClockConfig)\"\
+!ENDIF
+!IF "$(OEMPCIClockConfig)" == ""
+/D\"PCI_CLOCK_CONFIG=$(PCIClockConfig)\"
+!ELSE
+/D\"PCI_CLOCK_CONFIG=$(OEMPCIClockConfig)\"
+!ENDIF
+
+
+IccPlatform_Bin : $(IccPlatform_LIBS) $(OemClock_LIB)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\IccPlatform.mak all\
+ "MY_INCLUDES=$(IccPlatform_INCLUDES)"\
+ "MY_DEFINES=$(IccPlatform_DEFINES)"\
+ "CFLAGS=$(CFLAGS) $(ICC_ELINKS)" \
+ GUID=14257B56-BDA2-4faf-8E4F-C885DF75583C\
+ ENTRY_POINT=_ModuleEntryPoint \
+ EDKIIModule=DXEDRIVER\
+ TYPE=BS_DRIVER \
+ DEPEX1=$(IccPlatform_DIR)\IccPlatform.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ COMPRESS=1\
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.sdl b/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.sdl
new file mode 100644
index 0000000..0bb0e9a
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccPlatform/IccPlatform.sdl
@@ -0,0 +1,67 @@
+TOKEN
+ Name = "IccPlatform_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Help = "Main switch to enable ICC support in Project in DXE Phase"
+End
+
+MODULE
+ Help = "Includes IccPlatform.mak to Project"
+ File = "IccPlatform.mak"
+End
+
+PATH
+ Name = "IccPlatform_DIR"
+ Help = "Icc platform dir"
+End
+
+ELINK
+ Name = "/I$(IccPlatform_DIR)"
+ Parent = "ICC_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\IccPlatform.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "PCIEClockConfig"
+ InvokeOrder = ReplaceParent
+ Help = "This Elink for Disable un-used PCIE port. Format is {Clock, PCIE_PORT_NUMBER, HotPlug)"
+End
+
+ELINK
+ Name = "PCIClockConfig"
+ InvokeOrder = ReplaceParent
+ Help = "This Elink for Disable un-used PCI port. Format is {Clock, PCIE_PORT_NUMBER, HotPlug)"
+End
+
+ELINK
+ Name = "OEMPCIEClockConfig"
+ InvokeOrder = ReplaceParent
+ Help = "This Elink for Disable un-used PCIE port. Format is {Clock, PCIE_PORT_NUMBER, HotPlug)"
+End
+
+ELINK
+ Name = "OEMPCIClockConfig"
+ InvokeOrder = ReplaceParent
+ Help = "This Elink for Disable un-used PCI port. Format is {Clock, PCIE_PORT_NUMBER, HotPlug)"
+End
+
+ELINK
+ Name = "OEMClockUpdateFunc"
+ InvokeOrder = ReplaceParent
+ Help = "This Elink for Disable un-used PCI port. Format is {Clock, PCIE_PORT_NUMBER, HotPlug)"
+End
+
+ELINK
+ Name = "OemClock_LIB"
+ InvokeOrder = ReplaceParent
+End
diff --git a/Board/EM/MeWrapper/Icc/IccSetup/IccCallbacks.c b/Board/EM/MeWrapper/Icc/IccSetup/IccCallbacks.c
new file mode 100644
index 0000000..8dcd104
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccSetup/IccCallbacks.c
@@ -0,0 +1,1272 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccSetup/IccCallbacks.c 11 5/14/14 9:57p Tristinchou $
+//
+// $Revision: 11 $
+//
+// $Date: 5/14/14 9:57p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccSetup/IccCallbacks.c $
+//
+// 11 5/14/14 9:57p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 10 8/09/13 2:17a Klzhan
+// [TAG] EIP131037
+// [Category] Improvement
+// [Description] Skip Using Icc Protocol after End of Post.
+//
+// 9 5/13/13 2:42a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] FIx build error when Icc_OverClocking_Support is
+// disabled.
+//
+// 8 12/27/12 6:36a Klzhan
+// [TAG] EIP104882
+// [Category] Improvement
+// [Description] Avoid running ICC callbacks when Load Default.
+//
+// 7 10/30/12 8:37a Klzhan
+// Support DMI Ratio for new ICC.
+//
+// 6 9/19/12 5:58a Klzhan
+// Avoid time-out in ICC setup Page when return from Shell.
+//
+// 5 7/02/12 11:43p Klzhan
+// [TAG] EIP94113
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC0.6
+//
+// 4 5/14/12 5:29a Klzhan
+// Remove Debug code
+//
+// 3 5/14/12 4:47a Klzhan
+// [TAG] EIP89676
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Support New ICC library
+// [Files] IccSetup.mak
+// IccSetup.sdl
+// IccCallbacks.c
+// IccCallbacks.h
+// IccSetup.h
+// IccSetupMenu.sd
+// IccSetupSubmenu.sd
+// IccStrings.uni
+// IccLoadDefault.c
+// IccSetup.cif
+//
+// 2 4/24/12 12:30a Klzhan
+// Update modulepart to latest
+//
+// 1 2/08/12 1:07a Klzhan
+// Initial Check in
+//
+// 6 9/06/11 6:11a Klzhan
+// [TAG] EIP67462
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ICC 08.00.00.022.1
+// [Files] IccSetup.mak
+// IccSetup.sdl
+// IccCallbacks.c
+// IccCallbacks.h
+// IccSetup.h
+// IccSetupMenu.sd
+// IccSetupSubmenu.sd
+// IccStrings.uni
+// IccLoadDefault.c
+// IccSetup.cif
+//
+// 5 7/26/11 5:58a Klzhan
+// Support EFI 2.3
+//
+// 4 6/27/11 3:22a Klzhan
+// Correct SscMode when Set frequency.
+//
+// 3 6/24/11 7:20a Klzhan
+// Remove un-use debug message.
+//
+// 2 6/23/11 11:31p Klzhan
+// [TAG] EIP62129
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Support ICC Control Library 8.0.0.19.
+// [Files] IccCallbacks.c, IccCallbacks.h
+//
+// 1 2/25/11 1:42a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: IccCallbacks.c
+//
+// Description: Setup hooks for ICC.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ IccCallbacks.c
+
+Abstract:
+
+ Setup hooks for ICC.
+
+--*/
+
+#include <AmiDxeLib.h>
+#include <Setup.h>
+#include <SetupStrTokens.h>
+#include "AUTOID.h"
+#include "Protocol\AMIPostMgr.h"
+#include "Protocol\IccOverClocking\IccOverClocking.h"
+#include "IccSetup.h"
+#include "IccCallbacks.h"
+#include "PchAccess.h"
+#ifdef CougarPoint_SUPPORT
+#include "Protocol\Wdt\Wdt.h"
+#include "Protocol\WdtApp\WdtApp.h"
+#endif
+#include "Protocol\MePlatformPolicy\MePlatformPolicy.h"
+
+UINT8 mActiveSubmenu = ICC_CLOCK_COUNT;
+ICC_OVERCLOCKING_PROTOCOL* gIccOverClockingProtocol;
+ICC_CLOCK_RANGES mRanges[ICC_CLOCK_COUNT];
+CLOCK_DISPLAY_VALUES values; // Store clock Infomations of current page.
+UINT16 mBootTimeClkDiv[ICC_CLOCK_COUNT];
+UINT8 mWatchdogEnabled;
+
+CHAR16* mClockUsageName[] = {
+ L"BCLK",
+ L"DMI",
+ L"PEG",
+ L"PCIe",
+ L"PCI33",
+ L"RESERVED",
+ L"SATA",
+ L"USB3",
+ L"IGD",
+ L"IGD Bending",
+ L"RESERVED",
+ L"GFX",
+ L"USB Legacy",
+ L"PCH Legacy"
+};
+
+CHAR16* mClockName[] = {
+ L"Clock1",
+ L"Clock2",
+ L"Clock3",
+ L"Clock4",
+ L"Clock5",
+ L"Clock6",
+ L"Clock7",
+ L"Clock8"
+};
+
+CHAR16* mClockUsageNone = L"Not used";
+
+UINT16* mModeName[] = {
+ L"Down",
+ L"Center",
+ L"Up",
+ L"None"
+};
+
+EFI_HII_HANDLE gHiiHandle;
+//
+// Blocks entry to ICC clock submenus after End Of Post event
+//
+UINT8 mAfterEndOfPost = 0;
+
+#define NAME_ARRAY_SIZE (( sizeof(mClockUsageName)/sizeof(mClockUsageName[0]) ))
+
+#if (SUPPORTED_CLOCKS != ICC_CLOCK_COUNT)
+#error Ambiguous number of supported clocks
+#endif
+
+#ifndef StrCat
+#define StrCat(a,b) Wcscpy (a + Wcslen (a), b)
+#endif
+
+#define AMI_CALLBACK_CONTROL_UPDATE 1
+#define AMI_CALLBACK_RETRIEVE 2
+#define AMI_CALLBACK_FORM_OPEN 3
+#define AMI_CALLBACK_FORM_CLOSE 4
+#define AMI_CALLBACK_FORM_DEFAULT_STANDARD 0x1000
+#define AMI_CALLBACK_FORM_DEFAULT_MANUFACTURING 0x1001
+
+EFI_STATUS
+OnReadyToBoot (
+IN EFI_EVENT Event,
+IN VOID *Context
+)
+/*++
+Routine Description:
+
+ This function is executed on ReadyToBoot event.
+ If permanent or temporary ICC modifications were made, platform needs to be restarted.
+ Unlike ordinary setup options, ICC modifications can't be programmed to cause automatic reset.
+ Instead this function, executed on ReadyToBoot event, causes reset.
+
+Arguments:
+ Event pointer to event that caused this function to be executed
+ Context not used here
+
+Returns:
+ always SUCCESS
+--*/
+{
+ mAfterEndOfPost = 1;
+ pBS->CloseEvent(Event);
+ if (GetIccPersistentData() == ICC_SETTINGS_RECENTLY_MODIFIED) {
+ pRS->ResetSystem(EfiResetCold, 0, 0, 0);
+ } else if (GetIccPersistentData() == ICC_SETTINGS_PREVIOUSLY_MODIFIED) {
+ SetIccPersistentData(ICC_SETTINGS_NOT_MODIFIED);
+ }
+ return EFI_SUCCESS;
+}
+
+VOID
+InitICCStrings (
+ EFI_HII_HANDLE HiiHandle,
+ UINT16 Class
+ )
+/*++
+Routine Description:
+
+ This function is executed when Setup module loads.
+ Registers OnReadyToBoot function to be executed on ReadyToBoot event.
+ Remembers HiiHandle, pointer to setup browser's runtime variable store
+
+Arguments:
+ HiiHandle
+ Class
+
+Returns:
+ always SUCCESS
+--*/
+{
+ static UINT8 mInitStringComplete = 0;
+ EFI_EVENT Event;
+ EFI_GUID EfiEventReadyToBootGuid = EFI_EVENT_GROUP_READY_TO_BOOT;
+
+ if (mInitStringComplete == 1) {
+ return;
+ } else {
+ if(Class == ADVANCED_FORM_SET_CLASS) {
+ mInitStringComplete = 1;
+ gHiiHandle = HiiHandle;
+
+ if (GetIccPersistentData() == ICC_SETTINGS_RECENTLY_MODIFIED) {
+ SetIccPersistentData(ICC_SETTINGS_PREVIOUSLY_MODIFIED);
+ }
+
+#if (EFI_SPECIFICATION_VERSION < 0x00020000)
+ pBS->CreateEvent (
+ EFI_EVENT_SIGNAL_READY_TO_BOOT | EFI_EVENT_NOTIFY_SIGNAL_ALL,
+ TPL_CALLBACK,
+ OnReadyToBoot,
+ NULL,
+ &Event
+ );
+#else
+ pBS->CreateEventEx (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ OnReadyToBoot,
+ NULL,
+ &EfiEventReadyToBootGuid,
+ &Event
+ );
+#endif
+
+ }
+ }
+}
+
+EFI_STATUS
+InitIccMenu (
+ IN ICC_VOLATILE_SETUP_DATA* IccSetupData
+ )
+/*++
+Routine Description:
+ Initializes text strings and setup variables connected with ICC menu.
+ If there is an error during initialization, displays messagebox with error details
+Arguments:
+ Pointer to Icc setup data structure
+Returns:
+ EFI_SUCCESS if everything went OK
+ otherwise, an ERROR
+--*/
+{
+ UINTN VariableSize;
+ UINT8 i;
+ EFI_STATUS Status;
+#if IccOverClocking_SUPPORT
+ ICC_LIB_STATUS IccStatus;
+#endif
+ ICC_LIB_VERSION Version;
+ SETUP_DATA SetupData;
+ EFI_GUID IccOverClockingProtocolGuid = ICC_OVERCLOCKING_PROTOCOL_GUID;
+ EFI_GUID IccSetupDataGuid = ICC_VOLATILE_SETUP_DATA_GUID;
+ EFI_GUID SetupGuid = SETUP_GUID;
+ CALLBACK_PARAMETERS *CallbackParameter = GetCallbackParameters();
+
+#if EFI_SPECIFICATION_VERSION >= 0x2001E
+ if ((CallbackParameter->Action == AMI_CALLBACK_RETRIEVE) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_OPEN) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_CLOSE) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_DEFAULT_STANDARD) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_DEFAULT_MANUFACTURING))
+ return EFI_SUCCESS;
+#endif
+
+ VariableSize = sizeof (SETUP_DATA);
+
+ Status = pRS->GetVariable (
+ L"Setup",
+ &SetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ VariableSize = sizeof(UINT8);
+ Status = pRS->GetVariable (
+ L"AfterReadyToBoot",
+ &IccSetupDataGuid,
+ NULL,
+ &VariableSize,
+ &mAfterEndOfPost);
+#if IccOverClocking_SUPPORT
+ Status = pBS->LocateProtocol(&IccOverClockingProtocolGuid, NULL, &gIccOverClockingProtocol);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ VariableSize = sizeof (UINTN);
+ mWatchdogEnabled = SetupData.IccWdtEnabled;
+
+ IccStatus = IccInitOverclocking(&Version);
+
+ if ( IccStatus != ICC_LIB_STATUS_SUCCESS ) {
+ MessageBox ( MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_INIT_ERROR_STRANGE), IccStatus);
+ IccSetupData->AllowAdvancedOptions = 0;
+ return EFI_DEVICE_ERROR;
+ }
+#else
+ return EFI_SUCCESS;
+#endif
+ // If init success, Set allowadvancedOption true
+// IccSetupData->AllowAdvancedOptions = 1;
+
+ InitString(
+ gHiiHandle,
+ STRING_TOKEN(STR_ICC_LIB_VERSION_NR),
+ L"%d.%d.%d.%d",
+ Version.Major,
+ Version.Minor,
+ Version.Hotfix,
+ Version.Build
+ );
+ if(mAfterEndOfPost != 1)
+ {
+ IccSetupData->AllowAdvancedOptions = 1;
+ for (i=0; i<ICC_CLOCK_COUNT; i++) {
+ IccGetFrequencies(i, &values);
+ IccSetupData->Frequency[i] = values.ClkFreqCurrent;
+ IccSetupData->SscPercent[i] = values.SscPercentCurrent;
+ IccSetupData->SscMode[i] = values.SscModeCurrent;
+ // Workaround for architecture bugs: read - don't modify - write sequence doesn't work for some clocks
+ // These clocks must not be allowed to be modified - they'll cause ICC Lib to return misleading errors
+ if (/* (values.ClockUsage & (1<<ICC_CLOCK_USAGE_GFX)) ||
+ (values.ClockUsage & (1<<ICC_CLOCK_USAGE_GFX_BENDING)) ||*/
+ (values.ClockUsage == 0)
+ ) {
+ IccSetupData->ShowSsc[i] = 0;
+ IccSetupData->ShowClock[i] = 0;
+ } else {
+ IccSetupData->ShowSsc[i] = values.SscChangeAllowed;
+ if (values.ClkFreqMax == values.ClkFreqMin) {
+ IccSetupData->ShowClock[i] = 0;
+ } else {
+ IccSetupData->ShowClock[i] = 1;
+ }
+ }
+ }
+ }else
+ IccSetupData->AllowAdvancedOptions = 0;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+IccMenuEntry (
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class,
+ IN UINT16 SubClass,
+ IN UINT16 Key
+)
+/*++
+Routine Description:
+ Setup callback executed when user enters Advanced->ICC menu
+ Think of it as an entry point to efi overclocking module
+ Initializes ICC OverClocking and if there are errors, disables entry into submenus
+ Without access to submenus, it is guaranteed no other callback will be executed.
+Arguments:
+Returns:
+ always SUCCESS, but in case of errors entry into submenus is disabled
+--*/
+{
+ static UINT8 FirstEntry = 1;
+ static UINT8 EopReported = 0;
+ ICC_VOLATILE_SETUP_DATA* IccSetupData = NULL;
+ EFI_STATUS Status;
+ EFI_GUID IccSetupDataGuid = ICC_VOLATILE_SETUP_DATA_GUID;
+ UINTN SelectionBufferSize = sizeof(ICC_VOLATILE_SETUP_DATA);
+ CALLBACK_PARAMETERS *CallbackParameter = GetCallbackParameters();
+ EFI_GUID DxePlatformMePolicyGuid = DXE_PLATFORM_ME_POLICY_GUID;
+ DXE_ME_POLICY_PROTOCOL *DxePlatformMePolicy;
+
+#if EFI_SPECIFICATION_VERSION >= 0x2001E
+ if ((CallbackParameter->Action == AMI_CALLBACK_RETRIEVE) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_OPEN) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_CLOSE) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_DEFAULT_STANDARD) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_DEFAULT_MANUFACTURING))
+ return EFI_SUCCESS;
+#endif
+
+ if(mAfterEndOfPost == 0) {
+ Status = pBS->LocateProtocol(&DxePlatformMePolicyGuid, NULL, &DxePlatformMePolicy);
+ if(!EFI_ERROR (Status)) {
+ if(DxePlatformMePolicy->MeConfig.EndOfPostDone) {
+ mAfterEndOfPost = 1;
+ }
+ }
+ }
+ //
+ // No changes to ICC menu display
+ //
+ if (EopReported == 1 || (FirstEntry ==0 && mAfterEndOfPost == 0)) {
+ return EFI_SUCCESS;
+ }
+
+ FirstEntry = 0;
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+ Status = pBS->AllocatePool(EfiBootServicesData, SelectionBufferSize, &IccSetupData);
+ if(EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ Status = HiiLibGetBrowserData(&SelectionBufferSize,
+ IccSetupData,
+ &IccSetupDataGuid,
+ ICC_VOLATILE_SETUP_DATA_C_NAME
+ );
+ ASSERT_EFI_ERROR(Status);
+
+#else
+ IccSetupData = (ICC_VOLATILE_SETUP_DATA*)CallbackParameter->Data->NvRamMap;
+#endif
+
+ if (mAfterEndOfPost == 1 && EopReported == 0) {
+ IccSetupData->AllowAdvancedOptions = 0;
+ EopReported = 1;
+ MessageBox ( MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_AFTER_EOP));
+ } else {
+ Status = InitIccMenu(IccSetupData);
+ if (EFI_ERROR(Status)) {
+// IccSetupData->AllowAdvancedOptions = 0;
+ MessageBox ( MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_INIT_ERROR_STRANGE));
+ } else {
+// IccSetupData->AllowAdvancedOptions = 1;
+ }
+ }
+
+ Status = pRS->SetVariable(
+ ICC_VOLATILE_SETUP_DATA_C_NAME,
+ &IccSetupDataGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_NON_VOLATILE,
+ sizeof(ICC_VOLATILE_SETUP_DATA),
+ IccSetupData );
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+ Status = HiiLibSetBrowserData(
+ SelectionBufferSize, IccSetupData,
+ &IccSetupDataGuid, ICC_VOLATILE_SETUP_DATA_C_NAME
+ );
+ ASSERT_EFI_ERROR(Status);
+ pBS->FreePool(IccSetupData);
+
+#endif;
+
+ return EFI_SUCCESS;
+}
+
+
+
+EFI_STATUS
+EFIAPI
+IccSubmenuEntry (
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class,
+ IN UINT16 SubClass,
+ IN UINT16 Key
+)
+
+/*++
+Routine Description:
+ Setup callback executed when user enters any submenu of Advanced->ICC
+ Personalizes common strings for that particular clock submenu
+ Stores information on which submenu we're in, that's needed for other callbacks
+Arguments:
+Returns:
+ always SUCCESS
+--*/
+{
+ UINT8 SubMenuNumber = ICC_CLOCK_COUNT;
+ CHAR16 StringBuffer[100];
+ UINT8 i;
+ UINT8 NeedComma;
+ UINT8 LineOverflow;
+ CALLBACK_PARAMETERS *CallbackParameter = GetCallbackParameters();
+
+#if EFI_SPECIFICATION_VERSION >= 0x2001E
+ if ((CallbackParameter->Action == AMI_CALLBACK_RETRIEVE) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_OPEN) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_CLOSE) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_DEFAULT_STANDARD) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_DEFAULT_MANUFACTURING))
+ return EFI_SUCCESS;
+#endif
+
+ switch (Key) {
+ case KEY_FORM1:
+ SubMenuNumber = 0;
+ break;
+ case KEY_FORM2:
+ SubMenuNumber = 1;
+ break;
+ case KEY_FORM3:
+ SubMenuNumber = 2;
+ break;
+ case KEY_FORM4:
+ SubMenuNumber = 3;
+ break;
+ case KEY_FORM5:
+ SubMenuNumber = 4;
+ break;
+ case KEY_FORM6:
+ SubMenuNumber = 5;
+ break;
+ case KEY_FORM7:
+ SubMenuNumber = 6;
+ break;
+ case KEY_FORM8:
+ SubMenuNumber = 7;
+ break;
+ default:
+ ASSERT(FALSE);
+ }
+
+ if (SubMenuNumber == mActiveSubmenu) {
+ //
+ //strings already personalized for this menu, no need to change them
+ //
+ return EFI_SUCCESS;
+ }
+
+ mActiveSubmenu = SubMenuNumber;
+
+ IccGetFrequencies(mActiveSubmenu, &values);
+ StringBuffer[0] = 0;
+ NeedComma = 0;
+ LineOverflow = 0;
+
+ //
+ // Concatenate all clock usages into two strings. If first string gets too long, second will be written
+ //
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_CLOCK_USAGE_2), L"%s", StringBuffer);
+ if (values.ClockUsage != 0) {
+ for (i=0; i<NAME_ARRAY_SIZE; i++) {
+ if (values.ClockUsage & (1<<i)) {
+ if (NeedComma == 1) {
+ StrCat(StringBuffer, L", ");
+ }
+ if ( Wcslen(StringBuffer) + Wcslen(mClockUsageName[i]) > 25 ) {
+ LineOverflow = 1;
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_CLOCK_USAGE_1), L"%s", StringBuffer);
+ StringBuffer[0] = 0;
+ NeedComma = 0;
+ }
+ StrCat(StringBuffer, mClockUsageName[i]);
+ NeedComma = 1;
+ }
+ }
+ } else {
+ StrCat(StringBuffer, mClockUsageNone);
+ }
+ if (LineOverflow) {
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_CLOCK_USAGE_2), L"%s", StringBuffer);
+ } else {
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_CLOCK_USAGE_1), L"%s", StringBuffer);
+ }
+
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_CLOCK_NUMBER), L"%s", mClockName[SubMenuNumber]);
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_MAX_FREQUENCY_VALUE), L"%d.%02d MHz", values.ClkFreqMax/100, values.ClkFreqMax%100);
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_MIN_FREQUENCY_VALUE), L"%d.%02d MHz", values.ClkFreqMin/100, values.ClkFreqMin%100);
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_CURRENT_FREQUENCY_VALUE), L"%d.%02d MHz", values.ClkFreqCurrent/100, values.ClkFreqCurrent%100);
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_SSC_MODES_VALUE), L"%s%s%s",
+ (values.SscModeDownAvailable) ? L"Down " : L" ",
+ (values.SscModeCenterAvailable)? L"Center " : L" ",
+ (values.SscModeUpAvailable) ? L"Up " : L" "
+ );
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_SSC_CURRENT_MODE_VALUE), L"%s", mModeName[values.SscModeCurrent]);
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_SSC_MAX_VALUE), L"%d.%02d%%", values.SscPercentMax/100, values.SscPercentMax%100);
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_SSC_CURRENT_VALUE), L"%d.%02d%%", values.SscPercentCurrent/100, values.SscPercentCurrent%100);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+IccAccept (
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class,
+ IN UINT16 SubClass,
+ IN UINT16 Key
+)
+/*++
+Routine Description:
+ Setup callback executed when user chooses 'Accept'
+ Sends requested clock parameters to ICC OverClocking
+Arguments:
+ interface to ITEM_CALLBACK_EX
+Returns:
+ always SUCCESS
+--*/
+{
+ EFI_STATUS Status;
+ ICC_VOLATILE_SETUP_DATA* IccSetupData = NULL;
+ CLOCK_DISPLAY_VALUES values;
+ UINT8 TypeOfChange;
+ UINTN VarSize = 0;
+#if EFI_SPECIFICATION_VERSION>0x20000
+ UINTN SelectionBufferSize = sizeof(ICC_VOLATILE_SETUP_DATA);
+ EFI_GUID IccSetupDataGuid = ICC_VOLATILE_SETUP_DATA_GUID;
+#endif
+ CALLBACK_PARAMETERS *CallbackParameter = GetCallbackParameters();
+
+#if EFI_SPECIFICATION_VERSION >= 0x2001E
+ if ((CallbackParameter->Action == AMI_CALLBACK_RETRIEVE) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_OPEN) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_CLOSE) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_DEFAULT_STANDARD) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_DEFAULT_MANUFACTURING))
+ return EFI_SUCCESS;
+#endif
+
+ switch (Key) {
+ case KEY_CHANGE_NOW1:
+ case KEY_CHANGE_NOW2:
+ case KEY_CHANGE_NOW3:
+ case KEY_CHANGE_NOW4:
+ case KEY_CHANGE_NOW5:
+ case KEY_CHANGE_NOW6:
+ TypeOfChange = IMMEDIATE;
+ break;
+ case KEY_CHANGE_ONCE1:
+ case KEY_CHANGE_ONCE2:
+ case KEY_CHANGE_ONCE3:
+ case KEY_CHANGE_ONCE4:
+ case KEY_CHANGE_ONCE5:
+ case KEY_CHANGE_ONCE6:
+ TypeOfChange = TEMPORARY;
+ break;
+ case KEY_CHANGE_PERM1:
+ case KEY_CHANGE_PERM2:
+ case KEY_CHANGE_PERM3:
+ case KEY_CHANGE_PERM4:
+ case KEY_CHANGE_PERM5:
+ case KEY_CHANGE_PERM6:
+ TypeOfChange = PERMANENT;
+ break;
+ default:
+ ASSERT(FALSE);
+ TypeOfChange = 0; //prevent compilator warning
+ }
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+ Status = pBS->AllocatePool(EfiBootServicesData, SelectionBufferSize, &IccSetupData);
+ if(EFI_ERROR(Status))
+ return Status;
+
+ Status = HiiLibGetBrowserData(
+ &SelectionBufferSize, IccSetupData,
+ &IccSetupDataGuid, ICC_VOLATILE_SETUP_DATA_C_NAME
+ );
+ ASSERT_EFI_ERROR(Status);
+#else
+ IccSetupData = (ICC_VOLATILE_SETUP_DATA*)CallbackParameter->Data->NvRamMap;
+#endif
+ Status = SendClockChangeRequest(IccSetupData, mActiveSubmenu, TypeOfChange);
+ IccGetFrequencies(mActiveSubmenu, &values);
+
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_CURRENT_FREQUENCY_VALUE), L"%d.%02d MHz", values.ClkFreqCurrent/100, values.ClkFreqCurrent%100);
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_SSC_CURRENT_MODE_VALUE), L"%s", mModeName[values.SscModeCurrent]);
+ InitString(gHiiHandle, STRING_TOKEN(STR_ICC_SSC_CURRENT_VALUE), L"%d.%02d%%", values.SscPercentCurrent/100, values.SscPercentCurrent%100);
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+ pBS->FreePool(IccSetupData);
+#endif;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+IccFreqChange (
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class,
+ IN UINT16 SubClass,
+ IN UINT16 Key
+)
+/*++
+Routine Description:
+ Setup callback executed when user changes frequency
+ Calls IccFrequencyRounding() which fixes frequency and SSC parameters to allowed values
+ Having these parameters fixed decreases number of errors caused by sending wrong parameters
+Arguments:
+Returns:
+ always SUCCESS
+--*/
+{
+ EFI_STATUS Status;
+ ICC_VOLATILE_SETUP_DATA* IccSetupData = NULL;
+ ICC_CLOCK_FREQUENCY ExpectFrequency, UserFrequency;
+ BOOLEAN HigherFrequency = FALSE;
+ ICC_LIB_STATUS IccStatus;
+#if EFI_SPECIFICATION_VERSION>0x20000
+ UINTN SelectionBufferSize = sizeof(ICC_VOLATILE_SETUP_DATA);
+ EFI_GUID IccSetupDataGuid = ICC_VOLATILE_SETUP_DATA_GUID;
+#endif
+
+ CALLBACK_PARAMETERS *CallbackParameter = GetCallbackParameters();
+
+#if EFI_SPECIFICATION_VERSION >= 0x2001E
+ if ((CallbackParameter->Action == AMI_CALLBACK_RETRIEVE) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_OPEN) ||
+ (CallbackParameter->Action == AMI_CALLBACK_FORM_CLOSE))
+ return EFI_SUCCESS;
+#endif
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+ Status = pBS->AllocatePool(EfiBootServicesData, SelectionBufferSize, &IccSetupData);
+ if(EFI_ERROR(Status))
+ return Status;
+
+ Status = HiiLibGetBrowserData(
+ &SelectionBufferSize, IccSetupData,
+ &IccSetupDataGuid, ICC_VOLATILE_SETUP_DATA_C_NAME
+ );
+ ASSERT_EFI_ERROR(Status);
+#else
+ IccSetupData = (ICC_VOLATILE_SETUP_DATA*)CallbackParameter->Data->NvRamMap;
+#endif
+
+ UserFrequency = IccSetupData->Frequency[mActiveSubmenu];
+
+ if(UserFrequency >= values.ClkFreqMax)
+ {
+ IccSetupData->Frequency[mActiveSubmenu] = values.ClkFreqMax;
+#if EFI_SPECIFICATION_VERSION>0x20000
+ Status = HiiLibSetBrowserData(
+ SelectionBufferSize, IccSetupData,
+ &IccSetupDataGuid, ICC_VOLATILE_SETUP_DATA_C_NAME
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ pBS->FreePool(IccSetupData);
+#endif;
+ return EFI_SUCCESS;
+ }
+
+ if(UserFrequency <= values.ClkFreqMin)
+ {
+ IccSetupData->Frequency[mActiveSubmenu] = values.ClkFreqMin;
+#if EFI_SPECIFICATION_VERSION>0x20000
+ Status = HiiLibSetBrowserData(
+ SelectionBufferSize, IccSetupData,
+ &IccSetupDataGuid, ICC_VOLATILE_SETUP_DATA_C_NAME
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ pBS->FreePool(IccSetupData);
+#endif;
+ return EFI_SUCCESS;
+ }
+
+ if(UserFrequency > values.ClkFreqCurrent)
+ HigherFrequency = TRUE;
+
+ {
+ UserFrequency = (UserFrequency) * 10000;
+ gIccOverClockingProtocol->GetNextFrequency(mActiveSubmenu,
+ UserFrequency,
+ &UserFrequency,
+ &IccStatus);
+
+ gIccOverClockingProtocol->GetPreviousFrequency(mActiveSubmenu,
+ UserFrequency,
+ &ExpectFrequency,
+ &IccStatus);
+ }
+
+ if (IccStatus == ICC_LIB_STATUS_SUCCESS) {
+ IccSetupData->Frequency[mActiveSubmenu] = ExpectFrequency/10000;
+ }
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+ Status = HiiLibSetBrowserData(
+ SelectionBufferSize, IccSetupData,
+ &IccSetupDataGuid, ICC_VOLATILE_SETUP_DATA_C_NAME
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ pBS->FreePool(IccSetupData);
+#endif;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+SendClockChangeRequest (
+ IN ICC_VOLATILE_SETUP_DATA* IccSetupData,
+ IN UINT8 ClockID,
+ IN UINT8 TypeOfChange
+ )
+/*++
+Routine Description:
+ Executed by setup calback function
+ Based on data entered by user, sends clock change requests to ICC OverClocking
+ Writing to susram or flash requires that old susram and flash contents be invalidated
+ In case of any problem, messagebox is displayed so user can know what corrective action is required
+Arguments:
+ initial clock divider value
+Returns:
+ validated clock divider value
+--*/
+{
+
+ UINT8 answer = 1;
+ ICC_LIB_STATUS IccStatus;
+ ICC_CLOCK_SETTINGS RequestSetting;
+ BOOLEAN freqConsolidationBypass = TRUE, permanentChange;
+
+ if(TypeOfChange == PERMANENT)
+ permanentChange = TRUE;
+
+ if(TypeOfChange == TEMPORARY)
+ permanentChange = FALSE;
+
+ // Prepare Setting
+ gIccOverClockingProtocol->GetCurrentClockSettings(ClockID, &RequestSetting, &IccStatus);
+ RequestSetting.Frequency = IccSetupData->Frequency[ClockID] * 10000;
+ RequestSetting.SscMode = SscNumberToSscMode(IccSetupData->SscMode[ClockID]);
+ RequestSetting.SscPercent = (UINT8)IccSetupData->SscPercent[ClockID];
+ // Only ICC_DMI_PEG_RATIO_5_TO_5 is support in PPT.
+ RequestSetting.DmiPegRatio = (UINT8)IccSetupData->DmiPegRatio[ClockID];
+
+ if(TypeOfChange == IMMEDIATE)
+ {
+ gIccOverClockingProtocol->SetCurrentClockSettings(ClockID,
+ RequestSetting,
+ &IccStatus);
+ }else
+ {
+ gIccOverClockingProtocol->SetBootClockSettings(ClockID,
+ RequestSetting,
+ &IccStatus);
+ }
+
+ if (IccStatus != ICC_LIB_STATUS_SUCCESS) {
+ if (TypeOfChange == TEMPORARY) {
+ MessageBox (MSGBOX_TYPE_OKCANCEL, &answer, STRING_TOKEN(STR_ICC_MSGBOX_ONCE_OVERWRITE));
+ } else if (TypeOfChange == PERMANENT) {
+ MessageBox (MSGBOX_TYPE_OKCANCEL, &answer, STRING_TOKEN(STR_ICC_MSGBOX_PERM_OVERWRITE));
+ }
+ if (answer != MSGBOX_YES) {
+ return ICC_LIB_STATUS_SUCCESS;
+ }
+ }
+
+ switch (IccStatus) {
+ case ICC_LIB_STATUS_DYNAMIC_CHANGE_NOT_ALLOWED:
+ MessageBox (MSGBOX_TYPE_OKCANCEL, &answer, STRING_TOKEN(STR_ICC_MSGBOX_NO_DYNAMIC), mClockName[ClockID]);
+ break;
+ case ICC_LIB_STATUS_REGISTER_IS_LOCKED:
+ MessageBox ( MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_LOCKED));
+ break;
+ case ICC_LIB_STATUS_FREQ_TOO_HIGH:
+ MessageBox ( MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_FREQ_HIGH), mClockName[ClockID] );
+ break;
+ case ICC_LIB_STATUS_FREQ_TOO_LOW:
+ MessageBox (MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_FREQ_LOW), mClockName[ClockID] );
+ break;
+ case ICC_LIB_STATUS_SSC_TOO_HIGH:
+ case ICC_LIB_STATUS_SSC_OUT_OF_RANGE:
+ MessageBox ( MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_SSC_HIGH), mClockName[ClockID] );
+ break;
+ case ICC_LIB_STATUS_SSC_TOO_LOW:
+ MessageBox (MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_SSC_LOW), mClockName[ClockID] );
+ break;
+ case ICC_LIB_STATUS_SSC_MODE_NOT_SUPPORTED:
+ MessageBox ( MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_SSC_MODE), mClockName[ClockID] );
+ break;
+ case ICC_LIB_STATUS_FREQ_MUST_HAVE_ZERO_SSC:
+ MessageBox ( MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_SSC_DISABLED), mClockName[ClockID] );
+ break;
+ case ICC_LIB_STATUS_SSC_CHANGE_NOT_ALLOWED:
+ MessageBox ( MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_SSC_CONSTANT), mClockName[ClockID] );
+ break;
+ case ICC_LIB_STATUS_MEI_INITIALIZATION_FAILED:
+ case ICC_LIB_STATUS_MEI_CONNECTION_FAILED:
+ MessageBox ( MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_HECI));
+ break;
+ case ICC_LIB_STATUS_SUCCESS:
+ if (TypeOfChange == IMMEDIATE) {
+ MessageBox ( MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_SUCCESS));
+ } else {
+ MessageBox ( MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_SUCCESS_NEED_REBOOT));
+ }
+ break;
+ default:
+ MessageBox ( MSGBOX_TYPE_OK, NULL, STRING_TOKEN(STR_ICC_MSGBOX_UNKNOWN), IccStatus );
+ break;
+ }
+
+ return IccStatus;
+}
+
+EFI_STATUS
+MessageBox (
+ IN UINT8 type,
+ OPTIONAL OUT UINT8* answer,
+ IN UINT16 StringId,
+ ...
+ )
+/*++
+Routine Description:
+ Wrapper function that displays messagebox. Text for Messagebox is specified with printf-like parameters.
+ Arguments:
+ type - messagebox type
+ answer - pointer to where user's answer will be stored
+ format, ... - parameters to printf
+Returns:
+--*/
+{
+ static AMI_POST_MANAGER_PROTOCOL* pAmiPostMgr = NULL;
+ EFI_GUID AmiPostManagerProtocolGuid = AMI_POST_MANAGER_PROTOCOL_GUID;
+ EFI_STATUS Status;
+ UINT8 LocalAnswer;
+ CHAR16* StrBuffer = 0;
+ CHAR16* LocalBuffer;
+ UINTN LocalBufferSize;
+ UINTN StrLen = 0;
+ va_list ArgList = va_start(ArgList,StringId);
+
+ if (pAmiPostMgr == NULL) {
+ Status = pBS->LocateProtocol(&AmiPostManagerProtocolGuid, NULL, &pAmiPostMgr);
+ ASSERT (pAmiPostMgr);
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ HiiLibGetString(gHiiHandle, StringId, &StrLen, StrBuffer);
+ Status = pBS->AllocatePool(EfiBootServicesData, StrLen, &StrBuffer);
+ ASSERT_EFI_ERROR(Status);
+ HiiLibGetString(gHiiHandle, StringId, &StrLen, StrBuffer);
+
+ LocalBufferSize = (StrLen+1)*2;
+
+ while (1) {
+ Status = pBS->AllocatePool(EfiBootServicesData, LocalBufferSize, &LocalBuffer);
+ ASSERT_EFI_ERROR(Status);
+ if (LocalBufferSize <= Swprintf_s_va_list(LocalBuffer, LocalBufferSize, StrBuffer, ArgList) ) {
+ Status = pBS->FreePool(LocalBuffer);
+ ASSERT_EFI_ERROR(Status);
+ LocalBufferSize*=2;
+ } else {
+ break;
+ }
+ }
+
+ va_end(ArgList);
+
+ Status = pAmiPostMgr->DisplayMsgBox(L"Intel ICC", LocalBuffer, type, &LocalAnswer);
+ pBS->FreePool(StrBuffer);
+ pBS->FreePool(LocalBuffer);
+
+ ASSERT_EFI_ERROR (Status);
+ if (answer != NULL) {
+ *answer = LocalAnswer;
+ }
+ return Status;
+}
+
+ICC_LIB_STATUS
+EFIAPI
+IccInitOverclocking (
+ ICC_LIB_VERSION* Version
+ )
+/*++
+Routine Description:
+ Initializes ICC OverClocking and asks about initial clock-related data. The data is:
+ clock parameters from CURRENT record (will be displayed as current and boot-time frequencies)
+ clock parameters from FLASH record (needed in case we try to write flash record later)
+ clock ranges - max/min supported frequencies
+Arguments:
+
+Returns:
+ EFI_SUCCESS - if there were no errors, updates global variables
+ EFI_DEVICE_ERROR - if there were errors when interfacing ICC OverClocking
+
+--*/
+{
+ UINT8 i;
+ ICC_LIB_STATUS IccStatus;
+
+ gIccOverClockingProtocol->GetInfo(Version, &i, &IccStatus);
+
+ if (IccStatus != ICC_LIB_STATUS_SUCCESS) {
+ TRACE ((TRACE_ALWAYS, "(ICC) IccOverClocking failed to start. IccStatus=0x%x, version = %d.%d.%d.%d\n", IccStatus, Version->Major, Version->Minor, Version->Hotfix, Version->Build));
+ return IccStatus;
+ }
+
+ return 0;
+}
+
+VOID
+IccGetFrequencies (
+ IN UINT8 ClockNumber,
+ OUT CLOCK_DISPLAY_VALUES* Values
+ )
+/*++
+Routine Description:
+ Called by Setup module, feeds it with clock data required to display all clock related information on bios setup screen
+ Converts data from clock divider value to clock frequency
+Arguments:
+ ClockNumber - data for which clock should be returned
+Returns:
+ values - clock-related data required to display values on ICC setup screen
+--*/
+{
+ ICC_LIB_STATUS IccStatus;
+ ICC_CLOCK_RANGES ClockRange;
+ ICC_CLOCK_SETTINGS Clocksetting;
+
+ gIccOverClockingProtocol->GetClockRanges(ClockNumber, &ClockRange, &IccStatus);
+ Values->ClockUsage = (UINT16)ClockRange.UsageMask;
+ Values->ClkFreqMax = ClockRange.FrequencyMax/10000;
+ Values->ClkFreqMin = ClockRange.FrequencyMin/10000;
+ Values->SscChangeAllowed = (UINT8)ClockRange.SscChangeAllowed;
+ Values->SscModeCenterAvailable = (UINT8)ClockRange.SscCenterAllowed;
+ Values->SscModeUpAvailable = (UINT8)ClockRange.SscUpAllowed;
+ Values->SscModeDownAvailable = (UINT8)ClockRange.SscDownAllowed;
+ Values->SscPercentMax = (UINT16)ClockRange.SscPercentMax;
+
+ gIccOverClockingProtocol->GetCurrentClockSettings(ClockNumber, &Clocksetting, &IccStatus);
+ Values->ClkFreqCurrent = Clocksetting.Frequency/10000;
+ Values->SscPercentCurrent = (UINT16)Clocksetting.SscPercent;
+ Values->SscModeCurrent = SscModeToSscNumber(Clocksetting.SscMode);
+
+}
+
+UINT32
+SscNumberToSscMode (
+ IN UINT8 SscModeNumber
+ )
+/*++
+Routine Description:
+ Converts SSC mode description. ICC OverClocking uses 3 bit one-hot format.
+ For displaying things in BIOS setup, numeric value is more convenient
+ This function should be called 3 times, once for each bit in ICC OverClocking format.
+Arguments:
+ SscModeNumber - mode number from BIOS setup
+ Mode - particular mode we're checking for
+Returns:
+ 0 - SSC number does not represent Mode
+ 1 - SSC number represents Mode
+--*/
+{
+ switch(SscModeNumber)
+ {
+ case SSC_MODE_NONE:
+ return ICC_SSC_NONE;
+
+ case SSC_MODE_UP:
+ return ICC_SSC_UP;
+
+ case SSC_MODE_CENTER:
+ return ICC_SSC_CENTER;
+
+ case SSC_MODE_DOWN:
+ return ICC_SSC_DOWN;
+
+ default:
+ TRACE ((TRACE_ALWAYS, "(ICC) Invalid SscModeNumber value \n"));
+ EFI_DEADLOOP();
+ return 0;
+ }
+};
+
+UINT8
+SscModeToSscNumber (
+ IN UINT8 SscMode
+ )
+/*++
+Routine Description:
+ Converts SSC mode description. ICC OverClocking uses 3 bit one-hot format. BIOS setup requires 8bit numeric value.
+Arguments:
+ three bits from ICC OverClocking format
+Returns:
+ SSC mode in BIOS setup format
+--*/
+{
+ switch(SscMode)
+ {
+ case ICC_SSC_NONE:
+ return SSC_MODE_NONE;
+
+ case ICC_SSC_UP:
+ return SSC_MODE_UP;
+
+ case ICC_SSC_CENTER:
+ return SSC_MODE_CENTER;
+
+ case ICC_SSC_DOWN:
+ return SSC_MODE_DOWN;
+
+ default:
+ TRACE ((TRACE_ALWAYS, "(ICC) Invalid SscMode value \n"));
+ EFI_DEADLOOP();
+ return 0;
+ }
+}
+
+VOID
+SetIccPersistentData (
+ IN UINT8 FlowPhase
+)
+/*++
+Routine Description:
+ Sets ClocksModified field of IccPersistentData EFI variable
+Arguments:
+ new value of IccPersistentData
+Returns:
+ none
+--*/
+{
+
+ EFI_GUID IccPersistentDataGuid = ICC_PERSISTENT_DATA_GUID;
+ ICC_PERSISTENT_DATA IccPersistentData;
+
+ IccPersistentData.ClocksModified = FlowPhase;
+
+ pRS->SetVariable(
+ L"IccPersistentData",
+ &IccPersistentDataGuid,
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ sizeof(IccPersistentData),
+ &IccPersistentData );
+}
+
+UINT8
+GetIccPersistentData (
+ VOID
+)
+/*++
+Routine Description:
+ Reads IccPersistentData EFI variable
+Arguments:
+ none
+Returns:
+ value of ClocksModified field
+--*/
+{
+ EFI_GUID IccPersistentDataGuid = ICC_PERSISTENT_DATA_GUID;
+ ICC_PERSISTENT_DATA IccPersistentData;
+ UINTN VariableSize;
+ EFI_STATUS Status;
+ VariableSize = sizeof(IccPersistentData);
+
+ Status = pRS->GetVariable(
+ L"IccPersistentData",
+ &IccPersistentDataGuid,
+ NULL,
+ &VariableSize,
+ &IccPersistentData );
+ if(EFI_ERROR(Status))
+ return ICC_SETTINGS_NOT_MODIFIED;
+ else
+ return IccPersistentData.ClocksModified;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/MeWrapper/Icc/IccSetup/IccCallbacks.h b/Board/EM/MeWrapper/Icc/IccSetup/IccCallbacks.h
new file mode 100644
index 0000000..24bae4c
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccSetup/IccCallbacks.h
@@ -0,0 +1,167 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccSetup/IccCallbacks.h 3 10/30/12 8:37a Klzhan $
+//
+// $Revision: 3 $
+//
+// $Date: 10/30/12 8:37a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccSetup/IccCallbacks.h $
+//
+// 3 10/30/12 8:37a Klzhan
+// Support DMI Ratio for new ICC.
+//
+// 2 5/14/12 4:47a Klzhan
+// [TAG] EIP89676
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Support New ICC library
+// [Files] IccSetup.mak
+// IccSetup.sdl
+// IccCallbacks.c
+// IccCallbacks.h
+// IccSetup.h
+// IccSetupMenu.sd
+// IccSetupSubmenu.sd
+// IccStrings.uni
+// IccLoadDefault.c
+// IccSetup.cif
+//
+// 1 2/08/12 1:07a Klzhan
+// Initial Check in
+//
+// 3 6/27/11 10:46p Klzhan
+// Update SscNumberToSscMode() for New Icc Control Library.
+//
+// 2 6/23/11 11:31p Klzhan
+// [TAG] EIP62129
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Support ICC Control Library 8.0.0.19.
+// [Files] IccCallbacks.c, IccCallbacks.h
+//
+// 1 2/25/11 1:42a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: IccCallbacks.h
+//
+// Description: Setup hooks for ICC.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ IccCallbacks.h
+
+Abstract:
+
+ Setup hooks for ICC
+
+--*/
+
+#define MAX(a, b) ((a) > (b) ? (a) : (b))
+#define MIN(a, b) ((a) > (b) ? (b) : (a))
+
+#define ICC_CLOCK_COUNT 8
+
+typedef struct _CLOCK_DISPLAY_VALUES {
+ UINT32 ClkFreqMax;
+ UINT32 ClkFreqMin;
+ UINT32 ClkFreqCurrent;
+ UINT16 SscPercentMax;
+ UINT16 SscPercentCurrent;
+ UINT16 ClockUsage;
+ UINT8 SscChangeAllowed;
+ UINT8 SscModeUpAvailable;
+ UINT8 SscModeCenterAvailable;
+ UINT8 SscModeDownAvailable;
+ UINT8 SscModeCurrent;
+ UINT8 DmiPegRatio;
+} CLOCK_DISPLAY_VALUES;
+
+typedef struct _ICC_CLK_REQUEST {
+ UINT16 Frequency;
+ UINT16 SscPercent;
+ UINT8 SscAllowed;
+ UINT8 SscMode;
+ UINT8 EveryBoot;
+} ICC_CLK_REQUEST;
+
+#define IMMEDIATE 0
+#define TEMPORARY 1
+#define PERMANENT 2
+
+#define SSC_MODE_NONE 3
+#define SSC_MODE_UP 2
+#define SSC_MODE_CENTER 1
+#define SSC_MODE_DOWN 0
+
+#define ROUND_UP 1
+#define ROUND_DOWN 0
+
+EFI_STATUS SendClockChangeRequest (IN ICC_VOLATILE_SETUP_DATA* IccSetupData, IN UINT8 ClkMask, IN UINT8 TypeOfChange);
+EFI_STATUS MessageBox (IN UINT8 type, OUT UINT8* answer, IN UINT16 StringId, ...);
+UINT16 FrequencyToDivider (IN UINT16 Frequency);
+UINT16 DividerToFrequency (IN UINT16 Divider);
+UINT16 FixDividerValue (IN UINT16 Divider, IN UINT8 Direction);
+UINT32 SscNumberToSscMode (IN UINT8 SscModeNumber);
+UINT8 SscModeToSscNumber (IN UINT8 SscMode);
+ICC_LIB_STATUS IccInitOverclocking (ICC_LIB_VERSION*);
+ICC_LIB_STATUS IccInvalidateRecord (IN UINT8 RecordType);
+VOID IccGetFrequencies (IN UINT8 ClockNumber, OUT CLOCK_DISPLAY_VALUES* values);
+EFI_STATUS IccRoundFrequency (IN OUT ICC_CLK_REQUEST* IccSetupData, IN UINT8 ClockNumber);
+ICC_LIB_STATUS IccSendRequestRecord (IN UINT8 TypeOfChange, IN UINT32 ClockMask, IN ICC_CLK_REQUEST* IccExchange, OUT UINT8* ErrorLocation);
+UINTN Wcslen(CHAR16 *string);
+CHAR16* Wcscpy(CHAR16 *string1, CHAR16* string2);
+VOID StrCat (IN OUT CHAR16 *Destination, IN CHAR16 *Source);
+VOID SetIccPersistentData (IN UINT8 FlowPhase);
+UINT8 GetIccPersistentData (VOID);
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/MeWrapper/Icc/IccSetup/IccLoadDefault.c b/Board/EM/MeWrapper/Icc/IccSetup/IccLoadDefault.c
new file mode 100644
index 0000000..94c558f
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccSetup/IccLoadDefault.c
@@ -0,0 +1,141 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccSetup/IccLoadDefault.c 3 2/22/13 2:27a Klzhan $
+//
+// $Revision: 3 $
+//
+// $Date: 2/22/13 2:27a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccSetup/IccLoadDefault.c $
+//
+// 3 2/22/13 2:27a Klzhan
+// [TAG] EIP115268
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] Icc Setup Item be hidden after load default(F3)
+// [RootCause] New TSE check gGrowserCallbackEnabled
+// [Solution] Enable gGrowserCallbackEnabled when call HiiSetBrowserData
+//
+// 2 4/24/12 12:31a Klzhan
+// Update modulepart to latest
+//
+// 1 2/08/12 1:07a Klzhan
+// Initial Check in
+//
+// 1 5/04/11 3:08a Klzhan
+// EIP58767 : ICC Setup item will not be hidden when load default.
+//
+// 1 11/01/10 9:42a Tonywu
+// Fix that the "ICC OverClocking" form will be hidden when setup loads
+// defaults.
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IccLoadDefault.c
+//
+// Description: Enter when loaded default in SETUP.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include <Setup.h>
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include "IccSetup.h"
+
+EFI_STATUS FindVariableIndex(CHAR16 *Name, EFI_GUID *Guid, UINT32 *Index);
+
+extern BOOLEAN gBrowserCallbackEnabled;
+
+VOID IccSetupLoadDefault(VOID)
+{
+ UINT8 i;
+ EFI_STATUS Status;
+
+ UINTN SelectionBufferSize = sizeof(ICC_VOLATILE_SETUP_DATA);
+ EFI_GUID IccSetupDataGuid = ICC_VOLATILE_SETUP_DATA_GUID;
+ ICC_VOLATILE_SETUP_DATA* IccSetupData = NULL;
+ ICC_VOLATILE_SETUP_DATA* TseIccSetupData = NULL;
+ BOOLEAN OrgBrowserCallbackEnabled = gBrowserCallbackEnabled;
+
+ Status = pBS->AllocatePool(EfiBootServicesData, SelectionBufferSize, &IccSetupData);
+ if (!EFI_ERROR(Status))
+ {
+ Status = pRS->GetVariable (
+ ICC_VOLATILE_SETUP_DATA_C_NAME,
+ &IccSetupDataGuid,
+ NULL,
+ &SelectionBufferSize,
+ IccSetupData);
+ ASSERT_EFI_ERROR(Status);
+ if (!EFI_ERROR(Status))
+ {
+ if (IccSetupData->AllowAdvancedOptions == 1)
+ {
+ Status = pBS->AllocatePool(EfiBootServicesData, SelectionBufferSize, &TseIccSetupData);
+ if(EFI_ERROR(Status)) {
+ return;
+ }
+ gBrowserCallbackEnabled = TRUE;
+ Status = HiiLibGetBrowserData(&SelectionBufferSize,
+ TseIccSetupData,
+ &IccSetupDataGuid,
+ L"IccAdvancedSetupDataVar"
+ );
+ if(EFI_ERROR(Status))
+ {
+ pBS->FreePool(TseIccSetupData);
+ gBrowserCallbackEnabled = OrgBrowserCallbackEnabled;
+ return;
+ }
+
+ TseIccSetupData->AllowAdvancedOptions = IccSetupData->AllowAdvancedOptions;
+ for (i=0; i<6 ;i++)
+ {
+ TseIccSetupData->ShowClock[i] = IccSetupData->ShowClock[i];
+ TseIccSetupData->ShowSsc[i] = IccSetupData->ShowSsc[i];
+ TseIccSetupData->Frequency[i] = IccSetupData->Frequency[i];
+ TseIccSetupData->SscPercent[i] = IccSetupData->SscPercent[i];
+ }
+ Status = HiiLibSetBrowserData(
+ SelectionBufferSize, TseIccSetupData,
+ &IccSetupDataGuid, L"IccAdvancedSetupDataVar");
+
+ pBS->FreePool(TseIccSetupData);
+ gBrowserCallbackEnabled = OrgBrowserCallbackEnabled;
+
+ }
+ }
+
+ }
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/MeWrapper/Icc/IccSetup/IccSetup.cif b/Board/EM/MeWrapper/Icc/IccSetup/IccSetup.cif
new file mode 100644
index 0000000..65e9d9f
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccSetup/IccSetup.cif
@@ -0,0 +1,16 @@
+<component>
+ name = "IccSetup"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\Icc\IccSetup"
+ RefName = "IccSetup"
+[files]
+"IccSetup.mak"
+"IccSetup.sdl"
+"IccCallbacks.c"
+"IccCallbacks.h"
+"IccSetup.h"
+"IccSetupMenu.sd"
+"IccSetupSubmenu.sd"
+"IccStrings.uni"
+"IccLoadDefault.c"
+<endComponent>
diff --git a/Board/EM/MeWrapper/Icc/IccSetup/IccSetup.h b/Board/EM/MeWrapper/Icc/IccSetup/IccSetup.h
new file mode 100644
index 0000000..69ae39d
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccSetup/IccSetup.h
@@ -0,0 +1,139 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccSetup/IccSetup.h 4 10/30/12 8:37a Klzhan $
+//
+// $Revision: 4 $
+//
+// $Date: 10/30/12 8:37a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccSetup/IccSetup.h $
+//
+// 4 10/30/12 8:37a Klzhan
+// Support DMI Ratio for new ICC.
+//
+// 3 5/14/12 4:47a Klzhan
+// [TAG] EIP89676
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Support New ICC library
+// [Files] IccSetup.mak
+// IccSetup.sdl
+// IccCallbacks.c
+// IccCallbacks.h
+// IccSetup.h
+// IccSetupMenu.sd
+// IccSetupSubmenu.sd
+// IccStrings.uni
+// IccLoadDefault.c
+// IccSetup.cif
+//
+// 2 4/24/12 12:30a Klzhan
+// Update modulepart to latest
+//
+// 1 2/08/12 1:07a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:42a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: IccSetup.h
+//
+// Description: Setup hooks for ICC.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ IccSetup.h
+
+Abstract:
+
+ Setup hooks for ICC
+
+--*/
+#define SUPPORTED_CLOCKS 8
+
+//
+// Icc Persistent Data - needs to be remembered after platform power cycle
+//
+#define ICC_PERSISTENT_DATA_GUID \
+{0x64192dca, 0xd034, 0x49d2, 0xa6, 0xde, 0x65, 0xa8, 0x29, 0xeb, 0x4c, 0x74}
+
+#define ICC_PERSISTENT_DATA_C_NAME L"IccPersistentData"
+
+typedef struct _ICC_PERSISTENT_DATA {
+ UINT8 ClocksModified;
+} ICC_PERSISTENT_DATA;
+
+#define ICC_SETTINGS_NOT_MODIFIED 0
+#define ICC_SETTINGS_RECENTLY_MODIFIED 1
+#define ICC_SETTINGS_PREVIOUSLY_MODIFIED 2
+
+//
+// Icc Volatile Setup Data - volatile (to prevent flash wear) data used by TSE
+//
+#define ICC_VOLATILE_SETUP_DATA_GUID \
+{0x7b77fb8b, 0x1e0d, 0x4d7e, 0x95, 0x3f, 0x39, 0x80, 0xa2, 0x61, 0xe0, 0x77}
+
+#define ICC_VOLATILE_SETUP_DATA_C_NAME L"IccAdvancedSetupDataVar"
+#pragma pack(1)
+typedef struct _ICC_VOLATILE_SETUP_DATA {
+ UINT16 Frequency[SUPPORTED_CLOCKS];
+ UINT8 SscMode[SUPPORTED_CLOCKS];
+ UINT16 SscPercent[SUPPORTED_CLOCKS];
+ UINT8 ShowSsc[SUPPORTED_CLOCKS];
+ UINT8 ShowClock[SUPPORTED_CLOCKS];
+ UINT8 ShowDmiPegRatio[SUPPORTED_CLOCKS];
+ UINT8 DmiPegRatio[SUPPORTED_CLOCKS];
+ UINT8 ShowProfile;
+ UINT8 AllowAdvancedOptions;
+} ICC_VOLATILE_SETUP_DATA;
+#pragma pack()
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/IccSetup/IccSetup.mak b/Board/EM/MeWrapper/Icc/IccSetup/IccSetup.mak
new file mode 100644
index 0000000..24d038e
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccSetup/IccSetup.mak
@@ -0,0 +1,99 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccSetup/IccSetup.mak 1 2/08/12 1:07a Klzhan $
+#
+# $Revision: 1 $
+#
+# $Date: 2/08/12 1:07a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccSetup/IccSetup.mak $
+#
+# 1 2/08/12 1:07a Klzhan
+# Initial Check in
+#
+# 2 5/04/11 3:06a Klzhan
+# EIP58767 : ICC setup items will not be hidden when load default.
+#
+# 1 2/25/11 1:42a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:10a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name: IccSetup.mak
+#
+# Description: Makefile Setup hooks for ICC.
+#
+#----------------------------------------------------------------------------
+#<AMI_FHDR_END>
+All :
+
+SetupSdbs : $(BUILD_DIR)\IccSetup.sdb
+
+SetupBin : $(BUILD_DIR)\IccCallbacks.obj
+
+$(BUILD_DIR)\IccSetup.mak : $(IccSetup_DIR)\$(@B).cif $(IccSetup_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(IccSetup_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+$(BUILD_DIR)\IccSetup.sdb : $(BUILD_DIR)\IccSetup.mak $(IccSetup_DIR)\*.sd $(IccSetup_DIR)\*.uni
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\IccSetup.mak all\
+ TYPE=SDB NAME=IccSetup
+
+$(BUILD_DIR)\IccCallbacks.obj : $(IccSetup_DIR)\IccCallbacks.c
+ $(CC) $(CFLAGS)\
+ $(INTEL_MCH_INCLUDES) \
+ $(INTEL_PCH_INCLUDES) \
+ $(ME_INCLUDES)\
+ $(ICC_INCLUDES)\
+ $(NB_INCLUDES) \
+ $(WDT_APP_INCLUDES) \
+ /Fo$(BUILD_DIR)\ $(IccSetup_DIR)\IccCallbacks.c
+
+#---------------------------------------------------------------------------
+# Icc SETUP load dafault hook
+#---------------------------------------------------------------------------
+AMITSEBin : $(BUILD_DIR)\IccLoadDefault.obj
+
+IccLoadDefault_CFLAGS=$(CFLAGS) \
+ -I $(TSEBIN_DIR)\Inc \
+ -I $(TSEBIN_DIR)
+
+$(BUILD_DIR)\IccLoadDefault.obj : $(IccSetup_DIR)\IccLoadDefault.c
+ $(CC) $(IccLoadDefault_CFLAGS) /Fo$(BUILD_DIR)\IccLoadDefault.obj $(IccSetup_DIR)\IccLoadDefault.c
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/IccSetup/IccSetup.sdl b/Board/EM/MeWrapper/Icc/IccSetup/IccSetup.sdl
new file mode 100644
index 0000000..a4ef233
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccSetup/IccSetup.sdl
@@ -0,0 +1,263 @@
+TOKEN
+ Name = "IccSetup_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Help = "Main switch to enable ICC support in Project in DXE Phase"
+End
+
+MODULE
+ Help = "Includes IccSetup.mak to Project"
+ File = "IccSetup.mak"
+End
+
+PATH
+ Name = "IccSetup_DIR"
+ Help = "Icc Setup dir"
+End
+
+ELINK
+ Name = "/I$(IccSetup_DIR)"
+ Parent = "ICC_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\IccSetup.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 86
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(IccSetup_DIR)\IccSetupMenu.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 86
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(IccSetup_DIR)\IccSetupSubmenu.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 86
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "InitICCStrings,"
+ Parent = "SetupStringInit"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_ICCMENU,IccMenuEntry),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FORM1,IccSubmenuEntry),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FORM2,IccSubmenuEntry),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FORM3,IccSubmenuEntry),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FORM4,IccSubmenuEntry),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FORM5,IccSubmenuEntry),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FORM6,IccSubmenuEntry),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FORM7,IccSubmenuEntry),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FORM8,IccSubmenuEntry),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_NOW1,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_NOW2,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_NOW3,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_NOW4,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_NOW5,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_NOW6,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_NOW7,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_NOW8,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_PERM1,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_PERM2,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_PERM3,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_PERM4,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_PERM5,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_PERM6,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_PERM7,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_CHANGE_PERM8,IccAccept),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FREQ1,IccFreqChange),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FREQ2,IccFreqChange),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FREQ3,IccFreqChange),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FREQ4,IccFreqChange),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FREQ5,IccFreqChange),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FREQ6,IccFreqChange),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FREQ7,IccFreqChange),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS,0,KEY_FREQ8,IccFreqChange),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\IccLoadDefault.obj"
+ Parent = "AMITSE_Objects"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "IccSetupLoadDefault,"
+ Parent = "LoadSetupDefaults,"
+ InvokeOrder = AfterParent
+End \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/IccSetup/IccSetupMenu.sd b/Board/EM/MeWrapper/Icc/IccSetup/IccSetupMenu.sd
new file mode 100644
index 0000000..06ed9f7
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccSetup/IccSetupMenu.sd
@@ -0,0 +1,438 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccSetup/IccSetupMenu.sd 4 12/24/12 6:37a Klzhan $
+//
+// $Revision: 4 $
+//
+// $Date: 12/24/12 6:37a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccSetup/IccSetupMenu.sd $
+//
+// 4 12/24/12 6:37a Klzhan
+// [TAG] EIP109624
+// [Category] New Feature
+// [Description] Support Lock Icc registers.
+//
+// 3 5/14/12 4:47a Klzhan
+// [TAG] EIP89676
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Support New ICC library
+// [Files] IccSetup.mak
+// IccSetup.sdl
+// IccCallbacks.c
+// IccCallbacks.h
+// IccSetup.h
+// IccSetupMenu.sd
+// IccSetupSubmenu.sd
+// IccStrings.uni
+// IccLoadDefault.c
+// IccSetup.cif
+//
+// 2 4/24/12 12:31a Klzhan
+// Update modulepart to latest
+//
+// 1 2/08/12 1:07a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:42a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: IccSetup.sd
+//
+// Description: SD file for ICC Setup
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ IccSetupMenu.sd
+
+Abstract:
+
+ Icc's advanced menu layout
+
+--*/
+
+#ifdef SETUP_DATA_DEFINITION
+
+ UINT8 IccWdtEnabled;
+ UINT8 IccSetClockEnables;
+ UINT8 IccLockRegisters;
+ UINT8 IccDisplayProfile;
+ UINT8 IccSelectedProfile;
+ UINT8 IccProfileEnable;
+
+#endif
+
+#ifdef CONTROL_DEFINITION
+ #define ICC_GOTO_INTELICC\
+ goto ICC_FORM_ID, \
+ prompt = STRING_TOKEN(STR_ICC_FORM),\
+ help = STRING_TOKEN(STR_ICC_FORM_HELP),\
+ flags = INTERACTIVE,\
+ key = AUTO_ID(KEY_ICCMENU);
+#endif
+#ifdef ADVANCED_FORM_SET
+
+#ifdef FORM_SET_TYPEDEF
+
+#include "IccSetup.h"
+
+#endif
+
+
+#ifdef FORM_SET_VARSTORE
+
+ varstore ICC_VOLATILE_SETUP_DATA,
+ key = AUTO_ID(ICC_VOLATILE_SETUP_DATA_VAR),
+ name = IccAdvancedSetupDataVar,
+ guid = ICC_VOLATILE_SETUP_DATA_GUID;
+
+#endif
+
+#ifdef FORM_SET_ITEM
+#endif
+
+#ifdef FORM_SET_GOTO
+ //
+ // this grayout is always false, but ensures that callback function will receive pointer to ICC_VOLATILE_SETUP_DATA instead SETUP_DATA
+ //
+ grayoutif ideqval ICC_VOLATILE_SETUP_DATA.AllowAdvancedOptions == 2;
+ ICC_GOTO_INTELICC
+ endif;
+#endif
+
+#ifdef FORM_SET_FORM
+ #ifndef ICC_FORM_SETUP
+ #define ICC_FORM_SETUP
+
+ form formid = AUTO_ID(ICC_FORM_ID),
+ title = STRING_TOKEN(STR_ENABLED);
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ oneof varid = SETUP_DATA.IccWdtEnabled,
+ prompt = STRING_TOKEN(STR_ICC_WDT_ENABLE),
+ help = STRING_TOKEN(STR_ICC_WDT_ENABLE_HELP),
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
+ endoneof;
+
+ oneof varid = SETUP_DATA.IccSetClockEnables,
+ prompt = STRING_TOKEN(STR_ICC_CLOCK_ENABLING),
+ help = STRING_TOKEN(STR_ICC_CLOCK_ENABLING_HELP),
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
+ endoneof;
+
+ oneof varid = SETUP_DATA.IccLockRegisters,
+ prompt = STRING_TOKEN(STR_ICC_LOCK_EOP),
+ help = STRING_TOKEN(STR_ICC_LOCK_HELP),
+ option text = STRING_TOKEN(STR_ICC_DEFAULT), value = 3, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
+ option text = STRING_TOKEN(STR_ICC_LOCK), value = 4, flags = MANUFACTURING | RESET_REQUIRED;
+ option text = STRING_TOKEN(STR_ICC_UNLOCK), value = 5, flags = RESET_REQUIRED;
+ endoneof;
+ endif;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval SETUP_DATA.IccDisplayProfile == 0;
+ numeric varid = SETUP_DATA.IccSelectedProfile,
+ prompt = STRING_TOKEN(STR_ICC_PROFILE),
+ help = STRING_TOKEN(STR_ICC_PROFILE_HELP),
+ flags = RESET_REQUIRED,
+ minimum = 0,
+ maximum = 7,
+ step = 1,
+ default = 0,
+ endnumeric;
+ SUPPRESS_GRAYOUT_ENDIF
+
+ SEPARATOR
+
+ SUBTITLE(STRING_TOKEN(STR_ICC_OVERCLOCKING))
+
+ SEPARATOR
+
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ICC_LIB_VERSION),
+ text = STRING_TOKEN(STR_ICC_LIB_VERSION_NR),
+ flags = 0, key = AUTO_ID(KEY_ACCEPT);
+
+ suppressif ideqval ICC_VOLATILE_SETUP_DATA.AllowAdvancedOptions == 0;
+
+ goto ICC_ADVFORM_ID1,
+ prompt = STRING_TOKEN(STR_ICC_SUBFORM1),
+ help = STRING_TOKEN(STR_ICC_FORM_HELP),
+ flags = INTERACTIVE,
+ key = AUTO_ID(KEY_FORM1);
+
+ goto ICC_ADVFORM_ID2,
+ prompt = STRING_TOKEN(STR_ICC_SUBFORM2),
+ help = STRING_TOKEN(STR_ICC_FORM_HELP),
+ flags = INTERACTIVE,
+ key = AUTO_ID(KEY_FORM2);
+
+ goto ICC_ADVFORM_ID3,
+ prompt = STRING_TOKEN(STR_ICC_SUBFORM3),
+ help = STRING_TOKEN(STR_ICC_FORM_HELP),
+ flags = INTERACTIVE,
+ key = AUTO_ID(KEY_FORM3);
+
+ goto ICC_ADVFORM_ID4,
+ prompt = STRING_TOKEN(STR_ICC_SUBFORM4),
+ help = STRING_TOKEN(STR_ICC_FORM_HELP),
+ flags = INTERACTIVE,
+ key = AUTO_ID(KEY_FORM4);
+
+ goto ICC_ADVFORM_ID5,
+ prompt = STRING_TOKEN(STR_ICC_SUBFORM5),
+ help = STRING_TOKEN(STR_ICC_FORM_HELP),
+ flags = INTERACTIVE,
+ key = AUTO_ID(KEY_FORM5);
+
+ goto ICC_ADVFORM_ID6,
+ prompt = STRING_TOKEN(STR_ICC_SUBFORM6),
+ help = STRING_TOKEN(STR_ICC_FORM_HELP),
+ flags = INTERACTIVE,
+ key = AUTO_ID(KEY_FORM6);
+
+ goto ICC_ADVFORM_ID7,
+ prompt = STRING_TOKEN(STR_ICC_SUBFORM7),
+ help = STRING_TOKEN(STR_ICC_FORM_HELP),
+ flags = INTERACTIVE,
+ key = AUTO_ID(KEY_FORM7);
+
+ goto ICC_ADVFORM_ID8,
+ prompt = STRING_TOKEN(STR_ICC_SUBFORM8),
+ help = STRING_TOKEN(STR_ICC_FORM_HELP),
+ flags = INTERACTIVE,
+ key = AUTO_ID(KEY_FORM8);
+ endif;
+
+ endform;
+
+#define INSIDE_ICC_SUBMENU
+
+#define CLOCK_NUMBER OFFSET_0
+#ifdef SETUP_DATA_DEFINITION
+AUTO_ID(KEY_FREQ1)
+AUTO_ID(KEY_CHANGE_NOW1)
+AUTO_ID(KEY_CHANGE_ONCE1)
+AUTO_ID(KEY_CHANGE_PERM1)
+#endif
+#define KEY_FREQ KEY_FREQ1
+#define MENU_NUMBER ICC_ADVFORM_ID1
+#define KEY_CHANGE_NOW KEY_CHANGE_NOW1
+#define KEY_CHANGE_ONCE KEY_CHANGE_ONCE1
+#define KEY_CHANGE_PERM KEY_CHANGE_PERM1
+form formid = AUTO_ID(ICC_ADVFORM_ID1),
+#include "IccSetupSubmenu.sd"
+#undef MENU_NUMBER
+#undef KEY_CHANGE_NOW
+#undef KEY_CHANGE_ONCE
+#undef KEY_CHANGE_PERM
+#undef CLOCK_NUMBER
+
+#define CLOCK_NUMBER OFFSET_1
+#ifdef SETUP_DATA_DEFINITION
+AUTO_ID(KEY_FREQ2)
+AUTO_ID(KEY_CHANGE_NOW2)
+AUTO_ID(KEY_CHANGE_ONCE2)
+AUTO_ID(KEY_CHANGE_PERM2)
+#endif
+#undef KEY_FREQ
+#define KEY_FREQ KEY_FREQ2
+#define MENU_NUMBER ICC_ADVFORM_ID2
+#define KEY_CHANGE_NOW KEY_CHANGE_NOW2
+#define KEY_CHANGE_ONCE KEY_CHANGE_ONCE2
+#define KEY_CHANGE_PERM KEY_CHANGE_PERM2
+form formid = AUTO_ID(ICC_ADVFORM_ID2),
+#include "IccSetupSubmenu.sd"
+#undef MENU_NUMBER
+#undef KEY_CHANGE_NOW
+#undef KEY_CHANGE_ONCE
+#undef KEY_CHANGE_PERM
+#undef CLOCK_NUMBER
+
+#define CLOCK_NUMBER OFFSET_2
+#ifdef SETUP_DATA_DEFINITION
+AUTO_ID(KEY_FREQ3)
+AUTO_ID(KEY_CHANGE_NOW3)
+AUTO_ID(KEY_CHANGE_ONCE3)
+AUTO_ID(KEY_CHANGE_PERM3)
+#endif
+#undef KEY_FREQ
+#define KEY_FREQ KEY_FREQ3
+#define KEY_CHANGE_NOW KEY_CHANGE_NOW3
+#define KEY_CHANGE_ONCE KEY_CHANGE_ONCE3
+#define KEY_CHANGE_PERM KEY_CHANGE_PERM3
+#define MENU_NUMBER ICC_ADVFORM_ID3
+form formid = AUTO_ID(ICC_ADVFORM_ID3),
+#include "IccSetupSubmenu.sd"
+#undef MENU_NUMBER
+#undef KEY_CHANGE_NOW
+#undef KEY_CHANGE_ONCE
+#undef KEY_CHANGE_PERM
+#undef CLOCK_NUMBER
+
+#define CLOCK_NUMBER OFFSET_3
+#ifdef SETUP_DATA_DEFINITION
+AUTO_ID(KEY_FREQ4)
+AUTO_ID(KEY_CHANGE_NOW4)
+AUTO_ID(KEY_CHANGE_ONCE4)
+AUTO_ID(KEY_CHANGE_PERM4)
+#endif
+#undef KEY_FREQ
+#define KEY_FREQ KEY_FREQ4
+#define KEY_CHANGE_NOW KEY_CHANGE_NOW4
+#define KEY_CHANGE_ONCE KEY_CHANGE_ONCE4
+#define KEY_CHANGE_PERM KEY_CHANGE_PERM4
+#define MENU_NUMBER ICC_ADVFORM_ID4
+form formid = AUTO_ID(ICC_ADVFORM_ID4),
+#include "IccSetupSubmenu.sd"
+#undef MENU_NUMBER
+#undef KEY_CHANGE_NOW
+#undef KEY_CHANGE_ONCE
+#undef KEY_CHANGE_PERM
+#undef CLOCK_NUMBER
+
+#define CLOCK_NUMBER OFFSET_4
+#ifdef SETUP_DATA_DEFINITION
+AUTO_ID(KEY_FREQ5)
+AUTO_ID(KEY_CHANGE_NOW5)
+AUTO_ID(KEY_CHANGE_ONCE5)
+AUTO_ID(KEY_CHANGE_PERM5)
+#endif
+#undef KEY_FREQ
+#define KEY_FREQ KEY_FREQ5
+#define KEY_CHANGE_NOW KEY_CHANGE_NOW5
+#define KEY_CHANGE_ONCE KEY_CHANGE_ONCE5
+#define KEY_CHANGE_PERM KEY_CHANGE_PERM5
+#define MENU_NUMBER ICC_ADVFORM_ID5
+form formid = AUTO_ID(ICC_ADVFORM_ID5),
+#include "IccSetupSubmenu.sd"
+#undef MENU_NUMBER
+#undef KEY_CHANGE_NOW
+#undef KEY_CHANGE_ONCE
+#undef KEY_CHANGE_PERM
+#undef CLOCK_NUMBER
+
+#define CLOCK_NUMBER OFFSET_5
+#ifdef SETUP_DATA_DEFINITION
+AUTO_ID(KEY_FREQ6)
+AUTO_ID(KEY_CHANGE_NOW6)
+AUTO_ID(KEY_CHANGE_ONCE6)
+AUTO_ID(KEY_CHANGE_PERM6)
+#endif
+#undef KEY_FREQ
+#define KEY_FREQ KEY_FREQ6
+#define KEY_CHANGE_NOW KEY_CHANGE_NOW6
+#define KEY_CHANGE_ONCE KEY_CHANGE_ONCE6
+#define KEY_CHANGE_PERM KEY_CHANGE_PERM6
+#define MENU_NUMBER ICC_ADVFORM_ID6
+form formid = AUTO_ID(ICC_ADVFORM_ID6),
+#include "IccSetupSubmenu.sd"
+#undef MENU_NUMBER
+#undef KEY_CHANGE_NOW
+#undef KEY_CHANGE_ONCE
+#undef KEY_CHANGE_PERM
+#undef CLOCK_NUMBER
+
+#define CLOCK_NUMBER OFFSET_6
+#ifdef SETUP_DATA_DEFINITION
+AUTO_ID(KEY_FREQ7)
+AUTO_ID(KEY_CHANGE_NOW7)
+AUTO_ID(KEY_CHANGE_ONCE7)
+AUTO_ID(KEY_CHANGE_PERM7)
+#endif
+#undef KEY_FREQ
+#define KEY_FREQ KEY_FREQ7
+#define KEY_CHANGE_NOW KEY_CHANGE_NOW7
+#define KEY_CHANGE_ONCE KEY_CHANGE_ONCE7
+#define KEY_CHANGE_PERM KEY_CHANGE_PERM7
+#define MENU_NUMBER ICC_ADVFORM_ID7
+form formid = AUTO_ID(ICC_ADVFORM_ID7),
+#include "IccSetupSubmenu.sd"
+#undef MENU_NUMBER
+#undef KEY_CHANGE_NOW
+#undef KEY_CHANGE_ONCE
+#undef KEY_CHANGE_PERM
+#undef CLOCK_NUMBER
+
+#define CLOCK_NUMBER OFFSET_7
+#ifdef SETUP_DATA_DEFINITION
+AUTO_ID(KEY_FREQ8)
+AUTO_ID(KEY_CHANGE_NOW8)
+AUTO_ID(KEY_CHANGE_ONCE8)
+AUTO_ID(KEY_CHANGE_PERM8)
+#endif
+#undef KEY_FREQ
+#define KEY_FREQ KEY_FREQ8
+#define KEY_CHANGE_NOW KEY_CHANGE_NOW8
+#define KEY_CHANGE_ONCE KEY_CHANGE_ONCE8
+#define KEY_CHANGE_PERM KEY_CHANGE_PERM8
+#define MENU_NUMBER ICC_ADVFORM_ID8
+form formid = AUTO_ID(ICC_ADVFORM_ID8),
+#include "IccSetupSubmenu.sd"
+#undef MENU_NUMBER
+#undef KEY_CHANGE_NOW
+#undef KEY_CHANGE_ONCE
+#undef KEY_CHANGE_PERM
+#undef CLOCK_NUMBER
+
+#undef INSIDE_ICC_SUBMENU
+
+ #endif // ICC_FORM_SETUP
+
+#endif
+
+#endif
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/IccSetup/IccSetupSubmenu.sd b/Board/EM/MeWrapper/Icc/IccSetup/IccSetupSubmenu.sd
new file mode 100644
index 0000000..0ebcfab
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccSetup/IccSetupSubmenu.sd
@@ -0,0 +1,239 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccSetup/IccSetupSubmenu.sd 3 11/20/12 3:09a Klzhan $
+//
+// $Revision: 3 $
+//
+// $Date: 11/20/12 3:09a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccSetup/IccSetupSubmenu.sd $
+//
+// 3 11/20/12 3:09a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] AMI CSP Intel BIOS Setup Unify Rule.
+//
+// 2 10/30/12 8:37a Klzhan
+// Support DMI Ratio for new ICC.
+//
+// 1 2/08/12 1:07a Klzhan
+// Initial Check in
+//
+// 2 9/06/11 6:11a Klzhan
+// [TAG] EIP67462
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ICC 08.00.00.022.1
+// [Files] IccSetup.mak
+// IccSetup.sdl
+// IccCallbacks.c
+// IccCallbacks.h
+// IccSetup.h
+// IccSetupMenu.sd
+// IccSetupSubmenu.sd
+// IccStrings.uni
+// IccLoadDefault.c
+// IccSetup.cif
+//
+// 1 2/25/11 1:42a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: IccSetup.sd
+//
+// Description: SD file for ICC Setup
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ IccSetupSubmenu.sd
+
+Abstract:
+
+ Icc's overclocking submenu layout
+
+--*/
+
+//This file should be included multiple times into IccSetupMenu.sd
+
+#ifdef INSIDE_ICC_SUBMENU
+
+title = STRING_TOKEN(STR_EMPTY);
+
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ICC_CLOCK_NUMBER),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ICC_CLOCK_USAGE_1),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ICC_CLOCK_USAGE_2),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0, key = 0;
+
+ SEPARATOR
+
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ICC_MAX_FREQUENCY),
+ text = STRING_TOKEN(STR_ICC_MAX_FREQUENCY_VALUE),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ICC_MIN_FREQUENCY),
+ text = STRING_TOKEN(STR_ICC_MIN_FREQUENCY_VALUE),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ICC_CURRENT_FREQUENCY),
+ text = STRING_TOKEN(STR_ICC_CURRENT_FREQUENCY_VALUE),
+ flags = 0, key = 0;
+
+ suppressif ideqval ICC_VOLATILE_SETUP_DATA.ShowClock[CLOCK_NUMBER] == 0;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ numeric varid = ICC_VOLATILE_SETUP_DATA.Frequency[CLOCK_NUMBER],
+ prompt = STRING_TOKEN(STR_ICC_NEW_FREQUENCY),
+ help = STRING_TOKEN(STR_ICC_NEW_FREQUENCY_HELP),
+ flags = INTERACTIVE,
+ key = KEY_FREQ,
+ minimum = 0,
+ maximum = 65535,
+ step = 1,
+ default = 0,
+ endnumeric;
+ SUPPRESS_GRAYOUT_ENDIF
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval ICC_VOLATILE_SETUP_DATA.ShowSsc[CLOCK_NUMBER] == 0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ICC_SSC_MODES),
+ text = STRING_TOKEN(STR_ICC_SSC_MODES_VALUE),
+ flags = 0, key = 0;
+ SUPPRESS_GRAYOUT_ENDIF
+
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ICC_SSC_CURRENT_MODE),
+ text = STRING_TOKEN(STR_ICC_SSC_CURRENT_MODE_VALUE),
+ flags = 0, key = 0;
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval ICC_VOLATILE_SETUP_DATA.ShowSsc[CLOCK_NUMBER] == 0;
+ oneof varid = ICC_VOLATILE_SETUP_DATA.SscMode[CLOCK_NUMBER],
+ prompt = STRING_TOKEN(STR_ICC_SSC_MODE_SELECTION),
+ help = STRING_TOKEN(STR_ICC_SSC_MODE_SELECTION_HELP),
+ option text = STRING_TOKEN(STR_ICC_MODE_DOWN), value = 0, flags = DEFAULT;
+ option text = STRING_TOKEN(STR_ICC_MODE_CENTRE), value = 1, flags = 0;
+ option text = STRING_TOKEN(STR_ICC_MODE_UP), value = 2, flags = 0;
+ endoneof;
+ SUPPRESS_GRAYOUT_ENDIF
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval ICC_VOLATILE_SETUP_DATA.ShowSsc[CLOCK_NUMBER] == 0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ICC_SSC_MAX),
+ text = STRING_TOKEN(STR_ICC_SSC_MAX_VALUE),
+ flags = 0, key = 0;
+ SUPPRESS_GRAYOUT_ENDIF
+
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ICC_SSC_CURRENT),
+ text = STRING_TOKEN(STR_ICC_SSC_CURRENT_VALUE),
+ flags = 0, key = 0;
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval ICC_VOLATILE_SETUP_DATA.ShowSsc[CLOCK_NUMBER] == 0;
+ numeric varid = ICC_VOLATILE_SETUP_DATA.SscPercent[CLOCK_NUMBER],
+ prompt = STRING_TOKEN(STR_ICC_SSC_NEW_PERCENT),
+ help = STRING_TOKEN(STR_ICC_SSC_NEW_PERCENT_HELP),
+ flags = 0,
+ key = 0,
+ minimum = 0,
+ maximum = 999,
+ step = 1,
+ default = 0,
+ endnumeric;
+ SUPPRESS_GRAYOUT_ENDIF
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval ICC_VOLATILE_SETUP_DATA.ShowDmiPegRatio[CLOCK_NUMBER] == 0;
+ oneof varid = ICC_VOLATILE_SETUP_DATA.DmiPegRatio[CLOCK_NUMBER],
+ prompt = STRING_TOKEN(STR_DMI_PEG_RATIO),
+ help = STRING_TOKEN(STR_DMI_PEG_RATIO_HELP),
+ option text = STRING_TOKEN(STR_DMI_PEG_RATIO_55), value = 0, flags = DEFAULT;
+ option text = STRING_TOKEN(STR_DMI_PEG_RATIO_54), value = 1, flags = 0;
+ option text = STRING_TOKEN(STR_DMI_PEG_RATIO_53), value = 2, flags = 0;
+ option text = STRING_TOKEN(STR_DMI_PEG_RATIO_52), value = 3, flags = 0;
+ endoneof;
+ SUPPRESS_GRAYOUT_ENDIF
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval ICC_VOLATILE_SETUP_DATA.ShowSsc[CLOCK_NUMBER] == 0 AND ideqval ICC_VOLATILE_SETUP_DATA.ShowClock[CLOCK_NUMBER] == 0;
+ goto MENU_NUMBER,prompt=STRING_TOKEN(STR_ICC_IMMEDIATE_CHANGES),help=STRING_TOKEN(STR_ICC_IMMEDIATE_CHANGES_HELP),flags=INTERACTIVE,key=KEY_CHANGE_NOW;
+ goto MENU_NUMBER,prompt=STRING_TOKEN(STR_ICC_PERMANENT_CHANGES),help=STRING_TOKEN(STR_ICC_PERMANENT_CHANGES_HELP),flags=INTERACTIVE,key=KEY_CHANGE_PERM;
+ SUPPRESS_GRAYOUT_ENDIF
+
+ endform;
+
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/IccSetup/IccStrings.uni b/Board/EM/MeWrapper/Icc/IccSetup/IccStrings.uni
new file mode 100644
index 0000000..29f0557
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/IccSetup/IccStrings.uni
Binary files differ
diff --git a/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.cif b/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.cif
new file mode 100644
index 0000000..b548eaf
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.cif
@@ -0,0 +1,14 @@
+<component>
+ name = "IccOverClocking"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\Icc\OverClocking\"
+ RefName = "IccOverClocking"
+[files]
+"IccOverClocking.sdl"
+"IccOverClocking.dxs"
+"IccOverClocking.mak"
+"IccOverClocking.efi"
+"IccOverClocking9_5.dxs"
+"IccOverClocking9_5.efi"
+"IccProtocol.h"
+<endComponent>
diff --git a/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.dxs b/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.dxs
new file mode 100644
index 0000000..06ebd96
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.dxs
@@ -0,0 +1,109 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccOverClocking/IccOverClocking.dxs 2 12/04/12 4:39a Klzhan $
+//
+// $Revision: 2 $
+//
+// $Date: 12/04/12 4:39a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccOverClocking/IccOverClocking.dxs $
+//
+// 2 12/04/12 4:39a Klzhan
+// [TAG] EIP107309
+// [Category] New Feature
+// [Description] Support ICC library for ME 9.5
+// [Files] IccOverClocking.sdl
+// IccOverClocking.dxs
+// IccOverClocking.mak
+// IccOverClocking.efi
+// IccOverClocking.cif
+//
+// 1 2/08/12 1:07a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:42a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: IccOverClocking.dxs
+//
+// Description: Icc control library.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ IccOverClocking.dxs
+
+Abstract:
+
+ Icc control library
+
+--*/
+
+#include "AutoGen.h"
+#include "DxeDepex.h"
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+#endif
+
+#include EFI_PROTOCOL_DEFINITION (Heci)
+#ifdef CougarPoint_SUPPORT
+#include EFI_PROTOCOL_DEFINITION (Wdt)
+#endif
+#include "IccProtocol.h"
+DEPENDENCY_START
+#ifdef CougarPoint_SUPPORT
+ WDT_PROTOCOL_GUID AND
+#endif
+ EFI_HECI_PROTOCOL_GUID
+ AND
+ ICC_9_0_GUID
+DEPENDENCY_END
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.efi b/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.efi
new file mode 100644
index 0000000..237ad24
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.efi
Binary files differ
diff --git a/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.mak b/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.mak
new file mode 100644
index 0000000..732fa52
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.mak
@@ -0,0 +1,111 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccOverClocking/IccOverClocking.mak 2 1/18/13 12:31a Klzhan $
+#
+# $Revision: 2 $
+#
+# $Date: 1/18/13 12:31a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccOverClocking/IccOverClocking.mak $
+#
+# 2 1/18/13 12:31a Klzhan
+# [TAG] EIPNone
+# [Category] Bug Fix
+# [Symptom] ICC library not loaded when ME 9.5
+# [Files] IccOverClocking.sdl
+# IccOverClocking.dxs
+# IccOverClocking.mak
+# IccOverClocking.efi
+# IccOverClocking9_5.dxs
+# IccOverClocking9_5.efi
+# IccProtocol.h
+# IccOverClocking.cif
+#
+# 1 2/08/12 1:07a Klzhan
+# Initial Check in
+#
+# 2 9/26/11 6:21a Klzhan
+# Fix build error with New EDK
+#
+# 1 2/25/11 1:42a Klzhan
+# Initial Check-in
+#
+# 2 12/03/10 5:37a Klzhan
+# Fix Build Error.
+#
+# 1 12/03/10 5:10a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name: IccOverClocking.mak
+#
+# Description: Setup hooks for ICC.
+#
+#----------------------------------------------------------------------------
+#<AMI_FHDR_END>
+all : $(BUILD_DIR)\IccOverClocking.ffs $(BUILD_DIR)\IccOverClocking9_5.ffs
+
+IccOverClocking_INCLUDES=\
+ $(INTEL_PCH_INCLUDES)\
+ $(EDK_INCLUDES)\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(ME_INCLUDES)\
+ $(ICC_INCLUDES)\
+
+$(BUILD_DIR)\IccOverClocking.ffs : $(IccOverClocking_DIR)\$(@B).efi $(IccOverClocking_DIR)\$(@B).mak Core\FFS.mak
+ $(MAKE) /$(MAKEFLAGS) /f Core\FFS.mak \
+ CPFLAGS="$(GLOBAL_DEFINES) /D TIANO_RELEASE_VERSION=0x00080006 $(EXTRA_DEFINES) $(IccOverClocking_INCLUDES)" \
+ BUILD_DIR=$(BUILD_DIR) SOURCE_DIR=$(IccOverClocking_DIR) \
+ GUID=5BBA83E5-F027-4ca7-BFD0-16358CC9E123\
+ NAME=$(@B)\
+ TYPE=EFI_FV_FILETYPE_DRIVER \
+ DEPEX1=$(IccOverClocking_DIR)\IccOverClocking.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ PEFILE=$(IccOverClocking_DIR)\$(@B).efi FFSFILE=$@ COMPRESS=1 \
+
+
+$(BUILD_DIR)\IccOverClocking9_5.ffs : $(IccOverClocking_DIR)\IccOverClocking9_5.efi $(IccOverClocking_DIR)\IccOverClocking.mak Core\FFS.mak
+ $(MAKE) /$(MAKEFLAGS) /f Core\FFS.mak \
+ CPFLAGS="$(GLOBAL_DEFINES) /D TIANO_RELEASE_VERSION=0x00080006 $(EXTRA_DEFINES) $(IccOverClocking_INCLUDES)" \
+ BUILD_DIR=$(BUILD_DIR) SOURCE_DIR=$(IccOverClocking_DIR) \
+ GUID=8e68e3c5-fc59-4280-8467-3800d31a8162\
+ NAME=$(@B)\
+ TYPE=EFI_FV_FILETYPE_DRIVER \
+ DEPEX1=$(IccOverClocking_DIR)\IccOverClocking9_5.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ PEFILE=$(IccOverClocking_DIR)\$(@B).efi FFSFILE=$@ COMPRESS=1 \
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.sdl b/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.sdl
new file mode 100644
index 0000000..782cb57
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking.sdl
@@ -0,0 +1,32 @@
+TOKEN
+ Name = "IccOverClocking_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Help = "Main switch to enable IccOverClocking support in Project"
+End
+
+MODULE
+ Help = "Includes IccOverClocking.mak to Project"
+ File = "IccOverClocking.mak"
+End
+
+PATH
+ Name = "IccOverClocking_DIR"
+ Help = "Icc Support commands"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\IccOverClocking.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\IccOverClocking9_5.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking9_5.dxs b/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking9_5.dxs
new file mode 100644
index 0000000..be16aac
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking9_5.dxs
@@ -0,0 +1,101 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccOverClocking/IccOverClocking9_5.dxs 1 12/04/12 4:42a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 12/04/12 4:42a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccOverClocking/IccOverClocking9_5.dxs $
+//
+// 1 12/04/12 4:42a Klzhan
+// [TAG] EIP107309
+// [Category] New Feature
+// [Description] Support ICC library for ME 9.5
+//
+// 1 2/25/11 1:42a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: IccOverClocking.dxs
+//
+// Description: Icc control library.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ IccOverClocking.dxs
+
+Abstract:
+
+ Icc control library
+
+--*/
+
+#include "AutoGen.h"
+#include "DxeDepex.h"
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+#endif
+
+#include EFI_PROTOCOL_DEFINITION (Heci)
+#ifdef CougarPoint_SUPPORT
+#include EFI_PROTOCOL_DEFINITION (Wdt)
+#endif
+#include "IccProtocol.h"
+DEPENDENCY_START
+#ifdef CougarPoint_SUPPORT
+ WDT_PROTOCOL_GUID AND
+#endif
+ EFI_HECI_PROTOCOL_GUID
+ AND
+ ICC_9_5_GUID
+DEPENDENCY_END
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking9_5.efi b/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking9_5.efi
new file mode 100644
index 0000000..43dd6e3
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/OverClocking/IccOverClocking9_5.efi
Binary files differ
diff --git a/Board/EM/MeWrapper/Icc/OverClocking/IccProtocol.h b/Board/EM/MeWrapper/Icc/OverClocking/IccProtocol.h
new file mode 100644
index 0000000..4d4f106
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/OverClocking/IccProtocol.h
@@ -0,0 +1,67 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccOverClocking/IccProtocol.h 1 12/04/12 4:46a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 12/04/12 4:46a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccOverClocking/IccProtocol.h $
+//
+// 1 12/04/12 4:46a Klzhan
+// [TAG] EIP107309
+// [Category] New Feature
+// [Description] Support ICC library for ME 9.5
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: IccProtocol.h
+//
+// Description: Protocol GUID define.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#ifndef _ICC_PROTOCOL_H_
+#define _ICC_PROTOCOL_H_
+
+#define ICC_9_0_GUID \
+ {0xAE4BD7F4, 0xB58F, 0x4D12, 0xBC, 0xC4, 0x98, 0x4, 0xD7, 0x55, 0xCF, 0x42}
+
+#define ICC_9_5_GUID \
+ {0x33DDC8EC, 0x20D2, 0x45C6, 0x9C, 0xB0, 0x5D, 0x7A, 0xC6, 0xCA, 0x10, 0x8C}
+
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/MeWrapper/Icc/Protocol/IccOverClocking/IccOverClocking.c b/Board/EM/MeWrapper/Icc/Protocol/IccOverClocking/IccOverClocking.c
new file mode 100644
index 0000000..e26e236
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/Protocol/IccOverClocking/IccOverClocking.c
@@ -0,0 +1,98 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccProtocolLib/IccOverClocking/IccOverClocking.c 1 2/08/12 1:05a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:05a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccProtocolLib/IccOverClocking/IccOverClocking.c $
+//
+// 1 2/08/12 1:05a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:42a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: IccOverClocking.c
+//
+// Description: ICC OverClocking protocol
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ IccOverClocking.c
+
+Abstract:
+
+ ICC OverClocking protocol
+
+--*/
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+
+#include "EdkIIGlueDxe.h"
+#endif
+
+#include "IccOverClocking.h"
+
+//
+// Protocol GUID definition
+//
+EFI_GUID gIccOverClockingProtocolGuid = ICC_OVERCLOCKING_PROTOCOL_GUID;
+
+//
+// Protocol description
+//
+EFI_GUID_STRING
+ (&gIccOverClockingProtocolGuid, "ICC OverClocking Protocol", "Integrated Clock Control OverClocking Protocol");
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/Protocol/IccOverClocking/IccOverClocking.h b/Board/EM/MeWrapper/Icc/Protocol/IccOverClocking/IccOverClocking.h
new file mode 100644
index 0000000..8dc0baa
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/Protocol/IccOverClocking/IccOverClocking.h
@@ -0,0 +1,278 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccProtocolLib/IccOverClocking/IccOverClocking.h 3 5/14/12 4:45a Klzhan $
+//
+// $Revision: 3 $
+//
+// $Date: 5/14/12 4:45a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccProtocolLib/IccOverClocking/IccOverClocking.h $
+//
+// 3 5/14/12 4:45a Klzhan
+// [TAG] EIP89676
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ICC library
+//
+// 2 5/11/12 3:37a Klzhan
+// [TAG] EIP89676
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update New ICC library 9.0.0.5
+//
+// 1 2/08/12 1:05a Klzhan
+// Initial Check in
+//
+// 3 9/06/11 6:09a Klzhan
+// [TAG] EIP67462
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ICC 08.00.00.022.1
+//
+// 2 6/23/11 11:29p Klzhan
+// [TAG] EIP62129
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ICC control Library to 8.0.0.19.
+// [Files] IccOverClocking.efi, IccOverClocking.h
+//
+// 1 2/25/11 1:42a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:10a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: IccOverClocking.h
+//
+// Description: ICC OverClocking protocol
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+ Any software source code reprinted in this document is furnished under
+ a software license and may only be used or copied in accordance with
+ the terms of that license.
+
+
+ Copyright 2010-2011, Intel Corporation. All rights reserved.
+
+--*/
+
+#ifndef _ICC_OVERCLOCKING_H_
+#define _ICC_OVERCLOCKING_H_
+
+/* Types used by ICC LIB */
+
+typedef enum _ICC_LIB_STATUS
+{
+ ICC_LIB_STATUS_SUCCESS, // 0
+ ICC_LIB_STATUS_INVALID_PARAMS, // 1
+ ICC_LIB_STATUS_INVALID_CLOCK_NUMBER, // 2
+ ICC_LIB_STATUS_CLOCK_NOT_FOUND, // 3
+ ICC_LIB_STATUS_INVALID_FREQ_VALUE, // 4
+ ICC_LIB_STATUS_FREQ_TOO_LOW, // 5
+ ICC_LIB_STATUS_FREQ_TOO_HIGH, // 6
+ ICC_LIB_STATUS_FREQ_MUST_HAVE_ZERO_SSC, // 7
+ ICC_LIB_STATUS_SSC_CHANGE_NOT_ALLOWED, // 8
+ ICC_LIB_STATUS_INVALID_SSC_MODE, // 9
+ ICC_LIB_STATUS_SSC_MODE_NOT_SUPPORTED, // a
+ ICC_LIB_STATUS_SSC_OUT_OF_RANGE, // b
+ ICC_LIB_STATUS_SSC_TOO_HIGH, // c
+ ICC_LIB_STATUS_SSC_TOO_LOW, // d
+ ICC_LIB_STATUS_SSC_CHANGE_NOT_ALLOWED_SSC_DISABLED, // e
+ ICC_LIB_STATUS_DYNAMIC_CHANGE_NOT_ALLOWED, // f
+ ICC_LIB_STATUS_INVALID_DMI_PEG_RATIO, // 10
+ ICC_LIB_STATUS_REGISTER_IS_LOCKED, // 11
+ ICC_LIB_STATUS_MEI_INITIALIZATION_FAILED, // 12
+ ICC_LIB_STATUS_MEI_CONNECTION_FAILED, // 13
+ ICC_LIB_STATUS_UNEXPECTED_FW_ERROR, // 14
+ ICC_LIB_STATUS_UNSUPPORTED_HW, // 15
+ ICC_LIB_STATUS_CLOCK_DISABLED_FAILED_PROGRAMMING, // 16
+ ICC_LIB_STATUS_FREQ_AND_SSC_NOT_MATCH, // 17
+ ICC_LIB_STATUS_WAITING_FOR_WARM_RESET, // 18
+ ICC_LIB_STATUS_NOT_ALLOWED_IN_USER_MODE, // 19
+ ICC_LIB_STATUS_TOO_MANY_CONNECTIONS, // 1a
+ ICC_LIB_STATUS_INVALID_COOKIE, // 1b
+ ICC_LIB_STATUS_DMI_PEG_RATIO_CHANGE_NOT_ALLOWED, // 1c
+ ICC_LIB_STATUS_NO_USAGE_DEFINED_FOR_THE_CLOCK, // 1d
+ ICC_LIB_STATUS_DATA_NOT_AVAILABLE, // 1e
+
+ ICC_LIB_STATUS_UNSPECIFIED_ERROR = 0xFFFF
+} ICC_LIB_STATUS;
+
+ typedef enum _ICC_CLOCK_USAGE
+ {
+ ICC_CLOCK_USAGE_BCLK = 0,
+ ICC_CLOCK_USAGE_DMI,
+ ICC_CLOCK_USAGE_PEG,
+ ICC_CLOCK_USAGE_PCIE,
+ ICC_CLOCK_USAGE_PCI33,
+ ICC_CLOCK_USAGE_RESERVED,
+ ICC_CLOCK_USAGE_SATA,
+ ICC_CLOCK_USAGE_USB3,
+ ICC_CLOCK_USAGE_DISPLAY,
+ ICC_CLOCK_USAGE_DISPLAY_NON_SPREAD,
+ ICC_CLOCK_USAGE_27MHZ_DOWN_GFX,
+ ICC_CLOCK_USAGE_DISPLAY_VGA,
+ ICC_CLOCK_USAGE_USB_LEGACY,
+ ICC_CLOCK_USAGE_14_31818_MHZ
+ } ICC_CLOCK_USAGE;
+
+// @brief Defines a generic version structure used in the software build process.
+typedef struct _ICC_LIB_VERSION
+{
+ UINT16 Major;
+ UINT16 Minor;
+ UINT16 Hotfix;
+ UINT16 Build;
+} ICC_LIB_VERSION;
+
+// ssc mode
+typedef enum _ICC_SSC_MODE
+ {
+ ICC_SSC_NONE = 0, // if used in SET, it means DONT CARE and current percent
+ // value will be used regardless of percent value
+ ICC_SSC_UP = 1,
+ ICC_SSC_CENTER = 2,
+ ICC_SSC_DOWN = 4
+} ICC_SSC_MODE;
+
+typedef UINT32 ICC_CLOCK_FREQUENCY;
+
+// Ratio used to modify the BCLK value and to produce
+// the PEG Slot Frequency (~100MHz). BCLK / ratio = PEG
+// Used in HW where the BCLK, DMI, & PEG use a common clock
+typedef enum _ICC_DMI_PEG_RATIO
+{
+ ICC_DMI_PEG_RATIO_5_TO_5 = 0, //< 5/5 = 1 - 1:1 ratio used when BCLK at 100MHz
+ ICC_DMI_PEG_RATIO_5_TO_4, //< 5/4 = 1.25 - Used when BCLK around 125MHz
+ ICC_DMI_PEG_RATIO_5_TO_3, //< 5/3 = 1.66 - Used when BCLK around 166MHz
+ ICC_DMI_PEG_RATIO_5_TO_2 //< 5/2 = 2.5 - Used when BCLK around 250MHz
+} ICC_DMI_PEG_RATIO;
+
+typedef struct _ICC_CLOCK_SETTINGS
+{
+ ICC_CLOCK_FREQUENCY Frequency;
+ ICC_SSC_MODE SscMode;
+ UINT8 SscPercent; // encoding example: 1.28% -> SSC_SPREAD value is 128
+ ICC_DMI_PEG_RATIO DmiPegRatio;
+} ICC_CLOCK_SETTINGS;
+
+typedef UINT16 ICC_CLOCK_USAGE_MASK;
+
+typedef struct _ICC_CLOCK_RANGES
+{
+ ICC_CLOCK_FREQUENCY FrequencyMin;
+ ICC_CLOCK_FREQUENCY FrequencyMax;
+ UINT8 SscChangeAllowed;
+ UINT8 SscUpAllowed;
+ UINT8 SscCenterAllowed;
+ UINT8 SscDownAllowed;
+ UINT8 SscPercentMax;
+ // that field is actually still a bit mask, but usually applications will never use it.
+ ICC_CLOCK_USAGE_MASK UsageMask;
+ UINT8 SscHaltAllowed;
+} ICC_CLOCK_RANGES;
+
+typedef UINT8 ICC_CLOCK_ID;
+
+typedef UINT32 ICC_CLOCK_ID_MASK;
+
+typedef enum _ICC_RECORD_INVALIDATION_REASON
+{
+ ICC_LIB_RIR_RECORD_VALID = 0,
+ ICC_LIB_RIR_AC_POWER_LOSS,
+ ICC_LIB_RIR_CMOS_BATTERY_REMOVED,
+ ICC_LIB_RIR_PLATFORM_BOOT_TIMEOUT,
+ ICC_LIB_RIR_WDT_EXPIRED,
+ ICC_LIB_RIR_RESERVED,
+ ICC_LIB_RIR_INVALIDATE_BY_REQUEST,
+ ICC_LIB_RIR_FW_BUG
+} ICC_RECORD_INVALIDATION_REASON;
+
+//
+// GUID for the ICC OverClocking Protocol
+//
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#define ICC_OVERCLOCKING_PROTOCOL_GUID \
+ {0x8e8cbc58, 0x834c, 0x41e3, 0xb8, 0xca, 0xf0, 0x0c, 0xcf, 0x5a, 0x71, 0x7c}
+
+#else
+
+#define ICC_OVERCLOCKING_PROTOCOL_GUID \
+ {0x8e8cbc58, 0x834c, 0x41e3, { 0xb8, 0xca, 0xf0, 0x0c, 0xcf, 0x5a, 0x71, 0x7c } }
+
+#endif
+//
+// Extern the GUID for protocol users.
+//
+extern EFI_GUID gIccOverClockingProtocolGuid;
+
+typedef VOID (EFIAPI *ICC_LIB_GET_INFO) (ICC_LIB_VERSION*, UINT8*, ICC_LIB_STATUS*);
+typedef VOID (EFIAPI *ICC_LIB_GET_CLOCK_ID) (ICC_CLOCK_USAGE, ICC_CLOCK_ID_MASK*, ICC_LIB_STATUS*);
+typedef VOID (EFIAPI *ICC_LIB_GET_CLOCK_RANGES) (ICC_CLOCK_ID, ICC_CLOCK_RANGES*, ICC_LIB_STATUS*);
+typedef VOID (EFIAPI *ICC_LIB_GET_CURRENT_CLOCK_SETTINGS) (ICC_CLOCK_ID, ICC_CLOCK_SETTINGS*, ICC_LIB_STATUS*);
+typedef VOID (EFIAPI *ICC_LIB_SET_CURRENT_CLOCK_SETTINGS) (ICC_CLOCK_ID, ICC_CLOCK_SETTINGS, ICC_LIB_STATUS*);
+typedef VOID (EFIAPI *ICC_LIB_GET_BOOT_CLOCK_SETTINGS) (ICC_CLOCK_ID, ICC_CLOCK_SETTINGS*, ICC_LIB_STATUS*);
+typedef VOID (EFIAPI *ICC_LIB_SET_BOOT_CLOCK_SETTINGS) (ICC_CLOCK_ID, ICC_CLOCK_SETTINGS, ICC_LIB_STATUS*);
+typedef VOID (EFIAPI *ICC_LIB_GET_DEFAULT_BOOT_SETTINGS) (ICC_CLOCK_ID, ICC_CLOCK_SETTINGS*, ICC_LIB_STATUS*);
+typedef VOID (EFIAPI *ICC_LIB_RESET_CLOCK_BOOT_SETTINGS_TO_DEFAULTS) (ICC_CLOCK_ID, ICC_LIB_STATUS*);
+typedef VOID (EFIAPI *ICC_LIB_RESET_ALL_CLOCKS_BOOT_SETTINGS_TO_DEFAULTS) (ICC_LIB_STATUS*);
+typedef VOID (EFIAPI *ICC_GET_NEXT_FREQUENCY) (ICC_CLOCK_ID, ICC_CLOCK_FREQUENCY, ICC_CLOCK_FREQUENCY*, ICC_LIB_STATUS*);
+typedef VOID (EFIAPI *ICC_GET_PREVIOUS_FREQUENCY) (ICC_CLOCK_ID, ICC_CLOCK_FREQUENCY, ICC_CLOCK_FREQUENCY*, ICC_LIB_STATUS*);
+typedef VOID (EFIAPI *ICC_LIB_GET_BOOT_CLOCK_SETTINGS_INVALIDATION_REASON) (ICC_RECORD_INVALIDATION_REASON*, ICC_LIB_STATUS*);
+
+
+typedef struct _ICC_OVERCLOCKING_PROTOCOL {
+ ICC_LIB_GET_INFO GetInfo;
+ ICC_LIB_GET_CLOCK_ID GetClockId;
+ ICC_LIB_GET_CLOCK_RANGES GetClockRanges;
+ ICC_LIB_GET_CURRENT_CLOCK_SETTINGS GetCurrentClockSettings;
+ ICC_LIB_SET_CURRENT_CLOCK_SETTINGS SetCurrentClockSettings;
+ ICC_LIB_GET_BOOT_CLOCK_SETTINGS GetBootClockSettings;
+ ICC_LIB_SET_BOOT_CLOCK_SETTINGS SetBootClockSettings;
+ ICC_LIB_GET_DEFAULT_BOOT_SETTINGS GetDefaultClockSettings;
+ ICC_LIB_RESET_CLOCK_BOOT_SETTINGS_TO_DEFAULTS ResetClockBootSettingsToDefaults;
+ ICC_LIB_RESET_ALL_CLOCKS_BOOT_SETTINGS_TO_DEFAULTS ResetAllClocksBootSettingsToDefaults;
+ ICC_GET_NEXT_FREQUENCY GetNextFrequency;
+ ICC_GET_PREVIOUS_FREQUENCY GetPreviousFrequency;
+ ICC_LIB_GET_BOOT_CLOCK_SETTINGS_INVALIDATION_REASON GetBootClockSettingsInvalidationReason;
+} ICC_OVERCLOCKING_PROTOCOL;
+
+#endif /* _ICC_OVERCLOCKING_H_ */
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/Protocol/IccProtocolLib.cif b/Board/EM/MeWrapper/Icc/Protocol/IccProtocolLib.cif
new file mode 100644
index 0000000..178021d
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/Protocol/IccProtocolLib.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "IccProtocolLib"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\Icc\Protocol"
+ RefName = "IccProtocolLib"
+[files]
+"IccProtocolLib.sdl"
+"IccProtocolLib.mak"
+"IccOverClocking\IccOverClocking.h"
+"IccOverClocking\IccOverClocking.c"
+<endComponent>
diff --git a/Board/EM/MeWrapper/Icc/Protocol/IccProtocolLib.mak b/Board/EM/MeWrapper/Icc/Protocol/IccProtocolLib.mak
new file mode 100644
index 0000000..3eb9b6b
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/Protocol/IccProtocolLib.mak
@@ -0,0 +1,78 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccProtocolLib/IccProtocolLib.mak 1 2/08/12 1:05a Klzhan $
+#
+# $Revision: 1 $
+#
+# $Date: 2/08/12 1:05a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Icc/IccProtocolLib/IccProtocolLib.mak $
+#
+# 1 2/08/12 1:05a Klzhan
+# Initial Check in
+#
+# 1 2/25/11 1:41a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:10a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name: IccProtocolLib.mak
+#
+# Description: MakeFile for IccProtocolLib
+#
+#----------------------------------------------------------------------------
+#<AMI_FHDR_END>
+all : IccProtocolLib
+
+$(IccProtocol_LIB) : IccProtocolLib
+
+IccProtocolLib : $(BUILD_DIR)\IccProtocolLib.mak IccProtocolLibBin
+
+$(BUILD_DIR)\IccProtocolLib.mak : $(IccProtocol_DIR)\$(@B).cif $(IccProtocol_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(IccProtocol_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+IccProtocolLib_INCLUDES =\
+ $(EDK_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+
+IccProtocolLibBin :
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\IccProtocolLib.mak all\
+ "MY_INCLUDES=$(IccProtocolLib_INCLUDES)" \
+ TYPE=LIBRARY \
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Icc/Protocol/IccProtocolLib.sdl b/Board/EM/MeWrapper/Icc/Protocol/IccProtocolLib.sdl
new file mode 100644
index 0000000..2f3f33e
--- /dev/null
+++ b/Board/EM/MeWrapper/Icc/Protocol/IccProtocolLib.sdl
@@ -0,0 +1,29 @@
+TOKEN
+ Name = "IccProtocolLib_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Help = "Main switch to enable IccProtocolLib support in Project"
+End
+
+PATH
+ Name = "IccProtocol_DIR"
+End
+
+MODULE
+ File = "IccProtocolLib.mak"
+ Help = "Includes IccProtocolLib.mak to Project"
+End
+
+ELINK
+ Name = "IccProtocol_LIB"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\IccProtocolLib.lib"
+ Parent = "IccProtocol_LIB"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/MeWrapper/MdesStatusCode/MdesStatusCode.cif b/Board/EM/MeWrapper/MdesStatusCode/MdesStatusCode.cif
new file mode 100644
index 0000000..8acdb06
--- /dev/null
+++ b/Board/EM/MeWrapper/MdesStatusCode/MdesStatusCode.cif
@@ -0,0 +1,10 @@
+<component>
+ name = "MdesStatusCode"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\MdesStatusCode"
+ RefName = "MdesStatusCode"
+[files]
+"MdesStatusCode.sdl"
+"MdesStatusCode.mak"
+"MdesStatusCodeDxe.c"
+<endComponent>
diff --git a/Board/EM/MeWrapper/MdesStatusCode/MdesStatusCode.mak b/Board/EM/MeWrapper/MdesStatusCode/MdesStatusCode.mak
new file mode 100644
index 0000000..ed2a77b
--- /dev/null
+++ b/Board/EM/MeWrapper/MdesStatusCode/MdesStatusCode.mak
@@ -0,0 +1,89 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MdesStatusCode/MdesStatusCode.mak 1 7/27/12 5:12a Klzhan $
+#
+# $Revision: 1 $
+#
+# $Date: 7/27/12 5:12a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MdesStatusCode/MdesStatusCode.mak $
+#
+# 1 7/27/12 5:12a Klzhan
+# [TAG] EIPNone
+# [Category] New Feature
+# [Description] Add support MDES
+# [Files] MdesStatusCode.cif
+# MdesStatusCode.sdl
+# MdesStatusCode.mak
+# MdesStatusCodeDxe.c
+#
+# 2 12/08/11 3:29a Klzhan
+# [TAG] EIPNone
+# [Category] Improvement
+# [Description] Fix build error when AMT disabled.
+#
+# 1 10/19/11 9:06a Calvinchen
+# [TAG] EIPNone
+# [Category] New Feature
+# [Description] Added MDES BIOS Status Code Support.
+# [Files] MdesStatusCode.cif
+# MdesStatusCode.sdl
+# MdesStatusCode.mak
+# MdesStatusCodeDxe.c
+#
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#---------------------------------------------------------------------------
+# Name: MeStatusCode.mak
+#
+# Description: AMT Status Code Makfile.
+#
+#---------------------------------------------------------------------------
+#<AMI_FHDR_END>
+
+#---------------------------------------------------------------------------
+# AMT StatusCode for DXE
+#---------------------------------------------------------------------------
+MdesStatusCodeIncludes =\
+ /I$(MeProtocolLib_DIR)\MePlatformPolicy \
+ $(ME_INCLUDES)\
+ /I$(MdesStatusCodeDrv_DIR)
+
+CORE_DXEBin : $(BUILD_DIR)\$(STATUS_CODE_DIR)\MdesStatusCodeDxe.obj
+
+$(BUILD_DIR)\$(STATUS_CODE_DIR)\MdesStatusCodeDxe.obj : $(MdesStatusCode_DIR)\MdesStatusCodeDxe.c
+ $(CC) $(CFLAGS:/W4=/W3) /DTIANO_RELEASE_VERSION=0x00080006 $(MdesStatusCodeIncludes) /DDXE_STATUS_CODE $(AlertStandardFormatDxe_INCLUDES) $(EDK_INCLUDES) $(STATUS_CODE_INCLUDES) /Fo$(BUILD_DIR)\$(STATUS_CODE_DIR)\MdesStatusCodeDxe.obj $(MdesStatusCode_DIR)\MdesStatusCodeDxe.c
+
+RUNTIMEBin : $(BUILD_DIR)\$(STATUS_CODE_DIR)\MdesStatusCodeRuntime.obj
+$(BUILD_DIR)\$(STATUS_CODE_DIR)\MdesStatusCodeRuntime.obj : $(MdesStatusCode_DIR)\MdesStatusCodeDxe.c
+ $(CC) $(CFLAGS:/W4=/W3) /DTIANO_RELEASE_VERSION=0x00080006 $(EDK_INCLUDES) $(STATUS_CODE_INCLUDES) /Fo$(BUILD_DIR)\$(STATUS_CODE_DIR)\MdesStatusCodeRuntime.obj $(MdesStatusCode_DIR)\MdesStatusCodeDxe.c
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MdesStatusCode/MdesStatusCode.sdl b/Board/EM/MeWrapper/MdesStatusCode/MdesStatusCode.sdl
new file mode 100644
index 0000000..d936706
--- /dev/null
+++ b/Board/EM/MeWrapper/MdesStatusCode/MdesStatusCode.sdl
@@ -0,0 +1,31 @@
+TOKEN
+ Name = "MdesStatusCode_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable MeStatusCode support in Project"
+ TokenType = Boolean
+ TargetH = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "MdesStatusCode_DIR"
+End
+
+MODULE
+ Help = "Includes MdesStatusCode.mak to Project"
+ File = "MdesStatusCode.mak"
+End
+
+ELINK
+ Name = "DXE(MdesBiosStatusCode),"
+ Parent = "ReportMiscStatus"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "DXE(MdesBiosStatusCodeInit),"
+ Parent = "StatusCodeInitialize"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/MeWrapper/MdesStatusCode/MdesStatusCodeDxe.c b/Board/EM/MeWrapper/MdesStatusCode/MdesStatusCodeDxe.c
new file mode 100644
index 0000000..3f46c3e
--- /dev/null
+++ b/Board/EM/MeWrapper/MdesStatusCode/MdesStatusCodeDxe.c
@@ -0,0 +1,206 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MdesStatusCode/MdesStatusCodeDxe.c 1 7/27/12 5:12a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 7/27/12 5:12a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MdesStatusCode/MdesStatusCodeDxe.c $
+//
+// 1 7/27/12 5:12a Klzhan
+// [TAG] EIPNone
+// [Category] New Feature
+// [Description] Add support MDES
+// [Files] MdesStatusCode.cif
+// MdesStatusCode.sdl
+// MdesStatusCode.mak
+// MdesStatusCodeDxe.c
+//
+// 1 10/19/11 9:06a Calvinchen
+// [TAG] EIPNone
+// [Category] New Feature
+// [Description] Added MDES BIOS Status Code Support.
+// [Files] MdesStatusCode.cif
+// MdesStatusCode.sdl
+// MdesStatusCode.mak
+// MdesStatusCodeDxe.c
+//
+//
+//**********************************************************************
+//
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: MdesStatusCodeDxe.c
+//
+// Description: Processes ASF messages for DXE.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+
+Module Name:
+
+ AmtStatusCodeDxe.c
+
+Abstract:
+ Processes ASF messages
+
+--*/
+
+//#include "Tiano.h"
+#include <AmiDxeLib.h>
+#ifdef DXE_STATUS_CODE
+#include <AmiDxeLib.h>
+#include <token.h>
+#include <Setup.h>
+#include "MePlatformPolicy.h"
+#include "MdesStatusCodeDxe.h"
+EFI_GUID gSetupGuid = SETUP_GUID;
+EFI_GUID gMdesStatusCodeProtocolGuid = MDES_STATUS_CODE_PROTOCOL_GUID;
+EFI_GUID gDxePlatformMePolicyGuid = DXE_PLATFORM_ME_POLICY_GUID;
+extern EFI_BOOT_SERVICES *pBS;
+#endif
+
+VOID MdesBiosStatusCode(
+ IN VOID **Dummy,
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId OPTIONAL,
+ IN EFI_STATUS_CODE_DATA *Data OPTIONAL
+)
+/*++
+Routine Description:
+
+ Provides an interface that a software module can call to report an ASF DXE status code.
+
+Arguments:
+
+ PeiServices - PeiServices pointer.
+
+ Type - Indicates the type of status code being reported.
+
+ Value - Describes the current status of a hardware or software entity.
+ This included information about the class and subclass that is
+ used to classify the entity as well as an operation.
+
+ Instance - The enumeration of a hardware or software entity within
+ the system. Valid instance numbers start with 1.
+
+ CallerId - This optional parameter may be used to identify the caller.
+ This parameter allows the status code driver to apply different
+ rules to different callers.
+
+ Data - This optional parameter may be used to pass additional data.
+
+Returns:
+
+ None
+
+--*/
+{
+#ifdef DXE_STATUS_CODE
+ //
+ // Do nothing, because AMT ASF driver will handle that.
+ //
+ EFI_STATUS Status;
+ MDES_STATUS_CODE_PROTOCOL *MdesStatusCodeProtocol;
+ static UINTN MdesEnable = 0;
+ static UINTN MdesEnableChecked = 0;
+ DXE_ME_POLICY_PROTOCOL *MePlatformPolicy;
+
+ if (MdesEnableChecked == 0) {
+ Status = pBS->LocateProtocol (&gDxePlatformMePolicyGuid, NULL, &MePlatformPolicy);
+ if (EFI_ERROR(Status)) {
+ //
+ // Check if GetVariable function has been initialized
+ //
+ return;
+ } else {
+ MdesEnableChecked = 1;
+ //
+ // set gfMDESCheck to 1 to lock geting variable next time
+ //
+ if (!(EFI_ERROR (Status))) {
+ if (MePlatformPolicy->MeConfig.MdesForBiosState == 1) {
+ //
+ // check if function is set in BIOS Menu
+ //
+ MdesEnable = 1;
+ }
+ }
+ }
+ }
+ if (MdesEnable == 1) {
+ Status = pBS->LocateProtocol (&gMdesStatusCodeProtocolGuid, NULL, &MdesStatusCodeProtocol);
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+
+ MdesStatusCodeProtocol->SendMdesStatusCode (Type, Value, Instance, CallerId, Data);
+ }
+#endif
+ return ;
+}
+
+EFI_STATUS
+MdesBiosStatusCodeInit(
+ IN EFI_HANDLE *ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+/*++
+Routine Description:
+
+ Init routine for DXE ASF StatusCode.
+
+Arguments:
+
+ FfsHeader - FfsHeader pointer.
+ PeiServices - PeiServices pointer.
+
+Returns:
+
+ EFI_SUCCESS - The function completed successfully
+
+--*/
+{
+ return EFI_SUCCESS;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.c b/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.c
new file mode 100644
index 0000000..db1c1ee
--- /dev/null
+++ b/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.c
@@ -0,0 +1,342 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePciPlatform/MePciPlatform.c 1 2/08/12 1:05a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:05a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePciPlatform/MePciPlatform.c $
+//
+// 1 2/08/12 1:05a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:41a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: MePciPlatform.c
+//
+// Description:
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+This file contains a 'Sample Driver' and is licensed as such
+under the terms of your license agreement with Intel or your
+vendor. This file may be modified by the user, subject to
+the additional terms of the license agreement
+
+--*/
+
+/*++
+Copyright (c) 2008 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ MePciPlatform.c
+
+Abstract:
+
+
+--*/
+#include "MePciPlatform.h"
+
+#define SETUP_GUID \
+ {0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9}
+EFI_GUID gSetupGuid = SETUP_GUID;
+//-jeff PLATFORM_INFO_PROTOCOL *gPlatformInfoProtocol;
+
+EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+EFI_PCI_PLATFORM_PROTOCOL *MePciPlatformInstance;
+PLATFORM_PCI_EXPRESS_BRIDGE *mPlatformPciExpressBridge;
+
+EFI_STATUS
+EFIAPI
+PhaseNotify (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE HostBridge,
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,
+ IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase
+ )
+/*++
+
+ Routine Description:
+ The PlatformNotify() function can be used to notify the platform driver so that
+ it can perform platform-specific actions. No specific actions are required.
+ Eight notification points are defined at this time. More synchronization points
+ may be added as required in the future. The PCI bus driver calls the platform driver
+ twice for every Phase-once before the PCI Host Bridge Resource Allocation Protocol
+ driver is notified, and once after the PCI Host Bridge Resource Allocation Protocol
+ driver has been notified.
+ This member function may not perform any error checking on the input parameters. It
+ also does not return any error codes. If this member function detects any error condition,
+ it needs to handle those errors on its own because there is no way to surface any
+ errors to the caller.
+
+ Arguments:
+ This - Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ HostBridge - The handle of the host bridge controller.
+ Phase - The phase of the PCI bus enumeration.
+ ChipsetPhase - Defines the execution phase of the PCI chipset driver.
+
+ Returns:
+ EFI_SUCCESS - The function completed successfully.
+
+--*/
+{
+/*
+ EFI_STATUS Status;
+
+ if (Phase == EfiPciHostBridgeEndBusAllocation && ChipsetPhase == ChipsetEntry) {
+ Status = HeciSetClockEnables (CurrentClockMask, CurrentClockEnables, TRUE);
+ }
+*/
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+PlatformPrepController (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE HostBridge,
+ IN EFI_HANDLE RootBridge,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
+ IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,
+ IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase
+ )
+/*++
+
+ Routine Description:
+ The PlatformPrepController() function can be used to notify the platform driver so that
+ it can perform platform-specific actions. No specific actions are required.
+ Several notification points are defined at this time. More synchronization points may be
+ added as required in the future. The PCI bus driver calls the platform driver twice for
+ every PCI controller-once before the PCI Host Bridge Resource Allocation Protocol driver
+ is notified, and once after the PCI Host Bridge Resource Allocation Protocol driver has
+ been notified.
+ This member function may not perform any error checking on the input parameters. It also
+ does not return any error codes. If this member function detects any error condition, it
+ needs to handle those errors on its own because there is no way to surface any errors to
+ the caller.
+
+ Arguments:
+ This - Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ HostBridge - The associated PCI host bridge handle.
+ RootBridge - The associated PCI root bridge handle.
+ PciAddress - The address of the PCI device on the PCI bus.
+ Phase - The phase of the PCI controller enumeration.
+ ChipsetPhase - Defines the execution phase of the PCI chipset driver.
+
+ Returns:
+ EFI_SUCCESS - The function completed successfully.
+
+--*/
+{
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+GetPlatformPolicy (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ OUT EFI_PCI_PLATFORM_POLICY *PciPolicy
+ )
+/*++
+
+ Routine Description:
+ The GetPlatformPolicy() function retrieves the platform policy regarding PCI
+ enumeration. The PCI bus driver and the PCI Host Bridge Resource Allocation Protocol
+ driver can call this member function to retrieve the policy.
+
+ Arguments:
+ This - Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ PciPolicy - The platform policy with respect to VGA and ISA aliasing.
+
+ Returns:
+ EFI_SUCCESS - The function completed successfully.
+ EFI_INVALID_PARAMETER - PciPolicy is NULL.
+
+--*/
+{
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+GetPciRom (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT VOID **RomImage,
+ OUT UINTN *RomSize
+ )
+/*++
+
+ Routine Description:
+ The GetPciRom() function gets the PCI device's option ROM from a platform-specific location.
+ The option ROM will be loaded into memory. This member function is used to return an image
+ that is packaged as a PCI 2.2 option ROM. The image may contain both legacy and EFI option
+ ROMs. See the EFI 1.10 Specification for details. This member function can be used to return
+ option ROM images for embedded controllers. Option ROMs for embedded controllers are typically
+ stored in platform-specific storage, and this member function can retrieve it from that storage
+ and return it to the PCI bus driver. The PCI bus driver will call this member function before
+ scanning the ROM that is attached to any controller, which allows a platform to specify a ROM
+ image that is different from the ROM image on a PCI card.
+
+ Arguments:
+ This - Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ PciHandle - The handle of the PCI device.
+ RomImage - If the call succeeds, the pointer to the pointer to the option ROM image.
+ Otherwise, this field is undefined. The memory for RomImage is allocated
+ by EFI_PCI_PLATFORM_PROTOCOL.GetPciRom() using the EFI Boot Service AllocatePool().
+ It is the caller's responsibility to free the memory using the EFI Boot Service
+ FreePool(), when the caller is done with the option ROM.
+ RomSize - If the call succeeds, a pointer to the size of the option ROM size. Otherwise,
+ this field is undefined.
+
+ Returns:
+ EFI_SUCCESS - The option ROM was available for this device and loaded into memory.
+ EFI_NOT_FOUND - No option ROM was available for this device.
+ EFI_OUT_OF_RESOURCES - No memory was available to load the option ROM.
+ EFI_DEVICE_ERROR - An error occurred in getting the option ROM.
+
+--*/
+{
+ return EFI_NOT_FOUND;
+}
+
+//
+// Driver entry point
+//
+EFI_DRIVER_ENTRY_POINT (MePlatformPolicyEntryPoint)
+
+//
+// Function implementations
+//
+EFI_STATUS
+EFIAPI
+MePciPlatformEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+/*++
+
+Routine Description:
+
+ Entry point for the Management Engine Driver.
+
+Arguments:
+
+ ImageHandle Image handle of this driver.
+ SystemTable Global system service table.
+
+Returns:
+
+ EFI_SUCCESS Initialization complete.
+ EFI_UNSUPPORTED The chipset is unsupported by this driver.
+ EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver.
+ EFI_DEVICE_ERROR Device error, driver exits abnormally.
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_HECI_PROTOCOL *Heci;
+ UINT32 MeMode;
+
+
+ EfiInitializeDriverLib (ImageHandle, SystemTable);
+
+ //
+ // Locate Heci protocol
+ //
+ Status = gBS->LocateProtocol (&gEfiHeciProtocolGuid, NULL, &Heci);
+ if (EFI_ERROR(Status)) {
+ DEBUG ((EFI_D_ERROR, "MePciPlatform locate Heci failed and the Status is %r\n", Status));
+ return Status;
+ }
+
+ Status = Heci->GetMeMode(&MeMode);
+ if (EFI_ERROR(Status)) {
+ DEBUG ((EFI_D_ERROR, "MePciPlatform Get Me mode failed and the Status is %r\n", Status));
+ return Status;
+ }
+ if (MeMode == ME_MODE_SECOVER) {
+ DEBUG ((EFI_D_ERROR, "SetICC doesn't supported in this mode\n"));
+ return EFI_UNSUPPORTED;
+ }
+
+ MePciPlatformInstance = (EFI_PCI_PLATFORM_PROTOCOL *) (UINTN) AllocatePool (sizeof (EFI_PCI_PLATFORM_PROTOCOL));
+
+ //-jeff Status = gBS->LocateProtocol(&gPlatformInfoProtocolGuid, NULL, &gPlatformInfoProtocol);
+ //-jeff ASSERT_EFI_ERROR (Status);
+
+ // Locate root bridge IO protocol
+ //
+ Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, &PciRootBridgeIo);
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ MePciPlatformInstance->PhaseNotify = PhaseNotify;
+ MePciPlatformInstance->PlatformPrepController = PlatformPrepController;
+ MePciPlatformInstance->GetPlatformPolicy = GetPlatformPolicy;
+ MePciPlatformInstance->GetPciRom = GetPciRom;
+
+ //
+ // Install the EFI_MANAGEMENT_ENGINE_PROTOCOL interface
+ //
+ Status = gBS->InstallProtocolInterface (
+ &ImageHandle,
+ &gEfiPciPlatformProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ MePciPlatformInstance
+ );
+
+ return Status;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.cif b/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.cif
new file mode 100644
index 0000000..3b2bea3
--- /dev/null
+++ b/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "MePciPlatform"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\MePciPlatform"
+ RefName = "MePciPlatform"
+[files]
+"MePciPlatform.c"
+"MePciPlatform.h"
+"MePciPlatform.sdl"
+"MePciPlatform.mak"
+"MePciPlatform.dxs"
+<endComponent>
diff --git a/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.dxs b/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.dxs
new file mode 100644
index 0000000..1a16fc8
--- /dev/null
+++ b/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.dxs
@@ -0,0 +1,98 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePciPlatform/MePciPlatform.dxs 1 2/08/12 1:05a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:05a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePciPlatform/MePciPlatform.dxs $
+//
+// 1 2/08/12 1:05a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:41a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: MePciPlatform.dxs
+//
+// Description:
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+This file contains a 'Sample Driver' and is licensed as such
+under the terms of your license agreement with Intel or your
+vendor. This file may be modified by the user, subject to
+the additional terms of the license agreement
+
+--*/
+
+/*++
+Copyright (c) 2008 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ MePciPlatform.dxs
+
+Abstract:
+
+ Dependency expression source file.
+
+--*/
+
+#include "EfiDepex.h"
+#include EFI_PROTOCOL_DEFINITION (Heci)
+#include EFI_PROTOCOL_DEFINITION (PciRootBridgeIo)
+
+DEPENDENCY_START
+ EFI_HECI_PROTOCOL_GUID AND
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.h b/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.h
new file mode 100644
index 0000000..818c3dc
--- /dev/null
+++ b/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.h
@@ -0,0 +1,154 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePciPlatform/MePciPlatform.h 1 2/08/12 1:05a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:05a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePciPlatform/MePciPlatform.h $
+//
+// 1 2/08/12 1:05a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:41a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: MePciPlatform.h
+//
+// Description:
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+This file contains a 'Sample Driver' and is licensed as such
+under the terms of your license agreement with Intel or your
+vendor. This file may be modified by the user, subject to
+the additional terms of the license agreement
+
+--*/
+
+/*++
+Copyright (c) 2008 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ MePciPlatform.h
+
+Abstract:
+
+
+--*/
+#ifndef _DXE_ME_PCI_PLATFORM_H_
+#define _DXE_ME_PCI_PLATFORM_H_
+
+#include "EdkIIGlueDxe.h"
+#include "MeLib.h"
+
+#include EFI_PROTOCOL_PRODUCER (PciPlatform)
+#include EFI_PROTOCOL_DEFINITION (PciRootBridgeIo)
+
+#define EFI_DRIVER_ENTRY_POINT(x)
+
+#define Flex0 (1 << 0)
+#define Flex1 (1 << 1)
+#define Flex2 (1 << 2)
+#define Flex3 (1 << 3)
+#define PCI_Clock0 (1 << 7)
+#define PCI_Clock1 (1 << 8)
+#define PCI_Clock2 (1 << 9)
+#define PCI_Clock3 (1 << 10)
+#define PCI_Clock4 (1 << 11)
+#define SRC0 (1 << 16)
+#define SRC1 (1 << 17)
+#define SRC2 (1 << 18)
+#define SRC3 (1 << 19)
+#define SRC4 (1 << 20)
+#define SRC5 (1 << 21)
+#define SRC6 (1 << 22)
+#define SRC7 (1 << 23)
+#define CSI_SRC8 (1 << 24)
+#define CSI_DP (1 << 25)
+#define PEG_A (1 << 26)
+#define PEG_B (1 << 27)
+#define DMI (1 << 28)
+
+#define PCI_SKIP 0xFF
+#define R_PCH_PCIE_SLSTS 0x5A
+
+typedef union _R_PCH_PCIE_SLSTS_VALUE {
+ UINT16 REG;
+ struct {
+ UINT16 ReservedBIT0 : 1;
+ UINT16 PFD : 1;
+ UINT16 MSC : 1;
+ UINT16 PDC : 1;
+ UINT16 ReservedBIT4 : 1;
+ UINT16 MS : 1;
+ UINT16 PDS : 1;
+ UINT16 ReservedBIT7 : 1;
+ UINT16 LASC : 1;
+ UINT16 Reserved : 7;
+ } Fields;
+} R_PCH_PCIE_SLSTS_VALUE;
+
+typedef union _PCI_CFG_ADDR {
+ UINT64 ADDR;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS Addr;
+} PCI_CFG_ADDR;
+
+typedef struct {
+ PCI_CFG_ADDR PciExpressBridgeAddress;
+ BOOLEAN HotPlugSupport;
+ UINT32 ClockEnables;
+} PLATFORM_PCI_EXPRESS_BRIDGE;
+
+#endif
+
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.mak b/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.mak
new file mode 100644
index 0000000..b9ea7e4
--- /dev/null
+++ b/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.mak
@@ -0,0 +1,122 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePciPlatform/MePciPlatform.mak 3 9/27/12 4:52a Klzhan $
+#
+# $Revision: 3 $
+#
+# $Date: 9/27/12 4:52a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePciPlatform/MePciPlatform.mak $
+#
+# 3 9/27/12 4:52a Klzhan
+# [TAG] EIP102254
+# [Category] Spec Update
+# [Severity] Important
+# [Description] Update ME RC 0.7
+#
+# 2 2/23/12 8:57a Klzhan
+# Support New EDK
+#
+# 1 2/08/12 1:05a Klzhan
+# Initial Check in
+#
+# 1 2/25/11 1:41a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:10a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name: MePciPlatform.h
+#
+# Description:
+#
+#----------------------------------------------------------------------------
+#<AMI_FHDR_END>
+All : MePciPlatform
+
+MePciPlatform : $(BUILD_DIR)\MePciPlatform.mak MePciPlatformBin
+
+$(BUILD_DIR)\MePciPlatform.mak : $(MePciPlatform_DIR)\$(@B).cif $(MePciPlatform_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(MePciPlatform_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+MePciPlatform_INCLUDES=\
+ $(EDK_INCLUDES) \
+ $(ME_INCLUDES) \
+ $(MISCFRAMEWORK_INCLUDES) \
+ $(NB_INCLUDES)\
+ $(SB_INCLUDES)\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+
+MePciPlatform_LIBS=\
+ $(EFIDRIVERLIB)\
+ $(MeProtocolLib_LIB)\
+ $(MeLibDxe_LIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueDxeMemoryAllocationLib_LIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+
+DxeCpuBuildDefine = \
+!IF "$(x64_BUILD)"=="1"
+ /DMDE_CPU_X64\
+!ELSE
+ /DMDE_CPU_IA32\
+!ENDIF
+
+MePciPlatform_DEFINES = \
+ $(DxeCpuBuildDefine)\
+
+MePciPlatformBin : $(MePciPlatform_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\MePciPlatform.mak all\
+ GUID=459C70C3-9344-4484-9F93-7822530D0D11\
+ "MY_INCLUDES = $(MePciPlatform_INCLUDES)" \
+ "MY_DEFINES=$(MePciPlatform_DEFINES)"\
+ ENTRY_POINT=MePciPlatformEntryPoint\
+ DEPEX1=$(MePciPlatform_DIR)\MePciPlatform.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ TYPE=BS_DRIVER\
+ COMPRESS=1
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.sdl b/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.sdl
new file mode 100644
index 0000000..5c9f445
--- /dev/null
+++ b/Board/EM/MeWrapper/MePciPlatform/MePciPlatform.sdl
@@ -0,0 +1,24 @@
+TOKEN
+ Name = "MePciPlatform_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable MePciPlatform support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "MePciPlatform_DIR"
+End
+
+MODULE
+ Help = "Includes MePciPlatform.mak to Project"
+ File = "MePciPlatform.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\MePciPlatform.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.c b/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.c
new file mode 100644
index 0000000..cdff1aa
--- /dev/null
+++ b/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.c
@@ -0,0 +1,692 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePlatformPolicy/MePlatformPolicy.c 14 5/14/14 10:33p Tristinchou $
+//
+// $Revision: 14 $
+//
+// $Date: 5/14/14 10:33p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePlatformPolicy/MePlatformPolicy.c $
+//
+// 14 5/14/14 10:33p Tristinchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Load ICC library while using ME 9.1
+//
+// 13 5/14/14 9:59p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 12 5/13/14 4:02a Tristinchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Fix BPF version check error while using MEBX 9.1
+//
+// 11 7/11/13 5:50a Klzhan
+// [TAG] EIP128534
+// [Category] Improvement
+// [Description] Restore Logo after information shows
+//
+// 10 6/21/13 3:07a Klzhan
+// [TAG] EIP127189
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC 1.60
+//
+// 9 5/13/13 2:39a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Fix build error when ICC_OVERCLOCKING_SUPPORT disabled.
+//
+// 8 12/07/12 5:12a Klzhan
+// [TAG] EIP107613
+// [Category] Improvement
+// [Description] Skip Send HECI protocol when Boot on Flash Update
+//
+// 7 12/04/12 5:56a Klzhan
+// [TAG] EIP107309
+// [Category] New Feature
+// [Description] Support ICC library for ME 9.5
+// [Files] MePlatformPolicy.c
+// MePlatformPolicy.h
+// MePlatformPolicy.sdl
+// MePlatformPolicy.mak
+// MePlatformPolicy.cif
+//
+// 6 9/27/12 4:49a Klzhan
+// [TAG] EIP102254
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC 0.7
+//
+// 5 7/02/12 11:34p Klzhan
+// [TAG] EIP94113
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC 0.6
+//
+// 4 5/14/12 4:40a Klzhan
+// [TAG] EIP89952
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC 0.56
+// [Files] MePlatformPolicy.c
+// MePlatformPolicy.h
+// MePlatformPolicy.sdl
+// MePlatformPolicy.mak
+// MePlatformPolicy.cif
+//
+// 3 4/23/12 11:13p Klzhan
+//
+// 2 4/03/12 8:11a Klzhan
+// [TAG] EIP86914
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC.
+//
+// 1 2/08/12 1:04a Klzhan
+// Initial Check in
+//
+// 10 9/26/11 5:46a Klzhan
+// [TAG] EIP70516
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME 8.0 RC 0.8
+//
+// 9 9/15/11 6:36a Klzhan
+// [TAG] EIP65738
+// [Category] Improvement
+// [Description] Disable SOL and IDER when AMT is disabled.
+//
+// 8 9/07/11 4:49a Klzhan
+// Get thermal reporting data from HOB.
+//
+// 7 7/26/11 8:25a Klzhan
+// [TAG] EIP64542
+// [Category] Improvement
+// [Description] Replace Getvariable by GetSBSetupData
+//
+// 6 7/26/11 6:33a Klzhan
+// Always_MeFwDowngrade
+//
+// 5 7/11/11 4:41a Klzhan
+// Fix system can't boot on ME FW 1076.
+//
+// 4 7/08/11 9:14a Klzhan
+// Restore to older ME Platform Policy module part.
+// To fix system hangs with other modules.
+//
+// 3 7/08/11 4:20a Klzhan
+// [TAG] EIP64189
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC to 0.7
+// [Files] MePlatformPolicy.c
+// MePlatformPolicy.h
+// MePlatformPolicy.sdl
+// MePlatformPolicy.mak
+// MePlatformPolicy.cif
+//
+// 2 4/18/11 9:47a Klzhan
+// Improvement : Move ME FW downgrade related code to ME platform policy.
+// Improvement : Update ME platform policy revision to 7.
+//
+// 1 2/25/11 1:41a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: MePlatformPolicy.c
+//
+// Description:
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+This file contains a 'Sample Driver' and is licensed as such
+under the terms of your license agreement with Intel or your
+vendor. This file may be modified by the user, subject to
+the additional terms of the license agreement
+
+--*/
+
+/*++
+Copyright (c) 2008 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ MePlatformPolicy.c
+
+Abstract:
+
+
+--*/
+#include "EdkIIGlueDxe.h"
+#include "MePlatformPolicy.h"
+#include "MeSetup.h"
+#include <SetupDataDefinition.h>
+#include "MeChipsetLib.h"
+#include <token.h>
+#if IccOverClocking_SUPPORT
+#include "IccProtocol.h"
+#endif
+DXE_ME_POLICY_PROTOCOL mDxePlatformMePolicy = { 0 };
+SETUP_DATA *gSetupData = NULL;
+EFI_MEBX_API_ENTRY_POINT HookedMebxEntryPoint;
+
+#define ME_INFO_SETUP_GUID \
+ {0x78259433, 0x7B6D, 0x4DB3, 0x9A, 0xE8, 0x36, 0xC4, 0xC2, 0xC3, 0xA1, 0x7D}
+
+EFI_GUID gSetupGuid = SETUP_GUID;
+EFI_GUID gEfiFirmwareVolumeProtocolGuid = EFI_FIRMWARE_VOLUME_PROTOCOL_GUID;
+EFI_GUID gMeSetupInfoGuid = ME_INFO_SETUP_GUID;
+EFI_GUID gEfiMebxProtocolGuid = INTEL_MEBX_PROTOCOL_GUID;
+
+//
+// Driver entry point
+//
+EFI_DRIVER_ENTRY_POINT (MePlatformPolicyEntryPoint)
+
+//
+// Module Global Variable
+//
+//TR_CONFIG mTrConfig = { 0 };
+
+//
+// TS DIMM thermal polling Smbus Address.
+// This is platform specific.
+//
+EFI_STATUS
+HookMebxEntry (
+ IN UINT32 BiosParams,
+ OUT UINT32 *MebxReturnValue
+)
+{
+ MEBX_BPF *MebxBpf = NULL;
+ ME_BIOS_EXTENSION_SETUP *MebxSetup = NULL;
+
+ MebxBpf = (MEBX_BPF*)BiosParams;
+ MebxSetup = (ME_BIOS_EXTENSION_SETUP*)MebxBpf->MeBiosSyncDataPtr;
+
+ //Modify the BPF version before MEBX entry
+ MebxBpf->BpfVersion = 0xA000;
+ MebxSetup->InterfaceVersion = 0xA000;
+
+ return HookedMebxEntryPoint( BiosParams, MebxReturnValue);
+}
+
+VOID
+MebxProtocolCallBack (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+)
+{
+ EFI_STATUS Status;
+ EFI_MEBX_PROTOCOL *MebxProtocol = NULL;
+
+ Status = gBS->LocateProtocol(
+ &gEfiMebxProtocolGuid,
+ NULL,
+ &MebxProtocol );
+ if( EFI_ERROR(Status) )
+ return;
+
+ //If MEBX version is 10, hook the entry to modify the BPF version
+ if( (MebxProtocol->MebxVersion.Major == 10) )
+ {
+ HookedMebxEntryPoint = MebxProtocol->CoreMebxEntry;
+ MebxProtocol->CoreMebxEntry = HookMebxEntry;
+ }
+
+ gBS->CloseEvent( Event );
+}
+
+UINT8 mTsDimmSmbusAddress[] = { 0x30, 0x34 };
+EFI_STATUS
+DummyHeciSendACK(
+ IN OUT UINT32 *Message,
+ IN OUT UINT32 Length,
+ IN OUT UINT32 *RecLength,
+ IN UINT8 HostAddress,
+ IN UINT8 MEAddress
+ )
+{
+ return EFI_SUCCESS;
+}
+//
+// Function implementations
+//
+EFI_STATUS
+EFIAPI
+MePlatformPolicyEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+/*++
+
+Routine Description:
+
+ Entry point for the Management Engine Driver.
+
+Arguments:
+
+ ImageHandle Image handle of this driver.
+ SystemTable Global system service table.
+
+Returns:
+
+ EFI_SUCCESS Initialization complete.
+ EFI_UNSUPPORTED The chipset is unsupported by this driver.
+ EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver.
+ EFI_DEVICE_ERROR Device error, driver exits abnormally.
+
+--*/
+{
+ EFI_STATUS Status;
+ SETUP_DATA SetupData;
+ UINT32 SetupVarAttr;
+ UINTN SetupVariableSize;
+ EFI_HECI_PROTOCOL *Heci;
+ UINT32 MeMode = ME_MODE_FAILED;
+ ME_INFO_SETUP_DATA MeInfoSetupData;
+ UINT8 Index = 0;
+ DXE_MBP_DATA_PROTOCOL *mBIOSPayLoad;
+ EFI_GUID gEfiHeciProtocolGuid = HECI_PROTOCOL_GUID;
+ EFI_GUID gDimmTsInfoGuid = DIMM_TS_INFO_GUID;
+ EFI_BOOT_MODE BootMode;
+ EFI_PEI_HOB_POINTERS HobList;
+ EFI_EVENT MebxProtocolEvent;
+ VOID *MebxProtocolReg = NULL;
+
+ EfiInitializeDriverLib (ImageHandle, SystemTable);
+ Status = gBS->LocateProtocol (
+ &gEfiHeciProtocolGuid,
+ NULL,
+ &Heci
+ );
+
+ if (EFI_ERROR(Status)) return EFI_SUCCESS;
+
+ EfiGetSystemConfigurationTable (&gEfiHobListGuid, &HobList.Raw);
+ if (HobList.Header->HobType != EFI_HOB_TYPE_HANDOFF) {
+ DEBUG ((EFI_D_ERROR, "(Wdt) Handoff Hob missing!\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ BootMode = HobList.HandoffInformationTable->BootMode;
+
+ if((BootMode == BOOT_ON_FLASH_UPDATE) ||
+ (BootMode == BOOT_ASSUMING_NO_CONFIGURATION_CHANGES))
+ {
+ // Install Dummy HECI protocol.
+ Heci->SendwACK = DummyHeciSendACK;
+ }
+
+
+ Status = Heci->GetMeMode (&MeMode);
+ //
+ // Default ME information for SETUP
+ //
+ MeInfoSetupData.MeFirmwareInfo = MeMode;
+ MeInfoSetupData.MeMajor = 0;
+ MeInfoSetupData.MeMinor = 0;
+ MeInfoSetupData.MeHotFix = 0;
+ MeInfoSetupData.MeBuildNo = 0;
+ //
+ // ME DXE Policy Init
+ //
+ mDxePlatformMePolicy.Revision = DXE_PLATFORM_ME_POLICY_PROTOCOL_REVISION_2;
+
+ SetupVarAttr = 0;
+ SetupVariableSize = sizeof(SETUP_DATA);
+ Status = gRT->GetVariable (
+ L"Setup",
+ &gSetupGuid,
+ &SetupVarAttr,
+ &SetupVariableSize,
+ &SetupData
+ );
+ if(EFI_ERROR(Status))
+ {
+ mDxePlatformMePolicy.MeConfig.MeFwDownGrade = 0;
+ SetupVarAttr = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE;
+ }
+
+ if(!EFI_ERROR(Status))
+ {
+ //
+ // Initialzie the Me Configuration
+ //
+ mDxePlatformMePolicy.MeConfig.EndOfPostEnabled = 1;
+ mDxePlatformMePolicy.MeConfig.MeLocalFwUpdEnabled = 0;
+ mDxePlatformMePolicy.MeConfig.MdesForBiosState = SetupData.MDESForBiosState;
+
+ //
+ // Please don't change the default value of EndOfPostDone,
+ // the value will be update to 1 after the moment EOP message should be sent
+ //
+ mDxePlatformMePolicy.MeConfig.EndOfPostDone = 0;
+
+
+ }else
+ {
+ // Default
+ mDxePlatformMePolicy.MeConfig.EndOfPostEnabled = 1;
+ mDxePlatformMePolicy.MeConfig.MeLocalFwUpdEnabled = 0;
+ }
+
+ //
+ // Thermal reporting policy is based on strap settings
+ //
+ MmioAndThenOr32 (
+ PCH_RCRB_BASE + R_PCH_SPI_FDOC,
+ (UINT32) (~(B_PCH_SPI_FDOC_FDSS_MASK | B_PCH_SPI_FDOC_FDSI_MASK)),
+ (UINT32) (V_PCH_SPI_FDOC_FDSS_PCHS | R_PCH_SPI_STRP15)
+ );
+ mDxePlatformMePolicy.MeReportError = ShowMeReportError;
+
+// Debug UpdateDxeMePlatformPolicy (&mMeDxePlatformPolicy);
+ mDxePlatformMePolicy.MeConfig.MeFwDownGrade = SetupData.MeFwDowngrade;
+ //
+ // If Me Fw is in ME_MODE_SECOVER, we will clear "Simple Firmware Downgrade" BIOS setup options
+ //
+ if (MeMode == ME_MODE_SECOVER) {
+ SetupData.MeFwDowngrade = 0;
+ }
+ Status = gBS->LocateProtocol (
+ &gMeBiosPayloadDataProtocolGuid,
+ NULL,
+ &mBIOSPayLoad
+ );
+ if(!EFI_ERROR(Status))
+ {
+ SetupData.MeImageType = (UINT8)mBIOSPayLoad->MeBiosPayload.FwPlatType.RuleData.Fields.IntelMeFwImageType;
+ SetupData.MeFirmwareInfo = MeMode;
+
+ MeInfoSetupData.MeMajor = mBIOSPayLoad->MeBiosPayload.FwVersionName.MajorVersion;
+ MeInfoSetupData.MeMinor = mBIOSPayLoad->MeBiosPayload.FwVersionName.MinorVersion;
+ MeInfoSetupData.MeHotFix = mBIOSPayLoad->MeBiosPayload.FwVersionName.HotfixVersion;
+ MeInfoSetupData.MeBuildNo = mBIOSPayLoad->MeBiosPayload.FwVersionName.BuildVersion;
+ }
+#if IccOverClocking_SUPPORT
+ if((MeInfoSetupData.MeMajor == 9) && (MeInfoSetupData.MeMinor == 5))
+ {
+ EFI_GUID gIcc95Guid = ICC_9_5_GUID;
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &ImageHandle,
+ &gIcc95Guid,
+ NULL,
+ NULL
+ );
+ }
+
+ if( (MeInfoSetupData.MeMajor == 9) &&
+ ((MeInfoSetupData.MeMinor == 0) || (MeInfoSetupData.MeMinor == 1)) )
+ {
+ EFI_GUID gIcc90Guid = ICC_9_0_GUID;
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &ImageHandle,
+ &gIcc90Guid,
+ NULL,
+ NULL
+ );
+ }
+#endif
+ Status = gRT->SetVariable (
+ L"MeInfoSetup",
+ &gMeSetupInfoGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ sizeof(MeInfoSetupData),
+ &MeInfoSetupData
+ );
+
+ Status = gRT->SetVariable (
+ L"Setup",
+ &gSetupGuid,
+ SetupVarAttr,
+ sizeof(SETUP_DATA),
+ &SetupData
+ );
+
+ //Create the event for MEBX_PROTOCOL
+ Status = gBS->CreateEvent(
+ EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_NOTIFY,
+ MebxProtocolCallBack,
+ NULL,
+ &MebxProtocolEvent );
+
+ Status = gBS->RegisterProtocolNotify(
+ &gEfiMebxProtocolGuid,
+ MebxProtocolEvent,
+ &MebxProtocolReg );
+
+ //
+ // Install protocol to to allow access to this Policy.
+ //
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &ImageHandle,
+ &gDxePlatformMePolicyGuid,
+ &mDxePlatformMePolicy,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+#include EFI_PROTOCOL_CONSUMER (ConsoleControl)
+#include EFI_PROTOCOL_CONSUMER (GraphicsOutput)
+EFI_CONSOLE_CONTROL_PROTOCOL *ConsoleControl;
+EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput;
+EFI_CONSOLE_CONTROL_SCREEN_MODE ScreenMode;
+UINTN UgaBltSize = 0;
+EFI_UGA_PIXEL *UgaBlt = NULL;
+VOID
+GraphicsSave
+(
+ VOID
+)
+{
+ EFI_STATUS
+ Status = gBS->LocateProtocol( &gEfiConsoleControlProtocolGuid, NULL, &ConsoleControl);
+
+ if(EFI_ERROR(Status))
+ {
+ ConsoleControl = NULL;
+ return;
+ }
+
+ Status = ConsoleControl->GetMode(ConsoleControl, &ScreenMode, NULL, NULL);
+ if(ScreenMode == EfiConsoleControlScreenText)
+ {
+ ConsoleControl = NULL;
+ return;
+ }
+
+ Status = gBS->LocateProtocol( &gEfiGraphicsOutputProtocolGuid, NULL, &GraphicsOutput);
+ if(EFI_ERROR(Status))
+ {
+ GraphicsOutput = NULL;
+ return;
+ }
+ UgaBltSize = GraphicsOutput->Mode->Info[GraphicsOutput->Mode->Mode].HorizontalResolution *
+ GraphicsOutput->Mode->Info[GraphicsOutput->Mode->Mode].VerticalResolution *
+ sizeof(EFI_UGA_PIXEL);
+
+ UgaBlt = AllocateZeroPool (UgaBltSize);
+
+ Status = GraphicsOutput->Blt(
+ GraphicsOutput,
+ UgaBlt,
+ EfiBltVideoToBltBuffer,
+ 0, 0,
+ 0, 0,
+ GraphicsOutput->Mode->Info->HorizontalResolution,
+ GraphicsOutput->Mode->Info->VerticalResolution,
+ 0);
+
+ Status = ConsoleControl->SetMode( ConsoleControl, EfiConsoleControlScreenText );
+}
+
+VOID
+GraphicsRestore
+(
+ VOID
+)
+{
+ if(!ConsoleControl)
+ return;
+
+ ConsoleControl->SetMode( ConsoleControl, EfiConsoleControlScreenGraphics );
+
+ if(!GraphicsOutput)
+ return;
+
+ GraphicsOutput->Blt(
+ GraphicsOutput,
+ UgaBlt,
+ EfiBltBufferToVideo,
+ 0, 0,
+ 0, 0,
+ GraphicsOutput->Mode->Info->HorizontalResolution,
+ GraphicsOutput->Mode->Info->VerticalResolution,
+ 0);
+
+}
+VOID
+ShowMeReportError (
+ IN ME_ERROR_MSG_ID MsgId
+ )
+/*++
+
+Routine Description:
+
+ Show Me Error message.
+
+Arguments:
+
+ MsgId Me error message ID.
+
+Returns:
+
+ None.
+
+--*/
+{
+ UINTN MsgDelay;
+
+ MsgDelay = HECI_MSG_DELAY;
+ GraphicsSave();
+ gST->ConOut->ClearScreen (gST->ConOut);
+
+ switch (MsgId) {
+ case MSG_EOP_ERROR:
+ gST->ConOut->OutputString (gST->ConOut, L"Error sending End Of Post message to ME, System HALT!\n");
+ break;
+
+ case MSG_ME_FW_UPDATE_FAILED:
+ gST->ConOut->OutputString (gST->ConOut, L"ME FW Update Failed, please try again!\n");
+ break;
+
+ case MSG_ASF_BOOT_DISK_MISSING:
+ gST->ConOut->OutputString (gST->ConOut, L"Boot disk missing, please insert boot disk and press ENTER\r\n");
+ break;
+
+ case MSG_KVM_TIMES_UP:
+ gST->ConOut->OutputString (gST->ConOut, L"Error!! Times up and the KVM session was cancelled!!");
+ break;
+
+ case MSG_KVM_REJECTED:
+ gST->ConOut->OutputString (gST->ConOut, L"Error!! The request has rejected and the KVM session was cancelled!!");
+ break;
+
+ case MSG_HMRFPO_LOCK_FAILURE:
+ gST->ConOut->OutputString (gST->ConOut, L"(A7) Me FW Downgrade - Request MeSpiLock Failed\n");
+ break;
+
+ case MSG_HMRFPO_UNLOCK_FAILURE:
+ gST->ConOut->OutputString (gST->ConOut, L"(A7) Me FW Downgrade - Request MeSpiEnable Failed\n");
+ break;
+
+ case MSG_ME_FW_UPDATE_WAIT:
+ gST->ConOut->OutputString (
+ gST->ConOut,
+ L"Intel(R) Firmware Update is in progress. It may take up to 90 seconds. Please wait.\n"
+ );
+ break;
+
+ case MSG_ILLEGAL_CPU_PLUGGED_IN:
+ gST->ConOut->OutputString (
+ gST->ConOut,
+ L"\n\n\rAn unsupported CPU/PCH configuration has been identified.\n"
+ );
+ gST->ConOut->OutputString (
+ gST->ConOut,
+ L"\rPlease refer to the Haswell Platform Validation Matrix\n\rfor supported CPU/PCH combinations."
+ );
+ break;
+
+ case MSG_KVM_WAIT:
+ gST->ConOut->OutputString (gST->ConOut, L"Waiting Up to 8 Minutes For KVM FW.....");
+ break;
+
+ case MSG_PLAT_DISABLE_WAIT:
+ gST->ConOut->OutputString (gST->ConOut, L"WARNING! Firmware encountered errors and will reboot the platform in 30 minutes.");
+ MsgDelay = 5 * HECI_MSG_DELAY;
+ break;
+
+ default:
+ DEBUG ((EFI_D_ERROR, "This Message Id hasn't been defined yet, MsgId = %x\n", MsgId));
+ break;
+ }
+
+ gBS->Stall (MsgDelay);
+ GraphicsRestore();
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.cif b/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.cif
new file mode 100644
index 0000000..8db83d4
--- /dev/null
+++ b/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.cif
@@ -0,0 +1,13 @@
+<component>
+ name = "MePlatformPolicy"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\MePlatformPolicy"
+ RefName = "MePlatformPolicy"
+[files]
+"MePlatformPolicy.c"
+"MePlatformPolicy.h"
+"MePlatformPolicy.sdl"
+"MePlatformPolicy.mak"
+[parts]
+"MePeiPolicyInit"
+<endComponent>
diff --git a/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.h b/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.h
new file mode 100644
index 0000000..f90a135
--- /dev/null
+++ b/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.h
@@ -0,0 +1,232 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePlatformPolicy/MePlatformPolicy.h 3 5/13/14 4:02a Tristinchou $
+//
+// $Revision: 3 $
+//
+// $Date: 5/13/14 4:02a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePlatformPolicy/MePlatformPolicy.h $
+//
+// 3 5/13/14 4:02a Tristinchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Fix BPF version check error while using MEBX 9.1
+//
+// 2 5/14/12 4:40a Klzhan
+// [TAG] EIP89952
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC 0.56
+// [Files] MePlatformPolicy.c
+// MePlatformPolicy.h
+// MePlatformPolicy.sdl
+// MePlatformPolicy.mak
+// MePlatformPolicy.cif
+//
+// 1 2/08/12 1:04a Klzhan
+// Initial Check in
+//
+// 5 9/07/11 4:49a Klzhan
+// Get thermal reporting data from HOB.
+//
+// 4 7/11/11 4:41a Klzhan
+// Fix system can't boot on ME FW 1076.
+//
+// 3 7/08/11 9:14a Klzhan
+// Restore to older ME Platform Policy module part.
+// To fix system hangs with other modules.
+//
+// 2 7/08/11 4:20a Klzhan
+// [TAG] EIP64189
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC to 0.7
+// [Files] MePlatformPolicy.c
+// MePlatformPolicy.h
+// MePlatformPolicy.sdl
+// MePlatformPolicy.mak
+// MePlatformPolicy.cif
+//
+// 1 2/25/11 1:41a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: MePlatformPolicy.h
+//
+// Description:
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+This file contains a 'Sample Driver' and is licensed as such
+under the terms of your license agreement with Intel or your
+vendor. This file may be modified by the user, subject to
+the additional terms of the license agreement
+
+--*/
+
+/*++
+Copyright (c) 2008 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ MePlatformPolicy.h
+
+Abstract:
+
+
+--*/
+#ifndef _DXE_ME_PLATFORM_POLICY_H_
+#define _DXE_ME_PLATFORM_POLICY_H_
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+#endif
+
+#include EFI_PROTOCOL_PRODUCER (MEPlatformPolicy)
+#include "PchAccess.h"
+#include "token.h"
+#include "MeLib.h"
+#include "HeciRegs.h"
+#include "MeChipset.h"
+// Debug #include "MePlatformPolicyUpdateDxeLib.h"
+
+#include EFI_PROTOCOL_DEFINITION (PciRootBridgeIo)
+#include EFI_PROTOCOL_CONSUMER (MePlatformPolicy)
+#include EFI_PROTOCOL_CONSUMER (MebxProtocol)
+#include EFI_GUID_DEFINITION (MeBiosExtensionSetup)
+#if EFI_SPECIFICATION_VERSION<=0x20000
+#include EFI_PROTOCOL_DEFINITION (Hii)
+#include EFI_PROTOCOL_DEFINITION (FormCallBack)
+#endif
+#define EFI_DRIVER_ENTRY_POINT(x)
+
+#define DIMM_TS_INFO_GUID \
+ { \
+ 0xce673a28, 0x800d, 0x4b4a, 0x83, 0x16, 0x26, 0x61, 0xf9, 0xb3, 0xd9, 0xc6 \
+ }
+
+#define HECI_MSG_DELAY 2000000 // show warning msg and stay for 2 seconds.
+#ifndef GUID_VARIABLE_DECLARATION
+#define GUID_VARIABLE_DECLARATION(Variable, Guid) extern EFI_GUID Variable
+#endif
+typedef struct{
+ UINT8 MeFirmwareInfo;
+ UINT32 MeMajor;
+ UINT32 MeMinor;
+ UINT32 MeHotFix;
+ UINT32 MeBuildNo;
+} ME_INFO_SETUP_DATA;
+#ifndef TS_DIMM1_SMBUS_ADDRESS
+#define TS_DIMM1_SMBUS_ADDRESS 0x30
+#endif
+
+#ifndef TS_DIMM2_SMBUS_ADDRESS
+#define TS_DIMM2_SMBUS_ADDRESS 0x32
+#endif
+
+#ifndef TS_DIMM3_SMBUS_ADDRESS
+#define TS_DIMM3_SMBUS_ADDRESS 0x34
+#endif
+
+#ifndef TS_DIMM4_SMBUS_ADDRESS
+#define TS_DIMM4_SMBUS_ADDRESS 0x36
+#endif
+
+#define SETUP_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+
+typedef struct _MEBX_DEBUG_FLAGS_ {
+ UINT16 Port80 : 1; ///< Port 80h
+ UINT16 Rsvd : 15; ///< Reserved
+} MEBX_DEBUG_FLAGS;
+
+typedef struct _MEBX_OEM_RESOLUTION_SETTINGS_ {
+ UINT16 MebxNonUiTextMode : 4;
+ UINT16 MebxUiTextMode : 4;
+ UINT16 MebxGraphicsMode : 4;
+ UINT16 Rsvd : 4;
+} MEBX_OEM_RESOLUTION_SETTINGS;
+
+typedef struct {
+ UINT16 BpfVersion;
+ UINT8 CpuReplacementTimeout;
+ UINT8 Reserved[7];
+ UINT8 ActiveRemoteAssistanceProcess;
+ UINT8 CiraTimeout;
+ UINT16 OemFlags;
+ MEBX_DEBUG_FLAGS MebxDebugFlags;
+ UINT32 MeBiosSyncDataPtr;
+ UINT32 UsbKeyDataStructurePtr;
+ MEBX_OEM_RESOLUTION_SETTINGS OemResolutionSettings;
+ UINT8 Reserved3[0x2E];
+} MEBX_BPF;
+
+VOID
+EFIAPI
+ShowMeReportError (
+ IN ME_ERROR_MSG_ID MsgId
+ )
+/*++
+
+Routine Description:
+
+ Show Me Error message.
+
+Arguments:
+
+ MsgId Me error message ID.
+
+Returns:
+
+ None.
+
+--*/
+;
+#endif
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.mak b/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.mak
new file mode 100644
index 0000000..21937b0
--- /dev/null
+++ b/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.mak
@@ -0,0 +1,139 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePlatformPolicy/MePlatformPolicy.mak 4 12/04/12 5:57a Klzhan $
+#
+# $Revision: 4 $
+#
+# $Date: 12/04/12 5:57a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePlatformPolicy/MePlatformPolicy.mak $
+#
+# 4 12/04/12 5:57a Klzhan
+# [TAG] EIP107309
+# [Category] New Feature
+# [Description] Support ICC library for ME 9.5
+# [Files] MePlatformPolicy.c
+# MePlatformPolicy.h
+# MePlatformPolicy.sdl
+# MePlatformPolicy.mak
+# MePlatformPolicy.cif
+#
+# 3 4/23/12 11:13p Klzhan
+#
+# 2 2/23/12 8:56a Klzhan
+# Support New EDK
+#
+# 1 2/08/12 1:04a Klzhan
+# Initial Check in
+#
+# 5 9/07/11 4:49a Klzhan
+# Get thermal reporting data from HOB.
+#
+# 4 7/26/11 8:23a Klzhan
+# [TAG] EIP64542
+# [Category] Improvement
+# [Description] Replace GetSbSetupData.
+#
+# 3 7/11/11 4:41a Klzhan
+# Fix system can't boot on ME FW 1076.
+#
+# 2 7/08/11 4:20a Klzhan
+# [TAG] EIP64189
+# [Category] Spec Update
+# [Severity] Important
+# [Description] Update ME RC to 0.7
+# [Files] MePlatformPolicy.c
+# MePlatformPolicy.h
+# MePlatformPolicy.sdl
+# MePlatformPolicy.mak
+# MePlatformPolicy.cif
+#
+# 1 2/25/11 1:41a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:09a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name: MePlatformPolicy.mak
+#
+# Description:
+#
+#----------------------------------------------------------------------------
+#<AMI_FHDR_END>
+All : MePlatformPolicy
+
+MePlatformPolicy : $(BUILD_DIR)\MePlatformPolicy.mak MePlatformPolicyBin
+
+$(BUILD_DIR)\MePlatformPolicy.mak : $(MePlatformPolicy_DIR)\$(@B).cif $(MePlatformPolicy_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(MePlatformPolicy_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+MePlatformPolicy_INCLUDES=\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(ME_INCLUDES) \
+ $(MISCFRAMEWORK_INCLUDES) \
+ $(NB_INCLUDES)\
+ $(SB_INCLUDES)\
+ /I$(PROJECT_DIR)\
+ /IInclude\
+ /I$(IccOverClocking_DIR)\
+ /I$(INTEL_COUGAR_POINT_INCLUDE_DIR)
+
+MePlatformPolicy_LIBS=\
+ $(EdkIIGlueBaseLib_LIB)\
+ $(EFIDRIVERLIB)\
+ $(MeProtocolLib_LIB)\
+ $(MeLibDxe_LIB)\
+ $(MeChipsetDxeLib_LIB)\
+ $(EdkIIGlueDxeMemoryAllocationLib_LIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+
+MePlatformPolicyBin : $(MePlatformPolicy_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\MePlatformPolicy.mak all\
+ GUID=BA67550C-3628-4137-A53E-42660E081604\
+ "MY_INCLUDES = $(MePlatformPolicy_INCLUDES)" \
+ ENTRY_POINT=MePlatformPolicyEntryPoint\
+ TYPE=BS_DRIVER\
+ COMPRESS=1
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.sdl b/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.sdl
new file mode 100644
index 0000000..4588fa3
--- /dev/null
+++ b/Board/EM/MeWrapper/MePlatformPolicy/MePlatformPolicy.sdl
@@ -0,0 +1,24 @@
+TOKEN
+ Name = "MePlatformPolicy_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable MePlatformPolicy support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "MePlatformPolicy_DIR"
+End
+
+MODULE
+ Help = "Includes MePlatformPolicy.mak to Project"
+ File = "MePlatformPolicy.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\MePlatformPolicy.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.c b/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.c
new file mode 100644
index 0000000..f534303
--- /dev/null
+++ b/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.c
@@ -0,0 +1,196 @@
+/*++
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+--*/
+
+/*++
+
+Copyright (c) 1999 - 2010 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ MePeiPolicyInit.c
+
+Abstract:
+
+ This file is SampleCode for Intel ME PEI Platform Policy initialzation.
+
+--*/
+#include <Token.h>
+#include "MePeiPolicyInit.h"
+#include <Ppi\PchPlatformPolicy\PchPlatformPolicy.h>
+#include <SetupDataDefinition.h>
+
+#define SETUP_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+static EFI_GUID gSetupGuid = SETUP_GUID;
+
+
+//
+// Function implementations
+//
+VOID
+PrepareThermalHob (
+ IN EFI_PEI_SERVICES **PeiServices
+)
+{
+ EFI_STATUS Status;
+ EFI_HOB_GUID_TYPE *Hob;
+ UINT8 TsOnDimm[4];
+ EFI_GUID gPchPolicyPpiGuid = PCH_PLATFORM_POLICY_PPI_GUID;
+ PCH_PLATFORM_POLICY_PPI *PchPlatformPolicy;
+ EFI_GUID gDimmTsInfoGuid = DIMM_TS_INFO_GUID;
+
+ Status = (**PeiServices).LocatePpi (PeiServices, &gPchPolicyPpiGuid, 0,
+ NULL, (VOID **)&PchPlatformPolicy);
+
+ if(EFI_ERROR(Status))
+ {
+ return;
+ }
+ // Build the GUID'd HOB for DXE
+ Status = (*PeiServices)->CreateHob (
+ PeiServices,
+ EFI_HOB_TYPE_GUID_EXTENSION,
+ (UINT16) (sizeof (EFI_HOB_GUID_TYPE) + 4),
+ &Hob
+ );
+
+ if (EFI_ERROR (Status))return;
+
+ ((EFI_HOB_GUID_TYPE *)(Hob))->Name = gDimmTsInfoGuid;
+
+ Hob++;
+
+//- TsOnDimm[0] = PchPlatformPolicy->ThermalReportConfig->ThermalReportControl->Dimm1TempReadEnable;
+//- TsOnDimm[1] = PchPlatformPolicy->ThermalReportConfig->ThermalReportControl->Dimm2TempReadEnable;
+//- TsOnDimm[2] = PchPlatformPolicy->ThermalReportConfig->ThermalReportControl->Dimm3TempReadEnable;
+//- TsOnDimm[3] = PchPlatformPolicy->ThermalReportConfig->ThermalReportControl->Dimm4TempReadEnable;
+
+ GlueCopyMem (Hob, TsOnDimm, sizeof(TsOnDimm));
+
+}
+
+EFI_STATUS
+MePeiPolicyInitEntryPoint (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+/*++
+
+Routine Description:
+
+ Initilize Intel ME PEI Platform Policy
+
+Arguments:
+
+ FfsHeader Pointer to Firmware File System file header.
+ PeiServices General purpose services available to every PEIM.
+
+Returns:
+
+ EFI_STATUS
+
+--*/
+{
+ EFI_STATUS Status;
+ PEI_ME_PLATFORM_POLICY_PPI *MePlatformPolicyPpi;
+ EFI_PEI_PPI_DESCRIPTOR *MePlatformPolicyPpiDesc;
+ EFI_PEI_READ_ONLY_VARIABLE_PPI *VariableServices;
+ UINTN VariableSize;
+ SETUP_DATA SetupData;
+
+ //
+ // Allocate descriptor and PPI structures
+ //
+ MePlatformPolicyPpi = (PEI_ME_PLATFORM_POLICY_PPI *) AllocateZeroPool (sizeof (PEI_ME_PLATFORM_POLICY_PPI));
+ ASSERT (MePlatformPolicyPpi != NULL);
+ if (MePlatformPolicyPpi == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ MePlatformPolicyPpiDesc = (EFI_PEI_PPI_DESCRIPTOR *) AllocateZeroPool (sizeof (EFI_PEI_PPI_DESCRIPTOR));
+ ASSERT (MePlatformPolicyPpiDesc != NULL);
+ if (MePlatformPolicyPpiDesc == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Locate Variable Ppi
+ //
+ Status = (*PeiServices)->LocatePpi(PeiServices,
+ &gPeiReadOnlyVariablePpiGuid,
+ 0,
+ NULL,
+ &VariableServices);
+
+ //
+ // Make sure we have a PPI, if not, just return.
+ //
+ if (!VariableServices) {
+ return EFI_UNSUPPORTED;
+ }
+ VariableSize = sizeof(SETUP_DATA);
+ //
+ // Get Setup Variable
+ //
+ Status = VariableServices->PeiGetVariable (
+ PeiServices,
+ L"Setup",
+ &gSetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData);
+
+ //
+ // Update Itnel PPT
+ //
+ if ( !EFI_ERROR(Status) ) {
+#if IntelPTT_SUPPORT
+ MePlatformPolicyPpi->FTpmSwitch = SetupData.FTpmSwitch;
+#else
+ MePlatformPolicyPpi->FTpmSwitch = 0;
+#endif
+ } else {
+ MePlatformPolicyPpi->FTpmSwitch = 0;
+ }
+
+ //
+ // Initialize the PPI
+ //
+ MePlatformPolicyPpiDesc->Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
+ MePlatformPolicyPpiDesc->Guid = &gPeiMePlatformPolicyPpiGuid;
+
+ //
+ // Update the REVISION number
+ //
+ MePlatformPolicyPpi->Revision = PEI_ME_PLATFORM_POLICY_PPI_REVISION_2;
+
+
+ //
+ // Initialize the Platform Configuration
+ //
+// Debug UpdatePeiMePlatformPolicy (PeiServices, MePlatformPolicyPpi);
+
+ MePlatformPolicyPpiDesc->Ppi = MePlatformPolicyPpi;
+
+ ///
+ /// TBD put initialize codes in here if needs
+ ///
+ ///
+ /// Install the ME PEI Platform Policy PPI
+ ///
+ Status = (**PeiServices).InstallPpi (PeiServices, MePlatformPolicyPpiDesc);
+ ASSERT_PEI_ERROR (PeiServices, Status);
+ DEBUG ((EFI_D_INFO, "ME PEI Platform Policy PPI Installed\n"));
+
+ return Status;
+}
diff --git a/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.cif b/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.cif
new file mode 100644
index 0000000..2c5d34f
--- /dev/null
+++ b/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "MePeiPolicyInit"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\MePlatformPolicy\Pei"
+ RefName = "MePeiPolicyInit"
+[files]
+"MePeiPolicyInit.c"
+"MePeiPolicyInit.h"
+"MePeiPolicyInit.sdl"
+"MePeiPolicyInit.mak"
+"MePeiPolicyInit.dxs"
+<endComponent>
diff --git a/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.dxs b/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.dxs
new file mode 100644
index 0000000..01778d0
--- /dev/null
+++ b/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.dxs
@@ -0,0 +1,35 @@
+/*++
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+--*/
+
+/*++
+
+Copyright (c) 1999 - 2010 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ MePeiPolicyInit.dxs
+
+Abstract:
+
+ Dependency expression source file.
+
+--*/
+
+#include "EfiDepex.h"
+#include <Ppi\PchPlatformPolicy\PchPlatformPolicy.h>
+DEPENDENCY_START
+ PCH_PLATFORM_POLICY_PPI_GUID
+DEPENDENCY_END
+
+
diff --git a/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.h b/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.h
new file mode 100644
index 0000000..5d64667
--- /dev/null
+++ b/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.h
@@ -0,0 +1,64 @@
+/*++
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+--*/
+
+/*++
+
+Copyright (c) 1999 - 2010 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ MePeiPolicyInit.h
+
+Abstract:
+
+ Header file for the MePeiPolicyInit PEIM.
+
+--*/
+#ifndef _ME_PEI_PLATFORM_POLICY_H_
+#define _ME_PEI_PLATFORM_POLICY_H_
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGluePeim.h"
+#endif
+
+#include EFI_PPI_DEFINITION (MePlatformPolicyPei)
+// Debug #include "MePlatformPolicyUpdatePeiLib.h"
+#define DIMM_TS_INFO_GUID \
+ { \
+ 0xce673a28, 0x800d, 0x4b4a, 0x83, 0x16, 0x26, 0x61, 0xf9, 0xb3, 0xd9, 0xc6 \
+ }
+
+EFI_STATUS
+MePeiPolicyInitEntryPoint (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+/*++
+
+Routine Description:
+
+ Initilize Intel ME PEI Platform Policy
+
+Arguments:
+
+ FfsHeader Pointer to Firmware File System file header.
+ PeiServices General purpose services available to every PEIM.
+
+Returns:
+
+ EFI_STATUS
+
+--*/
+;
+#endif
diff --git a/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.mak b/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.mak
new file mode 100644
index 0000000..4a097e0
--- /dev/null
+++ b/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.mak
@@ -0,0 +1,111 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePlatformPolicy/MePeiPolicyInit/MePeiPolicyInit.mak 2 2/23/12 8:56a Klzhan $
+#
+# $Revision: 2 $
+#
+# $Date: 2/23/12 8:56a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MePlatformPolicy/MePeiPolicyInit/MePeiPolicyInit.mak $
+#
+# 2 2/23/12 8:56a Klzhan
+# Support New EDK
+#
+# 1 2/08/12 1:05a Klzhan
+# Initial Check in
+#
+# 1 3/29/11 4:53a Klzhan
+#
+# 1 2/25/11 1:45a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:11a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: AmtPlatformPolicy.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+All : MEPeiPolicyInit
+
+MEPeiPolicyInit : $(BUILD_DIR)\MEPeiPolicyInit.mak MEPeiPolicyInitBin
+
+$(BUILD_DIR)\MEPeiPolicyInit.mak : $(MEPeiPlatformPolicy_DIR)\$(@B).cif $(MEPeiPlatformPolicy_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(MEPeiPlatformPolicy_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+MEPeiPlatformPolicy_INCLUDES=\
+ $(EDK_INCLUDES)\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(ME_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)
+
+
+MEPeiPlatformPolicy_DEFINES=$(MY_DEFINES)\
+ /D "__EDKII_GLUE_MODULE_ENTRY_POINT__=MePeiPolicyInitEntryPoint" \
+ /D __EDKII_GLUE_BASE_LIB__ \
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_PEI_SERVICES_LIB__ \
+ /D __EDKII_GLUE_PEI_MEMORY_ALLOCATION_LIB__ \
+
+MEPeiPlatformPolicy_LIBS=\
+ $(EDKPROTOCOLLIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+ $(EdkIIGlueBaseLibIA32_LIB)\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGluePeiDebugLibReportStatusCode_LIB)\
+ $(EdkIIGluePeiReportStatusCodeLib_LIB)\
+ $(EdkIIGluePeiServicesLib_LIB)\
+ $(MeLibPpi_LIB)\
+ $(EdkIIGluePeiHobLib_LIB)\
+ $(EdkIIGluePeiMemoryAllocationLib_LIB)\
+ $(PEILIB)
+
+MEPeiPolicyInitBin : $(MEPeiPlatformPolicy_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\MEPeiPolicyInit.mak all\
+ GUID=12C67BE1-AD2E-4f13-A95F-6EDC2C4392DE\
+ "MY_INCLUDES = $(MEPeiPlatformPolicy_INCLUDES)" \
+ "MY_DEFINES=$(MEPeiPlatformPolicy_DEFINES)"\
+ ENTRY_POINT=MePeiPolicyInitEntryPoint\
+ TYPE=PEIM\
+ EDKIIModule=PEIM\
+ DEPEX1=$(MEPeiPlatformPolicy_DIR)\MEPeiPolicyInit.dxs\
+ DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX\
+ COMPRESS=0
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.sdl b/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.sdl
new file mode 100644
index 0000000..ff7d692
--- /dev/null
+++ b/Board/EM/MeWrapper/MePlatformPolicy/Pei/MePeiPolicyInit.sdl
@@ -0,0 +1,25 @@
+TOKEN
+ Name = "MEPeiPlatformPolicy_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable AmtPlatformPolicy support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "MEPeiPlatformPolicy_DIR"
+End
+
+MODULE
+ Help = "Includes AmtPlatformPolicy.mak to Project"
+ File = "MEPeiPolicyInit.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\MEPeiPolicyInit.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.c b/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.c
new file mode 100644
index 0000000..e9525c8
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.c
@@ -0,0 +1,171 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/Dxe/MeSetupDxe.c 5 5/14/14 10:01p Tristinchou $
+//
+// $Revision: 5 $
+//
+// $Date: 5/14/14 10:01p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/Dxe/MeSetupDxe.c $
+//
+// 5 5/14/14 10:01p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 4 3/14/13 2:39a Klzhan
+// Modify for PTT check
+//
+// 2 2/23/13 1:27a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Return SUCCESS in entry point.
+//
+// 1 2/07/13 2:04a Klzhan
+// [TAG] EIP114344
+// [Category] Improvement
+// [Description] Create a setup item for TPM Device Selection
+// [Files] MeSetupDxe.cif
+// MeSetupDxe.c
+// MeSetupDxe.h
+// MeSetupDxe.sdl
+// MeSetupDxe.dxs
+// MeSetupDxe.mak
+//
+//
+//**********************************************************************
+#include "MeSetupDxe.h"
+
+EFI_STATUS
+MeSetupDxeEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+ UINT32 SetupVarAttr;
+ UINT32 PttInfoVarAttr;
+ UINTN VariableSize;
+ EFI_GUID SetupGuid = SYSTEM_CONFIGURATION_GUID;
+ EFI_GUID PttInfoVariableGuid = PTT_INFO_VARIABLE_GUID;
+ SETUP_DATA gSetupData;
+ PTT_INFO_VARIABLE_DATA gPttInfoVariable;
+ PCH_SERIES PchSeries = GetPchSeries();
+
+ DEBUG ((EFI_D_INFO, "[MeSetupDxe.c] : Entry Point...\n"));
+
+ if ( PchSeries != PchLp ) {
+ return EFI_SUCCESS;
+ }
+
+ PttInfoVarAttr = 0;
+ VariableSize = sizeof (PTT_INFO_VARIABLE_DATA);
+ Status = gRT->GetVariable (
+ L"PttInfoVariable",
+ &PttInfoVariableGuid,
+ &PttInfoVarAttr,
+ &VariableSize,
+ &gPttInfoVariable );
+ if( EFI_ERROR(Status) )
+ PttInfoVarAttr = EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS;
+
+ PttHeciGetCapability(&gPttInfoVariable.PTTCapability);
+ PttHeciGetState(&gPttInfoVariable.PTTState);
+
+ Status = gRT->SetVariable (
+ L"PttInfoVariable",
+ &PttInfoVariableGuid,
+ PttInfoVarAttr,
+ VariableSize,
+ &gPttInfoVariable
+ );
+
+ if ( EFI_ERROR (Status) ) {
+ DEBUG((EFI_D_INFO, "[MeSetupDxe.c] : Failed to Set PttInfoVariable Status = %x\n", Status));
+ return EFI_SUCCESS;
+ }
+
+ SetupVarAttr = 0;
+ VariableSize = sizeof (SETUP_DATA);
+ Status = gRT->GetVariable(
+ L"Setup",
+ &SetupGuid,
+ &SetupVarAttr,
+ &VariableSize,
+ &gSetupData );
+
+ if ( gPttInfoVariable.PTTCapability ) {
+ if ( (gSetupData.TpmDeviceSelectionUpdate == 1) && (gPttInfoVariable.PTTState != gSetupData.TpmDeviceSelection) ) {
+ if ( gSetupData.TpmDeviceSelection == 1 ) {
+ PttHeciSetState(TRUE);
+ } else {
+ PttHeciSetState(FALSE);
+ }
+ gSetupData.TpmDeviceSelectionUpdate = 0;
+
+ Status = gRT->SetVariable(
+ L"Setup",
+ &SetupGuid,
+ SetupVarAttr,
+ VariableSize,
+ &gSetupData );
+
+ Status = HeciSendCbmResetRequest (CBM_RR_REQ_ORIGIN_BIOS_POST, CBM_HRR_GLOBAL_RESET);
+ if( !EFI_ERROR(Status) ) {
+ EFI_DEADLOOP();
+ }
+ }
+ }
+
+ if ( gPttInfoVariable.PTTState ) {
+ gSetupData.TpmDeviceSelection = 1;
+ } else {
+ gSetupData.TpmDeviceSelection = 0;
+ }
+
+ Status = gRT->SetVariable(
+ L"Setup",
+ &SetupGuid,
+ SetupVarAttr,
+ VariableSize,
+ &gSetupData );
+
+ if ( EFI_ERROR (Status) ) {
+ DEBUG((EFI_D_INFO, "[MeSetupDxe.c] : Failed to Set SetupVariable Status = %x\n", Status));
+ return EFI_SUCCESS;
+ }
+
+ DEBUG ((EFI_D_INFO, "[MeSetupDxe.c] : Entry End...\n"));
+
+ return EFI_SUCCESS;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.cif b/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.cif
new file mode 100644
index 0000000..7835bf7
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "MeSetupDxe"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\MeSetup\Dxe"
+ RefName = "MeSetupDxe"
+[files]
+"MeSetupDxe.c"
+"MeSetupDxe.h"
+"MeSetupDxe.sdl"
+"MeSetupDxe.dxs"
+"MeSetupDxe.mak"
+<endComponent>
diff --git a/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.dxs b/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.dxs
new file mode 100644
index 0000000..e6a5140
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.dxs
@@ -0,0 +1,68 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/Dxe/MeSetupDxe.dxs 1 2/07/13 2:04a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/07/13 2:04a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/Dxe/MeSetupDxe.dxs $
+//
+// 1 2/07/13 2:04a Klzhan
+// [TAG] EIP114344
+// [Category] Improvement
+// [Description] Create a setup item for TPM Device Selection
+// [Files] MeSetupDxe.cif
+// MeSetupDxe.c
+// MeSetupDxe.h
+// MeSetupDxe.sdl
+// MeSetupDxe.dxs
+// MeSetupDxe.mak
+//
+//
+//**********************************************************************
+#include "AutoGen.h"
+#include "DxeDepex.h"
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+
+#include EFI_PROTOCOL_DEFINITION (Heci)
+#include EFI_ARCH_PROTOCOL_DEFINITION (Variable)
+#include EFI_PROTOCOL_DEFINITION (PchReset)
+
+#endif
+
+DEPENDENCY_START
+ EFI_HECI_PROTOCOL_GUID AND
+ PCH_RESET_PROTOCOL_GUID AND
+ EFI_VARIABLE_ARCH_PROTOCOL_GUID
+DEPENDENCY_END
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.h b/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.h
new file mode 100644
index 0000000..eca06b6
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.h
@@ -0,0 +1,79 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/Dxe/MeSetupDxe.h 2 3/01/13 3:13a Klzhan $
+//
+// $Revision: 2 $
+//
+// $Date: 3/01/13 3:13a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/Dxe/MeSetupDxe.h $
+//
+// 2 3/01/13 3:13a Klzhan
+//
+// 1 2/07/13 2:04a Klzhan
+// [TAG] EIP114344
+// [Category] Improvement
+// [Description] Create a setup item for TPM Device Selection
+// [Files] MeSetupDxe.cif
+// MeSetupDxe.c
+// MeSetupDxe.h
+// MeSetupDxe.sdl
+// MeSetupDxe.dxs
+// MeSetupDxe.mak
+//
+//
+//**********************************************************************
+#ifndef _MeSetupDxe_H_
+#define _MeSetupDxe_H_
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+#include "PttHciDeviceDxeLib.h"
+#include "PttHeciDxeLib.h"
+#include "PchAccess.h"
+#include "PchPlatformLib.h"
+#include "MELib.h"
+#include <token.h>
+
+#include <SetupDataDefinition.h>
+#define SYSTEM_CONFIGURATION_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+#endif
+
+typedef struct {
+ BOOLEAN PTTCapability;
+ BOOLEAN PTTState;
+} PTT_INFO_VARIABLE_DATA;
+
+#define PTT_INFO_VARIABLE_GUID \
+ {0x9e6eae27, 0xc452, 0x49e6, 0x99, 0xd9, 0xb4, 0x5d, 0x1c, 0xf9, 0x1c, 0x5a}
+
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.mak b/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.mak
new file mode 100644
index 0000000..7a5ba6e
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.mak
@@ -0,0 +1,126 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/Dxe/MeSetupDxe.mak 2 3/01/13 3:13a Klzhan $
+#
+# $Revision: 2 $
+#
+# $Date: 3/01/13 3:13a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/Dxe/MeSetupDxe.mak $
+#
+# 2 3/01/13 3:13a Klzhan
+#
+# 1 2/07/13 2:04a Klzhan
+# [TAG] EIP114344
+# [Category] Improvement
+# [Description] Create a setup item for TPM Device Selection
+# [Files] MeSetupDxe.cif
+# MeSetupDxe.c
+# MeSetupDxe.h
+# MeSetupDxe.sdl
+# MeSetupDxe.dxs
+# MeSetupDxe.mak
+#
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name: MeSetupDxe.mak
+#
+# Description: Makfile for ME Setup Dxe module.
+#
+#----------------------------------------------------------------------------
+#<AMI_FHDR_END>
+all : MeSetupDxe
+
+MeSetupDxe : $(BUILD_DIR)\MeSetupDxe.mak MeSetupDxe_Bin
+
+$(BUILD_DIR)\MeSetupDxe.mak : $(ME_SETUP_DXE_PATH)\$(@B).cif $(ME_SETUP_DXE_PATH)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(ME_SETUP_DXE_PATH)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+MeSetupDxe_INCLUDES=\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(EDK_INCLUDES)\
+ $(ME_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+
+MeSetupDxe_LIBS=\
+ $(EDKPROTOCOLLIB)\
+ $(EFIGUIDLIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EDKFRAMEWORKGUIDLIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGlueBaseMemoryLib_LIB)\
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeServicesTableLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueUefiBootServicesTableLib_LIB)\
+ $(EdkIIGlueUefiDevicePathLib_LIB)\
+ $(EdkIIGlueBasePciLibPciExpress_LIB)\
+ $(EdkIIGlueEdkDxeRuntimeDriverLib_LIB)\
+ $(EdkIIGlueDxeHobLib_LIB)\
+ $(PttDxe_LIB)\
+ $(PttHeciDxeLib_LIB)\
+ $(MeLibDxe_LIB)\
+ $(PchPlatformDxeLib_LIB)\
+
+MeSetupDxe_DEFINES=\
+ $(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=MeSetupDxeEntryPoint"\
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_DXE_SERVICES_TABLE_LIB__ \
+ /D __EDKII_GLUE_DXE_HOB_LIB__ \
+
+MeSetupDxe_Bin : $(MeSetupDxe_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\MeSetupDxe.mak all\
+ "MY_INCLUDES=$(MeSetupDxe_INCLUDES)"\
+ "MY_DEFINES=$(MeSetupDxe_DEFINES)"\
+ GUID=D27AC0E1-D553-4c59-BCFE-89E5FFE9BEA6 \
+ ENTRY_POINT=_ModuleEntryPoint \
+ EDKIIModule=DXEDRIVER\
+ TYPE=BS_DRIVER \
+ DEPEX1=$(ME_SETUP_DXE_PATH)\MeSetupDxe.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ COMPRESS=1\
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.sdl b/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.sdl
new file mode 100644
index 0000000..88b0f63
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/Dxe/MeSetupDxe.sdl
@@ -0,0 +1,27 @@
+
+TOKEN
+ Name = "ME_SETUP_DXE_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Help = "Main switch to enable MeSetupDxe support in DXE Phase"
+ Token = "IntelPTT_SUPPORT" "=" "1"
+End
+
+MODULE
+ File = "MeSetupDxe.mak"
+ Help = "Includes MeSetupDxe.mak to Project"
+End
+
+PATH
+ Name = "ME_SETUP_DXE_PATH"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\MeSetupDxe.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/MeWrapper/MeSetup/MeSetup.c b/Board/EM/MeWrapper/MeSetup/MeSetup.c
new file mode 100644
index 0000000..74efeca
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/MeSetup.c
@@ -0,0 +1,263 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/MeSetup.c 3 11/02/14 9:48p Tristinchou $
+//
+// $Revision: 3 $
+//
+// $Date: 11/02/14 9:48p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/MeSetup.c $
+//
+// 3 11/02/14 9:48p Tristinchou
+// [TAG] EIP189985
+// [Category] Improvement
+// [Description] For ME 9.1.20.1035, add NFC related option in setup
+//
+// 2 2/20/13 10:50p Klzhan
+// [TAG] EIP114344
+// [Category] Improvement
+// [Description] Update PTT capability / State information in Setup.
+//
+// 1 2/08/12 1:04a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:41a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: MeSetup.c
+//
+// Description: Setup hooks for MeSetup module.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+Copyright (c) 2008-2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ MeSetup.c
+
+Abstract:
+
+
+--*/
+#include <Setup.h>
+#include <SetupStrTokens.h>
+#include <AmiDxeLib.h>
+#if EFI_SPECIFICATION_VERSION>0x20000
+#include <Protocol\HiiDatabase.h>
+#include <Protocol\HiiString.h>
+#else
+#include <Protocol/Hii.h>
+#endif
+#include "MeSetup.h"
+#if NFC_SUPPORT_DXE_SUPPORT == 1
+#include "NfcSupportDxe\NfcSupportDxe.h"
+#endif
+
+typedef struct{
+ UINT8 MeFirmwareInfo;
+ UINT32 MeMajor;
+ UINT32 MeMinor;
+ UINT32 MeHotFix;
+ UINT32 MeBuildNo;
+} ME_INFO_SETUP_DATA;
+
+#define ME_INFO_SETUP_GUID \
+ {0x78259433, 0x7B6D, 0x4DB3, 0x9A, 0xE8, 0x36, 0xC4, 0xC2, 0xC3, 0xA1, 0x7D}
+
+typedef struct{
+ BOOLEAN PTTCapability;
+ BOOLEAN PTTState;
+} PTT_INFO_VARIABLE_DATA;
+
+#define PTT_INFO_VARIABLE_GUID \
+ {0x9e6eae27, 0xc452, 0x49e6, 0x99, 0xd9, 0xb4, 0x5d, 0x1c, 0xf9, 0x1c, 0x5a}
+
+EFI_GUID PttInfoVariableGuid = PTT_INFO_VARIABLE_GUID;
+PTT_INFO_VARIABLE_DATA gPttInfoVariable;
+
+EFI_GUID gMeInfoSetupGuid = ME_INFO_SETUP_GUID;
+EFI_GUID gSetupGuid = SETUP_GUID;
+ME_INFO_SETUP_DATA mMeInfoSetupData;
+SETUP_DATA gSetupData;
+
+VOID InitMeInfo(EFI_HII_HANDLE HiiHandle)
+{
+ EFI_STATUS Status;
+ UINTN VariableSize;
+ UINT8 *MeFwSkuValue;
+ CHAR16 String[0x100];
+ UINTN StringLength;
+#if EFI_SPECIFICATION_VERSION>0x20000
+static EFI_HII_STRING_PROTOCOL *HiiString=NULL;
+static EFI_HII_DATABASE_PROTOCOL *HiiDatabase=NULL;
+#else
+ EFI_GUID guidHII = EFI_HII_PROTOCOL_GUID;
+ EFI_HII_PROTOCOL *Hii = NULL;
+#endif
+ STRING_REF MeMode[] = {
+ STRING_TOKEN(STR_ME_NORMAL_MODE),
+#ifdef Ibexpeak_SUPPORT
+ STRING_TOKEN(STR_ME_IGNITION),
+#else
+ STRING_TOKEN(STR_ME_FAILED),
+#endif
+ STRING_TOKEN(STR_ME_ALT_DISABLED),
+ STRING_TOKEN(STR_ME_TEMP_DISABLED),
+ STRING_TOKEN(STR_ME_SECOVER),
+ STRING_TOKEN(STR_ME_FAILED),
+
+ };
+ UINT8 *FwMeSku[] = {
+ STR_ME_FW_SKU_1_5MB,
+ STR_ME_FW_SKU_5MB,
+ STR_ME_FW_SKU_UNIDENTIFIED
+ };
+#if NFC_SUPPORT_DXE_SUPPORT == 1
+ EFI_GUID NfcSupportDataGuid = NFC_SUPPORT_DATA_GUID;
+ NFC_SUPPORT_DATA NfcSupportData;
+#endif
+ //
+ // Set default string size assumption at no more than 256 bytes
+ //
+ StringLength = 0x100;
+#if EFI_SPECIFICATION_VERSION<=0x20000
+ pBS->LocateProtocol(&guidHII, NULL, &Hii);
+#endif
+ VariableSize = sizeof(ME_INFO_SETUP_DATA);
+ Status = pRS->GetVariable(
+ L"MeInfoSetup",
+ &gMeInfoSetupGuid,
+ NULL,
+ &VariableSize,
+ &mMeInfoSetupData
+ );
+ if (EFI_ERROR(Status)) return;
+
+ InitString(
+ HiiHandle,STRING_TOKEN(STR_ME_FW_VERSION_VALUE),
+ L"%d.%d.%d.%d",
+ mMeInfoSetupData.MeMajor,mMeInfoSetupData.MeMinor,
+ mMeInfoSetupData.MeHotFix,mMeInfoSetupData.MeBuildNo
+ );
+
+ VariableSize = sizeof (PTT_INFO_VARIABLE_DATA);
+ Status = pRS->GetVariable (
+ L"PttInfoVariable",
+ &PttInfoVariableGuid,
+ NULL,
+ &VariableSize,
+ &gPttInfoVariable
+ );
+
+ if (!EFI_ERROR(Status))
+ {
+ InitString(
+ HiiHandle,STRING_TOKEN(STR_PTT_CAPABILITY_STATE_VALUE),
+ L"%d / %d",
+ gPttInfoVariable.PTTCapability,gPttInfoVariable.PTTState
+ );
+ }
+
+#if NFC_SUPPORT_DXE_SUPPORT == 1
+ VariableSize = sizeof(NFC_SUPPORT_DATA);
+ Status = pRS->GetVariable(
+ L"NfcSupportData",
+ &NfcSupportDataGuid,
+ NULL,
+ &VariableSize,
+ &NfcSupportData );
+ if( !EFI_ERROR(Status) )
+ {
+ if( NfcSupportData.NFCCapability == 1 )
+ InitString( HiiHandle, STRING_TOKEN(STR_NFC_SUPPORT_VALUE), L"Enabled" );
+ else
+ InitString( HiiHandle, STRING_TOKEN(STR_NFC_SUPPORT_VALUE), L"Disabled" );
+ }
+#endif
+
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+ Status = HiiLibGetString(
+ HiiHandle, MeMode[(mMeInfoSetupData.MeFirmwareInfo & ME_MODE_MASK)],
+ &StringLength, String);
+#else
+ Status = Hii->GetString(Hii, HiiHandle, MeMode[(mMeInfoSetupData.MeFirmwareInfo & ME_MODE_MASK)], FALSE, NULL, &StringLength, String);
+#endif
+ InitString(
+ HiiHandle,STRING_TOKEN(STR_ME_FW_INFO_VALUE),
+ L"%s",
+ String
+ );
+
+ VariableSize = sizeof(SETUP_DATA);
+ Status = pRS->GetVariable(
+ L"Setup",
+ &gSetupGuid,
+ NULL,
+ &VariableSize,
+ &gSetupData
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ if (gSetupData.MeImageType == ME_IMAGE_1_5MB_FW) {
+ MeFwSkuValue = FwMeSku[0];
+ } else if (gSetupData.MeImageType == ME_IMAGE_5MB_FW) {
+ MeFwSkuValue = FwMeSku[1];
+ } else {
+ MeFwSkuValue = FwMeSku[2];
+ }
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_ME_FW_SKU_VALUE),
+ L"%S",
+ MeFwSkuValue
+ );
+
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MeSetup/MeSetup.cif b/Board/EM/MeWrapper/MeSetup/MeSetup.cif
new file mode 100644
index 0000000..d7e4b42
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/MeSetup.cif
@@ -0,0 +1,18 @@
+<component>
+ name = "MeSetup"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\MeSetup"
+ RefName = "MeSetup"
+[files]
+"MeSetup.sdl"
+"MeSetup.mak"
+"MeSetup.sd"
+"MeSetup.uni"
+"MeSetup.c"
+"MeSetup.h"
+"MebxPrompt.c"
+"MeSetupReset.c"
+[parts]
+"MeSetupDxe"
+"NfcSupportDxe"
+<endComponent>
diff --git a/Board/EM/MeWrapper/MeSetup/MeSetup.h b/Board/EM/MeWrapper/MeSetup/MeSetup.h
new file mode 100644
index 0000000..0a27a88
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/MeSetup.h
@@ -0,0 +1,113 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/MeSetup.h 1 2/08/12 1:04a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:04a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/MeSetup.h $
+//
+// 1 2/08/12 1:04a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:41a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: MeSetup.h
+//
+// Description: Header file for MeSetup module.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+This file contains a 'Sample Driver' and is licensed as such
+under the terms of your license agreement with Intel or your
+vendor. This file may be modified by the user, subject to
+the additional terms of the license agreement
+
+--*/
+
+/*++
+Copyright (c) 2009 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ MeSetup.h
+
+Abstract:
+
+
+--*/
+#ifndef __ME_SETUP_H__
+#define __ME_SETUP_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ME_MODE_MASK 0x0F
+
+#define NORMAL_MODE 0x00
+#define QUALIFIER_MODE 0xE0
+#define LOCAL_FW_UPD_MODE 0xF0
+
+#define TEMP_DISABLE_MODE 0x03
+#define ME_IMAGE_1_5MB_FW 0x03
+#define ME_IMAGE_5MB_FW 0x04
+
+#define STR_ME_FW_SKU_1_5MB "1.5MB"
+#define STR_ME_FW_SKU_5MB "5MB"
+#define STR_ME_FW_SKU_UNIDENTIFIED "Unidentified"
+
+/****** DO NOT WRITE BELOW THIS LINE *******/
+#ifdef __cplusplus
+}
+#endif
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MeSetup/MeSetup.mak b/Board/EM/MeWrapper/MeSetup/MeSetup.mak
new file mode 100644
index 0000000..c012aff
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/MeSetup.mak
@@ -0,0 +1,130 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/MeSetup.mak 3 3/01/13 3:11a Klzhan $
+#
+# $Revision: 3 $
+#
+# $Date: 3/01/13 3:11a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/MeSetup.mak $
+#
+# 3 3/01/13 3:11a Klzhan
+# [TAG] EIPNone
+# [Category] Improvement
+# [Description] Fix ICBO project build error.
+# [Files] MeSetup.sdl
+# MeSetup.mak
+# MeSetup.sd
+# MeSetup.uni
+# MeSetup.c
+# MeSetup.h
+# MebxPrompt.c
+# MeSetupReset.c
+# MeSetup.cif
+#
+# 2 2/07/13 3:24a Klzhan
+#
+# 1 2/08/12 1:04a Klzhan
+# Initial Check in
+#
+# 6 9/06/11 3:51a Klzhan
+# Read key by RegisterKeyNofity.
+#
+# 5 6/28/11 2:41a Klzhan
+# Fix build error when iAMT_Support is off.
+#
+# 4 6/20/11 8:17a Klzhan
+# Not Show Remote Assistance message when SOL and KVM.
+#
+# 3 6/20/11 4:18a Klzhan
+# Support Remote assistance hot key detect.
+#
+# 2 5/23/11 8:42a Klzhan
+# Support CTRL + P check.
+#
+# 1 2/25/11 1:41a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:09a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name: Me Setup.mak
+#
+# Description: Makfile for ME Setup module.
+#
+#----------------------------------------------------------------------------
+#<AMI_FHDR_END>
+All : MeSetup
+
+MeSetup : $(BUILD_DIR)\MeSetup.mak
+
+SetupSdbs : $(BUILD_DIR)\MeSetup.sdb
+
+$(BUILD_DIR)\MeSetup.sdb : $(ME_SETUP_DIR)\$(@B).sd $(ME_SETUP_DIR)\$(@B).uni
+ $(STRGATHER) -i INCLUDE -parse -newdb -db $(BUILD_DIR)\$(@B).sdb $(ME_SETUP_DIR)\$(@B).uni
+ $(STRGATHER) -scan -db $(BUILD_DIR)\$(@B).sdb -od $(BUILD_DIR)\$(@B).sdb $(ME_SETUP_DIR)\$(@B).sd
+
+$(BUILD_DIR)\MeSetup.mak : $(ME_SETUP_DIR)\$(@B).cif $(ME_SETUP_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(ME_SETUP_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+SetupBin : $(BUILD_DIR)\MeSetup.obj
+
+$(BUILD_DIR)\MeSetup.obj : $(PROJECT_DIR)\$(ME_SETUP_DIR)\MeSetup.c $(BUILD_DIR)\SetupStrTokens.h
+ $(CC) $(CFLAGS) /Fo$(BUILD_DIR)\ $(ME_SETUP_DIR)\MeSetup.c
+
+!IF DEFINED(IntelPTT_SUPPORT) && "$(IntelPTT_SUPPORT)" == "1"
+SetupData : $(BUILD_DIR)\MebxPrompt.obj $(BUILD_DIR)\MeSetupReset.obj
+!ELSE
+SetupData : $(BUILD_DIR)\MebxPrompt.obj
+!ENDIF
+
+MebxPrompt_CFLAGS=$(CFLAGS) \
+ -I $(TSEBIN_DIR)\Inc \
+ -I $(TSEBIN_DIR)\
+ -I ReferenceCode\ME\Protocol\
+!IF DEFINED(AmtWrapper_SUPPORT) && "$(AmtWrapper_SUPPORT)" == "1"
+ -I $(AmtWrapperProtocolLib_DIR)\
+!ENDIF
+ -I $(MeGuidLib_DIR)\
+ $(ME_INCLUDES)
+
+$(BUILD_DIR)\MebxPrompt.obj : $(ME_SETUP_DIR)\MebxPrompt.c
+ $(CC) $(MebxPrompt_CFLAGS) /Fo$(BUILD_DIR)\ $(ME_SETUP_DIR)\MebxPrompt.c
+
+$(BUILD_DIR)\MeSetupReset.obj : $(ME_SETUP_DIR)\MeSetupReset.c
+ $(CC) $(MebxPrompt_CFLAGS) /Fo$(BUILD_DIR)\ $(ME_SETUP_DIR)\MeSetupReset.c
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/MeWrapper/MeSetup/MeSetup.sd b/Board/EM/MeWrapper/MeSetup/MeSetup.sd
new file mode 100644
index 0000000..ab985af
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/MeSetup.sd
@@ -0,0 +1,309 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/MeSetup.sd 7 11/02/14 9:47p Tristinchou $
+//
+// $Revision: 7 $
+//
+// $Date: 11/02/14 9:47p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/MeSetup.sd $
+//
+// 7 11/02/14 9:47p Tristinchou
+// [TAG] EIP189985
+// [Category] Improvement
+// [Description] For ME 9.1.20.1035, add NFC related option in setup
+//
+// 6 3/14/13 2:37a Klzhan
+// Add PTT setup itrem default value.
+//
+// 5 3/01/13 3:11a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Fix ICBO project build error.
+// [Files] MeSetup.sdl
+// MeSetup.mak
+// MeSetup.sd
+// MeSetup.uni
+// MeSetup.c
+// MeSetup.h
+// MebxPrompt.c
+// MeSetupReset.c
+// MeSetup.cif
+//
+// 4 2/07/13 1:57a Klzhan
+// [TAG] EIP114334
+// [Category] Improvement
+// [Description] Create a setup item for TPM Device Selection
+// [Files] MeSetup.sdl
+// MeSetup.mak
+// MeSetup.sd
+// MeSetup.uni
+// MeSetup.c
+// MeSetup.h
+// MebxPrompt.c
+// MeSetup.cif
+//
+// 3 11/20/12 4:32a Klzhan
+// Add Setup Item for Ftpm
+//
+// 2 4/23/12 11:09p Klzhan
+//
+// 1 2/08/12 1:04a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:41a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: Me Setup.sd
+//
+// Description: Setup for ME Setup.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#ifdef SETUP_DATA_DEFINITION
+/***********************************************************/
+/* Put NVRAM data definitions here.
+/* For example: UINT8 Data1;
+/* These definitions will be converted by the build process
+/* to a definitions of SETUP_DATA fields.
+/***********************************************************/
+
+ UINT8 MeFirmwareInfo;
+ UINT8 MeImageType;
+ UINT8 MeFwDowngrade;
+ UINT8 LocalFwUpdEnabled;
+ UINT8 LocalFwQualifier;
+ UINT8 MebxType;
+ UINT8 MDESForBiosState;
+ UINT8 FTpmSwitch;
+ UINT8 TpmDeviceSelection;
+ UINT8 TpmDeviceSelectionUpdate;
+#endif
+
+#ifdef CONTROL_DEFINITION
+ #define MESETUP_GOTO_PCHFWCONFIG\
+ goto ME_FORM_ID,\
+ prompt = STRING_TOKEN(STR_ME_FORM),\
+ help = STRING_TOKEN(STR_ME_FORM_HELP);
+
+#if defined NFC_SUPPORT_DXE_SUPPORT && NFC_SUPPORT_DXE_SUPPORT == 1
+ #define NFC_STATE \
+ oneof varid = NFC_SUPPORT_DATA.NFCEnable, \
+ prompt = STRING_TOKEN(STR_NFC_STATE_PROMPT), \
+ help = STRING_TOKEN(STR_NFC_STATE_HELP), \
+ default = DEFAULT_NFC_SETTING,\
+ option text = STRING_TOKEN(STR_DISABLED_STRING), value = 0, flags = MANUFACTURING | RESET_REQUIRED; \
+ option text = STRING_TOKEN(STR_ENABLED_STRING), value = 1, flags = RESET_REQUIRED; \
+ endoneof;
+#endif
+
+#endif
+//**********************************************************************
+// Advanced - ME Configuration Form
+//**********************************************************************
+
+#ifdef ADVANCED_FORM_SET
+
+#ifdef FORM_SET_TYPEDEF
+ #include <MeSetup.h>
+#if defined NFC_SUPPORT_DXE_SUPPORT && NFC_SUPPORT_DXE_SUPPORT == 1
+ #include "NfcSupportDxe.h"
+#endif
+#endif
+
+#ifdef FORM_SET_VARSTORE
+#if defined NFC_SUPPORT_DXE_SUPPORT && NFC_SUPPORT_DXE_SUPPORT == 1
+ varstore NFC_SUPPORT_DATA,
+ key = AUTO_ID(NFC_SUPPORT_DATA_ID),
+ name = NfcSupportData,
+ guid = NFC_SUPPORT_DATA_GUID;
+#endif
+#endif
+
+ #ifdef FORM_SET_GOTO
+ // Define goto commands for the forms defined in this file
+ MESETUP_GOTO_PCHFWCONFIG
+ #endif
+
+ #ifdef FORM_SET_FORM
+ // Define forms
+ #ifndef ME_FORM_SETUP
+ #define ME_FORM_SETUP
+
+ form formid = AUTO_ID(ME_FORM_ID),
+ title = STRING_TOKEN(STR_ME_FORM);
+
+ text
+ help = STRING_TOKEN(STR_ME_FW_VERSION_HELP),
+ text = STRING_TOKEN(STR_ME_FW_VERSION_PROMPT),
+ text = STRING_TOKEN(STR_ME_FW_VERSION_VALUE),
+ flags = 0,
+ key = 0;
+
+ suppressif
+ NOT ideqval SETUP_DATA.MeFirmwareInfo == 0xFF;
+
+ INVENTORY(STRING_TOKEN(STR_ME_FW_INFO_PROMPT),STRING_TOKEN(STR_ME_NORMAL_MODE))
+ INVENTORY(STRING_TOKEN(STR_ME_FW_INFO_PROMPT),STRING_TOKEN(STR_ME_ALT_DISABLED))
+ INVENTORY(STRING_TOKEN(STR_ME_FW_INFO_PROMPT),STRING_TOKEN(STR_ME_TEMP_DISABLED))
+ INVENTORY(STRING_TOKEN(STR_ME_FW_INFO_PROMPT),STRING_TOKEN(STR_ME_SECOVER))
+ INVENTORY(STRING_TOKEN(STR_ME_FW_INFO_PROMPT),STRING_TOKEN(STR_ME_FAILED))
+ endif;
+
+ text
+ help = STRING_TOKEN(STR_ME_FW_INFO_HELP),
+ text = STRING_TOKEN(STR_ME_FW_INFO_PROMPT),
+ text = STRING_TOKEN(STR_ME_FW_INFO_VALUE),
+ flags = 0,
+ key = 0;
+
+ suppressif
+ NOT ideqval SETUP_DATA.MeFirmwareInfo == QUALIFIER_MODE
+ AND NOT ideqval SETUP_DATA.MeFirmwareInfo == LOCAL_FW_UPD_MODE;
+ text
+ help = STRING_TOKEN(STR_ME_FW_TYPE_HELP),
+ text = STRING_TOKEN(STR_ME_FW_TYPE_PROMPT),
+ text = STRING_TOKEN(STR_ME_FW_TYPE_MIN),
+ flags = 0,
+ key = 0;
+ endif;
+
+ suppressif
+ ideqval SETUP_DATA.MeFirmwareInfo == QUALIFIER_MODE
+ AND ideqval SETUP_DATA.MeFirmwareInfo == LOCAL_FW_UPD_MODE;
+ text
+ help = STRING_TOKEN(STR_ME_FW_TYPE_HELP),
+ text = STRING_TOKEN(STR_ME_FW_TYPE_PROMPT),
+ text = STRING_TOKEN(STR_ME_FW_TYPE_NORMAL),
+ flags = 0,
+ key = 0;
+ endif;
+
+
+ text
+ help = STRING_TOKEN(STR_ME_FW_SKU_HELP),
+ text = STRING_TOKEN(STR_ME_FW_SKU_PROMPT),
+ text = STRING_TOKEN(STR_ME_FW_SKU_VALUE),
+ flags = 0,
+ key = 0;
+#if IntelPTT_SUPPORT
+ suppressif ideqval SB_PLATFORM_DATA.LPTType == 0;
+ text
+ help = STRING_TOKEN(STR_PTT_CAPABILITY_STATE_HELP),
+ text = STRING_TOKEN(STR_PTT_CAPABILITY_STATE_PROMPT),
+ text = STRING_TOKEN(STR_PTT_CAPABILITY_STATE_VALUE),
+ flags = 0,
+ key = 0;
+ endif;
+#endif
+
+#if defined NFC_SUPPORT_DXE_SUPPORT && NFC_SUPPORT_DXE_SUPPORT == 1
+ text
+ help = STRING_TOKEN(STR_NFC_SUPPORT_PROMPT),
+ text = STRING_TOKEN(STR_NFC_SUPPORT_HELP),
+ text = STRING_TOKEN(STR_NFC_SUPPORT_VALUE);
+
+ suppressif ideqval NFC_SUPPORT_DATA.NFCCapability == 0;
+ grayoutif ideqval NFC_SUPPORT_DATA.MeSupportNFC == 0;
+ NFC_STATE
+ SUPPRESS_GRAYOUT_ENDIF
+#endif
+
+ suppressif NOT ideqval SETUP_DATA.MeImageType == ME_IMAGE_1_5MB_FW;
+ oneof varid = SETUP_DATA.MebxType,
+ prompt = STRING_TOKEN(STR_MEBX_TYPE_PROMPT),
+ help = STRING_TOKEN(STR_MEBX_TYPE_HELP),
+ option text = STRING_TOKEN(STR_MEBX_TYPE_NONE), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;
+ option text = STRING_TOKEN(STR_MEBX_TYPE_MEBX), value = 1, flags = RESET_REQUIRED, key = 0;
+ endoneof;
+ endif;
+
+#if MdesStatusCode_SUPPORT
+ oneof varid = SETUP_DATA.MDESForBiosState,
+ prompt = STRING_TOKEN(STR_MDES_STATUS_PROMPT),
+ help = STRING_TOKEN(STR_MDES_STATUS_HELP),
+ option text = STRING_TOKEN(STR_DISABLED_STRING), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;
+ option text = STRING_TOKEN(STR_ENABLED_STRING), value = 1, flags = RESET_REQUIRED, key = 0;
+ endoneof;
+#endif
+
+#if IntelPTT_SUPPORT
+ suppressif ideqval SB_PLATFORM_DATA.LPTType == 0;
+ oneof varid = SETUP_DATA.FTpmSwitch,
+ prompt = STRING_TOKEN(STR_FTPMSWITCH_STATUS_PROMPT),
+ help = STRING_TOKEN(STR_FTPMSWITCH_STATUS_HELP),
+ option text = STRING_TOKEN(STR_GPDMA_STRING), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;
+ option text = STRING_TOKEN(STR_MSFT_STRING), value = 1, flags = RESET_REQUIRED, key = 0;
+ endoneof;
+
+ oneof varid = SETUP_DATA.TpmDeviceSelection,
+ prompt = STRING_TOKEN(STR_TPMDEVICE_SELECTION_PROMPT),
+ help = STRING_TOKEN(STR_TPMDEVICE_SELECTION_HELP),
+ default = DefaultTpmDeviceSelection,
+ option text = STRING_TOKEN(STR_DTPM_STRING), value = 0, flags = RESET_REQUIRED, key = 0;
+ option text = STRING_TOKEN(STR_PTT_STRING), value = 1, flags = MANUFACTURING | RESET_REQUIRED, key = 0;
+ endoneof;
+ endif;
+#endif
+
+ goto ME_FW_UPGRADE_ID,
+ prompt = STRING_TOKEN(STR_FW_UPGRADE_FORM),
+ help = STRING_TOKEN(STR_FW_UPGRADE_FORM_HELP);
+
+ endform;
+
+ form formid = AUTO_ID(ME_FW_UPGRADE_ID),
+ title = STRING_TOKEN(STR_FW_UPGRADE_FORM);
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ oneof varid = SETUP_DATA.MeFwDowngrade,
+ prompt = STRING_TOKEN(STR_AMT_ME_FW_DOWNGRADE_PROMPT),
+ help = STRING_TOKEN(STR_AMT_ME_FW_DOWNGRADE_HELP),
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;
+ endoneof;
+ endif;
+
+ endform;
+ #endif // ME_FW_UPGRADE_FORM_SETUP
+ #endif
+#endif // ADVANCED_FORM_SET
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MeSetup/MeSetup.sdl b/Board/EM/MeWrapper/MeSetup/MeSetup.sdl
new file mode 100644
index 0000000..8742e82
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/MeSetup.sdl
@@ -0,0 +1,192 @@
+TOKEN
+ Name = "ME_Setup"
+ Value = "1"
+ Help = "Main switch to enable ME Setup support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "CIRA_SUPPORT"
+ Value = "1"
+ Help = "Enable Disable CIRA"
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "iAMT_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "MEBX_SCANCODE"
+ Value = "0"
+ Help = "The scancode of MEBX in Project"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MEBX_UNICODE"
+ Value = "0x50"
+ Help = "The unicode of MEBX in Project"
+ TokenType = integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MEBX_KeyShiftState"
+ Value = "RIGHT_CONTROL_PRESSED | LEFT_CONTROL_PRESSED | SHIFT_STATE_VALID"
+ Help = "The KeyShiftState of MEBX in Project"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MEBX_KeyToggleState"
+ Value = "0"
+ Help = "The KeyToggleState of MEBX in Project"
+ TokenType = integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "CIRA_SCANCODE"
+ Value = "EFI_SCAN_F1"
+ Help = "The scancode value of CIRA in Project"
+ TokenType = Expression
+ TargetH = Yes
+ Token = "CIRA_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "CIRA_UNICODE"
+ Value = "0"
+ Help = "The unicode value of CIRA in Project"
+ TokenType = integer
+ TargetH = Yes
+ Token = "CIRA_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "CIRA_KeyShiftState"
+ Value = "RIGHT_CONTROL_PRESSED | LEFT_CONTROL_PRESSED | SHIFT_STATE_VALID | RIGHT_ALT_PRESSED | LEFT_ALT_PRESSED"
+ Help = "The KeyShiftState of CIRA in Project"
+ TokenType = Expression
+ TargetH = Yes
+ Token = "CIRA_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "CIRA_KeyToggleState"
+ Value = "0"
+ Help = "The KeyToggleState of CIRA in Project"
+ TokenType = integer
+ TargetH = Yes
+ Token = "CIRA_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "DefaultTpmDeviceSelection"
+ Value = "1"
+ Help = "dTpm set to 0, PTT set to 1 for default setup setting"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+PATH
+ Name = "ME_SETUP_DIR"
+End
+
+MODULE
+ Help = "Includes MeSetup.mak to Project"
+ File = "MeSetup.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\MeSetup.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 30
+ Help = "Includes generic ME setup screens to the project"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(ME_SETUP_DIR)\MeSetup.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 30
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/I$(ME_SETUP_DIR)"
+ Parent = "ME_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "-i $(ME_SETUP_DIR)"
+ Parent = "SETUP_VFR_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "InitMeInfo,"
+ Parent = "SetupStringInit"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\MebxPrompt.obj"
+ Parent = "AMITSE_Objects"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "MebxPromptConInAvailabilityHook,"
+ Parent = "ProcessConInAvailabilityHook,"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "RemoteAssistConInAvailabilityHook,"
+ Parent = "ProcessConInAvailabilityHook,"
+ InvokeOrder = AfterParent
+ Token = "CIRA_SUPPORT" "=" "1"
+End
+
+ELINK
+ Name = "MEProcessEnterSetup,"
+ Parent = "ProcessEnterSetup,"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "MEProcessEnterSetup,"
+ Parent = "BeforeEfiBootLaunchHook,"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\MeSetupReset.obj"
+ Parent = "AMITSE_Objects"
+ InvokeOrder = AfterParent
+ Token = "IntelPTT_SUPPORT" "=" "1"
+End
+
+ELINK
+ Name = "MeSetupProcessEnterSetupForPTT,"
+ Parent = "ProcessEnterSetup,"
+ InvokeOrder = AfterParent
+ Token = "IntelPTT_SUPPORT" "=" "1"
+End
+
+ELINK
+ Name = "MeSetupResetHookForPTT,"
+ Parent = "PreSystemResetHook,"
+ Priority = 60
+ InvokeOrder = AfterParent
+ Token = "IntelPTT_SUPPORT" "=" "1"
+End
+
diff --git a/Board/EM/MeWrapper/MeSetup/MeSetup.uni b/Board/EM/MeWrapper/MeSetup/MeSetup.uni
new file mode 100644
index 0000000..feae8ed
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/MeSetup.uni
Binary files differ
diff --git a/Board/EM/MeWrapper/MeSetup/MeSetupReset.c b/Board/EM/MeWrapper/MeSetup/MeSetupReset.c
new file mode 100644
index 0000000..3e8e13d
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/MeSetupReset.c
@@ -0,0 +1,156 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/MeSetupReset.c 2 5/14/14 10:02p Tristinchou $
+//
+// $Revision: 2 $
+//
+// $Date: 5/14/14 10:02p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/MeSetupReset.c $
+//
+// 2 5/14/14 10:02p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 1 2/07/13 1:59a Klzhan
+// [TAG] EIP114334
+// [Category] Improvement
+// [Description] Create a setup item for TPM Device Selection
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: MeSetupReset.c
+//
+// Description: Setup hooks for MeSetup module.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include <Token.h>
+#include <Setup.h>
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <AmiCSPLib.h>
+
+//----------------------------------------------------------------------------
+// Variable and External Declaration(s)
+//----------------------------------------------------------------------------
+// Variable Declaration(s)
+static SETUP_DATA gNewSetupData;
+static SETUP_DATA gOldSetupData;
+
+// GUID Definition(s)
+static EFI_GUID gEfiSetupGuid = SETUP_GUID;
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: MeSetupProcessEnterSetupForPTT
+//
+// Description: This function is a hook called when TSE determines
+// that it has to load the boot options in the boot
+// order. This function is available as ELINK.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+MeSetupProcessEnterSetupForPTT (
+ VOID
+)
+{
+ EFI_STATUS Status;
+ UINT32 VarAttr;
+ UINTN VariableSize;
+
+ VariableSize = sizeof (SETUP_DATA);
+ Status = pRS->GetVariable(
+ L"Setup",
+ &gEfiSetupGuid,
+ &VarAttr,
+ &VariableSize,
+ &gOldSetupData );
+ return;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: MeSetupResetHookForPTT
+//
+// Description: This function is a hook called after some control
+// modified in the setup utility by user. This
+// function is available as ELINK.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+MeSetupResetHookForPTT (
+ VOID
+)
+{
+ EFI_STATUS Status;
+ UINT32 VarAttr;
+ UINTN VariableSize;
+
+ VariableSize = sizeof (SETUP_DATA);
+ Status = pRS->GetVariable(
+ L"Setup",
+ &gEfiSetupGuid,
+ &VarAttr,
+ &VariableSize,
+ &gNewSetupData );
+
+ if ( !EFI_ERROR (Status) ) {
+ if (gNewSetupData.TpmDeviceSelection != gOldSetupData.TpmDeviceSelection) {
+ gNewSetupData.TpmDeviceSelectionUpdate = 1;
+
+ Status = pRS->SetVariable (
+ L"Setup",
+ &gEfiSetupGuid,
+ VarAttr,
+ VariableSize,
+ &gNewSetupData );
+ }
+ }
+
+ return;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MeSetup/MebxPrompt.c b/Board/EM/MeWrapper/MeSetup/MebxPrompt.c
new file mode 100644
index 0000000..aaa2635
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/MebxPrompt.c
@@ -0,0 +1,520 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/MebxPrompt.c 5 11/06/12 5:34a Klzhan $
+//
+// $Revision: 5 $
+//
+// $Date: 11/06/12 5:34a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/MebxPrompt.c $
+//
+// 5 11/06/12 5:34a Klzhan
+// Improvement : Support MEBX full screen when enable Hot key pressed in
+// AMT setup page.
+// Fix : Sometimes Mebx not full screen(CreateEvent)
+//
+// 4 10/04/12 8:43a Klzhan
+// [TAG] EIP102464
+// [Category] Improvement
+// [Description] Make Mebx setup full screen.
+//
+// 3 9/19/12 5:51a Klzhan
+// Read MEFwType from Setup Variable.
+//
+// 2 4/23/12 11:09p Klzhan
+//
+// 1 2/08/12 1:04a Klzhan
+// Initial Check in
+//
+// 12 10/04/11 5:22a Klzhan
+// Fix build error when iAMT_SUPPORT is disabled.
+//
+// 11 9/27/11 5:41a Klzhan
+// Add Tokens for Hot key detected.
+//
+// 10 9/07/11 4:54a Klzhan
+// Remove keynotify when entering Setup.
+//
+// 9 9/06/11 3:51a Klzhan
+// Read key by RegisterKeyNofity.
+//
+// 8 7/19/11 4:41a Klzhan
+// Skip MEBX detect when SOL and KVM is running.
+//
+// 7 7/19/11 1:49a Klzhan
+// [TAG] EIP62343
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] Can't Enter MEBX when S4 resume
+// [RootCause] BIOS block CTRL + P
+//
+// 6 6/28/11 7:46a Klzhan
+// Fix Remote Assistance can't work property.
+//
+// 5 6/28/11 2:39a Klzhan
+// Fix build error when iAMT_Support is off.
+//
+// 4 6/20/11 8:19a Klzhan
+// Not Show Remote Assistance message when SOL and KVM.
+//
+// 3 6/20/11 4:20a Klzhan
+// 1. Support Remote assistance hot key detect.
+// 2. Not prompt CTRL + P when S4 resume.
+//
+// 2 5/26/11 2:36a Klzhan
+// No Prompt Press CTRL + P to enter MEBX message with 1.5M ME.
+//
+// 1 5/24/11 4:38a Klzhan
+// Support Mebx prompt.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: MebxPrompt.c
+//
+// Description: AMT TSE Functions.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include <Setup.h>
+#include "variable.h"
+#include "AmiDxeLib.h"
+#include "Protocol\ConsoleControl.h"
+#include "Protocol\SimpleTextInEx.h"
+#include "AmtPlatformPolicy\AmtPlatformPolicy.h"
+#include "MeBiosExtensionSetup\MeBiosExtensionSetup.h"
+#include "MeBiosPayloadData\MeBiosPayloadData.h"
+#include "Heci\Heci.h"
+
+#if defined iAMT_SUPPORT && iAMT_SUPPORT == 1
+#include "AmtWrapper\AmtWrapper.h"
+#endif
+extern EFI_STATUS PostManagerDisplayPostMessage( CHAR16 *message );
+
+extern EFI_BOOT_SERVICES *gBS;
+extern EFI_SYSTEM_TABLE *gST;
+extern EFI_RUNTIME_SERVICES *gRT;
+ME_BIOS_EXTENSION_SETUP MeBiosExtensionSetupData;
+
+EFI_HANDLE MebxKeyHandle[2];
+EFI_HANDLE CIRAKeyHandle[2];
+DXE_AMT_POLICY_PROTOCOL *mDxePlatformAmtPolicy = NULL;
+EFI_GUID gDxePlatformAmtPolicyGuid = DXE_PLATFORM_AMT_POLICY_GUID;
+#define EFI_EVENT_ME_PLATFORM_READY_TO_BOOT \
+ { \
+ 0x3fdf171, 0x1d67, 0x4ace, 0xa9, 0x4, 0x3e, 0x36, 0xd3, 0x38, 0xfa, 0x74 \
+ }
+EFI_GUID gMePlatformReadyToBootGuid = EFI_EVENT_ME_PLATFORM_READY_TO_BOOT;
+//<AMI_PHDR_START>
+//*******************************************************************************
+// Procedure: SetConsoleControlModeBack
+//
+// Description: Set to GraphicMode
+//
+// Input: Event
+// Context
+//
+// Output: VOID
+//
+//*******************************************************************************
+//<AMI_PHDR_END>
+EFI_STATUS
+SetConsoleControlModeBack(
+ EFI_EVENT Event,
+ VOID *ParentImageHandle
+)
+{
+
+ EFI_STATUS Status;
+ EFI_CONSOLE_CONTROL_PROTOCOL *ConsoleControl;
+
+ Status = gBS->LocateProtocol( &gEfiConsoleControlProtocolGuid, NULL, &ConsoleControl);
+
+ //Set back to Graphics
+ Status = ConsoleControl->SetMode( ConsoleControl, EfiConsoleControlScreenGraphics );
+
+ gBS->CloseEvent(Event);
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//*******************************************************************************
+// Procedure: CIRACheckForKey
+//
+// Description:
+//
+// Input: Event: Timer event.
+// Context: Event context; always NULL
+//
+// Output: VOID
+//
+//*******************************************************************************
+//<AMI_PHDR_END>
+EFI_STATUS CIRACheckForKey
+(
+ IN EFI_KEY_DATA *Key
+)
+{
+#if CIRA_SCANCODE
+ EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *SimpleTextInEX;
+ EFI_STATUS Status;
+
+ if(mDxePlatformAmtPolicy == NULL)
+ {
+ Status = gBS->LocateProtocol (&gDxePlatformAmtPolicyGuid, NULL, &mDxePlatformAmtPolicy);
+ if (EFI_ERROR(Status)) return Status;
+ }
+
+ Status = gBS->HandleProtocol(gST->ConsoleInHandle,
+ &gEfiSimpleTextInExProtocolGuid,
+ (void*)&SimpleTextInEX);
+
+ if (EFI_ERROR(Status)) return Status;
+
+ Status = SimpleTextInEX->UnregisterKeyNotify (SimpleTextInEX, CIRAKeyHandle[0]);
+ if((CIRA_UNICODE>0x40 && CIRA_UNICODE<0x5b) || (CIRA_UNICODE>0x60 && CIRA_UNICODE<0x7b)){
+ Status = SimpleTextInEX->UnregisterKeyNotify (SimpleTextInEX, CIRAKeyHandle[1]);
+ }
+
+ mDxePlatformAmtPolicy->AmtConfig.CiraRequest = 1;
+ PostManagerDisplayPostMessage(L"Requesting CIRA ......");
+#endif
+ return EFI_SUCCESS;
+}
+//<AMI_PHDR_START>
+//*******************************************************************************
+// Procedure: MebxCheckForKey
+//
+// Description:
+//
+// Input: Event: Timer event.
+// Context: Event context; always NULL
+//
+// Output: VOID
+//
+//*******************************************************************************
+//<AMI_PHDR_END>
+EFI_STATUS MebxCheckForKey
+(
+ IN EFI_KEY_DATA *Key
+)
+{
+ EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *SimpleTextInEX;
+ EFI_STATUS Status;
+ EFI_CONSOLE_CONTROL_PROTOCOL *ConsoleControl;
+ EFI_EVENT SetConsoleControlModeBackEvent;
+ EFI_CONSOLE_CONTROL_SCREEN_MODE ScreenMode;
+
+ if(mDxePlatformAmtPolicy == NULL)
+ {
+ Status = gBS->LocateProtocol (&gDxePlatformAmtPolicyGuid, NULL, &mDxePlatformAmtPolicy);
+ if (EFI_ERROR(Status)) return Status;
+ }
+
+ Status = gBS->HandleProtocol(gST->ConsoleInHandle,
+ &gEfiSimpleTextInExProtocolGuid,
+ (void*)&SimpleTextInEX);
+
+ if (EFI_ERROR(Status)) return Status;
+
+ Status = SimpleTextInEX->UnregisterKeyNotify (SimpleTextInEX, MebxKeyHandle[0]);
+ if((MEBX_UNICODE>0x40 && MEBX_UNICODE<0x5b) || (MEBX_UNICODE>0x60 && MEBX_UNICODE<0x7b)){
+ Status = SimpleTextInEX->UnregisterKeyNotify (SimpleTextInEX, MebxKeyHandle[1]);
+ }
+
+ mDxePlatformAmtPolicy->AmtConfig.iAmtbxHotkeyPressed = 1;
+ PostManagerDisplayPostMessage(L"Entering MEBX setup menu ......");
+
+ // Fix Mebx Setup screen not full screen.
+ Status = gBS->LocateProtocol( &gEfiConsoleControlProtocolGuid, NULL, &ConsoleControl);
+
+ ConsoleControl->GetMode(ConsoleControl, &ScreenMode, NULL, NULL);
+
+ if (ScreenMode == EfiConsoleControlScreenGraphics)
+ {
+ ConsoleControl->SetMode( ConsoleControl, EfiConsoleControlScreenText );
+ Status = gBS->CreateEventEx (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ SetConsoleControlModeBack,
+ NULL,
+ &gMePlatformReadyToBootGuid,
+ &SetConsoleControlModeBackEvent
+ );
+ }
+
+ return EFI_SUCCESS;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: MebxPromptConInAvailabilityHook
+//
+// Description: This function is a hook called when TSE determines
+// that SETUP utility has to be displayed. This function
+// is available as ELINK. In the generic implementation
+// setup password is prompted in this function.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN MebxPromptConInAvailabilityHook (VOID)
+{
+ EFI_STATUS Status;
+ EFI_GUID gSetupGuid = SETUP_GUID;
+ UINTN VarSize;
+ SETUP_DATA SetupData;
+#if MEBX_UNICODE>0x40 && MEBX_UNICODE<0x5b == 1
+ // ScanCode, UnicodeChar, KeyShiftState, KeyToggleState
+ EFI_KEY_DATA Key[] = {{MEBX_SCANCODE, MEBX_UNICODE, MEBX_KeyShiftState, MEBX_KeyToggleState},
+ {MEBX_SCANCODE, MEBX_UNICODE+0x20, MEBX_KeyShiftState, MEBX_KeyToggleState}};
+
+#else
+#if MEBX_UNICODE>0x60 && MEBX_UNICODE<0x7b == 1
+ EFI_KEY_DATA Key[] = {{MEBX_SCANCODE, MEBX_UNICODE-0x20, MEBX_KeyShiftState, MEBX_KeyToggleState},
+ {MEBX_SCANCODE, MEBX_UNICODE, MEBX_KeyShiftState, MEBX_KeyToggleState}};
+#else
+ EFI_KEY_DATA Key[] = {{MEBX_SCANCODE, MEBX_UNICODE, MEBX_KeyShiftState, MEBX_KeyToggleState}};
+#endif
+#endif
+ EFI_HECI_PROTOCOL *Heci;
+ UINT32 MeMode = ME_MODE_FAILED;
+ EFI_GUID gEfiHeciProtocolGuid = HECI_PROTOCOL_GUID;
+ EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *SimpleTextInEX;
+ EFI_GUID gMeBiosPayloadDataProtocolGuid =
+ ME_BIOS_PAYLOAD_DATA_PROTOCOL_GUID;
+#if defined iAMT_SUPPORT && iAMT_SUPPORT == 1
+ EFI_GUID gEfiAmtWrapperGuid = EFI_AMT_WRAPPER_PROTOCOL_GUID;
+ AMT_WRAPPER_PROTOCOL *AmtWrapperProtocol;
+
+ Status = gBS->LocateProtocol (&gEfiAmtWrapperGuid, NULL, &AmtWrapperProtocol);
+ if (EFI_ERROR(Status)) return FALSE;
+ if ((AmtWrapperProtocol->ActiveManagementEnableKvm()) ||
+ (AmtWrapperProtocol->ActiveManagementEnableSol()))
+ return FALSE;
+#endif
+ VarSize = sizeof(SETUP_DATA);
+ Status = gRT->GetVariable (
+ L"Setup",
+ &gSetupGuid,
+ NULL,
+ &VarSize,
+ &SetupData
+ );
+
+ if (EFI_ERROR(Status)) return FALSE;
+ if(SetupData.MeImageType == 3)
+ return FALSE;
+
+ Status = pBS->LocateProtocol (
+ &gEfiHeciProtocolGuid,
+ NULL,
+ &Heci
+ );
+
+ if (EFI_ERROR(Status)) return EFI_SUCCESS;
+
+ Status = Heci->GetMeMode (&MeMode);
+
+ // If not normal mode
+ if(MeMode != 0)
+ return FALSE;
+
+ if(mDxePlatformAmtPolicy == NULL)
+ {
+ Status = gBS->LocateProtocol (&gDxePlatformAmtPolicyGuid, NULL, &mDxePlatformAmtPolicy);
+
+ if (EFI_ERROR(Status))
+ return FALSE;
+ }
+
+ if(mDxePlatformAmtPolicy->AmtConfig.iAmtbxHotkeyPressed == 1)
+ {
+ EFI_EVENT SetConsoleControlModeBackEvent;
+ EFI_CONSOLE_CONTROL_PROTOCOL *ConsoleControl;
+ EFI_CONSOLE_CONTROL_SCREEN_MODE ScreenMode;
+
+ // Fix Mebx Setup screen not full screen.
+ Status = gBS->LocateProtocol(
+ &gEfiConsoleControlProtocolGuid, NULL, &ConsoleControl);
+
+
+
+ ConsoleControl->GetMode(ConsoleControl, &ScreenMode, NULL, NULL);
+ if (ScreenMode == EfiConsoleControlScreenGraphics) {
+ ConsoleControl->SetMode( ConsoleControl, EfiConsoleControlScreenText );
+
+ Status = gBS->CreateEventEx (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ SetConsoleControlModeBack,
+ NULL,
+ &gMePlatformReadyToBootGuid,
+ &SetConsoleControlModeBackEvent
+ );
+ }
+ return FALSE;
+ }
+
+ PostManagerDisplayPostMessage(L"Press <CTRL + P> to Enter MEBX setup menu ");
+
+ Status = gBS->HandleProtocol(gST->ConsoleInHandle, &gEfiSimpleTextInExProtocolGuid, (void*)&SimpleTextInEX);
+ if (EFI_ERROR(Status)) return FALSE;
+
+
+ Status = SimpleTextInEX->RegisterKeyNotify (SimpleTextInEX, &Key[0], &MebxCheckForKey, &MebxKeyHandle[0]);
+ if((MEBX_UNICODE>0x40 && MEBX_UNICODE<0x5b) || (MEBX_UNICODE>0x60 && MEBX_UNICODE<0x7b)){
+ Status = SimpleTextInEX->RegisterKeyNotify (SimpleTextInEX, &Key[1], &MebxCheckForKey, &MebxKeyHandle[1]);
+ }
+
+ return FALSE;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: RemoteAssistConInAvailabilityHook
+//
+// Description: This function is a hook called when TSE determines
+// that SETUP utility has to be displayed. This function
+// is available as ELINK. In the generic implementation
+// setup password is prompted in this function.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN RemoteAssistConInAvailabilityHook (VOID)
+{
+#if CIRA_SUPPORT
+ EFI_STATUS Status;
+ UINTN VariableSize = sizeof (ME_BIOS_EXTENSION_SETUP);
+ EFI_GUID gEfiMeBiosExtensionSetupGuid = EFI_ME_BIOS_EXTENSION_SETUP_GUID;
+ CHAR16 gEfiMeBiosExtensionSetupName[] = EFI_ME_BIOS_EXTENSION_SETUP_VARIABLE_NAME;
+ EFI_GUID gEfiAmtWrapperGuid = EFI_AMT_WRAPPER_PROTOCOL_GUID;
+ AMT_WRAPPER_PROTOCOL *AmtWrapperProtocol;
+
+ Status = gBS->LocateProtocol (&gDxePlatformAmtPolicyGuid, NULL, &mDxePlatformAmtPolicy);
+ if (EFI_ERROR(Status)) return FALSE;
+
+ Status = gBS->LocateProtocol (&gEfiAmtWrapperGuid, NULL, &AmtWrapperProtocol);
+ if (EFI_ERROR(Status)) return FALSE;
+
+ Status = gRT->GetVariable (
+ gEfiMeBiosExtensionSetupName,
+ &gEfiMeBiosExtensionSetupGuid,
+ NULL,
+ &VariableSize,
+ &MeBiosExtensionSetupData);
+
+ if(EFI_ERROR(Status))
+ return FALSE;
+
+ if((MeBiosExtensionSetupData.RemoteAssistanceTriggerAvailablilty) &&
+ (mDxePlatformAmtPolicy->AmtConfig.iAmtEnabled) &&
+ (!AmtWrapperProtocol->ActiveManagementEnableKvm()) &&
+ (!AmtWrapperProtocol->ActiveManagementEnableSol()))
+ {
+#if CIRA_UNICODE>0x40 && CIRA_UNICODE<0x5b == 1
+ // ScanCode, UnicodeChar, KeyShiftState, KeyToggleState
+ EFI_KEY_DATA Key[] = {{CIRA_SCANCODE, CIRA_UNICODE, CIRA_KeyShiftState, CIRA_KeyToggleState},
+ {CIRA_SCANCODE, CIRA_UNICODE+0x20, CIRA_KeyShiftState, CIRA_KeyToggleState}};
+
+#else
+#if CIRA_UNICODE>0x60 && CIRA_UNICODE<0x7b == 1
+ // ScanCode, UnicodeChar, KeyShiftState, KeyToggleState
+ EFI_KEY_DATA Key[] = {{CIRA_SCANCODE, CIRA_UNICODE-0x20, CIRA_KeyShiftState, CIRA_KeyToggleState},
+ {CIRA_SCANCODE, CIRA_UNICODE, CIRA_KeyShiftState, CIRA_KeyToggleState}};
+#else
+ EFI_KEY_DATA Key[] = {{CIRA_SCANCODE, CIRA_UNICODE, CIRA_KeyShiftState, CIRA_KeyToggleState}};
+#endif
+#endif
+
+ EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *SimpleTextInEX;
+
+
+ Status = gBS->HandleProtocol(gST->ConsoleInHandle,
+ &gEfiSimpleTextInExProtocolGuid, (void*)&SimpleTextInEX);
+
+ if (EFI_ERROR(Status)) return FALSE;
+ PostManagerDisplayPostMessage(L"Press <CTRL + ALT + F1> Remote Assistance");
+ Status = SimpleTextInEX->RegisterKeyNotify (SimpleTextInEX, &Key[0],
+ &CIRACheckForKey, &CIRAKeyHandle[0]);
+ if((CIRA_UNICODE>0x40 && CIRA_UNICODE<0x5b) || (CIRA_UNICODE>0x60 && CIRA_UNICODE<0x7b)){
+ Status = SimpleTextInEX->RegisterKeyNotify (SimpleTextInEX, &Key[1],
+ &CIRACheckForKey, &CIRAKeyHandle[1]);
+ }
+
+ }
+#endif //CIRA_SUPPORT
+ return FALSE;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: MEProcessEnterSetup
+//
+// Description: This function is a hook called when TSE determines
+// that it has to load the boot options in the boot
+// order. This function is available as ELINK.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID MEProcessEnterSetup(VOID)
+{
+ EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *SimpleTextInEX;
+ EFI_STATUS Status;
+
+ Status = gBS->HandleProtocol(gST->ConsoleInHandle,
+ &gEfiSimpleTextInExProtocolGuid,
+ (void*)&SimpleTextInEX);
+ if(EFI_ERROR(Status))
+ return;
+
+#if CIRA_SUPPORT
+ Status = SimpleTextInEX->UnregisterKeyNotify (SimpleTextInEX, CIRAKeyHandle[0]);
+ if((CIRA_UNICODE>0x40 && CIRA_UNICODE<0x5b) || (CIRA_UNICODE>0x60 && CIRA_UNICODE<0x7b)){
+ Status = SimpleTextInEX->UnregisterKeyNotify (SimpleTextInEX, CIRAKeyHandle[1]);
+ }
+#endif
+
+ Status = SimpleTextInEX->UnregisterKeyNotify (SimpleTextInEX, MebxKeyHandle[0]);
+ if((MEBX_UNICODE>0x40 && MEBX_UNICODE<0x5b) || (MEBX_UNICODE>0x60 && MEBX_UNICODE<0x7b)){
+ Status = SimpleTextInEX->UnregisterKeyNotify (SimpleTextInEX, MebxKeyHandle[1]);
+ }
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.c b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.c
new file mode 100644
index 0000000..b490873
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.c
@@ -0,0 +1,190 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.c 1 11/02/14 9:43p Tristinchou $
+//
+// $Revision: 1 $
+//
+// $Date: 11/02/14 9:43p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.c $
+//
+// 1 11/02/14 9:43p Tristinchou
+// [TAG] EIP189985
+// [Category] Improvement
+// [Description] For ME 9.1.20.1035, add NFC related option in setup
+// [Files] NfcSupportDxe.cif
+// NfcSupportDxe.c
+// NfcSupportDxe.h
+// NfcSupportDxe.sdl
+// NfcSupportDxe.dxs
+// NfcSupportDxe.mak
+//
+//**********************************************************************
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+#include "HeciMsgLib.h"
+#include EFI_PROTOCOL_DEFINITION (MeBiosPayloadData)
+#include "MELib.h"
+#include <token.h>
+#endif
+
+#include "NfcSupportDxe.h"
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: MeSupportNfc
+//
+// Description: This function determines ME firmware support enable/disable
+// NFC state. From ME 9.1.20.1035, ME firmware support this
+// feature.
+//
+// Input: DXE_MBP_DATA_PROTOCOL *MbpDataProtocol
+//
+// Output: BOOLEAN
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN
+MeSupportNfc(
+ IN DXE_MBP_DATA_PROTOCOL *MbpDataProtocol
+)
+{
+ //If ME version is above 9.1.20.1035
+ if( (MbpDataProtocol != NULL) &&
+ ( (MbpDataProtocol->MeBiosPayload.FwVersionName.MajorVersion == 0x09) &&
+ (MbpDataProtocol->MeBiosPayload.FwVersionName.MinorVersion == 0x01) &&
+ ( (MbpDataProtocol->MeBiosPayload.FwVersionName.HotfixVersion >= 0x14) ||
+ (MbpDataProtocol->MeBiosPayload.FwVersionName.BuildVersion >= 0x040B) ) ) )
+ {
+ return TRUE;
+ }
+
+ return FALSE;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NfcSupportDxeEntryPoint
+//
+// Description: Module entry point
+//
+// Input: EFI_HANDLE ImageHandle
+// EFI_SYSTEM_TABLE *SystemTable
+//
+// Output: EFI_STATUS
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+NfcSupportDxeEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+ DXE_MBP_DATA_PROTOCOL *MbpData = NULL;
+ UINT32 VarAttr;
+ UINTN VarSize;
+ EFI_GUID NfcSupportDataGuid = NFC_SUPPORT_DATA_GUID;
+ NFC_SUPPORT_DATA NfcSupportData;
+ MEFWCAPS_SKU FwFeatureState;
+
+ DEBUG ((EFI_D_INFO, "[NfcSupportDxe.c] : Entry Point...\n"));
+
+ Status = gBS->LocateProtocol(
+ &gMeBiosPayloadDataProtocolGuid,
+ NULL,
+ (VOID**)&MbpData );
+ if( EFI_ERROR(Status) )
+ MbpData = NULL;
+
+ VarAttr = 0;
+ VarSize = sizeof( NFC_SUPPORT_DATA );
+ Status = gRT->GetVariable (
+ L"NfcSupportData",
+ &NfcSupportDataGuid,
+ &VarAttr,
+ &VarSize,
+ &NfcSupportData );
+ if( EFI_ERROR(Status) )
+ VarAttr = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE;
+
+ if( MbpData != NULL )
+ {
+ NfcSupportData.NFCCapability = MbpData->MeBiosPayload.FwCapsSku.FwCapabilities.Fields.NFC;;
+ NfcSupportData.NFCDeviceType = MbpData->MeBiosPayload.NfcSupport.NfcData.DeviceType;
+ }
+ else
+ {
+ NfcSupportData.NFCCapability = 0;
+ NfcSupportData.NFCDeviceType = 0;
+ }
+
+ Status = HeciGetFwFeatureStateMsg( &FwFeatureState );
+ if( !EFI_ERROR(Status) )
+ NfcSupportData.NFCState = FwFeatureState.Fields.NFC;
+ else
+ NfcSupportData.NFCState = 0;
+
+ if( MeSupportNfc(MbpData) )
+ NfcSupportData.MeSupportNFC = 1;
+ else
+ NfcSupportData.MeSupportNFC = 0;
+
+ Status = gRT->SetVariable(
+ L"NfcSupportData",
+ &NfcSupportDataGuid,
+ VarAttr,
+ VarSize,
+ &NfcSupportData );
+ if ( EFI_ERROR(Status) )
+ return EFI_SUCCESS;
+
+ //If ME support NFC and NFC capability is on
+ if( (NfcSupportData.MeSupportNFC == 1) &&
+ (NfcSupportData.NFCCapability == 1) )
+ {
+ if( (NfcSupportData.NFCEnableUpdate == 1) &&
+ (NfcSupportData.NFCState != NfcSupportData.NFCEnable) )
+ {
+ if( NfcSupportData.NFCEnable == 1 )
+ Status = HeciFwFeatureStateOverride( 0x80000000, 0 );
+ else
+ Status = HeciFwFeatureStateOverride( 0, 0x80000000 );
+
+ Status = HeciSendCbmResetRequest(CBM_RR_REQ_ORIGIN_BIOS_POST, CBM_HRR_GLOBAL_RESET);
+// if( !EFI_ERROR(Status) )
+// EFI_DEADLOOP();
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.cif b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.cif
new file mode 100644
index 0000000..4c5ff29
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.cif
@@ -0,0 +1,14 @@
+<component>
+ name = "NfcSupportDxe"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\MeSetup\NfcSupportDxe"
+ RefName = "NfcSupportDxe"
+[files]
+"NfcSupportDxe.c"
+"NfcSupportDxe.h"
+"NfcSupportDxe.sdl"
+"NfcSupportDxe.dxs"
+"NfcSupportDxe.mak"
+[parts]
+"NfcSupportSetupHook"
+<endComponent>
diff --git a/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.dxs b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.dxs
new file mode 100644
index 0000000..8395065
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.dxs
@@ -0,0 +1,70 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.dxs 1 11/02/14 9:43p Tristinchou $
+//
+// $Revision: 1 $
+//
+// $Date: 11/02/14 9:43p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.dxs $
+//
+// 1 11/02/14 9:43p Tristinchou
+// [TAG] EIP189985
+// [Category] Improvement
+// [Description] For ME 9.1.20.1035, add NFC related option in setup
+// [Files] NfcSupportDxe.cif
+// NfcSupportDxe.c
+// NfcSupportDxe.h
+// NfcSupportDxe.sdl
+// NfcSupportDxe.dxs
+// NfcSupportDxe.mak
+//
+//
+//**********************************************************************
+#include "AutoGen.h"
+#include "DxeDepex.h"
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+
+#include EFI_PROTOCOL_DEFINITION (Heci)
+#include EFI_ARCH_PROTOCOL_DEFINITION (Variable)
+#include EFI_PROTOCOL_DEFINITION (PchReset)
+#include EFI_PROTOCOL_DEFINITION (MeBiosPayloadData)
+
+#endif
+
+DEPENDENCY_START
+ EFI_HECI_PROTOCOL_GUID AND
+ PCH_RESET_PROTOCOL_GUID AND
+ EFI_VARIABLE_ARCH_PROTOCOL_GUID AND
+ ME_BIOS_PAYLOAD_DATA_PROTOCOL_GUID
+DEPENDENCY_END
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.h b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.h
new file mode 100644
index 0000000..6e12a2d
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.h
@@ -0,0 +1,71 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.h 1 11/02/14 9:43p Tristinchou $
+//
+// $Revision: 1 $
+//
+// $Date: 11/02/14 9:43p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.h $
+//
+// 1 11/02/14 9:43p Tristinchou
+// [TAG] EIP189985
+// [Category] Improvement
+// [Description] For ME 9.1.20.1035, add NFC related option in setup
+// [Files] NfcSupportDxe.cif
+// NfcSupportDxe.c
+// NfcSupportDxe.h
+// NfcSupportDxe.sdl
+// NfcSupportDxe.dxs
+// NfcSupportDxe.mak
+//
+//
+//**********************************************************************
+#ifndef _NfcSupportDxe_H_
+#define _NfcSupportDxe_H_
+
+#pragma pack(push, 1)
+typedef struct {
+ BOOLEAN NFCCapability;
+ BOOLEAN NFCState;
+ UINT8 NFCDeviceType;
+ UINT8 MeSupportNFC;
+ UINT8 NFCEnable;
+ UINT8 NFCEnableUpdate;
+} NFC_SUPPORT_DATA;
+#pragma pack(pop)
+
+//1E5ACFFE-ED4C-4BC0-AE51-511EFDA0522E
+#define NFC_SUPPORT_DATA_GUID \
+ {0x1E5ACFFE, 0xED4C, 0x4BC0, 0xAE, 0x51, 0x51, 0x1E, 0xFD, 0xA0, 0x52, 0x2E}
+
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.mak b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.mak
new file mode 100644
index 0000000..567adc0
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.mak
@@ -0,0 +1,134 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2014, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.mak 1 11/02/14 9:43p Tristinchou $
+#
+# $Revision: 1 $
+#
+# $Date: 11/02/14 9:43p $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.mak $
+#
+# 1 11/02/14 9:43p Tristinchou
+# [TAG] EIP189985
+# [Category] Improvement
+# [Description] For ME 9.1.20.1035, add NFC related option in setup
+# [Files] NfcSupportDxe.cif
+# NfcSupportDxe.c
+# NfcSupportDxe.h
+# NfcSupportDxe.sdl
+# NfcSupportDxe.dxs
+# NfcSupportDxe.mak
+#
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name: NfcSupportDxe.mak
+#
+# Description: Makfile for ME NFC Setup module.
+#
+#----------------------------------------------------------------------------
+#<AMI_FHDR_END>
+all : NfcSupportDxe
+
+NfcSupportDxe : $(BUILD_DIR)\NfcSupportDxe.mak NfcSupportDxe_Bin
+
+$(BUILD_DIR)\NfcSupportDxe.mak : $(NFC_SUPPORT_DXE_PATH)\$(@B).cif $(NFC_SUPPORT_DXE_PATH)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(NFC_SUPPORT_DXE_PATH)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+NfcSupportDxe_INCLUDES=\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(EDK_INCLUDES)\
+ $(ME_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+
+NfcSupportDxe_LIBS=\
+ $(EDKPROTOCOLLIB)\
+ $(EFIGUIDLIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EDKFRAMEWORKGUIDLIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGlueBaseMemoryLib_LIB)\
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeServicesTableLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueUefiBootServicesTableLib_LIB)\
+ $(EdkIIGlueUefiDevicePathLib_LIB)\
+ $(EdkIIGlueBasePciLibPciExpress_LIB)\
+ $(EdkIIGlueEdkDxeRuntimeDriverLib_LIB)\
+ $(EdkIIGlueDxeHobLib_LIB)\
+ $(MeLibDxe_LIB)\
+ $(PchPlatformDxeLib_LIB)\
+
+NfcSupportDxe_DEFINES=\
+ $(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=NfcSupportDxeEntryPoint"\
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_DXE_SERVICES_TABLE_LIB__ \
+
+NfcSupportDxe_Bin : $(NfcSupportDxe_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\NfcSupportDxe.mak all\
+ "MY_INCLUDES=$(NfcSupportDxe_INCLUDES)"\
+ "MY_DEFINES=$(NfcSupportDxe_DEFINES)"\
+ GUID=1E5ACFFE-ED4C-4BC0-AE51-511EFDA0522E \
+ ENTRY_POINT=_ModuleEntryPoint \
+ EDKIIModule=DXEDRIVER\
+ TYPE=BS_DRIVER \
+ DEPEX1=$(NFC_SUPPORT_DXE_PATH)\NfcSupportDxe.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ COMPRESS=1\
+
+!IF DEFINED(NFC_SUPPORT_DXE_SUPPORT) && "$(NFC_SUPPORT_DXE_SUPPORT)" == "1"
+SetupData : $(BUILD_DIR)\NfcSupportSetupHook.obj
+!ENDIF
+
+NfcSupportSetupHook_CFLAGS=$(CFLAGS) \
+ -I $(TSEBIN_DIR)\Inc \
+ -I $(TSEBIN_DIR)\
+ -I $(NFC_SUPPORT_DXE_PATH)\
+ -I $(PROJECT_DIR)\Include
+
+$(BUILD_DIR)\NfcSupportSetupHook.obj : $(NFC_SUPPORT_DXE_PATH)\NfcSupportSetupHook.c
+ $(CC) $(NfcSupportSetupHook_CFLAGS) /Fo$(BUILD_DIR)\ $(NFC_SUPPORT_DXE_PATH)\NfcSupportSetupHook.c
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2014, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.sdl b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.sdl
new file mode 100644
index 0000000..4e3500d
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportDxe.sdl
@@ -0,0 +1,62 @@
+TOKEN
+ Name = "NFC_SUPPORT_DXE_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable NfcSupportDxe support in DXE Phase"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_NFC_SETTING"
+ Value = "1"
+ Help = "Default value of NFC Enable option"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+PATH
+ Name = "NFC_SUPPORT_DXE_PATH"
+End
+
+MODULE
+ Help = "Includes NfcSupportDxe.mak to Project"
+ File = "NfcSupportDxe.mak"
+End
+
+ELINK
+ Name = "NfcSupportResetHook,"
+ Parent = "PreSystemResetHook,"
+ Priority = 60
+ Token = "NFC_SUPPORT_DXE_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\NfcSupportDxe.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "-i $(NFC_SUPPORT_DXE_PATH)"
+ Parent = "SETUP_VFR_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\NfcSupportSetupHook.obj"
+ Parent = "AMITSE_Objects"
+ Token = "NFC_SUPPORT_DXE_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "NfcSupportEnterSetup,"
+ Parent = "ProcessEnterSetup,"
+ Token = "NFC_SUPPORT_DXE_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportSetupHook.c b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportSetupHook.c
new file mode 100644
index 0000000..98cecc2
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportSetupHook.c
@@ -0,0 +1,154 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportSetupHook.c 1 11/02/14 9:43p Tristinchou $
+//
+// $Revision: 1 $
+//
+// $Date: 11/02/14 9:43p $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportSetupHook.c $
+//
+// 1 11/02/14 9:43p Tristinchou
+// [TAG] EIP189985
+// [Category] Improvement
+// [Description] For ME 9.1.20.1035, add NFC related option in setup
+// [Files] NfcSupportSetupHook.cif
+// NfcSupportSetupHook.c
+//
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: NfcSupportSetupHook.c
+//
+// Description: Setup hooks for NfcSupportDxe module.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include <Token.h>
+#include <Setup.h>
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include "NfcSupportDxe.h"
+
+//----------------------------------------------------------------------------
+// Variable and External Declaration(s)
+//----------------------------------------------------------------------------
+// Variable Declaration(s)
+static NFC_SUPPORT_DATA gNewNfcSupportData;
+static NFC_SUPPORT_DATA gOldNfcSupportData;
+
+// GUID Definition(s)
+static EFI_GUID gNfcSupportDataGuid = NFC_SUPPORT_DATA_GUID;
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NfcSupportEnterSetup
+//
+// Description: This function is a hook called when TSE determines
+// that it has to load the boot options in the boot
+// order. This function is available as ELINK.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+NfcSupportEnterSetup(
+ VOID
+)
+{
+ EFI_STATUS Status;
+ UINT32 VarAttr;
+ UINTN VariableSize;
+
+ VariableSize = sizeof(NFC_SUPPORT_DATA);
+ Status = pRS->GetVariable(
+ L"NfcSupportData",
+ &gNfcSupportDataGuid,
+ &VarAttr,
+ &VariableSize,
+ &gOldNfcSupportData );
+ return;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NfcSupportResetHook
+//
+// Description: This function is a hook called after some control
+// modified in the setup utility by user. This
+// function is available as ELINK.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+NfcSupportResetHook(
+ VOID
+)
+{
+ EFI_STATUS Status;
+ UINT32 VarAttr;
+ UINTN VariableSize;
+
+ VariableSize = sizeof(NFC_SUPPORT_DATA);
+ Status = pRS->GetVariable(
+ L"NfcSupportData",
+ &gNfcSupportDataGuid,
+ &VarAttr,
+ &VariableSize,
+ &gNewNfcSupportData );
+ if ( !EFI_ERROR (Status) )
+ {
+ if( gNewNfcSupportData.NFCEnable != gOldNfcSupportData.NFCEnable )
+ {
+ gNewNfcSupportData.NFCEnableUpdate = 1;
+
+ Status = pRS->SetVariable (
+ L"NfcSupportData",
+ &gNfcSupportDataGuid,
+ VarAttr,
+ VariableSize,
+ &gNewNfcSupportData );
+ }
+ }
+
+ return;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportSetupHook.cif b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportSetupHook.cif
new file mode 100644
index 0000000..f07c1a0
--- /dev/null
+++ b/Board/EM/MeWrapper/MeSetup/NfcSupportDxe/NfcSupportSetupHook.cif
@@ -0,0 +1,8 @@
+<component>
+ name = "NfcSupportSetupHook"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\MeSetup\NfcSupportDxe"
+ RefName = "NfcSupportSetupHook"
+[files]
+"NfcSupportSetupHook.c"
+<endComponent> \ No newline at end of file
diff --git a/Board/EM/MeWrapper/MeWrapper.cif b/Board/EM/MeWrapper/MeWrapper.cif
new file mode 100644
index 0000000..a2ce9f5
--- /dev/null
+++ b/Board/EM/MeWrapper/MeWrapper.cif
@@ -0,0 +1,18 @@
+<component>
+ name = "MeWrapper"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper"
+ RefName = "MeWrapper"
+[files]
+"MeWrapper.sdl"
+[parts]
+"MeSetup"
+"MePlatformPolicy"
+"MePciPlatform"
+"Icc"
+"Smbios131"
+"TdtWrapper"
+"MdesStatusCode"
+"AtAmUi"
+"PttWrapper"
+<endComponent>
diff --git a/Board/EM/MeWrapper/MeWrapper.sdl b/Board/EM/MeWrapper/MeWrapper.sdl
new file mode 100644
index 0000000..9ee98b4
--- /dev/null
+++ b/Board/EM/MeWrapper/MeWrapper.sdl
@@ -0,0 +1,20 @@
+TOKEN
+ Name = "MeWrapper_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Help = "Main switch to enable ME Wrapper support in Project"
+ Token = "iME_SUPPORT" "=" "1"
+End
+
+PATH
+ Name = "MeWrapper_DIR"
+End
+
+ELINK
+ Name = "/I$(MeWrapper_DIR)"
+ Parent = "ME_INCLUDES"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/MeWrapper/PttWrapper/PttWrapper.c b/Board/EM/MeWrapper/PttWrapper/PttWrapper.c
new file mode 100644
index 0000000..6a8c668
--- /dev/null
+++ b/Board/EM/MeWrapper/PttWrapper/PttWrapper.c
@@ -0,0 +1,142 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/PttWrapper/PttWrapper.c 4 11/05/14 6:00a Tristinchou $
+//
+// $Revision: 4 $
+//
+// $Date: 11/05/14 6:00a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/PttWrapper/PttWrapper.c $
+//
+// 4 11/05/14 6:00a Tristinchou
+// [TAG] EIP190594
+// [Description] Avoid install smm protocol with bootservice
+// InstallProtocol()
+//
+// 3 1/18/13 12:20a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Fix SMM Variable protocol fail.
+// [Files] PttWrapper.dxs
+// PttWrapper.c
+// PttWrapper.mak
+// PttWrapper.sdl
+// PttWrapper.cif
+//
+// 2 11/20/12 3:35a Klzhan
+// [TAG] EIPNone
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] Smm Variable Protocol not installed
+//
+// 1 11/07/12 6:21a Klzhan
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: PttWrapper.c
+//
+// Description: Setup Hooks for Tdt.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include <EFI.h>
+#include <AmiDxeLib.h>
+#include <ReferenceCode\ME\SampleCode\Protocol\SmmVariable\SmmVariable.h>
+
+
+#define EFI_SMM_RUNTIME_SERVICES_TABLE_GUID \
+ { 0x395c33fe, 0x287f, 0x413e, { 0xa0, 0x55, 0x80, 0x88, 0xc0, 0xe1, 0xd4, 0x3e } }
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: InSmmFunction
+//
+// Description: InSmmFunction
+//
+// Input:
+//
+// Output:
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+InSmmFunction
+(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ //Modification in PttHciSmm.c uses RuntimeServices' variable service
+ //directly, so we don't need to install SmmVariableProtocol in gBS.
+
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: PttWrapperEntryPoint
+//
+// Description: Driver EntryPoint
+//
+// Input:
+//
+// Output:
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+EFIAPI
+PttWrapperEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ InitAmiLib(ImageHandle, SystemTable);
+ InitSmmHandlerEx(ImageHandle, SystemTable, InSmmFunction, NULL);
+
+ return EFI_SUCCESS;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/PttWrapper/PttWrapper.cif b/Board/EM/MeWrapper/PttWrapper/PttWrapper.cif
new file mode 100644
index 0000000..9b38c3e
--- /dev/null
+++ b/Board/EM/MeWrapper/PttWrapper/PttWrapper.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "PttWrapper"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\PttWrapper\"
+ RefName = "PttWrapper"
+[files]
+"PttWrapper.dxs"
+"PttWrapper.c"
+"PttWrapper.mak"
+"PttWrapper.sdl"
+<endComponent>
diff --git a/Board/EM/MeWrapper/PttWrapper/PttWrapper.dxs b/Board/EM/MeWrapper/PttWrapper/PttWrapper.dxs
new file mode 100644
index 0000000..c75d348
--- /dev/null
+++ b/Board/EM/MeWrapper/PttWrapper/PttWrapper.dxs
@@ -0,0 +1,99 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/PttWrapper/PttWrapper.dxs 2 1/18/13 12:20a Klzhan $
+//
+// $Revision: 2 $
+//
+// $Date: 1/18/13 12:20a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/PttWrapper/PttWrapper.dxs $
+//
+// 2 1/18/13 12:20a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Fix SMM Variable protocol fail.
+// [Files] PttWrapper.dxs
+// PttWrapper.c
+// PttWrapper.mak
+// PttWrapper.sdl
+// PttWrapper.cif
+//
+// 1 11/07/12 6:21a Klzhan
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: TdtSetup.dxs
+//
+// Description: Dependency expression file.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2004-2006 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ TDTPlatformPolicy.h
+
+Abstract:
+
+ Dependency expression file for TDTPlatformPolicy Invocation Driver.
+
+--*/
+/*++
+ This file contains an 'Intel Peripheral Driver' and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+--*/
+#include <Protocol/SmmBase.h>
+#include <Protocol/SmmSwDispatch.h>
+
+DEPENDENCY_START
+ EFI_SMM_BASE_PROTOCOL_GUID AND
+ EFI_SMM_SW_DISPATCH_PROTOCOL_GUID
+DEPENDENCY_END
+
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/PttWrapper/PttWrapper.mak b/Board/EM/MeWrapper/PttWrapper/PttWrapper.mak
new file mode 100644
index 0000000..66da210
--- /dev/null
+++ b/Board/EM/MeWrapper/PttWrapper/PttWrapper.mak
@@ -0,0 +1,68 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/PttWrapper/PttWrapper.mak 1 11/07/12 6:21a Klzhan $
+#
+# $Revision: 1 $
+#
+# $Date: 11/07/12 6:21a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/PttWrapper/PttWrapper.mak $
+#
+# 1 11/07/12 6:21a Klzhan
+#
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: PttWrapper.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+all : PttWrapper
+
+PttWrapper : $(BUILD_DIR)\PttWrapper.mak PttWrapperBin
+
+$(BUILD_DIR)\PttWrapper.mak : $(PttWrapper_DIR)\$(@B).cif $(PttWrapper_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(PttWrapper_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+PttWrapperBin : $(AMIDXELIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\PttWrapper.mak all\
+ GUID=b19ef33c-10a6-4066-9217-8e5ee011a52f\
+ ENTRY_POINT=PttWrapperEntryPoint\
+ TYPE=BS_DRIVER \
+ COMPRESS=1
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/PttWrapper/PttWrapper.sdl b/Board/EM/MeWrapper/PttWrapper/PttWrapper.sdl
new file mode 100644
index 0000000..c7643e3
--- /dev/null
+++ b/Board/EM/MeWrapper/PttWrapper/PttWrapper.sdl
@@ -0,0 +1,27 @@
+TOKEN
+ Name = "PttWrapper_SUPPORT"
+ Value = "0"
+ Help = "Main switch to enable TdtWrapper support in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Token = "PTTHciSmm_SUPPORT" "=" "1"
+End
+
+
+PATH
+ Name = "PttWrapper_DIR"
+End
+
+MODULE
+ Help = "Includes TdtWrapper.mak to Project"
+ File = "PttWrapper.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\PttWrapper.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/MeWrapper/Smbios131/Smbios131.c b/Board/EM/MeWrapper/Smbios131/Smbios131.c
new file mode 100644
index 0000000..0b703ac
--- /dev/null
+++ b/Board/EM/MeWrapper/Smbios131/Smbios131.c
@@ -0,0 +1,553 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Smbios131/Smbios131.c 7 3/06/13 4:12a Klzhan $
+//
+// $Revision: 7 $
+//
+// $Date: 3/06/13 4:12a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Smbios131/Smbios131.c $
+//
+// 7 3/06/13 4:12a Klzhan
+// Spec update : PlatformBrand = 5 means SBA
+//
+// 6 2/18/13 2:25a Klzhan
+// Improvement : Checking SBA Platform.
+//
+// 5 1/25/13 4:27a Klzhan
+// Return EFI_SUCCESS in entrypoint.
+//
+// 4 12/18/12 2:29a Klzhan
+// [TAG] EIP109707
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC 0.81
+// [Files] Smbios131.sdl
+// Smbios131.mak
+// Smbios131.c
+// Smbios131.dxs
+// Smbios131.h
+// Smbios131.cif
+//
+// 3 7/02/12 11:38p Klzhan
+// [TAG] EIP94113
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC0.6
+// [Files] Smbios131.sdl
+// Smbios131.mak
+// Smbios131.c
+// Smbios131.dxs
+// Smbios131.h
+// Smbios131.cif
+//
+// 2 4/24/12 12:32a Klzhan
+// Update modulepart to latest
+//
+// 1 2/08/12 1:07a Klzhan
+// Initial Check in
+//
+// 6 7/26/11 9:57a Klzhan
+// Create token for some Bios capabilities parameters.
+//
+// 5 7/26/11 8:37a Klzhan
+// [TAG] EIP64542
+// [Category] Improvement
+// [Description] Replace Getvariable by GetNbSetupdata.
+// [Files] Smbios131.sdl
+// Smbios131.mak
+// Smbios131.c
+// Smbios131.dxs
+// Smbios131.h
+// Smbios131.cif
+//
+// 4 7/11/11 5:40a Klzhan
+// Close Event after SMBIOS 131 created.
+//
+// 3 7/08/11 4:23a Klzhan
+// [TAG] EIP64189
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC to 0.7
+//
+// 2 5/19/11 4:39a Klzhan
+// Improvement : Fill MEBX version with EFI MEBX.
+//
+// 1 2/25/11 1:40a Klzhan
+// Initial Check-in
+//
+// 2 12/16/10 4:00a Klzhan
+// [TAG] EIP50237
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] Txt Support is not been set in SMBIOS type 131
+// [RootCause] SETUP_CPU_FEATURES has been changed.
+// [Solution] Include PlatformCPULib.h
+// [Files] Smbios131.c and Smbios131.h
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: Smbios131.c
+//
+// Description: Create SMbios type 131.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#define _SMBIOS_GUID_H_
+#define __EDKII_GLUE_MEMORY_ALLOCATION_LIB_H__
+#define __EDKII_GLUE_BASE_MEMORY_LIB_H__
+
+#include "Smbios131.h"
+#include <Protocol\GlobalNvsArea\GlobalNvsArea.h>
+#include "MePlatformPolicy.h"
+#if EFI_SPECIFICATION_VERSION>0x20000
+#include "SaAccess.h"
+#include "PchAccess.h"
+#else
+#include "Efi.h"
+#include "EfiDriverLib.h"
+#include "SaAccess.h"
+#include "PchAccess.h"
+#include "EdkIIGluePcd.h"
+#include "EdkIIGluePcdPciExpressLib.h"
+#include "EdkIIGlueConfig.h"
+#include "EdkIIGlueIoLib.h"
+#include "EdkIIGluePciExpressLib.h"
+#include "EdkIIGlueUefiLib.h"
+#define __UEFI_HII__H__
+#define __HII_PROTOCOL_H__
+#define _HII_H_
+#define __FORM_CALLBACK_PROTOCOL_H__
+#endif
+#define SETUP_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+
+
+#define ME_INFO_SETUP_GUID \
+ {0x78259433, 0x7B6D, 0x4DB3, 0x9A, 0xE8, 0x36, 0xC4, 0xC2, 0xC3, 0xA1, 0x7D}
+
+#include EFI_PROTOCOL_CONSUMER (MebxProtocol)
+
+EFI_GUID gSetupGuid = SETUP_GUID;
+EFI_GUID gMeSetupInfoGuid = ME_INFO_SETUP_GUID;
+EFI_GUID gEfiSmbiosProtocolGuid = EFI_SMBIOS_PROTOCOL_GUID;
+EFI_GUID gEfiEventReadyToBootGuid = EFI_EVENT_GROUP_READY_TO_BOOT;
+EFI_GUID gEfiMeBiosExtensionSetupGuid = EFI_ME_BIOS_EXTENSION_SETUP_GUID;
+CHAR16 gEfiMeBiosExtensionSetupName[] = EFI_ME_BIOS_EXTENSION_SETUP_VARIABLE_NAME;
+EFI_GUID gEfiGlobalVariableGuid = EFI_GLOBAL_VARIABLE_GUID;
+UINT8 METype = 0;
+EFI_EVENT mLegacyBootEvent;
+MEFWCAPS_SKU gMeFwCapsSkuData;
+#if VA_SUPPORT
+EFI_GUID gEfiVaNVMVariableGuid = EFI_VA_NVM_VARIABLE_GUID;
+#endif
+UINT8 TdtWwanSuport = 0;
+EFI_RUNTIME_SERVICES *gRT;
+EFI_BOOT_SERVICES *gBS;
+
+EFI_STATUS
+GetRawImage (
+ IN EFI_GUID *NameGuid,
+ IN OUT VOID **Buffer,
+ IN OUT UINTN *Size
+ )
+/*++
+
+Routine Description:
+
+ Loads binary from RAW section of main firwmare volume
+
+Arguments:
+
+ NameGuid - The guid of binary file
+ Buffer - Returns a pointer to allocated memory. Caller must free it when done.
+ Size - Returns the size of the binary loaded into the buffer.
+
+Returns:
+
+ EFI_NOT_FOUND - Can't found the binary.
+ EFI_LOAD_ERROR - Load fail.
+ EFI_SUCCESS - Load success.
+
+--*/
+{
+ EFI_STATUS Status;
+ UINTN HandleCount;
+ UINTN Index;
+ EFI_FIRMWARE_VOLUME_PROTOCOL *Fv;
+ EFI_HANDLE *HandleBuff;
+ UINT32 AuthenticationStatus;
+
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiFirmwareVolumeProtocolGuid,
+ NULL,
+ &HandleCount,
+ &HandleBuff
+ );
+ if (EFI_ERROR (Status) || HandleCount == 0) {
+ return EFI_NOT_FOUND;
+ }
+ //
+ // Find desired image in all Fvs
+ //
+ for (Index = 0; Index < HandleCount; Index++) {
+ Status = gBS->HandleProtocol (
+ HandleBuff[Index],
+ &gEfiFirmwareVolumeProtocolGuid,
+ &Fv
+ );
+
+ if (EFI_ERROR (Status)) {
+ if (HandleBuff != NULL) {
+ gBS->FreePool (HandleBuff);
+ }
+
+ return EFI_LOAD_ERROR;
+ }
+ //
+ // Try a raw file
+ //
+ Status = Fv->ReadSection (
+ Fv,
+ NameGuid,
+ EFI_SECTION_RAW,
+ 0,
+ Buffer,
+ Size,
+ &AuthenticationStatus
+ );
+
+ if (!EFI_ERROR (Status)) {
+ break;
+ }
+ }
+
+ if (HandleBuff != NULL) {
+ gBS->FreePool (HandleBuff);
+ }
+
+ if (Index >= HandleCount) {
+ return EFI_NOT_FOUND;
+ }
+
+ return EFI_SUCCESS;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: UpdateSmbios131Table
+//
+// Description: SMBIOS tables 83 are filled here
+//
+// Input: EFI_EVENT Event,
+// VOID *ParentImageHandle
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+MePlatformCapabilities (
+ EFI_MISC_OEM_TYPE_0x83 *Type131
+)
+{
+ ME_INFO_SETUP_DATA MeInfoSetupData;
+ PLATFORM_TYPE_RULE_DATA PlatformTypeDate;
+ EFI_STATUS Status;
+ UINTN DataSize;
+
+ DataSize = sizeof (ME_INFO_SETUP_DATA);
+ Status = gRT->GetVariable (
+ L"MeInfoSetup",
+ &gMeSetupInfoGuid,
+ NULL,
+ &DataSize,
+ &MeInfoSetupData
+ );
+ if (EFI_ERROR(Status)) return ;
+ Type131->MeCapabilities.MeEnabled = 1;
+ Type131->MeCapabilities.MeMajorVer = MeInfoSetupData.MeMajor;
+ Type131->MeCapabilities.MeMinorVer = MeInfoSetupData.MeMinor;
+ Type131->MeCapabilities.MeBuildNo = MeInfoSetupData.MeBuildNo;
+ Type131->MeCapabilities.MeHotFixNo = MeInfoSetupData.MeHotFix;
+ Type131->MeCapabilities.AtSupported = gMeFwCapsSkuData.Fields.IntelAT;
+ Type131->MeCapabilities.IntelKVM = gMeFwCapsSkuData.Fields.KVM;
+ Status = HeciGetPlatformType(&PlatformTypeDate);
+ if (EFI_ERROR(Status)) return ;
+ if (PlatformTypeDate.Fields.PlatformBrand == 1) {
+ Type131->MeCapabilities.IntelAmtFw = 1;
+ Type131->MeCapabilities.LocalWakeupTimer = 1;
+ }
+ if (PlatformTypeDate.Fields.PlatformBrand == 2)
+ Type131->MeCapabilities.IntelAmtFwStandard = 1;
+
+ if (PlatformTypeDate.Fields.PlatformBrand == 5)
+ Type131->MeCapabilities.IntelSmallBusiness = 1;
+
+ METype = (UINT8)PlatformTypeDate.Fields.IntelMeFwImageType;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: UpdateSmbios131Table
+//
+// Description: SMBIOS tables 83 are filled here
+//
+// Input: EFI_EVENT Event,
+// VOID *ParentImageHandle
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+UpdateSmbios131Table(
+ EFI_EVENT Event,
+ VOID *ParentImageHandle
+)
+{
+ EFI_STATUS Status;
+ EFI_MISC_OEM_TYPE_0x83 Data83;
+ EFI_SMBIOS_PROTOCOL *mSmbiosProtocol;
+ UINT64 Ia32FeatureControl;
+ EFI_CPUID_REGISTER CpuidRegs ;
+#if VA_SUPPORT
+ EFI_VA_NVM_VAR VaNVMVar;
+#endif
+
+ mSmbiosProtocol = NULL;
+ Status = gBS->LocateProtocol(
+ &gEfiSmbiosProtocolGuid,
+ NULL,
+ &mSmbiosProtocol
+ );
+ if (EFI_ERROR(Status)) return Status;
+
+ //Clear all data
+ gBS->SetMem (&Data83, sizeof(EFI_MISC_OEM_TYPE_0x83), 0);
+
+// Data83
+
+ Data83.Header.Type = 0x83;
+ Data83.Header.Length = 0x40;
+ Data83.Header.Handle = 0;
+ gBS->CopyMem (
+ Data83.vProSignature,
+ vPro_Signature,
+ sizeof (UINT32)
+ );
+
+ Ia32FeatureControl = EfiReadMsr(EFI_MSR_IA32_FEATURE_CONTROL);
+ EfiCpuid (1, &CpuidRegs) ;
+
+//CPU
+ Data83.CpuCapabilities.VMXState = (UINT32)(RShiftU64(Ia32FeatureControl, 2));
+ Data83.CpuCapabilities.SMXState = (UINT32)(RShiftU64(Ia32FeatureControl, 1));
+
+ if (CpuidRegs.RegEcx & BIT6) {
+ Data83.CpuCapabilities.LtTxtCap = 1;
+ } else {
+ Data83.CpuCapabilities.LtTxtCap = 0;
+ }
+
+ if ((Ia32FeatureControl & TXT_OPT_IN_VMX_AND_SMX_MSR_VALUE) == TXT_OPT_IN_VMX_AND_SMX_MSR_VALUE) {
+ Data83.CpuCapabilities.LtTxtEnabled = 1;
+ } else {
+ Data83.CpuCapabilities.LtTxtEnabled = 0;
+ }
+
+ if (CpuidRegs.RegEcx & BIT5) {
+ Data83.CpuCapabilities.VTxCap = 1;
+ } else {
+ Data83.CpuCapabilities.VTxCap = 0;
+ }
+ Data83.CpuCapabilities.VTxEnabled = (UINT32)(RShiftU64(Ia32FeatureControl, 2));
+
+//Pch
+ Data83.PchCapabilities.FunctionNumber = PCI_FUNCTION_NUMBER_PCH_LPC;
+ Data83.PchCapabilities.DeviceNumber = PCI_DEVICE_NUMBER_PCH_LPC;
+ Data83.PchCapabilities.BusNumber = DEFAULT_PCI_BUS_NUMBER_PCH;
+ Data83.PchCapabilities.DeviceID = PchLpcPciCfg16(R_PCH_LPC_DEVICE_ID);
+ Data83.PchCapabilities.Reserved = 0;
+
+//Me
+//Filled above along with Data82 table
+ MePlatformCapabilities(&Data83);
+
+// MEBX Version
+ // Fill MEBX Version when ME FW is 5MB
+ if(METype == 4)
+ {
+ EFI_MEBX_PROTOCOL *MebxProtocol;
+ Status = gBS->LocateProtocol (&gEfiMebxProtocolGuid, NULL, &MebxProtocol);
+ if (!EFI_ERROR (Status)) {
+ Data83.vMEBX_Major = MebxProtocol->MebxVersion.Major;
+ Data83.vMEBX_Minor = MebxProtocol->MebxVersion.Minor;
+ Data83.vMEBX_HotFix = MebxProtocol->MebxVersion.Hotfix;
+ Data83.vMEBX_Build = MebxProtocol->MebxVersion.Build;
+ } else {
+ Data83.vMEBX_Major = 0;
+ Data83.vMEBX_Minor = 0;
+ Data83.vMEBX_HotFix = 0;
+ Data83.vMEBX_Build = 0;
+ }
+ }
+
+//NetworkDevice
+ Data83.NetworkDevice.FunctionNumber = PCI_FUNCTION_NUMBER_PCH_LAN; //[2:0] PCI Device Function Number of Wired LAN
+ Data83.NetworkDevice.DeviceNumber = PCI_DEVICE_NUMBER_PCH_LAN; //[7:3] PCI Device Device Number of Wired LAN
+ Data83.NetworkDevice.BusNumber = PCI_BUS_NUMBER_PCH_LAN; //[15:8] PCI Device Bus Number of Wired LAN
+ Data83.NetworkDevice.DeviceID = MmPci16( 0, DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_LAN, PCI_FUNCTION_NUMBER_PCH_LAN, R_PCH_LAN_DEVICE_ID );
+
+//BIOS
+ if(SetupSupportItem & BIT3)
+ Data83.BiosCapabilities.VTxSupport = 1;
+
+ if(SetupSupportItem & BIT1)
+ Data83.BiosCapabilities.TxtSupport = 1;
+
+ Data83.BiosCapabilities.Reserved1 = 0;
+ Data83.BiosCapabilities.Reserved2 = 0;
+
+ if(SetupSupportItem & BIT0)
+ Data83.BiosCapabilities.VTdSupport = 1;
+
+ if(SetupSupportItem & BIT2)
+ Data83.BiosCapabilities.MeSupport = 0;
+
+#if VA_SUPPORT
+ //
+ // Set Default Value for VA
+ //
+ Data83.BiosCapabilities.MaxVASupported = 7; //None. Means BIOS do not support VA.
+
+ //
+ // Get VA Info
+ //
+ DataSize = sizeof(EFI_VA_NVM_VAR);
+ Status = gRT->GetVariable (
+ EFI_VA_NVM_VARIABLE_NAME,
+ &gEfiVaNVMVariableGuid,
+ NULL,
+ &DataSize,
+ &VaNVMVar
+ );
+
+ if (!EFI_ERROR(Status)) {
+ if (VaNVMVar.VAVersion == EFI_VA30_VERSION) {
+ Data83.BiosCapabilities.MaxVASupported = 1;
+ } else if (VaNVMVar.VAVersion == EFI_VA26_VERSION) {
+ Data83.BiosCapabilities.MaxVASupported = 0;
+ }
+ }
+#endif
+
+ // Get TDT Info
+ if(Data83.MeCapabilities.AtSupported){
+ Data83.BiosCapabilities.TdtPbaSupport = 1;
+ Data83.BiosCapabilities.TdtWwanSuport = TdtWwanSuport;
+ }
+ Status = mSmbiosProtocol->SmbiosAddStructure((UINT8 *)&Data83, sizeof(EFI_MISC_OEM_TYPE_0x83));
+ gBS->CloseEvent(Event);
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: AmtSmbios131EntryPoint
+//
+// Description: iAMT SMBIOS Type 131 driver entry point
+//
+// Input: EFI_HANDLE ImageHandle,
+// EFI_SYSTEM_TABLE *SystemTable
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+AmtSmbios131EntryPoint(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+ DXE_MBP_DATA_PROTOCOL *mBIOSPayLoad = NULL;
+
+ EfiInitializeDriverLib (ImageHandle, SystemTable);
+
+ Status = HeciGetFwCapsSku(&gMeFwCapsSkuData);
+ if (EFI_ERROR(Status)) return Status;
+ Status = EfiCreateEventReadyToBootEx(
+ EFI_TPL_CALLBACK,
+ UpdateSmbios131Table,
+ (VOID *)&ImageHandle,
+ &mLegacyBootEvent
+ );
+ ASSERT_EFI_ERROR (Status);
+ Status = gBS->LocateProtocol (
+ &gMeBiosPayloadDataProtocolGuid,
+ NULL,
+ &mBIOSPayLoad
+ );
+ if(!EFI_ERROR(Status))
+ {
+#if 0
+ if(mBIOSPayLoad->MeBiosPayload.AtState.flags.WWAN3GPresent &&
+ mBIOSPayLoad->MeBiosPayload.AtState.flags.WWAN3GOOB)
+ TdtWwanSuport = 1;
+#endif
+ }
+ return EFI_SUCCESS;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Smbios131/Smbios131.cif b/Board/EM/MeWrapper/Smbios131/Smbios131.cif
new file mode 100644
index 0000000..02aafea
--- /dev/null
+++ b/Board/EM/MeWrapper/Smbios131/Smbios131.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "Smbios131"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\Smbios131\"
+ RefName = "Smbios131"
+[files]
+"Smbios131.sdl"
+"Smbios131.mak"
+"Smbios131.c"
+"Smbios131.dxs"
+"Smbios131.h"
+<endComponent>
diff --git a/Board/EM/MeWrapper/Smbios131/Smbios131.dxs b/Board/EM/MeWrapper/Smbios131/Smbios131.dxs
new file mode 100644
index 0000000..8373f04
--- /dev/null
+++ b/Board/EM/MeWrapper/Smbios131/Smbios131.dxs
@@ -0,0 +1,72 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Smbios131/Smbios131.dxs 1 2/08/12 1:07a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:07a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Smbios131/Smbios131.dxs $
+//
+// 1 2/08/12 1:07a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:40a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: Smbios131.dxs
+//
+// Description:
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include "EfiDepex.h"
+
+#include "Protocol\SmbiosGetFlashDataProtocol.h"
+#include EFI_PROTOCOL_DEFINITION (AmtPlatformPolicy)
+#include EFI_PROTOCOL_DEFINITION (Heci)
+#include EFI_PROTOCOL_DEFINITION (MePlatformPolicy)
+
+DEPENDENCY_START
+ DXE_PLATFORM_ME_POLICY_GUID AND
+ EFI_HECI_PROTOCOL_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Smbios131/Smbios131.h b/Board/EM/MeWrapper/Smbios131/Smbios131.h
new file mode 100644
index 0000000..d8ac599
--- /dev/null
+++ b/Board/EM/MeWrapper/Smbios131/Smbios131.h
@@ -0,0 +1,176 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Smbios131/Smbios131.h 1 2/08/12 1:07a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:07a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Smbios131/Smbios131.h $
+//
+// 1 2/08/12 1:07a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:40a Klzhan
+// Initial Check-in
+//
+// 2 12/16/10 3:58a Klzhan
+// [TAG] EIP50237
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] Txt Support is not been set in SMBIOS type 131
+// [RootCause] SETUP_CPU_FEATURES structure has been changed.
+// [Solution] Include PlatformCPULib.h.
+// [Files] Smbios131.c and Smbios131.h
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: Smbios131.h
+//
+// Description: Header file for SMbios131 module.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include "Token.h"
+#include <Tiano.h>
+#include <Include\Protocol\SMBios.h>
+#include <Include\Protocol\SmbiosGetFlashDataProtocol.h>
+#include <AmtLib.h>
+#include <MeLib.h>
+#include "CpuFuncs.h"
+
+#include EFI_GUID_DEFINITION (MeBiosExtensionSetup)
+#include EFI_GUID_DEFINITION (GlobalVariable)
+#include EFI_PROTOCOL_DEFINITION (PciIo)
+#include EFI_PROTOCOL_CONSUMER (PciRootBridgeIo)
+#include EFI_PROTOCOL_DEPENDENCY (SaPlatformPolicy)
+#include EFI_PROTOCOL_CONSUMER (Heci)
+#include EFI_PROTOCOL_CONSUMER (TcgService)
+#define MEBX_FILE_GUID \
+ { \
+ 0x7c81c66a, 0x4f11, 0x47ab, 0x82, 0xd3, 0x67, 0xc4, 0xd6, 0x35, 0xae, 0xd1 \
+ }
+#if VA_SUPPORT
+#include EFI_PROTOCOL_DEFINITION(PlatformVaPolicy)
+#endif
+
+#define vPro_Signature "vPro"
+
+#define EFI_MSR_IA32_FEATURE_CONTROL 0x3A
+#define TXT_OPT_IN_VMX_AND_SMX_MSR_VALUE 0xFF03
+#define EFI_VA30_VERSION 0x0300
+#define EFI_VA26_VERSION 0x0206
+
+
+
+
+#define PciMeRegBase PCIEX_BASE_ADDRESS + (UINT32) (22 << 15)
+#define FW_STATUS_REGISTER 0x40
+
+//
+// This is definition for SMBIOS Oem data type 0x81
+//
+#pragma pack (1)
+//
+// This is definition for SMBIOS Oem data type 0x83
+//
+typedef struct {
+ UINT32 VMXState : 1; //[0] VMX state (On/Off)
+ UINT32 SMXState : 1; //[1] SMX state (On/Off)
+ UINT32 LtTxtCap : 1; //[2] LT/TXT capability
+ UINT32 LtTxtEnabled : 1; //[3] LT/TXT Enabled state (Optional for vPro verification)
+ UINT32 VTxCap : 1; //[4] VT-x capability
+ UINT32 VTxEnabled : 1; //[5] VT-x Enabled state (Optional for vPro verification)
+ UINT32 Reserved : 26; //[31:6] Reserved, set to 0
+} CPU_CAP;
+
+typedef struct {
+ UINT32 FunctionNumber : 3; //[2:0] PCI Device Function Number
+ UINT32 DeviceNumber : 5; //[7:3] PCI Device Device Number
+ UINT32 BusNumber : 8; //[15:8] PCI Device Bus Number
+ UINT32 DeviceID : 16; //[31:16] Device Identification Number (DID): This field is the identifier of ICHx PCI device.DID will be set to 0xFF if not found.
+ UINT32 Reserved : 32; //[63:32] Reserved, must set to 0xFF
+} PCH_CAP;
+
+typedef struct {
+ UINT32 FunctionNumber : 3; //[2:0] PCI Device Function Number of Wired LAN
+ UINT32 DeviceNumber : 5; //[7:3] PCI Device Device Number of Wired LAN
+ UINT32 BusNumber : 8; //[15:8] PCI Device Bus Number of Wired LAN
+ UINT32 DeviceID : 16; //[31:16] PCI Device Identifier (DID) of wired NIC. DID will be set to 0xFF if not found.
+ UINT16 Reserved1; //[47:32] Reserved for Wired NIC.
+ UINT32 wFunctionNumber : 3; //[51:48] PCI Device Function Number of Wireless LAN
+ UINT32 wDeviceNumber : 5; //[56:52] PCI Device Device Number of Wireless LAN
+ UINT32 wBusNumber : 8; //[64:57] PCI Device Bus Number of Wireless LAN
+ UINT32 wDeviceID : 16; //[80:65] PCI Device Identifier (DID) of Wireless NIC. DID will be set to 0xFF if not found.
+ UINT16 wReserved1; //[95:81] Reserved for Wireless NIC.
+} NETWORK_DEV;
+
+
+typedef struct {
+ UINT32 Reserved1 : 1; //[0] Reserved, must be set to 0
+ UINT32 VTdSupport : 1; //[1] BIOS supports VT-d in BIOS setup screen (can be editable).
+ UINT32 TxtSupport : 1; //[2] BIOS supports TXT in BIOS setup screen (can be editable).
+ UINT32 Reserved2 : 1; //[3] Reserved, must be set to 0
+ UINT32 MeSupport : 1; //[4] BIOS supports ME in BIOS setup screen (can be editable).
+ UINT32 VTxSupport : 1; //[5] BIOS supports VT-x in BIOS setup screen (can be editable).
+ // The PlaformDataInSpi & MaxVASupported moved from Bit 6 & 7 to 8, 9
+ UINT32 TdtPbaSupport : 1; //[6] BIOS supports VT-d in BIOS setup screen (can be editable).
+ UINT32 TdtWwanSuport : 1; //[7] BIOS supports TXT in BIOS setup screen (can be editable).
+ UINT32 Reserved : 24; //[31:8] Reserved, must set to 0
+} BIOS_CAP;
+
+typedef struct {
+ SMBIOS_STRUCTURE_HEADER Header;
+ CPU_CAP CpuCapabilities;
+ UINT16 vMEBX_Major;
+ UINT16 vMEBX_Minor;
+ UINT16 vMEBX_HotFix;
+ UINT16 vMEBX_Build;
+ PCH_CAP PchCapabilities;
+ ME_CAP MeCapabilities;
+ UINT16 Reserved1[2];
+ NETWORK_DEV NetworkDevice;
+ BIOS_CAP BiosCapabilities;
+ UINT8 vProSignature[4];
+ UINT32 Reserved2;
+ UINT16 Zero; //terminator
+} EFI_MISC_OEM_TYPE_0x83;
+
+#pragma pack ()
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/Smbios131/Smbios131.mak b/Board/EM/MeWrapper/Smbios131/Smbios131.mak
new file mode 100644
index 0000000..90ff37b
--- /dev/null
+++ b/Board/EM/MeWrapper/Smbios131/Smbios131.mak
@@ -0,0 +1,158 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Smbios131/Smbios131.mak 5 12/18/12 2:29a Klzhan $
+#
+# $Revision: 5 $
+#
+# $Date: 12/18/12 2:29a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/Smbios131/Smbios131.mak $
+#
+# 5 12/18/12 2:29a Klzhan
+# [TAG] EIP109707
+# [Category] Spec Update
+# [Severity] Important
+# [Description] Update ME RC 0.81
+# [Files] Smbios131.sdl
+# Smbios131.mak
+# Smbios131.c
+# Smbios131.dxs
+# Smbios131.h
+# Smbios131.cif
+#
+# 4 7/02/12 11:38p Klzhan
+# [TAG] EIP94113
+# [Category] Spec Update
+# [Severity] Important
+# [Description] Update ME RC0.6
+# [Files] Smbios131.sdl
+# Smbios131.mak
+# Smbios131.c
+# Smbios131.dxs
+# Smbios131.h
+# Smbios131.cif
+#
+# 3 4/24/12 12:32a Klzhan
+# Update modulepart to latest
+#
+# 2 2/23/12 8:57a Klzhan
+# Support New EDK
+#
+# 1 2/08/12 1:07a Klzhan
+# Initial Check in
+#
+# 3 7/26/11 9:57a Klzhan
+# Create token for some Bios capabilities parameters.
+#
+# 2 7/26/11 8:37a Klzhan
+# [TAG] EIP64542
+# [Category] Improvement
+# [Description] Replace Getvariable by GetNbSetupdata.
+# [Files] Smbios131.sdl
+# Smbios131.mak
+# Smbios131.c
+# Smbios131.dxs
+# Smbios131.h
+# Smbios131.cif
+#
+# 1 2/25/11 1:40a Klzhan
+# Initial Check-in
+#
+# 1 12/03/10 5:09a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name: Smbios131.c
+#
+# Description: Create SMbios type 131.
+#
+#----------------------------------------------------------------------------
+#<AMI_FHDR_END>
+# MAK file for the ModulePart:AmtSmbios
+all : AmtSmbios131
+
+$(BUILD_DIR)\Smbios131.mak : $(Smbios131_DIR)\$(@B).cif $(Smbios131_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(Smbios131_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+AmtSmbios131 : $(BUILD_DIR)\Smbios131.mak AmtSmbios131Bin
+
+AmtSmbios131_INCLUDES=\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(INTEL_PLATFORM_PROTOCOL_INCLUDES)\
+ /I$(EDK_SOURCE)\Foundation\Efi\Include\
+ $(NB_INCLUDES)\
+ $(ME_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+ $(INTEL_MCH_INCLUDES)\
+ /I$(MePlatformPolicy_DIR)\
+ /I$(PROJECT_DIR)\
+ /IInclude\
+
+AmtSmbios131_LIBS=\
+ $(AmtLibDxe_LIB)\
+ $(MeLibDxe_LIB)\
+ $(MeChipsetDxeLib_LIB)\
+ $(EDKPROTOCOLLIB)\
+ $(EFIDRIVERLIB)\
+ $(CPUIA32LIB)\
+ $(VaProtocolLib_LIB)\
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EdkIIGlueDxeMemoryAllocationLib_LIB)\
+ $(EdkIIGlueUefiLib_LIB)\
+ $(IntelPlatformProtocolLib_LIB)\
+ $(PchPlatformDxeLib_LIB)\
+
+AmtSmbios131Bin : $(AmtSmbios131_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\Smbios131.mak all \
+ NAME=Smbios131 \
+ MAKEFILE=$(BUILD_DIR)\Smbios131.mak \
+ "MY_INCLUDES=$(AmtSmbios131_INCLUDES)" \
+ GUID=2b341c7b-0b32-4a65-9d46-e1b3abd4c25c \
+ ENTRY_POINT=AmtSmbios131EntryPoint \
+ DEPEX1=$(Smbios131_DIR)\Smbios131.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ TYPE=BS_DRIVER \
+ COMPRESS=1
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/MeWrapper/Smbios131/Smbios131.sdl b/Board/EM/MeWrapper/Smbios131/Smbios131.sdl
new file mode 100644
index 0000000..c57ae1e
--- /dev/null
+++ b/Board/EM/MeWrapper/Smbios131/Smbios131.sdl
@@ -0,0 +1,33 @@
+TOKEN
+ Name = "Smbios131_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable Smbios type 131 support in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "Smbios131_DIR"
+ Help = "AMT Smbios file source directory"
+End
+
+MODULE
+ Help = "Includes AmtSmbios.mak to Project"
+ File = "Smbios131.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\Smbios131.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+TOKEN
+ Name = "SetupSupportItem"
+ Value = "0xF"
+ Help = "Set BIOS Setup Item exist or not. Bit0 = Vt-d, Bit1 = Txt, Bit2 = ME, Bit3 = VTx"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0 - 2"
+End \ No newline at end of file
diff --git a/Board/EM/MeWrapper/TdtWrapper/TDTSetup.sd b/Board/EM/MeWrapper/TdtWrapper/TDTSetup.sd
new file mode 100644
index 0000000..2f7d21f
--- /dev/null
+++ b/Board/EM/MeWrapper/TdtWrapper/TDTSetup.sd
@@ -0,0 +1,161 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/TdtWrapper/TDTSetup.sd 4 9/27/12 4:56a Klzhan $
+//
+// $Revision: 4 $
+//
+// $Date: 9/27/12 4:56a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/TdtWrapper/TDTSetup.sd $
+//
+// 4 9/27/12 4:56a Klzhan
+// [TAG] EIP102254
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC 0.7
+// [Files] TDTWrapper.dxs
+// TDTWrapper.c
+// TDTWrapper.mak
+// TDTWrapper.sdl
+// TDTSetup.sd
+// TDTSetup.uni
+// TdtCallback.h
+// TDTWrapper.cif
+//
+// 3 9/19/12 6:31a Klzhan
+// Set AT to default enabled.
+//
+// 2 4/24/12 12:33a Klzhan
+// Update modulepart to latest
+//
+// 1 2/08/12 1:07a Klzhan
+// Initial Check in
+//
+// 2 4/20/11 10:51p Klzhan
+// Improvement : Gray out Suspend item when system is not enroll.
+//
+// 1 2/25/11 1:40a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: TdtSetup.sd
+//
+// Description: Setup menu for Tdt.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+//**********************************************************************
+#ifdef SETUP_DATA_DEFINITION
+/***********************************************************/
+/* Put NVRAM data definitions here.
+/* For example: UINT8 Data1;
+/* These definitions will be converted by the build process
+/* to a definitions of SETUP_DATA fields.
+/***********************************************************/
+ UINT8 Tdt;
+ UINT8 TdtConfig;
+ UINT8 TdtEnterSuspendState;
+
+#endif
+
+#ifdef ADVANCED_FORM_SET
+ #ifdef FORM_SET_ITEM
+ // Define controls to be added to the main page of the formset
+
+ #endif
+
+#ifdef FORM_SET_TYPEDEF
+
+#include "TdtCallback.h"
+
+#endif
+
+#ifdef FORM_SET_VARSTORE
+ varstore TDT_VOLATILE_SETUP_DATA,
+ key = AUTO_ID(TDT_VOLATILE_SETUP_DATA_VAR),
+ name = TdtAdvancedSetupDataVar,
+ guid = TDT_VOLATILE_SETUP_DATA_GUID;
+
+#endif
+
+ #ifdef FORM_SET_GOTO
+ // Define goto commands for the forms defined in this file
+ goto TDT_FORM_ID,
+
+ prompt = STRING_TOKEN(STR_TDT_FORM),
+ help = STRING_TOKEN(STR_TDT_FORM_HELP);
+ #endif
+
+ #ifdef FORM_SET_FORM
+ // Define forms
+ #ifndef TDT_FORM_SETUP
+ #define TDT_FORM_SETUP
+
+ form formid = AUTO_ID(TDT_FORM_ID),
+ title = STRING_TOKEN(STR_TDT_FORM_TITLE);
+
+ SEPARATOR
+ SUBTITLE(STRING_TOKEN(STR_ITDT_SUBTITLE))
+ SEPARATOR
+
+ grayoutif ideqval TDT_VOLATILE_SETUP_DATA.TdtEnroll == 1 OR ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ oneof varid = SETUP_DATA.TdtConfig,
+ prompt = STRING_TOKEN(STR_TDT_CONFIG_PROMPT),
+ help = STRING_TOKEN(STR_TDT_CONFIG_HELP),
+ option text = STRING_TOKEN(STR_TDT_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;
+ option text = STRING_TOKEN(STR_TDT_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;
+ endoneof;
+ endif;
+
+ grayoutif ideqval TDT_VOLATILE_SETUP_DATA.TdtEnroll == 0 OR ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ oneof varid = SETUP_DATA.TdtEnterSuspendState,
+ prompt = STRING_TOKEN(STR_TDT_SUSPEND_PROMPT),
+ help = STRING_TOKEN(STR_TDT_SUSPEND_HELP),
+ option text = STRING_TOKEN(STR_TDT_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;
+ option text = STRING_TOKEN(STR_TDT_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;
+ endoneof;
+ endif;
+
+ endform;
+ #endif // TDT_FORM_SETUP
+ #endif //End FORM_SET_FORM
+
+#endif //End ADVANCED_FORM_SET
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/TdtWrapper/TDTSetup.uni b/Board/EM/MeWrapper/TdtWrapper/TDTSetup.uni
new file mode 100644
index 0000000..89c89b3
--- /dev/null
+++ b/Board/EM/MeWrapper/TdtWrapper/TDTSetup.uni
Binary files differ
diff --git a/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.c b/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.c
new file mode 100644
index 0000000..5485043
--- /dev/null
+++ b/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.c
@@ -0,0 +1,521 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/TdtWrapper/TDTWrapper.c 12 6/18/14 3:04a Larryliu $
+//
+// $Revision: 12 $
+//
+// $Date: 6/18/14 3:04a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/TdtWrapper/TDTWrapper.c $
+//
+// 12 6/18/14 3:04a Larryliu
+// [TAG] EIP173999
+// [Category] Improvement
+// [Description] [HWR]Remove useless comments from Intel ME
+// component.(except RC)
+// [Files] TDTWrapper.c
+//
+// 10 5/14/14 10:04p Tristinchou
+// [TAG] EIP167030
+// [Category] Improvement
+// [Description] Remove the variable runtime attribute and keep original
+// attributes.
+//
+// 9 12/17/13 9:50p Tristinchou
+// [TAG] EIP146961
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] After Initiated Resume, "Enter Intel AT Suspend Mode"
+// option is still enable in Bios setup menu
+// [RootCause] The conditional expression is never true to clean steup
+// item.
+// [Solution] Use MBP data to check AT status.
+//
+// 8 6/21/13 3:08a Klzhan
+// [TAG] EIP127189
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC 1.60
+//
+// 7 6/02/13 9:13a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Report PBA not support when AT is disabled.
+//
+// 6 4/02/13 1:51a Klzhan
+// [TAG] EIPNone
+// [Category] Bug Fix
+// [Severity] Critical
+// [Symptom] Setup Variable crash
+// [RootCause] Variable not been initialized.
+//
+// 5 9/27/12 4:56a Klzhan
+// [TAG] EIP102254
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update ME RC 0.7
+// [Files] TDTWrapper.dxs
+// TDTWrapper.c
+// TDTWrapper.mak
+// TDTWrapper.sdl
+// TDTSetup.sd
+// TDTSetup.uni
+// TdtCallback.h
+// TDTWrapper.cif
+//
+// 4 8/30/12 2:57a Klzhan
+//
+// 3 4/24/12 3:33a Klzhan
+//
+// 2 4/24/12 12:33a Klzhan
+// Update modulepart to latest
+//
+// 1 2/08/12 1:07a Klzhan
+// Initial Check in
+//
+// 3 9/20/11 9:40a Klzhan
+// Check TdtConfig by Wrapper not SetupData.
+//
+// 2 4/21/11 2:58a Klzhan
+//
+// 1 2/25/11 1:40a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: TdtSetup.c
+//
+// Description: Setup Hooks for Tdt.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2004-2006 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ TDTPlatformPolicy.c
+
+Abstract:
+
+ TDTPlatformPolicy to check and set TDT Platform Policy.
+
+--*/
+/*++
+ This file contains an 'Intel Peripheral Driver' and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+--*/
+
+
+//This needs to be merged with AMT Platform Policy.
+
+//
+// Statements that include other files
+//
+//#include "Efi.h"
+
+
+#include <EFI.h>
+#include <AmiDxeLib.h>
+#include <Protocol\SMBios.h>
+#include <Include\Protocol\SmbiosGetFlashDataProtocol.h>
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+#include <Include\Protocol\LegacyRegion.h>
+#endif
+#include "Setup.h"
+#include "ReferenceCode\ME\Protocol\AtPlatformPolicy\AtPlatformPolicy.h"
+#include "MkhiMsgs.h"
+#include "Protocol\MeBiosPayloadData\MeBiosPayloadData.h"
+#include "TdtCallback.h"
+#define BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID \
+ { 0xdbc9fd21, 0xfad8, 0x45b0, 0x9e, 0x78, 0x27, 0x15, 0x88, 0x67, 0xcc, 0x93 }
+
+#define ME_ALERT_AT_HANDLER_GUID {0xb441df87, 0x8d94, 0x4811, 0x85, 0xf7, 0xf, 0x9a, 0x7b, 0xf8, 0x9d, 0x2a}
+
+#define SMB131_IDENTIFIER_OFFSET 0x38
+#define SMB131_ME_CAPS_OFFSET 0x18
+#define SMB131_AT_ENROLL_OFFSET 0x24
+#define SMB131_BIOS_SEC_CAPS_OFFSET 0x34
+
+EFI_GUID gSetupGuid = SETUP_GUID;
+EFI_GUID gDxePlatformTdtPolicyGuid = DXE_PLATFORM_AT_POLICY_GUID;
+EFI_GUID gEfiSmbiosProtocolGuid = EFI_SMBIOS_PROTOCOL_GUID;
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+EFI_GUID gEfiLegacyRegionProtocol = EFI_LEGACY_REGION_PROTOCOL_GUID;
+#endif
+EFI_GUID gBdsAllDriversConnectedProtocolGuid = \
+ BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID;
+EFI_GUID gMEAlertATHandlerGuid = ME_ALERT_AT_HANDLER_GUID;
+EFI_EVENT mReady2BootEvent;
+EFI_RUNTIME_SERVICES *gRT;
+EFI_BOOT_SERVICES *gBS;
+
+DXE_AT_POLICY_PROTOCOL *TDTPlatformPolicyInstance;
+
+#define EFI_TPL_DRIVER 6
+#define EFI_TPL_APPLICATION 4
+#define EFI_TPL_CALLBACK 8
+#define EFI_TPL_NOTIFY 16
+#define EFI_TPL_HIGH_LEVEL 31
+
+VOID
+EFIAPI
+TDTEventModSmbiosType131 (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+);
+
+DXE_MBP_DATA_PROTOCOL *mBIOSPayLoad;
+VOID NullFunction(
+ EFI_EVENT Event,
+ VOID *ParentImageHandle
+)
+{
+ return;
+}
+
+//
+// Function implementations
+//
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: TxtExitSetupEvent
+//
+// Description: This routine for reset the TPM Establishment flag.
+//
+// Input: EFI_EVENT - Efi event.
+// VOID* - Image handle.
+//
+// Output: None.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+TdtAllDriverConnectEvent (
+ IN EFI_EVENT Event,
+ IN VOID *ParentImageHandle
+)
+{
+ EFI_STATUS Status;
+ EFI_EVENT MEAlertAT;
+ UINT32 SetupVarAttr;
+ EFI_GUID TdtSetupDataGuid = TDT_VOLATILE_SETUP_DATA_GUID;
+ TDT_VOLATILE_SETUP_DATA TdtSetupData;
+ SETUP_DATA SetupData;
+ UINTN VariableSize = sizeof(SETUP_DATA);
+
+ // Get current Setup Data.
+ Status = gRT->GetVariable( L"Setup",
+ &gSetupGuid,
+ &SetupVarAttr,
+ &VariableSize,
+ &SetupData );
+ if( !EFI_ERROR(Status) )
+ {
+ if( (mBIOSPayLoad->MeBiosPayload.AtState.State == AT_STATE_INACTIVE) &&
+ (SetupData.TdtEnterSuspendState != 0) )
+ {
+ SetupData.TdtEnterSuspendState = 0;
+ Status = gRT->SetVariable ( L"Setup",
+ &gSetupGuid,
+ SetupVarAttr,
+ VariableSize,
+ &SetupData );
+ }
+ }
+
+ TdtSetupData.TdtEnroll = 0;
+ if (mBIOSPayLoad->MeBiosPayload.AtState.State != 0) TdtSetupData.TdtEnroll = 1;
+ Status = gRT->SetVariable ( TDT_VOLATILE_SETUP_DATA_C_NAME, \
+ &TdtSetupDataGuid, \
+ EFI_VARIABLE_NON_VOLATILE | \
+ EFI_VARIABLE_BOOTSERVICE_ACCESS, \
+ sizeof(TDT_VOLATILE_SETUP_DATA), \
+ &TdtSetupData );
+ // Signal Event To support New AT AM module.
+ Status = gBS->CreateEventEx(
+ EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_NOTIFY,
+ NullFunction,
+ NULL,
+ &gMEAlertATHandlerGuid,
+ &MEAlertAT);
+ gBS->SignalEvent(MEAlertAT);
+ gBS->CloseEvent(MEAlertAT);
+ return EFI_SUCCESS;
+}
+VOID LocateMBP(IN EFI_EVENT Event, IN VOID *Context)
+{
+ pBS->LocateProtocol (&gMeBiosPayloadDataProtocolGuid, NULL, &mBIOSPayLoad);
+}
+EFI_STATUS
+EFIAPI
+TdtWrapperEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+/*++
+
+Routine Description:
+
+ Entry point for the TDTPlatformPolicy Driver.
+
+Arguments:
+
+ ImageHandle Image handle of this driver.
+ SystemTable Global system service table.
+
+Returns:
+
+ EFI_SUCCESS Initialization complete.
+ EFI_UNSUPPORTED The chipset is unsupported by this driver.
+ EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver.
+ EFI_DEVICE_ERROR Device error, driver exits abnormally.
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_GUID gSetupGuid = SETUP_GUID;
+ UINT32 SetupVarAttr;
+ UINTN VariableSize = 0;
+ SETUP_DATA SetupDataBuffer;
+ SETUP_DATA* SetupData = &SetupDataBuffer;
+ EFI_EVENT AllDriverConnectEvent;
+ VOID *Registration;
+ EFI_GUID TdtSetupDataGuid = TDT_VOLATILE_SETUP_DATA_GUID;
+ TDT_VOLATILE_SETUP_DATA TdtSetupData;
+ //
+ // Initialize the EFI Driver Library
+ //
+
+ VariableSize = sizeof (SETUP_DATA);
+ InitAmiLib(ImageHandle, SystemTable);
+ gBS = SystemTable->BootServices;
+ gRT = SystemTable->RuntimeServices;
+
+ Status = gBS->LocateProtocol(&gMeBiosPayloadDataProtocolGuid, NULL, &mBIOSPayLoad);
+ if (EFI_ERROR (Status))
+ {
+ EFI_EVENT AmiCpuInfoEvt;
+ VOID *CpuNotifyReg;
+
+ Status = RegisterProtocolCallback(
+ &gMeBiosPayloadDataProtocolGuid,
+ LocateMBP,
+ NULL,
+ &AmiCpuInfoEvt,
+ &CpuNotifyReg
+ );
+ }
+ //
+ // Allocate Ide private data structure
+ //
+ Status = gBS->AllocatePool (
+ EfiBootServicesData,
+ sizeof (DXE_AT_POLICY_PROTOCOL),
+ (VOID**)&TDTPlatformPolicyInstance
+ );
+ if (EFI_ERROR(Status))
+ return EFI_OUT_OF_RESOURCES;
+
+ //
+ // Get TDT BIOS Setup
+ //
+ Status = gRT->GetVariable (
+ L"Setup",
+ &gSetupGuid,
+ &SetupVarAttr,
+ &VariableSize,
+ &SetupDataBuffer
+ );
+ VariableSize = sizeof(TDT_VOLATILE_SETUP_DATA);
+ Status = gRT->GetVariable ( TDT_VOLATILE_SETUP_DATA_C_NAME, \
+ &TdtSetupDataGuid, \
+ NULL, \
+ &VariableSize, \
+ &TdtSetupData );
+ // If Tdt is in Enroll state, Set Tdt config to Enable.
+ if((!EFI_ERROR(Status)) && (TdtSetupData.TdtEnroll == 1))
+ {
+ SetupData->TdtConfig = 1;
+ Status = gRT->SetVariable ( L"Setup", \
+ &gSetupGuid, \
+ SetupVarAttr, \
+ sizeof(SETUP_DATA), \
+ &SetupDataBuffer );
+ }
+ if (EFI_ERROR(Status)){
+ TDTPlatformPolicyInstance->At.AtAmBypass = 1;
+ TDTPlatformPolicyInstance->At.AtEnterSuspendState = 0;
+ TDTPlatformPolicyInstance->At.AtSupported = 1;
+ TDTPlatformPolicyInstance->At.AtPba = 1;
+ } else {
+ TDTPlatformPolicyInstance->At.AtAmBypass = SetupData->TdtConfig == 1 ? 0 : 1;
+ TDTPlatformPolicyInstance->At.AtEnterSuspendState = SetupData->TdtEnterSuspendState;
+ TDTPlatformPolicyInstance->At.AtSupported = 1;
+ TDTPlatformPolicyInstance->At.AtPba = 1;
+ }
+ TDTPlatformPolicyInstance->Revision = DXE_PLATFORM_AT_POLICY_PROTOCOL_REVISION_2;
+
+ //
+ // Install the TDT Platform Policy PROTOCOL interface
+ //
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &ImageHandle,
+ &gDxePlatformTdtPolicyGuid, TDTPlatformPolicyInstance,
+ NULL
+ );
+ // If TDT support is disabled in BIOS SETUP, clear the AT support flag of
+ // SMBIOS TYPE131 to avoid that system can be enrolled.
+ Status = RegisterProtocolCallback ( &gBdsAllDriversConnectedProtocolGuid, \
+ TdtAllDriverConnectEvent, \
+ NULL, \
+ &AllDriverConnectEvent, \
+ &Registration );
+
+ // If TDT support is disabled in BIOS SETUP, clear the AT support flag of
+ // SMBIOS TYPE131 to avoid that system can be enrolled.
+ Status = CreateReadyToBootEvent ( TPL_CALLBACK - 1, \
+ TDTEventModSmbiosType131, \
+ NULL, \
+ &mReady2BootEvent );
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: TDTEventModSmbiosType131
+//
+// Description: This routine clear the AT support flag of Type 131.
+//
+// Input:
+// IN EFI_EVENT Event - signalled event
+// IN VOID *Context - event context
+//
+// Output: None
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+EFIAPI
+TDTEventModSmbiosType131 (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+)
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_PROTOCOL *mSmbiosProtocol;
+ SMBIOS_TABLE_ENTRY_POINT *SmbTblEntry;
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+ EFI_LEGACY_REGION_PROTOCOL* iRegion;
+#endif
+ UINT16 i, MeCaps, AtEnroll, BiosSecurityCaps;
+ UINT8* pStrucPtr;
+ UINTN VariableSize = sizeof(TDT_VOLATILE_SETUP_DATA);
+ EFI_GUID TdtSetupDataGuid = TDT_VOLATILE_SETUP_DATA_GUID;
+ TDT_VOLATILE_SETUP_DATA TdtSetupData;
+
+ Status = gBS->LocateProtocol ( &gEfiSmbiosProtocolGuid, \
+ NULL, \
+ &mSmbiosProtocol );
+ if (EFI_ERROR(Status)) return ;
+
+ Status = gRT->GetVariable ( TDT_VOLATILE_SETUP_DATA_C_NAME, \
+ &TdtSetupDataGuid, \
+ NULL, \
+ &VariableSize, \
+ &TdtSetupData );
+ if (EFI_ERROR(Status)) return ;
+
+ // Get SMBIOS Table Entry Point.
+ SmbTblEntry = mSmbiosProtocol->SmbiosGetTableEntryPoint ();
+
+ // Search SMBIOS Type 131.
+ for ( pStrucPtr = (UINT8*)SmbTblEntry->TableAddress, i = 0; \
+ i < SmbTblEntry->TableLength; i++ ) {
+ // search SMBIOS Type 131 structure identifier - vPro
+ if ( *(UINT32*)(pStrucPtr + i) != 0x6f725076 ) continue;
+ // Pointer to ME Capabilities field.
+ MeCaps = i - (SMB131_IDENTIFIER_OFFSET - SMB131_ME_CAPS_OFFSET);
+ AtEnroll = i - (SMB131_IDENTIFIER_OFFSET - SMB131_AT_ENROLL_OFFSET);
+ BiosSecurityCaps = i - (SMB131_IDENTIFIER_OFFSET - SMB131_BIOS_SEC_CAPS_OFFSET);
+ if (*(UINT32*)(pStrucPtr + MeCaps) & BIT13) {
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+ Status = pBS->LocateProtocol ( &gEfiLegacyRegionProtocol, \
+ NULL, \
+ &iRegion );
+ if (EFI_ERROR(Status)) return ;
+ // Unlock Shadow ram.
+ iRegion->UnLock ( iRegion, 0xE0000, 0x20000, NULL );
+#endif
+ // AT-P is disabled in SETUP, clear the AT-p support flag to avoid
+ // that system can be enrolled.
+ if (TDTPlatformPolicyInstance->At.AtAmBypass == 1)
+ {
+ *(UINT32*)(pStrucPtr + MeCaps) &= ~BIT13;
+ *(UINT32*)(pStrucPtr + BiosSecurityCaps) &= ~BIT6;
+ }
+ // Set AT is configured if AT is enrolled.
+ if (TdtSetupData.TdtEnroll != 0)
+ *(UINT8*)(pStrucPtr + AtEnroll) |= BIT5;
+ // Lock Shadow ram.
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+ iRegion->Lock ( iRegion, 0xE0000, 0x20000, NULL );
+#endif
+ }
+ break;
+ }
+ return ;
+}
+
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.cif b/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.cif
new file mode 100644
index 0000000..b72653d
--- /dev/null
+++ b/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.cif
@@ -0,0 +1,15 @@
+<component>
+ name = "TdtWrapper"
+ category = ModulePart
+ LocalRoot = "Board\EM\MeWrapper\TdtWrapper\"
+ RefName = "TdtWrapper"
+[files]
+"TDTWrapper.dxs"
+"TDTWrapper.c"
+"TDTWrapper.mak"
+"TDTWrapper.sdl"
+"TDTSetup.sd"
+"TDTSetup.uni"
+"TdtCallback.h"
+"TdtOfbd.c"
+<endComponent>
diff --git a/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.dxs b/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.dxs
new file mode 100644
index 0000000..6226366
--- /dev/null
+++ b/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.dxs
@@ -0,0 +1,93 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/TdtWrapper/TDTWrapper.dxs 1 2/08/12 1:07a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:07a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/TdtWrapper/TDTWrapper.dxs $
+//
+// 1 2/08/12 1:07a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:40a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: TdtSetup.dxs
+//
+// Description: Dependency expression file.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+/*++
+
+Copyright (c) 2004-2006 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+ TDTPlatformPolicy.h
+
+Abstract:
+
+ Dependency expression file for TDTPlatformPolicy Invocation Driver.
+
+--*/
+/*++
+ This file contains an 'Intel Peripheral Driver' and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+--*/
+
+DEPENDENCY_START
+ TRUE
+DEPENDENCY_END
+
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.mak b/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.mak
new file mode 100644
index 0000000..8436e78
--- /dev/null
+++ b/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.mak
@@ -0,0 +1,158 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/TdtWrapper/TDTWrapper.mak 3 2/23/13 6:33a Klzhan $
+#
+# $Revision: 3 $
+#
+# $Date: 2/23/13 6:33a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/TdtWrapper/TDTWrapper.mak $
+#
+# 3 2/23/13 6:33a Klzhan
+# [TAG] EIPNone
+# [Category] Improvement
+# [Description] Fix build error when OFDB disabled
+#
+# 2 1/24/13 3:51a Klzhan
+# [TAG] EIP113197
+# [Category] Improvement
+# [Description] Block AFU when DTimer is running out.
+# [Files] TDTWrapper.dxs
+# TDTWrapper.c
+# TDTWrapper.mak
+# TDTWrapper.sdl
+# TDTSetup.sd
+# TDTSetup.uni
+# TdtCallback.h
+# TDTWrapper.cif
+#
+# 1 2/08/12 1:07a Klzhan
+# Initial Check in
+#
+# 1 2/25/11 1:40a Klzhan
+# Initial Check-in
+#
+# 2 12/03/10 5:56a Klzhan
+# Fix Build error.
+#
+# 1 12/03/10 5:09a Klzhan
+# Initial Check-in.
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: TDTDxe.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+# MAK file for the ModulePart:TDTPlatformPolicy
+!IFDEF OFBD_SUPPORT
+
+!IF $(OFBD_SUPPORT) == 1
+all : TdtWrapper TdtOfbd
+!ELSE #!IF $(OFBD_SUPPORT) == 1
+all : TdtWrapper
+!ENDIF
+
+!ELSE #!IFDEF OFBD_SUPPORT
+all : TdtWrapper
+!ENDIF
+
+BUILD_TDTWRAPPER_DIR = $(BUILD_DIR)\$(TdtWrapper_DIR)
+
+TdtWrapper : $(BUILD_DIR)\TdtWrapper.mak TdtWrapperBin
+
+$(BUILD_DIR)\TdtWrapper.mak : $(TdtWrapper_DIR)\$(@B).cif $(TdtWrapper_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(TdtWrapper_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+
+# MAK file for the eModule:TdtWrapper
+TdtAm_INCLUDES =\
+ $(TDT_INCLUDES)\
+ $(ME_INCLUDES)
+
+TdtWrapper_OBJECTS = $(BUILD_TDTWRAPPER_DIR)\TdtWrapper.obj
+
+TdtWrapper_CFLAGS = $(CFLAGS)
+
+TdtWrapperBin : $(AMIDXELIB) $(AMICSPLib) $(MeLibDxe_LIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\TdtWrapper.mak all\
+ "MY_INCLUDES=$(TdtAm_INCLUDES)"\
+ NAME=TdtWrapper\
+ MAKEFILE=$(BUILD_DIR)\TdtWrapper.mak \
+ "CFLAGS=$(TdtWrapper_CFLAGS) /I$(TdtWrapper_DIR)"\
+ GUID=CA5E3DF0-940A-48f1-8C14-DB2FB5998B36\
+ OBJECTS="$(TdtWrapper_OBJECTS)" \
+ ENTRY_POINT=TdtWrapperEntryPoint\
+ TYPE=BS_DRIVER \
+ DEPEX1=$(TdtWrapper_DIR)\TdtWrapper.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ COMPRESS=1
+
+#---------------------------------------------------------------------------
+# Create TDT OFBD Library
+#---------------------------------------------------------------------------
+TdtOfbd : $(BUILD_DIR)\TdtWrapper.mak TdtOfbdLibBin
+
+TDT_OFBD_INCLUDES =\
+/I$(OFBD_DIR)\
+/I$(MeProtocolLib_DIR)\
+/I$(AtAmDxe_DIR)\
+$(ME_INCLUDES)
+
+TdtOfbd_OBJECTS = $(BUILD_TDTWRAPPER_DIR)\TdtOfbd.obj
+
+TdtOfbdLibBin : $(AMIDXELIB)
+ @set INCLUDE=%%INCLUDE%%
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\TdtWrapper.mak all\
+ "MY_INCLUDES=$(TDT_OFBD_INCLUDES)" \
+ "CFLAGS=$(CFLAGS:/W4=/W3)" \
+ OBJECTS="$(TdtOfbd_OBJECTS)" \
+ TYPE=LIBRARY LIBRARY_NAME=$(TDTOFBDLIB)
+
+$(TDTOFBDLIB) : TdtOfbd
+#---------------------------------------------------------------------------
+# Create Intel TDT Setup Screens
+#---------------------------------------------------------------------------
+SetupSdbs : $(BUILD_DIR)\TdtWrapper.mak TDTSetupSDB
+
+TDTSetupSDB :
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\TdtWrapper.mak all \
+ TYPE=SDB NAME=TdtWrapper STRING_CONSUMERS=$(TdtWrapper_DIR)\TDTSetup.sd
+
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.sdl b/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.sdl
new file mode 100644
index 0000000..cebc89e
--- /dev/null
+++ b/Board/EM/MeWrapper/TdtWrapper/TDTWrapper.sdl
@@ -0,0 +1,98 @@
+TOKEN
+ Name = "TdtWrapper_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable TdtWrapper support in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Token = "AT_SUPPORT" "=" "1"
+End
+
+
+PATH
+ Name = "TdtWrapper_DIR"
+End
+
+MODULE
+ Help = "Includes TdtWrapper.mak to Project"
+ File = "TdtWrapper.mak"
+End
+ELINK
+ Name = "$(BUILD_DIR)\TdtWrapper.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 30
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(TdtWrapper_DIR)\TdtSetup.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 30
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\TdtWrapper.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+
+TOKEN
+ Name = "EXPECTED_FLASH_UPDATE_TIME"
+ Value = "300"
+ Help = "Expected Flash update time in seconds. 0 - Disable"
+ TokenType = Integer
+ Token = "OFBD_SUPPORT" "=" "1"
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TDT_FLASH_UPDATE_ERROR_MESSAGE_1"
+ Value = "DTimer of Anti-Theft Technology is less than the expected time to perform the flash update."
+ TokenType = Expression
+ TargetH = Yes
+ Token = "EXPECTED_FLASH_UPDATE_TIME" "!=" "0"
+ Token = "OFBD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "TDT_FLASH_UPDATE_ERROR_MESSAGE_2"
+ Value = "BIOS can not be updated at this time and please reconnect to Internet."
+ TokenType = Expression
+ TargetH = Yes
+ Token = "EXPECTED_FLASH_UPDATE_TIME" "!=" "0"
+ Token = "OFBD_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "TDTOFBDLIB"
+ Value = "$(BUILD_DIR)\TDTOFBDLIB.lib"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\TDTOFBDLIB.lib"
+ Parent = "OFBDLISTLIB"
+ Token = "EXPECTED_FLASH_UPDATE_TIME" "!=" "0"
+ InvokeOrder = AfterParent
+ Token = "OFBD_SUPPORT" "=" "1"
+End
+
+ELINK
+ Name = "TDTOfbdEntry,"
+ Parent = "OFBDPartsList"
+ Token = "EXPECTED_FLASH_UPDATE_TIME" "!=" "0"
+ Token = "OFBD_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "TDTOfbdInSmmEntry,"
+ Parent = "OFBDInSmmFuncList"
+ Token = "EXPECTED_FLASH_UPDATE_TIME" "!=" "0"
+ Token = "OFBD_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/MeWrapper/TdtWrapper/TdtCallback.h b/Board/EM/MeWrapper/TdtWrapper/TdtCallback.h
new file mode 100644
index 0000000..61b29b9
--- /dev/null
+++ b/Board/EM/MeWrapper/TdtWrapper/TdtCallback.h
@@ -0,0 +1,69 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/TdtWrapper/TdtCallback.h 1 2/08/12 1:07a Klzhan $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 1:07a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/TdtWrapper/TdtCallback.h $
+//
+// 1 2/08/12 1:07a Klzhan
+// Initial Check in
+//
+// 1 2/25/11 1:40a Klzhan
+// Initial Check-in
+//
+// 1 12/03/10 5:09a Klzhan
+// Initial Check-in.
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: TdtCallBack.h
+//
+// Description: Setup Var definetion.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#define TDT_VOLATILE_SETUP_DATA_GUID \
+{0x7b77fb8b, 0x1e0d, 0x4d7e, 0x95, 0x3f, 0x39, 0x80, 0xa2, 0x61, 0xe0, 0x76}
+
+#define TDT_VOLATILE_SETUP_DATA_C_NAME L"TdtAdvancedSetupDataVar"
+
+typedef struct _TDT_VOLATILE_SETUP_DATA {
+ UINT8 TdtEnroll;
+} TDT_VOLATILE_SETUP_DATA;
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/MeWrapper/TdtWrapper/TdtOfbd.c b/Board/EM/MeWrapper/TdtWrapper/TdtOfbd.c
new file mode 100644
index 0000000..b64b09e
--- /dev/null
+++ b/Board/EM/MeWrapper/TdtWrapper/TdtOfbd.c
@@ -0,0 +1,296 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/TdtWrapper/TdtOfbd.c 7 4/30/13 7:59a Tristinchou $
+//
+// $Revision: 7 $
+//
+// $Date: 4/30/13 7:59a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeWrapper/TdtWrapper/TdtOfbd.c $
+//
+// 7 4/30/13 7:59a Tristinchou
+// [TAG] EIPNone
+// [Category] Bug Fix
+// [Severity] Normal
+// [RootCause] Pointer may be destroyed in smm.
+// [Solution] Get value instead of using pointer.
+// [Files] TdtOfbd.c
+//
+// 6 3/26/13 8:09a Calvinchen
+// [TAG] EIP119036.2
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] SecureFlash fail with ME "AT disable"
+// [RootCause] SMM HECI not installed if ME is disabled by FDO Jumper.
+// [Solution] Added check SmmHeci protocol before AtGetTimerInfo call.
+//
+// 5 3/26/13 4:49a Calvinchen
+// [TAG] EIP119036.1
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] SecureFlash fail with ME ¡§AT disable¡¨
+// [RootCause] HECI returns "UNSUPPORTED" not "TIMEOUT" if ME is
+// disabled.
+// [Solution] Added check ME Mode and AT state before AtGetTimeInfo
+// call.
+// [Files] TdtOfbd.c
+//
+// 4 3/25/13 10:17a Calvinchen
+// [TAG] EIP119036
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] SecureFlash fail with ME "AT disable"
+// [RootCause] HECI Timeout if AtGetTimeInfo call.
+// [Solution] To Skip AtGetTimeInfo call if HECI Timeout at first call.
+// [Files] TdtOfbd.c
+//
+// 3 3/12/13 8:01a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Fix AFU can update after frist time enrolled
+//
+// 2 3/04/13 4:48a Klzhan
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Update for get timer fail in windows.
+//
+// 1 1/24/13 3:52a Klzhan
+// [TAG] EIP113197
+// [Category] Improvement
+// [Description] Block AFU when AT DTimer is running out
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: TDTOfbd.c
+//
+// Description:
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <Setup.h>
+#include "token.h"
+#include "OFBD.h"
+#include "HeciSmm\HeciSmm.h"
+#include "MkhiMsgs.h"
+#define _ME_LIB_H_
+#include "AtHi.h"
+#include "MeBiosPayloadData\MeBiosPayloadData.h"
+
+EFI_GUID gSetupGuid = SETUP_GUID;
+SMM_HECI_PROTOCOL *mHeci;
+EFI_GUID gSmmHeciProtocolGuid = SMM_HECI_PROTOCOL_GUID;
+DXE_MBP_DATA_PROTOCOL *MbpData;
+EFI_GUID gMeBiosPayloadDataProtocolGuid = ME_BIOS_PAYLOAD_DATA_PROTOCOL_GUID;
+BOOLEAN gIntelAT;
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: AsciiStrLen
+//
+// Description:
+//
+// Input:
+//
+//
+// Output:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINTN
+EFIAPI
+AsciiStrLen (
+ IN CONST CHAR8 *String
+ )
+{
+ UINTN Length;
+
+ for (Length = 0; *String != '\0'; String++, Length++) {}
+ return Length;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+// Procedure: HMRFPO_ENABLE_MSG
+//
+// Description: Send Enable HECI message to ME FW.
+//
+// Input: NONE
+//
+// Output: EFI_STATUS
+//
+// Returns:
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS AtGetTimerInfo (
+ IN OUT UINT32 *Interval,
+ IN OUT UINT32 *TimeLeft
+)
+{
+ UINT32 HeciLength;
+ EFI_STATUS Status;
+
+ ATHI_GET_TIMER_INFO_CMD AtGetTimerInfoCmd;
+ ATHI_GET_TIMER_INFO_RSP AtGetTimerInfoRsp;
+
+ MemSet ((VOID *)&AtGetTimerInfoCmd, sizeof (ATHI_GET_TIMER_INFO_CMD), 0);
+ MemSet ((VOID *)&AtGetTimerInfoRsp, sizeof (ATHI_GET_TIMER_INFO_RSP), 0);
+
+ AtGetTimerInfoCmd.Header.Version.Minor = ATHI_PROTOCOL_VERSION_MINOR;
+ AtGetTimerInfoCmd.Header.Version.Major = ATHI_PROTOCOL_VERSION_MAJOR;
+ AtGetTimerInfoCmd.Header.Command.Category = ATHI_CMD_GROUP_THEFT_DETECTION;
+ AtGetTimerInfoCmd.Header.Command.IsResponse = AT_COMMAND;
+ AtGetTimerInfoCmd.Header.Command.Code = ATHI_THEFT_DETECT_GRP_GET_TIMER_INFO_CMD;
+ //
+ // 0- Length 0 only header with command is send as message
+ //
+ AtGetTimerInfoCmd.Header.Length = sizeof (ATHI_GET_TIMER_INFO_CMD) - sizeof (ATHI_HEADER);
+ AtGetTimerInfoCmd.TimerId = AT_TID_DISABLE_TIMER;
+
+
+ HeciLength = sizeof (ATHI_GET_TIMER_INFO_CMD);
+ Status = mHeci->ResetHeci();
+ Status = mHeci->SendMsg (
+ (UINT32 *) &AtGetTimerInfoCmd,
+ HeciLength,
+ BIOS_FIXED_HOST_ADDR,
+ HECI_AT_MESSAGE_ADDR
+ );
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ HeciLength = sizeof (ATHI_GET_TIMER_INFO_RSP);
+
+
+ Status = mHeci->ReadMsg (
+ BLOCKING,
+ (UINT32 *) &AtGetTimerInfoRsp,
+ &HeciLength
+ );
+
+ if (EFI_ERROR (Status)) {
+
+ return Status;
+ }
+
+ *Interval = AtGetTimerInfoRsp.TimerInfo.Interval;
+ *TimeLeft = AtGetTimerInfoRsp.TimerInfo.TimeLeft;
+
+ return EFI_SUCCESS;
+
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: TDTOfbdEntry
+//
+// Description:
+//
+// Input:
+// IN VOID *Buffer
+// IN OUT UINT8 *pOFBDDataHandled
+// Output:
+// VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID TDTOfbdEntry (
+ IN VOID *Buffer,
+ IN OUT UINT8 *pOFBDDataHandled )
+{
+ UINTN VariableSize;
+ UINT32 TimeLeft, Interval;
+ EFI_STATUS Status = EFI_SUCCESS;
+ OFBD_HDR *pOFBDHdr = (OFBD_HDR*)Buffer;
+ char *TDTErrorMsg_1 = \
+ CONVERT_TO_STRING(TDT_FLASH_UPDATE_ERROR_MESSAGE_1);
+ char *TDTErrorMsg_2 = \
+ CONVERT_TO_STRING(TDT_FLASH_UPDATE_ERROR_MESSAGE_2);
+ OFBD_EXT_HDR *pOFBDExtHdr = (OFBD_EXT_HDR*)((UINT8 *)Buffer + pOFBDHdr->OFBD_HDR_SIZE);
+ UINT32 MeMode;
+
+ // Check AT timer one time when AFU is checking OFBD version.
+ if ((pOFBDHdr->OFBD_FS != 0) || (pOFBDExtHdr->TypeCodeID != 0)) return;
+ if ((mHeci == NULL)) return;
+ // Check AT timer if ME is normal state.
+ Status = mHeci->GetMeMode(&MeMode);
+ if (EFI_ERROR(Status) || (MeMode != ME_MODE_NORMAL)) return;
+ // Check AT timer if AT is enabled in FITC.
+ if (!gIntelAT) return;
+ Status = AtGetTimerInfo(&Interval, &TimeLeft);
+ // If not enrolled, TimeLeft will be 0
+ if (EFI_ERROR(Status) || (TimeLeft == 0)) return ;
+ if (TimeLeft > EXPECTED_FLASH_UPDATE_TIME) return ;
+ // Set the AFU Force Exit +>>>
+ VariableSize = AsciiStrLen(TDTErrorMsg_1);
+ (UINT8*)Buffer += pOFBDHdr->OFBD_Size;
+ MemSet ((UINT8*)Buffer + pOFBDHdr->OFBD_Size, VariableSize + 1, 0);
+ MemCpy ((UINT8*)Buffer , TDTErrorMsg_1, VariableSize);
+ (UINT8*)Buffer += VariableSize;
+ VariableSize = AsciiStrLen(TDTErrorMsg_2);
+ MemSet ((UINT8*)Buffer, VariableSize + 1, 0);
+ MemCpy ((UINT8*)Buffer, TDTErrorMsg_2, VariableSize);
+ pOFBDHdr->OFBD_RS |= (OFBD_RS_ERR_OUT + OFBD_RS_DIS_OEMSTR); // Tell the AFU display the OEM Message
+ // Set the AFU Force Exit <<<+
+ return;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: TDTOfbdInSmmEntry
+//
+// Description:
+//
+// Input:
+// IN VOID *Buffer
+// IN OUT UINT8 *pOFBDDataHandled
+// Output:
+// VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID TDTOfbdInSmmEntry (VOID)
+{
+
+ EFI_STATUS Status;
+
+ Status = pBS->LocateProtocol (&gSmmHeciProtocolGuid, NULL, &mHeci);
+ if (EFI_ERROR (Status)) mHeci = NULL;
+ Status = pBS->LocateProtocol (&gMeBiosPayloadDataProtocolGuid, NULL, (VOID **) &MbpData);
+ if (EFI_ERROR (Status)) gIntelAT = FALSE;
+ else gIntelAT = (BOOLEAN)MbpData->MeBiosPayload.FwCapsSku.FwCapabilities.Fields.IntelAT;
+
+ return ;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Pfat/HandlePfatLegacy/HandlePfatLegacy.c b/Board/EM/Pfat/HandlePfatLegacy/HandlePfatLegacy.c
new file mode 100644
index 0000000..42818b4
--- /dev/null
+++ b/Board/EM/Pfat/HandlePfatLegacy/HandlePfatLegacy.c
@@ -0,0 +1,148 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/Pfatflashlib/HandlePfatLegacy/HandlePfatLegacy.c 2 11/08/12 3:24a Fredericko $
+//
+// $Revision: 2 $
+//
+// $Date: 11/08/12 3:24a $
+//
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/Pfatflashlib/HandlePfatLegacy/HandlePfatLegacy.c $
+//
+// 2 11/08/12 3:24a Fredericko
+//
+// 1 11/02/12 8:23p Fredericko
+// [TAG] EIP105153
+// [Files] HandlePfatLegacy.cif
+// HandlePfatLegacy.sdl
+// HandlePfatLegacy.mak
+// HandlePfatLegacy.c
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: HandlePfatLegacy.c
+//
+// Description: Code listing file for HandlePfatLegacy
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+//----------------------------------------------------------------------
+// Includes
+#include <efi.h>
+#include "token.h"
+#include <AmiDxeLib.h>
+
+EFI_EVENT PfatLegacyBootEvent;
+
+#define PFAT_VAR_GUID \
+ { \
+ 0x6aae75ee, 0xa4bc, 0x40c8, 0x81, 0x3b, 0x8, 0x4e, 0x28, 0x53, 0x5e, 0x79 \
+ }
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: HandlePfatOnLegacyBoot
+//
+// Description: Callback on LegacyBoot Event
+//
+// Input: IN EFI_EVENT efiev
+// IN VOID *ctx
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+void HandlePfatOnLegacyBoot(
+ IN EFI_EVENT efiev,
+ IN VOID *ctx )
+{
+ EFI_STATUS Status;
+ UINT32 PfatVar=0;
+ UINTN PfatVarSize = sizeof(UINT32);
+ EFI_GUID PfatVarGuid = PFAT_VAR_GUID ;
+
+ Status = pRS->GetVariable(L"PfatVariable", &PfatVarGuid, NULL, &PfatVarSize, &PfatVar);
+
+ PfatVar+=1;
+
+ Status = pRS->SetVariable(L"PfatVariable",
+ &PfatVarGuid,
+ (EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS |
+ EFI_VARIABLE_NON_VOLATILE),
+ PfatVarSize,
+ &PfatVar);
+
+ pBS->CloseEvent (PfatLegacyBootEvent);
+}
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: HandlePfatLegacyBoot
+//
+// Description: Entry point for subcomponent
+//
+// Input: IN EFI_HANDLE ImageHandle,
+// IN EFI_SYSTEM_TABLE *SystemTable
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS HandlePfatLegacyBoot(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable )
+{
+ EFI_STATUS Status;
+
+ InitAmiLib( ImageHandle, SystemTable );
+
+ Status = CreateReadyToBootEvent( TPL_CALLBACK,
+ HandlePfatOnLegacyBoot,
+ NULL,
+ &PfatLegacyBootEvent );
+
+ return Status;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Pfat/HandlePfatLegacy/HandlePfatLegacy.cif b/Board/EM/Pfat/HandlePfatLegacy/HandlePfatLegacy.cif
new file mode 100644
index 0000000..ea7449d
--- /dev/null
+++ b/Board/EM/Pfat/HandlePfatLegacy/HandlePfatLegacy.cif
@@ -0,0 +1,10 @@
+<component>
+ name = "HandlePfatLegacy"
+ category = ModulePart
+ LocalRoot = "Board\EM\Pfat\HandlePfatLegacy"
+ RefName = "HandlePfatLegacy"
+[files]
+"HandlePfatLegacy.sdl"
+"HandlePfatLegacy.mak"
+"HandlePfatLegacy.c"
+<endComponent>
diff --git a/Board/EM/Pfat/HandlePfatLegacy/HandlePfatLegacy.mak b/Board/EM/Pfat/HandlePfatLegacy/HandlePfatLegacy.mak
new file mode 100644
index 0000000..73db816
--- /dev/null
+++ b/Board/EM/Pfat/HandlePfatLegacy/HandlePfatLegacy.mak
@@ -0,0 +1,71 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/Pfatflashlib/HandlePfatLegacy/HandlePfatLegacy.mak 1 11/02/12 8:23p Fredericko $
+#
+# $Revision: 1 $
+#
+# $Date: 11/02/12 8:23p $
+#
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/Pfatflashlib/HandlePfatLegacy/HandlePfatLegacy.mak $
+#
+# 1 11/02/12 8:23p Fredericko
+# [TAG] EIP105153
+# [Files] HandlePfatLegacy.cif
+# HandlePfatLegacy.sdl
+# HandlePfatLegacy.mak
+# HandlePfatLegacy.c
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: HandlePfatLegacy.mak
+#
+# Description: Make file for HandlePfatLegacy
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all : HandlePfatLegacy
+
+HandlePfatLegacy : $(BUILD_DIR)\HandlePfatLegacy.mak HandlePfatLegacyBin
+
+#---------------------------------------------------------------------------
+#
+#---------------------------------------------------------------------------
+$(BUILD_DIR)\HandlePfatLegacy.mak : $(HandlePfatLegacy_DIR)\$(@B).cif $(HandlePfatLegacy_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(HandlePfatLegacy_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+#---------------------------------------------------------------------------
+#
+#---------------------------------------------------------------------------
+HandlePfatLegacyBin : $(AMIDXELIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\HandlePfatLegacy.mak all\
+ GUID=767BECBC-7E71-4c1e-B9BD-89193022E64E\
+ ENTRY_POINT=HandlePfatLegacyBoot\
+ TYPE=BS_DRIVER \
+ COMPRESS=1\
+#-----------------------------------------------------------------------
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/Pfat/HandlePfatLegacy/HandlePfatLegacy.sdl b/Board/EM/Pfat/HandlePfatLegacy/HandlePfatLegacy.sdl
new file mode 100644
index 0000000..0c6d246
--- /dev/null
+++ b/Board/EM/Pfat/HandlePfatLegacy/HandlePfatLegacy.sdl
@@ -0,0 +1,77 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/Pfatflashlib/HandlePfatLegacy/HandlePfatLegacy.sdl 2 11/19/12 5:30p Fredericko $
+#
+# $Revision: 2 $
+#
+# $Date: 11/19/12 5:30p $
+#
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/Pfatflashlib/HandlePfatLegacy/HandlePfatLegacy.sdl $
+#
+# 2 11/19/12 5:30p Fredericko
+#
+# 1 11/02/12 8:23p Fredericko
+# [TAG] EIP105153
+# [Files] HandlePfatLegacy.cif
+# HandlePfatLegacy.sdl
+# HandlePfatLegacy.mak
+# HandlePfatLegacy.c
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: HandlePfatLegacy.sdl
+#
+# Description: SDL file for HandlePfatLegacy
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+TOKEN
+ Name = "HandlePfatLegacy_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable HandlePfatLegacy support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "HandlePfatLegacy_DIR"
+ Help = "HandlePfatLegacy files source directory"
+End
+
+MODULE
+ Help = "Includes HandlePfatLegacy.mak to Project"
+ File = "HandlePfatLegacy.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\HandlePfatLegacy.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#********************************************************************** \ No newline at end of file
diff --git a/Board/EM/Pfat/PfatCpuPolicyOverride/OpensslLib.lib b/Board/EM/Pfat/PfatCpuPolicyOverride/OpensslLib.lib
new file mode 100644
index 0000000..290a4fa
--- /dev/null
+++ b/Board/EM/Pfat/PfatCpuPolicyOverride/OpensslLib.lib
Binary files differ
diff --git a/Board/EM/Pfat/PfatCpuPolicyOverride/PeiCryptLib.lib b/Board/EM/Pfat/PfatCpuPolicyOverride/PeiCryptLib.lib
new file mode 100644
index 0000000..b05426c
--- /dev/null
+++ b/Board/EM/Pfat/PfatCpuPolicyOverride/PeiCryptLib.lib
Binary files differ
diff --git a/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.c b/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.c
new file mode 100644
index 0000000..6eeb851
--- /dev/null
+++ b/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.c
@@ -0,0 +1,387 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.c 3 10/29/12 4:09p Fredericko $
+//
+// $Revision: 3 $
+//
+// $Date: 10/29/12 4:09p $
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: PfatCpuPolicyOverride.c
+//
+// Description: Code listing file for PfatCpuPolicyOverride
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#include "PfatCpuPolicyOverride.h"
+
+EFI_GUID pFatFileGuid = PFAT_PUB_KEY_FFS_FILE_RAW_GUID;
+
+STATIC EFI_PEI_NOTIFY_DESCRIPTOR mPfatCpuPolicyOverrideNotifyDesc = {
+ (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gPeiCpuPlatformPolicyPpiGuid,
+ PfatCpuPolicyOverrideEndOfPeiCpuPlatformPolicy
+};
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: CryptoGetRawImage
+//
+// Description: Loads binary from RAW section of X firwmare volume
+//
+//
+// Output: Buffer - returns a pointer to allocated memory. Caller
+// must free it when done.
+// Size - returns the size of the binary loaded into the
+// buffer.
+//
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+LocatPfatPubKey (IN EFI_PEI_SERVICES **PpSv, IN OUT VOID **Buffer)
+{
+ EFI_STATUS Status;
+ EFI_FIRMWARE_VOLUME_HEADER *pFV;
+ UINTN FvNum=0;
+ EFI_FFS_FILE_HEADER *ppFile=NULL;
+ BOOLEAN Found = FALSE;
+
+ Status = (*PpSv)->FfsFindNextVolume (PpSv, FvNum, &pFV);
+
+ while ( TRUE )
+ {
+ Status = (*PpSv)->FfsFindNextVolume( PpSv, FvNum, &pFV );
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ ppFile = NULL;
+
+ while ( TRUE )
+ {
+ Status = (*PpSv)->FfsFindNextFile( PpSv,
+ EFI_FV_FILETYPE_FREEFORM,
+ pFV,
+ &ppFile );
+
+ if ( Status == EFI_NOT_FOUND )
+ {
+ break;
+ }
+
+ DEBUG ((EFI_D_INFO, " ppFile guid:: %x \n", ppFile->Name));
+
+ if (CompareGuid( &ppFile->Name, &pFatFileGuid ))
+ {
+ Found = TRUE;
+ break;
+ }
+ }
+
+ if ( Found )
+ {
+ break;
+ }
+ else {
+ FvNum++;
+ }
+ }
+
+ Status = (*PpSv)->FfsFindSectionData( PpSv,
+ EFI_SECTION_RAW,
+ ppFile,
+ Buffer );
+
+ if (EFI_ERROR( Status )) {
+ return EFI_NOT_FOUND;
+ }
+
+ return Status;
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: CpuPolicy Override for Pfat
+//
+// Description: PfatCpuPolicyOverride at end of PeiCpuPlatformPolicy
+// handler.
+//
+// Output: PeiServices - Pointer to PEI Services Table.
+// NotifyDesc - Pointer to the descriptor for the Notification
+// event that caused this function to execute.
+// Ppi - Pointer to the PPI data associated with
+// this function.
+//
+//<AMI_PHDR_END>
+//**********************************************************************
+STATIC
+EFI_STATUS
+PfatCpuPolicyOverrideEndOfPeiCpuPlatformPolicy (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
+ IN VOID *Ppi
+)
+{
+ EFI_STATUS Status;
+ PEI_CPU_PLATFORM_POLICY_PPI *CpuPlatformPolicyPpi;
+ PFAT_CONFIG *PfatConfig;
+ CPU_CONFIG_PPI *CpuConfig;
+ UINT32 TotalROMSize = 0;
+ UINTN pFatHashDataSize = 0;
+ UINT8 pFatHash256Val[32];
+ UINT8 *Sha256PubKeyDigest;
+ VOID *pFatSha256Context;
+ VOID *pFatData;
+
+ Status = PeiServicesLocatePpi (&gPeiCpuPlatformPolicyPpiGuid, 0, NULL, &CpuPlatformPolicyPpi);
+ if ( EFI_ERROR( Status ) ) {
+ return Status;
+ }
+
+ PfatConfig = CpuPlatformPolicyPpi->SecurityConfig->PfatConfig;
+ CpuConfig = CpuPlatformPolicyPpi->CpuConfig;
+
+ CpuConfig->Pfat = CPU_FEATURE_ENABLE;
+ pFatHashDataSize = Sha256GetContextSize ();
+ Status = ((*PeiServices)->AllocatePool) (PeiServices, pFatHashDataSize, &pFatSha256Context);
+ if ( EFI_ERROR( Status ) ) {
+ return Status;
+ }
+
+ Status = LocatPfatPubKey(PeiServices ,&Sha256PubKeyDigest);
+ //
+ // If it fails it might be in non PUPC mode
+ //
+ if ( !EFI_ERROR( Status ) ) {
+ PfatConfig->PupHeader.PkgAttributes = 0;
+ CopyMem (&PfatConfig->Ppdt.PkeySlot0, Sha256PubKeyDigest, 32);
+ }
+
+ ///
+ /// Select to Flash Map 0 Register to get the number of flash Component
+ ///
+ MmioAndThenOr32 (
+ SB_RCBA + R_PCH_SPI_FDOC,
+ (UINT32) (~(B_PCH_SPI_FDOC_FDSS_MASK | B_PCH_SPI_FDOC_FDSI_MASK)),
+ (UINT32) (V_PCH_SPI_FDOC_FDSS_FSDM | R_PCH_SPI_FDBAR_FLASH_MAP0)
+ );
+
+ switch ( MmioRead16 (SB_RCBA + R_PCH_SPI_FDOD) & B_PCH_SPI_FDBAR_NC ) {
+ case V_PCH_SPI_FDBAR_NC_1:
+ PfatConfig->NumSpiComponents = 1;
+ break;
+ case V_PCH_SPI_FDBAR_NC_2:
+ PfatConfig->NumSpiComponents = 2;
+ break;
+ default:
+ break;
+ }
+
+ ///
+ /// Select to Flash Components Register to get the Component 1 Density
+ ///
+ MmioAndThenOr32 (
+ SB_RCBA + R_PCH_SPI_FDOC,
+ (UINT32) (~(B_PCH_SPI_FDOC_FDSS_MASK | B_PCH_SPI_FDOC_FDSI_MASK)),
+ (UINT32) (V_PCH_SPI_FDOC_FDSS_COMP | R_PCH_SPI_FCBA_FLCOMP)
+ );
+
+ ///
+ /// Copy Component 1 Density
+ ///
+ switch ( (UINT8) MmioRead32 (SB_RCBA + R_PCH_SPI_FDOD) & B_PCH_SPI_FLCOMP_COMP1_MASK ) {
+ case V_PCH_SPI_FLCOMP_COMP1_512KB:
+ PfatConfig->ComponentSize[0] = EnumSpiCompSize512KB;
+ TotalROMSize += (UINT32) LShiftU64(512, KBShift);
+ break;
+ case V_PCH_SPI_FLCOMP_COMP1_1MB:
+ PfatConfig->ComponentSize[0] = EnumSpiCompSize1MB;
+ TotalROMSize += (UINT32) LShiftU64(1, MBShift);
+ break;
+ case V_PCH_SPI_FLCOMP_COMP1_2MB:
+ PfatConfig->ComponentSize[0] = EnumSpiCompSize2MB;
+ TotalROMSize += (UINT32) LShiftU64(2, MBShift);
+ break;
+ case V_PCH_SPI_FLCOMP_COMP1_4MB:
+ PfatConfig->ComponentSize[0] = EnumSpiCompSize4MB;
+ TotalROMSize += (UINT32) LShiftU64(4, MBShift);
+ break;
+ case V_PCH_SPI_FLCOMP_COMP1_8MB:
+ PfatConfig->ComponentSize[0] = EnumSpiCompSize8MB;
+ TotalROMSize += (UINT32) LShiftU64(8, MBShift);
+ break;
+ case V_PCH_SPI_FLCOMP_COMP1_16MB:
+ PfatConfig->ComponentSize[0] = EnumSpiCompSize16MB;
+ TotalROMSize += (UINT32) LShiftU64(16, MBShift);
+ break;
+ case V_PCH_SPI_FLCOMP_COMP1_32MB:
+ PfatConfig->ComponentSize[0] = EnumSpiCompSize32MB;
+ TotalROMSize += (UINT32) LShiftU64(32, MBShift);
+ break;
+ case V_PCH_SPI_FLCOMP_COMP1_64MB:
+ PfatConfig->ComponentSize[0] = EnumSpiCompSize64MB;
+ TotalROMSize += (UINT32) LShiftU64(64, MBShift);
+ break;
+ default:
+ break;
+ }
+
+ ///
+ /// Copy Component 2 Density
+ ///
+ if ( PfatConfig->NumSpiComponents == 2 ) {
+ switch ( (UINT8) MmioRead32 (SB_RCBA + R_PCH_SPI_FDOD) & B_PCH_SPI_FLCOMP_COMP2_MASK ) {
+ case V_PCH_SPI_FLCOMP_COMP2_512KB:
+ PfatConfig->ComponentSize[1] = EnumSpiCompSize512KB;
+ TotalROMSize += (UINT32) LShiftU64(512, KBShift);
+ break;
+ case V_PCH_SPI_FLCOMP_COMP2_1MB:
+ PfatConfig->ComponentSize[1] = EnumSpiCompSize1MB;
+ TotalROMSize += (UINT32) LShiftU64(1, MBShift);
+ break;
+ case V_PCH_SPI_FLCOMP_COMP2_2MB:
+ PfatConfig->ComponentSize[1] = EnumSpiCompSize2MB;
+ TotalROMSize += (UINT32) LShiftU64(2, MBShift);
+ break;
+ case V_PCH_SPI_FLCOMP_COMP2_4MB:
+ PfatConfig->ComponentSize[1] = EnumSpiCompSize4MB;
+ TotalROMSize += (UINT32) LShiftU64(4, MBShift);
+ break;
+ case V_PCH_SPI_FLCOMP_COMP2_8MB:
+ PfatConfig->ComponentSize[1] = EnumSpiCompSize8MB;
+ TotalROMSize += (UINT32) LShiftU64(8, MBShift);
+ break;
+ case V_PCH_SPI_FLCOMP_COMP2_16MB:
+ PfatConfig->ComponentSize[1] = EnumSpiCompSize16MB;
+ TotalROMSize += (UINT32) LShiftU64(16, MBShift);
+ break;
+ case V_PCH_SPI_FLCOMP_COMP2_32MB:
+ PfatConfig->ComponentSize[1] = EnumSpiCompSize32MB;
+ TotalROMSize += (UINT32) LShiftU64(32, MBShift);
+ break;
+ case V_PCH_SPI_FLCOMP_COMP2_64MB:
+ PfatConfig->ComponentSize[1] = EnumSpiCompSize64MB;
+ TotalROMSize += (UINT32) LShiftU64(64, MBShift);
+ break;
+ default:
+ break;
+ }
+ }
+
+ //
+ // LastSfam : Number of SfamData - 1
+ //
+ PfatConfig->Ppdt.LastSfam = PFAT_COUNT - 1;
+ if (PfatConfig->Ppdt.LastSfam > (MAX_SFAM_COUNT - 1)) {
+ PfatConfig->Ppdt.LastSfam = MAX_SFAM_COUNT - 1;
+ }
+
+ //
+ // SfamData[0] : BIOS Region only skip NVRAM
+ //
+ PfatConfig->Ppdt.SfamData[0].FirstByte = TotalROMSize - (0xFFFFFFFF - FV_MAIN_BASE + 1);
+ PfatConfig->Ppdt.SfamData[0].LastByte = TotalROMSize - 1;
+
+ //
+ // SfamData[1] : ME Region + GBE Region + Description Region
+ //
+ PfatConfig->Ppdt.SfamData[1].FirstByte = 0x00;
+ PfatConfig->Ppdt.SfamData[1].LastByte = TotalROMSize - FLASH_SIZE -1;
+ PfatConfig->Ppdt.PpdtSize = (sizeof (PPDT) - sizeof (PfatConfig->Ppdt.SfamData) + ((PfatConfig->Ppdt.LastSfam + 1) * sizeof (SFAM_DATA)));
+
+ //
+ // Defined values in the token
+ //
+ PfatConfig->Ppdt.BiosSvn = BIOS_SVN;
+ PfatConfig->PfatMemSize = (UINT8) RShiftU64(PfatMaxSectionSize, MBShift) + 1;
+
+ //
+ // Hash the PPDT to PfatConfig->PpdtHash
+ //
+ pFatHashDataSize = PfatConfig->Ppdt.PpdtSize;
+ pFatData = (VOID *) &PfatConfig->Ppdt;
+ Sha256Init (pFatSha256Context);
+ Sha256Update (pFatSha256Context, pFatData, pFatHashDataSize);
+ Sha256Final (pFatSha256Context, pFatHash256Val);
+ CopyMem (&PfatConfig->PpdtHash[0], &pFatHash256Val[0], 8);
+ CopyMem (&PfatConfig->PpdtHash[1], &pFatHash256Val[8], 8);
+ CopyMem (&PfatConfig->PpdtHash[2], &pFatHash256Val[16], 8);
+ CopyMem (&PfatConfig->PpdtHash[3], &pFatHash256Val[24], 8);
+ return Status;
+}
+
+EFI_STATUS
+PfatCpuPolicyOverrideEntryPoint (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+)
+{
+ EFI_STATUS Status;
+ EFI_PEI_READ_ONLY_VARIABLE_PPI *ReadOnlyVariable;
+ SETUP_DATA SetupData;
+ EFI_GUID SetupGuid = SYSTEM_CONFIGURATION_GUID;
+ UINTN VariableSize= sizeof (SETUP_DATA);
+
+ Status = PeiServicesLocatePpi (&gEfiPeiReadOnlyVariablePpiGuid, 0, NULL, &ReadOnlyVariable);
+ if ( EFI_ERROR( Status ) ) {
+ return Status;
+ }
+
+ Status = ReadOnlyVariable->PeiGetVariable (
+ PeiServices,
+ L"Setup",
+ &SetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData
+ );
+ if ( EFI_ERROR( Status ) ) {
+ return Status;
+ }
+
+ if ( SetupData.Pfatstate == Enable ) {
+ Status = PeiServicesNotifyPpi (&mPfatCpuPolicyOverrideNotifyDesc);
+ if ( EFI_ERROR( Status ) ) {
+ return Status;
+ }
+ }
+
+ return Status;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.cif b/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.cif
new file mode 100644
index 0000000..96b5b2b
--- /dev/null
+++ b/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.cif
@@ -0,0 +1,14 @@
+<component>
+ name = "PfatCpuPolicyOverride"
+ category = ModulePart
+ LocalRoot = "Board\EM\Pfat\PfatCpuPolicyOverride"
+ RefName = "PfatCpuPolicyOverride"
+[files]
+"PfatCpuPolicyOverride.c"
+"PfatCpuPolicyOverride.h"
+"PfatCpuPolicyOverride.dxs"
+"PfatCpuPolicyOverride.sdl"
+"PfatCpuPolicyOverride.mak"
+"PeiCryptLib.lib"
+"OpensslLib.lib"
+<endComponent>
diff --git a/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.dxs b/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.dxs
new file mode 100644
index 0000000..db14387
--- /dev/null
+++ b/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.dxs
@@ -0,0 +1,55 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.dxs 2 9/25/12 6:16p Fredericko $Revision:
+//
+// $Date:
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: PfatCpuPolicyOverride.dxs
+//
+// Description: PfatCpuPolicyOverride dependency file
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#include "AutoGen.h"
+#include "PeimDepex.h"
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+#include EFI_PPI_DEPENDENCY (Variable)
+#endif
+
+DEPENDENCY_START
+ PEI_READ_ONLY_VARIABLE_ACCESS_PPI_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.h b/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.h
new file mode 100644
index 0000000..c14735d
--- /dev/null
+++ b/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.h
@@ -0,0 +1,133 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.h 1 9/17/12 4:47p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 9/17/12 4:47p $
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: PfatCpuPolicyOverride.h
+//
+// Description: Header file for PfatCpuPolicyOverride sub-component
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#ifndef _PFAT_CPU_POLICY_OVERRIDE_H_
+#define _PFAT_CPU_POLICY_OVERRIDE_H_
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGluePeim.h"
+
+#include <Token.h>
+#include <SetupDataDefinition.h>
+#include "PchRegs.h"
+#include EFI_PPI_PRODUCER (CpuPlatformPolicy)
+#endif
+
+#define SYSTEM_CONFIGURATION_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+
+#define PFAT_PUB_KEY_FFS_FILE_RAW_GUID \
+ {0x8e295870, 0xd377, 0x4b75, 0xbf, 0xdc, 0x9a, 0xe2, 0xf6, 0xdb, 0xde, 0x22}
+
+#define KBShift 10
+#define MBShift 20
+#define Disable 0
+#define Enable 1
+
+#if defined(BUILD_WITH_GLUELIB)
+#undef SetMem
+VOID *
+SetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ return GlueSetMem (Buffer, Length, Value);
+}
+
+#undef CopyMem
+VOID *
+EFIAPI
+CopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ return GlueCopyMem (DestinationBuffer, SourceBuffer, Length);
+}
+#endif
+
+STATIC
+EFI_STATUS
+PfatCpuPolicyOverrideEndOfPeiCpuPlatformPolicy (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
+ IN VOID *Ppi
+);
+
+//
+// Hash functions definitions for pfat
+//
+UINTN
+EFIAPI
+Sha256GetContextSize (
+ VOID
+ );
+
+BOOLEAN
+EFIAPI
+Sha256Init (
+ IN OUT VOID *Sha256Context
+ );
+
+BOOLEAN
+EFIAPI
+Sha256Update (
+ IN OUT VOID *Sha256Context,
+ IN CONST VOID *Data,
+ IN UINTN DataLength
+ );
+
+BOOLEAN
+EFIAPI
+Sha256Final (
+ IN OUT VOID *Sha256Context,
+ OUT UINT8 *HashValue
+ );
+
+#endif
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.mak b/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.mak
new file mode 100644
index 0000000..4656d93
--- /dev/null
+++ b/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.mak
@@ -0,0 +1,116 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.mak 4 10/29/12 4:10p Fredericko $
+#
+# $Revision: 4 $
+#
+# $Date: 10/29/12 4:10p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.mak $
+#
+# 4 10/29/12 4:10p Fredericko
+# [TAG] EIP84115
+# [Category] Improvement
+# [Description] Implementing PFAT function for Shark Bay
+#
+# 3 10/05/12 6:28p Fredericko
+# Make Pfat build with Debug Mode Turned On.
+#
+# 2 9/25/12 6:16p Fredericko
+#
+# 1 9/17/12 4:47p Fredericko
+# Initial Check in for PfatCpuPolicyOverride
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: PfatCpuPolicyOverride.mak
+#
+# Description: Make file for PfatCpuPolicyOverride
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+all : PfatCpuPolicyOverride
+
+PfatCpuPolicyOverride : $(BUILD_DIR)\PfatCpuPolicyOverride.mak PfatCpuPolicyOverrideBin
+
+$(BUILD_DIR)\PfatCpuPolicyOverride.mak : $(PFAT_CPU_POLICY_OVERRIDE_PATH)\PfatCpuPolicyOverride.cif $(PFAT_CPU_POLICY_OVERRIDE_PATH)\PfatCpuPolicyOverride.mak $(BUILD_RULES)
+ $(CIF2MAK) $(PFAT_CPU_POLICY_OVERRIDE_PATH)\PfatCpuPolicyOverride.cif $(CIF2MAK_DEFAULTS)
+
+PFAT_CPU_POLICY_OVERRIDE_INCLUDES = \
+ $(EdkIIGlueLib_INCLUDES)\
+ /I$(INTEL_COUGAR_POINT_INCLUDE_DIR)\
+ /I$(PROJECT_CPU_ROOT)\
+ /I$(PROJECT_CPU_ROOT)\Include \
+
+PFAT_CPU_POLICY_OVERRIDE_DEFINES=\
+ $(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=PfatCpuPolicyOverrideEntryPoint"\
+ /D __EDKII_GLUE_BASE_LIB__ \
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__\
+ /D __EDKII_GLUE_PEI_SERVICES_LIB__ \
+ /D __EDKII_GLUE_PEI_MEMORY_ALLOCATION_LIB__ \
+ /D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ \
+
+PFAT_CPU_POLICY_OVERRIDE_LIBS = \
+ $(EDKFRAMEWORKGUIDLIB)\
+ $(EDKPPILIB)\
+ $(EdkIIGlueBaseLibIA32_LIB)\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGlueBaseMemoryLib_LIB)\
+ $(EdkIIGluePeiDebugLibReportStatusCode_LIB)\
+ $(EdkIIGluePeiReportStatusCodeLib_LIB)\
+ $(EdkIIGluePeiServicesLib_LIB)\
+ $(EdkIIGluePeiMemoryAllocationLib_LIB)\
+ $(EdkIIGlueBasePciLibPciExpress_LIB)\
+ $(EdkIIGlueBasePciExpressLib_LIB)\
+ $(EdkIIGluePeiHobLib_LIB)\
+ $(INTEL_SA_PPI_LIB)\
+ $(CPU_PPI_LIB)\
+
+PfatCpuPolicyOverrideBin : $(PFAT_CPU_POLICY_OVERRIDE_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\PfatCpuPolicyOverride.mak all\
+ NAME=PfatCpuPolicyOverride \
+ MAKEFILE=$(BUILD_DIR)\PfatCpuPolicyOverride.mak \
+ "MY_INCLUDES=$(PFAT_CPU_POLICY_OVERRIDE_INCLUDES)"\
+ "MY_DEFINES = $(PFAT_CPU_POLICY_OVERRIDE_DEFINES)" \
+ OBJECTS="$(BUILD_DIR)\$(PFAT_CPU_POLICY_OVERRIDE_PATH)\PfatCpuPolicyOverride.obj" \
+ GUID=FAF79E9F-4D40-4F02-8AC9-4B5512708F7F \
+ ENTRY_POINT=_ModuleEntryPoint "EXT_HEADERS=$(BUILD_DIR)\token.h"\
+ TYPE=PEIM \
+ EDKIIModule=PEIM\
+ DEPEX1=$(PFAT_CPU_POLICY_OVERRIDE_PATH)\PfatCpuPolicyOverride.dxs \
+ DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX \
+ COMPRESS=0
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.sdl b/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.sdl
new file mode 100644
index 0000000..9fd801e
--- /dev/null
+++ b/Board/EM/Pfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.sdl
@@ -0,0 +1,98 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.sdl 3 10/02/12 4:12p Fredericko $
+#
+# $Revision: 3 $
+#
+# $Date: 10/02/12 4:12p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatCpuPolicyOverride/PfatCpuPolicyOverride.sdl $
+#
+# 3 10/02/12 4:12p Fredericko
+# BIOS_SVN token added
+#
+# 2 9/25/12 6:16p Fredericko
+#
+# 1 9/17/12 4:47p Fredericko
+# Initial Check in for PfatCpuPolicyOverride
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: PfatCpuPolicyOverride.sdl
+#
+# Description: SDL file for PfatCpuPolicyOverride
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "PFAT_CPU_POLICY_OVERRIDE_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable PFAT_CPU_POLICY_OVERRIDE_SUPPORT support in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+MODULE
+ Help = "Includes PfatCpuPolicyOverride.mak to Project"
+ File = "PfatCpuPolicyOverride.mak"
+End
+
+PATH
+ Name = "PFAT_CPU_POLICY_OVERRIDE_PATH"
+End
+
+TOKEN
+ Name = "PFAT_COUNT"
+ Value = "2"
+ Help = ""
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "BIOS_SVN"
+ Value = "9502720"
+ Help = "This token must to be decimal because Intel's PPB.exe only supported decimal. The definition is 0x910000(9502720) in PEI_CPU_PLATFORM_POLICY_PPI_REVISION_5."
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\PfatCpuPolicyOverride.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+End
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/Pfat/PfatPubKeysAndBuildPSL/.VkeyExp b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/.VkeyExp
new file mode 100644
index 0000000..a356872
--- /dev/null
+++ b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/.VkeyExp
Binary files differ
diff --git a/Board/EM/Pfat/PfatPubKeysAndBuildPSL/BuildAmiPfatHeader.exe b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/BuildAmiPfatHeader.exe
new file mode 100644
index 0000000..0bb57ac
--- /dev/null
+++ b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/BuildAmiPfatHeader.exe
Binary files differ
diff --git a/Board/EM/Pfat/PfatPubKeysAndBuildPSL/BuildPSL.bat b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/BuildPSL.bat
new file mode 100644
index 0000000..8337d0c
--- /dev/null
+++ b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/BuildPSL.bat
@@ -0,0 +1,315 @@
+echo off
+Set AMI_PFAT_FLASH_CONFIGURATIONS=Flash.ini
+echo AMI_PFAT_Flash_Configurations>%AMI_PFAT_FLASH_CONFIGURATIONS%
+Set FITC_OUTIMAGE_MAP=%1
+Set BuildBIOSMap=%2
+Set WORKING_PATH=%3
+Set BIOS_SVN=%4
+Set /a FlashSectionSize=%5
+if not exist %FITC_OUTIMAGE_MAP% (
+ echo Error:OutImage.map isn't found, please check the eModule of RomImgae
+ goto END
+)
+if not exist %BuildBIOSMap% (
+ echo Error:BuildBIOS.map isn't found, please check the PfatPubKeysAndBuildPSL.sdl
+ goto END
+)
+if not exist ForPfatName.txt (
+ echo Error:ForPfatName.txt isn't found, please check the eModule of RomImgae
+ goto END
+)
+FOR /F "usebackq tokens=1" %%G IN ("ForPfatName.txt") DO (
+ Set INPUT_BIOS_IMAGE=%%G
+)
+del ForPfatName.txt
+FOR /F "skip=2 usebackq tokens=1,2,3,4-6" %%G IN ("%FITC_OUTIMAGE_MAP%") DO (
+ if "%%J %%K %%L" EQU "Flash Image " (
+ Set /a TOTAL_ROM_SIZE=0x%%I
+ )else if "%%J %%K %%L" EQU "Descriptor Region " (
+ Set /a DescriptorRegionStartingAddress=0x%%G
+ Set /a DescriptorRegionLength=0x%%I
+ )else if "%%J %%K %%L" EQU "GbE Region " (
+ Set /a GbERegionStartingAddress=0x%%G
+ Set /a GbERegionLength=0x%%I
+ )else if "%%J %%K %%L" EQU "ME Region " (
+ Set /a MERegionStartingAddress=0x%%G
+ Set /a MERegionLength=0x%%I
+ )else if "%%J %%K %%L" EQU "BIOS Region " (
+ Set /a BIOSRegionStartingAddress=0x%%G
+ Set /a BIOSRegionLength=0x%%I
+ )
+)
+goto Define_Flash_Type
+
+:Define_Flash_Type
+Set MeType=0
+Set BiosType=1
+Set EcType=2
+Set OthersType=3
+goto Prepare_Definitions
+
+:Prepare_Definitions
+Set DESCRIPTOR_REGION_ROM=DescriptorRegion.bin
+Set GBE_REGION_ROM=GbERegion.bin
+Set ME_REGION_ROM=MERegion.bin
+Set PUBLIC_KEY_FILENAME=%WORKING_PATH%\PfatPublic.key
+Set PRIVATE_KEY_FILENAME=%WORKING_PATH%\PfatPrivate.key
+Set PFAT_VKEY_EXP=%WORKING_PATH%\.VkeyExp
+Set PUBLIC_KEY_FILENAME_HASH=%WORKING_PATH%\PubKeyhash.bin
+Set PFATCRYPTCON=%WORKING_PATH%\PfatCryptoCon.exe
+Set KEYGEN=%WORKING_PATH%\Keygen.exe
+Set CUTROM=%WORKING_PATH%\CutRom.exe
+Set PSL2BIN=%WORKING_PATH%\psl2bin.exe
+Set PPB=%WORKING_PATH%\PPB.exe
+Set PSL_FILE=AmiPfatBiosPSL
+Set PFAT_SCRIPT_HDR=%WORKING_PATH%\PfatCertHeader.bin
+Set PFAT_UPDATEPKG_FILENAME=UpdatePkg.pfat
+Set PFAT_SIGNATURE_FILENAME=.out_PfatCer
+Set PFAT_INTREGRATION_ROM=AMIPFAT.bin
+Set AMI_PFAT_HEADER=%WORKING_PATH%\AMIPFATHeader.bin
+%WORKING_PATH%\BuildAmiPfatHeader.exe /Empty %AMI_PFAT_HEADER%
+copy %AMI_PFAT_HEADER% %PFAT_INTREGRATION_ROM%
+goto BUILD_DESCRIPTOR_REGION_ROM
+
+:BUILD_DESCRIPTOR_REGION_ROM
+ Set ROM_PRIORITY=%DESCRIPTOR_REGION_ROM%
+ Set /a FV_StartingAddress=%DescriptorRegionStartingAddress%
+ Set /a FV_Length=%DescriptorRegionLength%
+ goto SETUP_PARAMETERS
+
+:BUILD_GBE_REGION_ROM
+ Set ROM_PRIORITY=%GBE_REGION_ROM%
+ Set /a FV_StartingAddress=%GbERegionStartingAddress%
+ Set /a FV_Length=%GbERegionLength%
+ goto SETUP_PARAMETERS
+
+:BUILD_ME_REGION_ROM
+ Set ROM_PRIORITY=%ME_REGION_ROM%
+ Set /a FV_StartingAddress=%MERegionStartingAddress%
+ Set /a FV_Length=%MERegionLength%
+ goto SETUP_PARAMETERS
+
+:BUILD_BIOS_REGION_ROM_FIRST_FV
+ Set /a BIOS_FV_Number=0
+ FOR /F "usebackq tokens=1-4" %%G IN ("%BuildBIOSMap%") DO (
+ Set ROM_PRIORITY=%%G
+ Set FlashCMD=%%H
+ Set /a FV_StartingAddress=%BIOSRegionStartingAddress%+%%I
+ Set /a FV_Length=%%J
+ goto SETUP_PARAMETERS
+ )
+ goto BuildAmiPfatHeader
+
+:BUILD_BIOS_REGION_ROM_REMAINDER
+ Set /a BIOS_FV_Number+=1
+ FOR /F "skip=%BIOS_FV_Number% usebackq tokens=1-4" %%G IN ("%BuildBIOSMap%") DO (
+ Set ROM_PRIORITY=%%G
+ Set FlashCMD=%%H
+ Set /a FV_StartingAddress=%BIOSRegionStartingAddress%+%%I
+ Set /a FV_Length=%%J
+ goto SETUP_PARAMETERS
+ )
+ goto BuildAmiPfatHeader
+
+:SETUP_PARAMETERS
+ %CUTROM% %INPUT_BIOS_IMAGE% %ROM_PRIORITY% %FV_StartingAddress% %FV_Length%
+ Set /a FlashRemainderSize=%FV_Length%%%FlashSectionSize%
+ Set /a SUBTRACT_BLOCK_SIZE_FROM_DATA_SIZE=%FlashSectionSize%-0x1000
+ Set /a START_COUNT=0
+ Set /a NoRemainderCount=%FV_Length%/%FlashSectionSize%
+ if %NoRemainderCount% GTR 0 (
+ Set /a NoRemainderCount-=1
+ Set /a SKIP_CUT_ROM=1
+ ) else (
+ Set /a SKIP_CUT_ROM=0
+ )
+ if %FlashRemainderSize% EQU 0 (
+ Set /a END_COUNT=%FV_Length%/%FlashSectionSize%-1
+ ) else (
+ Set /a END_COUNT=%FV_Length%/%FlashSectionSize%
+ )
+ Set /a END_OF_SIZE=%FV_StartingAddress%+%FV_Length%
+ goto AutoBuildPSL
+
+:AutoBuildPSL
+ Set /a START_FLASH_SECTION=%START_COUNT%*%FlashSectionSize%
+ Set /a START_FLASH_SECTION_IN_MB=%START_FLASH_SECTION%/%FlashSectionSize%
+ Set FLASH_ROM=AMI_%START_FLASH_SECTION_IN_MB%M.rom
+ Set PSL_OUT_FILENAME=AmiPfatBiosPSLOutput_%START_FLASH_SECTION_IN_MB%M.bin
+ Set FLASH_ROM_OUTPUT_FILENAME=APFAT%START_FLASH_SECTION_IN_MB%M.bin
+ Set /a SUBTRACT_BLOCK_SIZE_FROM_TOTAL_ROM_SIZE=%FV_StartingAddress%
+ Set /a CURRENT_SIZE=%START_COUNT%+1
+ Set /a CURRENT_SIZE*=%FlashSectionSize%
+ Set /a CURRENT_SIZE-=0x1000
+ if %SKIP_CUT_ROM% EQU 1 (
+ if %NoRemainderCount% GEQ %START_COUNT% (
+ %CUTROM% %ROM_PRIORITY% %FLASH_ROM% %START_FLASH_SECTION% %FlashSectionSize%
+ Set /a SUBTRACT_BLOCK_SIZE_FROM_TOTAL_ROM_SIZE+=%CURRENT_SIZE%
+ ) else (
+ %CUTROM% %ROM_PRIORITY% %FLASH_ROM% %START_FLASH_SECTION% %FlashRemainderSize%
+ Set /a SUBTRACT_BLOCK_SIZE_FROM_TOTAL_ROM_SIZE=%END_OF_SIZE%-0x1000
+ Set /a SUBTRACT_BLOCK_SIZE_FROM_DATA_SIZE=%FlashRemainderSize%-0x1000
+ )
+ ) else (
+ Set FLASH_ROM=%ROM_PRIORITY%
+ Set /a SUBTRACT_BLOCK_SIZE_FROM_TOTAL_ROM_SIZE=%END_OF_SIZE%-0x1000
+ Set /a SUBTRACT_BLOCK_SIZE_FROM_DATA_SIZE=%FlashRemainderSize%-0x1000
+ )
+ echo begin > %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo // Set up initial values for update process >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo set F0 %SUBTRACT_BLOCK_SIZE_FROM_TOTAL_ROM_SIZE%; Total ROM size >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo set B0 %SUBTRACT_BLOCK_SIZE_FROM_DATA_SIZE%; Data size >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo set I0 0; the offset count >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo set I1 0x1000; the FLASH BLOCK SIZE >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo set I2 0; Erase error count >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo set I3 0; Write error count >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo set I4 3; Max errors >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo set I5 0; Error Code Buffer >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo set I6 0; Read error count >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jmp _read; >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo _read_retry_label: >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo add I6 1; increment the read retries count >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo compare I6 I4; compare read retries count to max retries >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jge _read_error_label >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jmp _read; if error START_COUNT is smaller than Max errors jump to read>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo _erase_retry_label: >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo add I2 1; increment the erase retries count >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo compare I2 I4; compare erase retries count to max retries >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jge _erase_error_label >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jmp _erase; if error START_COUNT is smaller than Max errors jump to erase >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo _write_retry_label: >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo add I3 1; increment the write retries count >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo compare I3 I4; compare write retries count to max retries >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jge _write_error_label >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jmp _write; if error START_COUNT is smaller than Max errors jump to weite>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo _loop: >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo _read: >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo read B1 F0 I1; read block 4KB >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo rdsts I5; read the HW status into I5 >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo compare I5 0; >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jne _read_retry_label; if HW status != 0 jump to retry >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo compare B0 B1 I1; compare B0 vs B1 >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo je _skip_erase_and_write; if B0 == B1 skip erase and write >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo _erase: >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo eraseblk F0; erase block 4KB >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo rdsts I5; read the HW status into I5 >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo compare I5 0; >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jne _erase_retry_label; if HW status != 0 jump to retry >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo _write: >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo write F0 B0 I1; write block >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo rdsts I5; read the HW status into I5 >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo compare I5 0; >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jne _write_retry_label; if HW status != 0 jump to retry >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo _skip_erase_and_write: >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo add I0 I1; increment offset >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo // check if we reached the end of the buffer. We can't increment F0.offset and B0.offset to be more than BIOS size. >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ if %SKIP_CUT_ROM% EQU 1 (
+ if %NoRemainderCount% GEQ %START_COUNT% (
+ echo compare I0 %FlashSectionSize%; compare count with BIOS image size >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jge _end; if the count is greater or equal to %FlashSectionSize% then complete >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ ) else (
+ echo compare I0 %FlashRemainderSize%; compare count with BIOS image size >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jge _end; if the count is greater or equal to %FlashRemainderSize% then complete >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ )
+ ) else (
+ echo compare I0 %FlashRemainderSize%; compare count with BIOS image size >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jge _end; if the count is greater or equal to %FlashRemainderSize% then complete >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ )
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo //Sub 4KB to offsets >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo sub F0 I1; Decrement flash offset >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo sub B0 I1; Decrement buffer offset >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jmp _loop; work on the next block >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo _read_error_label: >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo set If 1; set error in If >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jmp _end; >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo _erase_error_label: >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo set If 2; set error in If >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo jmp _end; >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo _write_error_label: >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo set If 3; set error in If >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo _end: >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo set If 0; set error = 0 if success >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ echo.>> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+ echo end >> %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl
+
+ %PSL2BIN% %PSL_FILE%_%START_FLASH_SECTION_IN_MB%M.psl %PSL_OUT_FILENAME%
+ %PPB% -script %PSL_OUT_FILENAME% -data %FLASH_ROM% -package %PFAT_UPDATEPKG_FILENAME% -use_sfam true -bios_svn %BIOS_SVN%
+ %PFATCRYPTCON% -z -k %PRIVATE_KEY_FILENAME% -f %PFAT_UPDATEPKG_FILENAME% -s
+ copy /b %PFAT_UPDATEPKG_FILENAME% + %PFAT_SCRIPT_HDR% + %PFAT_SIGNATURE_FILENAME% %FLASH_ROM_OUTPUT_FILENAME%
+ if exist .out_key (
+ del .out_key
+ )
+ del .out_PfatCer
+ del %PFAT_UPDATEPKG_FILENAME%
+ if %START_COUNT% EQU %END_COUNT% goto FinishedAutoBuildPSL
+ Set /a START_COUNT+=1
+ goto AutoBuildPSL
+
+:FinishedAutoBuildPSL
+ Set /a START_COUNT=0
+:IntegrateAllROMs
+ Set /a START_FLASH_SECTION=%START_COUNT%*%FlashSectionSize%
+ Set /a START_FLASH_SECTION_IN_MB=%START_FLASH_SECTION%/%FlashSectionSize%
+ copy /b %PFAT_INTREGRATION_ROM%+APFAT%START_FLASH_SECTION_IN_MB%M.bin %PFAT_INTREGRATION_ROM%
+ del APFAT%START_FLASH_SECTION_IN_MB%M.bin
+ del AmiPfatBiosPSLOutput_%START_FLASH_SECTION_IN_MB%M.bin
+ if exist AMI_%START_FLASH_SECTION_IN_MB%M.rom (
+ del AMI_%START_FLASH_SECTION_IN_MB%M.rom
+ )
+ if %START_COUNT% EQU %END_COUNT% goto FinishedIntegrateAllROMs
+ Set /a START_COUNT+=1
+ goto IntegrateAllROMs
+
+:FinishedIntegrateAllROMs
+ del *.psl
+ Set /a END_COUNT+=1
+ del %ROM_PRIORITY%
+ if "%ROM_PRIORITY%" EQU "%DESCRIPTOR_REGION_ROM%" (
+ echo %MeType% /DESC %END_COUNT% ;%ROM_PRIORITY%>>%AMI_PFAT_FLASH_CONFIGURATIONS%
+ goto BUILD_GBE_REGION_ROM
+ )
+ if "%ROM_PRIORITY%" EQU "%GBE_REGION_ROM%" (
+ echo %MeType% /GBE %END_COUNT% ;%ROM_PRIORITY%>>%AMI_PFAT_FLASH_CONFIGURATIONS%
+ goto BUILD_ME_REGION_ROM
+ )
+ if "%ROM_PRIORITY%" EQU "%ME_REGION_ROM%" (
+ echo %MeType% /ME %END_COUNT% ;%ROM_PRIORITY%>>%AMI_PFAT_FLASH_CONFIGURATIONS%
+ goto BUILD_BIOS_REGION_ROM_FIRST_FV
+ )
+ echo %BiosType% %FlashCMD% %END_COUNT% ;%ROM_PRIORITY%>>%AMI_PFAT_FLASH_CONFIGURATIONS%
+ goto BUILD_BIOS_REGION_ROM_REMAINDER
+
+:BuildAmiPfatHeader
+ %WORKING_PATH%\BuildAmiPfatHeader.exe %AMI_PFAT_FLASH_CONFIGURATIONS% %AMI_PFAT_HEADER%
+ copy /b %AMI_PFAT_HEADER%+%PFAT_INTREGRATION_ROM% AMIPFAT_%INPUT_BIOS_IMAGE%
+ del %AMI_PFAT_HEADER%
+ del %PFAT_INTREGRATION_ROM%
+:END \ No newline at end of file
diff --git a/Board/EM/Pfat/PfatPubKeysAndBuildPSL/CutRom.exe b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/CutRom.exe
new file mode 100644
index 0000000..910e46c
--- /dev/null
+++ b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/CutRom.exe
Binary files differ
diff --git a/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PPB.exe b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PPB.exe
new file mode 100644
index 0000000..a7f27a9
--- /dev/null
+++ b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PPB.exe
Binary files differ
diff --git a/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatCertHeader.bin b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatCertHeader.bin
new file mode 100644
index 0000000..1d9374d
--- /dev/null
+++ b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatCertHeader.bin
Binary files differ
diff --git a/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatCryptoCon.exe b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatCryptoCon.exe
new file mode 100644
index 0000000..8914a6f
--- /dev/null
+++ b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatCryptoCon.exe
Binary files differ
diff --git a/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatPubKeysAndBuildPSL.cif b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatPubKeysAndBuildPSL.cif
new file mode 100644
index 0000000..1dfa1b8
--- /dev/null
+++ b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatPubKeysAndBuildPSL.cif
@@ -0,0 +1,19 @@
+<component>
+ name = "PfatPubKeysAndBuildPSL"
+ category = ModulePart
+ LocalRoot = "Board\EM\Pfat\PfatPubKeysAndBuildPSL"
+ RefName = "PfatPubKeysAndBuildPSL"
+[files]
+"PfatPubKeysAndBuildPSL.sdl"
+"PfatPubKeysAndBuildPSL.mak"
+"dummy.bin"
+"PfatCertHeader.bin"
+"BuildPSL.bat"
+"BuildAmiPfatHeader.exe"
+"CutRom.exe"
+"keygen.exe"
+"PfatCryptoCon.exe"
+"PPB.exe"
+"psl2bin.exe"
+".VkeyExp"
+<endComponent>
diff --git a/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatPubKeysAndBuildPSL.mak b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatPubKeysAndBuildPSL.mak
new file mode 100644
index 0000000..16fad9e
--- /dev/null
+++ b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatPubKeysAndBuildPSL.mak
@@ -0,0 +1,105 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatUtilsandScripts/PfatPubKeysAndBuildPSL.mak 1 10/29/12 4:04p Fredericko $
+#
+# $Revision: 1 $
+#
+# $Date: 10/29/12 4:04p $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatUtilsandScripts/PfatPubKeysAndBuildPSL.mak $
+#
+# 1 10/29/12 4:04p Fredericko
+# [TAG] EIP844115
+# [Category] Improvement
+# [Description] Added PfatPubKeysAndBuildPSL. Added Tools CutRom for
+# stiching PfatImage, BuildAmiPfatHeader for creating Apfatdos header for
+# PFAT.
+# [Files] PfatPubKeysAndBuildPSL.cif
+# PfatPubKeysAndBuildPSL.sdl
+# PfatPubKeysAndBuildPSL.mak
+# dummy.bin
+# BuildPSL.bat
+# BuildAmiPfatHeader.exe
+# CutRom.exe
+#
+# 7 9/21/12 5:08p Fredericko
+# Modified to use cryptocon and keygen
+#
+# 4 9/17/12 4:34p Fredericko
+# Changes to create PSL at build time. Changes for SignPfat utility error
+# during build.
+#
+# 3 9/10/12 10:52p Fredericko
+#
+# 2 9/10/12 9:55p Fredericko
+#
+# 1 9/01/12 2:22a Fredericko
+#
+#*************************************************************************
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: PfatPubKey.mak
+#
+# Description: Make for for PfatPubKey
+#
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+all: PfatPubKeyModule
+
+PfatPubKeyModule : SETPFATPUBKEY
+
+PFAT_PUB_KEY_FFS_FILE_GUID = 8E295870-D377-4b75-BFDC-9AE2F6DBDE22
+
+SETPFATPUBKEY: $(BUILD_DIR)\PfatPubKey.ffs
+
+PUBLIC_KEY_FILENAME = $(PFATPUB_DIR)\PfatPublic.key
+PRIVATE_KEY_FILENAME = $(PFATPUB_DIR)\PfatPrivate.key
+PFAT_VKEY_EXP = $(PFATPUB_DIR)\.VkeyExp
+PUBLIC_KEY_FILENAME_HASH = $(PFATPUB_DIR)\PubKeyhash.bin
+
+PFAT_GENERATE_KEYS:
+ del $(PUBLIC_KEY_FILENAME_HASH)
+ if not exist $(PUBLIC_KEY_FILENAME) $(KEYGEN) $(PRIVATE_KEY_FILENAME) $(PUBLIC_KEY_FILENAME)
+ $(PFATCRYPTCON) -z -w -k $(PRIVATE_KEY_FILENAME) -f $(PFATPUB_DIR)\dummy.bin -s
+ copy /b .out_key + $(PFAT_VKEY_EXP) $(PUBLIC_KEY_FILENAME_HASH)
+ $(PFATCRYPTCON) -h2 -f $(PUBLIC_KEY_FILENAME_HASH) -o $(PUBLIC_KEY_FILENAME_HASH)
+
+PREPARE : PFAT_GENERATE_KEYS
+
+$(BUILD_DIR)\PfatPubKey.ffs : $(PUBLIC_KEY_FILENAME_HASH)
+ $(MAKE) /f Core\FFS.mak \
+ BUILD_DIR=$(BUILD_DIR) \
+ GUID=$(PFAT_PUB_KEY_FFS_FILE_GUID) \
+ TYPE=EFI_FV_FILETYPE_FREEFORM \
+ BINFILE=$** FFSFILE=$@ COMPRESS=0 NAME=PfatPubKey
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatPubKeysAndBuildPSL.sdl b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatPubKeysAndBuildPSL.sdl
new file mode 100644
index 0000000..21bdb8f
--- /dev/null
+++ b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/PfatPubKeysAndBuildPSL.sdl
@@ -0,0 +1,265 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+
+TOKEN
+ Name = "PfatPubKey_SUPPORT"
+ Value = "1"
+ Help = ""
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+MODULE
+ File = "PfatPubKeysAndBuildPSL.mak"
+End
+
+TOKEN
+ Name = "PFATCRYPTCON"
+ Value = "$(PFATPUB_DIR)\PfatCryptoCon.exe"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "KEYGEN"
+ Value = "$(PFATPUB_DIR)\Keygen.exe"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\PfatPubKey.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+End
+
+TOKEN
+ Name = "PfatMaxSectionSize"
+ Help = "Mega Byte is a unit of section size"
+ Value = "0x100000"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "BIOSStartingAddress"
+ Help = ""
+ Value = "0xFFFFFFFF - $(FLASH_SIZE) + 1"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FV_NvRamStartingAddress"
+ Help = "ROM address"
+ Value = "$(NVRAM_ADDRESS) - $(BIOSStartingAddress)"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FV_NvRamLength"
+ Help = "ROM address"
+ Value = "($(NVRAM_BLOCKS)*$(FLASH_BLOCK_SIZE))*2"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FV_OAStartingAddress"
+ Help = "ROM address"
+ Value = "$(OEM_ACTIVATION_TABLE_ADDRESS) - $(BIOSStartingAddress)"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "OEM_ACTIVATION_TABLE_LOCATION" "=" "1"
+End
+
+TOKEN
+ Name = "FV_OA_Length"
+ Help = "ROM address"
+ Value = "$(OEM_ACTIVATION_TABLE_SIZE)"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "OEM_ACTIVATION_TABLE_LOCATION" "=" "1"
+End
+
+TOKEN
+ Name = "FV_DataStartingAddress"
+ Help = "ROM address"
+ Value = "$(FV_DATA_BASE) - $(BIOSStartingAddress)"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FV_DataLength"
+ Help = "ROM address"
+ Value = "$(FV_DATA_SIZE)"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FV_MainStartingAddress"
+ Help = "ROM address"
+ Value = "$(FV_MAIN_BASE) - $(BIOSStartingAddress)"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FV_MainLength"
+ Help = "ROM address"
+ Value = "$(FV_MAIN_BLOCKS)*$(FLASH_BLOCK_SIZE)"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FV_BBStartingAddress"
+ Help = "ROM address"
+ Value = "$(FV_BB_BASE) - $(BIOSStartingAddress)"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FV_BBLength"
+ Help = "ROM address"
+ Value = "$(FV_BB_BLOCKS)*$(FLASH_BLOCK_SIZE)"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "BUILD_PSL_BATCH"
+ Value = "$(PFATPUB_DIR)\\BuildPSL.bat"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "FITC_OUTIMAGE_MAP"
+ Value = "$(ROM_IMAGE_DIR)\Build\OutImage.map"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "BUILD_BIOS_MAP"
+ Value = "$(PFATPUB_DIR)\BuildBIOS.map"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "BUILD_BIOS_FV_NVRAM"
+ Value = "echo BIOS_FV_NVRAM.bin /N $(FV_NvRamStartingAddress) $(FV_NvRamLength)>$(BUILD_BIOS_MAP)"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "BUILD_BIOS_FV_OA"
+ Value = "echo BIOS_FV_OA.bin /OA $(FV_OAStartingAddress) $(FV_OA_Length)>>$(BUILD_BIOS_MAP)"
+ TokenType = Expression
+ TargetMAK = Yes
+ Token = "OEM_ACTIVATION_TABLE_LOCATION" "=" "1"
+End
+
+TOKEN
+ Name = "BUILD_BIOS_FV_DATA"
+ Value = "echo BIOS_FV_DATA.bin /DATA $(FV_DataStartingAddress) $(FV_DataLength)>>$(BUILD_BIOS_MAP)"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "BUILD_BIOS_FV_MAIN"
+ Value = "echo BIOS_FV_MAIN.bin /P $(FV_MainStartingAddress) $(FV_MainLength)>>$(BUILD_BIOS_MAP)"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "BUILD_BIOS_FV_BB"
+ Value = "echo BIOS_FV_BB.bin /B $(FV_BBStartingAddress) $(FV_BBLength)>>$(BUILD_BIOS_MAP)"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "BUILD_BIOS_MAP_SET"
+ Value = "$(BUILD_BIOS_FV_NVRAM) && $(BUILD_BIOS_FV_MAIN) && $(BUILD_BIOS_FV_DATA) && $(BUILD_BIOS_FV_BB)"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "BUILD_BIOS_MAP_SET"
+ Value = "$(BUILD_BIOS_FV_NVRAM) && $(BUILD_BIOS_FV_OA) && $(BUILD_BIOS_FV_MAIN) && $(BUILD_BIOS_FV_DATA) && $(BUILD_BIOS_FV_BB)"
+ TokenType = Expression
+ TargetMAK = Yes
+ Token = "OEM_ACTIVATION_TABLE_LOCATION" "=" "1"
+End
+
+TOKEN
+ Name = "BUILD_PSL_SET"
+ Value = "$(BUILD_PSL_BATCH) $(FITC_OUTIMAGE_MAP) $(BUILD_BIOS_MAP) $(PFATPUB_DIR) $(BIOS_SVN) $(PfatMaxSectionSize)"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+PATH
+ Name = "PFATPUB_DIR"
+End
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+
diff --git a/Board/EM/Pfat/PfatPubKeysAndBuildPSL/dummy.bin b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/dummy.bin
new file mode 100644
index 0000000..9613d45
--- /dev/null
+++ b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/dummy.bin
@@ -0,0 +1 @@
+«Ê¼«Ê¼«Ê¼«Ê¼«Ê¼«Ê¼«Ê¼«Ê¼«Ê¼«Ê¼«Ê¼«Ê¼«Ê¼«Ê¼«Ê«Ê¼« \ No newline at end of file
diff --git a/Board/EM/Pfat/PfatPubKeysAndBuildPSL/keygen.exe b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/keygen.exe
new file mode 100644
index 0000000..e81033b
--- /dev/null
+++ b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/keygen.exe
Binary files differ
diff --git a/Board/EM/Pfat/PfatPubKeysAndBuildPSL/psl2bin.exe b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/psl2bin.exe
new file mode 100644
index 0000000..b095917
--- /dev/null
+++ b/Board/EM/Pfat/PfatPubKeysAndBuildPSL/psl2bin.exe
Binary files differ
diff --git a/Board/EM/Pfat/PfatRecovery/PfatRecovery.c b/Board/EM/Pfat/PfatRecovery/PfatRecovery.c
new file mode 100644
index 0000000..590b70d
--- /dev/null
+++ b/Board/EM/Pfat/PfatRecovery/PfatRecovery.c
@@ -0,0 +1,287 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatRecovery/PfatRecovery.c 1 4/05/13 5:36p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/05/13 5:36p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatRecovery/PfatRecovery.c $
+//
+// 1 4/05/13 5:36p Fredericko
+// [TAG] EIP119706
+// [Category] Improvement
+// [Description] Support Recovery in pfat module
+// [Files] PfatRecovery.cif
+// PfatRecovery.sdl
+// PfatRecovery.mak
+// PfatRecovery.dxs
+// PfatRecovery.c
+// PfatRecoveryHook.c
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name:
+//
+// Description:
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+//----------------------------------------------------------------------------
+// Includes
+// Statements that include other files
+#include <PEI.h>
+#include <AmiPeiLib.h>
+#include <token.h>
+#include <PPI\stall.h>
+#include <PPI\DeviceRecoveryModule.h>
+#include <HOB.h>
+#include <AmiHobs.h>
+#include <PfatDefinitions.h>
+
+#define PFAT_PACKAGE_CERT 524
+//----------------------------------------------------------------------------
+// Function Externs
+
+//----------------------------------------------------------------------------
+// Local prototypes
+typedef struct
+{
+ EFI_PEI_DEVICE_RECOVERY_MODULE_PPI *pDRM_Ppi;
+ EFI_PEI_DEVICE_LOAD_RECOVERY_CAPSULE SavedLoadCapsule;
+
+} DEVICE_RECOVERY_MODULE_INFO;
+
+//----------------------------------------------------------------------------
+// Local Variables
+DEVICE_RECOVERY_MODULE_INFO gDeviceRecoveryModuleInfo[MAX_DEVICE_RECOVERY_MODULE];
+
+
+//----------------------------------------------------------------------------
+// Function Definitions
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: FindAvailableMemory
+//
+// Description:
+//
+// Input:
+// IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output:
+// EFI_PHYSICAL_ADDRESS
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_PHYSICAL_ADDRESS
+FindAvailableMemory (
+ IN EFI_PEI_SERVICES **PeiServices
+)
+{
+ VOID *p;
+ UINT8 i;
+ EFI_PHYSICAL_ADDRESS TopOfMemory = 0xffffffff;
+
+ for ((*PeiServices)->GetHobList(PeiServices, &p), i = 0; \
+ !(FindNextHobByType(EFI_HOB_TYPE_MEMORY_ALLOCATION, &p)); i++) {
+ if (TopOfMemory > ((EFI_HOB_MEMORY_ALLOCATION*)p)->AllocDescriptor.MemoryBaseAddress)
+ TopOfMemory = ((EFI_HOB_MEMORY_ALLOCATION*)p)->AllocDescriptor.MemoryBaseAddress;
+ }
+ return (TopOfMemory - (PFAT_RECOVERY_IMAGE_SIZE & 0xFFF00000));
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: PfatRecoveryFileLoaded
+//
+// Description: Call this function at end of Pei. This currently
+// check recovery file.
+//
+// Input:
+// IN EFI_PEI_SERVICES **PeiServices,
+// IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
+// IN VOID *Ppi
+//
+//
+// Output:
+// EFI_STATUS
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS PfatRecoveryFileLoaded (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN RECOVERY_IMAGE_HOB *RecoveryHob
+)
+{
+ UINT8 *p;
+ UINT32 i = 0, j = 0;
+ PUP_HEADER *PupHdr;
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS Buffer = NULL;
+ EFI_BOOT_MODE BootMode;
+ UINT8 pAmiPfatSign[] = "_AMIPFAT";
+ EFI_GUID PfatHobGuid = PFAT_HOB_GUID;
+ PFAT_HOB *PfatHob;
+
+ Status = (*PeiServices)->GetBootMode(PeiServices, &BootMode);
+ if ((EFI_ERROR(Status)) || (BootMode != BOOT_IN_RECOVERY_MODE))
+ return EFI_SUCCESS;
+
+ // To avoid out of memory resource with AllocatePages in PEI phase, find
+ // out the top of available memory to re-collate rom image w/o PAT headers.
+ Buffer = FindAvailableMemory(PeiServices);
+
+ p = (UINT8*)RecoveryHob->Address;
+
+ // Verify AMIPFAT Header.
+ if (MemCmp (p + 8, pAmiPfatSign, 8)) return Status;
+
+ i = *(UINT32*)p;
+ PupHdr = (PUP_HEADER*)(p + i);
+ do {
+ // skip ScriptSection and PUP Header
+ i += (PupHdr->ScriptSectionSize + sizeof(PUP_HEADER));
+ // collect DataSection only to buffer.
+ (*PeiServices)->CopyMem ((UINT8*)Buffer + j, \
+ (UINT8*)p + i, PupHdr->DataSectionSize);
+ // pointer to next PUP block.
+ i += (PupHdr->DataSectionSize + PFAT_PACKAGE_CERT);
+ j += PupHdr->DataSectionSize;
+ PupHdr = (PUP_HEADER*)(p + i);
+
+ } while (i < PFAT_RECOVERY_IMAGE_SIZE);
+
+ // Skip ME Region if needed (j = Original image size).
+ (*PeiServices)->CopyMem ((UINT8*)RecoveryHob->Address, \
+ (UINT8*)Buffer + (j - FLASH_SIZE), \
+ FLASH_SIZE );
+
+ // Invalidate PfatHob for disabling PFAT during DXE.
+ (*PeiServices)->GetHobList(PeiServices, &PfatHob);
+ Status = FindNextHobByGuid(&PfatHobGuid, &PfatHob);
+ if(!EFI_ERROR(Status)) {
+ PfatHob->EfiHobGuidType.Header.HobType = EFI_HOB_TYPE_UNUSED;
+ }
+ return EFI_SUCCESS;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: LoadRecoveryCapsuleHook
+//
+// Description:
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+// IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
+//
+// Output: EFI_STATUS
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+LoadRecoveryCapsuleHook (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_DEVICE_RECOVERY_MODULE_PPI *This,
+ IN UINTN CapsuleInstance,
+ OUT VOID *Buffer )
+{
+ UINT8 i = 0;
+ RECOVERY_IMAGE_HOB RecoveryHob;
+ EFI_STATUS Status;
+
+ // All the LoadRecoveryCapsule calls come here
+ for (i = 0; gDeviceRecoveryModuleInfo[i].pDRM_Ppi != NULL; i++) {
+ // Check "This" for identfiy the LoadRecoveryCapsule call.
+ if (This != gDeviceRecoveryModuleInfo[i].pDRM_Ppi) continue;
+
+ // Invoke the Original LoadRecoveryCapsule procedure
+ Status = gDeviceRecoveryModuleInfo[i].SavedLoadCapsule ( \
+ PeiServices, This, CapsuleInstance, Buffer );
+ if (EFI_ERROR(Status)) return Status;
+
+ // Recovery image loaded, check if PFAT image then reconstruct the
+ // BIOS image.
+ RecoveryHob.Address = (EFI_PHYSICAL_ADDRESS)Buffer;
+ Status = PfatRecoveryFileLoaded (PeiServices, &RecoveryHob);
+ break;
+ }
+ return EFI_SUCCESS;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: PfatRecoveryEntry
+//
+// Description:
+//
+// Input: EFI_HANDLE - ImageHandle
+// EFI_SYSTEM_TABLE* - SystemTable
+//
+// Output: EFI_STATUS
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+PfatRecoveryEntry (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+)
+{
+ UINTN i = 0;
+ EFI_STATUS Status;
+ EFI_PEI_DEVICE_RECOVERY_MODULE_PPI *pRecoveryDevice;
+ EFI_GUID guidRecoveryDevice = EFI_PEI_DEVICE_RECOVERY_MODULE_PPI_GUID;
+ EFI_PEI_PPI_DESCRIPTOR *pDummy;
+
+ // Initialize gDeviceRecoveryModuleInfo structure
+ for(i = 0; i < MAX_DEVICE_RECOVERY_MODULE; i++) {
+ gDeviceRecoveryModuleInfo[i].pDRM_Ppi = NULL;
+ gDeviceRecoveryModuleInfo[i].SavedLoadCapsule = NULL;
+ }
+ i = 0;
+ do {
+ // Discover the Device Recovery Module PPIs for hooking the
+ // LoadRecoveryCapule procedure.
+ Status = (*PeiServices)->LocatePpi(PeiServices, \
+ &guidRecoveryDevice, i, &pDummy, &pRecoveryDevice);
+ if (!EFI_ERROR(Status)) {
+ // Save Ppi pointer and LoadRecoveryCapsule procedure for Hook used.
+ gDeviceRecoveryModuleInfo[i].pDRM_Ppi = pRecoveryDevice;
+ gDeviceRecoveryModuleInfo[i++].SavedLoadCapsule = pRecoveryDevice->LoadRecoveryCapsule;
+ // Hook the LaodRecoveryCapsule procedure.
+ pRecoveryDevice->LoadRecoveryCapsule = LoadRecoveryCapsuleHook;
+ }
+ } while(!EFI_ERROR(Status));
+ return EFI_SUCCESS;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Pfat/PfatRecovery/PfatRecovery.cif b/Board/EM/Pfat/PfatRecovery/PfatRecovery.cif
new file mode 100644
index 0000000..263e558
--- /dev/null
+++ b/Board/EM/Pfat/PfatRecovery/PfatRecovery.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "PfatRecovery"
+ category = ModulePart
+ LocalRoot = "Board\EM\Pfat\PfatRecovery"
+ RefName = "PfatRecovery"
+[files]
+"PfatRecovery.sdl"
+"PfatRecovery.mak"
+"PfatRecovery.dxs"
+"PfatRecovery.c"
+"PfatRecoveryHook.c"
+<endComponent>
diff --git a/Board/EM/Pfat/PfatRecovery/PfatRecovery.dxs b/Board/EM/Pfat/PfatRecovery/PfatRecovery.dxs
new file mode 100644
index 0000000..3c9e8b5
--- /dev/null
+++ b/Board/EM/Pfat/PfatRecovery/PfatRecovery.dxs
@@ -0,0 +1,58 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatRecovery/PfatRecovery.dxs 1 4/05/13 5:36p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/05/13 5:36p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatRecovery/PfatRecovery.dxs $
+//
+// 1 4/05/13 5:36p Fredericko
+// [TAG] EIP119706
+// [Category] Improvement
+// [Description] Support Recovery in pfat module
+// [Files] PfatRecovery.cif
+// PfatRecovery.sdl
+// PfatRecovery.mak
+// PfatRecovery.dxs
+// PfatRecovery.c
+// PfatRecoveryHook.c
+//
+//
+//**********************************************************************
+#include <PEI.h>
+#include <PPI\RecoveryModule.h>
+
+DEPENDENCY_START
+ EFI_PEI_BOOT_IN_RECOVERY_MODE_PEIM_PPI AND
+ EFI_PEI_RECOVERY_MODULE_PPI_GUID
+DEPENDENCY_END
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Pfat/PfatRecovery/PfatRecovery.mak b/Board/EM/Pfat/PfatRecovery/PfatRecovery.mak
new file mode 100644
index 0000000..ebded82
--- /dev/null
+++ b/Board/EM/Pfat/PfatRecovery/PfatRecovery.mak
@@ -0,0 +1,113 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatRecovery/PfatRecovery.mak 1 4/05/13 5:36p Fredericko $
+#
+# $Revision: 1 $
+#
+# $Date: 4/05/13 5:36p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatRecovery/PfatRecovery.mak $
+#
+# 1 4/05/13 5:36p Fredericko
+# [TAG] EIP119706
+# [Category] Improvement
+# [Description] Support Recovery in pfat module
+# [Files] PfatRecovery.cif
+# PfatRecovery.sdl
+# PfatRecovery.mak
+# PfatRecovery.dxs
+# PfatRecovery.c
+# PfatRecoveryHook.c
+#
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: PfatRecovery.mak
+#
+# Description: Make file for PfatRecovery module part
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all : PfatRecovery
+
+PFAT_RECOVERY_BUILD_DIR = $(BUILD_DIR)\$(PFAT_RECOVERY_PATH)
+#---------------------------------------------------------------------------
+# Create Fault Tolerant BootBlock Update dependencies
+#---------------------------------------------------------------------------
+$(BUILD_DIR)\PfatRecovery.mak : $(PFAT_RECOVERY_PATH)\$(@B).cif $(PFAT_RECOVERY_PATH)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(PFAT_RECOVERY_PATH)\$(@B).cif $(CIF2MAK_DEFAULTS)
+#---------------------------------------------------------------------------
+# Create Fault Tolerant BootBlock Update DXE Component
+#---------------------------------------------------------------------------
+PfatRecovery: $(BUILD_DIR)\PfatRecovery.mak PfatRecoveryBin
+
+PfatRecoveryIncludes =\
+/I$(PROJECT_CPU_ROOT)\Include
+
+PfatRecoveryObjs = \
+$(PFAT_RECOVERY_BUILD_DIR)\PfatRecovery.obj
+
+PfatRecoveryBin : $(AMIPEILIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\PfatRecovery.mak all\
+ OBJECTS="$(PfatRecoveryObjs)" \
+ NAME=PfatRecovery\
+ MAKEFILE=$(BUILD_DIR)\PfatRecovery.mak \
+ "CFLAGS=$(CFLAGS) $(PfatRecoveryIncludes)"\
+ GUID=c2bcc635-779e-46f0-9e1b-b83db1ca4690 \
+ ENTRY_POINT=PfatRecoveryEntry \
+ TYPE=PEIM \
+ DEPEX1=$(PFAT_RECOVERY_PATH)\PfatRecovery.DXS \
+ DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX \
+ COMPRESS=1
+
+#---------------------------------------------------------------------------
+# Create Launch SCLEAN Pei Component
+#---------------------------------------------------------------------------
+PfatRecoveryHook : $(BUILD_DIR)\PfatRecovery.mak PfatRecoveryHookBin
+
+PfatRecoveryHookObjs = \
+$(PFAT_RECOVERY_BUILD_DIR)\PfatRecoveryHook.obj
+
+PfatRecoveryHookBin :
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\PfatRecovery.mak all\
+ OBJECTS="$(PfatRecoveryHookObjs)" \
+ NAME=PfatRecovery \
+ TYPE=PEI_LIBRARY LIBRARY_NAME=$(PfatRecoveryPeiLib)
+
+$(PfatRecoveryPeiLib) : PfatRecoveryHook
+
+RecoveryBin : $(PfatRecoveryPeiLib)
+FwCapsuleRecoveryPPIBin : $(PfatRecoveryPeiLib)
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Pfat/PfatRecovery/PfatRecovery.sdl b/Board/EM/Pfat/PfatRecovery/PfatRecovery.sdl
new file mode 100644
index 0000000..a12b5e2
--- /dev/null
+++ b/Board/EM/Pfat/PfatRecovery/PfatRecovery.sdl
@@ -0,0 +1,169 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatRecovery/PfatRecovery.sdl 3 7/15/13 8:17p Fredericko $
+#
+# $Revision: 3 $
+#
+# $Date: 7/15/13 8:17p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatRecovery/PfatRecovery.sdl $
+#
+# 3 7/15/13 8:17p Fredericko
+# EIP 124189: Secure Flash failure with Pfat
+#
+# 2 5/29/13 5:44p Fredericko
+# [TAG] EIP124189
+# [Description] [PFAT] Secure Flash is fail using
+# 4.6.5.1_INTEL_PFAT_2_6 or 2_7
+# [Files] PfatPubKeysAndBuildPsl.sdl
+# Pfatrecovery.sdl
+# PfatRecoveryHook.c
+# Recovery.mak
+#
+# 1 4/05/13 5:36p Fredericko
+# [TAG] EIP119706
+# [Category] Improvement
+# [Description] Support Recovery in pfat module
+# [Files] PfatRecovery.cif
+# PfatRecovery.sdl
+# PfatRecovery.mak
+# PfatRecovery.dxs
+# PfatRecovery.c
+# PfatRecoveryHook.c
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: PfatSetup.sdl
+#
+# Description: SDL file for PfatSetup
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "PFAT_RECOVERY_SUPPORT"
+ Value = "1"
+ Help = ""
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Token = "PfatServices_SUPPORT" "=" "1"
+End
+
+PATH
+ Name = "PFAT_RECOVERY_PATH"
+End
+
+MODULE
+ Help = "Includes PfatRecovery.mak to Project"
+ File = "PfatRecovery.mak"
+End
+
+TOKEN
+ Name = "MAX_DEVICE_RECOVERY_MODULE"
+ Value = "8"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PFAT_RECOVERY_FILE"
+ Value = "AMIPFAT.BIN"
+ TokenType = Expression
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PFAT_RECOVERY_IMAGE_SIZE"
+ Value = "0xFF4CE0"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PFAT_RECOVERY_IMAGE_SIZE"
+ Value = "0x10050c5"
+ TokenType = Integer
+ TargetH = Yes
+ Token = "OEM_ACTIVATION_TABLE_LOCATION" "=" "1"
+End
+
+TOKEN
+ Name = "PfatRecoveryPeiLib"
+ Value = "$(BUILD_DIR)\PfatRecoveryPeiLib.lib"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+#-ELINK
+#- Name = "$(BUILD_DIR)\PfatRecoveryPeiLib.lib"
+#- Parent = "AMIPEILIB"
+#- InvokeOrder = AfterParent
+#-End
+
+ELINK
+ Name = "$(BUILD_DIR)\PfatRecovery.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+End
+
+TOKEN
+ Name = "FwCapsuleInfo_enable"
+ Value = "0"
+ TokenType = Boolean
+End
+
+TOKEN
+ Name = "FwCapsuleInfo_enable"
+ Value = "1"
+ TokenType = Boolean
+ Token = "SecureMod_SUPPORT" "=" "1"
+End
+
+ELINK
+ Name = "PfatRecoveryFileInfo"
+ Parent = "AmiGetRecoveryFileInfo"
+ InvokeOrder = ReplaceParent
+ Token = "FwCapsuleInfo_enable" "=" "0"
+End
+
+ELINK
+ Name = "PfatImageInfo"
+ Parent = "FwCapsuleInfo"
+ InvokeOrder = ReplaceParent
+ Token = "FwCapsuleInfo_enable" "=" "1"
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Pfat/PfatRecovery/PfatRecoveryHook.c b/Board/EM/Pfat/PfatRecovery/PfatRecoveryHook.c
new file mode 100644
index 0000000..e0a0bbe
--- /dev/null
+++ b/Board/EM/Pfat/PfatRecovery/PfatRecoveryHook.c
@@ -0,0 +1,187 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatRecovery/PfatRecoveryHook.c 2 5/29/13 5:45p Fredericko $
+//
+// $Revision: 2 $
+//
+// $Date: 5/29/13 5:45p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatRecovery/PfatRecoveryHook.c $
+//
+// 2 5/29/13 5:45p Fredericko
+// [TAG] EIP124189
+// [Description] [PFAT] Secure Flash is fail using
+// 4.6.5.1_INTEL_PFAT_2_6 or 2_7
+// [Files] PfatPubKeysAndBuildPsl.sdl
+// Pfatrecovery.sdl
+// PfatRecoveryHook.c
+// Recovery.mak
+//
+// 1 4/05/13 5:37p Fredericko
+// [TAG] EIP119706
+// [Category] Improvement
+// [Description] Support Recovery in pfat module
+// [Files] PfatRecovery.cif
+// PfatRecovery.sdl
+// PfatRecovery.mak
+// PfatRecovery.dxs
+// PfatRecovery.c
+// PfatRecoveryHook.c
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------
+//
+// Name:
+//
+// Description:
+//
+//----------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+//----------------------------------------------------------------------------
+// Includes
+#include <AmiPeiLib.h>
+#include <token.h>
+#include <Setup.h>
+#include <ppi\ReadOnlyVariable.h>
+
+// Statements that include other files
+
+//----------------------------------------------------------------------------
+// Function Externs
+
+//----------------------------------------------------------------------------
+// Local prototypes
+#if defined(SecFlashUpd_SUPPORT) && SecFlashUpd_SUPPORT == 1
+EFI_STATUS
+FwCapsuleInfo (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN OUT VOID **pCapsuleName,
+ IN OUT UINTN *pCapsuleSize,
+ OUT BOOLEAN *ExtendedVerification
+);
+#else
+AmiGetRecoveryFileInfo (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN OUT VOID **pCapsuleName,
+ IN OUT UINTN *pCapsuleSize,
+ OUT BOOLEAN *ExtendedVerification
+);
+#endif
+
+//----------------------------------------------------------------------------
+
+//----------------------------------------------------------------------------
+// Local Variables
+const char *RecoveryPfatFileName = CONVERT_TO_STRING(PFAT_RECOVERY_FILE);
+const UINTN RecoveryPfatImageSize = PFAT_RECOVERY_IMAGE_SIZE; // 8k should be enough to cover Sec Capsule Hdr overhead
+
+//----------------------------------------------------------------------------
+// Function Definitions
+
+//----------------------------------------------------------------------------
+// Local Variables
+
+//----------------------------------------------------------------------------
+// Function Definitions
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+//
+// Procedure: PfatImageInfo
+//
+// Description:
+//
+// Input: EFI_PEI_SERVICES** PeiServices
+// VOID** pPfatImageName
+// UINTN* pPfatImageSize
+// BOOLEAN* ExtendedVerification
+//
+// Output: EFI_STATUS
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+PfatImageInfo (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN OUT VOID **pPfatImageName,
+ IN OUT UINTN *pPfatImageSize,
+ OUT BOOLEAN *ExtendedVerification
+){
+ EFI_GUID gEfiPeiReadOnlyVariablePpiGuid = EFI_PEI_READ_ONLY_VARIABLE_PPI_GUID;
+ EFI_PEI_READ_ONLY_VARIABLE_PPI *ReadOnlyVar = NULL;
+ EFI_GUID SetupGuid = SETUP_GUID;
+ UINTN VariableSize= sizeof (SETUP_DATA);
+ SETUP_DATA SetupData;
+ EFI_STATUS Status;
+
+ Status = (*PeiServices)->LocatePpi ( PeiServices, \
+ &gEfiPeiReadOnlyVariablePpiGuid, \
+ 0, \
+ NULL, \
+ &ReadOnlyVar );
+ if ( !EFI_ERROR(Status) ) {
+ Status = ReadOnlyVar->GetVariable (
+ PeiServices,
+ L"Setup",
+ &SetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData
+ );
+ if ( EFI_ERROR( Status ) ) {
+ return Status;
+ }
+ } else {
+ return Status;
+ }
+
+ if ( SetupData.Pfatstate == 0 ) {
+#if defined(SecFlashUpd_SUPPORT) && SecFlashUpd_SUPPORT == 1
+ Status = FwCapsuleInfo(PeiServices, pPfatImageName, pPfatImageSize, ExtendedVerification);
+#else
+ Status = AmiGetRecoveryFileInfo(PeiServices, pPfatImageName, pPfatImageSize, ExtendedVerification);
+#endif
+ return Status;
+ } else {
+ if(!pPfatImageName && !pPfatImageSize && !ExtendedVerification )
+ return EFI_UNSUPPORTED;
+
+ if(ExtendedVerification != NULL)
+ *ExtendedVerification = FALSE;
+
+ *pPfatImageSize = RecoveryPfatImageSize;
+ *pPfatImageName = (VOID*)RecoveryPfatFileName;
+ }
+ return EFI_SUCCESS;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Pfat/PfatSetup/PfatSetup.cif b/Board/EM/Pfat/PfatSetup/PfatSetup.cif
new file mode 100644
index 0000000..4f8c466
--- /dev/null
+++ b/Board/EM/Pfat/PfatSetup/PfatSetup.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "PfatSetup"
+ category = ModulePart
+ LocalRoot = "Board\EM\Pfat\PfatSetup"
+ RefName = "PfatSetup"
+[files]
+"PfatSetup.sd"
+"PfatSetup.uni"
+"PfatSetup.sdl"
+"PfatSetup.mak"
+<endComponent>
diff --git a/Board/EM/Pfat/PfatSetup/PfatSetup.mak b/Board/EM/Pfat/PfatSetup/PfatSetup.mak
new file mode 100644
index 0000000..a1936f1
--- /dev/null
+++ b/Board/EM/Pfat/PfatSetup/PfatSetup.mak
@@ -0,0 +1,69 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatSetup/PfatSetup.mak 1 9/17/12 4:49p Fredericko $
+#
+# $Revision: 1 $
+#
+# $Date: 9/17/12 4:49p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatSetup/PfatSetup.mak $
+#
+# 1 9/17/12 4:49p Fredericko
+# Added PfatSetup Module-part
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: PfatSetup.mak
+#
+# Description: Make file for PfatSetup module part
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all : PfatSetupSDB
+
+#---------------------------------------------------------------------------
+# Generic AcpiPlatform dependencies
+#---------------------------------------------------------------------------
+$(BUILD_DIR)\PfatSetup.mak : $(PFAT_SETUP_PATH)\PfatSetup.cif $(BUILD_RULES)
+ $(CIF2MAK) $(PFAT_SETUP_PATH)\PfatSetup.cif $(CIF2MAK_DEFAULTS)
+
+#---------------------------------------------------------------------------
+# Create PfatSetup Setup Screens
+#---------------------------------------------------------------------------
+SetupSdbs : $(BUILD_DIR)\PfatSetup.mak PfatSetupSDB
+
+PfatSetupSDB :
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\PfatSetup.mak all \
+ TYPE=SDB NAME=PfatSetup STRING_CONSUMERS=$(PFAT_SETUP_PATH)\PfatSetup.sd
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Pfat/PfatSetup/PfatSetup.sd b/Board/EM/Pfat/PfatSetup/PfatSetup.sd
new file mode 100644
index 0000000..a610378
--- /dev/null
+++ b/Board/EM/Pfat/PfatSetup/PfatSetup.sd
@@ -0,0 +1,119 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatSetup/PfatSetup.sd 1 9/17/12 4:49p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 9/17/12 4:49p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatSetup/PfatSetup.sd $
+//
+// 1 9/17/12 4:49p Fredericko
+// Added PfatSetup Module-part
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: PfatSetup.sd
+//
+// Description: Create the setup item for PFAT.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifdef SETUP_DATA_DEFINITION
+//---------------------------------------------------------------------------
+// Put NVRAM data definitions here.
+// For example: UINT8 Data1;
+// These definitions will be converted by the build process
+// to a definitions of SETUP_DATA fields.
+//---------------------------------------------------------------------------
+ UINT8 Pfatstate;
+#endif
+
+#if defined(VFRCOMPILE) && !defined(CONTROLS_ARE_DEFINED)
+#define CONTROL_DEFINITION
+#endif
+//---------------------------------------------------------------------------
+
+//---------------------------------------------------------------------------
+#ifdef CONTROL_DEFINITION
+
+#define PFAT_ONEOF_STATEENABLE\
+ oneof varid = SETUP_DATA.Pfatstate,\
+ prompt = STRING_TOKEN(STR_PFAT_CONFIGURATION_PROMPT),\
+ help = STRING_TOKEN(STR_PFAT_CONFIGURATION_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#endif // CONTROL_DEFINITION
+
+#ifdef CONTROLS_WITH_DEFAULTS
+ PFAT_ONEOF_STATEENABLE
+#endif // CONTROLS_WITH_DEFAULTS
+
+//---------------------------------------------------------------------------
+// ADVANCED - CRB Configuration Form
+//---------------------------------------------------------------------------
+#ifdef ADVANCED_FORM_SET
+
+ #ifndef SUPPRESS_GRAYOUT_ENDIF //old Core
+ #define SUPPRESS_GRAYOUT_ENDIF endif;
+ #endif
+
+ #ifdef FORM_SET_GOTO
+ // Define goto commands for the forms defined in this file
+ goto PFAT_CONFIGURATION_FORM_ID,
+ prompt = STRING_TOKEN(STR_PFAT_CONFIGURATION_FORM),
+ help = STRING_TOKEN(STR_PFAT_CONFIGURATION_HELP);
+ #endif
+
+ #ifdef FORM_SET_FORM
+ // Define forms
+ #ifndef PFAT_CONFIGURATION_FORM_SETUP
+ #define PFAT_CONFIGURATION_FORM_SETUP
+
+ form formid = AUTO_ID(PFAT_CONFIGURATION_FORM_ID),
+ title = STRING_TOKEN(STR_PFAT_CONFIGURATION_FORM);
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ PFAT_ONEOF_STATEENABLE
+ endif;
+
+ endform; // PFAT_FORM_ID
+
+ #endif // PFAT_CONFIGURATION_FORM_SETUP
+ #endif // FORM_SET_FORM
+
+#endif // ADVANCED_FORM_SET
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Pfat/PfatSetup/PfatSetup.sdl b/Board/EM/Pfat/PfatSetup/PfatSetup.sdl
new file mode 100644
index 0000000..7c42e9a
--- /dev/null
+++ b/Board/EM/Pfat/PfatSetup/PfatSetup.sdl
@@ -0,0 +1,85 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatSetup/PfatSetup.sdl 1 9/17/12 4:49p Fredericko $
+#
+# $Revision: 1 $
+#
+# $Date: 9/17/12 4:49p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelPfat/PfatSetup/PfatSetup.sdl $
+#
+# 1 9/17/12 4:49p Fredericko
+# Added PfatSetup Module-part
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: PfatSetup.sdl
+#
+# Description: SDL file for PfatSetup
+#
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "PFAT_SETUP_SUPPORT"
+ Value = "1"
+ Help = "Always On Always Connected"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "PFAT_SETUP_PATH"
+End
+
+MODULE
+ Help = "Includes PfatSetup.mak to Project"
+ File = "PfatSetup.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\PfatSetup.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 40
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(PFAT_SETUP_PATH)\PfatSetup.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 40
+ InvokeOrder = AfterParent
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Pfat/PfatSetup/PfatSetup.uni b/Board/EM/Pfat/PfatSetup/PfatSetup.uni
new file mode 100644
index 0000000..f325289
--- /dev/null
+++ b/Board/EM/Pfat/PfatSetup/PfatSetup.uni
Binary files differ
diff --git a/Board/EM/Platform/AcpiAslWrap/AcpiAslWrap.cif b/Board/EM/Platform/AcpiAslWrap/AcpiAslWrap.cif
new file mode 100644
index 0000000..5cd5058
--- /dev/null
+++ b/Board/EM/Platform/AcpiAslWrap/AcpiAslWrap.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "AcpiAslWrap"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\AcpiAslWrap\"
+ RefName = "AcpiAslWrap"
+[files]
+"AcpiAslWrap.sdl"
+"PlatformPS2Wake.asl"
+"PlatformEC.asl"
+"PlatformDock.asl"
+"PlatformExternal.asl"
+<endComponent>
diff --git a/Board/EM/Platform/AcpiAslWrap/AcpiAslWrap.sdl b/Board/EM/Platform/AcpiAslWrap/AcpiAslWrap.sdl
new file mode 100644
index 0000000..1040bc2
--- /dev/null
+++ b/Board/EM/Platform/AcpiAslWrap/AcpiAslWrap.sdl
@@ -0,0 +1,50 @@
+TOKEN
+ Name = "AcpiAslWrap_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable Ref code AcpiAsl Wrap support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "AcpiAslWrap_DIR"
+End
+
+ELINK
+ Name = "/I$(AcpiAslWrap_DIR)"
+ Parent = "ACPI_PLATFORM_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+#ELINK
+# Name = "$(AcpiAslWrap_DIR)\PlatformPS2Wake.ASL"
+# Parent = "INTEL_GENERIC_ASL"
+# Token = "CRB_SIO_SUPPORT" "=" "0"
+# InvokeOrder = AfterParent
+#End
+
+ELINK
+ Name = "$(AcpiAslWrap_DIR)\PlatformEC.asl"
+ Parent = "INTEL_EC_ASL"
+ Token = "PlatformAcpiTables_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(AcpiAslWrap_DIR)\PlatformDock.asl"
+ Parent = "INTEL_GENERIC_ASL"
+ InvokeOrder = AfterParent
+ Token = "FACP_FLAG_DCK_CAP" "=" "0"
+ Token = "CRB_EC_SUPPORT" "=" "1"
+End
+
+
+ELINK
+ Name = "$(AcpiAslWrap_DIR)\PlatformExternal.asl"
+ Parent = "INTEL_GENERIC_ASL"
+ InvokeOrder = AfterParent
+ Priority = 10
+End
diff --git a/Board/EM/Platform/AcpiAslWrap/PlatformDock.asl b/Board/EM/Platform/AcpiAslWrap/PlatformDock.asl
new file mode 100644
index 0000000..32558c7
--- /dev/null
+++ b/Board/EM/Platform/AcpiAslWrap/PlatformDock.asl
@@ -0,0 +1,47 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: PlatformDock.asl
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+Device (\_SB.PCI0.DOCK)
+{
+ Name(_HID, "ABCD0000")
+ Name(_CID, EISAID("PNP0C15"))
+ Name(_UID,2)
+ Method(_STA)
+ {
+ Return(0x00)
+ }
+
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/AcpiAslWrap/PlatformEC.asl b/Board/EM/Platform/AcpiAslWrap/PlatformEC.asl
new file mode 100644
index 0000000..3823368
--- /dev/null
+++ b/Board/EM/Platform/AcpiAslWrap/PlatformEC.asl
@@ -0,0 +1,206 @@
+/**************************************************************************;
+;* *;
+;* Intel Confidential *;
+;* *;
+;* Intel Corporation - ACPI Reference Code for the Sandy Bridge *;
+;* Family of Customer Reference Boards. *;
+;* *;
+;* *;
+;* Copyright (c) 1999 - 2010 Intel Corporation. All rights reserved *;
+;* This software and associated documentation (if any) is furnished *;
+;* under a license and may only be used or copied in accordance *;
+;* with the terms of the license. Except as permitted by such *;
+;* license, no part of this software or documentation may be *;
+;* reproduced, stored in a retrieval system, or transmitted in any *;
+;* form or by any means without the express written consent of *;
+;* Intel Corporation. *;
+;* *;
+;* *;
+;**************************************************************************/
+/*++
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+--*/
+
+Scope(\_SB.PCI0.LPCB)
+{
+
+Device(H_EC) // Hitachi Embedded Controller
+{
+ Name(_HID, EISAID("PNP0C09"))
+
+ Name(_UID,1)
+
+ Method(_STA)
+ {
+ Store(3, \_SB.PCI0.GFX0.CLID)
+ Return(0x00) //Hide device
+ }
+
+ Name(B1CC, 0)
+ Name(B1ST, 0)
+ Name(B2CC, 0)
+ Name(B2ST, 0)
+ Name(CFAN, 0)
+ Name(CMDR, 0)
+ Name(DOCK, 0)
+ Name(EJET, 0)
+ Name(MCAP, 0)
+ Name(PLMX, 0)
+ Name(PECH, 0)
+ Name(PECL, 0)
+ Name(PENV, 0)
+ Name(PINV, 0)
+ Name(PPSH, 0)
+ Name(PPSL, 0)
+ Name(PSTP, 0)
+ Name(RPWR, 0)
+ Name(LIDS, 0)
+ Name(LSTE, 0)
+ Name(SLPC, 0)
+ Name(VPWR, 0)
+ Name(WTMS, 0)
+ Name(AWT2, 0)
+ Name(AWT1, 0)
+ Name(AWT0, 0)
+ Name(DLED, 0)
+ Name(IBT1, 0)
+ Name(ECAV, Zero) // OS Bug Checks if EC OpRegion accessed before Embedded Controller Driver loaded
+ Name(SPT2, 0)
+ Name(PB10, 0)
+
+ // ECRD (Embedded Read Method)
+ //
+ // Handle all commands sent to EC by BIOS
+ //
+ // Arguments: (1)
+ // Arg0 - Object to Read
+ // Return Value:
+ // Read Value
+ //
+ Method(ECRD,1,Serialized, 0, IntObj, FieldUnitObj)
+ {
+ Return(DeRefOf(Arg0))
+ }
+
+ // ECWT (Embedded Write Method)
+ //
+ // Handle all commands sent to EC by BIOS
+ //
+ // Arguments: (2)
+ // Arg0 - Value to Write
+ // Arg1 - Object to Write to
+ //
+ Method(ECWT,2,Serialized,,,{IntObj, FieldUnitObj})
+ {
+ Store(Arg0,Arg1)
+ }
+
+
+ Method(ECMD,1,Serialized) // Handle all commands sent to EC by BIOS
+ {
+ If (\ECON)
+ {
+ While(\_SB.PCI0.LPCB.H_EC.CMDR){Stall(20)}
+ Store(Arg0, \_SB.PCI0.LPCB.H_EC.CMDR)
+ }
+ }
+
+ Device(BAT0)
+ {
+ Name(_HID,EISAID("PNP0C0A"))
+
+ Name(_UID,0)
+
+ Method(_STA,0)
+ {
+ Return(0) // Hide device
+ }
+ }
+
+ // Real battery code
+ //
+ Scope(\)
+ {
+ // these fields come from the Global NVS area
+ Field(GNVS,AnyAcc,Lock,Preserve)
+ {
+ Offset(30), // Battery Support Registers:
+ BNUM, 8, // (30) Battery Number Present
+ Offset(32),
+ B1SC, 8, // (32) Battery 1 Stored Capacity
+ Offset(35),
+ B1SS, 8, // (35) Battery 1 Stored Status
+ }
+ } // end Scope(\)
+
+ Device(BAT1)
+ {
+ Name(_HID,EISAID("PNP0C0A"))
+
+ Name(_UID,1)
+
+ Method(_STA,0)
+ {
+ Return(0) // Hide device
+ }
+ }
+
+ Scope(\)
+ {
+ // these fields come from the Global NVS area
+ Field(GNVS,AnyAcc,Lock,Preserve)
+ {
+ Offset(33),
+ B2SC, 8, // (33) Battery 2 Stored Capacity
+ Offset(36),
+ B2SS, 8 // (36) Battery 2 Stored Status
+ }
+ } // end Scope(\)
+ Device(BAT2)
+ {
+ Name(_HID,EISAID("PNP0C0A"))
+
+ Name(_UID,2)
+
+ Method(_STA,0)
+ {
+ Return(0) // Hide device
+ }
+ }
+
+ }
+}// end scope Scope(\_SB.PCI0.LPCB)
+ // System Bus
+
+Device (\_SB.PCI0.DOCK)
+{
+ Name(_HID, "ABCD0000")
+ Name(_CID, EISAID("PNP0C15"))
+ Name(_UID,2)
+ Method(_STA)
+ {
+ Return(0x00)
+ }
+
+}
+Scope(\_SB)
+{
+
+ // Define a Lid Switch.
+
+ Device(LID0)
+ {
+ Name(_HID,EISAID("PNP0C0D"))
+
+ Method(_STA)
+ {
+ Return(0x00)
+ }
+
+ }
+}//end scope _SB
+
+
diff --git a/Board/EM/Platform/AcpiAslWrap/PlatformExternal.asl b/Board/EM/Platform/AcpiAslWrap/PlatformExternal.asl
new file mode 100644
index 0000000..b83720e
--- /dev/null
+++ b/Board/EM/Platform/AcpiAslWrap/PlatformExternal.asl
@@ -0,0 +1,69 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: PlatformExternal.asl
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#if !defined(ASL_Remove_SaSsdt_Data_To_Dsdt) || (ASL_Remove_SaSsdt_Data_To_Dsdt == 0)
+External(LHIH)
+External(LLOW)
+External(IGDS)
+External(LIDS)
+External(BRTL)
+External(ALSE)
+External(GSMI)
+External(\_SB.PCI0.GFX0.ALSI)
+External(\_SB.PCI0.GFX0.CDCK)
+External(\_SB.PCI0.GFX0.CBLV)
+External(\_SB.PCI0.GFX0.GSSE)
+External(\_SB.PCI0.PEG0, DeviceObj)
+External(\_SB.PCI0.PEG0.PEGP, DeviceObj)
+External(\_SB.PCI0.PEG1, DeviceObj)
+External(\_SB.PCI0.PEG2, DeviceObj)
+External(\_SB.PCI0.GFX0.DD1F, DeviceObj)
+External(\_SB.PCI0.GFX0.GDCK, MethodObj)
+External(\_SB.PCI0.GFX0.GHDS, MethodObj)
+External(\_SB.PCI0.GFX0.AINT, MethodObj)
+External(\_SB.PCI0.GFX0.GLID, MethodObj)
+External(\_SB.PCI0.GFX0.GSCI, MethodObj)
+#endif
+External(\_PR.CPU0, DeviceObj)
+External(\_PR.CPU0._PSS, MethodObj)
+External(\_PR.CPU0._PPC, IntObj)
+#if !defined(ASL_EC_SUPPORT) || (ASL_EC_SUPPORT == 0)
+#if !defined(ASL_Remove_SaSsdt_Data_To_Dsdt) || (ASL_Remove_SaSsdt_Data_To_Dsdt == 0)
+External(\_SB.PCI0.GFX0.CLID)
+External(\_SB.PCI0.GFX0.IUEH, MethodObj)
+#endif
+External(\_SB.IETM, DeviceObj)
+#endif // ASL_EC_SUPPORT
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/AcpiAslWrap/PlatformPS2Wake.asl b/Board/EM/Platform/AcpiAslWrap/PlatformPS2Wake.asl
new file mode 100644
index 0000000..7f71d5f
--- /dev/null
+++ b/Board/EM/Platform/AcpiAslWrap/PlatformPS2Wake.asl
@@ -0,0 +1,47 @@
+/**************************************************************************;
+;* *;
+;* Intel Confidential *;
+;* *;
+;* Intel Corporation - ACPI Reference Code for the Sandy Bridge *;
+;* Family of Customer Reference Boards. *;
+;* *;
+;* *;
+;* Copyright (c) 1999 - 2010 Intel Corporation. All rights reserved *;
+;* This software and associated documentation (if any) is furnished *;
+;* under a license and may only be used or copied in accordance *;
+;* with the terms of the license. Except as permitted by such *;
+;* license, no part of this software or documentation may be *;
+;* reproduced, stored in a retrieval system, or transmitted in any *;
+;* form or by any means without the express written consent of *;
+;* Intel Corporation. *;
+;* *;
+;* *;
+;**************************************************************************/
+/*++
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+--*/
+
+Scope(\_SB)
+{
+ Device(PWRB)
+ {
+ Name(_HID,EISAID("PNP0C0C"))
+
+ // GPI14 = GPE30 = Waketime SCI. The PRW isn't working when
+ // placed in any of the logical locations ( PS2K, PS2M,
+ // H_EC ), so a Power Button Device was created specifically
+ // for the WAKETIME_SCI PRW.
+
+ Name(_PRW, Package(){30,4})
+
+ Method(_STA)
+ {
+ Return(0x0F)
+ }
+ }//end device PWRB
+}//end scope _SB
+
+
diff --git a/Board/EM/Platform/AcpiIntelRC.h b/Board/EM/Platform/AcpiIntelRC.h
new file mode 100644
index 0000000..72de447
--- /dev/null
+++ b/Board/EM/Platform/AcpiIntelRC.h
@@ -0,0 +1,64 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiIntelRC.h 1 2/09/12 12:31a Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/09/12 12:31a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiIntelRC.h $
+//
+// 1 2/09/12 12:31a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AcpiIntelRC.h
+//
+// Description: AcpiPlatform header file, Change ASL name
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#ifndef __ACPIINTELRC_H__
+#define __ACPIINTELRC_H__
+
+// Change name "SBRG" to "LPCB" for Intel RC
+#define SBRG LPCB
+
+
+#endif
+
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+
diff --git a/Board/EM/Platform/AcpiPlatform.c b/Board/EM/Platform/AcpiPlatform.c
new file mode 100644
index 0000000..19b8d21
--- /dev/null
+++ b/Board/EM/Platform/AcpiPlatform.c
@@ -0,0 +1,3285 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/Projects/Intel/Haswell/LynxPoint_SharkBay-DT_Crb_1AQQW/Board/EM/Platform/AcpiPlatform.c 4 4/19/16 7:43a Chienhsieh $
+//
+// $Revision: 4 $
+//
+// $Date: 4/19/16 7:43a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/Projects/Intel/Haswell/LynxPoint_SharkBay-DT_Crb_1AQQW/Board/EM/Platform/AcpiPlatform.c $
+//
+// 4 4/19/16 7:43a Chienhsieh
+//
+// 34 7/11/14 4:00a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Support Debug Port Table.
+// [Files] AcpiPlatform.c
+// AcpiPlatform.h
+// AcpiPlatform.cif
+//
+// 33 5/15/14 3:14a Joshchou
+// [TAG] EIP167036
+// [Category] Improvement
+// [Description] review the attributes of variable.
+// [Files] AcpiPlatform.c
+// AcpiPlatform.h
+// AcpiPlatform.sd
+// AcpiPlatform.cif
+//
+// 32 4/23/14 4:21a Joshchou
+//
+// 31 9/27/13 10:43a Joshchou
+// [TAG] EIP137454
+// [Category] New Feature
+// [Description] Follow Intel sample code to add LPIT table.
+//
+// 30 9/18/13 8:00a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Fix the CppCheck error.
+//
+// 29 9/18/13 6:25a Joshchou
+// [TAG] EIP136411
+// [Category] Improvement
+// [Description] Support MWAIT LPI State Descriptor[1].
+//
+// 28 7/19/13 2:57a Alanlin
+// [TAG] None
+// [Category] Important
+// [Severity] Important
+// [Description] Fixed the system may hang up when DEBUG_MODE is ON.
+// While trying to use SetAcpiTable to create LPIT table, reture status is
+// EFI_INVALID_PARAMETER.
+// [Files] AcpiPlatform.c
+//
+// 27 7/16/13 5:58a Alanlin
+// [TAG] EIP125350
+// [Category] Normal
+// [Severity] Normal
+// [Description] System BIOS Support for the Hardware Button for Windows*
+// 8.1 - Rev.0.5
+// [Files] AcpiPlatform.c, AcpiPlatform.sd, AcpiPlatform.uni
+//
+// [TAG] EIP127540
+// [Category] Normal
+// [Severity] Normal
+// [Description] Windows* 8.1 Micro-PEP (uPEP) ASL Support Version 0.5
+// [Files] AcpiPlatform.c, AcpiPlatform.h
+//
+// 26 7/15/13 5:32a Alanlin
+// [TAG] EIP129086
+// [Category] Important
+// [Severity] Important
+// [Description] Update Shark Bay Client ACPI Reference Code Beta Version
+// 1.6.1
+//
+// 25 6/28/13 5:22a Alanlin
+// [TAG] None
+// [Category] Important
+// [Severity] Important
+// [Description] Fixed that Processors device are disappeared under OS
+// device manager.
+// [Files] AcpiPlatform.c, AcpiPlatform.h
+//
+// 24 6/04/13 10:18a Alanlin
+// [TAG] None
+// [Category] Improvement
+// [Severity] Normal
+// [Description] Follow Intel CRB BIOS v126 to set default configuraton
+// setting of RTD3 devices.
+// [Files] AcpiPlatform.c, AcpiPlatform.sd, AcpiPlatform.uni
+//
+// 23 3/26/13 9:30a Alanlin
+// [TAG] EIP119125
+// [Category] Important
+// [Severity] Important
+// [Description] Update Shark Bay Client ACPI Reference Code Beta Version
+// 1.3.1
+//
+// 22 3/15/13 6:59a Alanlin
+// [TAG] None
+// [Category] Normal
+// [Severity] Normal
+// [Description] Add a "Remove_SaSsdt_Data_To_Dsdt" token, it can remove
+// related Sa Ssdt acpi data to Dsdt.
+// [Files] PlatformExternal.asl, Acpiplatform.c, EC.asl, GloblNvs.asl,
+// Gpe.asl, Video.asl.
+//
+// 21 2/21/13 1:16a Alanlin
+// [TAG] EIP114876
+// [Category] Normal
+// [Severity] Normal
+// [Description] To close Readytoboot event-function : CallbackBootScript
+//
+// 20 2/15/13 1:12a Alanlin
+// [TAG] EIP114919
+// [Category] Important
+// [Severity] Important
+// [Description] Update Shark Bay Client ACPI Reference Code Beta Version
+// 1.1.0
+//
+// 19 1/28/13 11:13p Alanlin
+// [TAG] EIP113555
+// [Category] Important
+// [Severity] Important
+// [Description] Update Shark Bay Client ACPI Reference Code Beta Version
+// 1.0.0
+//
+// 18 1/18/13 3:57a Alanlin
+//
+// 17 1/15/13 5:46a Alanlin
+// [TAG] None
+// [Category] Normal
+// [Severity] Normal
+// [Description] Add setup item and setting for DPTF
+// [Files] Acpiplatform.c, Acpiplatform.sd, Acpiplatform.uni,
+// PlatformSetup.h
+//
+// 16 12/18/12 11:02p Alanlin
+// [TAG] EIP107188
+// [Category] Important
+// [Severity] Important
+// [Description] USB 3.0 port can't work when RTD3 is Enabled in setup
+// menu.
+// [Files] Acpiplatform.c, Acpiplatform.mak, Acpiplatform.sd,
+// Acpiplatform.uni.
+//
+// 15 11/26/12 6:04a Alanlin
+// [TAG] None
+// [Category] Improvement
+// [Severity] Normal
+// [Description] Include Rtd3FFRD.asl for Haswell - FFRD SKU Board.
+// BRRtd3.asl for Haswell - Basking Ridge Board.
+// [Files] SsdtRtd3.cif, SsdtRtd3.sdl, Rtd3FFRD.asl, BRRtd3.asl,
+// Acpiplatform.c
+//
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Fixed the system has blue screen when RTD3 is Enabled.
+// [Files] SsdtZpOdd.sdl, Acpiplatform.c
+//
+// 14 11/20/12 7:08a Alanlin
+// [TAG] None
+// [Category] New Feature
+// [Severity] Important
+// [Description] SensorHub SSDT acpi table support
+// [Files] Acpiplatform.c, Acpiplatform.cif, Acpiplatform.h,
+// SsdtSensorHub.asl, SsdtSensorHub.mak, SsdtSensorHub.sdl
+//
+// [TAG] None
+// [Category] Important
+// [Severity] Important
+// [Description] Update Shark Bay Client ACPI Reference Code Beta Version
+// 0.8.0
+//
+// 13 11/09/12 5:17a Alanlin
+// [TAG] None
+// [Category] New Feature
+// [Severity] Important
+// [Description] ZpOdd SSDT acpi table support
+// [Files] Acpiplatform.c, Acpiplatform.cif, Acpiplatform.h,
+// Acpiplatform.sd, Acpiplatform.uni
+//
+// 12 10/31/12 4:38a Alanlin
+// [TAG] None
+// [Category] Improvement
+// [Severity] Normal
+// [Description] Fine tune Platform Board Information.
+//
+// [TAG] None
+// [Category] New Feature
+// [Severity] Normal
+// [Description] Support Acpi Debug SSDT.
+//
+// [TAG] None
+// [Category] Improvement
+// [Severity] Normal
+// [Description] Removed all SaGlobalNvsArea Structure, move to SA module
+// to initial.
+//
+// 11 10/15/12 11:40a Alanlin
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Updated for RC 0.7.1
+//
+// 10 9/12/12 7:20a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Remove AOAC for Intel Smart Connect Technology module.
+// [Files] GlobalNvsArea.h, GloblNvs.asl
+//
+// 9 8/31/12 4:47a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Update Board ID for Haswell platform.
+// [Files] AcpiPlatform.c, AcpiPlatform.sdl, PlatformInfo.sdl,
+// AcpiAsl.sdl
+//
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Implement Runtime D3.
+// [Files] AcpiPlatform.c, AcpiPlatform.cif, AcpiPlatform.h,
+// AcpiPlatform.sd, AcpiPlatform.sdl, AcpiPlatform.uni, GlobalNvsArea.h,
+// SsdtRtd3.cif, SsdtRtd3.mak, Ult0Rtd3.asl, SsdtRtd3.sdl
+//
+// 8 8/14/12 9:19a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Remove useless Dppm policy.
+// [Files] AcpiPlatform.c
+//
+// 7 7/27/12 5:11a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Create DPTF and CPPC setup item.
+// [Files] AcpiPlatform.c, AcpiPlatform.sd, AcpiPlatform.uni,
+// PlatformSetup.h
+//
+// 6 7/03/12 1:28a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Update Shark Bay Client ACPI Reference Code Alpha 2
+// 0.6.0.
+// [Files] ReferenceCode\AcpiTables\*.*, GlobalNvsArea.h,
+// AcpiPlatform.c, PlatformInfo.c, PlatformEC.asl
+//
+// 5 4/25/12 1:28p Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Initilize ACPI DXE Platform Policy.
+// [Files] AcpiPlatform.c, AcpiPlatform.mak
+//
+// 3 4/05/12 7:46a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Fixed building error for Intel System Agent
+// Label:"4.6.5.3_Intel_SA-RC_055_004".
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.mak,
+// AcpiPlatform.c, PlatformInfo.c
+//
+// 1 2/09/12 12:30a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name: AcpiPlatform.c
+//
+// Description: Installs EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include <token.h>
+#include <Acpi11.h>
+#include <Acpi20.h>
+#include <Protocol\AcpiSupport.h>
+#include <AmiCspLib.h>
+#include <AmiDxeLib.h>
+///#include "CPUCspLib.h"
+//#include "EfiCommonLib.h"
+//#include "CpuFuncs.h"
+///#include "Cpu.h"
+//#include <Acpi.h>
+#include <AcpiRes.h>
+#include <SaGlobalNvsArea\SaGlobalNvsArea.h>
+#include <Protocol\GlobalNvsArea\GlobalNvsArea.h>
+#include <AcpiPlatform.h>
+#include <PlatformInfo.h>
+#include <Setup.h>
+#if CRB_EC_SUPPORT == 1
+#include <KscLib.h>
+#endif
+#include <Protocol\PchPlatformPolicy\PchPlatformPolicy.h>
+#include <PlatformSetup.h>
+
+#ifndef PPM_C3
+#define PPM_C3 0x8
+#endif
+
+#ifndef FADT_C3_LATENCY
+#define FADT_C3_LATENCY 57
+#endif
+
+EFI_GUID gEfiGlobalNvsAreaProtocolGuid = EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID;
+EFI_GUID gEfiGlobalSaNvsAreaProtocolGuid = EFI_GLOBAL_SANVS_AREA_PROTOCOL_GUID;
+EFI_GUID gPlatformInfoProtocolGuid = EFI_PLATFORM_INFO_PROTOCOL_GUID;
+EFI_GUID gSetupGuid = SETUP_GUID;
+#if defined PTID_SUPPORT && PTID_SUPPORT
+EFI_GUID gAcpiPtidFfsTableStorageGuid = PTID_FFS_TABLE_STORAGE_GUID;
+#endif
+#if defined IntelRMT_SUPPORT && IntelRMT_SUPPORT
+EFI_GUID gAcpiIRMTFfsTableStorageGuid = IRMT_FFS_TABLE_STORAGE_GUID;
+#endif
+#if defined RTD3_SUPPORT && RTD3_SUPPORT
+EFI_GUID gAcpiRtd3FfsTableGuid = RTD3_FFS_TABLE_GUID;
+#endif
+#if defined ACPIDEBUG_SUPPORT && ACPIDEBUG_SUPPORT
+EFI_GUID gAcpiDebugFfsTableGuid = ACPIDEBUG_FFS_TABLE_GUID;
+#endif
+#if defined ZPODD_SUPPORT && ZPODD_SUPPORT
+EFI_GUID gAcpiZpOddFfsTableGuid = ZPODD_FFS_TABLE_GUID;
+#endif
+#if defined INTELSENSORHUB_SUPPORT && INTELSENSORHUB_SUPPORT
+EFI_GUID gAcpiIntelSensorHubFfsTableGuid = INTELSENSORHUB_FFS_TABLE_GUID;
+#endif
+#if defined LPIT_SUPPORT && LPIT_SUPPORT
+EFI_GUID gAcpiLpitGuid = LPIT_GUID;
+#endif
+
+EFI_GLOBAL_NVS_AREA_PROTOCOL mGlobalNvsArea;
+SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL gSaGlobalNvsArea;
+
+VOID *GetDSDTTable ();
+EFI_ACPI_SUPPORT_PROTOCOL *gEfiAcpiSupport = 0;
+PLATFORM_INFO_PROTOCOL *gPlatformInfoProtocol;
+VOID CallbackBootScript(IN EFI_EVENT Event, IN VOID *Context);
+EFI_EVENT gEvtBootScript;
+static SETUP_DATA *gSetupData = NULL;
+
+VOID DsdtTableUpdate (PACPI_HDR DsdtTable);
+//VOID DsdtTableUpdate1 (PACPI_HDR DsdtTable);
+VOID LoadDbgpTable();
+
+#if defined LPIT_SUPPORT && LPIT_SUPPORT
+VOID LoadLpitTable ();
+#endif
+#if defined PTID_SUPPORT && PTID_SUPPORT
+VOID LoadSsdtPtidTable ();
+EFI_STATUS LocateSupportProtocol (IN EFI_GUID *Protocol,OUT VOID **Instance,IN BOOLEAN Type );
+#endif
+#if defined IntelRMT_SUPPORT && IntelRMT_SUPPORT
+VOID LoadSsdtIRMTTable ();
+EFI_STATUS LocateIRMTSupportProtocol (IN EFI_GUID *Protocol,OUT VOID **Instance,IN BOOLEAN Type );
+#endif
+#if defined RTD3_SUPPORT && RTD3_SUPPORT
+VOID LoadSsdtRtd3Table ();
+EFI_STATUS LocateRTD3SupportProtocol (IN EFI_GUID *Protocol,OUT VOID **Instance,IN BOOLEAN Type );
+#endif
+#if defined ACPIDEBUG_SUPPORT && ACPIDEBUG_SUPPORT
+VOID LoadSsdtAcpiDebugTable ();
+EFI_STATUS LocateAcpiDebugSupportProtocol (IN EFI_GUID *Protocol,OUT VOID **Instance,IN BOOLEAN Type );
+#define AcpiDebugBufferSize 0x10000 // 64k buffer data
+#define ACPI_DEBUG_STR "INTEL ACPI DEBUG"
+#define AML_NAME_OP 0x08
+#if defined ZPODD_SUPPORT && ZPODD_SUPPORT
+VOID LoadSsdtZpOddTable ();
+EFI_STATUS LocateZPODDSupportProtocol (IN EFI_GUID *Protocol,OUT VOID **Instance,IN BOOLEAN Type );
+#endif
+#if defined INTELSENSORHUB_SUPPORT && INTELSENSORHUB_SUPPORT
+VOID LoadSsdtIntelSensorHubTable ();
+EFI_STATUS LocateIntelSensorHubSupportProtocol (IN EFI_GUID *Protocol,OUT VOID **Instance,IN BOOLEAN Type );
+#endif
+
+//
+// ASL NAME structure
+//
+#pragma pack(1)
+typedef struct {
+ UINT8 NameOp; // Byte [0]=0x08:NameOp.
+ UINT32 NameString; // Byte [4:1]=Name of object.
+ UINT8 DWordPrefix; // Byte [5]=0x0C:DWord Prefix.
+ UINT32 Value; // 0 ; Value of named object.
+} NAME_LAYOUT;
+#pragma pack()
+#endif
+
+#include <AcpiInfo\AcpiInfo.h>
+#include <AcpiPlatformPolicy\AcpiPlatformPolicy.h>
+EFI_GUID gAcpiPlatformPolicyProtocolGuid = ACPI_PLATFORM_POLICY_PROTOCOL_GUID;
+
+// Protocols that are installed
+ACPI_PLATFORM_POLICY_PROTOCOL mAcpiPlatformPolicyProtocol = { 0 };
+EFI_ACPI_INFO_PROTOCOL mAcpiInfoProtocol = { 0 };
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: CheckPlatformSupportRtD3
+//
+// Description: Check if platform support RtD3
+//
+// Input: None
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN CheckPlatformSupportRtD3 ()
+{
+ BOOLEAN RtD3Supported;
+ PCH_SERIES PchSeries = GetPchSeries();
+
+ RtD3Supported = FALSE;
+ if (IS_SA_DEVICE_ID_MOBILE (READ_PCI16_NB (R_SA_MC_DEVICE_ID))) {
+ if (PchSeries == PchLp) {
+ RtD3Supported = TRUE;
+ }
+ }
+
+ return RtD3Supported;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: CheckPlatformSupportCPPC
+//
+// Description: Check if platform support CPPC
+//
+// Input: None
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN CheckPlatformSupportCPPC ()
+{
+ BOOLEAN CPPCSupported;
+
+ if (!(IS_SA_DEVICE_ID_MOBILE (READ_PCI16_NB (R_SA_MC_DEVICE_ID)))) {
+ CPPCSupported = FALSE;
+ } else {
+ CPPCSupported = TRUE;
+ }
+
+ return CPPCSupported;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: InstallAcpiDxePlatformPolicy
+//
+// Description: Initilize ACPI DXE Platform Policy.
+//
+// Input: None
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS InstallAcpiDxePlatformPolicy (IN UINT32 SetupAttributes)
+{
+ EFI_STATUS Status;
+ EFI_HANDLE Handle;
+ SETUP_PLATFORM_DATA SetupPlatformData;
+
+ ///
+ /// Initialize the EFI Driver Library
+ ///
+ mAcpiPlatformPolicyProtocol.Revision = ACPI_PLATFORM_POLICY_PROTOCOL_REVISION_1;
+ mAcpiPlatformPolicyProtocol.BoardId = gPlatformInfoProtocol->BoardId;
+
+ mAcpiPlatformPolicyProtocol.EnableDptf = 0;
+ mAcpiPlatformPolicyProtocol.EnableCppc = 0;
+ mAcpiPlatformPolicyProtocol.EnableCppcPlatformSCI = 0;
+
+ TRACE((TRACE_ALWAYS, "InstallAcpiDxePlatformPolicy setup variable attributes = %x \n", SetupAttributes));
+
+ SetupPlatformData.PlatformSupportCppc = 0;
+ SetupPlatformData.PlatformSupportRtD3 = 0;
+
+#if ACPIDEBUG_SUPPORT
+ if (gSetupData != NULL) {
+ mAcpiPlatformPolicyProtocol.EnableAcpiDebug = gSetupData->AcpiDebugSupport;
+ }
+#endif
+
+#if RTD3_SUPPORT
+ if (!CheckPlatformSupportRtD3()) {
+ mAcpiPlatformPolicyProtocol.EnableRtD3 = 0;
+ } else if (gSetupData != NULL) {
+ SetupPlatformData.PlatformSupportRtD3 = 1;
+ mAcpiPlatformPolicyProtocol.EnableRtD3 = gSetupData->Rtd3Support;
+ }
+#endif
+
+#if Dptf_SUPPORT
+ if (gSetupData != NULL) {
+ mAcpiPlatformPolicyProtocol.EnableDptf = gSetupData->EnableDptf;
+ if(gSetupData->EnableDptf==1){
+ if (gSetupData->EnableSaDevice==1){
+ gSetupData->SaDevice4=1;
+ }
+ else{
+ gSetupData->SaDevice4=0;
+ }
+ gSetupData->ThermalDeviceEnable=gSetupData->EnablePchDevice;
+ }
+
+ Status = pRS->SetVariable (
+ L"Setup",
+ &gSetupGuid,
+ SetupAttributes,
+ sizeof(SETUP_DATA),
+ gSetupData
+ );
+ }
+#endif
+
+#if CPPC_SUPPORT
+ if (!CheckPlatformSupportCPPC()) {
+ mAcpiPlatformPolicyProtocol.EnableCppc = 0;
+ mAcpiPlatformPolicyProtocol.EnableCppcPlatformSCI = 0;
+ } else if (gSetupData != NULL) {
+ SetupPlatformData.PlatformSupportCppc = 1;
+ mAcpiPlatformPolicyProtocol.EnableCppc = gSetupData->EnableCppc;
+ mAcpiPlatformPolicyProtocol.EnableCppcPlatformSCI = gSetupData->EnableCppcPlatformSCI;
+ }
+#endif
+
+ TRACE((TRACE_ALWAYS, "SetupPlatformData.PlatformSupportCppc = %x \n", SetupPlatformData.PlatformSupportCppc));
+ TRACE((TRACE_ALWAYS, "SetupPlatformData.PlatformSupportRtD3 = %x \n", SetupPlatformData.PlatformSupportRtD3));
+
+ Status = pRS->SetVariable (
+ L"SetupPlatformData",
+ &gSetupGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ sizeof (SETUP_PLATFORM_DATA),
+ &SetupPlatformData
+ );
+ TRACE((TRACE_ALWAYS, "SetVariable SetupPlatformData Status = %r \n", Status));
+
+ Handle = NULL;
+ Status = pBS->InstallMultipleProtocolInterfaces (
+ &Handle,
+ &gAcpiPlatformPolicyProtocolGuid,
+ &mAcpiPlatformPolicyProtocol,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ ///
+ /// Install ACPI_INFO_PROTOCOL
+ ///
+ mAcpiInfoProtocol.Revision = ACPI_INFO_PROTOCOL_REVISION_1;
+ ///
+ /// RCVersion[32:0] is the release number.
+ /// For example:
+ /// Acpi Framework 0.5.0 should be 00 05 00 00 (0x00050000)
+ ///
+ mAcpiInfoProtocol.RCVersion = ACPI_RC_VERSION;
+
+ Handle = NULL;
+ Status = pBS->InstallMultipleProtocolInterfaces (
+ &Handle,
+ &gEfiAcpiInfoProtocolGuid,
+ &mAcpiInfoProtocol,
+ NULL
+ );
+
+
+ return Status;
+
+}
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: AcpiPlatformInit
+//
+// Description:
+//
+// Input:
+//
+// Output:
+// EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+// Here is the control flow of this function:
+//
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+AcpiPlatformInit (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_GUID gAcpiSupportGuid = EFI_ACPI_SUPPORT_GUID;
+ PACPI_HDR DsdtTable;
+ UINT32 Length;
+ UINT8 *ptr;
+ UINT32 RegEax, RegEbx, RegEcx, RegEdx;
+ ASL_OBJ_INFO ObjInfo;
+ MSR_REGISTER MsrCoreThreadCount;
+#if CRB_EC_SUPPORT == 1
+ UINT8 PortDataOut = 0;
+#endif
+ UINT8 ECSmbusThermalReportingEnabled = 0;
+ UINT8 ECSMBusMsgLenth = 0;
+ UINT8 ECSMBusPECEnabled = 0;
+ NB_SETUP_DATA *NbSetupData = NULL;
+ SB_SETUP_DATA *SbSetupData = NULL;
+ UINTN VariableSize = NULL;
+ UINT16 McDeviceId;
+ UINT8 USBRTD3 = 0;
+ PCH_SERIES PchSeries = GetPchSeries();
+ UINT32 SetupAttributes = 0;
+
+ InitAmiLib(ImageHandle,SystemTable);
+
+ Status = pBS->AllocatePool (EfiACPIMemoryNVS,
+ sizeof (EFI_GLOBAL_NVS_AREA),
+ &mGlobalNvsArea.Area);
+ ASSERT_EFI_ERROR (Status);
+ pBS->SetMem (mGlobalNvsArea.Area, sizeof (EFI_GLOBAL_NVS_AREA), 0);
+
+#if defined Remove_SaSsdt_Data_To_Dsdt && Remove_SaSsdt_Data_To_Dsdt
+ Status = pBS->AllocatePool (EfiACPIMemoryNVS,
+ sizeof (SYSTEM_AGENT_GLOBAL_NVS_AREA),
+ &gSaGlobalNvsArea.Area);
+ ASSERT_EFI_ERROR (Status);
+ pBS->SetMem (gSaGlobalNvsArea.Area, sizeof (SYSTEM_AGENT_GLOBAL_NVS_AREA), 0);
+#endif
+ //
+ // mGlobalNvsArea.Area has the address of GNVS in ACPI NVS area
+ // update this as GNVS opRegion field of GNVS area in DSDT.
+ //
+ Status = pBS->LocateProtocol(&gAcpiSupportGuid, NULL, &gEfiAcpiSupport);
+ ASSERT_EFI_ERROR (Status);
+
+ // Read MC device ID
+ McDeviceId = READ_PCI16_NB(R_SA_MC_DEVICE_ID);
+
+ DsdtTable = GetDSDTTable();
+ if (DsdtTable) {
+ Length = DsdtTable->Length - sizeof(ACPI_HDR);
+ ptr = (UINT8*)DsdtTable + sizeof(ACPI_HDR);
+ Status = GetAslObj(ptr, Length, "GNVS", otOpReg, &ObjInfo);
+ ASSERT_EFI_ERROR (Status);
+
+ ptr = (UINT8*)ObjInfo.DataStart;
+ *(UINT32*)(ptr + 2) = (UINT32)(UINTN)mGlobalNvsArea.Area;
+ *(UINT16*)(ptr + 2 + 5) = sizeof (EFI_GLOBAL_NVS_AREA);
+ TRACE((TRACE_ALWAYS, "ACPI Global NVS Ptr=0x%X, Length=0x%X\n", (UINT32)(UINTN) mGlobalNvsArea.Area, sizeof (EFI_GLOBAL_NVS_AREA)));
+
+#if defined Remove_SaSsdt_Data_To_Dsdt && Remove_SaSsdt_Data_To_Dsdt
+ Length = DsdtTable->Length - sizeof(ACPI_HDR);
+ ptr = (UINT8*)DsdtTable + sizeof(ACPI_HDR);
+ Status = GetAslObj(ptr, Length, "SANV", otOpReg, &ObjInfo);
+ ASSERT_EFI_ERROR (Status);
+
+ ptr = (UINT8*)ObjInfo.DataStart;
+ *(UINT32*)(ptr + 2) = (UINT32)(UINTN)gSaGlobalNvsArea.Area;
+ *(UINT16*)(ptr + 2 + 5) = sizeof (SYSTEM_AGENT_GLOBAL_NVS_AREA);
+ TRACE((TRACE_ALWAYS, "ACPI Global SA NVS Ptr=0x%X, Length=0x%X\n", (UINT32)(UINTN) gSaGlobalNvsArea.Area, sizeof (SYSTEM_AGENT_GLOBAL_NVS_AREA)));
+#endif
+
+ if(!IS_SA_DEVICE_ID_MOBILE(McDeviceId)) {
+ DsdtTableUpdate (DsdtTable); // This DsdtTable update is for non-Mobile platform.
+ }
+ }
+
+ LoadDbgpTable();
+
+#if defined LPIT_SUPPORT && LPIT_SUPPORT
+ if (PchSeries == PchLp) {
+ LoadLpitTable();
+ }
+#endif
+
+ Status = pBS->LocateProtocol(&gPlatformInfoProtocolGuid, NULL, &gPlatformInfoProtocol);
+ ASSERT_EFI_ERROR (Status);
+
+ // Update the PlatformFlavor
+ mGlobalNvsArea.Area->PlatformFlavor = gPlatformInfoProtocol->PlatformFlavor;
+
+ // Update the Platform Board ID
+ mGlobalNvsArea.Area->BoardId = gPlatformInfoProtocol->BoardId;
+
+ // Update the Board Revision
+ mGlobalNvsArea.Area->BoardRev = gPlatformInfoProtocol->BoardRev;
+
+ // Initialize AMI Setup Data
+ Status = GetEfiVariable(
+ L"Setup",
+ &gSetupGuid,
+ &SetupAttributes,
+ &VariableSize,
+ &gSetupData
+ );
+
+ // Initilize ACPI DXE Platform Policy
+ Status = InstallAcpiDxePlatformPolicy (SetupAttributes);
+ ASSERT_EFI_ERROR(Status);
+
+#if LOW_POWER_S0_IDLE_CAPABLE == 1
+ mGlobalNvsArea.Area->LowPowerS0Idle = 0;
+ if (LOW_POWER_S0_IDLE_CAPABLE) {
+ if (gSetupData->AcpiLowPowerS0Idle == 1) {
+ mGlobalNvsArea.Area->LowPowerS0Idle = 1;
+ mGlobalNvsArea.Area->PB1E = gSetupData->PowerButton10SecOVR | BIT3; //Bit3: Slate/Laptop Mode Flag, 0: Slate, 1: Laptop
+ mGlobalNvsArea.Area->PEPC = mGlobalNvsArea.Area->PEPC | gSetupData->LowPowerIdleSATA;
+ mGlobalNvsArea.Area->ECNO = gSetupData->EcNotification;
+ mGlobalNvsArea.Area->ECDB = gSetupData->EcCSDebugLight;
+ mGlobalNvsArea.Area->SHSB = gSetupData->SensorStandby;
+ mGlobalNvsArea.Area->PL1LimitCS = gSetupData->CSPL1Limit;
+ mGlobalNvsArea.Area->PL1LimitCSValue = gSetupData->CSPL1Value;
+ }
+ }
+#endif
+
+ if (mGlobalNvsArea.Area->LowPowerS0Idle == 0) {
+// DsdtTableUpdate1 (DsdtTable);
+ } // mGlobalNvsArea.Area->LowPowerS0Idle = 0
+
+
+ if (EFI_ERROR (Status)) {
+ mGlobalNvsArea.Area->NativePCIESupport = 0;
+ } else {
+ mGlobalNvsArea.Area->NativePCIESupport = gSetupData->PciExpNative;
+ }
+
+#if Dptf_SUPPORT
+ mGlobalNvsArea.Area->EnableDptfDevice = gSetupData->EnableDptf;
+ if (gSetupData->EnableDptf) {
+ mGlobalNvsArea.Area->EnableSaDevice = gSetupData->EnableSaDevice;
+ mGlobalNvsArea.Area->ActiveThermalTripPointSA = gSetupData->ActiveThermalTripPointSa;
+ mGlobalNvsArea.Area->PassiveThermalTripPointSA = gSetupData->PassiveThermalTripPointSa;
+ mGlobalNvsArea.Area->CriticalThermalTripPointSA = gSetupData->CriticalThermalTripPointSa;
+ mGlobalNvsArea.Area->HotThermalTripPointSA = gSetupData->HotThermalTripPointSa;
+
+ mGlobalNvsArea.Area->EnablePchDevice = gSetupData->EnablePchDevice;
+ mGlobalNvsArea.Area->ActiveThermalTripPointPCH = gSetupData->ActiveThermalTripPointPch;
+ mGlobalNvsArea.Area->PassiveThermalTripPointPCH = gSetupData->PassiveThermalTripPointPch;
+ mGlobalNvsArea.Area->CriticalThermalTripPointPCH = gSetupData->CriticalThermalTripPointPch;
+ mGlobalNvsArea.Area->HotThermalTripPointPCH = gSetupData->HotThermalTripPointPch;
+
+ mGlobalNvsArea.Area->EnableMemoryDevice = gSetupData->EnableMemDevice;
+ mGlobalNvsArea.Area->ActiveThermalTripPointTMEM = gSetupData->ActiveThermalTripPointMem;
+ mGlobalNvsArea.Area->PassiveThermalTripPointTMEM = gSetupData->PassiveThermalTripPointMem;
+ mGlobalNvsArea.Area->CriticalThermalTripPointTMEM = gSetupData->CriticalThermalTripPointMem;
+ mGlobalNvsArea.Area->HotThermalTripPointTMEM = gSetupData->HotThermalTripPointMem;
+
+ mGlobalNvsArea.Area->EnableAmbientDevice = gSetupData->EnableAmbientDevice;
+ mGlobalNvsArea.Area->ActiveThermalTripPointAmbient = gSetupData->ActiveThermalTripPointAmbient;
+ mGlobalNvsArea.Area->PassiveThermalTripPointAmbient = gSetupData->PassiveThermalTripPointAmbient;
+ mGlobalNvsArea.Area->CriticalThermalTripPointAmbient = gSetupData->CriticalThermalTripPointAmbient;
+ mGlobalNvsArea.Area->HotThermalTripPointAmbient = gSetupData->HotThermalTripPointAmbient;
+
+ mGlobalNvsArea.Area->EnableSkinDevice = gSetupData->EnableSkinDevice;
+ mGlobalNvsArea.Area->ActiveThermalTripPointSkin = gSetupData->ActiveThermalTripPointSkin;
+ mGlobalNvsArea.Area->PassiveThermalTripPointSkin = gSetupData->PassiveThermalTripPointSkin;
+ mGlobalNvsArea.Area->CriticalThermalTripPointSkin = gSetupData->CriticalThermalTripPointSkin;
+ mGlobalNvsArea.Area->HotThermalTripPointSkin = gSetupData->HotThermalTripPointSkin;
+
+ mGlobalNvsArea.Area->EnableExhaustFanDevice = gSetupData->EnableExhaustDevice;
+ mGlobalNvsArea.Area->ActiveThermalTripPointExhaustFan = gSetupData->ActiveThermalTripPointExhaust;
+ mGlobalNvsArea.Area->PassiveThermalTripPointExhaustFan = gSetupData->PassiveThermalTripPointExhaust;
+ mGlobalNvsArea.Area->CriticalThermalTripPointExhaustFan = gSetupData->CriticalThermalTripPointExhaust;
+ mGlobalNvsArea.Area->HotThermalTripPointExhaustFan = gSetupData->HotThermalTripPointExhaust;
+
+ mGlobalNvsArea.Area->EnableVRDevice = gSetupData->EnableVRDevice;
+ mGlobalNvsArea.Area->ActiveThermalTripPointVR = gSetupData->ActiveThermalTripPointVR;
+ mGlobalNvsArea.Area->PassiveThermalTripPointVR = gSetupData->PassiveThermalTripPointVR;
+ mGlobalNvsArea.Area->CriticalThermalTripPointVR = gSetupData->CriticalThermalTripPointVR;
+ mGlobalNvsArea.Area->HotThermalTripPointVR = gSetupData->HotThermalTripPointVR;
+
+ mGlobalNvsArea.Area->PpccStepSize = gSetupData->PpccStepSize;
+ mGlobalNvsArea.Area->LPOEnable = gSetupData->LPOEnable;
+ mGlobalNvsArea.Area->LPOStartPState = gSetupData->LPOStartPState;
+ mGlobalNvsArea.Area->LPOStepSize = gSetupData->LPOStepSize;
+ mGlobalNvsArea.Area->LPOPowerControlSetting = gSetupData->LPOPowerControl;
+ mGlobalNvsArea.Area->LPOPerformanceControlSetting = gSetupData->LPOPerformanceControl;
+ mGlobalNvsArea.Area->EnableCtdpPolicy = gSetupData->EnableCTDP;
+ mGlobalNvsArea.Area->EnableLpmPolicy = gSetupData->EnableLPM;
+ mGlobalNvsArea.Area->CurrentLowPowerMode = gSetupData->LPMSetting;
+ mGlobalNvsArea.Area->EnableFan1Device = gSetupData->Fan1Device;
+ mGlobalNvsArea.Area->EnableFan2Device = gSetupData->Fan2Device;
+ mGlobalNvsArea.Area->EnableDisplayParticipant = gSetupData->DisplayParticipant;
+ mGlobalNvsArea.Area->EnablePowerDevice = gSetupData->PowerParticipant;
+ mGlobalNvsArea.Area->EnablePowerPolicy = gSetupData->PowerPolicy;
+ mGlobalNvsArea.Area->EnableActivePolicy = gSetupData->ActivePolicy;
+ mGlobalNvsArea.Area->EnablePassivePolicy = gSetupData->PassivePolicy;
+ mGlobalNvsArea.Area->EnableCriticalPolicy = gSetupData->CriticalPolicy;
+ mGlobalNvsArea.Area->EnableCoolingModePolicy = gSetupData->CoolingModePolicy;
+ mGlobalNvsArea.Area->EnableCurrentExecutionUnit = 1;
+ mGlobalNvsArea.Area->TargetGfxFreq = 400;
+ mGlobalNvsArea.Area->TrtRevision = gSetupData->TrtRevision;
+ }
+#endif
+
+ Status = pBS->AllocatePool (EfiBootServicesData, sizeof(NB_SETUP_DATA), (VOID **)&NbSetupData);
+ GetNbSetupData( pRS, NbSetupData, FALSE );
+ Status = pBS->AllocatePool (EfiBootServicesData, sizeof(SB_SETUP_DATA), (VOID **)&SbSetupData);
+ GetSbSetupData( pRS, SbSetupData, FALSE );
+
+ mGlobalNvsArea.Area->NFCEnable = SbSetupData->NFCE;
+
+ mGlobalNvsArea.Area->Ac0TripPoint = SbSetupData->Ac0TripPoint;
+ mGlobalNvsArea.Area->Ac0FanSpeed = SbSetupData->Ac0FanSpeed;
+ mGlobalNvsArea.Area->Ac1TripPoint = SbSetupData->Ac1TripPoint;
+ mGlobalNvsArea.Area->Ac1FanSpeed = SbSetupData->Ac1FanSpeed;
+
+ mGlobalNvsArea.Area->PassiveThermalTripPoint = SbSetupData->PassiveThermalTripPoint;
+ mGlobalNvsArea.Area->PassiveTc1Value = SbSetupData->PassiveTc1Value;
+ mGlobalNvsArea.Area->PassiveTc2Value = SbSetupData->PassiveTc2Value;
+ mGlobalNvsArea.Area->PassiveTspValue = SbSetupData->PassiveTspValue;
+ mGlobalNvsArea.Area->CriticalThermalTripPoint = SbSetupData->CriticalThermalTripPoint;
+
+#if CRB_EC_SUPPORT == 1
+ if(IS_SA_DEVICE_ID_MOBILE(McDeviceId)) {
+ mGlobalNvsArea.Area->EcAvailable = 1;
+ mGlobalNvsArea.Area->IUBE = 1;
+ mGlobalNvsArea.Area->IUCE = 1;
+ mGlobalNvsArea.Area->IUDE = 1;
+ }
+#endif
+
+#if defined ACPIDEBUG_SUPPORT && ACPIDEBUG_SUPPORT
+ if (gSetupData->AcpiDebugSupport){
+ LoadSsdtAcpiDebugTable();
+ }
+#endif
+
+#if defined PTID_SUPPORT && PTID_SUPPORT
+ mGlobalNvsArea.Area->PeciAccessMethod = gSetupData->PeciAccessMethod;
+ if (gSetupData->PtidSupport){
+ LoadSsdtPtidTable();
+ }
+#endif
+
+#if defined IntelRMT_SUPPORT && IntelRMT_SUPPORT
+ if (gSetupData->IRMTSupport){
+ LoadSsdtIRMTTable();
+ mGlobalNvsArea.Area->INSC = (gSetupData->IRMTHWNotification << 1) | (gSetupData->IRMTState);
+ }
+#endif
+
+#if defined INTELSENSORHUB_SUPPORT && INTELSENSORHUB_SUPPORT
+ LoadSsdtIntelSensorHubTable();
+#endif
+
+#if defined ZPODD_SUPPORT && ZPODD_SUPPORT
+ LoadSsdtZpOddTable();
+#endif
+
+#if defined RTD3_SUPPORT && RTD3_SUPPORT
+ mGlobalNvsArea.Area->Rtd3Support = gSetupData->Rtd3Support;
+ mGlobalNvsArea.Area->VRSD = gSetupData->VRStaggeringDelay;
+ mGlobalNvsArea.Area->VRRD = gSetupData->VRRampUpDelay;
+ mGlobalNvsArea.Area->Rtd3P0dl = gSetupData->Rtd3P0dl;
+ mGlobalNvsArea.Area->Rtd3P3dl = gSetupData->Rtd3P3dl;
+ mGlobalNvsArea.Area->AUDD = gSetupData->Rtd3Audio;
+ mGlobalNvsArea.Area->DSPD = gSetupData->Rtd3ADSP;
+ mGlobalNvsArea.Area->I20D = gSetupData->Rtd3I2C0;
+ mGlobalNvsArea.Area->IC0D = gSetupData->Rtd3SensorHub;
+ mGlobalNvsArea.Area->I21D = gSetupData->Rtd3I2C1;
+ mGlobalNvsArea.Area->IC1S = gSetupData->Rtd3I2C1PS0;
+ mGlobalNvsArea.Area->IC1D = gSetupData->Rtd3TouchPanel;
+
+ mGlobalNvsArea.Area->PepDevice = (gSetupData->PepSata << 1) | (gSetupData->PepGfx);
+ mGlobalNvsArea.Area->PSCP = gSetupData->PCapping;
+
+ if (gSetupData->XhciP0 == 1){
+ USBRTD3 = 1;
+ }else if (gSetupData->XhciP0 == 2){
+ USBRTD3 = 2;
+ }
+ if (gSetupData->XhciP1 == 1){
+ USBRTD3 += 0x10;
+ }else if (gSetupData->XhciP1 == 2){
+ USBRTD3 += 0x20;
+ }
+ mGlobalNvsArea.Area->UsbPowerResourceTest = USBRTD3;
+ mGlobalNvsArea.Area->RIC0 = gSetupData->RIC0;
+ mGlobalNvsArea.Area->RCG0 = 0;
+ if (gSetupData->RTD3ZPODD){
+ mGlobalNvsArea.Area->RCG0 = mGlobalNvsArea.Area->RCG0 | BIT0;
+ }
+ if (gSetupData->RTD3USBCamera){
+ mGlobalNvsArea.Area->RCG0 = mGlobalNvsArea.Area->RCG0 | BIT1;
+ }
+ if (gSetupData->RTD3MiniSataPort3 == 1){
+ mGlobalNvsArea.Area->RCG0 = mGlobalNvsArea.Area->RCG0 | BIT2;
+ }else if (gSetupData->RTD3MiniSataPort3 == 2){
+ mGlobalNvsArea.Area->RCG0 = mGlobalNvsArea.Area->RCG0 | BIT3;
+ }
+
+ mGlobalNvsArea.Area->RWAG = gSetupData->RTD3WaGpio;
+
+ if (gSetupData->Rtd3Support){
+ LoadSsdtRtd3Table();
+ } // (gSetupData->Rtd3Support)
+#endif
+
+#if defined iME_SUPPORT && iME_SUPPORT
+ ECSmbusThermalReportingEnabled = SbSetupData->TrEnabled;
+ ECSMBusMsgLenth = SbSetupData->SMBusECMsgLen;
+ ECSMBusPECEnabled = SbSetupData->SMBusECMsgPEC;
+#else
+#if CRB_EC_SUPPORT == 1
+ ECSmbusThermalReportingEnabled = 0x0;
+ ECSMBusMsgLenth = 0x0;
+ ECSMBusPECEnabled = 0x0;
+#endif
+#endif
+
+
+ // Enable TS-on-DIMM if present and enabled in SETUP, update NVS for use by DPPM code.
+#if defined (iME_SUPPORT) && (iME_SUPPORT==1)
+#if (DIMM_SLOT_NUM == 2)
+ if (SbSetupData->TrSmbusConfig > 0) {
+#endif
+
+#if (DIMM_SLOT_NUM == 4)
+ if((SbSetupData->TsOnDimm1) || (SbSetupData->TsOnDimm2) || \
+ (SbSetupData->TsOnDimm3) || (SbSetupData->TsOnDimm4)) {
+#endif
+ mGlobalNvsArea.Area->TsOnDimmEnabled = PCH_DEVICE_ENABLE;
+ } else {
+ mGlobalNvsArea.Area->TsOnDimmEnabled = PCH_DEVICE_DISABLE;
+ }
+
+#else
+ mGlobalNvsArea.Area->TsOnDimmEnabled = PCH_DEVICE_DISABLE;
+#endif
+
+#if CRB_EC_SUPPORT == 1
+ if (mGlobalNvsArea.Area->EcAvailable) {
+ // Locate KSC protocol.
+ Status = InitializeKscLib ();
+
+ if (Status == EFI_SUCCESS) {
+
+ if(ECSmbusThermalReportingEnabled) {
+
+ // SMBus Message length
+ Status = SendKscCommand (KSC_C_PCH_SMBUS_MSG_LENGTH);
+ if(Status == EFI_SUCCESS) {
+ SendKscData(ECSMBusMsgLenth);
+ }
+ // EC SMBus Packet Error Checking Enable (PEC) cmd
+ if(ECSMBusPECEnabled) {
+ SendKscCommand (KSC_C_PCH_SMBUS_PEC_EN);
+ }else {
+ SendKscCommand (KSC_C_PCH_SMBUS_PEC_DIS);
+ }
+
+ if (mGlobalNvsArea.Area->TsOnDimmEnabled) {
+ SendKscCommand (KSC_TS_ON_DIMM_EN); // TS-on-DIMM thermal monitoring enable command
+ } else {
+ SendKscCommand (KSC_TS_ON_DIMM_DIS); // TS-on-DIMM thermal monitoring Disable command
+ }
+
+ SendKscCommand (KSC_EC_PCH_SMBUS_EN); // EC PCH SMBus thermal monitoring Enable cmd
+ }else {
+
+ SendKscCommand (KSC_EC_PCH_SMBUS_DIS); // EC PCH SMBus thermal monitoring Disable cmd
+ }
+
+ }
+ }
+#endif
+ // Platform Thermal code end
+
+ //Get platform cpuid
+ CPULib_CpuID(1, &RegEax, &RegEbx, &RegEcx, &RegEdx);
+ mGlobalNvsArea.Area->PlatformCpuId = (RegEax & 0x0FFFFF);
+
+ //
+ // Nehalem MSR 0x35 CORE_THREAD_COUNT
+ // [31:16] - total number of enabled cores in the package
+ // [15:0] - total number of enabled threads in the package
+ //
+ MsrCoreThreadCount.Qword = ReadMsr (EFI_MSR_CORE_THREAD_COUNT);
+
+ //
+ // ThreadCount : Number of Enabled Threads
+ //
+ mGlobalNvsArea.Area->ThreadCount = MsrCoreThreadCount.Bytes.FirstByte;
+
+ // HPLL VCO = MCHBAR + C0Fh [2:0]
+ //SNB_TODO mGlobalNvsArea.Area->IgdHpllVco
+ //-jeff mGlobalNvsArea.Area->IgdHpllVco = READ_MEM8_MCH(0xC0F) & 0x07; // 189 HPLL VCO
+
+ mGlobalNvsArea.Area->ApicEnable = 1;
+ mGlobalNvsArea.Area->EmaEnable = 0;
+//For mobile platform, the number of batteries is updated by EC.asl
+ mGlobalNvsArea.Area->NumberOfBatteries = 0;
+ mGlobalNvsArea.Area->BatteryCapacity0 = 100;
+ mGlobalNvsArea.Area->BatteryStatus0 = 84;
+ mGlobalNvsArea.Area->SmscComPort = 1;
+ mGlobalNvsArea.Area->IdeMode = 0;
+
+ // Set default power state to AC.
+ // For mobile, EC.ASL, will update with current power state.
+ mGlobalNvsArea.Area->PowerState = 1;
+ mGlobalNvsArea.Area->PcieDockStatus = 0;
+
+#if CRB_EC_SUPPORT == 1
+ if (mGlobalNvsArea.Area->EcAvailable) {
+ // Initialize KSC library for later KSC Access
+ Status = InitializeKscLib ();
+ if (Status == EFI_SUCCESS) {
+
+ // Call KSC lib to get PCIe dock status
+ PortDataOut = 0;
+ Status = SendKscCommand (KSC_C_DOCK_STATUS);
+ if (Status == EFI_SUCCESS) {
+ Status = ReceiveKscData (&PortDataOut);
+ }
+
+ //
+ // the bit0 is PCIe Dock Status, 1 = docked
+ //
+ mGlobalNvsArea.Area->PcieDockStatus = (PortDataOut & 1);
+ }
+ }
+#endif
+
+ // Configure USB Sideband Deferring feature for ACPI
+ if (mGlobalNvsArea.Area->BoardId == BoardIdGraysReef){
+ mGlobalNvsArea.Area->HostAlertVector1 = 0x1F; // GPIO 15 for GPE _L1F
+ mGlobalNvsArea.Area->HostAlertVector2 = 0x1B; // GPIO 11 for GPE _L1B
+ }
+ else{
+ mGlobalNvsArea.Area->HostAlertVector1 = 0xFF; // dummy value to signal no USB SBD support
+ mGlobalNvsArea.Area->HostAlertVector2 = 0xFF; // dummy value to signal no USB SBD support
+ }
+
+ mGlobalNvsArea.Area->Revision = GLOBAL_NVS_AREA_REVISION_1;
+
+ Status = pBS->InstallMultipleProtocolInterfaces (&ImageHandle,
+ &gEfiGlobalNvsAreaProtocolGuid,
+ &mGlobalNvsArea,
+ NULL);
+
+#if defined Remove_SaSsdt_Data_To_Dsdt && Remove_SaSsdt_Data_To_Dsdt
+ Status = pBS->InstallMultipleProtocolInterfaces (&ImageHandle,
+ &gEfiGlobalSaNvsAreaProtocolGuid,
+ &gSaGlobalNvsArea,
+ NULL);
+#endif
+
+ Status = CreateReadyToBootEvent(
+ TPL_CALLBACK,
+ CallbackBootScript,
+ NULL,
+ &gEvtBootScript
+ );
+
+
+ pBS->FreePool(NbSetupData);
+ pBS->FreePool(SbSetupData);
+
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: CallbackBootScript
+//
+// This function will be called when ReadyToBoot event will be signaled and
+// will update related Platform information to global NVS area.
+//
+//
+// Input: Event - Event of callback
+// Context - Context of callback.
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+//**********************************************************************
+VOID CallbackBootScript (
+ IN EFI_EVENT Event,
+ IN VOID *Context )
+{
+ UINT32 ThermalBaseB = 0;
+ UINT32 PchFdRegSave = 0;
+ UINT16 OLD_IAPC_BOOT_ARCH;
+ PFACP_20 FadtPointer;
+ INTN Index;
+ PACPI_HDR Table;
+ EFI_ACPI_TABLE_VERSION Version;
+ UINTN TableHandle;
+ EFI_STATUS Status;
+ UINTN VariableSize = NULL;
+ SETUP_DATA *SetupData = NULL;
+ UINT8 Buffer8;
+
+ //
+ // Update TBARB and TBARBH if configured by DPPM
+ //
+ PchFdRegSave = READ_MEM32_RCRB(R_PCH_RCRB_FUNC_DIS);
+ RESET_MEM32_RCRB(R_PCH_RCRB_FUNC_DIS, B_PCH_RCRB_FUNC_DIS_THERMAL);
+ ThermalBaseB = READ_PCI32(THERMAL_BUS, THERMAL_DEV, THERMAL_FUN, R_PCH_THERMAL_TBARB) & B_PCH_THERMAL_TBARB_MASK;
+ WRITE_MEM32_RCRB(R_PCH_RCRB_FUNC_DIS, PchFdRegSave);
+
+ if ((ThermalBaseB != 0) && (ThermalBaseB != B_PCH_THERMAL_TBARB_MASK)) {
+ mGlobalNvsArea.Area->TBARB = (UINT32) ThermalBaseB;
+ mGlobalNvsArea.Area->TBARBH = (UINT32) 0;
+ } else {
+ mGlobalNvsArea.Area->TBARB = (UINT32) 0;
+ mGlobalNvsArea.Area->TBARBH = (UINT32) 0;
+ }
+
+ // Initialize AMI Setup Data
+ Status = GetEfiVariable(
+ L"Setup",
+ &gSetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData
+ );
+
+ Index = 0;
+ do {
+ Status = gEfiAcpiSupport->GetAcpiTable(gEfiAcpiSupport,
+ Index,
+ &Table,
+ &Version,
+ &TableHandle);
+
+ if (Status == EFI_NOT_FOUND) {
+ break;
+ }
+ if (Table->Signature == FACP_SIG) {
+ FadtPointer = (PFACP_20) Table;
+ if (mGlobalNvsArea.Area->PpmFlags & PPM_C3) {
+ FadtPointer->P_LVL3_LAT = FADT_C3_LATENCY;
+ }
+ OLD_IAPC_BOOT_ARCH = FadtPointer->IAPC_BOOT_ARCH;
+ //
+ // if Native ASPM is disabled, set FACP table to skip Native ASPM
+ //
+ if ((SetupData->PciExpNative == 0)|| (SetupData->NativeAspmEnable == 0x0)) {
+ FadtPointer->IAPC_BOOT_ARCH |= 0x10;
+ }
+
+ //if (FadtPointer->IAPC_BOOT_ARCH != OLD_IAPC_BOOT_ARCH) {
+ if ((FadtPointer->IAPC_BOOT_ARCH != OLD_IAPC_BOOT_ARCH) || (mGlobalNvsArea.Area->PpmFlags & PPM_C3)) {
+ Status = gEfiAcpiSupport->SetAcpiTable (gEfiAcpiSupport, Table, TRUE, Version, &TableHandle);
+ ASSERT_EFI_ERROR (Status);
+ }
+ pBS->FreePool (Table);
+ }
+ Index++;
+ } while (1);
+
+
+ if (READ_PCI32(SATA_BUS, SATA_DEV, SATA_FUN, PCI_VID) != 0xffffffff) {
+ Buffer8 = READ_PCI8(SATA_BUS, SATA_DEV, SATA_FUN, SATA_REG_PCS + 1 );
+ mGlobalNvsArea.Area->SPST = (Buffer8 & BIT0 );
+ mGlobalNvsArea.Area->SPST = mGlobalNvsArea.Area->SPST | (Buffer8 & BIT1);
+ mGlobalNvsArea.Area->SPST = mGlobalNvsArea.Area->SPST | (Buffer8 & BIT2);
+ mGlobalNvsArea.Area->SPST = mGlobalNvsArea.Area->SPST | (Buffer8 & BIT3);
+
+ }
+
+ // Kill the Event
+ pBS->CloseEvent(Event);
+}
+
+VOID LoadDbgpTable()
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_ACPI_DEBUG_PORT_DESCRIPTION_TABLE *DBGP;
+ EFI_ACPI_SUPPORT_PROTOCOL *As;
+ UINT8 OemId[6] = CONVERT_TO_STRING(T_ACPI_OEM_ID);
+ UINT8 OemTblId[8] = \
+ CONVERT_TO_STRING(T_ACPI_OEM_TBL_ID);
+ UINTN mDbgpTblHandle;
+
+
+ Status = pBS->LocateProtocol(&gEfiAcpiSupportGuid, NULL, &As);
+ DBGP = MallocZ(sizeof(EFI_ACPI_DEBUG_PORT_DESCRIPTION_TABLE));
+ ASSERT(DBGP);
+ if (DBGP) {
+ // Fill Table header;
+ DBGP->Header.Signature = EFI_ACPI_3_0_DEBUG_PORT_TABLE_SIGNATURE;
+ DBGP->Header.Length = sizeof(EFI_ACPI_DEBUG_PORT_DESCRIPTION_TABLE);
+ DBGP->Header.Revision = EFI_ACPI_DBGP_TABLE_REVISION;
+ DBGP->Header.Checksum = 0;
+ MemCpy(&(DBGP->Header.OemId[0]), OemId, 6);
+ MemCpy(&(DBGP->Header.OemTblId[0]), OemTblId, 8);
+ DBGP->Header.OemRev = EFI_ACPI_OEM_DBGP_REVISION;
+ DBGP->Header.CreatorId = EFI_ACPI_CREATOR_ID;
+ DBGP->Header.CreatorRev = CORE_REVISION;
+ // Fill DBGP Fields
+ DBGP->BaseAddress.AddressSpaceId = 1;
+ DBGP->BaseAddress.RegisterBitWidth = 8;
+ DBGP->BaseAddress.RegisterBitOffset = 0;
+ DBGP->BaseAddress.Reserved = 0;
+ DBGP->BaseAddress.Address = 0x3F8;
+
+ // Add table
+ mDbgpTblHandle = 0;
+ Status = As->SetAcpiTable( As, \
+ DBGP, \
+ TRUE, \
+ EFI_ACPI_TABLE_VERSION_ALL, \
+ &mDbgpTblHandle );
+ TRACE((-1,"ACPISupport.SetAcpiTable() = %r \n", Status));
+ ASSERT_EFI_ERROR(Status);
+
+ // Free memory used for table image
+ pBS->FreePool(DBGP);
+ }
+
+}
+
+#if defined LPIT_SUPPORT && LPIT_SUPPORT
+VOID LoadLpitTable()
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ UINTN Index;
+ EFI_FIRMWARE_VOLUME_PROTOCOL *FwVol;
+ INTN Instance;
+ EFI_ACPI_COMMON_HEADER *Table;
+ UINTN Size;
+ EFI_FV_FILETYPE FileType;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINT32 FvStatus;
+ UINTN TableHandle;
+ EFI_ACPI_TABLE_VERSION Version;
+ EFI_ACPI_DESCRIPTION_HEADER *TableHeader;
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
+ BOOLEAN LoadTable;
+
+
+ FwVol = NULL;
+ Table = NULL;
+ //
+ // Locate FV protocol.
+ //
+
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiFirmwareVolumeProtocolGuid,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Look for FV with ACPI storage file
+ //
+ for (Index = 0; Index < NumberOfHandles; Index++) {
+
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = pBS->HandleProtocol (
+ HandleBuffer[Index],
+ &gEfiFirmwareVolumeProtocolGuid,
+ &FwVol
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // See if it has the ACPI storage file
+ //
+ Size = 0;
+ FvStatus = 0;
+ Status = FwVol->ReadFile (
+ FwVol,
+ &gAcpiLpitGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+ //
+ // If we found it, then we are done
+ //
+
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+ //
+ // Free any allocated buffers
+ //
+ pBS->FreePool (HandleBuffer);
+
+ //
+ // Sanity check that we found our data file
+ //
+ ASSERT (FwVol);
+
+ //
+ // By default, a table belongs in all ACPI table versions published.
+ //
+ Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0;
+
+ //
+ // Find the Table protocol
+ //
+ Status = pBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID **)&AcpiTable);
+ ASSERT_EFI_ERROR (Status);
+
+
+
+ //
+ // Read tables from the storage file.
+ //
+ Instance = 0;
+
+ while (Status == EFI_SUCCESS) {
+ //
+ // Read the ACPI tables
+ //
+ Status = FwVol->ReadSection (
+ FwVol,
+ &gAcpiLpitGuid,
+ EFI_SECTION_RAW,
+ Instance,
+ &Table,
+ &Size,
+ &FvStatus
+ );
+
+ if (!EFI_ERROR (Status)) {
+
+ LoadTable = FALSE;
+ TableHeader = (EFI_ACPI_DESCRIPTION_HEADER *) Table;
+ ///
+ /// Check the Signature ID to modify the table
+ ///
+ if (!LoadTable) {
+ switch (((EFI_ACPI_DESCRIPTION_HEADER *) TableHeader)->Signature) {
+
+ case 0x5449504c: //EFI_ACPI_LOW_POWER_IDLE_TABLE_SIGNATURE
+ LoadTable = TRUE;
+ //LpitAcpiTable = (EFI_ACPI_DESCRIPTION_HEADER *) Table;
+ //LpitTableUpdate (LpitAcpiTable, &Version);
+ break;
+
+ default:
+ break;
+ }
+ }
+ ///
+ /// Update the LPIT table in the ACPI tables.
+ ///
+ if (LoadTable) {
+ TableHandle = 0;
+ Status = AcpiTable->InstallAcpiTable (
+ AcpiTable,
+ Table,
+ Table->Length,
+ &TableHandle
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ //
+ // Increment the instance
+ //
+ Instance++;
+ Table = NULL;
+ }
+ }
+}
+#endif
+
+#if defined PTID_SUPPORT && PTID_SUPPORT
+VOID LoadSsdtPtidTable()
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ UINTN Index;
+ EFI_FIRMWARE_VOLUME_PROTOCOL *FwVol;
+ EFI_ACPI_SUPPORT_PROTOCOL *AcpiSupport;
+ INTN Instance;
+ EFI_ACPI_COMMON_HEADER *Table;
+ UINTN Size;
+ EFI_FV_FILETYPE FileType;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINT32 FvStatus;
+ ACPI_HDR *TableHeader;
+ UINTN TableHandle;
+ EFI_ACPI_TABLE_VERSION Version;
+
+
+ AcpiSupport = NULL;
+ FwVol = NULL;
+ Table = NULL;
+
+ //
+ // Locate FV protocol.
+ //
+
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiFirmwareVolumeProtocolGuid,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Look for FV with ACPI storage file
+ //
+ for (Index = 0; Index < NumberOfHandles; Index++) {
+
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = pBS->HandleProtocol (
+ HandleBuffer[Index],
+ &gEfiFirmwareVolumeProtocolGuid,
+ &FwVol
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // See if it has the ACPI storage file
+ //
+ Size = 0;
+ FvStatus = 0;
+ Status = FwVol->ReadFile (
+ FwVol,
+ &gAcpiPtidFfsTableStorageGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+
+ //
+ // If we found it, then we are done
+ //
+
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+ //
+ // Free any allocated buffers
+ //
+ pBS->FreePool (HandleBuffer);
+
+ //
+ // Sanity check that we found our data file
+ //
+ ASSERT (FwVol);
+
+ //
+ // By default, a table belongs in all ACPI table versions published.
+ //
+ Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0;
+
+ //
+ // Find the AcpiSupport protocol
+ //
+ Status = LocateSupportProtocol (
+ &gEfiAcpiSupportGuid,
+ &AcpiSupport,
+ FALSE
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Read tables from the storage file.
+ //
+ Instance = 0;
+
+ while (Status == EFI_SUCCESS) {
+ //
+ // Read the ACPI tables
+ //
+ Status = FwVol->ReadSection (
+ FwVol,
+ &gAcpiPtidFfsTableStorageGuid,
+ EFI_SECTION_RAW,
+ Instance,
+ &Table,
+ &Size,
+ &FvStatus
+ );
+
+ if (!EFI_ERROR (Status)) {
+ //
+ // This should be a PTID SSDT table
+ //
+ TableHeader = (ACPI_HDR *) Table;
+ if (MemCmp (&TableHeader->OemTblId, "PtidDevc", 8) == 0) {
+ //
+ // This is PTID SSDT. We load the table
+ //
+ TableHandle = 0;
+ Status = AcpiSupport->SetAcpiTable (
+ AcpiSupport,
+ Table,
+ TRUE,
+ Version,
+ &TableHandle
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ //
+ // Increment the instance
+ //
+ Instance++;
+ Table = NULL;
+ }
+ }
+ Status = AcpiSupport->PublishTables (
+ AcpiSupport,
+ (EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0)
+ );
+ ASSERT_EFI_ERROR (Status);
+}
+
+EFI_STATUS
+LocateSupportProtocol (
+ IN EFI_GUID *Protocol,
+ OUT VOID **Instance,
+ IN BOOLEAN Type
+ )
+/*++
+
+Routine Description:
+
+ Locate the first instance of a protocol. If the protocol requested is an
+ FV protocol, then it will return the first FV that contains the ACPI table
+ storage file.
+
+Arguments:
+
+ Protocol The protocol to find.
+ Instance Return pointer to the first instance of the protocol
+ Type TRUE if the desired protocol is a FV protocol
+
+Returns:
+
+ EFI_SUCCESS The function completed successfully.
+ EFI_NOT_FOUND The protocol could not be located.
+ EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ EFI_FV_FILETYPE FileType;
+ UINT32 FvStatus;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINTN Size;
+ UINTN i;
+
+ FvStatus = 0;
+ //
+ // Locate protocol.
+ //
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ Protocol,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ if (EFI_ERROR (Status)) {
+ //
+ // Defined errors at this time are not found and out of resources.
+ //
+ return Status;
+ }
+ //
+ // Looking for FV with ACPI storage file
+ //
+ for (i = 0; i < NumberOfHandles; i++) {
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = pBS->HandleProtocol (
+ HandleBuffer[i],
+ Protocol,
+ Instance
+ );
+ ASSERT (!EFI_ERROR (Status));
+
+ if (!Type) {
+ //
+ // Not looking for the FV protocol, so find the first instance of the
+ // protocol. There should not be any errors because our handle buffer
+ // should always contain at least one or LocateHandleBuffer would have
+ // returned not found.
+ //
+ break;
+ }
+
+ //
+ // See if it has the ACPI storage file
+ //
+ Status = ((EFI_FIRMWARE_VOLUME_PROTOCOL *) (*Instance))->ReadFile (
+ *Instance,
+ &gAcpiPtidFfsTableStorageGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+
+ //
+ // If we found it, then we are done
+ //
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+
+ //
+ // Free any allocated buffers
+ //
+ pBS->FreePool (HandleBuffer);
+
+ return Status;
+}
+#endif
+
+#if defined IntelRMT_SUPPORT && IntelRMT_SUPPORT
+VOID LoadSsdtIRMTTable()
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ UINTN Index;
+ EFI_FIRMWARE_VOLUME_PROTOCOL *FwVol;
+ EFI_ACPI_SUPPORT_PROTOCOL *AcpiSupport;
+ INTN Instance;
+ EFI_ACPI_COMMON_HEADER *Table;
+ UINTN Size;
+ EFI_FV_FILETYPE FileType;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINT32 FvStatus;
+ ACPI_HDR *TableHeader;
+ UINTN TableHandle;
+ EFI_ACPI_TABLE_VERSION Version;
+
+
+ AcpiSupport = NULL;
+ FwVol = NULL;
+ Table = NULL;
+
+ //
+ // Locate FV protocol.
+ //
+
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiFirmwareVolumeProtocolGuid,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Look for FV with ACPI storage file
+ //
+ for (Index = 0; Index < NumberOfHandles; Index++) {
+
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = pBS->HandleProtocol (
+ HandleBuffer[Index],
+ &gEfiFirmwareVolumeProtocolGuid,
+ &FwVol
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // See if it has the ACPI storage file
+ //
+ Size = 0;
+ FvStatus = 0;
+ Status = FwVol->ReadFile (
+ FwVol,
+ &gAcpiIRMTFfsTableStorageGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+
+ //
+ // If we found it, then we are done
+ //
+
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+ //
+ // Free any allocated buffers
+ //
+ pBS->FreePool (HandleBuffer);
+
+ //
+ // Sanity check that we found our data file
+ //
+ ASSERT (FwVol);
+
+ //
+ // By default, a table belongs in all ACPI table versions published.
+ //
+ Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0;
+
+ //
+ // Find the AcpiSupport protocol
+ //
+ Status = LocateIRMTSupportProtocol (
+ &gEfiAcpiSupportGuid,
+ &AcpiSupport,
+ FALSE
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Read tables from the storage file.
+ //
+ Instance = 0;
+
+ while (Status == EFI_SUCCESS) {
+ //
+ // Read the ACPI tables
+ //
+ Status = FwVol->ReadSection (
+ FwVol,
+ &gAcpiIRMTFfsTableStorageGuid,
+ EFI_SECTION_RAW,
+ Instance,
+ &Table,
+ &Size,
+ &FvStatus
+ );
+
+ if (!EFI_ERROR (Status)) {
+ //
+ // This should be a PTID SSDT table
+ //
+ TableHeader = (ACPI_HDR *) Table;
+ if (MemCmp (&TableHeader->OemTblId, "IntelRMT", 8) == 0) {
+ //
+ // This is Intel RMT SSDT. We load the table
+ //
+ TableHandle = 0;
+ Status = AcpiSupport->SetAcpiTable (
+ AcpiSupport,
+ Table,
+ TRUE,
+ Version,
+ &TableHandle
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ //
+ // Increment the instance
+ //
+ Instance++;
+ Table = NULL;
+ }
+ }
+ Status = AcpiSupport->PublishTables (
+ AcpiSupport,
+ (EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0)
+ );
+ ASSERT_EFI_ERROR (Status);
+}
+
+EFI_STATUS
+LocateIRMTSupportProtocol (
+ IN EFI_GUID *Protocol,
+ OUT VOID **Instance,
+ IN BOOLEAN Type
+ )
+/*++
+
+Routine Description:
+
+ Locate the first instance of a protocol. If the protocol requested is an
+ FV protocol, then it will return the first FV that contains the ACPI table
+ storage file.
+
+Arguments:
+
+ Protocol The protocol to find.
+ Instance Return pointer to the first instance of the protocol
+ Type TRUE if the desired protocol is a FV protocol
+
+Returns:
+
+ EFI_SUCCESS The function completed successfully.
+ EFI_NOT_FOUND The protocol could not be located.
+ EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ EFI_FV_FILETYPE FileType;
+ UINT32 FvStatus;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINTN Size;
+ UINTN i;
+
+ FvStatus = 0;
+ //
+ // Locate protocol.
+ //
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ Protocol,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ if (EFI_ERROR (Status)) {
+ //
+ // Defined errors at this time are not found and out of resources.
+ //
+ return Status;
+ }
+ //
+ // Looking for FV with ACPI storage file
+ //
+ for (i = 0; i < NumberOfHandles; i++) {
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = pBS->HandleProtocol (
+ HandleBuffer[i],
+ Protocol,
+ Instance
+ );
+ ASSERT (!EFI_ERROR (Status));
+
+ if (!Type) {
+ //
+ // Not looking for the FV protocol, so find the first instance of the
+ // protocol. There should not be any errors because our handle buffer
+ // should always contain at least one or LocateHandleBuffer would have
+ // returned not found.
+ //
+ break;
+ }
+
+ //
+ // See if it has the ACPI storage file
+ //
+ Status = ((EFI_FIRMWARE_VOLUME_PROTOCOL *) (*Instance))->ReadFile (
+ *Instance,
+ &gAcpiPtidFfsTableStorageGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+
+ //
+ // If we found it, then we are done
+ //
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+
+ //
+ // Free any allocated buffers
+ //
+ pBS->FreePool (HandleBuffer);
+
+ return Status;
+}
+#endif
+
+
+#if defined INTELSENSORHUB_SUPPORT && INTELSENSORHUB_SUPPORT
+VOID LoadSsdtIntelSensorHubTable()
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ UINTN Index;
+ EFI_FIRMWARE_VOLUME_PROTOCOL *FwVol;
+ EFI_ACPI_SUPPORT_PROTOCOL *AcpiSupport;
+ INTN Instance;
+ EFI_ACPI_COMMON_HEADER *Table;
+ UINTN Size;
+ EFI_FV_FILETYPE FileType;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINT32 FvStatus;
+ ACPI_HDR *TableHeader;
+ UINTN TableHandle;
+ EFI_ACPI_TABLE_VERSION Version;
+
+
+ AcpiSupport = NULL;
+ FwVol = NULL;
+ Table = NULL;
+
+ //
+ // Locate FV protocol.
+ //
+
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiFirmwareVolumeProtocolGuid,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Look for FV with ACPI storage file
+ //
+ for (Index = 0; Index < NumberOfHandles; Index++) {
+
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = pBS->HandleProtocol (
+ HandleBuffer[Index],
+ &gEfiFirmwareVolumeProtocolGuid,
+ &FwVol
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // See if it has the ACPI storage file
+ //
+ Size = 0;
+ FvStatus = 0;
+ Status = FwVol->ReadFile (
+ FwVol,
+ &gAcpiIntelSensorHubFfsTableGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+
+ //
+ // If we found it, then we are done
+ //
+
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+ //
+ // Free any allocated buffers
+ //
+ pBS->FreePool (HandleBuffer);
+
+ //
+ // Sanity check that we found our data file
+ //
+ ASSERT (FwVol);
+
+ //
+ // By default, a table belongs in all ACPI table versions published.
+ //
+ Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0;
+
+ //
+ // Find the AcpiSupport protocol
+ //
+ Status = LocateIntelSensorHubSupportProtocol (
+ &gEfiAcpiSupportGuid,
+ &AcpiSupport,
+ FALSE
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Read tables from the storage file.
+ //
+ Instance = 0;
+
+ while (Status == EFI_SUCCESS) {
+ //
+ // Read the ACPI tables
+ //
+ Status = FwVol->ReadSection (
+ FwVol,
+ &gAcpiIntelSensorHubFfsTableGuid,
+ EFI_SECTION_RAW,
+ Instance,
+ &Table,
+ &Size,
+ &FvStatus
+ );
+
+ if (!EFI_ERROR (Status)) {
+ //
+ // This should be a PTID SSDT table
+ //
+ TableHeader = (ACPI_HDR *) Table;
+ if (MemCmp (&TableHeader->OemTblId, "sensrhub", 8) == 0) {
+ //
+ // This is PTID SSDT. We load the table
+ //
+ TableHandle = 0;
+ Status = AcpiSupport->SetAcpiTable (
+ AcpiSupport,
+ Table,
+ TRUE,
+ Version,
+ &TableHandle
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ //
+ // Increment the instance
+ //
+ Instance++;
+ Table = NULL;
+ }
+ }
+ Status = AcpiSupport->PublishTables (
+ AcpiSupport,
+ (EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0)
+ );
+ ASSERT_EFI_ERROR (Status);
+}
+
+EFI_STATUS
+LocateIntelSensorHubSupportProtocol (
+ IN EFI_GUID *Protocol,
+ OUT VOID **Instance,
+ IN BOOLEAN Type
+ )
+/*++
+
+Routine Description:
+
+ Locate the first instance of a protocol. If the protocol requested is an
+ FV protocol, then it will return the first FV that contains the ACPI table
+ storage file.
+
+Arguments:
+
+ Protocol The protocol to find.
+ Instance Return pointer to the first instance of the protocol
+ Type TRUE if the desired protocol is a FV protocol
+
+Returns:
+
+ EFI_SUCCESS The function completed successfully.
+ EFI_NOT_FOUND The protocol could not be located.
+ EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ EFI_FV_FILETYPE FileType;
+ UINT32 FvStatus;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINTN Size;
+ UINTN i;
+
+ FvStatus = 0;
+ //
+ // Locate protocol.
+ //
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ Protocol,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ if (EFI_ERROR (Status)) {
+ //
+ // Defined errors at this time are not found and out of resources.
+ //
+ return Status;
+ }
+ //
+ // Looking for FV with ACPI storage file
+ //
+ for (i = 0; i < NumberOfHandles; i++) {
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = pBS->HandleProtocol (
+ HandleBuffer[i],
+ Protocol,
+ Instance
+ );
+ ASSERT (!EFI_ERROR (Status));
+
+ if (!Type) {
+ //
+ // Not looking for the FV protocol, so find the first instance of the
+ // protocol. There should not be any errors because our handle buffer
+ // should always contain at least one or LocateHandleBuffer would have
+ // returned not found.
+ //
+ break;
+ }
+
+ //
+ // See if it has the ACPI storage file
+ //
+ Status = ((EFI_FIRMWARE_VOLUME_PROTOCOL *) (*Instance))->ReadFile (
+ *Instance,
+ &gAcpiIntelSensorHubFfsTableGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+
+ //
+ // If we found it, then we are done
+ //
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+
+ //
+ // Free any allocated buffers
+ //
+ pBS->FreePool (HandleBuffer);
+
+ return Status;
+}
+
+#endif
+
+#if defined ZPODD_SUPPORT && ZPODD_SUPPORT
+VOID LoadSsdtZpOddTable()
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ UINTN Index;
+ EFI_FIRMWARE_VOLUME_PROTOCOL *FwVol;
+ EFI_ACPI_SUPPORT_PROTOCOL *AcpiSupport;
+ INTN Instance;
+ EFI_ACPI_COMMON_HEADER *Table;
+ UINTN Size;
+ EFI_FV_FILETYPE FileType;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINT32 FvStatus;
+ ACPI_HDR *TableHeader;
+ UINTN TableHandle;
+ EFI_ACPI_TABLE_VERSION Version;
+ BOOLEAN LoadTable;
+ PCH_SERIES PchSeries = GetPchSeries();
+
+
+ AcpiSupport = NULL;
+ FwVol = NULL;
+ Table = NULL;
+
+ //
+ // Locate FV protocol.
+ //
+
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiFirmwareVolumeProtocolGuid,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Look for FV with ACPI storage file
+ //
+ for (Index = 0; Index < NumberOfHandles; Index++) {
+
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = pBS->HandleProtocol (
+ HandleBuffer[Index],
+ &gEfiFirmwareVolumeProtocolGuid,
+ &FwVol
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // See if it has the ACPI storage file
+ //
+ Size = 0;
+ FvStatus = 0;
+ Status = FwVol->ReadFile (
+ FwVol,
+ &gAcpiZpOddFfsTableGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+
+ //
+ // If we found it, then we are done
+ //
+
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+ //
+ // Free any allocated buffers
+ //
+ pBS->FreePool (HandleBuffer);
+
+ //
+ // Sanity check that we found our data file
+ //
+ ASSERT (FwVol);
+
+ //
+ // By default, a table belongs in all ACPI table versions published.
+ //
+ Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0;
+
+ //
+ // Find the AcpiSupport protocol
+ //
+ Status = LocateZPODDSupportProtocol (
+ &gEfiAcpiSupportGuid,
+ &AcpiSupport,
+ FALSE
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Read tables from the storage file.
+ //
+ Instance = 0;
+
+ while (Status == EFI_SUCCESS) {
+ //
+ // Read the ACPI tables
+ //
+ Status = FwVol->ReadSection (
+ FwVol,
+ &gAcpiZpOddFfsTableGuid,
+ EFI_SECTION_RAW,
+ Instance,
+ &Table,
+ &Size,
+ &FvStatus
+ );
+
+ if (!EFI_ERROR (Status)) {
+ //
+ // This should be a ZPODD SSDT table
+ //
+ LoadTable = FALSE;
+ TableHeader = (ACPI_HDR *) Table;
+#if defined STD_ZPODD_SUPPORT && STD_ZPODD_SUPPORT
+ if ((MemCmp (&TableHeader->OemTblId, "zpodd", 8) == 0) && (PchSeries == PchH)){
+ LoadTable = TRUE;
+ }
+#endif
+#if defined ULT_ZPODD_SUPPORT && ULT_ZPODD_SUPPORT
+ if ((MemCmp (&TableHeader->OemTblId, "zpoddult", 8) == 0) && (PchSeries == PchLp)) {
+ LoadTable = TRUE;
+ }
+#endif
+ //
+ // This is ZPODD SSDT. We load the table
+ //
+ if (LoadTable) {
+ TableHandle = 0;
+ Status = AcpiSupport->SetAcpiTable (
+ AcpiSupport,
+ Table,
+ TRUE,
+ Version,
+ &TableHandle
+ );
+ ASSERT_EFI_ERROR (Status);
+ Status = AcpiSupport->PublishTables (
+ AcpiSupport,
+ (EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0)
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ //
+ // Increment the instance
+ //
+ Instance++;
+ Table = NULL;
+ }
+ }
+}
+
+EFI_STATUS
+LocateZPODDSupportProtocol (
+ IN EFI_GUID *Protocol,
+ OUT VOID **Instance,
+ IN BOOLEAN Type
+ )
+/*++
+
+Routine Description:
+
+ Locate the first instance of a protocol. If the protocol requested is an
+ FV protocol, then it will return the first FV that contains the ACPI table
+ storage file.
+
+Arguments:
+
+ Protocol The protocol to find.
+ Instance Return pointer to the first instance of the protocol
+ Type TRUE if the desired protocol is a FV protocol
+
+Returns:
+
+ EFI_SUCCESS The function completed successfully.
+ EFI_NOT_FOUND The protocol could not be located.
+ EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ EFI_FV_FILETYPE FileType;
+ UINT32 FvStatus;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINTN Size;
+ UINTN i;
+
+ FvStatus = 0;
+ //
+ // Locate protocol.
+ //
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ Protocol,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ if (EFI_ERROR (Status)) {
+ //
+ // Defined errors at this time are not found and out of resources.
+ //
+ return Status;
+ }
+ //
+ // Looking for FV with ACPI storage file
+ //
+ for (i = 0; i < NumberOfHandles; i++) {
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = pBS->HandleProtocol (
+ HandleBuffer[i],
+ Protocol,
+ Instance
+ );
+ ASSERT (!EFI_ERROR (Status));
+
+ if (!Type) {
+ //
+ // Not looking for the FV protocol, so find the first instance of the
+ // protocol. There should not be any errors because our handle buffer
+ // should always contain at least one or LocateHandleBuffer would have
+ // returned not found.
+ //
+ break;
+ }
+
+ //
+ // See if it has the ACPI storage file
+ //
+ Status = ((EFI_FIRMWARE_VOLUME_PROTOCOL *) (*Instance))->ReadFile (
+ *Instance,
+ &gAcpiZpOddFfsTableGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+
+ //
+ // If we found it, then we are done
+ //
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+
+ //
+ // Free any allocated buffers
+ //
+ pBS->FreePool (HandleBuffer);
+
+ return Status;
+}
+
+#endif
+
+#if defined (RTD3_SUPPORT) && (RTD3_SUPPORT==1)
+VOID LoadSsdtRtd3Table()
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ UINTN Index;
+ EFI_FIRMWARE_VOLUME_PROTOCOL *FwVol;
+ EFI_ACPI_SUPPORT_PROTOCOL *AcpiSupport;
+ INTN Instance;
+ EFI_ACPI_COMMON_HEADER *Table;
+ UINTN Size;
+ EFI_FV_FILETYPE FileType;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINT32 FvStatus;
+ ACPI_HDR *TableHeader;
+ UINTN TableHandle;
+ EFI_ACPI_TABLE_VERSION Version;
+
+
+ AcpiSupport = NULL;
+ FwVol = NULL;
+ Table = NULL;
+
+ //
+ // Locate FV protocol.
+ //
+
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiFirmwareVolumeProtocolGuid,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Look for FV with ACPI RTD3 file
+ //
+ for (Index = 0; Index < NumberOfHandles; Index++) {
+
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = pBS->HandleProtocol (
+ HandleBuffer[Index],
+ &gEfiFirmwareVolumeProtocolGuid,
+ &FwVol
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // See if it has the ACPI RTD3 file
+ //
+ Size = 0;
+ FvStatus = 0;
+ Status = FwVol->ReadFile (
+ FwVol,
+ &gAcpiRtd3FfsTableGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+
+ //
+ // If we found it, then we are done
+ //
+
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+ //
+ // Free any allocated buffers
+ //
+ pBS->FreePool (HandleBuffer);
+
+ //
+ // Sanity check that we found our data file
+ //
+ ASSERT (FwVol);
+
+ //
+ // By default, a table belongs in all ACPI table versions published.
+ //
+ Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0;
+
+ //
+ // Find the AcpiSupport protocol
+ //
+ Status = LocateRTD3SupportProtocol (
+ &gEfiAcpiSupportGuid,
+ &AcpiSupport,
+ FALSE
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Read tables from the RTD3 file.
+ //
+ Instance = 0;
+
+ while (Status == EFI_SUCCESS) {
+ //
+ // Read the ACPI tables
+ //
+ Status = FwVol->ReadSection (
+ FwVol,
+ &gAcpiRtd3FfsTableGuid,
+ EFI_SECTION_RAW,
+ Instance,
+ &Table,
+ &Size,
+ &FvStatus
+ );
+
+ if (!EFI_ERROR (Status)) {
+ //
+ // This should be a RTD3 SSDT table
+ //
+ TableHeader = (ACPI_HDR *) Table;
+#if ULT0RTD3_SUPPORT
+ if (MemCmp (&TableHeader->OemTblId, "Ult0Rtd3", 8) == 0) {
+#endif
+#if BRRTD3_SUPPORT
+ if (MemCmp (&TableHeader->OemTblId, "BR0_Rtd3", 8) == 0) {
+#endif
+#if RTD3FFRD_SUPPORT
+ if (MemCmp (&TableHeader->OemTblId, "HSW-FFRD", 8) == 0) {
+#endif
+ //
+ // This is RTD3 SSDT. We load the table
+ //
+ TableHandle = 0;
+ Status = AcpiSupport->SetAcpiTable (
+ AcpiSupport,
+ Table,
+ TRUE,
+ Version,
+ &TableHandle
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ //
+ // Increment the instance
+ //
+ Instance++;
+ Table = NULL;
+ }
+ }
+ Status = AcpiSupport->PublishTables (
+ AcpiSupport,
+ (EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0)
+ );
+ ASSERT_EFI_ERROR (Status);
+}
+
+EFI_STATUS
+LocateRTD3SupportProtocol (
+ IN EFI_GUID *Protocol,
+ OUT VOID **Instance,
+ IN BOOLEAN Type
+ )
+/*++
+
+Routine Description:
+
+ Locate the first instance of a protocol. If the protocol requested is an
+ FV protocol, then it will return the first FV that contains the ACPI table
+ storage file.
+
+Arguments:
+
+ Protocol The protocol to find.
+ Instance Return pointer to the first instance of the protocol
+ Type TRUE if the desired protocol is a FV protocol
+
+Returns:
+
+ EFI_SUCCESS The function completed successfully.
+ EFI_NOT_FOUND The protocol could not be located.
+ EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ EFI_FV_FILETYPE FileType;
+ UINT32 FvStatus;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINTN Size;
+ UINTN i;
+
+ FvStatus = 0;
+ //
+ // Locate protocol.
+ //
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ Protocol,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ if (EFI_ERROR (Status)) {
+ //
+ // Defined errors at this time are not found and out of resources.
+ //
+ return Status;
+ }
+ //
+ // Looking for FV with ACPI storage file
+ //
+ for (i = 0; i < NumberOfHandles; i++) {
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = pBS->HandleProtocol (
+ HandleBuffer[i],
+ Protocol,
+ Instance
+ );
+ ASSERT (!EFI_ERROR (Status));
+
+ if (!Type) {
+ //
+ // Not looking for the FV protocol, so find the first instance of the
+ // protocol. There should not be any errors because our handle buffer
+ // should always contain at least one or LocateHandleBuffer would have
+ // returned not found.
+ //
+ break;
+ }
+
+ //
+ // See if it has the ACPI RTD3 file
+ //
+ Status = ((EFI_FIRMWARE_VOLUME_PROTOCOL *) (*Instance))->ReadFile (
+ *Instance,
+ &gAcpiRtd3FfsTableGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+
+ //
+ // If we found it, then we are done
+ //
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+
+ //
+ // Free any allocated buffers
+ //
+ pBS->FreePool (HandleBuffer);
+
+ return Status;
+}
+#endif
+
+#if defined ACPIDEBUG_SUPPORT && ACPIDEBUG_SUPPORT
+VOID LoadSsdtAcpiDebugTable()
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ UINTN Index;
+ EFI_FIRMWARE_VOLUME_PROTOCOL *FwVol;
+ EFI_ACPI_SUPPORT_PROTOCOL *AcpiSupport;
+ INTN Instance;
+ EFI_ACPI_COMMON_HEADER *Table;
+ UINTN Size;
+ EFI_FV_FILETYPE FileType;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINT32 FvStatus;
+ ACPI_HDR *TableHeader;
+ UINTN TableHandle;
+ EFI_ACPI_TABLE_VERSION Version;
+ EFI_PHYSICAL_ADDRESS BaseAddressMem = 0;
+ UINT32 BufferIndex;
+ UINT32 BufferEnd;
+ UINT8 *CurrPtr;
+ UINT32 *Signature;
+ NAME_LAYOUT *NamePtr;
+ UINT8 UpdateCounter;
+
+
+ AcpiSupport = NULL;
+ FwVol = NULL;
+ Table = NULL;
+
+ //
+ // Reserve 64kb buffer of system memory to store Acpi Debug data.
+ //
+ BaseAddressMem = 0xFFFFFFFF;
+ Status = pBS->AllocatePages (
+ AllocateMaxAddress,
+ EfiReservedMemoryType,
+ EFI_SIZE_TO_PAGES (AcpiDebugBufferSize),
+ &BaseAddressMem
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ BufferIndex = (UINT32) BaseAddressMem;
+ BufferEnd = BufferIndex + AcpiDebugBufferSize;
+ //
+ // Clear the 64kb buffer
+ //
+ pBS->SetMem ((VOID *)(UINTN)BaseAddressMem, AcpiDebugBufferSize, 0x78);
+ //
+ // Write a signature to the first line of the buffer, "INTEL ACPI DEBUG".
+ //
+ pBS->CopyMem ((VOID *)(UINTN)BufferIndex, ACPI_DEBUG_STR, sizeof(ACPI_DEBUG_STR) - 1);
+ //
+ // leave the Index after the signature
+ //
+ BufferIndex += sizeof(ACPI_DEBUG_STR) - 1;
+ TRACE((TRACE_ALWAYS, "ACPI Debug address =0x%08X\n", BaseAddressMem));
+
+ //
+ // Locate FV protocol.
+ //
+
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiFirmwareVolumeProtocolGuid,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Look for FV with ACPIDebug file
+ //
+ for (Index = 0; Index < NumberOfHandles; Index++) {
+
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = pBS->HandleProtocol (
+ HandleBuffer[Index],
+ &gEfiFirmwareVolumeProtocolGuid,
+ &FwVol
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // See if it has the ACPI Debug file
+ //
+ Size = 0;
+ FvStatus = 0;
+ Status = FwVol->ReadFile (
+ FwVol,
+ &gAcpiDebugFfsTableGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+
+ //
+ // If we found it, then we are done
+ //
+
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+ //
+ // Free any allocated buffers
+ //
+ pBS->FreePool (HandleBuffer);
+
+ //
+ // Sanity check that we found our data file
+ //
+ ASSERT (FwVol);
+
+ //
+ // By default, a table belongs in all ACPI table versions published.
+ //
+ Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0;
+
+ //
+ // Find the AcpiSupport protocol
+ //
+ Status = LocateAcpiDebugSupportProtocol (
+ &gEfiAcpiSupportGuid,
+ &AcpiSupport,
+ FALSE
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Read tables from the AcpiDebug file.
+ //
+ Instance = 0;
+
+ while (Status == EFI_SUCCESS) {
+ //
+ // Read the ACPI tables
+ //
+ Status = FwVol->ReadSection (
+ FwVol,
+ &gAcpiDebugFfsTableGuid,
+ EFI_SECTION_RAW,
+ Instance,
+ &Table,
+ &Size,
+ &FvStatus
+ );
+
+ if (!EFI_ERROR (Status)) {
+ //
+ // This should be a AcpiDebug SSDT table
+ //
+ TableHeader = (ACPI_HDR *) Table;
+ if (MemCmp (&TableHeader->OemTblId, "ADebTabl", 8) == 0) {
+ //
+ // Patch some pointers for the ASL code before loading the SSDT.
+ //
+ UpdateCounter = 1;
+ for (CurrPtr = (UINT8 *) TableHeader; CurrPtr <= ((UINT8 *) TableHeader + TableHeader->Length), UpdateCounter < 4; CurrPtr++) {
+ Signature = (UINT32 *) (CurrPtr + 1);
+ //
+ // patch DPTR (address of Acpi debug memory buffer)
+ //
+ if ((*CurrPtr == AML_NAME_OP) && *Signature == EFI_SIGNATURE_32 ('D', 'P', 'T', 'R')) {
+ NamePtr = (NAME_LAYOUT *) CurrPtr;
+ NamePtr->Value = (UINT32) BaseAddressMem;
+ UpdateCounter++;
+ }
+ //
+ // patch EPTR (end of Acpi debug memory buffer)
+ //
+ if ((*CurrPtr == AML_NAME_OP) && *Signature == EFI_SIGNATURE_32 ('E', 'P', 'T', 'R')) {
+ NamePtr = (NAME_LAYOUT *) CurrPtr;
+ NamePtr->Value = (UINT32) BufferEnd;
+ UpdateCounter++;
+ }
+ //
+ // patch CPTR (used as an index that starts after the buffer signature)
+ //
+ if ((*CurrPtr == AML_NAME_OP) && *Signature == EFI_SIGNATURE_32 ('C', 'P', 'T', 'R')) {
+ NamePtr = (NAME_LAYOUT *) CurrPtr;
+ NamePtr->Value = (UINT32) BufferIndex;
+ UpdateCounter++;
+ }
+ }
+ //
+ // This is AcpiDebug SSDT. We load the table
+ //
+ TableHandle = 0;
+ Status = AcpiSupport->SetAcpiTable (
+ AcpiSupport,
+ Table,
+ TRUE,
+ Version,
+ &TableHandle
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ //
+ // Increment the instance
+ //
+ Instance++;
+ Table = NULL;
+ }
+ }
+ Status = AcpiSupport->PublishTables (
+ AcpiSupport,
+ (EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0)
+ );
+ ASSERT_EFI_ERROR (Status);
+}
+
+EFI_STATUS
+LocateAcpiDebugSupportProtocol (
+ IN EFI_GUID *Protocol,
+ OUT VOID **Instance,
+ IN BOOLEAN Type
+ )
+/*++
+
+Routine Description:
+
+ Locate the first instance of a protocol. If the protocol requested is an
+ FV protocol, then it will return the first FV that contains the ACPI table
+ storage file.
+
+Arguments:
+
+ Protocol The protocol to find.
+ Instance Return pointer to the first instance of the protocol
+ Type TRUE if the desired protocol is a FV protocol
+
+Returns:
+
+ EFI_SUCCESS The function completed successfully.
+ EFI_NOT_FOUND The protocol could not be located.
+ EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
+
+--*/
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ EFI_FV_FILETYPE FileType;
+ UINT32 FvStatus;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINTN Size;
+ UINTN i;
+
+ FvStatus = 0;
+ //
+ // Locate protocol.
+ //
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ Protocol,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ if (EFI_ERROR (Status)) {
+ //
+ // Defined errors at this time are not found and out of resources.
+ //
+ return Status;
+ }
+ //
+ // Looking for FV with ACPI storage file
+ //
+ for (i = 0; i < NumberOfHandles; i++) {
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = pBS->HandleProtocol (
+ HandleBuffer[i],
+ Protocol,
+ Instance
+ );
+ ASSERT (!EFI_ERROR (Status));
+
+ if (!Type) {
+ //
+ // Not looking for the FV protocol, so find the first instance of the
+ // protocol. There should not be any errors because our handle buffer
+ // should always contain at least one or LocateHandleBuffer would have
+ // returned not found.
+ //
+ break;
+ }
+
+ //
+ // See if it has the ACPI RTD3 file
+ //
+ Status = ((EFI_FIRMWARE_VOLUME_PROTOCOL *) (*Instance))->ReadFile (
+ *Instance,
+ &gAcpiDebugFfsTableGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+
+ //
+ // If we found it, then we are done
+ //
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+
+ //
+ // Free any allocated buffers
+ //
+ pBS->FreePool (HandleBuffer);
+
+ return Status;
+}
+#endif
+
+VOID *GetDSDTTable ()
+{
+ INTN Index;
+ PACPI_HDR Table;
+ EFI_ACPI_TABLE_VERSION Version;
+ UINTN Handle;
+ EFI_STATUS Status;
+
+ for (Index = 0;;++Index) {
+ Status = gEfiAcpiSupport->GetAcpiTable(gEfiAcpiSupport,
+ Index,
+ &Table,
+ &Version,
+ &Handle);
+ if (EFI_ERROR(Status)) return 0;
+ if (((PACPI_HDR)Table)->Signature == FACP_SIG) return(VOID*)(UINTN)((PFACP32)Table)->DSDT;
+
+ }
+}
+
+VOID
+DsdtTableUpdate (
+ PACPI_HDR DsdtTable
+ )
+/*++
+
+ Routine Description:
+
+ Update the DSDT table
+
+ Arguments:
+
+ DsdtTable - The table points to DSDT table.
+
+ Returns:
+
+ None
+
+--*/
+{
+ UINT8 *CurrPtr;
+ UINT8 *DsdtPointer;
+ UINT32 *Signature;
+ UINT8 *Operation;
+ //
+ // Loop through the ASL looking for values that we must fix up.
+ //
+ CurrPtr = (UINT8 *) DsdtTable;
+ for (DsdtPointer = CurrPtr;
+ DsdtPointer <= (CurrPtr + ((EFI_ACPI_COMMON_HEADER *) CurrPtr)->Length);
+ DsdtPointer++
+ ) {
+ Signature = (UINT32 *) DsdtPointer;
+ //
+ // SNB_TODO
+ // SV Boards need it?
+ //
+
+ //
+ // Desktop specific update can be put here.
+ //
+ switch (*Signature) {
+ //
+ // GPIO14 is not used on desktop, so related stuff should be removed in DSDT.
+ //
+ case (EFI_SIGNATURE_32 ('_', 'P', 'R', 'W')):
+ //
+ // Check if the next object to signature is the NAME of PWRB device.
+ //
+ Operation = DsdtPointer - 1;
+ if ((*Operation == AML_NAME_OP) && (*(DsdtPointer + 8) == 0x1E)) {
+ //
+ // Rename _PRW (unrecognized name so OS will ignore)
+ //
+ *DsdtPointer = 'O';
+ }
+ break;
+ case (EFI_SIGNATURE_32 ('_', 'L', '1', 'E')):
+ //
+ // Rename _L1E method (unrecognized method so OS will ignore)
+ //
+ *DsdtPointer = 'O';
+ break;
+ default:
+ break;
+ }
+ }
+ return;
+}
+
+/*
+VOID
+DsdtTableUpdate1 (
+ PACPI_HDR DsdtTable
+ )
+{
+ UINT8 *CurrPtr;
+ UINT8 *DsdtPointer;
+ UINT32 *Signature, *Signature1;
+
+ CurrPtr = (UINT8 *) DsdtTable;
+
+ for (DsdtPointer = CurrPtr;
+ DsdtPointer <= (CurrPtr + ((EFI_ACPI_COMMON_HEADER *) CurrPtr)->Length);
+ DsdtPointer++
+ ) {
+ Signature = (UINT32 *) (DsdtPointer + 3);
+ Signature1 = (UINT32 *) (DsdtPointer + 14);
+ //
+ if ((*DsdtPointer == AML_EXT_OP) &&
+ (*(DsdtPointer + 1)== AML_EXT_PROCESSOR_OP) &&
+ (*(Signature1 ) == EFI_SIGNATURE_32 ('_', 'D', 'E', 'P'))
+ ) {
+ switch(*Signature){
+ case (EFI_SIGNATURE_32 ('C', 'P', 'U', '0')):
+ case (EFI_SIGNATURE_32 ('C', 'P', 'U', '1')):
+ case (EFI_SIGNATURE_32 ('C', 'P', 'U', '2')):
+ case (EFI_SIGNATURE_32 ('C', 'P', 'U', '3')):
+ case (EFI_SIGNATURE_32 ('C', 'P', 'U', '4')):
+ case (EFI_SIGNATURE_32 ('C', 'P', 'U', '5')):
+ case (EFI_SIGNATURE_32 ('C', 'P', 'U', '6')):
+ case (EFI_SIGNATURE_32 ('C', 'P', 'U', '7')):
+
+ TRACE((-1, "Processor CPU0 Point at 0x%08X\n", DsdtPointer));
+ *(DsdtPointer + 14) = 'X';
+ break;
+ default:
+ break;
+ }// end switch
+
+ }
+
+ }
+ return;
+}
+*/
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/AcpiPlatform.cif b/Board/EM/Platform/AcpiPlatform.cif
new file mode 100644
index 0000000..32c45ab
--- /dev/null
+++ b/Board/EM/Platform/AcpiPlatform.cif
@@ -0,0 +1,44 @@
+<component>
+ name = "Platform"
+ category = eModule
+ LocalRoot = "Board\EM\Platform"
+ RefName = "AcpiPlatform"
+[files]
+"ReleaseNotes.chm"
+"AcpiPlatform.sdl"
+"AcpiPlatformPei.c"
+"AcpiPlatformPei.dxs"
+"AcpiPlatform.c"
+"AcpiPlatformCspLib.c"
+"AcpiPlatform.dxs"
+"AcpiPlatformSmi.c"
+"AcpiPlatformSmi.dxs"
+"AcpiPlatform.mak"
+"AcpiPlatform.h"
+"AcpiPlatform.sd"
+"AcpiPlatform.uni"
+"PlatformSetup.h"
+"AcpiIntelRC.h"
+"iasl.exe"
+"GenAcpiTable.exe"
+[parts]
+"PlatformInfo"
+"AcpiAsl"
+"AcpiFvi"
+"SsdtAcpiDebug"
+"SsdtPtid"
+"SsdtRtd3"
+"SsdtZpOdd"
+"SsdtSensorHub"
+"AcpiProtocolLib"
+"SMBIOSUpdateData"
+"IntelPlatformInclude"
+"IntelPlatformProtocolLib"
+"IntelRefVerDisplay"
+"PlatformSetupInfo"
+"FvOnFv2Thunk"
+"FirmwareVerInfo"
+"EfiCombineImage"
+"lpit"
+"SsdtIRMT"
+<endComponent>
diff --git a/Board/EM/Platform/AcpiPlatform.dxs b/Board/EM/Platform/AcpiPlatform.dxs
new file mode 100644
index 0000000..350b726
--- /dev/null
+++ b/Board/EM/Platform/AcpiPlatform.dxs
@@ -0,0 +1,53 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatform.dxs 1 2/09/12 12:30a Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/09/12 12:30a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatform.dxs $
+//
+// 1 2/09/12 12:30a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+
+#include <Protocol\CpuIo.h>
+#include <protocol\AcpiSupport.h>
+#include <PlatformInfo.h>
+
+DEPENDENCY_START
+ EFI_CPU_IO_PROTOCOL_GUID AND
+ EFI_ACPI_SUPPORT_GUID AND
+ EFI_PLATFORM_INFO_PROTOCOL_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/AcpiPlatform.h b/Board/EM/Platform/AcpiPlatform.h
new file mode 100644
index 0000000..aa722b8
--- /dev/null
+++ b/Board/EM/Platform/AcpiPlatform.h
@@ -0,0 +1,240 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatform.h 12 7/11/14 4:00a Joshchou $
+//
+// $Revision: 12 $
+//
+// $Date: 7/11/14 4:00a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatform.h $
+//
+// 12 7/11/14 4:00a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Support Debug Port Table.
+// [Files] AcpiPlatform.c
+// AcpiPlatform.h
+// AcpiPlatform.cif
+//
+// 11 4/23/14 4:21a Joshchou
+//
+// 10 9/27/13 10:43a Joshchou
+// [TAG] EIP137454
+// [Category] New Feature
+// [Description] Follow Intel sample code to add LPIT table.
+//
+// 9 9/18/13 6:26a Joshchou
+// [TAG] EIP136411
+// [Category] Improvement
+// [Description] Support MWAIT LPI State Descriptor[1].
+//
+// 8 7/16/13 6:00a Alanlin
+// [TAG] EIP127540
+// [Category] Normal
+// [Severity] Normal
+// [Description] Windows* 8.1 Micro-PEP (uPEP) ASL Support Version 0.5
+// [Files] AcpiPlatform.c, AcpiPlatform.h
+//
+// 7 6/28/13 5:22a Alanlin
+// [TAG] None
+// [Category] Important
+// [Severity] Important
+// [Description] Fixed that Processors device are disappeared under OS
+// device manager.
+// [Files] AcpiPlatform.c, AcpiPlatform.h
+//
+// 6 11/20/12 7:08a Alanlin
+// [TAG] None
+// [Category] New Feature
+// [Severity] Important
+// [Description] SensorHub SSDT acpi table support
+// [Files] Acpiplatform.c, Acpiplatform.cif, Acpiplatform.h,
+// SsdtSensorHub.asl, SsdtSensorHub.mak, SsdtSensorHub.sdl
+//
+// [TAG] None
+// [Category] Important
+// [Severity] Important
+// [Description] Update Shark Bay Client ACPI Reference Code Beta Version
+// 0.8.0
+//
+// 5 11/09/12 5:18a Alanlin
+// [TAG] None
+// [Category] New Feature
+// [Severity] Important
+// [Description] ZpOdd SSDT acpi table support
+// [Files] Acpiplatform.c, Acpiplatform.cif, Acpiplatform.h,
+// Acpiplatform.sd, Acpiplatform.uni
+//
+// 4 10/31/12 4:40a Alanlin
+// [TAG] None
+// [Category] New Feature
+// [Severity] Normal
+// [Description] Support Acpi Debug SSDT.
+//
+// 3 9/12/12 7:21a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Remove AOAC for Intel Smart Connect Technology module.
+// [Files] GlobalNvsArea.h, GloblNvs.asl
+//
+// 2 8/31/12 4:48a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Implement Runtime D3.
+// [Files] AcpiPlatform.c, AcpiPlatform.cif, AcpiPlatform.h,
+// AcpiPlatform.sd, AcpiPlatform.sdl, AcpiPlatform.uni, GlobalNvsArea.h,
+// SsdtRtd3.cif, SsdtRtd3.mak, Ult0Rtd3.asl, SsdtRtd3.sdl
+//
+// 1 2/09/12 12:30a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AcpiPlatform.h
+//
+// Description: AcpiPlatform header file, define all the AcpiPlatform module
+// specific equates and structures in this file.
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#define EFI_MSR_IA32_PLATFORM_ID 0x17
+#define EFI_MSR_IA32_CR_PIC_MSG_CONTROL 0x2e
+#define EFI_MSR_CORE_THREAD_COUNT 0x35
+#define EFI_MSR_IA32_FEATURE_CONTROL 0x3a
+
+#define AML_NAME_OP 0x08
+#define AML_EXT_OP 0x5b
+#define AML_EXT_DEVICE_OP 0x82
+#define AML_EXT_PROCESSOR_OP 0x83
+#define AML_NOOP_OP 0xa3
+
+#define PCH_SMBUS_ENABLE_PEC 0x1
+
+//-jeff For EDK
+// Common table header, this prefaces all ACPI tables, including FACS, but
+// excluding the RSD PTR structure
+
+#ifndef EFI_SIGNATURE_16
+#define EFI_SIGNATURE_16(A, B) ((A) | (B << 8))
+#endif
+
+#ifndef EFI_SIGNATURE_32
+#define EFI_SIGNATURE_32(A, B, C, D) (EFI_SIGNATURE_16 (A, B) | (EFI_SIGNATURE_16 (C, D) << 16))
+#endif
+
+//
+// ACPI table information used to initialize tables.
+//
+#define EFI_ACPI_3_0_DEBUG_PORT_TABLE_SIGNATURE EFI_SIGNATURE_32('D', 'B', 'G', 'P')
+#define EFI_ACPI_DBGP_TABLE_REVISION 0x01
+#define EFI_ACPI_OEM_DBGP_REVISION 0x00000000
+#define EFI_ACPI_CREATOR_ID 0x5446534D // "MSFT"
+#define EFI_ACPI_CREATOR_REVISION 0x00000005F
+
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+} EFI_ACPI_COMMON_HEADER;
+
+typedef struct
+{
+ UINT32 Signature;
+ UINT32 Length;
+ UINT8 Revision;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT64 OemTableId;
+ UINT32 OemRevision;
+ UINT32 CreatorId;
+ UINT32 CreatorRevision;
+} EFI_ACPI_DESCRIPTION_HEADER;
+
+
+#pragma pack(1)
+typedef union _MSR_REGISTER {
+ UINT64 Qword;
+
+ struct _DWORDS {
+ UINT32 Low;
+ UINT32 High;
+ } Dwords;
+
+ struct _BYTES {
+ UINT8 FirstByte;
+ UINT8 SecondByte;
+ UINT8 ThirdByte;
+ UINT8 FouthByte;
+ UINT8 FifthByte;
+ UINT8 SixthByte;
+ UINT8 SeventhByte;
+ UINT8 EighthByte;
+ } Bytes;
+
+} MSR_REGISTER;
+
+///
+/// ACPI 2.0 Generic Address Space definition
+///
+typedef struct _EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE{
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 Reserved;
+ UINT64 Address;
+} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;
+
+typedef struct {
+ ACPI_HDR Header;
+ UINT8 InterfaceType;
+ UINT8 Reserved_37[3];
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE BaseAddress;
+} EFI_ACPI_DEBUG_PORT_DESCRIPTION_TABLE;
+
+
+#define PTID_FFS_TABLE_STORAGE_GUID \
+ { 0x95DFCAE5, 0xBB28, 0x4d6b, 0xB1, 0xE2, 0x3A, 0xF3, 0xA6, 0xBF, 0x43, 0x4F }
+#define RTD3_FFS_TABLE_GUID \
+ { 0x7FFC3536, 0x0A8A, 0x448B, 0x95, 0xF4, 0x39, 0xF5, 0xB9, 0xF0, 0x9A, 0xDD }
+#define ACPIDEBUG_FFS_TABLE_GUID \
+ { 0x94AB6AED, 0x9719, 0x48ef, 0x83, 0x1C, 0x2E, 0x9C, 0x29, 0x75, 0x8C, 0x33 }
+#define ZPODD_FFS_TABLE_GUID \
+ { 0xE42A76A1, 0xD4B3, 0x4c26, 0xA1, 0xBB, 0x84, 0xA3, 0x50, 0x2A, 0x77, 0x9F }
+#define INTELSENSORHUB_FFS_TABLE_GUID \
+ { 0xA3201EEC, 0x1612, 0x4577, 0x89, 0x24, 0xCB, 0x32, 0xD5, 0x42, 0xD2, 0x2C }
+#define IRMT_FFS_TABLE_STORAGE_GUID \
+ { 0xCE2007C7, 0xB389, 0x49c5, 0x84, 0xE3, 0xDB, 0x36, 0xA1, 0xF0, 0x99, 0x3B }
+#pragma pack()
+
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/AcpiPlatform.mak b/Board/EM/Platform/AcpiPlatform.mak
new file mode 100644
index 0000000..632eeb4
--- /dev/null
+++ b/Board/EM/Platform/AcpiPlatform.mak
@@ -0,0 +1,170 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatform.mak 5 12/18/12 11:03p Alanlin $
+#
+# $Revision: 5 $
+#
+# $Date: 12/18/12 11:03p $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatform.mak $
+#
+# 5 12/18/12 11:03p Alanlin
+# [TAG] EIP107188
+# [Category] Important
+# [Severity] Important
+# [Description] USB 3.0 port can't work when RTD3 is Enabled in setup
+# menu.
+# [Files] Acpiplatform.c, Acpiplatform.mak, Acpiplatform.sd,
+# Acpiplatform.uni.
+#
+# 4 10/15/12 11:41a Alanlin
+# [TAG] None
+# [Category] Spec Update
+# [Severity] Important
+# [Description] Updated for RC 0.7.1
+#
+# 3 4/25/12 1:28p Yurenlai
+# [TAG] None
+# [Category] Improvement
+# [Description] Initilize ACPI DXE Platform Policy.
+# [Files] AcpiPlatform.c, AcpiPlatform.mak
+#
+# 1 2/09/12 12:30a Yurenlai
+# Initial check in.
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: AcpiPlatform.mak
+#
+# Description: This make file builds AcpiPlatform module PEI & DXE and SMI
+# components and link them to respective binary
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+
+all : AcpiPlatformPei AcpiPlatform AcpiPlatformSmi
+
+#---------------------------------------------------------------------------
+# Generic AcpiPlatform dependencies
+#---------------------------------------------------------------------------
+
+$(BUILD_DIR)\AcpiPlatform.mak : $(AcpiPlatform_DIR)\AcpiPlatform.cif $(BUILD_RULES)
+ $(CIF2MAK) $(AcpiPlatform_DIR)\AcpiPlatform.cif $(CIF2MAK_DEFAULTS)
+
+#----------------------------------------------------------------------------
+# Add files into CSP Library
+#----------------------------------------------------------------------------
+AMI_CSP_LIB_LIBRARY_PATH = $(AMI_CSP_LIB_LIBRARY_PATH);$(AcpiPlatform_DIR)
+
+AMI_CSP_LIB_OBJS = $(AMI_CSP_LIB_OBJS) \
+$(BUILD_DIR)\AcpiPlatformCspLib.obj
+
+{$(AcpiPlatform_DIR)}.c{$(BUILD_DIR)}.obj::
+ $(CC) $(CFLAGS) /I $(AcpiPlatform_DIR) /Fo$(BUILD_DIR)\ $<
+
+$(BUILD_DIR)\AcpiPlatformCspLib.obj : $(AcpiPlatform_DIR)\AcpiPlatformCspLib.c
+
+CORE_DXEBin: $(AMICSPLib)
+
+#---------------------------------------------------------------------------
+# Create AcpiPlatform PEI Component
+#---------------------------------------------------------------------------
+AcpiPlatformPei : $(BUILD_DIR)\AcpiPlatform.mak AcpiPlatformPeiBin
+
+AcpiPlatformPeiBin : $(AMIPEILIB) $(AMICSPLib)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\AcpiPlatform.mak all\
+ NAME=AcpiPlatformPei\
+ MAKEFILE=$(BUILD_DIR)\AcpiPlatform.mak \
+ "CFLAGS=$(CFLAGS)"\
+ OBJECTS="$(AcpiPlatformPei_OBJECTS)" \
+ GUID=333BB2A3-4F20-4c8b-AC38-0672D74315F8\
+ ENTRY_POINT=AcpiPlatformPeiInit \
+ TYPE=PEIM \
+ DEPEX1=$(AcpiPlatform_DIR)\AcpiPlatformPei.DXS DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX \
+ COMPRESS=0
+
+#{333BB2A3-4F20-4c8b-AC38-0672D74315F8}
+#DEFINE_GUID(<<name>>,
+#0x333bb2a3, 0x4f20, 0x4c8b, 0xac, 0x38, 0x6, 0x72, 0xd7, 0x43, 0x15, 0xf8);
+#---------------------------------------------------------------------------
+# Create AcpiPlatform DXE Component
+#---------------------------------------------------------------------------
+AcpiPlatform: $(BUILD_DIR)\AcpiPlatform.mak AcpiPlatformBin
+
+AcpiPlatformBin : $(AMIDXELIB) $(AMICSPLib) $(DxeKscLib_LIB) $(AcpiProtocolLib_LIB) $(INTEL_SA_PROTOCOL_LIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\AcpiPlatform.mak all\
+ GUID=8B5FBABD-F51F-4942-BF16-16AAA38AE52B\
+ "MY_INCLUDES=$(INTEL_PLATFORM_PROTOCOL_INCLUDES) $(INTEL_PCH_INCLUDES) $(ACPI_PLATFORM_INCLUDES) $(AcpiProtocolLib_INCLUDES) $(PLATFORM_INFO_INCLUDES) $(DxeKscLib_INCLUDES) $(DPPM_DIR_INCLUDES) /I $(INTEL_SA_PROTOCOL_LIB_DIR)"\
+ ENTRY_POINT=AcpiPlatformInit\
+ OBJECTS="$(AcpiPlatform_OBJECTS)" \
+ TYPE=BS_DRIVER \
+ DEPEX1=$(AcpiPlatform_DIR)\AcpiPlatform.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ COMPRESS=1
+
+#----------------------------------------------------------------------------
+# Create AcpiPlatform SMI Component
+#----------------------------------------------------------------------------
+AcpiPlatformSmi : $(BUILD_DIR)\AcpiPlatform.mak AcpiPlatformSmiBin
+
+AcpiPlatformSmiBin : $(AMICSPLib) $(AMIDXELIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\AcpiPlatform.mak all\
+ NAME=AcpiPlatformSmi\
+ MAKEFILE=$(BUILD_DIR)\AcpiPlatform.mak \
+ OBJECTS="$(AcpiPlatformSmi_OBJECTS)" \
+ GUID=DFD8D5CC-5AED-4820-A2B6-5C55E4E640EF \
+ ENTRY_POINT=InitializeAcpiPlatformSMISmm \
+ "CFLAGS=$(CFLAGS) $(ACPI_PLATFORM_INCLUDES) $(PLATFORM_INFO_INCLUDES) $(SB_INCLUDES)"\
+ "EXT_HEADERS=$(BUILD_DIR)\token.h"\
+ TYPE=BS_DRIVER \
+ DEPEX1=$(AcpiPlatform_DIR)\AcpiPlatformSmi.DXS DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ COMPRESS=1
+
+#{DFD8D5CC-5AED-4820-A2B6-5C55E4E640EF}
+#DEFINE_GUID(<<name>>,
+#0xdfd8d5cc, 0x5aed, 0x4820, 0xa2, 0xb6, 0x5c, 0x55, 0xe4, 0xe6, 0x40, 0xef);
+
+#---------------------------------------------------------------------------
+# Create IgdOpRegion Setup Screens
+#---------------------------------------------------------------------------
+SetupSdbs : $(BUILD_DIR)\AcpiPlatform.mak AcpiPlatformSDB
+
+
+AcpiPlatformSDB :
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\AcpiPlatform.mak all \
+ TYPE=SDB NAME=AcpiPlatform STRING_CONSUMERS=$(AcpiPlatform_DIR)\AcpiPlatform.sd
+
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Platform/AcpiPlatform.sd b/Board/EM/Platform/AcpiPlatform.sd
new file mode 100644
index 0000000..1439c7f
--- /dev/null
+++ b/Board/EM/Platform/AcpiPlatform.sd
@@ -0,0 +1,1877 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatform.sd 16 5/15/14 3:14a Joshchou $
+//
+// $Revision: 16 $
+//
+// $Date: 5/15/14 3:14a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatform.sd $
+//
+// 16 5/15/14 3:14a Joshchou
+// [TAG] EIP167036
+// [Category] Improvement
+// [Description] review the attributes of variable.
+// [Files] AcpiPlatform.c
+// AcpiPlatform.h
+// AcpiPlatform.sd
+// AcpiPlatform.cif
+//
+// 15 4/23/14 4:21a Joshchou
+//
+// 14 7/16/13 5:59a Alanlin
+// [TAG] EIP125350
+// [Category] Normal
+// [Severity] Normal
+// [Description] System BIOS Support for the Hardware Button for Windows*
+// 8.1 - Rev.0.5
+// [Files] AcpiPlatform.c, AcpiPlatform.sd, AcpiPlatform.uni
+//
+// 13 6/04/13 10:19a Alanlin
+// [TAG] None
+// [Category] Improvement
+// [Severity] Normal
+// [Description] Follow Intel CRB BIOS v126 to set default configuraton
+// setting of RTD3 devices.
+// [Files] AcpiPlatform.c, AcpiPlatform.sd, AcpiPlatform.uni
+//
+// 12 4/24/13 7:03a Alanlin
+// [TAG] None
+// [Category] Normal
+// [Severity] Normal
+// [Description] Change "Native PCIE Enable" and "Native ASPM" to Enabled
+// as default.
+// [Files] AcpiPlatform.sd
+//
+// 11 3/26/13 9:31a Alanlin
+// [TAG] EIP119125
+// [Category] Important
+// [Severity] Important
+// [Description] Update Shark Bay Client ACPI Reference Code Beta Version
+// 1.3.1
+//
+// 10 2/15/13 1:13a Alanlin
+// [TAG] EIP114919
+// [Category] Important
+// [Severity] Important
+// [Description] Update Shark Bay Client ACPI Reference Code Beta Version
+// 1.1.0
+//
+// 9 2/01/13 3:14a Alanlin
+// [TAG] None
+// [Category] Important
+// [Severity] Important
+// [Description] Fixed that DPPM-06 test item can't be passed.
+// [Files] Acpiplatform.sd.
+//
+// 8 1/28/13 11:14p Alanlin
+// [TAG] EIP113555
+// [Category] Important
+// [Severity] Important
+// [Description] Update Shark Bay Client ACPI Reference Code Beta Version
+// 1.0.0
+//
+// 7 1/15/13 5:46a Alanlin
+// [TAG] None
+// [Category] Normal
+// [Severity] Normal
+// [Description] Add setup item and setting for DPTF
+// [Files] Acpiplatform.c, Acpiplatform.sd, Acpiplatform.uni,
+// PlatformSetup.h
+//
+// 6 12/18/12 11:04p Alanlin
+// [TAG] EIP107188
+// [Category] Important
+// [Severity] Important
+// [Description] USB 3.0 port can't work when RTD3 is Enabled in setup
+// menu.
+// [Files] Acpiplatform.c, Acpiplatform.mak, Acpiplatform.sd,
+// Acpiplatform.uni.
+//
+// 5 11/09/12 5:18a Alanlin
+// [TAG] None
+// [Category] New Feature
+// [Severity] Important
+// [Description] ZpOdd SSDT acpi table support
+// [Files] Acpiplatform.c, Acpiplatform.cif, Acpiplatform.h,
+// Acpiplatform.sd, Acpiplatform.uni
+//
+// 4 10/31/12 4:41a Alanlin
+// [TAG] None
+// [Category] New Feature
+// [Severity] Normal
+// [Description] Support Acpi Debug SSDT.
+//
+// 3 8/31/12 4:48a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Implement Runtime D3.
+// [Files] AcpiPlatform.c, AcpiPlatform.cif, AcpiPlatform.h,
+// AcpiPlatform.sd, AcpiPlatform.sdl, AcpiPlatform.uni, GlobalNvsArea.h,
+// SsdtRtd3.cif, SsdtRtd3.mak, Ult0Rtd3.asl, SsdtRtd3.sdl
+//
+// 2 7/27/12 5:11a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Create DPTF and CPPC setup item.
+// [Files] AcpiPlatform.c, AcpiPlatform.sd, AcpiPlatform.uni,
+// PlatformSetup.h
+//
+// 1 2/09/12 12:31a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AcpiPlatform.sd
+//
+// Description: AcpiPlatform Form Template
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#ifdef SETUP_DATA_DEFINITION
+//---------------------------------------------------------------------------
+// Put NVRAM data definitions here.
+// For example: UINT8 Data1;
+// These definitions will be converted by the build process
+// to a definitions of SETUP_DATA fields.
+//---------------------------------------------------------------------------
+#if ACPIDEBUG_SUPPORT
+ UINT8 AcpiDebugSupport;
+#endif // ACPIDEBUG_SUPPORT
+#if RTD3_SUPPORT
+ UINT8 Rtd3Support;
+ UINT16 VRStaggeringDelay;
+ UINT16 VRRampUpDelay;
+ UINT8 Rtd3P0dl;
+ UINT8 Rtd3P3dl;
+ UINT16 Rtd3Audio;
+ UINT16 Rtd3ADSP;
+ UINT16 Rtd3I2C0;
+ UINT16 Rtd3SensorHub;
+ UINT16 Rtd3I2C1;
+ UINT16 Rtd3I2C1PS0;
+ UINT16 Rtd3TouchPanel;
+ UINT8 PepGfx;
+ UINT8 PepSata;
+ UINT8 PCapping;
+ UINT8 XhciP0;
+ UINT8 XhciP1;
+ UINT8 RIC0;
+ UINT8 RTD3ZPODD;
+ UINT8 RTD3USBCamera;
+ UINT8 RTD3MiniSataPort3;
+ UINT8 RTD3WaGpio;
+#endif // RTD3_SUPPORT
+ UINT8 PciExpNative;
+ UINT8 NativeAspmEnable;
+#if PTID_SUPPORT
+ UINT8 PtidSupport;
+ UINT8 PeciAccessMethod;
+#endif // PTID_SUPPORT
+#if LOW_POWER_S0_IDLE_CAPABLE
+ UINT8 PowerButton10SecOVR;
+ UINT16 LowPowerIdleSATA;
+ UINT8 EcNotification;
+ UINT8 EcCSDebugLight;
+ UINT8 SensorStandby;
+ UINT8 CSPL1Limit;
+ UINT16 CSPL1Value;
+#endif // LOW_POWER_S0_IDLE_CAPABLE
+#if CPPC_SUPPORT
+ UINT8 EnableCppc;
+ UINT8 EnableCppcPlatformSCI;
+#endif // CPPC_SUPPORT
+#if Dptf_SUPPORT
+ UINT8 EnableDptf;
+ UINT8 EnableSaDevice;
+ UINT8 ActiveThermalTripPointSa;
+ UINT8 PassiveThermalTripPointSa;
+ UINT8 CriticalThermalTripPointSa;
+ UINT8 HotThermalTripPointSa;
+ UINT8 EnablePchDevice;
+ UINT8 ActiveThermalTripPointPch;
+ UINT8 PassiveThermalTripPointPch;
+ UINT8 CriticalThermalTripPointPch;
+ UINT8 HotThermalTripPointPch;
+ UINT8 EnableMemDevice;
+ UINT8 ActiveThermalTripPointMem;
+ UINT8 PassiveThermalTripPointMem;
+ UINT8 CriticalThermalTripPointMem;
+ UINT8 HotThermalTripPointMem;
+ UINT8 EnableAmbientDevice;
+ UINT8 ActiveThermalTripPointAmbient;
+ UINT8 PassiveThermalTripPointAmbient;
+ UINT8 CriticalThermalTripPointAmbient;
+ UINT8 HotThermalTripPointAmbient;
+ UINT8 EnableSkinDevice;
+ UINT8 ActiveThermalTripPointSkin;
+ UINT8 PassiveThermalTripPointSkin;
+ UINT8 CriticalThermalTripPointSkin;
+ UINT8 HotThermalTripPointSkin;
+ UINT8 EnableExhaustDevice;
+ UINT8 ActiveThermalTripPointExhaust;
+ UINT8 PassiveThermalTripPointExhaust;
+ UINT8 CriticalThermalTripPointExhaust;
+ UINT8 HotThermalTripPointExhaust;
+ UINT8 EnableVRDevice;
+ UINT8 ActiveThermalTripPointVR;
+ UINT8 PassiveThermalTripPointVR;
+ UINT8 CriticalThermalTripPointVR;
+ UINT8 HotThermalTripPointVR;
+ UINT32 PpccStepSize;
+ UINT8 LPOEnable;
+ UINT8 LPOStartPState;
+ UINT8 LPOStepSize;
+ UINT8 LPOPowerControl;
+ UINT8 LPOPerformanceControl;
+ UINT8 EnableCTDP;
+ UINT8 EnableLPM;
+ UINT8 LPMSetting;
+ UINT8 Fan1Device;
+ UINT8 Fan2Device;
+ UINT8 DisplayParticipant;
+ UINT8 PowerParticipant;
+ UINT8 PowerPolicy;
+ UINT8 ActivePolicy;
+ UINT8 PassivePolicy;
+ UINT8 CriticalPolicy;
+ UINT8 CoolingModePolicy;
+ UINT8 TrtRevision;
+#endif // Dptf_SUPPORT
+#if IntelRMT_SUPPORT
+ UINT8 IRMTSupport;
+ UINT8 IRMTState;
+ UINT8 IRMTHWNotification;
+#endif // IntelRMT_SUPPORT
+#endif // SETUP_DATA_DEFINITION
+
+#ifdef FORM_SET_TYPEDEF
+ #include "PlatformSetup.h"
+#endif
+
+#if defined(VFRCOMPILE) && !defined(CONTROLS_ARE_DEFINED)
+#define CONTROL_DEFINITION
+#endif
+//---------------------------------------------------------------------------
+
+//---------------------------------------------------------------------------
+#ifdef CONTROL_DEFINITION
+
+#if ACPIDEBUG_SUPPORT
+#define ACPI_ONEOF_ACPIDEBUGSUPPORT\
+ oneof varid = SETUP_DATA.AcpiDebugSupport,\
+ prompt = STRING_TOKEN(STR_ACPIDEBUG_PROMPT),\
+ help = STRING_TOKEN(STR_ACPIDEBUG_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif // ACPIDEBUG_SUPPORT
+
+#if RTD3_SUPPORT
+#define ACPI_ONEOF_RTD3SUPPORT\
+ oneof varid = SETUP_DATA.Rtd3Support,\
+ prompt = STRING_TOKEN(STR_RTD3_PROMPT),\
+ help = STRING_TOKEN(STR_RTD3_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_VRSTAGGERINGDELAY\
+ numeric varid = SETUP_DATA.VRStaggeringDelay,\
+ prompt = STRING_TOKEN (STR_VRSTAGGERINGDELAY_PROMPT),\
+ help = STRING_TOKEN (STR_VRSTAGGERINGDELAY_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 100,\
+ step = 1,\
+ default = 10,\
+ option text = STRING_TOKEN (STR_VRSTAGGERINGDELAY_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+
+#define ACPI_ONEOF_VRRAMPUPDELAY\
+ numeric varid = SETUP_DATA.VRRampUpDelay,\
+ prompt = STRING_TOKEN (STR_VRRAMPUPDELAY_PROMPT),\
+ help = STRING_TOKEN (STR_VRRAMPUPDELAY_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 100,\
+ step = 1,\
+ default = 16,\
+ option text = STRING_TOKEN (STR_VRRAMPUPDELAY_PROMPT), value = 16, flags = MANUFACTURING; \
+ endnumeric;
+
+#define ACPI_ONEOF_RTD3P0DL\
+ numeric varid = SETUP_DATA.Rtd3P0dl,\
+ prompt = STRING_TOKEN (STR_RTD3P0DL_PROMPT),\
+ help = STRING_TOKEN (STR_RTD3P0DL_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 100,\
+ step = 1,\
+ default = 100,\
+ option text = STRING_TOKEN (STR_RTD3P0DL_PROMPT), value = 100, flags = MANUFACTURING; \
+ endnumeric;
+
+#define ACPI_ONEOF_RTD3P3DL\
+ numeric varid = SETUP_DATA.Rtd3P3dl,\
+ prompt = STRING_TOKEN (STR_RTD3P3DL_PROMPT),\
+ help = STRING_TOKEN (STR_RTD3P3DL_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 10,\
+ step = 1,\
+ default = 10,\
+ option text = STRING_TOKEN (STR_RTD3P3DL_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+
+#define ACPI_ONEOF_RTD3AUDIO\
+ numeric varid = SETUP_DATA.Rtd3Audio,\
+ prompt = STRING_TOKEN (STR_RTD3AUDIO_PROMPT),\
+ help = STRING_TOKEN (STR_RTD3AUDIO_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 1000,\
+ step = 1,\
+ default = 200,\
+ option text = STRING_TOKEN (STR_RTD3AUDIO_PROMPT), value = 200, flags = MANUFACTURING; \
+ endnumeric;
+
+#define ACPI_ONEOF_RTD3ADSP\
+ numeric varid = SETUP_DATA.Rtd3ADSP,\
+ prompt = STRING_TOKEN (STR_RTD3ADSP_PROMPT),\
+ help = STRING_TOKEN (STR_RTD3ADSP_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 1000,\
+ step = 1,\
+ default = 200,\
+ option text = STRING_TOKEN (STR_RTD3ADSP_PROMPT), value = 200, flags = MANUFACTURING; \
+ endnumeric;
+
+#define ACPI_ONEOF_RTD3I2C0\
+ numeric varid = SETUP_DATA.Rtd3I2C0,\
+ prompt = STRING_TOKEN (STR_RTD3I2C0_PROMPT),\
+ help = STRING_TOKEN (STR_RTD3I2C0_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 1000,\
+ step = 1,\
+ default = 0,\
+ option text = STRING_TOKEN (STR_RTD3I2C0_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define ACPI_ONEOF_RTD3SENSORHUB\
+ numeric varid = SETUP_DATA.Rtd3SensorHub,\
+ prompt = STRING_TOKEN (STR_RTD3SENSORHUB_PROMPT),\
+ help = STRING_TOKEN (STR_RTD3SENSORHUB_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 1000,\
+ step = 1,\
+ default = 68,\
+ option text = STRING_TOKEN (STR_RTD3SENSORHUB_PROMPT), value = 68, flags = MANUFACTURING; \
+ endnumeric;
+
+#define ACPI_ONEOF_RTD3I2C1\
+ numeric varid = SETUP_DATA.Rtd3I2C1,\
+ prompt = STRING_TOKEN (STR_RTD3I2C1_PROMPT),\
+ help = STRING_TOKEN (STR_RTD3I2C1_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 1000,\
+ step = 1,\
+ default = 0,\
+ option text = STRING_TOKEN (STR_RTD3I2C1_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define ACPI_ONEOF_RTD3I2C1PS0\
+ numeric varid = SETUP_DATA.Rtd3I2C1PS0,\
+ prompt = STRING_TOKEN (STR_RTD3I2C1PS0_PROMPT),\
+ help = STRING_TOKEN (STR_RTD3I2C1PS0_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 1000,\
+ step = 1,\
+ default = 68,\
+ option text = STRING_TOKEN (STR_RTD3I2C1PS0_PROMPT), value = 68, flags = MANUFACTURING; \
+ endnumeric;
+
+#define ACPI_ONEOF_RTD3TOUCHPANEL\
+ numeric varid = SETUP_DATA.Rtd3TouchPanel,\
+ prompt = STRING_TOKEN (STR_RTD3TOUCHPANEL_PROMPT),\
+ help = STRING_TOKEN (STR_RTD3TOUCHPANEL_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 1000,\
+ step = 1,\
+ default = 68,\
+ option text = STRING_TOKEN (STR_RTD3TOUCHPANEL_PROMPT), value = 68, flags = MANUFACTURING; \
+ endnumeric;
+
+#define ACPI_ONEOF_PEPGFX\
+ oneof varid = SETUP_DATA.PepGfx,\
+ prompt = STRING_TOKEN(STR_PEPGFX_PROMPT),\
+ help = STRING_TOKEN(STR_PEPGFX_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_PEPSATA\
+ oneof varid = SETUP_DATA.PepSata,\
+ prompt = STRING_TOKEN(STR_PEPSATA_PROMPT),\
+ help = STRING_TOKEN(STR_PEPSATA_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_PCAPPING\
+ oneof varid = SETUP_DATA.PCapping,\
+ prompt = STRING_TOKEN(STR_PCAPPING_PROMPT),\
+ help = STRING_TOKEN(STR_PCAPPING_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_XHCIP0\
+ oneof varid = SETUP_DATA.XhciP0,\
+ prompt = STRING_TOKEN(STR_XHCIP0_PROMPT),\
+ help = STRING_TOKEN(STR_XHCIP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_HIGHSPEED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_SUPERSPEED), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_XHCIP1\
+ oneof varid = SETUP_DATA.XhciP1,\
+ prompt = STRING_TOKEN(STR_XHCIP1_PROMPT),\
+ help = STRING_TOKEN(STR_XHCIP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_HIGHSPEED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_SUPERSPEED), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_RIC0\
+ oneof varid = SETUP_DATA.RIC0,\
+ prompt = STRING_TOKEN(STR_RIC0_PROMPT),\
+ help = STRING_TOKEN(STR_RIC0_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_RTD3ZPODD\
+ oneof varid = SETUP_DATA.RTD3ZPODD,\
+ prompt = STRING_TOKEN(STR_RTD3_ZPODD_PROMPT),\
+ help = STRING_TOKEN(STR_RTD3_ZPODD_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_RTD3USBCamera\
+ oneof varid = SETUP_DATA.RTD3USBCamera,\
+ prompt = STRING_TOKEN(STR_RTD3_USBCAMERA_PROMPT),\
+ help = STRING_TOKEN(STR_RTD3_USBCAMERA_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_RTD3MiniSataPort3\
+ oneof varid = SETUP_DATA.RTD3MiniSataPort3,\
+ prompt = STRING_TOKEN(STR_RTD3_MINISATAPORT3_PROMPT),\
+ help = STRING_TOKEN(STR_RTD3_MINISATAPORT3_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_1_5_DK), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_3_3_DK), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_RTD3WAGPIO\
+ oneof varid = SETUP_DATA.RTD3WaGpio,\
+ prompt = STRING_TOKEN(STR_RTD3_RTD3WAGPIO_PROMPT),\
+ help = STRING_TOKEN(STR_RTD3_RTD3WAGPIO_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_SLOT_1), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_SLOT_6), value = 6, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif // RTD3_SUPPORT
+
+#define ACPI_ONEOF_PCIEXPNATIVE\
+ oneof varid = SETUP_DATA.PciExpNative,\
+ prompt = STRING_TOKEN(STR_ACPI_PCIE_NATIVE_PROMPT),\
+ help = STRING_TOKEN(STR_ACPI_PCIE_NATIVE_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_NATIVEASPMENABLE\
+ oneof varid = SETUP_DATA.NativeAspmEnable,\
+ prompt = STRING_TOKEN(STR_NATIVE_ASPM_PROMPT),\
+ help = STRING_TOKEN(STR_NATIVE_ASPM_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#if PTID_SUPPORT
+#define ACPI_ONEOF_PTIDSUPPORT\
+ checkbox varid = SETUP_DATA.PtidSupport,\
+ prompt = STRING_TOKEN(STR_PTID_PROMPT),\
+ help = STRING_TOKEN(STR_PTID_HELP),\
+ flags = 0 | RESET_REQUIRED | MANUFACTURING,\
+ key = 0,\
+ endcheckbox;
+
+#define ACPI_ONEOF_PECIACCESSMETHOD\
+ oneof varid = SETUP_DATA.PeciAccessMethod,\
+ prompt = STRING_TOKEN(STR_PECI_ACCESS_PROMPT),\
+ help = STRING_TOKEN(STR_PECI_ACCESS_HELP),\
+ option text = STRING_TOKEN(STR_PECI_ACCESS_IO), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_PECI_ACCESS_ACPI), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif // PTID_SUPPORT
+
+#if IntelRMT_SUPPORT
+#define ACPI_ONEOF_IRMTSUPPORT\
+ oneof varid = SETUP_DATA.IRMTSupport,\
+ prompt = STRING_TOKEN(STR_IRMT_PROMPT),\
+ help = STRING_TOKEN(STR_IRMT_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_IRMTSTATE\
+ oneof varid = SETUP_DATA.IRMTState,\
+ prompt = STRING_TOKEN(STR_IRMT_STATE_PROMPT),\
+ help = STRING_TOKEN(STR_IRMT_STATE_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_IRMTHW\
+ oneof varid = SETUP_DATA.IRMTHWNotification,\
+ prompt = STRING_TOKEN(STR_IRMT_HW_PROMPT),\
+ help = STRING_TOKEN(STR_IRMT_HW_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#endif // IntelRMT_SUPPORT
+
+#if LOW_POWER_S0_IDLE_CAPABLE
+#define ACPI_ONEOF_POWERBUTTON10SECOVR\
+ oneof varid = SETUP_DATA.PowerButton10SecOVR,\
+ prompt = STRING_TOKEN(STR_POWERBUTTON10SECOVR_PROMPT),\
+ help = STRING_TOKEN(STR_POWERBUTTON10SECOVR_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_LOWPOWERIDLESATA\
+ oneof varid = SETUP_DATA.LowPowerIdleSATA,\
+ prompt = STRING_TOKEN(STR_LOWPOWERIDLESATA_PROMPT),\
+ help = STRING_TOKEN(STR_LOWPOWERIDLESATA_HELP),\
+ option text = STRING_TOKEN(STR_NOCONSTRAINT), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_SATAPORTS), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_SATACONTROLLER), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_ECNOTIFICATION\
+ oneof varid = SETUP_DATA.EcNotification,\
+ prompt = STRING_TOKEN(STR_ECNOTIFICATION_PROMPT),\
+ help = STRING_TOKEN(STR_ECNOTIFICATION_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED , key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_ECCSDEBUGLIGHT\
+ oneof varid = SETUP_DATA.EcCSDebugLight,\
+ prompt = STRING_TOKEN(STR_ECCSDEBUGLIGHT_PROMPT),\
+ help = STRING_TOKEN(STR_ECCSDEBUGLIGHT_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_SENSORSTANDBY\
+ oneof varid = SETUP_DATA.SensorStandby,\
+ prompt = STRING_TOKEN(STR_SENSORSTANDBY_PROMPT),\
+ help = STRING_TOKEN(STR_SENSORSTANDBY_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_CSPL1LIMIT\
+ oneof varid = SETUP_DATA.CSPL1Limit,\
+ prompt = STRING_TOKEN(STR_CSPL1LIMIT_PROMPT),\
+ help = STRING_TOKEN(STR_CSPL1LIMIT_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define ACPI_ONEOF_CSPL1VALUE\
+ numeric varid = SETUP_DATA.CSPL1Value,\
+ prompt = STRING_TOKEN (STR_CSPL1VALUE_PROMPT),\
+ help = STRING_TOKEN (STR_CSPL1VALUE_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 3000,\
+ maximum = 20000,\
+ step = 1,\
+ default = 4500,\
+ option text = STRING_TOKEN (STR_CSPL1VALUE_PROMPT), value = 4500, flags = MANUFACTURING; \
+ endnumeric;
+#endif // LOW_POWER_S0_IDLE_CAPABLE
+
+
+//=======================================================================//
+// CPPC //
+//=======================================================================//
+#if CPPC_SUPPORT
+#define CPPC_ONEOF_ENABLECPPC\
+ oneof varid = SETUP_DATA.EnableCppc,\
+ prompt = STRING_TOKEN(STR_ENABLE_CPPC_PROMPT),\
+ help = STRING_TOKEN(STR_ENABLE_CPPC_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define CPPC_ONEOF_CPPCSCI\
+ oneof varid = SETUP_DATA.EnableCppcPlatformSCI,\
+ prompt = STRING_TOKEN(STR_ENABLE_CPPC_SCI_PROMPT),\
+ help = STRING_TOKEN(STR_ENABLE_CPPC_SCI_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif // CPPC_SUPPORT
+
+//=======================================================================//
+// DPTF //
+//=======================================================================//
+#if Dptf_SUPPORT
+#define DPTF_ONEOF_ENABLEDPTF\
+ oneof varid = SETUP_DATA.EnableDptf,\
+ prompt = STRING_TOKEN(STR_ENABLE_DPTF_PROMPT),\
+ help = STRING_TOKEN(STR_ENABLE_DPTF_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+// Processor Thermal Device
+#define DPTF_ONEOF_ENABLESA\
+ oneof varid = SETUP_DATA.EnableSaDevice,\
+ prompt = STRING_TOKEN(STR_DPTF_SA_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_SA_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DPTF_ENABLE_SA_TD), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DPTF_ENABLE_CPU_TD), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_ATTPOINT_SA\
+ oneof varid = SETUP_DATA.ActiveThermalTripPointSa,\
+ prompt = STRING_TOKEN(STR_DPTF_ATTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_ATTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_PTTPOINT_SA\
+ oneof varid = SETUP_DATA.PassiveThermalTripPointSa,\
+ prompt = STRING_TOKEN(STR_DPTF_PTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_PTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_CTTPOINT_SA\
+ oneof varid = SETUP_DATA.CriticalThermalTripPointSa,\
+ prompt = STRING_TOKEN(STR_DPTF_CTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_CTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_HTTPOINT_SA\
+ oneof varid = SETUP_DATA.HotThermalTripPointSa,\
+ prompt = STRING_TOKEN(STR_DPTF_HTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_HTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+// Pch Thermal Device
+#define DPTF_ONEOF_ENABLEPCH\
+ oneof varid = SETUP_DATA.EnablePchDevice,\
+ prompt = STRING_TOKEN(STR_DPTF_PCH_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_PCH_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_ATTPOINT_PCH\
+ oneof varid = SETUP_DATA.ActiveThermalTripPointPch,\
+ prompt = STRING_TOKEN(STR_DPTF_ATTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_ATTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_PTTPOINT_PCH\
+ oneof varid = SETUP_DATA.PassiveThermalTripPointPch,\
+ prompt = STRING_TOKEN(STR_DPTF_PTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_PTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_CTTPOINT_PCH\
+ oneof varid = SETUP_DATA.CriticalThermalTripPointPch,\
+ prompt = STRING_TOKEN(STR_DPTF_CTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_CTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_HTTPOINT_PCH\
+ oneof varid = SETUP_DATA.HotThermalTripPointPch,\
+ prompt = STRING_TOKEN(STR_DPTF_HTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_HTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+// Memory Thermal Device
+#define DPTF_ONEOF_ENABLEMEM\
+ oneof varid = SETUP_DATA.EnableMemDevice,\
+ prompt = STRING_TOKEN(STR_DPTF_MEM_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_MEM_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_ATTPOINT_MEM\
+ oneof varid = SETUP_DATA.ActiveThermalTripPointMem,\
+ prompt = STRING_TOKEN(STR_DPTF_ATTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_ATTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_PTTPOINT_MEM\
+ oneof varid = SETUP_DATA.PassiveThermalTripPointMem,\
+ prompt = STRING_TOKEN(STR_DPTF_PTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_PTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_CTTPOINT_MEM\
+ oneof varid = SETUP_DATA.CriticalThermalTripPointMem,\
+ prompt = STRING_TOKEN(STR_DPTF_CTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_CTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_HTTPOINT_MEM\
+ oneof varid = SETUP_DATA.HotThermalTripPointMem,\
+ prompt = STRING_TOKEN(STR_DPTF_HTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_HTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+// Ambient Thermal Device
+#define DPTF_ONEOF_ENABLEAMBIENT\
+ oneof varid = SETUP_DATA.EnableAmbientDevice,\
+ prompt = STRING_TOKEN(STR_DPTF_AMBIENT_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_AMBIENT_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_ATTPOINT_AMBIENT\
+ oneof varid = SETUP_DATA.ActiveThermalTripPointAmbient,\
+ prompt = STRING_TOKEN(STR_DPTF_ATTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_ATTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_PTTPOINT_AMBIENT\
+ oneof varid = SETUP_DATA.PassiveThermalTripPointAmbient,\
+ prompt = STRING_TOKEN(STR_DPTF_PTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_PTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_CTTPOINT_AMBIENT\
+ oneof varid = SETUP_DATA.CriticalThermalTripPointAmbient,\
+ prompt = STRING_TOKEN(STR_DPTF_CTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_CTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_HTTPOINT_AMBIENT\
+ oneof varid = SETUP_DATA.HotThermalTripPointAmbient,\
+ prompt = STRING_TOKEN(STR_DPTF_HTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_HTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+// Skin Thermal Device
+#define DPTF_ONEOF_ENABLESKIN\
+ oneof varid = SETUP_DATA.EnableSkinDevice,\
+ prompt = STRING_TOKEN(STR_DPTF_SKIN_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_SKIN_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_ATTPOINT_SKIN\
+ oneof varid = SETUP_DATA.ActiveThermalTripPointSkin,\
+ prompt = STRING_TOKEN(STR_DPTF_ATTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_ATTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_PTTPOINT_SKIN\
+ oneof varid = SETUP_DATA.PassiveThermalTripPointSkin,\
+ prompt = STRING_TOKEN(STR_DPTF_PTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_PTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_CTTPOINT_SKIN\
+ oneof varid = SETUP_DATA.CriticalThermalTripPointSkin,\
+ prompt = STRING_TOKEN(STR_DPTF_CTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_CTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_HTTPOINT_SKIN\
+ oneof varid = SETUP_DATA.HotThermalTripPointSkin,\
+ prompt = STRING_TOKEN(STR_DPTF_HTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_HTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+// Exhaust Thermal Device
+#define DPTF_ONEOF_ENABLEEXHAUST\
+ oneof varid = SETUP_DATA.EnableExhaustDevice,\
+ prompt = STRING_TOKEN(STR_DPTF_EXHAUST_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_EXHAUST_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_ATTPOINT_EXHAUST\
+ oneof varid = SETUP_DATA.ActiveThermalTripPointExhaust,\
+ prompt = STRING_TOKEN(STR_DPTF_ATTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_ATTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_PTTPOINT_EXHAUST\
+ oneof varid = SETUP_DATA.PassiveThermalTripPointExhaust,\
+ prompt = STRING_TOKEN(STR_DPTF_PTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_PTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_CTTPOINT_EXHAUST\
+ oneof varid = SETUP_DATA.CriticalThermalTripPointExhaust,\
+ prompt = STRING_TOKEN(STR_DPTF_CTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_CTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_HTTPOINT_EXHAUST\
+ oneof varid = SETUP_DATA.HotThermalTripPointExhaust,\
+ prompt = STRING_TOKEN(STR_DPTF_HTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_HTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+// VR Thermal Device
+#define DPTF_ONEOF_ENABLEVR\
+ oneof varid = SETUP_DATA.EnableVRDevice,\
+ prompt = STRING_TOKEN(STR_DPTF_VR_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_VR_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_ATTPOINT_VR\
+ oneof varid = SETUP_DATA.ActiveThermalTripPointVR,\
+ prompt = STRING_TOKEN(STR_DPTF_ATTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_ATTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_PTTPOINT_VR\
+ oneof varid = SETUP_DATA.PassiveThermalTripPointVR,\
+ prompt = STRING_TOKEN(STR_DPTF_PTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_PTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_CTTPOINT_VR\
+ oneof varid = SETUP_DATA.CriticalThermalTripPointVR,\
+ prompt = STRING_TOKEN(STR_DPTF_CTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_CTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_HTTPOINT_VR\
+ oneof varid = SETUP_DATA.HotThermalTripPointVR,\
+ prompt = STRING_TOKEN(STR_DPTF_HTTP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_HTTP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 127, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_15_C), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_23_C), value = 23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_31_C), value = 31, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_39_C), value = 39, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_47_C), value = 47, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_55_C), value = 55, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_63_C), value = 63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_71_C), value = 71, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_79_C), value = 79, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_87_C), value = 87, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_95_C), value = 95, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN (STR_103_C), value = 103, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_111_C), value = 111, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_119_C), value = 119, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_PPCC_STEPSIZE\
+ oneof varid = SETUP_DATA.PpccStepSize,\
+ prompt = STRING_TOKEN(STR_DPTF_PPCC_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_PPCC_HELP),\
+ option text = STRING_TOKEN(STR_05_W), value = 500, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_10_W), value = 1000, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_15_W), value = 1500, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_20_W), value = 2000, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_LPO_ENABLE\
+ oneof varid = SETUP_DATA.LPOEnable,\
+ prompt = STRING_TOKEN(STR_DPTF_LPO_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_LPO_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_LPOPSTATE\
+ numeric varid = SETUP_DATA.LPOStartPState,\
+ prompt = STRING_TOKEN (STR_DPTF_LPOPSTATE_SEL),\
+ help = STRING_TOKEN (STR_DPTF_LPOPSTATE_SEL_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 16,\
+ step = 1,\
+ default = 16,\
+ option text = STRING_TOKEN (STR_DPTF_LPOPSTATE_SEL), value = 16, flags = MANUFACTURING;\
+ endnumeric;
+
+#define DPTF_ONEOF_LPOSIZE\
+ numeric varid = SETUP_DATA.LPOStepSize,\
+ prompt = STRING_TOKEN (STR_DPTF_LPOSIZE_SEL),\
+ help = STRING_TOKEN (STR_DPTF_LPOSIZE_SEL_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 100,\
+ step = 1,\
+ default = 50,\
+ option text = STRING_TOKEN (STR_DPTF_LPOSIZE_SEL), value = 1, flags = MANUFACTURING;\
+ endnumeric;
+
+#define DPTF_ONEOF_LPO_POW\
+ oneof varid = SETUP_DATA.LPOPowerControl,\
+ prompt = STRING_TOKEN(STR_DPTF_LPOPOW_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_LPOPOW_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_SMT_OFFLINING), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_CORE_OFFLINING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_LPO_PER\
+ oneof varid = SETUP_DATA.LPOPerformanceControl,\
+ prompt = STRING_TOKEN(STR_DPTF_LPOPER_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_LPOPER_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_SMT_OFFLINING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_CORE_OFFLINING), value = 2, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_CTDP_ENABLE\
+ oneof varid = SETUP_DATA.EnableCTDP,\
+ prompt = STRING_TOKEN(STR_DPTF_CTDP_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_CTDP_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_LPM_ENABLE\
+ oneof varid = SETUP_DATA.EnableLPM,\
+ prompt = STRING_TOKEN(STR_DPTF_LPM_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_LPM_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_LPM_SETTING\
+ oneof varid = SETUP_DATA.LPMSetting,\
+ prompt = STRING_TOKEN(STR_DPTF_LPM_SETTING_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_LPM_SETTING_HELP),\
+ option text = STRING_TOKEN(STR_LPM_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_LPM_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_LPM_APPLI_SPEC), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_LPM_USE_OS), value = 3, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_FAN1\
+ oneof varid = SETUP_DATA.Fan1Device,\
+ prompt = STRING_TOKEN(STR_DPTF_FAN1_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_FAN1_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_FAN2\
+ oneof varid = SETUP_DATA.Fan2Device,\
+ prompt = STRING_TOKEN(STR_DPTF_FAN2_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_FAN2_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_DISPLAY_PARTICIPANT\
+ oneof varid = SETUP_DATA.DisplayParticipant,\
+ prompt = STRING_TOKEN(STR_DPTF_DISPLAY_PARTICIPANT_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_DISPLAY_PARTICIPANT_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_POWER_PARTICIPANT\
+ oneof varid = SETUP_DATA.PowerParticipant,\
+ prompt = STRING_TOKEN(STR_DPTF_POWER_PARTICIPANT_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_POWER_PARTICIPANT_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_POWER_POLICY\
+ oneof varid = SETUP_DATA.PowerPolicy,\
+ prompt = STRING_TOKEN(STR_DPTF_POWER_POLICY_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_POWER_POLICY_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_ACTIVE_POLICY\
+ oneof varid = SETUP_DATA.ActivePolicy,\
+ prompt = STRING_TOKEN(STR_DPTF_ACTIVE_POLICY_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_ACTIVE_POLICY_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_PASSIVE_POLICY\
+ oneof varid = SETUP_DATA.PassivePolicy,\
+ prompt = STRING_TOKEN(STR_DPTF_PASSIVE_POLICY_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_PASSIVE_POLICY_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_CRITICAL_POLICY\
+ oneof varid = SETUP_DATA.CriticalPolicy,\
+ prompt = STRING_TOKEN(STR_DPTF_CRITICAL_POLICY_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_CRITICAL_POLICY_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_COOLING_POLICY\
+ oneof varid = SETUP_DATA.CoolingModePolicy,\
+ prompt = STRING_TOKEN(STR_DPTF_COOLING_POLICY_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_COOLING_POLICY_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#define DPTF_ONEOF_TRT_REVISION\
+ oneof varid = SETUP_DATA.TrtRevision,\
+ prompt = STRING_TOKEN(STR_DPTF_TRT_PROMPT),\
+ help = STRING_TOKEN(STR_DPTF_TRT_HELP),\
+ option text = STRING_TOKEN(STR_TRT_TRADITIONAL), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TRT_PRIORITY), value = 1, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ endoneof;
+
+#endif // Dptf_SUPPORT
+
+#endif // CONTROL_DEFINITION
+//---------------------------------------------------------------------------
+
+//---------------------------------------------------------------------------
+#ifdef CONTROLS_WITH_DEFAULTS
+#if ACPIDEBUG_SUPPORT
+ ACPI_ONEOF_ACPIDEBUGSUPPORT
+#endif // ACPIDEBUG_SUPPORT
+#if RTD3_SUPPORT
+ ACPI_ONEOF_RTD3SUPPORT
+ ACPI_ONEOF_VRSTAGGERINGDELAY
+ ACPI_ONEOF_VRRAMPUPDELAY
+ ACPI_ONEOF_RTD3P0DL
+ ACPI_ONEOF_RTD3P3DL
+ ACPI_ONEOF_RTD3AUDIO
+ ACPI_ONEOF_RTD3ADSP
+ ACPI_ONEOF_RTD3I2C0
+ ACPI_ONEOF_RTD3SENSORHUB
+ ACPI_ONEOF_RTD3I2C1
+ ACPI_ONEOF_RTD3I2C1PS0
+ ACPI_ONEOF_RTD3TOUCHPANEL
+ ACPI_ONEOF_PEPGFX
+ ACPI_ONEOF_PEPSATA
+ ACPI_ONEOF_PCAPPING
+ ACPI_ONEOF_XHCIP0
+ ACPI_ONEOF_XHCIP1
+ ACPI_ONEOF_RIC0
+ ACPI_ONEOF_RTD3ZPODD
+ ACPI_ONEOF_RTD3USBCamera
+ ACPI_ONEOF_RTD3MiniSataPort3
+ ACPI_ONEOF_RTD3WAGPIO
+#endif // RTD3_SUPPORT
+ ACPI_ONEOF_PCIEXPNATIVE
+ ACPI_ONEOF_NATIVEASPMENABLE
+#if PTID_SUPPORT
+ ACPI_ONEOF_PTIDSUPPORT
+ ACPI_ONEOF_PECIACCESSMETHOD
+#endif // PTID_SUPPORT
+#if IntelRMT_SUPPORT
+ ACPI_ONEOF_IRMTSUPPORT
+ ACPI_ONEOF_IRMTSTATE
+ ACPI_ONEOF_IRMTHW
+#endif // IntelRMT_SUPPORT
+#if LOW_POWER_S0_IDLE_CAPABLE
+ ACPI_ONEOF_POWERBUTTON10SECOVR
+ ACPI_ONEOF_LOWPOWERIDLESATA
+ ACPI_ONEOF_ECNOTIFICATION
+ ACPI_ONEOF_ECCSDEBUGLIGHT
+ ACPI_ONEOF_SENSORSTANDBY
+ ACPI_ONEOF_CSPL1LIMIT
+ ACPI_ONEOF_CSPL1VALUE
+#endif // LOW_POWER_S0_IDLE_CAPABLE
+#if CPPC_SUPPORT
+ CPPC_ONEOF_ENABLECPPC
+ CPPC_ONEOF_CPPCSCI
+#endif // CPPC_SUPPORT
+#if Dptf_SUPPORT
+ DPTF_ONEOF_ENABLEDPTF
+ DPTF_ONEOF_ENABLESA
+ DPTF_ONEOF_ATTPOINT_SA
+ DPTF_ONEOF_PTTPOINT_SA
+ DPTF_ONEOF_CTTPOINT_SA
+ DPTF_ONEOF_HTTPOINT_SA
+ DPTF_ONEOF_ENABLEPCH
+ DPTF_ONEOF_ATTPOINT_PCH
+ DPTF_ONEOF_PTTPOINT_PCH
+ DPTF_ONEOF_CTTPOINT_PCH
+ DPTF_ONEOF_HTTPOINT_PCH
+ DPTF_ONEOF_ENABLEMEM
+ DPTF_ONEOF_ATTPOINT_MEM
+ DPTF_ONEOF_PTTPOINT_MEM
+ DPTF_ONEOF_CTTPOINT_MEM
+ DPTF_ONEOF_HTTPOINT_MEM
+ DPTF_ONEOF_ENABLEAMBIENT
+ DPTF_ONEOF_ATTPOINT_AMBIENT
+ DPTF_ONEOF_PTTPOINT_AMBIENT
+ DPTF_ONEOF_CTTPOINT_AMBIENT
+ DPTF_ONEOF_HTTPOINT_AMBIENT
+ DPTF_ONEOF_ENABLESKIN
+ DPTF_ONEOF_ATTPOINT_SKIN
+ DPTF_ONEOF_PTTPOINT_SKIN
+ DPTF_ONEOF_CTTPOINT_SKIN
+ DPTF_ONEOF_HTTPOINT_SKIN
+ DPTF_ONEOF_ENABLEEXHAUST
+ DPTF_ONEOF_ATTPOINT_EXHAUST
+ DPTF_ONEOF_PTTPOINT_EXHAUST
+ DPTF_ONEOF_CTTPOINT_EXHAUST
+ DPTF_ONEOF_HTTPOINT_EXHAUST
+ DPTF_ONEOF_ENABLEVR
+ DPTF_ONEOF_ATTPOINT_VR
+ DPTF_ONEOF_PTTPOINT_VR
+ DPTF_ONEOF_CTTPOINT_VR
+ DPTF_ONEOF_HTTPOINT_VR
+ DPTF_ONEOF_PPCC_STEPSIZE
+ DPTF_ONEOF_LPO_ENABLE
+ DPTF_ONEOF_LPOPSTATE
+ DPTF_ONEOF_LPOSIZE
+ DPTF_ONEOF_LPO_POW
+ DPTF_ONEOF_LPO_PER
+ DPTF_ONEOF_CTDP_ENABLE
+ DPTF_ONEOF_LPM_ENABLE
+ DPTF_ONEOF_LPM_SETTING
+ DPTF_ONEOF_FAN1
+ DPTF_ONEOF_FAN2
+ DPTF_ONEOF_DISPLAY_PARTICIPANT
+ DPTF_ONEOF_POWER_PARTICIPANT
+ DPTF_ONEOF_POWER_POLICY
+ DPTF_ONEOF_ACTIVE_POLICY
+ DPTF_ONEOF_PASSIVE_POLICY
+ DPTF_ONEOF_CRITICAL_POLICY
+ DPTF_ONEOF_COOLING_POLICY
+ DPTF_ONEOF_TRT_REVISION
+#endif // Dptf_SUPPORT
+
+#endif // CONTROLS_WITH_DEFAULTS
+//---------------------------------------------------------------------------
+// ADVANCED - AcpiPlatform Configuration Form
+//---------------------------------------------------------------------------
+#ifdef ADVANCED_FORM_SET
+
+ #ifndef SUPPRESS_GRAYOUT_ENDIF //old Core
+ #define SUPPRESS_GRAYOUT_ENDIF endif;
+ #endif
+
+ #ifdef FORM_SET_ITEM
+ // Define controls to be added to the main page of the formset
+ #endif
+
+ #ifdef FORM_SET_GOTO
+ // Define goto commands for the forms defined in this file
+ goto ACPIPLATFORM_FORM_ID,
+ prompt = STRING_TOKEN(STR_ACPIPLATFORM_FORM),
+ help = STRING_TOKEN(STR_ACPIPLATFORM_FORM_HELP);
+ #endif
+
+ #ifdef FORM_SET_FORM
+ // Define forms
+ form formid = AUTO_ID(ACPIPLATFORM_FORM_ID),
+ title = STRING_TOKEN(STR_ACPIPLATFORM_FORM);
+
+ SUBTITLE(STRING_TOKEN(STR_ACPIPLATFORM_FORM))
+ SEPARATOR
+
+#if SB_SETUP_SUPPORT
+ suppressif ideqval SETUP_DATA.PcieRootPortEn[0] == 0;
+#endif
+ ACPI_ONEOF_PCIEXPNATIVE
+#if SB_SETUP_SUPPORT
+ endif;
+#endif
+
+ suppressif ideqval SETUP_DATA.PciExpNative == 0;
+ ACPI_ONEOF_NATIVEASPMENABLE
+ endif;
+
+ SEPARATOR
+
+#if ACPIDEBUG_SUPPORT
+ ACPI_ONEOF_ACPIDEBUGSUPPORT
+#endif
+
+#if RTD3_SUPPORT
+ suppressif ideqval SETUP_PLATFORM_DATA.PlatformSupportRtD3 == 0;
+ ACPI_ONEOF_RTD3SUPPORT
+ suppressif ideqval SETUP_DATA.Rtd3Support == 0;
+ ACPI_ONEOF_VRSTAGGERINGDELAY
+ ACPI_ONEOF_VRRAMPUPDELAY
+ ACPI_ONEOF_RTD3P0DL
+ ACPI_ONEOF_RTD3P3DL
+// ACPI_ONEOF_RTD3AUDIO
+ ACPI_ONEOF_RTD3ADSP
+ ACPI_ONEOF_RTD3I2C0
+ ACPI_ONEOF_RTD3SENSORHUB
+ ACPI_ONEOF_RTD3I2C1
+ ACPI_ONEOF_RTD3I2C1PS0
+ ACPI_ONEOF_RTD3TOUCHPANEL
+ ACPI_ONEOF_PEPGFX
+ ACPI_ONEOF_PEPSATA
+ ACPI_ONEOF_PCAPPING
+ ACPI_ONEOF_XHCIP0
+ ACPI_ONEOF_XHCIP1
+ ACPI_ONEOF_RIC0
+ ACPI_ONEOF_RTD3ZPODD
+ ACPI_ONEOF_RTD3USBCamera
+ ACPI_ONEOF_RTD3MiniSataPort3
+ ACPI_ONEOF_RTD3WAGPIO
+ endif;
+ endif;
+#endif
+
+#if PTID_SUPPORT
+ ACPI_ONEOF_PTIDSUPPORT
+ ACPI_ONEOF_PECIACCESSMETHOD
+#endif
+
+#if IntelRMT_SUPPORT
+ ACPI_ONEOF_IRMTSUPPORT
+ suppressif ideqval SETUP_DATA.IRMTSupport == 0;
+ ACPI_ONEOF_IRMTSTATE
+ ACPI_ONEOF_IRMTHW
+ endif;
+#endif
+
+#if LOW_POWER_S0_IDLE_CAPABLE
+ suppressif ideqval SETUP_PLATFORM_DATA.PlatformSupportRtD3 == 0;
+ suppressif ideqval SETUP_DATA.AcpiLowPowerS0Idle == 0;
+ ACPI_ONEOF_POWERBUTTON10SECOVR
+ ACPI_ONEOF_LOWPOWERIDLESATA
+ ACPI_ONEOF_ECNOTIFICATION
+ ACPI_ONEOF_ECCSDEBUGLIGHT
+ ACPI_ONEOF_SENSORSTANDBY
+ ACPI_ONEOF_CSPL1LIMIT
+ suppressif ideqval SETUP_DATA.CSPL1Limit == 0;
+ ACPI_ONEOF_CSPL1VALUE
+ endif;
+ endif;
+ endif;
+#endif
+
+#if CPPC_SUPPORT
+ suppressif ideqval SETUP_PLATFORM_DATA.PlatformSupportCppc == 0;
+ CPPC_ONEOF_ENABLECPPC
+ suppressif ideqval SETUP_DATA.EnableCppc == 0;
+ CPPC_ONEOF_CPPCSCI
+ endif;
+ endif;
+#endif
+
+ SEPARATOR
+
+#if Dptf_SUPPORT
+ goto DPTF_FORM_ID,
+ prompt = STRING_TOKEN (STR_DPTF_CONFIG_FORM_TITLE),
+ help = STRING_TOKEN (STR_DPTF_CONFIG_FORM_HELP);
+#endif
+
+ endform; // Platform_FORM_ID
+
+ #endif // FORM_SET_FORM
+
+#if Dptf_SUPPORT
+//----------------------------------------------------------------------------
+// PLATFORM - DPTF Form
+//----------------------------------------------------------------------------
+ #ifdef FORM_SET_FORM
+
+ #ifndef DPTF_FORM_SETUP
+ #define DPTF_FORM_SETUP
+
+ form formid = AUTO_ID(DPTF_FORM_ID),
+ title = STRING_TOKEN (STR_DPTF_CONFIG_FORM_TITLE);
+
+ SUBTITLE(STRING_TOKEN(STR_DPTF_CONFIG_FORM_TITLE))
+ SEPARATOR
+
+ DPTF_ONEOF_ENABLEDPTF
+
+ suppressif ideqval SETUP_DATA.EnableDptf == 0;
+ DPTF_ONEOF_ENABLESA
+ suppressif ideqval SETUP_DATA.EnableSaDevice == 0;
+ DPTF_ONEOF_ATTPOINT_SA
+ DPTF_ONEOF_PTTPOINT_SA
+ DPTF_ONEOF_CTTPOINT_SA
+ DPTF_ONEOF_HTTPOINT_SA
+ DPTF_ONEOF_PPCC_STEPSIZE
+ DPTF_ONEOF_LPO_ENABLE
+ DPTF_ONEOF_LPOPSTATE
+ DPTF_ONEOF_LPOSIZE
+ DPTF_ONEOF_LPO_POW
+ DPTF_ONEOF_LPO_PER
+
+ suppressif ideqval SETUP_CPU_FEATURES.cTDPAvailable == 0;
+ DPTF_ONEOF_CTDP_ENABLE
+ endif;
+
+ suppressif ideqval SETUP_DATA.AcpiLowPowerS0Idle == 0;
+ DPTF_ONEOF_LPM_ENABLE
+ suppressif ideqval SETUP_DATA.EnableLPM == 0;
+ DPTF_ONEOF_LPM_SETTING
+ endif;
+ endif;
+
+ endif;
+ DPTF_ONEOF_ENABLEPCH
+ suppressif ideqval SETUP_DATA.EnablePchDevice == 0;
+ DPTF_ONEOF_ATTPOINT_PCH
+ DPTF_ONEOF_PTTPOINT_PCH
+ DPTF_ONEOF_CTTPOINT_PCH
+ DPTF_ONEOF_HTTPOINT_PCH
+ endif;
+ DPTF_ONEOF_ENABLEMEM
+ suppressif ideqval SETUP_DATA.EnableMemDevice == 0;
+ DPTF_ONEOF_ATTPOINT_MEM
+ DPTF_ONEOF_PTTPOINT_MEM
+ DPTF_ONEOF_CTTPOINT_MEM
+ DPTF_ONEOF_HTTPOINT_MEM
+ endif;
+ DPTF_ONEOF_FAN1
+ DPTF_ONEOF_FAN2
+ DPTF_ONEOF_ENABLEAMBIENT
+ suppressif ideqval SETUP_DATA.EnableAmbientDevice == 0;
+ DPTF_ONEOF_ATTPOINT_AMBIENT
+ DPTF_ONEOF_PTTPOINT_AMBIENT
+ DPTF_ONEOF_CTTPOINT_AMBIENT
+ DPTF_ONEOF_HTTPOINT_AMBIENT
+ endif;
+ DPTF_ONEOF_ENABLESKIN
+ suppressif ideqval SETUP_DATA.EnableSkinDevice == 0;
+ DPTF_ONEOF_ATTPOINT_SKIN
+ DPTF_ONEOF_PTTPOINT_SKIN
+ DPTF_ONEOF_CTTPOINT_SKIN
+ DPTF_ONEOF_HTTPOINT_SKIN
+ endif;
+ DPTF_ONEOF_ENABLEEXHAUST
+ suppressif ideqval SETUP_DATA.EnableExhaustDevice == 0;
+ DPTF_ONEOF_ATTPOINT_EXHAUST
+ DPTF_ONEOF_PTTPOINT_EXHAUST
+ DPTF_ONEOF_CTTPOINT_EXHAUST
+ DPTF_ONEOF_HTTPOINT_EXHAUST
+ endif;
+ DPTF_ONEOF_ENABLEVR
+ suppressif ideqval SETUP_DATA.EnableVRDevice == 0;
+ DPTF_ONEOF_ATTPOINT_VR
+ DPTF_ONEOF_PTTPOINT_VR
+ DPTF_ONEOF_CTTPOINT_VR
+ DPTF_ONEOF_HTTPOINT_VR
+ endif;
+ DPTF_ONEOF_DISPLAY_PARTICIPANT
+ DPTF_ONEOF_POWER_PARTICIPANT
+ suppressif ideqval SETUP_DATA.PowerParticipant == 0;
+ DPTF_ONEOF_POWER_POLICY
+ endif;
+
+ SEPARATOR
+
+ goto DPTF_POLICY_FORM_ID,
+ prompt = STRING_TOKEN (STR_DPTF_POLICY_FORM_TITLE),
+ help = STRING_TOKEN (STR_DPTF_POLICY_FORM_HELP);
+
+ endif; // suppressif ideqval SETUP_DATA.EnableDptf == 0;
+
+ endform; // DPTF
+ #endif // DPTF_FORM_SETUP
+ #endif // FORM_SET_FORM
+//----------------------------------------------------------------------------
+// PLATFORM - DPTF Policy Form
+//----------------------------------------------------------------------------
+ #ifdef FORM_SET_FORM
+
+ #ifndef DPTF_POLICY_FORM_SETUP
+ #define DPTF_POLICY_FORM_SETUP
+
+ form formid = AUTO_ID(DPTF_POLICY_FORM_ID),
+ title = STRING_TOKEN (STR_DPTF_POLICY_FORM_TITLE);
+
+ SUBTITLE(STRING_TOKEN(STR_DPTF_POLICY_FORM_TITLE))
+ SEPARATOR
+
+ DPTF_ONEOF_ACTIVE_POLICY
+ DPTF_ONEOF_PASSIVE_POLICY
+ suppressif ideqval SETUP_DATA.PassivePolicy == 0;
+ DPTF_ONEOF_TRT_REVISION
+ endif;
+ DPTF_ONEOF_CRITICAL_POLICY
+ DPTF_ONEOF_COOLING_POLICY
+
+ endform; // DPTF_POLICY
+ #endif // DPTF_POLICY_FORM_SETUP
+ #endif // FORM_SET_FORM
+#endif // Dptf_SUPPORT
+
+#endif // ADVANCED_FORM_SET
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/AcpiPlatform.sdl b/Board/EM/Platform/AcpiPlatform.sdl
new file mode 100644
index 0000000..ec473b6
--- /dev/null
+++ b/Board/EM/Platform/AcpiPlatform.sdl
@@ -0,0 +1,483 @@
+TOKEN
+ Name = "ACPIPLATFORM_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable PLATFORM support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "S3_Power_Reduction_SUPPORT"
+ Value = "0"
+ Help = "Main switch to enable PLATFORM support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "=== Platform Flavor Definition ======"
+ Help = "Define Platform Flavor Tokens: Mobile, Desktop etc"
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "Desktop_Platform"
+ Value = "0"
+ Help = "This is a tag for MB/DT platform decision. DON NOT CHANGE IT!"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "Mobile_Platform"
+ Value = "1"
+ Help = "This is a tag for MB/DT platform decision. DON NOT CHANGE IT!"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "UpServer_Platform"
+ Value = "2"
+ Help = "Platform Flavor UP Server"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "FlavorMobile"
+ Value = "1"
+ Help = "Platform Flavor Mobile"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FMBL"
+ Value = "$(FlavorMobile)"
+ Help = "Platform Flavor - Mobile flavor for ASL code."
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "FlavorDesktop"
+ Value = "2"
+ Help = "Platform Flavor Desktop"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FDTP"
+ Value = "$(FlavorDesktop)"
+ Help = "Platform Flavor - Desktop flavor for ASL code."
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "FlavorUpServer"
+ Value = "3"
+ Help = "Platform Flavor UP Server"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FUPS"
+ Value = "$(FlavorUpServer)"
+ Help = "Platform Flavor - UP Server flavor for ASL code."
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "FlavorWorkStation"
+ Value = "4"
+ Help = "Platform Flavor UP Server"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FUWS"
+ Value = "$(FlavorWorkStation)"
+ Help = "Platform Flavor - WorkStation flavor for ASL code."
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "FlavorPlatformMax"
+ Value = "5"
+ Help = "Platform Flavor Max: This is the last entry for Platform Flavor!"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "=== Board ID Definition ======"
+ Help = "Define Board ID Tokens: Shark Bay etc."
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "BoardIdGraysReef"
+ Value = "0x01"
+ Help = "Haswell - Grays Reef"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "BGR"
+ Value = "$(BoardIdGraysReef)"
+ Help = "Haswell - Grays Reef Board ID for ASL codee."
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "BoardIdFlatheadRock"
+ Value = "0x02"
+ Help = "Haswell - Flathead Rock"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "BFR"
+ Value = "$(BoardIdFlatheadRock)"
+ Help = "Haswell - Flathead Rock Board ID for ASL codee."
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "BoardIdBaskingRidge"
+ Value = "0x03"
+ Help = "Haswell - Basking Ridge"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "BBR"
+ Value = "$(BoardIdBaskingRidge)"
+ Help = "Haswell - Basking Ridge Board ID for ASL codee."
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "BoardIdWalnutCanyon"
+ Value = "0x04"
+ Help = "Haswell - Walnut Canyon"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "BWC"
+ Value = "$(BoardIdWalnutCanyon)"
+ Help = "Haswell - Walnut Canyon Board ID for ASL codee."
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "BoardIdhiteTipMountain1"
+ Value = "0x20"
+ Help = "Haswell - WhiteTip Mountain1"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "BWT1"
+ Value = "$(BoardIdhiteTipMountain1)"
+ Help = "Haswell - WhiteTip Mountain1 Board ID for ASL code."
+ TokenType = Integer
+ TargetASL = Yes
+ Range = "16-bit IO register"
+End
+
+TOKEN
+ Name = "BoardIdSawtoothPeak"
+ Value = "0x24"
+ Help = "Haswell - Sawtooth Peak"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "BSPC"
+ Value = "$(BoardIdSawtoothPeak)"
+ Help = "Haswell - Sawtooth Peak Board ID for ASL code."
+ TokenType = Integer
+ TargetASL = Yes
+ Range = "16-bit IO register"
+End
+
+TOKEN
+ Name = "BoardIdFlatheadCreek"
+ Value = "0x100"
+ Help = "Haswell - Flathead Creek"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "BFHC"
+ Value = "$(BoardIdFlatheadCreek)"
+ Help = "Haswell - Flathead Creek Board ID for ASL code."
+ TokenType = Integer
+ TargetASL = Yes
+ Range = "16-bit IO register"
+End
+
+TOKEN
+ Name = " "
+ TokenType = Integer
+End
+
+TOKEN
+ Name = "DeviceID1"
+ Value = "0x100"
+ Help = "Value for CRT Display"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DeviceID2"
+ Value = "0x400"
+ Help = "Value for Internal/Integrated Digital Flat Panel"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DeviceID3"
+ Value = "0x300"
+ Help = "Value for Digital Display 1"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DeviceID4"
+ Value = "0x301"
+ Help = "Value for Digital Display 2"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DeviceID5"
+ Value = "0x302"
+ Help = "Value for Digital Display 3"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DeviceID6"
+ Value = "0x303"
+ Help = "Value for Digital Display 4"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DeviceID7"
+ Value = "0x304"
+ Help = "Value for Digital Display 5"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DeviceID8"
+ Value = "0x305"
+ Help = "Value for Digital Display 6"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ValidDeviceIDs"
+ Value = "0x08"
+ Help = "Number of Valid Video Device Ids"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+PATH
+ Name = "AcpiPlatform_DIR"
+End
+
+MODULE
+ Help = "Includes AcpiPlatform.mak to Project"
+ File = "AcpiPlatform.mak"
+End
+
+TOKEN
+ Name = "ACPIPLATFORM_ASL_COMPILER"
+ Value = "$(AcpiPlatform_DIR)\iasl.exe"
+ Help = "ASL Optimizing Compiler version 20120711-32 [Jul 11 2012]"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "ACPI_ASL_COMPILER"
+ Value = "$(AcpiPlatform_DIR)\iasl.exe"
+ Help = "ASL Optimizing Compiler version 20120711-32 [Jul 11 2012]"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "GENACPI"
+ Value = "$(AcpiPlatform_DIR)\GenAcpiTable"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AcpiPlatformPei.ffs"
+ Parent = "$(BUILD_DIR)\SBPEI.ffs"
+ InvokeOrder = AfterParent
+ Token = "S3_Power_Reduction_SUPPORT" "=" "1"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AcpiPlatform.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AcpiPlatformSmi.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+ Token = "S3_Power_Reduction_SUPPORT" "=" "1"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\AcpiPlatform.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 40
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(AcpiPlatform_DIR)\AcpiPlatform.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 40
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "AcpiPlatformPei_OBJECTS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "AcpiPlatform_OBJECTS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "SignalExitPmAuthProtocolEvent,"
+ Parent = "SignalAllDriversConnectedEvent,"
+ InvokeOrder = BeforeParent
+End
+
+ELINK
+ Name = "SignalExitPmAuthProtocolEvent,"
+ Parent = "BeforeConnectFastBootDeviceHook"
+ Token = "FAST_BOOT_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "AcpiPlatformSmi_OBJECTS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\$(AcpiPlatform_DIR)\AcpiPlatformPei.obj"
+ Parent = "AcpiPlatformPei_OBJECTS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\$(AcpiPlatform_DIR)\AcpiPlatform.obj"
+ Parent = "AcpiPlatform_OBJECTS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\$(NB_BOARD_DIR)\GetSetupData.obj"
+ Parent = "AcpiPlatform_OBJECTS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\$(SB_BOARD_DIR)\GetSetupData.obj"
+ Parent = "AcpiPlatform_OBJECTS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\$(AcpiPlatform_DIR)\AcpiPlatformSmi.obj"
+ Parent = "AcpiPlatformSmi_OBJECTS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ACPI_PLATFORM_INCLUDES"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "/I $(AcpiPlatform_DIR)"
+ Parent = "ACPI_PLATFORM_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/I $(AcpiPlatform_DIR)\Library"
+ Parent = "ACPI_PLATFORM_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/FI$(AcpiPlatform_DIR)\AcpiIntelRC.h"
+ Parent = "ASLPREPROCESS_FLAG"
+ InvokeOrder = AfterParent
+End \ No newline at end of file
diff --git a/Board/EM/Platform/AcpiPlatform.uni b/Board/EM/Platform/AcpiPlatform.uni
new file mode 100644
index 0000000..5222520
--- /dev/null
+++ b/Board/EM/Platform/AcpiPlatform.uni
Binary files differ
diff --git a/Board/EM/Platform/AcpiPlatformCspLib.c b/Board/EM/Platform/AcpiPlatformCspLib.c
new file mode 100644
index 0000000..f31aa87
--- /dev/null
+++ b/Board/EM/Platform/AcpiPlatformCspLib.c
@@ -0,0 +1,150 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatformCspLib.c 1 2/09/12 12:30a Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/09/12 12:30a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatformCspLib.c $
+//
+// 1 2/09/12 12:30a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AcpiPlatformCspLib.c
+//
+// Description: This file will be build in CSP LIB
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+//----------------------------------------------------------------------------
+// Include(s)
+//----------------------------------------------------------------------------
+
+#include <Token.h>
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+
+// Produced Protocols
+#if FAST_BOOT_SUPPORT
+#include <Protocol/FastBootProtocol.h>
+#endif
+
+// Consumed Protocols
+
+//----------------------------------------------------------------------------
+// Constant, Macro and Type Definition(s)
+//----------------------------------------------------------------------------
+// Constant Definition(s)
+
+
+// Macro Definition(s)
+
+#define EXIT_PM_AUTH_PROTOCOL_GUID \
+ { \
+ 0xd088a413, 0xa70, 0x4217, 0xba, 0x55, 0x9a, 0x3c, 0xb6, 0x5c, 0x41, 0xb3 \
+ }
+// Type Definition(s)
+
+// Function Prototype(s)
+
+//----------------------------------------------------------------------------
+// Variable and External Declaration(s)
+//----------------------------------------------------------------------------
+// Variable Declaration(s)
+
+
+// GUID Definition(s)
+EFI_GUID gExitPmAuthProtocolGuid = EXIT_PM_AUTH_PROTOCOL_GUID;
+
+//----------------------------------------------------------------------------
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: AcpiPlatformSignalProtocolEvent
+//
+// Description: Internal function that installs/uninstall protocol
+// with a specified GUID and NULL interface.
+// Such protocols can be used as event signaling mechanism.
+//
+// Input: ProtocolGuid Pointer to the protocol GUID
+//
+// Output: None
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID AcpiPlatformSignalProtocolEvent(IN EFI_GUID *ProtocolGuid){
+ EFI_HANDLE Handle = NULL;
+ pBS->InstallProtocolInterface (
+ &Handle, ProtocolGuid, EFI_NATIVE_INTERFACE, NULL
+ );
+ pBS->UninstallProtocolInterface (
+ Handle, ProtocolGuid, NULL
+ );
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: SignalExitPmAuthProtocolEvent
+//
+// Description: The elink will signal gExitPmAuthProtocolGuid Event.
+//
+// Parameters: VOID
+//
+//
+// Returns: None
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID SignalExitPmAuthProtocolEvent(VOID){
+#if FAST_BOOT_SUPPORT
+ EFI_STATUS Status;
+ AMI_FAST_BOOT_PROTOCOL *FastBootProtocol = NULL;
+
+ Status = pBS->LocateProtocol(&AmiFastBootProtocolGuid, NULL, &FastBootProtocol);
+
+ if (EFI_ERROR(Status)) {
+ // Signaling gExitPmAuthProtocolGuid Event before AmiFastBootProtocolGuid is
+ // installed to avoid this event signaled twice.
+ AcpiPlatformSignalProtocolEvent(&gExitPmAuthProtocolGuid);
+ }
+#else
+ // Signaling gExitPmAuthProtocolGuid Event
+ AcpiPlatformSignalProtocolEvent(&gExitPmAuthProtocolGuid);
+#endif
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/AcpiPlatformPei.c b/Board/EM/Platform/AcpiPlatformPei.c
new file mode 100644
index 0000000..6c9eb0b
--- /dev/null
+++ b/Board/EM/Platform/AcpiPlatformPei.c
@@ -0,0 +1,231 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatformPei.c 1 2/09/12 12:30a Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/09/12 12:30a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatformPei.c $
+//
+// 1 2/09/12 12:30a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name: ACPIPLATFORM.C
+//
+// Description: Installs EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include <Efi.h>
+#include <Pei.h>
+#include <token.h>
+#include <AmiLib.h>
+#include <AmiPeiLib.h>
+#include <AmiCspLib.h>
+//#include <NB.h>
+#include <Ppi\Stall.h>
+
+#define MC_MMIO_CSHRDDR3CTL 0x1E8
+#define MC_RESET_CONTROL 0x05C
+#define IMC_DEV 3
+#define IMC_FUNC 0
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: AcpiPlatformPeiInit
+//
+// Description:
+//
+// Input:
+//
+// Output:
+// EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+// Here is the control flow of this function:
+//
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+AcpiPlatformPeiInit (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+{
+/*
+ EFI_STATUS Status ;
+ UINT32 Buffer32;
+ EFI_BOOT_MODE BootMode;
+ EFI_PEI_STALL_PPI *StallPpi;
+ EFI_GUID StallPpiGuid = EFI_PEI_STALL_PPI_GUID;
+
+ UINT32 RegEAX, RegEBX, RegECX, RegEDX;
+ UINT8 MaxBusNumber;
+ EFI_PEI_PCI_CFG_PPI *PciCfg;
+
+ // Determine boot mode
+ Status = (*PeiServices)->GetBootMode(PeiServices, &BootMode);
+ ASSERT_PEI_ERROR(PeiServices, Status);
+
+//Config GPIO, CRB use GPIO46 as output and drive it to logic high for S5/S0 boot path
+
+ Buffer32 = IoRead32(GPIO_BASE_ADDRESS + ICH_GPIO_USE_SEL2); // GPIO USE Select 2 Register
+ Buffer32 |= 0x00004000;
+ IoWrite32(GPIO_BASE_ADDRESS + ICH_GPIO_USE_SEL2, Buffer32); // Singal used as a GPIO
+
+ Buffer32 = IoRead32(GPIO_BASE_ADDRESS + ICH_GPIO_IO_SEL2); // GPIO Input/Output Select 2 Register
+ Buffer32 &= 0xFFFFBFFF;
+ IoWrite32(GPIO_BASE_ADDRESS + ICH_GPIO_IO_SEL2, Buffer32); // Program GPIO as a Output
+
+ if(BootMode == BOOT_WITH_FULL_CONFIGURATION || BootMode == BOOT_ON_S5_RESUME){
+ Buffer32 = IoRead32(GPIO_BASE_ADDRESS + ICH_GPIO_GP_LVL2); // GPIO Level Select 2 Register
+ Buffer32 |= 0x00004000;
+ IoWrite32(GPIO_BASE_ADDRESS + ICH_GPIO_GP_LVL2, Buffer32); // Program GPIO level drive to logic high
+
+ } // BootMode == BOOT_WITH_FULL_CONFIGURATION || BootMode == BOOT_ON_S5_RESUME
+
+
+ if(BootMode == BOOT_ON_S3_RESUME){
+ // Locate PPI stall service
+ Status = (**PeiServices).LocatePpi(PeiServices,
+ &StallPpiGuid,
+ 0,
+ NULL,
+ &StallPpi);
+
+ ASSERT_PEI_ERROR (PeiServices, Status);
+
+ CPULib_CpuID(1, &RegEAX, &RegEBX, &RegECX, &RegEDX);
+
+ if (((RegEAX & CPUID_FULL_FAMILY_MODEL) == CPUID_FULL_FAMILY_MODEL_DALES) ||
+ ((RegEAX & CPUID_FULL_FAMILY_MODEL) == CPUID_FULL_FAMILY_MODEL_DALES_32NM)) {
+ // Write MCHBAR + 0x1E8[2:0] = '110' to de-assert DDR_RESET#,
+ // this should be followed by a write to MCHBAR + 0x1E8[2:0] = '100'
+ // to maintain the state of the DDR_RESET# signal for future accesses to this register.
+ Mmio32(MCH_BASE_ADDRESS, MC_MMIO_CSHRDDR3CTL) &= ~(BIT2|BIT1|BIT0);
+ Mmio32(MCH_BASE_ADDRESS, MC_MMIO_CSHRDDR3CTL) |= (BIT2|BIT1);
+ Mmio32(MCH_BASE_ADDRESS, MC_MMIO_CSHRDDR3CTL) &= ~(BIT2|BIT1|BIT0);
+ Mmio32(MCH_BASE_ADDRESS, MC_MMIO_CSHRDDR3CTL) |= (BIT2);
+
+ //
+ // wait 50ms delay
+ //
+ StallPpi->Stall(PeiServices,
+ StallPpi,
+ 50000);
+
+ //Drive GPIO 46 high
+
+ //
+ // Set GP_LVL2 Register
+ //
+ Buffer32 = IoRead32(GPIO_BASE_ADDRESS + ICH_GPIO_GP_LVL2); // GPIO Level Select 2 Register
+ Buffer32 |= 0x00004000;
+ IoWrite32(GPIO_BASE_ADDRESS + ICH_GPIO_GP_LVL2, Buffer32); // Program GPIO level drive to logic high
+
+ } else if ((RegEAX & CPUID_FULL_FAMILY_MODEL) == CPUID_FULL_FAMILY_MODEL_FIELDS) {
+ //
+ // Set BIOS_RESET_ENABLE in MC_RESET_CONTROL register
+ //
+
+ //
+ // EFI_PCIEXBAR MSR 0x300 - BIT3 | BIT2 | BIT1
+ //
+ PciCfg = (*PeiServices)->PciCfg;
+
+ switch ((((UINT8)ReadMsr(0x300)) & (0xE)) >> 1)
+ {
+ default:
+ case 0x00:
+ MaxBusNumber = 0xFF;
+ break;
+
+ case 0x07:
+ MaxBusNumber = 0x7F;
+ break;
+
+ case 0x06:
+ MaxBusNumber = 0x3F;
+ break;
+ }
+
+ PciCfg->Read(
+ PeiServices,
+ PciCfg,
+ EfiPeiPciCfgWidthUint32,
+ PEI_PCI_CFG_ADDRESS(MaxBusNumber, 3, 0, MC_RESET_CONTROL),
+ &Buffer32);
+
+ Buffer32 |= (BIT0);
+
+ PciCfg->Write(
+ PeiServices,
+ PciCfg,
+ EfiPeiPciCfgWidthUint32,
+ PEI_PCI_CFG_ADDRESS(MaxBusNumber, 3, 0, MC_RESET_CONTROL),
+ &Buffer32);
+
+ // MmPci16(MaxBusNumber, IMC_DEV, IMC_FUNC, MC_RESET_CONTROL) |= (BIT0);
+
+ //
+ // wait 50ms delay
+ //
+ StallPpi->Stall(PeiServices,
+ StallPpi,
+ 50000);
+
+ //Drive GPIO 46 high
+
+ //
+ // Set GP_LVL2 Register
+ //
+ Buffer32 = IoRead32(GPIO_BASE_ADDRESS + ICH_GPIO_GP_LVL2); // GPIO Level Select 2 Register
+ Buffer32 |= 0x00004000;
+ IoWrite32(GPIO_BASE_ADDRESS + ICH_GPIO_GP_LVL2, Buffer32); // Program GPIO level drive to logic high
+ }
+
+ } // BootMode == BOOT_ON_S3_RESUME
+*/
+ return EFI_SUCCESS;
+}
+
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/AcpiPlatformPei.dxs b/Board/EM/Platform/AcpiPlatformPei.dxs
new file mode 100644
index 0000000..306a2ff
--- /dev/null
+++ b/Board/EM/Platform/AcpiPlatformPei.dxs
@@ -0,0 +1,50 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatformPei.dxs 1 2/09/12 12:30a Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/09/12 12:30a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatformPei.dxs $
+//
+// 1 2/09/12 12:30a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+#include "PPI\ReadOnlyVariable.h"
+#include "PPI\Stall.h"
+
+DEPENDENCY_START
+ EFI_PEI_READ_ONLY_VARIABLE_PPI_GUID AND
+ EFI_PEI_STALL_PPI_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/AcpiPlatformSmi.c b/Board/EM/Platform/AcpiPlatformSmi.c
new file mode 100644
index 0000000..af9e1ad
--- /dev/null
+++ b/Board/EM/Platform/AcpiPlatformSmi.c
@@ -0,0 +1,247 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatformSmi.c 1 2/09/12 12:30a Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/09/12 12:30a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatformSmi.c $
+//
+// 1 2/09/12 12:30a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AcpiPlatformSmi.c
+//
+// Description: This file contains code for all AcpiPlatform SMI events
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+//----------------------------------------------------------------------------
+// Include(s)
+//----------------------------------------------------------------------------
+
+#include <Token.h>
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+#include "SmmChildDispatch.h"
+
+// Produced Protocols
+
+// Consumed Protocols
+#include <Protocol\SmmBase.h>
+
+//----------------------------------------------------------------------------
+// Constant, Macro and Type Definition(s)
+//----------------------------------------------------------------------------
+// Constant Definition(s)
+
+
+// Macro Definition(s)
+
+// Type Definition(s)
+
+// Function Prototype(s)
+
+//----------------------------------------------------------------------------
+// Variable and External Declaration(s)
+//----------------------------------------------------------------------------
+// Variable Declaration(s)
+
+
+// GUID Definition(s)
+
+EFI_GUID gEfiSmmBaseProtocolGuid = EFI_SMM_BASE_PROTOCOL_GUID;
+EFI_GUID gSxDispatchProtocolGuid = EFI_SMM_SX_DISPATCH_PROTOCOL_GUID;
+
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: S3PowerReductionFunction
+//
+// Description: Driving GPIO46 Output to low
+//
+// Input: None
+//
+// Output: None
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID S3PowerReductionFunction(VOID)
+{
+ // UINT32 Buffer32;
+
+ // Buffer32 = IoRead32(GPIO_BASE_ADDRESS + ICH_GPIO_GP_LVL2); // GPIO Level Select 2 Register
+ // Buffer32 &= 0xFFFFBFFF;
+// IoWrite32(GPIO_BASE_ADDRESS + ICH_GPIO_GP_LVL2, Buffer32); // Program GPIO level drive to logic high
+
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: AcpiPlatformSxSmiHandler
+//
+// Description: This is a AcpiPlatform Sx SMI Handler for Calpella Platform.
+//
+// Input: DispatchHandle - EFI Handle
+// DispatchContext - Pointer to the EFI_SMM_SX_DISPATCH_CONTEXT
+//
+// Output: None
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID AcpiPlatformSxSmiHandler(
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_SX_DISPATCH_CONTEXT *DispatchContext)
+{
+ if (DispatchContext->Type == SxS3)
+ S3PowerReductionFunction();
+
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: InSmmFunction
+//
+// Description: Installs AcpiPlatform SMM Child Dispatcher Handler.
+//
+// Parameters: ImageHandle - Image handle
+// *SystemTable - Pointer to the system table
+//
+// Returns: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS InSmmFunction (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE Handle;
+ EFI_SMM_BASE_PROTOCOL *SmmBaseProtocol;
+ // Sx SMI
+ EFI_SMM_SX_DISPATCH_PROTOCOL *pSxDispatch;
+ EFI_SMM_SX_DISPATCH_CONTEXT SxS1Context = {SxS1, SxEntry};
+ EFI_SMM_SX_DISPATCH_CONTEXT SxS3Context = {SxS3, SxEntry};
+ EFI_SMM_SX_DISPATCH_CONTEXT SxS4Context = {SxS4, SxEntry};
+ EFI_SMM_SX_DISPATCH_CONTEXT SxS5Context = {SxS5, SxEntry};
+
+ Status = pBS->LocateProtocol( &gEfiSmmBaseProtocolGuid, \
+ NULL, \
+ &SmmBaseProtocol );
+ if (EFI_ERROR(Status)) return Status;
+
+ // Local SMI Procotol
+ Status = pBS->LocateProtocol(
+ &gSxDispatchProtocolGuid,
+ NULL,
+ &pSxDispatch);
+ if (EFI_ERROR(Status))
+ pSxDispatch = NULL;
+
+ // Register SMIs
+ if (pSxDispatch != NULL)
+ {
+ Status = pSxDispatch->Register(
+ pSxDispatch,
+ AcpiPlatformSxSmiHandler,
+ &SxS1Context,
+ &Handle);
+
+ Status = pSxDispatch->Register(
+ pSxDispatch,
+ AcpiPlatformSxSmiHandler,
+ &SxS3Context,
+ &Handle);
+
+ Status = pSxDispatch->Register(
+ pSxDispatch,
+ AcpiPlatformSxSmiHandler,
+ &SxS4Context,
+ &Handle);
+
+ Status = pSxDispatch->Register(
+ pSxDispatch,
+ AcpiPlatformSxSmiHandler,
+ &SxS5Context,
+ &Handle);
+ }
+
+
+
+ return EFI_SUCCESS;
+
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: InitializeAcpiPlatformSMISmm
+//
+// Description: Installs AcpiPlatform SMM Child Dispatcher Handler.
+//
+// Parameters: ImageHandle - Image handle
+// *SystemTable - Pointer to the system table
+//
+// Returns: EFI_STATUS
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS InitializeAcpiPlatformSMISmm (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable )
+{
+
+ InitAmiLib(ImageHandle, SystemTable);
+
+ return InitSmmHandler(ImageHandle, SystemTable, InSmmFunction, NULL);
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/AcpiPlatformSmi.dxs b/Board/EM/Platform/AcpiPlatformSmi.dxs
new file mode 100644
index 0000000..a7eeaf0
--- /dev/null
+++ b/Board/EM/Platform/AcpiPlatformSmi.dxs
@@ -0,0 +1,61 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatformSmi.dxs 1 2/09/12 12:30a Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/09/12 12:30a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/AcpiPlatformSmi.dxs $
+//
+// 1 2/09/12 12:30a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: AcpiPlatformSmi.DXS
+//
+// Description: This file is the dependency file for the AcpiPlatform SMI driver.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include <Protocol\BootScriptSave.h>
+#include <Protocol\SmmSwDispatch.h>
+
+DEPENDENCY_START
+ EFI_BOOT_SCRIPT_SAVE_GUID AND
+ EFI_SMM_SW_DISPATCH_PROTOCOL_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/EfiCombineImage/EfiCombineImage.c b/Board/EM/Platform/EfiCombineImage/EfiCombineImage.c
new file mode 100644
index 0000000..34dd321
--- /dev/null
+++ b/Board/EM/Platform/EfiCombineImage/EfiCombineImage.c
@@ -0,0 +1,223 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/EfiCombineImage/EfiCombineImage.c 1 12/18/12 11:10p Alanlin $
+//
+// $Revision: 1 $
+//
+// $Date: 12/18/12 11:10p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/EfiCombineImage/EfiCombineImage.c $
+//
+// 1 12/18/12 11:10p Alanlin
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name:
+//
+// Description:
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+// Include(s)
+
+#include "Efi.h"
+#include "token.h"
+#include <AmiLib.h>
+#include <AmiCspLib.h>
+#include <AmiDxeLib.h>
+#include <Pci.h>
+#include <Setup.h>
+#include <Protocol\PciIo.h>
+
+// Constant Definition(s)
+
+// Macro Definition(s)
+
+// Type Definition(s)
+
+// Function Prototype(s)
+
+
+// Variable Declaration(s)
+
+// GUID Definition(s)
+#if (PI_SPECIFICATION_VERSION < 0x00010000)
+EFI_GUID gFvProtocolGuid = EFI_FIRMWARE_VOLUME_PROTOCOL_GUID;
+#else
+EFI_GUID gFvProtocolGuid = EFI_FIRMWARE_VOLUME2_PROTOCOL_GUID;
+#endif
+
+#if NVidia_Optimus_dGPU == 1
+EFI_GUID gEfiCombineImageGuid = NVidia_dGPU_HEADER_GUID;
+#endif
+#if AMD_PX_CHELSEA_dGPU == 1
+EFI_GUID gEfiCombineImageGuid1 = AMD_CHELSEA_HEADER_GUID;
+#endif
+#if AMD_PX_THAMES_dGPU == 1
+EFI_GUID gEfiCombineImageGuid2 = AMD_THAMES_HEADER_GUID;
+#endif
+
+// Protocol Definition(s)
+
+// External Declaration(s)
+
+// Function Definition(s)
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Name: GetEfiCombineImage
+//
+// Description: None.
+//
+// Input: None.
+//
+// Output: None.
+//
+// Notes: None.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS GetEfiCombineImage (
+ IN PCI_DEV_INFO *Device,
+ OUT VOID *RomImage,
+ OUT UINT64 RomSize
+)
+{
+ EFI_STATUS Status;
+ UINTN FvProtocolCount;
+ EFI_HANDLE *FvHandles = NULL;
+#if (PI_SPECIFICATION_VERSION < 0x00010000)
+ EFI_FIRMWARE_VOLUME_PROTOCOL *Fv;
+#else
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *Fv;
+#endif
+ UINTN Index;
+ UINT32 AuthenticationStatus;
+ UINT8 *Buffer = NULL;
+ UINTN BufferSize;
+
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ &gFvProtocolGuid,
+ NULL,
+ &FvProtocolCount,
+ &FvHandles
+ );
+ if (!EFI_ERROR (Status)) {
+ for (Index = 0; Index < FvProtocolCount; Index++) {
+ Status = pBS->HandleProtocol (
+ FvHandles[Index],
+ &gFvProtocolGuid,
+ (VOID **) &Fv
+ );
+ if (!EFI_ERROR (Status)) {
+
+ switch (Device->DevVenId.DevId)
+ {
+#if NVidia_Optimus_dGPU == 1
+ case NVidia_dGPU_DID :
+ Status = Fv->ReadSection(
+ Fv,&gEfiCombineImageGuid,
+ EFI_SECTION_RAW,0,
+ &Buffer,&BufferSize,
+ &AuthenticationStatus
+ );
+ break;
+#endif
+
+#if AMD_PX_CHELSEA_dGPU == 1
+ case AMD_CHELSEA_DID :
+ Status = Fv->ReadSection(
+ Fv,&gEfiCombineImageGuid1,
+ EFI_SECTION_RAW,0,
+ &Buffer,&BufferSize,
+ &AuthenticationStatus
+ );
+ break;
+#endif
+
+#if AMD_PX_THAMES_dGPU == 1
+ case AMD_THAMES_DID :
+ Status = Fv->ReadSection(
+ Fv,&gEfiCombineImageGuid2,
+ EFI_SECTION_RAW,0,
+ &Buffer,&BufferSize,
+ &AuthenticationStatus
+ );
+ break;
+#endif
+ default :
+ break;
+ }
+
+ if (!EFI_ERROR (Status)) {
+ if(Device->PciIo.RomImage != NULL) {
+ pBS->FreePool (Device->PciIo.RomImage);
+ Device->PciIo.RomImage = NULL;
+ Device->PciIo.RomSize = 0;
+ }
+ //Check if Embeded Op ROM is valid...
+ if(*((UINT16*)Buffer)!=PCI_OPT_ROM_SIG) Status=EFI_NOT_FOUND;
+ else{
+ //Allocate buffer for ROM Image.
+ Device->PciIo.RomImage = Malloc (BufferSize);
+ if(Device->PciIo.RomImage == NULL) Status = EFI_OUT_OF_RESOURCES;
+ else {
+ MemCpy (Device->PciIo.RomImage, Buffer, BufferSize);
+ Device->PciIo.RomSize = BufferSize;
+ Device->Capab |= (EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE + EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM);
+ Device->Attrib |= (EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE + EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM);
+ Status = EFI_SUCCESS;
+ }
+ }
+ break;
+ }
+ }
+ }
+ }
+ else {
+ Status = EFI_NOT_FOUND;
+ }
+
+ if (FvHandles != NULL) {
+ pBS->FreePool (FvHandles);
+ FvHandles = NULL;
+ }
+
+ return Status;
+}
+
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/EfiCombineImage/EfiCombineImage.cif b/Board/EM/Platform/EfiCombineImage/EfiCombineImage.cif
new file mode 100644
index 0000000..3debf25
--- /dev/null
+++ b/Board/EM/Platform/EfiCombineImage/EfiCombineImage.cif
@@ -0,0 +1,10 @@
+<component>
+ name = "EFI Combine Image"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\EfiCombineImage\"
+ RefName = "EfiCombineImage"
+[files]
+"EfiCombineImage.sdl"
+"EfiCombineImage.mak"
+"EfiCombineImage.c"
+<endComponent>
diff --git a/Board/EM/Platform/EfiCombineImage/EfiCombineImage.mak b/Board/EM/Platform/EfiCombineImage/EfiCombineImage.mak
new file mode 100644
index 0000000..a95b067
--- /dev/null
+++ b/Board/EM/Platform/EfiCombineImage/EfiCombineImage.mak
@@ -0,0 +1,105 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/EfiCombineImage/EfiCombineImage.mak 1 12/18/12 11:10p Alanlin $
+#
+# $Revision: 1 $
+#
+# $Date: 12/18/12 11:10p $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/EfiCombineImage/EfiCombineImage.mak $
+#
+# 1 12/18/12 11:10p Alanlin
+#
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name:
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+all : EfiCombineImage EfiCombineImage1 EfiCombineImage2
+
+EfiCombineImage: \
+!IF "$(NVidia_Optimus_dGPU)" == "1"
+$(BUILD_DIR)\EfiCombineImageFile.ffs
+!ENDIF
+
+EfiCombineImage1: \
+!IF "$(AMD_PX_CHELSEA_dGPU)" == "1"
+$(BUILD_DIR)\EfiCombineImageFile1.ffs
+!ENDIF
+
+EfiCombineImage2: \
+!IF "$(AMD_PX_THAMES_dGPU)" == "1"
+$(BUILD_DIR)\EfiCombineImageFile2.ffs
+!ENDIF
+
+$(BUILD_DIR)\EfiCombineImage.mak : $(EfiCombineImage_DIR)\$(@B).cif $(EfiCombineImage_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(EfiCombineImage_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+AMI_CSP_LIB_OBJS = $(AMI_CSP_LIB_OBJS) \
+$(BUILD_DIR)\EfiCombineImage.obj
+
+{$(EfiCombineImage_DIR)}.c{$(BUILD_DIR)}.obj::
+ $(CC) $(CFLAGS) /Fo$(BUILD_DIR)\ $<
+
+$(BUILD_DIR)\EfiCombineImage.obj : $(EfiCombineImage_DIR)\EfiCombineImage.c
+
+!IF "$(NVidia_Optimus_dGPU)" == "1"
+$(BUILD_DIR)\EfiCombineImageFile.ffs : $(EfiCombineImageFile)
+ $(MAKE) /f Core\FFS.mak \
+ BUILD_DIR=$(BUILD_DIR) \
+ GUID=$(NVidia_dGPU_MAKFILE_GUID) \
+ TYPE=EFI_FV_FILETYPE_FREEFORM \
+ BINFILE=$** FFSFILE=$@ COMPRESS=1 NAME=$(**B)
+!ENDIF
+
+!IF "$(AMD_PX_CHELSEA_dGPU)" == "1"
+$(BUILD_DIR)\EfiCombineImageFile1.ffs : $(EfiCombineImageFile1)
+ $(MAKE) /f Core\FFS.mak \
+ BUILD_DIR=$(BUILD_DIR) \
+ GUID=$(AMD_CHELSEA_MAKFILE_GUID) \
+ TYPE=EFI_FV_FILETYPE_FREEFORM \
+ BINFILE=$** FFSFILE=$@ COMPRESS=1 NAME=$(**B)
+!ENDIF
+
+!IF "$(AMD_PX_THAMES_dGPU)" == "1"
+$(BUILD_DIR)\EfiCombineImageFile2.ffs : $(EfiCombineImageFile2)
+ $(MAKE) /f Core\FFS.mak \
+ BUILD_DIR=$(BUILD_DIR) \
+ GUID=$(AMD_THAMES_MAKFILE_GUID) \
+ TYPE=EFI_FV_FILETYPE_FREEFORM \
+ BINFILE=$** FFSFILE=$@ COMPRESS=1 NAME=$(**B)
+!ENDIF
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Platform/EfiCombineImage/EfiCombineImage.sdl b/Board/EM/Platform/EfiCombineImage/EfiCombineImage.sdl
new file mode 100644
index 0000000..91ddf21
--- /dev/null
+++ b/Board/EM/Platform/EfiCombineImage/EfiCombineImage.sdl
@@ -0,0 +1,203 @@
+TOKEN
+ Name = "EfiCombineImage"
+ Value = "0"
+ Help = "Main Switch to Enable Efi Combine Image"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "NVidia_Optimus_dGPU"
+ Value = "1"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "AMD_PX_CHELSEA_dGPU"
+ Value = "1"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "AMD_PX_THAMES_dGPU"
+ Value = "1"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NVidia_dGPU_DID"
+ Value = "0x0FD2"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "NVidia_Optimus_dGPU" "=" "1"
+End
+
+TOKEN
+ Name = "NVidia_dGPU_MAKFILE_GUID"
+ Value = "C5D7EAAD-B218-482c-A909-E3B8CDB00E94"
+ TokenType = Expression
+ TargetMAK = Yes
+ TargetH = Yes
+ Range = "GUID"
+ Token = "NVidia_Optimus_dGPU" "=" "1"
+End
+
+TOKEN
+ Name = "NVidia_dGPU_HEADER_GUID"
+ Value = "{0xC5D7EAAD,0xB218,0x482c,0xA9,0x09,0xE3,0xB8,0xCD,0xB0,0x0E,0x94}"
+ TokenType = Expression
+ TargetMAK = Yes
+ TargetH = Yes
+ Range = "GUID"
+ Token = "NVidia_Optimus_dGPU" "=" "1"
+End
+
+TOKEN
+ Name = "AMD_CHELSEA_DID"
+ Value = "0x682F"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "AMD_PX_CHELSEA_dGPU" "=" "1"
+End
+
+TOKEN
+ Name = "AMD_CHELSEA_MAKFILE_GUID"
+ Value = "B9C6D5AB-5914-4b1b-B33D-B10D9D0075BE"
+ TokenType = Expression
+ TargetMAK = Yes
+ TargetH = Yes
+ Range = "GUID"
+ Token = "AMD_PX_CHELSEA_dGPU" "=" "1"
+End
+
+TOKEN
+ Name = "AMD_CHELSEA_HEADER_GUID"
+ Value = "{0XB9C6D5AB,0X5914,0X4b1b,0XB3,0X3D,0XB1,0X0D,0X9D,0X00,0X75,0XBE}"
+ TokenType = Expression
+ TargetMAK = Yes
+ TargetH = Yes
+ Range = "GUID"
+ Token = "AMD_PX_CHELSEA_dGPU" "=" "1"
+End
+
+TOKEN
+ Name = "AMD_THAMES_DID"
+ Value = "0x6840"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "AMD_PX_THAMES_dGPU" "=" "1"
+End
+
+TOKEN
+ Name = "AMD_THAMES_MAKFILE_GUID"
+ Value = "633657DB-777F-4038-8D72-3E581518E03A"
+ TokenType = Expression
+ TargetMAK = Yes
+ TargetH = Yes
+ Range = "GUID"
+ Token = "AMD_PX_THAMES_dGPU" "=" "1"
+End
+
+TOKEN
+ Name = "AMD_THAMES_HEADER_GUID"
+ Value = "{0X633657DB,0X777F,0X4038,0X8D,0X72,0X3E,0X58,0X15,0X18,0XE0,0X3A}"
+ TokenType = Expression
+ TargetMAK = Yes
+ TargetH = Yes
+ Range = "GUID"
+ Token = "AMD_PX_THAMES_dGPU" "=" "1"
+End
+
+TOKEN
+ Name = "EfiCombineImageFile"
+ Value = "Chipset\NB\GOP\SandyBridge\vbt_edp.bin"
+ Help = "It is a sample, please modify to your VGA Oprom path."
+ TokenType = Expression
+ TargetMAK = Yes
+ Token = "NVidia_Optimus_dGPU" "=" "1"
+End
+
+TOKEN
+ Name = "EfiCombineImageFile1"
+ Value = "Chipset\NB\GOP\SandyBridge\vbt_edp.bin"
+ Help = "It is a sample, please modify to your VGA Oprom path."
+ TokenType = Expression
+ TargetMAK = Yes
+ Token = "AMD_PX_CHELSEA_dGPU" "=" "1"
+End
+
+TOKEN
+ Name = "EfiCombineImageFile2"
+ Value = "Chipset\NB\GOP\SandyBridge\vbt_edp.bin"
+ Help = "It is a sample, please modify to your VGA Oprom path."
+ TokenType = Expression
+ TargetMAK = Yes
+ Token = "AMD_PX_THAMES_dGPU" "=" "1"
+End
+
+PATH
+ Name = "EfiCombineImage_DIR"
+End
+
+MODULE
+ Help = "Includes EfiCombineImage.mak to Project"
+ File = "EfiCombineImage.mak"
+End
+
+ELINK
+ Name = "OEM_PCI_DEVICE_CALLBACK(0x10DE, NVidia_dGPU_DID, GetEfiCombineImage),"
+ Parent = "OEM_PCI_DEVICE_GET_OPT_ROM"
+ Help = "It is a sample(Nvidia Optims), please change DID and VID depend on your device."
+ Token = "NVidia_Optimus_dGPU" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "OEM_PCI_DEVICE_CALLBACK(0x1002, AMD_CHELSEA_DID, GetEfiCombineImage),"
+ Parent = "OEM_PCI_DEVICE_GET_OPT_ROM"
+ Help = "It is a sample(AMD Chelsea), please change DID and VID depend on your device."
+ Token = "AMD_PX_CHELSEA_dGPU" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "OEM_PCI_DEVICE_CALLBACK(0x1002, AMD_THAMES_DID, GetEfiCombineImage),"
+ Parent = "OEM_PCI_DEVICE_GET_OPT_ROM"
+ Help = "It is a sample(AMD Thames), please change DID and VID depend on your device."
+ Token = "AMD_PX_THAMES_dGPU" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\EfiCombineImageFile.ffs"
+ Parent = "FV_MAIN"
+ Token = "NVidia_Optimus_dGPU" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\EfiCombineImageFile1.ffs"
+ Parent = "FV_MAIN"
+ Token = "AMD_PX_CHELSEA_dGPU" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\EfiCombineImageFile2.ffs"
+ Parent = "FV_MAIN"
+ Token = "AMD_PX_THAMES_dGPU" "=" "1"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.c b/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.c
new file mode 100644
index 0000000..404a2cf
--- /dev/null
+++ b/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.c
@@ -0,0 +1,218 @@
+/** @file
+**/
+
+#include <Tiano.h>
+#include <EfiDriverLib.h>
+
+#include EFI_GUID_DEFINITION(DataHubRecords)
+#include EFI_PROTOCOL_CONSUMER(DataHub)
+#include EFI_PROTOCOL_CONSUMER(ExitPmAuth)
+#include <RcFviDxeLib.h>
+
+#include <Protocol\SMBios.h>
+
+
+#pragma pack(1)
+
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Handle;
+ UINT8 GroupName;
+} SMBIOS_TYPE14_STRUCTURE_HDR;
+
+typedef struct {
+ UINT8 Type;
+ UINT16 Handle;
+} SMBIOS_TYPE14_STRUCTURE_ITEM;
+
+#pragma pack()
+
+VOID CreateFirmwareVerInfo(IN EFI_EVENT Event, IN VOID *Context);
+
+EFI_SMBIOS_PROTOCOL *gSmbiosProtocol = NULL;
+
+/**
+ The user Entry Point for DXE driver. The user code starts with this function
+ as the real entry point for the image goes into a library that calls this
+ function.
+
+ @param[in] ImageHandle The firmware allocated handle for the EFI image.
+ @param[in] SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The entry point is executed successfully.
+ @retval other Some error occurs when executing this entry point.
+
+**/
+EFI_STATUS
+EFIAPI
+FirmwareVerInfoEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+ EFI_GUID gEfiSmbiosProtocolGuid = EFI_SMBIOS_PROTOCOL_GUID;
+ EFI_EVENT Event;
+
+ DxeInitializeDriverLib (ImageHandle, SystemTable);
+
+ Status = gBS->LocateProtocol(&gEfiSmbiosProtocolGuid, NULL, &gSmbiosProtocol);
+ ASSERT_EFI_ERROR(Status);
+ if (!EFI_ERROR(Status))
+ {
+ Status = EfiCreateEventReadyToBoot(
+ EFI_TPL_CALLBACK,
+ CreateFirmwareVerInfo,
+ NULL,
+ &Event
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+EFI_STATUS BuildFviStruct(BOOLEAN GroupAssociation, EFI_DATA_RECORD_HEADER *Record)
+{
+ static VOID *FviStructBuffer = NULL;
+ static UINTN FviStructBufferSize = 0;
+ static UINTN FviStructSize = 0;
+ static UINTN ElementCount = 0;
+
+ EFI_STATUS Status;
+ EFI_SUBCLASS_TYPE1_HEADER *DataHeader = NULL;
+ FVI_HEADER *FviHeader = NULL;
+ UINT16 BufferSize = 0;
+ SMBIOS_TYPE14_STRUCTURE_HDR *SmbiosHdr = NULL;
+ SMBIOS_TYPE14_STRUCTURE_ITEM *ItemPtr = NULL;
+ CHAR8 GroupName[] = "Firmware Version Info\0";
+
+ if (GroupAssociation)
+ {
+ if ((FviStructBuffer == NULL) && (FviStructSize > sizeof(SMBIOS_TYPE14_STRUCTURE_HDR)))
+ {
+ return EFI_UNSUPPORTED;
+ }
+
+ SmbiosHdr = (SMBIOS_TYPE14_STRUCTURE_HDR *)FviStructBuffer;
+
+ SmbiosHdr->Type = 14;
+ SmbiosHdr->Length = (UINT8)FviStructSize;
+ SmbiosHdr->Handle = 0xFFFF;
+
+ SmbiosHdr->GroupName = 0x01;
+ EfiAsciiStrCpy((CHAR8 *)((UINT8 *)FviStructBuffer+FviStructSize), GroupName);
+ FviStructSize += sizeof(GroupName);
+
+ Status = gSmbiosProtocol->SmbiosAddStructure((UINT8 *)SmbiosHdr, (UINT16)(FviStructSize));
+ if (!EFI_ERROR(Status))
+ {
+ gBS->FreePool(FviStructBuffer);
+ FviStructBuffer = NULL;
+ }
+
+ return Status;
+ }
+
+ if (Record == NULL)
+ {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (FviStructBuffer == NULL)
+ {
+ FviStructBufferSize = 0x2000;
+ FviStructBuffer = EfiLibAllocateZeroPool(FviStructBufferSize);
+ FviStructSize = sizeof(SMBIOS_TYPE14_STRUCTURE_HDR);
+ }
+
+ SmbiosHdr = (SMBIOS_TYPE14_STRUCTURE_HDR *)FviStructBuffer;
+ ItemPtr = (SMBIOS_TYPE14_STRUCTURE_ITEM *)(SmbiosHdr + 1);
+ ItemPtr += ElementCount;
+
+ if (EfiCompareGuid(&Record->DataRecordGuid, &gMiscSubClassName))
+ {
+ DataHeader = (EFI_SUBCLASS_TYPE1_HEADER *)(Record + 1);
+ FviHeader = (FVI_HEADER *)(UINT8 *)(DataHeader + 1);
+
+ if (FviHeader->Header.Type == FVI_SMBIOS_TYPE)
+ {
+ FviHeader->Header.Handle = 0xFFFF;
+ BufferSize = (UINT16)(Record->RecordSize - sizeof(EFI_DATA_RECORD_HEADER) - sizeof(EFI_SUBCLASS_TYPE1_HEADER));
+ Status = gSmbiosProtocol->SmbiosAddStructure((UINT8 *)FviHeader, BufferSize);
+ if (!EFI_ERROR(Status))
+ {
+ ItemPtr->Type = FviHeader->Header.Type;
+ ItemPtr->Handle = FviHeader->Header.Handle;
+ FviStructSize += sizeof(SMBIOS_TYPE14_STRUCTURE_ITEM);
+ ElementCount++;
+ }
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+VOID CreateFirmwareVerInfo(IN EFI_EVENT Event, IN VOID *Context)
+{
+ EFI_STATUS Status;
+ EFI_HANDLE DataHubHandle;
+ UINTN HandleSize;
+ EFI_DATA_HUB_PROTOCOL *DataHub = NULL;
+ EFI_DATA_RECORD_HEADER *Record = NULL;
+ UINT64 MonotonicCount = 0;
+
+ HandleSize = sizeof (EFI_HANDLE);
+
+ Status = gBS->LocateHandle (
+ ByProtocol,
+ &gEfiDataHubProtocolGuid,
+ NULL,
+ &HandleSize,
+ &DataHubHandle
+ );
+ if (EFI_ERROR (Status))
+ {
+ return;
+ }
+
+ Status = gBS->HandleProtocol (
+ DataHubHandle,
+ &gEfiDataHubProtocolGuid,
+ &DataHub
+ );
+ if (EFI_ERROR (Status))
+ {
+ return;
+ }
+
+ do {
+ Status = DataHub->GetNextRecord (
+ DataHub,
+ &MonotonicCount,
+ NULL,
+ &Record);
+ if (!EFI_ERROR (Status))
+ {
+ if (Record->DataRecordClass == EFI_DATA_RECORD_CLASS_DATA)
+ {
+ BuildFviStruct(FALSE, Record);
+ }
+ }
+ } while (!EFI_ERROR (Status) && (MonotonicCount != 0));
+
+ Status = BuildFviStruct(TRUE, NULL);
+ if (EFI_ERROR(Status))
+ {
+ DEBUG((EFI_D_ERROR, "!!!Firmware Version Information Error!!!\n"));
+ DEBUG((EFI_D_ERROR, "!!!Type 14 ¡V Group Associations Indicator!!!\n"));
+ }
+
+ if (Event != NULL)
+ {
+ gBS->CloseEvent(Event);
+ }
+}
diff --git a/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.cif b/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.cif
new file mode 100644
index 0000000..5113f3e
--- /dev/null
+++ b/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "FirmwareVerInfo"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\FirmwareVerInfo"
+ RefName = "FirmwareVerInfo"
+[files]
+"FirmwareVerInfo.sdl"
+"FirmwareVerInfo.mak"
+"FirmwareVerInfo.dxs"
+"FirmwareVerInfo.c"
+<endComponent>
diff --git a/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.dxs b/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.dxs
new file mode 100644
index 0000000..ea6c9fb
--- /dev/null
+++ b/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.dxs
@@ -0,0 +1,50 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/FirmwareVerInfo/FirmwareVerInfo.dxs 1 6/13/12 8:38a Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 6/13/12 8:38a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/FirmwareVerInfo/FirmwareVerInfo.dxs $
+//
+// 1 6/13/12 8:38a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Support Firmware Version Information.
+// [Files] AcpiPlatform.cif, Board/EM/Platform/FirmwareVerInfo/*.*
+//
+//*************************************************************************
+
+DEPENDENCY_START
+ AFTER {0xEDA39402, 0xF375, 0x4496, 0x92, 0xD3, 0x83, 0xB4, 0x3C, 0xB8, 0xA7, 0x6A}
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.mak b/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.mak
new file mode 100644
index 0000000..1d0c956
--- /dev/null
+++ b/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.mak
@@ -0,0 +1,29 @@
+# /*++
+#
+# --*/
+all : FirmwareVerInfo
+
+FirmwareVerInfo : $(BUILD_DIR)\FirmwareVerInfo.mak FirmwareVerInfoBin
+
+$(BUILD_DIR)\FirmwareVerInfo.mak : $(FirmwareVerInfo_DIR)\FirmwareVerInfo.cif $(FirmwareVerInfo_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(FirmwareVerInfo_DIR)\FirmwareVerInfo.cif $(CIF2MAK_DEFAULTS)
+
+FirmwareVerInfo_INCLUDES = \
+ $(EDK_INCLUDES)\
+ /I Include\
+ $(INTEL_PCH_INCLUDES)
+
+FirmwareVerInfo_LIB_LINKS =\
+ $(EFIDRIVERLIB)
+
+FirmwareVerInfoBin : $(FirmwareVerInfo_LIB_LINKS)
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\FirmwareVerInfo.mak all\
+ NAME=FirmwareVerInfo\
+ "MY_INCLUDES=$(FirmwareVerInfo_INCLUDES)"\
+ GUID=132A6630-FEB5-4ba2-85FB-FD2635379257\
+ ENTRY_POINT=FirmwareVerInfoEntryPoint\
+ DEPEX1=$(FirmwareVerInfo_DIR)\FirmwareVerInfo.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ TYPE=BS_DRIVER\
+ COMPRESS=1
diff --git a/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.sdl b/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.sdl
new file mode 100644
index 0000000..4cddc59
--- /dev/null
+++ b/Board/EM/Platform/FirmwareVerInfo/FirmwareVerInfo.sdl
@@ -0,0 +1,80 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/FirmwareVerInfo/FirmwareVerInfo.sdl 2 11/20/12 7:22a Alanlin $
+#
+# $Revision: 2 $
+#
+# $Date: 11/20/12 7:22a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/FirmwareVerInfo/FirmwareVerInfo.sdl $
+#
+# 2 11/20/12 7:22a Alanlin
+#
+# 1 6/13/12 8:38a Yurenlai
+# [TAG] None
+# [Category] Improvement
+# [Description] Support Firmware Version Information.
+# [Files] AcpiPlatform.cif, Board/EM/Platform/FirmwareVerInfo/*.*
+#
+#*************************************************************************
+TOKEN
+ Name = "FirmwareVerInfo_SUPPORT"
+ Value = "0"
+ Help = "Main switch to enable FirmwareVerInfo support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Token = "PI_SPECIFICATION_VERSION" ">=" "0x10000"
+End
+
+TOKEN
+ Name = "FVI_SMBIOS_TYPE"
+ Value = "0xDD"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+PATH
+ Name = "FirmwareVerInfo_DIR"
+End
+
+MODULE
+ Help = "Includes FirmwareVerInfo.mak to Project"
+ File = "FirmwareVerInfo.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\FirmwareVerInfo.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.c b/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.c
new file mode 100644
index 0000000..24abc14
--- /dev/null
+++ b/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.c
@@ -0,0 +1,512 @@
+/** @file
+UEFI PI specification supersedes Inte's Framework Specification.
+EFI_FIRMWARE_VOLUME_PROTOCOL defined in Intel Framework Pkg is replaced by
+EFI_FIRMWARE_VOLUME2_PROTOCOL in MdePkg.
+This module produces FV on top of FV2. This module is used on platform when both of
+these two conditions are true:
+1) Framework module consuming FV is present
+2) And the platform only produces FV2
+
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Module Name:
+
+**/
+
+#include "EdkIIGlueDxe.h"
+
+#include EFI_PROTOCOL_DEFINITION (FirmwareVolume2)
+#include EFI_PROTOCOL_DEFINITION (FirmwareVolume)
+
+#define FIRMWARE_VOLUME_PRIVATE_DATA_SIGNATURE EFI_SIGNATURE_32 ('f', 'v', 't', 'h')
+
+typedef struct {
+ UINTN Signature;
+ EFI_FIRMWARE_VOLUME_PROTOCOL FirmwareVolume;
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *FirmwareVolume2;
+} FIRMWARE_VOLUME_PRIVATE_DATA;
+
+#define FIRMWARE_VOLUME_PRIVATE_DATA_FROM_THIS(a) CR (a, FIRMWARE_VOLUME_PRIVATE_DATA, FirmwareVolume, FIRMWARE_VOLUME_PRIVATE_DATA_SIGNATURE)
+
+typedef UINT64 FRAMEWORK_EFI_FV_ATTRIBUTES;
+
+/**
+ Convert FV attrbiutes to FV2 attributes.
+
+ @param Fv2Attributes FV2 attributes.
+
+ @return FV attributes.
+
+**/
+FRAMEWORK_EFI_FV_ATTRIBUTES
+Fv2AttributesToFvAttributes (
+ IN EFI_FV_ATTRIBUTES Fv2Attributes
+ )
+{
+ //
+ // Clear those filed that is not defined in Framework FV spec and Alignment conversion.
+ //
+ return (Fv2Attributes & 0x1ff) | ((UINTN) EFI_FV_ALIGNMENT_2 << RShiftU64((Fv2Attributes & EFI_FV2_ALIGNMENT), 16));
+}
+
+/**
+ Retrieves attributes, insures positive polarity of attribute bits, returns
+ resulting attributes in output parameter.
+
+ @param This Calling context
+ @param Attributes output buffer which contains attributes
+
+ @retval EFI_SUCCESS The firmware volume attributes were returned.
+
+**/
+EFI_STATUS
+EFIAPI
+FvGetVolumeAttributes (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ OUT FRAMEWORK_EFI_FV_ATTRIBUTES *Attributes
+ )
+{
+ EFI_STATUS Status;
+ FIRMWARE_VOLUME_PRIVATE_DATA *Private;
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *FirmwareVolume2;
+
+ Private = FIRMWARE_VOLUME_PRIVATE_DATA_FROM_THIS (This);
+ FirmwareVolume2 = Private->FirmwareVolume2;
+
+ Status = FirmwareVolume2->GetVolumeAttributes (
+ FirmwareVolume2,
+ Attributes
+ );
+ if (!EFI_ERROR (Status)) {
+ *Attributes = Fv2AttributesToFvAttributes (*Attributes);
+ }
+ return Status;
+}
+
+/**
+ Sets volume attributes.
+
+ @param This Calling context
+ @param Attributes Buffer which contains attributes
+
+ @retval EFI_INVALID_PARAMETER A bit in Attributes was invalid
+ @retval EFI_SUCCESS The requested firmware volume attributes were set
+ and the resulting EFI_FV_ATTRIBUTES is returned in
+ Attributes.
+ @retval EFI_ACCESS_DENIED The Device is locked and does not permit modification.
+
+**/
+EFI_STATUS
+EFIAPI
+FvSetVolumeAttributes (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN OUT FRAMEWORK_EFI_FV_ATTRIBUTES *Attributes
+ )
+{
+ FIRMWARE_VOLUME_PRIVATE_DATA *Private;
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *FirmwareVolume2;
+ EFI_FV_ATTRIBUTES Fv2Attributes;
+ EFI_STATUS Status;
+
+ Private = FIRMWARE_VOLUME_PRIVATE_DATA_FROM_THIS (This);
+ FirmwareVolume2 = Private->FirmwareVolume2;
+
+ Fv2Attributes = (*Attributes & 0x1ff);
+ Status = FirmwareVolume2->SetVolumeAttributes (
+ FirmwareVolume2,
+ &Fv2Attributes
+ );
+
+ *Attributes = Fv2AttributesToFvAttributes (Fv2Attributes);
+
+ return Status;
+}
+
+/**
+ Read the requested file (NameGuid) and returns data in Buffer.
+
+ @param This Calling context
+ @param NameGuid Filename identifying which file to read
+ @param Buffer Pointer to pointer to buffer in which contents of file are returned.
+ <br>
+ If Buffer is NULL, only type, attributes, and size are returned as
+ there is no output buffer.
+ <br>
+ If Buffer != NULL and *Buffer == NULL, the output buffer is allocated
+ from BS pool by ReadFile
+ <br>
+ If Buffer != NULL and *Buffer != NULL, the output buffer has been
+ allocated by the caller and is being passed in.
+ @param BufferSize Indicates the buffer size passed in, and on output the size
+ required to complete the read
+ @param FoundType Indicates the type of the file who's data is returned
+ @param FileAttributes Indicates the attributes of the file who's data is resturned
+ @param AuthenticationStatus Indicates the authentication status of the data
+
+ @retval EFI_SUCCESS The call completed successfully
+ @retval EFI_WARN_BUFFER_TOO_SMALL The buffer is too small to contain the requested output.
+ The buffer is filled and the output is truncated.
+ @retval EFI_NOT_FOUND NameGuid was not found in the firmware volume.
+ @retval EFI_DEVICE_ERROR A hardware error occurred when attempting to access the firmware volume.
+ @retval EFI_ACCESS_DENIED The firmware volume is configured to disallow reads.
+ @retval EFI_OUT_OF_RESOURCES An allocation failure occurred.
+
+**/
+EFI_STATUS
+EFIAPI
+FvReadFile (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN EFI_GUID *NameGuid,
+ IN OUT VOID **Buffer,
+ IN OUT UINTN *BufferSize,
+ OUT EFI_FV_FILETYPE *FoundType,
+ OUT EFI_FV_FILE_ATTRIBUTES *FileAttributes,
+ OUT UINT32 *AuthenticationStatus
+ )
+{
+ FIRMWARE_VOLUME_PRIVATE_DATA *Private;
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *FirmwareVolume2;
+ EFI_STATUS Status;
+
+ Private = FIRMWARE_VOLUME_PRIVATE_DATA_FROM_THIS (This);
+ FirmwareVolume2 = Private->FirmwareVolume2;
+
+ Status = FirmwareVolume2->ReadFile (
+ FirmwareVolume2,
+ NameGuid,
+ Buffer,
+ BufferSize,
+ FoundType,
+ FileAttributes,
+ AuthenticationStatus
+ );
+
+ //
+ // For Framework FV attrbutes, only alignment fields are valid.
+ //
+ *FileAttributes = *FileAttributes & EFI_FV_FILE_ATTRIB_ALIGNMENT;
+
+ return Status;
+}
+
+/**
+ Read the requested section from the specified file and returns data in Buffer.
+
+ @param This Calling context
+ @param NameGuid Filename identifying the file from which to read
+ @param SectionType Indicates what section type to retrieve
+ @param SectionInstance Indicates which instance of SectionType to retrieve
+ @param Buffer Pointer to pointer to buffer in which contents of file are returned.
+ <br>
+ If Buffer is NULL, only type, attributes, and size are returned as
+ there is no output buffer.
+ <br>
+ If Buffer != NULL and *Buffer == NULL, the output buffer is allocated
+ from BS pool by ReadFile
+ <br>
+ If Buffer != NULL and *Buffer != NULL, the output buffer has been
+ allocated by the caller and is being passed in.
+ @param BufferSize Indicates the buffer size passed in, and on output the size
+ required to complete the read
+ @param AuthenticationStatus Indicates the authentication status of the data
+
+ @retval EFI_SUCCESS The call completed successfully.
+ @retval EFI_WARN_BUFFER_TOO_SMALL The buffer is too small to contain the requested output.
+ The buffer is filled and the output is truncated.
+ @retval EFI_OUT_OF_RESOURCES An allocation failure occurred.
+ @retval EFI_NOT_FOUND Name was not found in the firmware volume.
+ @retval EFI_DEVICE_ERROR A hardware error occurred when attempting to access the firmware volume.
+ @retval EFI_ACCESS_DENIED The firmware volume is configured to disallow reads.
+
+**/
+EFI_STATUS
+EFIAPI
+FvReadSection (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN EFI_GUID *NameGuid,
+ IN EFI_SECTION_TYPE SectionType,
+ IN UINTN SectionInstance,
+ IN OUT VOID **Buffer,
+ IN OUT UINTN *BufferSize,
+ OUT UINT32 *AuthenticationStatus
+ )
+{
+ FIRMWARE_VOLUME_PRIVATE_DATA *Private;
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *FirmwareVolume2;
+
+ Private = FIRMWARE_VOLUME_PRIVATE_DATA_FROM_THIS (This);
+ FirmwareVolume2 = Private->FirmwareVolume2;
+
+ return FirmwareVolume2->ReadSection (
+ FirmwareVolume2,
+ NameGuid,
+ SectionType,
+ SectionInstance,
+ Buffer,
+ BufferSize,
+ AuthenticationStatus
+ );
+}
+
+/**
+ Write the supplied file (NameGuid) to the FV.
+
+ @param This Calling context
+ @param NumberOfFiles Indicates the number of file records pointed to by FileData
+ @param WritePolicy Indicates the level of reliability of the write with respect to
+ things like power failure events.
+ @param FileData A pointer to an array of EFI_FV_WRITE_FILE_DATA structures. Each
+ element in the array indicates a file to write, and there are
+ NumberOfFiles elements in the input array.
+
+ @retval EFI_SUCCESS The write completed successfully.
+ @retval EFI_OUT_OF_RESOURCES The firmware volume does not have enough free space to store file(s).
+ @retval EFI_DEVICE_ERROR A hardware error occurred when attempting to access the firmware volume.
+ @retval EFI_WRITE_PROTECTED The firmware volume is configured to disallow writes.
+ @retval EFI_NOT_FOUND A delete was requested, but the requested file was not
+ found in the firmware volume.
+ @retval EFI_INVALID_PARAMETER A delete was requested with a multiple file write.
+ An unsupported WritePolicy was requested.
+ An unknown file type was specified.
+ A file system specific error has occurred.
+
+**/
+EFI_STATUS
+EFIAPI
+FvWriteFile (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN UINT32 NumberOfFiles,
+ IN EFI_FV_WRITE_POLICY WritePolicy,
+ IN EFI_FV_WRITE_FILE_DATA *FileData
+ )
+{
+ FIRMWARE_VOLUME_PRIVATE_DATA *Private;
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *FirmwareVolume2;
+ EFI_FV_WRITE_FILE_DATA *PiFileData;
+ EFI_STATUS Status;
+ UINTN Index;
+
+ Private = FIRMWARE_VOLUME_PRIVATE_DATA_FROM_THIS (This);
+ FirmwareVolume2 = Private->FirmwareVolume2;
+
+ PiFileData = AllocateCopyPool (sizeof (EFI_FV_WRITE_FILE_DATA), FileData);
+ ASSERT (PiFileData != NULL);
+
+ //
+ // Framework Spec assume firmware files are Memory-Mapped.
+ //
+ for (Index = 0; Index < NumberOfFiles; Index++) {
+ PiFileData[Index].FileAttributes |= EFI_FV_FILE_ATTRIB_MEMORY_MAPPED;
+ }
+
+ Status = FirmwareVolume2->WriteFile (
+ FirmwareVolume2,
+ NumberOfFiles,
+ WritePolicy,
+ (EFI_FV_WRITE_FILE_DATA *)FileData
+ );
+
+ FreePool (PiFileData);
+ return Status;
+}
+
+/**
+ Given the input key, search for the next matching file in the volume.
+
+ @param This Calling context
+ @param Key Pointer to a caller allocated buffer that contains an implementation
+ specific key that is used to track where to begin searching on
+ successive calls.
+ @param FileType Indicates the file type to filter for
+ @param NameGuid Guid filename of the file found
+ @param Attributes Attributes of the file found
+ @param Size Size in bytes of the file found
+
+ @retval EFI_SUCCESS The output parameters are filled with data obtained from
+ the first matching file that was found.
+ @retval EFI_NOT_FOUND No files of type FileType were found.
+ @retval EFI_DEVICE_ERROR A hardware error occurred when attempting to access
+ the firmware volume.
+ @retval EFI_ACCESS_DENIED The firmware volume is configured to disallow reads.
+
+**/
+EFI_STATUS
+EFIAPI
+FvGetNextFile (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN OUT VOID *Key,
+ IN OUT EFI_FV_FILETYPE *FileType,
+ OUT EFI_GUID *NameGuid,
+ OUT EFI_FV_FILE_ATTRIBUTES *Attributes,
+ OUT UINTN *Size
+ )
+{
+ FIRMWARE_VOLUME_PRIVATE_DATA *Private;
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *FirmwareVolume2;
+ EFI_STATUS Status;
+
+ Private = FIRMWARE_VOLUME_PRIVATE_DATA_FROM_THIS (This);
+ FirmwareVolume2 = Private->FirmwareVolume2;
+
+ Status = FirmwareVolume2->GetNextFile (
+ FirmwareVolume2,
+ Key,
+ FileType,
+ NameGuid,
+ Attributes,
+ Size
+ );
+
+ //
+ // For Framework FV attrbutes, only alignment fields are valid.
+ //
+ *Attributes = *Attributes & EFI_FV_FILE_ATTRIB_ALIGNMENT;
+
+ return Status;
+}
+
+//
+// Firmware Volume Protocol template
+//
+EFI_EVENT mFvRegistration;
+
+FIRMWARE_VOLUME_PRIVATE_DATA gFirmwareVolumePrivateDataTemplate = {
+ FIRMWARE_VOLUME_PRIVATE_DATA_SIGNATURE,
+ {
+ FvGetVolumeAttributes,
+ FvSetVolumeAttributes,
+ FvReadFile,
+ FvReadSection,
+ FvWriteFile,
+ FvGetNextFile,
+ 0,
+ NULL
+ },
+ NULL
+};
+
+//
+// Module globals
+//
+/**
+ This notification function is invoked when an instance of the
+ EFI_FIRMWARE_VOLUME2_PROTOCOL is produced. It installs another instance of the
+ EFI_FIRMWARE_VOLUME_PROTOCOL on the same handle.
+
+ @param Event The event that occured
+ @param Context Context of event. Not used in this nofication function.
+
+**/
+VOID
+EFIAPI
+FvNotificationEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+ UINTN BufferSize;
+ EFI_HANDLE Handle;
+ FIRMWARE_VOLUME_PRIVATE_DATA *Private;
+ EFI_FIRMWARE_VOLUME_PROTOCOL *FirmwareVolume;
+
+ while (TRUE) {
+ BufferSize = sizeof (Handle);
+ Status = gBS->LocateHandle (
+ ByRegisterNotify,
+ &gEfiFirmwareVolume2ProtocolGuid,
+ mFvRegistration,
+ &BufferSize,
+ &Handle
+ );
+ if (EFI_ERROR (Status)) {
+ //
+ // Exit Path of While Loop....
+ //
+ break;
+ }
+
+ //
+ // Skip this handle if the Firmware Volume Protocol is already installed
+ //
+ Status = gBS->HandleProtocol (
+ Handle,
+ &gEfiFirmwareVolumeProtocolGuid,
+ (VOID **)&FirmwareVolume
+ );
+ if (!EFI_ERROR (Status)) {
+ continue;
+ }
+
+ //
+ // Allocate private data structure
+ //
+ Private = AllocateCopyPool (sizeof (FIRMWARE_VOLUME_PRIVATE_DATA), &gFirmwareVolumePrivateDataTemplate);
+ if (Private == NULL) {
+ continue;
+ }
+
+ //
+ // Retrieve the Firmware Volume2 Protocol
+ //
+ Status = gBS->HandleProtocol (
+ Handle,
+ &gEfiFirmwareVolume2ProtocolGuid,
+ (VOID **)&Private->FirmwareVolume2
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Fill in rest of private data structure
+ //
+ Private->FirmwareVolume.KeySize = Private->FirmwareVolume2->KeySize;
+ Private->FirmwareVolume.ParentHandle = Private->FirmwareVolume2->ParentHandle;
+
+ //
+ // Install Firmware Volume Protocol onto same handle
+ //
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &Handle,
+ &gEfiFirmwareVolumeProtocolGuid,
+ &Private->FirmwareVolume,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+}
+
+
+/**
+ The user Entry Point for DXE driver. The user code starts with this function
+ as the real entry point for the image goes into a library that calls this
+ function.
+
+ @param[in] ImageHandle The firmware allocated handle for the EFI image.
+ @param[in] SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The entry point is executed successfully.
+ @retval other Some error occurs when executing this entry point.
+
+**/
+EFI_STATUS
+EFIAPI
+InitializeFirmwareVolume2 (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EfiCreateProtocolNotifyEvent (
+ &gEfiFirmwareVolume2ProtocolGuid,
+ TPL_CALLBACK,
+ FvNotificationEvent,
+ NULL,
+ &mFvRegistration
+ );
+ return EFI_SUCCESS;
+}
diff --git a/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.cif b/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.cif
new file mode 100644
index 0000000..298ce70
--- /dev/null
+++ b/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "FvOnFv2Thunk"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\FvOnFv2Thunk"
+ RefName = "FvOnFv2Thunk"
+[files]
+"FvOnFv2Thunk.sdl"
+"FvOnFv2Thunk.mak"
+"FvOnFv2Thunk.dxs"
+"FvOnFv2Thunk.c"
+<endComponent>
diff --git a/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.dxs b/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.dxs
new file mode 100644
index 0000000..74a64cc
--- /dev/null
+++ b/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.dxs
@@ -0,0 +1,47 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/FvOnFv2Thunk/FvOnFv2Thunk.dxs 1 4/25/12 1:05p Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 4/25/12 1:05p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/FvOnFv2Thunk/FvOnFv2Thunk.dxs $
+//
+// 1 4/25/12 1:05p Yurenlai
+// FvOnFv2Thunk initialization.
+//
+//*************************************************************************
+
+DEPENDENCY_START
+ TRUE
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.mak b/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.mak
new file mode 100644
index 0000000..551de97
--- /dev/null
+++ b/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.mak
@@ -0,0 +1,55 @@
+# /*++
+#
+# --*/
+all : FvOnFv2Thunk
+
+FvOnFv2Thunk : $(BUILD_DIR)\FvOnFv2Thunk.mak FvOnFv2ThunkBin
+
+$(BUILD_DIR)\FvOnFv2Thunk.mak : $(FvOnFv2Thunk_DIR)\FvOnFv2Thunk.cif $(FvOnFv2Thunk_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(FvOnFv2Thunk_DIR)\FvOnFv2Thunk.cif $(CIF2MAK_DEFAULTS)
+
+FvOnFv2Thunk_INCLUDES = \
+ $(EdkIIGlueLib_INCLUDES)
+
+FvOnFv2Thunk_DEFINES = $(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=InitializeFirmwareVolume2"\
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_UEFI_DEVICE_PATH_LIB__ \
+ /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \
+ /D __EDKII_GLUE_UEFI_LIB__ \
+ /D __EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__ \
+ /D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ \
+ /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__
+
+FvOnFv2Thunk_LIB_LINKS =\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGlueBaseMemoryLib_LIB)\
+ $(EdkIIGlueDxeMemoryAllocationLib_LIB)\
+ $(EdkIIGlueUefiBootServicesTableLib_LIB)\
+ $(EdkIIGlueUefiLib_LIB)\
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+ $(EDKPROTOCOLLIB)
+
+FvOnFv2ThunkBin : $(FvOnFv2Thunk_LIB_LINKS)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\FvOnFv2Thunk.mak all\
+ NAME=FvOnFv2Thunk\
+ "MY_INCLUDES=$(FvOnFv2Thunk_INCLUDES)"\
+ "MY_DEFINES=$(FvOnFv2Thunk_DEFINES)" \
+ GUID=5007A40E-A5E0-44f7-86AE-662F9A91DA26\
+ ENTRY_POINT=_ModuleEntryPoint\
+ EDKIIModule=DXEDRIVER\
+ DEPEX1=$(FvOnFv2Thunk_DIR)\FvOnFv2Thunk.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ TYPE=BS_DRIVER\
+ COMPRESS=1\
diff --git a/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.sdl b/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.sdl
new file mode 100644
index 0000000..bc09146
--- /dev/null
+++ b/Board/EM/Platform/FvOnFv2Thunk/FvOnFv2Thunk.sdl
@@ -0,0 +1,68 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/FvOnFv2Thunk/FvOnFv2Thunk.sdl 1 4/25/12 1:04p Yurenlai $
+#
+# $Revision: 1 $
+#
+# $Date: 4/25/12 1:04p $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/FvOnFv2Thunk/FvOnFv2Thunk.sdl $
+#
+# 1 4/25/12 1:04p Yurenlai
+# FvOnFv2Thunk initialization.
+#
+#*************************************************************************
+TOKEN
+ Name = "FvOnFv2Thunk_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable FvOnFv2Thunk support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Token = "PI_SPECIFICATION_VERSION" ">=" "0x10000"
+End
+
+PATH
+ Name = "FvOnFv2Thunk_DIR"
+End
+
+MODULE
+ Help = "Includes FvOnFv2Thunk.mak to Project"
+ File = "FvOnFv2Thunk.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\FvOnFv2Thunk.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = BeforeParent
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Platform/GenAcpiTable.exe b/Board/EM/Platform/GenAcpiTable.exe
new file mode 100644
index 0000000..401283d
--- /dev/null
+++ b/Board/EM/Platform/GenAcpiTable.exe
Binary files differ
diff --git a/Board/EM/Platform/Include/IntelPlatformInclude.cif b/Board/EM/Platform/Include/IntelPlatformInclude.cif
new file mode 100644
index 0000000..a3d47bd
--- /dev/null
+++ b/Board/EM/Platform/Include/IntelPlatformInclude.cif
@@ -0,0 +1,10 @@
+<component>
+ name = "IntelPlatformInclude"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\Include"
+ RefName = "IntelPlatformInclude"
+[files]
+"IntelPlatformInclude.sdl"
+[parts]
+"IntelPlatformPpi"
+<endComponent>
diff --git a/Board/EM/Platform/Include/IntelPlatformInclude.sdl b/Board/EM/Platform/Include/IntelPlatformInclude.sdl
new file mode 100644
index 0000000..636eb7d
--- /dev/null
+++ b/Board/EM/Platform/Include/IntelPlatformInclude.sdl
@@ -0,0 +1,15 @@
+TOKEN
+ Name = "INTEL_PLATFORM_INCLUDE_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable INTEL_PLATFORM_INCLUDE support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "IntelPlatformInclude_DIR"
+End
+
+
diff --git a/Board/EM/Platform/Include/Ppi/IntelPlatformPpi.cif b/Board/EM/Platform/Include/Ppi/IntelPlatformPpi.cif
new file mode 100644
index 0000000..011427c
--- /dev/null
+++ b/Board/EM/Platform/Include/Ppi/IntelPlatformPpi.cif
@@ -0,0 +1,9 @@
+<component>
+ name = "IntelPlatformPpi"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\Include\Ppi"
+ RefName = "IntelPlatformPpi"
+[files]
+"IntelPlatformPpi.sdl"
+"TcgPeiDone.h"
+<endComponent>
diff --git a/Board/EM/Platform/Include/Ppi/IntelPlatformPpi.sdl b/Board/EM/Platform/Include/Ppi/IntelPlatformPpi.sdl
new file mode 100644
index 0000000..694dd94
--- /dev/null
+++ b/Board/EM/Platform/Include/Ppi/IntelPlatformPpi.sdl
@@ -0,0 +1,15 @@
+TOKEN
+ Name = "INTEL_PLATFORM_PPI_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable INTEL_PLATFORM_PPI support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "IntelPlatformPpi_DIR"
+End
+
+
diff --git a/Board/EM/Platform/Include/Ppi/TcgPeiDone.h b/Board/EM/Platform/Include/Ppi/TcgPeiDone.h
new file mode 100644
index 0000000..5f91596
--- /dev/null
+++ b/Board/EM/Platform/Include/Ppi/TcgPeiDone.h
@@ -0,0 +1,43 @@
+/*++
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+--*/
+/*++
+
+Copyright (c) 1999 - 2010 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+
+Module Name:
+
+ TcgPeiDone.h
+
+Abstract:
+
+This file contains PPI GUID installed at the end of TCG component
+initialization
+
+--*/
+#ifndef _PEI_TCGPEIDONE_PPI_H_
+#define _PEI_TCGPEIDONE_PPI_H_
+
+//
+// This is an indicator GUID without any data. It represents the fact that a PEIM
+// has written the address of the PEI_TPM_PPI_GUID into the EFI_PEI_SERVICES
+//
+#define PEI_TPM_PPI_GUID \
+{ \
+ 0xca4853f4, 0xe94b, 0x42b4, 0x86, 0x42, 0xcd, 0xe2, 0x8a, 0x7f, 0xac, 0x2d \
+}
+
+extern EFI_GUID gPeiTpmPpiGuid;
+
+#endif
diff --git a/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.cif b/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.cif
new file mode 100644
index 0000000..35dcd67
--- /dev/null
+++ b/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "IntelRefVerDisplay"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\IntelRefVerDisplay"
+ RefName = "IntelRefVerDisplay"
+[files]
+"IntelRefVerDisplay.sdl"
+"IntelRefVerDisplay.mak"
+"IntelRefVerDisplay.sd"
+"IntelRefVerDisplay.uni"
+"IntelRefVerSetup.c"
+<endComponent>
diff --git a/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.mak b/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.mak
new file mode 100644
index 0000000..030dbed
--- /dev/null
+++ b/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.mak
@@ -0,0 +1,105 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/IntelRefVerDisplay/IntelRefVerDisplay.mak 4 6/13/12 8:51a Yurenlai $
+#
+# $Revision: 4 $
+#
+# $Date: 6/13/12 8:51a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/IntelRefVerDisplay/IntelRefVerDisplay.mak $
+#
+# 4 6/13/12 8:51a Yurenlai
+# [TAG] None
+# [Description] 01. Implement Intel Rapid Start Technology RC version
+# info.
+# 02. Remove DPTF and TxT RefCode version in setup, because
+# they are not separate components.
+# [Files] IntelRefVerDisplay.mak, IntelRefVerDisplay.sd,
+# IntelRefVerDisplay.uni, IntelRefVerSetup.c
+#
+# 3 4/25/12 1:22p Yurenlai
+# [TAG] None
+# [Category] Improvement
+# [Description] Corrected Setup RC Version info.
+# [Files] IntelRefVerDisplay.mak, IntelRefVerSetup.c, AcpiAsl.sdl
+#
+# 2 2/24/12 1:27a Yurenlai
+# Initial IntelRefVerDisplay midule part.
+#
+# 1 2/09/12 12:39a Yurenlai
+# Initial check in.
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: IntelRefVerDisplay.mak
+#
+# Description: MAK file for the IntelRefVerDisplay module
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+All : IntelRefVerDisplay
+
+IntelRefVerDisplay : $(BUILD_DIR)\IntelRefVerDisplay.mak
+
+SetupSdbs : $(BUILD_DIR)\IntelRefVerDisplay.sdb
+
+$(BUILD_DIR)\IntelRefVerDisplay.sdb : $(IntelRefVerDisplay_DIR)\$(@B).sd $(IntelRefVerDisplay_DIR)\$(@B).uni
+ $(STRGATHER) -i INCLUDE -parse -newdb -db $(BUILD_DIR)\$(@B).sdb $(IntelRefVerDisplay_DIR)\$(@B).uni
+ $(STRGATHER) -scan -db $(BUILD_DIR)\$(@B).sdb -od $(BUILD_DIR)\$(@B).sdb $(IntelRefVerDisplay_DIR)\$(@B).sd
+
+$(BUILD_DIR)\IntelRefVerDisplay.mak : $(IntelRefVerDisplay_DIR)\$(@B).cif $(IntelRefVerDisplay_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(IntelRefVerDisplay_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+IntelRefVerSetup_INCLUDES= \
+!if "$(INTEL_CPURC_SUPPORT)"=="1"
+ /I$(CpuProtocolLib_DIR)\
+!endif
+ /I$(INTEL_SA_PROTOCOL_LIB_DIR)\
+ /I$(INTEL_PCH_PROTOCOL_LIB_DIR)\
+ /I$(AcpiProtocolLib_DIR)\
+!if "$(iME_SUPPORT)"=="1"
+ /I$(MeProtocolLib_DIR)\
+!endif
+!if "$(IntelTXT_SUPPORT)"=="1"
+ /I$(TxtProtocolLib_DIR)\
+!endif
+!if "$(DigitalThermalSensor_SUPPORT)"=="1"
+ /I$(DtsProtocolLib_DIR)\
+!endif
+!if "$(RapidStart_SUPPORT)"=="1"
+ /I$(RapidStartProtocolLib_DIR)\
+!endif
+
+SetupBin : $(BUILD_DIR)\IntelRefVerSetup.obj
+
+$(BUILD_DIR)\IntelRefVerSetup.obj : $(PROJECT_DIR)\$(IntelRefVerDisplay_DIR)\IntelRefVerSetup.c $(BUILD_DIR)\SetupStrTokens.h
+ $(CC) $(CFLAGS) $(IntelRefVerSetup_INCLUDES) /Fo$(BUILD_DIR)\ $(IntelRefVerDisplay_DIR)\IntelRefVerSetup.c
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.sd b/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.sd
new file mode 100644
index 0000000..ee9b912
--- /dev/null
+++ b/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.sd
@@ -0,0 +1,159 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/IntelRefVerDisplay/IntelRefVerDisplay.sd 4 7/11/12 4:01a Yurenlai $
+//
+// $Revision: 4 $
+//
+// $Date: 7/11/12 4:01a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/IntelRefVerDisplay/IntelRefVerDisplay.sd $
+//
+// 4 7/11/12 4:01a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Corrected Setup RefCcode Version info.
+// [Files] IntelRefVerSetup.cm IntelRefVerDisplay.sd
+//
+// 3 6/13/12 8:51a Yurenlai
+// [TAG] None
+// [Description] 01. Implement Intel Rapid Start Technology RC version
+// info.
+// 02. Remove DPTF and TxT RefCode version in setup, because
+// they are not separate components.
+// [Files] IntelRefVerDisplay.mak, IntelRefVerDisplay.sd,
+// IntelRefVerDisplay.uni, IntelRefVerSetup.c
+//
+// 2 2/24/12 1:27a Yurenlai
+// Initial IntelRefVerDisplay midule part.
+//
+// 1 2/09/12 12:39a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IntelRefVerDisplay.sd
+//
+// Description: Setup file for IntelRefVerDisplay driver. It displays the
+// version of Intel RC Driver and its Version String in a form of Advanced
+// tab of setup screen
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#ifdef SETUP_DATA_DEFINITION
+// Put NVRAM data definitions here.
+// For example: UINT8 Data1;
+// These definitions will be converted by the build process
+// to a definitions of SETUP_DATA fields.
+#endif
+
+#ifdef ADVANCED_FORM_SET
+
+ #ifdef FORM_SET_ITEM
+ // Define controls to be added to the main page of the formset
+ #endif
+
+ #ifdef FORM_SET_GOTO
+ // Define goto commands for the forms defined in this file
+ goto INTEL_RC_VERSION_FORM_ID,
+ prompt = STRING_TOKEN(STR_INTEL_RC_VERSION_FORM),
+ help = STRING_TOKEN(STR_INTEL_RC_VERSION_FORM_HELP);
+ #endif
+
+
+ #ifdef FORM_SET_FORM
+ // Define forms
+ #ifndef INTEL_RC_VERSION_FORM_SETUP
+ #define INTEL_RC_VERSION_FORM_SETUP
+
+ form formid = AUTO_ID(INTEL_RC_VERSION_FORM_ID),
+ title = STRING_TOKEN(STR_INTEL_RC_VERSION_FORM);
+
+#if defined (INTEL_CPURC_SUPPORT) && INTEL_CPURC_SUPPORT
+ text
+ help = STRING_TOKEN (STR_INTEL_CPU_RC_VER_HELP),
+ text = STRING_TOKEN (STR_INTEL_CPU_RC_VER_NAME),
+ text = STRING_TOKEN (STR_INTEL_CPU_RC_VER_VALUE),
+ flags = 0, key = 0;
+#endif
+
+ text
+ help = STRING_TOKEN (STR_INTEL_SA_RC_VER_HELP),
+ text = STRING_TOKEN (STR_INTEL_SA_RC_VER_NAME),
+ text = STRING_TOKEN (STR_INTEL_SA_RC_VER_VALUE),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN (STR_INTEL_PCH_RC_VER_HELP),
+ text = STRING_TOKEN (STR_INTEL_PCH_RC_VER_NAME),
+ text = STRING_TOKEN (STR_INTEL_PCH_RC_VER_VALUE),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN (STR_INTEL_ACPI_RC_VER_HELP),
+ text = STRING_TOKEN (STR_INTEL_ACPI_RC_VER_NAME),
+ text = STRING_TOKEN (STR_INTEL_ACPI_RC_VER_VALUE),
+ flags = 0, key = 0;
+
+#if defined (iME_SUPPORT) && iME_SUPPORT
+ text
+ help = STRING_TOKEN (STR_INTEL_ME_RC_VER_HELP),
+ text = STRING_TOKEN (STR_INTEL_ME_RC_VER_NAME),
+ text = STRING_TOKEN (STR_INTEL_ME_RC_VER_VALUE),
+ flags = 0, key = 0;
+#endif
+
+#if defined (DigitalThermalSensor_SUPPORT) && DigitalThermalSensor_SUPPORT
+ text
+ help = STRING_TOKEN (STR_INTEL_DTS_RC_VER_HELP),
+ text = STRING_TOKEN (STR_INTEL_DTS_RC_VER_NAME),
+ text = STRING_TOKEN (STR_INTEL_DTS_RC_VER_VALUE),
+ flags = 0, key = 0;
+#endif
+
+#if defined (RapidStart_SUPPORT) && RapidStart_SUPPORT
+ text
+ help = STRING_TOKEN (STR_INTEL_RST_RC_VER_HELP),
+ text = STRING_TOKEN (STR_INTEL_RST_RC_VER_NAME),
+ text = STRING_TOKEN (STR_INTEL_RST_RC_VER_VALUE),
+ flags = 0, key = 0;
+#endif
+
+ endform; // VERSION_FORM_ID
+
+ #endif // INTEL_RC_VERSION_FORM_SETUP
+ #endif // FORM_SET_FORM
+
+#endif // ADVANCED_FORM_SET
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.sdl b/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.sdl
new file mode 100644
index 0000000..78bc42a
--- /dev/null
+++ b/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.sdl
@@ -0,0 +1,36 @@
+TOKEN
+ Name = "IntelRefVerDisplay_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable IntelRefVerDisplay support in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "IntelRefVerDisplay_DIR"
+End
+
+MODULE
+ Help = "Includes IntelRefVerDisplay.mak to Project"
+ File = "IntelRefVerDisplay.mak"
+End
+
+ELINK
+ Name = "InitIntelVersionInfo,"
+ Parent = "SetupStringInit"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\IntelRefVerDisplay.sdb"
+ Parent = "SETUP_SDBS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(IntelRefVerDisplay_DIR)\IntelRefVerDisplay.sd"
+ Parent = "SETUP_DEFINITIONS"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.uni b/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.uni
new file mode 100644
index 0000000..ddd4757
--- /dev/null
+++ b/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerDisplay.uni
Binary files differ
diff --git a/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerSetup.c b/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerSetup.c
new file mode 100644
index 0000000..ada088a
--- /dev/null
+++ b/Board/EM/Platform/IntelRefVerDisplay/IntelRefVerSetup.c
@@ -0,0 +1,261 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/IntelRefVerDisplay/IntelRefVerSetup.c 5 7/11/12 4:01a Yurenlai $
+//
+// $Revision: 5 $
+//
+// $Date: 7/11/12 4:01a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/IntelRefVerDisplay/IntelRefVerSetup.c $
+//
+// 5 7/11/12 4:01a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Corrected Setup RefCcode Version info.
+// [Files] IntelRefVerSetup.cm IntelRefVerDisplay.sd
+//
+// 4 6/13/12 8:51a Yurenlai
+// [TAG] None
+// [Description] 01. Implement Intel Rapid Start Technology RC version
+// info.
+// 02. Remove DPTF and TxT RefCode version in setup, because
+// they are not separate components.
+// [Files] IntelRefVerDisplay.mak, IntelRefVerDisplay.sd,
+// IntelRefVerDisplay.uni, IntelRefVerSetup.c
+//
+// 3 4/25/12 1:22p Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Corrected Setup RC Version info.
+// [Files] IntelRefVerDisplay.mak, IntelRefVerSetup.c, AcpiAsl.sdl
+//
+// 2 2/24/12 1:28a Yurenlai
+// Initial IntelRefVerDisplay midule part.
+//
+// 1 2/09/12 12:39a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: IntelRefVerSetup.c
+//
+// Description: Display the verison of Intel RC drivers
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+//----------------------------------------------------------------------------
+// Include(s)
+//----------------------------------------------------------------------------
+#include <Setup.h>
+#include <SetupStrTokens.h>
+#include <AmiDxeLib.h>
+#include <Token.h>
+#if defined (INTEL_CPURC_SUPPORT) && INTEL_CPURC_SUPPORT
+#include <CpuInfo\CpuInfo.h>
+#endif
+#include <SaInfo\SaInfo.h>
+#include <PchInfo\PchInfo.h>
+#include <AcpiInfo\AcpiInfo.h>
+#if defined (iME_SUPPORT) && iME_SUPPORT
+#include <MeRcInfo\MeRcInfo.h>
+#endif
+#if defined (IntelTXT_SUPPORT) && IntelTXT_SUPPORT
+#include <TxtInfo\TxtInfo.h>
+#endif
+#if defined (DigitalThermalSensor_SUPPORT) && DigitalThermalSensor_SUPPORT
+#include <DtsInfo\DtsInfo.h>
+#endif
+#if defined (RapidStart_SUPPORT) && RapidStart_SUPPORT
+#include <RapidStartInfo\RapidStartInfo.h>
+#endif
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name: UpdateStringValue
+//
+// Description: Update the value of Intel RC drivers string
+//
+// Input: UINT32 RCVersion - Intel RC driver version
+// STRING_REF StrRef - String Token defining which string in the database
+//
+// Output: VOID
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID
+UpdateStringValue(
+ EFI_HII_HANDLE HiiHandle,
+ UINT32 RCVersion,
+ STRING_REF StrRef
+)
+{
+ UINT8 x, y, z, w;
+
+ x = (UINT8) ((RCVersion & 0xFF000000) >> 24);
+ y = (UINT8) ((RCVersion & 0xFF0000) >> 16);
+ z = (UINT8) ((RCVersion & 0xFF00) >> 8);
+ w = (UINT8) ((RCVersion & 0xFF));
+
+ InitString ( HiiHandle,
+ StrRef,
+ L"%d.%d.%d.%d",
+ x, y, z, w);
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name: InitIntelVersionInfo
+//
+// Description: This function will fullfill the puspose to retrive the version
+// of Intel RC Drivers and put into variables of IntelRefVerDisplay.uni file.
+//
+// Input: EFI_HII_HANDLE HiiHandle
+//
+// Output: VOID
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID
+InitIntelVersionInfo(
+ EFI_HII_HANDLE HiiHandle,
+ UINT16 Class
+)
+{
+ EFI_STATUS Status;
+#if defined (INTEL_CPURC_SUPPORT) && INTEL_CPURC_SUPPORT
+ EFI_GUID gDxeCpuInfoProtocolGuid = DXE_CPU_INFO_PROTOCOL_GUID;
+ DXE_CPU_INFO_PROTOCOL *CpuInfo;
+#endif
+ EFI_GUID gEfiSaInfoProtocolGuid = EFI_SA_INFO_PROTOCOL_GUID;
+ EFI_SA_INFO_PROTOCOL *SaInfo;
+ EFI_GUID gEfiPchInfoProtocolGuid = EFI_PCH_INFO_PROTOCOL_GUID;
+ EFI_PCH_INFO_PROTOCOL *PchInfo;
+ EFI_GUID gEfiAcpiInfoProtocolGuid = EFI_ACPI_INFO_PROTOCOL_GUID;
+ EFI_ACPI_INFO_PROTOCOL *AcpiInfo;
+#if defined (iME_SUPPORT) && iME_SUPPORT
+ EFI_GUID gEfiMeRcInfoProtocolGuid = EFI_ME_RC_INFO_PROTOCOL_GUID;
+ EFI_ME_RC_INFO_PROTOCOL *MeInfo;
+#endif
+#if defined (DigitalThermalSensor_SUPPORT) && DigitalThermalSensor_SUPPORT
+ EFI_GUID gEfiDtsInfoProtocolGuid = EFI_DTS_INFO_PROTOCOL_GUID;
+ EFI_DTS_INFO_PROTOCOL *DtsInfo;
+#endif
+#if defined (RapidStart_SUPPORT) && RapidStart_SUPPORT
+ EFI_GUID gRapidStartInfoProtocolGuid = RAPID_START_INFO_PROTOCOL_GUID;
+ RAPID_START_INFO_PROTOCOL *RSTInfo;
+#endif
+
+ if (Class != ADVANCED_FORM_SET_CLASS) {
+ return;
+ }
+
+#if defined (INTEL_CPURC_SUPPORT) && INTEL_CPURC_SUPPORT
+ Status = pBS->LocateProtocol(&gDxeCpuInfoProtocolGuid,
+ NULL,
+ &CpuInfo);
+ if (!EFI_ERROR (Status)) {
+ UpdateStringValue(HiiHandle,
+ CpuInfo->RcVersion,
+ STRING_TOKEN (STR_INTEL_CPU_RC_VER_VALUE));
+ }
+#endif
+
+ // System Agent RefCode Version.
+ Status = pBS->LocateProtocol(&gEfiSaInfoProtocolGuid,
+ NULL,
+ &SaInfo);
+ if (!EFI_ERROR (Status)) {
+ UpdateStringValue(HiiHandle,
+ SaInfo->RCVersion,
+ STRING_TOKEN (STR_INTEL_SA_RC_VER_VALUE));
+ }
+
+ // Pch RefCode Version.
+ Status = pBS->LocateProtocol(&gEfiPchInfoProtocolGuid,
+ NULL,
+ &PchInfo);
+ if (!EFI_ERROR (Status)) {
+ UpdateStringValue(HiiHandle,
+ PchInfo->RCVersion,
+ STRING_TOKEN (STR_INTEL_PCH_RC_VER_VALUE));
+ }
+
+ // ACPI RefCode Version.
+ Status = pBS->LocateProtocol(&gEfiAcpiInfoProtocolGuid,
+ NULL,
+ &AcpiInfo);
+ if (!EFI_ERROR (Status)) {
+ UpdateStringValue(HiiHandle,
+ AcpiInfo->RCVersion,
+ STRING_TOKEN (STR_INTEL_ACPI_RC_VER_VALUE));
+ };
+
+#if defined (iME_SUPPORT) && iME_SUPPORT
+ Status = pBS->LocateProtocol(&gEfiMeRcInfoProtocolGuid,
+ NULL,
+ &MeInfo);
+ if (!EFI_ERROR (Status)) {
+ UpdateStringValue(HiiHandle,
+ MeInfo->RCVersion,
+ STRING_TOKEN (STR_INTEL_ME_RC_VER_VALUE));
+ }
+#endif
+
+#if defined (DigitalThermalSensor_SUPPORT) && DigitalThermalSensor_SUPPORT
+ Status = pBS->LocateProtocol(&gEfiDtsInfoProtocolGuid,
+ NULL,
+ &DtsInfo);
+ if (!EFI_ERROR (Status)) {
+ UpdateStringValue(HiiHandle,
+ DtsInfo->RCVersion,
+ STRING_TOKEN (STR_INTEL_DTS_RC_VER_VALUE));
+ }
+#endif
+
+#if defined (RapidStart_SUPPORT) && RapidStart_SUPPORT
+ Status = pBS->LocateProtocol(&gRapidStartInfoProtocolGuid,
+ NULL,
+ &RSTInfo);
+ if (!EFI_ERROR (Status)) {
+ UpdateStringValue(HiiHandle,
+ RSTInfo->RCVersion,
+ STRING_TOKEN (STR_INTEL_RST_RC_VER_VALUE));
+ }
+#endif
+
+ return;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/Library/Dxe/DxeKscLib/DxeKscLib.c b/Board/EM/Platform/Library/Dxe/DxeKscLib/DxeKscLib.c
new file mode 100644
index 0000000..f48c576
--- /dev/null
+++ b/Board/EM/Platform/Library/Dxe/DxeKscLib/DxeKscLib.c
@@ -0,0 +1,288 @@
+
+#include <Protocol\CpuIo.h>
+#include <AmiDxeLib.h>
+#include "KscLib.h"
+
+EFI_CPU_IO_PROTOCOL *mDxeKscLibCpuIo;
+
+BOOLEAN mDxeKscLibInitialized = FALSE;
+extern EFI_BOOT_SERVICES *pBS;
+
+//
+// Function implemenations
+//
+EFI_STATUS
+InitializeKscLib (
+ VOID
+ )
+/*++
+
+Routine Description:
+
+ Initialize the library.
+ The DXE library only requires CPU IO protocol, so this will locate CPU IO protocol
+ and save it for future use.
+
+Arguments:
+
+ None.
+
+Returns:
+
+ EFI_SUCCESS - KscLib is successfully initialized.
+
+--*/
+{
+ EFI_STATUS Status;
+ UINT8 Data;
+
+ //
+ // Locate CpuIo protocol
+ //
+
+ Status = pBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, &mDxeKscLibCpuIo);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Fail if EC doesn't exist.
+ //
+ mDxeKscLibCpuIo->Io.Read (mDxeKscLibCpuIo, EfiCpuIoWidthUint8, KSC_C_PORT, 1, &Data);
+ if(Data == 0xff){
+ mDxeKscLibInitialized = FALSE;
+ Status = EFI_DEVICE_ERROR;
+ } else {
+ mDxeKscLibInitialized = TRUE;
+ Status = EFI_SUCCESS;
+ }
+ return Status;
+}
+
+EFI_STATUS
+SendKscCommand (
+ UINT8 Command
+ )
+/*++
+
+Routine Description:
+
+ Sends command to Keyboard System Controller.
+
+Arguments:
+
+ Command - Command byte to send
+
+Returns:
+
+ EFI_SUCCESS - Command success
+ EFI_DEVICE_ERROR - Command error
+
+--*/
+{
+ UINTN Index;
+ UINT8 KscStatus;
+ EFI_STATUS Status;
+
+ KscStatus = 0;
+ Index = 0;
+
+ //
+ // Locate CpuIo protocol
+ //
+
+ Status = pBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, &mDxeKscLibCpuIo);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Wait for KSC to be ready (with a timeout)
+ //
+ ReceiveKscStatus (&KscStatus);
+ while (((KscStatus & KSC_S_IBF) != 0) && (Index < KSC_TIME_OUT)) {
+ pBS->Stall (15);
+ ReceiveKscStatus (&KscStatus);
+ Index++;
+ }
+ if (Index >= KSC_TIME_OUT) {
+ return EFI_DEVICE_ERROR;
+ }
+
+ //
+ // Send the KSC command
+ //
+ Status = mDxeKscLibCpuIo->Io.Write (
+ mDxeKscLibCpuIo,
+ EfiCpuIoWidthUint8,
+ KSC_C_PORT,
+ 1,
+ &Command
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+ReceiveKscStatus (
+ UINT8 *KscStatus
+ )
+/*++
+
+Routine Description:
+
+ Receives status from Keyboard System Controller.
+
+Arguments:
+
+ Status - Status byte to receive
+
+Returns:
+
+ EFI_SUCCESS - Always success
+
+--*/
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ //
+ // Locate CpuIo protocol
+ //
+
+ Status = pBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, &mDxeKscLibCpuIo);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Read and return the status
+ //
+ Status = mDxeKscLibCpuIo->Io.Read (
+ mDxeKscLibCpuIo,
+ EfiCpuIoWidthUint8,
+ KSC_C_PORT,
+ 1,
+ KscStatus
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+SendKscData (
+ UINT8 Data
+ )
+/*++
+
+Routine Description:
+
+ Sends data to Keyboard System Controller.
+
+Arguments:
+
+ Data - Data byte to send
+
+Returns:
+
+ EFI_SUCCESS - Success
+ EFI_TIMEOUT - Timeout
+ Other - Failed
+
+--*/
+{
+ UINTN Index;
+ UINT8 KscStatus;
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ Index = 0;
+
+ //
+ // Locate CpuIo protocol
+ //
+ Status = pBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, &mDxeKscLibCpuIo);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Wait for KSC to be ready (with a timeout)
+ //
+ ReceiveKscStatus (&KscStatus);
+ while (((KscStatus & KSC_S_IBF) != 0) && (Index < KSC_TIME_OUT)) {
+ pBS->Stall (15);
+ ReceiveKscStatus (&KscStatus);
+ Index++;
+ }
+ if (Index >= KSC_TIME_OUT) {
+ return EFI_DEVICE_ERROR;
+ }
+
+ //
+ // Send the data and return
+ //
+ Status = mDxeKscLibCpuIo->Io.Write (
+ mDxeKscLibCpuIo,
+ EfiCpuIoWidthUint8,
+ KSC_D_PORT,
+ 1,
+ &Data
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+ReceiveKscData (
+ UINT8 *Data
+ )
+/*++
+
+Routine Description:
+
+ Receives data from Keyboard System Controller.
+
+Arguments:
+
+ Data - Data byte received
+
+Returns:
+
+ EFI_SUCCESS - Read success
+ EFI_DEVICE_ERROR - Read error
+
+--*/
+{
+ UINTN Index;
+ UINT8 KscStatus;
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ Index = 0;
+
+ //
+ // Locate CpuIo protocol
+ //
+
+ Status = pBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, &mDxeKscLibCpuIo);
+ ASSERT_EFI_ERROR (Status);
+ //
+ // Wait for KSC to be ready (with a timeout)
+ //
+ ReceiveKscStatus (&KscStatus);
+ while (((KscStatus & KSC_S_OBF) == 0) && (Index < KSC_TIME_OUT)) {
+ pBS->Stall (15);
+ ReceiveKscStatus (&KscStatus);
+ Index++;
+ }
+ if (Index >= KSC_TIME_OUT) {
+ return EFI_DEVICE_ERROR;
+ }
+
+ //
+ // Read KSC data and return
+ //
+ Status = mDxeKscLibCpuIo->Io.Read (
+ mDxeKscLibCpuIo,
+ EfiCpuIoWidthUint8,
+ KSC_D_PORT,
+ 1,
+ Data
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
+}
diff --git a/Board/EM/Platform/Library/Dxe/DxeKscLib/DxeKscLib.cif b/Board/EM/Platform/Library/Dxe/DxeKscLib/DxeKscLib.cif
new file mode 100644
index 0000000..887e0f7
--- /dev/null
+++ b/Board/EM/Platform/Library/Dxe/DxeKscLib/DxeKscLib.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "DxeKscLib"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\Library\Dxe\DxeKscLib"
+ RefName = "DxeKscLib"
+[files]
+"DxeKscLib.sdl"
+"DxeKscLib.mak"
+"DxeKscLib.c"
+"KscLib.h"
+<endComponent>
diff --git a/Board/EM/Platform/Library/Dxe/DxeKscLib/DxeKscLib.mak b/Board/EM/Platform/Library/Dxe/DxeKscLib/DxeKscLib.mak
new file mode 100644
index 0000000..d60b49e
--- /dev/null
+++ b/Board/EM/Platform/Library/Dxe/DxeKscLib/DxeKscLib.mak
@@ -0,0 +1,65 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/IntelPlatformProtocolLib/DxeKscLib/DxeKscLib.mak 1 2/09/12 12:39a Yurenlai $
+#
+# $Revision: 1 $
+#
+# $Date: 2/09/12 12:39a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/IntelPlatformProtocolLib/DxeKscLib/DxeKscLib.mak $
+#
+# 1 2/09/12 12:39a Yurenlai
+# Initial check in.
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: <ComponentName>.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all : DxeKscLib
+
+$(BUILD_DIR)\DxeKscLib.lib : DxeKscLib
+
+DxeKscLib : $(BUILD_DIR)\DxeKscLib.mak DxeKscLibBin
+
+$(BUILD_DIR)\DxeKscLib.mak : $(DxeKscLib_DIR)\$(@B).cif $(DxeKscLib_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(DxeKscLib_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+DxeKscLibBin : $(EFIDRIVERLIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\DxeKscLib.mak all\
+ "CFLAGS=$(CFLAGS) "\
+ TYPE=LIBRARY \
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Platform/Library/Dxe/DxeKscLib/DxeKscLib.sdl b/Board/EM/Platform/Library/Dxe/DxeKscLib/DxeKscLib.sdl
new file mode 100644
index 0000000..677ad94
--- /dev/null
+++ b/Board/EM/Platform/Library/Dxe/DxeKscLib/DxeKscLib.sdl
@@ -0,0 +1,40 @@
+TOKEN
+ Name = "INTEL_CRB_DXE_KSC_LIB_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable INTEL_CRB_DXE_KSC_LIB(EC:H8)support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "DxeKscLib_DIR"
+End
+
+MODULE
+ Help = "Includes DxeKscLib.mak to Project"
+ File = "DxeKscLib.mak"
+End
+
+ELINK
+ Name = "DxeKscLib_LIB"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\DxeKscLib.lib"
+ Parent = "DxeKscLib_LIB"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "DxeKscLib_INCLUDES"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "/I $(DxeKscLib_DIR)"
+ Parent = "DxeKscLib_INCLUDES"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/Platform/Library/Dxe/DxeKscLib/KscLib.h b/Board/EM/Platform/Library/Dxe/DxeKscLib/KscLib.h
new file mode 100644
index 0000000..2aee1c7
--- /dev/null
+++ b/Board/EM/Platform/Library/Dxe/DxeKscLib/KscLib.h
@@ -0,0 +1,260 @@
+
+#ifndef _KSC_LIB_H_
+#define _KSC_LIB_H_
+
+//
+// Include files
+//
+///#include "Tiano.h"
+
+//
+// Timeout if KSC command/data fails
+//
+#define KSC_TIME_OUT 0x20000
+
+//
+// The Keyboard and System management Controller (KSC) implements a standard 8042 keyboard
+// controller interface at ports 0x60/0x64 and a ACPI compliant system management controller
+// at ports 0x62/0x66. Port 0x66 is the command and status port, port 0x62 is the data port.
+//
+#define KSC_D_PORT 0x62
+#define KSC_C_PORT 0x66
+
+//
+// Status Port 0x62
+//
+#define KSC_S_OVR_TMP 0x80 // Current CPU temperature exceeds the threshold
+#define KSC_S_SMI_EVT 0x40 // SMI event is pending
+#define KSC_S_SCI_EVT 0x20 // SCI event is pending
+#define KSC_S_BURST 0x10 // KSC is in burst mode or normal mode
+#define KSC_S_CMD 0x08 // Byte in data register is command/data
+#define KSC_S_IGN 0x04 // Ignored
+#define KSC_S_IBF 0x02 // Input buffer is full/empty
+#define KSC_S_OBF 0x01 // Output buffer is full/empty
+
+//
+// KSC commands that are issued to the KSC through the command port (0x66).
+// New commands and command parameters should only be written by the host when IBF=0.
+// Data read from the KSC data port is valid only when OBF=1.
+//
+#define KSC_C_SMI_NOTIFY_ENABLE 0x04 // Enable SMI notifications to the host
+#define KSC_C_SMI_NOTIFY_DISABLE 0x05 // SMI notifications are disabled and pending notifications cleared
+#define KSC_C_QUERY_SYS_STATUS 0x06 // Returns 1 byte of information about the system status
+#define KSC_B_SYS_STATUS_FAN 0x40 // Fan status (1 = ON)
+#define KSC_B_SYS_STATUS_DOCK 0x20 // Dock status (1 = Docked)
+#define KSC_B_SYS_STATUS_AC 0x10 // AC power (1 = AC powered)
+#define KSC_B_SYS_STATUS_THERMAL 0x0F // CPU thermal state (0 ~ 9)
+#define KSC_C_FAB_ID 0x0D // Get the board fab ID in the lower 3 bits
+#define KSC_C_SYSTEM_POWER_OFF 0x22 // Turn off the system power
+#define KSC_C_LAN_ON 0x46 // Turn on the power to LAN through EC/KSC
+#define KSC_C_LAN_OFF 0x47 // Turn off the power to LAN through EC/KSC
+#define KSC_C_GET_TEMP 0x50 // Returns the CPU temperature as read from the SMBus thermal sensor.
+#define KSC_C_SET_CTEMP 0x58 // The next byte written to the data port will be the shutdown temperature
+#define KSC_EC_PCH_SMBUS_EN 0x60 // EC PCH SMBus thermal monitoring Enable cmd
+#define KSC_EC_PCH_SMBUS_DIS 0x61 // EC PCH SMBus thermal monitoring Disable cmd
+#define KSC_TS_ON_DIMM_EN 0x6B // TS-on-DIMM thermal monitoring enable command
+#define KSC_TS_ON_DIMM_DIS 0x6C // TS-on-DIMM thermal monitoring disable command
+#define KSC_C_PCH_SMBUS_MSG_LENGTH 0x6D // PCH SMBus block read buffer length
+#define KSC_C_PCH_SMBUS_PEC_EN 0x6E // PCH SMBus Packet Error Checking (PEC) Enable command.
+#define KSC_C_PCH_SMBUS_PEC_DIS 0x76 // PCH SMBus Packet Error Checking (PEC) Disable command.
+#define KSC_C_EC_SMBUS_HIGH_SPEED 0x75 // EC SMBus high speed mode command
+#define KSC_EC_PCH_SMBUS_WRITE_EN 0x68 // EC PCH SMBus Write Enable cmd
+#define KSC_EC_PCH_SMBUS_WRITE_DIS 0x69 // EC PCH SMBus Write Disable cmd
+#define KSC_C_SMI_QUERY 0x70 // The host reads the data port to retrieve the notifications
+#define KSC_C_SMI_TIMER 0x71 // Commands the KSC to generate a periodic SMI to the host
+#define KSC_C_SMI_HOTKEY 0x72 // Get the scan code of hotkey pressed (CTRL + ALT + SHIFT + key)
+#define KSC_C_READ_MEM 0x80 // Read the KSC memory
+#define KSC_C_WRITE_MEM 0x81 // Write the KSC memory
+#define KSC_C_DOCK_STATUS 0x8A // Get the dock status
+#define KSC_B_DOCK_STATUS_ATTACH 0x01 // Dock status (1 = Attach)
+#define KSC_C_KSC_REVISION 0x90 // Get the revision for the KSC
+#define KSC_C_SMI_INJECT 0xBA // The next byte written to the data port will generate an immediate SMI
+#define KSC_C_SMI_DISABLE 0xBC // SMI generation by the KSC is disabled
+#define KSC_C_SMI_ENABLE 0xBD // SMI generation by the KSC is enabled
+#define KSC_C_ACPI_ENABLE 0xAA // Enable ACPI mode
+#define KSC_C_ACPI_DISABLE 0xAB // Disable ACPI mode
+
+//
+// KSC commands that are only valid if the EC has ACPI mode enabled.
+// Note that capacity and voltage are 16 bit values, thus you need to read them from
+// ACPI space with two reads (little Endian).
+//
+#define KSC_VIRTUAL_BAT_STATUS 48 // Status of the virtual battery (present)
+#define KSC_VIRTUAL_BAT_PRESENT_MASK 0x10 // Bit 4 is the indicator
+
+#define KSC_REAL_BAT1_STATUS 50 // Status of the first real battery (present, charging)
+#define KSC_REAL_BAT1_REMAINING_CAPACITY 89 // Remaining capacity in mWh
+#define KSC_REAL_BAT1_RESOLUTION_VOLTAGE 93 // Full resolution voltage in mV
+
+#define KSC_REAL_BAT2_STATUS 54 // Status of the second real battery (present, charging)
+#define KSC_REAL_BAT2_REMAINING_CAPACITY 99 // Remaining capacity in mWh
+#define KSC_REAL_BAT2_RESOLUTION_VOLTAGE 103 // Full resolution voltage in mV
+
+#define KSC_REAL_BAT_PRESENT_MASK 0x8 // Bit 3 is the indicator
+#define KSC_REAL_BAT_CHARGING_MASK 0x1 // Bit 1 is the indicator
+
+//
+// SMI notification code table, read through command KSC_C_SMI_QUERY
+//
+#define KSC_N_SMI_NULL 0x00 // Null marks the end of the SMI notification queue
+#define KSC_N_SMI_HOTKEY 0x20 // Hotkey pressed SMI
+#define KSC_N_SMI_ACINSERTION 0x30 // AC insertion SMI
+#define KSC_N_SMI_ACREMOVAL 0x31 // AC removal SMI
+#define KSC_N_SMI_PWRSW 0x32 // Power switch press SMI
+#define KSC_N_SMI_LID 0x33 // Lid switch change SMI
+#define KSC_N_SMI_VB 0x34 // Virtual battery switch change SMI
+#define KSC_N_SMI_THERM_0 0x60 // Thermal state 0 SMI
+#define KSC_N_SMI_THERM_1 0x61 // Thermal state 1 SMI
+#define KSC_N_SMI_THERM_2 0x62 // Thermal state 2 SMI
+#define KSC_N_SMI_THERM_3 0x63 // Thermal state 3 SMI
+#define KSC_N_SMI_THERM_4 0x64 // Thermal state 4 SMI
+#define KSC_N_SMI_THERM_5 0x65 // Thermal state 5 SMI
+#define KSC_N_SMI_THERM_6 0x66 // Thermal state 6 SMI
+#define KSC_N_SMI_THERM_7 0x67 // Thermal state 7 SMI
+#define KSC_N_SMI_THERM_8 0x68 // Thermal state 8 SMI
+#define KSC_N_SMI_DOCKED 0x70 // Dock complete SMI
+#define KSC_N_SMI_UNDOCKED 0x71 // Undock complete SMI
+#define KSC_N_SMI_UNDOCKREQUEST 0x72 // Undocking request SMI
+#define KSC_N_SMI_TIMER 0x80 // Timer wakeup SMI
+
+//
+// Hotkey scan code (CTRL + ALT + SHIFT + key)
+//
+#define KSC_HK_ESC 0x01 // ESC
+#define KSC_HK_1 0x02 // 1 !
+#define KSC_HK_2 0x03 // 2 @
+#define KSC_HK_3 0x04 // 3 #
+#define KSC_HK_4 0x05 // 4 $
+#define KSC_HK_5 0x06 // 5 %
+#define KSC_HK_6 0x07 // 6 ^
+#define KSC_HK_7 0x08 // 7 &
+#define KSC_HK_8 0x09 // 8 *
+#define KSC_HK_9 0x0A // 9 (
+#define KSC_HK_0 0x0B // 0 )
+#define KSC_HK_MINUS 0x0C // - _
+#define KSC_HK_ADD 0x0D // = +
+#define KSC_HK_F1 0x3B // F1
+#define KSC_HK_F2 0x3C // F2
+#define KSC_HK_F3 0x3D // F3
+#define KSC_HK_F4 0x3E // F4
+#define KSC_HK_F5 0x3F // F5
+#define KSC_HK_F6 0x40 // F6
+#define KSC_HK_F7 0x41 // F7
+#define KSC_HK_F8 0x42 // F8
+#define KSC_HK_F9 0x43 // F9
+#define KSC_HK_F10 0x44 // F10
+#define KSC_HK_F11 0x57 // F11
+#define KSC_HK_F12 0x58 // F12
+
+//
+// Function declarations
+//
+EFI_STATUS
+InitializeKscLib (
+ VOID
+ );
+/*++
+
+Routine Description:
+
+ This function initializes the KSC library.
+ It must be called before using any of the other KSC library functions.
+
+Arguments:
+
+ None.
+
+Returns:
+
+ EFI_SUCCESS - KscLib is successfully initialized.
+
+--*/
+
+EFI_STATUS
+SendKscCommand (
+ UINT8 Command
+ );
+/*++
+
+Routine Description:
+
+ Send a command to the Keyboard System Controller.
+
+Arguments:
+
+ Command - Command byte to send
+
+Returns:
+
+ EFI_SUCCESS - Command success
+ EFI_TIMEOUT - Command timeout
+ Other - Command failed
+
+--*/
+
+EFI_STATUS
+SendKscData (
+ UINT8 Data
+ );
+/*++
+
+Routine Description:
+
+ Sends data to Keyboard System Controller.
+
+Arguments:
+
+ Data - Data byte to send
+
+Returns:
+
+ EFI_SUCCESS - Success
+ EFI_TIMEOUT - Timeout
+ Other - Failed
+
+--*/
+
+EFI_STATUS
+ReceiveKscData (
+ UINT8 *Data
+ );
+/*++
+
+Routine Description:
+
+ Receives data from Keyboard System Controller.
+
+Arguments:
+
+ Data - Data byte received
+
+Returns:
+
+ EFI_SUCCESS - Read success
+ EFI_TIMEOUT - Read timeout
+ Other - Read failed
+
+--*/
+
+EFI_STATUS
+ReceiveKscStatus (
+ UINT8 *KscStatus
+ );
+/*++
+
+Routine Description:
+
+ Receives status from Keyboard System Controller.
+
+Arguments:
+
+ Status - Status byte to receive
+
+Returns:
+
+ EFI_SUCCESS - Success
+ Other - Failed
+
+--*/
+
+#endif
diff --git a/Board/EM/Platform/Library/IntelPlatformProtocolLib.cif b/Board/EM/Platform/Library/IntelPlatformProtocolLib.cif
new file mode 100644
index 0000000..37defe0
--- /dev/null
+++ b/Board/EM/Platform/Library/IntelPlatformProtocolLib.cif
@@ -0,0 +1,13 @@
+<component>
+ name = "IntelPlatformProtocolLib"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\Library"
+ RefName = "IntelPlatformProtocolLib"
+[files]
+"IntelPlatformProtocolLib.sdl"
+"IntelPlatformProtocolLib.mak"
+"Protocol\GlobalNvsArea\GlobalNvsArea.h"
+"Protocol\GlobalNvsArea\GlobalNvsArea.c"
+[parts]
+"DxeKscLib"
+<endComponent>
diff --git a/Board/EM/Platform/Library/IntelPlatformProtocolLib.mak b/Board/EM/Platform/Library/IntelPlatformProtocolLib.mak
new file mode 100644
index 0000000..e87ad62
--- /dev/null
+++ b/Board/EM/Platform/Library/IntelPlatformProtocolLib.mak
@@ -0,0 +1,64 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/IntelPlatformProtocolLib/IntelPlatformProtocolLib.mak 1 2/09/12 12:38a Yurenlai $
+#
+# $Revision: 1 $
+#
+# $Date: 2/09/12 12:38a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/IntelPlatformProtocolLib/IntelPlatformProtocolLib.mak $
+#
+# 1 2/09/12 12:38a Yurenlai
+# Initial check in.
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: <ComponentName>.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all : IntelPlatformProtocolLib
+
+$(BUILD_DIR)\IntelPlatformProtocolLib.lib : IntelPlatformProtocolLib
+
+IntelPlatformProtocolLib : $(BUILD_DIR)\IntelPlatformProtocolLib.mak IntelPlatformProtocolLibBin
+
+$(BUILD_DIR)\IntelPlatformProtocolLib.mak : $(IntelPlatformProtocolLib_DIR)\$(@B).cif $(IntelPlatformProtocolLib_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(IntelPlatformProtocolLib_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+IntelPlatformProtocolLibBin :
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\IntelPlatformProtocolLib.mak all\
+ "MY_INCLUDES= /I$(MISCFRAMEWORK_DIR) $(EDK_INCLUDES) $(INTEL_PLATFORM_PROTOCOL_INCLUDES)" \
+ TYPE=LIBRARY \
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Platform/Library/IntelPlatformProtocolLib.sdl b/Board/EM/Platform/Library/IntelPlatformProtocolLib.sdl
new file mode 100644
index 0000000..85a786e
--- /dev/null
+++ b/Board/EM/Platform/Library/IntelPlatformProtocolLib.sdl
@@ -0,0 +1,47 @@
+TOKEN
+ Name = "INTEL_PLATFORM_PROTOCOL_LIB_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable INTEL_PLATFORM_PROTOCOL_LIB support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "IntelPlatformProtocolLib_DIR"
+End
+
+MODULE
+ Help = "Includes IntelPlatformProtocolLib.mak to Project"
+ File = "IntelPlatformProtocolLib.mak"
+End
+
+ELINK
+ Name = "INTEL_PLATFORM_PROTOCOL_INCLUDES"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "/I$(PROJECT_DIR)\Board\EM\Platform"
+ Parent = "INTEL_PLATFORM_PROTOCOL_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/I$(PROJECT_DIR)\Board\EM\Platform\Library"
+ Parent = "INTEL_PLATFORM_PROTOCOL_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "IntelPlatformProtocolLib_LIB"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\IntelPlatformProtocolLib.lib"
+ Parent = "IntelPlatformProtocolLib_LIB"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/Platform/Library/Protocol/GlobalNvsArea/GlobalNvsArea.c b/Board/EM/Platform/Library/Protocol/GlobalNvsArea/GlobalNvsArea.c
new file mode 100644
index 0000000..dfa84f8
--- /dev/null
+++ b/Board/EM/Platform/Library/Protocol/GlobalNvsArea/GlobalNvsArea.c
@@ -0,0 +1,37 @@
+/*++
+
+Copyright (c) 1999 - 2010 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+
+Module Name:
+
+ GlobalNvsArea.c
+
+Abstract:
+
+ Global NVS Area description protocol implementation.
+
+--*/
+/*++
+ This file contains an 'Intel Peripheral Driver' and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+--*/
+
+
+#include "Tiano.h"
+
+#include EFI_PROTOCOL_DEFINITION (GlobalNvsArea)
+
+EFI_GUID gEfiGlobalNvsAreaProtocolGuid = EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID;
+
+EFI_GUID_STRING (&gEfiGlobalNvsAreaProtocolGuid, "Global NVS Area Protocol", "Protocol describing ACPI NVS memory region used by ACPI subsystem.");
diff --git a/Board/EM/Platform/Library/Protocol/GlobalNvsArea/GlobalNvsArea.h b/Board/EM/Platform/Library/Protocol/GlobalNvsArea/GlobalNvsArea.h
new file mode 100644
index 0000000..da4d4ee
--- /dev/null
+++ b/Board/EM/Platform/Library/Protocol/GlobalNvsArea/GlobalNvsArea.h
@@ -0,0 +1,535 @@
+/*++
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+--*/
+
+/*++
+
+Copyright (c) 1999 - 2010 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+
+Module Name:
+
+ GlobalNvsArea.h
+
+Abstract:
+
+ Definition of the global NVS area protocol. This protocol
+ publishes the address and format of a global ACPI NVS buffer used as a communications
+ buffer between SMM code and ASL code.
+ The format is derived from the ACPI reference code, version 0.95.
+
+ Note: Data structures defined in this protocol are not naturally aligned.
+
+--*/
+
+#ifndef _GLOBAL_NVS_AREA_H_
+#define _GLOBAL_NVS_AREA_H_
+
+//
+// Includes
+//
+
+
+//
+// Forward reference for pure ANSI compatability
+//
+EFI_FORWARD_DECLARATION (EFI_GLOBAL_NVS_AREA_PROTOCOL);
+
+//
+// Global NVS Area Protocol GUID
+//
+#define EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID \
+ { \
+ 0x74e1e48, 0x8132, 0x47a1, 0x8c, 0x2c, 0x3f, 0x14, 0xad, 0x9a, 0x66, 0xdc \
+ }
+//
+// Global NVS Area Protocol GUID
+//
+#define EFI_GLOBAL_SANVS_AREA_PROTOCOL_GUID \
+ { \
+ 0x9f8083d3, 0x292c, 0x4f8f, 0x88, 0x79, 0xca, 0xcc, 0x8e, 0x63, 0xed, 0x67 \
+ }
+//
+// Revision id - Added TPM related fields
+//
+#define GLOBAL_NVS_AREA_REVISION_1 1
+//
+// Extern the GUID for protocol users.
+//
+extern EFI_GUID gEfiGlobalNvsAreaProtocolGuid;
+extern EFI_GUID gEfiGlobalSaNvsAreaProtocolGuid;
+
+//
+// Global NVS Area definition
+//
+#pragma pack (1)
+typedef struct {
+ //
+ // Miscellaneous Dynamic Values, the definitions below need to be matched
+ // GNVS definitions in Platform.ASL
+ //
+ UINT16 OperatingSystem; // (000) Operating System
+ UINT8 SmiFunction; // (002) SMI Function Call (ASL to SMI via I/O Trap)
+ UINT8 SmiParameter0; // (003) SMIF - Parameter 0
+ UINT8 SmiParameter1; // (004) SMIF - Parameter 1
+ UINT8 SciFunction; // (005) SCI Function Call (SMI to ASL via _L00)
+ UINT8 SciParameter0; // (006) SCIF - Parameter 0
+ UINT8 SciParameter1; // (007) SCIF - Parameter 1
+ UINT8 GlobalLock; // (008) Global Lock Function Call (EC Communication)
+ UINT8 LockParameter0; // 009) LCKF - Parameter 0
+ UINT8 LockParameter1; // (010) LCKF - Parameter 1
+ UINT32 Port80DebugValue; // (011) Port 80 Debug Port Value
+ UINT8 PowerState; // (015) Power State (AC Mode = 1)
+ UINT8 DebugState; // (016) Debug State
+
+
+ //
+ // Thermal Policy Values
+ //
+ UINT8 THOF; // (017) Enable Thermal Offset for KSC
+ UINT8 Ac1TripPoint; // (018) Active Trip Point 1
+ UINT8 Ac0TripPoint; // (019) Active Trip Point
+ UINT8 PassiveThermalTripPoint; // (020) Passive Trip Point
+ UINT8 PassiveTc1Value; // (021) Passive Trip Point TC1 Value
+ UINT8 PassiveTc2Value; // (022) Passive Trip Point TC2 Value
+ UINT8 PassiveTspValue; // (023) Passive Trip Point TSP Value
+ UINT8 CriticalThermalTripPoint; // (024) Critical Trip Point
+ UINT8 EnableDigitalThermalSensor; // (025) Digital Thermal Sensor Enable
+ UINT8 BspDigitalThermalSensorTemperature; // (026) Digital Thermal Sensor 1 Reading
+ UINT8 ApDigitalThermalSensorTemperature; // (027) Digital Thermal Sensor 2 Reading
+ UINT8 DigitalThermalSensorSmiFunction; // (028) DTS SMI Function Call
+ UINT8 Reserved[1]; // (029)
+
+ //
+ // Battery Support Registers: (Moved outside this ASL code but still in used)
+ //
+ UINT8 NumberOfBatteries; // (030) Battery Number Present
+ UINT8 BatteryCapacity0; // (031) Battery 0 Stored Capacity
+ UINT8 BatteryCapacity1; // (032) Battery 1 Stored Capacity
+ UINT8 BatteryCapacity2; // (033) Battery 2 Stored Capacity
+ UINT8 BatteryStatus0; // (034) Battery 0 Stored Status
+ UINT8 BatteryStatus1; // (035) Battery 1 Stored Status
+ UINT8 BatteryStatus2; // (036) Battery 2 Stored Status
+
+ // NOTE: Do NOT Change the Offset of Revision Field
+ UINT8 Revision; // (037) Revision of the structure EFI_GLOBAL_NVS_AREA
+ UINT8 Reserved3[2]; // (038:039)
+
+ //
+ // Processor Configuration Values
+ //
+ UINT8 ApicEnable; // (040) APIC Enabled by SBIOS (APIC Enabled = 1)
+ UINT8 ThreadCount; // (041) Number of Enabled Threads
+ UINT8 CurentPdcState0; // (042) PDC settings, Processor 0
+ UINT8 CurentPdcState1; // (043) PDC settings, Processor 1
+ UINT8 MaximumPpcState; // (044) Maximum PPC state
+ UINT32 PpmFlags; // (045) PPM configuration flags, same as CFGD
+ UINT8 C6C7Latency; // (049) C6/C7 Entry/Exit latency
+
+ //
+ // SIO Configuration Values
+ //
+ UINT8 DockedSioPresent; // (050) Dock SIO Present
+ UINT8 DockComA; // (051) COM A Port
+ UINT8 DockComB; // (052) COM B Port
+ UINT8 DockLpt; // (053) LPT Port
+ UINT8 DockFdc; // (054) FDC Port
+ UINT8 SmscComPort; // (055) SMSC Com Port
+ UINT8 SmscComCirPort; // (056) SMSC Com CIR Port
+ UINT8 SMSC1007; // (057) SMSC1007 SIO Present
+ UINT8 WPCN381U; // (058) WPCN381U SIO Present
+ UINT8 SMSC1000; // (059) SMSC1000 SIO Present
+
+ //
+ // Extended Mobile Access Values
+ //
+ UINT8 EmaEnable; // (060) EMA Enable
+ UINT16 EmaPointer; // (061) EMA Pointer
+ UINT16 EmaLength; // (063:064) EMA Length
+
+ UINT8 Reserved8[1]; // (065)
+
+ //
+ // Mobile East Fork Values
+ //
+ UINT8 MefEnable; // (066) Mobile East Fork Enable
+
+ //
+ // PCIe Dock Status
+ //
+ UINT8 PcieDockStatus; // (067) PCIe Dock Status
+
+ UINT8 Reserved9[4]; // (068:071)
+
+ //
+ // TPM Registers
+ //
+ UINT8 MorData; // (072) Memory Overwrite Request Data
+ UINT8 TcgParamter; // (073) Used for save the Mor and/or physical presence paramter
+ UINT32 PPResponse; // (074) Physical Presence request operation response
+ UINT8 PPRequest; // (078) Physical Presence request operation
+ UINT8 LastPPRequest; // (079) Last Physical Presence request operation
+
+ //
+ // SATA Values
+ //
+ UINT8 GtfTaskFileBufferPort0[7]; // (080) GTF Task File Buffer for Port 0
+ UINT8 GtfTaskFileBufferPort2[7]; // (087) GTF Task File Buffer for Port 2
+ UINT8 IdeMode; // (094) IDE Mode (Compatible\Enhanced)
+ UINT8 GtfTaskFileBufferPort1[7]; // (095) GTF Task File Buffer for Port 1
+
+ //
+ // Board Id
+ // This field is for the ASL code to know whether this board is Matanzas, or Oakmont, etc
+ //
+ UINT16 BoardId; // (102) Platform board id
+ UINT8 PlatformId; // (104) Platform id
+ UINT8 ECTG; // (105) Toggle EC
+ UINT8 Reserved10[6]; // 106:111
+ UINT8 PcieOSCControl; // (112) PCIE OSC Control
+ UINT8 NativePCIESupport; // (113) Native PCI Express Support
+
+ //
+ // USB Sideband Deferring Support
+ //
+ UINT8 HostAlertVector1; // (114) GPE vector used for HOST_ALERT#1
+ UINT8 HostAlertVector2; // (115) GPE vector used for HOST_ALERT#2
+
+ UINT8 Reserved11[6]; // 116:121
+ UINT8 DosDisplaySupportFlag; // (122) _DOS Display Support Flag.
+ UINT8 EcAvailable; // (123) Embedded Controller Availability Flag.
+ UINT8 GPIC; // (124) Global IOAPIC/8259 Interrupt Mode Flag.
+ UINT8 CTYP; // (125) Global Cooling Type Flag.
+ UINT8 L01C; // (126) Global L01 Counter.
+ UINT8 VFN0; // (127) Virtual Fan0 Status.
+ UINT8 VFN1; // (128) Virtual Fan1 Status.
+ UINT8 VFN2; // (129) Virtual Fan2 Status.
+ UINT8 VFN3; // (130) Virtual Fan3 Status.
+ UINT8 VFN4; // (131) Virtual Fan4 Status.
+ UINT8 VFN5; // (132) Virtual Fan5 Status.
+ UINT8 VFN6; // (133) Virtual Fan6 Status.
+ UINT8 VFN7; // (134) Virtual Fan7 Status.
+ UINT8 VFN8; // (135) Virtual Fan8 Status.
+ UINT8 VFN9; // (136) Virtual Fan9 Status.
+ UINT8 Reserved12[6]; // 137:142
+
+ //
+ // Thermal
+ //
+ UINT8 ActiveThermalTripPointSA; // (143) Active Trip Point for MCH
+ UINT8 PassiveThermalTripPointSA; // (144) Passive Trip Point for MCH
+ UINT8 ActiveThermalTripPointTMEM; // (145) Active Trip Point for TMEM
+ UINT8 PassiveThermalTripPointTMEM; // (146) Passive Trip Point for TMEM
+ UINT32 PlatformCpuId; // (147) CPUID Feature Information [EAX]
+ UINT32 TBARB; // (151) Thermal Base Low Address for BIOS
+ UINT32 TBARBH; // (155) Thermal Base High Address for BIOS
+ UINT8 RunTimeInterface; // (159) Run Time Interface for Intelligent Power Savings
+ UINT8 TsOnDimmEnabled; // (160) TS-on-DIMM is chosen in SETUP and present on the DIMM
+ UINT8 ActiveThermalTripPointPCH; // (161) Active Trip Point for PCH
+ UINT8 PassiveThermalTripPointPCH; // (162) Passive Trip Point for PCH
+
+ //
+ // Board info
+ //
+ UINT8 PlatformFlavor; // (163) Platform Flavor
+ UINT8 BoardRev; // (164) Board Rev
+
+ // Package temperature
+ UINT8 PackageDTSTemperature; // (165) Package Temperature
+ UINT8 IsPackageTempMSRAvailable; // (166) Package Temperature MSR available
+ UINT8 PeciAccessMethod; // (167) PECI Access Method (Direct I/O or ACPI)
+ UINT8 Ac0FanSpeed; // (168) _AC0 Fan Speed
+ UINT8 Ac1FanSpeed; // (169) _AC1 Fan Speed
+ // New Thermal Policy Values for DTS.
+ UINT8 Ap2DigitalThermalSensorTemperature; // (170) Temperature of the second AP
+ UINT8 Ap3DigitalThermalSensorTemperature; // (171) Temperature of the third AP
+ UINT8 Reserved16[4]; // (172):(175) are reserved for future use
+
+ UINT8 LTRE1; // (176) Latency Tolerance Reporting Enable
+ UINT8 LTRE2; // (177) Latency Tolerance Reporting Enable
+ UINT8 LTRE3; // (178) Latency Tolerance Reporting Enable
+ UINT8 LTRE4; // (179) Latency Tolerance Reporting Enable
+ UINT8 LTRE5; // (180) Latency Tolerance Reporting Enable
+ UINT8 LTRE6; // (181) Latency Tolerance Reporting Enable
+ UINT8 LTRE7; // (182) Latency Tolerance Reporting Enable
+ UINT8 LTRE8; // (183) Latency Tolerance Reporting Enable
+
+ UINT8 OBFF1; // (184) Optimized Buffer Flush and Fill
+ UINT8 OBFF2; // (185) Optimized Buffer Flush and Fill
+ UINT8 OBFF3; // (186) Optimized Buffer Flush and Fill
+ UINT8 OBFF4; // (187) Optimized Buffer Flush and Fill
+ UINT8 OBFF5; // (188) Optimized Buffer Flush and Fill
+ UINT8 OBFF6; // (189) Optimized Buffer Flush and Fill
+ UINT8 OBFF7; // (190) Optimized Buffer Flush and Fill
+ UINT8 OBFF8; // (191) Optimized Buffer Flush and Fill
+
+ UINT8 XhciMode; // (192) xHCI controller mode
+ UINT32 XTUBaseAddress; // (193) XTU Continous structure Base Address
+ UINT32 XTUSize; // (197) XTU Entries Size
+ UINT32 XMPBaseAddress; // (201) XTU Base Address
+ UINT8 DDRReferenceFreq; // (205) DDR Reference Frequency
+
+ UINT8 Rtd3Support; // (206) Runtime D3 support.
+ UINT8 Rtd3P0dl; // (207) User selctable Delay for Device D0 transition.
+ UINT8 Rtd3P3dl; // (208) User selctable Delay for Device D3 transition.
+ //
+ // DPTF Devices and trip points
+ //
+ UINT8 EnableDptfDevice; // (209) EnableDptfDevice
+
+ UINT8 EnableSaDevice; // (210) EnableSaDevice
+ UINT8 CriticalThermalTripPointSA; // (211) CriticalThermalTripPointSa
+ UINT8 HotThermalTripPointSA; // (212) HotThermalTripPointSa
+
+ UINT8 EnablePchDevice; // (213) EnablePchDevice
+ UINT8 CriticalThermalTripPointPCH; // (214) CriticalThermalTripPointPch
+ UINT8 HotThermalTripPointPCH; // (215) HotThermalTripPointPch
+ //
+ // DPTF Policies
+ //
+ UINT8 EnableCtdpPolicy; // (216) EnableCtdpPolicy
+ UINT8 EnableLpmPolicy; // (217) EnableLpmPolicy
+ UINT8 CurrentLowPowerMode; // (218) CurrentLowPowerMode for LPM
+ UINT8 EnableCurrentExecutionUnit; // (219) EnableCurrentExecutionUnit
+ UINT16 TargetGfxFreq; // (220:221) TargetGfxFreq
+ //
+ // DPPM Devices and trip points
+ //
+ UINT8 EnableMemoryDevice; // (222) EnableMemoryDevice
+ UINT8 CriticalThermalTripPointTMEM; // (223) CriticalThermalTripPointTMEM
+ UINT8 HotThermalTripPointTMEM; // (224) HotThermalTripPointTMEM
+
+ UINT8 EnableFan1Device; // (225) EnableFan1Device
+ UINT8 EnableFan2Device; // (226) EnableFan2Device
+
+ UINT8 EnableAmbientDevice; // (227) EnableAmbientDevice
+ UINT8 ActiveThermalTripPointAmbient; // (228) ActiveThermalTripPointAmbient
+ UINT8 PassiveThermalTripPointAmbient; // (229) PassiveThermalTripPointAmbient
+ UINT8 CriticalThermalTripPointAmbient;// (230) CriticalThermalTripPointAmbient
+ UINT8 HotThermalTripPointAmbient; // (231) HotThermalTripPointAmbient
+
+ UINT8 EnableSkinDevice; // (232) EnableSkinDevice
+ UINT8 ActiveThermalTripPointSkin; // (233) ActiveThermalTripPointSkin
+ UINT8 PassiveThermalTripPointSkin; // (234) PassiveThermalTripPointSkin
+ UINT8 CriticalThermalTripPointSkin; // (235) CriticalThermalTripPointSkin
+ UINT8 HotThermalTripPointSkin; // (236) HotThermalTripPointSkin
+
+ UINT8 EnableExhaustFanDevice; // (237) EnableExhaustFanDevice
+ UINT8 ActiveThermalTripPointExhaustFan; // (238) ActiveThermalTripPointExhaustFan
+ UINT8 PassiveThermalTripPointExhaustFan; // (239) PassiveThermalTripPointExhaustFan
+ UINT8 CriticalThermalTripPointExhaustFan; // (240) CriticalThermalTripPointExhaustFan
+ UINT8 HotThermalTripPointExhaustFan; // (241) HotThermalTripPointExhaustFan
+
+ UINT8 EnableVRDevice; // (242) EnableVRDevice
+ UINT8 ActiveThermalTripPointVR; // (243) ActiveThermalTripPointVR
+ UINT8 PassiveThermalTripPointVR; // (244) PassiveThermalTripPointVR
+ UINT8 CriticalThermalTripPointVR; // (245) CriticalThermalTripPointVR
+ UINT8 HotThermalTripPointVR; // (246) HotThermalTripPointVR
+ //
+ // DPPM Policies
+ //
+ UINT8 EnableActivePolicy; // (247) EnableActivePolicy
+ UINT8 EnablePassivePolicy; // (248) EnablePassivePolicy
+ UINT8 EnableCriticalPolicy; // (249) EnableCriticalPolicy
+ UINT8 EnableCoolingModePolicy; // (250) EnableCoolingModePolicy
+ UINT8 TrtRevision; // (251) TrtRevision
+ //
+ // CLPO (Current Logical Processor Off lining Setting)
+ //
+ UINT8 LPOEnable; // (252) LPOEnable
+ UINT8 LPOStartPState; // (253) LPOStartPState
+ UINT8 LPOStepSize; // (254) LPOStepSize
+ UINT8 LPOPowerControlSetting; // (255) LPOPowerControlSetting
+ UINT8 LPOPerformanceControlSetting; // (256) LPOPerformanceControlSetting
+ //
+ // Miscellaneous DPTF
+ //
+ UINT32 PpccStepSize; // (257:260) PPCC Step Size
+ UINT8 EnableDisplayParticipant; // (261) EnableDisplayParticipant
+ //
+ // PFAT
+ //
+ UINT64 PfatMemAddress; // (262:269) PFAT Memory Address for Tool Interface
+ UINT8 PfatMemSize; // (270) PFAT Memory Size for Tool Interface
+ UINT16 PfatIoTrapAddress; // (271) PFAT IoTrap Address for Tool Interface
+ //
+ // Smart Connect Technology
+ //
+ UINT8 IsctCfg; // (273) Isct Configuration
+ //
+ // Audio DSP
+ //
+ UINT32 DspBar0; // (274) Audio DSP BAR0
+ UINT32 DspBar1; // (278) Audio DSP BAR1
+ //
+ // NFC support
+ //
+ UINT8 NFCEnable; // (282) NFC module selection
+ //
+ // ADSP Codec Selection
+ //
+ UINT8 AudioDspCodec; // (283) Audio Codec selection
+ //
+ // Sensor Hub Enable
+ //
+ UINT8 SensorHubEnable; // (284) Sensor Hub Enable
+
+ UINT8 LowPowerS0Idle; // (285) Low Power S0 Idle Enable
+
+ //
+ // BIOS only version of Config TDP
+ //
+ UINT8 ConfigTdpBios; // (286) enable/disable BIOS only version of Config TDP
+
+ UINT8 Reserved17[232]; // (287):(518) are reserved for future use
+ UINT8 EnablePowerDevice; // (519) EnablePowerDevice
+ UINT8 EnablePowerPolicy; // (520) EnablePowerPolicy
+ UINT8 UsbPowerResourceTest; // (521) RTD3 USB Power Resource config
+ //
+ // Intel Serial(R) IO Sensor Device Selection
+ //
+ UINT8 SDS0; // (522) I2C0 Sensor Device Selection
+ UINT16 SDS1; // (523) I2C1 Sensor Device Selection
+ UINT8 SDS2; // (525) SPI0 Sensor Device Selection
+ UINT8 SDS3; // (526) SPI1 Sensor Device Selection
+ UINT8 SDS4; // (527) UART0 Sensor Device Selection
+ UINT8 SDS5; // (528) UART1 Sensor Device Selection
+ UINT8 Reserved20[1]; // (529) 529 no longer used.
+ UINT8 RIC0; // (530) RTD3 support for I2C0 SH
+ UINT8 PepDevice; // (531) RTD3 PEP support list(BIT0 - GFx , BIT1 - Sata, BIT2 - UART, BIT3 - SDHC, Bit4 - I2C0, BIT5 - I2C1, Bit6 - XHCI, Bit7 - Audio)
+ UINT8 DVS0; // (532) Port0 DevSlp Enable
+ UINT8 DVS1; // (533) Port1 DevSlp Enable
+ UINT8 DVS2; // (534) Port2 DevSlp Enable
+ UINT8 DVS3; // (535) Port3 DevSlp Enable
+ UINT8 GBSX; // (536) Virtual GPIO button Notify Sleep State Change
+ UINT8 IUBE; // (537) IUER Button Enable
+ UINT8 IUCE; // (538) IUER Convertible Enable
+ UINT8 IUDE; // (539) IUER Dock Enable
+ UINT8 ECNO; // (540) EC Notification of Low Power S0 Idle State
+ UINT16 AUDD; // (541) RTD3 Audio Codec device delay
+ UINT16 DSPD; // (543) RTD3 ADSP device delay
+ UINT16 IC0D; // (545) RTD3 SensorHub delay time after applying power to device
+ UINT16 IC1D; // (547) RTD3 TouchPanel delay time after applying power to device
+ UINT16 IC1S; // (549) RTD3 TouchPad delay time after applying power to device
+ UINT16 VRRD; // (551) VR Ramp up delay
+ UINT8 PSCP; // (553) P-state Capping
+ UINT8 RWAG; // (554) Rtd3 W/A Gpio, allow W/A for port 1 and 6 to use GPIO from SDHC device
+ UINT16 I20D; // (555) Delay in _PS0 after powering up I2C0 Controller
+ UINT16 I21D; // (557) Delay in _PS0 after powering up I2C1 Controller
+
+ UINT8 Reserved18[2]; // (559:560) are reserved for future use
+ UINT8 RCG0; // (561) RTD3 Config Setting(BIT0:ZPODD,BIT1:USB Camera Port4, BIT2/3:SATA Port3)
+ UINT8 ECDB; // (562) EC Debug Light (CAPS LOCK) for when in Low Power S0 Idle State
+ UINT8 P2ME; // (563) Ps2 Mouse Enable
+
+ UINT16 SSH0; // (564) SSCN-LOW for I2C0
+ UINT16 SSL0; // (566) SSCN-HIGH for I2C0
+ UINT16 SSD0; // (568) SSCN-HOLD for I2C0
+ UINT16 FMH0; // (570) FMCN-LOW for I2C0
+ UINT16 FML0; // (572) FMCN-HIGH for I2C0
+ UINT16 FMD0; // (574) FMCN-HOLD for I2C0
+ UINT16 FPH0; // (576) FPCN-LOW for I2C0
+ UINT16 FPL0; // (578) FPCN-HIGH for I2C0
+ UINT16 FPD0; // (580) FPCN-HOLD for I2C0
+ UINT16 SSH1; // (582) SSCN-LOW for I2C1
+ UINT16 SSL1; // (584) SSCN-HIGH for I2C1
+ UINT16 SSD1; // (586) SSCN-HOLD for I2C1
+ UINT16 FMH1; // (588) FMCN-LOW for I2C1
+ UINT16 FML1; // (590) FMCN-HIGH for I2C1
+ UINT16 FMD1; // (592) FMCN-HOLD for I2C1
+ UINT16 FPH1; // (594) FPCN-LOW for I2C1
+ UINT16 FPL1; // (596) FPCN-HIGH for I2C1
+ UINT16 FPD1; // (598) FPCN-HOLD for I2C1
+ UINT16 M0C0; // (600) M0D3 for I2C0
+ UINT16 M1C0; // (602) M1D3 for I2C0
+ UINT16 M2C0; // (604) M0D0 for I2C0
+ UINT16 M0C1; // (606) M0D3 for I2C1
+ UINT16 M1C1; // (608) M1D3 for I2C1
+ UINT16 M2C1; // (610) M0D0 for I2C1
+ UINT16 M0C2; // (612) M0D3 for SPI0
+ UINT16 M1C2; // (614) M1D3 for SPI0
+ UINT16 M0C3; // (616) M0D3 for SPI1
+ UINT16 M1C3; // (618) M1D3 for SPI1
+ UINT16 M0C4; // (620) M0D3 for UA00
+ UINT16 M1C4; // (622) M1D3 for UA00
+ UINT16 M0C5; // (624) M0D3 for UA01
+ UINT16 M1C5; // (626) M1D3 for UA01
+ UINT8 TBSF; // (628) ThunderBolt SMI Function Number
+ UINT32 GIRQ; // (629) GPIO IRQ
+ UINT8 DMTP; // (633) PIRQS 34,50(GPIO)
+ UINT8 DMTD; // (634) PIRQX 39,55(GPIO)
+ UINT8 DMSH; // (635) PIRQM 28,14(GPIO)
+ UINT8 LANP; // (636) LAN PHY Status 0 = Not Present, 1 = Present
+ UINT8 Reserved19[1]; // (637) 637 no longer used.
+ UINT8 SHSB; // (638) Sensor Standby mode
+ UINT8 PL1LimitCS; // (639) set PL1 limit when entering CS
+ UINT16 PL1LimitCSValue; // (640) PL1 limit value
+ UINT8 GN1E; // (642) EnableGen1Participant
+ UINT8 G1AT; // (643) ActiveThermalTripPointGen1
+ UINT8 G1PT; // (644) PassiveThermalTripPointGen1
+ UINT8 G1CT; // (645) CriticalThermalTripPointGen1
+ UINT8 G1HT; // (646) HotThermalTripPointGen1
+ UINT8 GN2E; // (647) EnableGen2Participant
+ UINT8 G2AT; // (648) ActiveThermalTripPointGen2
+ UINT8 G2PT; // (649) PassiveThermalTripPointGen2
+ UINT8 G2CT; // (650) CriticalThermalTripPointGen2
+ UINT8 G2HT; // (651) HotThermalTripPointGen2
+ UINT8 WWSD; // (652) EnableWwanTempSensorDevice
+ UINT8 CVSD; // (653) EnableCpuVrTempSensorDevice
+ UINT8 SSDD; // (654) EnableSsdTempSensorDevice
+ UINT8 INLD; // (655) EnableInletFanTempSensorDevice
+ UINT8 IFAT; // (656) ActiveThermalTripPointInletFan
+ UINT8 IFPT; // (657) PassiveThermalTripPointInletFan
+ UINT8 IFCT; // (658) CriticalThermalTripPointInletFan
+ UINT8 IFHT; // (659) HotThermalTripPointInletFan
+ UINT8 DOSD; // (660) DMA OS detection, 1 = check for OS version when enabling DMA, 0 = don't care about OS
+ UINT8 USBH; // (661) USB Sensor Hub Enable/Disable
+ UINT8 BCV4; // (662) Broadcom's Bluetooth adapter's revision
+ UINT8 WTV0; // (663) I2C0/WITT devices version
+ UINT8 WTV1; // (664) I2C1/WITT devices version
+ UINT8 APFU; // (665) Atmel panel FW update Enable/Disable
+ UINT8 SOHP; // (666) SMI on Hot Plug for TBT devices
+ UINT8 NOHP; // (667) Notify on Hot Plug for TBT devices
+ UINT8 TBSE; // (668) ThunderBolt Root port selector
+ UINT8 WKFN; // (669) WAK Finished
+ UINT16 PEPC; // (670) PEP Constraints
+ UINT16 VRSD; // (672) VR Staggering delay
+ UINT8 PB1E; // (674) 10sec Power button support Bit0: 10 sec P-button Enable/Disable
+ // Bit1: Internal Flag
+ // Bit2: Rotation Lock flag, 0:unlock, 1:lock
+ // Bit3: Slate/Laptop Mode Flag, 0: Slate, 1: Laptop
+ // Bit4: Undock / Dock Flag, 0: Undock, 1: Dock
+ // Bit5, 6: reserved for future use.
+ // Bit7: EC 10sec PB Override state for S3/S4 wake up.
+ UINT8 WAND; // (675) EnableWWANParticipant
+ UINT8 WWAT; // (676) ActiveThermalTripPointWWAN
+ UINT8 WWPT; // (677) PassiveThermalTripPointWWAN
+ UINT8 WWCT; // (678) CriticalThermalTripPointWWAN
+ UINT8 WWHT; // (679) HotThermalTripPointWWAN
+ UINT8 Reserved21[5]; // (680:684) are reserved for future use
+ UINT16 MPLT; // (685) Minimum Power Limit for DPTF use via PPCC Object
+ UINT8 GR13; // (687) GPIO13 Rework for Sawtooth Peak
+ UINT8 SPST; // (688) SATA port state, Bit0 - Port0, Bit1 - Port1, Bit2 - Port2, Bit3 - Port3
+ UINT8 ECLP; // (689) EC Low Power Mode: 1 - Enabled, 0 - Disabled
+ UINT8 INSC; // (690) Intel RMT Configuration
+} EFI_GLOBAL_NVS_AREA;
+#pragma pack ()
+
+//
+// Global NVS Area Protocol
+//
+typedef struct _EFI_GLOBAL_NVS_AREA_PROTOCOL {
+ EFI_GLOBAL_NVS_AREA *Area;
+} EFI_GLOBAL_NVS_AREA_PROTOCOL;
+
+#endif
diff --git a/Board/EM/Platform/PlatformInfo/PlatformInfo.c b/Board/EM/Platform/PlatformInfo/PlatformInfo.c
new file mode 100644
index 0000000..cb6910f
--- /dev/null
+++ b/Board/EM/Platform/PlatformInfo/PlatformInfo.c
@@ -0,0 +1,166 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformInfo/PlatformInfo.c 4 10/31/12 4:28a Alanlin $
+//
+// $Revision: 4 $
+//
+// $Date: 10/31/12 4:28a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformInfo/PlatformInfo.c $
+//
+// 4 10/31/12 4:28a Alanlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Fine tune Platform Board Information.
+//
+// 3 7/03/12 1:27a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Update Shark Bay Client ACPI Reference Code Alpha 2
+// 0.6.0.
+// [Files] ReferenceCode\AcpiTables\*.*, GlobalNvsArea.h,
+// AcpiPlatform.c, PlatformInfo.c, PlatformEC.asl
+//
+// 2 4/05/12 7:45a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Fixed building error for Intel System Agent
+// Label:"4.6.5.3_Intel_SA-RC_055_004".
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.mak,
+// AcpiPlatform.c, PlatformInfo.c
+//
+// 1 2/09/12 12:33a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name: PlatformInfo.c
+//
+// Description: Installs EFI_PLATFORM_INFO_PROTOCOL_GUID
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include "PlatformInfo.h"
+#include "Token.h"
+#include <AmiCspLib.h>
+#include <AmiDxeLib.h>
+#include <Setup.h>
+#include <PlatformSetup.h>
+#include <PchRegs.h>
+
+EFI_GUID gPlatformInfoProtocolGuid = EFI_PLATFORM_INFO_PROTOCOL_GUID;
+
+PLATFORM_INFO_PROTOCOL mPlatformInfoProtocol;
+
+EFI_STATUS
+PlatformInfoInit (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+/*++
+
+Routine Description:
+ Entry point for the driver.
+
+ This routine gets info from the PlatformInfoHob and produces a protocol
+ to be consumed by DXE drivers to identify platforms.
+
+Arguments:
+
+ ImageHandle - Image Handle.
+ SystemTable - EFI System Table.
+
+Returns:
+
+ EFI_SUCCESS - Function has completed successfully.
+ Others - All other error conditions encountered result in an ASSERT.
+
+--*/
+{
+ EFI_STATUS Status;
+ UINT16 McDeviceId;
+ UINT16 LpcDeviceId;
+ PCH_SERIES PchSeries = GetPchSeries();
+
+ InitAmiLib(ImageHandle,SystemTable);
+ //
+ // Get PlatformInfo from the HOB data, fill up the protocol
+ //
+ mPlatformInfoProtocol.RevisonId = PlatformInfo_RevisonId;
+ mPlatformInfoProtocol.BoardId = PlatformInfo_BoardId;
+ mPlatformInfoProtocol.BoardRev = PlatformInfo_BoardRev;
+
+ // Read MC device ID
+ McDeviceId = READ_PCI16_NB(R_SA_MC_DEVICE_ID);
+ // Read PCH device ID
+ LpcDeviceId = READ_PCI16_SB(R_PCH_LPC_DEVICE_ID);
+
+ if(IS_SA_DEVICE_ID_MOBILE(McDeviceId)) {
+ mPlatformInfoProtocol.PlatformFlavor = FlavorMobile;
+ if (PchSeries == PchLp) {
+ mPlatformInfoProtocol.BoardId = BoardIdhiteTipMountain1;
+ }
+ mPlatformInfoProtocol.BoardRev = (mPlatformInfoProtocol.BoardId & 0xF0) >> 4;
+
+ } else if(IS_SA_DEVICE_ID_DESKTOP (McDeviceId)) {
+ if(IS_PCH_LPT_LPC_DEVICE_ID_WS (LpcDeviceId)) {
+ mPlatformInfoProtocol.PlatformFlavor = FlavorWorkStation;
+ } else if(IS_PCH_LPT_LPC_DEVICE_ID_SERVER (LpcDeviceId)) {
+ mPlatformInfoProtocol.PlatformFlavor = FlavorUpServer;
+ } else {
+ mPlatformInfoProtocol.PlatformFlavor = FlavorDesktop;
+ mPlatformInfoProtocol.BoardId = BoardIdFlatheadCreek;
+ mPlatformInfoProtocol.BoardRev = 0;
+ }
+ } else if(IS_SA_DEVICE_ID_SERVER (McDeviceId)) {
+ mPlatformInfoProtocol.PlatformFlavor = FlavorUpServer;
+ } else {
+ mPlatformInfoProtocol.PlatformFlavor = FlavorDesktop;
+ }
+
+ //
+ // Install the PlatformInfo Protocol.
+ //
+ Status = pBS->InstallProtocolInterface (
+ &ImageHandle,
+ &gPlatformInfoProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &mPlatformInfoProtocol
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Platform/PlatformInfo/PlatformInfo.cif b/Board/EM/Platform/PlatformInfo/PlatformInfo.cif
new file mode 100644
index 0000000..0456b11
--- /dev/null
+++ b/Board/EM/Platform/PlatformInfo/PlatformInfo.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "PlatformInfo"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\PlatformInfo"
+ RefName = "PlatformInfo"
+[files]
+"PlatformInfo.sdl"
+"PlatformInfo.mak"
+"PlatformInfo.dxs"
+"PlatformInfo.c"
+"PlatformInfo.h"
+<endComponent>
diff --git a/Board/EM/Platform/PlatformInfo/PlatformInfo.dxs b/Board/EM/Platform/PlatformInfo/PlatformInfo.dxs
new file mode 100644
index 0000000..1477e36
--- /dev/null
+++ b/Board/EM/Platform/PlatformInfo/PlatformInfo.dxs
@@ -0,0 +1,59 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformInfo/PlatformInfo.dxs 1 2/09/12 12:33a Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/09/12 12:33a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformInfo/PlatformInfo.dxs $
+//
+// 1 2/09/12 12:33a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: PlatformInfo.DXS
+//
+// Description: This file is the dependency file for the PlatformInfo driver.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+
+DEPENDENCY_START
+ TRUE
+DEPENDENCY_END
+
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/PlatformInfo/PlatformInfo.h b/Board/EM/Platform/PlatformInfo/PlatformInfo.h
new file mode 100644
index 0000000..6ee5a1c
--- /dev/null
+++ b/Board/EM/Platform/PlatformInfo/PlatformInfo.h
@@ -0,0 +1,74 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformInfo/PlatformInfo.h 2 10/31/12 4:28a Alanlin $
+//
+// $Revision: 2 $
+//
+// $Date: 10/31/12 4:28a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformInfo/PlatformInfo.h $
+//
+// 2 10/31/12 4:28a Alanlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Fine tune Platform Board Information.
+//
+// 1 2/09/12 12:33a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+
+
+#ifndef _PLATFORM_INFO_DRIVER_H_
+#define _PLATFORM_INFO_DRIVER_H_
+
+#include "EFI.h"
+
+#define EFI_PLATFORM_INFO_PROTOCOL_GUID \
+ { \
+ 0xd9035175, 0x8ce2, 0x47de, 0xa8, 0xb8, 0xcc, 0x98, 0xe5, 0xe2, 0xa8, 0x85 \
+ }
+
+EFI_FORWARD_DECLARATION (PLATFORM_INFO_PROTOCOL);
+
+typedef struct _PLATFORM_INFO_PROTOCOL {
+ UINT8 RevisonId; // Structure Revision ID
+ UINT8 PlatformFlavor; // Platform Flavor
+ UINT16 BoardId; // Board ID
+ UINT8 BoardRev; // Board Revision
+} PLATFORM_INFO_PROTOCOL;
+
+extern EFI_GUID gPlatformInfoProtocolGuid;
+
+
+#endif
+
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/PlatformInfo/PlatformInfo.mak b/Board/EM/Platform/PlatformInfo/PlatformInfo.mak
new file mode 100644
index 0000000..bc32739
--- /dev/null
+++ b/Board/EM/Platform/PlatformInfo/PlatformInfo.mak
@@ -0,0 +1,82 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformInfo/PlatformInfo.mak 1 2/09/12 12:33a Yurenlai $
+#
+# $Revision: 1 $
+#
+# $Date: 2/09/12 12:33a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformInfo/PlatformInfo.mak $
+#
+# 1 2/09/12 12:33a Yurenlai
+# Initial check in.
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: PlatformInfo.mak
+#
+# Description: This make file builds AcpiPlatform module DXE
+# components and link them to respective binary
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+
+#---------------------------------------------------------------------------
+# Create PLATFORMINFO DXE Component
+#---------------------------------------------------------------------------
+all : PlatformInfo
+
+PlatformInfo : $(BUILD_DIR)\PlatformInfo.mak PlatformInfoBin
+
+$(BUILD_DIR)\PlatformInfo.mak : $(PlatformInfo_DIR)\PlatformInfo.cif $(PlatformInfo_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(PlatformInfo_DIR)\PlatformInfo.cif $(CIF2MAK_DEFAULTS)
+
+PLATFORM_INFO_INCLUDES = \
+ $(ACPI_PLATFORM_INCLUDES)\
+ $(INTEL_MCH_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)
+
+PLATFORM_INFO_DEFINES = $(MY_DEFINES) $(MCH_DEFINES)\
+
+
+PlatformInfoBin: $(AMIDXELIB) $(AMICSPLib)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\PlatformInfo.mak all \
+ "MY_INCLUDES=$(PLATFORM_INFO_INCLUDES)"\
+ GUID=1314216C-CB8D-421c-B854-06231386E642\
+ ENTRY_POINT=PlatformInfoInit \
+ TYPE=BS_DRIVER\
+ DEPEX1=$(PlatformInfo_DIR)\PlatformInfo.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ COMPRESS=1
+
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Platform/PlatformInfo/PlatformInfo.sdl b/Board/EM/Platform/PlatformInfo/PlatformInfo.sdl
new file mode 100644
index 0000000..8d7ff46
--- /dev/null
+++ b/Board/EM/Platform/PlatformInfo/PlatformInfo.sdl
@@ -0,0 +1,93 @@
+TOKEN
+ Name = "PlatformInfo_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable PlatformInfo support in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "PlatformInfo_RevisonId"
+ Value = "0x01"
+ Help = "BoardId Red Fort"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PlatformInfo_PlatformFlavor"
+ Value = "$(FlavorDesktop)"
+ Help = "BoardId Red Fort"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "PCH_SKU" "=" "0"
+End
+
+TOKEN
+ Name = "PlatformInfo_PlatformFlavor"
+ Value = "$(FlavorMobile)"
+ Help = "BoardId Red Fort"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "PCH_SKU" "=" "1"
+End
+
+TOKEN
+ Name = "PlatformInfo_BoardId"
+ Value = "$(BoardIdGraysReef)"
+ Help = "BoardId Emerald Lake"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PlatformInfo_BoardRev"
+ Value = "0x00"
+ Help = "BoardId Red Fort"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "PCH_SKU" "=" "0"
+End
+
+TOKEN
+ Name = "PlatformInfo_BoardRev"
+ Value = "0x02"
+ Help = "BoardId Red Fort"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "PCH_SKU" "=" "1"
+End
+
+PATH
+ Name = "PlatformInfo_DIR"
+End
+
+MODULE
+ Help = "Includes PlatformInfo.mak to Project"
+ File = "PlatformInfo.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\PlatformInfo.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "PLATFORM_INFO_INCLUDES"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "/I $(PlatformInfo_DIR)"
+ Parent = "PLATFORM_INFO_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/Platform/PlatformSetup.h b/Board/EM/Platform/PlatformSetup.h
new file mode 100644
index 0000000..857d048
--- /dev/null
+++ b/Board/EM/Platform/PlatformSetup.h
@@ -0,0 +1,101 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformSetup.h 4 1/15/13 5:47a Alanlin $
+//
+// $Revision: 4 $
+//
+// $Date: 1/15/13 5:47a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformSetup.h $
+//
+// 4 1/15/13 5:47a Alanlin
+// [TAG] None
+// [Category] Normal
+// [Severity] Normal
+// [Description] Add setup item and setting for DPTF
+// [Files] Acpiplatform.c, Acpiplatform.sd, Acpiplatform.uni,
+// PlatformSetup.h
+//
+// 3 10/31/12 4:43a Alanlin
+// [TAG] None
+// [Category] Improvement
+// [Severity] Normal
+// [Description] Fine tune Platform Board Information.
+//
+// 2 7/27/12 5:11a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Create DPTF and CPPC setup item.
+// [Files] AcpiPlatform.c, AcpiPlatform.sd, AcpiPlatform.uni,
+// PlatformSetup.h
+//
+// 1 2/09/12 12:31a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: PlatformSetup.h
+//
+// Description: OEM Specific Setup Variables and Structures
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#ifndef _OEMSETUP_H_
+#define _OEMSETUP_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ #pragma pack(1)
+
+ typedef struct _SETUP_PLATFORM_DATA
+ {
+
+ UINT8 GbePciePortNum;
+ UINT8 PlatformFlavor;
+ UINT8 PcieSBDE;
+ UINT8 PegPresent[4];
+ UINT8 DimmPresent[4];
+ UINT8 IGFXAvailable;
+ UINT8 VTdAvailable;
+ UINT8 PlatformSupportCppc;
+ UINT8 PlatformSupportRtD3;
+ UINT8 LPMSupport;
+ }SETUP_PLATFORM_DATA;
+
+ #pragma pack()
+
+/****** DO NOT WRITE BELOW THIS LINE *******/
+#ifdef __cplusplus
+}
+#endif
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.c b/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.c
new file mode 100644
index 0000000..9f3b2f2
--- /dev/null
+++ b/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.c
@@ -0,0 +1,866 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformSetupInfo/PlatformSetupInfo.c 13 8/02/13 6:46a Alanlin $
+//
+// $Revision: 13 $
+//
+// $Date: 8/02/13 6:46a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformSetupInfo/PlatformSetupInfo.c $
+//
+// 13 8/02/13 6:46a Alanlin
+// [TAG] None
+// [Category] Normal
+// [Severity] Normal
+// [Description] Update to support Haswell ULT D0 setup info
+// [Files] PlatformSetupInfo.c
+//
+// 12 6/04/13 10:10a Alanlin
+// [TAG] None
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] UEFI_231C_SCT_Final_Draft_201303 test failed.
+// [RootCause] The variable use illegal variable guid.
+// [Solution] Change GUID form EFI_GLOBAL_VARIABLE to
+// AMI_GLOBAL_VARIABLE_GUID.
+// [Files] PlatformSetupInfo.c
+//
+// 11 3/15/13 6:56a Alanlin
+// [TAG] None
+// [Category] Normal
+// [Severity] Normal
+// [Description] Add PCH Lan version information.
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.h.
+//
+// 10 1/28/13 11:12p Alanlin
+// [TAG] EIP113555
+// [Category] Important
+// [Severity] Important
+// [Description] Update Shark Bay Client ACPI Reference Code Beta Version
+// 1.0.0
+//
+// 9 1/18/13 3:59a Alanlin
+// [TAG] None
+// [Category] Normal
+// [Severity] Normal
+// [Description] Fixed that Setup menu shows incorrect CPU informaion for
+// C0 stepping
+// [Files] PlatformSetupInfo.c.
+//
+// 8 1/15/13 5:48a Alanlin
+// [TAG] None
+// [Category] Normal
+// [Severity] Normal
+// [Description] Update to support Haswell C0 and ULT C1 setup info
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.h
+//
+// 7 11/26/12 6:01a Alanlin
+// [TAG] None
+// [Category] Improvement
+// [Severity] Normal
+// [Description] Fixed that Setup menu shows incorrect CPU informaion for
+// Sharkbay ULT.
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.h
+//
+// 6 8/14/12 8:56a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Update to support Haswell B0 and ULT A0 setup info.
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.h
+//
+// 5 7/11/12 3:55a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Correct Lan PHY Revision in BIOS Setup info.
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.h
+//
+// 4 4/25/12 1:23p Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Correct Graphics Technology (GT) Displays (GT Info) in
+// BIOS Setup.
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.h
+//
+// 3 4/05/12 7:14a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Fixed building error for Intel System Agent
+// Label:"4.6.5.3_Intel_SA-RC_055_004".
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.mak
+//
+// 2 3/26/12 4:06a Yurenlai
+// [TAG] EIP86219
+// [Category] New Feature
+// [Description] Add PCH information in SharkBay BIOS setup.
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.sd,
+// PlatformSetupInfo.uni
+//
+// 1 2/24/12 1:02a Yurenlai
+// Add PlatformSetupInfo module part.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: PlatformSetupInfo.c
+//
+// Description: Display platform information
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+//----------------------------------------------------------------------------
+// Include(s)
+//----------------------------------------------------------------------------
+#include <Setup.h>
+#include <SetupStrTokens.h>
+#include <Token.h>
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+#if defined (IntelTXT_SUPPORT) && IntelTXT_SUPPORT
+#include <Txt.h>
+#endif
+#if defined CRB_EC_SUPPORT && CRB_EC_SUPPORT
+#include <Protocol\EcAccess.h>
+#endif
+#if EFI_SPECIFICATION_VERSION>0x20000
+#include <Protocol\HiiDatabase.h>
+#include <Protocol\HiiString.h>
+#define LANGUAGE_CODE_ENGLISH "en-US"
+#else
+#include <Protocol/Hii.h>
+#endif
+#include "PchRegs.h"
+#include "PlatformSetupInfo.h"
+#include "CpuRegs.h"
+
+EFI_HII_HANDLE gMainHiiHandle = NULL;
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+// Name: UpdateCpuInformation
+//
+// Description: Update CPU Information to Main page.
+//
+// Input: None
+//
+// Output: None
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+UpdateCpuInformation (VOID)
+{
+ UINT32 RegEax, RegEbx, RegEcx, RegEdx;
+ UINT32 CpuSignature;
+ UINT32 CpuID;
+ UINT8 CpuStepping;
+ UINTN i, Count;
+ UINT8 CpuCores = NumCpuCores();
+ CPU_REV ProcessorRevisionTable[] = {
+ {CPUID_FULL_FAMILY_MODEL_HASWELL_A0, 0x01, "A0"},
+ {CPUID_FULL_FAMILY_MODEL_HASWELL_B0, 0x02, "B0"},
+ {CPUID_FULL_FAMILY_MODEL_HASWELL_B0, 0x05, "C0"},
+ {CPUID_FULL_FAMILY_MODEL_HASWELL_C0, 0x05, "C0"},
+ {CPUID_FULL_FAMILY_MODEL_HASWELL_C0, 0x06, "C0"},
+ {CPUID_FULL_FAMILY_MODEL_HASWELL_ULT, 0x01, "A0"},
+ {CPUID_FULL_FAMILY_MODEL_HASWELL_ULT, 0x02, "B0"},
+ {CPUID_FULL_FAMILY_MODEL_HASWELL_ULT, 0x03, "B1"},
+ {CPUID_FULL_FAMILY_MODEL_HASWELL_ULT_C0, 0x09, "C0"},
+ {CPUID_FULL_FAMILY_MODEL_HASWELL_ULT_C0, 0x0B, "D0"},
+ {CPUID_FULL_FAMILY_MODEL_CRYSTALWELL, 0x02, "B0"},
+ };
+
+ CPULib_CpuID (1, &RegEax, &RegEbx, &RegEcx, &RegEdx);
+ CpuSignature = RegEax & CPUID_FULL_FAMILY_MODEL;
+ CpuID = RegEax & 0xFFFFF;
+ CpuStepping = MmioRead8 (PciNBD0F0RegBase + PCIE_Revision_Identification);
+
+
+ switch (CpuSignature) {
+ case CPUID_FULL_FAMILY_MODEL_HASWELL:
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_BOARD_PROCESSOR_VALUE),
+ L"%a",
+ "Haswell"
+ );
+ break;
+ case CPUID_FULL_FAMILY_MODEL_HASWELL_ULT:
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_BOARD_PROCESSOR_VALUE),
+ L"%a",
+ "Haswell ULT"
+ );
+ break;
+ case CPUID_FULL_FAMILY_MODEL_CRYSTALWELL:
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_BOARD_PROCESSOR_VALUE),
+ L"%a",
+ "Crystalwell"
+ );
+ break;
+ default:
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_BOARD_PROCESSOR_VALUE),
+ L"%a",
+ "Unknown"
+ );
+ }
+
+ Count = sizeof (ProcessorRevisionTable) / sizeof (ProcessorRevisionTable[0]);
+ for (i = 0; i < Count; i++) {
+ if ((CpuID == ProcessorRevisionTable[i].CPUID) && (CpuStepping == ProcessorRevisionTable[i].Stepping)){
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_BOARD_PROCESSOR_STEPPING_VALUE),
+ L"%a",
+ ProcessorRevisionTable[i].String
+ );
+ break;
+ }
+ }
+
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_BOARD_PROCESSOR_COUNT_VALUE),
+ L"%xCore(s) / %xThread(s)",
+ CpuCores,
+ CpuCores * (IsHtEnabled() ? 2 : 1)
+ );
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+// Name: UpdatePchInformation
+//
+// Description: Update PCH Information to Main page.
+//
+// Input: None
+//
+// Output: None
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+UpdatePchInformation (VOID)
+{
+ UINT16 Data16;
+
+ Data16 = MmioRead16 (PciD31F0RegBase + R_PCH_LPC_DEVICE_ID);
+
+ if (IS_PCH_LPTH_LPC_DEVICE_ID (Data16)) {
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_BOARD_CHIP_SB_VALUE),
+ L"%a",
+ "LynxPoint"
+ );
+ }
+ else if (IS_PCH_LPTLP_LPC_DEVICE_ID (Data16)) {
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_BOARD_CHIP_SB_VALUE),
+ L"%a",
+ "LynxPoint-LP"
+ );
+ }
+ else {
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_BOARD_CHIP_SB_VALUE),
+ L"%a",
+ "Unknown"
+ );
+ }
+
+#if defined (IntelTXT_SUPPORT) && IntelTXT_SUPPORT
+ //
+ // Platform PCH TXT capability
+ //
+ if (MmioRead32 (TXT_PUBLIC_BASE + 0x10) & BIT0) {
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_BOARD_PLATFORM_TXT_VALUE),
+ L"%a",
+ "Supported"
+ );
+ } else {
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_BOARD_PLATFORM_TXT_VALUE),
+ L"%a",
+ "Unsupported"
+ );
+ }
+#endif
+}
+
+#if defined CRB_EC_SUPPORT && CRB_EC_SUPPORT
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+// Name: UpdateEcVersion
+//
+// Description: Update the version of CRB EC.
+//
+// Input: None
+//
+// Output: None
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+UpdateEcVersion (VOID)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_GUID EfiEcAccessProtocolGuid = EC_PROTOCOL_GUID;
+ EFI_EC_ACCESS_PROTOCOL *ECAccess = NULL;
+ EFI_GUID gAmiGlobalVariableGuid = AMI_GLOBAL_VARIABLE_GUID;
+ UINT8 DataHigh = 0;
+ UINT8 DataLow = 0;
+ UINTN VariableSize;
+
+ Status = pBS->LocateProtocol (&EfiEcAccessProtocolGuid, NULL, &ECAccess);
+ if (EFI_ERROR(Status)) {
+ return;
+ }
+
+ //
+ // Initializing the size for retrieving variable(s) "ECRev1" & "ECRev2"
+ //
+ VariableSize = sizeof (UINT8);
+ pRS->GetVariable (
+ L"ECRev1",
+ &gAmiGlobalVariableGuid,
+ NULL,
+ &VariableSize,
+ &DataHigh
+ );
+ pRS->GetVariable (
+ L"ECRev2",
+ &gAmiGlobalVariableGuid,
+ NULL,
+ &VariableSize,
+ &DataLow
+ );
+
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_BOARD_CHIP_EC_REV_VALUE),
+ L"%02X%a%02X",
+ DataHigh,
+ ".",
+ DataLow
+ );
+}
+#endif
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+// Name: UpdateLanPhyRevision
+//
+// Description: Retrieves LAN PHY Revision.
+//
+// Input: None
+//
+// Output: None
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+UpdateLanPhyRevision (VOID)
+{
+ UINTN PciD25F0RegBase;
+ UINT32 GbEBar;
+ UINT32 RegisterValue;
+ UINTN LoopTime;
+ UINT8 LanPhyRev;
+ UINTN Index;
+ UINT8 Data;
+ BOOLEAN Found;
+ LAN_PHY_INFO LanPhyInfoTable[] = {
+ { LAN_PHY_REV_A0, "A0" },
+ { LAN_PHY_REV_A1, "A1" },
+ { LAN_PHY_REV_A2, "A2" },
+ { LAN_PHY_REV_A3, "A3" },
+ { LAN_PHY_REV_B0, "B0" },
+ { LAN_PHY_REV_C0, "C0" }};
+ GbEBar = 0;
+ LanPhyRev = 0;
+ Found = FALSE;
+
+ PciD25F0RegBase =
+ (
+ PCIEX_BASE_ADDRESS +
+ ((PCI_BUS_NUMBER_PCH_LAN) << 20) +
+ ((PCI_DEVICE_NUMBER_PCH_LAN) << 15) +
+ ((PCI_FUNCTION_NUMBER_PCH_LAN) << 12)
+ );
+ GbEBar = MmioRead32 (PciD25F0RegBase + R_PCH_LAN_MEM_BASE_A) & B_PCH_LAN_MBARB_BA;
+
+ Data = MmioRead8 (PciD25F0RegBase + R_PCH_LAN_CMD);
+ //
+ // Command Register's Value is 0 in Fast Boot and Modifying here
+ //
+ if ((Data & B_PCH_LAN_CMD_MSE) == 0) {
+ MmioWrite8 ((PciD25F0RegBase + R_PCH_LAN_CMD), 0x07);
+ Found = TRUE;
+ }
+ //
+ // Request semaphore
+ //
+ Mmio32 (GbEBar, PHY_SEMAPHORE_REG) |= BIT5;
+
+ for (LoopTime = 0; LoopTime < GBE_MAX_LOOP_TIME; LoopTime++) {
+ RegisterValue = MmioRead32 (GbEBar + PHY_SEMAPHORE_REG);
+
+ if (RegisterValue & BIT5) {
+ break;
+ }
+
+ pBS->Stall (10);
+ }
+
+ if (LoopTime >= GBE_MAX_LOOP_TIME) {
+ return ;
+ }
+ //
+ // Write PHY_CONFIG_REG with set page 769
+ //
+ MmioWrite32 ((GbEBar + PHY_CONFIG_REG), PHY_PAGE769_SET_REG);
+ for (LoopTime = 0; LoopTime < GBE_MAX_LOOP_TIME; LoopTime++) {
+ RegisterValue = MmioRead32 (GbEBar + PHY_CONFIG_REG);
+
+ if (RegisterValue & BIT28) {
+ break;
+ }
+
+ pBS->Stall (10);
+ }
+
+ if (LoopTime >= GBE_MAX_LOOP_TIME) {
+ return ;
+ }
+ //
+ // Delay 4ms after page change
+ //
+ pBS->Stall (4000);
+
+ //
+ // Write PHY_CONFIG_REG with slow MDIO mode
+ //
+ MmioWrite32 ((GbEBar + PHY_CONFIG_REG), PHY_SLOW_MDIO_MODE_REG);
+ for (LoopTime = 0; LoopTime < GBE_MAX_LOOP_TIME; LoopTime++) {
+ RegisterValue = MmioRead32 (GbEBar + PHY_CONFIG_REG);
+
+ if (RegisterValue & BIT28) {
+ break;
+ }
+
+ pBS->Stall (10);
+ }
+
+ if (LoopTime >= GBE_MAX_LOOP_TIME) {
+ return ;
+ }
+ //
+ // Read register PHY Version (offset 0x3)
+ //
+ MmioWrite32 ((GbEBar + PHY_CONFIG_REG), PHY_READ_PHY_OFFSET3_REG);
+ for (LoopTime = 0; LoopTime < GBE_MAX_LOOP_TIME; LoopTime++) {
+ RegisterValue = MmioRead32 (GbEBar + PHY_CONFIG_REG);
+ if (RegisterValue & BIT28) {
+ break;
+ }
+
+ pBS->Stall (10);
+ }
+
+ if (LoopTime >= GBE_MAX_LOOP_TIME) {
+ return ;
+ }
+ //
+ // Read LAN PHY revision from PHY register 3
+ //
+ LanPhyRev = (UINT8) MmioRead16 (GbEBar + PHY_CONFIG_REG);
+
+ //
+ // Write PHY_CONFIG_REG to write fast mdio mode
+ //
+ MmioWrite32 ((GbEBar + PHY_CONFIG_REG), PHY_FAST_MDIO_MODE_REG);
+ for (LoopTime = 0; LoopTime < GBE_MAX_LOOP_TIME; LoopTime++) {
+ RegisterValue = MmioRead32 (GbEBar + PHY_CONFIG_REG);
+
+ if (RegisterValue & BIT28) {
+ break;
+ }
+
+ pBS->Stall (10);
+ }
+
+ if (LoopTime >= GBE_MAX_LOOP_TIME) {
+ return ;
+ }
+ //
+ // Free semaphore
+ //
+ Mmio32 (GbEBar, PHY_SEMAPHORE_REG) &= ~BIT5;
+
+ //
+ // LAN PHY Revision
+ //
+ if (LanPhyRev) {
+ for (Index = 0; Index < (sizeof (LanPhyInfoTable)/sizeof (LAN_PHY_INFO)); Index++) {
+ if (LanPhyRev == LanPhyInfoTable[Index].LanPhyRev) {
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_BOARD_LAN_PHY_REV_VALUE),
+ L"%a",
+ LanPhyInfoTable[Index].LanPhyString
+ );
+ break;
+ }
+ }
+ }
+
+ if (Found == TRUE) {
+ MmioWrite8 ((PciD25F0RegBase + R_PCH_LAN_CMD), Data);
+ }
+
+ return ;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+// Name: UpdateSpiClockFreqInfo
+//
+// Description: Update SPI Clock Frequency information to Main page.
+//
+// Input: None
+//
+// Output: None
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+UpdateSpiClockFreqInfo (VOID)
+{
+ UINT32 Flcomp;
+ UINT32 SpiFrequ;
+
+ MmioRW32 ((SB_RCBA + R_PCH_SPI_FDOC), (UINT32)(V_PCH_SPI_FDOC_FDSS_COMP), (UINT32)(B_PCH_SPI_FDOC_FDSS_MASK | B_PCH_SPI_FDOC_FDSI_MASK));
+ Flcomp = MmioRead32 (SB_RCBA + R_PCH_SPI_FDOD);
+
+ // Check Dual Output Fast Read Support
+ if (Flcomp & BIT30) {
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_SPI_DOFR_SUPPORT_VALUE),
+ L"%a",
+ "Supported"
+ );
+ }
+ else {
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_SPI_DOFR_SUPPORT_VALUE),
+ L"%a",
+ "Unsupported"
+ );
+ }
+
+ //
+ // Fast Read Clock Frequency
+ //
+ switch ((Flcomp & (BIT23 | BIT22 | BIT21)) >> 21) {
+ case V_PCH_SPI_SSFC_SCF_20MHZ:
+ SpiFrequ = 20;
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_SPI_FAST_READ_FREQUENCY_VALUE),
+ L"%d MHz",
+ SpiFrequ
+ );
+ break;
+ case V_PCH_SPI_SSFC_SCF_33MHZ:
+ SpiFrequ = 33;
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_SPI_FAST_READ_FREQUENCY_VALUE),
+ L"%d MHz",
+ SpiFrequ
+ );
+ break;
+ case V_PCH_SPI_SSFC_SCF_50MHZ:
+ SpiFrequ = 50;
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_SPI_FAST_READ_FREQUENCY_VALUE),
+ L"%d MHz",
+ SpiFrequ
+ );
+ break;
+ default: break;
+ }
+
+ //
+ // Write and Erase Clock Frequency
+ //
+ switch ((Flcomp & (BIT26 | BIT25 | BIT24)) >> 24) {
+ case V_PCH_SPI_SSFC_SCF_20MHZ:
+ SpiFrequ = 20;
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_SPI_WRITE_CLOCK_FREQUENCY_VALUE),
+ L"%d MHz",
+ SpiFrequ
+ );
+ break;
+ case V_PCH_SPI_SSFC_SCF_33MHZ:
+ SpiFrequ = 33;
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_SPI_WRITE_CLOCK_FREQUENCY_VALUE),
+ L"%d MHz",
+ SpiFrequ
+ );
+ break;
+ case V_PCH_SPI_SSFC_SCF_50MHZ:
+ SpiFrequ = 50;
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_SPI_WRITE_CLOCK_FREQUENCY_VALUE),
+ L"%d MHz",
+ SpiFrequ
+ );
+ break;
+ default: break;
+ }
+
+ //
+ // Read ID and Read Status Clock Frequency
+ //
+ switch ((Flcomp & (BIT29 | BIT28 | BIT27)) >> 27) {
+ case V_PCH_SPI_SSFC_SCF_20MHZ:
+ SpiFrequ = 20;
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_SPI_READ_CLOCK_FREQUENCY_VALUE),
+ L"%d MHz",
+ SpiFrequ
+ );
+ break;
+ case V_PCH_SPI_SSFC_SCF_33MHZ:
+ SpiFrequ = 33;
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_SPI_READ_CLOCK_FREQUENCY_VALUE),
+ L"%d MHz",
+ SpiFrequ
+ );
+ break;
+ case V_PCH_SPI_SSFC_SCF_50MHZ:
+ SpiFrequ = 50;
+ InitString (
+ gMainHiiHandle,
+ STRING_TOKEN (STR_SPI_READ_CLOCK_FREQUENCY_VALUE),
+ L"%d MHz",
+ SpiFrequ
+ );
+ break;
+ default: break;
+ }
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: GetAndUpdateHiiString
+//
+// Description: This function Reads a String from HII Handle and updates the
+// string to Main HII Handle.
+//
+// Input: HiiHandleGet - Efi Hii Handle
+// TokenGet - String Token
+// TokenUpdate - String Token
+//
+// Output: Returns EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS GetAndUpdateHiiString (
+ IN EFI_HII_HANDLE HiiHandleGet,
+ IN STRING_REF TokenGet,
+ IN STRING_REF TokenUpdate)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+#if EFI_SPECIFICATION_VERSION>0x20000
+ static EFI_HII_STRING_PROTOCOL *HiiString = NULL;
+ CHAR8 Language[] = LANGUAGE_CODE_ENGLISH;
+#else
+ static EFI_HII_PROTOCOL *Hii = NULL;
+#endif
+ CHAR16 String[0x100];
+ UINTN StringLength = sizeof(String)/sizeof(CHAR16);
+
+ if (HiiHandleGet == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+#if EFI_SPECIFICATION_VERSION > 0x20000
+ if (HiiString == NULL) {
+ Status = pBS->LocateProtocol (&gEfiHiiStringProtocolGuid, NULL, &HiiString);
+ }
+#else
+ if (Hii == NULL) {
+ Status = pBS->LocateProtocol (&gEfiHiiProtocolGuid, NULL, &Hii);
+ }
+#endif
+ ASSERT_EFI_ERROR(Status);
+
+ pBS->SetMem(String, (sizeof(CHAR16) * StringLength), 0);
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+ Status = HiiString->GetString (HiiString,
+ (CHAR8*) &Language,
+ HiiHandleGet,
+ TokenGet,
+ String,
+ &StringLength,
+ NULL);
+#else
+ Status = Hii->GetString (Hii,
+ HiiHandleGet,
+ TokenGet,
+ FALSE,
+ NULL,
+ &StringLength,
+ String);
+#endif
+
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ ASSERT (gMainHiiHandle != NULL);
+
+ InitString (
+ gMainHiiHandle,
+ TokenUpdate,
+ L"%s",
+ String
+ );
+
+ return EFI_SUCCESS;
+}
+
+ // (EIP86219)>
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+// Name: InitPlatformSetupInfo
+//
+// Description: This function will display platform information and put into
+// variables of PlatformSetupInfo.uni file.
+//
+// Input: EFI_HII_HANDLE HiiHandle
+//
+// Output: VOID
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+InitPlatformSetupInfo(
+ EFI_HII_HANDLE HiiHandle,
+ UINT16 Class
+)
+{
+ if (Class == MAIN_FORM_SET_CLASS) {
+ gMainHiiHandle = HiiHandle;
+
+ UpdateCpuInformation ();
+
+ UpdatePchInformation ();
+
+ UpdateLanPhyRevision ();
+
+#if defined CRB_EC_SUPPORT && CRB_EC_SUPPORT
+ UpdateEcVersion ();
+#endif
+
+ UpdateSpiClockFreqInfo ();
+ }
+
+ if (Class == ADVANCED_FORM_SET_CLASS) {
+ //
+ // Update Processor Information
+ //
+ GetAndUpdateHiiString (HiiHandle, STRING_TOKEN(STR_CPU_SKT0_VERSION_VALUE), STRING_TOKEN(STR_BOARD_PROCESSOR_VERSION_VALUE));
+
+ GetAndUpdateHiiString (HiiHandle, STRING_TOKEN(STR_PROCESSOR_SPEED_VALUE), STRING_TOKEN(STR_BOARD_PROCESSOR_SPEED_VALUE));
+
+ GetAndUpdateHiiString (HiiHandle, STRING_TOKEN(STR_CPU_SKT0_CPUID_VALUE), STRING_TOKEN(STR_BOARD_PROCESSOR_ID_VALUE));
+
+ GetAndUpdateHiiString (HiiHandle, STRING_TOKEN(STR_CPU_SKT0_MICROCODE_VALUE), STRING_TOKEN(STR_BOARD_PROCESSOR_MICROCODE_VALUE));
+
+#if defined (iME_SUPPORT) && iME_SUPPORT
+ //
+ // Update ME Information
+ //
+ GetAndUpdateHiiString (HiiHandle, STRING_TOKEN(STR_ME_FW_VERSION_VALUE), STRING_TOKEN(STR_BOARD_ME_FW_REV_VALUE));
+
+ GetAndUpdateHiiString (HiiHandle, STRING_TOKEN(STR_ME_FW_SKU_VALUE), STRING_TOKEN(STR_BOARD_ME_FW_SKU_VALUE));
+#endif
+ }
+
+ if (Class == CHIPSET_FORM_SET_CLASS) {
+ //
+ // Update SA Information
+ //
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+ GetAndUpdateHiiString (HiiHandle, STRING_TOKEN(STR_CHIP_IGFX_VBIOS_REV_VALUE), STRING_TOKEN(STR_BOARD_IGFX_VBIOS_REV_VALUE));
+#endif
+
+ GetAndUpdateHiiString (HiiHandle, STRING_TOKEN(STR_MRC_REV_VALUE), STRING_TOKEN(STR_BOARD_MRC_REV_VALUE));
+
+ GetAndUpdateHiiString (HiiHandle, STRING_TOKEN(STR_MEMORY_SIZE_VALUE), STRING_TOKEN(STR_BOARD_MEMORY_SIZE_VALUE));
+
+ GetAndUpdateHiiString (HiiHandle, STRING_TOKEN(STR_MEMORY_SPEED_VALUE), STRING_TOKEN(STR_BOARD_MEMORY_FREQ_VALUE));
+
+ // Display GT Type with RP0 Frequency Information
+ GetAndUpdateHiiString (HiiHandle, STRING_TOKEN(STR_PROCESSOR_GT_VALUE), STRING_TOKEN(STR_BOARD_PROCESSOR_GT_VALUE));
+
+ //
+ // Update PCH Information
+ //
+ GetAndUpdateHiiString (HiiHandle, STRING_TOKEN(STR_PCH_SKU_VALUE), STRING_TOKEN(STR_BOARD_CHIP_SB_SKU_VALUE));
+ GetAndUpdateHiiString (HiiHandle, STRING_TOKEN(STR_PCH_REVID_VALUE), STRING_TOKEN(STR_BOARD_CHIP_SB_REV_VALUE));
+ }
+
+ return;
+}
+ // <(EIP86219)
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.cif b/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.cif
new file mode 100644
index 0000000..5a51931
--- /dev/null
+++ b/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.cif
@@ -0,0 +1,13 @@
+<component>
+ name = "PlatformSetupInfo"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\PlatformSetupInfo"
+ RefName = "PlatformSetupInfo"
+[files]
+"PlatformSetupInfo.sdl"
+"PlatformSetupInfo.mak"
+"PlatformSetupInfo.sd"
+"PlatformSetupInfo.uni"
+"PlatformSetupInfo.c"
+"PlatformSetupInfo.h"
+<endComponent>
diff --git a/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.h b/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.h
new file mode 100644
index 0000000..cbbaef5
--- /dev/null
+++ b/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.h
@@ -0,0 +1,150 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformSetupInfo/PlatformSetupInfo.h 7 3/15/13 6:57a Alanlin $
+//
+// $Revision: 7 $
+//
+// $Date: 3/15/13 6:57a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformSetupInfo/PlatformSetupInfo.h $
+//
+// 7 3/15/13 6:57a Alanlin
+// [TAG] None
+// [Category] Normal
+// [Severity] Normal
+// [Description] Add PCH Lan version information.
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.h.
+//
+// 6 1/15/13 5:49a Alanlin
+// [TAG] None
+// [Category] Normal
+// [Severity] Normal
+// [Description] Update to support Haswell C0 and ULT C1 setup info
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.h
+//
+// 5 11/26/12 6:02a Alanlin
+// [TAG] None
+// [Category] Improvement
+// [Severity] Normal
+// [Description] Fixed that Setup menu shows incorrect CPU informaion for
+// Sharkbay ULT.
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.h
+//
+//
+// 4 8/14/12 8:56a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Update to support Haswell B0 and ULT A0 setup info.
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.h
+//
+// 3 7/11/12 3:55a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Correct Lan PHY Revision in BIOS Setup info.
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.h
+//
+// 2 4/25/12 1:23p Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Correct Graphics Technology (GT) Displays (GT Info) in
+// BIOS Setup.
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.h
+//
+// 1 2/24/12 1:02a Yurenlai
+// Add PlatformSetupInfo module part.
+//
+//*************************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: PlatformSetupInfo.h
+//
+// Description: Header file for PlatformSetupInfo module.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#ifndef __PLATFORM_SETUP_INFO_H__
+#define __PLATFORM_SETUP_INFO_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CPUID_FULL_FAMILY_MODEL_HASWELL_A0 0x000306C1 // Haswell
+#define CPUID_FULL_FAMILY_MODEL_HASWELL_B0 0x000306C2 // Haswell
+#define CPUID_FULL_FAMILY_MODEL_HASWELL_C0 0x000306C3 // Haswell C-0
+#define CPUID_FULL_FAMILY_MODEL_HASWELL_ULT 0x00040650 // Haswell ULT
+#define CPUID_FULL_FAMILY_MODEL_HASWELL_ULT_C0 0x00040651 // Haswell ULT C-1
+#define CPUID_FULL_FAMILY_MODEL_CRYSTALWELL 0x00040660 // CRYSTALWELL
+
+#define PciD31F0RegBase PCIEX_BASE_ADDRESS + (UINT32) (31 << 15)
+#define PciNBD0F0RegBase PCIEX_BASE_ADDRESS
+#define PCIE_Revision_Identification 0x08
+//
+// LAN PHY Revision definitions
+//
+#define PHY_CONFIG_REG 0x00000020
+#define PHY_SEMAPHORE_REG 0x00000F00
+#define PHY_PAGE769_SET_REG 0x43f6020
+#define PHY_SLOW_MDIO_MODE_REG 0x4302580
+#define PHY_READ_PHY_OFFSET3_REG 0x8430000
+#define PHY_FAST_MDIO_MODE_REG 0x4302180
+#define LAN_PHY_REV_A0 0xA1
+#define LAN_PHY_REV_A1 0xA2
+#define LAN_PHY_REV_A2 0xA3
+#define LAN_PHY_REV_A3 0xA4
+#define LAN_PHY_REV_B0 0xA6
+#define LAN_PHY_REV_C0 0xA7
+
+// Max loop value for GBE check
+#define GBE_MAX_LOOP_TIME 4000
+
+#pragma pack(1)
+typedef struct {
+ UINT32 CPUID;
+ UINT8 Stepping;
+ CHAR8 String[16];
+} CPU_REV;
+
+typedef struct _LAN_PHY_INFO {
+ UINT16 LanPhyRev;
+ char *LanPhyString;
+} LAN_PHY_INFO;
+#pragma pack()
+
+/****** DO NOT WRITE BELOW THIS LINE *******/
+#ifdef __cplusplus
+}
+#endif
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.mak b/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.mak
new file mode 100644
index 0000000..c2e7e72
--- /dev/null
+++ b/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.mak
@@ -0,0 +1,82 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformSetupInfo/PlatformSetupInfo.mak 2 4/05/12 7:14a Yurenlai $
+#
+# $Revision: 2 $
+#
+# $Date: 4/05/12 7:14a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformSetupInfo/PlatformSetupInfo.mak $
+#
+# 2 4/05/12 7:14a Yurenlai
+# [TAG] None
+# [Category] Improvement
+# [Severity] Important
+# [Description] Fixed building error for Intel System Agent
+# Label:"4.6.5.3_Intel_SA-RC_055_004".
+# [Files] PlatformSetupInfo.c, PlatformSetupInfo.mak
+#
+# 1 2/24/12 1:02a Yurenlai
+# Add PlatformSetupInfo module part.
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: PlatformSetupInfo.mak
+#
+# Description: MAK file for the PlatformSetupInfo module
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+All : PlatformSetupInfo
+
+PlatformSetupInfo : $(BUILD_DIR)\PlatformSetupInfo.mak
+
+SetupSdbs : $(BUILD_DIR)\PlatformSetupInfo.sdb
+
+$(BUILD_DIR)\PlatformSetupInfo.sdb : $(PlatformSetupInfo_DIR)\$(@B).sd $(PlatformSetupInfo_DIR)\$(@B).uni
+ $(STRGATHER) -i INCLUDE -parse -newdb -db $(BUILD_DIR)\$(@B).sdb $(PlatformSetupInfo_DIR)\$(@B).uni
+ $(STRGATHER) -scan -db $(BUILD_DIR)\$(@B).sdb -od $(BUILD_DIR)\$(@B).sdb $(PlatformSetupInfo_DIR)\$(@B).sd
+
+$(BUILD_DIR)\PlatformSetupInfo.mak : $(PlatformSetupInfo_DIR)\$(@B).cif $(PlatformSetupInfo_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(PlatformSetupInfo_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+PlatformSetupInfo_INCLUDES= \
+ $(INTEL_PCH_INCLUDES)\
+!if "$(IntelTXT_SUPPORT)"=="1"
+ $(TXT_INCLUDES)\
+!endif
+ $(PROJECT_CPU_INCLUDES)\
+
+SetupBin : $(BUILD_DIR)\PlatformSetupInfo.obj
+
+$(BUILD_DIR)\PlatformSetupInfo.obj : $(PROJECT_DIR)\$(PlatformSetupInfo_DIR)\PlatformSetupInfo.c $(BUILD_DIR)\SetupStrTokens.h
+ $(CC) $(CFLAGS) $(PlatformSetupInfo_INCLUDES) /Fo$(BUILD_DIR)\ $(PlatformSetupInfo_DIR)\PlatformSetupInfo.c
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#********************************************************************** \ No newline at end of file
diff --git a/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.sd b/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.sd
new file mode 100644
index 0000000..c245074
--- /dev/null
+++ b/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.sd
@@ -0,0 +1,300 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformSetupInfo/PlatformSetupInfo.sd 2 3/26/12 4:10a Yurenlai $
+//
+// $Revision: 2 $
+//
+// $Date: 3/26/12 4:10a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/PlatformSetupInfo/PlatformSetupInfo.sd $
+//
+// 2 3/26/12 4:10a Yurenlai
+// [TAG] EIP86219
+// [Category] New Feature
+// [Description] Add PCH information in SharkBay BIOS setup.
+// [Files] PlatformSetupInfo.c, PlatformSetupInfo.sd,
+// PlatformSetupInfo.uni
+//
+// 1 2/24/12 1:02a Yurenlai
+// Add PlatformSetupInfo module part.
+//
+//*************************************************************************
+
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: PlatformSetupInfo.sd
+//
+// Description: Setup file for PlatformSetupInfo driver. It displays the
+// platform information and its Version String in a form of Main
+// tab of setup screen
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#ifdef FORM_SET_TYPEDEF
+
+#endif
+
+
+#ifdef SETUP_DATA_DEFINITION
+// Put NVRAM data definitions here.
+// For example: UINT8 Data1;
+// These definitions will be converted by the build process
+// to a definitions of SETUP_DATA fields.
+#endif
+
+#ifdef MAIN_FORM_SET
+
+ #ifdef FORM_SET_ITEM
+ //
+ // Define controls to be added to the main page of the formset
+ //
+
+ //
+ // CPU INFORMATION
+ //
+ SEPARATOR
+ SUBTITLE(STRING_TOKEN(STR_BOARD_CPU_FORM_SUBTITLE))
+
+ text
+ help = STRING_TOKEN(STR_BOARD_PROCESSOR_HELP),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_STRING),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_VALUE),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN(STR_BOARD_PROCESSOR_VERSION_HELP),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_VERSION_STRING),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_VERSION_VALUE),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN(STR_BOARD_PROCESSOR_SPEED_HELP),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_SPEED_STRING),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_SPEED_VALUE),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN(STR_BOARD_PROCESSOR_ID_HELP),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_ID_STRING),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_ID_VALUE),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN(STR_BOARD_PROCESSOR_STEPPING_HELP),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_STEPPING_STRING),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_STEPPING_VALUE),
+ flags = 0, key = 0;
+/*
+ text
+ help = STRING_TOKEN(STR_BOARD_PROCESSOR_PACKAGE_HELP),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_PACKAGE_STRING),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_PACKAGE_VALUE),
+ flags = 0, key = 0;
+*/
+ text
+ help = STRING_TOKEN(STR_BOARD_PROCESSOR_COUNT_HELP),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_COUNT_STRING),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_COUNT_VALUE),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN(STR_BOARD_PROCESSOR_MICROCODE_HELP),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_MICROCODE_STRING),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_MICROCODE_VALUE),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN(STR_BOARD_PROCESSOR_GT_HELP),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_GT_STRING),
+ text = STRING_TOKEN(STR_BOARD_PROCESSOR_GT_VALUE),
+ flags = 0, key = 0;
+
+ SEPARATOR
+#if defined(CSM_SUPPORT) && (CSM_SUPPORT != 0)
+ suppressif (PlatformInfo_PlatformFlavor == FlavorUpServer);
+ text
+ help = STRING_TOKEN(STR_BOARD_IGFX_VBIOS_REV_HELP),
+ text = STRING_TOKEN(STR_BOARD_IGFX_VBIOS_REV_NAME),
+ text = STRING_TOKEN(STR_BOARD_IGFX_VBIOS_REV_VALUE),
+ flags = 0,
+ key = 0;
+ endif;
+#endif
+
+ text
+ help = STRING_TOKEN(STR_BOARD_MRC_REV_HELP),
+ text = STRING_TOKEN(STR_BOARD_MRC_REV_NAME),
+ text = STRING_TOKEN(STR_BOARD_MRC_REV_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_BOARD_MEMORY_SIZE_HELP),
+ text = STRING_TOKEN(STR_BOARD_MEMORY_SIZE_NAME),
+ text = STRING_TOKEN(STR_BOARD_MEMORY_SIZE_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_BOARD_MEMORY_FREQ_HELP),
+ text = STRING_TOKEN(STR_BOARD_MEMORY_FREQ_NAME),
+ text = STRING_TOKEN(STR_BOARD_MEMORY_FREQ_VALUE),
+ flags = 0,
+ key = 0;
+
+ // (EIP86219)>
+ //
+ // PCH INFORMATION
+ //
+ SEPARATOR
+ SUBTITLE(STRING_TOKEN(STR_BOARD_SB_INFORMATION))
+
+ text
+ help = STRING_TOKEN(STR_BOARD_CHIP_SB_NAME_HELP),
+ text = STRING_TOKEN(STR_BOARD_CHIP_SB_NAME),
+ text = STRING_TOKEN(STR_BOARD_CHIP_SB_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN (STR_BOARD_CHIP_SB_SKU_HELP),
+ text = STRING_TOKEN (STR_BOARD_CHIP_SB_SKU_NAME),
+ text = STRING_TOKEN (STR_BOARD_CHIP_SB_SKU_VALUE),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN(STR_BOARD_CHIP_SB_REV_HELP),
+ text = STRING_TOKEN(STR_BOARD_CHIP_SB_REV_NAME),
+ text = STRING_TOKEN(STR_BOARD_CHIP_SB_REV_VALUE),
+ flags = 0,
+ key = 0;
+/*
+ text
+ help = STRING_TOKEN(STR_BOARD_CHIP_SB_PACKAGE_HELP),
+ text = STRING_TOKEN(STR_BOARD_CHIP_SB_PACKAGE_NAME),
+ text = STRING_TOKEN(STR_BOARD_CHIP_SB_PACKAGE_VALUE),
+ flags = 0,
+ key = 0;
+*/
+ // <(EIP86219)
+
+#if defined (IntelTXT_SUPPORT) && IntelTXT_SUPPORT
+ text
+ help = STRING_TOKEN(STR_BOARD_PLATFORM_TXT_HELP),
+ text = STRING_TOKEN(STR_BOARD_PLATFORM_TXT_NAME),
+ text = STRING_TOKEN(STR_BOARD_PLATFORM_TXT_VALUE),
+ flags = 0,
+ key = 0;
+#endif
+
+ text
+ help = STRING_TOKEN(STR_BOARD_LAN_PHY_REV_HELP),
+ text = STRING_TOKEN(STR_BOARD_LAN_PHY_REV_STRING),
+ text = STRING_TOKEN(STR_BOARD_LAN_PHY_REV_VALUE),
+ flags = 0, key = 0;
+
+ //
+ // KSC EC INFORMATION
+ //
+ SEPARATOR
+#if defined CRB_EC_SUPPORT && CRB_EC_SUPPORT
+ suppressif (PlatformInfo_PlatformFlavor != FlavorMobile);
+ text
+ help = STRING_TOKEN(STR_BOARD_CHIP_EC_REV_HELP),
+ text = STRING_TOKEN(STR_BOARD_CHIP_EC_REV_NAME),
+ text = STRING_TOKEN(STR_BOARD_CHIP_EC_REV_VALUE),
+ flags = 0,
+ key = 0;
+ endif;
+#endif
+
+#if defined (iME_SUPPORT) && iME_SUPPORT
+ suppressif (PlatformInfo_PlatformFlavor == FlavorUpServer);
+ text
+ help = STRING_TOKEN(STR_BOARD_ME_FW_REV_HELP),
+ text = STRING_TOKEN(STR_BOARD_ME_FW_REV_PROMPT),
+ text = STRING_TOKEN(STR_BOARD_ME_FW_REV_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_BOARD_ME_FW_SKU_HELP),
+ text = STRING_TOKEN(STR_BOARD_ME_FW_SKU_PROMPT),
+ text = STRING_TOKEN(STR_BOARD_ME_FW_SKU_VALUE),
+ flags = 0,
+ key = 0;
+ endif;
+#endif
+
+ //
+ // SPI Information
+ //
+ SEPARATOR
+ SUBTITLE(STRING_TOKEN(STR_SPI_CLK_FREQ))
+ text
+ help = STRING_TOKEN(STR_SPI_DOFR_SUPPORT_HELP),
+ text = STRING_TOKEN(STR_SPI_DOFR_SUPPORT),
+ text = STRING_TOKEN(STR_SPI_DOFR_SUPPORT_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_SPI_READ_CLOCK_FREQUENCY_HELP),
+ text = STRING_TOKEN(STR_SPI_READ_CLOCK_FREQUENCY),
+ text = STRING_TOKEN(STR_SPI_READ_CLOCK_FREQUENCY_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_SPI_WRITE_CLOCK_FREQUENCY_HELP),
+ text = STRING_TOKEN(STR_SPI_WRITE_CLOCK_FREQUENCY),
+ text = STRING_TOKEN(STR_SPI_WRITE_CLOCK_FREQUENCY_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_SPI_FAST_READ_FREQUENCY_HELP),
+ text = STRING_TOKEN(STR_SPI_FAST_READ_FREQUENCY),
+ text = STRING_TOKEN(STR_SPI_FAST_READ_FREQUENCY_VALUE),
+ flags = 0,
+ key = 0;
+
+ #endif
+
+ #ifdef FORM_SET_GOTO
+ //
+ // Define goto commands for the forms defined in this file
+ //
+ #endif
+
+#endif
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.sdl b/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.sdl
new file mode 100644
index 0000000..436ea37
--- /dev/null
+++ b/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.sdl
@@ -0,0 +1,38 @@
+TOKEN
+ Name = "PlatformSetupInfo_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable PlatformSetupInfo support in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "PlatformSetupInfo_DIR"
+End
+
+MODULE
+ Help = "Includes PlatformSetupInfo.mak to Project"
+ File = "PlatformSetupInfo.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\PlatformSetupInfo.sdb"
+ Parent = "SETUP_SDBS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(PlatformSetupInfo_DIR)\PlatformSetupInfo.sd"
+ Parent = "SETUP_DEFINITIONS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "InitPlatformSetupInfo,"
+ Parent = "SetupStringInit"
+ Priority = -10
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.uni b/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.uni
new file mode 100644
index 0000000..5c974f6
--- /dev/null
+++ b/Board/EM/Platform/PlatformSetupInfo/PlatformSetupInfo.uni
Binary files differ
diff --git a/Board/EM/Platform/ReleaseNotes.chm b/Board/EM/Platform/ReleaseNotes.chm
new file mode 100644
index 0000000..f648121
--- /dev/null
+++ b/Board/EM/Platform/ReleaseNotes.chm
Binary files differ
diff --git a/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.c b/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.c
new file mode 100644
index 0000000..65f67fc
--- /dev/null
+++ b/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.c
@@ -0,0 +1,731 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/SMBIOSUpdateData/SMBIOSUpdateData.c 1 2/09/12 12:35a Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/09/12 12:35a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/SMBIOSUpdateData/SMBIOSUpdateData.c $
+//
+// 1 2/09/12 12:35a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+
+
+#include "Tiano.h"
+#include "EfiDriverLib.h"
+#include <Protocol\SMBios.h>
+#include <Protocol\SmbiosGetFlashDataProtocol.h>
+#include "SmbiosUpdateDataProtocol.h"
+
+EFI_GUID gEfiSmbiosProtocolGuid = EFI_SMBIOS_PROTOCOL_GUID;
+EFI_SMBIOS_PROTOCOL *gSmbiosProtocol;
+
+EFI_GUID gEfiSmbiosUpdateDataProtocolGuid = EFI_SMBIOS_UPDATE_DATA_PROTOCOL_GUID;
+
+EFI_SMBIOS_UPDATE_DATA_PROTOCOL SmbiosUpdateDataProtocol = {SMBIOS_GetFreeHandle,
+ SMBIOS_FindStructure,
+ SMBIOS_GetStructureBase,
+ SMBIOS_DeleteStructure,
+ SMBIOS_CopyStructure,
+ SMBIOS_InsertStructure};
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: GetStructureLength
+//
+// Description: Returns the length of the structure pointed by BufferStart
+// in bytes
+//
+// Input: UINT8 *BufferStart
+//
+// Output: Structure Size
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINT16
+GetStructureLength(
+ IN UINT8 *BufferStart
+)
+{
+ UINT8 *BufferEnd = BufferStart;
+
+ BufferEnd += ((SMBIOS_STRUCTURE_HEADER*)BufferStart)->Length;
+ while (*(UINT16*)BufferEnd != 0) {
+ BufferEnd++;
+ }
+ return (UINT16)(BufferEnd + 2 - BufferStart); // +2 for double zero terminator
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: GetTotalStructureSize
+//
+// Description: Returns the total structure size
+//
+// Input: UINT8 *Buffer
+//
+// Output: Total structure size
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINT16
+GetTotalStructureSize(
+ IN UINT8 *Buffer
+)
+{
+ UINT16 Length = 0;
+ UINT16 BlockSize;
+
+ while (((SMBIOS_STRUCTURE_HEADER*)Buffer)->Type != 127) {
+ BlockSize = GetStructureLength(Buffer);
+ Length = Length +BlockSize;
+ Buffer += BlockSize;
+ }
+ Length = Length+ GetStructureLength(Buffer);
+ return Length;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: FindStructureByType
+//
+// Description: Find structure type starting from memory location pointed by
+// Buffer
+//
+// Input: UINT8 **Buffer
+// UINT8 **StructureFoundPtr
+// UINT8 SearchType
+// UINT8 Instance
+//
+// Output: If SearchType is found:
+// UINT8 **Buffer - Points to the next structure
+// UINT8 **StructureFoundPtr - Points to the structure
+// that was found
+// If SearchType is not found:
+// UINT8 **Buffer - No change
+// UINT8 **StructureFoundPtr = NULL
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN
+FindStructureByType(
+ IN OUT UINT8 **Buffer,
+ IN OUT UINT8 **StructureFoundPtr,
+ IN UINT8 SearchType,
+ IN UINT8 Instance // 1-based
+)
+{
+ UINT8 *BufferPtr = *Buffer;
+ BOOLEAN FindStatus = FALSE;
+
+ *StructureFoundPtr = NULL;
+ while (((SMBIOS_STRUCTURE_HEADER*)BufferPtr)->Type != 127) {
+ if (((SMBIOS_STRUCTURE_HEADER*)BufferPtr)->Type == SearchType) {
+ // If this instance, set the find status flag and update the Buffer pointer
+ if (--Instance == 0) {
+ FindStatus = TRUE;
+ *StructureFoundPtr = BufferPtr;
+ *Buffer = BufferPtr + GetStructureLength(BufferPtr);
+ break;
+ }
+ }
+ BufferPtr += GetStructureLength(BufferPtr);
+ }
+ if ((FindStatus == FALSE) && (SearchType == 127)) {
+ FindStatus = TRUE;
+ *StructureFoundPtr = BufferPtr;
+ *Buffer = BufferPtr + GetStructureLength(BufferPtr);
+ }
+ return FindStatus;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: FindStructureByHandle
+//
+// Description: Find structure handle starting from memory location pointed
+// by Buffer
+//
+// Input: UINT8 **Buffer
+// UINT16 Handle
+//
+// Output: If SearchType is found:
+// UINT8 **Buffer - Points to the structure that was found
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN
+FindStructureByHandle(
+ IN OUT UINT8 **Buffer,
+ IN UINT16 Handle
+)
+{
+ while (((SMBIOS_STRUCTURE_HEADER*)*Buffer)->Handle != Handle) {
+ if (((SMBIOS_STRUCTURE_HEADER*)*Buffer)->Type == 127) {
+ return FALSE;
+ }
+ *Buffer += GetStructureLength(*Buffer);
+ }
+ return TRUE;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: GetNumberOfStructures
+//
+// Description: Returns the number of structures starting from Buffer til
+// (and including) type 127 structure.
+//
+// Input: UINT8 *Buffer
+//
+// Output: Number of structures
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINT16
+GetNumberOfStructures(
+ IN UINT8 *Buffer
+)
+{
+ UINT8 *BufferPtr = Buffer;
+ UINT16 SmbiosStrucCount = 1;
+
+ while (((SMBIOS_STRUCTURE_HEADER*)BufferPtr)->Type != 127) {
+ ++SmbiosStrucCount;
+ BufferPtr += GetStructureLength(BufferPtr);
+ }
+ return SmbiosStrucCount;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: GetLargestStructureSize
+//
+// Description: Returns the largest structure size
+//
+// Input: UINT8 *Buffer
+//
+// Output: Largest structure size
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINT16
+GetLargestStructureSize(
+ IN UINT8 *Buffer
+)
+{
+ UINT8 *BufferPtr = Buffer;
+ UINT8 *LastBufferPtr;
+ UINT16 LargestStructureSize = 0;
+ UINT16 CurrentStructureSize;
+
+ while (((SMBIOS_STRUCTURE_HEADER*)BufferPtr)->Type != 127) {
+ LastBufferPtr = BufferPtr;
+ BufferPtr += ((SMBIOS_STRUCTURE_HEADER*)BufferPtr)->Length;
+ while (TRUE) {
+ if ((*(UINT16*)BufferPtr) == 0) {
+ BufferPtr += 2;
+ break;
+ }
+ BufferPtr++;
+ }
+ CurrentStructureSize = (UINT16)(BufferPtr - LastBufferPtr);
+ if (CurrentStructureSize > LargestStructureSize) {
+ LargestStructureSize = CurrentStructureSize;
+ }
+ }
+ return LargestStructureSize;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SmbiosCheckSum
+//
+// Description: Returns the checksum of "length" bytes starting from the
+// "*ChecksumSrc"
+//
+// Input: UINT8 *ChecksumSrc
+// UINT8 length
+//
+// Output: Checksum value
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINT8
+SmbiosCheckSum(
+ IN UINT8 *ChecksumSrc,
+ IN UINT8 length
+)
+{
+ UINT8 Checksum = 0;
+ UINT8 i;
+
+ for (i = 0; i < length; i++) {
+ Checksum = Checksum + *ChecksumSrc++;
+ }
+ return (0 - Checksum);
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: UpdateEPSHeader
+//
+// Description: Updates the SMBIOS Entry Point Header
+//
+// Input: SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint
+//
+// Output: None
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+UpdateEPSHeader(
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint
+)
+{
+ UINT8 *SmbiosDataTableAddr = NULL;
+
+ // Get Smbios Data Table Address
+ SmbiosDataTableAddr = (UINT8*)(UINTN)pSmbiosTableEntryPoint->TableAddress;
+
+ // Updating EPS Header
+ // Update SMBIOS Data Structure Table length in EPS Header
+ pSmbiosTableEntryPoint->TableLength = GetTotalStructureSize(SmbiosDataTableAddr);
+
+ // Find and update number of SMBios Structures in EPS Header
+ pSmbiosTableEntryPoint->NumberOfSmbiosStructures = GetNumberOfStructures(SmbiosDataTableAddr);
+
+ // Find and update largest SMBios Structure in EPS Header
+ pSmbiosTableEntryPoint->MaxStructureSize = GetLargestStructureSize((UINT8*)(UINTN)pSmbiosTableEntryPoint->TableAddress);
+
+ // Update Checksums in EPS Header
+ pSmbiosTableEntryPoint->IntermediateChecksum = 0;
+ pSmbiosTableEntryPoint->IntermediateChecksum = SmbiosCheckSum((UINT8*)pSmbiosTableEntryPoint + 0x10, 15);
+ pSmbiosTableEntryPoint->EntryPointStructureChecksum = 0;
+ pSmbiosTableEntryPoint->EntryPointStructureChecksum = SmbiosCheckSum((UINT8*)pSmbiosTableEntryPoint,
+ pSmbiosTableEntryPoint->EntryPointLength);
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SMBIOS_GetFreeHandle
+//
+// Description: SMBIOSUpdateData protocol - Searches available handle
+// of Smbios Data Table
+//
+//
+// Input: SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint
+//
+// Output: UINT16 Handle or -1(if not found)
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINT16
+SMBIOS_GetFreeHandle(
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint
+)
+{
+ EFI_STATUS FoundStatus;
+
+ UINT16 Handle = 0;
+ UINT8 *StructurePtr = NULL;
+ UINT8 *SmbiosDataTableAddr = NULL;
+
+ // Get Smbios Data Table Address
+ SmbiosDataTableAddr = (UINT8*)(UINTN)pSmbiosTableEntryPoint->TableAddress;
+
+ //Count Handle form 0 to 0xFFFF to find available Handle
+ for(Handle = 0; Handle < 0xFFFF; Handle++){
+ StructurePtr = SmbiosDataTableAddr;
+ FoundStatus = FindStructureByHandle(&StructurePtr,Handle);
+ if(!FoundStatus){
+ return Handle;
+ }
+ }
+
+ return (UINT16)-1; // No available Handle to use;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SMBIOS_FindStructure
+//
+// Description: SMBIOSUpdateData protocol - Searches handle of Smbios Table by Type
+//
+//
+// Input: SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint
+// UINT8 Type
+// UINT8 Index
+//
+// Output: UINT16 Handle or -1(if not found)
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINT16
+SMBIOS_FindStructure(
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT8 Type,
+ IN UINT8 Index
+)
+{
+ EFI_STATUS FoundStatus;
+
+ UINT16 Handle = 0;
+ UINT8 *StructurePtr = NULL;
+ UINT8 *SmbiosDataTableAddr = NULL;
+
+ // Get Smbios Data Table Address
+ SmbiosDataTableAddr = (UINT8*)(UINTN)pSmbiosTableEntryPoint->TableAddress;
+
+ FoundStatus = FindStructureByType(&SmbiosDataTableAddr, &StructurePtr, Type, Index);
+ Handle = ((SMBIOS_STRUCTURE_HEADER*)StructurePtr)->Handle;
+
+ // Return Handle of found structure
+ if(FoundStatus){
+ return Handle;
+ } else{
+ return (UINT16)-1;
+ }
+
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SMBIOS_GetStructureBase
+//
+// Description: SMBIOSUpdateData protocol - Get structure address by Handle
+//
+//
+// Input: SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint
+// UINT8 *StructureFoundPtr
+// UINT16 Handle
+//
+// Output: UINT8 * or NULL - Points to the structure that was found
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINT8 *
+SMBIOS_GetStructureBase(
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT16 Handle
+)
+{
+ EFI_STATUS FoundStatus;
+
+ UINT8 *FoundStructurePtr = NULL;
+ UINT8 *SmbiosDataTableAddr = NULL;
+
+ // Get Smbios Data Table Address
+ SmbiosDataTableAddr = (UINT8*)(UINTN)pSmbiosTableEntryPoint->TableAddress;
+ FoundStructurePtr = SmbiosDataTableAddr;
+
+ FoundStatus = FindStructureByHandle(&FoundStructurePtr, Handle);
+
+ if(FoundStatus){
+ return FoundStructurePtr;
+ } else{
+ return NULL;
+ }
+
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SMBIOS_DeleteStructure
+//
+// Description: SMBIOSUpdateData protocol - Delete SMBIOS structure by handle
+//
+// Input: SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint
+// UINT16 Handle
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+SMBIOS_DeleteStructure(
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT16 Handle
+)
+{
+/*
+ EFI_STATUS FoundStatus;
+
+ UINT16 BufferSize = 0;
+ UINT8 *StructurePtr = NULL;
+ UINT8 *NextStructurePtr = NULL;
+ UINT8 *SmbiosDataTableAddr = NULL;
+
+ // Get Smbios Data Table Address
+ SmbiosDataTableAddr = (UINT8*)pSmbiosTableEntryPoint->TableAddress;
+ StructurePtr = SmbiosDataTableAddr;
+
+ FoundStatus = FindStructureByHandle(&StructurePtr, Handle);
+
+ if (FoundStatus){
+ // Calculate data size which we want to move
+ BufferSize = GetTotalStructureSize(StructurePtr) - GetStructureLength(StructurePtr);
+
+ // Calculate next structure address
+ NextStructurePtr = StructurePtr + GetStructureLength(StructurePtr);
+
+ // Copy Structure
+ gBS->CopyMem(StructurePtr, NextStructurePtr, BufferSize);
+
+ UpdateEPSHeader(pSmbiosTableEntryPoint);
+ }
+
+ return FoundStatus;
+*/
+ return gSmbiosProtocol->SmbiosDeleteStructure(Handle);
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SMBIOS_CopyStructure
+//
+// Description: SMBIOSUpdateData protocol - Copy SMBIOS structure by Handle
+// to a new allocated memory
+//
+// Input: SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint
+// UINT16 Handle
+//
+// Output: UINT8 * or NULL - Points to the new structure address
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINT8 *
+SMBIOS_CopyStructure(
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT16 Handle
+)
+{
+ EFI_STATUS FoundStatus;
+
+ UINT16 BufferSize;
+ UINT8 *BufferPtrTemp;
+ UINT8 *FoundStructurePtr = NULL;
+ UINT8 *SmbiosDataTableAddr = NULL;
+
+ // Get Smbios Data Table Address
+ SmbiosDataTableAddr = (UINT8*)(UINTN)pSmbiosTableEntryPoint->TableAddress;
+ FoundStructurePtr = SmbiosDataTableAddr;
+
+ // Check Handle of Structure if exit
+ FoundStatus = FindStructureByHandle(&FoundStructurePtr, Handle);
+
+ if (FoundStatus){
+ BufferSize = GetStructureLength(FoundStructurePtr);
+
+ // Allocate Memory for structure copy
+ gBS->AllocatePool(EfiBootServicesData, BufferSize, &BufferPtrTemp);
+
+ // Copy Structure to memory
+ gBS->CopyMem(BufferPtrTemp, FoundStructurePtr, BufferSize);
+
+ return BufferPtrTemp;
+
+ } else {
+ return NULL;
+ }
+
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SMBIOS_InsertStructure
+//
+// Description: SMBIOSUpdateData protocol - Insert SMBIOS structure
+//
+// Input: SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint
+// UINT8 *SourceStructurePtr
+// UINTN BufferSize
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+SMBIOS_InsertStructure(
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT8 *StructurePtrTemp,
+ IN UINT16 BufferSize
+)
+{
+/*
+ EFI_STATUS FoundStatus;
+
+ UINT16 Handle = 0;
+ UINT16 EOSBufferSize = 0;
+ UINT8 *EOSBufferPtrTemp = NULL;
+ UINT8 *FoundStructurePtr = NULL;
+ UINT8 *SmbiosDataTableAddr = NULL;
+
+ // Get Smbios Data Table Address
+ SmbiosDataTableAddr = (UINT8*)pSmbiosTableEntryPoint->TableAddress;
+ EOSBufferPtrTemp = SmbiosDataTableAddr;
+ FoundStructurePtr = SmbiosDataTableAddr;
+
+ // Check Handle of Structure if available
+ Handle = ((SMBIOS_STRUCTURE_HEADER*)StructurePtrTemp)->Handle;
+ FoundStatus = FindStructureByHandle(&FoundStructurePtr, Handle);
+
+ if (!FoundStatus){
+ // Move End-of-table Structure(Type 127) to allocate space for structure copy
+ FindStructureByHandle(&EOSBufferPtrTemp, 127);
+ EOSBufferSize = GetStructureLength(EOSBufferPtrTemp);
+ FoundStructurePtr = EOSBufferPtrTemp + BufferSize;
+ gBS->CopyMem(FoundStructurePtr, EOSBufferPtrTemp, EOSBufferSize);
+
+ // Copy Source Structure form memory
+ gBS->CopyMem(EOSBufferPtrTemp, StructurePtrTemp, BufferSize);
+
+ UpdateEPSHeader(pSmbiosTableEntryPoint);
+ }
+
+ return !FoundStatus;
+*/
+ UINT16 Handle = 0;
+
+ Handle = ((SMBIOS_STRUCTURE_HEADER*)StructurePtrTemp)->Handle;
+ return gSmbiosProtocol->SmbiosAddStrucByHandle(Handle, StructurePtrTemp, BufferSize);
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SMIBiosUpdateMemoryRecordDriverEntryPoint
+//
+// Description: Update memory record DXE driver for Intel Tiano SmBiosMemory Driver.
+//
+// Input:
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS SMBIOSUpdateDataDriverEntryPoint(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+
+ DxeInitializeDriverLib (ImageHandle, SystemTable);
+
+ Status = gBS->LocateProtocol(&gEfiSmbiosProtocolGuid, NULL, &gSmbiosProtocol);
+ ASSERT_EFI_ERROR(Status);
+
+ Status = gBS->InstallProtocolInterface(&ImageHandle,
+ &gEfiSmbiosUpdateDataProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &SmbiosUpdateDataProtocol);
+
+ return Status;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.cif b/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.cif
new file mode 100644
index 0000000..7e4aa0e
--- /dev/null
+++ b/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "SMBIOSUpdateData"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\SMBIOSUpdateData"
+ RefName = "SMBIOSUpdateData"
+[files]
+"SMBIOSUpdateData.sdl"
+"SMBIOSUpdateData.mak"
+"SMBIOSUpdateData.dxs"
+"SMBIOSUpdateData.c"
+"SmbiosUpdateDataProtocol.h"
+<endComponent>
diff --git a/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.dxs b/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.dxs
new file mode 100644
index 0000000..2b87536
--- /dev/null
+++ b/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.dxs
@@ -0,0 +1,49 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/SMBIOSUpdateData/SMBIOSUpdateData.dxs 1 2/09/12 12:35a Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/09/12 12:35a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/SMBIOSUpdateData/SMBIOSUpdateData.dxs $
+//
+// 1 2/09/12 12:35a Yurenlai
+// Initial check in.
+//
+//*************************************************************************
+#include <Include\Protocol\Smbus.h>
+#include <protocol\SmbiosGetFlashDataProtocol.h>
+
+DEPENDENCY_START
+ EFI_SMBIOS_PROTOCOL_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.mak b/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.mak
new file mode 100644
index 0000000..40254b2
--- /dev/null
+++ b/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.mak
@@ -0,0 +1,77 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/SMBIOSUpdateData/SMBIOSUpdateData.mak 1 2/09/12 12:35a Yurenlai $
+#
+# $Revision: 1 $
+#
+# $Date: 2/09/12 12:35a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Platform/SMBIOSUpdateData/SMBIOSUpdateData.mak $
+#
+# 1 2/09/12 12:35a Yurenlai
+# Initial check in.
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: SMBIOSUpdateData.mak
+#
+# Description: This make file builds SMBIOSUpdateData module PEI & DXE
+# components and link them to respective binary
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+
+
+all : SMBIOSUpdateData
+
+SMBIOSUpdateData : $(BUILD_DIR)\SMBIOSUpdateData.mak SMBIOSUpdateDataBin
+
+$(BUILD_DIR)\SMBIOSUpdateData.mak : $(SMBIOSUpdateData_DIR)\SMBIOSUpdateData.CIF $(SMBIOSUpdateData_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(SMBIOSUpdateData_DIR)\SMBIOSUpdateData.CIF $(CIF2MAK_DEFAULTS)
+
+SMBIOSUpdateData_INCLUDES = \
+ $(EDK_INCLUDES)\
+ /I$(PROJECT_DIR)\
+ /IInclude\
+
+SMBIOSUpdateDataBin : $(EFIDRIVERLIB)
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\SMBIOSUpdateData.mak all\
+ NAME=SMBIOSUpdateData\
+ "MY_INCLUDES=$(SMBIOSUpdateData_INCLUDES)"\
+ GUID=B98999A4-E96F-475a-99FC-762126F50F5A\
+ ENTRY_POINT=SMBIOSUpdateDataDriverEntryPoint\
+ DEPEX1=$(SMBIOSUpdateData_DIR)\SMBIOSUpdateData.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ TYPE=BS_DRIVER\
+ COMPRESS=1\
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.sdl b/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.sdl
new file mode 100644
index 0000000..e4b7448
--- /dev/null
+++ b/Board/EM/Platform/SMBIOSUpdateData/SMBIOSUpdateData.sdl
@@ -0,0 +1,24 @@
+TOKEN
+ Name = "SMBIOSUpdateData_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Help = "Main switch to enable SMBIOSUpdateData support in Project"
+End
+
+MODULE
+ Help = "Includes SMBIOSUpdateData.mak to Project"
+ File = "SMBIOSUpdateData.mak"
+End
+
+PATH
+ Name = "SMBIOSUpdateData_DIR"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\SMBIOSUpdateData.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/Platform/SMBIOSUpdateData/SmbiosUpdateDataProtocol.h b/Board/EM/Platform/SMBIOSUpdateData/SmbiosUpdateDataProtocol.h
new file mode 100644
index 0000000..991c091
--- /dev/null
+++ b/Board/EM/Platform/SMBIOSUpdateData/SmbiosUpdateDataProtocol.h
@@ -0,0 +1,100 @@
+/*++
+Copyright (c) 2009 Intel Corporation. All rights reserved.
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+--*/
+
+#ifndef _EFI_SMBOS_UPDATE_DATA_PROTOCOL_H_
+#define _EFI_SMBOS_UPDATE_DATA_PROTOCOL_H_
+
+#include <Protocol\SMBios.h>
+#include <Protocol\SmbiosGetFlashDataProtocol.h>
+
+#define EFI_SMBIOS_UPDATE_DATA_PROTOCOL_GUID \
+ {0x67269263, 0xaf1, 0x45dd, 0x93, 0xc8, 0x29, 0x99, 0x21, 0xd0, 0xe1, 0xe9}
+
+typedef struct _EFI_SMBIOS_UPDATE_DATA_PROTOCOL EFI_SMBIOS_UPDATE_DATA_PROTOCOL;
+
+typedef UINT16 (EFIAPI *EFI_SMBIOS_UPDATE_DATA_GET_FREE_HANDLE) (
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint
+);
+
+typedef UINT16 (EFIAPI *EFI_SMBIOS_UPDATE_DATA_FIND_STRUCTURE) (
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT8 Type,
+ IN UINT8 Index
+);
+
+typedef UINT8 * (EFIAPI *EFI_SMBIOS_UPDATE_DATA_GET_STRUCTURE_BASE) (
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT16 Handle
+);
+
+typedef EFI_STATUS (EFIAPI *EFI_SMBIOS_UPDATE_DATA_DELETE_STRUCTURE) (
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT16 Handle
+);
+
+typedef UINT8 * (EFIAPI *EFI_SMBIOS_UPDATE_DATA_COPY_STRUCTURE) (
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT16 Handle
+);
+
+typedef EFI_STATUS (EFIAPI *EFI_SMBIOS_UPDATE_DATA_INSERT_STRUCTURE) (
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT8 *StructurePtrTemp,
+ IN UINT16 BufferSize
+);
+
+typedef struct _EFI_SMBIOS_UPDATE_DATA_PROTOCOL {
+ EFI_SMBIOS_UPDATE_DATA_GET_FREE_HANDLE SMBIOS_GetFreeHandle;
+ EFI_SMBIOS_UPDATE_DATA_FIND_STRUCTURE SMBIOS_FindStructure;
+ EFI_SMBIOS_UPDATE_DATA_GET_STRUCTURE_BASE SMBIOS_GetStructureBase;
+ EFI_SMBIOS_UPDATE_DATA_DELETE_STRUCTURE SMBIOS_DeleteStructure;
+ EFI_SMBIOS_UPDATE_DATA_COPY_STRUCTURE SMBIOS_CopyStructure;
+ EFI_SMBIOS_UPDATE_DATA_INSERT_STRUCTURE SMBIOS_InsertStructure;
+};
+
+UINT16
+SMBIOS_GetFreeHandle(
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint
+);
+
+UINT16
+SMBIOS_FindStructure(
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT8 Type,
+ IN UINT8 Index
+);
+
+UINT8 *
+SMBIOS_GetStructureBase(
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT16 Handle
+);
+
+EFI_STATUS
+SMBIOS_DeleteStructure(
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT16 Handle
+);
+
+UINT8 *
+SMBIOS_CopyStructure(
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT16 Handle
+);
+
+EFI_STATUS
+SMBIOS_InsertStructure(
+ IN SMBIOS_TABLE_ENTRY_POINT *pSmbiosTableEntryPoint,
+ IN UINT8 *StructurePtrTemp,
+ IN UINT16 BufferSize
+);
+
+#endif
diff --git a/Board/EM/Platform/SsdtAcpiDebug/SsdtAcpiDebug.asl b/Board/EM/Platform/SsdtAcpiDebug/SsdtAcpiDebug.asl
new file mode 100644
index 0000000..e9df479
--- /dev/null
+++ b/Board/EM/Platform/SsdtAcpiDebug/SsdtAcpiDebug.asl
@@ -0,0 +1,52 @@
+
+DefinitionBlock (
+ "AcpiDebug.aml",
+ "SSDT",
+ 1,
+ "Intel_",
+ "ADebTabl",
+ 0x1000
+ )
+{
+ Scope(\)
+ {
+ //
+ // These pointers are patched during POST.
+ //
+ Name(DPTR, 0x80000000) // Address of Acpi debug memory buffer, fixed up during POST
+ Name(EPTR, 0x80000000) // End of Acpi debug memory buffer, fixed up during POST
+ Name(CPTR, 0x80000000) // Current pointer used as an index into the buffer(starts after the buffer signature), fixed up during POST
+
+ //
+ //Use a Mutex to prevent multiple calls from simutaneously writing to the same memory.
+ //
+ Mutex(MMUT, 0)
+
+ //
+ // Write a string to a memory buffer
+ //
+ Method(MDBG,1,Serialized)
+ {
+ Store (Acquire(MMUT, 1000),Local0) // save Acquire result so we can check for Mutex acquired
+ If (LEqual(Local0, Zero)) // check for Mutex acquired
+ {
+ OperationRegion(ABLK, SystemMemory, CPTR, 16) // Operation region to allow writes to ACPI debug buffer
+ Field(ABLK, ByteAcc, NoLock, Preserve)
+ {
+ Offset(0x0),
+ AAAA, 128 // 16 byte string or data
+ }
+ Store(Arg0,AAAA) // anything past string buffer size is ignored by ACPI
+
+ Add(CPTR,16,CPTR) // advance current pointer to next string location in memory buffer
+ If (LGreaterEqual(CPTR,EPTR) ) // check for end of 64kb Acpi debug buffer
+ {
+ Add(DPTR,16,CPTR) // wrap around to beginning of buffer if the end has been reached
+ }
+ Release(MMUT)
+ }
+ Return(Local0) // return error code indicating whether Mutex was acquired
+ }
+
+ } // End Scope
+} // End SSDT
diff --git a/Board/EM/Platform/SsdtAcpiDebug/SsdtAcpiDebug.cif b/Board/EM/Platform/SsdtAcpiDebug/SsdtAcpiDebug.cif
new file mode 100644
index 0000000..9c26ea5
--- /dev/null
+++ b/Board/EM/Platform/SsdtAcpiDebug/SsdtAcpiDebug.cif
@@ -0,0 +1,10 @@
+<component>
+ name = "SsdtAcpiDebug"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\SsdtAcpiDebug"
+ RefName = "SsdtAcpiDebug"
+[files]
+"SsdtAcpiDebug.sdl"
+"SsdtAcpiDebug.mak"
+"SsdtAcpiDebug.asl"
+<endComponent>
diff --git a/Board/EM/Platform/SsdtAcpiDebug/SsdtAcpiDebug.mak b/Board/EM/Platform/SsdtAcpiDebug/SsdtAcpiDebug.mak
new file mode 100644
index 0000000..98910bc
--- /dev/null
+++ b/Board/EM/Platform/SsdtAcpiDebug/SsdtAcpiDebug.mak
@@ -0,0 +1,80 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: SsdtAcpiDebug.mak
+#
+# Description: MAke file to build Aptio ACPI ASL components
+#
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+all : BuildACPIDEBUG
+
+BuildACPIDEBUG : $(BUILD_DIR)\ACPIDEBUG.ffs
+
+#-----------------------------------------------------------------------
+# ASL compiler definition
+#-----------------------------------------------------------------------
+!IF "$(ACPIPLATFORM_ASL_COMPILER)"==""
+!ERROR It is an invalid path, please check your ASL compiler path.
+!ENDIF
+
+IASL = $(ACPIPLATFORM_ASL_COMPILER)
+#-----------------------------------------------------------------------
+$(BUILD_DIR)\SsdtAcpiDebug.aml : $(INTEL_ACPIDEBUG_ASL_FILE)
+ @cl /C /EP $(INTEL_ACPIDEBUG_ASL_FILE) > $(BUILD_DIR)\SsdtAcpiDebug.asl
+ $(IASL) -p $(BUILD_DIR)\SsdtAcpiDebug.aml $(BUILD_DIR)\SsdtAcpiDebug.asl
+
+$(BUILD_DIR)\SsdtAcpiDebug.sec: $(BUILD_DIR)\SsdtAcpiDebug.aml
+ $(GENSECTION) -I $*.aml -O $@ -S EFI_SECTION_RAW
+
+#Note. Expand the package with SsdtAcpiDebug tables.
+# DXE phase will load the tables
+# and update Aml contents if provided in Acpiplatform.c
+
+$(BUILD_DIR)\ACPIDEBUG.ffs: $(BUILD_DIR)\SsdtAcpiDebug.sec
+ $(GENFFSFILE) -B $(BUILD_DIR) -V -o $@ -P1 <<$(BUILD_DIR)\SsdtAcpiDebug.pkg
+
+PACKAGE.INF
+[.]
+BASE_NAME = ACPIDEBUG
+FFS_FILEGUID = 94AB6AED-9719-48ef-831C-2E9C29758C33
+FFS_FILETYPE = EFI_FV_FILETYPE_FREEFORM
+FFS_ATTRIB_CHECKSUM = TRUE
+
+IMAGE_SCRIPT =
+{
+ Compress (dummy) {
+ $(PROJECT_DIR)\$(BUILD_DIR)\SsdtAcpiDebug.sec
+ }
+}
+<<KEEP
+
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Platform/SsdtAcpiDebug/SsdtAcpiDebug.sdl b/Board/EM/Platform/SsdtAcpiDebug/SsdtAcpiDebug.sdl
new file mode 100644
index 0000000..a754a9b
--- /dev/null
+++ b/Board/EM/Platform/SsdtAcpiDebug/SsdtAcpiDebug.sdl
@@ -0,0 +1,31 @@
+TOKEN
+ Name = "ACPIDEBUG_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable SsdtAcpiDebug support in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "INTEL_SSDTACPIDEBUG_DIR"
+End
+
+TOKEN
+ Name = "INTEL_ACPIDEBUG_ASL_FILE"
+ Value = "$(INTEL_SSDTACPIDEBUG_DIR)\SsdtAcpiDebug.asl"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+MODULE
+ Help = "Includes SsdtAcpiDebug.mak to Project"
+ File = "SsdtAcpiDebug.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\ACPIDEBUG.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/Platform/SsdtSensorHub/SsdtSensorHub.asl b/Board/EM/Platform/SsdtSensorHub/SsdtSensorHub.asl
new file mode 100644
index 0000000..0918fdb
--- /dev/null
+++ b/Board/EM/Platform/SsdtSensorHub/SsdtSensorHub.asl
@@ -0,0 +1,180 @@
+/**************************************************************************;
+;* *;
+;* Intel Confidential *;
+;* *;
+;* Intel Corporation - ACPI Reference Code for the Ivy Bridge *;
+;* Family of Customer Reference Boards. *;
+;* *;
+;* *;
+;* Copyright (c) 1999 - 2013 Intel Corporation. All rights reserved *;
+;* This software and associated documentation (if any) is furnished *;
+;* under a license and may only be used or copied in accordance *;
+;* with the terms of the license. Except as permitted by such *;
+;* license, no part of this software or documentation may be *;
+;* reproduced, stored in a retrieval system, or transmitted in any *;
+;* form or by any means without the express written consent of *;
+;* Intel Corporation. *;
+;* *;
+;* *;
+;**************************************************************************/
+/*++
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+--*/
+
+DefinitionBlock (
+ "SensorHubApp.aml",
+ "SSDT",
+ 0x01, // SHAD revision.
+ // A Revision field value greater than or equal to 2 signifies that integers
+ // declared within the Definition Block are to be evaluated as 64-bit values
+ "INTEL", // OEM ID (6 byte string)
+ "sensrhub", // OEM table ID (8 byte string)
+ 0x0 // OEM version of DSDT table (4 byte Integer)
+ )
+
+// BEGIN OF ASL SCOPE
+
+{
+ External(\GPBS)
+ External(\SDS0)
+ External(\USBH)
+ External(\_SB.RDGP, MethodObj)
+ External(\_SB.WTGP, MethodObj)
+ External(\_SB.PCI0.I2C0.SHUB, DeviceObj) // Sensor hub
+ External(\_SB.PCI0.I2C0.DFUD, DeviceObj) // DFU
+
+ Scope(\)
+ {
+ Device(SHAD) // Sensor Hub Application Device.
+ {
+ Name(_HID, EISAID("INT33D0"))
+ Name(_CID, EISAID("PNP0C02"))
+
+ Method(_STA, 0,Serialized)
+ {
+ If(LOr(And(SDS0,1), And(USBH,1)))
+ {
+ Return(0x000F) // Sensor Hub Enabled, Show it
+ }
+ Return(0x00) // Sensor Hub Disabled, Hide it
+ }
+
+ //
+ // _DSM : Device Specific Method supporting USB Sideband Deferring function
+ //
+ // Arg0: UUID Unique function identifier
+ // Arg1: Integer Revision Level
+ // Arg2: Integer Function Index
+ // Arg3: Package Parameters
+ //
+ Method (_DSM, 4, Serialized, 0, UnknownObj, {BuffObj, IntObj, IntObj, PkgObj})
+ {
+
+ // Define the Local Variables used throughout the method.
+
+ Name(PGCE, 0) // Power Gate Control Enable.
+ Name(PGCD, 0) // Power Gate Control Duration.
+ Name(DFUE, 0) // DFU Enable.
+ Name(DFUD, 0) // DFU Duration.
+ Name(OLDV, 0) // Old value of both Power Gate and DFU GPIO.
+ Name(PGCV, 0) // Power Gate Control Value
+ Name(DFUV, 0) // DFU Control Value
+
+ // Compare passed in UUID to supported UUID.
+
+ If (LEqual(Arg0, ToUUID ("03C868D5-563F-42A8-9F57-9A18D949B7CB")))
+ {
+
+ If (LEqual(1,ToInteger(Arg1))) // Revision 1.
+ {
+ Switch (ToInteger(Arg2)) // Switch to Function Index.
+ {
+ //
+ // Function 0, Query - return supported functions BitIndex.
+ //
+
+ Case (0)
+ {
+ Return (Buffer() {0x0F})
+ }
+
+ //
+ // Function 1, Power Gate Control - Pass in 2 value package via Arg3
+ //
+
+ Case (1)
+ {
+
+ Store (DeRefOf (Index (Arg3, 0)), PGCE)
+ Store (DeRefOf (Index (Arg3, 1)), PGCD)
+
+ Store(\_SB.RDGP(46), OLDV) // Save off GPIO46 = PWRGATE#
+ \_SB.WTGP(46, PGCE) // Set value to GPIO46 = PWRGATE#
+
+ If(LGreater(PGCD, 0)) // test duration value
+ {
+ Sleep(PGCD)
+ \_SB.WTGP(46, OLDV) // Restore GPIO46 = PWRGATE#
+ }
+
+ If (LEqual(\_SB.RDGP(46), 0x01)) // check for powered on (1 = on)
+ {
+ Sleep(150) // Delay so sensor hub has time to init.
+ If (LEqual(\_SB.RDGP(44), 0x01)) { // check mode, Sensor or DFU (1 = Sensor)
+ // Powering up in sensor hub mode
+ Notify(\_SB.PCI0.I2C0.SHUB, 1) // Check the sensor hub status
+ } Else {
+ // Powering up in DFU mode
+ Notify(\_SB.PCI0.I2C0.DFUD, 1) // Check the DFU device status
+ }
+ }
+
+ Return (0)
+ } // End Case (1)
+
+ //
+ // Function2, DFU Control - Pass in 2 value package via Arg3
+ //
+
+ Case (2)
+ {
+
+ Store (DeRefOf (Index (Arg3, 0)), DFUE)
+ Store (DeRefOf (Index (Arg3, 1)), DFUD)
+
+ Store(\_SB.RDGP(44), OLDV) // Save off GPIO44 = DFU_ENA#
+ \_SB.WTGP(44, DFUE) // Set Value to GPIO44 = DFU_ENA#
+
+ If (LGreater(DFUD, 0)) // Test duration value
+ {
+ Sleep(DFUD) // Delay for passed in duration.
+ \_SB.WTGP(44, OLDV) // Restore GPIO44 = DFU_ENA#
+ }
+
+ Return (0)
+ } // End Case 2...
+
+ //
+ // Function 3, Query Status ?Return the current status of GPIO signals.
+ //
+
+ Case (3)
+ {
+ Store(\_SB.RDGP(44), DFUV)
+ Store(\_SB.RDGP(46), PGCV)
+ Return(Package(){PGCV, DFUV})
+ } // End Case 3
+
+ } // End Function Index...
+ Return (0)
+ } // End Revision check...
+ Return (0)
+ } // End UUID check...
+ Return (0)
+ } // End _DSM Method...
+ } // End Device....
+ } // End Scope...
+} // End DefinitionBlock Termlist
diff --git a/Board/EM/Platform/SsdtSensorHub/SsdtSensorHub.cif b/Board/EM/Platform/SsdtSensorHub/SsdtSensorHub.cif
new file mode 100644
index 0000000..94dfc2a
--- /dev/null
+++ b/Board/EM/Platform/SsdtSensorHub/SsdtSensorHub.cif
@@ -0,0 +1,10 @@
+<component>
+ name = "SsdtSensorHub"
+ category = ModulePart
+ LocalRoot = "Board\EM\Platform\SsdtSensorHub"
+ RefName = "SsdtSensorHub"
+[files]
+"SsdtSensorHub.sdl"
+"SsdtSensorHub.mak"
+"SsdtSensorHub.asl"
+<endComponent>
diff --git a/Board/EM/Platform/SsdtSensorHub/SsdtSensorHub.mak b/Board/EM/Platform/SsdtSensorHub/SsdtSensorHub.mak
new file mode 100644
index 0000000..77444e6
--- /dev/null
+++ b/Board/EM/Platform/SsdtSensorHub/SsdtSensorHub.mak
@@ -0,0 +1,80 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: SsdtAcpiDebug.mak
+#
+# Description: MAke file to build Aptio ACPI ASL components
+#
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+all : BuildSENSORHUB
+
+BuildSENSORHUB : $(BUILD_DIR)\SENSORHUB.ffs
+
+#-----------------------------------------------------------------------
+# ASL compiler definition
+#-----------------------------------------------------------------------
+!IF "$(ACPIPLATFORM_ASL_COMPILER)"==""
+!ERROR It is an invalid path, please check your ASL compiler path.
+!ENDIF
+
+IASL = $(ACPIPLATFORM_ASL_COMPILER)
+#-----------------------------------------------------------------------
+$(BUILD_DIR)\SsdtSensorHub.aml : $(INTEL_SENSORHUB_ASL_FILE)
+ @cl /C /EP $(INTEL_SENSORHUB_ASL_FILE) > $(BUILD_DIR)\SsdtSensorHub.asl
+ $(IASL) -p $(BUILD_DIR)\SsdtSensorHub.aml $(BUILD_DIR)\SsdtSensorHub.asl
+
+$(BUILD_DIR)\SsdtSensorHub.sec: $(BUILD_DIR)\SsdtSensorHub.aml
+ $(GENSECTION) -I $*.aml -O $@ -S EFI_SECTION_RAW
+
+#Note. Expand the package with SsdtSensorHub tables.
+# DXE phase will load the tables
+# and update Aml contents if provided in Acpiplatform.c
+
+$(BUILD_DIR)\SENSORHUB.ffs: $(BUILD_DIR)\SsdtSensorHub.sec
+ $(GENFFSFILE) -B $(BUILD_DIR) -V -o $@ -P1 <<$(BUILD_DIR)\SsdtSensorHub.pkg
+
+PACKAGE.INF
+[.]
+BASE_NAME = SENSORHUB
+FFS_FILEGUID = A3201EEC-1612-4577-8924-CB32D542D22C
+FFS_FILETYPE = EFI_FV_FILETYPE_FREEFORM
+FFS_ATTRIB_CHECKSUM = TRUE
+
+IMAGE_SCRIPT =
+{
+ Compress (dummy) {
+ $(PROJECT_DIR)\$(BUILD_DIR)\SsdtSensorHub.sec
+ }
+}
+<<KEEP
+
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Platform/SsdtSensorHub/SsdtSensorHub.sdl b/Board/EM/Platform/SsdtSensorHub/SsdtSensorHub.sdl
new file mode 100644
index 0000000..3d66d8d
--- /dev/null
+++ b/Board/EM/Platform/SsdtSensorHub/SsdtSensorHub.sdl
@@ -0,0 +1,32 @@
+TOKEN
+ Name = "INTELSENSORHUB_SUPPORT"
+ Value = "1"
+ Help = "Main switch to support Intel SensorHub in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Token = "PCH_SKU" "=" "1"
+End
+
+PATH
+ Name = "INTEL_SSDTSENSORHUB_DIR"
+End
+
+TOKEN
+ Name = "INTEL_SENSORHUB_ASL_FILE"
+ Value = "$(INTEL_SSDTSENSORHUB_DIR)\SsdtSensorHub.asl"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+MODULE
+ Help = "Includes SsdtSensorHub.mak to Project"
+ File = "SsdtSensorHub.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\SENSORHUB.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/Platform/iasl.exe b/Board/EM/Platform/iasl.exe
new file mode 100644
index 0000000..b10ef96
--- /dev/null
+++ b/Board/EM/Platform/iasl.exe
Binary files differ
diff --git a/Board/EM/RapidStartWrapper/AcpiTables/RapidStartWrapperAcpiTables.cif b/Board/EM/RapidStartWrapper/AcpiTables/RapidStartWrapperAcpiTables.cif
new file mode 100644
index 0000000..4a82a51
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/AcpiTables/RapidStartWrapperAcpiTables.cif
@@ -0,0 +1,9 @@
+<component>
+ name = "RapidStartWrapperAcpiTables"
+ category = ModulePart
+ LocalRoot = "Board\EM\RapidStartWrapper\AcpiTables"
+ RefName = "RapidStartWrapperAcpiTables"
+[files]
+"RapidStartWrapperAcpiTables.sdl"
+"Ssdt\RapidStartWrapper.asl"
+<endComponent>
diff --git a/Board/EM/RapidStartWrapper/AcpiTables/RapidStartWrapperAcpiTables.sdl b/Board/EM/RapidStartWrapper/AcpiTables/RapidStartWrapperAcpiTables.sdl
new file mode 100644
index 0000000..e181424
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/AcpiTables/RapidStartWrapperAcpiTables.sdl
@@ -0,0 +1,102 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartWrapperAcpiTables.sdl 2 4/15/13 2:38a Bensonlai $
+#
+# $Revision: 2 $
+#
+# $Date: 4/15/13 2:38a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartWrapperAcpiTables.sdl $
+#
+# 2 4/15/13 2:38a Bensonlai
+# [TAG] None
+# [Category] Bug Fix
+# [Severity] Important
+# [Symptom] If users change any item from driver then restore to boot
+# setting, our SMI can't distinguish between user's and driver's event.
+# [RootCause] It's an Intel driver issue.
+# [Solution] 1. Removing the sync up with Rapid Start driver and BIOS
+# variable as default.
+# 2. Remove our BIOS workaround.
+# [Files] RapidStartWrapperSmm.sdl, RapidStartWrapperSmm.h,
+# RapidStartWrapperSmm.sdl, RapidStartWrapperAcpiTables.sdl,
+# RapidStartWrapper.sdl
+#
+# 1 12/27/12 2:25a Bensonlai
+# [TAG] EIP110680
+# [Category] New Feature
+# [Description] When iRST application is run under OS, and change
+# timer.
+# BIOS should update the changed to Setup option as well.
+# [Files] Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.c
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.h
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.mak
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.dxs
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.sdl
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.cif
+# Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.cif
+# Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.sdl
+# Board\EM\RapidStartWrapper\AcpiTables\Ssdt\RapidStartWrapper.asl
+# Board\EM\RapidStartWrapper\RapidStartSetup\RapidStartSetup.sd
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RapidStartWrapperAcpiTables.sdl
+#
+# Description: SDL file for RapidStartWrapperAcpiTables
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "RapidStartWrapperAcpiTables_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Help = "Main switch to enable RapidStartWrapper ACPI tables in Project"
+ Token = "SYNC_UP_DRIVER_AND_BIOS_VARIABLE" "=" "1"
+End
+
+PATH
+ Name = "RapidStartWrapperAcpiTables_DIR"
+End
+
+TOKEN
+ Name = "INTEL_RAPIDSTART_ASL_FILE"
+ Value = "$(RapidStartWrapperAcpiTables_DIR)\Ssdt\RapidStartWrapper.asl"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/AcpiTables/Ssdt/RapidStartWrapper.asl b/Board/EM/RapidStartWrapper/AcpiTables/Ssdt/RapidStartWrapper.asl
new file mode 100644
index 0000000..ad41ac1
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/AcpiTables/Ssdt/RapidStartWrapper.asl
@@ -0,0 +1,131 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/Ssdt/RapidStartWrapper.asl 1 12/27/12 2:25a Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 12/27/12 2:25a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/Ssdt/RapidStartWrapper.asl $
+//
+// 1 12/27/12 2:25a Bensonlai
+// [TAG] EIP110680
+// [Category] New Feature
+// [Description] When iRST application is run under OS, and change
+// timer.
+// BIOS should update the changed to Setup option as well.
+// [Files] Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.c
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.h
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.mak
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.dxs
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.sdl
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.cif
+// Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.cif
+// Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.sdl
+// Board\EM\RapidStartWrapper\AcpiTables\Ssdt\RapidStartWrapper.asl
+// Board\EM\RapidStartWrapper\RapidStartSetup\RapidStartSetup.sd
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartWrapper.asl
+//
+// Description: RapidStart ACPI ASL code to support OS control
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+DefinitionBlock (
+ "RapidStart.aml",
+ "SSDT",
+ 0x01,
+ "Iffs",
+ "IffsAsl",
+ 0x3000
+ )
+{
+
+ Scope (\_SB) {
+ Device(IFFS) {
+ OperationRegion(FFSN,SystemMemory,0xFFFF0000,0xAA55)
+ Field(FFSN,AnyAcc,Lock,Preserve)
+ {
+ FFSA, 8, // (0) iFFS available events
+ FFSS, 8, // (1) iFFS enabled events
+ FFST, 16, // (2) iFFS wake timer in minutes
+ FFSP, 32 // (4) iFFS performance monitoring data
+ }
+
+//AMIOVERRIDE_BEGIN
+ OperationRegion (RSMI, SystemIO, 0xB2, 0x02)
+ Field (RSMI, ByteAcc, NoLock, Preserve) {
+ SMIC, 8,
+ SMID, 8
+ }
+//AMIOVERRIDE_END
+
+ Name(_HID,EISAID("INT3392"))
+ Name(_CID,EISAID("PNP0C02"))
+
+ Method(GFFS,0,Serialized) {
+ Return(FFSS)
+ }
+ Method(SFFS,1,Serialized) {
+ And(Arg0, FFSA, FFSS)
+//AMIOVERRIDE_BEGIN
+ Store(0x01, SMID)
+ Store(0xB4, SMIC)
+//AMIOVERRIDE_END
+ Return(FFSS)
+ }
+ Method(GFTV,0,Serialized) {
+ Return(FFST)
+ }
+ Method(SFTV,1,Serialized) {
+ //
+ // 24*60=1440 minutes (24 Hours)
+ //
+ If (LLessEqual(Arg0,1440)) {
+ Store(Arg0,FFST)
+ } Else {
+ And(FFSS,0xFFFE,FFSS)
+ Store(10,FFST)
+ }
+//AMIOVERRIDE_BEGIN
+ Store(0x01, SMID)
+ Store(0xB4, SMIC)
+//AMIOVERRIDE_END
+ Return(FFST)
+ }
+ }
+ }
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.c b/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.c
new file mode 100644
index 0000000..87b9146
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.c
@@ -0,0 +1,626 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxePolicyInit/RapidStartDxePolicyInit.c 9 5/13/14 4:55a Joshchou $
+//
+// $Revision: 9 $
+//
+// $Date: 5/13/14 4:55a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxePolicyInit/RapidStartDxePolicyInit.c $
+//
+// 9 5/13/14 4:55a Joshchou
+// [TAG] EIP167032
+// [Category] Improvement
+// [Description] Review the variable's attribute, we shouldn't use
+// runtime attribute with setup variable.
+// [Files] RapidStartDxePolicyInit.h
+// RapidStartDxePolicyInit.c
+// RapidStartDxePolicyInit.cif
+//
+// 8 6/21/13 5:59a Joshchou
+// [TAG] EIP126792
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Can't do AMI capsule when Intel Rapid Start eanble
+// [RootCause] CMOS RapidStartFlag does not clear.
+// [Solution] Clear RapidStartFlag when cold boot.
+//
+// 7 1/15/13 4:44a Bensonlai
+// [TAG] EIP112263
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] [RapidStart] Instant-on can't work
+// [RootCause] Intel reference code can't work on AMI base.
+// [Solution] Modified the PeiGfxDriver.dxs and RapidStartDxe.dxs for
+// AMI code
+// [Files] RapidStartDxePolicyInit.c, RapidStartSetup.uni,
+// RapidStartSetup.sdl, RapidStartSetup.sd, PeiGfxDriver.dxs,
+// RapidStartDxe.dxs
+//
+// 6 1/13/13 7:46a Bensonlai
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Disabling the RapidStart while STAT mode in the IDE
+// mode
+// [Files] RapidStartDxePolicyInit.c, RapidStartDxePolicyInit.h,
+// RapidStartDxePolicyInit.mak, RapidStartSetup.c, RapidStartSetup.mak,
+// RapidStartSetup.sd, RapidStartSetup.sdl
+//
+// 5 12/11/12 10:59p Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Removed unused code
+// [Files] RapidStartDxePolicyInit.c
+//
+// 4 12/07/12 1:15a Bensonlai
+// [TAG] None
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] When installed memory size less than HDD partition size of
+// teh RapidStart, it still can work.
+// [RootCause] The RAPID_START_PERSISTENT_DATA wasn't updated in the
+// BdsAllDriversConnectedCallback().
+// [Solution] Get the real total size of memory directly.
+// [Files] RapidStartDxePolicyInit.c, RapidStartDxePolicyInit.h,
+// RapidStartDxePolicyInit.mak
+//
+// 3 12/03/12 2:12a Bensonlai
+// [TAG] EIP107865
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] While system has no disk drives, we still free the null
+// pointer IdentifyDriveInfo/HandleBuffer and that will cause an assert
+// error with DEBUG_MODE=1.
+// [Solution] Improved the function of SsdDetection.
+//
+// 2 11/15/12 12:24a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Move the RAPID_START_PARTITION_DETECT_BEFORE_SETUP to
+// RapidStartDxePolicyInit.c
+//
+// 1 10/15/12 4:40a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] [Category] Improvement
+// [Severity] Important
+// [Description] Rename all IFFS sting to Rapid Start.
+// [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+//
+// [Category] Improvement
+// [Severity] Important
+// [Description] Implementation of the LOCK_DISABLE_RAPID_START_IF_NO_SSD
+// using EDKII.
+// [Files] Board\EM\RapidStartWrapper\Dxe\RapidStartDxePolicyInit\*.*
+// [Files] RapidStartDxePolicyInit.cif
+// RapidStartDxePolicyInit.sdl
+// RapidStartDxePolicyInit.mak
+// RapidStartDxePolicyInit.h
+// RapidStartDxePolicyInit.c
+// RapidStartDxePolicyInit.dxs
+// RapidStartDxePolicyInit.inf
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartDxePolicyInit.c
+//
+// Description: This file is a wrapper for Intel RapidStart Platform Policy driver.
+// Get Setup Value to initilize Intel DXE Platform Policy.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include "RapidStartDxePolicyInit.h"
+
+RAPID_START_PLATFORM_POLICY_PROTOCOL mDxePlatformRapidStartPolicy;
+EFI_GUID gRapidStartPlatformPolicyProtocolGuid = RAPID_START_PLATFORM_POLICY_PROTOCOL_GUID;
+
+//
+// Function implementations
+//
+#if LOCK_DISABLE_RAPID_START_IF_NO_SSD
+BOOLEAN SsdDetection (
+ VOID
+)
+{
+ EFI_STATUS Status;
+ UINTN HandleCount;
+ EFI_HANDLE *HandleBuffer;
+ UINT8 Index;
+ PCI_DEVICE_PATH *PciDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathNode;
+ EFI_DISK_INFO_PROTOCOL *DiskInfo;
+ EFI_IDENTIFY_DATA *IdentifyDriveInfo;
+ UINT32 BufferSize = 0;
+
+ Status = gBS->LocateHandleBuffer ( ByProtocol, \
+ &gEfiDiskInfoProtocolGuid, \
+ NULL, \
+ &HandleCount, \
+ &HandleBuffer \
+ );
+
+ if ( EFI_ERROR(Status) ) return FALSE;
+
+ for (Index = 0; Index < HandleCount; Index++) {
+ Status = gBS->HandleProtocol ( HandleBuffer[Index], \
+ &gEfiDevicePathProtocolGuid, \
+ (VOID *) &DevicePath \
+ );
+
+ if ( EFI_ERROR(Status) ) {
+ continue;
+ }
+
+ DevicePathNode = DevicePath;
+ while (!IsDevicePathEnd (DevicePathNode)) {
+ if ((DevicePathType (DevicePathNode) == HARDWARE_DEVICE_PATH) &&
+ (DevicePathSubType (DevicePathNode) == HW_PCI_DP)
+ ) {
+ PciDevicePath = (PCI_DEVICE_PATH *) DevicePathNode;
+ break;
+ }
+
+ DevicePathNode = NextDevicePathNode (DevicePathNode);
+ }
+
+
+ if (PciDevicePath == NULL) continue;
+
+ if ( ((PciDevicePath->Device == PCI_DEVICE_NUMBER_PCH_SATA) && (PciDevicePath->Function == PCI_FUNCTION_NUMBER_PCH_SATA)) ||
+ ((PciDevicePath->Device == PCI_DEVICE_NUMBER_PCH_SATA) && (PciDevicePath->Function == PCI_FUNCTION_NUMBER_PCH_SATA2)) ) {
+
+ Status = gBS->HandleProtocol ( HandleBuffer[Index], \
+ &gEfiDiskInfoProtocolGuid, \
+ &DiskInfo \
+ );
+
+ if ( EFI_ERROR(Status) ) {
+ continue;
+ }
+
+ BufferSize = sizeof (EFI_IDENTIFY_DATA);
+ IdentifyDriveInfo = AllocatePool (BufferSize);
+ if (IdentifyDriveInfo == NULL) {
+ FreePool (HandleBuffer);
+ return FALSE;
+ }
+
+ Status = DiskInfo->Identify (
+ DiskInfo,
+ IdentifyDriveInfo,
+ &BufferSize
+ );
+
+ if ( EFI_ERROR(Status) ) {
+ FreePool (IdentifyDriveInfo);
+ continue;
+ }
+
+ if (IdentifyDriveInfo->AtaData.reserved_160_255[57] == 0x0001) {
+ FreePool (IdentifyDriveInfo);
+ FreePool (HandleBuffer);
+ return TRUE;
+ }
+
+ FreePool (IdentifyDriveInfo);
+ }
+ }
+
+ if (HandleCount > 0) {
+ FreePool (HandleBuffer);
+ }
+ return FALSE;
+}
+
+VOID
+SsdDetectionCallback (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+)
+{
+
+ EFI_STATUS Status;
+ UINTN VariableSize;
+ SETUP_DATA SetupData;
+ UINT32 Attributes = 0;
+
+ VariableSize = sizeof( SETUP_DATA );
+ Status = gRT->GetVariable( L"Setup", \
+ &SetupGuid, \
+ &Attributes, \
+ &VariableSize, \
+ &SetupData );
+
+ if ( EFI_ERROR(Status) ) {
+ gBS->CloseEvent (Event);
+ ASSERT_EFI_ERROR (Status);
+ return;
+ }
+
+ if (!SsdDetection()) {
+ SetupData.RapidStartLock = 1;
+ SetupData.RapidStartEnabled = 0;
+ } else {
+ SetupData.RapidStartLock = 0;
+ }
+
+ Status = gRT->SetVariable( L"Setup", \
+ &SetupGuid, \
+ Attributes, \
+ sizeof (SETUP_DATA), \
+ &SetupData
+ );
+
+ if ( EFI_ERROR(Status) ) {
+ gBS->CloseEvent (Event);
+ ASSERT_EFI_ERROR (Status);
+ return;
+ }
+
+ gBS->CloseEvent (Event);
+}
+
+VOID
+SsdDetectionRegisterCallBack (
+ VOID
+)
+{
+ EFI_EVENT Event;
+ VOID *NotifyReg;
+ EFI_STATUS Status;
+
+ Status = gBS->CreateEvent (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ SsdDetectionCallback,
+ NULL,
+ &Event
+ );
+
+ if ( EFI_ERROR(Status) ) {
+ ASSERT_EFI_ERROR (Status);
+ return;
+ }
+
+ Status = gBS->RegisterProtocolNotify (
+ &gNotifyProtocolGuid ,
+ Event,
+ &NotifyReg
+ );
+
+ if ( EFI_ERROR(Status) ) {
+ ASSERT_EFI_ERROR (Status);
+ return;
+ }
+
+ return;
+}
+#endif
+
+#ifdef RAPID_START_PARTITION_DETECT_BEFORE_SETUP
+VOID
+BdsAllDriversConnectedCallback (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+)
+{
+ EFI_STATUS Status;
+ EFI_GUID RapidStartPartitionProtocolGuid = RAPID_START_PARTITION_STATUS_PROTOCOL_GUID;
+ RAPID_START_PERSISTENT_DATA *mRapidStartData;
+ UINTN MchBase;
+
+ mRapidStartData = AllocateZeroPool (sizeof(RAPID_START_PERSISTENT_DATA));
+ if (mRapidStartData == NULL) {
+ return;
+ }
+
+ MchBase = MmPciAddress (0, SA_MC_BUS, SA_MC_DEV, SA_MC_FUN, 0);
+ mRapidStartData->Tolm = MmioRead32 (MchBase + R_SA_BDSM) & B_SA_BDSM_BDSM_MASK;
+ mRapidStartData->Tohm = MmioRead64 (MchBase + R_SA_TOUUD) & B_SA_TOUUD_TOUUD_MASK;
+ ///
+ /// Calculate total size of memory to be stored
+ ///
+ mRapidStartData->TotalMem = mRapidStartData->Tolm;
+ if (mRapidStartData->Tohm > MEM_EQU_4GB) {
+ mRapidStartData->TotalMem += mRapidStartData->Tohm - MEM_EQU_4GB;
+ }
+
+ //
+ // Rapid Start has been enabled, check if Rapid Start store valid.
+ //
+ Status = SearchRapidStartStore (
+ &mDxePlatformRapidStartPolicy,
+ &(mRapidStartData->StoreSectors),
+ &(mRapidStartData->StoreLbaAddr),
+ &(mRapidStartData->StoreSataPort)
+ );
+ if ( (EFI_ERROR (Status)) ||
+ (MEM_TO_SECT (mRapidStartData->TotalMem) > mRapidStartData->StoreSectors) &&
+ (mDxePlatformRapidStartPolicy.ActivePageThresholdSupport == 0) ) {
+ //
+ } else {
+ Status = gBS->InstallProtocolInterface (
+ &gImageHandle,
+ &RapidStartPartitionProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ NULL );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ gBS->CloseEvent (Event);
+}
+
+VOID
+RegisterForBdsAllDriversConnected (
+ IN EFI_HANDLE ImageHandle
+)
+{
+ EFI_EVENT Event;
+ VOID *NotifyReg;
+ EFI_STATUS Status;
+
+ gImageHandle = ImageHandle;
+
+ Status = gBS->CreateEvent (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ BdsAllDriversConnectedCallback,
+ NULL,
+ &Event
+ );
+
+ if ( EFI_ERROR(Status) ) {
+ ASSERT_EFI_ERROR (Status);
+ return;
+ }
+
+ Status = gBS->RegisterProtocolNotify (
+ &gBdsAllDriversConnectedProtocolGuid,
+ Event,
+ &NotifyReg
+ );
+
+ if ( EFI_ERROR(Status) ) {
+ ASSERT_EFI_ERROR (Status);
+ return;
+ }
+
+ return;
+}
+#endif
+
+#if SYNC_UP_DRIVER_AND_BIOS_VARIABLE
+VOID
+SyncUpDriverAndBiosVariable (
+ VOID
+)
+{
+ EFI_STATUS Status;
+ UINTN VariableSize;
+ RAPID_START_WRAPPER_SMM_DATA RapidStartWrapperSmmData;
+ UINT32 Attributes = 0;
+ SETUP_DATA SetupData;
+
+ VariableSize = sizeof( RAPID_START_WRAPPER_SMM_DATA );
+ Status = gRT->GetVariable( L"RstWrapVar",
+ &RapidStartWrapperSmmDataGuid,
+ &Attributes,
+ &VariableSize,
+ &RapidStartWrapperSmmData );
+
+ //TRACE((-1,"SYNC_UP_DRIVER_AND_BIOS_VARIABLE Get Setup Variable RstWrapVar Attributes = %x.\n",Attributes));
+
+ if ( EFI_ERROR (Status) ) {
+ //TRACE((-1,"SYNC_UP_DRIVER_AND_BIOS_VARIABLE Get Variable Failed!\n"));
+ return;
+ }
+ else{
+// TRACE((-1,"SYNC_UP_DRIVER_AND_BIOS_VARIABLE S3WakeTimerMin = %d\n",RapidStartWrapperSmmData.S3WakeTimerMin));
+// TRACE((-1,"SYNC_UP_DRIVER_AND_BIOS_VARIABLE EntryOnS3RtcWake = %x\n",RapidStartWrapperSmmData.EntryOnS3RtcWake));
+// TRACE((-1,"SYNC_UP_DRIVER_AND_BIOS_VARIABLE EntryOnS3CritBattWake = %x\n",RapidStartWrapperSmmData.EntryOnS3CritBattWake));
+
+ VariableSize = sizeof( SETUP_DATA );
+ Status = gRT->GetVariable( L"Setup",
+ &SetupGuid,
+ &Attributes,
+ &VariableSize,
+ &SetupData );
+
+// TRACE((-1,"SYNC_UP_DRIVER_AND_BIOS_VARIABLE Get Setup Variable Attributes = %x.\n",Attributes));
+ SetupData.S3WakeTimerMin = RapidStartWrapperSmmData.S3WakeTimerMin;
+ SetupData.EntryOnS3RtcWake = RapidStartWrapperSmmData.EntryOnS3RtcWake;
+ SetupData.EntryOnS3CritBattWake = RapidStartWrapperSmmData.EntryOnS3CritBattWake;
+
+ Status = gRT->SetVariable( L"Setup", \
+ &SetupGuid, \
+ Attributes, \
+ sizeof (SETUP_DATA), \
+ &SetupData );
+
+ return;
+ }
+
+
+}
+#endif
+
+VOID
+SetCriticalBatteryThreshole (
+ IN UINT8 Value
+)
+{
+ UINT8 RtcIndexPort;
+ UINT8 RtcDataPort;
+
+ //
+ // CMOS access registers (using alternative access not to handle NMI bit)
+ //
+ if (FFS_CBTH_DATA_REG < 0x80) {
+ //
+ // First bank
+ //
+ RtcIndexPort = 0x74;
+ RtcDataPort = 0x75;
+ } else {
+ //
+ // Second bank
+ //
+ RtcIndexPort = 0x76;
+ RtcDataPort = 0x77;
+ }
+
+ IoWrite8 (RtcIndexPort, FFS_CBTH_DATA_REG & 0x7F);
+ IoWrite8 (RtcDataPort, Value);
+}
+
+/**
+ Initilize Intel RapidStart DXE Platform Policy
+
+ @param[in] ImageHandle Image handle of this driver.
+ @param[in] SystemTable Global system service table.
+
+ @retval EFI_SUCCESS Initialization complete.
+ @exception EFI_UNSUPPORTED The chipset is unsupported by this driver.
+ @retval EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver.
+ @retval EFI_DEVICE_ERROR Device error, driver exits abnormally.
+**/
+EFI_STATUS
+EFIAPI
+RapidStartDxePolicyInitEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+ UINTN VariableSize;
+ SETUP_DATA SetupData;
+ PCH_SERIES PchSeries = GetPchSeries();
+ ///
+ /// Initialize the EFI Driver Library
+ ///
+ ZeroMem (&mDxePlatformRapidStartPolicy, sizeof (RAPID_START_PLATFORM_POLICY_PROTOCOL));
+
+ VariableSize = sizeof( SETUP_DATA );
+ Status = gRT->GetVariable( L"Setup",
+ &SetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData );
+
+ if ( EFI_ERROR(Status) ) {
+ mDxePlatformRapidStartPolicy.EnableRapidStart = 0;
+ mDxePlatformRapidStartPolicy.EntryOnS3RtcWake = 0;
+ mDxePlatformRapidStartPolicy.S3WakeTimerMin = 0;
+ mDxePlatformRapidStartPolicy.EntryOnS3CritBattWake = 0;
+ mDxePlatformRapidStartPolicy.ActivePageThresholdSupport = 0;
+ mDxePlatformRapidStartPolicy.ActivePageThresholdSize = 0;
+ mDxePlatformRapidStartPolicy.HybridHardDisk = 0;
+ mDxePlatformRapidStartPolicy.DisplaySaveRestore = 0;
+ mDxePlatformRapidStartPolicy.DisplayType = 0;
+ mDxePlatformRapidStartPolicy.RaidModeSataPortNumber = 255;
+ } else {
+ if (PchSeries == PchLp) {
+ if ( SetupData.ULTSataInterfaceMode == 0 ) { //IDE mode
+ mDxePlatformRapidStartPolicy.EnableRapidStart = 0;
+ } else {
+ mDxePlatformRapidStartPolicy.EnableRapidStart = SetupData.RapidStartEnabled;
+ }
+ } else {
+ if ( SetupData.SataInterfaceMode == 0 ) { //IDE mode
+ mDxePlatformRapidStartPolicy.EnableRapidStart = 0;
+ } else {
+ mDxePlatformRapidStartPolicy.EnableRapidStart = SetupData.RapidStartEnabled;
+ }
+ }
+ mDxePlatformRapidStartPolicy.EntryOnS3RtcWake = SetupData.EntryOnS3RtcWake;
+ mDxePlatformRapidStartPolicy.S3WakeTimerMin = SetupData.S3WakeTimerMin;
+ mDxePlatformRapidStartPolicy.EntryOnS3CritBattWake = SetupData.EntryOnS3CritBattWake;
+ mDxePlatformRapidStartPolicy.ActivePageThresholdSupport = SetupData.ActivePageThresholdSupport;
+ mDxePlatformRapidStartPolicy.ActivePageThresholdSize = SetupData.ActivePageThresholdSize;
+ mDxePlatformRapidStartPolicy.HybridHardDisk = SetupData.RapidStartHybridHardDisk;
+ mDxePlatformRapidStartPolicy.DisplaySaveRestore = SetupData.RapidStartDisplaySaveRestore;
+ mDxePlatformRapidStartPolicy.DisplayType = SetupData.RapidStartDisplayType;
+ SetCriticalBatteryThreshole(SetupData.CritBattWakeThreshold);
+
+ ///
+ /// By default set to 255 as not used
+ ///
+ mDxePlatformRapidStartPolicy.RaidModeSataPortNumber = 255;
+ }
+ //AMI_OVERRIDE_FOR_RAPID_START
+ //Clear CMOS RapidStartFlag in DXE
+ RapidStartSetConfig(0);
+ //AMI_OVERRIDE_FOR_RAPID_START
+#if LOCK_DISABLE_RAPID_START_IF_NO_SSD
+ SsdDetectionRegisterCallBack();
+#endif
+
+#ifdef RAPID_START_PARTITION_DETECT_BEFORE_SETUP
+ RegisterForBdsAllDriversConnected(ImageHandle);
+#endif
+
+#if SYNC_UP_DRIVER_AND_BIOS_VARIABLE
+ SyncUpDriverAndBiosVariable();
+#endif
+
+ ///
+ /// Protocol revision number
+ ///
+ mDxePlatformRapidStartPolicy.Revision = DXE_RAPID_START_PLATFORM_POLICY_PROTOCOL_REVISION;
+
+ ///
+ /// FviSmbiosType is the SMBIOS OEM type (0x80 to 0xFF) defined in SMBIOS Type 14 - Group
+ /// Associations structure - item type. FVI structure uses it as SMBIOS OEM type to provide
+ /// version information. The default value is type 221.
+ ///
+ mDxePlatformRapidStartPolicy.FviSmbiosType = 0xDD;
+
+
+ ///
+ /// Install protocol to to allow access to this Policy.
+ ///
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &ImageHandle,
+ &gRapidStartPlatformPolicyProtocolGuid,
+ &mDxePlatformRapidStartPolicy,
+ NULL
+ );
+ if ( EFI_ERROR(Status) ) {
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+
+ return Status;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.cif b/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.cif
new file mode 100644
index 0000000..2edcee5
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.cif
@@ -0,0 +1,13 @@
+<component>
+ name = "RapidStartDxePolicyInit"
+ category = ModulePart
+ LocalRoot = "Board\EM\RapidStartWrapper\Dxe\RapidStartDxePolicyInit"
+ RefName = "RapidStartDxePolicyInit"
+[files]
+"RapidStartDxePolicyInit.sdl"
+"RapidStartDxePolicyInit.mak"
+"RapidStartDxePolicyInit.h"
+"RapidStartDxePolicyInit.c"
+"RapidStartDxePolicyInit.dxs"
+"RapidStartDxePolicyInit.inf"
+<endComponent>
diff --git a/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.dxs b/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.dxs
new file mode 100644
index 0000000..a785e6d
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.dxs
@@ -0,0 +1,76 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxePolicyInit/RapidStartDxePolicyInit.dxs 1 10/15/12 4:40a Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 10/15/12 4:40a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxePolicyInit/RapidStartDxePolicyInit.dxs $
+//
+// 1 10/15/12 4:40a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] [Category] Improvement
+// [Severity] Important
+// [Description] Rename all IFFS sting to Rapid Start.
+// [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+//
+// [Category] Improvement
+// [Severity] Important
+// [Description] Implementation of the LOCK_DISABLE_RAPID_START_IF_NO_SSD
+// using EDKII.
+// [Files] Board\EM\RapidStartWrapper\Dxe\RapidStartDxePolicyInit\*.*
+// [Files] RapidStartDxePolicyInit.cif
+// RapidStartDxePolicyInit.sdl
+// RapidStartDxePolicyInit.mak
+// RapidStartDxePolicyInit.h
+// RapidStartDxePolicyInit.c
+// RapidStartDxePolicyInit.dxs
+// RapidStartDxePolicyInit.inf
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartDxePolicyInit.dxs
+//
+// Description: Dependency expression source file.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include "EfiDepex.h"
+#include EFI_ARCH_PROTOCOL_DEFINITION (Variable)
+
+DEPENDENCY_START
+ EFI_VARIABLE_ARCH_PROTOCOL_GUID
+DEPENDENCY_END
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.h b/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.h
new file mode 100644
index 0000000..13a5bd0
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.h
@@ -0,0 +1,187 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxePolicyInit/RapidStartDxePolicyInit.h 6 5/13/14 4:55a Joshchou $
+//
+// $Revision: 6 $
+//
+// $Date: 5/13/14 4:55a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxePolicyInit/RapidStartDxePolicyInit.h $
+//
+// 6 5/13/14 4:55a Joshchou
+// [TAG] EIP167032
+// [Category] Improvement
+// [Description] Review the variable's attribute, we shouldn't use
+// runtime attribute with setup variable.
+// [Files] RapidStartDxePolicyInit.h
+// RapidStartDxePolicyInit.c
+// RapidStartDxePolicyInit.cif
+//
+// 5 6/21/13 6:00a Joshchou
+// [TAG] EIP126792
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Can't do AMI capsule when Intel Rapid Start eanble
+// [RootCause] CMOS RapidStartFlag does not clear.
+// [Solution] Clear RapidStartFlag when cold boot.
+//
+// 4 1/13/13 7:47a Bensonlai
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Disabling the RapidStart while STAT mode in the IDE
+// mode
+// [Files] RapidStartDxePolicyInit.c, RapidStartDxePolicyInit.h,
+// RapidStartDxePolicyInit.mak, RapidStartSetup.c, RapidStartSetup.mak,
+// RapidStartSetup.sd, RapidStartSetup.sdl
+//
+// 3 12/07/12 1:16a Bensonlai
+// [TAG] None
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] When installed memory size less than HDD partition size of
+// teh RapidStart, it still can work.
+// [RootCause] The RAPID_START_PERSISTENT_DATA wasn't updated in the
+// BdsAllDriversConnectedCallback().
+// [Solution] Get the real total size of memory directly.
+// [Files] RapidStartDxePolicyInit.c, RapidStartDxePolicyInit.h,
+// RapidStartDxePolicyInit.mak
+//
+// 2 11/15/12 1:03a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Move the RAPID_START_PARTITION_DETECT_BEFORE_SETUP to
+// RapidStartDxePolicyInit.c.
+//
+// 1 10/15/12 4:40a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] [Category] Improvement
+// [Severity] Important
+// [Description] Rename all IFFS sting to Rapid Start.
+// [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+//
+// [Category] Improvement
+// [Severity] Important
+// [Description] Implementation of the LOCK_DISABLE_RAPID_START_IF_NO_SSD
+// using EDKII.
+// [Files] Board\EM\RapidStartWrapper\Dxe\RapidStartDxePolicyInit\*.*
+// [Files] RapidStartDxePolicyInit.cif
+// RapidStartDxePolicyInit.sdl
+// RapidStartDxePolicyInit.mak
+// RapidStartDxePolicyInit.h
+// RapidStartDxePolicyInit.c
+// RapidStartDxePolicyInit.dxs
+// RapidStartDxePolicyInit.inf
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartDxePolicyInit.h
+//
+// Description: Header file for the RapidStartDxePolicyInit Driver.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifndef _RAPID_START_DXE_PLATFORM_POLICY_H_
+#define _RAPID_START_DXE_PLATFORM_POLICY_H_
+//
+// External include files do NOT need to be explicitly specified in real EDKII
+// environment
+//
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+#include EFI_PROTOCOL_PRODUCER (RapidStartPlatformPolicy)
+#include EFI_PROTOCOL_CONSUMER (DiskInfo)
+#include <token.h>
+#include "PchRegs.h"
+#include "SaAccess.h"
+#include "PchPlatformLib.h"
+#include <SetupDataDefinition.h>
+#define SYSTEM_CONFIGURATION_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+EFI_GUID SetupGuid = SYSTEM_CONFIGURATION_GUID;
+
+#if LOCK_DISABLE_RAPID_START_IF_NO_SSD
+#define BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID \
+ { 0xdbc9fd21, 0xfad8, 0x45b0, 0x9e, 0x78, 0x27, 0x15, 0x88, 0x67, 0xcc, 0x93 }
+
+EFI_GUID gNotifyProtocolGuid = BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID;
+#endif
+
+#ifdef RAPID_START_PARTITION_DETECT_BEFORE_SETUP
+#define BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID \
+ { 0xdbc9fd21, 0xfad8, 0x45b0, 0x9e, 0x78, 0x27, 0x15, 0x88, 0x67, 0xcc, 0x93 }
+
+#define RAPID_START_PARTITION_STATUS_PROTOCOL_GUID \
+ { 0x65639144, 0xd492, 0x4328, 0xa4, 0x98, 0xf4, 0xb5, 0x54, 0x5e, 0x4a, 0x30 }
+
+EFI_GUID gBdsAllDriversConnectedProtocolGuid = \
+ BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID;
+EFI_HANDLE gImageHandle;
+#if SYNC_UP_DRIVER_AND_BIOS_VARIABLE
+#define RAPID_START_WRAPPER_SMM_DATA_GUID { 0xc840359f, 0x1c11, 0x4d41, 0x92, 0x4c, 0x89, 0x70, 0x52, 0x22, 0x6a, 0xd4 }
+EFI_GUID RapidStartWrapperSmmDataGuid = RAPID_START_WRAPPER_SMM_DATA_GUID;
+
+typedef struct _RAPID_START_WRAPPER_SMM_DATA {
+ UINT16 S3WakeTimerMin;
+ UINT8 EntryOnS3RtcWake;
+ UINT8 EntryOnS3CritBattWake;
+} RAPID_START_WRAPPER_SMM_DATA;
+#endif
+#include <RapidStartData.h>
+#include <RapidStartDxeLib.h>
+#include <RapidStartAhciReg.h>
+//AMI_OVERRIDE_FOR_RAPID_START
+#include <RapidStartCommonLib.h>
+//AMI_OVERRIDE_FOR_RAPID_START
+#endif
+//#include "RapidStartPlatformPolicyUpdateDxeLib.h"
+#endif
+
+/**
+ Initilize Intel RapidStart DXE Platform Policy
+
+ @param[in] ImageHandle - Image handle of this driver.
+ @param[in] SystemTable - Global system service table.
+
+ @retval EFI_SUCCESS Initialization complete.
+ @exception EFI_UNSUPPORTED The chipset is unsupported by this driver.
+ @retval EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver.
+ @retval EFI_DEVICE_ERROR Device error, driver exits abnormally.
+**/
+EFI_STATUS
+RapidStartDxePolicyInitEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN OUT EFI_SYSTEM_TABLE *SystemTable
+ );
+
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.inf b/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.inf
new file mode 100644
index 0000000..97d8602
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.inf
@@ -0,0 +1,74 @@
+## @file
+# Component description file for the RapidStartDxePolicyInit DXE driver.
+#
+#@copyright
+# Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved
+# This software and associated documentation (if any) is furnished
+# under a license and may only be used or copied in accordance
+# with the terms of the license. Except as permitted by such
+# license, no part of this software or documentation may be
+# reproduced, stored in a retrieval system, or transmitted in any
+# form or by any means without the express written consent of
+# Intel Corporation.
+#
+# This file contains a 'Sample Driver' and is licensed as such
+# under the terms of your license agreement with Intel or your
+# vendor. This file may be modified by the user, subject to
+# the additional terms of the license agreement
+#
+
+[defines]
+BASE_NAME = RapidStartDxePolicyInit
+FILE_GUID = DDB412A6-E3F3-4e9e-90A3-2A991270219C
+COMPONENT_TYPE = BS_DRIVER
+
+[sources.common]
+ RapidStartDxePolicyInit.c
+ RapidStartDxePolicyInit.h
+#
+# Edk II Glue Driver Entry Point
+#
+ EdkIIGlueDxeDriverEntryPoint.c
+
+[includes.common]
+ .
+ $(EDK_SOURCE)/Foundation
+ $(EDK_SOURCE)/Foundation/Include
+ $(EDK_SOURCE)/Foundation/Efi
+ $(EDK_SOURCE)/Foundation/Efi/Include
+ $(EDK_SOURCE)/Foundation/Framework
+ $(EDK_SOURCE)/Foundation/Framework/Include
+ $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include
+ $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include/Pcd
+ $(EDK_SOURCE)/Foundation/Include/IndustryStandard
+ $(EDK_SOURCE)/Foundation/Library/Dxe/Include
+ $(EDK_SOURCE)/Foundation/Core/Dxe
+ $(EDK_SOURCE)/Foundation/Cpu/Pentium/Include
+ $(EFI_SOURCE)/$(PROJECT_RAPID_START_ROOT)
+ $(EFI_SOURCE)/$(PROJECT_RAPID_START_ROOT)/Include
+ $(EFI_SOURCE)
+ $(PLATFORM_ECP_PACKAGE)/Include
+
+[libraries.common]
+ EdkIIGlueDxeReportStatusCodeLib
+ EdkIIGlueDxeDebugLibReportStatusCode
+ EdkFrameworkProtocolLib
+ EdkProtocolLib
+ RapidStartProtocolLib
+ EdkIIGlueUefiBootServicesTableLib
+ EdkIIGlueUefiRuntimeServicesTableLib
+ PlatformPolicyUpdateDxeLib
+
+[nmake.common]
+ IMAGE_ENTRY_POINT = _ModuleEntryPoint
+ DPX_SOURCE = RapidStartDxePolicyInit.dxs
+
+#
+# Module Entry Point
+#
+ C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_MODULE_ENTRY_POINT__=RapidStartDxePolicyInitEntryPoint
+ C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \
+ -D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ -D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \
+ -D __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__
+
diff --git a/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.mak b/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.mak
new file mode 100644
index 0000000..484a1eb
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.mak
@@ -0,0 +1,165 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxePolicyInit/RapidStartDxePolicyInit.mak 5 6/21/13 6:01a Joshchou $
+#
+# $Revision: 5 $
+#
+# $Date: 6/21/13 6:01a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxePolicyInit/RapidStartDxePolicyInit.mak $
+#
+# 5 6/21/13 6:01a Joshchou
+# [TAG] EIP126792
+# [Category] Bug Fix
+# [Severity] Minor
+# [Symptom] Can't do AMI capsule when Intel Rapid Start eanble
+# [RootCause] CMOS RapidStartFlag does not clear.
+# [Solution] Clear RapidStartFlag when cold boot.
+#
+# 4 1/13/13 7:47a Bensonlai
+# [TAG] EIPNone
+# [Category] Improvement
+# [Description] Disabling the RapidStart while STAT mode in the IDE
+# mode
+# [Files] RapidStartDxePolicyInit.c, RapidStartDxePolicyInit.h,
+# RapidStartDxePolicyInit.mak, RapidStartSetup.c, RapidStartSetup.mak,
+# RapidStartSetup.sd, RapidStartSetup.sdl
+#
+# 3 12/07/12 1:17a Bensonlai
+# [TAG] None
+# [Category] Bug Fix
+# [Severity] Normal
+# [Symptom] When installed memory size less than HDD partition size of
+# teh RapidStart, it still can work.
+# [RootCause] The RAPID_START_PERSISTENT_DATA wasn't updated in the
+# BdsAllDriversConnectedCallback().
+# [Solution] Get the real total size of memory directly.
+# [Files] RapidStartDxePolicyInit.c, RapidStartDxePolicyInit.h,
+# RapidStartDxePolicyInit.mak
+#
+# 2 11/15/12 12:38a Bensonlai
+# [TAG] None
+# [Category] Improvement
+# [Description] Move the RAPID_START_PARTITION_DETECT_BEFORE_SETUP to
+# RapidStartDxePolicyInit.c.
+#
+# 1 10/15/12 4:40a Bensonlai
+# [TAG] None
+# [Category] Improvement
+# [Description] [Category] Improvement
+# [Severity] Important
+# [Description] Rename all IFFS sting to Rapid Start.
+# [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+#
+# [Category] Improvement
+# [Severity] Important
+# [Description] Implementation of the LOCK_DISABLE_RAPID_START_IF_NO_SSD
+# using EDKII.
+# [Files] Board\EM\RapidStartWrapper\Dxe\RapidStartDxePolicyInit\*.*
+# [Files] RapidStartDxePolicyInit.cif
+# RapidStartDxePolicyInit.sdl
+# RapidStartDxePolicyInit.mak
+# RapidStartDxePolicyInit.h
+# RapidStartDxePolicyInit.c
+# RapidStartDxePolicyInit.dxs
+# RapidStartDxePolicyInit.inf
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RapidStartDxePolicyInit.mak
+#
+# Description: Component description file for the RapidStartDxePolicyInit DXE driver.
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+All : RapidStartDxePolicyInit
+
+RapidStartDxePolicyInit : $(BUILD_DIR)\RapidStartDxePolicyInit.mak RapidStartDxePolicyInitBin
+
+$(BUILD_DIR)\RapidStartDxePolicyInit.mak : $(RapidStartDxePolicyInit_DIR)\$(@B).cif $(RapidStartDxePolicyInit_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(RapidStartDxePolicyInit_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+RapidStartDxePolicyInit_INCLUDES=\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(EDK_INCLUDES)\
+ $(RAPIDSTART_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+ $(INTEL_MCH_INCLUDES)\
+
+RapidStartDxePolicyInit_LIBS=\
+ $(EDKPROTOCOLLIB)\
+ $(EFIGUIDLIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EDKFRAMEWORKGUIDLIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGlueBaseMemoryLib_LIB)\
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeServicesTableLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueUefiBootServicesTableLib_LIB)\
+ $(EdkIIGlueBasePciLibPciExpress_LIB)\
+ $(EdkIIGlueEdkDxeRuntimeDriverLib_LIB)\
+ $(RapidStartProtocolLib_LIB)\
+ $(RapidStartDxeLib_LIB)\
+ $(PchPlatformDxeLib_LIB)\
+ $(RapidStartCommonDxeLib_LIB)\
+
+RapidStartDxePolicyInit_DEFINES=\
+ $(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=RapidStartDxePolicyInitEntryPoint"\
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_DXE_SERVICES_TABLE_LIB__ \
+
+RapidStartDxePolicyInitBin : $(RapidStartDxePolicyInit_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\RapidStartDxePolicyInit.mak all\
+ "MY_INCLUDES=$(RapidStartDxePolicyInit_INCLUDES)"\
+ "MY_DEFINES=$(RapidStartDxePolicyInit_DEFINES)"\
+ GUID=DDB412A6-E3F3-4e9e-90A3-2A991270219C\
+ ENTRY_POINT=_ModuleEntryPoint \
+ EDKIIModule=DXEDRIVER\
+ TYPE=BS_DRIVER \
+ DEPEX1=$(RapidStartDxePolicyInit_DIR)\RapidStartDxePolicyInit.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ COMPRESS=1\
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.sdl b/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.sdl
new file mode 100644
index 0000000..c895fdc
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Dxe/RapidStartDxePolicyInit/RapidStartDxePolicyInit.sdl
@@ -0,0 +1,94 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxePolicyInit/RapidStartDxePolicyInit.sdl 1 10/15/12 4:40a Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 10/15/12 4:40a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxePolicyInit/RapidStartDxePolicyInit.sdl $
+#
+# 1 10/15/12 4:40a Bensonlai
+# [TAG] None
+# [Category] Improvement
+# [Description] [Category] Improvement
+# [Severity] Important
+# [Description] Rename all IFFS sting to Rapid Start.
+# [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+#
+# [Category] Improvement
+# [Severity] Important
+# [Description] Implementation of the LOCK_DISABLE_RAPID_START_IF_NO_SSD
+# using EDKII.
+# [Files] Board\EM\RapidStartWrapper\Dxe\RapidStartDxePolicyInit\*.*
+# [Files] RapidStartDxePolicyInit.cif
+# RapidStartDxePolicyInit.sdl
+# RapidStartDxePolicyInit.mak
+# RapidStartDxePolicyInit.h
+# RapidStartDxePolicyInit.c
+# RapidStartDxePolicyInit.dxs
+# RapidStartDxePolicyInit.inf
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RapidStartDxePolicyInit.sdl
+#
+# Description: SDL file for the RapidStartDxePolicyInit.
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "RapidStartDxePolicyInit_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable RapidStartDxePolicyInit support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "RapidStartDxePolicyInit_DIR"
+End
+
+MODULE
+ File = "RapidStartDxePolicyInit.mak"
+ Help = "Includes RapidStartDxePolicyInit.mak to Project"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\RapidStartDxePolicyInit.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/RapidStartWrapper/Include/Mbr.h b/Board/EM/RapidStartWrapper/Include/Mbr.h
new file mode 100644
index 0000000..5a04738
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Include/Mbr.h
@@ -0,0 +1,72 @@
+/** @file
+ EFI Mbr Partition Generic Driver Header. This header contains Data structures and Definitions
+ needed to recognize partitions in a MBR
+
+@copyright
+ Copyright (c) 2006 - 2012 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+**/
+#ifndef _MBR_H
+#define _MBR_H
+
+#define MBR_SIGNATURE 0xAA55
+#define NUM_MBR_PARTITIONS 4
+
+///
+/// Type definitions for the Hard drive device path
+///
+#define MBR_TYPE_MASTER_BOOT_RECORD 0x01
+#define MBR_TYPE_EFI_PARTITION_TABLE_HEADER 0x02
+
+///
+/// Needed Partition Type definitions for MBR
+///
+#define NO_PARTITION 0x0
+#define EXTENDED_PARTITION 0x05
+#define WIN95_EXTENDED_PARTITION 0x0F
+
+//
+// Data Structures needed for MBR
+//
+#pragma pack(1)
+
+///
+/// Data Structure definition for each partition in the MBR
+///
+typedef struct _MBR_PARTITION {
+ UINT8 BootIndicator;
+ UINT8 StartHead;
+ UINT8 StartSector;
+ UINT8 StartTrack;
+ UINT8 OSType;
+ UINT8 EndHead;
+ UINT8 EndSector;
+ UINT8 EndTrack;
+ UINT32 StartingLba;
+ UINT32 SizeInLba;
+} MBR_PARTITION;
+
+///
+/// Data Structure definition of the MBR located in the first block on an MBR drive
+///
+typedef struct _MASTER_BOOT_RECORD {
+ UINT8 BootCode[440];
+ UINT32 UniqueMbrSig;
+ UINT16 Unknown;
+ MBR_PARTITION PartRec[4];
+ UINT16 Sig;
+} MASTER_BOOT_RECORD;
+
+#pragma pack()
+#endif
diff --git a/Board/EM/RapidStartWrapper/Include/UefiGpt.h b/Board/EM/RapidStartWrapper/Include/UefiGpt.h
new file mode 100644
index 0000000..1ba0cf0
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Include/UefiGpt.h
@@ -0,0 +1,145 @@
+/** @file
+ EFI Guid Partition Table Format Definition.
+
+@copyright
+ Copyright (c) 2006 - 2012 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+**/
+
+#ifndef __UEFI_GPT_H__
+#define __UEFI_GPT_H__
+
+///
+/// The primary GUID Partition Table Header must be
+/// located in LBA 1 (i.e., the second logical block).
+///
+#define PRIMARY_PART_HEADER_LBA 1
+///
+/// EFI Partition Table Signature: "EFI PART".
+///
+#define EFI_PTAB_HEADER_ID SIGNATURE_64 ('E','F','I',' ','P','A','R','T')
+
+#pragma pack(1)
+
+///
+/// GPT Partition Table Header.
+///
+typedef struct {
+ ///
+ /// The table header for the GPT partition Table.
+ /// This header contains EFI_PTAB_HEADER_ID.
+ ///
+ EFI_TABLE_HEADER Header;
+ ///
+ /// The LBA that contains this data structure.
+ ///
+ EFI_LBA MyLBA;
+ ///
+ /// LBA address of the alternate GUID Partition Table Header.
+ ///
+ EFI_LBA AlternateLBA;
+ ///
+ /// The first usable logical block that may be used
+ /// by a partition described by a GUID Partition Entry.
+ ///
+ EFI_LBA FirstUsableLBA;
+ ///
+ /// The last usable logical block that may be used
+ /// by a partition described by a GUID Partition Entry.
+ ///
+ EFI_LBA LastUsableLBA;
+ ///
+ /// GUID that can be used to uniquely identify the disk.
+ ///
+ EFI_GUID DiskGUID;
+ ///
+ /// The starting LBA of the GUID Partition Entry array.
+ ///
+ EFI_LBA PartitionEntryLBA;
+ ///
+ /// The number of Partition Entries in the GUID Partition Entry array.
+ ///
+ UINT32 NumberOfPartitionEntries;
+ ///
+ /// The size, in bytes, of each the GUID Partition
+ /// Entry structures in the GUID Partition Entry
+ /// array. This field shall be set to a value of 128 x 2^n where n is
+ /// an integer greater than or equal to zero (e.g., 128, 256, 512, etc.).
+ ///
+ UINT32 SizeOfPartitionEntry;
+ ///
+ /// The CRC32 of the GUID Partition Entry array.
+ /// Starts at PartitionEntryLBA and is
+ /// computed over a byte length of
+ /// NumberOfPartitionEntries * SizeOfPartitionEntry.
+ ///
+ UINT32 PartitionEntryArrayCRC32;
+} EFI_PARTITION_TABLE_HEADER;
+
+///
+/// GPT Partition Entry.
+///
+typedef struct {
+ ///
+ /// Unique ID that defines the purpose and type of this Partition. A value of
+ /// zero defines that this partition entry is not being used.
+ ///
+ EFI_GUID PartitionTypeGUID;
+ ///
+ /// GUID that is unique for every partition entry. Every partition ever
+ /// created will have a unique GUID.
+ /// This GUID must be assigned when the GUID Partition Entry is created.
+ ///
+ EFI_GUID UniquePartitionGUID;
+ ///
+ /// Starting LBA of the partition defined by this entry
+ ///
+ EFI_LBA StartingLBA;
+ ///
+ /// Ending LBA of the partition defined by this entry.
+ ///
+ EFI_LBA EndingLBA;
+ ///
+ /// Attribute bits, all bits reserved by UEFI
+ /// Bit 0: If this bit is set, the partition is required for the platform to function. The owner/creator of the
+ /// partition indicates that deletion or modification of the contents can result in loss of platform
+ /// features or failure for the platform to boot or operate. The system cannot function normally if
+ /// this partition is removed, and it should be considered part of the hardware of the system.
+ /// Actions such as running diagnostics, system recovery, or even OS install or boot, could
+ /// potentially stop working if this partition is removed. Unless OS software or firmware
+ /// recognizes this partition, it should never be removed or modified as the UEFI firmware or
+ /// platform hardware may become non-functional.
+ /// Bit 1: If this bit is set, then firmware must not produce an EFI_BLOCK_IO_PROTOCOL device for
+ /// this partition. By not producing an EFI_BLOCK_IO_PROTOCOL partition, file system
+ /// mappings will not be created for this partition in UEFI.
+ /// Bit 2: This bit is set aside to let systems with traditional PC-AT BIOS firmware implementations
+ /// inform certain limited, special-purpose software running on these systems that a GPT
+ /// partition may be bootable. The UEFI boot manager must ignore this bit when selecting
+ /// a UEFI-compliant application, e.g., an OS loader.
+ /// Bits 3-47: Undefined and must be zero. Reserved for expansion by future versions of the UEFI
+ /// specification.
+ /// Bits 48-63: Reserved for GUID specific use. The use of these bits will vary depending on the
+ /// PartitionTypeGUID. Only the owner of the PartitionTypeGUID is allowed
+ /// to modify these bits. They must be preserved if Bits 0-47 are modified..
+ ///
+ UINT64 Attributes;
+ ///
+ /// Null-terminated name of the partition.
+ ///
+ CHAR16 PartitionName[36];
+} EFI_PARTITION_ENTRY;
+
+#pragma pack()
+#endif
+
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.c b/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.c
new file mode 100644
index 0000000..666f3a7
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.c
@@ -0,0 +1,916 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartCommonLib/RapidStartCommonLib.c 2 11/20/12 2:46a Bensonlai $
+//
+// $Revision: 2 $
+//
+// $Date: 11/20/12 2:46a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartCommonLib/RapidStartCommonLib.c $
+//
+// 2 11/20/12 2:46a Bensonlai
+// [TAG] EIP107013
+// [Category] Improvement
+// [Description] Update Shark Bay Rapid Start Reference Code Version
+// 0.8.0.0
+// [Files] RapidStartCommonLib.sdl
+// RapidStartCommonLib.mak
+// RapidStartCommonLib.c
+// RapidStartCommonLib.h
+// RapidStartCommonLib.inf
+// RapidStartCommonLib.cif
+//
+// 1 10/15/12 4:40a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] [Category] Improvement
+// [Severity] Important
+// [Description] Rename all IFFS sting to Rapid Start.
+// [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+// [Files] RapidStartCommonLib.cif
+// RapidStartCommonLib.sdl
+// RapidStartCommonLib.mak
+// RapidStartCommonLib.c
+// RapidStartCommonLib.h
+// RapidStartCommonLib.inf
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartCommonLib.c
+//
+// Description: RapidStart Common code library.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueBase.h"
+#include "EfiCommon.h"
+#include <PchRegs.h>
+#include "RapidStartCommonLib.h"
+#include "PchPlatformLib.h"
+#endif
+#define R_PCH_RTC_INDEX_ALT 0x74
+#define R_PCH_RTC_TARGET_ALT 0x75
+#define R_PCH_RTC_EXT_INDEX_ALT 0x76
+#define R_PCH_RTC_EXT_TARGET_ALT 0x77
+
+#define R_PCH_RTC_REGC 0x0C
+#define B_PCH_RTC_REGC_AF 0x20
+
+#define RTC_INDEX_MASK 0x7F
+#define RTC_BANK_SIZE 0x80
+
+#define R_PCH_RTC_SECOND 0x00
+#define R_PCH_RTC_ALARM_SECOND 0x01
+#define R_PCH_RTC_MINUTE 0x02
+#define R_PCH_RTC_ALARM_MINUTE 0x03
+#define R_PCH_RTC_HOUR 0x04
+#define R_PCH_RTC_ALARM_HOUR 0x05
+#define R_PCH_RTC_DAY_OF_WEEK 0x06
+#define R_PCH_RTC_DAY_OF_MONTH 0x07
+#define R_PCH_RTC_MONTH 0x08
+#define R_PCH_RTC_YEAR 0x09
+
+///
+/// Non-volatile RapidStart flag must be kept within locked CMOS range
+/// to prevent triggering RapidStart resume by manipulating CMOS in OS runtime,
+/// and mitigate attacks on SMRAM image content.
+///
+#ifndef FFS_NV_FLAG_REG
+#define FFS_NV_FLAG_REG 0x88
+#endif
+///
+/// Some runtime configuration settings (e.g. enabled wake events must be
+/// available to determine RapidStart transition before memory is initialized.
+/// This CMOS register is used to store these settings, thus must be
+/// within unlocked range.
+///
+#ifndef FFS_NV_CONFIG_REG
+#define FFS_NV_CONFIG_REG 0x47
+#endif
+///
+/// Defines for KSC common code
+/// Timeout if KSC command/data fails
+///
+#define KSC_TIME_OUT 0x20000
+#define KSC_WAIT_PERIOD 15
+///
+/// The Keyboard and System management Controller (KSC) implements a standard 8042 keyboard
+/// controller interface at ports 0x60/0x64 and a ACPI compliant system management controller
+/// at ports 0x62/0x66. Port 0x66 is the command and status port, port 0x62 is the data port.
+///
+#define KSC_D_PORT 0x62
+#define KSC_C_PORT 0x66
+
+//
+// Status Port 0x62
+//
+#define KSC_S_OVR_TMP 0x80 ///< Current CPU temperature exceeds the threshold
+#define KSC_S_SMI_EVT 0x40 ///< SMI event is pending
+#define KSC_S_SCI_EVT 0x20 ///< SCI event is pending
+#define KSC_S_BURST 0x10 ///< KSC is in burst mode or normal mode
+#define KSC_S_CMD 0x08 ///< Byte in data register is command/data
+#define KSC_S_IGN 0x04 ///< Ignored
+#define KSC_S_IBF 0x02 ///< Input buffer is full/empty
+#define KSC_S_OBF 0x01 ///< Output buffer is full/empty
+#define KSC_CMD_SET_CRITICAL_BATTERY_WAKE_THRESHOLD 0x34
+#define DISABLE_CRITICAL_BATTERY_WAKE 0
+#define MINIMAL_CRITICAL_BATTERY_WAKE_THRESHOLD 15
+#define KSC_CMD_GET_WAKE_STATUS 0x35
+#define KSC_WAKE_STATUS_CRITICAL_BATTERY 1
+#define KSC_CMD_CLEAR_WAKE_STATUS 0x36
+
+/**
+ Read specific RTC/CMOS RAM
+
+ @param[in] Location Point to RTC/CMOS RAM offset for read
+
+ @retval The data of specific location in RTC/CMOS RAM.
+**/
+UINT8
+RtcRead (
+ IN UINT8 Location
+ )
+{
+ UINT8 RtcIndexPort;
+ UINT8 RtcDataPort;
+
+ ///
+ /// CMOS access registers (using alternative access not to handle NMI bit)
+ ///
+ if (Location < RTC_BANK_SIZE) {
+ ///
+ /// First bank
+ ///
+ RtcIndexPort = R_PCH_RTC_INDEX_ALT;
+ RtcDataPort = R_PCH_RTC_TARGET_ALT;
+ } else {
+ ///
+ /// Second bank
+ ///
+ RtcIndexPort = R_PCH_RTC_EXT_INDEX_ALT;
+ RtcDataPort = R_PCH_RTC_EXT_TARGET_ALT;
+ }
+
+ IoWrite8 (RtcIndexPort, Location & RTC_INDEX_MASK);
+ return IoRead8 (RtcDataPort);
+}
+
+/**
+ Write specific RTC/CMOS RAM
+
+ @param[in] Location Point to RTC/CMOS RAM offset for write
+ @param[in] Value The data that will be written to RTC/CMOS RAM
+**/
+VOID
+RtcWrite (
+ IN UINT8 Location,
+ IN UINT8 Value
+ )
+{
+ UINT8 RtcIndexPort;
+ UINT8 RtcDataPort;
+
+ ///
+ /// CMOS access registers (using alternative access not to handle NMI bit)
+ ///
+ if (Location < RTC_BANK_SIZE) {
+ ///
+ /// First bank
+ ///
+ RtcIndexPort = R_PCH_RTC_INDEX_ALT;
+ RtcDataPort = R_PCH_RTC_TARGET_ALT;
+ } else {
+ ///
+ /// Second bank
+ ///
+ RtcIndexPort = R_PCH_RTC_EXT_INDEX_ALT;
+ RtcDataPort = R_PCH_RTC_EXT_TARGET_ALT;
+ }
+
+ IoWrite8 (RtcIndexPort, Location & RTC_INDEX_MASK);
+ IoWrite8 (RtcDataPort, Value);
+}
+
+/**
+ Read word from specific RTC/CMOS RAM
+
+ @param[in] Location Point to RTC/CMOS RAM offset for read
+
+ @retval The data of specific location in RTC/CMOS RAM.
+**/
+UINT16
+RtcRead16 (
+ IN UINT8 Location
+ )
+{
+ return RtcRead (Location) | (RtcRead (Location + 1) << 8);
+}
+
+/**
+ Write word to specific RTC/CMOS RAM
+
+ @param[in] Location Point to RTC/CMOS RAM offset for write
+ @param[in] Value The data that will be written to RTC/CMOS RAM
+**/
+VOID
+RtcWrite16 (
+ IN UINT8 Location,
+ IN UINT16 Value
+ )
+{
+ RtcWrite (Location, (UINT8) Value);
+ RtcWrite (Location + 1, (UINT8) (Value >> 8));
+}
+
+/**
+ Initialize RTC Timer
+**/
+VOID
+RtcInit (
+ VOID
+ )
+{
+ UINT8 RegB;
+ RegB = RtcRead (R_PCH_RTC_REGB);
+ RegB |= B_PCH_RTC_REGB_HOURFORM;
+ RegB &= ~B_PCH_RTC_REGB_DM;
+ RtcWrite (R_PCH_RTC_REGB, RegB);
+}
+
+/**
+ Wait for updating RTC process finished.
+**/
+STATIC
+VOID
+RtcWaitEndOfUpdate (
+ VOID
+ )
+{
+ while (RtcRead (R_PCH_RTC_REGA) & B_PCH_RTC_REGA_UIP) {
+ }
+}
+
+/**
+ Get current RTC time
+
+ @param[out] tm RTC time structure including Second, Minute and Hour.
+
+ @retval EFI_SUCCESS Operation successfully and RTC_TIME structure contained current time.
+**/
+EFI_STATUS
+RtcGetTime (
+ OUT RTC_TIME *tm
+ )
+{
+ ASSERT (tm != NULL);
+ RtcWaitEndOfUpdate ();
+ tm->Second = BcdToDecimal8 (RtcRead (R_PCH_RTC_SECOND));
+ tm->Minute = BcdToDecimal8 (RtcRead (R_PCH_RTC_MINUTE));
+ tm->Hour = BcdToDecimal8 (RtcRead (R_PCH_RTC_HOUR));
+ tm->Date = BcdToDecimal8 (RtcRead (R_PCH_RTC_DAY_OF_MONTH));
+ tm->Month = BcdToDecimal8 (RtcRead (R_PCH_RTC_MONTH));
+ tm->Year = (UINT16) BcdToDecimal8 (RtcRead (R_PCH_RTC_YEAR)) + 2000;
+ return EFI_SUCCESS;
+}
+
+/**
+ Check if RTC Alarm has been enabled.
+
+ @retval TRUE RTC Alarm is enabled
+ @retval FALSE RTC Alarm is not enabled
+**/
+BOOLEAN
+RtcIsAlarmEnabled (
+ VOID
+ )
+{
+ return (RtcRead (R_PCH_RTC_REGB) & B_PCH_RTC_REGB_AIE) != 0;
+}
+
+/**
+ Get current RTC Alarm time.
+
+ @param[out] tm A structure which will be updated with current RTC Alarm time
+
+ @retval EFI_NOT_STARTED RTC Alarm has not been enabled yet.
+ @retval EFI_SUCCESS RTC Alarm enabled and RTC_TIME structure contain current Alarm time setting.
+**/
+EFI_STATUS
+RtcGetAlarm (
+ OUT RTC_TIME *tm
+ )
+{
+ ASSERT (tm != NULL);
+ if (!RtcIsAlarmEnabled ()) {
+ return EFI_NOT_STARTED;
+ }
+
+ RtcWaitEndOfUpdate ();
+ tm->Second = BcdToDecimal8 (RtcRead (R_PCH_RTC_ALARM_SECOND));
+ tm->Minute = BcdToDecimal8 (RtcRead (R_PCH_RTC_ALARM_MINUTE));
+ tm->Hour = BcdToDecimal8 (RtcRead (R_PCH_RTC_ALARM_HOUR));
+ tm->Date = BcdToDecimal8 (RtcRead (R_PCH_RTC_REGD) & 0x3F);
+ tm->Month = 0;
+ tm->Year = 0;
+ return EFI_SUCCESS;
+}
+
+/**
+ Set RTC Alarm with specific time
+
+ @param[in] tm A time interval structure which will be used to setup an RTC Alarm
+
+ @retval EFI_SUCCESS RTC Alarm has been enabled with specific time interval
+**/
+EFI_STATUS
+RtcSetAlarm (
+ IN RTC_TIME *tm
+ )
+{
+ UINT8 RegB;
+
+ ASSERT (tm != NULL);
+
+ RegB = RtcRead (R_PCH_RTC_REGB);
+
+ RtcWaitEndOfUpdate ();
+
+ ///
+ /// Inhibit update cycle
+ ///
+ RtcWrite (R_PCH_RTC_REGB, RegB | B_PCH_RTC_REGB_SET);
+
+ RtcWrite (R_PCH_RTC_ALARM_SECOND, DecimalToBcd8 (tm->Second));
+ RtcWrite (R_PCH_RTC_ALARM_MINUTE, DecimalToBcd8 (tm->Minute));
+ RtcWrite (R_PCH_RTC_ALARM_HOUR, DecimalToBcd8 (tm->Hour));
+ RtcWrite (R_PCH_RTC_REGD, DecimalToBcd8 (tm->Date));
+
+ ///
+ /// Allow update cycle and enable wake alarm
+ ///
+ RegB &= ~B_PCH_RTC_REGB_SET;
+ RtcWrite (R_PCH_RTC_REGB, RegB | B_PCH_RTC_REGB_AIE);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Check if CRB KSC controller present or not.
+
+ @retval EFI_SUCCESS - CRB KSC present.
+ @retval EFI_DEVICE_ERROR - CRB KSC not present.
+**/
+STATIC
+EFI_STATUS
+CheckKscPresence (
+ VOID
+ )
+{
+ if (IoRead8 (KSC_C_PORT) == 0xff) {
+ return EFI_DEVICE_ERROR;
+ } else {
+ return EFI_SUCCESS;
+ }
+}
+
+/**
+ Receives status from Keyboard System Controller.
+
+ @param[in] KscStatus - Status byte to receive
+
+ @retval EFI_SUCCESS - Always success
+ @retval EFI_DEVICE_ERROR - KSC not present
+**/
+STATIC
+EFI_STATUS
+ReceiveKscStatus (
+ UINT8 *KscStatus
+ )
+{
+ ///
+ /// Verify if KscLib has been initialized, NOT if EC dose not exist.
+ ///
+ if (CheckKscPresence () != EFI_SUCCESS) {
+ return EFI_DEVICE_ERROR;
+ }
+ ///
+ /// Read and return the status
+ ///
+ *KscStatus = IoRead8 (KSC_C_PORT);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Sends command to Keyboard System Controller.
+
+ @param[in] Command - Command byte to send
+
+ @retval EFI_SUCCESS - Command success
+ @retval EFI_DEVICE_ERROR - Command error
+**/
+STATIC
+EFI_STATUS
+SendKscCommand (
+ UINT8 Command
+ )
+{
+ UINTN Index;
+ UINT8 KscStatus;
+
+ KscStatus = 0;
+ ///
+ /// Verify if KscLib has been initialized, NOT if EC dose not exist.
+ ///
+ if (CheckKscPresence () != EFI_SUCCESS) {
+ return EFI_DEVICE_ERROR;
+ }
+
+ Index = 0;
+
+ ///
+ /// Wait for KSC to be ready (with a timeout)
+ ///
+ ReceiveKscStatus (&KscStatus);
+ while (((KscStatus & KSC_S_IBF) != 0) && (Index < KSC_TIME_OUT)) {
+ PchPmTimerStall (KSC_WAIT_PERIOD);
+ ReceiveKscStatus (&KscStatus);
+ Index++;
+ }
+
+ if (Index >= KSC_TIME_OUT) {
+ return EFI_DEVICE_ERROR;
+ }
+ ///
+ /// Send the KSC command
+ ///
+ IoWrite8 (KSC_C_PORT, Command);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Sends data to Keyboard System Controller.
+
+ @param[in] Data - Data byte to send
+
+ @retval EFI_SUCCESS - Success
+ @retval EFI_DEVICE_ERROR - Error
+**/
+STATIC
+EFI_STATUS
+SendKscData (
+ UINT8 Data
+ )
+{
+ UINTN Index;
+ UINT8 KscStatus;
+
+ ///
+ /// Verify if KscLib has been initialized, NOT if EC dose not exist.
+ ///
+ if (CheckKscPresence () != EFI_SUCCESS) {
+ return EFI_DEVICE_ERROR;
+ }
+
+ Index = 0;
+
+ ///
+ /// Wait for KSC to be ready (with a timeout)
+ ///
+ ReceiveKscStatus (&KscStatus);
+ while (((KscStatus & KSC_S_IBF) != 0) && (Index < KSC_TIME_OUT)) {
+ PchPmTimerStall (KSC_WAIT_PERIOD);
+ ReceiveKscStatus (&KscStatus);
+ Index++;
+ }
+
+ if (Index >= KSC_TIME_OUT) {
+ return EFI_DEVICE_ERROR;
+ }
+ ///
+ /// Send the data and return
+ ///
+ IoWrite8 (KSC_D_PORT, Data);
+ return EFI_SUCCESS;
+}
+
+/**
+ Receives data from Keyboard System Controller.
+
+ @param[in] Data - Data byte received
+
+ @retval EFI_SUCCESS - Read success
+ @retval EFI_DEVICE_ERROR - Read error
+**/
+STATIC
+EFI_STATUS
+ReceiveKscData (
+ UINT8 *Data
+ )
+{
+ UINTN Index;
+ UINT8 KscStatus;
+
+ ///
+ /// Verify if KscLib has been initialized, NOT if EC dose not exist.
+ ///
+ if (CheckKscPresence () != EFI_SUCCESS) {
+ return EFI_DEVICE_ERROR;
+ }
+
+ Index = 0;
+
+ ///
+ /// Wait for KSC to be ready (with a timeout)
+ ///
+ ReceiveKscStatus (&KscStatus);
+ while (((KscStatus & KSC_S_OBF) == 0) && (Index < KSC_TIME_OUT)) {
+ PchPmTimerStall (KSC_WAIT_PERIOD);
+ ReceiveKscStatus (&KscStatus);
+ Index++;
+ }
+
+ if (Index >= KSC_TIME_OUT) {
+ return EFI_DEVICE_ERROR;
+ }
+ ///
+ /// Read KSC data and return
+ ///
+ *Data = IoRead8 (KSC_D_PORT);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Enable or disable critical battery wakeup event.
+
+ @param[in] Enabled - Enable or disable Critical Battery wakeup event.
+**/
+VOID
+RapidStartInitializeCriticalBatteryWakeupEvent (
+ IN BOOLEAN Enabled
+ )
+{
+ UINT8 Threshold;
+ ///
+ /// If platform doesn't have KSC controller, skip all KSC commands.
+ ///
+ if (CheckKscPresence () != EFI_SUCCESS) {
+ return ;
+ }
+ ///
+ /// This function can be modified to always enable critical battery event if platform design required.
+ /// If platform code already handled critical battery wakeup event, refer to spec and ensure required
+ /// Minimal battery capacity threshold implemented for RapidStart Entry transition.
+ ///
+ if (Enabled == FALSE) {
+ ///
+ /// Disable critical battery wake event.
+ ///
+ Threshold = DISABLE_CRITICAL_BATTERY_WAKE;
+ } else {
+ //
+ // Enable critical battery wake event.
+ //
+ Threshold = RtcRead (FFS_CBTH_DATA_REG);
+ }
+
+ SendKscCommand (KSC_CMD_SET_CRITICAL_BATTERY_WAKE_THRESHOLD);
+ SendKscData (Threshold);
+}
+
+/**
+ Check if current wakeup is because of critical low battery.
+
+ @retval TRUE - Current wakeup source is critical low battery event.
+ @retval FALSE - The wakeup source is not critical low battery event.
+**/
+BOOLEAN
+RapidStartCheckCriticalBatteryWakeupEvent (
+ VOID
+ )
+{
+ UINT8 WakeStatus;
+
+ ///
+ /// If platform doesn't have KSC controller, return FALSE
+ ///
+ if (CheckKscPresence () != EFI_SUCCESS) {
+ return FALSE;
+ }
+
+ SendKscCommand (KSC_CMD_GET_WAKE_STATUS);
+ ///
+ /// if get wake status failed, return false
+ ///
+ if (ReceiveKscData (&WakeStatus) != EFI_SUCCESS) {
+ return FALSE;
+ }
+
+ if (WakeStatus & KSC_WAKE_STATUS_CRITICAL_BATTERY) {
+ return TRUE;
+ } else {
+ return FALSE;
+ }
+}
+
+/**
+ Clear all wakeup status.
+**/
+VOID
+RapidStartClearAllKscWakeStatus (
+ VOID
+ )
+{
+ ///
+ /// If platform doesn't have KSC controller, skip all KSC commands.
+ ///
+ if (CheckKscPresence () != EFI_SUCCESS) {
+ return ;
+ }
+
+ SendKscCommand (KSC_CMD_CLEAR_WAKE_STATUS);
+}
+
+#ifdef RAPID_START_WHOLE_MEMORY_CHECK
+/**
+ Calculate CRC32 value for inputed data
+
+ @param[in] Data - data to calc on CRC
+ @param[in] DataSize - data size
+ @param[in] Crc32 - crc value.
+ @param[in] RapidStartData - A data buffer stored RapidStart internal non-volatile information.
+ @param[in] CrcTable - The base CRC table
+
+ @retval EFI_INVALID_PARAMETER inputed parameters are invalid
+ @retval EFI_SUCCESS Process successfully and CRC value has been passed by Crc32 parameter.
+**/
+EFI_STATUS
+RapidStartCalculateCrc32 (
+ IN UINT8 *Data,
+ IN UINT32 DataSize,
+ IN UINT32 *Crc32,
+ IN RAPID_START_PERSISTENT_DATA *RapidStartData,
+ IN UINT32 *CrcTable
+ )
+{
+ UINT32 i;
+ UINT32 crc;
+
+ crc = (UINT32) -1;
+
+ if (!DataSize || !Crc32) {
+ return EFI_INVALID_PARAMETER;
+ }
+ ///
+ /// Calculate the CRC
+ ///
+ for (i = 0; i < DataSize; i++) {
+ if (((Data + i) >= (UINT8 *) (UINTN) RapidStartData->AcpiReservedMemoryBase) &&
+ ((Data + i) < (UINT8 *) (UINTN) (RapidStartData->AcpiReservedMemoryBase + RapidStartData->AcpiReservedMemorySize))
+ ) {
+ continue;
+ }
+
+ if (((Data + i) < (UINT8 *) (UINTN) RapidStartData->RapidStartMem) ||
+ ((Data + i) >= (UINT8 *) (UINTN) (RapidStartData->RapidStartMem + RapidStartData->RapidStartMemSize))
+ ) {
+ crc = (crc >> 8) ^ CrcTable[(UINT8) crc ^ ((UINT8 *) Data)[i]];
+ }
+ }
+
+ *Crc32 = ~crc;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Log CRC32 mismatched address and length
+
+ @param[in] MismatchedBaseAddress - Memory address caused mismatched CRC32
+ @param[in] MismatchedDataSize - memory length for calculating CRC32
+
+ @retval EFI_SUCCESS Process successfully
+**/
+EFI_STATUS
+LogCrc32MismatchedAddress (
+ UINTN MismatchedBaseAddress,
+ UINT32 MismatchedDataSize
+ )
+{
+ return EFI_SUCCESS;
+}
+
+/**
+ Log or compare CRC32 value for specific memory range.
+
+ @param[in] IsComparingCrc32 - FALSE to save CRC32 value into buffer. TRUE to compare CRC32 value with pre-saved value in buffer.
+ @param[in] BaseAddress - Base memory address for logging or checking CRC32
+ @param[in] EndAddress - End memory address for logging or checking CRC32
+ @param[in] RapidStartData - A data buffer stored RapidStart internal non-volatile information.
+**/
+VOID
+SaveOrCompareCrc32 (
+ IN BOOLEAN IsComparingCrc32,
+ IN UINTN BaseAddress,
+ IN UINTN EndAddress,
+ IN RAPID_START_PERSISTENT_DATA *RapidStartData
+ )
+{
+ UINT32 *Crc32Record;
+ UINT32 *Crc32RecordPointer;
+ UINT32 Crc32;
+ UINT32 DataSize;
+ volatile UINTN Crc32MismatchedAddress;
+ volatile UINT32 Crc32MismatchedSize;
+ UINT32 Crc32RecordSizeInDword;
+ UINT32 CrcTable[256];
+ UINT32 i;
+ UINT32 j;
+
+ ///
+ /// init the CRC base table
+ ///
+ for (i = 0; i < 256; i++) {
+ CrcTable[i] = i;
+ for (j = 8; j > 0; j--) {
+ CrcTable[i] = (CrcTable[i] & 1) ? (CrcTable[i] >> 1) ^ 0xedb88320 : CrcTable[i] >> 1;
+ }
+ }
+
+ Crc32Record = RAPID_START_CRC32_RECORD_PTR (RapidStartData);
+ Crc32RecordPointer = Crc32Record + (UINT32) DivU64x32 (BaseAddress, MEMORY_CRC32_GRANULARITY);
+ Crc32RecordSizeInDword = (UINT32) RShiftU64 (RapidStartData->Crc32RecordSize, 2);
+ while (BaseAddress < EndAddress) {
+ ASSERT (Crc32RecordPointer < (Crc32Record + Crc32RecordSizeInDword));
+ if ((EndAddress - BaseAddress) >= MEMORY_CRC32_GRANULARITY) {
+ DataSize = MEMORY_CRC32_GRANULARITY;
+ } else {
+ DataSize = (UINT32) (EndAddress - BaseAddress);
+ }
+ ///
+ /// indicate which address is handling
+ ///
+ IoWrite16 (0x80, (UINT16) DivU64x32 (BaseAddress, MEMORY_CRC32_GRANULARITY));
+ RapidStartCalculateCrc32 ((UINT8 *) BaseAddress, DataSize, &Crc32, RapidStartData, CrcTable);
+ if (IsComparingCrc32) {
+ ///
+ /// Send debug message and log error when mismatch data is found
+ ///
+ if (Crc32 != *(Crc32RecordPointer)) {
+ if (sizeof (BaseAddress) == 4) {
+ DEBUG ((EFI_D_ERROR, "CRC_CHECK: Address=%08X, ", BaseAddress));
+ } else {
+ DEBUG ((EFI_D_ERROR, "CRC_CHECK: Address=%010lX, ", BaseAddress));
+ }
+
+ DEBUG ((EFI_D_ERROR, "Size=%08X, ", DataSize));
+ DEBUG ((EFI_D_ERROR, "current CRC32=%08X, Expected CRC32=%08X, ", Crc32, *(Crc32RecordPointer)));
+ DEBUG ((EFI_D_ERROR, "Crc32Pointer=%08X\n", Crc32RecordPointer));
+ DEBUG ((EFI_D_ERROR, "\nFound mismatched CRC32!!\n\n"));
+ Crc32MismatchedAddress = BaseAddress;
+ Crc32MismatchedSize = DataSize;
+ LogCrc32MismatchedAddress (Crc32MismatchedAddress, Crc32MismatchedSize);
+ }
+ } else {
+ ///
+ /// Save CRC result for comparison during RapidStart exit
+ ///
+ *(Crc32RecordPointer) = Crc32;
+ }
+
+ BaseAddress += MEMORY_CRC32_GRANULARITY;
+ Crc32RecordPointer++;
+ }
+}
+
+#endif
+
+/**
+ Gets RapidStart non-volatile flag.
+
+ @param[out] Value - RapidStart non-volatile flag
+
+ @retval EFI_SUCCESS - Return the RapidStart flag in Value argument.
+**/
+EFI_STATUS
+RapidStartGetFlag (
+ OUT UINT8 *Value
+ )
+{
+ *Value = RtcRead (FFS_NV_FLAG_REG);
+ return EFI_SUCCESS;
+}
+
+/**
+ Sets RapidStart non-volatile flag.
+
+ @param[in] Value - RapidStart flag state
+
+ @retval EFI_SUCCESS - Flag is set.
+**/
+EFI_STATUS
+RapidStartSetFlag (
+ IN UINT8 Value
+ )
+{
+ RtcWrite (FFS_NV_FLAG_REG, Value);
+ return EFI_SUCCESS;
+}
+
+/**
+ Retrieves non-volatile RapidStart settings.
+
+ @param[out] Value - RapidStart non-volatile settings
+
+ @retval EFI_SUCCESS
+**/
+EFI_STATUS
+RapidStartGetConfig (
+ OUT UINT8 *Value
+ )
+{
+ *Value = RtcRead (FFS_NV_CONFIG_REG);
+ return EFI_SUCCESS;
+}
+
+/**
+ Sets non-volatile RapidStart settings.
+
+ @param[in] Value - RapidStart non-volatile settings
+
+ @retval EFI_SUCCESS
+**/
+EFI_STATUS
+RapidStartSetConfig (
+ IN UINT8 Value
+ )
+{
+ RtcWrite (FFS_NV_CONFIG_REG, Value);
+ return EFI_SUCCESS;
+}
+
+/**
+ This callback is executed at the end of RapidStart Entry events initialization. (Inside sleep SMI handler)
+
+ @param[in] TransitionStatus - Status of initialization for RapidStart Entry events.
+**/
+VOID
+AfterInitializingEntryEvent (
+ IN EFI_STATUS TransitionStatus
+ )
+{
+}
+
+/**
+ Check whether RapidStart Resume.
+
+ @retval TRUE - Rapid Start Entry flow has completed successfully
+**/
+BOOLEAN
+RapidStartResumeCheck (
+ VOID
+)
+{
+ EFI_STATUS Status;
+ BOOLEAN RapidStartFlag;
+
+ Status = RapidStartGetFlag (&RapidStartFlag);
+ if ( !EFI_ERROR (Status) && ((RapidStartFlag & RAPID_START_FLAG_ENTRY_DONE) != 0)) {
+ return TRUE;
+ }
+
+ return FALSE;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.cif b/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.cif
new file mode 100644
index 0000000..0294a74
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "RapidStartCommonLib"
+ category = ModulePart
+ LocalRoot = "Board\EM\RapidStartWrapper\Library\RapidStartCommonLib"
+ RefName = "RapidStartCommonLib"
+[files]
+"RapidStartCommonLib.sdl"
+"RapidStartCommonLib.mak"
+"RapidStartCommonLib.c"
+"RapidStartCommonLib.h"
+"RapidStartCommonLib.inf"
+<endComponent>
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.h b/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.h
new file mode 100644
index 0000000..2788e2f
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.h
@@ -0,0 +1,374 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartCommonLib/RapidStartCommonLib.h 2 11/20/12 2:46a Bensonlai $
+//
+// $Revision: 2 $
+//
+// $Date: 11/20/12 2:46a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartCommonLib/RapidStartCommonLib.h $
+//
+// 2 11/20/12 2:46a Bensonlai
+// [TAG] EIP107013
+// [Category] Improvement
+// [Description] Update Shark Bay Rapid Start Reference Code Version
+// 0.8.0.0
+// [Files] RapidStartCommonLib.sdl
+// RapidStartCommonLib.mak
+// RapidStartCommonLib.c
+// RapidStartCommonLib.h
+// RapidStartCommonLib.inf
+// RapidStartCommonLib.cif
+//
+// 1 10/15/12 4:40a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] [Category] Improvement
+// [Severity] Important
+// [Description] Rename all IFFS sting to Rapid Start.
+// [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+// [Files] RapidStartCommonLib.cif
+// RapidStartCommonLib.sdl
+// RapidStartCommonLib.mak
+// RapidStartCommonLib.c
+// RapidStartCommonLib.h
+// RapidStartCommonLib.inf
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartCommonLib.h
+//
+// Description: Defines and prototypes for the library module.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifndef _RAPID_START_LIB_H_
+#define _RAPID_START_LIB_H_
+#include <RapidStartConfig.h>
+#include <RapidStartData.h>
+
+/**
+ Read specific RTC/CMOS RAM
+
+ @param[in] Location Point to RTC/CMOS RAM offset for read
+
+ @retval The data of specific location in RTC/CMOS RAM.
+**/
+UINT8
+RtcRead (
+ IN UINT8 Location
+ );
+
+/**
+ Write specific RTC/CMOS RAM
+
+ @param[in] Location Point to RTC/CMOS RAM offset for write
+ @param[in] Value The data that will be written to RTC/CMOS RAM
+**/
+VOID
+RtcWrite (
+ IN UINT8 Location,
+ IN UINT8 Value
+ );
+
+/**
+ Read word from specific RTC/CMOS RAM
+
+ @param[in] Location Point to RTC/CMOS RAM offset for read
+
+ @retval The data of specific location in RTC/CMOS RAM.
+**/
+UINT16
+RtcRead16 (
+ IN UINT8 Location
+ );
+
+/**
+ Write word to specific RTC/CMOS RAM
+
+ @param[in] Location Point to RTC/CMOS RAM offset for write
+ @param[in] Value The data that will be written to RTC/CMOS RAM
+**/
+VOID
+RtcWrite16 (
+ IN UINT8 Location,
+ IN UINT16 Value
+ );
+
+/**
+ Initialize RTC Timer
+**/
+VOID
+RtcInit (
+ VOID
+ );
+
+/**
+ Get current RTC time
+
+ @param[out] tm RTC time structure including Second, Minute and Hour.
+
+ @retval EFI_SUCCESS Operation successfully and RTC_TIME structure contained current time.
+**/
+EFI_STATUS
+RtcGetTime (
+ OUT RTC_TIME *tm
+ );
+
+/**
+ Check if RTC Alarm has been enabled.
+
+ @retval TRUE RTC Alarm is enabled
+ @retval FALSE RTC Alarm is not enabled
+**/
+BOOLEAN
+RtcIsAlarmEnabled (
+ VOID
+ );
+
+/**
+ Get current RTC Alarm time.
+
+ @param[out] tm A structure which will be updated with current RTC Alarm time
+
+ @retval EFI_NOT_STARTED RTC Alarm has not been enabled yet.
+ @retval EFI_SUCCESS RTC Alarm enabled and RTC_TIME structure contain current Alarm time setting.
+**/
+EFI_STATUS
+RtcGetAlarm (
+ OUT RTC_TIME *tm
+ );
+
+/**
+ Set RTC Alarm with specific time
+
+ @param[in] tm A time interval structure which will be used to setup an RTC Alarm
+
+ @retval EFI_SUCCESS RTC Alarm has been enabled with specific time interval
+**/
+EFI_STATUS
+RtcSetAlarm (
+ IN RTC_TIME *tm
+ );
+
+/**
+ Enable or disable critical battery wakeup event.
+
+ This function enables/disables critical battery wakeup event on KSC controller.
+ This KSC specific command will not be sent if KSC not present. Porting is
+ required to match platform design.
+
+ @param[in] Enabled - Enable or disable Critical Battery wakeup event.
+**/
+VOID
+RapidStartInitializeCriticalBatteryWakeupEvent (
+ IN BOOLEAN Enabled
+ );
+
+/**
+ Check if current wakeup is because of critical low battery.
+
+ This function checks if current S3 resume caused by critical battery wakeup
+ event. This KSC specific command will not be sent if KSC not present. Porting is
+ required to match platform design.
+
+ @retval TRUE - Current wakeup source is critical low battery event.
+ @retval FALSE - The wakeup source is not critical low battery event.
+**/
+BOOLEAN
+RapidStartCheckCriticalBatteryWakeupEvent (
+ VOID
+ );
+
+/**
+ Clear all wakeup status.
+
+ This function clears all wakeup status bits on KSC controller. This KSC specific
+ command will not be sent if KSC not present. Porting is required to match
+ platform design.
+**/
+VOID
+RapidStartClearAllKscWakeStatus (
+ VOID
+ );
+
+#ifdef RAPID_START_WHOLE_MEMORY_CHECK
+/**
+ Log CRC32 mismatched address and length
+
+ This is optional OEM hook function. It can be used to log any CRC32 mismatched memory chunk if needed.
+
+ @param[in] MismatchedBaseAddress - Memory address caused mismatched CRC32
+ @param[in] MismatchedDataSize - memory length for calculating CRC32
+
+ @retval EFI_SUCCESS Process successfully
+**/
+EFI_STATUS
+LogCrc32MismatchedAddress (
+ UINTN MismatchedBaseAddress,
+ UINT32 MismatchedDataSize
+ );
+
+/**
+ Log or compare CRC32 value for specific memory range. Each 16MB block will have one CRC32 value.
+
+ This function checks the memory integrity between Rapid Start Entry and Resume.
+ It calculates CRC32 for each memory chunk during Rapid Start Entry, and when
+ Rapid Start Resume it compares each memory chunk CRC32 value with previously
+ saved value to see if any mismatch found. Basically the debug mode BIOS can
+ display all information regarding mismatched memory address. In non-debug mode
+ BIOS, the mismatched memory address and size can be logged if needed. Refer to
+ section "Porting recommendation" for more information.
+
+ @param[in] IsComparingCrc32 - FALSE to save CRC32 value into buffer. TRUE to compare CRC32 value with pre-saved value in buffer.
+ @param[in] BaseAddress - Base memory address for logging or checking CRC32
+ @param[in] EndAddress - End memory address for logging or checking CRC32
+ @param[in] RapidStartData - A data buffer stored RapidStart internal non-volatile information.
+**/
+VOID
+SaveOrCompareCrc32 (
+ IN BOOLEAN IsComparingCrc32,
+ IN UINTN BaseAddress,
+ IN UINTN EndAddress,
+ IN RAPID_START_PERSISTENT_DATA *RapidStartData
+ );
+#endif
+/**
+ Gets RapidStart non-volatile flag.
+
+ Bit0 (RAPID_START_FLAG_ENTRY_DONE):
+ - Rapid Start Entry flow has completed successfully.
+ - Next boot will perform Rapid Start Resume.
+ Bit1 (RAPID_START_FLAG_STORE_CHANGE):
+ - Rapid Start Store change detected in Rapid Start Resume flow.
+ - Rapid Start Resume should be aborted.
+
+ This function will get Rapid Start non-volatile flag which controls overall
+ Rapid Start transition behavior. If Rapid Start Entry already performed in last
+ boot (Rapid Start Flag bit1 was set) the Rapid Start Exit transition can be
+ executed in current boot. After got the Rapid Start Entry state it is
+ recommended to clear this flag (Rapid Start Flag bit1) after drive lock password
+ has been retrieved and scrubbed from non-volatile memory (if drive-lock feature
+ enabled). There are several ways to store Rapid Start Flag and it is platform
+ specific. It must be stored in non-volatile memory and one of the methods is to
+ use CMOS RAM.
+
+ @param[out] Value - RapidStart non-volatile flag
+
+ @retval EFI_SUCCESS - Return the RapidStart flag in Value argument.
+**/
+EFI_STATUS
+RapidStartGetFlag (
+ OUT UINT8 *Value
+ );
+
+/**
+ Sets RapidStart non-volatile flag.
+
+ Bit0 (RAPID_START_FLAG_ENTRY_DONE):
+ - Rapid Start Entry flow has completed successfully.
+ - Next boot will perform Rapid Start Resume.
+ Bit1 (RAPID_START_FLAG_STORE_CHANGE):
+ - Rapid Start Store change detected in Rapid Start Resume flow.
+ - Rapid Start Resume should be aborted.
+
+ This function will set Rapid Start non-volatile flag which controls overall
+ Rapid Start transition behavior. In end of Rapid Start Entry it will set bit0 to
+ indicate next boot may perform Rapid Start Resume. It will also be used to clear
+ Rapid Start Flag when required information has been retrieved.
+
+ @param[in] Value - RapidStart flag state
+
+ @retval EFI_SUCCESS - Flag is set.
+**/
+EFI_STATUS
+RapidStartSetFlag (
+ IN UINT8 Value
+ );
+
+/**
+ Retrieves non-volatile RapidStart settings.
+
+ @param[out] Value - RapidStart non-volatile settings
+
+ @retval EFI_SUCCESS
+**/
+EFI_STATUS
+RapidStartGetConfig (
+ OUT UINT8 *Value
+ );
+
+/**
+ Sets non-volatile RapidStart settings.
+
+ @param[in] Value - RapidStart non-volatile settings
+
+ @retval EFI_SUCCESS
+**/
+EFI_STATUS
+RapidStartSetConfig (
+ IN UINT8 Value
+ );
+
+/**
+ This callback is executed at the end of RapidStart Entry events initialization. (Inside sleep SMI handler)
+
+ This function will be called in the end of sleep SMI handler which initializes
+ Rapid Start Entry trigger events (RTC alarm timer or critical battery wakeup
+ threshold). It can be used to log the status of initialization like Entry
+ cancellation or Entry aborted due to a sooner wakeup timer has be initialized by
+ OS/application. In these cases Rapid Start trigger events will not be
+ initialized and system will directly enter standard S3 state.
+
+ This function can be used to log any error status of initializing Rapid Start
+ Entry trigger events in sleep SMI handler and then inform users for why Rapid
+ Start Entry not happened.
+
+ @param[in] TransitionStatus - Status of initialization for RapidStart Entry events.
+**/
+VOID
+AfterInitializingEntryEvent (
+ IN EFI_STATUS TransitionStatus
+ );
+
+/**
+ Check whether RapidStart Resume.
+
+ @retval TRUE - Rapid Start Entry flow has completed successfully
+**/
+BOOLEAN
+RapidStartResumeCheck (
+ VOID
+);
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.inf b/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.inf
new file mode 100644
index 0000000..adebfa2
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.inf
@@ -0,0 +1,54 @@
+## @file
+# Component description file for the RapidStart Common code PEIM/SMM/DXE library
+#
+#@copyright
+# Copyright (c) 2004 - 2012 Intel Corporation. All rights reserved
+# This software and associated documentation (if any) is furnished
+# under a license and may only be used or copied in accordance
+# with the terms of the license. Except as permitted by such
+# license, no part of this software or documentation may be
+# reproduced, stored in a retrieval system, or transmitted in any
+# form or by any means without the express written consent of
+# Intel Corporation.
+#
+# This file contains a 'Sample Driver' and is licensed as such
+# under the terms of your license agreement with Intel or your
+# vendor. This file may be modified by the user, subject to
+# the additional terms of the license agreement
+#
+
+[defines]
+BASE_NAME = RapidStartCommonLib
+COMPONENT_TYPE = LIBRARY
+
+[sources.common]
+ RapidStartCommonLib.h
+ RapidStartCommonLib.c
+
+[includes.common]
+ .
+ $(EDK_SOURCE)/Foundation/Library/Pei/Include
+ $(EDK_SOURCE)/Foundation/Efi
+ $(EDK_SOURCE)/Foundation/Include
+ $(EDK_SOURCE)/Foundation/Efi/Include
+ $(EDK_SOURCE)/Foundation/Framework/Include
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include/Library
+ $(EFI_SOURCE)/$(PROJECT_RAPID_START_ROOT)
+ $(EFI_SOURCE)/$(PROJECT_RAPID_START_ROOT)/Include
+#
+# EDK II Glue Library utilizes some standard headers from EDK
+#
+ $(EFI_SOURCE)
+ $(EDK_SOURCE)/Foundation
+ $(EDK_SOURCE)/Foundation/Framework
+ $(EDK_SOURCE)/Foundation/Include/IndustryStandard
+ $(EDK_SOURCE)/Foundation/Core/Dxe
+ $(EDK_SOURCE)/Foundation/Include/Pei
+ $(EDK_SOURCE)/Foundation/Library/Dxe/Include
+ $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include
+
+[nmake.common]
+C_STD_INCLUDE=
+
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.mak b/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.mak
new file mode 100644
index 0000000..7b2d2df
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.mak
@@ -0,0 +1,103 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartCommonLib/RapidStartCommonLib.mak 1 10/15/12 4:40a Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 10/15/12 4:40a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartCommonLib/RapidStartCommonLib.mak $
+#
+# 1 10/15/12 4:40a Bensonlai
+# [TAG] None
+# [Category] Improvement
+# [Description] [Category] Improvement
+# [Severity] Important
+# [Description] Rename all IFFS sting to Rapid Start.
+# [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+# [Files] RapidStartCommonLib.cif
+# RapidStartCommonLib.sdl
+# RapidStartCommonLib.mak
+# RapidStartCommonLib.c
+# RapidStartCommonLib.h
+# RapidStartCommonLib.inf
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RapidStartCommonLib.mak
+#
+# Description: Component description file for the RapidStart Common code PEIM/SMM/DXE library.
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+all : RapidStartCommonSmmLib RapidStartCommonDxeLib RapidStartCommonPeiLib
+
+$(RapidStartCommonSmmLib_LIB) : RapidStartCommonSmmLib
+$(RapidStartCommonDxeLib_LIB) : RapidStartCommonDxeLib
+$(RapidStartCommonPeiLib_LIB) : RapidStartCommonPeiLib
+
+RapidStartCommonSmmLib : $(BUILD_DIR)\RapidStartCommonLib.mak RapidStartCommonSmmLibBin
+RapidStartCommonDxeLib : $(BUILD_DIR)\RapidStartCommonLib.mak RapidStartCommonDxeLibBin
+RapidStartCommonPeiLib : $(BUILD_DIR)\RapidStartCommonLib.mak RapidStartCommonPeiLibBin
+
+$(BUILD_DIR)\RapidStartCommonLib.mak : $(RapidStartCommonLib_DIR)\$(@B).cif $(RapidStartCommonLib_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(RapidStartCommonLib_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+RapidStartCommonSmmLibBin : $(PchPlatformLib)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\RapidStartCommonLib.mak all\
+ "MY_INCLUDES=$(EDK_INCLUDES) $(EdkIIGlueLib_INCLUDES) $(NB_INCLUDES) $(INTEL_PCH_INCLUDES) $(RAPIDSTART_INCLUDES)" \
+ TYPE=LIBRARY \
+ LIBRARIES=\
+ LIBRARY_NAME=$(RapidStartCommonSmmLib_LIB)
+
+RapidStartCommonDxeLibBin :
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\RapidStartCommonLib.mak all\
+ "MY_INCLUDES=$(EDK_INCLUDES) $(EdkIIGlueLib_INCLUDES) $(NB_INCLUDES) $(INTEL_PCH_INCLUDES) $(RAPIDSTART_INCLUDES)" \
+ TYPE=LIBRARY \
+ LIBRARIES=\
+ LIBRARY_NAME=$(RapidStartCommonDxeLib_LIB)
+
+RapidStartCommonPeiLibBin :
+!IF "$(x64_BUILD)"=="1"
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS) BUILD_DIR=$(BUILD_DIR)\IA32\
+!ELSE
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+!ENDIF
+ /f $(BUILD_DIR)\RapidStartCommonLib.mak all\
+ "MY_INCLUDES=/I$(BUILD_DIR) $(EDK_INCLUDES) $(EdkIIGlueLib_INCLUDES) $(NB_INCLUDES) $(INTEL_PCH_INCLUDES) $(RAPIDSTART_INCLUDES)" \
+ TYPE=PEI_LIBRARY \
+ LIBRARIES=\
+ LIBRARY_NAME=$(RapidStartCommonPeiLib_LIB)
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.sdl b/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.sdl
new file mode 100644
index 0000000..947adba
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartCommonLib/RapidStartCommonLib.sdl
@@ -0,0 +1,121 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartCommonLib/RapidStartCommonLib.sdl 1 10/15/12 4:40a Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 10/15/12 4:40a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartCommonLib/RapidStartCommonLib.sdl $
+#
+# 1 10/15/12 4:40a Bensonlai
+# [TAG] None
+# [Category] Improvement
+# [Description] [Category] Improvement
+# [Severity] Important
+# [Description] Rename all IFFS sting to Rapid Start.
+# [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+# [Files] RapidStartCommonLib.cif
+# RapidStartCommonLib.sdl
+# RapidStartCommonLib.mak
+# RapidStartCommonLib.c
+# RapidStartCommonLib.h
+# RapidStartCommonLib.inf
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RapidStartCommonLib.sdl
+#
+# Description: SDL file for the RapidStart library.
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "INTEL_MPG_RapidStartCommonLib_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable INTEL_MPG_RapidStartCommonLib support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "RapidStartCommonLib_DIR"
+End
+
+MODULE
+ Help = "Includes RapidStartCommonLib.mak to Project"
+ File = "RapidStartCommonLib.mak"
+End
+
+
+ELINK
+ Name = "RapidStartCommonSmmLib_LIB"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\RapidStartCommonSmmLib.lib"
+ Parent = "RapidStartCommonSmmLib_LIB"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "RapidStartCommonDxeLib_LIB"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\RapidStartCommonDxeLib.lib"
+ Parent = "RapidStartCommonDxeLib_LIB"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "RapidStartCommonPeiLib_LIB"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\RapidStartCommonPeiLib.lib"
+ Parent = "RapidStartCommonPeiLib_LIB"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/I$(RapidStartCommonLib_DIR)"
+ Parent = "RAPIDSTART_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.c b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.c
new file mode 100644
index 0000000..c062033
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.c
@@ -0,0 +1,722 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxeLib/RapidStartDxeLib.c 5 3/14/14 9:56a Joshchou $
+//
+// $Revision: 5 $
+//
+// $Date: 3/14/14 9:56a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxeLib/RapidStartDxeLib.c $
+//
+// 5 3/14/14 9:56a Joshchou
+//
+// 4 8/05/13 3:02a Joshchou
+// [TAG] EIP130093
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] System will hang at CP 0xA2 when plug in special mSATA SSD
+// and Intel Rapid Start Technology support
+// [RootCause] The buffer size isn't enough.
+// [Solution] Modify the size when allocate.
+//
+// 3 2/20/13 1:47a Bensonlai
+// [TAG] EIP115468
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] [SharkBay][Rapid Start] Rapid Start can't work using GPT
+// partition when enabled RAID mode
+// [RootCause] Rapid Start can't work using GPT partition when enabled
+// RAID mode
+// [Files] RapidStartDxeLib.c
+//
+// 2 12/07/12 1:25a Bensonlai
+// [TAG] EIP108737
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] When system in the RAID mode without the partition of the
+// RapidStart, RapidStart menu still show "No Valid Partition" in the
+// setup.
+// [RootCause] We didn't check the RAID mode.
+// [Solution] Add the RAID mode for checking whether in the RAID mode.
+// [Files] RapidStartDxeLib.c
+//
+// 1 10/15/12 4:41a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] [Category] Improvement
+// [Severity] Important
+// [Description] Rename all IFFS sting to Rapid Start.
+// [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+//
+// [Files] RapidStartDxeLib.cif
+// RapidStartDxeLib.sdl
+// RapidStartDxeLib.mak
+// RapidStartDxeLib.c
+// RapidStartDxeLib.h
+// RapidStartDxeLib.inf
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartDxeLib.c
+//
+// Description: RapidStart Dxe Platform Library.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+
+#include EFI_PROTOCOL_CONSUMER (BlockIo)
+#include EFI_PROTOCOL_CONSUMER (DiskIo)
+#include EFI_PROTOCOL_CONSUMER (RapidStartPlatformPolicy)
+#include <SaAccess.h>
+#include <PchAccess.h>
+#include <UefiGpt.h>
+#include <mbr.h>
+#include "RapidStartDxeLib.h"
+#endif
+
+//AMIOVERRIDE_BEGIN
+#define SIGNATURE_16(A, B) ((A) | (B << 8))
+#define SIGNATURE_32(A, B, C, D) (SIGNATURE_16 (A, B) | (SIGNATURE_16 (C, D) << 16))
+#define SIGNATURE_64(A, B, C, D, E, F, G, H) \
+ (SIGNATURE_32 (A, B, C, D) | ((UINT64) (SIGNATURE_32 (E, F, G, H)) << 32))
+//AMIOVERRIDE_END
+
+#define RAPID_START_PART_TYPE_MBR 0x84 /* Hibernation partition -- APM 1.1f */
+#define PCH_EFI_RAID_DRIVER_EXECUTION_GUID \
+ { 0x99D5757C, 0xD906, 0x11E0, 0x8D, 0x78, 0x8D, 0xE4, 0x48, 0x24, 0x01, 0x9B };
+
+EFI_GUID gRapidStartGptGuid = RAPID_START_GPT_GUID;
+UINT8 gDriveNum = 0x80;
+EFI_GUID gPchEfiRaidDriverExecutionGuid = PCH_EFI_RAID_DRIVER_EXECUTION_GUID;
+BOOLEAN gPchEfiRaidDriver = FALSE;
+
+/**
+ Search device path by specific Type and SubType
+
+ @param[in,out] DevicePath - A pointer to the device path
+ @param[in] Type - Device path type
+ @param[in] SubType - Device path SubType
+
+ @retval EFI_DEVICE_PATH_PROTOCOL - Device path found and the pointer of device path returned
+ @retval NULL - Specific device path not found
+**/
+STATIC
+EFI_DEVICE_PATH_PROTOCOL *
+SearchDevicePath (
+ IN OUT EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN UINT8 Type,
+ IN UINT8 SubType
+ )
+{
+ if (DevicePath == NULL) {
+ return NULL;
+ }
+
+ while (!IsDevicePathEnd (DevicePath)) {
+ if ((DevicePathType (DevicePath) == Type) && (DevicePathSubType (DevicePath) == SubType)) {
+ return DevicePath;
+ }
+
+ DevicePath = NextDevicePathNode (DevicePath);
+ }
+
+ return NULL;
+}
+
+STATIC
+EFI_STATUS
+RetrieveSataPortNumberInt13 (
+ IN OUT UINT8 *PortNumber,
+ IN BOOLEAN GPTDetect
+ )
+{
+ UINTN Index;
+ BOOLEAN CarryFlag;
+ EFI_IA32_REGISTER_SET Regs;
+ EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
+ EFI_PHYSICAL_ADDRESS TheRealModeBuffer;
+ VOID* Int13Buffer = NULL;
+ EFI_STATUS Status;
+ UINT8 MaxDriveCount;
+
+ Status = gBS->LocateProtocol(&gEfiLegacyBiosProtocolGuid, NULL, &LegacyBios);
+ ASSERT_EFI_ERROR(Status);
+
+ // allocate conventional memory for int code
+ TheRealModeBuffer = 0x00000000000FFFFF;
+ Status = (gBS->AllocatePages)(
+ AllocateMaxAddress,
+ EfiBootServicesData,
+ 1,
+ &TheRealModeBuffer);
+ ASSERT_EFI_ERROR(Status);
+
+ Int13Buffer = (VOID*)TheRealModeBuffer;
+ // clear 4K page
+ (gBS->SetMem)(Int13Buffer, 1024 * 4, 0);
+
+ MaxDriveCount = *(UINT8*)0x475;
+//#### DEBUG ((EFI_D_ERROR, "MaxDriveCount = %x\n", MaxDriveCount));
+
+ for (Index = 0; Index < MaxDriveCount; Index++) {
+ *(UINT16*)Int13Buffer = 0x004A;
+ // Get physical hard disk information by ATA identify command
+ Regs.X.DS = EFI_SEGMENT(Int13Buffer);
+ Regs.X.SI = EFI_OFFSET(Int13Buffer);
+ Regs.H.AH = 0x48;
+
+ if (GPTDetect)
+ Regs.H.DL = 0x80 + (UINT8)Index;
+ else
+ Regs.H.DL = gDriveNum;
+
+ DEBUG ((EFI_D_ERROR, "Drive Number = %x\n", Regs.H.DL));
+
+ LegacyBios->Int86 (LegacyBios, 0x13, &Regs);
+ CarryFlag = (BOOLEAN)Regs.X.Flags.CF;
+ if ((!CarryFlag) && (Regs.H.AH == 0)) {
+
+ DEBUG ((EFI_D_ERROR, "0x28 = %x\n", *((UINT8*)(Int13Buffer)+0x28)));
+ DEBUG ((EFI_D_ERROR, "0x29 = %x\n", *((UINT8*)(Int13Buffer)+0x29)));
+ DEBUG ((EFI_D_ERROR, "0x2A = %x\n", *((UINT8*)(Int13Buffer)+0x2A)));
+ DEBUG ((EFI_D_ERROR, "0x2B = %x\n", *((UINT8*)(Int13Buffer)+0x2B)));
+ DEBUG ((EFI_D_ERROR, "0x3C = %x\n", *((UINT8*)(Int13Buffer)+0x3C)));
+
+ if ((*((UINT8*)(Int13Buffer)+0x28) == 'R') && \
+ (*((UINT8*)(Int13Buffer)+0x29) == 'A') && \
+ (*((UINT8*)(Int13Buffer)+0x2A) == 'I') && \
+ (*((UINT8*)(Int13Buffer)+0x2B) == 'D')) {
+ switch (*((UINT8*)(Int13Buffer)+0x3c)) {
+ case 0x01:
+ *PortNumber = 0;
+ break;
+ case 0x02:
+ *PortNumber = 1;
+ break;
+ case 0x04:
+ *PortNumber = 2;
+ break;
+ case 0x08:
+ *PortNumber = 3;
+ break;
+ case 0x10:
+ *PortNumber = 4;
+ break;
+ case 0x20:
+ *PortNumber = 5;
+ break;
+ default:
+ *PortNumber = 0;
+ break;
+ }
+ }
+ }
+ if (!GPTDetect) break;
+ }
+ if (Int13Buffer) (gBS->FreePages) (TheRealModeBuffer, 1);
+
+ return Status;
+}
+
+/**
+ Scan and check if GPT type RapidStart Store present.
+
+ @param[in] Device - Device handle
+ @param[in] DevicePath - A pointer to the device path
+ @param[out] StoreSectors - Size of RapidStart store partition
+ @param[out] StoreLbaAddr - Address of RapidStart store partition
+
+ @retval EFI_SUCCESS - GPT type RapidStart Store found.
+ @retval EFI_NOT_FOUND - GPT type RapidStart Store not found.
+**/
+STATIC
+EFI_STATUS
+ScanForRapidStartGptPartition (
+ IN EFI_HANDLE Device,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINT32 *StoreSectors,
+ OUT UINT64 *StoreLbaAddr
+ )
+{
+ EFI_STATUS Status;
+ EFI_BLOCK_IO_PROTOCOL *BlockIo;
+ EFI_DISK_IO_PROTOCOL *DiskIo;
+ EFI_PARTITION_TABLE_HEADER *PrimaryHeader;
+ EFI_PARTITION_ENTRY *PartitionEntry;
+ UINT32 Index;
+
+ Status = gBS->HandleProtocol (Device, &gEfiBlockIoProtocolGuid, (VOID*)&BlockIo);
+ if (EFI_ERROR (Status)) {
+ return EFI_UNSUPPORTED;
+ }
+
+ Status = gBS->HandleProtocol (Device, &gEfiDiskIoProtocolGuid, (VOID*)&DiskIo);
+ if (EFI_ERROR (Status)) {
+ return EFI_UNSUPPORTED;
+ }
+ //
+ // Read the EFI Partition Table Header
+ //
+ PrimaryHeader = (EFI_PARTITION_TABLE_HEADER *) AllocatePool (BlockIo->Media->BlockSize);
+ if (PrimaryHeader == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ Status = DiskIo->ReadDisk (
+ DiskIo,
+ BlockIo->Media->MediaId,
+ 1 * BlockIo->Media->BlockSize,
+ BlockIo->Media->BlockSize,
+ (UINT8 *)PrimaryHeader
+ );
+ if (EFI_ERROR (Status)) {
+ FreePool (PrimaryHeader);
+ return EFI_DEVICE_ERROR;
+ }
+//AMIOVERRIDE_BEGIN
+ if(PrimaryHeader->Header.Signature != EFI_PTAB_HEADER_ID ){//Check for "EFI PART" signature
+ FreePool (PrimaryHeader);
+ return EFI_NOT_FOUND;
+ }
+//AMIOVERRIDE_END
+ //
+ // Read the partition entry.
+ //
+//AMIOVERRIDE_BEGIN
+ // PartitionEntry = AllocatePool (PrimaryHeader->NumberOfPartitionEntries * sizeof (EFI_PARTITION_ENTRY));
+ PartitionEntry = AllocatePool (PrimaryHeader->NumberOfPartitionEntries * PrimaryHeader->SizeOfPartitionEntry);
+//AMIOVERRIDE_END
+ if (PartitionEntry == NULL) {
+ FreePool (PrimaryHeader);
+ return EFI_OUT_OF_RESOURCES;
+ }
+ Status = DiskIo->ReadDisk (
+ DiskIo,
+ BlockIo->Media->MediaId,
+ MultU64x32(PrimaryHeader->PartitionEntryLBA, BlockIo->Media->BlockSize),
+ PrimaryHeader->NumberOfPartitionEntries * PrimaryHeader->SizeOfPartitionEntry,
+ PartitionEntry
+ );
+ if (EFI_ERROR (Status)) {
+ FreePool (PrimaryHeader);
+ FreePool (PartitionEntry);
+ return EFI_DEVICE_ERROR;
+ }
+
+ //
+ // Count the valid partition
+ //
+ for (Index = 0; Index < PrimaryHeader->NumberOfPartitionEntries; Index++) {
+ if (CompareGuid (&PartitionEntry[Index].PartitionTypeGUID, &gRapidStartGptGuid)) {
+ *StoreLbaAddr = PartitionEntry[Index].StartingLBA;
+ *StoreSectors = (UINT32) (PartitionEntry[Index].EndingLBA - PartitionEntry[Index].StartingLBA + 1);
+ DEBUG (
+ (EFI_D_INFO,
+ "Found RapidStart GPT partition: start=%x size=%x\n",
+ *StoreLbaAddr,
+ *StoreSectors)
+ );
+ FreePool (PrimaryHeader);
+ FreePool (PartitionEntry);
+ return EFI_SUCCESS;
+ }
+ }
+
+ FreePool (PrimaryHeader);
+ FreePool (PartitionEntry);
+ return EFI_NOT_FOUND;
+}
+
+/**
+ Scan and check if MBR type RapidStart Store present.
+
+ @param[in] Device - Device handle
+ @param[out] StoreSectors - Size of RapidStart store partition
+ @param[out] StoreLbaAddr - Address of RapidStart store partition
+
+ @retval EFI_SUCCESS - MBR type RapidStart Store found.
+ @retval EFI_NOT_FOUND - MBR type RapidStart Store not found.
+**/
+STATIC
+EFI_STATUS
+ScanForRapidStartMbrPartition (
+ IN EFI_HANDLE Device,
+ OUT UINT32 *StoreSectors,
+ OUT UINT64 *StoreLbaAddr
+ )
+{
+ EFI_STATUS Status;
+ EFI_BLOCK_IO_PROTOCOL *BlockIo;
+ UINTN Idx;
+ UINT8 OsType;
+
+ MASTER_BOOT_RECORD BootRecord;
+ MASTER_BOOT_RECORD *Mbr;
+ MASTER_BOOT_RECORD ExtBootRecord;
+ MASTER_BOOT_RECORD *ExtPart;
+ EFI_LBA Lba;
+
+ Mbr = &BootRecord;
+
+ Status = gBS->HandleProtocol (Device, &gEfiBlockIoProtocolGuid, (VOID *) &BlockIo);
+ ASSERT_EFI_ERROR (Status);
+ ASSERT (BlockIo != NULL);
+
+ ///
+ /// read the MBR
+ ///
+ Status = BlockIo->ReadBlocks (BlockIo, BlockIo->Media->MediaId, 0, sizeof (*Mbr), Mbr);
+ if (Status != EFI_SUCCESS) {
+ DEBUG ((EFI_D_ERROR, "Cannot read MBR\n"));
+ return Status;
+ }
+
+ if (Mbr->Sig != MBR_SIGNATURE) {
+ DEBUG ((EFI_D_ERROR, "Bad MBR\n"));
+ if (!BlockIo->Media->RemovableMedia)
+ gDriveNum++;
+ return EFI_NOT_FOUND;
+ }
+
+ for (Idx = 0; Idx < NUM_MBR_PARTITIONS; Idx++) {
+ OsType = Mbr->PartRec[Idx].OSType;
+
+ ///
+ /// ignore partitions whose OSType or Size is zero
+ ///
+ if ((OsType == 0) || (Mbr->PartRec[Idx].SizeInLba == 0)) {
+ continue;
+ }
+
+ if (OsType == RAPID_START_PART_TYPE_MBR) {
+ DEBUG (
+ (EFI_D_INFO,
+ "Found RapidStart MBR partition: start=%x size=%x\n",
+ Mbr->PartRec[Idx].StartingLba,
+ Mbr->PartRec[Idx].SizeInLba)
+ );
+ *StoreLbaAddr = Mbr->PartRec[Idx].StartingLba;
+ *StoreSectors = Mbr->PartRec[Idx].SizeInLba;
+ return EFI_SUCCESS;
+ }
+
+ // Now that a valid partition is found process it
+ if ((Mbr->PartRec[Idx].OSType == EXTENDED_PARTITION) ||
+ (Mbr->PartRec[Idx].OSType == WIN95_EXTENDED_PARTITION)) {
+
+ ExtPart = &ExtBootRecord;
+
+ // defines where to start reading the next MBR/partition
+ // table from
+ Lba = Mbr->PartRec[Idx].StartingLba;
+
+ // loop through logical partitions: any number of
+ // possible partitions
+ while (TRUE) {
+
+ // if the table points back to itself, exit
+ if ( Lba == 0) {
+ break;
+ }
+
+ // get Partition table from the first block of the device
+ Status = BlockIo->ReadBlocks(BlockIo, BlockIo->Media->MediaId,
+ Lba, sizeof (*ExtPart), ExtPart);
+
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ // make sure this is a valid partition
+ if (ExtPart->PartRec[0].OSType == NO_PARTITION) {
+ break;
+ }
+
+ // check for problems that make the partition invalid
+ if ((Lba + ExtPart->PartRec[0].SizeInLba) >
+ (Mbr->PartRec[Idx].StartingLba
+ + Mbr->PartRec[Idx].SizeInLba)) {
+
+ break;
+ }
+
+ OsType = ExtPart->PartRec[0].OSType;
+
+ if (OsType == RAPID_START_PART_TYPE_MBR) {
+ DEBUG (
+ (EFI_D_INFO,
+ "Found RapidStart MBR partition: start=%x size=%x\n",
+ Mbr->PartRec[Idx].StartingLba,
+ Mbr->PartRec[Idx].SizeInLba)
+ );
+
+ *StoreLbaAddr = ExtPart->PartRec[0].StartingLba + Lba;
+ *StoreSectors = ExtPart->PartRec[0].SizeInLba;
+ return EFI_SUCCESS;
+ }
+
+ // check to see if the next partition is an extended partition
+ if ((ExtPart->PartRec[1].OSType != EXTENDED_PARTITION) &&
+ (ExtPart->PartRec[1].OSType != WIN95_EXTENDED_PARTITION) ) {
+ break;
+ }
+
+ // get set up for the next partition. The Starting Lba
+ // address is a relative address inside the extended
+ // partition add the starting address of the extended
+ // partition to get the actual LBA where it starts
+ Lba = ExtPart->PartRec[1].StartingLba
+ + Mbr->PartRec[Idx].StartingLba;
+ }
+ }
+ }
+
+ if (!BlockIo->Media->RemovableMedia)
+ gDriveNum++;
+
+ return EFI_NOT_FOUND;
+}
+
+/**
+ Verify if this device path was RapidStart store partition. Get SATA port number if it was.
+
+ @param[in] AhciMode - TRUE means current SATA operation mode is AHCI, otherwise it is RAID
+ @param[in,out] DevicePath - A pointer to the device path
+ @param[in,out] PortNumber - Port Number connecting to this drive
+
+ @retval EFI_SUCCESS - This is RapidStart Store partition and Port Number retrieved successfully.
+ @retval EFI_NOT_FOUND - This is not RapidStart Store
+**/
+STATIC
+EFI_STATUS
+VerifyDevicePath (
+ IN BOOLEAN AhciMode,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN OUT UINT8 *PortNumber
+ )
+{
+ EFI_STATUS Status;
+ UINT8 Index;
+
+ Status = EFI_NOT_FOUND;
+
+ DevicePath = SearchDevicePath (DevicePath, MESSAGING_DEVICE_PATH, MSG_SATA_DP);
+ if ((SATA_DEVICE_PATH *) DevicePath != NULL) {
+#if (EFI_SPECIFICATION_VERSION >= 0x0002000A)
+ * PortNumber = (UINT8) ((SATA_DEVICE_PATH *) DevicePath)->HBAPortNumber;
+#else
+ *PortNumber = (UINT8) ((SATA_DEVICE_PATH *) DevicePath)->HbaPortNumber;
+#endif
+ Status = EFI_SUCCESS;
+ }
+
+ // Support Intel RST SATA UEFI Driver
+ if (gPchEfiRaidDriver) {
+ for (Index = 0; Index < 6; Index++) {
+ if (*PortNumber & (1 << Index)) {
+ *PortNumber = Index;
+ break;
+ }
+ }
+ }
+
+
+ if (Status == EFI_SUCCESS) {
+ DEBUG ((EFI_D_INFO, "Port number=%X\n", *PortNumber));
+ }
+
+ return Status;
+}
+
+/**
+ Look through all device handles to detect if any GPT/MBR type RapidStart Store present
+
+ @param[in] AhciMode - TRUE means current SATA operation mode is AHCI, otherwise it is RAID
+ @param[in] RapidStartPolicy - RapidStart Platform Policy protocol
+ @param[out] StoreSectors - Size of RapidStart store partition
+ @param[out] StoreLbaAddr - Address of RapidStart store partition
+ @param[out] StoreSataPort - Port number for RapidStart store partition
+
+ @retval EFI_SUCCESS - RapidStart Store found
+ @retval EFI_NOT_FOUND - RapidStart Store not found
+**/
+STATIC
+EFI_STATUS
+DetectRapidStartPartition (
+ IN BOOLEAN AhciMode,
+ IN RAPID_START_PLATFORM_POLICY_PROTOCOL *RapidStartPolicy,
+ OUT UINT32 *StoreSectors,
+ OUT UINT64 *StoreLbaAddr,
+ OUT UINT8 *StoreSataPort
+ )
+{
+ EFI_STATUS Status;
+ UINTN HandleCount;
+ EFI_HANDLE *HandleBuffer;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINTN Index;
+
+ Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiBlockIoProtocolGuid, NULL, &HandleCount, &HandleBuffer);
+ if (!EFI_ERROR (Status)) {
+ //
+ // Loop through all the device handles that support the BLOCK_IO Protocol
+ //
+ for (Index = 0; Index < HandleCount; Index++) {
+ Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID *) &DevicePath);
+ if (EFI_ERROR (Status) || DevicePath == NULL) {
+ continue;
+ }
+
+ if (VerifyDevicePath (AhciMode, DevicePath, StoreSataPort) == EFI_SUCCESS || (AhciMode == 0)) { //Raid mode
+ Status = ScanForRapidStartGptPartition (HandleBuffer[Index], DevicePath, StoreSectors, StoreLbaAddr);
+ if (Status == EFI_SUCCESS) {
+ if ( (!AhciMode) && (!gPchEfiRaidDriver) ) RetrieveSataPortNumberInt13(StoreSataPort, TRUE);
+ DEBUG ((EFI_D_INFO, "Found Gpt RapidStart Store on SATA port=%d\n", *StoreSataPort));
+ break;
+ }
+ Status = ScanForRapidStartMbrPartition (HandleBuffer[Index], StoreSectors, StoreLbaAddr);
+ if (Status == EFI_SUCCESS) {
+
+ if ( (!AhciMode) && (!gPchEfiRaidDriver) ) RetrieveSataPortNumberInt13(StoreSataPort, FALSE);
+
+ DEBUG ((EFI_D_INFO, "Found Mbr RapidStart Store on SATA port=%d\n", *StoreSataPort));
+ break;
+ }
+ }
+ }
+
+ FreePool (HandleBuffer);
+ }
+
+ return Status;
+}
+
+/**
+ Search if any type of RapidStart Store partition present
+
+ @param[in] RapidStartPolicy - RapidStart Platform Policy protocol
+ @param[out] StoreSectors - Size of RapidStart store partition
+ @param[out] StoreLbaAddr - Address of RapidStart store partition
+ @param[out] StoreSataPort - Port number for RapidStart store partition
+
+ @retval EFI_SUCCESS - GPT or MBR type RapidStart Store found
+ @retval EFI_NOT_FOUND - GPT or MBR type RapidStart Store not found
+**/
+EFI_STATUS
+SearchRapidStartStore (
+ IN RAPID_START_PLATFORM_POLICY_PROTOCOL *RapidStartPolicy,
+ OUT UINT32 *StoreSectors,
+ OUT UINT64 *StoreLbaAddr,
+ OUT UINT8 *StoreSataPort
+ )
+{
+ BOOLEAN AhciMode;
+ EFI_STATUS Status;
+ VOID *Empty;
+
+ *StoreSectors = 0;
+ *StoreLbaAddr = 0;
+ *StoreSataPort = 0;
+
+ //
+ // Get current SATA operation mode (only AHCI or RAID mode is supported)
+ //
+ AhciMode = (MmioRead8 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_SATA,
+ PCI_FUNCTION_NUMBER_PCH_SATA,
+ R_PCH_SATA_SUB_CLASS_CODE)
+ ) == V_PCH_SATA_SUB_CLASS_CODE_AHCI);
+
+ Status = gBS->LocateProtocol(&gPchEfiRaidDriverExecutionGuid, NULL, &Empty);
+ if (Status == EFI_SUCCESS) gPchEfiRaidDriver = TRUE;
+
+ Status = DetectRapidStartPartition (AhciMode, RapidStartPolicy, StoreSectors, StoreLbaAddr, StoreSataPort);
+
+ return Status;
+}
+
+/**
+ Generate RapidStart Store UID
+
+ @retval UINT64 as RapidStart Store UID
+**/
+UINT64
+GenerateRapidStartStoreUid (
+ VOID
+ )
+{
+ UINT64 Uid;
+ UINT32 HpetBase;
+ UINT32 HpetSetting;
+
+ Uid = AsmReadTsc ();
+
+ HpetSetting = MmioRead32 (PCH_RCRB_BASE + R_PCH_RCRB_HPTC);
+ if (HpetSetting & B_PCH_RCRB_HPTC_AE) {
+ HpetBase = R_PCH_PCH_HPET_CONFIG + (HpetSetting & B_PCH_RCRB_HPTC_AS) * 0x1000;
+ Uid ^= (LShiftU64 ((*(UINT64 *) (UINTN) (HpetBase + 0xF0)), 32));
+ } else {
+ //
+ // Use certain random memory content as part of UID.
+ //
+ Uid ^= (LShiftU64 ((*(UINT64 *) (UINTN) (0xF5C00)), 32));
+ }
+
+ return Uid;
+}
+
+VOID
+EnableHibernate (
+ VOID
+ )
+/*++
+
+Routine Description:
+
+ Re-enable Hibernation when RapidStart enabled but RapidStart Store not present.
+
+Arguments:
+
+ None
+
+Returns:
+
+ None
+
+--*/
+{
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.cif b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.cif
new file mode 100644
index 0000000..88a8a56
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "RapidStartDxeLib"
+ category = ModulePart
+ LocalRoot = "Board\EM\RapidStartWrapper\Library\RapidStartPlatformLib\Dxe"
+ RefName = "RapidStartDxeLib"
+[files]
+"RapidStartDxeLib.sdl"
+"RapidStartDxeLib.mak"
+"RapidStartDxeLib.c"
+"RapidStartDxeLib.h"
+"RapidStartDxeLib.inf"
+<endComponent>
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.h b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.h
new file mode 100644
index 0000000..6685bc4
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.h
@@ -0,0 +1,137 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxeLib/RapidStartDxeLib.h 2 3/14/14 9:56a Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 3/14/14 9:56a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxeLib/RapidStartDxeLib.h $
+//
+// 2 3/14/14 9:56a Joshchou
+//
+// 1 10/15/12 4:41a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] [Category] Improvement
+// [Severity] Important
+// [Description] Rename all IFFS sting to Rapid Start.
+// [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+//
+// [Files] RapidStartDxeLib.cif
+// RapidStartDxeLib.sdl
+// RapidStartDxeLib.mak
+// RapidStartDxeLib.c
+// RapidStartDxeLib.h
+// RapidStartDxeLib.inf
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartDxeLib.h
+//
+// Description: RapidStart Dxe Platform Library header file.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifndef _RAPID_START_DXE_LIB_H_
+#define _RAPID_START_DXE_LIB_H_
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include EFI_PROTOCOL_CONSUMER (RapidStartPlatformPolicy)
+#endif
+
+#define RAPID_START_PART_TYPE_MBR 0x84 /* Hibernation partition -- APM 1.1f */
+///
+/// Partition Name: Intel RapidStart Reserved
+/// GUID: D3BFE2DE-3DAF-11DF-BA40-E3A556D89593
+///
+#define RAPID_START_GPT_GUID \
+ { \
+ 0xD3BFE2DE, 0x3DAF, 0x11DF, 0xba, 0x40, 0xe3, 0xa5, 0x56, 0xd8, 0x95, 0x93 \
+ }
+
+/**
+ Search if any type of RapidStart Store partition present
+
+ This function will search all connected/initialized SSD and see if any valid and
+ supported Rapid Start Store present or not. It will scan both GPT and MBR type
+ partitions and return the required information for accessing Rapid Start Store.
+ If no valid/supported Rapid Start Store found the Rapid Start will be disabled.
+ The method and algorithm for searching Rapid Start Store could be implemented by
+ platform design.
+
+ @param[in] RapidStartPolicy - RapidStart Platform Policy protocol
+ @param[out] StoreSectors - Size of RapidStart store partition
+ @param[out] StoreLbaAddr - Address of RapidStart store partition
+ @param[out] StoreSataPort - Port number for RapidStart store partition
+
+ @retval EFI_SUCCESS - GPT or MBR type RapidStart Store found
+ @retval EFI_NOT_FOUND - GPT or MBR type RapidStart Store not found
+**/
+EFI_STATUS
+SearchRapidStartStore (
+ IN RAPID_START_PLATFORM_POLICY_PROTOCOL *RapidStartPolicy,
+ OUT UINT32 *StoreSectors,
+ OUT UINT64 *StoreLbaAddr,
+ OUT UINT8 *StoreSataPort
+ );
+
+/**
+ Generate RapidStart Store UID
+
+ This function will generate a unique ID which will be stored into Rapid Start
+ Store for identifying Rapid Start Store changing condition. When Rapid Start
+ Store changed during Rapid Start Resume, the Rapid Start Resume should be
+ aborted. By default this ID is combining the CPU TSC and HPET counter. This UID
+ will only be generated when Rapid Start Persistent Data not present or Rapid
+ Start Store has changed in previous resume.
+
+ @retval UINT64 as RapidStart Store UID
+**/
+UINT64
+GenerateRapidStartStoreUid (
+ VOID
+ );
+
+/**
+ Re-enable Hibernation when RapidStart enabled but RapidStart Store not present.
+
+ It's recommended to disable ACPI Hibernate support when Rapid Start feature
+ enabled. In this case, if Rapid Start Store not present or invalid (Rapid Start
+ will not be executed), ACPI Hibernate should be re-enabled. This function
+ required porting to fit platform implementation.
+**/
+VOID
+EnableHibernate (
+ VOID
+ );
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.inf b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.inf
new file mode 100644
index 0000000..f72934d
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.inf
@@ -0,0 +1,56 @@
+## @file
+# Component description file for the RapidStartDxeLib
+#
+#@copyright
+# Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved
+# This software and associated documentation (if any) is furnished
+# under a license and may only be used or copied in accordance
+# with the terms of the license. Except as permitted by such
+# license, no part of this software or documentation may be
+# reproduced, stored in a retrieval system, or transmitted in any
+# form or by any means without the express written consent of
+# Intel Corporation.
+#
+# This file contains a 'Sample Driver' and is licensed as such
+# under the terms of your license agreement with Intel or your
+# vendor. This file may be modified by the user, subject to
+# the additional terms of the license agreement
+#
+
+[defines]
+BASE_NAME = RapidStartDxeLib
+COMPONENT_TYPE = LIBRARY
+
+[sources.common]
+ RapidStartDxeLib.c
+ RapidStartDxeLib.h
+
+[includes.common]
+ .
+ $(EDK_SOURCE)/Foundation
+ $(EDK_SOURCE)/Foundation/Include
+ $(EDK_SOURCE)/Foundation/Efi
+ $(EDK_SOURCE)/Foundation/Efi/Include
+ $(EDK_SOURCE)/Foundation/Framework
+ $(EDK_SOURCE)/Foundation/Framework/Include
+ $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include
+ $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include/Pcd
+ $(EDK_SOURCE)/Foundation/Include/IndustryStandard
+ $(EDK_SOURCE)/Foundation/Library/Dxe/Include
+ $(EDK_SOURCE)/Foundation/Core/Dxe
+ $(EDK_SOURCE)/Foundation/Cpu/Pentium/Include
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Protocol
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)
+ $(EFI_SOURCE)/$(PROJECT_RAPID_START_ROOT)
+ $(EFI_SOURCE)/$(PROJECT_RAPID_START_ROOT)/Include
+ $(EFI_SOURCE)/$(PROJECT_RAPID_START_ROOT)/Samplecode
+ $(EFI_SOURCE)/$(PROJECT_RAPID_START_ROOT)/Samplecode/Include
+ $(EFI_SOURCE)/$(PROJECT_RAPID_START_ROOT)/Samplecode/Library/RapidStartCommonLib
+ $(EFI_SOURCE)/$(PROJECT_SA_ROOT)/Include
+ $(EFI_SOURCE)/$(PROJECT_SA_ROOT)/Guid/AcpiVariable
+
+[nmake.common]
+C_FLAGS = $(C_FLAGS)
+
+C_STD_INCLUDE= \ No newline at end of file
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.mak b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.mak
new file mode 100644
index 0000000..00c4388
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.mak
@@ -0,0 +1,78 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxeLib/RapidStartDxeLib.mak 1 10/15/12 4:41a Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 10/15/12 4:41a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxeLib/RapidStartDxeLib.mak $
+#
+# 1 10/15/12 4:41a Bensonlai
+# [TAG] None
+# [Category] Improvement
+# [Description] [Category] Improvement
+# [Severity] Important
+# [Description] Rename all IFFS sting to Rapid Start.
+# [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+#
+# [Files] RapidStartDxeLib.cif
+# RapidStartDxeLib.sdl
+# RapidStartDxeLib.mak
+# RapidStartDxeLib.c
+# RapidStartDxeLib.h
+# RapidStartDxeLib.inf
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RapidStartDxeLib.mak
+#
+# Description: Component description file for the RapidStartDxeLib.
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+all : RapidStartDxeLib
+
+$(RapidStartDxeLib_LIB) : RapidStartDxeLib
+
+RapidStartDxeLib : $(BUILD_DIR)\RapidStartDxeLib.mak RapidStartDxeLibBin
+
+$(BUILD_DIR)\RapidStartDxeLib.mak : $(RapidStartDxeLib_DIR)\$(@B).cif $(RapidStartDxeLib_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(RapidStartDxeLib_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+RapidStartDxeLibBin :
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\RapidStartDxeLib.mak all\
+ "MY_INCLUDES=$(EDK_INCLUDES) $(EdkIIGlueLib_INCLUDES) $(INTEL_MCH_INCLUDES) $(INTEL_PCH_INCLUDES) $(RAPIDSTART_INCLUDES)" \
+ TYPE=LIBRARY \
+ LIBRARY_NAME=$(RapidStartDxeLib_LIB)
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.sdl b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.sdl
new file mode 100644
index 0000000..02fd98b
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Dxe/RapidStartDxeLib.sdl
@@ -0,0 +1,98 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxeLib/RapidStartDxeLib.sdl 1 10/15/12 4:41a Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 10/15/12 4:41a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartDxeLib/RapidStartDxeLib.sdl $
+#
+# 1 10/15/12 4:41a Bensonlai
+# [TAG] None
+# [Category] Improvement
+# [Description] [Category] Improvement
+# [Severity] Important
+# [Description] Rename all IFFS sting to Rapid Start.
+# [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+#
+# [Files] RapidStartDxeLib.cif
+# RapidStartDxeLib.sdl
+# RapidStartDxeLib.mak
+# RapidStartDxeLib.c
+# RapidStartDxeLib.h
+# RapidStartDxeLib.inf
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RapidStartDxeLib.sdl
+#
+# Description: SDL file for the RapidStartDxeLib.
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "RapidStartDxeLib_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable RapidStartDxeLib support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "RapidStartDxeLib_DIR"
+End
+
+MODULE
+ Help = "Includes RapidStartDxeLib.mak to Project"
+ File = "RapidStartDxeLib.mak"
+End
+
+ELINK
+ Name = "RapidStartDxeLib_LIB"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\RapidStartDxeLib.lib"
+ Parent = "RapidStartDxeLib_LIB"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/I$(RapidStartDxeLib_DIR)"
+ Parent = "RAPIDSTART_INCLUDES"
+ InvokeOrder = AfterParent
+End
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/OpensslLib.lib b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/OpensslLib.lib
new file mode 100644
index 0000000..290a4fa
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/OpensslLib.lib
Binary files differ
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/PeiCryptLib.lib b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/PeiCryptLib.lib
new file mode 100644
index 0000000..b05426c
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/PeiCryptLib.lib
Binary files differ
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.c b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.c
new file mode 100644
index 0000000..61d7f52
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.c
@@ -0,0 +1,970 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartPeiLib/RapidStartPeiLib.c 5 7/15/13 6:32a Joshchou $
+//
+// $Revision: 5 $
+//
+// $Date: 7/15/13 6:32a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartPeiLib/RapidStartPeiLib.c $
+//
+// 5 7/15/13 6:32a Joshchou
+// [TAG] EIP129090
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] Platform automatically wakes itself after entering S4 when
+// doing Rapid Start flow
+// [RootCause] The Update of PCH RC 1.6.0 in PchSmmSx.c will put XHCI
+// into incorrect state on ULT platfrom.
+// [Solution] Added code in the Rapid Start Entry phase, to put XHCI
+// into the correct state i.e. D3 to fix the auto wake-up issue.
+//
+// 4 6/21/13 6:03a Joshchou
+// [TAG] EIP126792
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Can't do AMI capsule when Intel Rapid Start eanble
+// [RootCause] CMOS RapidStartFlag does not clear.
+// [Solution] Clear RapidStartFlag when cold boot.
+//
+// 3 3/14/13 11:41p Bensonlai
+// [TAG] EIP118122
+// [Category] Spec Update
+// [Severity] Normal
+// [Description] [SBY] Intel Rapid Start Technology Framework Reference
+// Code Production Version 1.3.0
+// [Files] RapidStartPeiLib.c
+//
+// 2 12/18/12 12:19a Bensonlai
+// [TAG] EIP109701
+// [Category] Spec Update
+// [Severity] Normal
+// [Description] Updated to Shark Bay Rapid Start Reference Code
+// Version 0.8.1
+// [Files] RapidStartPeiLib.c, RapidStartPeiLib.h
+//
+// 1 10/15/12 4:41a Bensonlai
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] [Category] Improvement
+// [Severity] Important
+// [Description] Rename all IFFS sting to Rapid Start.
+// [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+// [Files] RapidStartPeiLib.cif
+// RapidStartPeiLib.sdl
+// RapidStartPeiLib.mak
+// RapidStartPeiLib.c
+// RapidStartPeiLib.h
+// RapidStartPeiLib.inf
+// RapidStartPeiLib.lib
+// PeiCryptLib.lib
+// OpensslLib.lib
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartPeiLib.c
+//
+// Description: RapidStart Platform PEI library.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGluePeim.h"
+#include "RapidStartConfig.h"
+#include "RapidStartPeiLib.h"
+#include "RapidStartCommonLib.h"
+#include <SaAccess.h>
+#include <PchRegs.h>
+#include <PchPlatformLib.h>
+#endif
+#ifndef SW_SMI_IO_ADDRESS
+#define SW_SMI_IO_ADDRESS 0xB2
+#endif
+
+#ifndef SW_SMI_ACPI_ENABLE
+#define SW_SMI_ACPI_ENABLE 0xA0
+#endif
+
+//AMI_OVERRIDE_FOR_RAPID_START
+#ifndef FFS_NV_CONFIG_REG
+#define FFS_NV_CONFIG_REG 0x47
+#endif
+//AMI_OVERRIDE_FOR_RAPID_START
+
+#define HDD_PWD_ENCRYPTION_KEY "H?p1mA*k920_84o3d^!z@L.x4$kY64"
+
+#pragma pack(1)
+typedef struct _HDDSECDATA
+{
+ UINT16 UserMaster;
+ UINT32 PasswordLength;
+ UINT8 HddUserPassword[ATA_PASSWORD_LEN];
+ UINT8 HddMasterPassword[ATA_PASSWORD_LEN];
+} HDDSECDATA;
+#pragma pack()
+
+#define DEFAULT_PCI_BUS_NUMBER_PCH 0
+#define PCI_DEVICE_NUMBER_PCH_SATA 31
+#define PCI_FUNCTION_NUMBER_PCH_SATA 2
+
+#define IDE_SECURITY_PWNV_GUID \
+{ 0x69967a8c, 0x1159, 0x4522, 0xaa, 0x89, 0x74, 0xcd, 0xc6, 0xe5, 0x99, 0xa0}
+
+/**
+ Enables ACPI mode after RapidStart resume.
+
+ @param[in] PeiServices - Pointer to PEI Services Table.
+
+ @retval EFI_SUCCESS - enabled ACPI mode
+**/
+EFI_STATUS
+RapidStartEnableAcpi (
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+{
+#ifdef RAPID_START_WHOLE_MEMORY_CHECK
+ DEBUG ((EFI_D_INFO, "[RapidStart] SMI port=%X, RapidStart SWSMI cmd=%X\n", SW_SMI_IO_ADDRESS, SW_SMI_WHOLE_MEMORY_CHECK));
+ IoWrite8 (SW_SMI_IO_ADDRESS, SW_SMI_WHOLE_MEMORY_CHECK);
+#endif
+ DEBUG ((EFI_D_INFO, "[RapidStart] SMI port=%X, ACPI_ENABLE cmd=%X\n", SW_SMI_IO_ADDRESS, SW_SMI_ACPI_ENABLE));
+ IoWrite8 (SW_SMI_IO_ADDRESS, SW_SMI_ACPI_ENABLE);
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: ConvertHddDataIdToString
+//
+// Description: Converts Integer HDD Data Id to String.
+//
+// Input:
+// IN UINT32 DataId,
+// OUT CHAR16 *String
+// Output:
+// None
+//
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID ConvertHddDataIdToString(
+ IN UINT32 DataId,
+ OUT CHAR16 *String )
+{
+ UINTN Num, i;
+ Num = EfiValueToString (String, DataId, 0, 0);
+
+ for ( i = 0; i < Num; i++ )
+ {
+ DEBUG((EFI_D_ERROR, "HDD Passowrd: String[%x] = %x. \n", i, String[i]));
+ }
+
+ return;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: EncodeDecodePassword
+//
+// Description: Encodes/Decodes Password.
+//
+// Input:
+// IN UINT8 *InputString,
+// OUT UINT8 *OutputString,
+// IN UINT32 StringLen
+// Output:
+// None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID EncodeDecodePassword(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN UINT8 *InputString,
+ OUT UINT8 *OutputString,
+ IN UINT32 StringLength )
+{
+ UINT8 *Key;
+ UINT32 i;
+ UINT32 KeyIndex;
+ UINT32 KeyLength;
+
+ if ((InputString == NULL) || (StringLength == 0))
+ {
+ return;
+ }
+
+ KeyLength = (UINT32)(EfiAsciiStrLen( HDD_PWD_ENCRYPTION_KEY));
+
+ Key = AllocateZeroPool (KeyLength);
+ CopyMem ((VOID *) Key, (VOID *) HDD_PWD_ENCRYPTION_KEY, (UINTN) KeyLength);
+ ASSERT (Key != NULL);
+
+ for ( i = 0, KeyIndex = 0; i < StringLength; i++, KeyIndex++ )
+ {
+ if ( KeyIndex == (KeyLength - 1))
+ {
+ KeyIndex = 0;
+ }
+ OutputString[i] = (UINT8) ( InputString[i] ^ Key[KeyIndex] );
+ }
+
+ return;
+}
+
+/**
+ This callback is provided to support drive password locking interoperability with RapidStart.
+ It is called before RapidStart transition is to occur. If SSD partiotion is located on password
+ locked drive this function must copy the password to the output buffer.
+ Size of the buffer equals ATA_PASSWORD_LEN.
+
+ Normally the drive password is kept in SMRAM so it can be used to unlock the drive at S3 resume,
+ thus during RapidStartEntry the password from SMRAM shall be returned. However at RapidStartExit the content
+ of SMRAM is not yet available so the password has to be preserved in a non-volatile memory
+ during RapidStartEntry (in RapidStartAfterTransition callback) and retrieved by this function.
+
+ For security reasons the password must be scrubbed from non-volatile memory on RapidStartExit before
+ returning from this function. On RapidStartEntry the password must not be stored to non-volatile memory
+ sooner than RapidStartAfterTransition is called (that is after RapidStart non-volatile flag is set).
+
+ @param[in] PeiServices - Pointer to PEI Services Table
+ @param[in] Transition - RapidStart transition being performed
+ @param[in] SataPort - locked SATA port
+ @param[out] Password - output buffer to place the password in
+ @param[out] FreezeLock - set to TRUE to freeze drive lock, set to FALSE otherwise
+
+ @retval EFI_SUCCESS - Unlock password copied to the buffer
+ @retval EFI_NOT_FOUND - No password provided (will break the transition)
+**/
+EFI_STATUS
+RapidStartGetDriveUnlockPassword (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN RAPID_START_TRANSITION Transition,
+ IN UINT8 SataPort,
+ OUT UINT8 *Password,
+ OUT BOOLEAN *FreezeLock
+ )
+{
+ EFI_STATUS Status;
+ EFI_PEI_READ_ONLY_VARIABLE_PPI *ReadOnlyVariable;
+ UINT16 wBDF;
+ UINT16 wPortPMModeFlag;
+ UINT8 DeviceorPMPort = 0xff;
+ BOOLEAN ModeFlag = TRUE; //TRUE is AHCI mode, FALSE is IDE mode.
+ UINT32 HddDataId;
+ CHAR16 *HddSecutiyData = NULL;
+ UINTN HddSecDataSize = sizeof (HDDSECDATA);
+ HDDSECDATA *HddSecData;
+ UINT16 Control;
+ UINTN i;
+ UINT8 CryptBuffer[ATA_PASSWORD_LEN];
+ EFI_GUID gIdeSecurityPwNvguid = IDE_SECURITY_PWNV_GUID;
+
+ Status = PeiServicesLocatePpi (&gEfiPeiReadOnlyVariablePpiGuid, 0, NULL, &ReadOnlyVariable);
+ ASSERT_EFI_ERROR (Status);
+
+ wBDF = (UINT16)((DEFAULT_PCI_BUS_NUMBER_PCH << 8) \
+ | (PCI_DEVICE_NUMBER_PCH_SATA << 3) \
+ | PCI_FUNCTION_NUMBER_PCH_SATA );
+ wPortPMModeFlag = (UINT16)((SataPort << 12) \
+ | (DeviceorPMPort << 4) \
+ | ((UINT8)ModeFlag));
+
+ HddDataId = (UINT32)(((UINT16)wBDF << 16) + ((UINT16)wPortPMModeFlag));
+ DEBUG ((EFI_D_ERROR, "[RapidStart] HddDataId=%X\n", HddDataId));
+
+ HddSecutiyData = AllocateZeroPool(ATA_PASSWORD_LEN);
+
+ ConvertHddDataIdToString (HddDataId, HddSecutiyData);
+
+ HddSecData = AllocateZeroPool(HddSecDataSize);
+
+ Status = ReadOnlyVariable->PeiGetVariable (
+ GetPeiServicesTablePointer (),
+ HddSecutiyData,
+ &gIdeSecurityPwNvguid,
+ NULL,
+ &HddSecDataSize,
+ HddSecData
+ );
+ DEBUG ((EFI_D_ERROR, "[RapidStart] PeiGetVariable Status=%r\n", Status));
+ if (EFI_ERROR (Status)) {
+ return EFI_NOT_FOUND;
+ }
+
+ Control = HddSecData->UserMaster;
+
+ DEBUG ((EFI_D_ERROR, "[RapidStart] Control=%x\n", Control));
+
+ if ( Control & 0x01 )
+ {
+ for ( i = 0; i < sizeof (HddSecData->HddMasterPassword); i++ )
+ {
+ CryptBuffer[i] = HddSecData->HddMasterPassword[i];
+ }
+
+ EncodeDecodePassword (PeiServices, CryptBuffer, Password, HddSecData->PasswordLength);
+ }
+ else {
+ for ( i = 0; i < sizeof (HddSecData->HddUserPassword); i++ )
+ {
+ DEBUG ((EFI_D_ERROR, "[RapidStart] HddSecData->HddUserPassword[%x]= %x.\n", i, HddSecData->HddUserPassword[i]));
+ CryptBuffer[i] = HddSecData->HddUserPassword[i];
+ }
+
+ EncodeDecodePassword (PeiServices, CryptBuffer, Password, HddSecData->PasswordLength);
+ }
+
+ *FreezeLock = TRUE;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This callback is executed before RapidStart transition is performed, but after RapidStart transition conditions has been met.
+
+ @param[in] PeiServices - Pointer to PEI Services Table
+ @param[in] Transition - RapidStart transition being performed
+ @param[in] SataPort - SATA port of RapidStart storage drive
+
+ @retval EFI_SUCCESS - RapidStart transition will follow
+ @retval EFI_ABORTED - RapidStart transition will not be performed
+**/
+EFI_STATUS
+RapidStartBeforeTransition (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN RAPID_START_TRANSITION Transition,
+ IN UINT8 SataPort
+ )
+{
+ return EFI_SUCCESS;
+}
+
+/**
+ This callback is executed at the end of RapidStart transition whether succesfull ot not.
+
+ If RapidStart partition is located on password locked drive the drive password must be
+ copied to non-volatile memory during RapidStartEntry in this function, so it is available
+ on RapidStartExit (see RapidStartGetDriveUnlockPassword).
+
+ @param[in] PeiServices - Pointer to PEI Services Table
+ @param[in] Transition - RapidStart transition being performed
+ @param[in] TransitionStatus - Status of the RapidStart transition
+ @param[in] SataPort - SATA port of RapidStart storage drive
+**/
+VOID
+RapidStartAfterTransition (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN RAPID_START_TRANSITION Transition,
+ IN EFI_STATUS TransitionStatus,
+ IN UINT8 SataPort
+ )
+{
+ //AMI_OVERRIDE_FOR_RAPID_START
+ //Clear CMOS RapidStartFlag in PEI
+ RtcWrite (FFS_NV_CONFIG_REG, 0);
+ //AMI_OVERRIDE_FOR_RAPID_START
+}
+
+#ifndef RAPID_START_NO_SMRAM_INTEGRITY_CHECK
+/**
+ Saves SMRAM Secure Hash to non-volatile secure location.
+
+ @param[in] Hash[] - hash value
+
+ @retval EFI_SUCCESS - Hash value saved successfully
+ @retval EFI_NOT_FOUND - Hash value not found
+**/
+EFI_STATUS
+RapidStartSaveSecureHash (
+ IN UINT8 Hash[RAPID_START_SECURE_HASH_LENGTH]
+ )
+{
+ UINT8 Index;
+
+ DEBUG ((EFI_D_ERROR, "RapidStartSaveSecureHash()\n"));
+
+ for (Index = 0; Index < RAPID_START_SECURE_HASH_LENGTH; Index++) {
+ // Save SMRAM hash value
+ RtcWrite (FFS_SMRAM_HASH_DATA_REG + Index, Hash[Index]);
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Retrieves and removes SMRAM hash from non-volatile memory
+
+ @param[out] Hash[] - hash value
+
+ @retval EFI_SUCCESS - Hash value has been restored and cleared successfully
+ @retval EFI_NOT_FOUND - Hash value not found
+**/
+EFI_STATUS
+RapidStartRestoreAndClearSecureHash (
+ OUT UINT8 Hash[RAPID_START_SECURE_HASH_LENGTH]
+ )
+{
+ UINT8 Index;
+
+ DEBUG ((EFI_D_ERROR, "RapidStartRestoreAndClearSecureHash()\n"));
+
+ for (Index = 0; Index < RAPID_START_SECURE_HASH_LENGTH; Index++) {
+ // Retrieve SMRAM hash value
+ Hash[Index] = RtcRead (FFS_SMRAM_HASH_DATA_REG + Index);
+ // Remove SMRAM value
+ RtcWrite (FFS_SMRAM_HASH_DATA_REG + Index, 0);
+ }
+ return EFI_SUCCESS;
+}
+
+#endif
+
+/**
+ Provide a hook for OEM to cancel RapidStart flow.
+ This function may impact RapidStart Entry performance since it's polled frequently.
+
+ @retval FALSE - Do not cancel RapidStart flow
+ @retval TRUE - The RapidStart Entry flow should be canceled and do S3 resume back to OS
+**/
+BOOLEAN
+RapidStartShouldCancelEntry (
+ VOID
+ )
+{
+ return FALSE;
+}
+
+///
+/// Device IDs for WLAN RSR Workaround
+///
+UINT16 mWlanSkusDeviceIdsTable[] = {
+ 0x422B, 0x4238, // 6300 - Puma Peak 3
+ 0x0082, 0x0085, // 6205 - Taylor Peak
+ 0x0890, 0x0891, // 2200 - Marble Peak
+ 0x0887, 0x0888, // 2230 - Jackson Peak 1
+ 0x088F, 0x088E, // 6235 - Jackson Peak 2
+ 0x008A, 0x008B, // 1030 - Rainbow Peak 1
+ 0x0091, 0x0090, // 6230 - Rainbow Peak 2
+ 0x0885, 0x0886, // 6150 - Kelsey Peak
+ 0x0087, 0x0089, // 6250 - Kilmer Peak
+};
+
+///
+/// Device IDs for WLAN D3 Workaround
+///
+UINT16 mWlanSkusDeviceIdsTable2[] = {
+ 0x08B3, 0x08B4, // 3160 - Wilkins Peak 1
+ 0x08B1, 0x08B2, // 7260 - Wilkins Peak 2
+};
+
+/**
+ This function is work around for NetDetect and WakeOnLan when RapidStart enabled.
+
+ @retval EFI_SUCCESS - Operation successfully performed
+**/
+EFI_STATUS
+RapidStartWANetDetect (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN UINT32 WlanMmioSpace
+ )
+{
+ UINT8 RpFunction;
+ UINTN RpBase;
+ UINT8 SecBusNum;
+ UINT8 SecSubBusNum;
+ UINT8 EpBusNum;
+ UINTN EpBase;
+ UINTN WlanSkusDeviceIdIndex;
+ UINT8 CapPtr;
+ UINT8 NxtPtr;
+ UINT8 CapID;
+ UINT8 PMCreg;
+ UINT8 PMCSR;
+ UINT32 Timeout;
+ PEI_STALL_PPI *StallPpi;
+ EFI_STATUS Status;
+
+ DEBUG ((EFI_D_INFO, "RapidStartWANetDetect Start\n"));
+
+ Status = PeiServicesLocatePpi (&gPeiStallPpiGuid, 0, NULL, (VOID **) &StallPpi);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Scan PCH PCI-EX slots (Root Port) : Device 28 Function 0~7
+ //
+ for (RpFunction = 0; RpFunction < GetPchMaxPciePortNum (); RpFunction ++) {
+ RpBase = MmPciAddress (0, DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS, RpFunction, 0);
+ DEBUG ((EFI_D_INFO, "RapidStartWANetDetect: PCI-EX slot %x ...\n", RpFunction));
+
+ if ((MmioRead16 (RpBase + R_PCH_PCIE_SLSTS) & B_PCH_PCIE_SLSTS_PDS) != 0 && MmioRead16 (RpBase + R_PCH_PCIE_VENDOR_ID) == V_PCH_PCIE_VENDOR_ID) {
+
+ ///
+ /// Set WLAN PortBus = 1 to Read Endpoint.
+ ///
+ MmioAndThenOr32(RpBase + R_PCH_PCIE_BNUM, 0xFF0000FF, 0x00010100);
+
+ //
+ // Get the downstream Bus number
+ //
+ SecBusNum = (UINT8) (MmioRead32 (RpBase + R_PCH_PCIE_BNUM) >> 8);
+ SecSubBusNum = (UINT8) (MmioRead32 (RpBase + R_PCH_PCIE_BNUM) >> 16);
+
+ for (EpBusNum = SecBusNum; EpBusNum <= SecSubBusNum; EpBusNum++) {
+ EpBase = MmPciAddress (0, EpBusNum, 0, 0, 0);
+ DEBUG ((EFI_D_INFO, "RapidStartWANetDetect: downstream Bus %x\n", EpBusNum));
+
+ ///
+ /// A config write is required in order for the device to re-capture the Bus number,
+ /// according to PCI Express Base Specification, 2.2.6.2
+ /// Write to a read-only register VendorID to not cause any side effects.
+ ///
+ MmioWrite16 (EpBase + R_PCH_PCIE_VENDOR_ID, 0);
+
+ //
+ // WLAN RSR Workaround
+ //
+ for (WlanSkusDeviceIdIndex = 0; WlanSkusDeviceIdIndex < sizeof (mWlanSkusDeviceIdsTable) / sizeof (mWlanSkusDeviceIdsTable[0]); WlanSkusDeviceIdIndex++) {
+ if (mWlanSkusDeviceIdsTable[WlanSkusDeviceIdIndex] == MmioRead16 (EpBase + R_PCH_PCIE_DEVICE_ID)) {
+ DEBUG ((EFI_D_INFO, "RapidStartWANetDetect: Found a device to support RSR and device ID is %x\n", MmioRead16 (EpBase + R_PCH_PCIE_DEVICE_ID)));
+
+ //
+ // Find out PMCSR register
+ //
+ CapPtr = MmioRead8 (EpBase + R_PCH_PCIE_CAPP);
+ CapID = MmioRead8 (EpBase + CapPtr);
+ NxtPtr = (UINT8) (MmioRead16 (EpBase + CapPtr) >> 8);
+ PMCreg = CapPtr;
+
+ while (CapID != 0x01) {
+ CapID = MmioRead8 (EpBase + NxtPtr);
+ if (CapID == 0x01) {
+ PMCreg = NxtPtr;
+ break;
+ }
+ NxtPtr = (UINT8) (MmioRead16 (EpBase + NxtPtr) >> 8);
+
+ if (NxtPtr == 0){
+ PMCreg = 0;
+ break;
+ }
+ }
+
+ if (PMCreg != 0) {
+ PMCSR = PMCreg + 0x04;
+
+ //
+ // Check whether PME enabled
+ //
+ if (MmioRead16 (EpBase + PMCSR) & BIT8) {
+ DEBUG ((EFI_D_INFO, "RapidStartWANetDetect: This device PME has been enabled\n"));
+
+ //
+ // Disabled PME
+ //
+ MmioAnd16 ((UINTN) (EpBase + PMCSR), (UINT16) (~BIT8));
+
+ //
+ // Set the WLAN device to D0
+ //
+ MmioAnd8 ((UINTN) (EpBase + PMCSR), (UINT8)(~(BIT0 + BIT1)));
+ StallPpi->Stall (PeiServices, StallPpi, STALL_1_MICROSECONDS * 30);
+
+ //
+ // Disable PCIE memory map access
+ //
+ MmioAnd16 ((UINTN) (RpBase + R_PCH_PCIE_PCICMD), (UINT16) (~B_PCH_PCIE_PCICMD_MSE));
+
+ //
+ // Define PCIE MMIO BAR contains a valid address value
+ //
+ MmioWrite32 (RpBase + R_PCH_PCIE_MBL, (WlanMmioSpace & B_PCH_PCIE_MBL_ML) + ((WlanMmioSpace & B_PCH_PCIE_MBL_ML) >> 16));
+ MmioWrite32 (RpBase + R_PCH_PCIE_PMBL, 0x0001FF1);
+
+ //
+ // Enable PCIE memory map access
+ //
+ MmioOr16 ((UINTN) (RpBase + R_PCH_PCIE_PCICMD), (UINT16) B_PCH_PCIE_PCICMD_MSE);
+ DEBUG ((EFI_D_INFO, "RapidStartWANetDetect: Enabled PCIE memory map and MMIO Bar is %x\n", MmioRead32 (RpBase + R_PCH_PCIE_MBL)));
+
+ //
+ // Disable WLAN memory map access
+ //
+ MmioAnd16 ((UINTN) (EpBase + R_PCH_LAN_CMD), (UINT16) (~B_PCH_LAN_CMD_MSE));
+
+ //
+ // Define WLAN MMIO BAR contains a valid address value
+ //
+ MmioWrite32 (EpBase + R_PCH_LAN_MEM_BASE_A, WlanMmioSpace);
+
+ //
+ // Enable WLAN memory map access
+ //
+ MmioOr16 ((UINTN) (EpBase + R_PCH_LAN_CMD), (UINT16) B_PCH_LAN_CMD_MSE);
+
+ WlanMmioSpace = MmioRead32 (EpBase + R_PCH_LAN_MEM_BASE_A) & B_PCH_LAN_MBARA_BA;
+
+ DEBUG ((EFI_D_INFO, "RapidStartWANetDetect: Enabled memory map and MMIO Bar is %x\n", WlanMmioSpace));
+ //
+ // BIOS notify the uCode that RSR flow is needed
+ //
+ MmioWrite32 ((WlanMmioSpace + 0x58), 0x40);
+ //
+ // BIOS waiting for uCode to do the all necessary preparation and set a timer of 100 ms.
+ //
+ Timeout = 0;
+ while ((MmioRead32 (WlanMmioSpace + 0x54) & BIT7) == 0 && Timeout < MAX_UCODE_TIMEOUT) {
+ StallPpi->Stall (PeiServices, StallPpi, STALL_1_MICROSECONDS);
+ Timeout++;
+ }
+
+ DEBUG ((EFI_D_INFO, "RapidStartWANetDetect: The Timeout value is %x and Register 0x54 is %x\n", Timeout, MmioRead32 (WlanMmioSpace + 0x54)));
+ if (Timeout < MAX_UCODE_TIMEOUT) {
+ StallPpi->Stall (PeiServices, StallPpi, STALL_1_MICROSECONDS * 100);
+ //
+ // Perform WLAN Shared HW reset
+ //
+ MmioWrite32 ((WlanMmioSpace + 0x20), BIT7);
+ StallPpi->Stall (PeiServices, StallPpi, STALL_1_MICROSECONDS * 50);
+ //
+ // Re-Enable MAC Clock
+ //
+ MmioWrite32 ((WlanMmioSpace + 0x24), BIT2);
+ StallPpi->Stall (PeiServices, StallPpi, STALL_1_MICROSECONDS * 50000);
+ //
+ // De-Reset the MAC
+ //
+ MmioAnd32 ((UINTN) (WlanMmioSpace + 0x20), (UINT32) (~BIT0));
+ StallPpi->Stall (PeiServices, StallPpi, STALL_1_MICROSECONDS * 50);
+
+ //
+ // Enabled PME again
+ //
+ MmioOr16 ((EpBase + PMCSR), BIT8);
+ //
+ // Persistence ON
+ //
+ MmioOr32 ((WlanMmioSpace + 0x00), BIT30);
+
+ //
+ // Set the WLAN device to D3
+ //
+ MmioOr8 ((UINTN) (EpBase + PMCSR), BIT0 + BIT1);
+
+ DEBUG ((EFI_D_INFO, "RapidStartWANetDetect: RSR is successfully\n"));
+ }
+ }
+ }
+ }
+ }
+
+ //
+ // WLAN D3 Workaround
+ //
+ for (WlanSkusDeviceIdIndex = 0; WlanSkusDeviceIdIndex < sizeof (mWlanSkusDeviceIdsTable2) / sizeof (mWlanSkusDeviceIdsTable2[0]); WlanSkusDeviceIdIndex++) {
+ if (mWlanSkusDeviceIdsTable2[WlanSkusDeviceIdIndex] == MmioRead16 (EpBase + R_PCH_PCIE_DEVICE_ID)) {
+ DEBUG ((EFI_D_INFO, "RapidStartWANetDetect: Found a device to support D3 and device ID is %x\n", MmioRead16 (EpBase + R_PCH_PCIE_DEVICE_ID)));
+
+ //
+ // Find out PMCSR register
+ //
+ CapPtr = MmioRead8 (EpBase + R_PCH_PCIE_CAPP);
+ CapID = MmioRead8 (EpBase + CapPtr);
+ NxtPtr = (UINT8) (MmioRead16 (EpBase + CapPtr) >> 8);
+ PMCreg = CapPtr;
+
+ while (CapID != 0x01) {
+ CapID = MmioRead8 (EpBase + NxtPtr);
+ if (CapID == 0x01) {
+ PMCreg = NxtPtr;
+ break;
+ }
+ NxtPtr = (UINT8) (MmioRead16 (EpBase + NxtPtr) >> 8);
+
+ if (NxtPtr == 0){
+ PMCreg = 0;
+ break;
+ }
+ }
+
+ if (PMCreg != 0) {
+ PMCSR = PMCreg + 0x04;
+
+ //
+ // Check whether PME enabled
+ //
+ if (MmioRead16 (EpBase + PMCSR) & BIT8) {
+ DEBUG ((EFI_D_INFO, "RapidStartWANetDetect: This device PME has been enabled\n"));
+
+ //
+ // Set the WLAN device to D3
+ //
+ MmioOr8 ((UINTN) (EpBase + PMCSR), BIT0 + BIT1);
+
+ DEBUG ((EFI_D_INFO, "RapidStartWANetDetect: D3 is successfully\n"));
+ }
+ }
+ }
+ }
+
+ ///
+ /// Restore bus numbers on the WLAN bridge.
+ ///
+ MmioAnd32(RpBase + R_PCH_PCIE_BNUM, 0xFF0000FF);
+ }
+ }
+ }
+ DEBUG ((EFI_D_INFO, "RapidStartWANetDetect End\n"));
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This callback is executed to clear all PEM events before Rapid Start enter S4.
+
+ @retval EFI_SUCCESS - Operation successfully performed
+**/
+EFI_STATUS
+RapidStartClearOemPmeEvent (
+ VOID
+ )
+{
+ UINT16 EhciPme, Ehci2Pme, xHciPme;
+ UINT8 Index;
+ UINT16 PCIePme[8];
+ UINT16 GigaLanPme;
+
+ DEBUG ((EFI_D_INFO, "RapidStartClearOemPmeEvent Start\n"));
+
+ //
+ // Save Ehci, Ehci2 and xHci Power Control Status register
+ //
+ EhciPme = MmioRead16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_USB,
+ PCI_FUNCTION_NUMBER_PCH_EHCI,
+ R_PCH_EHCI_PWR_CNTL_STS)
+ );
+ Ehci2Pme = MmioRead16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_USB_EXT,
+ PCI_FUNCTION_NUMBER_PCH_EHCI2,
+ R_PCH_EHCI_PWR_CNTL_STS)
+ );
+ xHciPme = MmioRead16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_XHCI,
+ PCI_FUNCTION_NUMBER_PCH_XHCI,
+ R_PCH_XHCI_PWR_CNTL_STS)
+ );
+ //
+ // Disabled Ehci, Ehcu2 and xHci PME & Clear PME status
+ //
+ MmioWrite16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_USB,
+ PCI_FUNCTION_NUMBER_PCH_EHCI,
+ R_PCH_EHCI_PWR_CNTL_STS),
+ ((EhciPme & ~B_PCH_EHCI_PWR_CNTL_STS_PME_EN) | B_PCH_EHCI_PWR_CNTL_STS_PME_STS)
+ );
+ MmioWrite16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_USB_EXT,
+ PCI_FUNCTION_NUMBER_PCH_EHCI2,
+ R_PCH_EHCI_PWR_CNTL_STS),
+ ((Ehci2Pme & ~B_PCH_EHCI_PWR_CNTL_STS_PME_EN) | B_PCH_EHCI_PWR_CNTL_STS_PME_STS)
+ );
+ MmioWrite16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_XHCI,
+ PCI_FUNCTION_NUMBER_PCH_XHCI,
+ R_PCH_XHCI_PWR_CNTL_STS),
+ ((xHciPme & ~B_PCH_XHCI_PWR_CNTL_STS_PME_EN) | B_PCH_XHCI_PWR_CNTL_STS_PME_STS)
+ );
+
+ for (Index = 0; Index <= PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_8; Index++) {
+ //
+ // Save PCIEs Power Control Status register
+ //
+ PCIePme[Index] = MmioRead16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS,
+ (PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_1 + Index),
+ R_PCH_PCIE_PMCS)
+ );
+ //
+ // Disabled PCIEs PME & Clear PME status
+ //
+ MmioWrite16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS,
+ (PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_1 + Index),
+ R_PCH_PCIE_PMCS),
+ ((PCIePme[Index] & ~B_PCH_PCIE_PMCS_PMEE) | B_PCH_PCIE_PMCS_PMES)
+ );
+ }
+
+ //
+ // Save Giga Lan Power Control Status register
+ //
+ GigaLanPme = MmioRead16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_LAN,
+ PCI_FUNCTION_NUMBER_PCH_LAN,
+ R_PCH_LAN_PMCS)
+ );
+ //
+ // Disabled Giga Lan PME & Clear PME status
+ //
+ MmioWrite16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_LAN,
+ PCI_FUNCTION_NUMBER_PCH_LAN,
+ R_PCH_LAN_PMCS),
+ ((GigaLanPme & ~B_PCH_LAN_PMCS_PMEE) | B_PCH_LAN_PMCS_PMES)
+ );
+
+ //
+ // Restore Ehci, Ehci2 and xHci Power Control Status register
+ //
+ MmioWrite16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_USB,
+ PCI_FUNCTION_NUMBER_PCH_EHCI,
+ R_PCH_EHCI_PWR_CNTL_STS),
+ EhciPme
+ );
+ MmioWrite16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_USB_EXT,
+ PCI_FUNCTION_NUMBER_PCH_EHCI2,
+ R_PCH_EHCI_PWR_CNTL_STS),
+ Ehci2Pme
+ );
+ MmioWrite16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_XHCI,
+ PCI_FUNCTION_NUMBER_PCH_XHCI,
+ R_PCH_XHCI_PWR_CNTL_STS),
+ xHciPme
+ );
+
+ //
+ // XHCI's previous state is D3(this is woken from S3). In the RapidStartEntry,
+ // when preparing to enter into S4, put XHCI into D3(fix the auto wake-up issue).
+ //
+ MmioWrite16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_XHCI,
+ PCI_FUNCTION_NUMBER_PCH_XHCI,
+ R_PCH_XHCI_PWR_CNTL_STS),
+ (xHciPme | V_PCH_XHCI_PWR_CNTL_STS_PWR_STS_D3)
+ );
+
+ //
+ // Restore PCIEs Power Control Status register
+ //
+
+ for (Index = 0; Index <= PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_8; Index++) {
+ MmioWrite16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS,
+ (PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_1 + Index),
+ R_PCH_PCIE_PMCS),
+ PCIePme[Index]
+ );
+ }
+
+ //
+ // Restore Giga Lan Power Control Status register
+ //
+ MmioWrite16 (
+ MmPciAddress (
+ 0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_LAN,
+ PCI_FUNCTION_NUMBER_PCH_LAN,
+ R_PCH_LAN_PMCS),
+ GigaLanPme
+ );
+
+ DEBUG ((EFI_D_INFO, "RapidStartClearOemPmeEvent End\n"));
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Provide a hook for OEM to cancel RapidStart Instant-On function.
+ This function may impact RapidStart Resume performance since it's polled frequently.
+
+ @retval FALSE - Do not cancel RapidStart Instant-On
+ @retval TRUE - The RapidStart Resume will have no Instant-On function
+**/
+BOOLEAN
+RapidStartUnattendedWake (
+ VOID
+ )
+{
+
+ return FALSE;
+}
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.cif b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.cif
new file mode 100644
index 0000000..8469e48
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.cif
@@ -0,0 +1,15 @@
+<component>
+ name = "RapidStartPeiLib"
+ category = ModulePart
+ LocalRoot = "Board\EM\RapidStartWrapper\Library\RapidStartPlatformLib\Pei"
+ RefName = "RapidStartPeiLib"
+[files]
+"RapidStartPeiLib.sdl"
+"RapidStartPeiLib.mak"
+"RapidStartPeiLib.c"
+"RapidStartPeiLib.h"
+"RapidStartPeiLib.inf"
+"RapidStartPeiLib.lib"
+"PeiCryptLib.lib"
+"OpensslLib.lib"
+<endComponent>
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.h b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.h
new file mode 100644
index 0000000..7eb2422
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.h
@@ -0,0 +1,306 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartPeiLib/RapidStartPeiLib.h 2 12/18/12 12:19a Bensonlai $
+//
+// $Revision: 2 $
+//
+// $Date: 12/18/12 12:19a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartPeiLib/RapidStartPeiLib.h $
+//
+// 2 12/18/12 12:19a Bensonlai
+// [TAG] EIP109701
+// [Category] Spec Update
+// [Severity] Normal
+// [Description] Updated to Shark Bay Rapid Start Reference Code
+// Version 0.8.1
+// [Files] RapidStartPeiLib.c, RapidStartPeiLib.h
+//
+// 1 10/15/12 4:41a Bensonlai
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] [Category] Improvement
+// [Severity] Important
+// [Description] Rename all IFFS sting to Rapid Start.
+// [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+// [Files] RapidStartPeiLib.cif
+// RapidStartPeiLib.sdl
+// RapidStartPeiLib.mak
+// RapidStartPeiLib.c
+// RapidStartPeiLib.h
+// RapidStartPeiLib.inf
+// RapidStartPeiLib.lib
+// PeiCryptLib.lib
+// OpensslLib.lib
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartPeiLib.h
+//
+// Description: Defines and prototypes for the library module.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifndef _RAPID_START_PEI_LIB_H_
+#define _RAPID_START_PEI_LIB_H_
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "RapidStartConfig.h"
+#include EFI_PPI_DEFINITION (RapidStart)
+#endif
+
+#ifndef RAPID_START_NO_SMRAM_INTEGRITY_CHECK
+//
+// Secure hash definitions for SMRAM integrity check
+//
+#include "BaseCryptLib.h"
+#define RAPID_START_SECURE_HASH_LENGTH SHA256_DIGEST_SIZE
+#define IfsSecureHashGetContextSize() (Sha256GetContextSize ())
+#define RapidStartSecureHashInit(state) (Sha256Init (state))
+#define RapidStartSecureHashUpdate(state, data, len) (Sha256Update ((state), (data), (len)))
+#define RapidStartSecureHashFinal(state, output) (Sha256Final ((state), (output)))
+
+/**
+ Saves SMRAM Secure Hash to non-volatile secure location.
+
+ Only available when "RAPID_START_NO_SMRAM_INTEGRITY_CHECK" not defined. This
+ function requires porting to support SMRAM Hash algorithm.
+
+ This function will save SMRAM Hash value into non-volatile memory, platform code
+ has to provide the available non-volatile memory space and modify this function
+ to save SMRAM Hash value into that space. Reference code by default uses SHA256
+ hashing algorithm in UDK2010 "Crypto library". See section "Porting
+ Recommendation" for more information. The hash needs to be as strong as the
+ one used to produce security measurements stored in the TPM, so as to not weaken
+ the overall security level provided by the platform.
+ "RAPID_START_SECURE_HASH_LENGTH" is defined as "SHA256_DIGEST_SIZE",
+ which is defined as 32 in BaseCryptLib.h See "Porting Recommendation"
+ section in this document for SMRAM Hashing implementation.
+
+ @param[in] Hash[] - hash value
+
+ @retval EFI_SUCCESS - Hash value has been saved successfully
+ @retval EFI_NOT_FOUND - Hash value not found
+**/
+EFI_STATUS
+RapidStartSaveSecureHash (
+ IN UINT8 Hash[RAPID_START_SECURE_HASH_LENGTH]
+ );
+
+/**
+ Retrieves and removes SMRAM hash from non-volatile memory
+
+ Only available when "RAPID_START_NO_SMRAM_INTEGRITY_CHECK" not defined. This
+ function requires porting to support SMRAM Hash algorithm.
+
+ This function will retrieve SMRAM Hash value from non-volatile memory and then
+ remove it from non-volatile memory. Platform code has to provide the available
+ non-volatile memory space and modify this function to retrieve SMRAM Hash value
+ from that space. After hash value retrieved, the hash value has to be scrubbed
+ from non-volatile memory immediately. Reference code by default uses SHA256
+ hashing algorithm in UDK2010 "Crypto library". See section "Porting
+ Recommendation" for more information. The hash needs to be as strong as the
+ one used to produce security measurements stored in the TPM, so as to not weaken
+ the overall security level provided by the platform.
+ "RAPID_START_SECURE_HASH_LENGTH" is defined as "SHA256_DIGEST_SIZE",
+ which is defined as 32 in BaseCryptLib.h
+
+ @param[out] Hash[] - hash value
+
+ @retval EFI_SUCCESS - Hash value has been restored and cleared successfully
+ @retval EFI_NOT_FOUND - Hash value not found
+**/
+EFI_STATUS
+RapidStartRestoreAndClearSecureHash (
+ OUT UINT8 Hash[RAPID_START_SECURE_HASH_LENGTH]
+ );
+
+#endif /* RAPID_START_NO_SMRAM_INTEGRITY_CHECK */
+
+/**
+ Enables ACPI mode after RapidStart resume.
+
+ This function will do the platform specific initialization for switching to ACPI
+ mode by issuing ACPI_ENABLE SWSMI in the end of Rapid Start Exit transition. OS
+ will treat Rapid Start Exit as same as regular S3 resume so it will not
+ re-initialize certain tasks, like ACPI_ENABLE SMI will be skipped by OS, but
+ those tasks still required for Rapid Start Exit because it could be resume from
+ S4 or G3 state. This function may need some porting to fit platform design.
+
+ @param[in] PeiServices - Pointer to PEI Services Table.
+
+ @retval EFI_SUCCESS - enabled ACPI mode
+**/
+EFI_STATUS
+RapidStartEnableAcpi (
+ IN EFI_PEI_SERVICES **PeiServices
+ );
+
+/**
+ This callback is provided to support drive password locking interoperability with RapidStart.
+ It is called before RapidStart transition is to occur. If SSD partiotion is located on password
+ locked drive this function must copy the password to the output buffer.
+ Size of the buffer equals ATA_PASSWORD_LEN.
+
+ Normally the drive password is kept in SMRAM so it can be used to unlock the drive at S3 resume,
+ thus during RapidStartEntry the password from SMRAM shall be returned. However at RapidStartExit the content
+ of SMRAM is not yet available so the password has to be preserved in a non-volatile memory
+ during RapidStartEntry (in RapidStartAfterTransition callback) and retrieved by this function.
+
+ For security reasons the password must be scrubbed from non-volatile memory on RapidStartExit before
+ returning from this function. On RapidStartEntry the password must not be stored to non-volatile memory
+ sooner than RapidStartAfterTransition is called (that is after RapidStart non-volatile flag is set).
+
+ @param[in] PeiServices - Pointer to PEI Services Table
+ @param[in] Transition - RapidStart transition being performed
+ @param[in] SataPort - locked SATA port
+ @param[out] Password - output buffer to place the password in
+ @param[out] FreezeLock - set to TRUE to freeze drive lock, set to FALSE otherwise
+
+ @retval EFI_SUCCESS - Unlock password copied to the buffer
+ @retval EFI_NOT_FOUND - No password provided (will break the transition)
+**/
+EFI_STATUS
+RapidStartGetDriveUnlockPassword (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN RAPID_START_TRANSITION Transition,
+ IN UINT8 SataPort,
+ OUT UINT8 *Password,
+ OUT BOOLEAN *FreezeLock
+ );
+
+/**
+ This callback is executed before RapidStart transition is performed, but after RapidStart transition conditions has been met.
+
+ This callback is executed before Rapid Start transition is performed, but after
+ Rapid Start transition conditions have been met. This callback provides
+ capability to cancel Rapid Start transition if required by platform specific
+ condition.
+
+ @param[in] PeiServices - Pointer to PEI Services Table
+ @param[in] Transition - RapidStart transition being performed
+ @param[in] SataPort - SATA port of RapidStart storage drive
+
+ @retval EFI_SUCCESS - RapidStart transition will follow
+ @retval EFI_ABORTED - RapidStart transition will not be performed
+**/
+EFI_STATUS
+RapidStartBeforeTransition (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN RAPID_START_TRANSITION Transition,
+ IN UINT8 SataPort
+ );
+
+/**
+ This callback is executed at the end of RapidStart transition whether succesfull ot not.
+
+ If RapidStart partition is located on password locked drive the drive password must be
+ copied to non-volatile memory during RapidStartEntry in this function, so it is available
+ on RapidStartExit (see RapidStartGetDriveUnlockPassword).
+
+ @param[in] PeiServices - Pointer to PEI Services Table
+ @param[in] Transition - RapidStart transition being performed
+ @param[in] TransitionStatus - Status of the RapidStart transition
+ @param[in] SataPort - SATA port of RapidStart storage drive
+**/
+VOID
+RapidStartAfterTransition (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN RAPID_START_TRANSITION Transition,
+ IN EFI_STATUS TransitionStatus,
+ IN UINT8 SataPort
+ );
+
+/**
+ Provide a hook for OEM to cancel RapidStart flow.
+ This function may impact RapidStart Entry performance since it's polled frequently.
+
+ This routine is a callback for platform designer to cancel the Rapid Start Entry
+ process and do S3 resume back to OS immediately (e.g. Lid opening). Since the
+ time for Rapid Start Entry might be long and user might want to cancel it for
+ any urgent scenario. This required condition check for when the Rapid Start
+ Entry should be canceled. Note: This callback will be polled frequently during
+ Rapid Start Entry process, so the implementation may impact Rapid Start Entry
+ performance.
+
+ A callback for platform designer to cancel Rapid Start Entry process when
+ specific condition happened (e.g. Lid opening). This is optional, required
+ porting and might impact Rapid Start Entry performance.
+
+ @retval FALSE - Do not cancel RapidStart flow
+ @retval TRUE - The RapidStart Entry flow should be canceled and do S3 resume back to OS
+**/
+BOOLEAN
+RapidStartShouldCancelEntry (
+ VOID
+ );
+
+/**
+ This callback is executed to clear all PEM events before Rapid Start enter S4.
+
+ @retval EFI_SUCCESS - Operation successfully performed
+**/
+EFI_STATUS
+RapidStartClearOemPmeEvent (
+ VOID
+ );
+
+//
+// Max uCode time out is 100 Milli second
+//
+#define MAX_UCODE_TIMEOUT 100000
+#define STALL_1_MICROSECONDS 1
+
+/**
+ This function is work around for NetDetect and WakeOnLan when RapidStart enabled.
+
+ @param EFI_SUCCESS - Operation successfully performed
+**/
+EFI_STATUS
+RapidStartWANetDetect (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN UINT32 WlanMmioSpace
+ );
+
+/**
+ Provide a hook for OEM to cancel RapidStart Instant-On function.
+ This function may impact RapidStart Resume performance since it's polled frequently.
+
+ @retval FALSE - Do not cancel RapidStart Instant-On
+ @retval TRUE - The RapidStart Resume will have no Instant-On function
+**/
+BOOLEAN
+RapidStartUnattendedWake (
+ VOID
+ );
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.inf b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.inf
new file mode 100644
index 0000000..1737737
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.inf
@@ -0,0 +1,63 @@
+## @file
+# Component description file for the RapidStart Peim library
+#
+#@copyright
+# Copyright (c) 2004 - 2012 Intel Corporation. All rights reserved
+# This software and associated documentation (if any) is furnished
+# under a license and may only be used or copied in accordance
+# with the terms of the license. Except as permitted by such
+# license, no part of this software or documentation may be
+# reproduced, stored in a retrieval system, or transmitted in any
+# form or by any means without the express written consent of
+# Intel Corporation.
+#
+# This file contains a 'Sample Driver' and is licensed as such
+# under the terms of your license agreement with Intel or your
+# vendor. This file may be modified by the user, subject to
+# the additional terms of the license agreement
+#
+
+[defines]
+BASE_NAME = RapidStartPeiLib
+COMPONENT_TYPE = LIBRARY
+
+[sources.common]
+ RapidStartPeiLib.h
+ RapidStartPeiLib.c
+
+[includes.common]
+ .
+ $(EDK_SOURCE)/Foundation/Library/Pei/Include
+ $(EDK_SOURCE)/Foundation/Efi
+ $(EDK_SOURCE)/Foundation/Include
+ $(EDK_SOURCE)/Foundation/Efi/Include
+ $(EDK_SOURCE)/Foundation/Framework/Include
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include/Library
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)
+ $(EFI_SOURCE)/$(PROJECT_RAPID_START_ROOT)/Samplecode/Library/RapidStartCommonLib
+ $(EFI_SOURCE)/$(PROJECT_RAPID_START_ROOT)
+ $(EFI_SOURCE)/$(PROJECT_RAPID_START_ROOT)/Include
+ $(EFI_SOURCE)/$(PROJECT_ME_ROOT)
+ $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Include
+ $(EFI_SOURCE)/$(PROJECT_SA_ROOT)/Include
+
+#
+# EDK II Glue Library utilizes some standard headers from EDK
+#
+ $(EFI_SOURCE)
+ $(EDK_SOURCE)/Foundation
+ $(EDK_SOURCE)/Foundation/Framework
+ $(EDK_SOURCE)/Foundation/Include/IndustryStandard
+ $(EDK_SOURCE)/Foundation/Core/Dxe
+ $(EDK_SOURCE)/Foundation/Include/Pei
+ $(EDK_SOURCE)/Foundation/Library/Dxe/Include
+ $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include
+ $(EFI_SOURCE)/Include
+
+[libraries.common]
+ PchPlatformLib
+
+[nmake.common]
+C_STD_INCLUDE=
+
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.lib b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.lib
new file mode 100644
index 0000000..e308456
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.lib
Binary files differ
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.mak b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.mak
new file mode 100644
index 0000000..ef8eef4
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.mak
@@ -0,0 +1,80 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartPeiLib/RapidStartPeiLib.mak 1 10/15/12 4:41a Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 10/15/12 4:41a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartPeiLib/RapidStartPeiLib.mak $
+#
+# 1 10/15/12 4:41a Bensonlai
+# [TAG] EIPNone
+# [Category] Improvement
+# [Description] [Category] Improvement
+# [Severity] Important
+# [Description] Rename all IFFS sting to Rapid Start.
+# [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+# [Files] RapidStartPeiLib.cif
+# RapidStartPeiLib.sdl
+# RapidStartPeiLib.mak
+# RapidStartPeiLib.c
+# RapidStartPeiLib.h
+# RapidStartPeiLib.inf
+# RapidStartPeiLib.lib
+# PeiCryptLib.lib
+# OpensslLib.lib
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RapidStartPeiLib.mak
+#
+# Description: Component description file for the RapidStart Peim library
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+all : RapidStartPeiLib
+
+$(RapidStartPeiLib_LIB) : RapidStartPeiLib
+
+RapidStartPeiLib : $(BUILD_DIR)\RapidStartPeiLib.mak RapidStartPeiLibBin
+
+$(BUILD_DIR)\RapidStartPeiLib.mak : $(RapidStartPeiLib_DIR)\$(@B).cif $(RapidStartPeiLib_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(RapidStartPeiLib_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+RapidStartPeiLibBin :
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\RapidStartPeiLib.mak all\
+ "MY_INCLUDES=$(EDK_INCLUDES) $(EdkIIGlueLib_INCLUDES) $(NB_INCLUDES) $(INTEL_MCH_INCLUDES) $(INTEL_PCH_INCLUDES) $(RAPIDSTART_INCLUDES)" \
+ TYPE=PEI_LIBRARY \
+ LIBRARY_NAME=$(RapidStartPeiLib_LIB)
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.sdl b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.sdl
new file mode 100644
index 0000000..7ea853b
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Library/RapidStartPlatformLib/Pei/RapidStartPeiLib.sdl
@@ -0,0 +1,101 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartPeiLib/RapidStartPeiLib.sdl 1 10/15/12 4:41a Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 10/15/12 4:41a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartPeiLib/RapidStartPeiLib.sdl $
+#
+# 1 10/15/12 4:41a Bensonlai
+# [TAG] EIPNone
+# [Category] Improvement
+# [Description] [Category] Improvement
+# [Severity] Important
+# [Description] Rename all IFFS sting to Rapid Start.
+# [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+# [Files] RapidStartPeiLib.cif
+# RapidStartPeiLib.sdl
+# RapidStartPeiLib.mak
+# RapidStartPeiLib.c
+# RapidStartPeiLib.h
+# RapidStartPeiLib.inf
+# RapidStartPeiLib.lib
+# PeiCryptLib.lib
+# OpensslLib.lib
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RapidStartPeiLib.sdl
+#
+# Description: SDL file for the RapidStart Peim library
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "RapidStartPeiLib_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable RapidStartPeiLib support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "RapidStartPeiLib_DIR"
+End
+
+MODULE
+ Help = "Includes RapidStartPeiLib.mak to Project"
+ File = "RapidStartPeiLib.mak"
+End
+
+ELINK
+ Name = "RapidStartPeiLib_LIB"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\RapidStartPeiLib.lib"
+ Parent = "RapidStartPeiLib_LIB"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/I$(RapidStartPeiLib_DIR)"
+ Parent = "RAPIDSTART_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/RapidStart.ssp b/Board/EM/RapidStartWrapper/RapidStart.ssp
new file mode 100644
index 0000000..908cabf
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/RapidStart.ssp
@@ -0,0 +1,246 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStart.ssp 2 3/21/13 5:49a Bensonlai $
+//
+// $Revision: 2 $
+//
+// $Date: 3/21/13 5:49a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStart.ssp $
+//
+// 2 3/21/13 5:49a Bensonlai
+// [TAG] EIP118812
+// [Category] Bug Fix
+// [Severity] Critical
+// [Symptom] Intel Rapid Start Technology issue on Sharkbay platform
+// [RootCause] FFS_NV_CONFIG_REG(0x47) didn't define to CMOS Manager.
+// [Solution] FFS_NV_CONFIG_REG(0x47) define to CMOS Manager.
+// [Files] RapidStart.ssp, RapidStartWrapper.sdl
+//
+// 1 10/15/12 4:39a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] [Category] Improvement
+// [Severity] Important
+// [Description] Rename all IFFS sting to Rapid Start.
+// [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+//
+// [Files] RapidStartWrapper.cif
+// RapidStartWrapper.sdl
+// RapidStart.ssp
+// Include\Mbr.h
+// Include\UefiGpt.h
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStart.ssp
+//
+// Description: This AMI Setup Script Processor (SSP) file contains setup items that
+// are related to the CMOS Manager.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+//---------------------------------------------------------------------------
+// CMOS manager starts auto-assigning at 0x40
+//
+// This is a typical CMOS usage arrangement.
+// (Note: these locations are not currently reserverd by default.)
+//---------------------------------------------------------------------------
+//
+// 0x00..0x3F Legacy CMOS area, used by CSM
+// 0x40..0x7F OEM/ODM
+// 0x80..0xBF Chipset
+// 0xC0..0xFF Core+Technologies
+//
+// This is the format of a CMOS token defintion:
+//---------------------------------------------------------------------------
+// NvramField (TOKEN_NAME)
+// OptionBits = integer // how many bits to use
+// [Default = integer] // assembler format "xxxh"
+// [CheckSum = YES | NO] // include=YES | exclude=NO
+// [Location = cmos address, clobber mask] // CMOS register, size/offset
+// EndNvramField
+
+
+//-----------------------------------------------------------------
+// TODO: Check if all 8 bits are needed for each of these locations
+//-----------------------------------------------------------------
+NvramField (CMOS_FFS_NV_CONFIG_REG)
+ OptionBits = 8
+ Default = 00h
+ CheckSum = NO
+ Location = MKF_FFS_NV_CONFIG_REG, 0FFh
+EndNvramField
+
+NvramField (CMOS_FFS_NV_FLAG_REG)
+ OptionBits = 8
+ Default = 00h
+ CheckSum = NO
+ Location = MKF_FFS_NV_FLAG_REG, 0FFh
+EndNvramField
+
+NvramField (CMOS_iFFS_CBTH_DATA_REG)
+ OptionBits = 8
+ Default = 0Ah
+ CheckSum = NO
+ Location = MKF_iFFS_CBTH_DATA_REG, 0FFh
+EndNvramField
+
+// 00 - 01
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD0)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0, 0FFFFh
+EndNvramField
+
+// 02 - 03
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD1)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+2, 0FFFFh
+EndNvramField
+
+// 04 - 05
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD2)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+4, 0FFFFh
+EndNvramField
+
+// 06 - 07
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD3)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+6, 0FFFFh
+EndNvramField
+
+// 08 - 09
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD4)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+8, 0FFFFh
+EndNvramField
+
+// 10 - 11
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD5)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+10, 0FFFFh
+EndNvramField
+
+// 12 - 13
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD6)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+12, 0FFFFh
+EndNvramField
+
+// 14 - 15
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD7)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+14, 0FFFFh
+EndNvramField
+
+// 16 - 17
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD8)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+16, 0FFFFh
+EndNvramField
+
+// 18 - 19
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD9)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+18, 0FFFFh
+EndNvramField
+
+// 20 - 21
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD10)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+20, 0FFFFh
+EndNvramField
+
+// 22 - 23
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD11)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+22, 0FFFFh
+EndNvramField
+
+// 24 - 25
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD12)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+24, 0FFFFh
+EndNvramField
+
+// 26 - 27
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD13)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+26, 0FFFFh
+EndNvramField
+
+// 28 - 29
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD14)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+28, 0FFFFh
+EndNvramField
+
+// 30 - 31
+NvramField (CMOS_iFFS_SMRAM_HASH_WORD15)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_iFFS_SMRAM_HASH_WORD0+30, 0FFFFh
+EndNvramField
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.c b/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.c
new file mode 100644
index 0000000..f8c8172
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.c
@@ -0,0 +1,248 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartSetup/RapidStartSetup.c 4 7/16/14 5:14a Joshchou $
+//
+// $Revision: 4 $
+//
+// $Date: 7/16/14 5:14a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartSetup/RapidStartSetup.c $
+//
+// 4 7/16/14 5:14a Joshchou
+// [TAG] EIP177828
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Restore Defaults on setup cannot set the SATA mode to
+// default.
+// [RootCause] When action == EFI_BROWSER_ACTION_DEFAULT_STANDARD.
+// Need to return unsupported.
+// [Solution] Add the judgement when action ==
+// EFI_BROWSER_ACTION_DEFAULT_STANDARD.
+//
+// 3 7/11/14 4:08a Joshchou
+// [TAG] EIP176979
+// [Category] Improvement
+// [Description] Change "#else if" to "#elif".
+//
+// 2 1/13/13 7:48a Bensonlai
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Disabling the RapidStart while STAT mode in the IDE
+// mode
+// [Files] RapidStartDxePolicyInit.c, RapidStartDxePolicyInit.h,
+// RapidStartDxePolicyInit.mak, RapidStartSetup.c, RapidStartSetup.mak,
+// RapidStartSetup.sd, RapidStartSetup.sdl
+//
+// 1 10/15/12 4:42a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] [Category] Improvement
+// [Severity] Important
+// [Description] Rename all IFFS sting to Rapid Start.
+// [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+// [Files] RapidStartSetup.cif
+// RapidStartSetup.sdl
+// RapidStartSetup.mak
+// RapidStartSetup.sd
+// RapidStartSetup.uni
+// RapidStartSetup.c
+// RapidStartSetup.h
+// RapidStartSetupReset.c
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartSetup.c
+//
+// Description: Create the setup item for RapidStart.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include <token.h>
+#include <Setup.h>
+#include <SetupStrTokens.h>
+#include "RapidStartSetup.h"
+#include <AmiCspLib.h>
+#include <AmiDxeLib.h>
+#if EFI_SPECIFICATION_VERSION>0x20000
+#include <Protocol\HiiDatabase.h>
+#include <Protocol\HiiString.h>
+#else
+#include <Protocol/Hii.h>
+#endif
+
+#if defined RAPID_START_PARTITION_DETECT_MODE && RAPID_START_PARTITION_DETECT_MODE == 1
+
+#define RAPID_START_PARTITION_STATUS_PROTOCOL_GUID \
+ { \
+ 0x65639144, 0xd492, 0x4328, 0xa4, 0x98, 0xf4, 0xb5, 0x54, 0x5e, 0x4a, 0x30 \
+ }
+
+#else
+
+#define RAPID_START_PERSISTENT_DATA_GUID \
+ { \
+ 0xf9f0b131, 0xf346, 0x4f16, 0x80, 0xdd, 0xf9, 0x41, 0x07, 0x2b, 0x3a, 0x7d \
+ }
+
+EFI_GUID gRapidStartPersistentDataGuid = RAPID_START_PERSISTENT_DATA_GUID;
+
+typedef struct {
+ UINT32 RapidStartMem;
+ UINT32 MmioSpace;
+ UINT32 RapidStartGlobalNvsPtr;
+ UINT32 StoreSectors;
+ UINT64 StoreLbaAddr;
+ UINT8 StoreSataPort;
+ UINT8 SataPortConfiguration;
+ UINT32 Tolm;
+ UINT64 Tohm;
+ UINT64 TotalMem;
+ UINT32 RapidStartMemSize;
+ UINT32 ZeroBitmapSize;
+ UINT32 WlanMmioSpace;
+ UINT64 SystemMemoryLengthBelow4GB;
+ UINT64 SystemMemoryLengthAbove4GB;
+ UINT64 AcpiReservedMemoryBase;
+ UINT32 AcpiReservedMemorySize;
+ UINT32 Crc32RecordSize;
+ UINT64 RapidStartStoreUid;
+ UINT32 ActivePageThresholdSizeInSector;
+} RAPID_START_PERSISTENT_DATA;
+
+#endif
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: InitRapidStartInfo
+//
+// Description: Initializes Intel Rapid Start Technology (RapidStart) Setup String
+//
+// Input: HiiHandle - Handle to HII database
+// Class - Indicates the setup class
+//
+// Output: None
+//
+// Notes: PORTING REQUIRED
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID
+InitRapidStartInfo(
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class
+)
+{
+ return;
+}
+
+EFI_STATUS
+EFIAPI
+RapidStartMenuEntry (
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class,
+ IN UINT16 SubClass,
+ IN UINT16 Key
+)
+{
+ EFI_STATUS Status;
+ CALLBACK_PARAMETERS *pCallbackData = NULL;
+ SETUP_DATA *SetupData = NULL;
+ UINTN BufferSize = sizeof(SETUP_DATA);
+ EFI_GUID SetupGuid = SETUP_GUID;
+#if defined RAPID_START_PARTITION_DETECT_MODE && RAPID_START_PARTITION_DETECT_MODE == 1
+ VOID *Empty;
+ EFI_GUID RapidStartPartitionProtocolGuid = RAPID_START_PARTITION_STATUS_PROTOCOL_GUID;
+#else
+ UINTN VariableSize = sizeof(RAPID_START_PERSISTENT_DATA);
+ RAPID_START_PERSISTENT_DATA RapidStartData;
+#endif
+ PCH_SERIES PchSeries = GetPchSeries();;
+
+ pCallbackData = GetCallbackParameters();
+ if (pCallbackData == NULL) return EFI_SUCCESS;
+
+ if(pCallbackData->Action == EFI_BROWSER_ACTION_DEFAULT_STANDARD) return EFI_UNSUPPORTED;
+
+ if (pCallbackData->Action == EFI_BROWSER_ACTION_FORM_OPEN) {
+#if defined RAPID_START_PARTITION_DETECT_MODE && RAPID_START_PARTITION_DETECT_MODE == 1
+ Status = pBS->LocateProtocol ( &RapidStartPartitionProtocolGuid,
+ NULL,
+ &Empty );
+#else
+ Status = pRS->GetVariable ( L"RapidStartData",
+ &gRapidStartPersistentDataGuid,
+ NULL,
+ &VariableSize,
+ &RapidStartData );
+#endif
+ if (!EFI_ERROR(Status)) {
+ // If RapidStart Persistent Data or RAPID_START_PARTITION_STATUS_PROTOCOL_GUID is exist,
+ // hidng the warning message.
+ InitString( HiiHandle, \
+ STRING_TOKEN(STR_RAPIDSTART_PAR_STATUS_PROMPT), \
+ L"");
+ }
+ }
+
+ // Check callback action
+#if ((TSE_BUILD >= 0x1224) && (EFI_SPECIFICATION_VERSION >= 0x2000A))
+ if (pCallbackData->Action != EFI_BROWSER_ACTION_CHANGED)
+ return EFI_SUCCESS;
+#elif ((TSE_BUILD > 0x1208) && (EFI_SPECIFICATION_VERSION >= 0x2000A))
+ if (pCallbackData->Action != EFI_BROWSER_ACTION_CHANGING)
+ return EFI_SUCCESS;
+#endif
+
+ Status = pBS->AllocatePool(EfiBootServicesData, BufferSize, &SetupData);
+
+ Status = HiiLibGetBrowserData( &BufferSize, SetupData, &SetupGuid, L"Setup" );
+
+ if (PchSeries == PchLp) {
+ if (SetupData->ULTSataInterfaceMode == 0) {
+ SetupData->RapidStartEnabled = 0;
+ }
+ } else {
+ if (SetupData->SataInterfaceMode == 0) {
+ SetupData->RapidStartEnabled = 0;
+ }
+ }
+
+ Status = HiiLibSetBrowserData( BufferSize, SetupData, &SetupGuid, L"Setup" );
+
+ pBS->FreePool(SetupData);
+
+
+ return EFI_SUCCESS;
+}
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.cif b/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.cif
new file mode 100644
index 0000000..38f3760
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.cif
@@ -0,0 +1,13 @@
+<component>
+ name = "RapidStartSetup"
+ category = ModulePart
+ LocalRoot = "Board\EM\RapidStartWrapper\RapidStartSetup"
+ RefName = "RapidStartSetup"
+[files]
+"RapidStartSetup.sdl"
+"RapidStartSetup.mak"
+"RapidStartSetup.sd"
+"RapidStartSetup.uni"
+"RapidStartSetup.c"
+"RapidStartSetup.h"
+<endComponent>
diff --git a/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.h b/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.h
new file mode 100644
index 0000000..bc9b688
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.h
@@ -0,0 +1,76 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartSetup/RapidStartSetup.h 1 10/15/12 4:42a Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 10/15/12 4:42a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartSetup/RapidStartSetup.h $
+//
+// 1 10/15/12 4:42a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] [Category] Improvement
+// [Severity] Important
+// [Description] Rename all IFFS sting to Rapid Start.
+// [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+// [Files] RapidStartSetup.cif
+// RapidStartSetup.sdl
+// RapidStartSetup.mak
+// RapidStartSetup.sd
+// RapidStartSetup.uni
+// RapidStartSetup.c
+// RapidStartSetup.h
+// RapidStartSetupReset.c
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartSetup.h
+//
+// Description: Header file for RapidStart.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifndef __RapidStart_SETUP_H__
+#define __RapidStart_SETUP_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/****** DO NOT WRITE BELOW THIS LINE *******/
+#ifdef __cplusplus
+}
+#endif
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.mak b/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.mak
new file mode 100644
index 0000000..2e563d7
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.mak
@@ -0,0 +1,97 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartSetup/RapidStartSetup.mak 3 5/03/13 2:53a Bensonlai $
+#
+# $Revision: 3 $
+#
+# $Date: 5/03/13 2:53a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartSetup/RapidStartSetup.mak $
+#
+# 3 5/03/13 2:53a Bensonlai
+# [TAG] None
+# [Category] Improvement
+# [Description] After changed the iRST status, we don't have to do a
+# cold reset.
+#
+# 2 1/13/13 7:49a Bensonlai
+# [TAG] EIPNone
+# [Category] Improvement
+# [Description] Disabling the RapidStart while STAT mode in the IDE
+# mode
+# [Files] RapidStartDxePolicyInit.c, RapidStartDxePolicyInit.h,
+# RapidStartDxePolicyInit.mak, RapidStartSetup.c, RapidStartSetup.mak,
+# RapidStartSetup.sd, RapidStartSetup.sdl
+#
+# 1 10/15/12 4:42a Bensonlai
+# [TAG] None
+# [Category] Improvement
+# [Description] [Category] Improvement
+# [Severity] Important
+# [Description] Rename all IFFS sting to Rapid Start.
+# [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+# [Files] RapidStartSetup.cif
+# RapidStartSetup.sdl
+# RapidStartSetup.mak
+# RapidStartSetup.sd
+# RapidStartSetup.uni
+# RapidStartSetup.c
+# RapidStartSetup.h
+# RapidStartSetupReset.c
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RapidStartSetup.mak
+#
+# Description: Component description file for the RapidStart
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+All : RapidStartSetup
+
+RapidStartSetup : $(BUILD_DIR)\RapidStartSetup.mak
+
+SetupSdbs : $(BUILD_DIR)\RapidStartSetup.sdb
+
+$(BUILD_DIR)\RapidStartSetup.sdb : $(RapidStartSetup_DIR)\$(@B).sd $(RapidStartSetup_DIR)\$(@B).uni
+ $(STRGATHER) -i INCLUDE -parse -newdb -db $(BUILD_DIR)\$(@B).sdb $(RapidStartSetup_DIR)\$(@B).uni
+ $(STRGATHER) -scan -db $(BUILD_DIR)\$(@B).sdb -od $(BUILD_DIR)\$(@B).sdb $(RapidStartSetup_DIR)\$(@B).sd
+
+$(BUILD_DIR)\RapidStartSetup.mak : $(RapidStartSetup_DIR)\$(@B).cif $(RapidStartSetup_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(RapidStartSetup_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+SetupBin : $(BUILD_DIR)\RapidStartSetup.obj
+
+$(BUILD_DIR)\RapidStartSetup.obj : $(PROJECT_DIR)\$(RapidStartSetup_DIR)\RapidStartSetup.c $(BUILD_DIR)\SetupStrTokens.h $(AMICSPLib)
+ $(CC) $(CFLAGS) $(INTEL_PCH_INCLUDES) /I$(RapidStartInclude_DIR) /Fo$(BUILD_DIR)\ $(RapidStartSetup_DIR)\RapidStartSetup.c
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.sd b/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.sd
new file mode 100644
index 0000000..751d63f
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.sd
@@ -0,0 +1,367 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartSetup/RapidStartSetup.sd 4 1/15/13 4:46a Bensonlai $
+//
+// $Revision: 4 $
+//
+// $Date: 1/15/13 4:46a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartSetup/RapidStartSetup.sd $
+//
+// 4 1/15/13 4:46a Bensonlai
+// [TAG] EIP112263
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] [RapidStart] Instant-on can't work
+// [RootCause] Intel reference code can't work on AMI base.
+// [Solution] Modified the PeiGfxDriver.dxs and RapidStartDxe.dxs for
+// AMI code
+// [Files] RapidStartDxePolicyInit.c, RapidStartSetup.uni,
+// RapidStartSetup.sdl, RapidStartSetup.sd, PeiGfxDriver.dxs,
+// RapidStartDxe.dxs
+//
+// 3 1/13/13 7:49a Bensonlai
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Disabling the RapidStart while STAT mode in the IDE
+// mode
+// [Files] RapidStartDxePolicyInit.c, RapidStartDxePolicyInit.h,
+// RapidStartDxePolicyInit.mak, RapidStartSetup.c, RapidStartSetup.mak,
+// RapidStartSetup.sd, RapidStartSetup.sdl
+//
+// 2 12/27/12 1:17a Bensonlai
+// [TAG] EIP110680
+// [Category] New Feature
+// [Description] When iRST application is run under OS, and change
+// timer.
+// BIOS should update the changed to Setup option as well.
+// [Files] Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.c
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.h
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.mak
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.dxs
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.sdl
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.cif
+// Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.cif
+// Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.sdl
+// Board\EM\RapidStartWrapper\AcpiTables\Ssdt\RapidStartWrapper.asl
+// Board\EM\RapidStartWrapper\RapidStartSetup\RapidStartSetup.sd
+//
+// 1 10/15/12 4:42a Bensonlai
+// [TAG] None
+// [Category] Improvement
+// [Description] [Category] Improvement
+// [Severity] Important
+// [Description] Rename all IFFS sting to Rapid Start.
+// [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+// [Files] RapidStartSetup.cif
+// RapidStartSetup.sdl
+// RapidStartSetup.mak
+// RapidStartSetup.sd
+// RapidStartSetup.uni
+// RapidStartSetup.c
+// RapidStartSetup.h
+// RapidStartSetupReset.c
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartSetup.sd
+//
+// Description: Create the setup item for RapidStart.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifndef SATA_MODE_IDE
+#define SATA_MODE_IDE 0
+#endif
+
+#ifndef SATA_MODE_AHCI
+#define SATA_MODE_AHCI 1
+#endif
+
+#ifndef SATA_MODE_RAID
+#define SATA_MODE_RAID 2
+#endif
+
+#ifdef SETUP_DATA_DEFINITION
+/***********************************************************/
+/* Put NVRAM data definitions here.
+/* For example: UINT8 Data1;
+/* These definitions will be converted by the build process
+/* to a definitions of SETUP_DATA fields.
+/***********************************************************/
+
+ UINT8 RapidStartEnabled;
+ UINT8 EntryOnS3RtcWake;
+ UINT16 S3WakeTimerMin;
+ UINT8 EntryOnS3CritBattWake;
+ UINT8 CritBattWakeThreshold;
+ UINT8 ActivePageThresholdSupport;
+ UINT32 ActivePageThresholdSize;
+ UINT8 RapidStartLock;
+ UINT8 RapidStartHybridHardDisk;
+ UINT8 RapidStartDisplaySaveRestore;
+ UINT8 RapidStartDisplayType;
+#endif
+
+#if defined(VFRCOMPILE) && !defined(CONTROLS_ARE_DEFINED)
+#define CONTROL_DEFINITION
+#endif
+//---------------------------------------------------------------------------
+
+//---------------------------------------------------------------------------
+#ifdef CONTROL_DEFINITION
+
+#define RAPIDSTART_ONEOF_RAPIDSTARTENABLED\
+ oneof varid = SETUP_DATA.RapidStartEnabled,\
+ prompt = STRING_TOKEN(STR_RAPIDSTART_SUPPORT_PROMPT),\
+ help = STRING_TOKEN(STR_RAPIDSTART_SUPPORT_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define RAPIDSTART_ONEOF_ENTRYONS3RTCWAKE\
+ oneof varid = SETUP_DATA.EntryOnS3RtcWake,\
+ prompt = STRING_TOKEN(STR_S3_RTC_WAKE_PROMPT),\
+ help = STRING_TOKEN(STR_S3_RTC_WAKE_SUPPORT_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define RAPIDSTART_ONEOF_S3WAKETIMERMIN\
+ numeric varid = SETUP_DATA.S3WakeTimerMin,\
+ prompt = STRING_TOKEN(STR_S3_WAKE_TIMER_MIN_PROMPT),\
+ help = STRING_TOKEN(STR_S3_WAKE_TIMER_MIN_SUPPORT_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 120,\
+ step = 1,\
+ default = 10,\
+ endnumeric;
+
+#define RAPIDSTART_ONEOF_ENTRYONS3CRITBATTWAKE\
+ oneof varid = SETUP_DATA.EntryOnS3CritBattWake,\
+ prompt = STRING_TOKEN(STR_CRIT_BATT_WAKE_PROMPT),\
+ help = STRING_TOKEN(STR_CRIT_BATT_WAKE_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define RAPIDSTART_ONEOF_ACTIVEPAGETHRESHOLDSUPPORT\
+ oneof varid = SETUP_DATA.ActivePageThresholdSupport,\
+ prompt = STRING_TOKEN(STR_ACT_PAGE_SUPPORT_PROMPT),\
+ help = STRING_TOKEN(STR_ACT_PAGE_SUPPORT_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define RAPIDSTART_ONEOF_ACTIVEPAGETHRESHOLDSIZE\
+ numeric varid = SETUP_DATA.ActivePageThresholdSize,\
+ prompt = STRING_TOKEN(STR_ACT_PAGE_SIZE_PROMPT),\
+ help = STRING_TOKEN(STR_ACT_PAGE_SIZE_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 65535,\
+ step = 1,\
+ default = 0,\
+ endnumeric;
+
+#define RAPIDSTART_ONEOF_CRITBATTWAKETHRESHOLD\
+ numeric varid = SETUP_DATA.CritBattWakeThreshold,\
+ prompt = STRING_TOKEN (STR_CRIT_BAT_WAK_THRHLD),\
+ help = STRING_TOKEN (STR_CRIT_BAT_WAK_THRHLD_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 100,\
+ step = 1,\
+ default = 10,\
+ endnumeric;
+
+#define RAPIDSTART_ONEOF_RAPIDSTARTPARSTATUSSTRING\
+ text\
+ help = STRING_TOKEN(STR_EMPTY_STRING),\
+ text = STRING_TOKEN(STR_RAPIDSTART_PAR_STATUS_PROMPT),\
+ text = STRING_TOKEN(STR_EMPTY_STRING),\
+ flags = 0,\
+ key = 0;\
+
+#define RAPIDSTART_ONEOF_RAPIDSTARTHYBRIDHARDDISK\
+ oneof varid = SETUP_DATA.RapidStartHybridHardDisk,\
+ prompt = STRING_TOKEN(STR_HYBRID_HARD_DISK_SUPPORT_PROMPT),\
+ help = STRING_TOKEN(STR_HYBRID_HARD_DISK_SUPPORT_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define RAPIDSTART_ONEOF_RAPIDSTARTDISPLAYSAVERESTORE\
+ oneof varid = SETUP_DATA.RapidStartDisplaySaveRestore,\
+ prompt = STRING_TOKEN(STR_DISPLAY_SAVE_RESTORE_PROMPT),\
+ help = STRING_TOKEN(STR_DISPLAY_SAVE_RESTORE_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define RAPIDSTART_ONEOF_RAPIDSTARTDISPLAYTYPE\
+ oneof varid = SETUP_DATA.RapidStartDisplayType,\
+ prompt = STRING_TOKEN(STR_DISPLAY_TYPE_PROMPT),\
+ help = STRING_TOKEN(STR_DISPLAY_TYPE_HELP),\
+ option text = STRING_TOKEN(STR_BIOS_SAVE_RESTORE_HELP), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DESKTOP_SAVE_RESTORE_TYPE_HELP), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#ifdef SB_ONEOF_SATAINTERFACEMODE
+#undef SB_ONEOF_SATAINTERFACEMODE
+#define SB_ONEOF_SATAINTERFACEMODE\
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;\
+ suppressif ideqval SETUP_DATA.PchSata == 0;\
+ oneof varid = SETUP_DATA.SataInterfaceMode,\
+ prompt = STRING_TOKEN (STR_SATA_MODE_SELECTION_PROMPT),\
+ help = STRING_TOKEN (STR_SATA_MODE_SELECTION_HELP),\
+ option text = STRING_TOKEN (STR_SATA_IDE), value = SATA_MODE_IDE, flags = RESET_REQUIRED | INTERACTIVE, key = AUTO_ID(KEY_IDE);\
+ option text = STRING_TOKEN (STR_SATA_AHCI), value = SATA_MODE_AHCI, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = AUTO_ID(KEY_AHCI);\
+ option text = STRING_TOKEN (STR_SATA_RAID), value = SATA_MODE_RAID, flags = RESET_REQUIRED, key = AUTO_ID(KEY_RAID);\
+ endoneof;\
+ SUPPRESS_GRAYOUT_ENDIF
+#endif
+
+#endif // CONTROL_DEFINITION
+//---------------------------------------------------------------------------
+
+//---------------------------------------------------------------------------
+#ifdef CONTROLS_WITH_DEFAULTS
+ RAPIDSTART_ONEOF_RAPIDSTARTENABLED
+ RAPIDSTART_ONEOF_ENTRYONS3RTCWAKE
+ RAPIDSTART_ONEOF_S3WAKETIMERMIN
+ RAPIDSTART_ONEOF_ENTRYONS3CRITBATTWAKE
+ RAPIDSTART_ONEOF_CRITBATTWAKETHRESHOLD
+ RAPIDSTART_ONEOF_ACTIVEPAGETHRESHOLDSUPPORT
+ RAPIDSTART_ONEOF_ACTIVEPAGETHRESHOLDSIZE
+ RAPIDSTART_ONEOF_RAPIDSTARTPARSTATUSSTRING
+ RAPIDSTART_ONEOF_RAPIDSTARTHYBRIDHARDDISK
+ RAPIDSTART_ONEOF_RAPIDSTARTDISPLAYSAVERESTORE
+ RAPIDSTART_ONEOF_RAPIDSTARTDISPLAYTYPE
+#endif // CONTROLS_WITH_DEFAULTS
+//---------------------------------------------------------------------------
+
+
+//**********************************************************************
+// Advanced - RAPIDSTART Configuration Form
+//**********************************************************************
+
+#ifdef ADVANCED_FORM_SET
+
+#ifdef FORM_SET_TYPEDEF
+ #include <RapidStartSetup.h>
+#endif
+
+ #ifndef SUPPRESS_GRAYOUT_ENDIF //old Core
+ #define SUPPRESS_GRAYOUT_ENDIF endif;
+ #endif
+
+ #ifdef FORM_SET_GOTO
+ // Define goto commands for the forms defined in this file
+ goto RAPIDSTART_FORM_ID,
+ prompt = STRING_TOKEN(STR_RAPIDSTART_FORM),
+ help = STRING_TOKEN(STR_RAPIDSTART_FORM_HELP);
+ #endif
+
+ #ifdef FORM_SET_FORM
+ // Define forms
+ #ifndef RAPIDSTART_FORM_SETUP
+ #define RAPIDSTART_FORM_SETUP
+ form formid = AUTO_ID(RAPIDSTART_FORM_ID),
+ title = STRING_TOKEN(STR_RAPIDSTART_FORM);
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER OR
+ ideqval SETUP_DATA.RapidStartLock == 1;
+ RAPIDSTART_ONEOF_RAPIDSTARTENABLED
+ endif;
+
+ SEPARATOR
+
+ suppressif ideqval SETUP_DATA.RapidStartEnabled == 0;
+ RAPIDSTART_ONEOF_RAPIDSTARTPARSTATUSSTRING
+ endif;
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval SETUP_DATA.RapidStartEnabled == 0;
+ RAPIDSTART_ONEOF_ENTRYONS3RTCWAKE
+ SUPPRESS_GRAYOUT_ENDIF
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval SETUP_DATA.RapidStartEnabled == 0 OR ideqval SETUP_DATA.EntryOnS3RtcWake == 0;
+ RAPIDSTART_ONEOF_S3WAKETIMERMIN
+ SUPPRESS_GRAYOUT_ENDIF
+
+#if defined CRB_EC_SUPPORT && CRB_EC_SUPPORT == 1
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval SETUP_DATA.RapidStartEnabled == 0;
+ RAPIDSTART_ONEOF_ENTRYONS3CRITBATTWAKE
+ SUPPRESS_GRAYOUT_ENDIF
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval SETUP_DATA.RapidStartEnabled == 0 OR ideqval SETUP_DATA.EntryOnS3CritBattWake == 0;
+ RAPIDSTART_ONEOF_CRITBATTWAKETHRESHOLD
+ SUPPRESS_GRAYOUT_ENDIF
+#endif
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval SETUP_DATA.RapidStartEnabled == 0;
+ RAPIDSTART_ONEOF_ACTIVEPAGETHRESHOLDSUPPORT
+ SUPPRESS_GRAYOUT_ENDIF
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval SETUP_DATA.RapidStartEnabled == 0 OR ideqval SETUP_DATA.ActivePageThresholdSupport == 0;
+ RAPIDSTART_ONEOF_ACTIVEPAGETHRESHOLDSIZE
+ SUPPRESS_GRAYOUT_ENDIF
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval SETUP_DATA.RapidStartEnabled == 0;
+ RAPIDSTART_ONEOF_RAPIDSTARTHYBRIDHARDDISK
+ SUPPRESS_GRAYOUT_ENDIF
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval SETUP_DATA.RapidStartEnabled == 0;
+ RAPIDSTART_ONEOF_RAPIDSTARTDISPLAYSAVERESTORE
+ SUPPRESS_GRAYOUT_ENDIF
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval SETUP_DATA.RapidStartEnabled == 0 OR ideqval SETUP_DATA.RapidStartDisplaySaveRestore == 0;
+ RAPIDSTART_ONEOF_RAPIDSTARTDISPLAYTYPE
+ SUPPRESS_GRAYOUT_ENDIF
+
+ endform;
+ #endif // RAPIDSTART_FORM_SETUP
+ #endif // FORM_SET_FORM
+
+#endif // ADVANCED_FORM_SET
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.sdl b/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.sdl
new file mode 100644
index 0000000..31e34cc
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.sdl
@@ -0,0 +1,161 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartSetup/RapidStartSetup.sdl 4 5/03/13 2:54a Bensonlai $
+#
+# $Revision: 4 $
+#
+# $Date: 5/03/13 2:54a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartSetup/RapidStartSetup.sdl $
+#
+# 4 5/03/13 2:54a Bensonlai
+# [TAG] None
+# [Category] Improvement
+# [Description] After changed the iRST status, we don't have to do a
+# cold reset.
+#
+# 3 1/15/13 4:46a Bensonlai
+# [TAG] EIP112263
+# [Category] Bug Fix
+# [Severity] Normal
+# [Symptom] [RapidStart] Instant-on can't work
+# [RootCause] Intel reference code can't work on AMI base.
+# [Solution] Modified the PeiGfxDriver.dxs and RapidStartDxe.dxs for
+# AMI code
+# [Files] RapidStartDxePolicyInit.c, RapidStartSetup.uni,
+# RapidStartSetup.sdl, RapidStartSetup.sd, PeiGfxDriver.dxs,
+# RapidStartDxe.dxs
+#
+# 2 1/13/13 7:49a Bensonlai
+# [TAG] EIPNone
+# [Category] Improvement
+# [Description] Disabling the RapidStart while STAT mode in the IDE
+# mode
+# [Files] RapidStartDxePolicyInit.c, RapidStartDxePolicyInit.h,
+# RapidStartDxePolicyInit.mak, RapidStartSetup.c, RapidStartSetup.mak,
+# RapidStartSetup.sd, RapidStartSetup.sdl
+#
+# 1 10/15/12 4:42a Bensonlai
+# [TAG] None
+# [Category] Improvement
+# [Description] [Category] Improvement
+# [Severity] Important
+# [Description] Rename all IFFS sting to Rapid Start.
+# [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+# [Files] RapidStartSetup.cif
+# RapidStartSetup.sdl
+# RapidStartSetup.mak
+# RapidStartSetup.sd
+# RapidStartSetup.uni
+# RapidStartSetup.c
+# RapidStartSetup.h
+# RapidStartSetupReset.c
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RapidStartSetup.sdl
+#
+# Description: SDL file for the RapidStart
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "RapidStart_Setup"
+ Value = "1"
+ Help = "Main switch to enable RapidStart Setup support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "RapidStartSetup_DIR"
+End
+
+MODULE
+ Help = "Includes RapidStartSetup.mak to Project"
+ File = "RapidStartSetup.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\RapidStartSetup.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 30
+ Help = "Includes generic FFS setup screens to the project"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(RapidStartSetup_DIR)\RapidStartSetup.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 30
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/I$(RapidStartSetup_DIR)"
+ Parent = "RAPIDSTART_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "-i $(RapidStartSetup_DIR)"
+ Parent = "SETUP_VFR_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "InitRapidStartInfo,"
+ Parent = "SetupStringInit"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS, 0, KEY_IDE, RapidStartMenuEntry),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS, 0, KEY_AHCI, RapidStartMenuEntry),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS, 0, KEY_RAID, RapidStartMenuEntry),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.uni b/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.uni
new file mode 100644
index 0000000..4f4e34b
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/RapidStartSetup/RapidStartSetup.uni
Binary files differ
diff --git a/Board/EM/RapidStartWrapper/RapidStartWrapper.cif b/Board/EM/RapidStartWrapper/RapidStartWrapper.cif
new file mode 100644
index 0000000..d784cff
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/RapidStartWrapper.cif
@@ -0,0 +1,19 @@
+<component>
+ name = "RapidStartWrapper"
+ category = ModulePart
+ LocalRoot = "Board\EM\RapidStartWrapper"
+ RefName = "RapidStartWrapper"
+[files]
+"RapidStartWrapper.sdl"
+"RapidStart.ssp"
+"Include\Mbr.h"
+"Include\UefiGpt.h"
+[parts]
+"RapidStartDxePolicyInit"
+"RapidStartCommonLib"
+"RapidStartDxeLib"
+"RapidStartPeiLib"
+"RapidStartSetup"
+"RapidStartWrapperSmm"
+"RapidStartWrapperAcpiTables"
+<endComponent>
diff --git a/Board/EM/RapidStartWrapper/RapidStartWrapper.sdl b/Board/EM/RapidStartWrapper/RapidStartWrapper.sdl
new file mode 100644
index 0000000..dad40ea
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/RapidStartWrapper.sdl
@@ -0,0 +1,219 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartWrapper.sdl 3 4/15/13 2:33a Bensonlai $
+#
+# $Revision: 3 $
+#
+# $Date: 4/15/13 2:33a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartWrapper.sdl $
+#
+# 3 4/15/13 2:33a Bensonlai
+# [TAG] None
+# [Category] Bug Fix
+# [Severity] Important
+# [Symptom] If users change any item from driver then restore to boot
+# setting, our SMI can't distinguish between user's and driver's event.
+# [RootCause] It's an Intel driver issue.
+# [Solution] 1. Removing the sync up with Rapid Start driver and BIOS
+# variable as default.
+# 2. Remove our BIOS workaround.
+# [Files] RapidStartWrapperSmm.sdl, RapidStartWrapperSmm.h,
+# RapidStartWrapperSmm.sdl, RapidStartWrapperAcpiTables.sdl,
+# RapidStartWrapper.sdl
+#
+# 2 3/21/13 5:49a Bensonlai
+# [TAG] EIP118812
+# [Category] Bug Fix
+# [Severity] Critical
+# [Symptom] Intel Rapid Start Technology issue on Sharkbay platform
+# [RootCause] FFS_NV_CONFIG_REG(0x47) didn't define to CMOS Manager.
+# [Solution] FFS_NV_CONFIG_REG(0x47) define to CMOS Manager.
+# [Files] RapidStart.ssp, RapidStartWrapper.sdl
+#
+# 1 10/15/12 4:39a Bensonlai
+# [TAG] None
+# [Category] Improvement
+# [Description] [Category] Improvement
+# [Severity] Important
+# [Description] Rename all IFFS sting to Rapid Start.
+# [Files] Board\EM\RapidStartWrapper\*.*, ReferenceCode\RapidStart\*.*
+#
+# [Files] RapidStartWrapper.cif
+# RapidStartWrapper.sdl
+# RapidStart.ssp
+# Include\Mbr.h
+# Include\UefiGpt.h
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RapidStartWrapper.sdl
+#
+# Description: SDL file for the RapidStartWrapper.
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "RapidStartWrapper_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable RapidStartWrapper support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "FFS_NV_CONFIG_REG"
+ Value = "0x47"
+ Help = "Save CMOS RapidStartFlag REG"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Lock = Yes
+ Token = "CMOS_MANAGER_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "FFS_NV_FLAG_REG"
+ Value = "0x88"
+ Help = "Save CMOS RapidStartFlag REG"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Lock = Yes
+ Token = "CMOS_MANAGER_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "iFFS_CBTH_DATA_REG"
+ Value = "0x89"
+ Help = "Save critical battery threshole value"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Lock = Yes
+ Token = "CMOS_MANAGER_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "iFFS_SMRAM_HASH_WORD0"
+ Value = "0xA0"
+ Help = "Save SMRAM hash value."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Lock = Yes
+ Token = "CMOS_MANAGER_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "LOCK_DISABLE_RAPID_START_IF_NO_SSD"
+ Value = "0"
+ Help = "Lock and disable Rapid Start if no SSD found."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SYNC_UP_DRIVER_AND_BIOS_VARIABLE"
+ Value = "0"
+ Help = "If you set the token to 1, please modify the register key(SkipRestoreSettingOnExit) to 1 for Rapid Start driver in Setup.if2"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "RAPID_START_PARTITION_DETECT_MODE"
+ Value = "1"
+ Help = "0: Detect Rapid Start Partition in ReadyToBoot phase(Intel RC original).\1: Detect Rapid Start partition after BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID to be installed."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+PATH
+ Name = "RapidStartWrapper_DIR"
+End
+
+ELINK
+ Name = "$(RapidStartWrapper_DIR)\RapidStart.ssp"
+ Parent = "ADDON_SSP_FILES"
+ Token = "CMOS_MANAGER_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/D FFS_NV_CONFIG_REG=$(FFS_NV_CONFIG_REG)"
+ Parent = "CFLAGS"
+ Token = "CMOS_MANAGER_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/D FFS_NV_FLAG_REG=$(FFS_NV_FLAG_REG)"
+ Parent = "CFLAGS"
+ Token = "CMOS_MANAGER_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/D FFS_CBTH_DATA_REG=$(iFFS_CBTH_DATA_REG)"
+ Parent = "CFLAGS"
+ Token = "CMOS_MANAGER_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/D FFS_SMRAM_HASH_DATA_REG=$(iFFS_SMRAM_HASH_WORD0)"
+ Parent = "CFLAGS"
+ Token = "CMOS_MANAGER_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/I$(RapidStartWrapper_DIR)\Include"
+ Parent = "RAPIDSTART_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/D RAPID_START_PARTITION_DETECT_BEFORE_SETUP"
+ Parent = "GLOBAL_DEFINES"
+ InvokeOrder = AfterParent
+ Token = "RAPID_START_PARTITION_DETECT_MODE" "=" "1"
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.c b/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.c
new file mode 100644
index 0000000..2d21006
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.c
@@ -0,0 +1,238 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartWrapperSmm.c 3 5/13/14 4:56a Joshchou $
+//
+// $Revision: 3 $
+//
+// $Date: 5/13/14 4:56a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartWrapperSmm.c $
+//
+// 3 5/13/14 4:56a Joshchou
+// [TAG] EIP167032
+// [Category] Improvement
+// [Description] Review the variable's attribute, we shouldn't use
+// runtime attribute with setup variable.
+// [Files] RapidStartWrapperSmm.c
+// RapidStartWrapperSmm.h
+// RapidStartWrapperSmm.cif
+//
+// 2 4/15/13 2:36a Bensonlai
+// [TAG] None
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] If users change any item from driver then restore to boot
+// setting, our SMI can't distinguish between user's and driver's event.
+// [RootCause] It's an Intel driver issue.
+// [Solution] 1. Removing the sync up with Rapid Start driver and BIOS
+// variable as default.
+// 2. Remove our BIOS workaround.
+// [Files] RapidStartWrapperSmm.sdl, RapidStartWrapperSmm.h,
+// RapidStartWrapperSmm.sdl, RapidStartWrapperAcpiTables.sdl,
+// RapidStartWrapper.sdl
+//
+// 1 12/27/12 2:23a Bensonlai
+// [TAG] EIP110680
+// [Category] New Feature
+// [Description] When iRST application is run under OS, and change
+// timer.
+// BIOS should update the changed to Setup option as well.
+// [Files] Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.c
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.h
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.mak
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.dxs
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.sdl
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.cif
+// Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.cif
+// Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.sdl
+// Board\EM\RapidStartWrapper\AcpiTables\Ssdt\RapidStartWrapper.asl
+// Board\EM\RapidStartWrapper\RapidStartSetup\RapidStartSetup.sd
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartWrapperSmm.c
+//
+// Description: Sw SMI for RapidStart Wrapper
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include "RapidStartWrapperSmm.h"
+
+VOID* InternalGetSmstConfigurationTable(IN EFI_GUID *TableGuid) {
+ EFI_CONFIGURATION_TABLE *Table;
+ UINTN i;
+ EFI_STATUS Status;
+
+ if (mSmmBase == NULL) {
+ Status = gBS->LocateProtocol (&gEfiSmmBaseProtocolGuid, NULL, &mSmmBase);
+ if (EFI_ERROR(Status) || mSmmBase == NULL)return NULL;
+ }
+
+ if (mSmst == NULL ) {
+ if (mSmmBase!=NULL) {
+ Status = mSmmBase->GetSmstLocation (mSmmBase, &mSmst);
+ if (EFI_ERROR(Status) || mSmst == NULL)return NULL;
+ }
+ }
+
+ if (mSmst != NULL) {
+ Table = mSmst->SmmConfigurationTable;
+ i = mSmst->NumberOfTableEntries;
+
+ for (; i; --i,++Table)
+ {
+ if (CompareGuid(&Table->VendorGuid,TableGuid))
+ return Table->VendorTable;
+ }
+ }
+ return NULL;
+}
+
+VOID
+RapidStartSyncVariable (
+ VOID
+)
+{
+ EFI_STATUS Status;
+ RAPID_START_WRAPPER_SMM_DATA RapidStartWrapperSmmData;
+ RapidStartWrapperSmmData.S3WakeTimerMin = mRapidStartGlobalNvs->WakeTimerMin;
+
+ if ( (mRapidStartGlobalNvs->EventsEnabled & RAPID_START_ACPI_RTC_WAKE) != 0) {
+ RapidStartWrapperSmmData.EntryOnS3RtcWake = 1;
+ } else {
+ RapidStartWrapperSmmData.EntryOnS3RtcWake = 0;
+ }
+
+ if ( (mRapidStartGlobalNvs->EventsEnabled & RAPID_START_ACPI_BATT_WAKE) != 0) {
+ RapidStartWrapperSmmData.EntryOnS3CritBattWake = 1;
+ } else {
+ RapidStartWrapperSmmData.EntryOnS3CritBattWake = 0;
+ }
+
+ Status = mySMMgRT->SetVariable( L"RstWrapVar", \
+ &RapidStartWrapperSmmDataGuid, \
+ EFI_VARIABLE_NON_VOLATILE | \
+ EFI_VARIABLE_BOOTSERVICE_ACCESS | \
+ EFI_VARIABLE_RUNTIME_ACCESS, \
+ sizeof (RAPID_START_WRAPPER_SMM_DATA), \
+ &RapidStartWrapperSmmData
+ );
+
+ if ( EFI_ERROR(Status) ) {
+ return;
+ }
+
+ return;
+}
+
+VOID
+RapidStartWrapperSwSmiCallback (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_SW_DISPATCH_CONTEXT *DispatchContext
+)
+{
+ UINT8 WrapperFunctionIndex;
+
+ WrapperFunctionIndex = IoRead8(SW_SMI_IO_DATA_ADDRESS); // Get Wrapper Function Index
+ IoWrite8(SW_SMI_IO_DATA_ADDRESS, 0x00); // Clear data
+
+ switch ( WrapperFunctionIndex ) {
+ case AMI_RAPID_START_SYNC_VARIABLE_FUNCTION:
+ RapidStartSyncVariable();
+ break;
+
+ default :
+ break;
+ }
+
+ return;
+}
+
+EFI_STATUS
+RapidStartWrapperSmmEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ RAPID_START_GLOBAL_NVS_AREA_PROTOCOL *RapidStartGlobalNvsAreaProtocol;
+ EFI_SMM_SW_DISPATCH_PROTOCOL *SwDispatch;
+ EFI_SMM_SW_DISPATCH_CONTEXT SwContext;
+ EFI_HANDLE DispatchHandle;
+ EFI_STATUS Status;
+ VOID *ptrRs;
+
+ ptrRs = InternalGetSmstConfigurationTable(&SmmRtServTableGuid);
+ if (ptrRs!=NULL) mySMMgRT = ptrRs;
+
+ DEBUG ((EFI_D_INFO, "RapidStartWrapperSmmEntryPoint()\n"));
+
+ Status = gBS->LocateProtocol (
+ &gRapidStartGlobalNvsAreaProtocolGuid,
+ NULL,
+ (VOID **) &RapidStartGlobalNvsAreaProtocol
+ );
+
+ if ( EFI_ERROR (Status) ) {
+ DEBUG ((EFI_D_INFO, "No RapidStart info protocol available\n"));
+ return Status;
+ }
+
+ mRapidStartGlobalNvs = RapidStartGlobalNvsAreaProtocol->Area;
+ DEBUG ((EFI_D_INFO, "RapidStartGlobalNvs: %x\n", mRapidStartGlobalNvs));
+
+ ///
+ /// Locate the SMM SW dispatch protocol
+ ///
+ Status = gBS->LocateProtocol (&gEfiSmmSwDispatchProtocolGuid, NULL, &SwDispatch);
+ if ( EFI_ERROR (Status) ) {
+ return Status;
+ }
+
+ ///
+ /// Register SWSMI handler
+ ///
+ DEBUG ((EFI_D_INFO, "Register SW_SMI_RAPID_START_WRAPPER: %x\n", SW_SMI_RAPID_START_WRAPPER));
+ SwContext.SwSmiInputValue = SW_SMI_RAPID_START_WRAPPER;
+ Status = SwDispatch->Register (
+ SwDispatch,
+ RapidStartWrapperSwSmiCallback,
+ &SwContext,
+ &DispatchHandle
+ );
+ if ( EFI_ERROR (Status) ) {
+ return Status;
+ }
+
+ return EFI_SUCCESS;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.cif b/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.cif
new file mode 100644
index 0000000..6ddc4e2
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "RapidStartWrapperSmm"
+ category = ModulePart
+ LocalRoot = "Board\EM\RapidStartWrapper\Smm"
+ RefName = "RapidStartWrapperSmm"
+[files]
+"RapidStartWrapperSmm.c"
+"RapidStartWrapperSmm.h"
+"RapidStartWrapperSmm.mak"
+"RapidStartWrapperSmm.dxs"
+"RapidStartWrapperSmm.sdl"
+<endComponent>
diff --git a/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.dxs b/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.dxs
new file mode 100644
index 0000000..247058d
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.dxs
@@ -0,0 +1,92 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartWrapperSmm.dxs 1 12/27/12 2:23a Bensonlai $
+//
+// $Revision: 1 $
+//
+// $Date: 12/27/12 2:23a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartWrapperSmm.dxs $
+//
+// 1 12/27/12 2:23a Bensonlai
+// [TAG] EIP110680
+// [Category] New Feature
+// [Description] When iRST application is run under OS, and change
+// timer.
+// BIOS should update the changed to Setup option as well.
+// [Files] Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.c
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.h
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.mak
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.dxs
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.sdl
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.cif
+// Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.cif
+// Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.sdl
+// Board\EM\RapidStartWrapper\AcpiTables\Ssdt\RapidStartWrapper.asl
+// Board\EM\RapidStartWrapper\RapidStartSetup\RapidStartSetup.sd
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartWrapperSmm.dxs
+//
+// Description: Dependency expression file for RapidStartWrapperSmm Driver
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+//
+// Common for R8 and R9 codebase
+//
+#include "AutoGen.h"
+#include "DxeDepex.h"
+
+//
+// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are both "defined" in R8 codebase;
+// BUILD_WITH_EDKII_GLUE_LIB is defined in Edk-Dev-Snapshot-20070228 and later version
+// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are "not defined" in R9 codebase.
+//
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+
+#include EFI_PROTOCOL_DEPENDENCY (SmmBase)
+#include EFI_PROTOCOL_DEPENDENCY (SmmSwDispatch)
+#include EFI_PROTOCOL_DEPENDENCY (RapidStartGlobalNvsArea)
+#include EFI_ARCH_PROTOCOL_DEFINITION (Variable)
+#endif
+
+DEPENDENCY_START
+ EFI_SMM_BASE_PROTOCOL_GUID AND
+ EFI_SMM_SW_DISPATCH_PROTOCOL_GUID AND
+ RAPID_START_GLOBAL_NVS_AREA_PROTOCOL_GUID AND
+ EFI_VARIABLE_ARCH_PROTOCOL_GUID
+DEPENDENCY_END
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.h b/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.h
new file mode 100644
index 0000000..c4ba9a2
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.h
@@ -0,0 +1,135 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartWrapperSmm.h 3 5/13/14 4:56a Joshchou $
+//
+// $Revision: 3 $
+//
+// $Date: 5/13/14 4:56a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartWrapperSmm.h $
+//
+// 3 5/13/14 4:56a Joshchou
+// [TAG] EIP167032
+// [Category] Improvement
+// [Description] Review the variable's attribute, we shouldn't use
+// runtime attribute with setup variable.
+// [Files] RapidStartWrapperSmm.c
+// RapidStartWrapperSmm.h
+// RapidStartWrapperSmm.cif
+//
+// 2 4/15/13 2:37a Bensonlai
+// [TAG] None
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] If users change any item from driver then restore to boot
+// setting, our SMI can't distinguish between user's and driver's event.
+// [RootCause] It's an Intel driver issue.
+// [Solution] 1. Removing the sync up with Rapid Start driver and BIOS
+// variable as default.
+// 2. Remove our BIOS workaround.
+// [Files] RapidStartWrapperSmm.sdl, RapidStartWrapperSmm.h,
+// RapidStartWrapperSmm.sdl, RapidStartWrapperAcpiTables.sdl,
+// RapidStartWrapper.sdl
+//
+// 1 12/27/12 2:23a Bensonlai
+// [TAG] EIP110680
+// [Category] New Feature
+// [Description] When iRST application is run under OS, and change
+// timer.
+// BIOS should update the changed to Setup option as well.
+// [Files] Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.c
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.h
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.mak
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.dxs
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.sdl
+// Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.cif
+// Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.cif
+// Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.sdl
+// Board\EM\RapidStartWrapper\AcpiTables\Ssdt\RapidStartWrapper.asl
+// Board\EM\RapidStartWrapper\RapidStartSetup\RapidStartSetup.sd
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RapidStartWrapperSmm.h
+//
+// Description: Sw SMI for RapidStart Wrapper
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifndef _RAPID_START_WRAPPER_SMM_H_
+#define _RAPID_START_WRAPPER_SMM_H_
+
+//
+// External include files do NOT need to be explicitly specified in real EDKII
+// environment
+//
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+#include "RapidStartData.h"
+#include <token.h>
+//
+// Driver Consumed Protocol Prototypes
+//
+#include EFI_PROTOCOL_CONSUMER (LoadedImage)
+#include EFI_PROTOCOL_DEPENDENCY (SmmBase)
+#include EFI_PROTOCOL_DEPENDENCY (SmmSwDispatch)
+#include EFI_PROTOCOL_DEPENDENCY (DevicePath)
+#include EFI_PROTOCOL_DEPENDENCY (RapidStartGlobalNvsArea)
+#include EFI_ARCH_PROTOCOL_DEFINITION (Variable)
+#endif
+
+#include <SetupDataDefinition.h>
+#define RAPID_START_WRAPPER_SMM_DATA_GUID { 0xc840359f, 0x1c11, 0x4d41, 0x92, 0x4c, 0x89, 0x70, 0x52, 0x22, 0x6a, 0xd4 }
+EFI_GUID RapidStartWrapperSmmDataGuid = RAPID_START_WRAPPER_SMM_DATA_GUID;
+
+#define EFI_SMM_RUNTIME_SERVICES_TABLE_GUID \
+ { 0x395c33fe, 0x287f, 0x413e, { 0xa0, 0x55, 0x80, 0x88, 0xc0, 0xe1, 0xd4, 0x3e } }
+
+EFI_GUID SmmRtServTableGuid = EFI_SMM_RUNTIME_SERVICES_TABLE_GUID;
+EFI_SMM_BASE_PROTOCOL *mSmmBase;
+EFI_SMM_SYSTEM_TABLE *mSmst = NULL;
+EFI_RUNTIME_SERVICES *mySMMgRT = NULL;
+RAPID_START_GLOBAL_NVS_AREA *mRapidStartGlobalNvs;
+
+//
+// Define SMI number of AMI Wrapper
+//
+#define AMI_RAPID_START_SYNC_VARIABLE_FUNCTION 0x01
+
+typedef struct _RAPID_START_WRAPPER_SMM_DATA {
+ UINT16 S3WakeTimerMin;
+ UINT8 EntryOnS3RtcWake;
+ UINT8 EntryOnS3CritBattWake;
+} RAPID_START_WRAPPER_SMM_DATA;
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.mak b/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.mak
new file mode 100644
index 0000000..85fa7fe
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.mak
@@ -0,0 +1,126 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartWrapperSmm.mak 1 12/27/12 2:23a Bensonlai $
+#
+# $Revision: 1 $
+#
+# $Date: 12/27/12 2:23a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartWrapperSmm.mak $
+#
+# 1 12/27/12 2:23a Bensonlai
+# [TAG] EIP110680
+# [Category] New Feature
+# [Description] When iRST application is run under OS, and change
+# timer.
+# BIOS should update the changed to Setup option as well.
+# [Files] Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.c
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.h
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.mak
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.dxs
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.sdl
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.cif
+# Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.cif
+# Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.sdl
+# Board\EM\RapidStartWrapper\AcpiTables\Ssdt\RapidStartWrapper.asl
+# Board\EM\RapidStartWrapper\RapidStartSetup\RapidStartSetup.sd
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RapidStartWrapperSmm.mak
+#
+# Description: Make file to build RapidStartWrapperSmm components
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+EDK : RapidStartWrapperSmm
+
+RapidStartWrapperSmm : $(BUILD_DIR)\RapidStartWrapperSmm.mak RapidStartWrapperSmmBin
+
+$(BUILD_DIR)\RapidStartWrapperSmm.mak : $(RapidStartWrapperSmm_DIR)\$(@B).cif $(RapidStartWrapperSmm_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(RapidStartWrapperSmm_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+RapidStartWrapperSmm_INCLUDES=\
+ $(RAPIDSTART_INCLUDES)\
+ $(EdkIIGlueLib_INCLUDES)\
+
+RapidStartWrapperSmm_DEFINES = $(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=RapidStartWrapperSmmEntryPoint"\
+ /D __EDKII_GLUE_BASE_LIB__ \
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__ \
+ /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_SMM_RUNTIME_DXE_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_UEFI_LIB__ \
+ /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \
+ /D __EDKII_GLUE_UEFI_DEVICE_PATH_LIB__ \
+ /D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ \
+
+RapidStartWrapperSmm_LIB =\
+ $(EFIPROTOCOLLIB)\
+ $(EDKPROTOCOLLIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+ $(EdkIIGlueBaseLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(ArchProtocolLib)\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGlueBaseMemoryLib_LIB)\
+ $(EdkIIGlueDxeMemoryAllocationLib_LIB)\
+ $(EdkIIGlueDxeServicesTableLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueSmmRuntimeDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueBasePciLibPciExpress_LIB)\
+ $(EdkIIGlueUefiLib_LIB)\
+ $(EdkIIGlueUefiBootServicesTableLib_LIB)\
+ $(EdkIIGlueUefiDevicePathLib_LIB)\
+ $(RapidStartProtocolLib_LIB)\
+ $(RapidStartGuidLib_LIB)\
+
+RapidStartWrapperSmmBin: $(RapidStartWrapperSmm_LIB)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\RapidStartWrapperSmm.mak all \
+ "MY_INCLUDES=$(RapidStartWrapperSmm_INCLUDES)" \
+ "MY_DEFINES=$(RapidStartWrapperSmm_DEFINES)" \
+ GUID=760DCD41-FF47-41d8-91B2-BC527D6C5823\
+ ENTRY_POINT=_ModuleEntryPoint \
+ TYPE=BS_DRIVER\
+ EDKIIModule=SMMDRIVER\
+ DEPEX1=$(RapidStartWrapperSmm_DIR)\RapidStartWrapperSmm.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ COMPRESS=1
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.sdl b/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.sdl
new file mode 100644
index 0000000..a99eb23
--- /dev/null
+++ b/Board/EM/RapidStartWrapper/Smm/RapidStartWrapperSmm.sdl
@@ -0,0 +1,120 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartWrapperSmm.sdl 2 4/15/13 2:36a Bensonlai $
+#
+# $Revision: 2 $
+#
+# $Date: 4/15/13 2:36a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartWrapper/RapidStartWrapperSmm.sdl $
+#
+# 2 4/15/13 2:36a Bensonlai
+# [TAG] None
+# [Category] Bug Fix
+# [Severity] Important
+# [Symptom] If users change any item from driver then restore to boot
+# setting, our SMI can't distinguish between user's and driver's event.
+# [RootCause] It's an Intel driver issue.
+# [Solution] 1. Removing the sync up with Rapid Start driver and BIOS
+# variable as default.
+# 2. Remove our BIOS workaround.
+# [Files] RapidStartWrapperSmm.sdl, RapidStartWrapperSmm.h,
+# RapidStartWrapperSmm.sdl, RapidStartWrapperAcpiTables.sdl,
+# RapidStartWrapper.sdl
+#
+# 1 12/27/12 2:23a Bensonlai
+# [TAG] EIP110680
+# [Category] New Feature
+# [Description] When iRST application is run under OS, and change
+# timer.
+# BIOS should update the changed to Setup option as well.
+# [Files] Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.c
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.h
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.mak
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.dxs
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.sdl
+# Board\EM\RapidStartWrapper\Smm\RapidStartWrapperSmm.cif
+# Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.cif
+# Board\EM\RapidStartWrapper\AcpiTables\RapidStartWrapperAcpiTables.sdl
+# Board\EM\RapidStartWrapper\AcpiTables\Ssdt\RapidStartWrapper.asl
+# Board\EM\RapidStartWrapper\RapidStartSetup\RapidStartSetup.sd
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RapidStartWrapperSmm.sdl
+#
+# Description: SDL file for RapidStartWrapperSmm
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+TOKEN
+ Name = "RAPID_START_WRAPPER_SMM_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable RapidStartWrapperSmm support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Token = "SYNC_UP_DRIVER_AND_BIOS_VARIABLE" "=" "1"
+End
+
+TOKEN
+ Name = "AMI_SW_SMI_RAPID_START_WRAPPER"
+ Value = "0xB4"
+ Help = "SWSMI# for AMI_SW_SMI_RAPID_START_WRAPPER"
+ TokenType = Integer
+ TargetH = Yes
+ TargetMAK = Yes
+End
+
+PATH
+ Name = "RapidStartWrapperSmm_DIR"
+End
+
+MODULE
+ Help = "Includes RapidStartWrapperSmm.mak to Project"
+ File = "RapidStartWrapperSmm.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\RapidStartWrapperSmm.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/D SW_SMI_RAPID_START_WRAPPER=$(AMI_SW_SMI_RAPID_START_WRAPPER)"
+ Parent = "INTEL_IRST_RC_FLAGS"
+ InvokeOrder = AfterParent
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/RsdpPlus/ManageShadowRam.c b/Board/EM/RsdpPlus/ManageShadowRam.c
new file mode 100644
index 0000000..8d6e3ad
--- /dev/null
+++ b/Board/EM/RsdpPlus/ManageShadowRam.c
@@ -0,0 +1,552 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/RsdpPlus/ManageShadowRam.c 8 3/05/13 4:33a Norlwu $
+//
+// $Revision: 8 $
+//
+// $Date: 3/05/13 4:33a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/RsdpPlus/ManageShadowRam.c $
+//
+// 8 3/05/13 4:33a Norlwu
+// [TAG] EIP116590
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] Using HeapToF000 to insert 2 datas with alignment will
+// cause a part of 1st data covered by 2nd data
+// [RootCause] It's wrong to update for gE000BuffLength and
+// gF000BuffLength.
+// [Solution] Use EndOfDataPtr and HeapPtr to calculate BuffLength.
+// [Files] ManageShadowRam.c
+//
+// 7 1/17/13 2:52a Norlwu
+// [TAG] EIP108029
+// [Category] Bug Fix
+// [Severity] Normal
+// [RootCause] Cause by Fastboot enable.
+// [Solution] Add EraseShadowAfterEfiBoot() under in elink
+// ReturnNormalMode.
+// [Files] RsdpPlus.sdl
+// ManageShadowRam.c
+//
+// 6 10/25/12 3:45a Norlwu
+// [TAG] EIP104587
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] Update RsdpPlus to 4.6.4.0_RsdpPlus_04 with Core 4.6.5.4.
+// it hang up when exit Shell to legacy boot
+// [RootCause] It's wrong backup data size. So if restore the data into
+// E000 and F000, it will cause the system halt when boot to legacy.
+// [Solution] Change backup size to current usage size.
+// [Files] ManageShadowRam.c
+//
+// 5 10/21/12 11:39p Norlwu
+// Fixed the system halt when exit shell enviroment.
+//
+// 4 9/17/12 11:32p Norlwu
+// [TAG] EIP92735
+// [Category] Improvement
+// [Description] Please help to return the pointer and offset of
+// HeapToF000 in MANAGE_SHADOW_RAM_PROTOCOL
+// [Files] RsdpPlus.c
+// ManageShadowRam.c
+// ManageShadowProtocol.h
+//
+// 3 8/17/12 8:12a Norlwu
+// [TAG] EIP98247
+// [Category] Improvement
+// [Description] [RsdpPlus]Add alignment support in
+// MANAGE_SHADOW_RAM_PROTOCOL
+// [Files] RsdpPlus.sdl
+// RsdpPlus.mak
+// RsdpPlus.c
+// ManageShadowRam.c
+// ManageShadowRam.h
+//
+// 2 7/27/12 6:58a Norlwu
+// [TAG] EIP94704
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] Cause the system hatl at post time.
+// [RootCause] ManageShasdow protocl is anot able to installed, when
+// monitor was disconnected.So change the register event to
+// BdsAllDeriverConnectGuid and if locate protocl failure return status
+// continue.
+// [Solution] [HP_DTO_emodule] token DEFAULT_CSM_LAUNCH_POLICY=0 and
+// BIOS hang with FastBoot enable when monitor was disconnected
+// [Files] RsdpPlusLInk.c
+// ManageShadowRam.c
+//
+// 1 2/09/12 3:06a Norlwu
+// [TAG] EIP81756
+// [Category] New Feature
+// [Description] Enhance RspdPlus module.
+// Install Shadow Ram Protocol and shadow ram protocl.
+// [Files] ManageShadowRam.c
+// ShadowRamProtocol.h
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: ManageShadowRam.c
+//
+// Description:
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include <AmiDxeLib.h>
+#include <Protocol\ConsoleControl.h>
+#include <token.h>
+#include <AmiCspLib.h>
+#include <Protocol\ManageShadowProtocol.h>
+#include "ShadowRamProtocol.h"
+
+#define BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID \
+ {0xdbc9fd21, 0xfad8, 0x45b0, 0x9e, 0x78, 0x27, 0x15, 0x88, 0x67, 0xcc, 0x93}
+
+//EFI_GUID gConOutStartedGuid = CONSOLE_OUT_DEVICES_STARTED_PROTOCOL_GUID;
+EFI_GUID gAllDriverConnectGuid = BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID;
+EFI_GUID gShdowRamProtocolGuid = SHADOW_RAM_PROTOCOL_GUID;
+EFI_GUID gManageShdowRamProtocolGuid = MANAGE_SHADOW_RAM_PROTOCOL_GUID;
+
+VOID UpdateShadowBeforEfiBoot(VOID);
+VOID EraseShadowAfterEfiBoot(VOID);
+EFI_STATUS HeapToE000(IN UINT8 *pData, UINT32 Align, IN UINTN Length, IN OUT DATA_BUFF_STRUC *pData2 OPTIONAL);
+EFI_STATUS HeapToF000(IN UINT8 *pData, UINT32 Align, IN UINTN Length, IN OUT DATA_BUFF_STRUC *pData2 OPTIONAL);
+
+EFI_HANDLE gShadowRameHandle = NULL;
+EFI_HANDLE gManageShadowRamHandle = NULL;
+UINT8 *gE000HeapPtr = NULL;
+UINT8 *gF000HeapPtr = NULL;
+UINT8 *gESegStore = NULL;
+UINT8 *gFSegStore = NULL;
+UINT8 EsegUserCount = 0, FsegUserCount = 0;
+UINTN gE000BuffLength = 0;
+UINTN gF000BuffLength = 0;
+UINTN gBufferSize = 0x10000;
+
+
+SHADOW_RAM_PROTOCOL gShadowRamProtocol =
+{
+ UpdateShadowBeforEfiBoot,
+ EraseShadowAfterEfiBoot
+};
+
+MANAGE_SHADOW_RAM_PROTOCOL gManageShadowRamProtocol =
+{
+ HeapToE000,
+ HeapToF000
+};
+
+//************** Update Shadow Ram Hook support ****************************
+extern UPDATE_E000_SHDOW_RAM_HOOK UPDATE_E000_SHADOW_RAM_HOOK_LIST EndOfUpdateE000ShadowRamHookList;
+UPDATE_E000_SHDOW_RAM_HOOK* UpdateE000ShdowRamHookList[] = {UPDATE_E000_SHADOW_RAM_HOOK_LIST NULL};
+
+extern UPDATE_F000_SHDOW_RAM_HOOK UPDATE_F000_SHADOW_RAM_HOOK_LIST EndOfUpdateF000ShadowRamHookList;
+UPDATE_F000_SHDOW_RAM_HOOK* UpdateF000ShdowRamHookList[] = {UPDATE_F000_SHADOW_RAM_HOOK_LIST NULL};
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: OemUpdateE000ShdowRamHook
+//
+// Description:
+//
+//
+// Input:
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID OemUpdateE000ShdowRamHook(
+ IN UINT32* pShadowRam,
+ IN UINTN UsageLength
+)
+{
+ UINTN i;
+
+ for (i = 0; UpdateE000ShdowRamHookList[i] != NULL; i++)
+ UpdateE000ShdowRamHookList[i](pShadowRam,UsageLength);
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: OemUpdateF000ShdowRamHook
+//
+// Description:
+//
+//
+// Input: IN UINT32* pShadowRam
+// IN UINTN UsageLength
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID OemUpdateF000ShdowRamHook(
+ IN UINT32* pShadowRam,
+ IN UINTN UsageLength
+)
+{
+ UINTN i;
+
+ for (i = 0; UpdateF000ShdowRamHookList[i] != NULL; i++)
+ UpdateF000ShdowRamHookList[i](pShadowRam,UsageLength);
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: UpdateShadowBeforEfiBoot
+//
+// Description: This is "BeforeEfiBootLaunchHook" elink function.
+// It will store original data of Shadow ram and then copy
+// shadow buff's data to shadow ram.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID UpdateShadowBeforEfiBoot(VOID)
+{
+ EFI_STATUS Status;
+ UINT32 E000Offset = 0xE0000;
+ UINT32 F000Offset = 0xF0000;
+
+ TRACE((-1,"Entry Update Shadow Ram!!!\n"));
+
+ //unlock shadow ram
+ OemRuntimeShadowRamWrite(TRUE);
+
+ TRACE((-1,"RsdpPlus (UpdateShadowBeforEfiBoot): gE000BuffLength [0x%x] \n",gE000BuffLength));
+
+ if(gE000BuffLength != 0){
+ Status = pBS->AllocatePool(
+ EfiBootServicesData,
+ gE000BuffLength,
+ &gESegStore
+ );
+ ASSERT_EFI_ERROR(Status);
+ if(EFI_ERROR(Status))
+ return;
+
+ pBS->CopyMem(gESegStore,(UINT32*)E000Offset,gE000BuffLength);
+ MemSet((VOID*)E000Offset,gE000BuffLength, 0);
+ pBS->CopyMem((UINT32*)E000Offset,gE000HeapPtr,gE000BuffLength);
+ TRACE((-1,"E000 Info : Data length %d bytes, There are %d data in Shadow Ram!!!\n",gE000BuffLength, EsegUserCount));
+ OemUpdateE000ShdowRamHook((UINT32*)E000Offset, gE000BuffLength);
+ }
+
+ TRACE((-1,"RsdpPlus (UpdateShadowBeforEfiBoot): gF000BuffLength [0x%x] \n",gF000BuffLength));
+ if(gF000BuffLength != 0){
+ Status = pBS->AllocatePool(
+ EfiBootServicesData,
+ gF000BuffLength,
+ &gFSegStore
+ );
+ ASSERT_EFI_ERROR(Status);
+ if(EFI_ERROR(Status))
+ return;
+
+ pBS->CopyMem(gFSegStore,(UINT32*)F000Offset,gF000BuffLength);
+ MemSet((VOID*)F000Offset,gF000BuffLength, 0);
+ pBS->CopyMem((UINT32*)F000Offset,gF000HeapPtr,gF000BuffLength);
+ TRACE((-1,"F000 Info : Data length %d bytes, There are %d data in Shadow Ram!!!\n",gF000BuffLength, FsegUserCount));
+ OemUpdateF000ShdowRamHook((UINT32*)F000Offset, gE000BuffLength);
+ }
+
+ //Lock shadow ram
+ OemRuntimeShadowRamWrite(FALSE);
+
+ return;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: EraseShadowAfterEfiBoot
+//
+// Description: This is "AfterEfiBootLaunchHook" elink function.
+// It will restore original data to Shadow ram.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID EraseShadowAfterEfiBoot(VOID)
+{
+ UINT32 E000Offset = 0xE0000;
+ UINT32 F000Offset = 0xF0000;
+
+ if(gE000BuffLength == 0 && gF000BuffLength == 0) return;
+
+ TRACE((-1,"Store Shadow Ram to default!!!\n"));
+ OemRuntimeShadowRamWrite(TRUE);
+
+ if(gE000BuffLength != 0){
+ pBS->CopyMem((UINT32*)E000Offset,gESegStore,gE000BuffLength);
+ pBS->FreePool(gESegStore);
+ gE000BuffLength = 0;
+ EsegUserCount = 0;
+ }
+
+ if(gF000BuffLength != 0){
+ pBS->CopyMem((UINT32*)F000Offset,gFSegStore,gF000BuffLength);
+ pBS->FreePool(gFSegStore);
+ gF000BuffLength = 0;
+ FsegUserCount = 0;
+ }
+
+ OemRuntimeShadowRamWrite(FALSE);
+
+ return;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: HeapToE000
+//
+// Description: This is protocol function.
+// According to input data and copy those datas to buffer.
+//
+// Input: UINT8 *pData
+// UINT32 Align
+// UINTN Length
+// DATA_BUFF_STRUC *pData2 OPTIONAL
+//
+// Output: EFI_STATUS
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS HeapToE000(
+ IN UINT8 *pData,
+ IN UINT32 Align,
+ IN UINTN Length,
+ IN OUT DATA_BUFF_STRUC *pData2 OPTIONAL)
+{
+
+ UINT8 *DataPtr = NULL;
+ UINT8 *EndOfDataPtr = NULL;
+
+ if(pData == NULL || Length == 0)
+ return EFI_INVALID_PARAMETER;
+
+ if((gE000BuffLength + Length) > gBufferSize)
+ return EFI_BUFFER_TOO_SMALL;
+
+ if(Align != 0){
+ DataPtr = (UINT8*)(( (UINT32)((UINTN)gE000HeapPtr + gE000BuffLength)& ~(Align - 1)) + Align);
+ }else{
+ DataPtr = gE000HeapPtr + gE000BuffLength;
+ }
+
+ if(pData2 != NULL){
+ pData2->BuffAddress = (UINTN)gE000HeapPtr;
+ //pData2->UsedLength = gE000BuffLength;
+ pData2->UsedLength = (UINTN)(DataPtr - gE000HeapPtr);
+ }
+
+ EndOfDataPtr = (UINT8*)((UINTN)DataPtr + Length);
+ TRACE((-1,"RsdpPlus : Align [0x%x],DataPtr [0x%lx],EndOfDataPtr [0x%lx] \n",Align,DataPtr,EndOfDataPtr));
+
+ if(EndOfDataPtr > (gE000HeapPtr + gBufferSize))
+ return EFI_BUFFER_TOO_SMALL;
+
+ pBS->CopyMem(DataPtr, pData, Length);
+
+ //gE000BuffLength = gE000BuffLength + (UINTN)(EndOfDataPtr - DataPtr);
+ gE000BuffLength = (UINTN)(EndOfDataPtr - gE000HeapPtr);
+ TRACE((-1,"RsdpPlus (HeapToE000): gE000BuffLength [0x%x] \n",gE000BuffLength));
+
+ EsegUserCount++;
+
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: HeapToF000
+//
+// Description: This is protocol function.
+// According to input data and copy those datas to buffer.
+//
+// Input: UINT8 *pData
+// UINT32 Align
+// UINTN Length
+// DATA_BUFF_STRUC *pData2 OPTIONAL
+//
+// Output: EFI_STATUS
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS HeapToF000(
+ IN UINT8 *pData,
+ IN UINT32 Align,
+ IN UINTN Length,
+ IN OUT DATA_BUFF_STRUC *pData2 OPTIONAL)
+{
+ UINT8 *DataPtr = NULL;
+ UINT8 *EndOfDataPtr = NULL;
+
+
+ if(pData == NULL || Length == 0)
+ return EFI_INVALID_PARAMETER;
+
+ if((gF000BuffLength + Length) > gBufferSize)
+ return EFI_BUFFER_TOO_SMALL;
+
+ if(Align != 0){
+ DataPtr = (UINT8*)(( (UINT32)((UINTN)gF000HeapPtr + gF000BuffLength)& ~(Align - 1)) + Align);
+ }else{
+ DataPtr = gF000HeapPtr + gF000BuffLength;
+ }
+
+ if(pData2 != NULL){
+ pData2->BuffAddress = (UINTN)gF000HeapPtr;
+ //pData2->UsedLength = gF000BuffLength;
+ pData2->UsedLength = (UINTN)(DataPtr - gF000HeapPtr);
+ }
+
+ EndOfDataPtr = (UINT8*)((UINTN)DataPtr + Length);
+ TRACE((-1,"RsdpPlus : Align [0x%x],DataPtr [0x%lx],EndOfDataPtr [0x%lx] \n",Align,DataPtr,EndOfDataPtr));
+
+ if(EndOfDataPtr > (gF000HeapPtr + gBufferSize))
+ return EFI_BUFFER_TOO_SMALL;
+
+ pBS->CopyMem(DataPtr, pData, Length);
+
+ //gF000BuffLength = gF000BuffLength + (UINTN)(EndOfDataPtr - DataPtr);
+ gF000BuffLength = (UINTN)(EndOfDataPtr - gF000HeapPtr);
+ TRACE((-1,"RsdpPlus (HeapToF000): gF000BuffLength [0x%x] \n",gF000BuffLength));
+
+ FsegUserCount++;
+
+ return EFI_SUCCESS;
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: ShadowRamCallBack
+//
+// Description: Install Shadow Ram Protocol.
+//
+// Input: EFI_EVENT Event
+// VOID *Context
+//
+// Output: EFI_STATUS Status
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS ShadowRamCallBack(IN EFI_EVENT Event,IN VOID *Context)
+{
+ EFI_STATUS Status;
+
+ Status = pBS->InstallProtocolInterface(
+ &gShadowRameHandle,
+ &gShdowRamProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &gShadowRamProtocol
+ );
+ if(EFI_ERROR(Status)) return Status;
+ pBS->CloseEvent(Event);
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: ManageShadowRamEntryPoint
+//
+// Description: Entry point for RsdpPlus initialization.
+// Register a ConOutStarted protocol callback function.
+// And allocate two buff for Manage Shadow Ram protocol used.
+// Install Manage Shadow Ram protocol.
+//
+// Input: EFI_HANDLE ImageHandle
+// EFI_SYSTEM_TABLE *SystemTable
+//
+// Output: EFI_STATUS Status
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS ManageShadowRamEntryPoint(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_EVENT Event;
+ EFI_STATUS Status;
+ VOID *Registration;
+ static EFI_PHYSICAL_ADDRESS E000PagePtr;
+ static EFI_PHYSICAL_ADDRESS F000PagePtr;
+
+ InitAmiLib(ImageHandle,SystemTable);
+
+ Status = RegisterProtocolCallback(
+ &gAllDriverConnectGuid,
+ ShadowRamCallBack,
+ NULL, // Context
+ &Event,
+ &Registration
+ );
+ if(EFI_ERROR(Status)) return Status;
+
+ Status = pBS->AllocatePages(
+ AllocateAnyPages,
+ EfiBootServicesData,
+ 16,
+ &E000PagePtr);
+ ASSERT_EFI_ERROR(Status);
+ gE000HeapPtr = (UINT8*)E000PagePtr;
+ TRACE((-1,"RsdpPlus : gE000HeapPtr [0x%lx] \n",gE000HeapPtr));
+
+ Status = pBS->AllocatePages(
+ AllocateAnyPages,
+ EfiBootServicesData,
+ 16,
+ &F000PagePtr);
+ ASSERT_EFI_ERROR(Status);
+ gF000HeapPtr = (UINT8*)F000PagePtr;
+ TRACE((-1,"RsdpPlus : gF000HeapPtr [0x%lx] \n",gF000HeapPtr));
+
+ Status = pBS->InstallProtocolInterface(
+ &gManageShadowRamHandle,
+ &gManageShdowRamProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &gManageShadowRamProtocol
+ );
+ return Status;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/RsdpPlus/RsdpPlus.c b/Board/EM/RsdpPlus/RsdpPlus.c
new file mode 100644
index 0000000..85814c8
--- /dev/null
+++ b/Board/EM/RsdpPlus/RsdpPlus.c
@@ -0,0 +1,179 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/RsdpPlus/RsdpPlus.c 8 9/17/12 11:33p Norlwu $
+//
+// $Revision: 8 $
+//
+// $Date: 9/17/12 11:33p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/RsdpPlus/RsdpPlus.c $
+//
+// 8 9/17/12 11:33p Norlwu
+// [TAG] EIP92735
+// [Category] Improvement
+// [Description] Please help to return the pointer and offset of
+// HeapToF000 in MANAGE_SHADOW_RAM_PROTOCOL
+// [Files] RsdpPlus.c
+// ManageShadowRam.c
+// ManageShadowProtocol.h
+//
+// 7 8/17/12 8:12a Norlwu
+// [TAG] EIP98247
+// [Category] Improvement
+// [Description] [RsdpPlus]Add alignment support in
+// MANAGE_SHADOW_RAM_PROTOCOL
+// [Files] RsdpPlus.sdl
+// RsdpPlus.mak
+// RsdpPlus.c
+// ManageShadowRam.c
+// ManageShadowRam.h
+//
+// 6 2/09/12 3:15a Norlwu
+// [TAG] EIP81756
+// [Category] New Feature
+// [Description] Enhance RspdPlus module.
+// [Files] RsdpPlus.sdl
+// RsdpPlus.mak
+// RsdpPlus.c
+// RsdpPlusLInk.c
+// RsdpPlus.cif
+//
+// 5 12/14/11 4:53a Norlwu
+// Change "NbRuntimeShadowsRamWrite" to "OemRuntimShadowRamWrite" routine.
+//
+// 4 12/14/11 2:05a Norlwu
+// [TAG] EIP77341
+// [Category] Improvement
+// [Description] V110 can't running ATI_DIAG problem.
+// [Files] RsdpPlus.sdl
+// RsdpPlus.mak
+// RsdpPlus.c
+// RsdpPlus.chm
+// RsdpPlus.cif
+//
+// 3 10/21/11 2:36a Norlwu
+// [TAG] EIP73307
+// [Category] Improvement
+// [Description] The system will hang up or reset during POST when RSDP
+// module and SG function support
+// [Files] RsdpPlus.c
+//
+// 2 9/28/11 3:59a Norlwu
+// Bug Fix - Twice into SHELL environment will cause the RSDP address
+// failure.
+//
+// 1 9/19/11 2:05a Norlwu
+// [TAG] EIP67948
+// [Category] New Feature
+// [Description] EFI boot need to create the RSDT table
+// [Files] RsdpPlus.cif
+// RsdpPlus.sdl
+// RsdpPlus.mak
+// RsdpPlus.c
+// RsdpPlusLInk.c
+// RsdpPlus.dxs
+// RsdpPlus.chm
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RsdpPlus.c
+//
+// Description:
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include <AmiDxeLib.h>
+#include <Acpi30.h>
+#include <AmiCspLib.h>
+#include <Protocol\ManageShadowProtocol.h>
+
+EFI_GUID gManageShadowRamProtocolGuid = MANAGE_SHADOW_RAM_PROTOCOL_GUID;
+EFI_GUID gAcpi20TableGuid = ACPI_20_TABLE_GUID;
+EFI_GUID gAcpi11TAbleGuid = ACPI_10_TABLE_GUID;
+
+RSDT_PTR_20 *RSDP = NULL;
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: RsdpPlusEntryPoint
+//
+// Description: Entry point for RsdpPlus initialization.
+// Register a ConOutStarted protocol call back function.
+//
+//
+// Input: EFI_HANDLE ImageHandle
+// EFI_SYSTEM_TABLE *SystemTable
+//
+// Output: EFI_STATUS Status
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS RsdpPlusEntryPoint(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status = EFI_NOT_FOUND;
+ MANAGE_SHADOW_RAM_PROTOCOL *ManageShadowRamProtocol;
+
+ InitAmiLib(ImageHandle,SystemTable);
+
+ RSDP = GetEfiConfigurationTable(pST,&gAcpi20TableGuid);
+ if (!RSDP)
+ {
+ RSDP = GetEfiConfigurationTable(pST,&gAcpi11TAbleGuid);
+ }
+ if (!RSDP) return Status;
+
+ TRACE((-1,"Rsdp Sig [%lx] \n",RSDP->Signature));
+ TRACE((-1,"Rsdp XSDT addr [%x] \n",RSDP->XsdtAddr));
+ TRACE((-1,"Rsdp RSDT addr [%x] \n",RSDP->RsdtAddr));
+
+ Status = pBS->LocateProtocol(&gManageShadowRamProtocolGuid,NULL,&ManageShadowRamProtocol);
+ ASSERT_EFI_ERROR(Status);
+
+ Status = ManageShadowRamProtocol->HeapToF000((UINT8*)RSDP,0,(UINTN)sizeof(RSDT_PTR_20), NULL);
+
+/* Sample
+ {
+ DATA_BUFF_STRUC DataBuff;
+ Status = ManageShadowRamProtocol->HeapToF000((UINT8*)RSDP,0,(UINTN)sizeof(RSDT_PTR_20), &DataBuff);
+ TRACE((-1,"Norl Dbg : DataBuff Address [0x%x], Length of Used [0x%x] \n",DataBuff.BuffAddress, DataBuff.UsedLength));
+
+ }
+*/
+ ASSERT_EFI_ERROR(Status);
+
+ return Status;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/RsdpPlus/RsdpPlus.chm b/Board/EM/RsdpPlus/RsdpPlus.chm
new file mode 100644
index 0000000..1853bc5
--- /dev/null
+++ b/Board/EM/RsdpPlus/RsdpPlus.chm
Binary files differ
diff --git a/Board/EM/RsdpPlus/RsdpPlus.cif b/Board/EM/RsdpPlus/RsdpPlus.cif
new file mode 100644
index 0000000..baeffe4
--- /dev/null
+++ b/Board/EM/RsdpPlus/RsdpPlus.cif
@@ -0,0 +1,16 @@
+<component>
+ name = "RsdpPlus"
+ category = eModule
+ LocalRoot = "Board\EM\RsdpPlus\"
+ RefName = "RsdpPlus"
+[files]
+"RsdpPlus.sdl"
+"RsdpPlus.mak"
+"RsdpPlus.c"
+"RsdpPlusLInk.c"
+"RsdpPlus.chm"
+"ShadowRamProtocol.h"
+"ManageShadowRam.c"
+[parts]
+"RSDP_INCLUDES"
+<endComponent>
diff --git a/Board/EM/RsdpPlus/RsdpPlus.mak b/Board/EM/RsdpPlus/RsdpPlus.mak
new file mode 100644
index 0000000..8afbc3b
--- /dev/null
+++ b/Board/EM/RsdpPlus/RsdpPlus.mak
@@ -0,0 +1,118 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/RsdpPlus/RsdpPlus.mak 5 8/17/12 8:13a Norlwu $
+#
+# $Revision: 5 $
+#
+# $Date: 8/17/12 8:13a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/RsdpPlus/RsdpPlus.mak $
+#
+# 5 8/17/12 8:13a Norlwu
+# [TAG] EIP98247
+# [Category] Improvement
+# [Description] [RsdpPlus]Add alignment support in
+# MANAGE_SHADOW_RAM_PROTOCOL
+# [Files] RsdpPlus.sdl
+# RsdpPlus.mak
+# RsdpPlus.c
+# ManageShadowRam.c
+# ManageShadowRam.h
+#
+# 4 2/09/12 3:15a Norlwu
+# [TAG] EIP81756
+# [Category] New Feature
+# [Description] Enhance RspdPlus module.
+# [Files] RsdpPlus.sdl
+# RsdpPlus.mak
+# RsdpPlus.c
+# RsdpPlusLInk.c
+# RsdpPlus.cif
+#
+# 3 12/14/11 2:05a Norlwu
+# [TAG] EIP77341
+# [Category] Improvement
+# [Description] V110 can't running ATI_DIAG problem.
+# [Files] RsdpPlus.sdl
+# RsdpPlus.mak
+# RsdpPlus.c
+# RsdpPlus.chm
+# RsdpPlus.cif
+#
+# 2 9/22/11 3:23a Norlwu
+# [TAG] EIP67948
+# [Category] New Feature
+# [Description] EFI boot need to create the RSDT table
+# [Files] RsdpPlus.cif
+# RsdpPlus.sdl
+# RsdpPlus.mak
+# RsdpPlus.c
+# RsdpPlusLInk.c
+# RsdpPlus.dxs
+# RsdpPlus.chm
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: RsdpPlus.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+#all : RsdpPlus
+
+#RsdpPlus : $(BUILD_DIR)\RsdpPlus.mak
+
+
+#---------------------------------------------------------------------------
+# Complier EFI boot function
+#---------------------------------------------------------------------------
+RSDPPLUS_CFLAGS=$(CFLAGS) \
+ -I $(TSEBIN_DIR)\Inc \
+ -I $(TSEBIN_DIR)
+
+AMITSEBin : $(BUILD_DIR)\RsdpPlusLink.obj $(BUILD_DIR)\RsdpPlus.obj
+
+$(BUILD_DIR)\RsdpPlusLink.obj : $(RsdpPlus_DIR)\RsdpPlusLink.c
+ $(CC) $(RSDPPLUS_CFLAGS) /Fo$(BUILD_DIR)\RsdpPlusLink.obj $(RsdpPlus_DIR)\RsdpPlusLink.c
+
+$(BUILD_DIR)\RsdpPlus.obj : $(RsdpPlus_DIR)\RsdpPlus.c
+ $(CC) $(RSDPPLUS_CFLAGS) /Fo$(BUILD_DIR)\RsdpPlus.obj $(RsdpPlus_DIR)\RsdpPlus.c
+
+CORE_DXEBin : $(BUILD_DIR)\ManageShadowRam.obj
+
+$(BUILD_DIR)\ManageShadowRam.obj : $(RsdpPlus_DIR)\ManageShadowRam.c
+ $(CC) $(CFLAGS) \
+ /D\"UPDATE_E000_SHADOW_RAM_HOOK_LIST=$(UpdateE000ShadowRamHook)\" \
+ /D\"UPDATE_F000_SHADOW_RAM_HOOK_LIST=$(UpdateF000ShadowRamHook)\" \
+ /Fo$(BUILD_DIR)\ManageShadowRam.obj $(RsdpPlus_DIR)\ManageShadowRam.c
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#********************************************************************** \ No newline at end of file
diff --git a/Board/EM/RsdpPlus/RsdpPlus.sdl b/Board/EM/RsdpPlus/RsdpPlus.sdl
new file mode 100644
index 0000000..e42402f
--- /dev/null
+++ b/Board/EM/RsdpPlus/RsdpPlus.sdl
@@ -0,0 +1,59 @@
+TOKEN
+ Name = "RsdpPlus_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable RsdpPlus support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "RsdpPlus_DIR"
+ Path = "Board\EM\RsdpPlus"
+End
+
+MODULE
+ Help = "Includes RsdpPlus.mak to Project"
+ File = "RsdpPlus.mak"
+End
+
+ELINK
+ Name = "UpdateShadow,"
+ Parent = "BeforeEfiBootLaunchHook,"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "EraseShadow,"
+ Parent = "AfterEfiBootLaunchHook,"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "ManageShadowRamEntryPoint,"
+ Parent = "DxeCoreInitialize"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "RsdpPlusEntryPoint,"
+ Parent = "UpdateShadow,"
+ InvokeOrder = BeforeParent
+End
+
+ELINK
+ Name = "UpdateE000ShadowRamHook"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "UpdateF000ShadowRamHook"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "EraseShadowAfterEfiBoot,"
+ Parent = "ReturnNormalMode"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/RsdpPlus/RsdpPlusLInk.c b/Board/EM/RsdpPlus/RsdpPlusLInk.c
new file mode 100644
index 0000000..db28f6b
--- /dev/null
+++ b/Board/EM/RsdpPlus/RsdpPlusLInk.c
@@ -0,0 +1,141 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/RsdpPlus/RsdpPlusLInk.c 4 7/27/12 7:00a Norlwu $
+//
+// $Revision: 4 $
+//
+// $Date: 7/27/12 7:00a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/RsdpPlus/RsdpPlusLInk.c $
+//
+// 4 7/27/12 7:00a Norlwu
+// [TAG] EIP94704
+// [Category] Bug Fix
+// [Symptom] Cause the system hatl at the post time.
+// [RootCause] ManageShasdow protocl is not able to installed, when
+// monitor was disconnected.So change the register event to
+// BdsAllDeriverConnectGuid and if locate protocl failure return status
+// continue.
+// [Solution] [HP_DTO_emodule] token DEFAULT_CSM_LAUNCH_POLICY=0 and
+// BIOS hang with FastBoot enable when monitor was disconnected
+// [Files] RsdpPlusLInk.c
+// ManageShadowRam.c
+//
+// 3 2/09/12 3:15a Norlwu
+// [TAG] EIP81756
+// [Category] New Feature
+// [Description] Enhance RspdPlus module.
+// [Files] RsdpPlus.sdl
+// RsdpPlus.mak
+// RsdpPlus.c
+// RsdpPlusLInk.c
+// RsdpPlus.cif
+//
+// 2 9/28/11 4:01a Norlwu
+// Bug Fix - Solved locate RSDP protocol failure.
+//
+// 1 9/19/11 2:05a Norlwu
+// [TAG] EIP67948
+// [Category] New Feature
+// [Description] EFI boot need to create the RSDT table
+// [Files] RsdpPlus.cif
+// RsdpPlus.sdl
+// RsdpPlus.mak
+// RsdpPlus.c
+// RsdpPlusLInk.c
+// RsdpPlus.dxs
+// RsdpPlus.chm
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: RsdpPlusLink.c
+//
+// Description:
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include <AmiDxeLib.h>
+#include "ShadowRamProtocol.h"
+
+extern EFI_BOOT_SERVICES *gBS;
+extern EFI_SYSTEM_TABLE *gST;
+extern EFI_RUNTIME_SERVICES *gRT;
+
+EFI_GUID gShdowRamProtocolGuid = SHADOW_RAM_PROTOCOL_GUID;
+SHADOW_RAM_PROTOCOL *gShadowRamProtocol;
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: UpdateShadow
+//
+// Description: BeforeEfiBootLaunchHook eLink function.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID UpdateShadow(VOID)
+{
+ EFI_STATUS Status;
+
+ Status = gBS->LocateProtocol(&gShdowRamProtocolGuid,NULL,&gShadowRamProtocol);
+ if(!EFI_ERROR(Status))
+ gShadowRamProtocol->UpdateShadowBeforEfiBoot();
+
+ return;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: EraseShadow
+//
+// Description: AfterEfiBootLaunchHook eLink function.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID EraseShadow(VOID)
+{
+ EFI_STATUS Status;
+
+ Status = gBS->LocateProtocol(&gShdowRamProtocolGuid,NULL,&gShadowRamProtocol);
+ if(!EFI_ERROR(Status))
+ gShadowRamProtocol->EraseShadowAfterEfiBoot();
+
+ return;
+}
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/RsdpPlus/ShadowRamProtocol.h b/Board/EM/RsdpPlus/ShadowRamProtocol.h
new file mode 100644
index 0000000..b8e1daf
--- /dev/null
+++ b/Board/EM/RsdpPlus/ShadowRamProtocol.h
@@ -0,0 +1,90 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+
+//****************************************************************************
+// $Header: /Alaska/SOURCE/Modules/RsdpPlus/ShadowRamProtocol.h 1 2/09/12 3:07a Norlwu $
+//
+// $Revision: 1 $
+//
+// $Date: 2/09/12 3:07a $
+//****************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/RsdpPlus/ShadowRamProtocol.h $
+//
+// 1 2/09/12 3:07a Norlwu
+// [TAG] EIP81756
+// [Category] New Feature
+// [Description] Enhance RspdPlus module.
+// Define SHADOW_RAM_PROTOCOL structure.
+// [Files] ManageShadowRam.c
+// ShadowRamProtocol.h
+//****************************************************************************
+
+//<AMI_FHDR_START>
+//-----------------------------------------------------------------------------
+//
+// Name: ShdowRamProtocol.h
+//
+// Description:
+//
+//-----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#ifndef _SHADOW_RAM_PROTOCOL_H__
+#define _SHADOW_RAM_PROTOCOL_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SHADOW_RAM_PROTOCOL_GUID \
+ {0xa33319b5, 0x8ee1, 0x45e0, 0x8c, 0x9f, 0x80, 0x9f, 0x5b, 0x9, 0x2, 0xcc}
+
+typedef
+VOID
+(EFIAPI *UPDATE_SHADOW) (
+ IN VOID
+);
+
+typedef
+VOID
+(EFIAPI *ERASE_SHADOW) (
+ IN VOID
+);
+
+typedef struct {
+ UPDATE_SHADOW UpdateShadowBeforEfiBoot;
+ ERASE_SHADOW EraseShadowAfterEfiBoot;
+} SHADOW_RAM_PROTOCOL;
+
+/****** DO NOT WRITE BELOW THIS LINE *******/
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
diff --git a/Board/EM/SMBIOS/SMBIOSBoard.CIF b/Board/EM/SMBIOS/SMBIOSBoard.CIF
new file mode 100644
index 0000000..c4cbb8c
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBIOSBoard.CIF
@@ -0,0 +1,22 @@
+<component>
+ name = "SMBIOS - Board"
+ category = eModule
+ LocalRoot = "Board\EM\SMBIOS\"
+ RefName = "SMBIOSBoard"
+[files]
+"SMBios.sdl"
+"SmbiosGetFlashData32.ffs"
+"SmbiosGetFlashData64.ffs"
+"SMBios32.ffs"
+"SMBios64.ffs"
+"SMBiosFlashData.ffs"
+"SmbiosBoard.c"
+"SMBiosBoard.dxs"
+"SMBiosBoard.mak"
+"SMBiosBoard.chm"
+"Smbrun.asm"
+[parts]
+"SMBIOSProto"
+"SmbiosStaticData"
+"SmbiosDMIEditBoard"
+<endComponent>
diff --git a/Board/EM/SMBIOS/SMBios.sdl b/Board/EM/SMBIOS/SMBios.sdl
new file mode 100644
index 0000000..89348f1
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBios.sdl
@@ -0,0 +1,354 @@
+TOKEN
+ Name = "SMBIOS_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable SMBIOS support in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "AMI_SMBIOS_MODULE_VERSION"
+ Value = "0108"
+ Help = "AMI SMBIOS module version number: MMNN -> MM = Major, NN = Minor"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "SMBIOS_PI_1_1"
+ Value = "0"
+ Help = "SMBIOS PI 1.1 Support"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "EFI_SMBIOS_PROTOCOL_GUID"
+ Value = "{0x5e90a50d, 0x6955, 0x4a49, 0x90, 0x32, 0xda, 0x38, 0x12, 0xf8, 0xe8, 0xe5}"
+ Help = "SMBIOS Protocol GUID"
+ TokenType = Expression
+ TargetH = Yes
+ Token = "SMBIOS_PI_1_1" "=" "0"
+End
+
+TOKEN
+ Name = "EFI_SMBIOS_PROTOCOL_GUID"
+ Value = "{0x03583ff6, 0xcb36, 0x4940, 0x94, 0x7e, 0xb9, 0xb3, 0x9f, 0x4a, 0xfa, 0xf7}"
+ Help = "SMBIOS Protocol GUID"
+ TokenType = Expression
+ TargetH = Yes
+ Token = "SMBIOS_PI_1_1" "=" "1"
+End
+
+TOKEN
+ Name = "SMBIOS_TABLE_LOCATION"
+ Value = "0"
+ Help = "SMBIOS Table location: \0 = Above 1MB only"
+ TokenType = Integer
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "SMBIOS_TABLE_LOCATION"
+ Value = "1"
+ Help = "SMBIOS Table location: \0 = Above 1MB only \1 = Auto (E000 Segment, if unable to allocate to E000, then put table above 1MB)"
+ TokenType = Integer
+ TargetH = Yes
+ Token = "CSM_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "SMBIOS_DMIEDIT_DATA_LOC"
+ Value = "0"
+ Help = "SMBIOS DMIEdit data location: \0 = Boot Block \2 = NVRAM"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SMBIOS_PRESERVE_NVRAM"
+ Value = "1"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "SMBIOS_DMIEDIT_DATA_LOC" "=" "2"
+End
+
+TOKEN
+ Name = "ADD_STRUCTURE_LOCATION"
+ Value = "1"
+ Help = "Location in Smbios Table for new structure being added: \ON -> Sequentially by Handle Number \OFF = At end of table"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "WRITE_STRUCTURE_HANDLE_POLICY"
+ Value = "0"
+ Help = "WriteStructureByHandle function policy: \OFF -> Delete existing structure then add new one (for backward compatibility) \ON = Existing structure to be modified in place"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SMBIOS_UPDATE_POLICY"
+ Value = "0"
+ Help = "Order of updating structures during Post: \OFF -> NVRam data (DMIEdit), dynamic data (CPU, memory, slot...), OEM update \ON = Dynamic data (CPU, memory, slot...), OEM update, NVRam data (DMIEdit)"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "UPDATE_BASEBOARD_TYPE2"
+ Value = "0"
+ Help = "Enable/Disable BaseBoard Type 2 dynamic update"
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "BASE_BOARD_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "UPDATE_BOARD_MANUFACTURER"
+ Value = "0"
+ Help = "Enable/Disable Board Manufacturer (Type 2) dynamic update"
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "UPDATE_BASEBOARD_TYPE2" "=" "1"
+End
+
+TOKEN
+ Name = "UPDATE_BOARD_NAME"
+ Value = "0"
+ Help = "Enable/Disable Board Name (Type 2) dynamic update"
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "UPDATE_BASEBOARD_TYPE2" "=" "1"
+End
+
+TOKEN
+ Name = "UPDATE_SYSTEM_CHASSIS_TYPE3"
+ Value = "0"
+ Help = "Enable/Disable System Chassis Type 3 dynamic update"
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "SYS_CHASSIS_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "UPDATE_CPU_TYPE4"
+ Value = "1"
+ Help = "Enable/Disable CPU Types 4/7 dynamic update"
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "PROCESSOR_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "UPDATE_SLOT_TYPE9"
+ Value = "1"
+ Help = "Enable/Disable System Slot Type 9 dynamic update"
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "SYSTEM_SLOT_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "UPDATE_ONBOARD_DEV_TYPE10"
+ Value = "1"
+ Help = "Enable/Disable OnBoard Devices Type 10 dynamic update"
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "ONBOARD_DEVICE_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "UPDATE_MEMORY_TYPE16"
+ Value = "1"
+ Help = "Enable/Disable Memory Types 16/17/18/19/20 dynamic update"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "UPDATE_BATTERY_TYPE22"
+ Value = "1"
+ Help = "Enable/Disable Portable Battery Type 22 dynamic update"
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "UPDATE_ADDITIONAL_INFO_TYPE40"
+ Value = "1"
+ Help = "Enable/Disable Additional Info Type 40 dynamic update"
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "ADDITIONAL_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "UPDATE_DEVICE_EXT_TYPE41"
+ Value = "1"
+ Help = "Enable/Disable OnBoard Devices Extended Type 41 dynamic update"
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "ONBOARD_DEVICE_EXTENDED_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DYNAMIC_UPDATE_TYPE0_EC_VERSION"
+ Value = "1"
+ Help = "Enable/Disable Type 0 EC version dynamic update"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "CSM_OEM_SMBIOS_PNPFUNC_FILE"
+ Value = "$(BUILD_DIR)\smbrun.bin"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "SMBIOS_DYNAMIC_UPDATE_POLICY"
+ Value = "0"
+ Help = "Control when dynamic updates will be done: \OFF -> At Ready To Boot event \ON = In Smbios driver entry point"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+#
+# This is the table containing memory module Manufacturer ID Code.
+# It provides a way for OEM to add additional entries that are not already in JEDEC_MF_ID table in Smbios.c.
+# Entries to be added should be in the form of: number of continuation codes, manufacturer's ID code, manufacturer string (ref. JEP-106).
+# "Undefined" should be the last entry in this token.
+#
+TOKEN
+ Name = "MANUFACTURER_ID_CODE"
+ Value = '{{6, 0xf1, "InnoDisk Corporation"}, {0, 0, "Undefined"}}'
+ Help = 'This is the table containing memory module Manufacturer ID Code.\It provides a way for OEM to add additional entries that are not already in JEDEC_MF_ID table in Smbios.c.\Entries to be added should be in the form of: number of continuation codes, manufacturer ID code, manufacturer string (ref. JEP-106).\"Undefined" should be the last entry in this table.'
+ TokenType = Expression
+ TargetH = Yes
+End
+
+PATH
+ Name = "SMBIOS_DIR"
+End
+
+MODULE
+ Help = "Includes SMBiosBoard.mak to Project"
+ File = "SMBiosBoard.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\SMBiosBoard.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(SMBIOS_DIR)\SMBios32.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+ Token = "x64_BUILD" "=" "0"
+End
+
+ELINK
+ Name = "$(SMBIOS_DIR)\SMBios64.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+ Token = "x64_BUILD" "=" "1"
+End
+
+ELINK
+ Name = "$(SMBIOS_DIR)\SmbiosFlashData.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+ Token = "SMBIOS_DMIEDIT_DATA_LOC" "=" "0"
+End
+
+ELINK
+ Name = "$(SMBIOS_DIR)\SmbiosFlashData.ffs"
+ Parent = "FT_FV_BB"
+ InvokeOrder = AfterParent
+ Token = "SMBIOS_DMIEDIT_DATA_LOC" "=" "0"
+ Token = "FtRecovery_SUPPORT" "=" "1"
+End
+
+# Token commented out
+# Enable this token once AFU util can support DMI data in FV_MAIN
+#ELINK
+# Name = "$(SMBIOS_DIR)\SmbiosFlashData.ffs"
+# Parent = "FV_MAIN"
+# InvokeOrder = AfterParent
+# Token = "SMBIOS_DMIEDIT_DATA_LOC" "=" "1"
+#End
+
+ELINK
+ Name = "$(SMBIOS_DIR)\SmbiosGetFlashData32.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+ Token = "x64_BUILD" "=" "0"
+ Token = "SMBIOS_DMIEDIT_DATA_LOC" "!=" "2"
+End
+
+ELINK
+ Name = "$(SMBIOS_DIR)\SmbiosGetFlashData64.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+ Token = "x64_BUILD" "=" "1"
+ Token = "SMBIOS_DMIEDIT_DATA_LOC" "!=" "2"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\smbrun.inf"
+ Parent = "CSM_CUSTOM_INFS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "PreserveDmiEditData,"
+ Parent = "SMIFlashPreUpdateList"
+ InvokeOrder = AfterParent
+ Token = "SmbiosDMIEdit_SUPPORT" "=" "1"
+ Token = "SMBIOS_DMIEDIT_DATA_LOC" "=" "2"
+ Token = "SMBIOS_PRESERVE_NVRAM" "=" "1"
+End
+
+ELINK
+ Name = "RestoreDmiEditData,"
+ Parent = "SMIFlashEndUpdateList"
+ InvokeOrder = AfterParent
+ Token = "SmbiosDMIEdit_SUPPORT" "=" "1"
+ Token = "SMBIOS_DMIEDIT_DATA_LOC" "=" "2"
+ Token = "SMBIOS_PRESERVE_NVRAM" "=" "1"
+End
+
+ELINK
+ Name = "RecoveryPreserveDmiEditData,"
+ Parent = "OemBeforeFlashUpdateList"
+ InvokeOrder = AfterParent
+ Token = "SmbiosDMIEdit_SUPPORT" "=" "1"
+ Token = "SMBIOS_DMIEDIT_DATA_LOC" "=" "2"
+End
+
+ELINK
+ Name = "RecoveryRestoreDmiEditData,"
+ Parent = "OemAfterFlashUpdateList"
+ InvokeOrder = AfterParent
+ Token = "SmbiosDMIEdit_SUPPORT" "=" "1"
+ Token = "SMBIOS_DMIEDIT_DATA_LOC" "=" "2"
+End
+
+ELINK
+ Name = "SmbiosOemUpdateList"
+ InvokeOrder = ReplaceParent
+End
diff --git a/Board/EM/SMBIOS/SMBios32.ffs b/Board/EM/SMBIOS/SMBios32.ffs
new file mode 100644
index 0000000..6c98f6f
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBios32.ffs
Binary files differ
diff --git a/Board/EM/SMBIOS/SMBios64.ffs b/Board/EM/SMBIOS/SMBios64.ffs
new file mode 100644
index 0000000..7308188
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBios64.ffs
Binary files differ
diff --git a/Board/EM/SMBIOS/SMBiosBoard.chm b/Board/EM/SMBIOS/SMBiosBoard.chm
new file mode 100644
index 0000000..df8e3e3
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosBoard.chm
Binary files differ
diff --git a/Board/EM/SMBIOS/SMBiosBoard.dxs b/Board/EM/SMBIOS/SMBiosBoard.dxs
new file mode 100644
index 0000000..d344878
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosBoard.dxs
@@ -0,0 +1,54 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/BIN/Modules/SMBIOS/SMBiosBoard.dxs 2 6/02/09 3:44p Davidd $
+//
+// $Revision: 2 $
+//
+// $Date: 6/02/09 3:44p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Modules/SMBIOS/SMBiosBoard.dxs $
+//
+// 2 6/02/09 3:44p Davidd
+// Updated AMI headers (EIP 22180)
+//
+// 1 7/18/05 5:59p Davidd
+// File added for porting the SMBIOS dynamic data.
+//
+//
+//**********************************************************************
+
+#include <protocol\CPU.h>
+#include <protocol\PciRootBridgeIo.h>
+
+DEPENDENCY_START
+ EFI_CPU_ARCH_PROTOCOL_GUID AND
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID
+DEPENDENCY_END
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SMBIOS/SMBiosBoard.mak b/Board/EM/SMBIOS/SMBiosBoard.mak
new file mode 100644
index 0000000..939c9dc
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosBoard.mak
@@ -0,0 +1,108 @@
+#//**********************************************************************//
+#//**********************************************************************//
+#//** **//
+#//** (C)Copyright 1985-2009, American Megatrends, Inc. **//
+#//** **//
+#//** All Rights Reserved. **//
+#//** **//
+#//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **//
+#//** **//
+#//** Phone: (770)-246-8600 **//
+#//** **//
+#//**********************************************************************//
+#//**********************************************************************//
+
+#************************************************************************//
+# $Header: /Alaska/BIN/Modules/SMBIOS/SMBiosBoard.mak 9 11/01/10 12:33p Davidd $
+#
+# $Revision: 9 $
+#
+# $Date: 11/01/10 12:33p $
+#************************************************************************//
+# Revision History
+# ----------------
+# $Log: /Alaska/BIN/Modules/SMBIOS/SMBiosBoard.mak $
+#
+# 9 11/01/10 12:33p Davidd
+# [TAG] EIP41560
+# [Category] Improvement
+# [Description] DMIEDIT modified values are not preserved in reboot
+# [Files]
+# Smbios.c
+# Smbios.sdl
+# SmbiosBoard.c
+# SmbiosBoard.mak
+#
+# 8 6/02/09 3:45p Davidd
+# Updated AMI headers (EIP 22180)
+#
+# 7 1/22/08 4:19p Olegi
+#
+# 3 10/29/07 7:27p Felixp
+# Update to be compatible with SMBIOS label 4.6.1_ALPHA_01.05
+#
+# 2 12/02/05 12:17p Felixp
+# Pricate SMBIOSBoard.mak added.
+#
+# 1 12/02/05 12:16p Felixp
+#
+# 2 12/02/05 11:45a Felixp
+#
+# 1 7/18/05 6:01p Davidd
+# File added for porting the SMBIOS dynamic data.
+#
+#************************************************************************//
+
+all : SMBIOSBOARD
+
+SMBIOSBOARD : $(BUILD_DIR)\SMBiosBoard.mak SMBiosBoardBin SmBiosPnPBin
+
+SMBIOS_BOARD_OBJECTS = $(BUILD_DIR)\BOARD\EM\SMBIOS\smbiosboard.obj
+
+$(BUILD_DIR)\SMBiosBoard.mak : $(SMBIOS_DIR)\SMBIOSBoard.CIF $(SMBIOS_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(SMBIOS_DIR)\SMBIOSBoard.CIF $(CIF2MAK_DEFAULTS)
+
+SMBiosBoardBin : $(AMIDXELIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\SMBiosBoard.mak all\
+ NAME=SMBiosBoard \
+ OBJECTS="$(SMBIOS_BOARD_OBJECTS)" \
+ GUID=CEF68C66-06AB-4fb3-A3ED-5FFA885B5725\
+ ENTRY_POINT=SMIBiosBoardDriverEntryPoint\
+ TYPE=BS_DRIVER \
+ "CFLAGS=$(CFLAGS) /D\"SMBIOS_OEM_UPDATE_LIST=$(SmbiosOemUpdateList)\""\
+ COMPRESS=1
+
+SmBiosPnPBin: $(BUILD_DIR)\smbrun.inf
+
+$(BUILD_DIR)\smbrun.inf: $(BUILD_DIR)\token.mak $(CSM_OEM_SMBIOS_PNPFUNC_FILE)
+ copy << $@
+
+[MODULE]
+ModuleID = 1
+VendorID = 0
+DeviceID = 3
+File = $(CSM_OEM_SMBIOS_PNPFUNC_FILE)
+<<
+
+$(CSM_OEM_SMBIOS_PNPFUNC_FILE): $(BUILD_DIR)\smbrun.obj
+ $(ASMLINK) $(BUILD_DIR)\smbrun.obj, $*.exe, $*.map,,,
+ exe2bin $*.exe $@
+
+$(BUILD_DIR)\smbrun.obj: $(SMBIOS_DIR)\smbrun.asm
+ $(ASM) /c /nologo /Fo$(BUILD_DIR)\ $(SMBIOS_DIR)\smbrun.asm
+
+
+#//**********************************************************************//
+#//**********************************************************************//
+#//** **//
+#//** (C)Copyright 1985-2009, American Megatrends, Inc. **//
+#//** **//
+#//** All Rights Reserved. **//
+#//** **//
+#//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **//
+#//** **//
+#//** Phone: (770)-246-8600 **//
+#//** **//
+#//**********************************************************************//
+#//**********************************************************************//
diff --git a/Board/EM/SMBIOS/SMBiosFlashData.ffs b/Board/EM/SMBIOS/SMBiosFlashData.ffs
new file mode 100644
index 0000000..37242c9
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosFlashData.ffs
Binary files differ
diff --git a/Board/EM/SMBIOS/SMBiosStaticData/SMB.EQU b/Board/EM/SMBIOS/SMBiosStaticData/SMB.EQU
new file mode 100644
index 0000000..ca721db
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosStaticData/SMB.EQU
@@ -0,0 +1,1345 @@
+;Inclusion guard
+ifndef _SMB_EQU_
+_SMB_EQU_ equ 1
+
+;----------------------------------------------------------------------------
+; Do not change any structure definition unless otherwise specified
+;----------------------------------------------------------------------------
+
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2013, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
+
+;****************************************************************************
+; $Header: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/SMB.EQU 9 5/29/13 12:50p Davidd $
+;
+; $Revision: 9 $
+;
+; $Date: 5/29/13 12:50p $
+;
+;****************************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/SMB.EQU $
+;
+; 9 5/29/13 12:50p Davidd
+; [TAG] EIP124735
+; [Category] Spec Update
+; [Severity] Normal
+; [Description] SMBIOS 2.8.0 specification support for Aptio 4
+; [Files] Smb.equ
+; Smbdata.mac
+; Smbdesc.def
+; Smbstruc.def
+; Smbios.c
+; Smbios.h
+; SmbiosDynamicData.h
+;
+; 8 4/06/11 10:30a Davidd
+; [TAG] EIP56234
+; [Category] Spec Update
+; [Severity] Minor
+; [Description] SMBIOS 2.7.1 requirement
+; [Files] Smb.equ
+;
+; 7 10/08/10 8:17p Davidd
+; [TAG] EIP43278
+;
+; [Category] Function Request
+;
+; [Severity] Normal
+;
+; [Description] SMBIOS 2.7 requirement
+;
+; [Files] Include\Protocol\Smbios.h
+; Include\Protocol\SmbiosDynamicData.h
+; Board\EM\SMBIOS\SMBiosStaticData\SmbiosStaticData.sdl
+; Board\EM\SMBIOS\SMBiosStaticData\SMBDATA.MAC
+; Board\EM\SMBIOS\SMBiosStaticData\SMBSTRUC.DEF
+; Board\EM\SMBIOS\SMBiosStaticData\SMBMACRO.AID
+; Board\EM\SMBIOS\SMBiosStaticData\Smbdesc.def
+; Board\EM\SMBIOS\SMBiosStaticData\SMB.EQU
+;
+; 6 6/02/09 4:47p Davidd
+; Updated AMI headers (EIP 22180)
+;
+; 5 5/21/09 3:42p Davidd
+; Added new equates per SMBIOS 2.6.1 specification.
+;
+; 4 10/13/08 12:02p Davidd
+; Changes made to support SMBIOS specification v2.5 and v2.6
+;
+; 3 3/29/07 5:15p Davidd
+; Changed the year in the AMI banner.
+;
+; 2 5/31/05 12:03p Davidd
+; Added equates for PCI Express.
+;
+; 1 4/29/05 2:15p Davidd
+; Initial checkin.
+;
+; 9 11/07/03 4:39p Girim
+; Corrected the Type Equates, added the Processor Type, Processor Upgrade
+; and Pointing Device Equates and Updated the Copyright Headers.
+;
+; 8 10/18/02 3:45p Girim
+; SMBIOS 2.3.3 Compliance.
+;
+; 7 10/18/02 3:40p Girim
+; Added new equates in Base Board Info (Type 2) and Processor Info (Type
+; 4) as defined in SMBIOS 2.3.3.
+; Removed duplicate definitions in System Enclosure (Type 3)
+;
+; 6 9/09/02 7:07p Girim
+; Added Safe Keyword Log:
+;
+;****************************************************************************
+
+;----------------------------------------------------------------------------
+; GENERAL EQUATES
+;----------------------------------------------------------------------------
+; indicate the presence/absence of an item/structure, used in SMBDESC.DEF
+Present EQU 1 ; present
+Absent EQU 0 ; absent
+
+; indicate the item yes/not supported information, used in SMBDESC.DEF
+Yes EQU 1 ; supported
+No EQU 0 ; not supported
+
+; indicate the item enabled/disabled information, used in SMBDESC.DEF
+ENABLED EQU 1 ; enabled
+DISABLED EQU 0 ; disabled
+
+IEPS_LENGTH EQU 10h ; length of IEPS
+DEFINE textequ <TEXTEQU>
+
+;----------------------------------------------------------------------------
+; DIFFERENT STRUCTURE TYPE EQUATES
+;----------------------------------------------------------------------------
+; Structure Name Structure Type
+BIOS_INFORMATION_TYPE equ 00h ; type 00
+SYSTEM_INFORMATION_TYPE equ 01h ; type 01
+BASE_BOARD_INFORMATION_TYPE equ 02h ; type 02
+SYSTEM_ENCLOSURE_CHASSIS_TYPE equ 03h ; type 03
+PROCESSOR_INFORMATION_TYPE equ 04h ; type 04
+MEMORY_CONTROLLER_INFORMATION_TYPE equ 05h ; type 05
+MEMORY_MODULE_INFORMATION_TYPE equ 06h ; type 06
+CACHE_INFORMATION_TYPE equ 07h ; type 07
+PORT_CONNECTOR_INFORMATION_TYPE equ 08h ; type 08
+SYSTEM_SLOT_INFORMATION_TYPE equ 09h ; type 09
+ONBOARD_DEVICE_INFORMATION_TYPE equ 0Ah ; type 10
+OEM_STRING_INFORMATION_TYPE equ 0Bh ; type 11
+SYSTEM_CONFIGURATION_TYPE equ 0Ch ; type 12
+BIOS_LANGUAGE_INFORMATION_TYPE equ 0Dh ; type 13
+GROUP_ASSOCIATION_TYPE equ 0Eh ; type 14
+EVENTLOG_INFORMATION_TYPE equ 0Fh ; type 15
+MEMORY_ARRAY_INFORMATION_TYPE equ 10h ; type 16
+MEMORY_DEVICE_INFORMATION_TYPE equ 11h ; type 17
+MEMORY_ERROR_INFORMATION_TYPE equ 12h ; type 18
+MEMORY_ARRAY_MAPPED_ADDRESS_INFORMATION_TYPE equ 13h ; type 19
+MEMORY_DEVICE_MAPPED_ADDRESS_INFORMATION_TYPE equ 14h ; type 20
+BUILTIN_POINTING_DEVICE_TYPE equ 15h ; type 21
+PORTABLE_BATTERY_TYPE equ 16h ; type 22
+SYSTEM_RESET_TYPE equ 17h ; type 23
+HARDWARE_SECURITY_TYPE equ 18h ; type 24
+SYSTEM_POWER_CONTROLS_TYPE equ 19h ; type 25
+VOLTAGE_PROBE_TYPE equ 1Ah ; type 26
+COOLING_DEVICE_TYPE equ 1Bh ; type 27
+TEMPATURE_PROBE_TYPE equ 1Ch ; type 28
+ELECTRICAL_CURRENT_PROBE_TYPE equ 1Dh ; type 29
+OUT_OF_BAND_REMOTE_ACCESS_TYPE equ 1Eh ; type 30
+BOOT_INTEGRITY_SERVICES_TYPE equ 1Fh ; type 31
+SYSTEM_BOOT_INFORMATION_TYPE equ 20h ; type 32
+SIXTYFOUR_BIT_MEMORY_ERROR_INFORMATION_TYPE equ 21h ; type 33
+MANAGEMENT_DEVICE_TYPE equ 22h ; type 34
+MANAGEMENT_DEVICE_COMPONENT_TYPE equ 23h ; type 35
+MANAGEMENT_DEVICE_THRESHOLD_DATA_TYPE equ 24h ; type 36
+MEMORY_CHANNEL_TYPE equ 25h ; type 37
+IPMI_DEVICE_INFORMATION_TYPE equ 26h ; type 38
+SYSTEM_POWER_SUPPLY_TYPE equ 27h ; type 39
+INACTIVE_STRUCTURE_TYPE equ 7Eh ; type 126
+END_OF_TABLE_TYPE equ 7Fh ; type 127
+OEM_IO_GPNV_INFORMATION_TYPE equ 0F0h ; type F0..OEM Defined
+OEM_MEMORY_GPNV_INFORMATION_TYPE equ 0F1h ; type F1..OEM Defined
+
+;----------------------------------------------------------------------------
+; Structure Type 0: No equates used in BIOS INFORMATION Structure
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 1: Equates used in SYSTEM INFORMATION Structure
+;----------------------------------------------------------------------------
+; Wakeup Type (an enumerated BYTE value)
+; Equate Name Value Meaning
+; 00h ; Reserved
+SI_OTHER equ 01h ; Other
+SI_UNKNOWN equ 02h ; Unknown
+SI_APM_TIMER equ 03h ; APM Timer
+SI_MODEM_RING equ 04h ; Modem Ring
+SI_LAN_REMOTE equ 05h ; LAN Remote
+SI_POWER_SWITCH equ 06h ; Power Switch
+SI_PCI_PME equ 07h ; PCI PME#
+SI_AC_POWER equ 08h ; AC Power Restored
+
+;----------------------------------------------------------------------------
+; Structure Type 2: Equates used in BASE BOARD INFORMATION Structure
+;----------------------------------------------------------------------------
+; Base Board Type (an enumerated BYTE value)
+; Equate Name Value Meaning
+; 00h ; Reserved
+BB_UNKNOWN equ 01h ; Unknown
+BB_OTHER equ 02h ; Other
+BB_SERVER_BLADE equ 03h ; Server Blade
+BB_CONNECTIVITY_SWITCH equ 04h ; Connectivity Switch
+BB_SYS_MGMT_MODULE equ 05h ; System Management Module
+BB_PROCESSOR_MODULE equ 06h ; Processor Module
+BB_IO_MODULE equ 07h ; I/O Module
+BB_MEMORY_MODULE equ 08h ; Memory Module
+BB_DAUGHTER_BOARD equ 09h ; Daughter Board
+BB_MOTHER_BOARD equ 0Ah ; Motherboard (includes Processor, Memory, and I/O)
+BB_PROC_MEM_MODULE equ 0Bh ; Processor/Memory Module
+BB_PROC_IO_MODULE equ 0Ch ; Processor/IO Module
+BB_INTERCONNECT_BOARD equ 0Dh ; Interconnect Board
+
+;----------------------------------------------------------------------------
+; Structure Type 3: Equates used in SYSTEM ENCLOSURE/CHASSIS Structure
+;----------------------------------------------------------------------------
+; System Chassis Type (an enumerated BYTE value)
+; Equate Name Value Meaning
+; 00h ; Reserved
+SE_OTHER equ 01h ; Other
+SE_UNKNOWN equ 02h ; Unknown
+SE_DESKTOP equ 03h ; Desktop
+SE_LOW_PROFILE_DTP equ 04h ; Low Profile Desktop
+SE_PIZZA_BOX equ 05h ; Pizza Box
+SE_MINI_TOWER equ 06h ; Mini Tower
+SE_TOWER equ 07h ; Tower
+SE_PORTABLE equ 08h ; Portable
+SE_LAPTOP equ 09h ; Laptop
+SE_NOTEBOOK equ 0Ah ; Notebook
+SE_HAND_HELD equ 0Bh ; Handheld
+SE_DOCKING_STATION equ 0Ch ; Docking Station
+SE_ALL_IN_ONE equ 0Dh ; All in One
+SE_SUB_NOTEBOOK equ 0Eh ; Sub Notebook
+SE_SPACE_SAVING equ 0Fh ; Space Saving
+SE_LUNCH_BOX equ 10h ; Lunch Box
+SE_MAIN_SER_CHASIS equ 11h ; Main Server Chassis
+SE_EXP_CHASIS equ 12h ; Expansion Chassis
+SE_SUB_CHASIS equ 13h ; SubChassis
+SE_BUS_EXP_CHASIS equ 14h ; Bus Expansion Chassis
+SE_PERPL_CHASIS equ 15h ; Peripheral Chassis
+SE_RAID_CHASIS equ 16h ; RAID Chassis
+SE_ROCK_MOUNT_CHASIS equ 17h ; Rack Mount Chassis
+SE_SEALED_CASE_PC equ 18h ; Sealed-case PC
+SE_MULTI_SYS_CHASIS equ 19h ; Multi-System Chasis
+SE_COMPACT_PCI equ 1Ah ; CompactPCI
+SE_ADVANCED_TCA equ 1Bh ; AdvancedTCA
+SE_BLADE equ 1Ch ; Blade
+SE_BLADE_ENCLOSURE equ 1Dh ; Blade Enclosure
+
+;----------------------------------------------------------------------------
+; System Chassis Bootup state, Chassis Power Supply and Chassis Thermal State
+; equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+SCS_OTHER equ 01h ; Other
+SCS_UNKNOWN equ 02h ; Unknown
+SCS_SAFE equ 03h ; Safe
+SCS_WARNING equ 04h ; Warning
+SCS_CRITICAL equ 05h ; Critical
+SCS_NON_RECOVERABLE equ 06h ; Non-recoverable
+
+;----------------------------------------------------------------------------
+; System Chassis Security state equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+SSS_OTHER equ 01h ; Other
+SSS_UNKNOWN equ 02h ; Unknown
+SSS_NONE equ 03h ; None
+SSS_EXT_INTE_LOCKED equ 04h ; External interface locked out
+SSS_EXT_INTE_ENABLE equ 05h ; External interface enabled
+
+;----------------------------------------------------------------------------
+; Structure Type 4: Equates used in PROCESSOR INFORMATION Structure
+;----------------------------------------------------------------------------
+; Processor Type equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+CPU_OTHER equ 01h ; Other
+CPU_UNKNOWN equ 02h ; Unknown
+CPU_CENTRAL_PROCESSOR equ 03h ; Central processor
+CPU_MATH_PROCESSOR equ 04h ; Math processor
+CPU_DSP_PROCESSOR equ 05h ; DSP processor
+CPU_VIDEO_PROCESSOR equ 06h ; Video Processor
+
+;----------------------------------------------------------------------------
+; Processor Family equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+FA_OTHER equ 01h ; Other
+FA_UNKNOWN equ 02h ; Unknown
+FA_8086 equ 03h ; 8086
+FA_80286 equ 04h ; 80286
+FA_80386 equ 05h ; 80386
+FA_80486 equ 06h ; 80486
+FA_8087 equ 07h ; 8087
+FA_80287 equ 08h ; 80287
+FA_80387 equ 09h ; 80387
+FA_80487 equ 0Ah ; 80487
+FA_PENTIUM_FAMILY equ 0Bh ; Pentium family
+FA_PENTIUM_PRO_FAMILY equ 0Ch ; Pemtium-Pro family
+FA_PENTIUM_II_FAMILY equ 0Dh ; Pentium II family
+FA_PENTIUM_MMX_FAMILY equ 0Eh ; Pentium mmx family
+FA_CELERON_FAMILY equ 0Fh ; Pentium Celeron family
+FA_PII_XEON_FAMILY equ 10h ; Pentium II Xeon family
+FA_PIII_FAMILY equ 11h ; Pentium III family
+FA_M1_FAMILY equ 12h ; M1 family
+FA_M2_FAMILY equ 13h ; M2 family
+FA_CELERON_M equ 14h ; Intel(R) Celeron(R) M Processor
+FA_PENTIUM_4_HT equ 15h ; Intel(R) Pentium(R) 4 HT Processor
+FA_AMD_DURON_FAMILY equ 18h ; AMD Duron family
+FA_K5_FAMILY equ 19h ; AMD K5 family
+FA_K6_FAMILY equ 1Ah ; AMD K6 family
+FA_K6_2_FAMILY equ 1Bh ; AMD K6-2 family
+FA_K6_3_FAMILY equ 1Ch ; AMD K6-3 family
+FA_AMD_ATHLON_FAMILY equ 1Dh ; AMD Athlon family
+FA_AMD_2900_FAMILY equ 1Eh ; AMD29000 family
+FA_K6_2P_FAMILY equ 1Fh ; AMD K6-2+ family
+FA_POWER_PC_FAMILY equ 20h ; Power Pc family
+FA_POWER_PC_601 equ 21h ; Power Pc 601 family
+FA_POWER_PC_603 equ 22h ; Power Pc 603 family
+FA_POWER_PC_603_PLUS equ 23h ; Power Pc 603 Plus family
+FA_POWER_PC_604 equ 24h ; Power Pc 604 family
+FA_POWER_PC_620 equ 25h ; Power Pc 620 family
+FA_POWER_PC_X704 equ 26h ; Power Pc x704 family
+FA_POWER_PC_750 equ 27h ; Power Pc 750 family
+FA_CORE_DUO equ 28h ; Intel(R) Core(TM) Duo Processor
+FA_CORE_DUO_MOBILE equ 29h ; Intel(R) Core(TM) Duo Mobile Processor
+FA_CORE_SOLO_MOBILE equ 2Ah ; Intel(R) Core(TM) Solo Mobile Processor
+FA_ATOM equ 2Bh ; Intel(R) Atom(TM) Processor
+FA_ALPHA_FAMILY equ 30h ; DEC Aplpha family
+FA_ALPHA_21064 equ 31h ; Alpha 21064
+FA_ALPHA_21066 equ 32h ; Alpha 21066
+FA_ALPHA_21164 equ 33h ; Alpha 21164
+FA_ALPHA_21164PC equ 34h ; Alpha 21064PC
+FA_ALPHA_21164a equ 35h ; Alpha 21164a
+FA_ALPHA_21264 equ 36h ; Alpha 21264
+FA_ALPHA_21364 equ 37h ; Alpha 21364
+FA_AMD_TURION_II_ULTRA equ 38h ; AMD Turion II Ultra Dual-Core Mobile M Processor Family
+FA_AMD_TURION_II_DUAL equ 39h ; AMD Turion II Dual-Core Mobile M Processor Family
+FA_ATHLON_II_DUAL equ 3Ah ; AMD Athlon II Dual-Core M Processor
+FA_OPTERON_6100 equ 3Bh ; AMD Opteron 6100 Series Processor
+FA_OPTERON_4100 equ 3Ch ; AMD Opteron 4100 Series Processor
+FA_OPTERON_6200 equ 3Dh ; AMD Opteron 6200 Series Processor
+FA_OPTERON_4200 equ 3Eh ; AMD Opteron 4200 Series Processor
+FA_AMD_FX equ 3Fh ; AMD FX(TM) Series Processor
+FA_MIPS_FAMILY equ 40h ; Mips family
+FA_MIPS_R4000 equ 41h ; Mips R4000
+FA_MIPS_R4200 equ 42h ; Mips R4200
+FA_MIPS_R4400 equ 43h ; Mips R4400
+FA_MIPS_R4600 equ 44h ; Mips R4600
+FA_MIPS_R10000 equ 45h ; Mips R10000
+FA_AMD_C equ 46h ; AMD C-Series Processor
+FA_AMD_E equ 47h ; AMD E-Series Processor
+FA_AMD_A equ 48h ; AMD A-Series Processor
+FA_AMD_G equ 49h ; AMD G-Series Processor
+FA_AMD_Z equ 4Ah ; AMD Z-Series Processor
+FA_AMD_R equ 4Bh ; AMD R-Series Processor
+FA_OPTERON_4300 equ 4Ch ; AMD Opteron(TM) 4300 Series Processor
+FA_OPTERON_6300 equ 4Dh ; AMD Opteron(TM) 6300 Series Processor
+FA_OPTERON_3300 equ 4Eh ; AMD Opteron(TM) 3300 Series Processor
+FA_FIREPRO equ 4Fh ; AMD FirePro(TM) Series Processor
+FA_SPARC_FAMILY equ 50h ; Sparc family
+FA_SPARC_SUPPERSPARC equ 51h ; SupperSPARC
+FA_SPARC_MICROSPARC_II equ 52h ; microSPARC II
+FA_SPARC_MICROSPARC_IIep equ 53h ; microSPARC IIep
+FA_SPARC_ULTRASPARC equ 54h ; ultraSPARC
+FA_SPARC_ULTRASPARC_II equ 55h ; ultraSPARC II
+FA_SPARC_ULTRASPARC_II_i equ 56h ; ultraSPARC IIi
+FA_SPARC_ULTRASPARC_III equ 57h ; ultraSPARC III
+FA_SPARC_ULTRASPARC_III_i equ 58h ; ultraSPARC IIIi
+FA_68040_FAMILY equ 60h ; 68040 family
+FA_68xxx_FAMILY equ 61h ; 68xxx family
+FA_68000 equ 62h ; Motorola 68000 family
+FA_68010 equ 63h ; Motorola 68010 family
+FA_68020 equ 64h ; Motorola 68020 family
+FA_68030 equ 65h ; Motorola 68030 family
+FA_HOBBIT_FAMILY equ 70h ; Hobbit family
+FA_CRUSOE_TM5000 equ 78h ; Crusoe TM5000
+FA_CRUSOE_TM3000 equ 79h ; Crusoe TM3000
+FA_EFFICEON_TM8000 equ 7Ah ; Efficeon TM8000
+FA_WEITEK_FAMILY equ 80h ; Weitek family
+FA_ITANIUM_FAMILY equ 82h ; Itanium family
+FA_AMD_ATHLON_64_FAMILY equ 83h ; AMD Athlon 64 family
+FA_AMD_OPTERON_FAMILY equ 84h ; AMD Opteron family
+FA_AMD_SEMPRON_FAMILY equ 85h ; AMD Sempron family
+FA_AMD_TURION_FAMILY equ 86h ; AMD Turion family
+FA_AMD_OPTERON_DUALCORE equ 87h ; Dual-Core AMD Opteron family
+FA_AMD_ATHLON_64X2_DUALCORE equ 88h ; AMD Athlon 64 X2 Dual-Core
+FA_AMD_TURION_64X2_MOBILE equ 89h ; AMD Turion 64 X2 Mobile
+FA_AMD_QUAD_CORE_OPTERON equ 8Ah ; Quad-Core AMD Opteron(TM) Processor Family
+FA_AMD_3RD_GEN_OPTERON equ 8Bh ; Third-Generation AMD Opteron(TM) Processor Family
+FA_AMD_PHENOM_FX_QUAD_CORE equ 8Ch ; AMD Phenom(TM) FX Quad-Core Processor Family
+FA_AMD_PHENOM_X4_QUAD_CORE equ 8Dh ; AMD Phenom(TM) X4 Quad-Core Processor Family
+FA_AMD_PHENOM_X2_DUAL_CORE equ 8Eh ; AMD Phenom(TM) X2 Dual-Core Processor Family
+FA_AMD_ATHLON_X2_DUAL_CORE equ 8Fh ; AMD Athlon(TM) X2 Dual-Core Processor Family
+FA_RISC_FAMILY equ 90h ; RISC family
+FA_PA_RISC_8500 equ 91h ; PA-RISC 8500
+FA_PA_RISC_8000 equ 92h ; PA-RISC 8000
+FA_PA_RISC_7300LC equ 93h ; PA-RISC 7300LC
+FA_PA_RISC_7200 equ 94h ; PA-RISC 7200
+FA_PA_RISC_7100LC equ 95h ; PA-RISC 7100LC
+FA_PA_RISC_7100 equ 96h ; PA-RISC 7100
+FA_V30_FAMILY equ 0A0h ; V30 family
+FA_QUAD_CORE_XEON_3200 equ 0A1h ; Quad-Core Intel(R) Xeon(R) processor 3200 Series
+FA_DUAL_CORE_XEON_3000 equ 0A2h ; Dual-Core Intel(R) Xeon(R) processor 3000 Series
+FA_QUAD_CORE_XEON_5300 equ 0A3h ; Quad-Core Intel(R) Xeon(R) processor 5300 Series
+FA_DUAL_CORE_XEON_5100 equ 0A4h ; Dual-Core Intel(R) Xeon(R) processor 5100 Series
+FA_DUAL_CORE_XEON_5000 equ 0A5h ; Dual-Core Intel(R) Xeon(R) processor 5000 Series
+FA_DUAL_CORE_XEON_LV equ 0A6h ; Dual-Core Intel(R) Xeon(R) processor LV
+FA_DUAL_CORE_XEON_ULV equ 0A7h ; Dual-Core Intel(R) Xeon(R) processor ULV
+FA_DUAL_CORE_XEON_7100 equ 0A8h ; Dual-Core Intel(R) Xeon(R) processor 7100 Series
+FA_QUAD_CORE_XEON_5400 equ 0A9h ; Quad-Core Intel(R) Xeon(R) processor 5400 Series
+FA_QUAD_CORE_XEON equ 0AAh ; Quad-Core Intel(R) Xeon(R) processor
+FA_DUAL_CORE_XEON_5200 equ 0ABh ; Dual-Core Intel(R) Xeon(R) processor 5200 Series
+FA_DUAL_CORE_XEON_7200 equ 0ACh ; Dual-Core Intel(R) Xeon(R) processor 7200 Series
+FA_QUAD_CORE_XEON_7300 equ 0ADh ; Quad-Core Intel(R) Xeon(R) processor 7300 Series
+FA_QUAD_CORE_XEON_7400 equ 0AEh ; Quad-Core Intel(R) Xeon(R) processor 7400 Series
+FA_MULTI_CORE_XEON_7400 equ 0AFh ; Multi-Core Intel(R) Xeon(R) processor 7400 Series
+FA_PIII_XEON_FAMILY equ 0B0h ; Pentium III Xeon processor
+FA_PIII_SPEED_STEP equ 0B1h ; Pentium Processor with Intel Speed Step Technology
+FA_P4_FAMILY equ 0B2h ; Pentium 4 Processor
+FA_XEON_FAMILY equ 0B3h ; Intel Xeon Family
+FA_AS400_FAMILY equ 0B4h ; AS400 Family
+FA_XEON_MP equ 0B5h ; Intel Xeon Processor MP
+FA_AMD_ATHLON_XP equ 0B6h ; AMD Athlon XP Processor Family
+FA_AMD_ATHLON_MP equ 0B7h ; AMD Athlon MP Processor Family
+FA_ITANIUM2 equ 0B8h ; Intel Itanium2 Processor
+FA_PENTIUM_M_FAMILY equ 0B9h ; Intel Pentium M Processor
+FA_CELERON_D_FAMILY equ 0BAh ; Intel Celeron D Processor
+FA_PENTIUM_D_FAMILY equ 0BBh ; Intel Pentium D Processor
+FA_PENTIUM_EXTREME_FAMILY equ 0BCh ; Intel Pentium Processor Extreme Edition
+FA_INTEL_CORE_SOLE equ 0BDh ; Intel(R) Core(TM) Solo Processor
+FA_INTEL_CORE_2 equ 0BFh ; Intel(R) Core(TM)2 Duo Processor
+FA_INTEL_CORE_2_SOLO equ 0C0h ; Intel(R) Core(TM)2 Solo processor
+FA_INTEL_CORE_2_EXTREME equ 0C1h ; Intel(R) Core(TM)2 Extreme processor
+FA_INTEL_CORE_2_QUAD equ 0C2h ; Intel(R) Core(TM)2 Quad processor
+FA_CORE_2_EXTREME_MOBIL equ 0C3h ; Intel(R) Core(TM)2 Extreme Mobile processor
+FA_CORE_2_DUO_MOBIL equ 0C4h ; Intel(R) Core(TM)2 Duo Mobile processor
+FA_CORE_2_SOLO_MOBIL equ 0C5h ; Intel(R) Core(TM)2 Solo Mobile processor
+FA_CORE_I7 equ 0C6h ; Intel(R) Core(TM)2 i7 processor
+FA_DUAL_CORE_CELERON equ 0C7h ; Dual-Core Intel(R) Celeron(R) processor
+FA_IBM390_FAMILY equ 0C8h ; IBM390 family
+FA_G4_FAMILY equ 0C9h ; G4 family
+FA_G5_FAMILY equ 0CAh ; G5 family
+FA_G6_FAMILY equ 0CBh ; ESA/390 G6 family
+FA_Z_ARCHITECTURE equ 0CCh ; z/Architecture Base
+FA_INTEL_CORE_I5 equ 0CDh ; Intel Core i5 Processor
+FA_INTEL_CORE_I3 equ 0CEh ; Intel Core i3 Processor
+FA_VIA_C7_M equ 0D2h ; VIA C7 M Processor
+FA_VIA_C7_D equ 0D3h ; VIA C7 D Processor
+FA_VIA_C7 equ 0D4h ; VIA C7 Processor
+FA_VIA_EDEN equ 0D5h ; VIA Eden Processor
+FA_MULTI_CORE_XEON equ 0D6h ; Multi-Core Intel(R) Xeon(R) processor
+FA_DUAL_CORE_XEON_3XXX equ 0D7h ; Dual-Core Intel(R) Xeon(R) processor 3xxx Series
+FA_QUAD_CORE_XEON_3XXX equ 0D8h ; Quad-Core Intel(R) Xeon(R) processor 3xxx Series
+FA_DUAL_CORE_XEON_5XXX equ 0DAh ; Dual-Core Intel(R) Xeon(R) processor 5xxx Series
+FA_QUAD_CORE_XEON_5XXX equ 0DBh ; Quad-Core Intel(R) Xeon(R) processor 5xxx Series
+FA_DUAL_CORE_XEON_7XXX equ 0DDh ; Dual-Core Intel(R) Xeon(R) processor 7xxx Series
+FA_QUAD_CORE_XEON_7XXX equ 0DEh ; Quad-Core Intel(R) Xeon(R) processor 7xxx Series
+FA_MULTI_CORE_XEON_7XXX equ 0DFh ; Multi-Core Intel(R) Xeon(R) processor 7xxx Series
+FA_MULTI_CORE_XEON_3400 equ 0E0h ; Multi-Core Intel(R) Xeon(R) processor 3400 Series
+FA_OPTERON_3000 equ 0E4h ; AMD Opteron(TM) 3000 Series Processor
+FA_SEMPRON_II equ 0E5h ; AMD Sempron(TM) II Processor
+FA_EMBEDED_OPTERON_QUAD_CORE equ 0E6h ; Embedded AMD Opteron(TM) Quad-Core Processor Family
+FA_PHENOM_TRIPLE_CORE equ 0E7h ; AMD Phenom(TM) Triple-Core Processor Family
+FA_TUIRON_ULTRA_DUAL_CORE_MOBILE equ 0E8h ; AMD Tuiron(TM) Ultra Dual-Core Mobile Processor Family
+FA_TUIRON_DUAL_CORE_MOBILE equ 0E9h ; AMD Tuiron(TM) Dual-Core Mobile Processor Family
+FA_ATHLON_DUAL_CORE equ 0EAh ; AMD Athlon(TM) Dual-Core Processor Family
+FA_SEMPRON_SI equ 0EBh ; AMD Sempron(TM) SI Processor Family
+FA_PHENOM_II equ 0ECh ; AMD Phenom II Processor Family
+FA_ATHLON_FAMILY equ 0EDh ; AMD Athlon II Processor Family
+FA_AMD_OPTERON_6CORE equ 0EEh ; Six-Core AMD Opteron Processor Family
+FA_AMD_SEMPRON_M equ 0EFh ; AMD Sempron M Processor Family
+FA_I860_FAMILY equ 0FAh ; i860 family
+FA_I960_FAMILY equ 0FBh ; i960 family
+FA_PROC_FAMILY_2 equ 0FEh ; Indicator to obtain the processor
+ ; family from the Processor Family 2
+ ; field
+FA_SH_3 equ 104h ; SH-3
+FA_SH_4 equ 105h ; SH-4
+FA_ARM equ 118h ; ARM
+FA_STRONG_ARM equ 119h ; StrongARM
+FA_6x86 equ 12Ch ; 6x86
+FA_MEDIA_GX equ 12Dh ; MediaGX
+FA_MII equ 12Eh ; MII
+FA_WINCHIP equ 140h ; WinChip
+FA_DSP equ 15Eh ; DSP
+FA_VIDEO_PROCESSOR equ 1F4h ; Video Processor
+;----------------------------------------------------------------------------
+; Processor Upgrade equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+UPG_OTHER equ 01h ; Other
+UPG_UNKNOWN equ 02h ; Unknown
+UPG_DAUGHTER_BOARD equ 03h ; Daughter board
+UPG_ZIF_SOCKET equ 04h ; ZIF socket
+UPG_REPLACEABLE_PIGGY_BACK equ 05h ; Replaceable Piggy Back
+UPG_NONE equ 06h ; None
+UPG_LIF_SOCKET equ 07h ; LIF socket
+UPG_SLOT1 equ 08h ; Slot 1
+UPG_SLOT2 equ 09h ; Slot 2
+UPG_370 equ 0Ah ; 370 Pin Socket
+UPG_SLOTA equ 0Bh ; Slot A
+UPG_SLOTM equ 0Ch ; Slot M
+UPG_423 equ 0Dh ; Socket 423
+UPG_SOCKETA equ 0Eh ; Socket A (Socket 462)
+UPG_SOCKET478 equ 0Fh ; Socket 478
+UPG_SOCKET754 equ 10h ; Socket 754
+UPG_SOCKET940 equ 11h ; Socket 940
+UPG_SOCKET939 equ 12h ; Socket 939
+UPG_SOCKET604 equ 13h ; Socket mPGA604
+UPG_SOCKET771 equ 14h ; Socket LGA771
+UPG_SOCKET775 equ 15h ; Socket LGA775
+UPG_SOCKET_S1 equ 16h ; Socket S1
+UPG_SOCKET_AM2 equ 17h ; Socket AM2
+UPG_SOCKET_F equ 18h ; Socket F (1207)
+UPG_SOCKET_LGA_1366 equ 19h ; Socket LGA 1366
+UPG_SOCKET_G34 equ 1Ah ; Socket G34
+UPG_SOCKET_AM3 equ 1Bh ; Socket AM3
+UPG_SOCKET_C32 equ 1Ch ; Socket C32
+UPG_SOCKET_LGA_1156 equ 1Dh ; Socket LGA 1156
+UPG_SOCKET_LGA_1567 equ 1Eh ; Socket LGA 1567
+UPG_SOCKET_PGA_988A equ 1Fh ; Socket PGA 988A
+UPG_SOCKET_BGA_1288 equ 20h ; Socket BGA 1288
+UPG_SOCKET_RPGA_988B equ 21h ; Socket rPGA988B
+UPG_SOCKET_BGA_1023 equ 22h ; Socket BGA 1023
+UPG_SOCKET_BGA_1224 equ 23h ; Socket BGA 1224
+UPG_SOCKET_BGA_1155 equ 24h ; Socket BGA 1155
+UPG_SOCKET_LGA_1356 equ 25h ; Socket LGA 1356
+UPG_SOCKET_LGA_2011 equ 26h ; Socket LGA 2011
+UPG_SOCKET_FS_1 equ 27h ; Socket FS 1
+UPG_SOCKET_FS_2 equ 28h ; Socket FS 2
+UPG_SOCKET_FM_1 equ 29h ; Socket FM 1
+UPG_SOCKET_FM_2 equ 2Ah ; Socket FM 2
+UPG_SOCKET_LGA_2011_3 equ 2Bh ; Socket LGA2011-3
+UPG_SOCKET_LGA_1356_3 equ 2Ch ; Socket LGA1356-3
+
+;----------------------------------------------------------------------------
+; Processor Voltage (a byte value)
+; Voltage is specified in Bit6-0 of this byte. Bit6-0 is interpreted according
+; to Bit-7.
+; Bit-7 = 0, Standard type
+; In this case Bit6-0 is a bit-mapped list of allowed voltages
+; (bit-mapped voltage equates below)
+; = 1, User defined type
+; In this case Bit6-0 is an enumerated value calculated as follows
+; value = 10*the voltage in volts
+; e.g. for 2.9V, bit6-0 should contain 29 decimal or 13h.
+;----------------------------------------------------------------------------
+; Equate Name Value Meaning
+STANDARD equ 00000000b ; Bit-7 = 0, Standard (bit6-0 is a list of allowed voltages)
+USER_DEFINED equ 10000000b ; Bit-7 = 1, User defined (bit6-0 is an enumerated value)
+
+; Bit-mappes Voltage equates
+VOLT_5 equ 00000001b ; Bit-0 = 1, 5 Volt
+VOLT_33 equ 00000010b ; Bit-1 = 1, 3.3 Volt
+VOLT_29 equ 00000100b ; Bit-2 = 1, 2.9 Volt
+ ; Bit6-3.....not defined
+
+;----------------------------------------------------------------------------
+; Structure Type 5: Equates used in MEMORY CONTROLLER Structure
+;----------------------------------------------------------------------------
+; Memory Controller Error Detecting method equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+MC_OTHER equ 01h ; Other
+MC_UNKNOWN equ 02h ; Unknown
+MC_NONE equ 03h ; None
+MC_8BIT_PARITY equ 04h ; Parity
+MC_32BIT_ECC equ 05h ; 32-bit ECC
+MC_64BIT_ECC equ 06h ; 64-bit ECC
+MC_128BIT_ECC equ 07h ; 128-bit ECC
+MC_CRC equ 08h ; CRC
+
+;----------------------------------------------------------------------------
+; Memory Controller supported Interleave equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+IS_OTHER equ 01h ; Other
+IS_UNKNOWN equ 02h ; Unknown
+IS_ONEWAY_INTLEAVE equ 03h ; One-way Interleave
+IS_TWOWAY_INTLEAVE equ 04h ; Two-way Interleave
+IS_FORWAY_INTLEAVE equ 05h ; Four-way Interleave
+IS_EHTWAY_INTLEAVE equ 06h ; Eight-way Interleave
+IS_STNWAY_INTLEAVE equ 07h ; Sixteen-way Interleave
+
+;----------------------------------------------------------------------------
+; Memory Controller Current Interleave equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+ICS_OTHER equ 01h ; Other
+ICS_UNKNOWN equ 02h ; Unknown
+ICS_ONEWAY_INTLEAVE equ 03h ; One-way Interleave
+ICS_TWOWAY_INTLEAVE equ 04h ; Two-way Interleave
+ICS_FORWAY_INTLEAVE equ 05h ; Four-way Interleave
+ICS_EHTWAY_INTLEAVE equ 06h ; Eight-way Interleave
+ICS_STNWAY_INTLEAVE equ 07h ; Sixteen-way Interleave
+
+;----------------------------------------------------------------------------
+; Structure Type 6: Equates used in MEMORY MODULE Structure
+;----------------------------------------------------------------------------
+; Memory Speed equates (an enumerated byte value)
+; Equate Name Value Meaning
+MM_SPEED_UNKNOWN equ 00h ; Memory speed unknown
+ ; if memory speed is known, specify it as mentioned in SMBDESC.DEF
+; Memory Module Bank Connection equates (an enumerated byte value)
+; Equate Name Value Meaning
+MM_NO_BANK_CONNECTION equ 0Fh ; No Bank connection
+RAS_1 equ 00 ; Ras-1 line
+RAS_2 equ 01 ; Ras-2 line
+RAS_3 equ 02 ; Ras-3 line
+RAS_4 equ 03 ; Ras-4 line
+RAS_5 equ 04 ; Ras-5 line
+RAS_6 equ 05 ; Ras-6 line
+RAS_7 equ 06 ; Ras-7 line
+RAS_8 equ 07 ; Ras-8 line
+RAS_9 equ 08 ; Ras-9 line
+RAS_10 equ 09 ; Ras-10 line
+RAS_11 equ 10 ; Ras-11 line
+RAS_12 equ 11 ; Ras-12 line
+RAS_13 equ 12 ; Ras-13 line
+RAS_14 equ 13 ; Ras-14 line
+RAS_15 equ 14 ; Ras-15 line
+RAS_16 equ 15 ; Ras-16 line
+
+;----------------------------------------------------------------------------
+; Memory Module Size equates (a byte value)
+; Bit-7 = 0, module has signle-bank connection
+; 1, module has double-bank connection
+; Bit6-0= n, where 2^n is the memory module size in MB
+; (7Dh = Not determinable
+; 7Eh = Module is installed but not enabled
+; 7Fh - Module is not installed)
+;----------------------------------------------------------------------------
+; Equate Name Value Meaning
+MM_SINGLE_BANK equ 00000000b; Bit-7 = 0, Single bank connection
+MM_DOUBLE_BANK equ 10000000b; Bit-7 = 1, Double bank Connection
+MM_SIZE_NOT_DETERMINABLE equ 7Dh ; Memory Size is not determinable
+MM_NOT_ENABLED equ 7Eh ; Memory Socket is populated but not enabled
+MM_NOT_INSTALLED equ 7Fh ; Memory Not installed
+
+;----------------------------------------------------------------------------
+; Memory Module Type equates (Bit-field word Value)
+; Equate Name Value Meaning
+; 1 0
+; 5432109876543210
+MM_TYPE_OTHER equ 0000000000000001b; Other type
+MM_TYPE_UNKNOWN equ 0000000000000010b; Unknown type
+MM_TYPE_STANDARD equ 0000000000000100b; Standard type
+MM_TYPE_FAST_PAGE_MODE equ 0000000000001000b; Fast page mode type
+MM_TYPE_EDO equ 0000000000010000b; EDO type
+MM_TYPE_PARITY equ 0000000000100000b; Parity type
+MM_TYPE_ECC equ 0000000001000000b; ECC type
+MM_TYPE_SIMM equ 0000000010000000b; SIMM type
+MM_TYPE_DIMM equ 0000000100000000b; DIMM type
+MM_TYPE_BURST_EDO equ 0000001000000000b; BURST EDO type
+MM_TYPE_SDRAM equ 0000010000000000b; SDRAM type
+ ; Bit15-11 Reserved and must be zero
+;----------------------------------------------------------------------------
+; Structure Type 7: Equates used in CACHE INFORMATION Structure
+;----------------------------------------------------------------------------
+; Cache Error Correction Type equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+SR_OTHER equ 01h ; Other
+SR_UNKNOWN equ 02h ; Unknown
+SR_NONE equ 03h ; None
+SR_PARITY equ 04h ; Parity
+SR_SINGLEBIT_ECC equ 05h ; Single-bit ECC
+SR_MULTIBIT_ECC equ 06h ; Multi-bit ECC
+
+;----------------------------------------------------------------------------
+; System Cache Type equates (an enumerated BYTE Value)
+; Equate Name Value Meaning
+SCT_OTHER equ 01h ; Other
+SCT_UNKNOWN equ 02h ; Unknown
+SCT_INSTRUCTION equ 03h ; Instruction
+SCT_DATA equ 04h ; Data
+SCT_UNIFIED equ 05h ; Unified
+
+;----------------------------------------------------------------------------
+; System Cache Associativity equates (an enumerated BYTE Value)
+; Equate Name Value Meaning
+CA_OTHER equ 01h ; Other
+CA_UNKNOWN equ 02h ; Unknown
+CA_DIRECT_MAPPED equ 03h ; Direct Mapped
+CA_2WAY_ASSOC equ 04h ; 2way Associativity
+CA_4WAY_ASSOC equ 05h ; 4way Associativity
+CA_FULLY_ASSOC equ 06h ; Fully Associativity
+CA_8WAY_ASSOC equ 07h ; 8way Associativity
+CA_16WAY_ASSOC equ 08h ; 16way Associativity
+CA_12WAY_ASSOC equ 09h ; 12way Associativity
+CA_24WAY_ASSOC equ 0Ah ; 24way Associativity
+CA_32WAY_ASSOC equ 0Bh ; 32way Associativity
+CA_48WAY_ASSOC equ 0Ch ; 48way Associativity
+CA_64WAY_ASSOC equ 0Dh ; 64way Associativity
+CA_20WAY_ASSOC equ 0Eh ; 20way Associativity
+
+;----------------------------------------------------------------------------
+; Cache Type equates (Bit-field word Value)
+; Equate Name Value Meaning
+; 1 0
+; 5432109876543210
+CH_OTHER equ 0000000000000001b ; Other
+CH_UNKNOWN equ 0000000000000010b ; Unknown
+CH_NON_BURST equ 0000000000000100b ; Non-burst
+CH_BURST equ 0000000000001000b ; Burst
+CH_PIPELINE_BURST equ 0000000000010000b ; Pipeline Burst
+CH_SYNCHRONOUS equ 0000000000100000b ; Synchronous
+CH_ASYNCHRONOUS equ 0000000001000000b ; Asynchronous
+ ; Bit15-7 is reserved and must be zero
+
+;----------------------------------------------------------------------------
+; Equates used in the WORD defining the following:
+; Bit15-10= Reserved, must be 0
+; Bit9-8 = Cache Configuration Operational Mode
+; Bit-7 = Cache Enable/Disable information at boot time
+; Bit6-5 = Cache Configuration Location relative to CPU module
+; Bit4 = Reserved, must be zero
+; Bit3 = Cache Socket
+; Bit2-0 = Cache Level
+;----------------------------------------------------------------------------
+; Equate Name Value Meaning
+; 1 0
+; 5432109876543210
+; Bit9-8 = Cache Configuration Operational Mode equates
+COM_WRITE_THROUGH equ 0000000000000000b ; Write-thru
+COM_WRITE_BACK equ 0000000100000000b ; Write-back
+COM_VARIES_WITH_MEM equ 0000001000000000b ; Varies with Memory Address
+COM_UNKNOWN equ 0000001100000000b ; Unknown
+; Bit-7 = Cache Enable/Disable information at Boot time equates
+CACHE_ENABLED equ 0000000010000000b ; Enabled
+CACHE_DISABLED equ 0000000000000000b ; Disabled
+; Bit6-5 = Cache Configuration Location relative to CPU equates
+CCL_INTERNAL equ 0000000000000000b ; Internal
+CCL_EXTERNAL equ 0000000000100000b ; External
+CCL_RESERVED equ 0000000001000000b ; Reserved
+CCL_UNKNOWN equ 0000000001100000b ; Unknown
+; Bit-3 = Cache Configuration Socket equates
+CS_NOT_SOCKETED equ 0000000000000000b ; Not socketed
+CS_SOCKETED equ 0000000000001000b ; Socketed
+; Bit2-0 = Cache Configuration Level equates
+CL_L1 equ 0000000000000000b ; Level 1
+CL_L2 equ 0000000000000001b ; Level 2
+CL_L3 equ 0000000000000010b ; Level 3
+
+;----------------------------------------------------------------------------
+; Structure Type 8: Equates used in PORT CONNECTOR INFORMATION Structure
+;----------------------------------------------------------------------------
+; Internal Port Connector Type equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+PC_NONE equ 00h ; None
+PC_CENTRONICS equ 01h ; Centronic
+PC_MINI_CENTRONIC equ 02h ; Mini Centronic
+PC_PROPRIETARY equ 03h ; Proprietary
+PC_DB25_PIN_MALE equ 04h ; DB-25 Pin Male
+PC_DB25_PIN_FEMALE equ 05h ; DB-25 Pin Female
+PC_DB15_PIN_MALE equ 06h ; DB-15 Pin Male
+PC_DB15_PIN_FEMALE equ 07h ; DB-15 Pin Female
+PC_DB9_PIN_MALE equ 08h ; DB-9 Pin Male
+PC_DB9_PIN_FEMALE equ 09h ; DB-9 Pin female
+PC_RJ_11 equ 0Ah ; RJ-11
+PC_RJ_45 equ 0Bh ; RJ-45
+PC_50_PINMINI_SCSI equ 0Ch ; 50 Pin mini SCSI
+PC_MINI_DIN equ 0Dh ; Mini-DIN
+PC_MICRO_DIN equ 0Eh ; Miciro-DIN
+PC_PS_2 equ 0Fh ; PS/2
+PC_INFRARED equ 10h ; Infrared
+PC_HP_HIL equ 11h ; HP-HIL
+PC_ACCESS_BUS_USB equ 12h ; Access Bus (USB)
+PC_SSA_SCSI equ 13h ; SSA SCSI
+PC_CIR_DIN8_MALE equ 14h ; Circular DIN-8 Male
+PC_CIR_DIN8_FEMALE equ 15h ; Circular DIN-8 Female
+PC_ONBOARD_IDE equ 16h ; On board IDE
+PC_ONBOARD_FLOPPY equ 17h ; On board Floppy
+PC_DUAL_INLINE_9PIN equ 18h ; 9 pin dual inline (pin 10 cut)
+PC_DUL_INLINE_25PIN equ 19h ; 25 pin dual inline (pin 26 cut)
+PC_DUL_INLINE_50PIN equ 1Ah ; 50 pin dual inline
+PC_DUL_INLINE_68PIN equ 1Bh ; 68 pin dual inline
+PC_ONBRD_SND_INPUT equ 1Ch ; On board sound input from CD-ROM
+PC_CENTRONIC_TYPE14 equ 1Dh ; Mini-centronic type-14
+PC_CENTRONIC_TYPE26 equ 1Eh ; Mini-centronic type-26
+PC_MINI_JACK equ 1Fh ; Mini-jack (headphones)
+PC_BNC equ 20h ; BNC
+PC_IEEE_1394 equ 21h ; 1394
+PC_SAS_SATA equ 22h ; SAS/SATA Plug Receptacle
+PC_PC_98 equ 0A0h ; PC-98
+PC_PC_98_HIRESO equ 0A1h ; PC-98Hireso
+PC_PC_H98 equ 0A2h ; PC-H98
+PC_PC_98_NOTE equ 0A3h ; PC-98Note
+PC_PC_98_FULL equ 0A4h ; PC-98Full
+PC_OTHER equ 0FFh ; Other- Use Reference Designator Strings to supply information
+
+;----------------------------------------------------------------------------
+; Port Connector Type equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+PT_NONE equ 00h ; None
+PT_PARL_XT_AT equ 01h ; Parallel Port XT/AT Compatible
+PT_PARL_PORT_PS2 equ 02h ; Parallel Port PS/2
+PT_PARL_PORT_ECP equ 03h ; Parallel Port ECP
+PT_PARL_PORT_EPP equ 04h ; Parallel Port EPP
+PT_PARL_ECP_EPP equ 05h ; Parallel Port ECC/EPP
+PT_SR_PORT_XT_AT equ 06h ; Serial Port XT/AT Compatible
+PT_SR_PORT_16450 equ 07h ; Serial Port 16450 Compatible
+PT_SR_PORT_16550 equ 08h ; Serial Port 16550 Compatible
+PT_SR_PORT_16550A equ 09h ; Serial Port 16550A Compatible
+PT_SCSI_PORT equ 0Ah ; SCSI Port
+PT_MIDI_PORT equ 0Bh ; MIDI Port
+PT_JOY_STIC_PORT equ 0Ch ; Joy stick Port
+PT_KEYBOARD_PORT equ 0Dh ; Keyboard Port
+PT_MOUSE_PORT equ 0Eh ; Mouse Port
+PT_SSA_SCSI equ 0Fh ; SSA SCSI Port
+PT_USB equ 10h ; USB Port
+PT_FIREWIRE_1394 equ 11h ; Firewire-1394 Port
+PT_PCMCIA_TYPE1 equ 12h ; PCMCIA TYPE I
+PT_PCMCIA_TYPE2 equ 13h ; PCMCIA TYPE II
+PT_PCMCIA_TYPE3 equ 14h ; PCMCIA TYPE III
+PT_CARDBUS equ 15h ; Cardbus
+PT_ACCESS_BUS_PORT equ 16h ; Access bus port
+PT_SCSI2 equ 17h ; SCSI II
+PT_SCSI_WIDE equ 18h ; SCSI Wide
+PT_PC_98 equ 19h ; PC-98
+PT_PC_98_HIRESO equ 1Ah ; PC-98Hireso
+PT_PC_H98 equ 1Bh ; PC-H98
+PT_VIDEO_PORT equ 1Ch ; Video port
+PT_AUDIO_PORT equ 1Dh ; Audi port
+PT_MODEM_PORT equ 1Eh ; Modem Port
+PT_NETWORK_PORT equ 1Fh ; Network port
+PT_SATA_PORT equ 20h ; SATA
+PT_SAS_PORT equ 21h ; SAS
+PT_8251_COMPATIBLE equ 0A0h ; 8251 Compatible
+PT_8251_FIFO_COMP equ 0A1h ; 8251 FIFO Compatible
+PT_OTHER equ 0FFh ; Other
+
+;----------------------------------------------------------------------------
+; Structure Type 9: Equates used in SYSTEM SLOT INFORMATION Structure
+;----------------------------------------------------------------------------
+; System Slot Type equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+SYS_SLOT_OTHER equ 01h ; Other
+SYS_SLOT_UNKNOWN equ 02h ; Unknown
+SYS_SLOT_ISA equ 03h ; ISA
+SYS_SLOT_MCA equ 04h ; MCA
+SYS_SLOT_EISA equ 05h ; EISA
+SYS_SLOT_PCI equ 06h ; PCI
+SYS_SLOT_PCMCIA equ 07h ; PCMCIA
+SYS_SLOT_VL_VESA equ 08h ; Vl-vesa
+SYS_SLOT_PROPRIETARY equ 09h ; Proprietary type
+SYS_SLOT_PROC_CARD_SLOT equ 0Ah ; Processor Card slot
+SYS_SLOT_PROP_CARD_SLOT equ 0Bh ; Proprietary Memory card slot
+SYS_SLOT_IO_RISER_SLOT equ 0Ch ; I/O Riser card slot
+SYS_SLOT_NU_BUS equ 0Dh ; NuBus
+SYS_SLOT_PCI_66MHZ equ 0Eh ; PCI-66Mhz Capable
+SYS_SLOT_AGP equ 0Fh ; Advance Graphics Port
+SYS_SLOT_AGP_2X equ 10h ; AGP 2X
+SYS_SLOT_AGP_4X equ 11h ; AGP 4X
+SYS_SLOT_PCI_X equ 12h ; PCI-X
+SYS_SLOT_AGP_8X equ 13h ; AGP 8X
+SYS_SLOT_PC98_C20 equ 0A0h ; PC-98/C20
+SYS_SLOT_PC98_C24 equ 0A1h ; PC-98/C24
+SYS_SLOT_PC98_E equ 0A2h ; PC-98/E
+SYS_SLOT_PC98_LOCAL equ 0A3h ; PC-98/Local Bus
+SYS_SLOT_PC98_CARD equ 0A4h ; PC-98 Card
+SYS_SLOT_PCIE equ 0A5h ; PCI Express
+SYS_SLOT_PCIE_X1 equ 0A6h ; PCI Express x1
+SYS_SLOT_PCIE_X2 equ 0A7h ; PCI Express x2
+SYS_SLOT_PCIE_X4 equ 0A8h ; PCI Express x4
+SYS_SLOT_PCIE_X8 equ 0A9h ; PCI Express x8
+SYS_SLOT_PCIE_X16 equ 0AAh ; PCI Express x16
+SYS_SLOT_PCIE_2 equ 0ABh ; PCI Express Gen 2
+SYS_SLOT_PCIE_2_X1 equ 0ACh ; PCI Express Gen 2 x1
+SYS_SLOT_PCIE_2_X2 equ 0ADh ; PCI Express Gen 2 x2
+SYS_SLOT_PCIE_2_X4 equ 0AEh ; PCI Express Gen 2 x4
+SYS_SLOT_PCIE_2_X8 equ 0AFh ; PCI Express Gen 2 x8
+SYS_SLOT_PCIE_2_X16 equ 0B0h ; PCI Express Gen 2 x16
+SYS_SLOT_PCIE_3 equ 0B1h ; PCI Express Gen 3
+SYS_SLOT_PCIE_3_X1 equ 0B2h ; PCI Express Gen 3 x1
+SYS_SLOT_PCIE_3_X2 equ 0B3h ; PCI Express Gen 3 x2
+SYS_SLOT_PCIE_3_X4 equ 0B4h ; PCI Express Gen 3 x4
+SYS_SLOT_PCIE_3_X8 equ 0B5h ; PCI Express Gen 3 x8
+SYS_SLOT_PCIE_3_X16 equ 0B6h ; PCI Express Gen 3 x16
+
+;----------------------------------------------------------------------------
+; System Slot Data bus width equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+DBW_OTHER equ 01h ; Other
+DBW_UNKNOWN equ 02h ; Unknown
+DBW_8BIT equ 03h ; 8-bit
+DBW_16BIT equ 04h ; 16-bit
+DBW_32BIT equ 05h ; 32-bit
+DBW_64BIT equ 06h ; 64-bit
+DBW_128BIT equ 07h ; 128-bit
+DBW_1X equ 08h ; PCIE 1X
+DBW_2X equ 09h ; PCIE 2X
+DBW_4X equ 0Ah ; PCIE 4X
+DBW_8X equ 0Bh ; PCIE 8X
+DBW_12X equ 0Ch ; PCIE 12X
+DBW_16X equ 0Dh ; PCIE 16X
+DBW_32X equ 0Eh ; PCIE 32X
+
+;----------------------------------------------------------------------------
+; System Slot Usage equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+SCU_OTHER equ 01h ; Other
+SCU_UNKNOWN equ 02h ; Unknown
+SCU_AVAILABLE equ 03h ; Available
+SCU_IN_USE equ 04h ; In use
+
+;----------------------------------------------------------------------------
+; System Slot Length equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+SL_OTHER equ 01h ; Other
+SL_UNKNOWN equ 02h ; Unknown
+SL_SHORT_LENGTH equ 03h ; Short length
+SL_LONG_LENGTH equ 04h ; Long length
+
+;----------------------------------------------------------------------------
+; System Slot Characteristic-1 equates (Bit-field byte value)
+; Equate Name Value Meaning
+; 76543210
+
+SCH_UNKNOWN equ 00000001b ; Unknown
+SCH_5V equ 00000010b ; 5 volt
+SCH_33V equ 00000100b ; 3.3 volt
+SCH_SHARED equ 00001000b ; Shared
+SCH_PCCARD16 equ 00010000b ; PC Card bus
+SCH_CARDBUS equ 00100000b ; Card bus
+SCH_ZOOMVIDEO equ 01000000b ; Zoom Video
+SCH_MODEMRING equ 10000000b ; Modem ring resume
+
+;----------------------------------------------------------------------------
+; System Slot Characteristic-2 equates (Bit-field byte value)
+; Equate Name Value Meaning
+; 76543210
+SCH_PME equ 0000000100000000b ; PCI Slot supports Power management (PME#) signal
+SCH_HOT_PLUG equ 0000001000000000b ; supports Hot Plug devices
+SCH_PCI_SUPPORT_SMBUS equ 0000010000000000b ; PCI Slot Supports SMBUS Signal
+ ; Bit7-3 = Reserved set to 0
+;----------------------------------------------------------------------------
+; Structure Type 10: Equates used in ON-BOARD DEVICE INFORMATION Structure
+;----------------------------------------------------------------------------
+; On-board Device Type equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+OBD_OTHER equ 01h ; Other
+OBD_UNKNOWN equ 02h ; Unknown
+OBD_VIDEO equ 03h ; Video
+OBD_SCSI equ 04h ; SCSI
+OBD_ETHERNET equ 05h ; Ethernet
+OBD_TOKEN_RING equ 06h ; Token ring
+OBD_SOUND equ 07h ; Sound
+OBD_PATA equ 08h ; PATA Controller
+OBD_SATA equ 09h ; SATA Controller
+OBD_SAS equ 0Ah ; SAS Controller
+
+;----------------------------------------------------------------------------
+; Structure Type 11: No equates used in OEM STRINGS INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 12: No equates used in SYSTEM CONFIGURATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 13: Equates used in BIOS LANGUAGE INFORMATION Structure
+;----------------------------------------------------------------------------
+; BIOS Language Flag equates (bit-field byte value)
+; Equate Name Value Meaning
+; 76543210
+LONG_FORMAT equ 00000000b ; Long format
+ABBRIVIATED_FORMAT equ 00000001b ; Abbreviated format
+ ; bit7-1 = reserved
+; Note: In Long Format, each language string is in the form of
+; "ISO 639 Language name |ISO 3166 Territory Name| Encoding Method"
+; LONG FORMAT -> db 'en|US|iso8859-1', 0
+; ABBRIVATED FORMAT -> db 'enUS', 0
+
+;----------------------------------------------------------------------------
+; Structure Type 14: No equates used in GROUP ASSOCIATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 16: Equates used in PHYSICAL MEMORY ARRAY Structure
+;----------------------------------------------------------------------------
+; Memory Array Location equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+ARRAY_LOC_OTHER equ 001h ; Other
+ARRAY_LOC_UNKNOWN equ 002h ; Unknown
+ARRAY_LOC_MOTHERBOARD equ 003h ; System board/ Motherboard
+ARRAY_LOC_ISAADDONCARD equ 004h ; ISA Add on card
+ARRAY_LOC_EISAADDONCARD equ 005h ; EISA Add on card
+ARRAY_LOC_PCIADDONCARD equ 006h ; PCI Add on card
+ARRAY_LOC_MCAADDONCARD equ 007h ; MCA Add on card
+ARRAY_LOC_PCMCIAADDONCARD equ 008h ; PCMCIA Add on card
+ARRAY_LOC_PROPADDONCARD equ 009h ; Propriatery Add on card
+ARRAY_LOC_NuBus equ 00Ah ; Nubus
+ARRAY_LOC_PC98_C20 equ 0A0h ; PC98/C20
+ARRAY_LOC_PC98_C24 equ 0A1h ; PC98/C24
+ARRAY_LOC_PC98_E equ 0A2h ; PC98-E
+ARRAY_LOC_PC98_LOCALBUS equ 0A3h ; PC-98 Local bus
+
+;----------------------------------------------------------------------------
+; Memory Array Use equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+ARRAY_USE_OTHER equ 01h ; Other
+ARRAY_USE_UNKNOWN equ 02h ; Unknown
+ARRAY_USE_SYSTEM_MEMORY equ 03h ; System Memory
+ARRAY_USE_VIDEOMEMORY equ 04h ; Video Memory
+ARRAY_USE_FLASHMEMORY equ 05h ; Flash Memory
+ARRAY_USE_NONVOLMEMORY equ 06h ; Non volatile Memory
+ARRAY_USE_CACHEMEMORY equ 07h ; Cache Memory
+
+;----------------------------------------------------------------------------
+; Memory Array Error Correction Type equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+ARRAY_ERROR_OTHER equ 01h ; Other
+ARRAY_ERROR_UNKNOWN equ 02h ; Unknown
+ARRAY_ERROR_NONE equ 03h ; None
+ARRAY_ERROR_PARITY equ 04h ; Parity
+ARRAY_ERROR_SINGLEBIT_ECC equ 05h ; Single-bit ECC
+ARRAY_ERROR_MULTIBIT_ECC equ 06h ; Multi-bit ECC
+ARRAY_ERROR_CRC equ 07H ; CRC
+
+;----------------------------------------------------------------------------
+; Structure Type 17: Equates used in MEMORY DEVICES Structure
+;----------------------------------------------------------------------------
+; Memory Device Form Factor equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+DEVICE_FORMFACTOR_OTHER equ 01h ; other
+DEVICE_FORMFACTOR_UNKNOWN equ 02h ; unknown
+DEVICE_FORMFACTOR_SIMM equ 03h ; SIMM
+DEVICE_FORMFACTOR_SIP equ 04h ; SIP
+DEVICE_FORMFACTOR_CHIP equ 05h ; CHIP
+DEVICE_FORMFACTOR_DIP equ 06h ; DIP
+DEVICE_FORMFACTOR_ZIP equ 07h ; ZIP
+DEVICE_FORMFACTOR_PROPCARD equ 08h ; Propriatery Card
+DEVICE_FORMFACTOR_DIMM equ 09h ; DIMM
+DEVICE_FORMFACTOR_TSOP equ 0Ah ; TSOP
+DEVICE_FORMFACTOR_ROWOFCHIP equ 0Bh ; ROWCHIP
+DEVICE_FORMFACTOR_RIMM equ 0Ch ; RIMM
+DEVICE_FORMFACTOR_SODIMM equ 0Dh ; SODIMM
+DEVICE_FORMFACTOR_SRIMM equ 0Eh ; SRIMM
+DEVICE_FORMFACTOR_FBDIMM equ 0Fh ; FB-DIMM
+
+;----------------------------------------------------------------------------
+; Memory Device Type equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+MEMORY_DEVICE_TYPE_OTHER equ 01h ; Other
+MEMORY_DEVICE_TYPE_UNKNOWN equ 02h ; Unknown
+MEMORY_DEVICE_TYPE_DRAM equ 03h ; DRAM
+MEMORY_DEVICE_TYPE_EDRAM equ 04h ; EDRAM
+MEMORY_DEVICE_TYPE_VRAM equ 05h ; VRAM
+MEMORY_DEVICE_TYPE_SRAM equ 06h ; SRAM
+MEMORY_DEVICE_TYPE_RAM equ 07h ; RAM
+MEMORY_DEVICE_TYPE_ROM equ 08h ; ROM
+MEMORY_DEVICE_TYPE_FLASH equ 09h ; FLASH
+MEMORY_DEVICE_TYPE_EEPROM equ 0Ah ; EEPROM
+MEMORY_DEVICE_TYPE_FEPROM equ 0Bh ; FEPROM
+MEMORY_DEVICE_TYPE_EPROM equ 0Ch ; EPROM
+MEMORY_DEVICE_TYPE_CDRAM equ 0Dh ; CDRAM
+MEMORY_DEVICE_TYPE_3DRAM equ 0Eh ; 3DRAM
+MEMORY_DEVICE_TYPE_SDRAM equ 0Fh ; SDRAM
+MEMORY_DEVICE_TYPE_SGRAM equ 10h ; SGRAM
+MEMORY_DEVICE_TYPE_RDRAM equ 11h ; RDRAM
+MEMORY_DEVICE_TYPE_DDR equ 12h ; DDR
+MEMORY_DEVICE_TYPE_DDR2 equ 13h ; DDR2
+MEMORY_DEVICE_TYPE_DDR2_FB_DIM equ 14h ; DDR2 FB-DIMM
+MEMORY_DEVICE_TYPE_DDR3 equ 18h ; DDR3
+MEMORY_DEVICE_TYPE_FBD2 equ 19h ; FBD2
+
+;----------------------------------------------------------------------------
+; Structure Type 18: Equates used in 32Bit MEMORY ERROR Structure
+;----------------------------------------------------------------------------
+; 32bit Memory Error equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+ERR_TYP_OTHER equ 01h ; Other
+ERR_TYP_UNKNOWN equ 02h ; Unknown
+ERR_TYP_OK equ 03h ; OK
+ERR_TYP_BADREAD equ 04h ; BAD Read
+ERR_TYP_PARITYERROR equ 05h ; Parity Error
+ERR_TYP_SINGLEBITERROR equ 06h ; Single bit Error
+ERR_TYP_DOUBLEBITERROR equ 07h ; Double bit Error
+ERR_TYP_MULTIBITERROR equ 08h ; Multi bit Error
+ERR_TYP_NIBBLEERROR equ 09h ; Nibble Error
+ERR_TYP_CHECKSUMERROR equ 0Ah ; Checksum Error
+ERR_TYP_CRCERROR equ 0Bh ; CRC Error
+ERR_TYP_CORRECTSINGERR equ 0Ch ; Correctable Single bit Error
+ERR_TYP_CORRECTEDERROR equ 0Dh ; Corrected Error
+ERR_TYP_UNCORRECTABLEERR equ 0Eh ; Uncorrectable Error
+
+;----------------------------------------------------------------------------
+; 32bit Memory Error Granularity equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+GRANULARITY_OTHER equ 01h ; Other
+GRANULARITY_UNKNOWN equ 02h ; Unknown
+GRANULARITY_DEVICELEVEL equ 03h ; Device level
+GRANULARITY_MEMPARTIONLEVEL equ 04h ; Memory Partition Level
+
+;----------------------------------------------------------------------------
+; 32bit Memory Error Operation equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+OPERATION_OTHER equ 01h ; Other
+OPERATION_UNKNOWN equ 02h ; Unknown
+OPERATION_READ equ 03h ; Read
+OPERATION_WRITE equ 04h ; Write
+OPERATION_PARTIAL_WRITE equ 05h ; Partial Write
+;----------------------------------------------------------------------------
+; Structure Type 19: No equates used in MEMORY ARRAY MAPPED ADDRESS
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 20: No equates used in MEMORY DEVICE MAPPED ADDRESS
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 21: Equates used in Pointing Device Structure
+;----------------------------------------------------------------------------
+; Pointing Device Type equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+POR_OTHER equ 01h ; Other
+POR_UNKNOWN equ 02h ; Unknown
+POR_MOUSE equ 03h ; Mouse
+POR_TRACK_BALL equ 04h ; Track ball
+POR_TRACK_POINT equ 05h ; Track Point
+POR_GLIDE_POINT equ 06h ; Glide Point
+POR_TOUCH_PAD equ 07h ; Touch Pad
+POR_TOUCH_SCR equ 08h ; Touch Screen
+POR_OPTICAL_SENSOR equ 09h ; Optical Sensor
+
+;----------------------------------------------------------------------------
+; Pointing Device Interface equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+PDI_OTHER equ 001h ; Other
+PDI_UNKNOWN equ 002h ; Unknown
+PDI_SERIAL equ 003h ; Serial
+PDI_PS2 equ 004h ; PS2
+PDI_INFRARED equ 005h ; Infrared
+PDI_HP_HIL equ 006h ; HP-HIL
+PDI_BUS_MOUSE equ 007h ; Bus Mouse
+PDI_APPLE_DESKTOP_BUS equ 008h ; Apple Desktop Bus
+PDI_BUS_MOUSE_DB9 equ 0A0h ; Bus Mouse DB9
+PDI_BUS_MOUSE_MICRO_DIN equ 0A1h ; Bus Mouse Micro DIN
+PDI_USB equ 0A2h ; USB
+
+;----------------------------------------------------------------------------
+; Structure Type 22: Equates used in Portable Battery Structure
+;----------------------------------------------------------------------------
+; Device Chemistry Type equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+PBC_OTHER equ 01h ; Other
+PBC_UNKNOWN equ 02h ; Unknown
+PBC_LEAD_ACID equ 03h ; Lead ACID
+PBC_NICKEL_CAD equ 04h ; Nickle Cadmium
+PBC_NICKEL_HYDRIDE equ 05h ; Nickle metal hydride
+PBC_LITHIUM_ION equ 06h ; Lithium-ion
+PBC_ZINC_AIR equ 07h ; Zinc air
+PBC_LITHIUM_POLYMER equ 08h ; Lithium Polymer
+
+;----------------------------------------------------------------------------
+; Structure Type 23: Equates used in System Reset Structure
+;----------------------------------------------------------------------------
+; Capabilities equates (Bit-field byte value)
+; Equate name Value Meaning
+; 76543210
+SRC_SYSTEM_RESET equ 00000001b; Bit-0 = System Reset enabled
+SRC_BOOT_OPTION_OS equ 00000010b; Bit2-1 = 01, OS
+SRC_BOOT_OPTION_SU equ 00000100b; Bit2-1 = 10, System Utilities
+SRC_BOOT_OPTION_NRB equ 00001100b; Bit2-1 = 11, do not reboot
+SRC_BOOT_OPTION_LIMIT_OS equ 00000010b; Bit4-3 = 01, OS
+SRC_BOOT_OPTION_LIMIT_SU equ 00000100b; Bit4-3 = 10, System Utilities
+SRC_BOOT_OPTION_LIMIT_NRB equ 00001100b; Bit4-3 = 11, do not reboot
+SRC_WATCHDOG_TIMER equ 00100000b; Bit-5 = Watchdog timer
+ ; Bit7-6 = Reserved
+
+;----------------------------------------------------------------------------
+; Structure Type 24: equates used in Hardware Security Structure
+;----------------------------------------------------------------------------
+; Hardware Security Settings equates (Bit-field byte value)
+; Equate name Value Meaning
+; 76543210
+HSS_FRONT_PANEL_RESET_DISABLED equ 00000000b; Bit1-0 = 00, disabled
+HSS_FRONT_PANEL_RESET_ENABLED equ 00000001b; Bit1-0 = 01, enabled
+HSS_FRONT_PANEL_RESET_ABSENT equ 00000010b; Bit1-0 = 10, not implemented
+HSS_FRONT_PANEL_RESET_UNKNOWN equ 00000011b; Bit1-0 = 11, unknown
+HSS_SUPERVISOR_PASSWORD_DISABLED equ 00000000b; Bit3-2 = 00, disabled
+HSS_SUPERVISOR_PASSWORD_ENABLED equ 00000100b; Bit3-2 = 01, enabled
+HSS_SUPERVISOR_PASSWORD_ABSENT equ 00001000b; Bit3-2 = 10, not implemented
+HSS_SUPERVISOR_PASSWORD_UNKNOWN equ 00001100b; Bit3-2 = 11, unknown
+HSS_KEYBOARD_PASSWORD_DISABLED equ 00000000b; Bit5-4 = 00, disabled
+HSS_KEYBOARD_PASSWORD_ENABLED equ 00000100b; Bit5-4 = 01, enabled
+HSS_KEYBOARD_PASSWORD_ABSENT equ 00001000b; Bit5-4 = 10, not implemented
+HSS_KEYBOARD_PASSWORD_UNKNOWN equ 00001100b; Bit5-4 = 11, unknown
+HSS_POWERON_PASSWORD_DISABLED equ 00000000b; Bit7-6 = 00, disabled
+HSS_POWERON_PASSWORD_ENABLED equ 00000100b; Bit7-6 = 01, enabled
+HSS_POWERON_PASSWORD_ABSENT equ 00001000b; Bit7-6 = 10, not implemented
+HSS_POWERON_PASSWORD_UNKNOWN equ 00001100b; Bit7-6 = 11, unknown
+
+;----------------------------------------------------------------------------
+; Structure Type 25: No equates used in System Power Controls Structure
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 26: Equates used in Voltage Probe Structure
+;----------------------------------------------------------------------------
+; Location and Status (a byte value) Bit7-5 = Status (enumerated value)
+; Bit4-0 = Location (enumerated value)
+; Location
+; Equate name Value Meaning
+PL_OTHER equ 01h ; Other
+PL_UNKNOWN equ 02h ; Unknown
+PL_PROCESSOR equ 03h ; Processor
+PL_DISK equ 04h ; Disk
+PL_PERIPHERAL_BAY equ 05h ; Peripheral Bay
+PL_SYSTEM_MGMT_MODULE equ 06h ; System Management Module
+PL_MOTHERBOARD equ 07h ; Motherboard
+PL_MEMORY_MODULE equ 08h ; Memory Module
+PL_PROCESSOR_MODULE equ 09h ; Processor Module
+PL_POWER_UNIT equ 0Ah ; Power Unit
+PL_ADDIN_CARD equ 0Bh ; Add-in card
+; Status
+; Equate name Value Meaning
+PS_OTHER equ 020h ; Other
+PS_UNKNOWN equ 040h ; Unknown
+PS_OK equ 060h ; OK
+PS_NON_CRITICAL equ 080h ; Non-critical
+PS_CRITICAL equ 0A0h ; Critical
+PS_NON_RECOVERABLE equ 0C0h ; Non-recoverable
+
+;----------------------------------------------------------------------------
+; Structure Type 27: Equates used in Cooling Device Structure
+;----------------------------------------------------------------------------
+; Device Type and Status (a byte value) Bit7-5 = Status (enumerated value)
+; Bit4-0 = Device Type (enumerated value)
+; Device Type
+; Equate name Value Meaning
+CDT_OTHER equ 01h ; Other
+CDT_UNKNOWN equ 02h ; Unknown
+CDT_FAN equ 03h ; Fan
+CDT_CENTRIFUGAL_BLOWER equ 04h ; Centrifugal Blower
+CDT_CHIP_FAN equ 05h ; Chip Fan
+CDT_CABINET_FAN equ 06h ; Cabinet Fan
+CDT_POWER_SUPPLY_FAN equ 07h ; Power Supply Fan
+CDT_HEAT_PIPE equ 08h ; Heat Pipe
+CDT_INTEGRATED_FREEZE equ 09h ; Integrated Refrigeration
+CDT_ACTIVE_COOLING equ 14h ; Active Cooling
+CDT_PASSIVE_COOLING equ 15h ; Passive Cooling
+
+;----------------------------------------------------------------------------
+; Status
+; Equate name Value Meaning
+CDS_OTHER equ 020h ; Other
+CDS_UNKNOWN equ 040h ; Unknown
+CDS_OK equ 060h ; OK
+CDS_NON_CRITICAL equ 080h ; Non-critical
+CDS_CRITICAL equ 0A0h ; Critical
+CDS_NON_RECOVERABLE equ 0C0h ; Non-recoverable
+
+;----------------------------------------------------------------------------
+; Structure Type 28: Equates used in Temperature Probe Structure
+;----------------------------------------------------------------------------
+; This structure uses the same equates as Voltage Probe Structure to
+; indicate corresponding probe location and status.
+
+;----------------------------------------------------------------------------
+; Structure Type 29: Equates used in Electrical Current Probe Structure
+;----------------------------------------------------------------------------
+; This structure uses the same equates as Voltage Probe Structure to
+; indicate corresponding probe location and status.
+
+;----------------------------------------------------------------------------
+; Structure Type 30: Equates used in Out-of-Band Remote Access Structure
+;----------------------------------------------------------------------------
+; Connections Bit7-2 = Reserved
+; Bit-1 = Outbound Connection 0/1 -> disabled/enabled
+; Bit-0 = Inbound Connection 0/1 -> disabled/enabled
+; Equate name Value Meaning
+; 76543210
+INBOUND_CONNECTION_ENABLED equ 00000001b; inbound connection
+OUTBOUND_CONNECTION_ENABLED equ 00000010b; outbound connection
+
+;----------------------------------------------------------------------------
+; Structure Type 34: Equates used in MANAGEMENT DEVICE Structure
+;----------------------------------------------------------------------------
+; Management Device Type equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+MGMT_DEVICE_TYPE_OTHER equ 01h ; Other
+MGMT_DEVICE_TYPE_UNKNOWN equ 02h ; Unknown
+MGMT_DEVICE_TYPE_LM75 equ 03h ; LM75
+MGMT_DEVICE_TYPE_LM78 equ 04h ; LM78
+MGMT_DEVICE_TYPE_LM79 equ 05h ; LM79
+MGMT_DEVICE_TYPE_LM80 equ 06h ; LM80
+MGMT_DEVICE_TYPE_LM81 equ 07h ; LM81
+MGMT_DEVICE_TYPE_ADM9240 equ 08h ; ADM9240
+MGMT_DEVICE_TYPE_DS1780 equ 09h ; DS1780
+MGMT_DEVICE_TYPE_MAXIM1617 equ 0Ah ; MAXIM1617
+MGMT_DEVICE_TYPE_GL518SM equ 0Bh ; GL518SM
+MGMT_DEVICE_TYPE_W83781D equ 0Ch ; W83781D
+MGMT_DEVICE_TYPE_HT82H791 equ 0Dh ; HT82H791
+
+;----------------------------------------------------------------------------
+; Management Device Address Type equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+MGMT_DEVICE_ADDRESS_TYPE_OTHER equ 01h ; Other
+MGMT_DEVICE_ADDRESS_TYPE_UNKNOWN equ 02h ; Unknown
+MGMT_DEVICE_ADDRESS_TYPE_IO_PORT equ 03h ; IO Port
+MGMT_DEVICE_ADDRESS_TYPE_MEMORY equ 04h ; Memory Mapped
+MGMT_DEVICE_ADDRESS_TYPE_SMBUS equ 05h ; SMBUS
+
+;----------------------------------------------------------------------------
+; Structure Type 37: Equates used in MEMORY CHANNEL Structure
+;----------------------------------------------------------------------------
+; Memory Channel Type equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+MEMORY_CHANNEL_TYPE_OTHER equ 01h ; Other
+MEMORY_CHANNEL_TYPE_UNKNOWN equ 02h ; Unknown
+MEMORY_CHANNEL_TYPE_RAMBUS equ 03h ; RamBus
+MEMORY_CHANNEL_TYPE_SYNCLINK equ 04h ; SyncLink
+
+;----------------------------------------------------------------------------
+; Structure Type 38: Equates used in IPMI DEVICE INFORMATION Structure
+;----------------------------------------------------------------------------
+; Memory Channel Type equates (an enumerated BYTE value)
+; Equate Name Value Meaning
+IPMI_DEVICE_INTERFACE_TYPE_UNKNOWN equ 00h ; Unknown
+IPMI_DEVICE_INTERFACE_TYPE_KCS equ 01h ; KCS: Keyboard Controller Style
+IPMI_DEVICE_INTERFACE_TYPE_SMIC equ 02h ; SMIC: Server Management Interface Chip
+IPMI_DEVICE_INTERFACE_TYPE_BT equ 03h ; BT: Block Transfer
+
+;----------------------------------------------------------------------------
+; Structure Type 38: No equates used in SYSTEM POWER SUPPLY Structure
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; SMBIOS BIOS related error codes
+SMBIOS_ERROR_CODE_START equ 08300h
+ERRSMBIOS_NOT_ENOUGH_SPACE_IN_F000 equ (SMBIOS_ERROR_CODE_START + 1)
+
+;----------------------------------------------------------------------------
+;End of Inclusion guard
+endif ;_SMB_EQU_
+;----------------------------------------------------------------------------
+
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2013, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
diff --git a/Board/EM/SMBIOS/SMBiosStaticData/SMBDATA.MAC b/Board/EM/SMBIOS/SMBiosStaticData/SMBDATA.MAC
new file mode 100644
index 0000000..4249c0f
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosStaticData/SMBDATA.MAC
@@ -0,0 +1,2708 @@
+ ECHO --Including: SMBDATA.MAC
+
+;----------------------------------------------------------------------------
+; DO NOT CHANGE ANY STRUCTURE DEFINITION UNLESS OTHERWISE SPECIFIED
+;----------------------------------------------------------------------------
+
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2016, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
+
+;****************************************************************************
+; $Header: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/SMBDATA.MAC 39 4/07/16 5:54p Davidd $
+;
+; $Revision: 39 $
+;
+; $Date: 4/07/16 5:54p $
+;****************************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/SMBDATA.MAC $
+;
+; 39 4/07/16 5:54p Davidd
+; [TAG] EIP231162
+; [Category] New Feature
+; [Description] Merge Aptio V Smbios -09 changes for Aptio 4
+; 4.6.5.5_SMBIOS_40 release
+; [Files] Smbios.sdl
+; SmbiosDynamicData.h
+; Smbios.h
+; SmbiosStaticData.sdl
+; SmbiosStaticData.asm
+; SmbData.mac
+; SmbMacro.aid
+; SmbDesc.def
+;
+; 38 2/17/15 1:08p Davidd
+; [TAG] EIP205509
+; [Category] Improvement
+; [Description] Merge Aptio V Smbios EIP193807, 193858, 196901 changes
+; into Aptio 4 Smbios
+; [Files] SmbiosStaticData.asm
+; Smbdata.mac
+; Smbdesc.def
+;
+; 37 11/13/13 3:40p Davidd
+; [TAG] EIP143030
+; [Category] Improvement
+; [Description] Synchronize Aptio 4 Smbios with recent changes on Aptio
+; V Smbios for '4.6.5.1_SMBIOS_36' release
+; [Files] SmbiosStaticData.sdl
+; Smbdesc.def
+; SMBDATA.MAC
+;
+; 36 6/03/13 6:23p Davidd
+; [TAG] EIP125665
+; [Category] New Feature
+; [Description] Request to Support multiple instances of SMBIOS Type 3
+; structure (merge EIP106206 into Aptio 4)
+; [Files] Smbdata.mac
+; SmbiosStaticData.sdl
+; Smbstruc.def
+; Smbios.c
+; SmbiosDMIEditFunc.c
+; Smbios.h
+;
+; 35 5/29/13 12:49p Davidd
+; [TAG] EIP124735
+; [Category] Spec Update
+; [Severity] Normal
+; [Description] SMBIOS 2.8.0 specification support for Aptio 4
+; [Files] Smb.equ
+; Smbdata.mac
+; Smbdesc.def
+; Smbstruc.def
+; Smbios.c
+; Smbios.h
+; SmbiosDynamicData.h
+;
+; 34 11/12/12 10:17a Davidd
+; [TAG] EIP106202
+; [Category] Bug Fix
+; [Severity] Minor
+; [Symptom] 16-bit and 32-bit were display 0
+; [RootCause] Error in CreateBootIntegrityServicesInfo macro
+; [Solution] Corrected error in CreateBootIntegrityServicesInfo macro
+; [Files] Smbdata.mac
+;
+; 33 9/13/12 12:10p Davidd
+; [TAG] EIP99388
+; [Category] Improvement
+; [Description] can not modified SMBIOS type 38 by
+; smbiosstaticdata.sdl
+; [Files] Smbdata.mac
+; Smbdesc.def
+;
+; 32 3/26/12 11:54a Davidd
+; [TAG] EIP84370
+; [Category] New Feature
+; [Description] Flash memory(type 16 and 17) on aptio
+; [Files] Smbdata.mac
+; SmbiosStaticData.asm
+; SmbiosStaticData.sdl
+; Smbios.c
+; Smbios.mak
+; Smbios.h
+;
+; 31 3/12/12 3:06p Davidd
+; [TAG] EIP82983
+; [Category] Improvement
+; [Description] Need Creating Tokens for Type1:UUID/Type11/Typ12/Type22
+; [Files] SmbiosStaticData.sdl
+; Smbdata.mac
+; Smbdesc.def
+;
+; 30 1/17/12 4:50p Davidd
+; [TAG] EIP78264
+; [Category] Improvement
+; [Description] SMBOS Type 2 (Spec 2.7.1) - No multiple type 2 support
+; [Files] Smbios.c
+; Smbios.h
+; Smbdata.mac
+; Smbdesc.def
+; SmbiosStaticData.sdl
+;
+; 29 9/29/11 4:41p Davidd
+; [TAG] EIP68202
+; [Category] NEW FEATURE
+; [Description] Allow Smbios Type 2 Location field and Type 3 SKU
+; Number field
+; to be apdated by dmieditwingui tool
+; [Files] Smbios.c
+; SmbiosDMIEditFunc.c
+; Smbdata.mac
+;
+; 28 4/05/11 11:46a Davidd
+; [TAG] EIP55656
+; [Category] Improvement
+; [Description] Provide generic support in SMBIOS module to include
+; build time EC version
+; [Files] SmbiosBoard.c
+; Smbdata.mac
+; Smbios.sdl
+;
+; 27 2/09/11 10:27a Davidd
+; [TAG] EIP53081
+; [Category] Bug Fix
+; [Severity] Minor
+; [Symptom] Smbios Management Device (type 34) must be enabled in
+; order to
+; see System Power Supply (type 39)
+; [RootCause] Macro to create System Power Supply structure (type 39)
+; was grouped inside macro to create Smbios Management
+; Device
+; (type 34)
+; [Solution] Seperated Type 39 macro from 34.
+; [Files] SmbiosStaticData.asm
+; Smbdata.mac
+; Smbmacro.aid
+; Smbdesc.def
+;
+; 26 12/14/10 11:15a Davidd
+; [TAG] EIP49944
+; [Category] Improvement
+; [Description] Smbios enhancements for incorporating no strings
+; [Files] Smbdata.mac
+;
+; 25 12/10/10 3:06p Davidd
+; [TAG] EIP49728
+; [Category] BUG FIX
+; [Severity] Normal
+; [Symptom] SMBIOS Type 10 Data incorrect
+; [RootCause] Macro to create Type 10 structure is incorrect.
+; [Solution] Modified macro to create one Type 10 Entry containing
+; the number of ONBOARD_DEVICES.
+; [Files]
+; Smbdata.mac
+; Smbios.c
+;
+; 24 12/02/10 12:02p Davidd
+; [TAG] EIP48600
+; [Category] BUG FIX
+; [Severity] Normal
+; [Symptom] With SMBIOS 4.6.1_ALPHA_01.28 eModule, the DMIEDIT.EXE
+; tool would hang and type10 Description String is wrong
+; [RootCause] Recent change in macro used to create Type 10 structure
+; was causing the problem.
+; [Solution] Reverted the change (for Type 10) to previous
+; 4.6.1_ALPHA_01.27 label.
+; [Files] Smbdata.mac
+;
+; 23 10/08/10 8:15p Davidd
+; [TAG] EIP43278
+;
+; [Category] Function Request
+;
+; [Severity] Normal
+;
+; [Description] SMBIOS 2.7 requirement
+;
+; [Files] Include\Protocol\Smbios.h
+; Include\Protocol\SmbiosDynamicData.h
+; Board\EM\SMBIOS\SMBiosStaticData\SmbiosStaticData.sdl
+; Board\EM\SMBIOS\SMBiosStaticData\SMBDATA.MAC
+; Board\EM\SMBIOS\SMBiosStaticData\SMBSTRUC.DEF
+; Board\EM\SMBIOS\SMBiosStaticData\SMBMACRO.AID
+; Board\EM\SMBIOS\SMBiosStaticData\Smbdesc.def
+; Board\EM\SMBIOS\SMBiosStaticData\SMB.EQU
+;
+; 22 8/18/09 8:43a Davidd
+; Change made to increase the handle number at the end of type 39 (System
+; Power Supply)
+;
+; 21 6/02/09 4:44p Davidd
+; Updated AMI headers (EIP 22180)
+;
+; 20 5/19/09 11:05a Davidd
+; Corrected CreateOnboardDevicesExtendedInfo macro returning used handle
+; in the next structure (EIP 21149).
+;
+; 19 2/03/09 2:56p Davidd
+;
+; 18 10/23/08 6:31p Davidd
+; More changes for SMBIOS v2.5 and v2.6 support
+;
+; 17 10/13/08 11:16a Davidd
+; Changes made to support SMBIOS v2.5 and v2.6
+;
+; 16 4/04/08 5:12p Davidd
+; Made changes to use SDL token Ax_MEMORY_SOCKETS as number of memory
+; slot for each memory array.
+;
+; 15 2/22/08 10:29a Davidd
+; Simplified the way the number of memory slots for each physical memory
+; array are defined.
+;
+; 14 2/01/08 11:58a Davidd
+; Changes made to support SMBIOS type 17 with multiple memory arrays.
+;
+; 13 11/21/07 10:15a Davidd
+; Modified CreatePortableBatteryInfo to support multiple entries.
+;
+; 12 11/16/07 6:41p Davidd
+; Made changes to support multiple entries for Physical Memory Array
+; Information type 16 and Built-in Pointing Device Information type 21.
+;
+; 11 11/07/07 3:24p Davidd
+; Fixed ROM image build verification problem by setting the BIOS Release
+; Date to "TODAY" field in timestamp.equ instead of the system date.
+;
+; 10 3/29/07 4:55p Davidd
+; Changed the year in the AMI banner.
+;
+; 9 3/21/07 4:07p Michaela
+; made changes to CreateMemoryInfo macro to support multiple
+; memory arrays
+;
+; 8 3/14/07 2:17p Pavell
+; Changes for ITK
+;
+; 7 7/14/06 9:08a Pavell
+;
+; 6 3/01/06 5:04p Davidd
+; Modified loop counters to correctly handle more than one physical
+; memory array.
+;
+; 5 8/10/05 4:07p Davidd
+; In CreateBiosLanguageInfo, changed the current language to 1.
+;
+; 4 7/13/05 5:23p Davidd
+; Added changes to automatically fill in BIOS release date using system
+; date at build time.
+;
+; 3 7/08/05 12:58p Davidd
+; Updated Type 0 structure to use CORE major and minor version from
+; Core.sdl tokens.
+;
+; 2 6/21/05 12:07p Davidd
+; Corrected hanging problem as BIOS Version was changed starting from
+; label "ALPHA-1.00.12".
+;
+; 1 4/29/05 2:15p Davidd
+; Initial checkin.
+;
+;****************************************************************************
+
+include timestamp.equ
+include token.equ
+
+IFNDEF _smbdata_mac_ ; Start of Inclusion Guard _smbdata_mac_
+_smbdata_mac_ EQU 1
+
+;----------------------------------------------------------------------------
+; Structure Type 0 : BIOS INFORMATION
+;----------------------------------------------------------------------------
+CreateBiosInfo macro xHandle:REQ
+
+ LOCAL xBVersion
+
+ MKF_CMA = MKF_CORE_MAJOR_VERSION
+ MKF_CMI = MKF_CORE_MINOR_VERSION
+ IFDEF MKF_ITK_SUPPORT
+ IF MKF_ITK_SUPPORT EQ -1
+ xBVersionNoTime TEXTEQU @CATSTR (%MKF_TWO_LETTER_PRODUCT_NAME, %MKF_PRODUCT_CHIPSET_FAMILY, %MKF_PRODUCT_BOARD_REVISION, %MKF_PRODUCT_BOARD_SUB_REVISION, <.>, %MKF_THREE_LETTER_OEMID, <.>, %MKF_PRODUCT_BUILD_NUMBER)
+ xBVersion TEXTEQU @CATSTR(xBVersionNoTime, <.>, %FOUR_DIGIT_YEAR, <.>, %TWO_DIGIT_MONTH, %TWO_DIGIT_DAY, <.>, %TWO_DIGIT_HOUR, %TWO_DIGIT_MINUTE)
+ ELSE
+ xBVersion TEXTEQU @CATSTR (%MKF_CORE_MAJOR_VERSION, <.>, %MKF_CORE_MINOR_VERSION, <.>, %MKF_CORE_REVISION)
+ ENDIF
+ ENDIF
+ IFNDEF MKF_ITK_SUPPORT
+ xBVersion TEXTEQU @CATSTR (%MKF_CORE_MAJOR_VERSION, <.>, %MKF_CORE_MINOR_VERSION, <.>, %MKF_CORE_REVISION)
+ ENDIF
+ BIOSINFO_STRUC {\
+ { 0, sizeof(BIOSINFO_STRUC), xHandle },
+ 1,
+ 2,
+ MKF_BI_BIOS_START_ADDR,
+ 3,
+ BIOS_SIZE_IN_KB(MKF_BIOS_SIZE),
+ BIOS_CHAR(),BIOS_CHAR1(),EXT_CHAR(),EXT_CHAR2(),
+ MKF_CMA,MKF_CMI,MKF_ECMA,MKF_ECMI\
+ }
+ SCAN_PUT_STR %MKF_BIOS_VENDOR
+ PUT_STR %xBVersion
+ SCAN_PUT_STR %TODAY
+ TERMINATOR
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 1 : SYSTEM INFORMATION
+;----------------------------------------------------------------------------
+CreateSysInfo macro xHandle:REQ
+
+ LOCAL length, strnum, nMN, nPN, nVE, nSN, nSK, nFA
+
+ xHandle = xHandle + 1
+ length = sizeof SYSINFO_STRUC
+ strnum = 1
+
+ IFNDEF MKF_SYSTEM_MANUFACTURER
+ nMN = 0
+ ELSE
+ nMN = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ IFNDEF MKF_SYSTEM_PRODUCT_NAME
+ nPN = 0
+ ELSE
+ nPN = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ IFNDEF MKF_SYSTEM_VERSION
+ nVE = 0
+ ELSE
+ nVE = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ IFNDEF MKF_SYSTEM_SERIAL_NUMBER
+ nSN = 0
+ ELSE
+ nSN = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ IFNDEF MKF_SYSTEM_SKU_NUMBER
+ nSK = 0
+ ELSE
+ nSK = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ IFNDEF MKF_SYSTEM_FAMILY
+ nFA = 0
+ ELSE
+ nFA = strnum
+ ENDIF
+
+ SYSINFO_STRUC {\
+ {1, length, xHandle},
+ nMN,
+ nPN,
+ nVE,
+ nSN,
+ MKF_SMBIOS_UUID,
+ MKF_SYSTEM_WAKEUP_TYPE,
+ nSK,
+ nFA\
+ }
+ IFDEF MKF_SYSTEM_MANUFACTURER
+ SCAN_PUT_STR %MKF_SYSTEM_MANUFACTURER
+ ENDIF
+ IFDEF MKF_SYSTEM_PRODUCT_NAME
+ SCAN_PUT_STR %MKF_SYSTEM_PRODUCT_NAME
+ ENDIF
+ IFDEF MKF_SYSTEM_VERSION
+ SCAN_PUT_STR %MKF_SYSTEM_VERSION
+ ENDIF
+ IFDEF MKF_SYSTEM_SERIAL_NUMBER
+ SCAN_PUT_STR %MKF_SYSTEM_SERIAL_NUMBER
+ ENDIF
+ IFDEF MKF_SYSTEM_SKU_NUMBER
+ SCAN_PUT_STR %MKF_SYSTEM_SKU_NUMBER
+ ENDIF
+ IFDEF MKF_SYSTEM_FAMILY
+ SCAN_PUT_STR %MKF_SYSTEM_FAMILY
+ ENDIF
+ TERMINATOR
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 2 : BASEBOARD INFORMATION
+;----------------------------------------------------------------------------
+CreateBaseBoardInfo macro xHandle:REQ
+
+ LOCAL length, chndl, sMN, sPR, sVE, sSN, sAT, sLC, sTemp, vFF, vBT
+ LOCAL strnum, nBB, nMN, nPR, nVE, nSN, nAT, nLC
+
+ chndl = xHandle + 1 + MKF_NUMBER_OF_BASEBOARDS
+
+ IF MKF_BASE_BOARD_INFO
+ length = sizeof BASEBOARD_INFO_STRUC
+
+ IF MKF_NUMBER_OF_BASEBOARDS EQ 1
+ xHandle = xHandle + 1
+ strnum = 1
+
+ IFNDEF MKF_BASE_BOARD_MANUFACTURER
+ nMN = 0
+ ELSE
+ nMN = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ IFNDEF MKF_BASE_BOARD_PRODUCT_NAME
+ nPR = 0
+ ELSE
+ nPR = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ IFNDEF MKF_BASE_BOARD_VERSION
+ nVE = 0
+ ELSE
+ nVE = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ IFNDEF MKF_BASE_BOARD_SERIAL_NUMBER
+ nSN = 0
+ ELSE
+ nSN = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ IFNDEF MKF_BB_ASSET_TAG
+ nAT = 0
+ ELSE
+ nAT = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ IFNDEF MKF_BB_LOC_IN_CHASSIS
+ nLC = 0
+ ELSE
+ nLC = strnum
+ ENDIF
+
+ BASEBOARD_INFO_STRUC {\
+ {2, length, xHandle},
+ nMN,
+ nPR,
+ nVE,
+ nSN,
+ nAT,
+ BASE_BOARD_FEATURE_FLAGS(),
+ nLC,
+ chndl,
+ MKF_BB_BOARD_TYPE,
+ 00h\
+ }
+ IFDEF MKF_BASE_BOARD_MANUFACTURER
+ SCAN_PUT_STR %MKF_BASE_BOARD_MANUFACTURER
+ ENDIF
+ IFDEF MKF_BASE_BOARD_PRODUCT_NAME
+ SCAN_PUT_STR %MKF_BASE_BOARD_PRODUCT_NAME
+ ENDIF
+ IFDEF MKF_BASE_BOARD_VERSION
+ SCAN_PUT_STR %MKF_BASE_BOARD_VERSION
+ ENDIF
+ IFDEF MKF_BASE_BOARD_SERIAL_NUMBER
+ SCAN_PUT_STR %MKF_BASE_BOARD_SERIAL_NUMBER
+ ENDIF
+ IFDEF MKF_BB_ASSET_TAG
+ SCAN_PUT_STR %MKF_BB_ASSET_TAG
+ ENDIF
+ IFDEF MKF_BB_LOC_IN_CHASSIS
+ SCAN_PUT_STR %MKF_BB_LOC_IN_CHASSIS
+ ENDIF
+ TERMINATOR
+ ELSE
+ nBB = 1
+ REPEAT MKF_NUMBER_OF_BASEBOARDS
+ xHandle = xHandle + 1
+ strnum = 1
+
+ sTemp TEXTEQU @CATSTR(<BASEBOARD_FEATURE_FLAG_>, <%nBB>)
+ vFF = @CATSTR(%sTemp)
+ sTemp TEXTEQU @CATSTR(<BASEBOARD_TYPE_>, <%nBB>)
+ vBT = @CATSTR(%sTemp)
+
+ sMN TEXTEQU @CATSTR(<BASEBOARD_MANUFACTURER_>, <%nBB>)
+; sMN will be set to "BASEBOARD_MANUFACTURER_X" if string is not defined,
+; therefore if we search the string for "BASEBOARD_MANUFACTURER_" and it
+; returns a non-zero value, it means the string is not defined.
+ IF @INSTR(1, %sMN, <BASEBOARD_MANUFACTURER_>) NE 0
+ nMN = 0
+ ELSE
+ nMN = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ sPR TEXTEQU @CATSTR(<BASEBOARD_PRODUCT_>, <%nBB>)
+ IF @INSTR(1, %sPR, <BASEBOARD_PRODUCT_>) NE 0
+ nPR = 0
+ ELSE
+ nPR = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ sVE TEXTEQU @CATSTR(<BASEBOARD_VERSION_>, <%nBB>)
+ IF @INSTR(1, %sVE, <BASEBOARD_VERSION_>) NE 0
+ nVE = 0
+ ELSE
+ nVE = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ sSN TEXTEQU @CATSTR(<BASEBOARD_SERIAL_NUMBER_>, <%nBB>)
+ IF @INSTR(1, %sSN, <BASEBOARD_SERIAL_NUMBER_>) NE 0
+ nSN = 0
+ ELSE
+ nSN = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ sAT TEXTEQU @CATSTR(<BASEBOARD_ASSET_TAG_>, <%nBB>)
+ IF @INSTR(1, %sAT, <BASEBOARD_ASSET_TAG_>) NE 0
+ nAT = 0
+ ELSE
+ nAT = strnum
+ strnum = strnum + 1
+ ENDIF
+
+ sLC TEXTEQU @CATSTR(<BASEBOARD_LOCATION_>, <%nBB>)
+ IF @INSTR(1, %sLC, <BASEBOARD_LOCATION_>) NE 0
+ nLC = 0
+ ELSE
+ nLC = strnum
+ ENDIF
+
+ BASEBOARD_INFO_STRUC {\
+ {2, length, xHandle},
+ nMN,
+ nPR,
+ nVE,
+ nSN,
+ nAT,
+ vFF,
+ nLC,
+ chndl,
+ vBT,
+ 00h\
+ }
+ IF nMN NE 0
+ SCAN_PUT_STR %sMN
+ ENDIF
+ IF nPR
+ SCAN_PUT_STR %sPR
+ ENDIF
+ IF nVE
+ SCAN_PUT_STR %sVE
+ ENDIF
+ IF nSN
+ SCAN_PUT_STR %sSN
+ ENDIF
+ IF nAT
+ SCAN_PUT_STR %sAT
+ ENDIF
+ IF nLC
+ SCAN_PUT_STR %sLC
+ ENDIF
+ nBB = nBB + 1
+ TERMINATOR
+ ENDM
+ ENDIF ; MKF_NUMBER_OF_BASEBOARDS
+ ENDIF ; MKF_BASE_BOARD_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 3 : SYSTEM ENCLOSURE OR CHASSIS
+;----------------------------------------------------------------------------
+CreateSysChassisInfo macro xHandle:REQ
+
+ LOCAL length, LockPresence, xSysHt, xNoPwrCords, xNoContEle, xContEleRcrdLen
+ LOCAL xCt, xCbs, xPss, xTs, xSs, xOem, xContElement
+
+ LOCAL strnum, MFG, sMfg, vCl, VER, sVer, SN, sSn, ATN, sAtn, SKU, sSku, nSC, sTemp
+
+ LockPresence = 0
+
+ IF MKF_SYS_CHASSIS_INFO
+ nSC = 1
+ REPEAT MKF_NUMBER_OF_SYSTEM_CHASSIS
+ xHandle = xHandle + 1
+ strnum = 1
+
+ sTemp TEXTEQU @CATSTR(<MKF_SYS_CHASSIS_MANUFACTURER_>, <%nSC>)
+ IF @INSTR(1, %sTemp, <MKF_SYS_CHASSIS_MANUFACTURER_>) NE 0
+ MFG = 0
+ ELSE
+ MFG = strnum
+ strnum = strnum + 1
+ sMfg TEXTEQU @CATSTR(%sTemp)
+ ENDIF
+
+ sTemp TEXTEQU @CATSTR(<MKF_SYS_CHASSIS_LOCK_>, <%nSC>)
+ vCl TEXTEQU @CATSTR(%sTemp)
+
+ sTemp TEXTEQU @CATSTR(<MKF_SYS_CHASSIS_TYPE_>, <%nSC>)
+ xCt TEXTEQU @CATSTR(%sTemp)
+ xCt TEXTEQU xCt OR vCl
+
+ sTemp TEXTEQU @CATSTR(<MKF_SYS_CHASSIS_VERSION_>, <%nSC>)
+ IF @INSTR(1, %sTemp, <MKF_SYS_CHASSIS_VERSION_>) NE 0
+ VER = 0
+ ELSE
+ VER = strnum
+ strnum = strnum + 1
+ sVer TEXTEQU @CATSTR(%sTemp)
+ ENDIF
+
+ sTemp TEXTEQU @CATSTR(<MKF_SYS_CHASSIS_SERIAL_NUM_>, <%nSC>)
+ IF @INSTR(1, %sTemp, <MKF_SYS_CHASSIS_SERIAL_NUM_>) NE 0
+ SN = 0
+ ELSE
+ SN = strnum
+ strnum = strnum + 1
+ sSn TEXTEQU @CATSTR(%sTemp)
+ ENDIF
+
+ sTemp TEXTEQU @CATSTR(<MKF_SYS_CHASSIS_ASSET_TAG_NUM_>, <%nSC>)
+ IF @INSTR(1, %sTemp, <MKF_SYS_CHASSIS_ASSET_TAG_NUM_>) NE 0
+ ATN = 0
+ ELSE
+ ATN = strnum
+ strnum = strnum + 1
+ sAtn TEXTEQU @CATSTR(%sTemp)
+ ENDIF
+
+ sTemp TEXTEQU @CATSTR(<MKF_SYS_CHASSIS_BOOT_STATE_>, <%nSC>)
+ xCbs TEXTEQU @CATSTR(%sTemp)
+
+ sTemp TEXTEQU @CATSTR(<MKF_SYS_PWR_SUPPLY_STATE_>, <%nSC>)
+ xPss TEXTEQU @CATSTR(%sTemp)
+
+ sTemp TEXTEQU @CATSTR(<MKF_SYS_THERMAL_STATE_>, <%nSC>)
+ xTs TEXTEQU @CATSTR(%sTemp)
+
+ sTemp TEXTEQU @CATSTR(<MKF_SYS_SECURE_STATE_>, <%nSC>)
+ xSs TEXTEQU @CATSTR(%sTemp)
+
+ sTemp TEXTEQU @CATSTR(<MKF_SYS_OEM_>, <%nSC>)
+ xOem TEXTEQU @CATSTR(%sTemp)
+
+ sTemp TEXTEQU @CATSTR(<MKF_SYS_HEIGHT_>, <%nSC>)
+ xSysHt TEXTEQU @CATSTR(%sTemp)
+
+ sTemp TEXTEQU @CATSTR(<MKF_NO_PWR_CORDS_>, <%nSC>)
+ xNoPwrCords TEXTEQU @CATSTR(%sTemp)
+
+ sTemp TEXTEQU @CATSTR(<MKF_ELEMENT_COUNT_>, <%nSC>)
+ xNoContEle = @CATSTR(%sTemp)
+
+ sTemp TEXTEQU @CATSTR(<MKF_ELEMENT_LEN_>, <%nSC>)
+ xContEleRcrdLen = @CATSTR(%sTemp)
+
+ xContElement TEXTEQU @CATSTR(<MKF_CONT_ELEMENT_>, <%nSC>)
+ xContElement TEXTEQU @CATSTR(%xContElement)
+
+ sTemp TEXTEQU @CATSTR(<MKF_SYS_CHASSIS_SKU_NUMBER_>, <%nSC>)
+ IF @INSTR(1, %sTemp, <MKF_SYS_CHASSIS_SKU_NUMBER_>) NE 0
+ SKU = 0
+ ELSE
+ SKU = strnum
+ sSku TEXTEQU @CATSTR(%sTemp)
+ ENDIF
+
+ IF (xNoContEle * xContEleRcrdLen) EQ 0
+ length = sizeof SYSENC_STRUC
+ SYSENC_STRUC {\
+ {3, length, xHandle},
+ MFG,xCt,VER,SN,ATN,
+ xCbs,xPss,xTs,xSs,xOem,
+ xSysHt,xNoPwrCords,
+ xNoContEle,
+ xContEleRcrdLen,
+ SKU\
+ }
+ ELSEIF nSC EQ 1
+ length = sizeof SYSENC_STRUC_1
+ SYSENC_STRUC_1 {\
+ {3, length, xHandle},
+ MFG,xCt,VER,SN,ATN,
+ xCbs,xPss,xTs,xSs,xOem,
+ xSysHt,xNoPwrCords,
+ xNoContEle,
+ xContEleRcrdLen,
+ xContElement,
+ SKU\
+ }
+ ELSEIF nSC EQ 2
+ length = sizeof SYSENC_STRUC_2
+ SYSENC_STRUC_2 {\
+ {3, length, xHandle},
+ MFG,xCt,VER,SN,ATN,
+ xCbs,xPss,xTs,xSs,xOem,
+ xSysHt,xNoPwrCords,
+ xNoContEle,
+ xContEleRcrdLen,
+ xContElement,
+ SKU\
+ }
+ ELSEIF nSC EQ 3
+ length = sizeof SYSENC_STRUC_3
+ SYSENC_STRUC_3 {\
+ {3, length, xHandle},
+ MFG,xCt,VER,SN,ATN,
+ xCbs,xPss,xTs,xSs,xOem,
+ xSysHt,xNoPwrCords,
+ xNoContEle,
+ xContEleRcrdLen,
+ xContElement,
+ SKU\
+ }
+ ELSEIF nSC EQ 4
+ length = sizeof SYSENC_STRUC_4
+ SYSENC_STRUC_4 {\
+ {3, length, xHandle},
+ MFG,xCt,VER,SN,ATN,
+ xCbs,xPss,xTs,xSs,xOem,
+ xSysHt,xNoPwrCords,
+ xNoContEle,
+ xContEleRcrdLen,
+ xContElement,
+ SKU\
+ }
+ ELSEIF nSC EQ 5
+ length = sizeof SYSENC_STRUC_5
+ SYSENC_STRUC_5 {\
+ {3, length, xHandle},
+ MFG,xCt,VER,SN,ATN,
+ xCbs,xPss,xTs,xSs,xOem,
+ xSysHt,xNoPwrCords,
+ xNoContEle,
+ xContEleRcrdLen,
+ xContElement,
+ SKU\
+ }
+ ENDIF
+
+ IF MFG NE 0
+ SCAN_PUT_STR %sMfg
+ ENDIF
+ IF VER NE 0
+ SCAN_PUT_STR %sVer
+ ENDIF
+ IF SN NE 0
+ SCAN_PUT_STR %sSn
+ ENDIF
+ IF ATN NE 0
+ SCAN_PUT_STR %sAtn
+ ENDIF
+ IF SKU NE 0
+ SCAN_PUT_STR %sSku
+ ENDIF
+ TERMINATOR
+ nSC = nSC + 1
+ ENDM
+ ENDIF ; MKF_SYS_CHASSIS_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 4 : PROCESSOR INFORMATION
+;----------------------------------------------------------------------------
+CreateProcessorInfo macro xHandle:REQ
+
+ LOCAL length, xSi, xSv, rC, xN, xPT, xPF, xPS, xPA, xPP, xPF2
+ LOCAL strnum, nSN, nAT, nPN
+
+ xL1 = 0FFFFh
+ xL2 = 0FFFFh
+ xL3 = 0FFFFh
+ xVt = 0
+ xMs = 0
+ xUg = 0
+ length = sizeof PROC_STRUC
+
+ IF MKF_PROCESSOR_INFO
+ rC = 1
+ REPEAT MKF_NO_OF_PROCESSOR_SOCKETS
+ xHandle = xHandle + 1
+
+ IF MKF_NUMBER_OF_PROC_CACHE GT 0
+ xL1 = xHandle + 1
+ ENDIF
+ IF MKF_NUMBER_OF_PROC_CACHE GT 1
+ xL2 = xL1 + 1
+ ENDIF
+ IF MKF_NUMBER_OF_PROC_CACHE GT 2
+ xL3 = xL2 + 1
+ ENDIF
+
+ xSd TEXTEQU @CATSTR(<PROC_SOC_DESIG_>, <%rC>)
+ xPT TEXTEQU @CATSTR(<PROC_TYPE_>, <%rC>)
+ xPF TEXTEQU @CATSTR(<PROC_FAMILY_>, <%rC>)
+ xSv TEXTEQU @CATSTR(<PROC_VOLTAGE_>, <%rC>)
+ xSs TEXTEQU @CATSTR(<PROC_MAX_SPEED_>, <%rC>)
+ xSu TEXTEQU @CATSTR(<PROC_UPGRADE_>, <%rC>)
+ xPS TEXTEQU @CATSTR(<PROC_SERIAL_NO_>, <%rC>)
+ xPA TEXTEQU @CATSTR(<PROC_ASSET_TAG_>, <%rC>)
+ xPP TEXTEQU @CATSTR(<PROC_PART_NO_>, <%rC>)
+ xPF2 TEXTEQU @CATSTR(<PROC_FAMILY_2_>, <%rC>)
+
+ strnum = 4
+
+ nSN = @SIZESTR(%xPS)
+ IF nSN NE 0
+ nSN = strnum
+ strnum = strnum + 1
+ ENDIF
+ nAT = @SIZESTR(%xPA)
+ IF nAT NE 0
+ nAT = strnum
+ strnum = strnum + 1
+ ENDIF
+ nPN = @SIZESTR(%xPP)
+ IF nPN NE 0
+ nPN = strnum
+ ENDIF
+
+ PROC_STRUC {\
+ {4,length,xHandle},
+ 01h,xPT,xPF,
+ 02h,0,
+ 03h,
+ @PROC_VOLT(%xSv),
+ 0,
+ xSs,
+ 0,41h,
+ xSu,
+ xL1,xL2,xL3,
+ nSN,nAT,nPN,
+ 1,1,1,
+ 04h,xPF2}
+ SCAN_PUT_STR %xSd
+ BYTE " ",0
+ BYTE " ",0
+ IF nSN NE 0
+ SCAN_PUT_STR %xPS
+ ENDIF
+ IF nAT NE 0
+ SCAN_PUT_STR %xPA
+ ENDIF
+ IF nPN NE 0
+ SCAN_PUT_STR %xPP
+ ENDIF
+ TERMINATOR
+ rC = rC+1
+ xHandle = CreateProcCacheInfo(xHandle)
+ ENDM
+ ENDIF
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 5 : MEMORY CONTROLLER INFORMATION
+;----------------------------------------------------------------------------
+CreateMemCtrlInfo macro xHandle:REQ, hStart:REQ
+
+ LOCAL length, hMemMod, xEDD
+
+ IF MKF_MEM_CTRL_INFO
+ xHandle = xHandle + 1
+ hMemMod = hStart
+ length = (15 + (2 * MKF_A1_MEMORY_SOCKETS) + 1)
+
+ xEDD = MKF_MEM_CTRL_EDD
+ xMs = MKF_MAX_MEM_MODULE_SIZE
+ MEMCTRL_STRUC {\
+ {5, length, xHandle},
+ xEDD,
+ MEM_CTRL_ECC(),
+ MKF_MEM_CTRL_INTRLV,
+ MKF_MEM_CTRL_INTRLV,
+ MEM_SIZE_IN_MB(xMs),
+ MEM_CTRL_SPEED(),
+ SUPPORTED_MEM_TYPE(),
+ MEM_MOD_VOLTAGE(),
+ MKF_A1_MEMORY_SOCKETS\
+ }
+ REPEAT MKF_A1_MEMORY_SOCKETS
+ WORD hMemMod
+ hMemMod = hMemMod + 1
+ ENDM
+ BYTE MEM_CTRL_ECC()
+ TERMINATOR ; Memory Controller structure NOT Terminated by NULL
+ TERMINATOR ; Memory Controller structure NOT Terminated by NULL
+ ENDIF
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 6 : MEMORY MODULE INFORMATION
+;----------------------------------------------------------------------------
+CreateMemModuleInfo macro xHandle:REQ
+
+ LOCAL length, rC, xS, dS, xN, xL, xMs
+
+ length = 0CH
+IF MKF_MEM_MODULE_INFO
+ rC = 1
+ REPEAT MKF_A1_MEMORY_SOCKETS
+ xHandle = xHandle + 1
+
+ DMIHDR_STRUC {6, length, xHandle}
+ BYTE 1
+
+ xS TEXTEQU @CATSTR(<MEMORY_INFO_>, <%rC>)
+ xN = @INSTR(1, %xS, <,>)
+ dS TEXTEQU @SUBSTR(%xS, 1, (xN-1))
+ xL = @SIZESTR(%xS)
+ xL = xL -xN
+ xS TEXTEQU @SUBSTR(%xS, (xN+1), xL)
+ xMs = @MEMORY_INFO(%xS)
+ xS TEXTEQU @CATSTR(<MEMORY_TYPE_>, <%rC>)
+ @MEMORY_TYPE %xS
+ WORD xMs
+ xS TEXTEQU @CATSTR(<MEMORY_ERR_STATUS_>, <%rC>)
+ @MEMORY_ERR_STATUS %xS
+ SCAN_PUT_STR %dS
+ TERMINATOR
+ rC = rC+1
+ ENDM
+ENDIF
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 7: CACHE INFORMATION (INTERNAL)
+;----------------------------------------------------------------------------
+CreateProcCacheInfo macro xHandle:REQ
+
+ LOCAL length, rC, xS, dS, xN, xL
+
+ length = sizeof CACHE_INFO_STRUC
+
+ rC = 1
+ REPEAT MKF_NUMBER_OF_PROC_CACHE
+ xHandle = xHandle + 1
+
+ DMIHDR_STRUC {7, length, xHandle}
+ BYTE 1
+ xS TEXTEQU @CATSTR(<PROC_CACHE_CFG_L>, <%rC>)
+ xN = @INSTR(1, %xS, <,>)
+ dS TEXTEQU @SUBSTR(%xS, 1, (xN-1))
+ xL = @SIZESTR(%xS)
+ xL = xL -xN
+ xS TEXTEQU @SUBSTR(%xS, (xN+1), xL)
+ @CACHE_CFG %xS
+ xS TEXTEQU @CATSTR(<PROC_CACHE_INFO_L>, <%rC>)
+ @CACHE_INFO %xS
+ xS TEXTEQU @CATSTR(<PROC_CACHE_CHAR_L>, <%rC>)
+ @CACHE_CHAR %xS
+ SCAN_PUT_STR %dS
+ TERMINATOR
+ rC = rC+1
+ ENDM
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 7: CACHE INFORMATION (EXTERNAL)
+;----------------------------------------------------------------------------
+CreateExternalCacheInfo macro xHandle:REQ
+
+ LOCAL length, rC, xS, dS, xN, xL
+
+IF MKF_EXTERNAL_CACHE_INFORMATION
+ xHandle = xHandle + 1
+ length = sizeof CACHE_INFO_STRUC
+
+ DMIHDR_STRUC {7, length, xHandle}
+ BYTE 1
+ xS TEXTEQU <EXTERNAL_CACHE_CFG>
+ xN = @INSTR(1, %xS, <,>)
+ dS TEXTEQU @SUBSTR(%xS, 1, (xN-1))
+ xL = @SIZESTR(%xS)
+ xL = xL -xN
+ xS TEXTEQU @SUBSTR(%xS, (xN+1), xL)
+ @EXT_CACHE_CFG %xS
+ xS TEXTEQU <EXTERNAL_CACHE_INFO>
+ @CACHE_INFO %xS
+ xS TEXTEQU <EXTERNAL_CACHE_CHAR>
+ @CACHE_CHAR %xS
+ SCAN_PUT_STR %dS
+ TERMINATOR
+ENDIF
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 8 : PORT CONNECTOR INFORMATION
+;----------------------------------------------------------------------------
+CreatePortConnectorInfo macro xHandle:REQ
+
+ LOCAL length, iS, eS, iP, eP, pT, xC, xN, xS, rC, xLabel
+
+ length = sizeof PORT_CONNECTOR_STRUC
+IF MKF_PORT_CONNECTOR_INFO
+ IF MKF_NUMBER_OF_EXT_PORT_CONNECTORS GT 0
+ rC = 1
+ REPEAT MKF_NUMBER_OF_EXT_PORT_CONNECTORS
+ xHandle = xHandle + 1
+ xN = 1
+
+ DMIHDR_STRUC {8, length, xHandle}
+ xS TEXTEQU @CATSTR(<EXT_CONNECTOR_>, <%rC>)
+ xC = @INSTR(<%xN>, %xS, <,>)
+ iS TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ iP TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ eS TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ eP TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = @SIZESTR(%xS)
+ xN = xN-xC
+ xC = xC+1
+ pT TEXTEQU @SUBSTR(%xS, <%xC>, xN)
+ DEFINE_EXT_CONNECTOR %iS, %iP, %eS, %eP, %pT
+ TERMINATOR
+ rC = rC+1
+ ENDM
+ ENDIF
+
+ IF MKF_NUMBER_OF_INT_PORT_CONNECTORS GT 0
+ rC = 1
+ REPEAT MKF_NUMBER_OF_INT_PORT_CONNECTORS
+ xHandle = xHandle + 1
+ xN = 1
+
+ DMIHDR_STRUC {8, length, xHandle}
+ xS TEXTEQU @CATSTR(<INT_CONNECTOR_>, <%rC>)
+ xC = @INSTR(<%xN>, %xS, <,>)
+ iS TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ iP TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = @SIZESTR(%xS)
+ xN = xN-xC
+ xC = xC+1
+ pT TEXTEQU @SUBSTR(%xS, <%xC>, xN)
+ DEFINE_INT_CONNECTOR %iS, %iP, %pT
+ TERMINATOR
+ rC = rC+1
+ ENDM
+ ENDIF
+ENDIF
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 9 : SYSTEM SLOT INFORMATION
+;----------------------------------------------------------------------------
+CreateSystemSlotInfo macro xHandle:REQ
+
+ LOCAL length, xS1, xS2, rC, xH, sD, sT, sW, cU, sL, sI, sc1, sc2, xC, xN, xS, xSG, xB, xDF
+
+ length = sizeof SYSTEM_SLOT_INFO_STRUC
+
+IF MKF_SYSTEM_SLOT_INFO
+ IF MKF_NUMBER_OF_SYSTEM_SLOTS GT 0
+ rC = 1
+ REPEAT MKF_NUMBER_OF_SYSTEM_SLOTS
+ xHandle = xHandle + 1
+ xN = 1
+
+ xS1 TEXTEQU @CATSTR(<SEGGRP_BUS_DEV_FUNC_>, <%rC>)
+ xS2 TEXTEQU @CATSTR(<SYSTEM_SLOT_CHAR_>, <%rC>)
+ xS TEXTEQU @CATSTR(<SYSTEM_SLOT_INFO_>, <%rC>)
+ xC = @INSTR(<%xN>, %xS, <,>)
+ sD TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ sT TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ sW TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ cU TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ sL TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = @SIZESTR(%xS)
+ xN = xN-xC
+ xC = xC+1
+ sI TEXTEQU @SUBSTR(%xS, <%xC>, xN)
+ xS TEXTEQU @CATSTR(<SEGGRP_BUS_DEV_FUNC_>, <%rC>)
+ xN = 1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ xSG TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ xB TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xC = xC+1
+ xDF TEXTEQU @SUBSTR(%xS, <%xC>)
+
+ SYS_SLOT_INFO 9, length, xHandle, sD, sT, sW, cU, sL, sI, xS2, xSG, xB, xDF
+ TERMINATOR
+ rC = rC+1
+ ENDM
+ ENDIF
+ENDIF
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 10 : ON BOARD DEVICES INFORMATION
+;----------------------------------------------------------------------------
+CreateOnboardDeviceInfo macro xHandle:REQ
+
+ LOCAL length, xS, xE, xT, xN, rC, xD, xC
+
+IF MKF_ONBOARD_DEVICE_INFO
+ xHandle = xHandle + 1
+ length = 4 + (2 * MKF_NUMBER_OF_ONBOARD_DEVICES)
+ rC = 1
+
+ DMIHDR_STRUC {10, length, xHandle}
+ REPEAT MKF_NUMBER_OF_ONBOARD_DEVICES
+ xN = 1
+ xS TEXTEQU @CATSTR(<ONBOARD_DEVICE_>, <%rC>)
+ xC = @INSTR(<%xN>, %xS, <,>)
+ xE TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ xT TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ ONBOARD_DEV_SUB_STRUC {((xE shl 7) OR xT), rC}
+ rC = rC + 1
+ ENDM
+ rC = 1
+ REPEAT MKF_NUMBER_OF_ONBOARD_DEVICES
+ xN = 1
+ xS TEXTEQU @CATSTR(<ONBOARD_DEVICE_>, <%rC>)
+ xC = @INSTR(<%xN>, %xS, <,>)
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ xN = @SIZESTR(%xS)
+ xN = xN-xC
+ xC = xC+1
+ xD TEXTEQU @SUBSTR(%xS, <%xC>, <%xN>)
+ SCAN_PUT_STR %xD
+ rC = rC + 1
+ ENDM
+ TERMINATOR
+ENDIF
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 11 : OEM STRINGS INFORMATION
+;----------------------------------------------------------------------------
+CreateOemStringInfo macro xHandle:REQ
+
+ LOCAL xS, rC
+
+IF MKF_OEM_STRING_INFO
+ xHandle = xHandle + 1
+
+ OEM_STRING_STRUC {\
+ {11, 5, xHandle},
+ MKF_NUMBER_OF_OEM_STRINGS\
+ }
+ rC = 1
+ REPEAT MKF_NUMBER_OF_OEM_STRINGS
+ xS TEXTEQU @CATSTR(<OEM_STRING_>, <%rC>)
+ SCAN_PUT_STR %xS
+ rC = rC+1
+ ENDM
+ TERMINATOR
+ENDIF
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 12 : SYSTEM CONFIGURATION STRINGS INFORMATION
+;----------------------------------------------------------------------------
+CreateSystemConfigOptionInfo macro xHandle:REQ
+
+ LOCAL xS, rC
+
+IF MKF_SYSTEM_CONFIG_OPTION_INFO
+ xHandle = xHandle + 1
+
+ SYSTEM_CONFIG_OPT_STRUC {\
+ {12, 5, xHandle},
+ MKF_NUMBER_OF_SYSTEM_CONFIG_STRINGS\
+ }
+ rC = 1
+ REPEAT MKF_NUMBER_OF_SYSTEM_CONFIG_STRINGS
+ xS TEXTEQU @CATSTR(<SYSTEM_CONFIG_STRING_>, <%rC>)
+ SCAN_PUT_STR %xS
+ rC = rC+1
+ ENDM
+ TERMINATOR
+ENDIF
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 13: BIOS LANGUAGE INFORMATION
+;----------------------------------------------------------------------------
+CreateBiosLanguageInfo macro xHandle:REQ
+
+ LOCAL xS, rC
+
+IF MKF_BIOS_LANGUAGE_INFO
+ xHandle = xHandle + 1
+
+ BIOS_LANGUAGE_INFO_STRUC {\
+ {13, 16h, xHandle},
+ NUMBER_OF_LANGUAGE_STRINGS,
+ BIOS_LANGUAGE_FORMAT,
+ {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
+ CURRENT_LANGUAGE\
+ }
+ rC = 1
+ REPEAT NUMBER_OF_LANGUAGE_STRINGS
+ xS TEXTEQU @CATSTR(<LANGUAGE_STRING_>, <%rC>)
+ SCAN_PUT_STR %xS
+ rC = rC+1
+ ENDM
+ TERMINATOR
+ENDIF
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 14: GROUP ASSOCIATION INFORMATION
+;----------------------------------------------------------------------------
+; NOT IMPLEMENTED NOW
+
+;----------------------------------------------------------------------------
+; Structure Type 15: EVENT LOG INFORMATION
+;----------------------------------------------------------------------------
+CreateEventLogInfo MACRO xHandle:REQ
+
+ LOCAL length
+
+ length = 14h
+IF MKF_EVENT_LOG_INFO
+ xHandle = xHandle + 1
+ length = (17h + (NO_OF_SUPPORTED_EVENTS * LENGTH_OF_EACH_LOG_TYPE_DESC))
+
+ EVENTLOG_INFO_STRUC {\
+ {15, length, xHandle},
+ 0004h,
+ 0000h,
+ 0002h,
+ 02h,
+ 00h,
+ 00000000h,
+ 046c046ah,
+ 00h,
+ NO_OF_SUPPORTED_EVENTS,
+ LENGTH_OF_EACH_LOG_TYPE_DESC\
+ }
+ BYTE (NO_OF_SUPPORTED_EVENTS*LENGTH_OF_EACH_LOG_TYPE_DESC) dup(0FFh)
+ TERMINATOR
+ TERMINATOR
+ENDIF
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 16: PHYSICAL MEMORY ARRAY INFORMATION
+;----------------------------------------------------------------------------
+CreateMemoryInfo MACRO xHandle:REQ
+
+ LOCAL length, HArrayError, HArray, HMdevice, HMMAddress
+ LOCAL AC, ILoopCount, xN, xNN, xSi, xSv, xTv, xoN
+ LOCAL xNmd, xCt, xMl, xDc, ICurDev, xDn, xDh, xMs, xA, xDw, xFf, xMt, xTd, xAt
+
+ length = sizeof PHY_MEM_ARRAY_STRUC
+ AC = 1
+ REPEAT MKF_NO_OF_PHYSICAL_MEMORY_ARRAY
+ xHandle = xHandle + 1
+ HArray = xHandle
+
+IF MKF_MEMORY_ERROR_INFO
+ HArrayError = xHandle + 1
+ELSE
+ HArrayError = 0FFFEh
+ENDIF
+
+ xA TEXTEQU @CATSTR(<MKF_A>, <%AC>)
+ xMs = @CATSTR(%xA, <_MEMORY_SOCKETS>)
+
+ PHY_MEM_ARRAY_STRUC {\
+ {16, length, xHandle},
+ @CATSTR(<ARRAY_LOC_>,<%AC>),
+ @CATSTR(<ARRAY_USE_>,<%AC>),
+ @CATSTR(<ARRAY_ERROR_COR_>,<%AC>),
+ @CATSTR(<MAX_MEM_CAP_>,<%AC>),
+ HArrayError,
+ xMs,
+ @CATSTR(<EXT_MAX_MEM_CAP_>,<%AC>)\
+ }
+ TERMINATOR
+ TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 18: MEMORY ERROR INFORMATION
+;----------------------------------------------------------------------------
+IF MKF_MEMORY_ERROR_INFO
+ length = sizeof MEMORY_ARRAY_ERR_STRUC
+ xHandle = xHandle + 1
+ MEMORY_ARRAY_ERR_STRUC {\
+ {18, length, xHandle},
+ MKF_MEMORY_ERROR_TYPE,
+ MKF_ERROR_GRANULARITY,
+ MKF_ERROR_OPERATION,
+ MKF_VENDOR_SYNDROME,
+ MKF_MEMORY_ARRAY_ERROR_ADDRESS,
+ MKF_DEVICE_ERROR_ADDRESS,
+ MKF_ERROR_RESOLUTION\
+ }
+ TERMINATOR
+ TERMINATOR
+ENDIF
+
+;----------------------------------------------------------------------------
+; Structure Type 19: MEMORY ARRAY MAPPED ADDRESS INFORMATION
+;----------------------------------------------------------------------------
+ length = sizeof MEMORY_ARRAY_MAPPED_ADDRESS_STRUC
+ xHandle = xHandle + 1
+ HMMAddress = xHandle
+ MEMORY_ARRAY_MAPPED_ADDRESS_STRUC{\
+ {19, length, xHandle},
+ MKF_ARRAY_MAPPED_STARTING_ADDRESS,
+ MKF_ARRAY_MAPPED_ENDING_ADDRESS,
+ HArray,
+ MKF_PARTITION_WIDTH,
+ 0,
+ 0\
+ }
+ TERMINATOR
+ TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 17: MEMORY DEVICE INFORMATION
+;----------------------------------------------------------------------------
+ ILoopCount = 1
+ xA TEXTEQU @CATSTR(<A>, <%AC>)
+
+ REPEAT xMs
+ length = sizeof MEMORY_DEVICE_STRUC
+ xSv TEXTEQU @CATSTR(%xA, <_DEVICE_>, <%ILoopCount>)
+ xDw = @CATSTR(%xA, <_DATAWIDTH>)
+ xFf = @CATSTR(%xA, <_FORMFACTOR>)
+ xMt = @CATSTR(%xA, <_MEMORYTYPE>)
+ xTd = @CATSTR(%xA, <_TYPEDETAIL>)
+ xAt = @CATSTR(%xA, <_ATTRIBUTES>)
+ xHandle = xHandle + 1
+ HMdevice = xHandle
+
+IF MKF_MEMORY_ERROR_INFO
+ HArrayError = xHandle + 1
+ELSE
+ HArrayError = 0FFFEh
+ENDIF
+
+ MEMORY_DEVICE_STRUC {\
+ {17, length, xHandle},
+ HArray,
+ HArrayError,
+ 0ffffh,
+ xDw,
+ 0,
+ xFf,
+ 0,
+ 01h,
+ 02h,
+ xMt,
+ xTd,
+ 0,
+ 03h,
+ 04h,
+ 05h,
+ 06h,
+ xAt,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0\
+ }
+ xoN = 1
+ xN = @INSTR(xoN, %xSv, <,>)
+ xTv TEXTEQU @SUBSTR(%xSv, xoN, (xN-xoN))
+ SCAN_PUT_STR %xTv
+ xoN = xN + 1
+ xN = @INSTR(xoN, %xSv, <,>)
+ xTv TEXTEQU @SUBSTR(%xSv, xoN, (xN-xoN))
+ SCAN_PUT_STR %xTv
+ xoN = xN + 1
+ xN = @INSTR(xoN, %xSv, <,>)
+ xTv TEXTEQU @SUBSTR(%xSv, xoN, (xN-xoN))
+ SCAN_PUT_STR %xTv
+ xoN = xN + 1
+ xN = @INSTR(xoN, %xSv, <,>)
+ xTv TEXTEQU @SUBSTR(%xSv, xoN, (xN-xoN))
+ SCAN_PUT_STR %xTv
+ xoN = xN + 1
+ xN = @INSTR(xoN, %xSv, <,>)
+ xTv TEXTEQU @SUBSTR(%xSv, xoN, (xN-xoN))
+ SCAN_PUT_STR %xTv
+ xoN = xN + 1
+ xTv TEXTEQU @SUBSTR(%xSv, xoN)
+ SCAN_PUT_STR %xTv
+ xoN = xN + 1
+ TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 18: MEMORY ERROR INFORMATION
+;----------------------------------------------------------------------------
+IF MKF_MEMORY_ERROR_INFO
+ length = sizeof MEMORY_ARRAY_ERR_STRUC
+ xHandle = xHandle + 1
+ MEMORY_ARRAY_ERR_STRUC {\
+ {18, length, xHandle},
+ MKF_MEMORY_ERROR_TYPE,
+ MKF_ERROR_GRANULARITY,
+ MKF_ERROR_OPERATION,
+ MKF_VENDOR_SYNDROME,
+ MKF_MEMORY_ARRAY_ERROR_ADDRESS,
+ MKF_DEVICE_ERROR_ADDRESS,
+ MKF_ERROR_RESOLUTION\
+ }
+ TERMINATOR
+ TERMINATOR
+ENDIF
+
+;----------------------------------------------------------------------------
+; Structure Type 20: MEMORY DEVICE MAPPED ADDRESS INFORMATION
+;----------------------------------------------------------------------------
+IF MKF_MEMORY_DEVICE_INFO
+ length = sizeof MEMORY_DEVICE_MAPPED_ADDRESS_STRUC
+ xHandle = xHandle + 1
+ MEMORY_DEVICE_MAPPED_ADDRESS_STRUC {\
+ {20, length, xHandle},
+ MKF_MEMORY_DEVICE_STARTING_ADDRESS,
+ MKF_MEMORY_DEVICE_ENDING_ADDRESS,
+ HMdevice,
+ HMMAddress,
+ 01h,
+ 00h,
+ MKF_INTERLEAVE_DATA_DEPTH,
+ 0,
+ 0\
+ }
+ TERMINATOR
+ TERMINATOR
+ENDIF
+ ILoopCount = ILoopCount + 1
+ ENDM ; xMs
+ AC = AC + 1
+ENDM ; MKF_NO_OF_PHYSICAL_MEMORY_ARRAY
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 37: MEMORY CHANNEL INFORMATION STRUCTURE
+;----------------------------------------------------------------------------
+CreateMemoryChannelInfo macro xHandle:REQ
+
+ LOCAL ILoopCount, xNmd, xCt, xMl, sLen
+
+IF MKF_MEMORY_CHANNEL_INFO
+ ILoopCount = 1
+ REPEAT MKF_NUMBER_OF_MEMORY_CHANNELS
+ xHandle = xHandle + 1
+
+ xNmd = @CATSTR (<NUMBER_OF_MEMORY_DEVICES_IN_CHANNEL_>, <%ILoopCount>)
+ xCt = @CATSTR (<CHANNEL_>, <%ILoopCount>, <_TYPE>)
+ xMl = @CATSTR (<MAX_CHANNEL_>, <%ILoopCount>, <_LOAD>)
+ sLen = 7 + 3 * xNmd
+ MEMORY_CHANNEL_STRUC {\
+ {37, sLen, xHandle},
+ xCt,
+ xMl,
+ xNmd\
+ }
+
+ REPEAT xNmd
+ db 1
+ dw 0
+ ENDM ; xNmd
+
+ TERMINATOR
+ TERMINATOR
+ ILoopCount = ILoopCount + 1
+ ENDM ; MKF_NUMBER_OF_MEMORY_CHANNELS
+ENDIF
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 16: SYSTEM FLASH MEMORY ARRAY INFORMATION
+;----------------------------------------------------------------------------
+CreateFlashMemoryInfo MACRO xHandle:REQ
+
+LOCAL FMArray,FMdevice,FMMAddress
+
+IF MKF_FLASH_MEMORY_ARRAY_INFO
+xHandle = xHandle + 1
+FMArray = xHandle
+PHY_MEM_ARRAY_STRUC {\
+{16, sizeof(PHY_MEM_ARRAY_STRUC), xHandle},
+03h,
+05h,
+03h,
+(MKF_BIOS_SIZE/400h),
+0FFFEh,
+01h,
+00h\
+}
+TERMINATOR
+TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 19: MEMORY ARRAY MAPPED ADDRESS INFORMATION
+;----------------------------------------------------------------------------
+xHandle = xHandle + 1
+FMMAddress = xHandle
+MEMORY_ARRAY_MAPPED_ADDRESS_STRUC{\
+{19, sizeof(MEMORY_ARRAY_MAPPED_ADDRESS_STRUC), xHandle},
+(0FFFFFFFFh - MKF_BIOS_SIZE + 1) SHR 10,
+0FFFFFFFFh SHR 10,
+FMArray,
+01h, 0, 0\
+}
+TERMINATOR
+TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 17: MEMORY DEVICE INFORMATION
+;----------------------------------------------------------------------------
+xHandle = xHandle + 1
+FMdevice = xHandle
+MEMORY_DEVICE_STRUC {\
+{17, sizeof(MEMORY_DEVICE_STRUC), xHandle},
+FMArray,
+0FFFEh,
+08h,
+08h,
+(MKF_BIOS_SIZE/400h) OR 8000h,
+01h,
+00h,
+01h,
+02h,
+09h,
+1000h,
+00h,
+03h,
+04h,
+05h,
+06h,
+00h,
+00h,
+00h,
+00h,
+00h,
+00h\
+}
+BYTE 20h, 0
+BYTE 20h, 0
+BYTE 20h, 0
+BYTE 20h, 0
+BYTE 20h, 0
+BYTE 20h, 0
+TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 20: MEMORY DEVICE MAPPED ADDRESS INFORMATION
+;----------------------------------------------------------------------------
+xHandle = xHandle + 1
+MEMORY_DEVICE_MAPPED_ADDRESS_STRUC {\
+{20, sizeof(MEMORY_DEVICE_MAPPED_ADDRESS_STRUC), xHandle},
+(0FFFFFFFFh - MKF_BIOS_SIZE + 1) SHR 10,
+0FFFFFC00h SHR 10,
+FMdevice,
+FMMAddress,
+01h,
+00h,
+00h,
+00h,
+00h\
+}
+TERMINATOR
+TERMINATOR
+ENDIF ; MKF_FLASH_MEMORY_ARRAY_INFO
+EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 21: BUILT-IN POINTING DEVICE INFORMATION
+;----------------------------------------------------------------------------
+CreateBuiltinPointingDeviceInfo macro xHandle:REQ
+
+ LOCAL PointDevCntr
+
+IF MKF_BUILTIN_POINTING_DEVICE_INFO
+ PointDevCntr = 1
+
+ REPEAT MKF_NO_OF_POINTING_DEVICE
+ xHandle = xHandle + 1
+
+ BUILTIN_POINT_DEV_STRUC {\
+ {21, 07h, xHandle},
+ @CATSTR(<POINTING_DEVICE_TYPE_>,<%PointDevCntr>),
+ @CATSTR(<POINTING_DEVICE_INTERFACE_>,<%PointDevCntr>),
+ @CATSTR(<POINTING_DEVICE_NUM_BUTTONS_>,<%PointDevCntr>)\
+ }
+ TERMINATOR
+ TERMINATOR
+ PointDevCntr = PointDevCntr + 1
+ ENDM ; MKF_NO_OF_POINTING_DEVICE
+ENDIF ; MKF_BUILTIN_POINTING_DEVICE_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 22: PORTABLE BATTERY INFORMATION
+;----------------------------------------------------------------------------
+CreatePortableBatteryInfo macro xHandle:REQ
+
+ LOCAL BC, xDCh, xDC, xDV, xME, xSSN, xSMD, xDCM, xOS
+
+IF MKF_PORTABLE_BATTERY_INFO
+
+ BC = 1
+
+ REPEAT MKF_NO_OF_PORTABLE_BATTERY
+ xHandle = xHandle + 1
+
+ xDCh = @CATSTR(<DEVICE_CHEMISTRY_>,<%BC>)
+ xDC = @CATSTR(<DESIGN_CAPACITY_>,<%BC>)
+ xDV = @CATSTR(<DESIGN_VOLTAGE_>,<%BC>)
+ xME = @CATSTR(<MAX_ERROR_IN_BAT_DATA_>,<%BC>)
+ xSSN = @CATSTR(<PORT_BAT_SBDS_SERIAL_NO_>,<%BC>)
+ xSMD = @CATSTR(<PORT_BAT_SBDS_MAN_DATE_>,<%BC>)
+ xDCM = @CATSTR(<DESIGN_CAPACITY_MULTIPLIER_>,<%BC>)
+ xOS = @CATSTR(<OEM_SPECIFIC_>,<%BC>)
+
+ PORTABLE_BATTERY_STRUC {\
+ {22, sizeof(PORTABLE_BATTERY_STRUC), xHandle},
+ 01h, 02h, 03h, 04h, 05h,
+ xDCh,
+ xDC,
+ xDV,
+ 06,
+ xME,
+ xSSN,
+ ,
+ 07,
+ ,
+ xOS\
+ }
+ SCAN_PUT_STR @CATSTR(<PORT_BAT_LOCATION_>,<%BC>)
+ SCAN_PUT_STR @CATSTR(<PORT_BAT_MANUFACTURER_>,<%BC>)
+ SCAN_PUT_STR @CATSTR(<PORT_BAT_MANUFACTURE_DATE_>,<%BC>)
+ SCAN_PUT_STR @CATSTR(<PORT_BAT_SERIAL_NUMBER_>,<%BC>)
+ SCAN_PUT_STR @CATSTR(<PORT_BAT_DEVICE_NAME_>,<%BC>)
+ SCAN_PUT_STR @CATSTR(<PORT_BAT_SBDS_VER_NO_>,<%BC>)
+ SCAN_PUT_STR @CATSTR(<PORT_BAT_SBDS_DEV_CHEM_>,<%BC>)
+ TERMINATOR
+ BC = BC + 1
+ ENDM ; MKF_NO_OF_PORTABLE_BATTERY
+ENDIF ; MKF_PORTABLE_BATTERY_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 23: SYSTEM RESET INFORMATION
+;----------------------------------------------------------------------------
+CreateSystemResetInfo MACRO xHandle:REQ
+
+ LOCAL length
+
+ length = 0Dh
+IF MKF_SYSTEM_RESET_INFO
+ xHandle = xHandle + 1
+
+ SYSTEM_RESET_STRUC {\
+ {23, length, xHandle},
+ RESET_CAPABILITIES,
+ RESET_COUNT,
+ RESET_LIMIT,
+ RESET_TIMER_INTERVAL,
+ RESET_TIMEOUT\
+ }
+ TERMINATOR
+ TERMINATOR
+ENDIF ; MKF_SYSTEM_RESET_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 24: HARDWARE SECURITY INFORMATION
+;----------------------------------------------------------------------------
+CreateHardwareSecurityInfo MACRO xHandle:REQ
+
+ LOCAL length
+
+ length = 05h
+IF MKF_HARDWARE_SECURITY_INFO
+ xHandle = xHandle + 1
+
+ HARDWARE_SECURITY_STRUC {\
+ {24, length, xHandle},
+ MKF_HARDWARE_SECURITY_SETTINGS\
+ }
+ TERMINATOR
+ TERMINATOR
+ENDIF ; MKF_HARDWARE_SECURITY_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 25: SYSTEM POWER CONTROLS INFORMATION
+;----------------------------------------------------------------------------
+CreateSystemPowerControlsInfo MACRO xHandle:REQ
+
+ LOCAL length
+
+ length = 09h
+
+IF MKF_SYSTEM_POWER_CONTROLS_INFO
+ xHandle = xHandle + 1
+
+ SYSTEM_POWER_CONTROLS_STRUC {\
+ {25, length, xHandle},
+ NEXT_SCHEDULED_POWERON_MONTH,
+ NEXT_SCHEDULED_POWERON_DAY_OF_MONTH,
+ NEXT_SCHEDULED_POWERON_HOUR,
+ NEXT_SCHEDULED_POWERON_MINUTE,
+ NEXT_SCHEDULED_POWERON_SECOND\
+ }
+ TERMINATOR
+ TERMINATOR
+ENDIF ; MKF_SYSTEM_POWER_CONTROLS_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 30: OUT-OF-BAND REMOTE ACCESS INFORMATION
+;----------------------------------------------------------------------------
+CreateOutofBandRemoteAccessInfo MACRO xHandle:REQ
+
+ LOCAL length
+
+ length = 06h
+
+IF MKF_OUT_OF_BAND_REMOTE_ACCESS_INFO
+ xHandle = xHandle + 1
+
+ OUT_OF_BAND_REMOTE_ACCESS_STRUC {\
+ {30, length, xHandle},
+ 01h,
+ MKF_OBRA_CONNECTIONS\
+ }
+ SCAN_PUT_STR %MKF_OBRA_MANUFACTURER_NAME
+ TERMINATOR
+ENDIF ; MKF_OUT_OF_BAND_REMOTE_ACCESS_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 31: BOOT INTEGRITY SERVICES
+;----------------------------------------------------------------------------
+CreateBootIntegrityServicesInfo MACRO xHandle:REQ
+
+IF MKF_BIS_INFO
+ xHandle = xHandle + 1
+
+ BOOT_INTEGRITY_STRUC {\
+ {31, sizeof(BOOT_INTEGRITY_STRUC), xHandle},
+ MKF_CHECKSUM,
+ 0,
+ 0,
+ MKF_BIS_ENTRY_POINT_REAL_MODE,
+ MKF_BIS_ENTRY_POINT_FLAT_MODE,
+ 0,
+ 0\
+ }
+ TERMINATOR
+ TERMINATOR
+ENDIF ; MKF_BIS_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 32: SYSTEM BOOT INFORMATION
+;----------------------------------------------------------------------------
+CreateSystemBootInfo MACRO xHandle:REQ
+
+IF MKF_SYSTEM_BOOT_INFO
+ xHandle = xHandle + 1
+
+ SYS_BOOT_INFORMATION_STRUC {\
+ {32, sizeof(SYS_BOOT_INFORMATION_STRUC), xHandle},
+ {0,0,0,0,0,0},
+ {0,0,0,0,0,0,0,0,0,0}\
+ }
+ TERMINATOR
+ TERMINATOR
+ENDIF ; MKF_SYSTEM_BOOT_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 33: 64-BIT MEMORY ERROR INFORMATION
+;----------------------------------------------------------------------------
+CreateSixtyFourBitMemoryErrorInfo MACRO xHandle:REQ
+
+ LOCAL length
+
+ length = 01Fh
+
+IF MKF_SIXTY_FOURBIT_MEMORY_ERROR_INFO
+ xHandle = xHandle + 1
+
+ SIXTYFOUR_BIT_MEMORY_ARRAY_ERR_STRUC {\
+ {33, length, xHandle},
+ MKF_MEMORY_ERROR_TYPE,
+ MKF_ERROR_GRANULARITY,
+ MKF_ERROR_OPERATION,
+ MKF_VENDOR_SYNDROME,
+ MEM_ARR_ERR_ADD,
+ DEV_ERR_ADD,
+ MKF_ERROR_RESOLUTION\
+ }
+ TERMINATOR
+ TERMINATOR
+ENDIF ; MKF_SIXTY_FOURBIT_MEMORY_ERROR_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 34: MANAGEMENT DEVICE INFORMATION
+;----------------------------------------------------------------------------
+CreateManagementDeviceInfo macro xHandle:REQ
+
+ LOCAL length, mD, mT, mA, mAt, xC, xN, xS, rC, mH, cH, tH
+ LOCAL vD,lS,maxV,minV,reS,tolE,accY,oD,nomV,rCMdi,rCVpi, rCEdi
+ LOCAL Tphndl,tD,dtS,cuG,oDc,nS,nD,eD,xT,xCc,xE,xV,rCo
+ LOCAL xPs, mPc, pSc, xTs
+
+ length = 0Bh
+
+IF MKF_MANAGEMENT_DEVICE_INFO
+ rCMdi = 1
+
+ REPEAT MKF_NUMBER_OF_MANAGEMENT_DEVICES
+ xHandle = xHandle + 1
+ mH = xHandle
+
+ mD TEXTEQU @CATSTR(<MANAGEMENT_DEVICE_STRING_>, <%rCMdi>)
+ mT TEXTEQU @CATSTR(<MANAGEMENT_DEVICE_TYPE_>, <%rCMdi>)
+ mA TEXTEQU @CATSTR(<MANAGEMENT_DEVICE_ADDR_>, <%rCMdi>)
+ mAt TEXTEQU @CATSTR(<MANAGEMENT_DEVICE_ADDR_TYPE_>, <%rCMdi>)
+
+ MANAGEMENT_DEV_INFO 34, length, xHandle, mD, mT, mA, mAt
+ TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 26: VOLTAGE PROBE INFORMATION
+;----------------------------------------------------------------------------
+IF MKF_VOLTAGE_PROBE_INFO
+ rCVpi =1
+ xV TEXTEQU @CATSTR(<NUMBER_OF_VOLTAGE_PROBE_ASSOCIATED_MGMT_DEV_>, <%rCMdi>)
+
+ REPEAT xV
+ xHandle = xHandle + 1
+ cH = xHandle
+ length = sizeof VOLTAGE_PROBE_STRUC
+
+ xN = 1
+ xS TEXTEQU @CATSTR(<VOLTAGE_PROBE_INFO_>, <%rCMdi>, <_>, <%rCVpi>)
+ xC = @INSTR(<%xN>, %xS, <,>)
+ vD TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ lS TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ maxV TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ minV TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ reS TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ tolE TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ accY TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ oD TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = @SIZESTR(%xS)
+ xN = xN-xC
+ xC = xC+1
+ nomV = @SUBSTR(%xS, <%xC>, xN)
+
+ VOLTAGE_PRO_INFO 26, length, xHandle, vD, lS, maxV, minV, reS, tolE, accY, oD, nomV
+ TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 36: MANAGEMENT DEVICE THRESHOLD DATA INFORMATION
+;----------------------------------------------------------------------------
+ xHandle = xHandle + 1
+ tH = xHandle
+ length = sizeof MANAGEMENT_DEVICE_THRESHOLD_DATA_STRUC
+
+ xN = 1
+ xS TEXTEQU @CATSTR(<MANAGEMENT_DEV_VOLT_THRESHOLD_DATA_INFO_>, <%rCMdi>, <_>, <%rCVpi>)
+ xC = @INSTR(xN, %xS, <,>)
+ ltnc = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ utnc = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ ltc = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ utc = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ ltnr = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @SIZESTR(%xS)
+ utnr = @SUBSTR(%xS, xN, (xC-xN+1))
+
+ MANAGEMENT_DEV_THRESHOLD_INFO 36, length, xHandle, ltnc, utnc, ltc, utc, ltnr, utnr
+ TERMINATOR
+ TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 35: MANAGEMENT DEVICE COMPONENT INFORMATION
+;----------------------------------------------------------------------------
+ xHandle = xHandle + 1
+
+ MANAGEMENT_DEVICE_COMPONENT_STRUC{\
+ {35, sizeof(MANAGEMENT_DEVICE_COMPONENT_STRUC), xHandle},
+ 01h, mH, cH, tH}
+
+ SCAN_PUT_STR %MKF_MGMT_DEV_COMPONENT_DESCRIPTION
+ TERMINATOR
+
+ rCVpi = rCVpi + 1
+ ENDM ; xV
+ENDIF ; IF MKF_VOLTAGE_PROBE_INFO
+
+;----------------------------------------------------------------------------
+; Structure Type 28: TEMPERATURE PROBE INFORMATION
+;----------------------------------------------------------------------------
+IF MKF_TEMPERATURE_PROBE_INFO
+ rCTpi = 1
+ xT TEXTEQU @CATSTR(<NUMBER_OF_TEMPERATURE_PROBE_ASSOCIATED_MGMT_DEV_>, <%rCMdi>)
+
+ REPEAT xT
+ xHandle = xHandle + 1
+ Tphndl = xHandle
+ cH = xHandle
+ length = sizeof TEMPERATURE_PROBE_STRUC
+ xN = 1
+ xS TEXTEQU @CATSTR(<TEMPERATURE_PROBE_INFO_>, <%rCMdi>, <_>, <%rCTpi>)
+ xC = @INSTR(<%xN>, %xS, <,>)
+ tD TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ lS TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ maxV TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ minV TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ reS TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ tolE TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ accY TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ oD TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = @SIZESTR(%xS)
+ xN = xN-xC
+ xC = xC+1
+ nomV = @SUBSTR(%xS, <%xC>, xN)
+
+ TEMPERATURE_PRO_INFO 28, length, xHandle, tD, lS, maxV, minV, reS, tolE, accY, oD, nomV
+ TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 36: MANAGEMENT DEVICE THRESHOLD DATA INFORMATION
+;----------------------------------------------------------------------------
+
+ xHandle = xHandle + 1
+ tH = xHandle
+ length = sizeof MANAGEMENT_DEVICE_THRESHOLD_DATA_STRUC
+ xN = 1
+ xS TEXTEQU @CATSTR(<MANAGEMENT_DEV_TEMP_THRESHOLD_DATA_INFO_>, <%rCMdi>, <_>, <%rCTpi>)
+ xC = @INSTR(xN, %xS, <,>)
+ ltnc = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ utnc = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ ltc = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ utc = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ ltnr = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @SIZESTR(%xS)
+ utnr = @SUBSTR(%xS, xN, (xC-xN+1))
+
+ MANAGEMENT_DEV_THRESHOLD_INFO 36, length, xHandle, ltnc, utnc, ltc, utc, ltnr, utnr
+ TERMINATOR
+ TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 35: MANAGEMENT DEVICE COMPONENT INFORMATION
+;----------------------------------------------------------------------------
+ xHandle = xHandle + 1
+
+ MANAGEMENT_DEVICE_COMPONENT_STRUC{\
+ {35, sizeof(MANAGEMENT_DEVICE_COMPONENT_STRUC), xHandle},
+ 01h,
+ mH,
+ cH,
+ tH\
+ }
+ SCAN_PUT_STR %MKF_MGMT_DEV_COMPONENT_DESCRIPTION
+ TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 27: COOLING DEVICE
+;----------------------------------------------------------------------------
+IF MKF_COOLING_DEVICE_INFO
+ rCo = 1
+ xCc TEXTEQU @CATSTR(<NUMBER_OF_COOLING_DEVICE_ASSOCIATED_TEMP_PROBE_>, <%rCMdi>, <_>, <%rCTpi>)
+
+ REPEAT xCc
+ xHandle = xHandle + 1
+ cH = xHandle
+ length = sizeof COOLING_DEVICE_STRUC
+
+ xN = 1
+ xS TEXTEQU @CATSTR(<COOLING_DEVICE_INFO_>, <%rCMdi>, <_>, <%rCTpi>, <_>, <%rCo>)
+ xC = @INSTR(xN, %xS, <,>)
+ dtS = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ cuG = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ oDc = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ nS = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @SIZESTR(%xS)
+
+ IF xC LT xN
+ COOLING_DEV_INFO 27, length, xHandle, Tphndl, dtS, cuG, oDc, nS, 0
+ TERMINATOR
+ ELSE
+ nD TEXTEQU @SUBSTR(%xS, xN, (xC-xN+1))
+ COOLING_DEV_INFO 27, length, xHandle, Tphndl, dtS, cuG, oDc, nS, 1
+ SCAN_PUT_STR %nD
+ ENDIF
+ TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 36: MANAGEMENT DEVICE THRESHOLD DATA INFORMATION
+;----------------------------------------------------------------------------
+ xHandle = xHandle + 1
+ tH = xHandle
+
+ length = sizeof MANAGEMENT_DEVICE_THRESHOLD_DATA_STRUC
+ xN = 1
+ xS TEXTEQU @CATSTR(<MANAGEMENT_DEV_COOL_THRESHOLD_DATA_INFO_>, <%rCMdi>, <_>, <%rCTpi>, <_>, <%rCo>)
+ xC = @INSTR(xN, %xS, <,>)
+ ltnc = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ utnc = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ ltc = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ utc = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(xN, %xS, <,>)
+ ltnr = @SUBSTR(%xS, xN, (xC-xN))
+ xN = xC+1
+ xC = @SIZESTR(%xS)
+ utnr = @SUBSTR(%xS, xN, (xC-xN+1))
+
+ MANAGEMENT_DEV_THRESHOLD_INFO 36, length, xHandle, ltnc, utnc, ltc, utc, ltnr, utnr
+ TERMINATOR
+ TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 35: MANAGEMENT DEVICE COMPONENT INFORMATION
+;----------------------------------------------------------------------------
+ xHandle = xHandle + 1
+
+ MANAGEMENT_DEVICE_COMPONENT_STRUC{\
+ {35, sizeof(MANAGEMENT_DEVICE_COMPONENT_STRUC), xHandle},
+ 01h, mH, cH, tH}
+
+ SCAN_PUT_STR %MKF_MGMT_DEV_COMPONENT_DESCRIPTION
+ TERMINATOR
+
+ rCo = rCo + 1
+ ENDM ; xCc
+ENDIF ; IF MKF_COOLING_DEVICE_INFO
+ ENDM ; xT
+ENDIF ; IF MKF_TEMPERATURE_PROBE_INFO
+
+;----------------------------------------------------------------------------
+; Structure Type 29: ELECTRICAL PROBE INFORMATION
+;----------------------------------------------------------------------------
+IF MKF_ELECTRICAL_PROBE_INFO
+ rCEdi =1
+
+ xE TEXTEQU @CATSTR(<NUMBER_OF_ELECTRICAL_PROBE_ASSOCIATED_MGMT_DEV_>, <%rCMdi>)
+
+ REPEAT xE
+ xHandle = xHandle + 1
+ cH = xHandle
+ length = sizeof ELECTRICAL_CURRENT_PROBE_STRUC
+
+ xN = 1
+ xS TEXTEQU @CATSTR(<ELECTRICAL_PROBE_INFO_>,<%rCMdi>, <_>,<%rCEdi>)
+ xC = @INSTR(<%xN>,%xS,<,>)
+ eD TEXTEQU @SUBSTR(%xS,<%xN>,(xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>,%xS,<,>)
+ lS TEXTEQU @SUBSTR(%xS,<%xN>,(xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>,%xS,<,>)
+ maxV TEXTEQU @SUBSTR(%xS,<%xN>,(xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>,%xS,<,>)
+ minV TEXTEQU @SUBSTR(%xS,<%xN>,(xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>,%xS,<,>)
+ reS TEXTEQU @SUBSTR(%xS,<%xN>,(xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>,%xS,<,>)
+ tolE TEXTEQU @SUBSTR(%xS,<%xN>,(xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>,%xS,<,>)
+ accY TEXTEQU @SUBSTR(%xS,<%xN>,(xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>,%xS,<,>)
+ oD TEXTEQU @SUBSTR(%xS,<%xN>,(xC-xN))
+ xN = @SIZESTR(%xS)
+ xN = xN-xC
+ xC = xC+1
+ nomV = @SUBSTR(%xS,<%xC>,xN)
+
+ ELECTRICAL_PRO_INFO 29, length, xHandle, eD, lS, maxV, minV, reS, tolE, accY, oD, nomV
+ TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 36: MANAGEMENT DEVICE THRESHOLD DATA INFORMATION
+;----------------------------------------------------------------------------
+ xHandle = xHandle + 1
+ tH = xHandle
+ length = sizeof MANAGEMENT_DEVICE_THRESHOLD_DATA_STRUC
+
+ eltnc TEXTEQU @CATSTR(<LOWER_THRESHOLD_NON_CRITICAL_>,<%rCEdi>)
+ eutnc TEXTEQU @CATSTR(<UPPER_THRESHOLD_CRITICAL_>,<%rCEdi>)
+ eltc TEXTEQU @CATSTR(<LOWER_THRESHOLD_CRITICAL_>,<%rCEdi>)
+ eutc TEXTEQU @CATSTR(<UPPER_THRESHOLD_NON_CRITICAL_>,<%rCEdi>)
+ eltnr TEXTEQU @CATSTR(<LOWER_THRESHOLD_NON_RECOVERABLE_>,<%rCEdi>)
+ eutnr TEXTEQU @CATSTR(<UPPER_THRESHOLD_NON_RECOVERABLE_>,<%rCEdi>)
+
+ MANAGEMENT_DEV_THRESHOLD_INFO 36, length, xHandle, eltnc, eutnc, eltc, eutc, eltnr, eutnr
+ TERMINATOR
+ TERMINATOR
+
+;----------------------------------------------------------------------------
+; Structure Type 35: MANAGEMENT DEVICE COMPONENT INFORMATION
+;----------------------------------------------------------------------------
+ xHandle = xHandle + 1
+
+ MANAGEMENT_DEVICE_COMPONENT_STRUC{\
+ {35, sizeof(MANAGEMENT_DEVICE_COMPONENT_STRUC), xHandle},
+ 01h, mH, cH, tH}
+
+ SCAN_PUT_STR %MKF_MGMT_DEV_COMPONENT_DESCRIPTION
+ TERMINATOR
+
+ rCEdi = rCEdi + 1
+ ENDM ; xE
+ENDIF ; IF MKF_ELECTRICAL_PROBE_INFO
+ rCMdi = rCMdi + 1
+ ENDM ; MKF_NUMBER_OF_MANAGEMENT_DEVICES
+
+ENDIF ; IF MKF_MANAGEMENT_DEVICE_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 39: SYSTEM POWER SUPPLY
+;----------------------------------------------------------------------------
+CreateSystemPowerSupplyInfo macro xHandle:REQ
+
+ LOCAL length, vpH, cdH, tpH, cpH, s1, v1, v2
+ LOCAL sPr, vLS, vMa, vMi, vRe, vTo, vAc, vOD, vNo ; Type 26/28/29
+ LOCAL vTS, vCG, vOD, vNS, sDe ; Type 27
+ LOCAL vPS, vPG, sLo, sDN, sMa, sSN, sAT, sPN, sRL, vMP, vPC ; Type 39
+
+IF MKF_SYSTEM_POWER_SUPPLY_INFO
+ vPS = 1
+ REPEAT MKF_NUMBER_OF_POWER_SUPPLY
+;----------------------------------------------------------------------------
+; Associated Structure Type 26: VOLTAGE PROBE INFORMATION
+;----------------------------------------------------------------------------
+
+ s1 TEXTEQU @CATSTR(<VOLTAGE_PROBE_39_>, <%vPS>)
+ v1 = @SUBSTR(%s1, 1, 1)
+ IF v1 EQ 1
+ xHandle = xHandle + 1
+ vpH = xHandle
+ length = sizeof VOLTAGE_PROBE_STRUC
+ v1 = @INSTR(1, %s1, <,>) + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ sPr TEXTEQU @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vLS = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vMa = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vMi = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vRe = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vTo = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vAc = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vOD = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @SIZESTR(%s1) - v1 + 1
+ vNo = @SUBSTR(%s1, v1, v2)
+
+ VOLTAGE_PRO_INFO 26, length, vpH, sPr, vLS, vMa, vMi, vRe, vTo, vAc, vOD, vNo
+ TERMINATOR
+ ELSE
+ vpH = 0FFFFh
+ ENDIF
+;----------------------------------------------------------------------------
+; Associated Structure Type 28: TEMPERATURE PROBE INFORMATION
+;----------------------------------------------------------------------------
+ s1 TEXTEQU @CATSTR(<COOLING_DEVICE_39_>, <%vPS>)
+ v1 = @SUBSTR(%s1, 1, 1)
+ IF v1 EQ 1
+ s1 TEXTEQU @CATSTR(<TEMPERATURE_PROBE_39_>, <%vPS>)
+ v1 = @SUBSTR(%s1, 1, 1)
+ IF v1 EQ 1
+ xHandle = xHandle + 1
+ tpH = xHandle
+ length = sizeof TEMPERATURE_PROBE_STRUC
+ v1 = @INSTR(1, %s1, <,>) + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ sPr TEXTEQU @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vLS = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vMa = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vMi = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vRe = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vTo = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vAc = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vOD = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @SIZESTR(%s1) - v1 + 1
+ vNo = @SUBSTR(%s1, v1, v2)
+
+ TEMPERATURE_PRO_INFO 28, length, tpH, sPr, vLS, vMa, vMi, vRe, vTo, vAc, vOD, vNo
+ TERMINATOR
+ ELSE
+ tpH = 0FFFFh
+ ENDIF
+ ENDIF
+;----------------------------------------------------------------------------
+; Associated Structure Type 27: COOLING DEVICE INFORMATION
+;----------------------------------------------------------------------------
+ s1 TEXTEQU @CATSTR(<COOLING_DEVICE_39_>, <%vPS>)
+ v1 = @SUBSTR(%s1, 1, 1)
+ IF v1 EQ 1
+ xHandle = xHandle + 1
+ cdH = xHandle
+ length = sizeof COOLING_DEVICE_STRUC
+ v1 = @INSTR(1, %s1, <,>) + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vTS = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vCG = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vOD = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vNS = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @SIZESTR(%s1) - v1 + 1
+ sDe TEXTEQU @SUBSTR(%s1, v1, v2)
+
+ COOLING_DEV_INFO 27, length, cdH, tpH, vTS, vCG, vOD, vNS, 1
+ SCAN_PUT_STR %sDe
+ TERMINATOR
+ ELSE
+ cdH = 0FFFFh
+ ENDIF
+;----------------------------------------------------------------------------
+; Associated Structure Type 29: ELECTRICAL CURRENT PROBE INFORMATION
+;----------------------------------------------------------------------------
+ s1 TEXTEQU @CATSTR(<ELECTRICAL_PROBE_39_>, <%vPS>)
+ v1 = @SUBSTR(%s1, 1, 1)
+ IF v1 EQ 1
+ xHandle = xHandle + 1
+ cpH = xHandle
+ length = sizeof ELECTRICAL_CURRENT_PROBE_STRUC
+ v1 = @INSTR(1, %s1, <,>) + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ sPr TEXTEQU @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vLS = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vMa = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vMi = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vRe = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vTo = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vAc = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @INSTR(v1, %s1, <,>)
+ vOD = @SUBSTR(%s1, v1, (v2 - v1))
+ v1 = v2 + 1
+ v2 = @SIZESTR(%s1) - v1 + 1
+ vNo = @SUBSTR(%s1, v1, v2)
+
+ ELECTRICAL_PRO_INFO 29, length, cpH, sPr, vLS, vMa, vMi, vRe, vTo, vAc, vOD, vNo
+ TERMINATOR
+ ELSE
+ cpH = 0FFFFh
+ ENDIF
+;----------------------------------------------------------------------------
+; Create Type 39
+;----------------------------------------------------------------------------
+ xHandle = xHandle + 1
+ length = sizeof SYSTEM_POWER_SUPPLY_STRUC
+ vPG = @CATSTR(<POWER_SUPPLY_UNIT_GROUP_>, <%vPS>)
+ sLo TEXTEQU @CATSTR(<POWER_SUPPLY_LOCATION_>, <%vPS>)
+ sDN TEXTEQU @CATSTR(<POWER_SUPPLY_DEVICE_NAME_>, <%vPS>)
+ sMa TEXTEQU @CATSTR(<POWER_SUPPLY_MANUFACTURER_>, <%vPS>)
+ sSN TEXTEQU @CATSTR(<POWER_SUPPLY_SERIAL_NUMBER_>, <%vPS>)
+ sAT TEXTEQU @CATSTR(<POWER_SUPPLY_ASSET_TAG_NUMBER_>, <%vPS>)
+ sPN TEXTEQU @CATSTR(<POWER_SUPPLY_MODEL_PART_NUMBER_>, <%vPS>)
+ sRL TEXTEQU @CATSTR(<POWER_SUPPLY_REVISION_LEVEL_>, <%vPS>)
+ vMP = @CATSTR(<POWER_SUPPLY_MAX_POWER_CAPACITY_>, <%vPS>)
+ vPC TEXTEQU @CATSTR(<POWER_SUPPLY_CHARACTERISTICS_>, <%vPS>)
+
+ SYSTEM_POWER_SUPPLY_INFO 39, length, xHandle, vPG, sLo, sDN, sMa, sSN, sAT, sPN, sRL, vMP, vPC, vpH, cdH, cpH
+ TERMINATOR
+ vPS = vPS + 1
+ ENDM ; MKF_NUMBER_OF_POWER_SUPPLY
+ENDIF ; MKF_SYSTEM_POWER_SUPPLY_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 38: IPMI DEVICE INFORMATION
+;----------------------------------------------------------------------------
+CreateIPMIDeviceInfo MACRO xHandle:REQ
+
+ LOCAL iit, isr, isa, nsda, ibal, ibah, bamii, intnum
+
+IF MKF_IPMI_DEVICE_INFO
+ xHandle = xHandle + 1
+
+ iit = MKF_IPMI_INTERFACE_TYPE
+ isr = MKF_IPMI_SPECIFICATION_REVISION
+ isa = MKF_I2C_SLAVE_ADDRESS
+ nsda = MKF_NV_STORAGE_DEVICE_ADDRESS
+ ibal = IPMI_BASE_ADDRESS_LO
+ ibah = IPMI_BASE_ADDRESS_HI
+ bamii = MKF_BASE_ADDR_MOD_INTR_INFO
+ intnum = MKF_INTERRUPT_NUMBER
+
+ IPMI_DEVICE_INFORMATION_STRUC{\
+ {38, sizeof(IPMI_DEVICE_INFORMATION_STRUC), xHandle},
+ iit,
+ isr,
+ isa,
+ nsda,
+ ibal,
+ ibah,
+ bamii,
+ intnum\
+ }
+ TERMINATOR
+ TERMINATOR
+ENDIF ; MKF_IPMI_DEVICE_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 40 : ADDITIONAL INFORMATION
+;----------------------------------------------------------------------------
+CreateAdditionalInformation macro xHandle:REQ
+
+ LOCAL length, rC, eL, rH, rT, rI, rO, uS, sC, sN, rV, xS
+
+ IF (MKF_ADDITIONAL_INFO AND (MKF_ADDITIONAL_INFO_COUNT GT 0))
+ xHandle = xHandle + 1
+ length = sizeof(ADDITIONAL_INFO_STRUC) + (MKF_ADDITIONAL_INFO_COUNT * sizeof(ADDITIONAL_INFO_ENTRY_STRUC))
+
+ ADDITIONAL_INFO_STRUC {\
+ {40, length, xHandle},
+ MKF_ADDITIONAL_INFO_COUNT\
+ }
+
+ rC = 1
+ sC = 1
+ REPEAT MKF_ADDITIONAL_INFO_COUNT
+ eL = sizeof ADDITIONAL_INFO_ENTRY_STRUC
+ rT = @CATSTR (REF_TYPE_, <%rC>)
+ rI = @CATSTR (REF_TYPE_INSTANCE_, <%rC>)
+ rO TEXTEQU @CATSTR (REF_OFFSET_, <%rC>)
+ uS = @CATSTR (USE_STRING_, <%rC>)
+ IF uS EQ 1
+ sN = sC
+ sC = sC + 1
+ ELSE
+ sN = 0
+ ENDIF
+ rV TEXTEQU @CATSTR (VALUE_, <%rC>)
+ ADDITIONAL_INFO_ENTRY_STRUC {\
+ eL,
+ (rT*16)+rI,
+ rO,
+ sN,
+ {rV}\
+ }
+ rC = rC + 1
+ ENDM ; MKF_ADDITIONAL_INFO_COUNT
+
+ rC = 1
+ REPEAT MKF_ADDITIONAL_INFO_COUNT
+ uS = @CATSTR (USE_STRING_, <%rC>)
+ IF uS EQ 1
+ xS TEXTEQU @CATSTR (STRING_, <%rC>)
+ SCAN_PUT_STR %xS
+ ENDIF
+ rC = rC + 1
+ ENDM ; MKF_ADDITIONAL_INFO_COUNT
+ TERMINATOR
+ ENDIF
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 41 : Onboard Devices Extended Information
+;----------------------------------------------------------------------------
+CreateOnboardDevicesExtendedInfo macro xHandle:REQ
+
+ LOCAL length, rC, xN, xS, xC, eD, dT, dI, sD, sG, xB, dF
+
+ length = sizeof(ONBOARD_DEVICE_EXTENDED_STRUC)
+
+ IF (MKF_ONBOARD_DEVICE_EXTENDED_INFO AND (MKF_ONBOARD_DEVICE_EXT_COUNT GT 0))
+ rC = 1
+ REPEAT MKF_ONBOARD_DEVICE_EXT_COUNT
+ xHandle = xHandle + 1
+ xN = 1
+ xS TEXTEQU @CATSTR(<ONBOARD_DEVICE_EXT_>, <%rC>)
+ xC = @INSTR(<%xN>, %xS, <,>)
+ eD TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ dT TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ dI TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = @SIZESTR(%xS)
+ xN = xN-xC
+ xC = xC+1
+ sD TEXTEQU @SUBSTR(%xS, <%xC>, <%xN>)
+
+ xS TEXTEQU @CATSTR(<SEGGRP_BUS_DEVFN_EXT_>, <%rC>)
+ xN = 1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ sG TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xN = xC+1
+ xC = @INSTR(<%xN>, %xS, <,>)
+ xB TEXTEQU @SUBSTR(%xS, <%xN>, (xC-xN))
+ xC = xC+1
+ dF TEXTEQU @SUBSTR(%xS, <%xC>)
+
+ ONBOARD_DEVICE_EXTENDED_STRUC {\
+ {41, length, xHandle},
+ 1,
+ ((eD shl 7) OR dT),
+ dI,sG,xB,
+ dF\
+ }
+ SCAN_PUT_STR %sD
+ TERMINATOR
+ rC = rC + 1
+ ENDM ; MKF_ONBOARD_DEVICE_EXT_COUNT
+ ENDIF
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 240: OEM DEFINED IO STRUCTURE
+;----------------------------------------------------------------------------
+CreateOEMIOMappedGpnvInfo MACRO xHandle:REQ
+
+ IF MKF_OEM_IO_GPNV_STRUC_INFO
+ xHandle = xHandle + 1
+ DescLength = (MAX_IO_GPNV_DATAID*size DATAID_DESCRIPTOR_STRUC)
+ TotalLength = sizeof(OEM_GPNV_STRUC)+DescLength
+ OEM_GPNV_STRUC {\
+ {OEM_IO_GPNV_INFORMATION_TYPE, TotalLength, xHandle},
+ 00h,
+ 00000000h,
+ MAX_IO_GPNV_DATAID\
+ }
+ BYTE DescLength dup(0FFh)
+ TERMINATOR
+ TERMINATOR
+ ENDIF ; MKF_OEM_IO_GPNV_STRUC_INFO
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 241: OEM DEFINED MEMORY STRUCTURE
+;----------------------------------------------------------------------------
+CreateOEMMemoryMappedGpnvInfo MACRO xHandle:REQ
+ IF MKF_OEM_MEMORY_GPNV_STRUC_INFO
+ xHandle = xHandle + 1
+ DescLength = (MAX_MEMORY_GPNV_DATAID*size DATAID_DESCRIPTOR_STRUC)
+ TotalLength = sizeof(OEM_GPNV_STRUC)+DescLength
+ OEM_GPNV_STRUC {\
+ {OEM_MEMORY_GPNV_INFORMATION_TYPE, TotalLength, xHandle},
+ 00h,
+ 00000000h,
+ MAX_MEMORY_GPNV_DATAID\
+ }
+ BYTE DescLength dup(0FFh)
+ TERMINATOR
+ TERMINATOR
+ ENDIF ; MKF_OEM_MEMORY_GPNV_STRUC_INFO
+ EXITM %xHandle
+ENDM
+;----------------------------------------------------------------------------
+; Structure Type 129: INTEL ASF STRUCTURE
+;----------------------------------------------------------------------------
+CreateIntelASFTable MACRO xHandle:REQ
+IFDEF MKF_ASF_SUPPORT
+IF MKF_ASF_SUPPORT
+ xHandle = xHandle + 1
+ INTEL_ASF_STRUC{\
+ {129, sizeof(INTEL_ASF_STRUC), xHandle},
+ 01h,
+ 01h,
+ 02h,
+ 01h\
+ }
+ BYTE 'Intel_ASF',0
+ BYTE 'Intel ASF_001',0
+ TERMINATOR
+ENDIF ; MKF_ASF_SUPPORT
+ENDIF ; MKF_ASF_SUPPORT
+ EXITM %xHandle
+endm
+;----------------------------------------------------------------------------
+; Structure Type 127: END OF TABLE
+;----------------------------------------------------------------------------
+CreateEndOfTable MACRO xHandle:REQ
+ xHandle = xHandle + 1
+ END_OF_TABLE_STRUC{\
+ {127, sizeof(END_OF_TABLE_STRUC), xHandle}\
+ }
+ TERMINATOR
+ TERMINATOR
+ EXITM %xHandle
+ENDM
+
+;----------------------------------------------------------------------------
+ENDIF ; End of Inclusion Guard _smbdata_mac_
+;----------------------------------------------------------------------------
+
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2016, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
diff --git a/Board/EM/SMBIOS/SMBiosStaticData/SMBMACRO.AID b/Board/EM/SMBIOS/SMBiosStaticData/SMBMACRO.AID
new file mode 100644
index 0000000..9858192
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosStaticData/SMBMACRO.AID
@@ -0,0 +1,1228 @@
+ ECHO --Including: SMBMACRO.AID
+
+;----------------------------------------------------------------------------
+; DO NOT CHANGE ANY THING UNLESS OTHERWISE SPECIFIED
+;----------------------------------------------------------------------------
+
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2016, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
+;****************************************************************************
+; $Header: $
+;
+; $Revision: $
+;
+; $Date: $
+;
+;****************************************************************************
+; Revision History
+; ----------------
+; $Log: $
+;
+;****************************************************************************
+
+;----------------------------------------------------------------------------
+; Structure Type 0 : BIOS INFORMATION
+;----------------------------------------------------------------------------
+
+BIOS_CHAR macro
+
+ LOCAL BIOSCHARACTER
+ BIOSCHARACTER = 0
+
+IF MKF_BI_UNKNOWN_CHAR
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 2)
+ENDIF
+
+IF MKF_BI_BIOS_CHAR_NOT_SUPPORTED
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 3)
+ENDIF
+
+IF MKF_INC_ISA
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 4)
+ENDIF
+
+IF MKF_BI_MCA
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 5)
+ENDIF
+
+IF MKF_BI_EISA
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 6)
+ENDIF
+
+IF MKF_INC_PCI
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 7)
+ENDIF
+
+IF MKF_BI_PCMCIA
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 8)
+ENDIF
+
+IF MKF_INC_PnP
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 9)
+ENDIF
+
+IFDEF MKF_APM_SUPPORT
+ IF MKF_APM_SUPPORT
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 10)
+ ENDIF
+ENDIF
+
+IF MKF_BI_BIOS_Flash
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 11)
+ENDIF
+
+IF MKF_BI_BIOS_Shadow
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 12)
+ENDIF
+
+IF MKF_BI_VL_VESA
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 13)
+ENDIF
+
+IF MKF_BI_ESCD
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 14)
+ENDIF
+
+IF MKF_BI_CDROM_BOOT
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 15)
+ENDIF
+
+IF MKF_BI_SELECTABLE_BOOT
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 16)
+ENDIF
+
+IF MKF_BI_BIOS_ROM_SOCKET
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 17)
+ENDIF
+
+IF MKF_BI_PCMCIA_BOOT
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 18)
+ENDIF
+
+IF MKF_BI_EDD
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 19)
+ENDIF
+
+IF MKF_BI_INT13_NEC9800
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 20)
+ENDIF
+
+IF MKF_BI_INT13_TOSHIBA
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 21)
+ENDIF
+
+IF MKF_BI_INT13_5_25_360
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 22)
+ENDIF
+
+IF MKF_BI_INT13_5_25_1_2
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 23)
+ENDIF
+
+IF MKF_BI_INT13_3_5_720
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 24)
+ENDIF
+
+IF MKF_BI_INT13_3_5_2_88
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 25)
+ENDIF
+
+IF MKF_BI_INT5_PRINT_SCRN
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 26)
+ENDIF
+
+IFDEF MKF_KBC_SUPPORT
+IF MKF_KBC_SUPPORT
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 27)
+ENDIF
+ENDIF
+
+IF MKF_BI_INT14_SERIAL_SVC
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 28)
+ENDIF
+
+IF MKF_BI_INT17_PRN_SVC
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 29)
+ENDIF
+
+IF MKF_BI_INT10_CGA_MONO
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 30)
+ENDIF
+
+IF MKF_BI_NEC_PC_98
+ BIOSCHARACTER = BIOSCHARACTER OR (1 shl 31)
+ENDIF
+ EXITM %BIOSCHARACTER
+ENDM
+
+;----------------------------------------------------------------------------
+; Use this Macro to set bits 32:63 of BIOS Characteristics
+
+BIOS_CHAR1 macro
+ LOCAL BIOSCHARACTER1
+ BIOSCHARACTER1 = 0
+
+ BIOSCHARACTER1 = BIOSCHARACTER1 OR (1 shl 0)
+
+;BIT 32 (bit 0 in this section) is used to indicate the this BIOS is capable
+; of updating strings with variable length
+
+ EXITM %BIOSCHARACTER1
+ENDM
+
+;----------------------------------------------------------------------------
+
+EXT_CHAR macro
+
+ LOCAL BIOSEXTCHARACTER
+ BIOSEXTCHARACTER = 0
+
+IFDEF MKF_ACPI_SUPPORT
+ IF MKF_ACPI_SUPPORT
+ BIOSEXTCHARACTER = BIOSEXTCHARACTER OR (1 shl 0)
+ ENDIF
+ENDIF
+
+IFDEF MKF_AMIUSB_SUPPORT
+ IF MKF_AMIUSB_SUPPORT
+ BIOSEXTCHARACTER = BIOSEXTCHARACTER OR (1 shl 1)
+ ENDIF
+ENDIF
+
+IF MKF_BI_AGP_SUPPORT
+ BIOSEXTCHARACTER = BIOSEXTCHARACTER OR (1 shl 2)
+ENDIF
+
+IF MKF_BI_I2O_BOOT_SUP
+ BIOSEXTCHARACTER = BIOSEXTCHARACTER OR (1 shl 3)
+ENDIF
+
+IF MKF_BI_LS120_BOOT_SUP
+ BIOSEXTCHARACTER = BIOSEXTCHARACTER OR (1 shl 4)
+ENDIF
+
+IF MKF_BI_ATAPI_ZIP_SUP
+ BIOSEXTCHARACTER = BIOSEXTCHARACTER OR (1 shl 5)
+ENDIF
+
+IF MKF_BI_IEEE_1394_SUP
+ BIOSEXTCHARACTER = BIOSEXTCHARACTER OR (1 shl 6)
+ENDIF
+
+IF MKF_BI_SMART_BAT_SUP
+ BIOSEXTCHARACTER = BIOSEXTCHARACTER OR (1 shl 7)
+ENDIF
+
+ EXITM %BIOSEXTCHARACTER
+ENDM
+
+;----------------------------------------------------------------------------
+
+EXT_CHAR2 macro
+
+ LOCAL BIOSEXTCHARACTER2
+ BIOSEXTCHARACTER2 = 0 ;Note: Targeted Content Distribution bit
+ ;must be set per Microsoft "SMBIOS
+ ;Support in Windows" document
+
+IF MKF_BBS_SUPPORT
+ BIOSEXTCHARACTER2 = BIOSEXTCHARACTER2 OR (1 shl 0)
+ENDIF
+
+IF MKF_NETBOOT_SUPPORT
+ BIOSEXTCHARACTER2 = BIOSEXTCHARACTER2 OR (1 shl 1)
+ENDIF
+
+IF MKF_BI_ETCD
+ BIOSEXTCHARACTER2 = BIOSEXTCHARACTER2 OR (1 shl 2)
+ENDIF
+
+IF MKF_UEFI_SUPPORT
+ BIOSEXTCHARACTER2 = BIOSEXTCHARACTER2 OR (1 shl 3)
+ENDIF
+
+IF MKF_VIRTUAL_MACHINE
+ BIOSEXTCHARACTER2 = BIOSEXTCHARACTER2 OR (1 shl 4)
+ENDIF
+
+ EXITM %BIOSEXTCHARACTER2
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 1 : SYSTEM INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 2 : BASEBOARD INFORMATION
+;----------------------------------------------------------------------------
+
+BASE_BOARD_FEATURE_FLAGS MACRO
+
+ LOCAL FEATUREFLAGS
+ FEATUREFLAGS = 0
+
+ IF MKF_BB_HOSTING_BOARD
+ FEATUREFLAGS = FEATUREFLAGS OR 01h
+ ENDIF
+
+ IF MKF_BB_REQUIRE_AUX_BOARD
+ FEATUREFLAGS = FEATUREFLAGS OR 02h
+ ENDIF
+
+ IF MKF_BB_REMOVABLE
+ FEATUREFLAGS = FEATUREFLAGS OR 04h
+ ENDIF
+
+ IF MKF_BB_REPLACEABLE
+ FEATUREFLAGS = FEATUREFLAGS OR 08h
+ ENDIF
+
+ IF MKF_BB_HOT_SWAPPABLE
+ FEATUREFLAGS = FEATUREFLAGS OR 10h
+ ENDIF
+
+ EXITM %FEATUREFLAGS
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 3 : SYSTEM ENCLOSURE OR CHASSIS
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 4 : PROCESSOR INFORMATION
+;----------------------------------------------------------------------------
+
+@PROC_VOLT MACRO arglist:VARARG
+
+ LOCAL xV, xC, xM
+ xC = 1
+ xV = 0
+ FOR arg, <arglist>
+ IF xC EQ 1
+ xM = arg
+ ENDIF
+
+ IF xC GT 1
+ IF xM EQ 0
+ xV = xV OR arg
+ ENDIF
+ IF xM GT 0
+ xV = arg OR 80h
+ ENDIF
+ ENDIF
+ xC = xC+1
+
+ ENDM
+ EXITM %xV
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 5 : MEMORY CONTROLLER INFORMATION
+;----------------------------------------------------------------------------
+
+MEM_CTRL_ECC MACRO
+
+ LOCAL MEMCONTROLLERECC
+ MEMCONTROLLERECC = 0
+
+IF MKF_MCE_OTHER
+ MEMCONTROLLERECC = MEMCONTROLLERECC OR (1 shl 0)
+ENDIF
+
+IF MKF_MCE_UNKNOWN
+ MEMCONTROLLERECC = MEMCONTROLLERECC OR (1 shl 1)
+ENDIF
+
+IF MKF_MCE_NONE
+ MEMCONTROLLERECC = MEMCONTROLLERECC OR (1 shl 2)
+ENDIF
+
+IF MKF_MCE_SINGLE_BIT_ECC
+ MEMCONTROLLERECC = MEMCONTROLLERECC OR (1 shl 3)
+ENDIF
+
+IF MKF_MCE_DOUBLE_BIT_ECC
+ MEMCONTROLLERECC = MEMCONTROLLERECC OR (1 shl 4)
+ENDIF
+
+IF MKF_MCE_ERROR_SCRUBBING
+ MEMCONTROLLERECC = MEMCONTROLLERECC OR (1 shl 5)
+ENDIF
+
+ EXITM %MEMCONTROLLERECC
+
+ENDM
+
+;----------------------------------------------------------------------------
+
+MEM_CTRL_SPEED MACRO
+
+ LOCAL MEMCONTSUPSPEED
+ MEMCONTSUPSPEED = 0
+
+IF MKF_SS_OTHER
+ MEMCONTSUPSPEED = MEMCONTSUPSPEED OR (1 shl 0)
+ENDIF
+
+IF MKF_SS_UNKNOWN
+ MEMCONTSUPSPEED = MEMCONTSUPSPEED OR (1 shl 1)
+ENDIF
+
+IF MKF_SS_70ns
+ MEMCONTSUPSPEED = MEMCONTSUPSPEED OR (1 shl 2)
+ENDIF
+
+IF MKF_SS_60ns
+ MEMCONTSUPSPEED = MEMCONTSUPSPEED OR (1 shl 3)
+ENDIF
+
+IF MKF_SS_50ns
+ MEMCONTSUPSPEED = MEMCONTSUPSPEED OR (1 shl 4)
+ENDIF
+
+ EXITM %MEMCONTSUPSPEED
+
+ENDM
+
+;----------------------------------------------------------------------------
+; Following macro is defined for Memory Type
+;----------------------------------------------------------------------------
+
+@MEMORY_TYPE MACRO arglist:VARARG
+
+ LOCAL xMt
+ xMt = 0
+ FOR arg, <arglist>
+ xMt = xMt OR arg
+ ENDM
+ WORD xMt
+ENDM
+
+;----------------------------------------------------------------------------
+
+@MEMORY_INFO MACRO arglist:VARARG
+
+ LOCAL xB, xMs, xIs, xEs, xC
+ xC = 0
+ xB = 0
+ FOR arg, <arglist>
+ xC = xC + 1
+ IF xC EQ 1
+ xB = xB OR (arg shl 4)
+ ENDIF
+ IF xC EQ 2
+ xB = xB OR arg
+ ENDIF
+ IF xC EQ 3
+ xMs = arg
+ ENDIF
+ IF xC EQ 4
+ xIs = MEM_SIZE_IN_MB(arg)
+ ENDIF
+ IF xC EQ 5
+ xEs = MEM_SIZE_IN_MB(arg)
+ ENDIF
+ IF xC EQ 6
+ xIs = xIs OR arg
+ xEs = xEs OR arg
+ ENDIF
+ ENDM
+ BYTE xB
+ BYTE xMs
+ xEs = xEs*256
+ xEs = xEs OR xIs
+ EXITM %xEs
+ENDM
+
+;----------------------------------------------------------------------------
+
+@MEMORY_ERR_STATUS MACRO arglist:VARARG
+ LOCAL xErr
+ FOR arg, <arglist>
+ xErr = 0
+ ENDM
+ BYTE xErr
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 6 : MEMORY MODULE INFORMATION STRUCTURE
+;----------------------------------------------------------------------------
+
+MEM_MOD_VOLTAGE MACRO
+
+ LOCAL memVolt
+ memVolt = 0
+
+IF MKF_MM_VOLTAGE_5V
+ memVolt = memVolt OR 1
+ENDIF
+
+IF MKF_MM_VOLTAGE_33V
+ memVolt = memVolt OR (1 shl 1)
+ENDIF
+
+IF MKF_MM_VOLTAGE_29V
+ memVolt = memVolt OR (1 shl 2)
+ENDIF
+
+ EXITM %memVolt
+ENDM
+
+;----------------------------------------------------------------------------
+
+SUPPORTED_MEM_TYPE MACRO
+
+ LOCAL MEMMODSUPTYPE
+ MEMMODSUPTYPE = 0
+
+IF MKF_TYPE_OTHER
+ MEMMODSUPTYPE = MEMMODSUPTYPE OR (1 shl 0)
+ENDIF
+
+IF MKF_TYPE_UNKNOWN
+ MEMMODSUPTYPE = MEMMODSUPTYPE OR (1 shl 1)
+ENDIF
+
+IF MKF_TYPE_STANDARD
+ MEMMODSUPTYPE = MEMMODSUPTYPE OR (1 shl 2)
+ENDIF
+
+IF MKF_TYPE_FAST_PAGE_MODE
+ MEMMODSUPTYPE = MEMMODSUPTYPE OR (1 shl 3)
+ENDIF
+
+IF MKF_TYPE_EDO
+ MEMMODSUPTYPE = MEMMODSUPTYPE OR (1 shl 4)
+ENDIF
+
+IF MKF_TYPE_PARITY
+ MEMMODSUPTYPE = MEMMODSUPTYPE OR (1 shl 5)
+ENDIF
+
+IF MKF_TYPE_ECC
+ MEMMODSUPTYPE = MEMMODSUPTYPE OR (1 shl 6)
+ENDIF
+
+IF MKF_TYPE_SIMM
+ MEMMODSUPTYPE = MEMMODSUPTYPE OR (1 shl 7)
+ENDIF
+
+IF MKF_TYPE_DIMM
+ MEMMODSUPTYPE = MEMMODSUPTYPE OR (1 shl 8)
+ENDIF
+
+IF MKF_TYPE_BURST_EDO
+ MEMMODSUPTYPE = MEMMODSUPTYPE OR (1 shl 9)
+ENDIF
+
+IF MKF_TYPE_SDRAM
+ MEMMODSUPTYPE = MEMMODSUPTYPE OR (1 shl 10)
+ENDIF
+
+ EXITM %MEMMODSUPTYPE
+
+ENDM
+
+;----------------------------------------------------------------------------
+; Following Macro calculates the Memory size in unit of MegaByte,
+; Porting engineer has to give value in SMB.EQU files only, and this
+; macro will calculate the correct size in MB
+;----------------------------------------------------------------------------
+; aa = xSize/(1024*1024)
+
+MEM_SIZE_IN_MB macro xSize:REQ
+
+ LOCAL aa, bb
+ bb = 0
+ aa = xSize
+ WHILE aa GT 0
+ aa = aa SHR 1
+ bb = bb + 1
+ ENDM
+ IF bb GT 0
+ bb = bb - 1
+ ENDIF
+ EXITM %bb
+ENDM
+
+;----------------------------------------------------------------------------
+; Following macro will calculate the BIOS size in unit of KB Porting
+; Engineer has to give value in SMB.EQU, and this macro will
+; calculate the BIOS size in KB
+;----------------------------------------------------------------------------
+
+BIOS_SIZE_IN_KB MACRO xSize:REQ
+ LOCAL aa
+
+ aa = xSize
+ IF aa LE (256*64*1024)
+ aa = (aa/(64*1024)) - 1
+ else
+ aa = 255
+ ENDIF
+ EXITM %aa
+ENDM
+
+;----------------------------------------------------------------------------
+; Following String defines the Memory module Information Structure
+;----------------------------------------------------------------------------
+
+
+;----------------------------------------------------------------------------
+; Structure Type 7 : CACHE INFORMATION STRUCTURE
+;----------------------------------------------------------------------------
+
+CACHE_SIZE MACRO xSize:REQ
+ LOCAL cSize
+ IF xSize GT (64*1024)
+ cSize = (xSize/(64*1024)) OR 8000h
+ ELSE
+ cSize = xSize/(1024)
+ ENDIF
+ EXITM %cSize
+ENDM
+
+;----------------------------------------------------------------------------
+; Following macro defines the Cache Speed
+;----------------------------------------------------------------------------
+
+CACHE_SPEED MACRO xSize:REQ
+ LOCAL cSize
+ cSize = xSize
+ EXITM %cSize
+ENDM
+
+;----------------------------------------------------------------------------
+; Following Macro is defined for Cache Information
+;----------------------------------------------------------------------------
+
+@CACHE_INFO MACRO arglist:VARARG
+
+ LOCAL xCs, xIs, xTyp, xC
+ xC = 0
+ xTyp = 0
+ FOR arg, <arglist>
+ xC = xC+1
+ IF xC EQ 1
+ xCs = CACHE_SIZE(arg)
+ ENDIF
+ IF xC EQ 2
+ xIs = CACHE_SIZE(arg)
+ ENDIF
+ IF xC GT 2
+ xTyp = xTyp OR arg
+ ENDIF
+ ENDM
+ WORD xCs
+ WORD xIs
+ WORD xTyp
+ WORD xTyp
+ENDM
+
+;----------------------------------------------------------------------------
+; Following Macro is defined for Cache Operational Mode
+;----------------------------------------------------------------------------
+
+@CACHE_CFG MACRO arglist:VARARG
+
+ LOCAL xCfg
+ xCfg = 0
+ FOR arg, <arglist>
+ xCfg = xCfg OR arg
+ ENDM
+ WORD xCfg
+ENDM
+
+;----------------------------------------------------------------------------
+
+@EXT_CACHE_CFG MACRO arglist:VARARG
+
+ LOCAL xCfg
+ xCfg = 0
+ FOR arg, <arglist>
+ xCfg = xCfg OR arg OR CCL_EXTERNAL
+ ENDM
+ WORD xCfg
+ENDM
+
+;----------------------------------------------------------------------------
+; Following macro is defined for Cache Characteristics
+;----------------------------------------------------------------------------
+
+@CACHE_CHAR MACRO arglist:VARARG
+
+ LOCAL xCspeed, xErrCorrType, xSysCacheType, xAssoc, xC
+ xC = 0
+ FOR arg, <arglist>
+ xC = xC+1
+ IF xC EQ 1
+ xCspeed = CACHE_SPEED(arg)
+ ENDIF
+ IF xC EQ 2
+ xErrCorrType = arg
+ ENDIF
+ IF xC EQ 3
+ xSysCacheType = arg
+ ENDIF
+ IF xC EQ 4
+ xAssoc = arg
+ ENDIF
+ ENDM
+ BYTE xCspeed
+ BYTE xErrCorrType
+ BYTE xSysCacheType
+ BYTE xAssoc
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 8 : PORT CONNECTOR INFORMATION STRUCTURE
+;----------------------------------------------------------------------------
+
+DEFINE_EXT_CONNECTOR macro IntRefStr:REQ, IntConTyp:REQ, ExtRefStr:REQ, ExtConTyp:REQ, PortTyp:REQ
+
+ PORT_DEFINE_STRUC {\
+ 1,
+ IntConTyp,
+ 2,
+ ExtConTyp,
+ PortTyp\
+ }
+ PUT_STR IntRefStr
+ PUT_STR ExtRefStr
+ENDM
+
+;----------------------------------------------------------------------------
+
+DEFINE_INT_CONNECTOR macro IntRefStr:REQ, IntConTyp:REQ, PortTyp:REQ
+
+ PORT_DEFINE_STRUC {\
+ 1,
+ IntConTyp,
+ 0,
+ 0,
+ PortTyp\
+ }
+ PUT_STR IntRefStr
+
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 9 : SYSTEM SLOTS INFORMATION STRUCTURE
+;----------------------------------------------------------------------------
+
+SYSTEM_SLOT_CHAR1 MACRO
+
+ LOCAL SLOTCHAR1TYPE
+
+ SLOTCHAR1TYPE = 0
+
+
+IF SLC_CHAR_UNKNOWN
+ SLOTCHAR1TYPE = SLOTCHAR1TYPE OR (1 shl 0)
+ENDIF
+
+IF SLC_CHAR_5VOLT
+ SLOTCHAR1TYPE = SLOTCHAR1TYPE OR (1 shl 1)
+ENDIF
+
+IF SLC_CHAR_3_POINT_3VOLT
+ SLOTCHAR1TYPE = SLOTCHAR1TYPE OR (1 shl 2)
+ENDIF
+
+IF SLC_CHAR_SHARE_SLOT
+ SLOTCHAR1TYPE = SLOTCHAR1TYPE OR (1 shl 3)
+ENDIF
+
+IF SLC_CHAR_PCCARD16
+ SLOTCHAR1TYPE = SLOTCHAR1TYPE OR (1 shl 4)
+ENDIF
+
+IF SLC_CHAR_CARDBUS
+ SLOTCHAR1TYPE = SLOTCHAR1TYPE OR (1 shl 5)
+ENDIF
+
+IF SLC_CHAR_ZOOM_VIDEO
+ SLOTCHAR1TYPE = SLOTCHAR1TYPE OR (1 shl 6)
+ENDIF
+
+IF SLC_CHAR_MODEM_RING_RESUME
+ SLOTCHAR1TYPE = SLOTCHAR1TYPE OR (1 SHL 7)
+ENDIF
+
+ EXITM %SLOTCHAR1TYPE
+
+ENDM
+
+;----------------------------------------------------------------------------
+
+SYSTEM_SLOT_CHAR2 MACRO
+
+ LOCAL SLOTCHAR2TYPE
+ SLOTCHARTYPE2 = 1
+
+ IF SLOT_CHAR2_PME
+ SLOTCHAR2TYPE = SLTCHAR2TYPE OR (1 shl 0)
+ ENDIF
+
+ EXITM %SLOTCHAR2TYPE
+ENDM
+
+;----------------------------------------------------------------------------
+
+SYS_SLOT_CHAR MACRO arglist:VARARG
+
+ LOCAL xRet
+ xRet = 0
+ ;xRet = 1
+ FOR arg, <arglist>
+ xRet = xRet OR arg
+ ENDM
+
+ EXITM %xRet
+ENDM
+
+;----------------------------------------------------------------------------
+
+SYS_SLOT_INFO MACRO type, len, hndl, str, stype, busw, usage, slen, id, schar, seggrp, busn, devfn
+
+ SYSTEM_SLOT_INFO_STRUC {\
+ {type, len, hndl},
+ 1,
+ stype,
+ busw,
+ usage,
+ slen,
+ id,
+ LOW SYS_SLOT_CHAR(%schar),
+ HIGH SYS_SLOT_CHAR(%schar),
+ seggrp, busn, devfn\
+ }
+ PUT_STR %str
+
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 10 : ON-BOARD DEVICES INFORMATION STRUCTURE
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 11 : OEM STRINGS INFORMATION STRUCTURE
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 12 : SYSTEM CONFIGURATION INFORMATION STRUCTURE
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 13 : BIOS LANGUAGE INFORMATION STRUCTURE
+;----------------------------------------------------------------------------
+
+BIOS_LANGUAGE_FLAG MACRO
+ LOCAL BIOSLANGFLAG
+ BIOSLANGFLAG= 0
+ BIOSLANGFLAG= BIOSLANGFLAG OR (ABBRIVIATED_FORMAT shl 1)
+
+ EXITM %BIOSLANGFLAG
+
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 14: GROUP ASSOCIATION INFORMATION
+;----------------------------------------------------------------------------
+
+SUB_GROUP_ASSOCIATION MACRO xHandle, xNum, xTyp, xSh, xAttrib
+
+ LOCAL length, xIh, hndl
+ length = (3*xNum)+5
+ xIh = xSh
+ hndl = xHandle
+ DMIHDR_STRUC {14h, length, hndl}
+ BYTE 1
+ REPEAT xNum
+ BYTE xTyp
+ WORD xIh
+ xIh = xIh+1
+ ENDM
+ SCAN_PUT_STR %xAttrib
+ TERMINATOR
+ hndl = hndl+1
+ EXITM %hndl
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 15: EVENT LOG INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 16: PHYSICAL MEMORY ARRAY INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 17: MEMORY DEVICE INFORMATION
+;----------------------------------------------------------------------------
+
+MEM_DEVICE_TYPE_DETAIL macro
+
+ LOCAL DEVICETYPEDETAIL, i
+ i = 55
+ DEVICETYPEDETAIL = 0
+
+IF MKF_MDT_OTHER
+ DEVICETYPEDETAIL = DEVICETYPEDETAIL OR (1 shl 1)
+ENDIF
+
+IF MKF_MDT_UNKNOWN
+ DEVICETYPEDETAIL = DEVICETYPEDETAIL OR (1 shl 2)
+ENDIF
+
+IF MKF_MDT_FASTPAGED
+ DEVICETYPEDETAIL = DEVICETYPEDETAIL OR (1 shl 3)
+ENDIF
+
+IF MKF_MDT_STATIC_COLUMN
+ DEVICETYPEDETAIL = DEVICETYPEDETAIL OR (1 shl 4)
+ENDIF
+
+IF MKF_MDT_PSEUDO_STATIC
+ DEVICETYPEDETAIL = DEVICETYPEDETAIL OR (1 shl 5)
+ENDIF
+
+IF MKF_MDT_RAMBUS
+ DEVICETYPEDETAIL = DEVICETYPEDETAIL OR (1 shl 6)
+ENDIF
+
+IF MKF_MDT_SYNCHRONOUS
+ DEVICETYPEDETAIL = DEVICETYPEDETAIL OR (1 shl 7)
+ENDIF
+
+IF MKF_MDT_CMOS
+ DEVICETYPEDETAIL = DEVICETYPEDETAIL OR (1 shl 8)
+ENDIF
+
+IF MKF_MDT_EDO
+ DEVICETYPEDETAIL = DEVICETYPEDETAIL OR (1 shl 9)
+ENDIF
+
+IF MKF_MDT_WINDOWDRAM
+ DEVICETYPEDETAIL = DEVICETYPEDETAIL OR (1 shl 10)
+ENDIF
+
+IF MKF_MDT_CACHEDRAM
+ DEVICETYPEDETAIL = DEVICETYPEDETAIL OR (1 shl 11)
+ENDIF
+
+IF MKF_MDT_NONVOLATILE
+ DEVICETYPEDETAIL = DEVICETYPEDETAIL OR (1 shl 12)
+ENDIF
+
+ EXITM %DEVICETYPEDETAIL
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 18: MEMORY ERROR INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 19: MEMORY ARRAY MAPPED ADDRESS INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 20: MEMORY DEVICE MAPPED ADDRESS INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 21: BUILT-IN POINTING DEVICE INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 22: PORTABLE BATTERY INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 23: SYSTEM RESET INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 24: HARDWARE SECURITY INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 25: SYSTEM POWER CONTROLS INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 26: VOLTAGE PROBE INFORMATION
+;----------------------------------------------------------------------------
+
+VOLTAGE_PRO_INFO MACRO type, leng,hndl, str,LocationStatus, MaximumValue, MinimumValue, Resolution, Tolerance, Accuracy, OemDefined, NominalValue
+
+ VOLTAGE_PROBE_STRUC {\
+ {type, leng, hndl},
+ 1,
+ LocationStatus,
+ MaximumValue,
+ MinimumValue,
+ Resolution,
+ Tolerance,
+ Accuracy,
+ OemDefined,
+ NominalValue\
+ }
+ PUT_STR %str
+
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 27: COOLING DEVICE INFORMATION
+;----------------------------------------------------------------------------
+
+COOLING_DEV_INFO MACRO type, leng,hndl,Tphndl, DeviceTypeandStatus, CoolingUnitGroup, OemDefined, NominalSpeed, Description
+
+ COOLING_DEVICE_STRUC {\
+ {type, leng, hndl},
+ Tphndl,
+ DeviceTypeandStatus,
+ CoolingUnitGroup,
+ OemDefined,
+ NominalSpeed,
+ Description\
+ }
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 28: TEMPERATURE PROBE INFORMATION
+;----------------------------------------------------------------------------
+
+TEMPERATURE_PRO_INFO MACRO type,leng,hndl,str,LS,MaxV,MinV,Rs,Tl,Acr,OD,NV
+
+ TEMPERATURE_PROBE_STRUC {\
+ {type, leng, hndl},
+ 01h,
+ LS,
+ MaxV,
+ MinV,
+ Rs,
+ Tl,
+ Acr,
+ OD,
+ NV\
+ }
+ PUT_STR %str
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 29: ELECTRICAL PROBE INFORMATION
+;----------------------------------------------------------------------------
+
+ELECTRICAL_PRO_INFO MACRO type, leng,hndl, str,LocationStatus, MaximumValue, MinimumValue, Resolution, Tolerance, Accuracy, OemDefined, NominalValue
+
+ ELECTRICAL_CURRENT_PROBE_STRUC {\
+ {type, leng, hndl},
+ 1,
+ LocationStatus,
+ MaximumValue,
+ MinimumValue,
+ Resolution,
+ Tolerance,
+ Accuracy,
+ OemDefined,
+ NominalValue\
+ }
+
+ PUT_STR %str
+
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 30: OUT-OF-BAND REMOTE ACCESS INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 31: BOOT INTEGRITY SERVICES ENTRY POINT INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 32: SYSTEM BOOT INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 33: 64-BIT MEMORY ERROR INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 34: MANAGEMENT DEVICE INFORMATION
+;----------------------------------------------------------------------------
+
+MANAGEMENT_DEV_INFO MACRO type,leng,hndl,str,mtype,ma,mat
+
+ MANAGEMENT_DEVICE_STRUC {\
+ {type, leng, hndl},
+ 01h,
+ mtype,
+ ma,
+ mat\
+ }
+ PUT_STR %str
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 35: MANAGEMENT DEVICE COMPONENT INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 36: MANAGEMENT DEVICE THRESHOLD DATA INFORMATION
+;----------------------------------------------------------------------------
+
+MANAGEMENT_DEV_THRESHOLD_INFO MACRO type,leng,hndl,lthnc,uthnc,lthc,uthc,lthnr,uthnr
+
+ MANAGEMENT_DEVICE_THRESHOLD_DATA_STRUC {\
+ {type,leng,hndl},
+ lthnc,
+ uthnc,
+ lthc,
+ uthc,
+ lthnr,
+ uthnr\
+ }
+ENDM
+
+;----------------------------------------------------------------------------
+; Structure Type 37: MEMORY CHANNEL INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 38 : IPMI DEVICE INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 39: SYSTEM POWER SUPPLY
+;----------------------------------------------------------------------------
+
+SYSTEM_POWER_SUPPLY_INFO MACRO type,leng,hndl,pug,str1,str2,str3,str4,str5,str6,str7,mpc,psc,ivph,cdh,icph
+
+ SYSTEM_POWER_SUPPLY_STRUC {\
+ {type,leng,hndl},
+ pug,
+ 01h,
+ 02h,
+ 03h,
+ 04h,
+ 05h,
+ 06h,
+ 07h,
+ mpc,
+ psc,
+ ivph,
+ cdh,
+ icph\
+ }
+ PUT_STR %str1
+ PUT_STR %str2
+ PUT_STR %str3
+ PUT_STR %str4
+ PUT_STR %str5
+ PUT_STR %str6
+ PUT_STR %str7
+ENDM
+
+;----------------------------------------------------------------------------
+; Following Macros defines Macros used in General
+;----------------------------------------------------------------------------
+
+TERMINATOR MACRO
+ db 0
+ENDM
+
+;----------------------------------------------------------------------------
+
+PUT_STR MACRO str
+ BYTE "&str",0
+ENDM
+
+;----------------------------------------------------------------------------
+
+@GET_VAL MACRO xVal
+ LOCAL xV
+ xV = xVal
+ EXITM %xV
+ENDM
+
+;----------------------------------------------------------------------------
+; Following Macro is defined for Scanning the string and remove
+; the null character and tabulation in a string
+;----------------------------------------------------------------------------
+
+SCAN_STR MACRO str
+
+ LOCAL xS, xOs, xTs
+ LOCAL xL, xT, xN, xW, xSsl
+
+ xOs TEXTEQU <str>
+ xS TEXTEQU <>
+ xL = @SIZESTR (%xOs)
+ xN = 1
+ xW = 0
+
+ WHILE xW EQ 0
+ xT = @INSTR (<%xN>, %xOs, < >)
+ IF xT EQ 0
+ xSsl = xL - xN + 1
+ xTs TEXTEQU @SUBSTR (%xOs, <%xN>, <%xSsl>)
+ xS TEXTEQU @CATSTR (%xS, %xTs)
+
+ xW = 1
+ ELSE
+ xS TEXTEQU @CATSTR (%xS, < >)
+ xN = xT + 1
+ ENDIF
+ ENDM
+ EXITM <xS>
+ENDM
+
+;----------------------------------------------------------------------------
+; This macro is defined for scaning and putting string
+;----------------------------------------------------------------------------
+
+SCAN_PUT_STR MACRO str
+
+ LOCAL xS
+ xS TEXTEQU <str>
+ xS TEXTEQU SCAN_STR(%xS)
+ PUT_STR %xS
+ENDM
+
+;----------------------------------------------------------------------------
+
+SCAN_PUT_STR1 MACRO str
+
+ LOCAL xS
+ xS TEXTEQU <str>
+ xS TEXTEQU (%xS)
+ PUT_STR %xS
+ENDM
+
+;----------------------------------------------------------------------------
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2016, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
diff --git a/Board/EM/SMBIOS/SMBiosStaticData/SMBSTRUC.DEF b/Board/EM/SMBIOS/SMBiosStaticData/SMBSTRUC.DEF
new file mode 100644
index 0000000..e03d21c
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosStaticData/SMBSTRUC.DEF
@@ -0,0 +1,793 @@
+ ECHO --Including: SMBSTRUC.DEF
+
+;----------------------------------------------------------------------------
+; Do not change any structure defination unless otherwise specified
+;----------------------------------------------------------------------------
+
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2013, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
+
+;****************************************************************************
+; $Header: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/SMBSTRUC.DEF 8 6/03/13 6:24p Davidd $
+;
+; $Revision: 8 $
+;
+; $Date: 6/03/13 6:24p $
+;****************************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/SMBSTRUC.DEF $
+;
+; 8 6/03/13 6:24p Davidd
+; [TAG] EIP125665
+; [Category] New Feature
+; [Description] Request to Support multiple instances of SMBIOS Type 3
+; structure (merge EIP106206 into Aptio 4)
+; [Files] Smbdata.mac
+; SmbiosStaticData.sdl
+; Smbstruc.def
+; Smbios.c
+; SmbiosDMIEditFunc.c
+; Smbios.h
+;
+; 7 5/29/13 12:49p Davidd
+; [TAG] EIP124735
+; [Category] Spec Update
+; [Severity] Normal
+; [Description] SMBIOS 2.8.0 specification support for Aptio 4
+; [Files] Smb.equ
+; Smbdata.mac
+; Smbdesc.def
+; Smbstruc.def
+; Smbios.c
+; Smbios.h
+; SmbiosDynamicData.h
+;
+; 6 10/08/10 8:16p Davidd
+; [TAG] EIP43278
+;
+; [Category] Function Request
+;
+; [Severity] Normal
+;
+; [Description] SMBIOS 2.7 requirement
+;
+; [Files] Include\Protocol\Smbios.h
+; Include\Protocol\SmbiosDynamicData.h
+; Board\EM\SMBIOS\SMBiosStaticData\SmbiosStaticData.sdl
+; Board\EM\SMBIOS\SMBiosStaticData\SMBDATA.MAC
+; Board\EM\SMBIOS\SMBiosStaticData\SMBSTRUC.DEF
+; Board\EM\SMBIOS\SMBiosStaticData\SMBMACRO.AID
+; Board\EM\SMBIOS\SMBiosStaticData\Smbdesc.def
+; Board\EM\SMBIOS\SMBiosStaticData\SMB.EQU
+;
+; 5 6/02/09 4:44p Davidd
+; Updated AMI headers (EIP 22180)
+;
+; 4 10/13/08 11:19a Davidd
+; Changes made to support SMBIOS specification v2.5 and v2.6
+;
+; 3 3/29/07 5:09p Davidd
+; Changed the year in the AMI banner.
+;
+; 2 12/15/06 5:31p Davidd
+; Code cleanup and reformatted to coding standard.
+;
+; 1 4/29/05 2:15p Davidd
+; Initial checkin.
+;
+;****************************************************************************
+
+;----------------------------------------------------------------------------
+; This file defines all SMBIOS Version 2.4 specification Data Stuructures
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+;Structure Header Format
+
+DMIHDR_STRUC STRUCT
+ bType BYTE ?
+ bLength BYTE ?
+ wHandle WORD ?
+DMIHDR_STRUC ENDS
+;----------------------------------------------------------------------------
+BIOSINFO_STRUC STRUCT ; 0
+ DMIHDR_STRUC {}
+ bVendor BYTE ?
+ bVerStrNum BYTE ?
+ wBiosStrtAddr WORD ?
+ bDate BYTE ?
+ bBiosSize BYTE ?
+ dBiosChar DWORD ?
+ dBiosChar1 DWORD ?
+ bExtByte BYTE ?
+ bExtByte2 BYTE ?
+ bBiosMajor BYTE ?
+ bBiosMinor BYTE ?
+ bEmbCtrlMajor BYTE ?
+ bEmbCtrlMinor BYTE ?
+BIOSINFO_STRUC ENDS
+;----------------------------------------------------------------------------
+SYSINFO_STRUC STRUCT ; 1
+ DMIHDR_STRUC {}
+ bManufacturer BYTE ?
+ bProductName BYTE ?
+ bVersion BYTE ?
+ bSrNum BYTE ?
+ bUUID BYTE 16 dup (?)
+ bWakeType BYTE ?
+ bSkuNumber BYTE ?
+ bFamily BYTE ?
+SYSINFO_STRUC ENDS
+;----------------------------------------------------------------------------
+BASEBOARD_INFO_STRUC STRUCT ; 2
+ DMIHDR_STRUC {,,}
+ bManufacturer BYTE ?
+ bProduct BYTE ?
+ bVersion BYTE ?
+ bSrNum BYTE ?
+ bAssetTag BYTE ?
+ bFeatureFlags BYTE ?
+ bLocInChassis BYTE ?
+ wChassisHandle WORD ?
+ bBoardType BYTE ?
+ bNoOfObjectHndl BYTE ?
+BASEBOARD_INFO_STRUC ENDS
+
+BASEBOARD_INFO_SUB_STRUC STRUCT
+ wObjectHandle BYTE ?
+BASEBOARD_INFO_SUB_STRUC ENDS
+;----------------------------------------------------------------------------
+SYSENC_STRUC STRUCT ; 3
+ DMIHDR_STRUC {,,}
+ bManufacturer BYTE ?
+ bSYSENC_Type BYTE ?
+ bVersion BYTE ?
+ bSrNum BYTE ?
+ bAssTagNum BYTE ?
+ bBootState BYTE ?
+ bPwrState BYTE ?
+ bThermalState BYTE ?
+ bSecurityState BYTE ?
+ doemdefined DWORD ?
+ bHeight BYTE ?
+ bNoPwrCords BYTE ?
+ bNoContElements BYTE ?
+ bContElementLen BYTE ?
+ bSKU BYTE ?
+SYSENC_STRUC ENDS
+
+SYSENC_STRUC_1 STRUCT ; 3
+ DMIHDR_STRUC {,,}
+ bManufacturer BYTE ?
+ bSYSENC_Type BYTE ?
+ bVersion BYTE ?
+ bSrNum BYTE ?
+ bAssTagNum BYTE ?
+ bBootState BYTE ?
+ bPwrState BYTE ?
+ bThermalState BYTE ?
+ bSecurityState BYTE ?
+ doemdefined DWORD ?
+ bHeight BYTE ?
+ bNoPwrCords BYTE ?
+ bNoContElements BYTE ?
+ bContElementLen BYTE ?
+ bContElement BYTE (MKF_ELEMENT_COUNT_1 * MKF_ELEMENT_LEN_1) dup (?)
+ bSKU BYTE ?
+SYSENC_STRUC_1 ENDS
+
+SYSENC_STRUC_2 STRUCT ; 3
+ DMIHDR_STRUC {,,}
+ bManufacturer BYTE ?
+ bSYSENC_Type BYTE ?
+ bVersion BYTE ?
+ bSrNum BYTE ?
+ bAssTagNum BYTE ?
+ bBootState BYTE ?
+ bPwrState BYTE ?
+ bThermalState BYTE ?
+ bSecurityState BYTE ?
+ doemdefined DWORD ?
+ bHeight BYTE ?
+ bNoPwrCords BYTE ?
+ bNoContElements BYTE ?
+ bContElementLen BYTE ?
+ bContElement BYTE (MKF_ELEMENT_COUNT_2 * MKF_ELEMENT_LEN_2) dup (?)
+ bSKU BYTE ?
+SYSENC_STRUC_2 ENDS
+
+SYSENC_STRUC_3 STRUCT ; 3
+ DMIHDR_STRUC {,,}
+ bManufacturer BYTE ?
+ bSYSENC_Type BYTE ?
+ bVersion BYTE ?
+ bSrNum BYTE ?
+ bAssTagNum BYTE ?
+ bBootState BYTE ?
+ bPwrState BYTE ?
+ bThermalState BYTE ?
+ bSecurityState BYTE ?
+ doemdefined DWORD ?
+ bHeight BYTE ?
+ bNoPwrCords BYTE ?
+ bNoContElements BYTE ?
+ bContElementLen BYTE ?
+ bContElement BYTE (MKF_ELEMENT_COUNT_3 * MKF_ELEMENT_LEN_3) dup (?)
+ bSKU BYTE ?
+SYSENC_STRUC_3 ENDS
+
+SYSENC_STRUC_4 STRUCT ; 3
+ DMIHDR_STRUC {,,}
+ bManufacturer BYTE ?
+ bSYSENC_Type BYTE ?
+ bVersion BYTE ?
+ bSrNum BYTE ?
+ bAssTagNum BYTE ?
+ bBootState BYTE ?
+ bPwrState BYTE ?
+ bThermalState BYTE ?
+ bSecurityState BYTE ?
+ doemdefined DWORD ?
+ bHeight BYTE ?
+ bNoPwrCords BYTE ?
+ bNoContElements BYTE ?
+ bContElementLen BYTE ?
+ bContElement BYTE (MKF_ELEMENT_COUNT_4 * MKF_ELEMENT_LEN_4) dup (?)
+ bSKU BYTE ?
+SYSENC_STRUC_4 ENDS
+
+SYSENC_STRUC_5 STRUCT ; 3
+ DMIHDR_STRUC {,,}
+ bManufacturer BYTE ?
+ bSYSENC_Type BYTE ?
+ bVersion BYTE ?
+ bSrNum BYTE ?
+ bAssTagNum BYTE ?
+ bBootState BYTE ?
+ bPwrState BYTE ?
+ bThermalState BYTE ?
+ bSecurityState BYTE ?
+ doemdefined DWORD ?
+ bHeight BYTE ?
+ bNoPwrCords BYTE ?
+ bNoContElements BYTE ?
+ bContElementLen BYTE ?
+ bContElement BYTE (MKF_ELEMENT_COUNT_5 * MKF_ELEMENT_LEN_5) dup (?)
+ bSKU BYTE ?
+SYSENC_STRUC_5 ENDS
+;----------------------------------------------------------------------------
+PROC_STRUC STRUCT ; 4
+ DMIHDR_STRUC {,,}
+ bSocketDesignation BYTE ?
+ bProcType BYTE ?
+ bProcFamily BYTE ?
+ bProcManufacturer BYTE ?
+ qProcID QWORD ?
+ bProcVersion BYTE ?
+ bVoltage BYTE ?
+ wExternalClock WORD ?
+ wMaxSpeed WORD ?
+ wCurrentSpeed WORD ?
+ bProcStatus BYTE ?
+ bProcUpgrade BYTE ?
+ wL1Cache WORD ?
+ wL2Cache WORD ?
+ wL3Cache WORD ?
+ bSerialNo BYTE ?
+ bAssetTag BYTE ?
+ bPartNo BYTE ?
+ bCoreCount BYTE ?
+ bCoreEnabled BYTE ?
+ bThreadCount BYTE ?
+ wProcessorChar WORD ?
+ wProcFamily2 WORD ?
+PROC_STRUC ENDS
+;----------------------------------------------------------------------------
+MEMCTRL_STRUC STRUCT ; 5
+ DMIHDR_STRUC {,,}
+ bErrDetect BYTE ?
+ bEcc BYTE ?
+ bSupInterleave BYTE ?
+ bCurrentInterleave BYTE ?
+ bMaxMemSize BYTE ?
+ wSupSpeeds WORD ?
+ wSupMemTypes WORD ?
+ bMemModVolt BYTE ?
+ bSlotNum BYTE ?
+MEMCTRL_STRUC ENDS
+;----------------------------------------------------------------------------
+MEMMOD_INFO_STRUC STRUCT ; 6
+ DMIHDR_STRUC {,,}
+ bSocDes BYTE ?
+ bBankCon BYTE ?
+ bCurrentSpd BYTE ?
+ wCurrentMemType WORD ?
+ bInstSize BYTE ?
+ bEnabledSize BYTE ?
+ bErrStatus BYTE ?
+MEMMOD_INFO_STRUC ENDS
+;----------------------------------------------------------------------------
+CACHE_INFO_STRUC STRUCT ; 7
+ DMIHDR_STRUC {,,}
+ bSocDes BYTE ?
+ wCacheConfig WORD ?
+ wMaxCacheSize WORD ?
+ wInstSize WORD ?
+ wSupType WORD ?
+ wCurrentType WORD ?
+ bCacheSpd BYTE ?
+ bErrType BYTE ?
+ bSysCacheType BYTE ?
+ bAssociativity BYTE ?
+CACHE_INFO_STRUC ENDS
+;----------------------------------------------------------------------------
+PORT_DEFINE_STRUC STRUCT ; 8
+ bInternalRefDes BYTE ?
+ bInternalConType BYTE ?
+ bExternalRefDes BYTE ?
+ bExternalConType BYTE ?
+ bPortType BYTE ?
+PORT_DEFINE_STRUC ENDS
+
+PORT_CONNECTOR_STRUC STRUCT
+ DMIHDR_STRUC {,,}
+ PORT_DEFINE_STRUC {}
+PORT_CONNECTOR_STRUC ENDS
+;----------------------------------------------------------------------------
+SYSTEM_SLOT_INFO_STRUC STRUCT ; 9
+ DMIHDR_STRUC {,,}
+ bSlotDes BYTE ?
+ bSlotType BYTE ?
+ bSlotBusWidth BYTE ?
+ bCurrentUsage BYTE ?
+ bSlotLength BYTE ?
+ wSlotId WORD ?
+ bSlotChar1 BYTE ?
+ bSlotChar2 BYTE ?
+ wSegGroupNum WORD ?
+ bBusNum BYTE ?
+ bDevFuncNum BYTE ?
+SYSTEM_SLOT_INFO_STRUC ENDS
+;----------------------------------------------------------------------------
+ONBOARD_DEV_SUB_STRUC STRUCT ; 10
+ bDeviceType BYTE ?
+ bDescrStr BYTE ?
+ONBOARD_DEV_SUB_STRUC ENDS
+
+ONBOARD_DEVICE_STRUC STRUCT
+ DMIHDR_STRUC {,,}
+ ONBOARD_DEV_SUB_STRUC {,}
+ONBOARD_DEVICE_STRUC ENDS
+;----------------------------------------------------------------------------
+OEM_STRING_STRUC STRUCT ; 11
+ DMIHDR_STRUC {,,}
+ bCount BYTE ?
+OEM_STRING_STRUC ENDS
+;----------------------------------------------------------------------------
+SYSTEM_CONFIG_OPT_STRUC STRUCT ; 12
+ DMIHDR_STRUC {,,}
+ bCount BYTE ?
+SYSTEM_CONFIG_OPT_STRUC ENDS
+;----------------------------------------------------------------------------
+RESERVED15_STRUC STRUCT
+ bRes0 BYTE ?
+ bRes1 BYTE ?
+ bRes2 BYTE ?
+ bRes3 BYTE ?
+ bRes4 BYTE ?
+ bRes5 BYTE ?
+ bRes6 BYTE ?
+ bRes7 BYTE ?
+ bRes8 BYTE ?
+ bRes9 BYTE ?
+ bRes10 BYTE ?
+ bRes11 BYTE ?
+ bRes12 BYTE ?
+ bRes13 BYTE ?
+ bRes14 BYTE ?
+RESERVED15_STRUC ENDS
+;----------------------------------------------------------------------------
+BIOS_LANGUAGE_INFO_STRUC STRUCT ; 13
+ DMIHDR_STRUC {,,}
+ bInstallableLang BYTE ?
+ bFlags BYTE ?
+ RESERVED15_STRUC {}
+ bCurrentLang BYTE ?
+BIOS_LANGUAGE_INFO_STRUC ENDS
+;----------------------------------------------------------------------------
+GROUP_ASSOC_STRUC STRUCT ; 14
+ DMIHDR_STRUC {,,}
+ bGroupName BYTE ?
+ bItemType BYTE ?
+ wItemHandle WORD ?
+GROUP_ASSOC_STRUC ENDS
+;----------------------------------------------------------------------------
+EVENTLOG_INFO_STRUC STRUCT ; 15
+ DMIHDR_STRUC {,,}
+ wLogAreaLength WORD ?
+ wLogHeaderOffset WORD ?
+ wLogDataOffset WORD ?
+ bAccessMethod BYTE ?
+ bLogStatus BYTE ?
+ dLogChangeToken DWORD ?
+ dAccessMethodAddress DWORD ?
+ bLogHeaderFormat BYTE ?
+ bSupportedLogTypeDesc BYTE ?
+ bSupportedLogTypeDescLength BYTE ?
+EVENTLOG_INFO_STRUC ENDS
+;----------------------------------------------------------------------------
+PHY_MEM_ARRAY_STRUC STRUCT ; 16
+ DMIHDR_STRUC {,,}
+ bLocation BYTE ?
+ bUse BYTE ?
+ bMemErrCorrection BYTE ?
+ dMaxCapacity DWORD ?
+ wMemErrInfoHandle WORD ?
+ wMemdevice WORD ?
+ qExtendedMaxCap QWORD ?
+PHY_MEM_ARRAY_STRUC ENDS
+;----------------------------------------------------------------------------
+MEMORY_DEVICE_STRUC STRUCT ; 17
+ DMIHDR_STRUC {,,}
+ wMemoryArrayhandle WORD ?
+ wMemoryErrHandle WORD ?
+ wTotalWidth WORD ?
+ wDataWidth WORD ?
+ wSize WORD ?
+ bFormFactor BYTE ?
+ bDeviceSet BYTE ?
+ bDeviceLocator BYTE ?
+ bBankLocator BYTE ?
+ bMemoryType BYTE ?
+ wTypeDetail WORD ?
+ wMemDevSpeed WORD ?
+ bManufacturer BYTE ?
+ bSerialNumber BYTE ?
+ bAssetTag BYTE ?
+ bPartNumber BYTE ?
+ bAttributes BYTE ?
+ dExtendedSize DWORD ?
+ wConfigMemClkSpeed WORD ?
+ wMinimumVoltage WORD ?
+ wMaximumVoltage WORD ?
+ wConfiguredVoltage WORD ?
+MEMORY_DEVICE_STRUC ENDS
+;----------------------------------------------------------------------------
+MEMORY_ARRAY_ERR_STRUC STRUCT ; 18
+ DMIHDR_STRUC {,,}
+ bErrtype BYTE ?
+ bErrGran BYTE ?
+ bErrOperation BYTE ?
+ dVendorSyndrome DWORD ?
+ dMemArrayErrAdd DWORD ?
+ dDevErrAdd DWORD ?
+ dErrResolution DWORD ?
+MEMORY_ARRAY_ERR_STRUC ENDS
+;----------------------------------------------------------------------------
+MEMORY_ARRAY_MAPPED_ADDRESS_STRUC STRUCT ; 19
+ DMIHDR_STRUC {,,}
+ dStartingAddress DWORD ?
+ dEndingAddress DWORD ?
+ wMemoryArrayHandle WORD ?
+ bPartitionWidth BYTE ?
+ qExtendedStartingAddr QWORD ?
+ qExtendedEndingAddr QWORD ?
+MEMORY_ARRAY_MAPPED_ADDRESS_STRUC ENDS
+;----------------------------------------------------------------------------
+MEMORY_DEVICE_MAPPED_ADDRESS_STRUC STRUCT ; 20
+ DMIHDR_STRUC {,,}
+ dStartingAddress DWORD ?
+ dEndingAddress DWORD ?
+ wMemoryDeviceHandle WORD ?
+ wMemoryArrayMappedHandle WORD ?
+ bPartitionRowPosition BYTE ?
+ bInterLeavePosition BYTE ?
+ bInterLeaveDataDepth BYTE ?
+ qExtendedStaringAddr QWORD ?
+ qExtendedEndingAddr QWORD ?
+MEMORY_DEVICE_MAPPED_ADDRESS_STRUC ENDS
+;----------------------------------------------------------------------------
+BUILTIN_POINT_DEV_STRUC STRUCT ; 21
+ DMIHDR_STRUC {,,}
+ bBlt_Type BYTE ?
+ bInterface BYTE ?
+ bButtonNum BYTE ?
+BUILTIN_POINT_DEV_STRUC ENDS
+;----------------------------------------------------------------------------
+PORTABLE_BATTERY_STRUC STRUCT ; 22
+ DMIHDR_STRUC {,,}
+ bLocation BYTE ?
+ bManufacturer BYTE ?
+ bManufactDate BYTE ?
+ bSrNum BYTE ?
+ bDevName BYTE ?
+ bDevChem BYTE ?
+ wDesignCapacity WORD ?
+ wDesignVoltage WORD ?
+ bSBDCVerNum BYTE ?
+ bMaxErrBattryData BYTE ?
+ wSBDSSrNumber WORD ?
+ wSBDSManufactureDate WORD ?
+ bSBDSDeviceChemistry BYTE ?
+ bDesignCapacityMul BYTE ?
+ dOEMSpecific DWORD ?
+PORTABLE_BATTERY_STRUC ENDS
+;----------------------------------------------------------------------------
+SYSTEM_RESET_STRUC STRUCT ; 23
+ DMIHDR_STRUC {,,}
+ bCapabilities BYTE ?
+ wResetCount WORD ?
+ wResetLimit WORD ?
+ wTimeInterval WORD ?
+ wTimeOut WORD ?
+SYSTEM_RESET_STRUC ENDS
+;----------------------------------------------------------------------------
+HARDWARE_SECURITY_STRUC STRUCT ; 24
+ DMIHDR_STRUC {,,}
+ bHardwareSecuritySettings BYTE ?
+HARDWARE_SECURITY_STRUC ENDS
+;----------------------------------------------------------------------------
+SYSTEM_POWER_CONTROLS_STRUC STRUCT ; 25
+ DMIHDR_STRUC {,,}
+ bNextSchPowerOnMonth BYTE ?
+ bNextSchPowerOnDayOfMonth BYTE ?
+ bNextSchPowerOnHour BYTE ?
+ bNextSchPowerOnMinute BYTE ?
+ bNextSchPowerOnSecond BYTE ?
+SYSTEM_POWER_CONTROLS_STRUC ENDS
+;----------------------------------------------------------------------------
+VOLTAGE_PROBE_STRUC STRUCT ; 26
+ DMIHDR_STRUC {,,}
+ bDescription BYTE ?
+ bLocationAndStatus BYTE ?
+ wMaximumValue WORD ?
+ wMinimumValue WORD ?
+ wResolution WORD ?
+ wTolerance WORD ?
+ wAccuracy WORD ?
+ dOEMDefined DWORD ?
+ wNominalValue WORD ?
+VOLTAGE_PROBE_STRUC ENDS
+;----------------------------------------------------------------------------
+COOLING_DEVICE_STRUC STRUCT ; 27
+ DMIHDR_STRUC {,,}
+ wTempProbeHandle WORD ?
+ bDeviceTypeAndStatus BYTE ?
+ bCoolingUnitGroup BYTE ?
+ dOEMDefinedGroup DWORD ?
+ wNominalSpeed WORD ?
+ bDescription BYTE ?
+COOLING_DEVICE_STRUC ENDS
+;----------------------------------------------------------------------------
+TEMPERATURE_PROBE_STRUC STRUCT ; 28
+ DMIHDR_STRUC {,,}
+ bTpdescription BYTE ?
+ bLocationAndStatus BYTE ?
+ wMaximumValue WORD ?
+ wMinimumValue WORD ?
+ wResolution WORD ?
+ wTolerence WORD ?
+ wAccuracy WORD ?
+ dOEMDefined DWORD ?
+ wNominalValue WORD ?
+TEMPERATURE_PROBE_STRUC ENDS
+;----------------------------------------------------------------------------
+ELECTRICAL_CURRENT_PROBE_STRUC STRUCT ; 29
+ DMIHDR_STRUC {,,}
+ bEpdescription BYTE ?
+ bLocationAndStatus BYTE ?
+ wMaximumValue WORD ?
+ wMinimumValue WORD ?
+ wResolution WORD ?
+ wTolerence WORD ?
+ wAccuracy WORD ?
+ dOEMDefined DWORD ?
+ wNominalValue WORD ?
+ELECTRICAL_CURRENT_PROBE_STRUC ENDS
+;----------------------------------------------------------------------------
+OUT_OF_BAND_REMOTE_ACCESS_STRUC STRUCT ; 30
+ DMIHDR_STRUC {,,}
+ bManufacturer BYTE ?
+ bConnections BYTE ?
+OUT_OF_BAND_REMOTE_ACCESS_STRUC ENDS
+;----------------------------------------------------------------------------
+BOOT_INTEGRITY_STRUC STRUCT ; 31
+ DMIHDR_STRUC {,,}
+ bChecksum BYTE ?
+ bReserved BYTE ?
+ wReserved WORD ?
+ dBISEntrySt DWORD ?
+ dBISEntryTt DWORD ?
+ qReserved QWORD ?
+ dReserved DWORD ?
+BOOT_INTEGRITY_STRUC ENDS
+;----------------------------------------------------------------------------
+SYS_BOOT_INFORMATION_STRUC STRUCT ; 32
+ DMIHDR_STRUC {,,}
+ bReserved BYTE 6 dup (0)
+ bBootStatus BYTE 10 dup (?)
+SYS_BOOT_INFORMATION_STRUC ENDS
+;----------------------------------------------------------------------------
+SIXTYFOUR_BIT_MEMORY_ARRAY_ERR_STRUC STRUCT ; 33
+ DMIHDR_STRUC {,,}
+ bErrtype BYTE ?
+ bErrGran BYTE ?
+ bErrOperation BYTE ?
+ dVendorSyndrome DWORD ?
+ qMemArrayErrAdd QWORD ?
+ qDevErrAdd QWORD ?
+ dErrResolution DWORD ?
+SIXTYFOUR_BIT_MEMORY_ARRAY_ERR_STRUC ENDS
+;----------------------------------------------------------------------------
+SIXTYFOUR_BIT_MEMORY_ARRAY_MAPPED_ADDRESS_STRUC STRUCT
+ DMIHDR_STRUC {,,}
+ qStartingAddress QWORD ?
+ qEndingAddress QWORD ?
+ wMemoryArrayHandle WORD ?
+ bPartionWidth BYTE ?
+SIXTYFOUR_BIT_MEMORY_ARRAY_MAPPED_ADDRESS_STRUC ENDS
+;----------------------------------------------------------------------------
+SIXTYFOUR_BIT_MEMORY_DEVICE_MAPPED_ADDRESS_STRUC STRUCT
+ DMIHDR_STRUC {,,}
+ qStartingAddress QWORD ?
+ qEndingAddress QWORD ?
+ wMemoryDeviceHandle WORD ?
+ wMemoryArrayMappedHandle WORD ?
+ bPartionRowPosition BYTE ?
+ bInterLeavePosition BYTE ?
+ bInterLeaveDataDepth BYTE ?
+SIXTYFOUR_BIT_MEMORY_DEVICE_MAPPED_ADDRESS_STRUC ENDS
+;----------------------------------------------------------------------------
+MANAGEMENT_DEVICE_STRUC STRUCT ; 34
+ DMIHDR_STRUC {,,}
+ bDescription BYTE ?
+ bManagementDevType BYTE ?
+ dAddress DWORD ?
+ bAddressType BYTE ?
+MANAGEMENT_DEVICE_STRUC ENDS
+;----------------------------------------------------------------------------
+MANAGEMENT_DEVICE_COMPONENT_STRUC STRUCT ; 35
+ DMIHDR_STRUC {,,}
+ bDescription BYTE ?
+ wManagementDevHandle WORD ?
+ wComponentHandle WORD ?
+ wThresholdHandle WORD ?
+MANAGEMENT_DEVICE_COMPONENT_STRUC ENDS
+;----------------------------------------------------------------------------
+MANAGEMENT_DEVICE_THRESHOLD_DATA_STRUC STRUCT ; 36
+ DMIHDR_STRUC {,,}
+ wLowerThresholdNonCritical WORD ?
+ wUpperThresholdNonCritical WORD ?
+ wLowerThresholdCritical WORD ?
+ wUpperThresholdCritical WORD ?
+ wLowerThresholdNonRecoverable WORD ?
+ wUpperThresholdNonRecoverable WORD ?
+MANAGEMENT_DEVICE_THRESHOLD_DATA_STRUC ENDS
+;----------------------------------------------------------------------------
+MEMORY_CHANNEL_STRUC STRUCT ; 37
+ DMIHDR_STRUC {,,}
+ bChannelType BYTE ?
+ bMaxChannelLoad BYTE ?
+ bMemDevCount BYTE ?
+MEMORY_CHANNEL_STRUC ENDS
+;----------------------------------------------------------------------------
+IPMI_DEVICE_INFORMATION_STRUC STRUCT ; 38
+ DMIHDR_STRUC {,,}
+ bInterfaceType BYTE ?
+ bIPMISpecRev BYTE ?
+ bI2CSlaveAddr BYTE ?
+ bNVStorageDeviceAddr BYTE ?
+ dBaseAddrLow DWORD ?
+ dBaseAddrHigh DWORD ?
+ bBaseAddrModIntInfo BYTE ?
+ bInterruptNumber BYTE ?
+IPMI_DEVICE_INFORMATION_STRUC ENDS
+;----------------------------------------------------------------------------
+SYSTEM_POWER_SUPPLY_STRUC STRUCT ; 39
+ DMIHDR_STRUC {,,}
+ bPowerUnitGroup BYTE ?
+ bLocation BYTE ?
+ bDeviceName BYTE ?
+ bManufacturer BYTE ?
+ bSerialNumber BYTE ?
+ bAssetTagNumber BYTE ?
+ bModelPartNumber BYTE ?
+ bRevisionLevel BYTE ?
+ wMaxCapacity WORD ?
+ wPowerSupplyChar WORD ?
+ wIpVoltageProbeHandle WORD ?
+ wCoolingDevHandle WORD ?
+ wIpCurrentProbeHandle WORD ?
+SYSTEM_POWER_SUPPLY_STRUC ENDS
+;----------------------------------------------------------------------------
+ADDITIONAL_INFO_STRUC STRUCT ; 40
+ DMIHDR_STRUC {,,}
+ bNumAdditionalInfoEntries BYTE ?
+ADDITIONAL_INFO_STRUC ENDS
+
+ADDITIONAL_INFO_ENTRY_STRUC STRUCT
+ bEntryLength BYTE ?
+ wRefHandle WORD ?
+ bRefOffset BYTE ?
+ bString BYTE ?
+ UNION
+ bValue BYTE ?
+ wValue WORD ?
+ dValue DWORD ?
+ ENDS
+ADDITIONAL_INFO_ENTRY_STRUC ENDS
+;----------------------------------------------------------------------------
+ONBOARD_DEVICE_EXTENDED_STRUC STRUCT ; 41
+ DMIHDR_STRUC {,,}
+ bRefDesignation BYTE ?
+ bDeviceType BYTE ?
+ bDeviceTypeInstance BYTE ?
+ wSegGroupNum WORD ?
+ bBusNum BYTE ?
+ bDevFuncNum BYTE ?
+ONBOARD_DEVICE_EXTENDED_STRUC ENDS
+;----------------------------------------------------------------------------
+INACTIVE_STRUC STRUCT ; 126
+ DMIHDR_STRUC {,,}
+INACTIVE_STRUC ENDS
+;----------------------------------------------------------------------------
+END_OF_TABLE_STRUC STRUCT ; 127
+ DMIHDR_STRUC {,,}
+END_OF_TABLE_STRUC ENDS
+
+;----------------------------------------------------------------------------
+; OEM DEFINED GPNV STRUCTURE
+;----------------------------------------------------------------------------
+OEM_GPNV_STRUC STRUCT
+ DMIHDR_STRUC {,,}
+ bAccessMethod BYTE ?
+ dAccessMethodAddress DWORD ?
+ wGPNVSize WORD ?
+ wNoOfDataIdDescriptor WORD ? ; #of dataid descritors present
+ ; for data id descriptor, see below
+OEM_GPNV_STRUC ENDS
+
+; details of the dataid descriptor
+DATAID_DESCRIPTOR_STRUC STRUCT
+ wDataId WORD ?
+ wHandle WORD ?
+ wSize WORD ?
+ wStartOffsetInGPNV WORD ?
+DATAID_DESCRIPTOR_STRUC ENDS
+
+;-----------------------------------------------------------------------;
+; INTEL ASF STRUCTURE
+;-----------------------------------------------------------------------;
+INTEL_ASF_STRUC STRUCT ; 129
+ DMIHDR_STRUC {,,}
+ bDescription BYTE ?
+ bStructVer BYTE ?
+ bStructID BYTE ?
+ bAttr BYTE ?
+INTEL_ASF_STRUC ENDS
+;----------------------------------------------------------------------------
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2013, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
diff --git a/Board/EM/SMBIOS/SMBiosStaticData/Smbdesc.def b/Board/EM/SMBIOS/SMBiosStaticData/Smbdesc.def
new file mode 100644
index 0000000..c82ffec
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosStaticData/Smbdesc.def
@@ -0,0 +1,2021 @@
+ ECHO --Including: SMBDESC.DEF
+
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2016, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
+
+;****************************************************************************
+; $Header: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/Smbdesc.def 24 4/07/16 5:55p Davidd $
+;
+; $Revision: 24 $
+;
+; $Date: 4/07/16 5:55p $
+;****************************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/Smbdesc.def $
+;
+; 24 4/07/16 5:55p Davidd
+; [TAG] EIP231162
+; [Category] New Feature
+; [Description] Merge Aptio V Smbios -09 changes for Aptio 4
+; 4.6.5.5_SMBIOS_40 release
+; [Files] Smbios.sdl
+; SmbiosDynamicData.h
+; Smbios.h
+; SmbiosStaticData.sdl
+; SmbiosStaticData.asm
+; SmbData.mac
+; SmbMacro.aid
+; SmbDesc.def
+;
+; 23 2/17/15 1:09p Davidd
+; [TAG] EIP205509
+; [Category] Improvement
+; [Description] Merge Aptio V Smbios EIP193807, 193858, 196901 changes
+; into Aptio 4 Smbios
+; [Files] SmbiosStaticData.asm
+; Smbdata.mac
+; Smbdesc.def
+;
+; 22 11/13/13 3:40p Davidd
+; [TAG] EIP143030
+; [Category] Improvement
+; [Description] Synchronize Aptio 4 Smbios with recent changes on Aptio
+; V Smbios for '4.6.5.1_SMBIOS_36' release
+; [Files] SmbiosStaticData.sdl
+; Smbdesc.def
+; SMBDATA.MAC
+;
+; 21 5/29/13 12:49p Davidd
+; [TAG] EIP124735
+; [Category] Spec Update
+; [Severity] Normal
+; [Description] SMBIOS 2.8.0 specification support for Aptio 4
+; [Files] Smb.equ
+; Smbdata.mac
+; Smbdesc.def
+; Smbstruc.def
+; Smbios.c
+; Smbios.h
+; SmbiosDynamicData.h
+;
+; 20 11/12/12 10:22a Davidd
+;
+; 19 9/13/12 12:12p Davidd
+; [TAG] EIP99388
+; [Category] Improvement
+; [Description] can not modified SMBIOS type 38 by
+; smbiosstaticdata.sdl
+; [Files] Smbdata.mac
+; Smbdesc.def
+;
+; 18 3/12/12 3:06p Davidd
+; [TAG] EIP82983
+; [Category] Improvement
+; [Description] Need Creating Tokens for Type1:UUID/Type11/Typ12/Type22
+; [Files] SmbiosStaticData.sdl
+; Smbdata.mac
+; Smbdesc.def
+;
+; 17 1/17/12 4:51p Davidd
+; [TAG] EIP78264
+; [Category] Improvement
+; [Description] SMBOS Type 2 (Spec 2.7.1) - No multiple type 2 support
+; [Files] Smbios.c
+; Smbios.h
+; Smbdata.mac
+; Smbdesc.def
+; SmbiosStaticData.sdl
+;
+; 16 2/09/11 10:35a Davidd
+; [TAG] EIP53081
+; [Category] Bug Fix
+; [Severity] Minor
+; [Symptom] Smbios Management Device (type 34) must be enabled in
+; order to
+; see System Power Supply (type 39)
+; [RootCause] Macro to create System Power Supply structure (type 39)
+; was grouped inside macro to create Smbios Management
+; Device
+; (type 34)
+; [Solution] Seperated Type 39 macro from 34.
+; [Files] SmbiosStaticData.asm
+; Smbdata.mac
+; Smbmacro.aid
+; Smbdesc.def
+;
+; 15 10/08/10 8:16p Davidd
+; [TAG] EIP43278
+;
+; [Category] Function Request
+;
+; [Severity] Normal
+;
+; [Description] SMBIOS 2.7 requirement
+;
+; [Files] Include\Protocol\Smbios.h
+; Include\Protocol\SmbiosDynamicData.h
+; Board\EM\SMBIOS\SMBiosStaticData\SmbiosStaticData.sdl
+; Board\EM\SMBIOS\SMBiosStaticData\SMBDATA.MAC
+; Board\EM\SMBIOS\SMBiosStaticData\SMBSTRUC.DEF
+; Board\EM\SMBIOS\SMBiosStaticData\SMBMACRO.AID
+; Board\EM\SMBIOS\SMBiosStaticData\Smbdesc.def
+; Board\EM\SMBIOS\SMBiosStaticData\SMB.EQU
+;
+; 14 4/06/10 11:02a Davidd
+; Removed type 13 porting. Type 13 structure now is dynamically created
+; if enabled.
+;
+; 13 6/02/09 4:46p Davidd
+; Updated AMI headers (EIP 22180)
+;
+; 12 2/06/09 5:14p Davidd
+; Added some additional language entries for BIOS Language Information
+; structure type 13
+;
+; 11 2/03/09 2:52p Davidd
+; Moved Bios Language Information structure 13 porting info from
+; SmbiosStaticData.sdl to here.
+;
+; 10 10/27/08 2:48p Davidd
+; More changes for new type 40 and 41 support.
+;
+; 9 10/13/08 12:00p Davidd
+; Changes made to support SMBIOS specification v2.5 and v2.6
+;
+; 8 4/04/08 5:17p Davidd
+; Cleaned up and removed NUMBER_OF_MEM_MODULE_x definitions. Number of
+; memory sockets for each memory array are now defined in
+; Ax_MEMORY_SOCKETS SDL token.
+;
+; 7 2/22/08 10:30a Davidd
+; Simplified the way the number of memory slots for each physical memory
+; array are defined.
+;
+; 6 2/01/08 5:25p Davidd
+;
+; 6 2/01/08 12:06p Davidd
+; Added porting info for SMBIOS type 17 to support multi memory arrays.
+;
+; 5 12/19/07 12:09p Davidd
+;
+; 4 11/21/07 11:22a Davidd
+;
+; 4 11/21/07 11:18a Davidd
+; Static data porting for Memory Type 16, Pointing Device Type 21,
+; Portable Battery Type 22 have been moved from SmbiosStaticData.sdl to
+; here per customer request.
+;
+; 3 12/15/06 5:33p Davidd
+; Code cleanup and reformatted to coding standard.
+;
+; 1 5/24/06 11:59a Fasihm
+; Initial check-in for the Santa Rosa Project. (Matanzas CRB) with
+; Crestline + ICH8M + Merom Processor.
+;
+; 2 9/15/05 3:31p Mirk
+;
+; 1 8/16/05 11:21a Mirk
+;
+; 2 5/31/05 12:05p Davidd
+; Made changes for NAPA platform.
+;
+; 1 4/29/05 2:15p Davidd
+; Initial checkin.
+;
+;****************************************************************************
+
+;----------------------------------------------------------------------------
+; INCLUDE equates.equ
+;----------------------------------------------------------------------------
+
+;!!NOTE!!
+; This file is used to port the static information required in the SMBIOS
+; Structures.
+;
+; While porting this file, please refer SMB.EQU for Enumerated Values.
+;
+; To dynamically update any structure you can add link to 'SMBIOSPostInitTable'
+; Refer to any of the current links for implementation detail.
+
+;----------------------------------------------------------------------------
+; Structure Type 0 : BIOS INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 1 : SYSTEM INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 2 : BASEBOARD INFORMATION
+;----------------------------------------------------------------------------
+; NOTE: For single board system (NUMBER_OF_BASEBOARDS = 1), for backward
+; compatibility, porting is done with SDL tokens in SmbiosStaticData.sdl.
+;
+; For multiple boards system (NUMBER_OF_BASEBOARDS > 1), porting is done
+; here instead.
+;
+; Syntax:
+; BASEBOARD_MANUFACTURER_1 DEFINE <To be filled by O.E.M.>
+; BASEBOARD_PRODUCT_1 DEFINE <To be filled by O.E.M.>
+; BASEBOARD_VERSION_1 DEFINE <To be filled by O.E.M.>
+; BASEBOARD_SERIAL_NUMBER_1 DEFINE <To be filled by O.E.M.>
+; BASEBOARD_ASSET_TAG_1 DEFINE <To be filled by O.E.M.>
+; BASEBOARD_FEATURE_FLAG_1 DEFINE <01h>
+; * Baseboard Feature Flags -> Bit 0 = Hosting board (ex. motherboard)
+; Bit 1 = Board requires at least one daughter board
+; or auxiliary card to function properly
+; Bit 2 = Board is removable
+; Bit 3 = Board is replaceable
+; Bit 4 = Board is hot swappable
+; Bit 7-5 = Reserved
+; BASEBOARD_LOCATION_1 DEFINE <To be filled by O.E.M.>
+; BASEBOARD_TYPE_1 DEFINE <0Ah>
+; * Baseboard Board Type -> 01h = Unknown
+; 02h = Other
+; 03h = Server Blade
+; 04h = Connectivity Switch
+; 05h = System Management Module
+; 06h = Processor Module
+; 07h = I/O Module
+; 08h = Memory Module
+; 09h = Daughter Board
+; 0Ah = Motherboard (includes processor, memory, and I/O)
+; 0Bh = Processor/Memory Module
+; 0Ch = Processor/IO Module
+; 0Dh = Interconnect Board
+;----------------------------------------------------------------------------
+ BASEBOARD_MANUFACTURER_1 DEFINE <To be filled by O.E.M. 1>
+ BASEBOARD_MANUFACTURER_2 DEFINE <To be filled by O.E.M. 2>
+ BASEBOARD_MANUFACTURER_3 DEFINE <To be filled by O.E.M. 3>
+ BASEBOARD_MANUFACTURER_4 DEFINE <To be filled by O.E.M. 4>
+ BASEBOARD_MANUFACTURER_5 DEFINE <To be filled by O.E.M. 5>
+
+ BASEBOARD_PRODUCT_1 DEFINE <To be filled by O.E.M. 1>
+ BASEBOARD_PRODUCT_2 DEFINE <To be filled by O.E.M. 2>
+ BASEBOARD_PRODUCT_3 DEFINE <To be filled by O.E.M. 3>
+ BASEBOARD_PRODUCT_4 DEFINE <To be filled by O.E.M. 4>
+ BASEBOARD_PRODUCT_5 DEFINE <To be filled by O.E.M. 5>
+
+ BASEBOARD_VERSION_1 DEFINE <To be filled by O.E.M. 1>
+ BASEBOARD_VERSION_2 DEFINE <To be filled by O.E.M. 2>
+ BASEBOARD_VERSION_3 DEFINE <To be filled by O.E.M. 3>
+ BASEBOARD_VERSION_4 DEFINE <To be filled by O.E.M. 4>
+ BASEBOARD_VERSION_5 DEFINE <To be filled by O.E.M. 5>
+
+ BASEBOARD_SERIAL_NUMBER_1 DEFINE <To be filled by O.E.M. 1>
+ BASEBOARD_SERIAL_NUMBER_2 DEFINE <To be filled by O.E.M. 2>
+ BASEBOARD_SERIAL_NUMBER_3 DEFINE <To be filled by O.E.M. 3>
+ BASEBOARD_SERIAL_NUMBER_4 DEFINE <To be filled by O.E.M. 4>
+ BASEBOARD_SERIAL_NUMBER_5 DEFINE <To be filled by O.E.M. 5>
+
+ BASEBOARD_ASSET_TAG_1 DEFINE <To be filled by O.E.M. 1>
+ BASEBOARD_ASSET_TAG_2 DEFINE <To be filled by O.E.M. 2>
+ BASEBOARD_ASSET_TAG_3 DEFINE <To be filled by O.E.M. 3>
+ BASEBOARD_ASSET_TAG_4 DEFINE <To be filled by O.E.M. 4>
+ BASEBOARD_ASSET_TAG_5 DEFINE <To be filled by O.E.M. 5>
+
+ BASEBOARD_FEATURE_FLAG_1 DEFINE <01h>
+ BASEBOARD_FEATURE_FLAG_2 DEFINE <01h>
+ BASEBOARD_FEATURE_FLAG_3 DEFINE <01h>
+ BASEBOARD_FEATURE_FLAG_4 DEFINE <01h>
+ BASEBOARD_FEATURE_FLAG_5 DEFINE <01h>
+
+ BASEBOARD_LOCATION_1 DEFINE <To be filled by O.E.M. 1>
+ BASEBOARD_LOCATION_2 DEFINE <To be filled by O.E.M. 2>
+ BASEBOARD_LOCATION_3 DEFINE <To be filled by O.E.M. 3>
+ BASEBOARD_LOCATION_4 DEFINE <To be filled by O.E.M. 4>
+ BASEBOARD_LOCATION_5 DEFINE <To be filled by O.E.M. 5>
+
+ BASEBOARD_TYPE_1 DEFINE <0Ah>
+ BASEBOARD_TYPE_2 DEFINE <0Ah>
+ BASEBOARD_TYPE_3 DEFINE <0Ah>
+ BASEBOARD_TYPE_4 DEFINE <0Ah>
+ BASEBOARD_TYPE_5 DEFINE <0Ah>
+
+;----------------------------------------------------------------------------
+; Structure Type 3 : SYSTEM ENCLOSURE OR CHASSIS
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 4 : PROCESSOR INFORMATION
+;----------------------------------------------------------------------------
+;
+; The processor information is defined in the following two macros
+; 1. PROCESSOR_INFO_n
+; 2. PROCESSOR_VOLTAGE_n
+; where n is the processor number
+; (n = 1,2,3,4... for system having support for 1,2,3,4... processors)
+;
+; Syntax of PROCESSOR_INFO_n macro
+; PROCESSOR_INFO_n DEFINE <String defining Slot, Maxm speed, Upgrade information>
+; where String defining Slot is a string
+; Maxm Speed is a number specifying speed in MHz
+;
+; PROCESSOR UPGRADE INFORMATION
+; Refer SMB.EQU file for Processor Upgrade information
+;
+; Syntax of PROCESSOR_VOLTAGE_n macro
+; PROCESSOR_VOLTAGE_n DEFINE <Format, List of Voltage capabilities>
+; Format can be either STANDARD or USER_DEFINED
+; If it is STANDARD, then the List of Voltage capabilities can have
+; more than one values e.g. VOLT_29 (2.9V), VOLT_33 (3.3V), etc.
+; If it is USER_DEFINED, then the List of Voltage capabilities can have
+; only one value and the value needs to be calculated according to the
+; following formula: Processor voltage * 10 i.e. if the processor
+; voltage is 2.9V, then this value should be 29 decimal or 13h
+; Select the number of processors supported in the motherboard.
+; note that the PROCESSOR_INFO_n and PROCESSOR_VOLTAGE_n macros are defined
+; for upto 4 processor. If the number of processors exceeds 4, then the
+; corresponding PROCESSOR_INFO_n and PROCESSOR_VOLTAGE_n macros need to
+; be defined accordingly
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ PROC_SOC_DESIG_1 DEFINE <CPU 1>
+ PROC_TYPE_1 DEFINE <CPU_CENTRAL_PROCESSOR>
+ PROC_FAMILY_1 DEFINE <FA_OTHER>
+ PROC_VOLTAGE_1 DEFINE <STANDARD, VOLT_33>
+ PROC_MAX_SPEED_1 DEFINE <0>
+ PROC_UPGRADE_1 DEFINE <UPG_OTHER>
+ PROC_SERIAL_NO_1 DEFINE <To Be Filled By O.E.M.>
+ PROC_ASSET_TAG_1 DEFINE <To Be Filled By O.E.M.>
+ PROC_PART_NO_1 DEFINE <To Be Filled By O.E.M.>
+ PROC_FAMILY_2_1 DEFINE <FA_OTHER>
+
+ PROC_SOC_DESIG_2 DEFINE <CPU 2>
+ PROC_TYPE_2 DEFINE <CPU_CENTRAL_PROCESSOR>
+ PROC_FAMILY_2 DEFINE <FA_OTHER>
+ PROC_VOLTAGE_2 DEFINE <STANDARD, VOLT_33>
+ PROC_MAX_SPEED_2 DEFINE <0>
+ PROC_UPGRADE_2 DEFINE <UPG_OTHER>
+ PROC_SERIAL_NO_2 DEFINE <To Be Filled By O.E.M.>
+ PROC_ASSET_TAG_2 DEFINE <To Be Filled By O.E.M.>
+ PROC_PART_NO_2 DEFINE <To Be Filled By O.E.M.>
+ PROC_FAMILY_2_2 DEFINE <FA_OTHER>
+
+ PROC_SOC_DESIG_3 DEFINE <CPU 3>
+ PROC_TYPE_3 DEFINE <CPU_CENTRAL_PROCESSOR>
+ PROC_FAMILY_3 DEFINE <FA_OTHER>
+ PROC_VOLTAGE_3 DEFINE <STANDARD, VOLT_33>
+ PROC_MAX_SPEED_3 DEFINE <0>
+ PROC_UPGRADE_3 DEFINE <UPG_OTHER>
+ PROC_SERIAL_NO_3 DEFINE <To Be Filled By O.E.M.>
+ PROC_ASSET_TAG_3 DEFINE <To Be Filled By O.E.M.>
+ PROC_PART_NO_3 DEFINE <To Be Filled By O.E.M.>
+ PROC_FAMILY_2_3 DEFINE <FA_OTHER>
+
+ PROC_SOC_DESIG_4 DEFINE <CPU 4>
+ PROC_TYPE_4 DEFINE <CPU_CENTRAL_PROCESSOR>
+ PROC_FAMILY_4 DEFINE <FA_OTHER>
+ PROC_VOLTAGE_4 DEFINE <STANDARD, VOLT_33>
+ PROC_MAX_SPEED_4 DEFINE <0>
+ PROC_UPGRADE_4 DEFINE <UPG_OTHER>
+ PROC_SERIAL_NO_4 DEFINE <To Be Filled By O.E.M.>
+ PROC_ASSET_TAG_4 DEFINE <To Be Filled By O.E.M.>
+ PROC_PART_NO_4 DEFINE <To Be Filled By O.E.M.>
+ PROC_FAMILY_2_4 DEFINE <FA_OTHER>
+
+;----------------------------------------------------------------------------
+; Structure Type 7: CACHE INFORMATION
+;----------------------------------------------------------------------------
+; Select the number of Caches present in the System. A value of 1 indicates
+; only L1 cache is present, a value of 2 indicates both L1 and L2 caches
+; are present, Note that these caches are internal or external to the processor.
+; The external cache (if present) is defined by EXTERNAL_CACHE_INFORMATION.
+;
+; Syntax:
+; PROCESSOR_CACHE_INFO_L1 <Maximum Cache Size, Installed Cache Size, Supported SRAM Type, Current SRAM Type>
+;
+; EXTERNAL_CACHE_INFO <Maximum Cache Size, Installed Cache Size, Supported SRAM Type, Current SRAM Type>
+;
+; * Maximum cache size and Installed cache size are WORD values.
+; Bit-15 = Granularity
+; 0/1 = granularity ios 1K/64K
+; Bit14-0 = Size
+; For example, 256k cahe can be represented as 256*1024 with granularity of 1K
+; OR as 8004h with granularity of 64k
+; * For Supported/Current SRAM Type refer to SMB.EQU File. It is described
+; in cache type equates
+;
+; Syntax:
+; PROCESSOR_CACHE_CONFIG_L1 <String, Operational Mode, Enable or Disabled at BOOT time,
+; Location relative to CPU, Socketed or Not Socketed, Cache Level Inoformation>
+;
+; EXTERNAL_CACHE_CFG <String, Operational Mode, Enable or Disabled at BOOT time, Location relative to CPU,
+; Socketed or Not Socketed, Cache Level Inoformation>
+;
+; * String -> This is a string describing the cache.
+; e.g. "L-1 Cache"
+; * Operational Mode -> Cache is Write back or write thru, etc...
+; For more detail search for cache operational mode
+; in Structure Type 7 details in SMB.EQU
+; * Cache Enbled/Disable -> (at Boot time)
+; For more detail search for Cache Enable or disable
+; in structure Type 7 details in SMB.EQU
+; * Location Relative to CPU -> Cache location is internal or external relative to CPU
+; For more detail search for Cache Location in
+; structure Type 7 details in SMB.EQU
+; * Cache Socketed/Not Socketed -> Cache is socketed or Not socketed
+; For more detail search for Cache socketed in structure
+; Type 7 details in SMB.EQU
+; * Cache Level Information -> L1, L2 etc...
+; For more detail search for level inofrmation in structure
+; Type 7 details in SMB.EQU
+; Syntax:
+; PROCESSOR_CACHE_CHAR_L1 <Cache speed, Error Correction Type, System Cache Type, Cache Associativity>
+;
+; EXTERNAL_CACHE_CHAR <Cache speed, Error Correction Type, System Cache Type, Cache Associativity>
+;
+; * Cache Speed -> Cache Module speed in ns(nano second)
+; the value is 0 if it is unknown
+; * Error Correction Type -> Single-bit, Multi-bit, etc...
+; For more detail search for Cache Error Correction in
+; structure Type-7 details in SMB.EQU
+; * System Cache Type -> Unified and etc...
+; For more detail search for System Cache Type in structure
+; Type-7 details in SMB.EQU
+; * Cache Associativity -> One-way, Two-way Associativity and etc..
+; For more detail search for Cache Associativity in structure
+; Type-7 details in SMB.EQU
+;----------------------------------------------------------------------------
+; Use MKF_NUMBER_OF_PROC_CACHE to get the No. of Processor Cache in the system.
+
+;!!PORT!!
+
+ PROC_CACHE_INFO_L1 DEFINE <0, 0, CH_UNKNOWN, CH_UNKNOWN>
+ PROC_CACHE_CFG_L1 DEFINE <L1-Cache, CACHE_DISABLED, COM_UNKNOWN, CCL_INTERNAL, CS_NOT_SOCKETED, CL_L1>
+ PROC_CACHE_CHAR_L1 DEFINE <0, SR_UNKNOWN, SCT_UNKNOWN, CA_UNKNOWN>
+
+ PROC_CACHE_INFO_L2 DEFINE <0, 0, CH_UNKNOWN, CH_UNKNOWN>
+ PROC_CACHE_CFG_L2 DEFINE <L2-Cache, CACHE_DISABLED, COM_UNKNOWN, CCL_INTERNAL, CS_NOT_SOCKETED, CL_L2>
+ PROC_CACHE_CHAR_L2 DEFINE <0, SR_UNKNOWN, SCT_UNKNOWN, CA_UNKNOWN>
+
+ PROC_CACHE_INFO_L3 DEFINE <0, 0, CH_UNKNOWN, CH_UNKNOWN>
+ PROC_CACHE_CFG_L3 DEFINE <L3-Cache, CACHE_DISABLED, COM_UNKNOWN, CCL_INTERNAL, CS_NOT_SOCKETED, CL_L3>
+ PROC_CACHE_CHAR_L3 DEFINE <0, SR_UNKNOWN, SCT_UNKNOWN, CA_UNKNOWN>
+
+ EXTERNAL_CACHE_INFO DEFINE <32*1024, 32*1024, 00, 00>
+ EXTERNAL_CACHE_CFG DEFINE <L2-Cache, 00, 00, 00, 00, CL_L2>
+ EXTERNAL_CACHE_CHAR DEFINE <40, 00, 00, 00>
+
+
+;----------------------------------------------------------------------------
+; Structure Type 8 : PORT CONNECTOR INFORMATION
+;----------------------------------------------------------------------------
+
+;<Internal_ref_designator, Internal_connector_type, External_ref_designator,
+; External_connector_type, Port_type>
+
+;!!PORT!!
+ EXT_CONNECTOR_1 DEFINE <J1A1,00H,PS2Mouse,0FH,0EH>
+ EXT_CONNECTOR_2 DEFINE <J1A1,00H,Keyboard,0FH,0DH>
+ EXT_CONNECTOR_3 DEFINE <J2A1,00H,TV Out,1DH,0FFH>
+ EXT_CONNECTOR_4 DEFINE <J2A2A,00H,COM A,08H,09H>
+ EXT_CONNECTOR_5 DEFINE <J2A2B,00H,Video,07H,1CH>
+ EXT_CONNECTOR_6 DEFINE <J3A1,00H,USB1,12H,10H>
+ EXT_CONNECTOR_7 DEFINE <J3A1,00H,USB2,12H,10H>
+ EXT_CONNECTOR_8 DEFINE <J3A1,00H,USB3,12H,10H>
+ EXT_CONNECTOR_9 DEFINE <J5A1,00H,LAN,0BH,1FH>
+ EXT_CONNECTOR_10 DEFINE <J5A1,00H,USB4,12H,10H>
+ EXT_CONNECTOR_11 DEFINE <J5A1,00H,USB5,12H,10H>
+
+;<Internal_ref_designator, Internal_connector_type, Internal_port_type>
+
+;!!PORT!!
+ INT_CONNECTOR_1 DEFINE <J9A1 - TPM HDR,0FFH,0FFH>
+ INT_CONNECTOR_2 DEFINE <J9C1 - PCIE DOCKING CONN,0FFH,0FFH>
+ INT_CONNECTOR_3 DEFINE <J2B3 - CPU FAN,0FFH,0FFH>
+ INT_CONNECTOR_4 DEFINE <J6C2 - EXT HDMI,0FFH,0FFH>
+ INT_CONNECTOR_5 DEFINE <J3C1 - GMCH FAN,0FFH,0FFH>
+ INT_CONNECTOR_6 DEFINE <J1D1 - ITP,0FFH,0FFH>
+ INT_CONNECTOR_7 DEFINE <J9E2 - MDC INTPSR,0FFH,0FFH>
+ INT_CONNECTOR_8 DEFINE <J9E4 - MDC INTPSR,0FFH,0FFH>
+ INT_CONNECTOR_9 DEFINE <J9E3 - LPC HOT DOCKING,0FFH,0FFH>
+ INT_CONNECTOR_10 DEFINE <J9E1 - SCAN MATRIX,0FFH,0FFH>
+ INT_CONNECTOR_11 DEFINE <J9G1 - LPC SIDE BAND,0FFH,0FFH>
+ INT_CONNECTOR_12 DEFINE <J8F1 - UNIFIED,0FFH,0FFH>
+ INT_CONNECTOR_13 DEFINE <J6F1 - LVDS,0FFH,0FFH>
+ INT_CONNECTOR_14 DEFINE <J2F1 - LAI FAN,0FFH,0FFH>
+ INT_CONNECTOR_15 DEFINE <J2G1 - GFX VID,0FFH,0FFH>
+ INT_CONNECTOR_16 DEFINE <J1G6 - AC JACK,0FFH,0FFH>
+ INT_CONNECTOR_17 DEFINE <J1G7 - BATT B,0FFH,0FFH>
+ INT_CONNECTOR_18 DEFINE <J1H1 - BATT A,0FFH,0FFH>
+ INT_CONNECTOR_19 DEFINE <J7H2 - SATA PWR,0FFH,0FFH>
+ INT_CONNECTOR_20 DEFINE <J7H1 - SATA PORT2,0FFH,0FFH>
+ INT_CONNECTOR_21 DEFINE <J7J3 - SATA PORT1,0FFH,0FFH>
+ INT_CONNECTOR_22 DEFINE <J8J1 - SATA PORT0,0FFH,0FFH>
+ INT_CONNECTOR_23 DEFINE <J7J4 - PATA,016H,0FFH>
+ INT_CONNECTOR_24 DEFINE <J7J5 - EMA,0FFH,0FFH>
+ INT_CONNECTOR_25 DEFINE <J4J1 - ATX PWR,0FFH,0FFH>
+ INT_CONNECTOR_26 DEFINE <J4J2 - PATA PWR,0FFH,0FFH>
+
+;----------------------------------------------------------------------------
+; Structure Type 9 : SYSTEM SLOT INFORMATION
+;----------------------------------------------------------------------------
+; The following information is needed only if SYS_SLOT_INFO = Present
+; Syntax:
+; SYSTEM_SLOT_INFO_1 DEFINE <String, Slot Type, Slot Data bus Width,
+; Slot usage, Slot length, Slot ID>
+; * String -> System Slot designator string.
+; e.g. "PCI1", "ISA1" etc..
+; * System Slot Type -> PCI, ISA, VESA, AGP, etc...
+; For more detail search for System Slot
+; Type equates in structure Type 9, refer SMB.EQU
+; * Slot Data Bus Width -> 8bit, 16bit etc..
+; For more detail search for System Slot Data Bus width
+; equates in structure Type 9, refer SMB.EQU
+; * Slot Usage -> Available, in use etc..
+; For more detail search for System Slot Usage
+; equates in structure TYPE 9 , refer SMB.EQU
+; This is a Bit-field value.
+; * Slot Length -> Half length, full length etc...
+; For more detail search for System Slot Length
+; equates in structure Type 9, refer SMB.EQU
+; * Slot ID -> The slot ID field provides a mechanism to
+; Correlate the physical attributes of the slot to
+; its logical access method
+;
+; * SYSTEM_SLOT_CHAR_1 DEFINE <Slot Characteristic 1, SlotCharacteristic 2>
+; Slot Characteristc 1 -> For more detail search for system slot
+; characteristic-1 in structure type 9, SMB.EQU
+; Slot Characteristc 2 -> For more detail search for system slot
+; characteristic-2 in structure type 9, SMB.EQU
+; * SEGGRP_BUS_DEV_FUNC_1 DEFINE <Segment Group Number, Bus Number, Device Function Number>
+; Segment Group Number -> Segment Group Number defined in the PCI Firmware Spec.
+; Bus Number -> Bus Number
+; Device Function Number -> Device / Function Number
+;----------------------------------------------------------------------------
+
+;!!NOTE!!
+; If AGP slot exists in the system then enter the AGP_BRIDGE_BUS_DEV_FUNC_NO in SMBIOS.SDL
+
+;!!PORT!!
+ SYSTEM_SLOT_INFO_1 DEFINE <J6B2, SYS_SLOT_PCIE, DBW_16X, SCU_IN_USE, SL_LONG_LENGTH, 0>
+ SYSTEM_SLOT_CHAR_1 DEFINE <SCH_33V, SCH_SHARED, SCH_PME>
+ SEGGRP_BUS_DEV_FUNC_1 DEFINE <0, 0, 8>
+
+ SYSTEM_SLOT_INFO_2 DEFINE <J6B1, SYS_SLOT_PCIE, DBW_1X, SCU_IN_USE, SL_SHORT_LENGTH, 1>
+ SYSTEM_SLOT_CHAR_2 DEFINE <SCH_33V, SCH_PME, SCH_SHARED>
+ SEGGRP_BUS_DEV_FUNC_2 DEFINE <0, 0, 0E3h>
+
+ SYSTEM_SLOT_INFO_3 DEFINE <J6D1, SYS_SLOT_PCIE, DBW_1X, SCU_IN_USE, SL_SHORT_LENGTH, 2>
+ SYSTEM_SLOT_CHAR_3 DEFINE <SCH_33V, SCH_PME, SCH_SHARED>
+ SEGGRP_BUS_DEV_FUNC_3 DEFINE <0, 0, 0E4h>
+
+ SYSTEM_SLOT_INFO_4 DEFINE <J7B1, SYS_SLOT_PCIE, DBW_1X, SCU_IN_USE, SL_SHORT_LENGTH, 3>
+ SYSTEM_SLOT_CHAR_4 DEFINE <SCH_33V, SCH_PME, SCH_SHARED>
+ SEGGRP_BUS_DEV_FUNC_4 DEFINE <0, 0, 0E5h>
+
+ SYSTEM_SLOT_INFO_5 DEFINE <J8B4, SYS_SLOT_PCIE, DBW_1X, SCU_IN_USE, SL_SHORT_LENGTH, 4>
+ SYSTEM_SLOT_CHAR_5 DEFINE <SCH_33V, SCH_PME, SCH_SHARED>
+ SEGGRP_BUS_DEV_FUNC_5 DEFINE <0, 0, 0E6h>
+
+ SYSTEM_SLOT_INFO_6 DEFINE <J8D1, SYS_SLOT_PCIE, DBW_1X, SCU_IN_USE, SL_SHORT_LENGTH, 5>
+ SYSTEM_SLOT_CHAR_6 DEFINE <SCH_33V, SCH_PME, SCH_SHARED>
+ SEGGRP_BUS_DEV_FUNC_6 DEFINE <0, 0, 0E7h>
+
+ SYSTEM_SLOT_INFO_7 DEFINE <J8B3, SYS_SLOT_PCI, DBW_32BIT, SCU_IN_USE, SL_SHORT_LENGTH, 6>
+ SYSTEM_SLOT_CHAR_7 DEFINE <SCH_33V, SCH_PME, SCH_SHARED>
+ SEGGRP_BUS_DEV_FUNC_7 DEFINE <0, 0, 0F0h>
+
+;----------------------------------------------------------------------------
+; Structure Type 10 : ON BOARD DEVICES INFORMATION
+;----------------------------------------------------------------------------
+; The following information is needed only if ONBOARD_DEVICE_INFO = Present
+; Syntax:
+; ONBOARD_DEVICE_1 DEFINE <Enabled or Disabled, Onboard Device Type, Descrition String>
+; * Onboard device status -> Describes the status(enabled/disabled) of on board device
+; * On board device Type -> Video, Audio, SCSI etc...
+; For more detail search for On-board device
+; Type equates in structure Type 10, refer SMB.EQU
+; * Description String -> Describes the on board device.
+; e.g."Video", "Audio" etc..
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ ONBOARD_DEVICE_1 DEFINE <ENABLED, OBD_VIDEO, To Be Filled By O.E.M.>
+ ONBOARD_DEVICE_2 DEFINE <ENABLED, OBD_ETHERNET,To Be Filled By O.E.M.>
+ ONBOARD_DEVICE_3 DEFINE <ENABLED, OBD_OTHER, Onboard 1394>
+
+;----------------------------------------------------------------------------
+; Structure Type 11 : OEM STRINGS INFORMATION
+;----------------------------------------------------------------------------
+; The following information is needed only if OEM_STRING_INFO = Present
+; Syntax:
+; OEM_STRING_1 DEFINE <String>
+; * String -> Identifies the OEM specific string.
+; e.g. "SMBIOS2.3 support with HP extension"
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+IFDEF MKF_OEM_STRING_INFO
+IF (MKF_OEM_STRING_INFO NE 0)
+ OEM_STRING_1 DEFINE MKF_OEM_STRING_1
+ OEM_STRING_2 DEFINE MKF_OEM_STRING_2
+ OEM_STRING_3 DEFINE MKF_OEM_STRING_3
+ OEM_STRING_4 DEFINE MKF_OEM_STRING_4
+ OEM_STRING_5 DEFINE MKF_OEM_STRING_5
+ OEM_STRING_6 DEFINE MKF_OEM_STRING_6
+ENDIF
+ENDIF
+
+;----------------------------------------------------------------------------
+; Structure Type 12 : SYSTEM CONFIGURATION STRINGS INFORMATION
+;----------------------------------------------------------------------------
+; The following information is needed only if SYSTEM_CONFIG_OPTION_INFO = Present
+; Syntax:
+; SYSTEM_CONFIG_STRING_1 DEFINE <String>
+; * String -> Identifies the System Configuration Information string
+; e.g. Jumper setting information on platform and etc...
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+;!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
+;!!!!!!!!!!!!!!!! MAKE SURE THE DESCRIPTION DOES NOT EXCEED 64 CHARACTERS !!!!!!!!!!!!!!!!!!!!!!!!!!!
+;!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
+;; < 1 2 3 4 5 6 >
+;; <0123456789012345678901234567890123456789012345678901234567890123>
+IFDEF MKF_SYSTEM_CONFIG_OPTION_INFO
+IF (MKF_SYSTEM_CONFIG_OPTION_INFO NE 0)
+ SYSTEM_CONFIG_STRING_1 DEFINE MKF_SYSTEM_CONFIG_STRING_1
+ SYSTEM_CONFIG_STRING_2 DEFINE MKF_SYSTEM_CONFIG_STRING_2
+ SYSTEM_CONFIG_STRING_3 DEFINE MKF_SYSTEM_CONFIG_STRING_3
+ SYSTEM_CONFIG_STRING_4 DEFINE MKF_SYSTEM_CONFIG_STRING_4
+ SYSTEM_CONFIG_STRING_5 DEFINE MKF_SYSTEM_CONFIG_STRING_5
+ENDIF
+ENDIF
+
+;----------------------------------------------------------------------------
+; Structure Type 14: GROUP ASSOCIATION INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 15: EVENT LOG INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 16: PHYSICAL MEMORY ARRAY INFORMATION
+;----------------------------------------------------------------------------
+; Syntax:
+; ARRAY_LOC_1 DEFINE <Memory Array Location>
+; * Memory Array Location -> 01h = Other
+; 02h = Unknown
+; 03h = System Board or Motherboard
+; 04h = ISA add-on card
+; 05h = EISA add-on card
+; 06h = PCI add-on card
+; 07h = MCA add-on card
+; 08h = PCMCIA add-on card
+; 09h = Proprietary add-on card
+; 0Ah = NuBus
+; A0h = PC-98/C20 add-on card
+; A1h = PC-98/C24 add-on card
+; A2h = PC-98/E add-on card
+; A3h = PC-98/Local Bus add-on card
+; ARRAY_USE_1 DEFINE <Memory Array Use>
+; * Memory Array Use -> 01h = Other
+; 02h = Unknown
+; 03h = System memory
+; 04h = Video memory
+; 05h = Flash memory
+; 06h = Non-volatile RAM
+; 07h = Cache memory
+; ARRAY_ERROR_COR_1 DEFINE <Memory Array Error Corection Types>
+; * Memory Array Error Corection Types -> 01h = Other
+; 02h = Unknown
+; 03h = None
+; 04h = Parity
+; 05h = Single-bit ECC
+; 06h = Multi-bit ECC
+; 07h = CRC
+; MAX_MEM_CAP_1 DEFINE <Maximum Capacity>
+; * Maximum Capacity -> XXXXXXXXh = Maximum memory capacity in kilobytes
+; 80000000h = unknown
+; EXT_MAX_MEM_CAP_1 DEFINE <Extended Maximum Capacity> - Valid only when MAX_MEM_CAP_X = 80000000h
+; * Extended Maximum Capacity -> XXXXXXXXXXXXXXXXh = Maximum memory capacity in bytes
+; (when MAX_MEM_CAP_X = 80000000h)
+; 0h = When MAX_MEM_CAP_X <> 80000000h
+;----------------------------------------------------------------------------
+ ARRAY_LOC_1 DEFINE <03h>
+ ARRAY_LOC_2 DEFINE <03h>
+ ARRAY_LOC_3 DEFINE <03h>
+ ARRAY_LOC_4 DEFINE <03h>
+ ARRAY_LOC_5 DEFINE <03h>
+
+ ARRAY_USE_1 DEFINE <03h>
+ ARRAY_USE_2 DEFINE <03h>
+ ARRAY_USE_3 DEFINE <03h>
+ ARRAY_USE_4 DEFINE <03h>
+ ARRAY_USE_5 DEFINE <03h>
+
+ ARRAY_ERROR_COR_1 DEFINE <03h>
+ ARRAY_ERROR_COR_2 DEFINE <03h>
+ ARRAY_ERROR_COR_3 DEFINE <03h>
+ ARRAY_ERROR_COR_4 DEFINE <03h>
+ ARRAY_ERROR_COR_5 DEFINE <03h>
+
+ MAX_MEM_CAP_1 DEFINE <00800000h>
+ MAX_MEM_CAP_2 DEFINE <00800000h>
+ MAX_MEM_CAP_3 DEFINE <00800000h>
+ MAX_MEM_CAP_4 DEFINE <00800000h>
+ MAX_MEM_CAP_5 DEFINE <00800000h>
+
+ EXT_MAX_MEM_CAP_1 DEFINE <0>
+ EXT_MAX_MEM_CAP_2 DEFINE <0>
+ EXT_MAX_MEM_CAP_3 DEFINE <0>
+ EXT_MAX_MEM_CAP_4 DEFINE <0>
+ EXT_MAX_MEM_CAP_5 DEFINE <0>
+
+;----------------------------------------------------------------------------
+; Structure Type 17: MEMORY DEVICE INFORMATION
+;----------------------------------------------------------------------------
+; Syntax:
+; A1_DATAWIDTH -> Identifies the data width, in bits, of this
+; momory device
+;
+; A1_FORMFACTOR -> Byte value - identifies the form factor of this
+; memory device
+; 01h = Other
+; 02h = Unknown
+; 03h = SIMM
+; 04h = SIP
+; 05h = Chip
+; 06h = DIP
+; 07h = ZIP
+; 08h = Proprietary Card
+; 09h = DIMM
+; 0Ah = TSOP
+; 0Bh = Rows of chips
+; 0Ch = RIMM
+; 0Dh = SODIMM
+; 0Eh = SRIMM
+; 0Fh = FB-DIMM
+;
+; A1_MEMORYTYPE -> Identifies the type of memory used in this device
+; 01h = Other
+; 02h = Unknown
+; 03h = DRAM
+; 04h = EDRAM
+; 05h = VRAM
+; 06h = SRAM
+; 07h = RAM
+; 08h = ROM
+; 09h = FLASH
+; 0Ah = EEPROM
+; 0Bh = FEPROM
+; 0Ch = EPROM
+; 0Dh = CDRAM
+; 0Eh = 3DRAM
+; 0Fh = SDRAM
+; 10h = SGRAM
+; 11h = RDRAM
+; 12h = DDR
+; 13h = DDR2
+; 14h = DDR2 FB-DIMM
+; 18h = DDR3
+; 19h = FBD2
+;
+; A1_TYPEDETAIL -> Additional detail on the memory device type.
+; Multiple bits are set if more than one attributes applies
+; Bit 0 - Reserved, set to 0
+; Bit 1 - Other
+; Bit 2 - Unknown
+; Bit 3 - Fast-paged
+; Bit 4 - Static Column
+; Bit 5 - Pseudo-static
+; Bit 6 - RAMBUS
+; Bit 7 - Synchronous
+; Bit 8 - CMOS
+; Bit 9 - EDO
+; Bit 10 - Window DRAM
+; Bit 11 - Cache DRAM
+; Bit 12 - Non-volatile
+; Bit 13 - Registered (Buffered)
+; Bit 14 - Unbuffered (Unregistered)
+; Bit 15 - LRDIMM
+;
+; A1_ATTRIBUTES -> Attributes.
+; Bits 3-0: Rank (value = 0 for unknown)
+; Bits 7-4: Reserved
+;
+; A1_DEVICE_1 DEFINE <Device Locator String, Bank Locator String, Manufacturer String,
+; Serial Number String, Asset Tag String, Part Number String>
+;
+; * A1_DEVICE_1 Memory array #1, Device #1
+; * Device Locator String -> Identifies the physically-labeled socket or board position where
+; the memory device is located.
+; e.g."DIMM0"
+; * Bank Locator String -> Identifies the physically-labeled bank where the memory device is located.
+; e.g."BANK0"
+; * Manufacturer String -> Identifies the manufacturer of this memory device
+; * Serial Number String -> Identifies the serial number of this memory device
+; * Asset Tag String -> Identifies the Asset Tag String of this memory device
+; * Part Number String -> Identifies the part number of this memory device
+;----------------------------------------------------------------------------
+
+;Number of device info structurs are equal to the no of memory modules specified.
+;!!PORT!!
+
+; Memory Array #1
+ A1_DATAWIDTH EQU 0040h
+ A1_FORMFACTOR EQU 09h
+ A1_MEMORYTYPE EQU 13h
+ A1_TYPEDETAIL EQU 0080h
+ A1_ATTRIBUTES EQU 0
+
+ A1_DEVICE_1 DEFINE <A1_DIMM0,A1_BANK0,A1_Manufacturer0,A1_SerNum0,A1_AssetTagNum0,Array1_PartNumber0>
+ A1_DEVICE_2 DEFINE <A1_DIMM1,A1_BANK1,A1_Manufacturer1,A1_SerNum1,A1_AssetTagNum1,Array1_PartNumber1>
+ A1_DEVICE_3 DEFINE <A1_DIMM2,A1_BANK2,A1_Manufacturer2,A1_SerNum2,A1_AssetTagNum2,Array1_PartNumber2>
+ A1_DEVICE_4 DEFINE <A1_DIMM3,A1_BANK3,A1_Manufacturer3,A1_SerNum3,A1_AssetTagNum3,Array1_PartNumber3>
+ A1_DEVICE_5 DEFINE <A1_DIMM4,A1_BANK4,A1_Manufacturer4,A1_SerNum4,A1_AssetTagNum4,Array1_PartNumber4>
+ A1_DEVICE_6 DEFINE <A1_DIMM5,A1_BANK5,A1_Manufacturer5,A1_SerNum5,A1_AssetTagNum5,Array1_PartNumber5>
+ A1_DEVICE_7 DEFINE <A1_DIMM6,A1_BANK6,A1_Manufacturer6,A1_SerNum6,A1_AssetTagNum6,Array1_PartNumber6>
+ A1_DEVICE_8 DEFINE <A1_DIMM7,A1_BANK7,A1_Manufacturer7,A1_SerNum7,A1_AssetTagNum7,Array1_PartNumber7>
+ A1_DEVICE_9 DEFINE <A1_DIMM8,A1_BANK8,A1_Manufacturer8,A1_SerNum8,A1_AssetTagNum8,Array1_PartNumber8>
+ A1_DEVICE_10 DEFINE <A1_DIMM9,A1_BANK9,A1_Manufacturer9,A1_SerNum9,A1_AssetTagNum9,Array1_PartNumber9>
+ A1_DEVICE_11 DEFINE <A1_DIMM10,A1_BANK10,A1_Manufacturer10,A1_SerNum10,A1_AssetTagNum10,Array1_PartNumber10>
+ A1_DEVICE_12 DEFINE <A1_DIMM11,A1_BANK11,A1_Manufacturer11,A1_SerNum11,A1_AssetTagNum11,Array1_PartNumber11>
+ A1_DEVICE_13 DEFINE <A1_DIMM12,A1_BANK12,A1_Manufacturer12,A1_SerNum12,A1_AssetTagNum12,Array1_PartNumber12>
+ A1_DEVICE_14 DEFINE <A1_DIMM13,A1_BANK13,A1_Manufacturer13,A1_SerNum13,A1_AssetTagNum13,Array1_PartNumber13>
+ A1_DEVICE_15 DEFINE <A1_DIMM14,A1_BANK14,A1_Manufacturer14,A1_SerNum14,A1_AssetTagNum14,Array1_PartNumber14>
+ A1_DEVICE_16 DEFINE <A1_DIMM15,A1_BANK15,A1_Manufacturer15,A1_SerNum15,A1_AssetTagNum15,Array1_PartNumber15>
+ A1_DEVICE_17 DEFINE <A1_DIMM16,A1_BANK16,A1_Manufacturer16,A1_SerNum16,A1_AssetTagNum16,Array1_PartNumber16>
+ A1_DEVICE_18 DEFINE <A1_DIMM17,A1_BANK17,A1_Manufacturer17,A1_SerNum17,A1_AssetTagNum17,Array1_PartNumber17>
+ A1_DEVICE_19 DEFINE <A1_DIMM18,A1_BANK18,A1_Manufacturer18,A1_SerNum18,A1_AssetTagNum18,Array1_PartNumber18>
+ A1_DEVICE_20 DEFINE <A1_DIMM19,A1_BANK19,A1_Manufacturer19,A1_SerNum19,A1_AssetTagNum19,Array1_PartNumber19>
+ A1_DEVICE_21 DEFINE <A1_DIMM20,A1_BANK20,A1_Manufacturer20,A1_SerNum20,A1_AssetTagNum20,Array1_PartNumber20>
+ A1_DEVICE_22 DEFINE <A1_DIMM21,A1_BANK21,A1_Manufacturer21,A1_SerNum21,A1_AssetTagNum21,Array1_PartNumber21>
+ A1_DEVICE_23 DEFINE <A1_DIMM22,A1_BANK22,A1_Manufacturer22,A1_SerNum22,A1_AssetTagNum22,Array1_PartNumber22>
+ A1_DEVICE_24 DEFINE <A1_DIMM23,A1_BANK23,A1_Manufacturer23,A1_SerNum23,A1_AssetTagNum23,Array1_PartNumber23>
+ A1_DEVICE_25 DEFINE <A1_DIMM24,A1_BANK24,A1_Manufacturer24,A1_SerNum24,A1_AssetTagNum24,Array1_PartNumber24>
+ A1_DEVICE_26 DEFINE <A1_DIMM25,A1_BANK25,A1_Manufacturer25,A1_SerNum25,A1_AssetTagNum25,Array1_PartNumber25>
+ A1_DEVICE_27 DEFINE <A1_DIMM26,A1_BANK26,A1_Manufacturer26,A1_SerNum26,A1_AssetTagNum26,Array1_PartNumber26>
+ A1_DEVICE_28 DEFINE <A1_DIMM27,A1_BANK27,A1_Manufacturer27,A1_SerNum27,A1_AssetTagNum27,Array1_PartNumber27>
+ A1_DEVICE_29 DEFINE <A1_DIMM28,A1_BANK28,A1_Manufacturer28,A1_SerNum28,A1_AssetTagNum28,Array1_PartNumber28>
+ A1_DEVICE_30 DEFINE <A1_DIMM29,A1_BANK29,A1_Manufacturer29,A1_SerNum29,A1_AssetTagNum29,Array1_PartNumber29>
+ A1_DEVICE_31 DEFINE <A1_DIMM30,A1_BANK30,A1_Manufacturer30,A1_SerNum30,A1_AssetTagNum30,Array1_PartNumber30>
+ A1_DEVICE_32 DEFINE <A1_DIMM31,A1_BANK31,A1_Manufacturer31,A1_SerNum31,A1_AssetTagNum31,Array1_PartNumber31>
+
+; Memory Array #2
+ A2_DATAWIDTH EQU 0040h
+ A2_FORMFACTOR EQU 09h
+ A2_MEMORYTYPE EQU 13h
+ A2_TYPEDETAIL EQU 0080h
+ A2_ATTRIBUTES EQU 0
+
+ A2_DEVICE_1 DEFINE <A2_DIMM0,A2_BANK0,A2_Manufacturer0,A2_SerNum0,A2_AssetTagNum0,Array2_PartNumber0>
+ A2_DEVICE_2 DEFINE <A2_DIMM1,A2_BANK1,A2_Manufacturer1,A2_SerNum1,A2_AssetTagNum1,Array2_PartNumber1>
+ A2_DEVICE_3 DEFINE <A2_DIMM2,A2_BANK2,A2_Manufacturer2,A2_SerNum2,A2_AssetTagNum2,Array2_PartNumber2>
+ A2_DEVICE_4 DEFINE <A2_DIMM3,A2_BANK3,A2_Manufacturer3,A2_SerNum3,A2_AssetTagNum3,Array2_PartNumber3>
+ A2_DEVICE_5 DEFINE <A2_DIMM4,A2_BANK4,A2_Manufacturer4,A2_SerNum4,A2_AssetTagNum4,Array2_PartNumber4>
+ A2_DEVICE_6 DEFINE <A2_DIMM5,A2_BANK5,A2_Manufacturer5,A2_SerNum5,A2_AssetTagNum5,Array2_PartNumber5>
+ A2_DEVICE_7 DEFINE <A2_DIMM6,A2_BANK6,A2_Manufacturer6,A2_SerNum6,A2_AssetTagNum6,Array2_PartNumber6>
+ A2_DEVICE_8 DEFINE <A2_DIMM7,A2_BANK7,A2_Manufacturer7,A2_SerNum7,A2_AssetTagNum7,Array2_PartNumber7>
+ A2_DEVICE_9 DEFINE <A2_DIMM8,A2_BANK8,A2_Manufacturer8,A2_SerNum8,A2_AssetTagNum8,Array2_PartNumber8>
+ A2_DEVICE_10 DEFINE <A2_DIMM9,A2_BANK9,A2_Manufacturer9,A2_SerNum9,A2_AssetTagNum9,Array2_PartNumber9>
+ A2_DEVICE_11 DEFINE <A2_DIMM10,A2_BANK10,A2_Manufacturer10,A2_SerNum10,A2_AssetTagNum10,Array2_PartNumber10>
+ A2_DEVICE_12 DEFINE <A2_DIMM11,A2_BANK11,A2_Manufacturer11,A2_SerNum11,A2_AssetTagNum11,Array2_PartNumber11>
+ A2_DEVICE_13 DEFINE <A2_DIMM12,A2_BANK12,A2_Manufacturer12,A2_SerNum12,A2_AssetTagNum12,Array2_PartNumber12>
+ A2_DEVICE_14 DEFINE <A2_DIMM13,A2_BANK13,A2_Manufacturer13,A2_SerNum13,A2_AssetTagNum13,Array2_PartNumber13>
+ A2_DEVICE_15 DEFINE <A2_DIMM14,A2_BANK14,A2_Manufacturer14,A2_SerNum14,A2_AssetTagNum14,Array2_PartNumber14>
+ A2_DEVICE_16 DEFINE <A2_DIMM15,A2_BANK15,A2_Manufacturer15,A2_SerNum15,A2_AssetTagNum15,Array2_PartNumber15>
+ A2_DEVICE_17 DEFINE <A2_DIMM16,A2_BANK16,A2_Manufacturer16,A2_SerNum16,A2_AssetTagNum16,Array2_PartNumber16>
+ A2_DEVICE_18 DEFINE <A2_DIMM17,A2_BANK17,A2_Manufacturer17,A2_SerNum17,A2_AssetTagNum17,Array2_PartNumber17>
+ A2_DEVICE_19 DEFINE <A2_DIMM18,A2_BANK18,A2_Manufacturer18,A2_SerNum18,A2_AssetTagNum18,Array2_PartNumber18>
+ A2_DEVICE_20 DEFINE <A2_DIMM19,A2_BANK19,A2_Manufacturer19,A2_SerNum19,A2_AssetTagNum19,Array2_PartNumber19>
+ A2_DEVICE_21 DEFINE <A2_DIMM20,A2_BANK20,A2_Manufacturer20,A2_SerNum20,A2_AssetTagNum20,Array2_PartNumber20>
+ A2_DEVICE_22 DEFINE <A2_DIMM21,A2_BANK21,A2_Manufacturer21,A2_SerNum21,A2_AssetTagNum21,Array2_PartNumber21>
+ A2_DEVICE_23 DEFINE <A2_DIMM22,A2_BANK22,A2_Manufacturer22,A2_SerNum22,A2_AssetTagNum22,Array2_PartNumber22>
+ A2_DEVICE_24 DEFINE <A2_DIMM23,A2_BANK23,A2_Manufacturer23,A2_SerNum23,A2_AssetTagNum23,Array2_PartNumber23>
+ A2_DEVICE_25 DEFINE <A2_DIMM24,A2_BANK24,A2_Manufacturer24,A2_SerNum24,A2_AssetTagNum24,Array2_PartNumber24>
+ A2_DEVICE_26 DEFINE <A2_DIMM25,A2_BANK25,A2_Manufacturer25,A2_SerNum25,A2_AssetTagNum25,Array2_PartNumber25>
+ A2_DEVICE_27 DEFINE <A2_DIMM26,A2_BANK26,A2_Manufacturer26,A2_SerNum26,A2_AssetTagNum26,Array2_PartNumber26>
+ A2_DEVICE_28 DEFINE <A2_DIMM27,A2_BANK27,A2_Manufacturer27,A2_SerNum27,A2_AssetTagNum27,Array2_PartNumber27>
+ A2_DEVICE_29 DEFINE <A2_DIMM28,A2_BANK28,A2_Manufacturer28,A2_SerNum28,A2_AssetTagNum28,Array2_PartNumber28>
+ A2_DEVICE_30 DEFINE <A2_DIMM29,A2_BANK29,A2_Manufacturer29,A2_SerNum29,A2_AssetTagNum29,Array2_PartNumber29>
+ A2_DEVICE_31 DEFINE <A2_DIMM30,A2_BANK30,A2_Manufacturer30,A2_SerNum30,A2_AssetTagNum30,Array2_PartNumber30>
+ A2_DEVICE_32 DEFINE <A2_DIMM31,A2_BANK31,A2_Manufacturer31,A2_SerNum31,A2_AssetTagNum31,Array2_PartNumber31>
+
+; Memory Array #3
+ A3_DATAWIDTH EQU 0040h
+ A3_FORMFACTOR EQU 09h
+ A3_MEMORYTYPE EQU 13h
+ A3_TYPEDETAIL EQU 0080h
+ A3_ATTRIBUTES EQU 0
+
+ A3_DEVICE_1 DEFINE <A3_DIMM0,A3_BANK0,A3_Manufacturer0,A3_SerNum0,A3_AssetTagNum0,Array3_PartNumber0>
+ A3_DEVICE_2 DEFINE <A3_DIMM1,A3_BANK1,A3_Manufacturer1,A3_SerNum1,A3_AssetTagNum1,Array3_PartNumber1>
+ A3_DEVICE_3 DEFINE <A3_DIMM2,A3_BANK2,A3_Manufacturer2,A3_SerNum2,A3_AssetTagNum2,Array3_PartNumber2>
+ A3_DEVICE_4 DEFINE <A3_DIMM3,A3_BANK3,A3_Manufacturer3,A3_SerNum3,A3_AssetTagNum3,Array3_PartNumber3>
+ A3_DEVICE_5 DEFINE <A3_DIMM4,A3_BANK4,A3_Manufacturer4,A3_SerNum4,A3_AssetTagNum4,Array3_PartNumber4>
+ A3_DEVICE_6 DEFINE <A3_DIMM5,A3_BANK5,A3_Manufacturer5,A3_SerNum5,A3_AssetTagNum5,Array3_PartNumber5>
+ A3_DEVICE_7 DEFINE <A3_DIMM6,A3_BANK6,A3_Manufacturer6,A3_SerNum6,A3_AssetTagNum6,Array3_PartNumber6>
+ A3_DEVICE_8 DEFINE <A3_DIMM7,A3_BANK7,A3_Manufacturer7,A3_SerNum7,A3_AssetTagNum7,Array3_PartNumber7>
+ A3_DEVICE_9 DEFINE <A3_DIMM8,A3_BANK8,A3_Manufacturer8,A3_SerNum8,A3_AssetTagNum8,Array3_PartNumber8>
+ A3_DEVICE_10 DEFINE <A3_DIMM9,A3_BANK9,A3_Manufacturer9,A3_SerNum9,A3_AssetTagNum9,Array3_PartNumber9>
+ A3_DEVICE_11 DEFINE <A3_DIMM10,A3_BANK10,A3_Manufacturer10,A3_SerNum10,A3_AssetTagNum10,Array3_PartNumber10>
+ A3_DEVICE_12 DEFINE <A3_DIMM11,A3_BANK11,A3_Manufacturer11,A3_SerNum11,A3_AssetTagNum11,Array3_PartNumber11>
+ A3_DEVICE_13 DEFINE <A3_DIMM12,A3_BANK12,A3_Manufacturer12,A3_SerNum12,A3_AssetTagNum12,Array3_PartNumber12>
+ A3_DEVICE_14 DEFINE <A3_DIMM13,A3_BANK13,A3_Manufacturer13,A3_SerNum13,A3_AssetTagNum13,Array3_PartNumber13>
+ A3_DEVICE_15 DEFINE <A3_DIMM14,A3_BANK14,A3_Manufacturer14,A3_SerNum14,A3_AssetTagNum14,Array3_PartNumber14>
+ A3_DEVICE_16 DEFINE <A3_DIMM15,A3_BANK15,A3_Manufacturer15,A3_SerNum15,A3_AssetTagNum15,Array3_PartNumber15>
+ A3_DEVICE_17 DEFINE <A3_DIMM16,A3_BANK16,A3_Manufacturer16,A3_SerNum16,A3_AssetTagNum16,Array3_PartNumber16>
+ A3_DEVICE_18 DEFINE <A3_DIMM17,A3_BANK17,A3_Manufacturer17,A3_SerNum17,A3_AssetTagNum17,Array3_PartNumber17>
+ A3_DEVICE_19 DEFINE <A3_DIMM18,A3_BANK18,A3_Manufacturer18,A3_SerNum18,A3_AssetTagNum18,Array3_PartNumber18>
+ A3_DEVICE_20 DEFINE <A3_DIMM19,A3_BANK19,A3_Manufacturer19,A3_SerNum19,A3_AssetTagNum19,Array3_PartNumber19>
+ A3_DEVICE_21 DEFINE <A3_DIMM20,A3_BANK20,A3_Manufacturer20,A3_SerNum20,A3_AssetTagNum20,Array3_PartNumber20>
+ A3_DEVICE_22 DEFINE <A3_DIMM21,A3_BANK21,A3_Manufacturer21,A3_SerNum21,A3_AssetTagNum21,Array3_PartNumber21>
+ A3_DEVICE_23 DEFINE <A3_DIMM22,A3_BANK22,A3_Manufacturer22,A3_SerNum22,A3_AssetTagNum22,Array3_PartNumber22>
+ A3_DEVICE_24 DEFINE <A3_DIMM23,A3_BANK23,A3_Manufacturer23,A3_SerNum23,A3_AssetTagNum23,Array3_PartNumber23>
+ A3_DEVICE_25 DEFINE <A3_DIMM24,A3_BANK24,A3_Manufacturer24,A3_SerNum24,A3_AssetTagNum24,Array3_PartNumber24>
+ A3_DEVICE_26 DEFINE <A3_DIMM25,A3_BANK25,A3_Manufacturer25,A3_SerNum25,A3_AssetTagNum25,Array3_PartNumber25>
+ A3_DEVICE_27 DEFINE <A3_DIMM26,A3_BANK26,A3_Manufacturer26,A3_SerNum26,A3_AssetTagNum26,Array3_PartNumber26>
+ A3_DEVICE_28 DEFINE <A3_DIMM27,A3_BANK27,A3_Manufacturer27,A3_SerNum27,A3_AssetTagNum27,Array3_PartNumber27>
+ A3_DEVICE_29 DEFINE <A3_DIMM28,A3_BANK28,A3_Manufacturer28,A3_SerNum28,A3_AssetTagNum28,Array3_PartNumber28>
+ A3_DEVICE_30 DEFINE <A3_DIMM29,A3_BANK29,A3_Manufacturer29,A3_SerNum29,A3_AssetTagNum29,Array3_PartNumber29>
+ A3_DEVICE_31 DEFINE <A3_DIMM30,A3_BANK30,A3_Manufacturer30,A3_SerNum30,A3_AssetTagNum30,Array3_PartNumber30>
+ A3_DEVICE_32 DEFINE <A3_DIMM31,A3_BANK31,A3_Manufacturer31,A3_SerNum31,A3_AssetTagNum31,Array3_PartNumber31>
+
+; Memory Array #4
+ A4_DATAWIDTH EQU 0040h
+ A4_FORMFACTOR EQU 09h
+ A4_MEMORYTYPE EQU 13h
+ A4_TYPEDETAIL EQU 0080h
+ A4_ATTRIBUTES EQU 0
+
+ A4_DEVICE_1 DEFINE <A4_DIMM0,A4_BANK0,A4_Manufacturer0,A4_SerNum0,A4_AssetTagNum0,Array4_PartNumber0>
+ A4_DEVICE_2 DEFINE <A4_DIMM1,A4_BANK1,A4_Manufacturer1,A4_SerNum1,A4_AssetTagNum1,Array4_PartNumber1>
+ A4_DEVICE_3 DEFINE <A4_DIMM2,A4_BANK2,A4_Manufacturer2,A4_SerNum2,A4_AssetTagNum2,Array4_PartNumber2>
+ A4_DEVICE_4 DEFINE <A4_DIMM3,A4_BANK3,A4_Manufacturer3,A4_SerNum3,A4_AssetTagNum3,Array4_PartNumber3>
+ A4_DEVICE_5 DEFINE <A4_DIMM4,A4_BANK4,A4_Manufacturer4,A4_SerNum4,A4_AssetTagNum4,Array4_PartNumber4>
+ A4_DEVICE_6 DEFINE <A4_DIMM5,A4_BANK5,A4_Manufacturer5,A4_SerNum5,A4_AssetTagNum5,Array4_PartNumber5>
+ A4_DEVICE_7 DEFINE <A4_DIMM6,A4_BANK6,A4_Manufacturer6,A4_SerNum6,A4_AssetTagNum6,Array4_PartNumber6>
+ A4_DEVICE_8 DEFINE <A4_DIMM7,A4_BANK7,A4_Manufacturer7,A4_SerNum7,A4_AssetTagNum7,Array4_PartNumber7>
+ A4_DEVICE_9 DEFINE <A4_DIMM8,A4_BANK8,A4_Manufacturer8,A4_SerNum8,A4_AssetTagNum8,Array4_PartNumber8>
+ A4_DEVICE_10 DEFINE <A4_DIMM9,A4_BANK9,A4_Manufacturer9,A4_SerNum9,A4_AssetTagNum9,Array4_PartNumber9>
+ A4_DEVICE_11 DEFINE <A4_DIMM10,A4_BANK10,A4_Manufacturer10,A4_SerNum10,A4_AssetTagNum10,Array4_PartNumber10>
+ A4_DEVICE_12 DEFINE <A4_DIMM11,A4_BANK11,A4_Manufacturer11,A4_SerNum11,A4_AssetTagNum11,Array4_PartNumber11>
+ A4_DEVICE_13 DEFINE <A4_DIMM12,A4_BANK12,A4_Manufacturer12,A4_SerNum12,A4_AssetTagNum12,Array4_PartNumber12>
+ A4_DEVICE_14 DEFINE <A4_DIMM13,A4_BANK13,A4_Manufacturer13,A4_SerNum13,A4_AssetTagNum13,Array4_PartNumber13>
+ A4_DEVICE_15 DEFINE <A4_DIMM14,A4_BANK14,A4_Manufacturer14,A4_SerNum14,A4_AssetTagNum14,Array4_PartNumber14>
+ A4_DEVICE_16 DEFINE <A4_DIMM15,A4_BANK15,A4_Manufacturer15,A4_SerNum15,A4_AssetTagNum15,Array4_PartNumber15>
+ A4_DEVICE_17 DEFINE <A4_DIMM16,A4_BANK16,A4_Manufacturer16,A4_SerNum16,A4_AssetTagNum16,Array4_PartNumber16>
+ A4_DEVICE_18 DEFINE <A4_DIMM17,A4_BANK17,A4_Manufacturer17,A4_SerNum17,A4_AssetTagNum17,Array4_PartNumber17>
+ A4_DEVICE_19 DEFINE <A4_DIMM18,A4_BANK18,A4_Manufacturer18,A4_SerNum18,A4_AssetTagNum18,Array4_PartNumber18>
+ A4_DEVICE_20 DEFINE <A4_DIMM19,A4_BANK19,A4_Manufacturer19,A4_SerNum19,A4_AssetTagNum19,Array4_PartNumber19>
+ A4_DEVICE_21 DEFINE <A4_DIMM20,A4_BANK20,A4_Manufacturer20,A4_SerNum20,A4_AssetTagNum20,Array4_PartNumber20>
+ A4_DEVICE_22 DEFINE <A4_DIMM21,A4_BANK21,A4_Manufacturer21,A4_SerNum21,A4_AssetTagNum21,Array4_PartNumber21>
+ A4_DEVICE_23 DEFINE <A4_DIMM22,A4_BANK22,A4_Manufacturer22,A4_SerNum22,A4_AssetTagNum22,Array4_PartNumber22>
+ A4_DEVICE_24 DEFINE <A4_DIMM23,A4_BANK23,A4_Manufacturer23,A4_SerNum23,A4_AssetTagNum23,Array4_PartNumber23>
+ A4_DEVICE_25 DEFINE <A4_DIMM24,A4_BANK24,A4_Manufacturer24,A4_SerNum24,A4_AssetTagNum24,Array4_PartNumber24>
+ A4_DEVICE_26 DEFINE <A4_DIMM25,A4_BANK25,A4_Manufacturer25,A4_SerNum25,A4_AssetTagNum25,Array4_PartNumber25>
+ A4_DEVICE_27 DEFINE <A4_DIMM26,A4_BANK26,A4_Manufacturer26,A4_SerNum26,A4_AssetTagNum26,Array4_PartNumber26>
+ A4_DEVICE_28 DEFINE <A4_DIMM27,A4_BANK27,A4_Manufacturer27,A4_SerNum27,A4_AssetTagNum27,Array4_PartNumber27>
+ A4_DEVICE_29 DEFINE <A4_DIMM28,A4_BANK28,A4_Manufacturer28,A4_SerNum28,A4_AssetTagNum28,Array4_PartNumber28>
+ A4_DEVICE_30 DEFINE <A4_DIMM29,A4_BANK29,A4_Manufacturer29,A4_SerNum29,A4_AssetTagNum29,Array4_PartNumber29>
+ A4_DEVICE_31 DEFINE <A4_DIMM30,A4_BANK30,A4_Manufacturer30,A4_SerNum30,A4_AssetTagNum30,Array4_PartNumber30>
+ A4_DEVICE_32 DEFINE <A4_DIMM31,A4_BANK31,A4_Manufacturer31,A4_SerNum31,A4_AssetTagNum31,Array4_PartNumber31>
+
+;----------------------------------------------------------------------------
+; Structure Type 18: MEMORY ERROR INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 19: MEMORY ARRAY MAPPED ADDRESS INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 20: MEMORY DEVICE MAPPED ADDRESS INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 21: BUILT-IN POINTING DEVICE INFORMATION
+;----------------------------------------------------------------------------
+; Syntax:
+; POINTING_DEVICE_TYPE_1 DEFINE <Pointing Device Type>
+; * Pointing Device Type -> 01h = Other
+; 02h = Unknown
+; 03h = Mouse
+; 04h = Track Ball
+; 05h = Track Point
+; 06h = Glide Point
+; 07h = Touch Pad
+; 08h = Touch Screen
+; 09h = Optical Sensor
+; POINTING_DEVICE_INTERFACE_1 DEFINE <Pointing Device Interface>
+; * Pointing Device Interface -> 01h = Other
+; 02h = Unknown
+; 03h = Serial
+; 04h = PS/2
+; 05h = Infrared
+; 06h = HP-HIL
+; 07h = Bus Mouse
+; 08h = ADB (Apple Desktop Bus)
+; A0h = Bus Mouse DB-9
+; A1h = Bus Mouse Micro-DIN
+; A2h = USB
+; POINTING_DEVICE_NUM_BUTTONS_1 DEFINE <Number of Buttons>
+;----------------------------------------------------------------------------
+ POINTING_DEVICE_TYPE_1 DEFINE <03h>
+ POINTING_DEVICE_TYPE_2 DEFINE <07h>
+ POINTING_DEVICE_TYPE_3 DEFINE <08h>
+ POINTING_DEVICE_TYPE_4 DEFINE <04h>
+ POINTING_DEVICE_TYPE_5 DEFINE <05h>
+
+ POINTING_DEVICE_INTERFACE_1 DEFINE <04h>
+ POINTING_DEVICE_INTERFACE_2 DEFINE <03h>
+ POINTING_DEVICE_INTERFACE_3 DEFINE <07h>
+ POINTING_DEVICE_INTERFACE_4 DEFINE <0A2h>
+ POINTING_DEVICE_INTERFACE_5 DEFINE <01h>
+
+ POINTING_DEVICE_NUM_BUTTONS_1 DEFINE <03h>
+ POINTING_DEVICE_NUM_BUTTONS_2 DEFINE <03h>
+ POINTING_DEVICE_NUM_BUTTONS_3 DEFINE <03h>
+ POINTING_DEVICE_NUM_BUTTONS_4 DEFINE <03h>
+ POINTING_DEVICE_NUM_BUTTONS_5 DEFINE <03h>
+
+;----------------------------------------------------------------------------
+; Structure Type 22: PORTABLE BATTERY INFORMATION
+;----------------------------------------------------------------------------
+; Syntax:
+; PORT_BAT_LOCATION_1 DEFINE <Location of the battery>
+; PORT_BAT_MANUFACTURER_1 DEFINE <Battery Manufacturer>
+; PORT_BAT_MANUFACTURE_DATE_1 DEFINE <Battery Manufacturer Date>
+; PORT_BAT_SERIAL_NUMBER_1 DEFINE <Battery Serial Number>
+; PORT_BAT_DEVICE_NAME_1 DEFINE <Battery Device Name>
+; DEVICE_CHEMISTRY_1 DEFINE <Battery Device Chemistry>
+; * Battery Device Chemistry -> 01h = Other
+; 02h = Unknown
+; 03h = Lead Acid
+; 04h = Nickel Cadmium
+; 05h = Nickel Metal Hydride
+; 06h = Lithium-ion
+; 07h = Zinc Air
+; 08h = Lithium Polymer
+; DESIGN_CAPACITY_1 DEFINE <Design Capacity of the Battery in mWatt-hours>
+; DESIGN_VOLTAGE_1 DEFINE <Design Voltage of the Battery in mVolts>
+; PORT_BAT_SBDS_VER_NO_1 DEFINE <Smart Battery Data Specification Version Number>
+; MAX_ERROR_IN_BAT_DATA_1 DEFINE <Maximum Error (as percentage in the range 0-100)>
+; PORT_BAT_SBDS_SERIAL_NO_1 DEFINE <16-bit value - Identifies battery's serial number>
+; PORT_BAT_SBDS_MAN_DATE_1 DEFINE <Cell Pack Manufacture Date>
+; * Cell Pack Manufacture Date -> Bits 15:9 Year, biased by 1980, in the range 0 to 127
+; Bits 8:5 Month, in the range 1 to 12
+; Bits 4:0 Date, in the range 1 to 31
+; PORT_BAT_SBDS_DEV_CHEM_1 DEFINE <Battery Chemistry>
+; DESIGN_CAPACITY_MULTIPLIER_1 DEFINE <Multiplication Factor of the Design Capacity>
+; OEM_SPECIFIC_1 DEFINE <OEM or BIOS Vendor-specific Information>
+;----------------------------------------------------------------------------
+IFDEF MKF_PORTABLE_BATTERY_INFO
+IF (MKF_PORTABLE_BATTERY_INFO NE 0)
+ PORT_BAT_LOCATION_1 DEFINE MKF_PORT_BAT_LOCATION_1
+ PORT_BAT_LOCATION_2 DEFINE MKF_PORT_BAT_LOCATION_2
+ PORT_BAT_LOCATION_3 DEFINE MKF_PORT_BAT_LOCATION_3
+ PORT_BAT_LOCATION_4 DEFINE MKF_PORT_BAT_LOCATION_4
+ PORT_BAT_LOCATION_5 DEFINE MKF_PORT_BAT_LOCATION_5
+
+ PORT_BAT_MANUFACTURER_1 DEFINE MKF_PORT_BAT_MANUFACTURER_1
+ PORT_BAT_MANUFACTURER_2 DEFINE MKF_PORT_BAT_MANUFACTURER_2
+ PORT_BAT_MANUFACTURER_3 DEFINE MKF_PORT_BAT_MANUFACTURER_3
+ PORT_BAT_MANUFACTURER_4 DEFINE MKF_PORT_BAT_MANUFACTURER_4
+ PORT_BAT_MANUFACTURER_5 DEFINE MKF_PORT_BAT_MANUFACTURER_5
+
+ PORT_BAT_MANUFACTURE_DATE_1 DEFINE MKF_PORT_BAT_MANUFACTURE_DATE_1
+ PORT_BAT_MANUFACTURE_DATE_2 DEFINE MKF_PORT_BAT_MANUFACTURE_DATE_2
+ PORT_BAT_MANUFACTURE_DATE_3 DEFINE MKF_PORT_BAT_MANUFACTURE_DATE_3
+ PORT_BAT_MANUFACTURE_DATE_4 DEFINE MKF_PORT_BAT_MANUFACTURE_DATE_4
+ PORT_BAT_MANUFACTURE_DATE_5 DEFINE MKF_PORT_BAT_MANUFACTURE_DATE_5
+
+ PORT_BAT_SERIAL_NUMBER_1 DEFINE MKF_PORT_BAT_SERIAL_NUMBER_1
+ PORT_BAT_SERIAL_NUMBER_2 DEFINE MKF_PORT_BAT_SERIAL_NUMBER_2
+ PORT_BAT_SERIAL_NUMBER_3 DEFINE MKF_PORT_BAT_SERIAL_NUMBER_3
+ PORT_BAT_SERIAL_NUMBER_4 DEFINE MKF_PORT_BAT_SERIAL_NUMBER_4
+ PORT_BAT_SERIAL_NUMBER_5 DEFINE MKF_PORT_BAT_SERIAL_NUMBER_5
+
+ PORT_BAT_DEVICE_NAME_1 DEFINE MKF_PORT_BAT_DEVICE_NAME_1
+ PORT_BAT_DEVICE_NAME_2 DEFINE MKF_PORT_BAT_DEVICE_NAME_2
+ PORT_BAT_DEVICE_NAME_3 DEFINE MKF_PORT_BAT_DEVICE_NAME_3
+ PORT_BAT_DEVICE_NAME_4 DEFINE MKF_PORT_BAT_DEVICE_NAME_4
+ PORT_BAT_DEVICE_NAME_5 DEFINE MKF_PORT_BAT_DEVICE_NAME_5
+
+ DEVICE_CHEMISTRY_1 DEFINE MKF_DEVICE_CHEMISTRY_1
+ DEVICE_CHEMISTRY_2 DEFINE MKF_DEVICE_CHEMISTRY_2
+ DEVICE_CHEMISTRY_3 DEFINE MKF_DEVICE_CHEMISTRY_3
+ DEVICE_CHEMISTRY_4 DEFINE MKF_DEVICE_CHEMISTRY_4
+ DEVICE_CHEMISTRY_5 DEFINE MKF_DEVICE_CHEMISTRY_5
+
+ DESIGN_CAPACITY_1 DEFINE MKF_DESIGN_CAPACITY_1
+ DESIGN_CAPACITY_2 DEFINE MKF_DESIGN_CAPACITY_2
+ DESIGN_CAPACITY_3 DEFINE MKF_DESIGN_CAPACITY_3
+ DESIGN_CAPACITY_4 DEFINE MKF_DESIGN_CAPACITY_4
+ DESIGN_CAPACITY_5 DEFINE MKF_DESIGN_CAPACITY_5
+
+ DESIGN_VOLTAGE_1 DEFINE MKF_DESIGN_VOLTAGE_1
+ DESIGN_VOLTAGE_2 DEFINE MKF_DESIGN_VOLTAGE_2
+ DESIGN_VOLTAGE_3 DEFINE MKF_DESIGN_VOLTAGE_3
+ DESIGN_VOLTAGE_4 DEFINE MKF_DESIGN_VOLTAGE_4
+ DESIGN_VOLTAGE_5 DEFINE MKF_DESIGN_VOLTAGE_5
+
+ PORT_BAT_SBDS_VER_NO_1 DEFINE MKF_PORT_BAT_SBDS_VER_NO_1
+ PORT_BAT_SBDS_VER_NO_2 DEFINE MKF_PORT_BAT_SBDS_VER_NO_2
+ PORT_BAT_SBDS_VER_NO_3 DEFINE MKF_PORT_BAT_SBDS_VER_NO_3
+ PORT_BAT_SBDS_VER_NO_4 DEFINE MKF_PORT_BAT_SBDS_VER_NO_4
+ PORT_BAT_SBDS_VER_NO_5 DEFINE MKF_PORT_BAT_SBDS_VER_NO_5
+
+ MAX_ERROR_IN_BAT_DATA_1 DEFINE MKF_MAX_ERROR_IN_BAT_DATA_1
+ MAX_ERROR_IN_BAT_DATA_2 DEFINE MKF_MAX_ERROR_IN_BAT_DATA_2
+ MAX_ERROR_IN_BAT_DATA_3 DEFINE MKF_MAX_ERROR_IN_BAT_DATA_3
+ MAX_ERROR_IN_BAT_DATA_4 DEFINE MKF_MAX_ERROR_IN_BAT_DATA_4
+ MAX_ERROR_IN_BAT_DATA_5 DEFINE MKF_MAX_ERROR_IN_BAT_DATA_5
+
+ PORT_BAT_SBDS_SERIAL_NO_1 DEFINE MKF_PORT_BAT_SBDS_SERIAL_NO_1
+ PORT_BAT_SBDS_SERIAL_NO_2 DEFINE MKF_PORT_BAT_SBDS_SERIAL_NO_2
+ PORT_BAT_SBDS_SERIAL_NO_3 DEFINE MKF_PORT_BAT_SBDS_SERIAL_NO_3
+ PORT_BAT_SBDS_SERIAL_NO_4 DEFINE MKF_PORT_BAT_SBDS_SERIAL_NO_4
+ PORT_BAT_SBDS_SERIAL_NO_5 DEFINE MKF_PORT_BAT_SBDS_SERIAL_NO_5
+
+ PORT_BAT_SBDS_MAN_DATE_1 DEFINE MKF_PORT_BAT_SBDS_MAN_DATE_1
+ PORT_BAT_SBDS_MAN_DATE_2 DEFINE MKF_PORT_BAT_SBDS_MAN_DATE_2
+ PORT_BAT_SBDS_MAN_DATE_3 DEFINE MKF_PORT_BAT_SBDS_MAN_DATE_3
+ PORT_BAT_SBDS_MAN_DATE_4 DEFINE MKF_PORT_BAT_SBDS_MAN_DATE_4
+ PORT_BAT_SBDS_MAN_DATE_5 DEFINE MKF_PORT_BAT_SBDS_MAN_DATE_5
+
+ PORT_BAT_SBDS_DEV_CHEM_1 DEFINE MKF_PORT_BAT_SBDS_DEV_CHEM_1
+ PORT_BAT_SBDS_DEV_CHEM_2 DEFINE MKF_PORT_BAT_SBDS_DEV_CHEM_2
+ PORT_BAT_SBDS_DEV_CHEM_3 DEFINE MKF_PORT_BAT_SBDS_DEV_CHEM_3
+ PORT_BAT_SBDS_DEV_CHEM_4 DEFINE MKF_PORT_BAT_SBDS_DEV_CHEM_4
+ PORT_BAT_SBDS_DEV_CHEM_5 DEFINE MKF_PORT_BAT_SBDS_DEV_CHEM_5
+
+ DESIGN_CAPACITY_MULTIPLIER_1 DEFINE MKF_DESIGN_CAPACITY_MULTIPLIER_1
+ DESIGN_CAPACITY_MULTIPLIER_2 DEFINE MKF_DESIGN_CAPACITY_MULTIPLIER_2
+ DESIGN_CAPACITY_MULTIPLIER_3 DEFINE MKF_DESIGN_CAPACITY_MULTIPLIER_3
+ DESIGN_CAPACITY_MULTIPLIER_4 DEFINE MKF_DESIGN_CAPACITY_MULTIPLIER_4
+ DESIGN_CAPACITY_MULTIPLIER_5 DEFINE MKF_DESIGN_CAPACITY_MULTIPLIER_5
+
+ OEM_SPECIFIC_1 DEFINE MKF_OEM_SPECIFIC_1
+ OEM_SPECIFIC_2 DEFINE MKF_OEM_SPECIFIC_2
+ OEM_SPECIFIC_3 DEFINE MKF_OEM_SPECIFIC_3
+ OEM_SPECIFIC_4 DEFINE MKF_OEM_SPECIFIC_4
+ OEM_SPECIFIC_5 DEFINE MKF_OEM_SPECIFIC_5
+ENDIF
+ENDIF
+
+;----------------------------------------------------------------------------
+; Structure Type 23: SYSTEM RESET INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; RESET_CAPABILITIES : Identifies the system reset capabilities for the system
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ RESET_CAPABILITIES = 00h
+
+;----------------------------------------------------------------------------
+; RESET_COUNT : Identifies the number of automatic system resets since
+; the last intentional reset
+; FFFFh -> Unknown
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ RESET_COUNT = 0FFFFh
+
+;----------------------------------------------------------------------------
+; RESET_LIMIT : Identifies the number of consecutive times the system
+; reset will be attempted
+; FFFFh -> Unknown
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ RESET_LIMIT = 0FFFFh
+
+;----------------------------------------------------------------------------
+; RESET_TIMER_INTERVAL : Identifies the number of minutes to use for the
+; watchdog timer. If the timer is not reset within this
+; interval, the system reset timeout will begin.
+; FFFFh -> Unknown
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ RESET_TIMER_INTERVAL = 0FFFFh
+
+;----------------------------------------------------------------------------
+; RESET_TIMEOUT : identifies the number of minutes before the reboot is
+; initiated. It is used after a system power cycle,
+; system reset(local or remote), and automatic system reset.
+; FFFFh -> Unknown
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ RESET_TIMEOUT = 0FFFFh
+
+;----------------------------------------------------------------------------
+; Structure Type 24: HARDWARE SECURITY INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 25: SYSTEM POWER CONTROLS INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; NEXT_SCHEDULED_POWERON_MONTH : Contains the BCD value of the month on
+; which the next scheduled power-on is to occur
+; in the range of 01h to 12h.
+; Note: Any date or time field in the structure whose value is outside of
+; the field's specified range does not contribute to the total-seconds count.
+; e.g. if the month field contains the value 0xFF the next power-on is
+; scheduled to fall within the next month, perhaps on a specific
+; day-of-month and time.
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ NEXT_SCHEDULED_POWERON_MONTH = 0FFh
+
+;----------------------------------------------------------------------------
+; NEXT_SCHEDULED_POWERON_DAY_OF_MONTH : Contains the BCD value of the day_of_month on
+; which the next scheduled power-on is to occur
+; in the range of 01h to 31h.
+; Note: Any date or time field in the structure whose value is outside of
+; the field's specified range does not contribute to the total-seconds count.
+; e.g. if the month field contains the value 0xFF the next power-on is
+; scheduled to fall within the next month, perhaps on a specific
+; day-of-month and time.
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ NEXT_SCHEDULED_POWERON_DAY_OF_MONTH = 0FFh
+
+;----------------------------------------------------------------------------
+; NEXT_SCHEDULED_POWERON_HOUR : Contains the BCD value of the hour on
+; which the next scheduled power-on is to occur
+; in the range of 00h to 23h.
+; Note: Any date or time field in the structure whose value is outside of
+; the field's specified range does not contribute to the total-seconds count.
+; e.g. if the month field contains the value 0xFF the next power-on is
+; scheduled to fall within the next month, perhaps on a specific
+; day-of-month and time.
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ NEXT_SCHEDULED_POWERON_HOUR = 0FFh
+
+;----------------------------------------------------------------------------
+; NEXT_SCHEDULED_POWERON_MINUTE : Contains the BCD value of the minute on
+; which the next scheduled power-on is to occur
+; in the range of 00h to 59h.
+; Note: Any date or time field in the structure whose value is outside of
+; the field's specified range does not contribute to the total-seconds count.
+; e.g. if the month field contains the value 0xFF the next power-on is
+; scheduled to fall within the next month, perhaps on a specific
+; day-of-month and time.
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ NEXT_SCHEDULED_POWERON_MINUTE = 0FFh
+
+;----------------------------------------------------------------------------
+; NEXT_SCHEDULED_POWERON_SECOND : Contains the BCD value of the second on
+; which the next scheduled power-on is to occur
+; in the range of 00h to 59h.
+; Note: Any date or time field in the structure whose value is outside of
+; the field's specified range does not contribute to the total-seconds count.
+; e.g. if the month field contains the value 0xFF the next power-on is
+; scheduled to fall within the next month, perhaps on a specific
+; day-of-month and time.
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ NEXT_SCHEDULED_POWERON_SECOND = 0FFh
+
+;----------------------------------------------------------------------------
+; Structure Type 26: VOLTAGE PROBE INFORMATION
+;----------------------------------------------------------------------------
+
+; Syntax:
+; VOLTAGE_PROBE_INFO_1 DEFINE <Voltage Probe String, Location
+; and status, Maximum Value,
+; Minimum Value, Resolution, Tolerance,
+; Accuracy, Oem Defined, Nominal Value>
+; * Voltage Probe String -> Identifies the descriptive information
+; about the probe or its location
+; e.g."LM78A"
+; * Location and Status -> Defines the probe's physical location
+; and status of the voltage monitored by this
+; voltage probe
+; * Maximum Value -> The max. voltage level readable by
+; this probe in millivolt 0x8000h -> Unknown
+; * Mimimum Value -> The Min. voltage level readable by
+; this probe in millivolt 0x8000h -> Unknown
+; * Resoltion -> The resolution for the probe's
+; reading in tenths of millivolt 0x8000h->Unknown
+; * Tolerance -> The tolerance for reading from this
+; probe, in +/- millivolts. 0x8000h->Unknown
+; * Accuracy -> The accuracy for reading from this
+; probe, in +/- 1/100th of a percent
+; 0x8000h->Unknown
+; * OEM-Defined -> Contains OEM- or BIOS Vaendor specific information
+; * Nominal Value -> The nominal value for the probe's
+; reading in millivolts. 0x8000h -> Unknown
+; Note: Nominal Value field is valid only if structure length is more than 14h
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ NUMBER_OF_VOLTAGE_PROBE_ASSOCIATED_MGMT_DEV_1 = 1
+ NUMBER_OF_VOLTAGE_PROBE_ASSOCIATED_MGMT_DEV_2 = 2
+ NUMBER_OF_VOLTAGE_PROBE_ASSOCIATED_MGMT_DEV_3 = 3
+
+;!!PORT!!
+ VOLTAGE_PROBE_INFO_1_1 DEFINE <LM78A,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ VOLTAGE_PROBE_INFO_2_1 DEFINE <LM78B,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ VOLTAGE_PROBE_INFO_2_2 DEFINE <LM78B,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ VOLTAGE_PROBE_INFO_3_1 DEFINE <LM78C,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ VOLTAGE_PROBE_INFO_3_2 DEFINE <LM78C,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ VOLTAGE_PROBE_INFO_3_3 DEFINE <LM78C,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+
+;!!PORT!!
+ MANAGEMENT_DEV_VOLT_THRESHOLD_DATA_INFO_1_1 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_VOLT_THRESHOLD_DATA_INFO_2_1 DEFINE <07,08,08,0Ah,0Bh,0Ch>
+ MANAGEMENT_DEV_VOLT_THRESHOLD_DATA_INFO_2_2 DEFINE <0Dh,0Eh,0Fh,10h,11h,12h>
+ MANAGEMENT_DEV_VOLT_THRESHOLD_DATA_INFO_3_1 DEFINE <13h,14h,15h,16h,17h,18h>
+ MANAGEMENT_DEV_VOLT_THRESHOLD_DATA_INFO_3_2 DEFINE <19h,02,03,04,05,06>
+ MANAGEMENT_DEV_VOLT_THRESHOLD_DATA_INFO_3_3 DEFINE <01,02,03,04,05,06>
+
+;----------------------------------------------------------------------------
+; Structure Type 27: COOLING DEVICE INFORMATION
+;----------------------------------------------------------------------------
+;Syntax:
+; COOLING_DEVICE_INFO_1 DEFINE <Device type and status, Cooling unit group,
+; Oem Defined, Nominal Value>
+; * Device type and Status -> Identifies the cooling device type
+; and status
+; * Cooling Unit Group -> Identifies the cooling unit group
+; to which this cooling device is associated.
+; Multiple cooling devices in the same cooling
+; unit implies a redudant configuration.
+; * OEM-Defined -> Contains OEM- or BIOS Vaendor specific information
+; * Nominal Value -> The nominal value for the cooling device
+; speed in RPM. 0x8000h -> Unknown
+;Note: Nominal Value field is valid only if structure length is more than 0Ch
+;----------------------------------------------------------------------------
+; NUMBER_OF_COOLING_DEVICE_ASSOCIATED_TEMP_PROBE_1_1 = 2
+; This means Management Device number 1 and Temperature Probe Number 1 has
+; 2 cooling Device associated.
+
+;!!PORT!!
+ NUMBER_OF_COOLING_DEVICE_ASSOCIATED_TEMP_PROBE_1_1 = 2
+ NUMBER_OF_COOLING_DEVICE_ASSOCIATED_TEMP_PROBE_2_1 = 1
+ NUMBER_OF_COOLING_DEVICE_ASSOCIATED_TEMP_PROBE_2_2 = 1
+ NUMBER_OF_COOLING_DEVICE_ASSOCIATED_TEMP_PROBE_3_1 = 1
+ NUMBER_OF_COOLING_DEVICE_ASSOCIATED_TEMP_PROBE_3_2 = 1
+ NUMBER_OF_COOLING_DEVICE_ASSOCIATED_TEMP_PROBE_3_3 = 1
+
+;----------------------------------------------------------------------------
+; Syntax :
+; COOLING_DEVICE_INFO_1_1_1 DEFINE <012h,01h,00000000h,08000h,> No Description string
+; COOLING_DEVICE_INFO_1_1_1 DEFINE <012h,01h,00000000h,08000h,Cooling Dev 1> With Description string
+; This means Cooling device info_1st Mangement Device_1st Temperature Probe_1st Cooling Device
+; COOLING_DEVICE_INFO_1_1_2 DEFINE <012h,01h,00000000h,08000h>
+; This means Cooling Device Info_1st Mangement Device_1st Temperature Probe_2nd Cooling Device no.2
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ COOLING_DEVICE_INFO_1_1_1 DEFINE <012h,01h,00000000h,08000h,Cooling Dev 1>
+ COOLING_DEVICE_INFO_1_1_2 DEFINE <012h,01h,00000000h,08000h,> ;No Description string
+ COOLING_DEVICE_INFO_2_1_1 DEFINE <012h,01h,00000000h,08000h,Cooling Dev 2>
+ COOLING_DEVICE_INFO_2_2_1 DEFINE <012h,01h,00000000h,08000h,Cooling Dev 3>
+ COOLING_DEVICE_INFO_3_1_1 DEFINE <012h,01h,00000000h,08000h,Cooling Dev 4>
+ COOLING_DEVICE_INFO_3_2_1 DEFINE <012h,01h,00000000h,08000h,Cooling Dev 5>
+ COOLING_DEVICE_INFO_3_3_1 DEFINE <012h,01h,00000000h,08000h,Cooling Dev 6>
+
+;----------------------------------------------------------------------------
+; Syntax :
+; MANAGEMENT_DEV_COOL_THRESHOLD_DATA_INFO_1_1_1 DEFINE <01,02,03,04,05,06>
+; This means Managemnt Device Info 1_Temperature Probe 1_Cooling Device Threshold 1
+; MANAGEMENT_DEV_COOL_THRESHOLD_DATA_INFO_1_1_2 DEFINE <01,02,03,04,05,06>
+; This means Managemnt Device Info 1_Temperature Probe 1_Cooling Device Threshold 2
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ MANAGEMENT_DEV_COOL_THRESHOLD_DATA_INFO_1_1_1 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_COOL_THRESHOLD_DATA_INFO_1_1_2 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_COOL_THRESHOLD_DATA_INFO_2_1_1 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_COOL_THRESHOLD_DATA_INFO_2_2_1 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_COOL_THRESHOLD_DATA_INFO_3_1_1 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_COOL_THRESHOLD_DATA_INFO_3_2_1 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_COOL_THRESHOLD_DATA_INFO_3_3_1 DEFINE <01,02,03,04,05,06>
+
+;----------------------------------------------------------------------------
+; Structure Type 28: TEMPERATURE PROBE INFORMATION
+;----------------------------------------------------------------------------
+;
+; Syntax:
+; TEMPERATURE_PROBE_INFO_1 DEFINE <Tempature Probe String, Location
+; and status, Maximum Value,
+; Minimum Value, Resolution, Tolerance,
+; Accuracy, Oem Defined, Nominal Value>
+; * Voltage Probe String -> Identifies the descriptive information
+; about the probe or its location
+; e.g."LM78A"
+; * Location and Status -> Defines the probe's physical location
+; and status of the tempature monitored by this
+; tempature probe
+; * Maximum Value -> The max. tempature readable by
+; this probe in 1/10th degree C. 0x8000h -> Unknown
+; * Mimimum Value -> The Min. tempature readable by
+; this probe in 1/10th degree C. 0x8000h -> Unknown
+; * Resoltion -> The resolution for the probe's
+; reading in 1/1000th degree C. 0x8000h->Unknown
+; * Tolerance -> The tolerance for reading from this
+; probe, in +/- 1/10th degree C.0x8000h->Unknown
+; * Accuracy -> The accuracy for reading from this
+; probe, in +/- 1/100th of a percent
+; 0x8000h->Unknown
+; * OEM-Defined -> Contains OEM- or BIOS Vaendor specific information
+; * Nominal Value -> The nominal value for the probe's
+; reading in 1/10th degree C. 0x8000h -> Unknown
+; Note: Nominal Value field is valid only if structure length is more than 14h
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ NUMBER_OF_TEMPERATURE_PROBE_ASSOCIATED_MGMT_DEV_1 = 1
+ NUMBER_OF_TEMPERATURE_PROBE_ASSOCIATED_MGMT_DEV_2 = 2
+ NUMBER_OF_TEMPERATURE_PROBE_ASSOCIATED_MGMT_DEV_3 = 3
+
+;!!PORT!!
+ TEMPERATURE_PROBE_INFO_1_1 DEFINE <LM78A,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ TEMPERATURE_PROBE_INFO_2_1 DEFINE <LM78B,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ TEMPERATURE_PROBE_INFO_2_2 DEFINE <LM78B,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+
+;!!PORT!!
+ TEMPERATURE_PROBE_INFO_3_1 DEFINE <LM78C,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ TEMPERATURE_PROBE_INFO_3_2 DEFINE <LM78C,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ TEMPERATURE_PROBE_INFO_3_3 DEFINE <LM78C,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+
+;!!PORT!!
+ MANAGEMENT_DEV_TEMP_THRESHOLD_DATA_INFO_1_1 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_TEMP_THRESHOLD_DATA_INFO_2_1 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_TEMP_THRESHOLD_DATA_INFO_2_2 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_TEMP_THRESHOLD_DATA_INFO_3_1 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_TEMP_THRESHOLD_DATA_INFO_3_2 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_TEMP_THRESHOLD_DATA_INFO_3_3 DEFINE <01,02,03,04,05,06>
+
+;----------------------------------------------------------------------------
+; Structure Type 29: ELECTRICAL PROBE INFORMATION
+;----------------------------------------------------------------------------
+;
+; Syntax :
+; ELECTRICAL_PROBE_INFO_1 <Electrical Probe String, Location and status, Maximum Value, Minimum Value,
+; Resolution, Tolerance, Accuracy, Oem Defined, Nominal Value>
+; * Electrical Probe String -> Identifies the descriptive information about the probe or its location.
+; e.g."ABC"
+; * Location and Status -> Defines the probe's physical location and status of the current
+; monitored by this electrical probe
+; * Maximum Value -> The max. current readable by this probe in milliamps. 0x8000h -> Unknown
+; * Mimimum Value -> The Min. current readable by this probe in milliamps. 0x8000h -> Unknown
+; * Resoltion -> The resolution for the probe's reading in thenths of a milliamps.
+; 0x8000h->Unknown
+; * Tolerance -> The tolerance for reading from this probe, in +/- milliamps.
+; 0x8000h->Unknown
+; * Accuracy -> The accuracy for reading from this probe, in +/- 1/100th of a percent.
+; 0x8000h->Unknown
+; * OEM-Defined -> Contains OEM- or BIOS Vaendor specific information
+; * Nominal Value -> The nominal value for the probe's reading in milliamps.
+; 0x8000h -> Unknown
+; Note: Nominal Value field is valid only if structure length is more than 14h
+;----------------------------------------------------------------------------
+;!!PORT!!
+ NUMBER_OF_ELECTRICAL_PROBE_ASSOCIATED_MGMT_DEV_1 = 1
+ NUMBER_OF_ELECTRICAL_PROBE_ASSOCIATED_MGMT_DEV_2 = 2
+ NUMBER_OF_ELECTRICAL_PROBE_ASSOCIATED_MGMT_DEV_3 = 3
+
+;!!PORT!!
+ ELECTRICAL_PROBE_INFO_1_1 DEFINE <ABC,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ ELECTRICAL_PROBE_INFO_2_1 DEFINE <DEF,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ ELECTRICAL_PROBE_INFO_2_2 DEFINE <GHI,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ ELECTRICAL_PROBE_INFO_3_1 DEFINE <ABC,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ ELECTRICAL_PROBE_INFO_3_2 DEFINE <DEF,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ ELECTRICAL_PROBE_INFO_3_3 DEFINE <GHI,0,08000h,08000h,08000h,08000h,08000h,0,08000h>
+
+;!!PORT!!
+ MANAGEMENT_DEV_ELEC_THRESHOLD_DATA_INFO_1_1 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_ELEC_THRESHOLD_DATA_INFO_2_1 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_ELEC_THRESHOLD_DATA_INFO_2_2 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_ELEC_THRESHOLD_DATA_INFO_3_1 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_ELEC_THRESHOLD_DATA_INFO_3_2 DEFINE <01,02,03,04,05,06>
+ MANAGEMENT_DEV_ELEC_THRESHOLD_DATA_INFO_3_3 DEFINE <01,02,03,04,05,06>
+
+;----------------------------------------------------------------------------
+; Structure Type 30: OUT-OF-BAND REMOTE ACCESS INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 32: SYSTEM BOOT INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 33: 64-BIT MEMORY ERROR INFORMATION
+;----------------------------------------------------------------------------
+; Note: For more detail refer TYPE 18 (MEMORY ERROR INFORMATION) in this
+; file and SMB.EQU
+; In Case of 64 Bit Memory Error support following 2 fields are changed to Qword
+;----------------------------------------------------------------------------
+;!!PORT!!
+ MEM_ARR_ERR_ADD equ 8000000000000000h
+ DEV_ERR_ADD equ 8000000000000000h
+
+;----------------------------------------------------------------------------
+; Structure Type 34: MANAGEMENT DEVICE INFORMATION
+;----------------------------------------------------------------------------
+; * Device String -> Identifies string information about device
+; * Device Type -> Identifies the Device Type, for
+; more detail search for Management
+; Device Type,refer SMB.EQU
+; * Device Address -> Defines Device Address.
+; * Device Address Type -> Identifies the Address Type, for
+; more detail search for Management
+; Device Type Address, refer SMB.EQU
+;----------------------------------------------------------------------------
+;!!PORT!!
+ MANAGEMENT_DEVICE_STRING_1 DEFINE <LM78-1>
+ MANAGEMENT_DEVICE_TYPE_1 DEFINE <MGMT_DEVICE_TYPE_LM78>
+ MANAGEMENT_DEVICE_ADDR_1 = 00000000h
+ MANAGEMENT_DEVICE_ADDR_TYPE_1 DEFINE <MGMT_DEVICE_ADDRESS_TYPE_IO_PORT>
+
+ MANAGEMENT_DEVICE_STRING_2 DEFINE <LM78-2>
+ MANAGEMENT_DEVICE_TYPE_2 DEFINE <MGMT_DEVICE_TYPE_LM78>
+ MANAGEMENT_DEVICE_ADDR_2 = 00000000h
+ MANAGEMENT_DEVICE_ADDR_TYPE_2 DEFINE <MGMT_DEVICE_ADDRESS_TYPE_IO_PORT>
+
+ MANAGEMENT_DEVICE_STRING_3 DEFINE <LM75-0>
+ MANAGEMENT_DEVICE_TYPE_3 DEFINE <MGMT_DEVICE_TYPE_LM75>
+ MANAGEMENT_DEVICE_ADDR_3 = 00000000h
+ MANAGEMENT_DEVICE_ADDR_TYPE_3 DEFINE <MGMT_DEVICE_ADDRESS_TYPE_IO_PORT>
+
+;----------------------------------------------------------------------------
+; Structure Type 36: MANAGEMENT DEVICE THRESHOLD DATA INFORMATION
+;----------------------------------------------------------------------------
+; Management Device Threshold Data structure is associated with,
+; Voltage Probe, Temprature Probe, Cooling Device and Electrical Probe.
+; Each probe and cooling device has it's own Threshold data values.
+; Depends on number of probes in the system, there will be equal number
+; of Threshold Data structures will be there.
+;----------------------------------------------------------------------------
+; Lower Threshold Non-critical -> The lower non-critical threshold for this component
+; Upper Threshold Non-critical -> The upper non-critical threshold for this component
+; Lower Threshold Critical -> The Lower critical threshold for this component
+; Upper Threshold Critical -> The Upper critical threshold for this component
+; Lower Threshold Non-Recoverable -> The Lower threshold non-recoverable for this component
+; Upper Threshold Non-Recoverable -> The Upper threshold non-recoverable for this component
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ LOWER_THRESHOLD_NON_CRITICAL_1 = 8000h
+ UPPER_THRESHOLD_NON_CRITICAL_1 = 8000h
+ LOWER_THRESHOLD_CRITICAL_1 = 8000h
+ UPPER_THRESHOLD_CRITICAL_1 = 8000h
+ LOWER_THRESHOLD_NON_RECOVERABLE_1 = 8000h
+ UPPER_THRESHOLD_NON_RECOVERABLE_1 = 8000h
+
+ LOWER_THRESHOLD_NON_CRITICAL_2 = 8000h
+ UPPER_THRESHOLD_NON_CRITICAL_2 = 8000h
+ LOWER_THRESHOLD_CRITICAL_2 = 8000h
+ UPPER_THRESHOLD_CRITICAL_2 = 8000h
+ LOWER_THRESHOLD_NON_RECOVERABLE_2 = 8000h
+ UPPER_THRESHOLD_NON_RECOVERABLE_2 = 8000h
+
+ LOWER_THRESHOLD_NON_CRITICAL_3 = 8000h
+ UPPER_THRESHOLD_NON_CRITICAL_3 = 8000h
+ LOWER_THRESHOLD_CRITICAL_3 = 8000h
+ UPPER_THRESHOLD_CRITICAL_3 = 8000h
+ LOWER_THRESHOLD_NON_RECOVERABLE_3 = 8000h
+ UPPER_THRESHOLD_NON_RECOVERABLE_3 = 8000h
+
+ LOWER_THRESHOLD_NON_CRITICAL_4 = 8000h
+ UPPER_THRESHOLD_NON_CRITICAL_4 = 8000h
+ LOWER_THRESHOLD_CRITICAL_4 = 8000h
+ UPPER_THRESHOLD_CRITICAL_4 = 8000h
+ LOWER_THRESHOLD_NON_RECOVERABLE_4 = 8000h
+ UPPER_THRESHOLD_NON_RECOVERABLE_4 = 8000h
+
+;----------------------------------------------------------------------------
+; Structure Type 37: MEMORY CHANNEL INFORMATION STRUCTURE
+;----------------------------------------------------------------------------
+;!!PORT!!
+
+ CHANNEL_1_TYPE = 03h
+ MAX_CHANNEL_1_LOAD = 32
+ NUMBER_OF_MEMORY_DEVICES_IN_CHANNEL_1 = 02
+
+ CHANNEL_2_TYPE = 03h
+ MAX_CHANNEL_2_LOAD = 32
+ NUMBER_OF_MEMORY_DEVICES_IN_CHANNEL_2 = 02
+
+;----------------------------------------------------------------------------
+; Structure Type 38: IPMI DEVICE INFORMATION
+;----------------------------------------------------------------------------
+; Identifies the base address (either memory-mapped or I/O) of the BMC.
+; If the least-significant bit of the field is 1, the address is in I/O space;
+; otherwise, the address is memory-mapped. Refer IPMI Interface Specification.
+
+;!!PORT!!
+
+ IPMI_BASE_ADDRESS_LO = 00000000h
+ IPMI_BASE_ADDRESS_HI = 00000000h
+
+;----------------------------------------------------------------------------
+; Structure Type 39: SYSTEM POWER SUPPLY
+;----------------------------------------------------------------------------
+; Syntax:
+; * PWR_SUPPLY_UNIT_GROUP_X -> Identifies the power unit group to which
+; this power supply is associated
+; * PWR_SUPPLY_LOCATION_X -> String identifies the location of the
+; power supply
+; * PWR_SUPPLY_DEVICE_NAME_X -> String identifies the name of the power
+; supply
+; * PWR_SUPPLY_MANUFACTURER_X -> String identifies the name of the company
+; that manufacturered the power supply
+; * PWR_SUPPLY_SERIAL_NUMBER_X -> String identifies the serial number of
+; the power supply
+; * PWR_SUPPLY_ASSET_TAG_NUMBER_X -> String identifies the asset tag of
+; the power supply
+; * PWR_SUPPLY_MODEL_PART_NUMBER_X -> String identifies the OEM Part Order
+; number of the power supply
+; * PWR_SUPPLY_REVISION_LEVEL_X -> Power supply revision string
+; * PWR_SUPPLY_MAX_POWER_CAPACITY_X -> Maximum sustained power output in Watts
+; Set to 0x8000 if unknown
+; * PWR_SUPPLY_CHARACTERISTICS_X -> Characteristics of the power supply
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ POWER_SUPPLY_UNIT_GROUP_1 = 1
+ POWER_SUPPLY_LOCATION_1 DEFINE <To Be Filled By O.E.M.>
+ POWER_SUPPLY_DEVICE_NAME_1 DEFINE <To Be Filled By O.E.M.>
+ POWER_SUPPLY_MANUFACTURER_1 DEFINE <To Be Filled By O.E.M.>
+ POWER_SUPPLY_SERIAL_NUMBER_1 DEFINE <To Be Filled By O.E.M.>
+ POWER_SUPPLY_ASSET_TAG_NUMBER_1 DEFINE <To Be Filled By O.E.M.>
+ POWER_SUPPLY_MODEL_PART_NUMBER_1 DEFINE <To Be Filled By O.E.M.>
+ POWER_SUPPLY_REVISION_LEVEL_1 DEFINE <To Be Filled By O.E.M.>
+ POWER_SUPPLY_MAX_POWER_CAPACITY_1 = 8000h
+ POWER_SUPPLY_CHARACTERISTICS_1 = 11A2h
+
+ POWER_SUPPLY_UNIT_GROUP_2 = 2
+ POWER_SUPPLY_LOCATION_2 DEFINE <To Be Filled By O.E.M.>
+ POWER_SUPPLY_DEVICE_NAME_2 DEFINE <To Be Filled By O.E.M.>
+ POWER_SUPPLY_MANUFACTURER_2 DEFINE <To Be Filled By O.E.M.>
+ POWER_SUPPLY_SERIAL_NUMBER_2 DEFINE <To Be Filled By O.E.M.>
+ POWER_SUPPLY_ASSET_TAG_NUMBER_2 DEFINE <To Be Filled By O.E.M.>
+ POWER_SUPPLY_MODEL_PART_NUMBER_2 DEFINE <To Be Filled By O.E.M.>
+ POWER_SUPPLY_REVISION_LEVEL_2 DEFINE <To Be Filled By O.E.M.>
+ POWER_SUPPLY_MAX_POWER_CAPACITY_2 = 8000h
+ POWER_SUPPLY_CHARACTERISTICS_2 = 11A2h
+
+;----------------------------------------------------------------------------
+; Type 39 - Associated VOLTAGE PROBE Type 26
+;----------------------------------------------------------------------------
+; Syntax:
+; VOLTAGE_PROBE_39_1 DEFINE <Present, Voltage Probe String, Location
+; and status, Maximum Value,
+; Minimum Value, Resolution, Tolerance,
+; Accuracy, Oem Defined, Nominal Value>
+; * Present -> 0 = Type 39 does not have Input Voltage Probe
+; -> 1 = Type 39 has Input Voltage Probe
+;
+; Followings are only valid when "Present = 1"
+;
+; * Voltage Probe String -> Identifies the descriptive information
+; about the probe or its location
+; e.g."LM78A"
+; * Location and Status -> Defines the probe's physical location
+; and status of the voltage monitored by this
+; voltage probe
+; * Maximum Value -> The max. voltage level readable by
+; this probe in millivolt 0x8000h -> Unknown
+; * Mimimum Value -> The Min. voltage level readable by
+; this probe in millivolt 0x8000h -> Unknown
+; * Resoltion -> The resolution for the probe's
+; reading in tenths of millivolt 0x8000h->Unknown
+; * Tolerance -> The tolerance for reading from this
+; probe, in +/- millivolts. 0x8000h->Unknown
+; * Accuracy -> The accuracy for reading from this
+; probe, in +/- 1/100th of a percent
+; 0x8000h->Unknown
+; * OEM-Defined -> Contains OEM- or BIOS Vaendor specific information
+; * Nominal Value -> The nominal value for the probe's
+; reading in millivolts. 0x8000h -> Unknown
+;
+; Note: Nominal Value field is valid only if structure length is more than 14h
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ VOLTAGE_PROBE_39_1 DEFINE <1,LM78A,6Ah,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ VOLTAGE_PROBE_39_2 DEFINE <0,LM78B,6Ah,08000h,08000h,08000h,08000h,08000h,0,08000h>
+
+;----------------------------------------------------------------------------
+; Type 39 - Associated COOLING DEVICE Type 27
+;----------------------------------------------------------------------------
+;Syntax:
+; COOLING_DEVICE_39_1 DEFINE <Present, Device type and status, Cooling unit group,
+; Oem Defined, Nominal Value>
+; * Present -> 0 = Type 39 does not have Cooling Device
+; -> 1 = Type 39 has Cooling Device
+;
+; Followings are only valid when "Present = 1"
+;
+; * Device type and Status -> Identifies the cooling device type
+; and status
+; * Cooling Unit Group -> Identifies the cooling unit group
+; to which this cooling device is associated.
+; Multiple cooling devices in the same cooling
+; unit implies a redudant configuration.
+; * OEM-Defined -> Contains OEM- or BIOS Vaendor specific information
+; * Nominal Speed -> The nominal speed for the cooling device
+; speed in RPM. 0x8000h -> Unknown
+; * Description -> Descriptive information about the cooling device
+;
+;Note: Nominal Value field is valid only if structure length is more than 0Ch
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ COOLING_DEVICE_39_1 DEFINE <1,67h,01h,00000000h,08000h,Cooling Dev 1>
+ COOLING_DEVICE_39_2 DEFINE <0,67h,01h,00000000h,08000h,Cooling Dev 2>
+
+;----------------------------------------------------------------------------
+; Type 39 - Associated Structure Type 28: TEMPERATURE PROBE INFORMATION
+;----------------------------------------------------------------------------
+; Syntax:
+; TEMPERATURE_PROBE_39_1 DEFINE <Tempature Probe String, Location
+; and status, Maximum Value,
+; Minimum Value, Resolution, Tolerance,
+; Accuracy, Oem Defined, Nominal Value>
+; * Present -> 0 = Type 39/27 does not have Temperature Probe
+; -> 1 = Type 39/27 has Temperature Probe
+;
+; Followings are only valid when "Present = 1"
+;
+; * Voltage Probe String -> Identifies the descriptive information
+; about the probe or its location
+; e.g."LM78A"
+; * Location and Status -> Defines the probe's physical location
+; and status of the tempature monitored by this
+; tempature probe
+; * Maximum Value -> The max. tempature readable by
+; this probe in 1/10th degree C. 0x8000h -> Unknown
+; * Mimimum Value -> The Min. tempature readable by
+; this probe in 1/10th degree C. 0x8000h -> Unknown
+; * Resoltion -> The resolution for the probe's
+; reading in 1/1000th degree C. 0x8000h->Unknown
+; * Tolerance -> The tolerance for reading from this
+; probe, in +/- 1/10th degree C.0x8000h->Unknown
+; * Accuracy -> The accuracy for reading from this
+; probe, in +/- 1/100th of a percent
+; 0x8000h->Unknown
+; * OEM-Defined -> Contains OEM- or BIOS Vaendor specific information
+; * Nominal Value -> The nominal value for the probe's
+; reading in 1/10th degree C. 0x8000h -> Unknown
+; Note: Nominal Value field is valid only if structure length is more than 14h
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ TEMPERATURE_PROBE_39_1 DEFINE <1,LM78A,6Ah,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ TEMPERATURE_PROBE_39_2 DEFINE <0,LM78B,6Ah,08000h,08000h,08000h,08000h,08000h,0,08000h>
+
+;----------------------------------------------------------------------------
+; Type 39 - Associated Structure Type 29: ELECTRICAL PROBE INFORMATION
+;----------------------------------------------------------------------------
+; Syntax :
+; ELECTRICAL_PROBE_39_1 DEFINE <Present, Electrical Probe String, Location and status, Maximum Value,
+; Minimum Value, Resolution, Tolerance, Accuracy, Oem Defined, Nominal Value>
+; * Present -> 0 = Type 39 does not have Current Probe
+; -> 1 = Type 39 has Current Probe
+;
+; Followings are only valid when "Present = 1"
+;
+; * Electrical Probe String -> Identifies the descriptive information about the probe or its location.
+; e.g."ABC"
+; * Location and Status -> Defines the probe's physical location and status of the current
+; monitored by this electrical probe
+; * Maximum Value -> The max. current readable by this probe in milliamps. 0x8000h -> Unknown
+; * Mimimum Value -> The Min. current readable by this probe in milliamps. 0x8000h -> Unknown
+; * Resoltion -> The resolution for the probe's reading in thenths of a milliamps.
+; 0x8000h->Unknown
+; * Tolerance -> The tolerance for reading from this probe, in +/- milliamps.
+; 0x8000h->Unknown
+; * Accuracy -> The accuracy for reading from this probe, in +/- 1/100th of a percent.
+; 0x8000h->Unknown
+; * OEM-Defined -> Contains OEM- or BIOS Vaendor specific information
+; * Nominal Value -> The nominal value for the probe's reading in milliamps.
+; 0x8000h -> Unknown
+;
+; Note: Nominal Value field is valid only if structure length is more than 14h
+;----------------------------------------------------------------------------
+
+;!!PORT!!
+ ELECTRICAL_PROBE_39_1 DEFINE <1,ABC,6Ah,08000h,08000h,08000h,08000h,08000h,0,08000h>
+ ELECTRICAL_PROBE_39_2 DEFINE <0,DEF,6Ah,08000h,08000h,08000h,08000h,08000h,0,08000h>
+
+;----------------------------------------------------------------------------
+; Structure Type 40: Additional Information
+;----------------------------------------------------------------------------
+; Provides additional information for handling unspecified enumerated values
+; and interim field updates in another structure.
+;
+; Syntax:
+; REF_TYPE_1 Structure Type for which additional
+; information is provided
+;
+; REF_TYPE_INSTANCE_1 Structure Type instance for which additional
+; information is provided
+;
+; REF_OFFSET_1 Offset of the field within the structure
+; referenced above for which additional
+; information is provided
+;
+; USE_STRING_1 0 = String is not used, 1 = String is used
+;
+; STRING_1 When USE_STRING_1 = 1, specify string to be
+; associated with the field referenced above
+;
+; VALUE_1 Enumerated value or updated field content
+;
+;----------------------------------------------------------------------------
+;!!PORT!!
+
+ REF_TYPE_1 = 10
+ REF_TYPE_INSTANCE_1 = 1
+ REF_OFFSET_1 = 1
+ USE_STRING_1 = 1
+ STRING_1 DEFINE <To Be Filled By O.E.M. 1>
+ VALUE_1 = 0
+
+ REF_TYPE_2 = 1
+ REF_TYPE_INSTANCE_2 = 1
+ REF_OFFSET_2 = 15
+ USE_STRING_2 = 0
+ STRING_2 DEFINE <To Be Filled By O.E.M. 2>
+ VALUE_2 = 30
+
+ REF_TYPE_3 = 7
+ REF_TYPE_INSTANCE_3 = 2
+ REF_OFFSET_3 = 1
+ USE_STRING_3 = 1
+ STRING_3 DEFINE <To Be Filled By O.E.M. 3>
+ VALUE_3 = 0
+
+ REF_TYPE_4 = 1
+ REF_TYPE_INSTANCE_4 = 1
+ REF_OFFSET_4 = 1
+ USE_STRING_4 = 1
+ STRING_4 DEFINE <To Be Filled By O.E.M.>
+ VALUE_4 = 0
+
+;----------------------------------------------------------------------------
+; Structure Type 41: Onboard Devices Extended Information
+;----------------------------------------------------------------------------
+; Defines the attributes of devices that are onboard (soldered onto) a system
+; element, usually the baseboard. In general, an entry in this table implies
+; that the BIOS has some level of control over the enabling of the associated
+; device for use by the system.
+;
+; NOTE: This structure replaces Onboard Device Information (Type 10) starting
+; with versiob 2.6 of the SMBIOS specification. Both Type 10 and 41 can
+; be implemented to allow existing SMBIOS browsers to properly display
+; the system's onboard devices information.
+;
+; Syntax:
+; ONBOARD_DEVICE_EXT_1 DEFINE <Enabled or Disabled, Onboard Device Type, Descrition String>
+; * Onboard device status -> Describes the status(enabled/disabled) of on board device
+; * On board device Type -> Video, Audio, SCSI etc...
+; For more detail search for On-board device
+; Type equates in structure Type 10, refer SMB.EQU
+; * Device Type Instance -> A unique value (within a given onboard device type) used
+; to indicate the order the device is designated by the system.
+; e.g. A system with two identical Ethernet NICs may designate
+; one NIC (with higher Bus/Device/Function=15/0/0) as the first
+; onboard NIC (instance 1) and the other NIC (with lower
+; Bus/Device/Function=3/0/0) as the second onboard NIC (instance 2)
+; * Description String -> Describes the on board device.
+; e.g."Video", "Audio" etc..
+;
+; SEGGRP_BUS_DEVFN_EXT_1 DEFINE <Segment Group Number, Bus Number, Device Function Number>
+; * Segment Group Number -> Segment Group Number defined in the PCI Firmware Spec.
+; * Bus Number -> Bus Number
+; * Device Function Number -> Device / Function Number
+;
+;----------------------------------------------------------------------------
+;!!PORT!!
+ ONBOARD_DEVICE_EXT_1 DEFINE <ENABLED, OBD_VIDEO, 1, Onboard IGD>
+ SEGGRP_BUS_DEVFN_EXT_1 DEFINE <0, 0, 10h>
+
+ ONBOARD_DEVICE_EXT_2 DEFINE <ENABLED, OBD_ETHERNET, 1, Onboard LAN>
+ SEGGRP_BUS_DEVFN_EXT_2 DEFINE <0, 0, 0C8h>
+
+ ONBOARD_DEVICE_EXT_3 DEFINE <ENABLED, OBD_OTHER, 1, Onboard 1394>
+ SEGGRP_BUS_DEVFN_EXT_3 DEFINE <0, 3, 0E2h>
+
+;----------------------------------------------------------------------------
+; Structure Type 5 : MEMORY CONTROLLER INFORMATION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; Structure Type 6 : MEMORY MODULE INFORMATION
+;----------------------------------------------------------------------------
+; The following information is needed only if MEM_MODULE_INFO = Present
+; This structure (TYPE 6) is associated with MEMORY CONTROLLER Structure(TYPE 5)
+; Handle information of Type 6 is defined in TYPE 5 structure.
+; Syntax:
+; MEMORY_TYPE_1 DEFINE <Memory Type, Memory Type,...>
+; * Memory Module Type -> DIMM, SIMM, SDRAM etc...
+; Following describes Memory Module Type
+; supported. At any given time more than
+; one value can be selected. Select the
+; memory type list from the following
+; MM_TYPE_OTHER, MM_TYPE_UNKNOWN, MM_TYPE_STANDARD,
+; MM_TYPE_FAST_PAGE_MODE, MM_TYPE_EDO, MM_TYPE_PARITY, MM_TYPE_ECC,
+; MM_TYPE_SIMM, MM_TYPE_DIMM, MM_TYPE_BURST_EDO, MM_TYPE_SDRAM
+; for more detail search for Memory Module
+; Type equates in structure Type 6, refer SMB.EQU
+; This field is used in Memory Controller Structure
+; also. While porting, define the proper bit
+; field according to type of memory suppoted
+; on platform. This Bit-field is defined
+; above in TYPE 5 structure
+;
+; MEMORY_INFO_1 DEFINE <String, Bank Connection, Supported Speed,
+; Installed size, Enabled size, Bank connection>
+; * String -> Memory Module designator string e.g. "DIMM1"
+; * Bank connection -> RAS line information
+; for more detail refer search for Memory Module
+; Bank connection equate in SMB.EQU
+; * Supported Speed -> The speed of the memory module is defined
+; in unit of ns(nano second). If this field is
+; unknown, the field is set to 0
+; * Installed Size -> The installed size field identify the size
+; of memory module which is installed in the
+; socket. It is determined as under.
+; Bit0-6 : size(n) where 2**n is the size in MB.
+; 7Dh-> Not determinable(installed size only)
+; 7Eh-> Module is installed but not enabled
+; 7Fh-> Not installed
+; Bit 7-> defines the single bank or double bank connection
+; * Enabled Size -> Follow the same as installed size
+; MEMORY_ERR_1 DEFINE <0>
+; * Error Status -> Currently always define 0
+;----------------------------------------------------------------------------
+
+;!!NOTE!!
+; PORT NBSMBIOS.ASM for all the memory related structures.
+; Also note that type 5, 6 and Type 16, 17, 18, 19 and 20 are related
+; even though type 5, 6 are not required by the 2.3.1 spec.
+; Make sure that the number of Memory Modules defined below are equal to
+; NUMBER_OF_MEM_MODULE in SMBIOS.SDL
+
+;!!PORT!!
+ MEMORY_TYPE_1 DEFINE <MM_TYPE_SDRAM, MM_TYPE_DIMM>
+ MEMORY_INFO_1 DEFINE <DIMM0, RAS_1, RAS_2, 60, 512*1024*1024, 512*1024*1024, MM_SINGLE_BANK>
+ MEMORY_ERR_1 DEFINE <0>
+
+ MEMORY_TYPE_2 DEFINE <MM_TYPE_SDRAM, MM_TYPE_DIMM>
+ MEMORY_INFO_2 DEFINE <DIMM1, RAS_3, RAS_4, 60, 512*1024*1024, 512*1024*1024, MM_SINGLE_BANK>
+ MEMORY_ERR_2 DEFINE <0>
+
+ MEMORY_TYPE_3 DEFINE <MM_TYPE_SDRAM, MM_TYPE_DIMM>
+ MEMORY_INFO_3 DEFINE <DIMM2, RAS_5, RAS_6, 60, 512*1024*1024, 512*1024*1024, MM_SINGLE_BANK>
+ MEMORY_ERR_3 DEFINE <0>
+
+ MEMORY_TYPE_4 DEFINE <MM_TYPE_SDRAM, MM_TYPE_DIMM>
+ MEMORY_INFO_4 DEFINE <DIMM3, RAS_7, RAS_8, 60, 512*1024*1024, 512*1024*1024, MM_SINGLE_BANK>
+ MEMORY_ERR_4 DEFINE <0>
+
+ MEMORY_TYPE_5 DEFINE <MM_TYPE_SDRAM, MM_TYPE_DIMM>
+ MEMORY_INFO_5 DEFINE <DIMM4, RAS_9, RAS_10, 60, 512*1024*1024, 512*1024*1024, MM_SINGLE_BANK>
+ MEMORY_ERR_5 DEFINE <0>
+
+ MEMORY_TYPE_6 DEFINE <MM_TYPE_SDRAM, MM_TYPE_DIMM>
+ MEMORY_INFO_6 DEFINE <DIMM5, RAS_11, RAS_12, 60, 512*1024*1024, 512*1024*1024, MM_SINGLE_BANK>
+ MEMORY_ERR_6 DEFINE <0>
+
+;----------------------------------------------------------------------------
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2016, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
diff --git a/Board/EM/SMBIOS/SMBiosStaticData/Smbhdr.equ b/Board/EM/SMBIOS/SMBiosStaticData/Smbhdr.equ
new file mode 100644
index 0000000..979a0d9
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosStaticData/Smbhdr.equ
@@ -0,0 +1,297 @@
+ ECHO --Including: SMBHDR.EQU
+
+; Inclusion guard
+IFNDEF _smbhdr_equ_
+_smbhdr_equ_ EQU 1
+
+;----------------------------------------------------------------------------
+; Do not change any structure definition unless otherwise specified
+;----------------------------------------------------------------------------
+
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2009, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
+
+;****************************************************************************
+; $Header: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/Smbhdr.equ 4 6/02/09 4:47p Davidd $
+;
+; $Revision: 4 $
+;
+; $Date: 6/02/09 4:47p $
+;****************************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/Smbhdr.equ $
+;
+; 4 6/02/09 4:47p Davidd
+; Updated AMI headers (EIP 22180)
+;
+; 3 4/13/07 11:33a Davidd
+; Updated the year in the top and bottom copyright headers.
+;
+; 2 12/15/06 5:34p Davidd
+; Code cleanup and reformatted to coding standard.
+;
+; 1 4/29/05 2:15p Davidd
+; Initial checkin.
+;
+;****************************************************************************
+
+;----------------------------------------------------------------------------
+; This release implements SMBIOS 2.4 specification
+;----------------------------------------------------------------------------
+SMBIOS_VERSION EQU 24h ; 2.4
+SMBIOS_MAJOR_VERSION EQU 02h ; Major Version 2
+SMBIOS_MINOR_VERSION EQU 04h ; Minor Version 4
+
+;----------------------------------------------------------------------------
+; OEM GPNV STRUCTURE INFORMATION
+;----------------------------------------------------------------------------
+MAX_MEMORY_GPNV_DATAID EQU 08h ; max #of dataid in memory mapped GPNV
+MAX_IO_GPNV_DATAID EQU 08h ; max #of dataid in io mapped GPNV
+
+;----------------------------------------------------------------------------
+; EVENT LOG INFORMATION
+;----------------------------------------------------------------------------
+IFDEF MKF_EVENTLOG_VERSION
+ NO_OF_SUPPORTED_EVENTS EQU MKF_NO_OF_SUPPORTED_EVENTS
+ELSE
+ NO_OF_SUPPORTED_EVENTS EQU 06h
+ LENGTH_OF_EACH_LOG_TYPE_DESC EQU 02h
+ENDIF ; MKF_EVENTLOG_VERSION
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; HEADER OF SMBIOS DATA MODULE
+;----------------------------------------------------------------------------
+SMBDataModuleHeaderSTRUC STRUC
+ bSignature BYTE 8 DUP(?) ; _AMIDMI_ signature
+ wSMBIOSVer WORD ? ; SMBIOS Spec Ver#
+ wAMIImplementationVer WORD ? ; AMI Implementation Ver#
+ bConfigurationInfo BYTE ? ; total #of configuration supported (1-based)
+ wLength WORD ? ; length of data module
+ bReserved BYTE ? ; reserved
+SMBDataModuleHeaderSTRUC ENDS
+
+;----------------------------------------------------------------------------
+; SMBIOSInfo Details
+;----------------------------------------------------------------------------
+smbios_runtime_bit EQU 00000001b; 0 = SMBIOS POST active
+ ; 1 = SMBIOS Runtime active
+smbios_gpnv_data_bit EQU 00000010b; 0 = SMBIOS data in GPNV not changed
+ ; 1 = SMBIOS data in GPNV modified
+ ; bit15-2....NOT USED
+
+;----------------------------------------------------------------------------
+; SMBIOS INTERNAL DATA STRUCTURE
+;----------------------------------------------------------------------------
+SMBInternalDataSTRUC STRUC
+ dSMBStorageBase DWORD ? ; memory mapped storage base
+ dSMBStorageSize DWORD ? ; memory mapped storage size
+ wSMBNumRuntimeStruc WORD ? ; #of valid runtime structures
+ wSMBNumRomStruc WORD ? ; #of structures in ROM
+ wSMBRomStructuresLength WORD ? ; total length of all ROM structures
+ wSMBStructuresSegment WORD ? ; Segment of the data structures in RAM
+ wSMBStructuresStart WORD ? ; start of data structures in RAM
+ wSMBCurrentStructuresEnd WORD ? ; end of current data structures in RAM + 1
+ wSMBAvailableStructuresEnd WORD ? ; end of space available for structures + 1
+ wCPUInternalClock WORD ? ; CPU internal clock
+ wExternalClock WORD ? ; CPU Bus clock
+SMBInternalDataSTRUC ENDS
+
+;----------------------------------------------------------------------------
+; SMBIOS INSTALLATION STRUCTURE
+;----------------------------------------------------------------------------
+SMBTableHeaderSTRUC STRUCT
+ bAnchorStr BYTE 4 DUP (?)
+ bChecksum BYTE ?
+ bLength BYTE ?
+ bMajorVer BYTE ?
+ bMinorVer BYTE ?
+ wMaxStrucSize WORD ?
+ bRevision BYTE ?
+ bFormattedArea BYTE 5 DUP (?)
+ bIntAnchorStr BYTE 5 DUP (?)
+ bIntChecksum BYTE ?
+ wStrucTblLen WORD ?
+ dStrucTblAddr DWORD ?
+ wNumSMBStruc WORD ?
+ bSMBRevision BYTE ?
+SMBTableHeaderSTRUC ENDS
+
+;----------------------------------------------------------------------------
+; STRUCTURE OF DATA BUFFER IN SMBIOS FUNCTION 52H
+;----------------------------------------------------------------------------
+SMBIOSFun52BufferSTRUC STRUC
+ bCommand BYTE ?
+ bFieldOffset BYTE ?
+ dChangeMask DWORD ?
+ dChangeValue DWORD ?
+ wDataLength WORD ?
+ dStructureHeader DWORD ?
+ bStructureData BYTE ?
+SMBIOSFun52BufferSTRUC ENDS
+
+;----------------------------------------------------------------------------
+; STRUCTURE OF DATA BUFFER IN SMBIOS FUNCTION 53H
+;----------------------------------------------------------------------------
+SMBIOSFun53BufferSTRUC STRUC
+ bChangeStatus BYTE ?
+ bChangeType BYTE ?
+ wChangeHandle WORD ?
+ bChangeReserved BYTE 12 DUP (?)
+SMBIOSFun53BufferSTRUC ENDS
+
+;----------------------------------------------------------------------------
+; STRUCTURE USED IN FUNC 52H
+;----------------------------------------------------------------------------
+F52_FIELD_ABSENT EQU 0FFh ; absent field
+F52_STRING_DATA_TYPE EQU 80h ; bit-7 = 1..string data type
+ ; 0..binary data
+F52_ONE_TIME_MODIFIABLE = 40h ; bit-6 = 1..one time modifiable
+ ; 0..modifiable always
+F52_BYTE EQU 01h ; length of a BYTE data
+F52_WORD EQU 02h ; length of a WORD data
+F52_DWORD EQU 04h ; length of a DWORD data
+F52_STATUS_MODIFIED EQU 01h ; bit-0 = 1..this field is not modifiable any more
+ ; bit7-1= reserved for future use
+
+;<AMI_SHDR_START>
+;----------------------------------------------------------------------------
+; Name: ModificationHeaderSTRUC
+;
+; Fields: Name Type Description
+; -------------------------------------------------------------
+; wLength WORD length of the information in BYTEs
+; including this word
+; bType BYTE SMBIOS structure type
+;
+; Description:
+;
+;----------------------------------------------------------------------------
+;<AMI_SHDR_END>
+
+ModificationHeaderSTRUC STRUC
+
+ wLength WORD ?
+ bType BYTE ? ; structure type
+
+ModificationHeaderSTRUC ENDS
+
+;<AMI_SHDR_START>
+;----------------------------------------------------------------------------
+; Name: ModificationKeyFieldSTRUC
+;
+; Fields: Name Type Description
+; -------------------------------------------------------------
+; bOffset BYTE offset of the key-field inside the structure
+; FF -> there is no key-field
+; bType BYTE Data Type
+; Bit-7 = 0..Binary Data
+; 1..String Data
+; Bit-6 = 0..modifiable always
+; 1..One time modifiable
+; Bit5-0= reserved for future use
+; bLength BYTE Data Length in Bytes
+; Bit7-0= data length in BYTEs
+; Description:
+;
+;----------------------------------------------------------------------------
+;<AMI_SHDR_END>
+
+ModificationKeyFieldSTRUC STRUC
+
+ bOffset BYTE ? ; offset of the key-field inside the structure
+ ; FF -> there is no key-field
+ bType BYTE ? ; Data Type
+ ; Bit-7 = 0..Binary Data
+ ; 1..String Data
+ ; Bit-6 = 0..modifiable always
+ ; 1..One time modifiable
+ ; Bit5-0= reserved for future use
+ bLength BYTE ? ; Data Length in Bytes
+ ; Bit7-0= data length in BYTEs
+
+ModificationKeyFieldSTRUC ENDS
+
+;<AMI_SHDR_START>
+;----------------------------------------------------------------------------
+; Name: ModificationFieldSTRUC
+;
+; Fields: Name Type Description
+; -------------------------------------------------------------
+; bOffset BYTE offset of the key-field inside the structure
+; FF -> there is no key-field
+; bType BYTE Data Type
+; Bit-7 = 0..Binary Data
+; 1..String Data
+; Bit-6 = 0..modifiable always
+; 1..One time modifiable
+; Bit5-0= reserved for future use
+; bLength BYTE Data Length in Bytes
+; Bit7-0= data length in BYTEs
+; bStatus BYTE Status of the field
+; Description:
+;
+;----------------------------------------------------------------------------
+;<AMI_SHDR_END>
+
+ModificationFieldSTRUC STRUC
+
+ bOffset BYTE ? ; offset of the key-field inside the structure
+ ; FF -> there is no key-field
+ bType BYTE ? ; Data Type
+ ; Bit-7 = 0..Binary Data
+ ; 1..String Data
+ ; Bit-6 = 0..modifiable always
+ ; 1..One time modifiable
+ ; Bit5-0= reserved for future use
+ bLength BYTE ? ; Data Length in Bytes
+ ; Bit7-0= data length in BYTEs
+ bStatus BYTE ? ; status of this field
+
+ModificationFieldSTRUC ENDS
+
+;----------------------------------------------------------------------------
+; EQUATES USED IN SMBIOS FUNCTION 53H
+;----------------------------------------------------------------------------
+; equates used in SMBIOS Change Status
+SMBIOS_NO_CHANGE EQU 00h ; 00h..SMBIOS No Change
+SMBIOS_OTHER_CHANGE EQU 01h ; 01h..SMBIOS Other Change
+SMBIOS_UNKNOWN_CHANGE EQU 02h ; 02h..SMBIOS Unknown Change
+SMBIOS_SINGLE_STRUCTURE_AFFECTED EQU 03h ; 03h..SMBIOS Single Structure Affected
+SMBIOS_MULTIPLE_STRUCTURE_AFFECTED EQU 04h ; 04h..SMBIOS Multiple Structure Affected
+
+; equates used in SMBIOS Change Type
+SMBIOS_ONE_MORE_STRUCTURE_CHANGED EQU 00000001b ; Bit-0 = 1, One/More Structure was changed
+SMBIOS_ONE_MORE_STRUCTURE_ADDED EQU 00000010b ; Bit-1 = 1, One/More Structure was added
+ ; Bit7-2.....Reserved
+
+;----------------------------------------------------------------------------
+; End of Inclusion guard
+ENDIF ;_smbhdr_equ_
+;----------------------------------------------------------------------------
+
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2009, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
diff --git a/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticData.asm b/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticData.asm
new file mode 100644
index 0000000..2dea886
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticData.asm
@@ -0,0 +1,259 @@
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2016, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
+
+;****************************************************************************
+; $Header: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/SmbiosStaticData.asm 12 4/07/16 5:53p Davidd $
+;
+; $Revision: 12 $
+;
+; $Date: 4/07/16 5:53p $
+;****************************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/SmbiosStaticData.asm $
+;
+; 12 4/07/16 5:53p Davidd
+; [TAG] EIP231162
+; [Category] New Feature
+; [Description] Merge Aptio V Smbios -09 changes for Aptio 4
+; 4.6.5.5_SMBIOS_40 release
+; [Files] Smbios.sdl
+; SmbiosDynamicData.h
+; Smbios.h
+; SmbiosStaticData.sdl
+; SmbiosStaticData.asm
+; SmbData.mac
+; SmbMacro.aid
+; SmbDesc.def
+;
+; 11 2/17/15 1:06p Davidd
+; [TAG] EIP205509
+; [Category] Improvement
+; [Description] Merge Aptio V Smbios EIP193807, 193858, 196901 changes
+; into Aptio 4 Smbios
+; [Files] SmbiosStaticData.asm
+; Smbdata.mac
+; Smbdesc.def
+;
+; 10 3/26/12 12:02p Davidd
+; [TAG] EIP84370
+; [Category] New Feature
+; [Description] Flash memory(type 16 and 17) on aptio
+; [Files] Smbdata.mac
+; SmbiosStaticData.asm
+; SmbiosStaticData.sdl
+; Smbios.c
+; Smbios.mak
+; Smbios.h
+;
+; 9 2/09/11 10:24a Davidd
+; [TAG] EIP53081
+; [Category] Bug Fix
+; [Severity] Minor
+; [Symptom] Smbios Management Device (type 34) must be enabled in
+; order to
+; see System Power Supply (type 39)
+; [RootCause] Macro to create System Power Supply structure (type 39)
+; was grouped inside macro to create Smbios Management
+; Device
+; (type 34)
+; [Solution] Seperated Type 39 macro from 34.
+; [Files] SmbiosStaticData.asm
+; Smbdata.mac
+; Smbmacro.aid
+; Smbdesc.def
+;
+; 8 4/06/10 10:18a Davidd
+; Removed CreateBiosLanguageInfo. It is now dynamically created if
+; enabled - EIP 34939
+;
+; 7 6/02/09 4:41p Davidd
+; Reformatted for Coding Standard compliance.
+;
+; 6 6/02/09 3:55p Davidd
+; Updated AMI headers (EIP 22180)
+;
+; 5 5/19/09 11:02a Davidd
+;
+; 4 10/13/08 11:15a Davidd
+; Added type 40 and 41 support per SMBIOS specification v2.6
+;
+; 3 3/29/07 4:53p Davidd
+; Changed the year in the AMI banner and adjust indentation to coding
+; standard.
+;
+; 2 12/15/06 5:21p Davidd
+; Code cleanup and reformatted to coding standard.
+;
+; 1 4/29/05 2:15p Davidd
+; Initial checkin.
+;
+;****************************************************************************
+
+;----------------------------------------------------------------------------
+
+ INCLUDE token.equ
+ INCLUDE smbhdr.equ
+ INCLUDE smbmacro.aid
+ INCLUDE smbstruc.def
+ INCLUDE smb.equ
+ INCLUDE smbdata.mac
+ INCLUDE smbdesc.def
+
+;----------------------------------------------------------------------------
+
+SMBIOS_DSEG SEGMENT BYTE PUBLIC 'DATA'
+ ASSUME cs: SMBIOS_DSEG
+.586p
+
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+ PUBLIC _SMBDATA_STARTS
+_smbdata_starts LABEL BYTE ; Marks start of module
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; SMBIOS DATA STRUCTURES
+;----------------------------------------------------------------------------
+
+;SMBDataModuleHeaderSTRUC {'_AMIDMI_',0203h,0101h,00h,offset smbios_structures_end,00h}
+
+;----------------------------------------------------------------------------
+ PUBLIC smbios_structures_start
+smbios_structures_start LABEL BYTE
+
+ handle = 0
+IF MKF_TYPE0_STRUCTURE
+ handle = CreateBiosInfo(handle)
+ENDIF
+IF MKF_TYPE1_STRUCTURE
+ handle = CreateSysInfo(handle)
+ENDIF
+IF MKF_TYPE2_STRUCTURE
+ handle = CreateBaseBoardInfo(handle)
+ENDIF
+IF MKF_TYPE3_STRUCTURE
+ handle = CreateSysChassisInfo(handle)
+ENDIF
+IF MKF_TYPE4_STRUCTURE
+ handle = CreateProcessorInfo(handle)
+ENDIF
+IF MKF_TYPE5_STRUCTURE
+ handle = CreateMemCtrlInfo(handle, handle+1)
+ENDIF
+IF MKF_TYPE6_STRUCTURE
+ handle = CreateMemModuleInfo(handle)
+ENDIF
+IF MKF_TYPE7_STRUCTURE
+ handle = CreateExternalCacheInfo(handle)
+ENDIF
+IF MKF_TYPE8_STRUCTURE
+ handle = CreatePortConnectorInfo(handle)
+ENDIF
+IF MKF_TYPE9_STRUCTURE
+ handle = CreateSystemSlotInfo(handle)
+ENDIF
+IF MKF_TYPE10_STRUCTURE
+ handle = CreateOnboardDeviceInfo(handle)
+ENDIF
+IF MKF_TYPE11_STRUCTURE
+ handle = CreateOemStringInfo(handle)
+ENDIF
+IF MKF_TYPE12_STRUCTURE
+ handle = CreateSystemConfigOptionInfo(handle)
+ENDIF
+IF MKF_TYPE15_STRUCTURE
+ handle = CreateEventLogInfo(handle)
+ENDIF
+IF MKF_TYPE16_STRUCTURE
+ handle = CreateMemoryInfo(handle)
+ENDIF
+IF MKF_FLASH_MEMORY_ARRAY_INFO
+ handle = CreateFlashMemoryInfo(handle)
+ENDIF
+IF MKF_TYPE21_STRUCTURE
+ handle = CreateBuiltinPointingDeviceInfo(handle)
+ENDIF
+IF MKF_TYPE22_STRUCTURE
+ handle = CreatePortableBatteryInfo(handle)
+ENDIF
+IF MKF_TYPE23_STRUCTURE
+ handle = CreateSystemResetInfo(handle)
+ENDIF
+IF MKF_TYPE24_STRUCTURE
+ handle = CreateHardwareSecurityInfo(handle)
+ENDIF
+IF MKF_TYPE25_STRUCTURE
+ handle = CreateSystemPowerControlsInfo(handle)
+ENDIF
+IF MKF_TYPE30_STRUCTURE
+ handle = CreateOutofBandRemoteAccessInfo(handle)
+ENDIF
+IF MKF_TYPE31_STRUCTURE
+ handle = CreateBootIntegrityServicesInfo(handle)
+ENDIF
+IF MKF_TYPE32_STRUCTURE
+ handle = CreateSystemBootInfo(handle)
+ENDIF
+IF MKF_TYPE33_STRUCTURE
+ handle = CreateSixtyFourBitMemoryErrorInfo(handle)
+ENDIF
+IF MKF_TYPE34_STRUCTURE
+ handle = CreateManagementDeviceInfo(handle)
+ENDIF
+IF MKF_TYPE37_STRUCTURE
+ handle = CreateMemoryChannelInfo(handle)
+ENDIF
+IF MKF_TYPE39_STRUCTURE
+ handle = CreateSystemPowerSupplyInfo(handle)
+ENDIF
+IF MKF_TYPE40_STRUCTURE
+ handle = CreateAdditionalInformation(handle)
+ENDIF
+IF MKF_TYPE41_STRUCTURE
+ handle = CreateOnboardDevicesExtendedInfo(handle)
+ENDIF
+IF MKF_TYPE241_STRUCTURE
+ handle = CreateOEMMemoryMappedGpnvInfo(handle)
+ENDIF
+IF MKF_TYPE240_STRUCTURE
+ handle = CreateOEMIOMappedGpnvInfo(handle)
+ENDIF
+IF MKF_TYPE38_STRUCTURE
+ handle = CreateIPMIDeviceInfo(handle)
+ENDIF
+IF MKF_TYPE129_STRUCTURE
+ handle = CreateIntelASFTable(handle)
+ENDIF
+ handle = CreateEndOfTable(handle)
+
+ db MKF_EXTRA_RESERVED_BYTES dup (0FFh) ; Extra Space
+SMBIOS_DSEG ENDS ; End of Segment
+END ; End of File
+
+;----------------------------------------------------------------------------
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2016, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
diff --git a/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticData.cif b/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticData.cif
new file mode 100644
index 0000000..1fa2711
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticData.cif
@@ -0,0 +1,17 @@
+<component>
+ name = "SMBIOS - Static Data"
+ category = ModulePart
+ LocalRoot = "Board\EM\SMBIOS\SMBiosStaticData"
+ RefName = "SmbiosStaticData"
+[files]
+"\SmbiosStaticData.sdl"
+"\SmbiosStaticData.mak"
+"\SmbiosStaticData.asm"
+"\SmbiosStaticDataEnd.asm"
+"\SMBDATA.MAC"
+"\SMBSTRUC.DEF"
+"\SMBMACRO.AID"
+"\Smbdesc.def"
+"\SMB.EQU"
+"\Smbhdr.equ"
+<endComponent>
diff --git a/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticData.mak b/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticData.mak
new file mode 100644
index 0000000..15ccb38
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticData.mak
@@ -0,0 +1,81 @@
+#************************************************************************
+#************************************************************************
+#** **
+#** (C)Copyright 1985-2009, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#************************************************************************
+#************************************************************************
+#************************************************************************
+# $Header: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/SmbiosStaticData.mak 7 5/15/09 3:26p Davidd $
+#
+# $Revision: 7 $
+#
+# $Date: 5/15/09 3:26p $
+#************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/SmbiosStaticData.mak $
+#
+# 7 5/15/09 3:26p Davidd
+# Changes made to the build process to support Nested Firmware Volume
+#
+# 6 3/29/07 4:51p Davidd
+# Changed the year in the AMI banner and adjust indentation.
+#
+# 5 3/14/07 2:16p Pavell
+# Changes for ITK
+#
+# 4 11/09/05 2:07p Felixp
+# Type of FFS file changed from RAW to FREEFORM
+#
+# 3 11/07/05 6:18p Davidd
+# Changes made to support AMIBCP.
+#
+# 2 7/20/05 2:59p Davidd
+# Removed masm option /Fl. Listing files are not needed.
+#
+# 1 4/29/05 2:15p Davidd
+# Initial checkin.
+#
+#************************************************************************//
+all : SMBIOS_STATIC
+
+SMBIOS_STATIC : $(BUILD_DIR)\SMBiosStaticData.ffs
+
+$(BUILD_DIR)\SMBiosStaticData.ffs : $(BUILD_DIR)\SMBiosSD.bin
+ $(MAKE) /f Core\FFS.mak \
+ BUILD_DIR=$(BUILD_DIR) \
+ GUID=DAF4BF89-CE71-4917-B522-C89D32FBC59F\
+ TYPE=EFI_FV_FILETYPE_FREEFORM \
+ RESOURCE=$** SECTION_GUID=AB56DC60-0057-11da-A8DB-000102EEE626 \
+ FFSFILE=$@ COMPRESS=1 NAME=SMBiosStaticData
+
+$(BUILD_DIR)\SMBiosSD.bin : $(BUILD_DIR)\SMBiosSD.exe
+ exe2bin $(BUILD_DIR)\SMBiosSD.exe $(BUILD_DIR)\SMBiosSD.bin
+
+$(BUILD_DIR)\SMBiosSD.exe : $(SMBOBJS) $(SMBIOSDATA_DIR)\SMBiosStaticDataEnd.asm $(BUILD_DIR)\timestamp.equ
+ $(ASM) /c /nologo /Fo$(BUILD_DIR)\SMBiosStaticDataEnd.obj $(SMBIOSDATA_DIR)\SMBiosStaticDataEnd.asm
+ $(ASMLINK) $(SMBOBJS) + $(BUILD_DIR)\SMBiosStaticDataEnd.obj, $(BUILD_DIR)\SMBiosSD.exe,$(BUILD_DIR)\SMBiosSD.map,,,
+
+$(BUILD_DIR)\SMBiosStaticData.obj : $(SMBIOSDATA_DIR)\SMBiosStaticData.asm $(BUILD_DIR)\timestamp.equ
+ $(ASM) /c /nologo /Fo$(BUILD_DIR)\SMBiosStaticData.obj $(SMBIOSDATA_DIR)\SMBiosStaticData.asm
+
+#************************************************************************
+#************************************************************************
+#** **
+#** (C)Copyright 1985-2009, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#************************************************************************
+#************************************************************************
diff --git a/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticData.sdl b/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticData.sdl
new file mode 100644
index 0000000..9d05d6b
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticData.sdl
@@ -0,0 +1,4036 @@
+TOKEN
+ Name = "EXTRA_RESERVED_BYTES"
+ Value = "4096"
+ Help = "Number of extra bytes to reserve in addition to the static table."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_STRING"
+ Value = "To be filled by O.E.M."
+ Help = "Default unported strings in Smbios static table"
+ TokenType = Expression
+End
+
+##############################################################################
+#
+# TYPE 0 - BIOS INFORMATION
+#
+##############################################################################
+
+TOKEN
+ Name = "TYPE0_STRUCTURE"
+ Value = "1"
+ Help = "ON -> BIOS Information structure will be present\OFF -> BIOS Information structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "BIOS_VENDOR"
+ Value = "American Megatrends Inc."
+ Help = "Specifies the BIOS Vendor's Name."
+ TokenType = Expression
+ TargetEQU = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "BI_BIOS_START_ADDR"
+ Value = "0F000h"
+ Help = "Segment location of BIOS Starting Address, e.g.0E800h.\NOTE : The size of the runtime BIOS image can be computed by subtracting the Starting Address Segment from 10000h and multiplying the result by 16."
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BIOS_SIZE"
+ Value = "$(FLASH_SIZE)"
+ Help = "Physical size of the flash part containing the BIOS"
+ TokenType = Integer
+ TargetH = Yes
+ TargetEQU = Yes
+End
+
+##############################################################################
+
+TOKEN
+ Name = "BIOS Characteristics"
+ Help = "Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc."
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "BI_UNKNOWN_CHAR"
+ Value = "0"
+ Help = "BIOS Characteristics Bit 2\ON -> BIOS Characteristics are Unknown\OFF -> BIOS Characteristics are Known "
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_BIOS_CHAR_NOT_SUPPORTED"
+ Value = "0"
+ Help = "BIOS Characteristics Bit 3\ON -> BIOS Characteristics are not Supported\OFF -> BIOS Characteristics are Supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_MCA"
+ Value = "0"
+ Help = "BIOS Characteristics Bit 5\ON -> MCA is Supported.\OFF -> MCA is Not Supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_EISA"
+ Value = "0"
+ Help = "BIOS Characteristics Bit 6\ON -> EISA is Supported.\OFF -> EISA is Not Supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_PCMCIA"
+ Value = "0"
+ Help = "BIOS Characteristics Bit 8\ON -> PC Card (PCMCIA) is Supported.\OFF -> PC Card (PCMCIA) is Not Supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_BIOS_FLASH"
+ Value = "1"
+ Help = "BIOS Characteristics Bit 11\ON -> BIOS is Upgradeable (Flash)\OFF -> BIOS is Not Upgradeable."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_BIOS_SHADOW"
+ Value = "1"
+ Help = "BIOS Characteristics Bit 12\ON -> BIOS Shadowing is Allowed.\OFF -> BIOS Shadowing is Not Allowed."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_VL_VESA"
+ Value = "0"
+ Help = "BIOS Characteristics Bit 13\ON -> VL-VESA is Supported.\OFF -> VL-VESA is Not Supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_ESCD"
+ Value = "0"
+ Help = "BIOS Characteristics Bit 14\ON -> ESCD support is Available.\OFF -> ESCD support is Not Available"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_CDROM_BOOT"
+ Value = "1"
+ Help = "BIOS Characteristics Bit 15\ON -> Boot from CD is Supported\OFF -> Boot from CD is Not Supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_SELECTABLE_BOOT"
+ Value = "1"
+ Help = "BIOS Characteristics Bit 16\ON -> Selectable Boot is Supported\OFF -> Selectable Boot is Not Supported"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_BIOS_ROM_SOCKET"
+ Value = "1"
+ Help = "BIOS Characteristics Bit 17\ON -> If the ROM is Socketed\OFF -> If the ROM is Soldered"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_PCMCIA_BOOT"
+ Value = "0"
+ Help = "BIOS Characteristics Bit 18\ON -> Boot from PC Card (PCMCIA) is Supported.\OFF -> Boot from PC Card (PCMCIA) is Not Supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_EDD"
+ Value = "1"
+ Help = "BIOS Characteristics Bit 19\ON -> EDD (Enhanced Disk Drive) Specification is Supported.\OFF -> EDD (Enhanced Disk Drive) Specification is Not Supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_INT13_NEC9800"
+ Value = "0"
+ Help = "BIOS Characteristics Bit 20\ON -> Int13h Japanese Floppy for NEC 9800 1.2MB (3.5inch, 1KBytes/Sector, 360 RPM) is Supported.\OFF -> Does Not Support."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_INT13_TOSHIBA"
+ Value = "0"
+ Help = "BIOS Characteristics Bit 21\ON -> Int13h Japanese Floppy for Toshiba 1.2MB (3.5inch, 360 RPM) is Supported.\OFF -> Does Not Support."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_INT13_5_25_360"
+ Value = "0"
+ Help = "BIOS Characteristics Bit 22\ON -> Int13h - 5.25inch/360KB Floppy Services are Supported.\OFF -> Does Not Support."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_INT13_5_25_1_2"
+ Value = "1"
+ Help = "BIOS Characteristics Bit 23\ON -> Int13h - 5.25inch/1.2MB Floppy Services are Supported.\OFF -> Does Not Support."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_INT13_3_5_720"
+ Value = "1"
+ Help = "BIOS Characteristics Bit 24\ON -> Int13h - 3.5inch/720KB Floppy Services are Supported.\OFF -> Does Not Support."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_INT13_3_5_2_88"
+ Value = "1"
+ Help = "BIOS Characteristics Bit 25\ON -> Int13h - 3.5inch/2.88MB Floppy Services are Supported.\OFF -> Does Not Support."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_INT5_PRINT_SCRN"
+ Value = "1"
+ Help = "BIOS Characteristics Bit 26\ON -> Int5h - Print Screen Service is Supported.\OFF -> Does Not Support."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_INT14_SERIAL_SVC"
+ Value = "1"
+ Help = "BIOS Characteristics Bit 28\ON -> Int14h - Serial Services are Supported.\OFF -> Does Not Support."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_INT17_PRN_SVC"
+ Value = "1"
+ Help = "BIOS Characteristics Bit 29\ON -> Int17h - Printer Services are Supported.\OFF -> Does Not Support."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_INT10_CGA_MONO"
+ Value = "0"
+ Help = "BIOS Characteristics Bit 30\ON -> Int10h - CGA/Mono Video Services are Supported.\OFF -> Does Not Support."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_NEC_PC_98"
+ Value = "0"
+ Help = "BIOS Characteristics Bit 31\ON -> NEC PC-98 is Supported.\OFF -> NEC PC-98 is Not Supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+##############################################################################
+
+TOKEN
+ Name = "BIOS Characteristics Extension Byte 1"
+ Help = "Optional space reserved for future supported functions. The number of Extension Bytes that are present is indicated by the Length in offset 1 minus 12h."
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "BI_AGP_SUPPORT"
+ Value = "0"
+ Help = "BIOS Characteristics Extension Byte 1 Bit 2\ON -> AGP is Supported.\OFF -> AGP is Not Supported"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_I2O_BOOT_SUP"
+ Value = "0"
+ Help = "BIOS Characteristics Extension Byte 1 Bit 3\ON -> I2O Boot is Supported.\OFF -> I2O Boot is Not Supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_LS120_BOOT_SUP"
+ Value = "0"
+ Help = "BIOS Characteristics Extension Byte 1 Bit 4\ON -> LS-120 Boot is Supported.\OFF -> LS-120 Boot is Not Supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_ATAPI_ZIP_SUP"
+ Value = "0"
+ Help = "BIOS Characteristics Extension Byte 1 Bit 5\ON -> ATAPI ZIP Drive Boot is Supported.\OFF -> ATAPI ZIP Drive Boot is Not Supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_IEEE_1394_SUP"
+ Value = "0"
+ Help = "BIOS Characteristics Extension Byte 1 Bit 6\ON -> 1394 Boot is Supported.\OFF -> 1394 Boot is Not Supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_SMART_BAT_SUP"
+ Value = "0"
+ Help = "BIOS Characteristics Extension Byte 1 Bit 7\ON -> Smart Battery is Supported.\OFF -> Smart Battery is Not Supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+##############################################################################
+
+TOKEN
+ Name = "BIOS Characteristics Extension Byte 2"
+ Help = "Optional space reserved for future supported functions. The number of Extension Bytes that are present is indicated by the Length in offset 1 minus 12h."
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "BBS_SUPPORT"
+ Value = "1"
+ Help = "BIOS Characteristics Extension Byte 2 Bit 0\ON -> Enable BIOS Boot Specification support.\OFF -> Disable BIOS Boot Specification support."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "NETBOOT_SUPPORT"
+ Value = "0"
+ Help = "BIOS Characteristics Extension Byte 2 Bit 1\ON -> Function key-initiated Network Service boot support enabled. \OFF -> Function key-initiated Network Service boot support disabled."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BI_ETCD"
+ Value = "1"
+ Help = "BIOS Characteristics Extension Byte 2 Bit 2\ON -> Enable Targeted Content Distribution is ON.\OFF -> Enable Targeted Content Distribution is OFF."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "UEFI_SUPPORT"
+ Value = "1"
+ Help = "BIOS Characteristics Extension Byte 2 Bit 3\ON -> UEFI Specification is supported.\OFF -> UEFI Specification is not supported."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "VIRTUAL_MACHINE"
+ Value = "0"
+ Help = "BIOS Characteristics Extension Byte 2 Bit 4\ON -> The SMBIOS table describes a virtual machine.\OFF -> The SMBIOS table describes a real machine."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+##############################################################################
+
+TOKEN
+ Name = "ECMA"
+ Value = "0FFh"
+ Help = "Embedded Controller Firmware Major Release.\0FFh = System does not have field upgradeable embedded controller firmware."
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "ECMI"
+ Value = "0FFh"
+ Help = "Embedded Controller Firmware Minor Release.\0FFh = System does not have field upgradeable embedded controller firmware."
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+##############################################################################
+#
+# TYPE 1 - SYSTEM INFORMATION
+#
+##############################################################################
+#
+# The information in this Structure defines attributes of the overall
+# system and is intended to be associated with the Component ID group of
+# the system's MIF.\An SMBIOS implementation is associated with a single
+# system instance and contains one and only one System Information
+# (Type 1) structure.
+#
+##############################################################################
+
+TOKEN
+ Name = "TYPE1_STRUCTURE"
+ Value = "1"
+ Help = "ON -> System Information structure will be present\OFF -> System Information structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SYSTEM_MANUFACTURER"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the System Manufacturer Name."
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYSTEM_PRODUCT_NAME"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the System Product Name"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYSTEM_VERSION"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the System Product Version."
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYSTEM_SERIAL_NUMBER"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the System Serial Number."
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYSTEM_WAKEUP_TYPE"
+ Value = "06h"
+ Help = "Specifies the System Wake-up Type.\00h - Reserved\01h - Other\02h - Unknown\03h - APM Timer\04h - Modem Ring\05h - LAN Remote\06h - Power Switch\07h - PCI PME#\08h - AC Power Restored"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 08h"
+End
+
+TOKEN
+ Name = "SYSTEM_SKU_NUMBER"
+ Value = "$(DEFAULT_STRING)"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYSTEM_FAMILY"
+ Value = "$(DEFAULT_STRING)"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SMBIOS_UUID"
+ Value = "{0,2,0,3,0,4,0,5,0,6,0,7,0,8,0,9}"
+ Help = "List of TYPE 1 UUID"
+ TokenType = Expression
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 2 - BASE BOARD (or MODULE) INFORMATION
+#
+##############################################################################
+#
+# This information in this structure defines attributes of a system
+# baseboard - for example a motherboard, planar, or server blade or other
+# standard system module.
+#
+##############################################################################
+
+TOKEN
+ Name = "BASE_BOARD_INFO"
+ Value = "0"
+ Help = "ON -> BaseBoard Information (Type 2) structure will be present\OFF -> BaseBoard Information (Type 2) structure will not be present\"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE2_STRUCTURE"
+ Value = "$(BASE_BOARD_INFO)"
+ Help = "Alternate token name for BASE_BOARD_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NUMBER_OF_BASEBOARDS"
+ Value = "1"
+ Help = "Number of Baseboard (Type 2) structure"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Token = "BASE_BOARD_INFO" "=" "1"
+End
+
+############################################################################
+# When NUMBER_OF_BASEBOARDS = 1:
+# For backward compatibility, porting information is to be done below
+#
+# When NUMBER_OF_BASEBOARDS > 1:
+# Porting information is to be done in Smbdesc.def file
+############################################################################
+
+TOKEN
+ Name = "BASE_BOARD_MANUFACTURER"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Board Manufacturer."
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "BASE_BOARD_INFO" "=" "1"
+ Token = "NUMBER_OF_BASEBOARDS" "=" "1"
+End
+
+TOKEN
+ Name = "BASE_BOARD_PRODUCT_NAME"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Product Name"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "BASE_BOARD_INFO" "=" "1"
+ Token = "NUMBER_OF_BASEBOARDS" "=" "1"
+End
+
+TOKEN
+ Name = "BASE_BOARD_VERSION"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Product Version."
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "BASE_BOARD_INFO" "=" "1"
+ Token = "NUMBER_OF_BASEBOARDS" "=" "1"
+End
+
+TOKEN
+ Name = "BASE_BOARD_SERIAL_NUMBER"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Product Serial Number."
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "BASE_BOARD_INFO" "=" "1"
+ Token = "NUMBER_OF_BASEBOARDS" "=" "1"
+End
+
+TOKEN
+ Name = "BB_ASSET_TAG"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Asset Tag Number of the Base Board."
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "BASE_BOARD_INFO" "=" "1"
+ Token = "NUMBER_OF_BASEBOARDS" "=" "1"
+End
+
+TOKEN
+ Name = "BB_LOC_IN_CHASSIS"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Location of Base Board in the Chassis."
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "BASE_BOARD_INFO" "=" "1"
+ Token = "NUMBER_OF_BASEBOARDS" "=" "1"
+End
+
+TOKEN
+ Name = "BB_BOARD_TYPE"
+ Value = "0Ah"
+ Help = "Specifies the Base Board type.\\01h - Unknown\02h - Other\03h - Server Blade\04h - Connectivity Switch\05h - System Management Module\06h - Processor Module\07h - I/O Module\08h - Memory Module\09h - Daughter Board\0Ah - Motherboard (includes Processor, Memory, and I/O)\0Bh - Processor/Memory Module\0Ch - Processor/IO Module\0Dh - Interconnect Board"
+ TokenType = Integer
+ TargetEQU = Yes
+ Token = "BASE_BOARD_INFO" "=" "1"
+ Token = "NUMBER_OF_BASEBOARDS" "=" "1"
+End
+
+TOKEN
+ Name = "BB_HOSTING_BOARD"
+ Value = "1"
+ Help = "ON - Board is Hosting Board eg. Motherboard\OFF - Board is not a Hosting Board"
+ TokenType = Boolean
+ TargetEQU = Yes
+ Range = "ON - OFF"
+ Token = "BASE_BOARD_INFO" "=" "1"
+ Token = "NUMBER_OF_BASEBOARDS" "=" "1"
+End
+
+TOKEN
+ Name = "BB_REQUIRE_AUX_BOARD"
+ Value = "0"
+ Help = "ON - Board requires atleast one Daughter Board or Auxiliary card to function properly\OFF - Board can function properly without Daughter Board or Auxilliary Card"
+ TokenType = Boolean
+ TargetEQU = Yes
+ Range = "ON - OFF"
+ Token = "BASE_BOARD_INFO" "=" "1"
+ Token = "NUMBER_OF_BASEBOARDS" "=" "1"
+End
+
+TOKEN
+ Name = "BB_REMOVABLE"
+ Value = "0"
+ Help = "ON - Board is Removable. It is designed to be taken in and out of the Chassis without imaparing the function of the Chassis.\OFF - Board is not Removable."
+ TokenType = Boolean
+ TargetEQU = Yes
+ Range = "ON - OFF"
+ Token = "BASE_BOARD_INFO" "=" "1"
+ Token = "NUMBER_OF_BASEBOARDS" "=" "1"
+End
+
+TOKEN
+ Name = "BB_REPLACEABLE"
+ Value = "1"
+ Help = "ON - Board is Replaceable. It is possible to replace (either as a field repair or upgrade) the board with a physically different one. The board is inherently removable.\OFF - Board is not Replaceable."
+ TokenType = Boolean
+ TargetEQU = Yes
+ Range = "ON - OFF"
+ Token = "BASE_BOARD_INFO" "=" "1"
+ Token = "NUMBER_OF_BASEBOARDS" "=" "1"
+End
+
+TOKEN
+ Name = "BB_HOT_SWAPPABLE"
+ Value = "0"
+ Help = "ON - Board is Hot Swappable. It is possible to replace the board with a physically different but equvalent one while power is applied to the Board. The board is inherently replaceable and removable.\OFF - Board is not Hot Swappable."
+ TokenType = Boolean
+ TargetEQU = Yes
+ Range = "ON - OFF"
+ Token = "BASE_BOARD_INFO" "=" "1"
+ Token = "NUMBER_OF_BASEBOARDS" "=" "1"
+End
+
+TOKEN
+ Name = "NUMBER_OF_OBJECT_HANDLES"
+ Value = "0"
+ Help = "Number of Contained Object Handles"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Range = "0-255"
+ Token = "BASE_BOARD_INFO" "=" "1"
+ Token = "NUMBER_OF_BASEBOARDS" "=" "1"
+End
+
+##############################################################################
+#
+# TYPE 3 - SYSTEM ENCLOSURE OR CHASSIS
+#
+##############################################################################
+#
+# The information in this structure defines attributes of the system's
+# mechanical enclosure(s). For example, if the system included a separate
+# enclosure for its peripheral devices, two structures would be returned:
+# one for the main, system enclosure and the second for the peripheral
+# device enclosure.
+#
+##############################################################################
+
+TOKEN
+ Name = "SYS_CHASSIS_INFO"
+ Value = "1"
+ Help = "ON -> System Chassis Information (Type 3) structure will be present\OFF -> System Chassis Information (Type 3) structure will not be present\"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TYPE3_STRUCTURE"
+ Value = "$(SYS_CHASSIS_INFO)"
+ Help = "Alternate token name for SYS_CHASSIS_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NUMBER_OF_SYSTEM_CHASSIS"
+ Value = "1"
+ Help = "Number of System Chassis (Type 3) structure"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Token = "SYS_CHASSIS_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_MANUFACTURER_1"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the System Chassis Manufacturer."
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_MANUFACTURER_2"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the System Chassis Manufacturer."
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_MANUFACTURER_3"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the System Chassis Manufacturer."
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_MANUFACTURER_4"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the System Chassis Manufacturer."
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_MANUFACTURER_5"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the System Chassis Manufacturer."
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_LOCK_1"
+ Value = "0"
+ Help = "Bit7 of System Chassis Type\ON => Chassis Lock is present \OFF => Either a Lock is not present or it is unknown if the Chassis or Enclosure has a lock"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_LOCK_2"
+ Value = "0"
+ Help = "Bit7 of System Chassis Type\ON => Chassis Lock is present \OFF => Either a Lock is not present or it is unknown if the Chassis or Enclosure has a lock"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_LOCK_3"
+ Value = "0"
+ Help = "Bit7 of System Chassis Type\ON => Chassis Lock is present \OFF => Either a Lock is not present or it is unknown if the Chassis or Enclosure has a lock"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_LOCK_4"
+ Value = "0"
+ Help = "Bit7 of System Chassis Type\ON => Chassis Lock is present \OFF => Either a Lock is not present or it is unknown if the Chassis or Enclosure has a lock"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_LOCK_5"
+ Value = "0"
+ Help = "Bit7 of System Chassis Type\ON => Chassis Lock is present \OFF => Either a Lock is not present or it is unknown if the Chassis or Enclosure has a lock"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_TYPE_1"
+ Value = "03"
+ Help = "Bits 6:0 - Enumeration Value See Below.\01h - Other\02h - Unknown\03h - Desktop\04h - Low Profile Desktop\05h - Pizza Box\06h - Mini Tower\07h - Tower\08h - Portable\09h - Lap Top\0Ah - Notebook\0Bh - Hand Held\0Ch - Docking Station\0Dh - All in One\0Eh - Sub Notebook\0Fh - Space-saving\10h - Lunch Box\11h - Main Server Chassis\12h - Expansion Chassis\13h - Sub Chassis\14h - Bus Expansion Chassis\15h - Peripheral Chassis\16h - RAID Chassis\17h - Rack Mount Chassis\18h - Sealed-Case PC\19h - Multi-System Chassis. When this value is specified by an SMBIOS implementation, the physical chassis associated with this structure supports multiple, independently reporting physical systems\ - regardless of the chassis' current configuration. Systems in the same physical chassis are required to report the same value in this structure's Serial Number field.\ For a Chassis that may also be configured as either a single system or multiple physical systems, the Multi-System Chassis value is reported even if the chassis is currently configured as a \ Single System. This allows management applications to recognize the multi-system potential of the chassis.\1Ah - CompactPCI\1Bh - AdvancedTCA\1Ch - Blade\1Dh - Blade Enclosure\1Eh - Tablet\1Fh - Convertible\20h - Detachable"
+
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 19h"
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_TYPE_2"
+ Value = "03"
+ Help = "Bits 6:0 - Enumeration Value See Below.\01h - Other\02h - Unknown\03h - Desktop\04h - Low Profile Desktop\05h - Pizza Box\06h - Mini Tower\07h - Tower\08h - Portable\09h - Lap Top\0Ah - Notebook\0Bh - Hand Held\0Ch - Docking Station\0Dh - All in One\0Eh - Sub Notebook\0Fh - Space-saving\10h - Lunch Box\11h - Main Server Chassis\12h - Expansion Chassis\13h - Sub Chassis\14h - Bus Expansion Chassis\15h - Peripheral Chassis\16h - RAID Chassis\17h - Rack Mount Chassis\18h - Sealed-Case PC\19h - Multi-System Chassis. When this value is specified by an SMBIOS implementation, the physical chassis associated with this structure supports multiple, independently reporting physical systems\ - regardless of the chassis' current configuration. Systems in the same physical chassis are required to report the same value in this structure's Serial Number field.\ For a Chassis that may also be configured as either a single system or multiple physical systems, the Multi-System Chassis value is reported even if the chassis is currently configured as a \ Single System. This allows management applications to recognize the multi-system potential of the chassis.\1Ah - CompactPCI\1Bh - AdvancedTCA\1Ch - Blade\1Dh - Blade Enclosure\1Eh - Tablet\1Fh - Convertible\20h - Detachable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 19h"
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_TYPE_3"
+ Value = "03"
+ Help = "Bits 6:0 - Enumeration Value See Below.\01h - Other\02h - Unknown\03h - Desktop\04h - Low Profile Desktop\05h - Pizza Box\06h - Mini Tower\07h - Tower\08h - Portable\09h - Lap Top\0Ah - Notebook\0Bh - Hand Held\0Ch - Docking Station\0Dh - All in One\0Eh - Sub Notebook\0Fh - Space-saving\10h - Lunch Box\11h - Main Server Chassis\12h - Expansion Chassis\13h - Sub Chassis\14h - Bus Expansion Chassis\15h - Peripheral Chassis\16h - RAID Chassis\17h - Rack Mount Chassis\18h - Sealed-Case PC\19h - Multi-System Chassis. When this value is specified by an SMBIOS implementation, the physical chassis associated with this structure supports multiple, independently reporting physical systems\ - regardless of the chassis' current configuration. Systems in the same physical chassis are required to report the same value in this structure's Serial Number field.\ For a Chassis that may also be configured as either a single system or multiple physical systems, the Multi-System Chassis value is reported even if the chassis is currently configured as a \ Single System. This allows management applications to recognize the multi-system potential of the chassis.\1Ah - CompactPCI\1Bh - AdvancedTCA\1Ch - Blade\1Dh - Blade Enclosure\1Eh - Tablet\1Fh - Convertible\20h - Detachable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 19h"
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_TYPE_4"
+ Value = "03"
+ Help = "Bits 6:0 - Enumeration Value See Below.\01h - Other\02h - Unknown\03h - Desktop\04h - Low Profile Desktop\05h - Pizza Box\06h - Mini Tower\07h - Tower\08h - Portable\09h - Lap Top\0Ah - Notebook\0Bh - Hand Held\0Ch - Docking Station\0Dh - All in One\0Eh - Sub Notebook\0Fh - Space-saving\10h - Lunch Box\11h - Main Server Chassis\12h - Expansion Chassis\13h - Sub Chassis\14h - Bus Expansion Chassis\15h - Peripheral Chassis\16h - RAID Chassis\17h - Rack Mount Chassis\18h - Sealed-Case PC\19h - Multi-System Chassis. When this value is specified by an SMBIOS implementation, the physical chassis associated with this structure supports multiple, independently reporting physical systems\ - regardless of the chassis' current configuration. Systems in the same physical chassis are required to report the same value in this structure's Serial Number field.\ For a Chassis that may also be configured as either a single system or multiple physical systems, the Multi-System Chassis value is reported even if the chassis is currently configured as a \ Single System. This allows management applications to recognize the multi-system potential of the chassis.\1Ah - CompactPCI\1Bh - AdvancedTCA\1Ch - Blade\1Dh - Blade Enclosure\1Eh - Tablet\1Fh - Convertible\20h - Detachable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 19h"
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_TYPE_5"
+ Value = "03"
+ Help = "Bits 6:0 - Enumeration Value See Below.\01h - Other\02h - Unknown\03h - Desktop\04h - Low Profile Desktop\05h - Pizza Box\06h - Mini Tower\07h - Tower\08h - Portable\09h - Lap Top\0Ah - Notebook\0Bh - Hand Held\0Ch - Docking Station\0Dh - All in One\0Eh - Sub Notebook\0Fh - Space-saving\10h - Lunch Box\11h - Main Server Chassis\12h - Expansion Chassis\13h - Sub Chassis\14h - Bus Expansion Chassis\15h - Peripheral Chassis\16h - RAID Chassis\17h - Rack Mount Chassis\18h - Sealed-Case PC\19h - Multi-System Chassis. When this value is specified by an SMBIOS implementation, the physical chassis associated with this structure supports multiple, independently reporting physical systems\ - regardless of the chassis' current configuration. Systems in the same physical chassis are required to report the same value in this structure's Serial Number field.\ For a Chassis that may also be configured as either a single system or multiple physical systems, the Multi-System Chassis value is reported even if the chassis is currently configured as a \ Single System. This allows management applications to recognize the multi-system potential of the chassis.\1Ah - CompactPCI\1Bh - AdvancedTCA\1Ch - Blade\1Dh - Blade Enclosure\1Eh - Tablet\1Fh - Convertible\20h - Detachable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 19h"
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_VERSION_1"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Chassis Version"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_VERSION_2"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Chassis Version"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_VERSION_3"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Chassis Version"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_VERSION_4"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Chassis Version"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_VERSION_5"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Chassis Version"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_SERIAL_NUM_1"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Chassis Serial number"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_SERIAL_NUM_2"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Chassis Serial number"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_SERIAL_NUM_3"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Chassis Serial number"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_SERIAL_NUM_4"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Chassis Serial number"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_SERIAL_NUM_5"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Chassis Serial number"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_ASSET_TAG_NUM_1"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Asset Tag Number."
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_ASSET_TAG_NUM_2"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Asset Tag Number."
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_ASSET_TAG_NUM_3"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Asset Tag Number."
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_ASSET_TAG_NUM_4"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Asset Tag Number."
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_ASSET_TAG_NUM_5"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the Asset Tag Number."
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_BOOT_STATE_1"
+ Value = "03h"
+ Help = "Specifies the state of the System Chassis or enclosure when it was last booted.\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_BOOT_STATE_2"
+ Value = "03h"
+ Help = "Specifies the state of the System Chassis or enclosure when it was last booted.\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_BOOT_STATE_3"
+ Value = "03h"
+ Help = "Specifies the state of the System Chassis or enclosure when it was last booted.\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_BOOT_STATE_4"
+ Value = "03h"
+ Help = "Specifies the state of the System Chassis or enclosure when it was last booted.\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_BOOT_STATE_5"
+ Value = "03h"
+ Help = "Specifies the state of the System Chassis or enclosure when it was last booted.\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_PWR_SUPPLY_STATE_1"
+ Value = "03h"
+ Help = "Specifies the state of System Chassis or enclosure's Power Supply(Supplies) when last booted. 01h\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_PWR_SUPPLY_STATE_2"
+ Value = "03h"
+ Help = "Specifies the state of System Chassis or enclosure's Power Supply(Supplies) when last booted. 01h\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_PWR_SUPPLY_STATE_3"
+ Value = "03h"
+ Help = "Specifies the state of System Chassis or enclosure's Power Supply(Supplies) when last booted. 01h\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_PWR_SUPPLY_STATE_4"
+ Value = "03h"
+ Help = "Specifies the state of System Chassis or enclosure's Power Supply(Supplies) when last booted. 01h\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_PWR_SUPPLY_STATE_5"
+ Value = "03h"
+ Help = "Specifies the state of System Chassis or enclosure's Power Supply(Supplies) when last booted. 01h\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_THERMAL_STATE_1"
+ Value = "03h"
+ Help = "Specifies the state of System Chassis or enclosure's Thermal State when last booted.\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_THERMAL_STATE_2"
+ Value = "03h"
+ Help = "Specifies the state of System Chassis or enclosure's Thermal State when last booted.\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_THERMAL_STATE_3"
+ Value = "03h"
+ Help = "Specifies the state of System Chassis or enclosure's Thermal State when last booted.\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_THERMAL_STATE_4"
+ Value = "03h"
+ Help = "Specifies the state of System Chassis or enclosure's Thermal State when last booted.\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_THERMAL_STATE_5"
+ Value = "03h"
+ Help = "Specifies the state of System Chassis or enclosure's Thermal State when last booted.\01h - Other\02h - Unknown\03h - Safe\04h - Warning\05h - Critical\06h - Non-recoverable"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 06h"
+End
+
+TOKEN
+ Name = "SYS_SECURE_STATE_1"
+ Value = "03h"
+ Help = "Specifies the System Chassis or enclosure's physical Security Status when last booted.\01h - Other\02h - Unknown\03h - None\04h - External interface locked out\05h - External interface enabled"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 05h"
+End
+
+TOKEN
+ Name = "SYS_SECURE_STATE_2"
+ Value = "03h"
+ Help = "Specifies the System Chassis or enclosure's physical Security Status when last booted.\01h - Other\02h - Unknown\03h - None\04h - External interface locked out\05h - External interface enabled"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 05h"
+End
+
+TOKEN
+ Name = "SYS_SECURE_STATE_3"
+ Value = "03h"
+ Help = "Specifies the System Chassis or enclosure's physical Security Status when last booted.\01h - Other\02h - Unknown\03h - None\04h - External interface locked out\05h - External interface enabled"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 05h"
+End
+
+TOKEN
+ Name = "SYS_SECURE_STATE_4"
+ Value = "03h"
+ Help = "Specifies the System Chassis or enclosure's physical Security Status when last booted.\01h - Other\02h - Unknown\03h - None\04h - External interface locked out\05h - External interface enabled"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 05h"
+End
+
+TOKEN
+ Name = "SYS_SECURE_STATE_5"
+ Value = "03h"
+ Help = "Specifies the System Chassis or enclosure's physical Security Status when last booted.\01h - Other\02h - Unknown\03h - None\04h - External interface locked out\05h - External interface enabled"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 05h"
+End
+
+TOKEN
+ Name = "SYS_OEM_1"
+ Value = "0000000"
+ Help = "Contains OEM or BIOS Vender Specific Information."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "DWORD"
+End
+
+TOKEN
+ Name = "SYS_OEM_2"
+ Value = "0000000"
+ Help = "Contains OEM or BIOS Vender Specific Information."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "DWORD"
+End
+
+TOKEN
+ Name = "SYS_OEM_3"
+ Value = "0000000"
+ Help = "Contains OEM or BIOS Vender Specific Information."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "DWORD"
+End
+
+TOKEN
+ Name = "SYS_OEM_4"
+ Value = "0000000"
+ Help = "Contains OEM or BIOS Vender Specific Information."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "DWORD"
+End
+
+TOKEN
+ Name = "SYS_OEM_5"
+ Value = "0000000"
+ Help = "Contains OEM or BIOS Vender Specific Information."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "DWORD"
+End
+
+TOKEN
+ Name = "SYS_HEIGHT_1"
+ Value = "0"
+ Help = "Specifies the Height of the System Enclosure in 'U's.\1U = 1.75 inches = 4.445cm\0 = UnSpecified Height"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_HEIGHT_2"
+ Value = "0"
+ Help = "Specifies the Height of the System Enclosure in 'U's.\1U = 1.75 inches = 4.445cm\0 = UnSpecified Height"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_HEIGHT_3"
+ Value = "0"
+ Help = "Specifies the Height of the System Enclosure in 'U's.\1U = 1.75 inches = 4.445cm\0 = UnSpecified Height"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_HEIGHT_4"
+ Value = "0"
+ Help = "Specifies the Height of the System Enclosure in 'U's.\1U = 1.75 inches = 4.445cm\0 = UnSpecified Height"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_HEIGHT_5"
+ Value = "0"
+ Help = "Specifies the Height of the System Enclosure in 'U's.\1U = 1.75 inches = 4.445cm\0 = UnSpecified Height"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "NO_PWR_CORDS_1"
+ Value = "1"
+ Help = "Specifies the Number of Power Cords in the System.\0 = UnSpecified"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "NO_PWR_CORDS_2"
+ Value = "1"
+ Help = "Specifies the Number of Power Cords in the System.\0 = UnSpecified"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "NO_PWR_CORDS_3"
+ Value = "1"
+ Help = "Specifies the Number of Power Cords in the System.\0 = UnSpecified"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "NO_PWR_CORDS_4"
+ Value = "1"
+ Help = "Specifies the Number of Power Cords in the System.\0 = UnSpecified"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "NO_PWR_CORDS_5"
+ Value = "1"
+ Help = "Specifies the Number of Power Cords in the System.\0 = UnSpecified"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "ELEMENT_COUNT_1"
+ Value = "0"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Range = "0-255"
+End
+
+TOKEN
+ Name = "ELEMENT_COUNT_2"
+ Value = "0"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Range = "0-255"
+End
+
+TOKEN
+ Name = "ELEMENT_COUNT_3"
+ Value = "0"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Range = "0-255"
+End
+
+TOKEN
+ Name = "ELEMENT_COUNT_4"
+ Value = "0"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Range = "0-255"
+End
+
+TOKEN
+ Name = "ELEMENT_COUNT_5"
+ Value = "0"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Range = "0-255"
+End
+
+TOKEN
+ Name = "ELEMENT_LEN_1"
+ Value = "3"
+ Help = "Contained Element Record Length"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ELEMENT_LEN_2"
+ Value = "3"
+ Help = "Contained Element Record Length"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ELEMENT_LEN_3"
+ Value = "3"
+ Help = "Contained Element Record Length"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ELEMENT_LEN_4"
+ Value = "3"
+ Help = "Contained Element Record Length"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ELEMENT_LEN_5"
+ Value = "3"
+ Help = "Contained Element Record Length"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "CONT_ELEMENT_1"
+ Value = "{0,0,0}"
+ Help = "Contained Elements: please specify (ELEMENT_COUNT_1 * ELEMENT_LEN_1) byte entries"
+ TokenType = Expression
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "CONT_ELEMENT_2"
+ Value = "{0,0,0,0,0,0}"
+ Help = "Contained Elements: please specify (ELEMENT_COUNT_2 * ELEMENT_LEN_2) byte entries"
+ TokenType = Expression
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "CONT_ELEMENT_3"
+ Value = "{0,0,0,0,0,0,0,0,0}"
+ Help = "Contained Elements: please specify (ELEMENT_COUNT_3 * ELEMENT_LEN_3) byte entries"
+ TokenType = Expression
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "CONT_ELEMENT_4"
+ Value = "{0,0,0,0,0,0,0,0,0,0,0,0}"
+ Help = "Contained Elements: please specify (ELEMENT_COUNT_4 * ELEMENT_LEN_4) byte entries"
+ TokenType = Expression
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "CONT_ELEMENT_5"
+ Value = "{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}"
+ Help = "Contained Elements: please specify (ELEMENT_COUNT_5 * ELEMENT_LEN_5) byte entries"
+ TokenType = Expression
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_SKU_NUMBER_1"
+ Value = "$(DEFAULT_STRING)"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_SKU_NUMBER_2"
+ Value = "$(DEFAULT_STRING)"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_SKU_NUMBER_3"
+ Value = "$(DEFAULT_STRING)"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_SKU_NUMBER_4"
+ Value = "$(DEFAULT_STRING)"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SYS_CHASSIS_SKU_NUMBER_5"
+ Value = "$(DEFAULT_STRING)"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+##############################################################################
+#
+# TYPE 4 - PROCESSOR INFORMATION
+#
+##############################################################################
+#
+# The information in this structure defines the attributes of a single
+# processor; a separate structure instance is provided for each system
+# processor socket/slot. For example, a system with an IntelDX2 processor
+# would have a single structure instance while a system with an IntelSX2
+# processor would have a structure to describe the main CPU and a second
+# structure to describe the 80487 co-processor.
+#
+# NOTE : One structure is provided for each processor instance in a system.
+# For example, a system that supports up to two processors includes two
+# Processor Information Structures - even if only one processor is
+# currently installed. Software that interprets the SMBIOS information
+# can count the Processor Information structures to determine the maximum
+# possible configuration of the system.
+#
+##############################################################################
+
+TOKEN
+ Name = "PROCESSOR_INFO"
+ Value = "1"
+ Help = "ON -> Processor Information (Type 4) structure will be present\OFF -> Processor Information (Type 4) structure will not be present\The number of CPU is defined in CPU.SDL as NCPU.\Total number of processors will be NCPU ( specified in CPU.SDL) \Currenty there is support for 4 Processors. \To support more processores modify in SMBDESC.DEF and SMBIOS.SDL"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "TYPE4_STRUCTURE"
+ Value = "$(PROCESSOR_INFO)"
+ Help = "Alternate token name for PROCESSOR_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NO_OF_PROCESSOR_SOCKETS"
+ Value = "1"
+ Help = "Specifies the Number of Physical Processors (Number of Processor Sockets) in the System."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Range = "1, 2, 3.........."
+End
+
+##############################################################################
+#
+# TYPE 5 - MEMORY CONTROLLER INFORMATION
+#
+##############################################################################
+#
+# NOTE : This structure, and its companion Memory Module Information
+# (Type 6), are OBSOLETE starting with version 2.1 of this specification;
+# The Physical Memory Array (Type 16) and Memory Device (Type 17)
+# structures, should be used instead to allow proper population of the
+# DMI 2.0 required groups. The information in this structure defines the
+# attributes of the system's memory controller(s) and the supported
+# attributes of any memory-modules present in the sockets controlled by
+# this controller.
+#
+##############################################################################
+
+TOKEN
+ Name = "MEM_CTRL_INFO"
+ Value = "0"
+ Help = "ON -> Memory Controller Information (Type 5) structure will be present\OFF -> Memory Controller Information (Type 5) structure will not be present.\The following information is needed only if MEMORY_CONTROLLER_INFO = Present. This structure (TYPE 5) is associated with MEMORY MODULE Structure(Type 6)\Handle information of Type 6 is defined in this structure."
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE5_STRUCTURE"
+ Value = "$(MEM_CTRL_INFO)"
+ Help = "Alternate token name for MEM_CTRL_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MEM_CTRL_EDD"
+ Value = "06h"
+ Help = "Please enter the proper value as per the SMBIOS spec 2.3.1"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "MEM_CTRL_INTRLV"
+ Value = "03h"
+ Help = "Please enter the proper value as per the SMBIOS spec 2.3.1"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "MAX_MEM_MODULE_SIZE"
+ Value = "2048"
+ Help = "Specify size in terms of MB only!!!"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+##############################################################################
+
+TOKEN
+ Name = "Memory Controller ECC"
+ Help = "Following are the bit fiels according to SMBIOS 2.3.1"
+ TokenType = Integer
+End
+
+TOKEN
+ Name = "MCE_OTHER"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "MCE_UNKNOWN"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "MCE_NONE"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "MCE_SINGLE_BIT_ECC"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "MCE_DOUBLE_BIT_ECC"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "MCE_ERROR_SCRUBBING"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+##############################################################################
+
+TOKEN
+ Name = "MEMORY CONTROLLER SUPPORTED SPEED"
+ Help = "Followin are the bit fields as per SMBIOS 2.3.1 topic 3.3.64"
+ TokenType = Integer
+End
+
+TOKEN
+ Name = "SS_OTHER "
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SS_UNKNOWN "
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SS_70NS"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SS_60NS"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "SS_50NS"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+##############################################################################
+
+TOKEN
+ Name = "MEMORY CONTROLLER SUPPORTED MEMORY TYPES"
+ Help = "Following are the supported memory types as per SMBIOS 2.3.1 topic 3.3.7.1"
+ TokenType = Integer
+End
+
+TOKEN
+ Name = "TYPE_OTHER"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "TYPE_UNKNOWN"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "TYPE_STANDARD"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "TYPE_FAST_PAGE_MODE"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "TYPE_EDO"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "TYPE_PARITY"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "TYPE_ECC"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "TYPE_SIMM"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "TYPE_DIMM"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "TYPE_BURST_EDO"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "TYPE_SDRAM"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+##############################################################################
+
+TOKEN
+ Name = "MEMORY MODULE VOTAGE SUPPORT"
+ Help = "Following are bit fiels according to SMBIOS 2.3.1"
+ TokenType = Integer
+End
+
+TOKEN
+ Name = "MM_VOLTAGE_29V"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "MM_VOLTAGE_33V"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "MM_VOLTAGE_5V"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+##############################################################################
+#
+# TYPE 6 - MEMORY MODULE INFORMATION
+#
+##############################################################################
+#
+# NOTE : This structure, and its companion Memory Controller Information
+# (Type 5), are OBSOLETE starting with version 2.1 of this specification;
+# The Physical Memory Array (Type 16) and Memory Device (Type 17)
+# structures, should be used instead to allow proper population of the
+# DMI 2.0 required groups. One Memory Module Information structure is
+# included for each memory-module socket in the system. The information
+# in this structure describes the Speed, Type, Size and Error Status of
+# each system memory module. The supported attributes of each module are
+# described by the 'owning' Memory Controller Information Structure.
+#
+##############################################################################
+
+TOKEN
+ Name = "MEM_MODULE_INFO"
+ Value = "0"
+ Help = "ON -> Memory Module Information structure will be present\OFF -> Memory Module Information structure will not be present\Make sure to put proper Memory Module information under section 'Structure Type 6 : MEMORY MODULE INFORMATION' in file SMBDESC.DEF\Port 'get_mem_module_info' from NBSMBIOS.ASM"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE6_STRUCTURE"
+ Value = "$(MEM_MODULE_INFO)"
+ Help = "Alternate token name for MEM_MODULE_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 7 - CACHE INFORMATION
+#
+##############################################################################
+#
+# The information in this Structure defines the attributes of CPU Cache
+# device in the System. One structure is specified for each such device,
+# whether the device is internal to or external to the CPU module. Cache
+# modules can be associated with a Processor structure in one or two ways
+# depending on the SMBIOS version. CPU module will update the internal
+# cache structure as its updationg the processor structures.
+#
+##############################################################################
+
+TOKEN
+ Name = "NUMBER_OF_PROC_CACHE"
+ Value = "3"
+ Help = "Number of Processor Cache Present.\NOTE: DO NOT CHANGE THE VALUE."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Lock = Yes
+ Range = "1-8"
+End
+
+TOKEN
+ Name = "EXTERNAL_CACHE_INFORMATION"
+ Value = "0"
+ Help = "If you have external Cache define it in SMBDESC.DEF file and trun this flag ON\Make sure that functions 'ExternalCacheInit_FAR' from SMBPORT.ASM and \'CSPHk_get_ext_cache_info_FAR' from NBSMBIOS.ASM are properly ported."
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE7_STRUCTURE"
+ Value = "$(EXTERNAL_CACHE_INFORMATION)"
+ Help = "Alternate token name for EXTERNAL_CACHE_INFORMATION"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 8 - PORT CONNECTOR INFORMATION
+#
+##############################################################################
+#
+# The information in this structure defines the attributes of a system
+# port connector, e.g. parallel, serial, keyboard, or mouse ports. The
+# Port's type and Connector information are provided. One structure is
+# present for each port provided by the system.
+#
+##############################################################################
+
+TOKEN
+ Name = "PORT_CONNECTOR_INFO"
+ Value = "1"
+ Help = "Turn this flag Off for not generating the Type 8 structures"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE8_STRUCTURE"
+ Value = "$(PORT_CONNECTOR_INFO)"
+ Help = "Alternate token name for PORT_CONNECTOR_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NUMBER_OF_EXT_PORT_CONNECTORS"
+ Value = "8"
+ Help = "Number of External Port Connectors in the Sytem."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "0 - 20"
+End
+
+TOKEN
+ Name = "NUMBER_OF_INT_PORT_CONNECTORS"
+ Value = "16"
+ Help = "Number of Internal Port Connectors in the System."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "0 - 20"
+End
+
+##############################################################################
+#
+# TYPE 9 - SYSTEM SLOTS
+#
+##############################################################################
+#
+# The information in this structure defines the attributes of a system
+# slot. One structure is provided for each slot in the system.
+#
+##############################################################################
+
+TOKEN
+ Name = "SYSTEM_SLOT_INFO"
+ Value = "1"
+ Help = "ON -> System Slot Information structure will be present\OFF -> System Slot Information structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TYPE9_STRUCTURE"
+ Value = "$(SYSTEM_SLOT_INFO)"
+ Help = "Alternate token name for SYSTEM_SLOT_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NUMBER_OF_SYSTEM_SLOTS"
+ Value = "5"
+ Help = "Identifies the number of system slots available on platform including the AGP slot.\"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "AGP_BRIDGE_BUS_DEV_FUNC_NO"
+ Value = "08H"
+ Help = "This variable contains the Bus#, dev#, func# of the AGP Bridge. A value of FFFF means no AGP Bridge present.\Bit 15-8 = Bus#\Bit7-3 = Device#\Bit2-0 = Function#"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+##############################################################################
+#
+# TYPE 10 - ON BOARD DEVICES INFORMATION
+#
+##############################################################################
+#
+# The information in this structure defines the attributes of devices that
+# are onboard (soldered onto) a system element, usually the baseboard. In
+# general, an entry in this table implies that the BIOS has some level of
+# control over the enabling of the associated device for use by the system.
+#
+##############################################################################
+
+TOKEN
+ Name = "ONBOARD_DEVICE_INFO"
+ Value = "1"
+ Help = "ON -> Onboard Device Information structure will be present\OFF -> OnBoard Device Information structure will not be present\The following information is needed only if ONBOARD_DEVICE_INFO = Present\Syntax: ONBOARD_DEVICE_X DEFINE <Enabled or Disabled, Onboard Device Type, Descrition String>\ Onboard device status -> Describes the status(enabled/disabled) of on board device\ On board device Type -> Video, Audio, SCSI etc... for more detail search for On-board device Type equates in structure Type 10, refer SMB.EQU\ Description String -> Describes the on board device e.g.'Video', 'Audio' etc.."
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE10_STRUCTURE"
+ Value = "$(ONBOARD_DEVICE_INFO)"
+ Help = "Alternate token name for ONBOARD_DEVICE_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NUMBER_OF_ONBOARD_DEVICES"
+ Value = "1"
+ Help = "Number of Onboard Devices Present in the System."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 11 - OEM STRINGS
+#
+##############################################################################
+#
+# This structure contains free form strings defined by the OEM.
+#
+# Examples of this are: Part Numbers for Reference Documents for the sytem,
+# contact information for the manufacturer, etc.
+#
+##############################################################################
+
+TOKEN
+ Name = "OEM_STRING_INFO"
+ Value = "1"
+ Help = "ON -> OEM String Information structure will be present\OFF -> OEM String Information structure will not be present\Enter the related information in file SMBDESC.DEF"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE11_STRUCTURE"
+ Value = "$(OEM_STRING_INFO)"
+ Help = "Alternate token name for OEM_STRING_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NUMBER_OF_OEM_STRINGS"
+ Value = "1"
+ Help = "NUMBER OF OEM STRINGS\identifies the total number of OEM strings defined for this structure."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Range = "1-32"
+End
+
+TOKEN
+ Name = "OEM_STRING_1"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the OEM STRING"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "OEM_STRING_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "OEM_STRING_2"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the OEM STRING"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "OEM_STRING_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "OEM_STRING_3"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the OEM STRING"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "OEM_STRING_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "OEM_STRING_4"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the OEM STRING"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "OEM_STRING_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "OEM_STRING_5"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the OEM STRING"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "OEM_STRING_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "OEM_STRING_6"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the OEM STRING"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "OEM_STRING_INFO" "=" "1"
+End
+
+##############################################################################
+#
+# TYPE 12 - SYSTEM CONFIGURATION OPTIONS
+#
+##############################################################################
+#
+# This structure contains information required to configure the Base
+# Board's Jumpers and Switches.
+#
+# Examples of this are:
+# JP2: 1-2 Cache Size is 256K, 2-3 Cache Size is 512K
+# SW1-1: Close to Disable On Board Video'
+#
+##############################################################################
+
+TOKEN
+ Name = "SYSTEM_CONFIG_OPTION_INFO"
+ Value = "1"
+ Help = "ON -> System Configuration Strings Information structure will be present\OFF -> System Configuration Strings Information structure will not be present\Please port necessary structures from file SMBDESC.DEF"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE12_STRUCTURE"
+ Value = "$(SYSTEM_CONFIG_OPTION_INFO)"
+ Help = "Alternate token name for SYSTEM_CONFIG_OPTION_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NUMBER_OF_SYSTEM_CONFIG_STRINGS"
+ Value = "1"
+ Help = "NUMBER OF SYSTEM CONFIGURATION STRINGS\identifies the total number of strings defined for this structure."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Range = "1-32"
+End
+
+TOKEN
+ Name = "SYSTEM_CONFIG_STRING_1"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the OEM SYSTEM CONFIG STRING"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "SYSTEM_CONFIG_OPTION_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "SYSTEM_CONFIG_STRING_2"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the OEM STRING"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "SYSTEM_CONFIG_OPTION_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "SYSTEM_CONFIG_STRING_3"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the OEM STRING"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "SYSTEM_CONFIG_OPTION_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "SYSTEM_CONFIG_STRING_4"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the OEM STRING"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "SYSTEM_CONFIG_OPTION_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "SYSTEM_CONFIG_STRING_5"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the OEM STRING"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "SYSTEM_CONFIG_OPTION_INFO" "=" "1"
+End
+
+##############################################################################
+#
+# TYPE 13 - BIOS LANGUAGE INFORMATION
+#
+##############################################################################
+#
+# The information in this structure defines the installable language
+# attributes of the BIOS.
+#
+##############################################################################
+
+TOKEN
+ Name = "BIOS_LANGUAGE_INFO"
+ Value = "1"
+ Help = "ON -> Bios Language Information structure will be present\OFF -> Bios Language Information structure will not be present"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "BIOS_LANGUAGE_FORMAT"
+ Value = "0"
+ Help = "Format of the Language Strings.\ OFF -> Strings use Long Format ON -> Strings use Abbreviated Fomat \US English <en|US|iso8859 - 1> <enUS>\French Canadian <fr|CA|iso8859-1> <frCA>\Japanese <ja|JP|unicode> <jaJP>\Espanol <es|ES|iso8859-1> <esES>\Dutch <de|DE|iso8859-1> <deDE>\Italian <it|IT|iso8859-1> <itIT>"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 14 - GROUP ASSOCIATION INFORMATION
+#
+##############################################################################
+#
+# Not supported by BIOS
+#
+##############################################################################
+
+##############################################################################
+#
+# TYPE 15 - SYSTEM EVENT LOG
+#
+##############################################################################
+#
+# The presence of this structure within the SMBIOS data returned for a
+# system indicates that the system supports an Event Log. An event Log is
+# a fixed-length area within a non-volatile storage element, starting with
+# a fixed-length (and vendor-specific) header record, followed by one or
+# more variable-length log records.
+#
+##############################################################################
+
+TOKEN
+ Name = "EVENT_LOG_INFO"
+ Value = "0"
+ Help = "ON -> Event-log Information structure will be present\OFF -> Event-log Information structure will not be present\"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "TYPE15_STRUCTURE"
+ Value = "$(EVENT_LOG_INFO)"
+ Help = "Alternate token name for EVENT_LOG_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NO_OF_SUPPORTED_EVENTS"
+ Value = "10h"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+End
+
+##############################################################################
+#
+# TYPE 16 - PHYSICAL MEMORY ARRAY
+#
+##############################################################################
+#
+# This structure describes a collection of memory devices that operate
+# together to form a memory address space.
+#
+##############################################################################
+
+TOKEN
+ Name = "TYPE16_STRUCTURE"
+ Value = "1"
+ Help = "ON -> Physical Memory Array Information structure will be present\OFF -> Physical Memory Array Information structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FLASH_MEMORY_ARRAY_INFO"
+ Value = "0"
+ Help = "ON -> Flash Memory Array Information (Type 16,17,19,20) structures will be present.\OFF -> Flash Memory Array Information (Type 16,17,19,20) structures will not be present."
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NO_OF_PHYSICAL_MEMORY_ARRAY"
+ Value = "1"
+ Help = "Specifies the Total number of Physical Arrays in the System."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Range = "1 - 5"
+End
+
+TOKEN
+ Name = "A1_MEMORY_SOCKETS"
+ Value = "4"
+ Help = "Number of Memory Modules/Slots in the first Physical Memory Array\Attention: If the number of memory sockets are more than the device entries in porting file SMBDESC.DEF (e.g. 32 devices by default as in A1_DEVICE_32) then the device entry list needs to be extended to accomodate the number of memory slots requuired"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "A2_MEMORY_SOCKETS"
+ Value = "0"
+ Help = "Number of Memory Modules/Slots in the second Physical Memory Array\Attention: If the number of memory sockets are more than the device entries in porting file SMBDESC.DEF (e.g. 32 devices by default as in A1_DEVICE_32) then the device entry list needs to be extended to accomodate the number of memory slots requuired"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Token = "NO_OF_PHYSICAL_MEMORY_ARRAY" ">" "1"
+End
+
+TOKEN
+ Name = "A3_MEMORY_SOCKETS"
+ Value = "0"
+ Help = "Number of Memory Modules/Slots in the third Physical Memory Array\Attention: If the number of memory sockets are more than the device entries in porting file SMBDESC.DEF (e.g. 32 devices by default as in A1_DEVICE_32) then the device entry list needs to be extended to accomodate the number of memory slots requuired"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Token = "NO_OF_PHYSICAL_MEMORY_ARRAY" ">" "2"
+End
+
+TOKEN
+ Name = "A4_MEMORY_SOCKETS"
+ Value = "0"
+ Help = "Number of Memory Modules/Slots in the fourth Physical Memory Array\Attention: If the number of memory sockets are more than the device entries in porting file SMBDESC.DEF (e.g. 32 devices by default as in A1_DEVICE_32) then the device entry list needs to be extended to accomodate the number of memory slots requuired"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Token = "NO_OF_PHYSICAL_MEMORY_ARRAY" ">" "3"
+End
+
+##############################################################################
+#
+# TYPE 17 - MEMORY DEVICE INFORMATION
+#
+##############################################################################
+#
+# This structure describes a single memory device that is a part of a
+# larger Physical Memory Array (Type 16).
+#
+# NOTE: If a system includes memory-device sockets, the SMBIOS
+# implementation includes a Memory Device structure instance for each
+# slot whether or not the socket is currently populated.
+#
+##############################################################################
+
+##############################################################################
+#
+# TYPE 18 - 32-BIT MEMORY ERROR INFORMATION
+#
+##############################################################################
+#
+# This structure identifies the specifics of an error that might be
+# detected within a Physical Memory Array.
+#
+##############################################################################
+
+TOKEN
+ Name = "MEMORY_ERROR_INFO"
+ Value = "0"
+ Help = "ON -> Memory Error Information (Type 18) structures will be present.\OFF -> Memory Error Information (Type 18) structures will not be present."
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MEMORY_ERROR_TYPE"
+ Value = "02h"
+ Help = "The type of error that is associated with the current status reported for the Memory Array or Device.\01h - Other\02h - Unknown\03h - OK\04h - Bad Read\05h - Parity Error\06h - Single-Bit Error\07h - Double-Bit Error\08h - Multi-Bit Error\09h - Nibble Error\0Ah - CheckSum Error\0Bh - CRC Error\0Ch - Corrected Single-Bit Error\0Dh - Corrected Error\0Eh - UnCorrectable Error"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "0h - 0Eh"
+End
+
+TOKEN
+ Name = "ERROR_GRANULARITY"
+ Value = "02h"
+ Help = "Specifies the granularity, e.g. device vs. Partition, to which the error can be resolved.\01h - Other\02h - Unknown\03h - Device Level\04h - Memory Partition Level"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 04h"
+End
+
+TOKEN
+ Name = "ERROR_OPERATION"
+ Value = "02h"
+ Help = "Specifies the Memory Access Operation that caused the Error.\01h - Other\02h - Unknown\03h - Read\04h - Write\05h - Partial Write"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "1 - 5"
+End
+
+TOKEN
+ Name = "VENDOR_SYNDROME"
+ Value = "00000000h"
+ Help = "Specifies the Vendor-Specific ECC Syndrome or CRC Data associated with the erroneous Access.\If the value is Unknown, this field is 0000 0000h"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "0 - 0FFFFFFFFh"
+End
+
+TOKEN
+ Name = "MEMORY_ARRAY_ERROR_ADDRESS"
+ Value = "80000000h"
+ Help = "Specifies the 32-bit Pbysical Address of the Error Based on the Addressing of the Bus to which the Memory Array is connected.\If the address is Unknown, this field contains 8000 0000h"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "0 - 0FFFFFFFFh"
+End
+
+TOKEN
+ Name = "DEVICE_ERROR_ADDRESS"
+ Value = "80000000h"
+ Help = "Specifies the 32-bit Physical Address of the Error Relative to the Start of the Failing Memory Device, in Bytes.\If the address is Unknown, this field contains 8000 0000h"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "0 - 0FFFFFFFFh"
+End
+
+TOKEN
+ Name = "ERROR_RESOLUTION"
+ Value = "80000000h"
+ Help = "Specifies the range, in bytes, within which the Error can be determined, when an Error Address is given.\If the range is Unknown, this field contains 8000 0000h"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "0 - 0FFFFFFFFh"
+End
+
+##############################################################################
+#
+# TYPE 19 - MEMORY ARRAY MAPPED ADDRESS
+#
+##############################################################################
+#
+# This structure provides the Address mapping for a Physical Memory Array.
+# One structure is present for each contiguous address range described.
+#
+##############################################################################
+
+TOKEN
+ Name = "ARRAY_MAPPED_STARTING_ADDRESS"
+ Value = "00000000h"
+ Help = "Specifies the Physical Address, in KiloBytes, of a range of memory mapped to the specified Physical Memory Array."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "0 - 0FFFFFFFFh"
+End
+
+TOKEN
+ Name = "ARRAY_MAPPED_ENDING_ADDRESS"
+ Value = "00000000h"
+ Help = "Specifies the Physical Ending Address of the last KiloByte of a range of Addresses mapped to the specified Physical Memory Array."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "0 - 0FFFFFFFFh"
+End
+
+TOKEN
+ Name = "PARTITION_WIDTH"
+ Value = "00h"
+ Help = "Specifies the Number of Memory Devices that form a single row or Memory for the address partition defined by this structure."
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+##############################################################################
+#
+# TYPE 20 - MEMORY DEVICE MAPPED ADDRESS
+#
+##############################################################################
+#
+# This structure maps Memory Address space usually to a Device-Level
+# granularity. One structure is present for each contiguous address range
+# described.
+#
+# NOTE: A Memory Device Mapped Address structure is provided only if a
+# Memory Device has a mapped address - there is no provision within this
+# structure to map a zero-length address space.
+#
+##############################################################################
+
+TOKEN
+ Name = "MEMORY_DEVICE_INFO"
+ Value = "1"
+ Help = "ON -> Memory Device Mapped Address Information (Type 20) structures will be present.\OFF -> Memory Device Mapped Address Information (Type 20) structures will not be present."
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MEMORY_DEVICE_STARTING_ADDRESS"
+ Value = "00000000h"
+ Help = "Specifies the Physical Address, in KiloBytes, of a range of Memory Mapped to the referenced Memory Device."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "0 - 0FFFFFFFFh"
+End
+
+TOKEN
+ Name = "MEMORY_DEVICE_ENDING_ADDRESS"
+ Value = "00000000h"
+ Help = "Specifies the Physical Ending Address of the last KiloByte of a range of Addresses mapped to the referenced Memory Device."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "0 - 0FFFFFFFFh"
+End
+
+TOKEN
+ Name = "NO_OF_DEVICES_IN_ROW"
+ Value = "01h"
+ Help = "Specifies the Number of Memory Devices that form a Row.\For example, if two 8-bit devices form a 16-bit row, this field's value will be 2 or if two 64-bit devices form a 128-bit row then also the field's value will be 2.\or if 1 64-bit device form a 64-bit row then the field's value will be 1."
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "INTERLEAVE_DATA_DEPTH"
+ Value = "00h"
+ Help = "Specifies the maximum number of consecutive rows from the referenced Memory Device that are accessed in a single interleaved transfer.\If the device is not part of an interleave, the field contains 0; if the interleave configuration is Unknown, the value is 0FFh.\For example, if a device transfers two rows each time it is read, its Interleaved Data Depth is set to 2.\If that device is 2:1 interleaved and in Interleave Position 1, the rows mapped to that device are 1,2,5,6,9,10, etc."
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+##############################################################################
+#
+# TYPE 21 - BUILT-IN POINTING DEVICE
+#
+##############################################################################
+#
+# This Structure describes the attributes of the built-in pointing device
+# for the system. The presence of this structure does not imply that the
+# built-in pointing device is active for the system's use.
+#
+##############################################################################
+
+TOKEN
+ Name = "BUILTIN_POINTING_DEVICE_INFO"
+ Value = "0"
+ Help = "ON -> Built In Pointing Device Information (Type 21) structure will be present\OFF -> Built In Pointing Device Information (Type 21) structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE21_STRUCTURE"
+ Value = "$(BUILTIN_POINTING_DEVICE_INFO)"
+ Help = "Alternate token name for BUILTIN_POINTING_DEVICE_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NO_OF_POINTING_DEVICE"
+ Value = "01h"
+ Help = "Specifies the number of Pointing Device."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "01h - 05h"
+End
+
+##############################################################################
+#
+# TYPE 22 - PORTABLE BATTERY
+#
+##############################################################################
+#
+# This Structure describes the attributes of the Portable Battery(s) for
+# the System. The Structure contains the static attributes for the group.
+# Each structure describes a single battery pack's attributes.
+#
+##############################################################################
+
+TOKEN
+ Name = "PORTABLE_BATTERY_INFO"
+ Value = "0"
+ Help = "ON -> Portable Battery Information (Type 22) structure will be present\OFF -> Portable Battery Information (Type 22) structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE22_STRUCTURE"
+ Value = "$(PORTABLE_BATTERY_INFO)"
+ Help = "Alternate token name for PORTABLE_BATTERY_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NO_OF_PORTABLE_BATTERY"
+ Value = "4"
+ Help = "Specifies the Total number of Portable Batteries in the System."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Range = "1 - 5"
+End
+
+TOKEN
+ Name = "PORT_BAT_LOCATION_1"
+ Value = "Location of the battery"
+ Help = "Specifies the Battery Location"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_LOCATION_2"
+ Value = "Location of the battery"
+ Help = "Specifies the Battery Location"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_LOCATION_3"
+ Value = "Location of the battery"
+ Help = "Specifies the Battery Location"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_LOCATION_4"
+ Value = "Location of the battery"
+ Help = "Specifies the Battery Location"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_LOCATION_5"
+ Value = "Location of the battery"
+ Help = "Specifies the Battery Location"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_MANUFACTURER_1"
+ Value = "Battery Manufacturer"
+ Help = "Specifies the Battery Manufacturer"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_MANUFACTURER_2"
+ Value = "Battery Manufacturer"
+ Help = "Specifies the Battery Manufacturer"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_MANUFACTURER_3"
+ Value = "Battery Manufacturer"
+ Help = "Specifies the Battery Manufacturer"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_MANUFACTURER_4"
+ Value = "Battery Manufacturer"
+ Help = "Specifies the Battery Manufacturer"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_MANUFACTURER_5"
+ Value = "Battery Manufacturer"
+ Help = "Specifies the Battery Manufacturer"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_MANUFACTURE_DATE_1"
+ Value = "01/01/2012"
+ Help = "Specifies the Battery Manufacturer Date"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_MANUFACTURE_DATE_2"
+ Value = "01/01/2012"
+ Help = "Specifies the Battery Manufacturer Date"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_MANUFACTURE_DATE_3"
+ Value = "01/01/2012"
+ Help = "Specifies the Battery Manufacturer Date"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_MANUFACTURE_DATE_4"
+ Value = "01/01/2012"
+ Help = "Specifies the Battery Manufacturer Date"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_MANUFACTURE_DATE_5"
+ Value = "01/01/2012"
+ Help = "Specifies the Battery Manufacturer Date"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SERIAL_NUMBER_1"
+ Value = "Serial Number"
+ Help = "Specifies the Battery Serial Number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SERIAL_NUMBER_2"
+ Value = "Serial Number"
+ Help = "Specifies the Battery Serial Number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SERIAL_NUMBER_3"
+ Value = "Serial Number"
+ Help = "Specifies the Battery Serial Number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SERIAL_NUMBER_4"
+ Value = "Serial Number"
+ Help = "Specifies the Battery Serial Number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SERIAL_NUMBER_5"
+ Value = "Serial Number"
+ Help = "Specifies the Battery Serial Number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_DEVICE_NAME_1"
+ Value = "Battery Name"
+ Help = "Specifies the Battery Name"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_DEVICE_NAME_2"
+ Value = "Battery Name"
+ Help = "Specifies the Battery Name"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_DEVICE_NAME_3"
+ Value = "Battery Name"
+ Help = "Specifies the Battery Name"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_DEVICE_NAME_4"
+ Value = "Battery Name"
+ Help = "Specifies the Battery Name"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_DEVICE_NAME_5"
+ Value = "Battery Name"
+ Help = "Specifies the Battery Name"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DEVICE_CHEMISTRY_1"
+ Value = "04h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DEVICE_CHEMISTRY_2"
+ Value = "04h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DEVICE_CHEMISTRY_3"
+ Value = "04h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DEVICE_CHEMISTRY_4"
+ Value = "04h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DEVICE_CHEMISTRY_5"
+ Value = "04h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_CAPACITY_1"
+ Value = "00h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_CAPACITY_2"
+ Value = "00h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_CAPACITY_3"
+ Value = "00h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_CAPACITY_4"
+ Value = "00h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_CAPACITY_5"
+ Value = "00h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_VOLTAGE_1"
+ Value = "00h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_VOLTAGE_2"
+ Value = "00h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_VOLTAGE_3"
+ Value = "00h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_VOLTAGE_4"
+ Value = "00h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_VOLTAGE_5"
+ Value = "00h"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_VER_NO_1"
+ Value = "SBDS Version Number"
+ Help = "Smart Battery Data Specification Version Number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_VER_NO_2"
+ Value = "SBDS Version Number"
+ Help = "Smart Battery Data Specification Version Number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_VER_NO_3"
+ Value = "SBDS Version Number"
+ Help = "Smart Battery Data Specification Version Number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_VER_NO_4"
+ Value = "SBDS Version Number"
+ Help = "Smart Battery Data Specification Version Number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_VER_NO_5"
+ Value = "SBDS Version Number"
+ Help = "Smart Battery Data Specification Version Number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "MAX_ERROR_IN_BAT_DATA_1"
+ Value = "0FFh"
+ Help = "Maximum Error (as percentage in the range 0-100)"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "MAX_ERROR_IN_BAT_DATA_2"
+ Value = "0FFh"
+ Help = "Maximum Error (as percentage in the range 0-100)"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "MAX_ERROR_IN_BAT_DATA_3"
+ Value = "0FFh"
+ Help = "Maximum Error (as percentage in the range 0-100)"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "MAX_ERROR_IN_BAT_DATA_4"
+ Value = "0FFh"
+ Help = "Maximum Error (as percentage in the range 0-100)"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "MAX_ERROR_IN_BAT_DATA_5"
+ Value = "0FFh"
+ Help = "Maximum Error (as percentage in the range 0-100)"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_SERIAL_NO_1"
+ Value = "1234h"
+ Help = "16-bit value - Identifies battery's serial number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_SERIAL_NO_2"
+ Value = "1234h"
+ Help = "16-bit value - Identifies battery's serial number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_SERIAL_NO_3"
+ Value = "1234h"
+ Help = "16-bit value - Identifies battery's serial number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_SERIAL_NO_4"
+ Value = "1234h"
+ Help = "16-bit value - Identifies battery's serial number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_SERIAL_NO_5"
+ Value = "1234h"
+ Help = "16-bit value - Identifies battery's serial number"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_MAN_DATE_1"
+ Value = "2821h"
+ Help = "Cell Pack Manufacture Date"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_MAN_DATE_2"
+ Value = "2821h"
+ Help = "Cell Pack Manufacture Date"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_MAN_DATE_3"
+ Value = "2821h"
+ Help = "Cell Pack Manufacture Date"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_MAN_DATE_4"
+ Value = "2821h"
+ Help = "Cell Pack Manufacture Date"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_MAN_DATE_5"
+ Value = "2821h"
+ Help = "Cell Pack Manufacture Date"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_DEV_CHEM_1"
+ Value = "SBDS Device Chemistry"
+ Help = "Battery Chemistry"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_DEV_CHEM_2"
+ Value = "SBDS Device Chemistry"
+ Help = "Battery Chemistry"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_DEV_CHEM_3"
+ Value = "SBDS Device Chemistry"
+ Help = "Battery Chemistry"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_DEV_CHEM_4"
+ Value = "SBDS Device Chemistry"
+ Help = "Battery Chemistry"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "PORT_BAT_SBDS_DEV_CHEM_5"
+ Value = "SBDS Device Chemistry"
+ Help = "Battery Chemistry"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_CAPACITY_MULTIPLIER_1"
+ Value = "01h"
+ Help = "Multiplication Factor of the Design Capacity"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_CAPACITY_MULTIPLIER_2"
+ Value = "01h"
+ Help = "Multiplication Factor of the Design Capacity"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_CAPACITY_MULTIPLIER_3"
+ Value = "01h"
+ Help = "Multiplication Factor of the Design Capacity"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_CAPACITY_MULTIPLIER_4"
+ Value = "01h"
+ Help = "Multiplication Factor of the Design Capacity"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "DESIGN_CAPACITY_MULTIPLIER_5"
+ Value = "01h"
+ Help = "Multiplication Factor of the Design Capacity"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "OEM_SPECIFIC_1"
+ Value = "12345678h"
+ Help = "OEM or BIOS Vendor-specific Information"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "OEM_SPECIFIC_2"
+ Value = "12345678h"
+ Help = "OEM or BIOS Vendor-specific Information"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "OEM_SPECIFIC_3"
+ Value = "12345678h"
+ Help = "OEM or BIOS Vendor-specific Information"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "OEM_SPECIFIC_4"
+ Value = "12345678h"
+ Help = "OEM or BIOS Vendor-specific Information"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+TOKEN
+ Name = "OEM_SPECIFIC_5"
+ Value = "12345678h"
+ Help = "OEM or BIOS Vendor-specific Information"
+ TokenType = Expression
+ TargetEQU = Yes
+ Token = "PORTABLE_BATTERY_INFO" "=" "1"
+End
+
+##############################################################################
+#
+# TYPE 23 - SYSTEM RESET
+#
+##############################################################################
+#
+# This structure describes whether Automatic System Reset functions
+# enabled (Status). If the system has a watchdog Timer and the timer is
+# not reset (Timer Reset) before the Interval elapses, an automatic system
+# reset will occur. The system will re-boot according to the Boot Option.
+# This function may repeat until the Limit is reached, at which time the
+# system will re-boot according to the Boot Option at Limit.
+#
+##############################################################################
+
+TOKEN
+ Name = "SYSTEM_RESET_INFO"
+ Value = "0"
+ Help = "ON -> System Reset Information (Type 23) structure will be present\OFF -> System Reset Information (Type 23) structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE23_STRUCTURE"
+ Value = "$(SYSTEM_RESET_INFO)"
+ Help = "Alternate token name for SYSTEM_RESET_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 24 - HARDWARE SECURITY
+#
+##############################################################################
+#
+# This structure describes the system-wide Hardware Security Settings.
+#
+##############################################################################
+
+TOKEN
+ Name = "HARDWARE_SECURITY_INFO"
+ Value = "0"
+ Help = "ON -> Hardware Security Information (Type 24) structure will be present\OFF -> Hardware Security Information (Type 24) structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE24_STRUCTURE"
+ Value = "$(HARDWARE_SECURITY_INFO)"
+ Help = "Alternate token name for HARDWARE_SECURITY_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "HARDWARE_SECURITY_SETTINGS"
+ Value = "00h"
+ Help = "Specifies the Password and reset status for the System.\Bits 7:6 Power-on Password Status\Bits 5:4 Keyboard Password Status\Bits 3:2 Administrator Password Status\Bits 1:0 Front Panel Reset Status\ 00b - Disabled\ 01b - Enabled\ 10b - Not Implemented\ 11b - Unknown"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "Bit Field"
+End
+
+##############################################################################
+#
+# TYPE 25 - SYSTEM POWER CONTROLS
+#
+##############################################################################
+#
+# This structure describes the attributes for controlling the main power
+# supply to the system. Software that interprets this structure uses the
+# month, day, hour, minute and second values to determine the number of
+# seconds untill the next power-on of the system. The presence of this
+# structure implies that a timed power-on facility is available for the
+# system.
+#
+##############################################################################
+
+TOKEN
+ Name = "SYSTEM_POWER_CONTROLS_INFO"
+ Value = "0"
+ Help = "ON -> System Power Controls Information (Type 25) structure will be present\OFF -> System Power Controls Information (Type 25) structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE25_STRUCTURE"
+ Value = "$(SYSTEM_POWER_CONTROLS_INFO)"
+ Help = "Alternate token name for SYSTEM_POWER_CONTROLS_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 26 - VOLTAGE PROBE
+#
+##############################################################################
+#
+# This describes the attributes for a Voltage Probe in the system. Each
+# structure describes a single Voltage Probe.
+#
+##############################################################################
+
+TOKEN
+ Name = "VOLTAGE_PROBE_INFO"
+ Value = "0"
+ Help = "ON -> Voltage Probe Information (Type 26) structure will be present\OFF -> Voltage Probe Information (Type 26) structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 27 - COOLING DEVICE
+#
+##############################################################################
+#
+# This structure describes the attributes for a cooling device in the
+# system. Each structure describes a single cooling device.
+#
+##############################################################################
+
+TOKEN
+ Name = "COOLING_DEVICE_INFO"
+ Value = "0"
+ Help = "ON -> Cooling Device Information (Type 27) structure will be present\OFF -> Cooling Device Information (Type 27) structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NUMBER_OF_COOLING_DEVICE"
+ Value = "1"
+ Help = "Identifies the number of Cooling Devices."
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+##############################################################################
+#
+# TYPE 28 - TEMPERATURE PROBE
+#
+##############################################################################
+#
+# The Structure describes the attributes for a temperature probe in the
+# system. Each Structure describes a single Temperature Probe.
+#
+##############################################################################
+
+TOKEN
+ Name = "TEMPERATURE_PROBE_INFO"
+ Value = "0"
+ Help = "ON -> Temperature Probe Information (Type 28) structure will be present\OFF -> Temprature Probe Information (Type 28) structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 29 - ELECTRICAL CURRENT PROBE
+#
+##############################################################################
+#
+# This Structure describes the attributes for an Electrical Current Probe
+# in the system. Each structure describes a single Electrical Current
+# Probe.
+#
+##############################################################################
+
+TOKEN
+ Name = "ELECTRICAL_PROBE_INFO"
+ Value = "0"
+ Help = "ON -> Electrical Probe Information (Type 29) structure will be present\OFF -> Electrical Probe Information (Type 29) structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 30 - OUT OF BAND REMOTE ACCESS
+#
+##############################################################################
+#
+# This structure describes the attributes and policy settings of a
+# hardware facility that may be used to gain remote access to a hardware
+# system when the operating system is not available due to power-down
+# status, hardware failures, or boot failures.
+#
+##############################################################################
+
+TOKEN
+ Name = "OUT_OF_BAND_REMOTE_ACCESS_INFO"
+ Value = "0"
+ Help = "ON -> OUT-OF-BAND Remote Access Information (Type 30) structure will be present\OFF -> OUT-OF-BAND Remote Access Information (Type 30) structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE30_STRUCTURE"
+ Value = "$(OUT_OF_BAND_REMOTE_ACCESS_INFO)"
+ Help = "Alternate token name for OUT_OF_BAND_REMOTE_ACCESS_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "OBRA_MANUFACTURER_NAME"
+ Value = "$(DEFAULT_STRING)"
+ Help = "The string that contains the manufacturer of the Out-Of-Band Access facility"
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "OBRA_CONNECTIONS"
+ Value = "0"
+ Help = "Identifies the current Remote-Access connections:\Bits 7:2 - Reserved for future definition by this specification, set to all zeros.\Bit 1 - Outbound Connection enabled. Identifies whether (1) or not (0) the facility is allowed to initiate outbound connections to contact an alert management facility when critical conditions occur.\Bit 0 - Inbound Connection enabled. Identifies whether (1) or not (0) the facility is allowed to initiate outbound connections to receive incomming connections for the purpose of remote\ operations or problem management."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "Bit Field"
+End
+
+##############################################################################
+#
+# TYPE 31 - BOOT INTEGRITY SERVICES (BIS) ENTRY POINT
+#
+##############################################################################
+#
+# This structure (Type 31) is reserved for use by the Boot Integrity
+# Services (BIS).\Refer to the Boot Integrity Services API Specification
+# for content details.
+#
+##############################################################################
+
+TOKEN
+ Name = "BIS_INFO"
+ Value = "0"
+ Help = "ON -> BIS Information structure will be present\OFF -> BIS Information structure will not be present\"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE31_STRUCTURE"
+ Value = "$(BIS_INFO)"
+ Help = "Alternate token name for BIS_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "CHECKSUM"
+ Value = "00H"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BIS_ENTRY_POINT_REAL_MODE"
+ Value = "0FFFFFFFFh"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "BIS_ENTRY_POINT_FLAT_MODE"
+ Value = "0FFFFFFFFh"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+##############################################################################
+#
+# TYPE 32 - SYSTEM BOOT INFORMATION
+#
+##############################################################################
+#
+# The Client system firmware, e.g. BIOS, communicates the System Boot
+# Status to the client's Pre-boot Execution Environment (PXE) boot image
+# or OS-present management application via this structure. When used in
+# the PXE environment, for example, this code identifies the reason the
+# PXE was initiated and can be used by boot-image software to further
+# automate an enterprise's PXE sessions. For example, an enterprise could
+# choose to automatically download a hardware-diagnostic image to a client
+# whose reason code indicated either a firmware or operating system
+# detected hardware failure.
+#
+##############################################################################
+
+TOKEN
+ Name = "SYSTEM_BOOT_INFO"
+ Value = "1"
+ Help = "ON -> System Boot Information (Type 32) structure will be present\OFF -> System Boot Information (Type 32) structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TYPE32_STRUCTURE"
+ Value = "$(SYSTEM_BOOT_INFO)"
+ Help = "Alternate token name for SYSTEM_BOOT_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "BOOT_STATUS"
+ Value = "0"
+ Help = "Value Description\0 - No Errors Detected\1 - No Bootable Media\2 - The 'normal' operating system failed to load\3 - Firmware detected hardware failure, including 'unknown' failure types.\4 - Operating system detected hardware failure. For ACPI OS's, the system firmware might set this reason code when the OS reports a boot failure via interfaces defined in the Simple Boot Flag Specification.\5 - User-requested boot, usually via a keystroke\6 - System security violation\7 - Previously requested image. This reason code allows coordination between OS-Present software and the OS-absent environment.\ For example, an OS-present application might enable (via a platform-specific interface) the system to boot to the PXE and request a specific boot-image.\8 - A system watchdog timer expired, causing the system to reboot.\9 - 127 - Reserved for future assignment via this specification.\128 - 191 - Vendor/OEM-specific implementations.\ The Vendor/OEM identifier is the 'Manufacturer' string found in the System Information Structure.\192 - 255 - Product-specific implementations.\ The Productidentifier is formed by the concatenation of the 'Manufacturer' and 'Product Name' strings found in the System Information Structure"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "0-255"
+End
+
+##############################################################################
+#
+# TYPE 33 - 64-BIT MEMORY ERROR INFORMATION
+#
+##############################################################################
+#
+# The structure describes an error within a Physical Memory Array, when
+# the error address is above 4G (0xFFFFFFFF).
+#
+##############################################################################
+
+TOKEN
+ Name = "SIXTY_FOURBIT_MEMORY_ERROR_INFO"
+ Value = "0"
+ Help = "ON -> 64 Bit Memory Error Information (Type 33) structure will be present\OFF -> 64 Bit Memory Error Information (Type 33) structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE33_STRUCTURE"
+ Value = "$(SIXTY_FOURBIT_MEMORY_ERROR_INFO)"
+ Help = "Alternate token name for SIXTY_FOURBIT_MEMORY_ERROR_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 34 - MANAGEMENT DEVICE
+#
+##############################################################################
+#
+# The information in this structure defines the attributes of a Management
+# Device. A Management Device might control one or more fans or voltage,
+# current, or temperature probes as defined by one or more Management
+# Device Component Structures (Type 35)
+#
+##############################################################################
+
+TOKEN
+ Name = "MANAGEMENT_DEVICE_INFO"
+ Value = "0"
+ Help = "ON -> Management Device Information (Type 34) structure will be present\OFF -> Management Device Information (Type 34) structure will not be present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE34_STRUCTURE"
+ Value = "$(MANAGEMENT_DEVICE_INFO)"
+ Help = "Alternate token name for MANAGEMENT_DEVICE_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NUMBER_OF_MANAGEMENT_DEVICES"
+ Value = "1"
+ Help = "Number of Management Devices in the System."
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+##############################################################################
+#
+# TYPE 35 - MANAGEMENT DEVICE COMPONENT
+#
+##############################################################################
+#
+# This Structure associates a Cooling Device or Environmental Probe with
+# structures that define the controlling hardware device and (optionally)
+# the component's thresholds.
+#
+##############################################################################
+
+TOKEN
+ Name = "MGMT_DEV_COMPONENT_DESCRIPTION"
+ Value = "$(DEFAULT_STRING)"
+ Help = "Specifies the additional descriptive information about the component."
+ TokenType = Expression
+ TargetEQU = Yes
+End
+
+##############################################################################
+#
+# TYPE 36 - MANAGEMENT DEVICE THRESHOLD DATA
+#
+##############################################################################
+#
+# The information in this structure defines threshold information for a
+# component (probe or cooling unit) contained within a Management Device.
+#
+# For each threshold field present in the structure:
+# 1 - The threshold units (millivolts, milliamps, 1/10th degrees C,
+# or RPMs) are as defined by the associated probe or cooling unit
+# component structure.
+# 2 - If the value is unavailable, the field is set to 0x8000.
+#
+##############################################################################
+
+##############################################################################
+#
+# TYPE 37 - MEMORY CHANNEL
+#
+##############################################################################
+#
+# The information in this structure provides the correlation between a
+# Memory Channel and its associated Memory Devices. Each device presents
+# one or more loads to the channel; the sum of all device loads cannot
+# exceed the channel's defined maximum.
+#
+##############################################################################
+
+TOKEN
+ Name = "MEMORY_CHANNEL_INFO"
+ Value = "0"
+ Help = "ON -> Memory Channel Information (Type 37) will be Present.\OFF -> Memory Channel Information (Type 37) will not be Present."
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE37_STRUCTURE"
+ Value = "$(MEMORY_CHANNEL_INFO)"
+ Help = "Alternate token name for MEMORY_CHANNEL_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NUMBER_OF_MEMORY_CHANNELS"
+ Value = "1"
+ Help = "Number of Memory Channels Present in the System."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 38 - IPMI DEVICE INFORMATION
+#
+##############################################################################
+#
+# The information in this structure defines the attributes of an
+# Intelligent Platform Management Interface (IPMI) Baseboard Management
+# Controller (BMC).
+#
+# Refer to the documents available at:
+# http://developer.intel.com/design/servers/ipmi/spec.htm
+# for full documentation of IPMI.
+#
+##############################################################################
+
+TOKEN
+ Name = "IPMI_DEVICE_INFO"
+ Value = "0"
+ Help = "ON ->IPMI Device Information structure will be present\OFF -> IPMI Device Information structure will not be present\"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE38_STRUCTURE"
+ Value = "$(IPMI_DEVICE_INFO)"
+ Help = "Alternate token name for IPMI_DEVICE_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "IPMI_INTERFACE_TYPE"
+ Value = "0"
+ Help = "Baseboard Management Controller (BMC) interface type.\00h - Unknown\01h - KCS : Keyboard Controller Style\02h - SMIC : Server Management Interface Chip\03h - BT : Block Transfer\04h to 0FFh - Reserved for future assignment by this specification."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "00 - 0FFh"
+End
+
+TOKEN
+ Name = "IPMI_SPECIFICATION_REVISION"
+ Value = "15h"
+ Help = "Identifies the IPMI Specification Revision, in BCD format, to which the BMC was designed.\Bits 7:4 hold the most significant digit of the revision, while bits 3:0 hold the least significant bits.\eg. a value of 10h indicates revision 1.0"
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "00 - 99"
+End
+
+TOKEN
+ Name = "I2C_SLAVE_ADDRESS"
+ Value = "00h"
+ Help = "The Slave Address on the I2C bus of this BMC."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "00h - 0FFh"
+End
+
+TOKEN
+ Name = "NV_STORAGE_DEVICE_ADDRESS"
+ Value = "0FFh"
+ Help = "Bus ID of the NV Storage Device. If no storage device exists for this BMC, the field is set to 0FFh."
+ TokenType = Integer
+ TargetEQU = Yes
+ Range = "00h - 0FFh"
+End
+
+TOKEN
+ Name = "BASE_ADDR_MOD_INTR_INFO"
+ Value = "00h"
+ Help = "Base Address Modifier.\Bits 7:6 Register spacing\ 00 - Interface registers are not on successive byte boundaries\ 01 - Interface registers are on 32-bit boundaries\ 10 - Interface registers are on 16-byte boundaries\Bit 4 - LS-bit for addresses\ 0 - Address bit 0 = 0\ 1 - Address bit 0 = 1\Bit 3 - Interrupt Info\ 0 - Interrupt info not specified\ 1 - Interrupt info specified\Bit 1 - Interrupt Polarity\ 0 - Active low\ 1 - Active high\Bit 0 - Interrupt Trigger Mode\ 0 - Edge\ 1 - Level"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "INTERRUPT_NUMBER"
+ Value = "00h"
+ Help = "Interrupt number for IPMI System Interface\00 = unspecified/unsupported"
+ TokenType = Integer
+ TargetEQU = Yes
+End
+
+##############################################################################
+#
+# TYPE 39 - SYSTEM POWER SUPPLY
+#
+##############################################################################
+#
+# This structure identifies attributes of a System Power Supply. One
+# instance of this record is present for each possible Power Supply in a
+# System.
+#
+##############################################################################
+
+TOKEN
+ Name = "SYSTEM_POWER_SUPPLY_INFO"
+ Value = "0"
+ Help = "Type 39 - System Power Supply\OFF -> System Power Supply will not be Present\ON -> System Power Supply will be Present"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE39_STRUCTURE"
+ Value = "$(SYSTEM_POWER_SUPPLY_INFO)"
+ Help = "Alternate token name for SYSTEM_POWER_SUPPLY_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NUMBER_OF_POWER_SUPPLY"
+ Value = "1"
+ Help = "Number of Power Supplies Present in the System."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 40 - ADDITIONAL INFORMATION
+#
+##############################################################################
+#
+# This structure is intended to provide additional information for
+# handling unspecified enumerated values and interim field updates in
+# another structure.
+#
+##############################################################################
+
+TOKEN
+ Name = "ADDITIONAL_INFO"
+ Value = "0"
+ Help = "ON -> Additional Information (Type 40) will be Present.\OFF -> Additional Information (Type 40) will not be Present."
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE40_STRUCTURE"
+ Value = "$(ADDITIONAL_INFO)"
+ Help = "Alternate token name for ADDITIONAL_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ADDITIONAL_INFO_COUNT"
+ Value = "3"
+ Help = "Number of additional information entries"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 41 - ONBOARD DEVICES EXTENDED INFORMATION
+#
+##############################################################################
+#
+# This structure defines the attributes of devices that are onboard.
+#
+##############################################################################
+
+TOKEN
+ Name = "ONBOARD_DEVICE_EXTENDED_INFO"
+ Value = "1"
+ Help = "ON -> Onboard Devices Extended Information (Type 41) will be Present.\OFF -> Onboard Devices Extended Information (Type 41) will not be Present."
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE41_STRUCTURE"
+ Value = "$(ONBOARD_DEVICE_EXTENDED_INFO)"
+ Help = "Alternate token name for ONBOARD_DEVICE_EXTENDED_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ONBOARD_DEVICE_EXT_COUNT"
+ Value = "3"
+ Help = "Number of Onboard Devices"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 129 - INTEL_ASF
+#
+##############################################################################
+#
+# This structure is for Intel ASF support
+#
+##############################################################################
+
+TOKEN
+ Name = "INTEL_ASF"
+ Value = "0"
+ Help = "Type 129 - Intel ASF Support"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TYPE129_STRUCTURE"
+ Value = "$(INTEL_ASF)"
+ Help = "Alternate token name for INTEL_ASF"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 240 - OEM IO GPNV
+#
+##############################################################################
+#
+# This structure is for OEM defined IO structure
+#
+##############################################################################
+
+TOKEN
+ Name = "OEM_IO_GPNV_STRUC_INFO"
+ Value = "0"
+ Help = "Example of OEM defined structures"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "TYPE240_STRUCTURE"
+ Value = "$(OEM_IO_GPNV_STRUC_INFO)"
+ Help = "Alternate token name for OEM_IO_GPNV_STRUC_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+##############################################################################
+#
+# TYPE 241 - OEM Memory GPNV
+#
+##############################################################################
+#
+# This structure is for OEM Memory GPNV structure
+#
+##############################################################################
+
+TOKEN
+ Name = "OEM_MEMORY_GPNV_STRUC_INFO"
+ Value = "0"
+ Help = "Example of OEM defined structures"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "TYPE241_STRUCTURE"
+ Value = "$(OEM_MEMORY_GPNV_STRUC_INFO)"
+ Help = "Alternate token name for OEM_MEMORY_GPNV_STRUC_INFO"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "INC_ISA"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "INC_PCI"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "INC_PNP"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+PATH
+ Name = "SMBIOSDATA_DIR"
+End
+
+MODULE
+ Help = "Includes SMBiosStaticData.cif to Project"
+ File = "SMBiosStaticData.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\SMBiosStaticData.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "SMBOBJS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\SMBiosStaticData.obj"
+ Parent = "SMBOBJS"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticDataEnd.asm b/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticDataEnd.asm
new file mode 100644
index 0000000..6700391
--- /dev/null
+++ b/Board/EM/SMBIOS/SMBiosStaticData/SmbiosStaticDataEnd.asm
@@ -0,0 +1,81 @@
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2009, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
+
+;****************************************************************************
+; $Header: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/SmbiosStaticDataEnd.asm 4 6/02/09 3:57p Davidd $
+;
+; $Revision: 4 $
+;
+; $Date: 6/02/09 3:57p $
+;****************************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/BIN/Modules/SMBIOS/SmbiosStaticData/SmbiosStaticDataEnd.asm $
+;
+; 4 6/02/09 3:57p Davidd
+; Updated AMI headers (EIP 22180)
+;
+; 3 3/29/07 4:53p Davidd
+; Changed the year in the AMI banner and adjust indentation to coding
+; standard.
+;
+; 1 4/29/05 2:15p Davidd
+; Initial checkin.
+;
+;****************************************************************************
+
+;----------------------------------------------------------------------------
+
+ INCLUDE token.equ
+ INCLUDE smbhdr.equ
+ INCLUDE smbmacro.aid
+ INCLUDE smbstruc.def
+ INCLUDE smb.equ
+ INCLUDE smbdata.mac
+ INCLUDE smbdesc.def
+
+;----------------------------------------------------------------------------
+
+SMBIOS_DSEG SEGMENT BYTE PUBLIC 'DATA'
+ ASSUME cs: SMBIOS_DSEG
+.586p
+
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; END Of SMBIOS DATA STRUCTURE
+;----------------------------------------------------------------------------
+
+ handle = 0 ; Dummy handle
+ handle = CreateEndOfTable(handle)
+
+ db MKF_EXTRA_RESERVED_BYTES dup (0FFh) ; Extra Space
+
+SMBIOS_DSEG ENDS ; End of Segment
+END ; End of File
+;----------------------------------------------------------------------------
+
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2009, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
diff --git a/Board/EM/SMBIOS/SmbiosBoard.c b/Board/EM/SMBIOS/SmbiosBoard.c
new file mode 100644
index 0000000..85befa5
--- /dev/null
+++ b/Board/EM/SMBIOS/SmbiosBoard.c
@@ -0,0 +1,1790 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
+// $Header: /Alaska/BIN/Modules/SMBIOS/SmbiosBoard.c 29 5/07/14 10:33a Davidd $
+//
+// $Revision: 29 $
+//
+// $Date: 5/07/14 10:33a $
+//****************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Modules/SMBIOS/SmbiosBoard.c $
+//
+// 29 5/07/14 10:33a Davidd
+// [TAG] EIP157418
+// [Category] Improvement
+// [Description] Removal of temporary bus assignment or sample code from
+// SmbiosBoard.c template
+// [Files] SmbiosBoard.c
+//
+// 28 11/15/13 4:31p Davidd
+// [TAG] EIP143321
+// [Category] Improvement
+// [Description] Perform "CppCheck" on Smbios module for
+// '4.6.5.1_SMBIOS_36' release
+// [Files] SmbiosBoard.c
+// Smbios.c
+// SmbiosDMIEdit.c
+// SmbiosDMIEditFunc.c
+// SmbiosNvramFunc.c
+//
+// 27 5/23/13 2:36p Davidd
+// [TAG] EIP104836
+// [Category] New Feature
+// [Description] DMIEdit support edit type 4
+// [Files] SmbiosBoard.c
+// SmbiosDMIEditBoard.sdl
+// Smbios.c
+// SmbiosDMIEditFunc.c
+// Smbios.h
+// SmbiosDynamicData.h
+//
+// 26 5/04/11 3:33p Davidd
+// [TAG] EIP57144
+// [Category] NEW FEATURE
+// [Description] Allow SMBIOS Type 39 to be modified using DMIEdit
+// [Files] SmbiosBoard.c
+// Smbios.h
+// SmbiosDynamicData.h
+// Smbios.c
+// SmbiosDmieditFunc.c
+// SmbiosNvramFunc.c
+//
+// 25 4/05/11 11:38a Davidd
+// [TAG] EIP55656
+// [Category] Improvement
+// [Description] Provide generic support in SMBIOS module to include
+// build time EC version
+// [Files] SmbiosBoard.c
+//
+// 24 2/09/11 10:57a Davidd
+// [TAG] EIP52505
+// [Category] Improvement
+// [Description] Dynamically update SMBIOS Type24 (Hardware Security)
+// according to Administrator/User password setup question.
+// [Files] SmbiosBoard.c
+//
+// 23 11/22/10 12:36p Davidd
+// [TAG] EIP44236
+// [Category] BUG FIX
+// [Severity] Normal
+// [Symptom] SMBIOS type 4 Processor Version is incorrect
+// [RootCause] Type 4 Version string is not resized as updated.
+// [Solution] Added code to replace the Version strings as updated.
+// Same
+// also applied to Manufacturer string.
+// [Files]
+// Smbios.c
+// SmbiosBoard.c
+//
+// 22 11/15/10 2:18p Davidd
+// [TAG] EIP46936
+// [Category] Improvement
+// [Description] Generic Smbios module should have the support to
+// disable SMBIOS memory update
+// [Files]
+// Smbios.c
+// Smbios.sdl
+// SmbiosBoard.c
+// SmbiosDynamicData.h
+//
+// 21 11/01/10 12:36p Davidd
+// [TAG] EIP41560
+// [Category] Improvement
+// [Description] DMIEDIT modified values are not preserved in reboot
+// [Files]
+// Smbios.c
+// Smbios.sdl
+// SmbiosBoard.c
+// SmbiosBoard.mak
+//
+// 20 6/02/09 3:43p Davidd
+// Updated AMI and function headers (EIP 22180)
+//
+// 19 5/19/09 11:01a Davidd
+// Changes added to improve memory type 17 porting (EIP 22241).
+//
+// 18 12/30/08 3:11p Davidd
+// Fixed the hanging problem when only SMBIOS binary component is present
+// (ref. EIP 18370)
+//
+// 17 11/14/08 4:39p Davidd
+// - Added OemUpdate protocol. OEM can add code to update any structure
+// here. This function will be called after all structures have been
+// updated with DMI or dynamic data.
+//
+// 16 10/27/08 12:52p Davidd
+// - Code added for memory SPD data access.
+// - Added Type 41 support (SMBIOS v2.6)
+//
+// 15 2/22/08 10:19a Davidd
+// Simplified the way the number of memory slots for each physical memory
+// array are defined.
+//
+// 14 2/13/08 12:41p Davidd
+// Added a close comment missing in CreateBatteryDataForSMBios().
+//
+// 13 2/06/08 3:58p Davidd
+// Added NO_OF_PORTABLE_BATTERY field to SmbiosBoardProtocol to hold the
+// number of batteries in the system.
+//
+// 12 12/17/07 12:09p Davidd
+// Added PORTABLE_BATTERY_INFO to EFI_SMBIOS_BOARD_PROTOCOL.
+// Removed entries intended as reminder of porting is needed. This causes
+// BQA Module Delete/Insertion test to fail.
+//
+// 11 11/28/07 10:56a Davidd
+// Changes added to dynamically update the Processor Information Type 4
+// Voltage field.
+//
+// 10 11/21/07 12:11p Davidd
+//
+// 9 11/21/07 12:04p Davidd
+// Added function CreateBatteryDataForSMBios to support Portable Battery
+// Data structure type 22.
+//
+// 8 6/05/07 4:03p Michaela
+// Added porting comment for CreateCPUDataForSMBios() to clarify
+// usage for backward compatibility only
+//
+// 7 3/29/07 3:23p Davidd
+// Provide sample template code for both Intel and AMD platforms. User to
+// uncomment appropriate blocks to use. Sample template code might need
+// additional changes depending on platform.
+//
+// 6 3/21/07 4:35p Michaela
+// minor modification to CreateCPUDataForSMBios to meet
+// coding standards, add support for AMD and add comments.
+//
+// 5 12/15/06 1:13p Davidd
+// Reformatted to coding standard.
+//
+// 1 5/24/06 11:59a Fasihm
+// Initial check-in for the Santa Rosa Project. (Matanzas CRB) with
+// Crestline + ICH8M + Merom Processor.
+//
+// 3 3/15/06 5:50p Fasihm
+// Code modified to get the CPU data by making call to the CPU protocol.
+// Added some SDL token values into the SmbiosBoardProtocol.
+//
+// 4 3/03/06 5:32p Davidd
+// Code modified to get the CPU data by making call to the CPU protocol.
+//
+// 3 7/27/05 1:23p Davidd
+// Added some SDL token values into the SmbiosBoardProtocol.
+//
+// 2 7/20/05 11:17a Davidd
+// Commented out sample code. Sample code is for reference only.
+//
+// 1 7/18/05 5:57p Davidd
+// File added. This file is used to port the CPU, System Slot, and
+// On-Board Devices dynamic information.
+//
+//****************************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: SmbiosBoard.C
+//
+// Description: This file contains code for OEM related code for SMBIOS
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+//----------------------------------------------------------------------------
+// Includes
+
+#include <Token.h>
+#include <EFI.h>
+#include <AmiDxeLib.h>
+#include <CacheSubClass.h>
+#include <Protocol\AmiCpuInfo.h>
+#include <Protocol\PciIO.h>
+#include <Protocol\PciRootBridgeIo.h>
+#include <Protocol\SmbiosDynamicData.h>
+#include <AMICSPLIBInc.h>
+#include <Protocol\SMBUS.h>
+#include <Protocol\Smbios.h>
+
+#define PCI_CFG_ADDRESS(bus,dev,func,reg) \
+ ((UINT64)((((UINTN)bus) << 24) + (((UINTN)dev) << 16) + (((UINTN)func) << 8) + ((UINTN)reg)))& 0x00000000ffffffff
+
+extern EFI_BOOT_SERVICES *pBS;
+
+UINT8 SmbusCmdReg;
+EFI_GUID gEfiSmbiosProtocolGuid = EFI_SMBIOS_PROTOCOL_GUID;
+EFI_SMBIOS_PROTOCOL *gSmbiosProtocol;
+EFI_SMBUS_HC_PROTOCOL *gSMBus = NULL;
+
+EFI_GUID gEfiSmbiosBoardProtocolGuid = EFI_SMBIOS_BOARD_PROTOCOL_GUID;
+
+EFI_SMBIOS_BOARD_PROTOCOL SmbiosBoardProtocol = {BASE_BOARD_INFO,
+ SYS_CHASSIS_INFO,
+ PROCESSOR_DMIEDIT_SUPPORT,
+ OEM_STRING_INFO,
+ SYSTEM_CONFIG_OPTION_INFO,
+ MEMORY_ERROR_INFO,
+ ONBOARD_DEVICE_INFO,
+ PORTABLE_BATTERY_INFO,
+ ADDITIONAL_INFO,
+ ONBOARD_DEVICE_EXTENDED_INFO,
+ SYSTEM_POWER_SUPPLY_INFO,
+ NO_OF_PROCESSOR_SOCKETS,
+ NUMBER_OF_SYSTEM_SLOTS,
+ NUMBER_OF_ONBOARD_DEVICES,
+ NO_OF_PHYSICAL_MEMORY_ARRAY,
+ NO_OF_PORTABLE_BATTERY,
+ ONBOARD_DEVICE_EXT_COUNT,
+ CreateBaseBoardDataForSMBios,
+ CreateChassisDataForSMBios,
+ CreateCPUDataForSMBios,
+ CreateSlotDataForSMBios,
+ CreateOnBoardDevDataForSMBios,
+ CreateBatteryDataForSMBios,
+ CreateOnBoardDevExtInfoForSMBios,
+ EnableSmbusController,
+ RestoreSmbusController,
+ GetSpdByte,
+ OemUpdate,
+ A1_MEMORY_SOCKETS,
+#if NO_OF_PHYSICAL_MEMORY_ARRAY >= 2
+ A2_MEMORY_SOCKETS,
+#endif
+#if NO_OF_PHYSICAL_MEMORY_ARRAY >= 3
+ A3_MEMORY_SOCKETS,
+#endif
+#if NO_OF_PHYSICAL_MEMORY_ARRAY == 4
+ A4_MEMORY_SOCKETS,
+#endif
+ };
+
+typedef VOID (SMBIOS_OEM_UPDATE) (VOID);
+extern SMBIOS_OEM_UPDATE SMBIOS_OEM_UPDATE_LIST EndOfSmbiosOemUpdateList;
+SMBIOS_OEM_UPDATE* SmbiosOemUpdate[] = {SMBIOS_OEM_UPDATE_LIST NULL};
+
+/*
+//----------------------------------------------------------------------------
+// ==================================================================
+// ==================================================================
+// ==================================================================
+// === ===
+// === End of SAMPLE TEMPLATE CODE for Intel Weybridge CRB ===
+// === platform. Uncomment this block to use. ===
+// === ===
+// === Might need changes for other platforms. ===
+// === ===
+// ==================================================================
+// ==================================================================
+// ==================================================================
+//----------------------------------------------------------------------------
+*/
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// ***** PORTING REQUIRED *****
+// (if SMBIOS module is part of the project)
+//----------------------------------------------------------------------------
+// Procedure: OemUpdate
+//
+// Description: The purpose of this function is to allow OEM to update the
+// SMBIOS table as needed. OEM can use the EFI_SMBIOS_PROTOCOL
+// to read, add, delete, and write to the SMBIOS table.
+//
+// Input: None
+//
+// Output: None
+//
+// Note:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+OemUpdate (VOID)
+{
+/*
+//----------------------------------------------------------------------------
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === The following sample code DOES NOT serve any purposes. ===
+ // === It is included to illustrate the use of the SMBIOS ===
+ // === protocols only. ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ EFI_STATUS Status;
+ UINT8 *Buffer;
+ UINT16 BSize;
+ UINT16 Handle;
+
+ Status = pBS->LocateProtocol(&gEfiSmbiosProtocolGuid, NULL, &gSmbiosProtocol);
+ ASSERT_EFI_ERROR(Status);
+
+ // Read CPU structure
+ Status = gSmbiosProtocol->SmbiosReadStrucByType(4, 1, &Buffer, &BSize);
+
+ if (!EFI_ERROR(Status)) {
+ // Update previously read CPU structure and write it back, overwriting old data
+ Handle = ((SMBIOS_STRUCTURE_HEADER*)Buffer)->Handle;
+ ((SMBIOS_PROCESSOR_INFO*)Buffer)->MaxSpeed = 0x1234;
+ gSmbiosProtocol->SmbiosWriteStructure(Handle, Buffer, BSize);
+
+ // Add structure with specific handle = 0x60
+ Handle = 0x60;
+ gSmbiosProtocol->SmbiosAddStrucByHandle(Handle, Buffer, BSize);
+
+ // Add structure with next available handle number
+ gSmbiosProtocol->SmbiosAddStructure(Buffer, BSize);
+
+ // Delete structure with handle = 3
+ gSmbiosProtocol->SmbiosDeleteStructure(3);
+
+ // Get available free handle, then add structure with that handle
+ Handle = gSmbiosProtocol->SmbiosGetFreeHandle();
+ if (Handle != -1) {
+ gSmbiosProtocol->SmbiosAddStrucByHandle(Handle, Buffer, BSize);
+ }
+
+ // Free memory allocated by the earlier gSmbiosProtocol->SmbiosReadStrucByType call
+ pBS->FreePool(Buffer);
+ }
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === End of sample code ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+
+//----------------------------------------------------------------------------
+*/
+
+//===========================================================================
+// EC Version (Type 0 Offset 0x16-0x17) dynamic update
+//
+// This code requires EC major & minor versions to be available in
+// ECRev1 & ECRev2 NVRAM variables respectively
+//===========================================================================
+#if (defined(DYNAMIC_UPDATE_TYPE0_EC_VERSION) && (DYNAMIC_UPDATE_TYPE0_EC_VERSION == 1))
+{
+ EFI_STATUS Status;
+ EFI_GUID gEfiGlobalVariableGuid = EFI_GLOBAL_VARIABLE;
+ UINT8 EcMajorVersion;
+ UINT8 EcMinorVersion;
+ UINTN Size = sizeof(EcMajorVersion);
+ UINT8 Type0Data[sizeof(SMBIOS_BIOS_INFO)];
+ UINT16 Type0DataSize = sizeof(SMBIOS_BIOS_INFO);
+ UINT8 *Type0DataPtr = &Type0Data[0];
+
+ // Get EC version from ECRev1 & ECRev2 variables
+ Status = pRS->GetVariable( L"ECRev1", \
+ &gEfiGlobalVariableGuid, \
+ NULL, \
+ &Size, \
+ &EcMajorVersion );
+ if (EFI_ERROR(Status)) goto exitEcVersionUpdate;
+
+ Status = pRS->GetVariable( L"ECRev2", \
+ &gEfiGlobalVariableGuid, \
+ NULL, \
+ &Size, \
+ &EcMinorVersion );
+ if (EFI_ERROR(Status)) goto exitEcVersionUpdate;
+
+ Status = pBS->LocateProtocol(
+ &gEfiSmbiosProtocolGuid,
+ NULL,
+ &gSmbiosProtocol);
+ ASSERT_EFI_ERROR(Status);
+
+ if (Status == EFI_SUCCESS) {
+ // Read Smbios Type 0 structure, update EC version and write it back
+ Status = gSmbiosProtocol->SmbiosReadStrucByType(
+ 0,
+ 1,
+ &Type0DataPtr,
+ &Type0DataSize);
+ ASSERT_EFI_ERROR(Status);
+
+ ((SMBIOS_BIOS_INFO*)Type0DataPtr)->ECFirmwareMajorRelease = EcMajorVersion;
+ ((SMBIOS_BIOS_INFO*)Type0DataPtr)->ECFirmwareMinorRelease = EcMinorVersion;
+
+ if (Status == EFI_SUCCESS) {
+ Status = gSmbiosProtocol->SmbiosWriteStructure(
+ ((SMBIOS_BIOS_INFO*)Type0DataPtr)->StructureType.Handle,
+ Type0DataPtr,
+ Type0DataSize);
+ ASSERT_EFI_ERROR(Status);
+ }
+ }
+
+exitEcVersionUpdate:
+ Status = EFI_SUCCESS; // Dummy - To avoid build error in some cases
+}
+#endif
+//===========================================================================
+// EC Version (Type 0 Offset 0x16-0x17) dynamic update End
+//===========================================================================
+
+//===========================================================================
+// ***** DO NOT REMOVE THIS BLOCK *****
+//
+// Hardware Security (Type 24) dynamic update Start
+//
+// Update Type 24 Administrator and Power-on Password Status based on
+// Setup settings
+//===========================================================================
+#if (defined(TSE_BUILD) && (HARDWARE_SECURITY_INFO == 1)) // Token indicating AMI TSE is used
+{
+#include <Setup.h>
+
+#define AMITSESETUP_GUID \
+ { 0xc811fa38, 0x42c8, 0x4579, 0xa9, 0xbb, 0x60, 0xe9, 0x4e, 0xdd, 0xfb, 0x34 }
+
+ EFI_STATUS Status;
+ EFI_GUID AmiTseSetupGuid = AMITSESETUP_GUID;
+ AMITSESETUP AmiTseData;
+ UINTN VariableSize = sizeof(AMITSESETUP);
+ UINTN TsePasswordLength = SETUP_PASSWORD_LENGTH * sizeof(CHAR16);
+ CHAR16 *TestPassWord;
+ UINT8 HwdSecSettings = 0;
+ UINT8 *Type24Data;
+ UINT16 Type24Size;
+
+ Status = pRS->GetVariable ( L"AMITSESetup", \
+ &AmiTseSetupGuid, \
+ NULL, \
+ &VariableSize, \
+ &AmiTseData );
+
+ if (!EFI_ERROR(Status)) {
+ Status = pBS->AllocatePool(EfiRuntimeServicesData, TsePasswordLength, &TestPassWord);
+ if (Status == EFI_SUCCESS) {
+ MemSet(TestPassWord, TsePasswordLength, 0);
+
+ if (MemCmp(AmiTseData.UserPassword, TestPassWord, TsePasswordLength) != 0) {
+ HwdSecSettings |= BIT6; // Power-on Password
+ }
+ if (MemCmp(AmiTseData.AdminPassword, TestPassWord, TsePasswordLength) != 0) {
+ HwdSecSettings |= BIT2; // Administrator Password
+ }
+
+ Status = pBS->LocateProtocol(
+ &gEfiSmbiosProtocolGuid,
+ NULL,
+ &gSmbiosProtocol);
+ ASSERT_EFI_ERROR(Status);
+
+ if (Status == EFI_SUCCESS) {
+ Status = gSmbiosProtocol->SmbiosReadStrucByType(
+ 24,
+ 1,
+ &Type24Data,
+ &Type24Size);
+
+ ASSERT_EFI_ERROR(Status);
+
+ if (Status == EFI_SUCCESS) {
+ ((SMBIOS_HARDWARE_SECURITY_INFO*)Type24Data)->HardwareSecSettings &= 0x33; // Clear Admin & Power-on pwd
+ ((SMBIOS_HARDWARE_SECURITY_INFO*)Type24Data)->HardwareSecSettings |= HwdSecSettings;
+ Status = gSmbiosProtocol->SmbiosWriteStructure(
+ ((SMBIOS_HARDWARE_SECURITY_INFO*)Type24Data)->StructureType.Handle,
+ Type24Data,
+ Type24Size);
+ ASSERT_EFI_ERROR(Status);
+
+ pBS->FreePool(Type24Data);
+ }
+ }
+
+ pBS->FreePool(TestPassWord);
+ }
+ }
+}
+#endif
+//===========================================================================
+// Hardware Security (Type 24) dynamic update End
+//===========================================================================
+
+//===========================================================================
+// ***** DO NOT REMOVE THIS BLOCK *****
+// ***** Calling OEM Update eLinks *****
+//
+// OEM Update eLinks Block Start
+//===========================================================================
+ {
+ UINT8 i;
+
+ for (i = 0; SmbiosOemUpdate[i] != NULL; i++) {
+ SmbiosOemUpdate[i]();
+ }
+ }
+//===========================================================================
+// OEM Update eLinks Block End
+//===========================================================================
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// ***** PORTING REQUIRED *****
+// (if SMBIOS module is part of the project)
+//----------------------------------------------------------------------------
+// Procedure: EnableSmbusController
+//
+// Description: This function saves the current setting of the Smbus
+// Controller CMD register and then enables it so that SPD data
+// can be accessed.
+//
+// Input: None
+//
+// Output: EFI_STATUS
+//
+// Note:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+EnableSmbusController (VOID)
+{
+ EFI_GUID EfiSMBusProtocolGuid = EFI_SMBUS_HC_PROTOCOL_GUID;
+
+ // Enables the SMBus controller command register if needed.
+
+ return pBS->LocateProtocol( &EfiSMBusProtocolGuid, NULL, &gSMBus );
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// ***** PORTING REQUIRED *****
+// (if SMBIOS module is part of the project)
+//----------------------------------------------------------------------------
+// Procedure: RestoreSmbusController
+//
+// Description: This function restores the Smbus Controller CMD register
+// to the previously saved setting.
+//
+// Input: None
+//
+// Output: EFI_STATUS
+//
+// Note:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+RestoreSmbusController (VOID)
+{
+ EFI_STATUS Status = EFI_UNSUPPORTED;
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// ***** PORTING REQUIRED *****
+// (if SMBIOS module is part of the project)
+//----------------------------------------------------------------------------
+// Procedure: GetSpdByte
+//
+// Description: This function reads a byte from the system memory SPD
+//
+// Input: IN EFI_SMBUS_DEVICE_ADDRESS SpdAddr
+// IN UINT8 Offset
+// IN OUT UINT8 *Data
+//
+// Output: EFI_STATUS
+// UINT8 *Data
+//
+// Note:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+GetSpdByte (
+ IN EFI_SMBUS_DEVICE_ADDRESS SpdAddr,
+ IN UINT8 Offset,
+ IN OUT UINT8 *Data
+)
+{
+ UINTN Length = 1;
+
+ if (gSMBus == NULL) return EFI_UNSUPPORTED;
+
+ return gSMBus->Execute( gSMBus,
+ SpdAddr,
+ Offset,
+ EfiSmbusReadByte,
+ FALSE,
+ &Length,
+ Data );
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// ***** PORTING REQUIRED *****
+// (if SMBIOS module is part of the project)
+//----------------------------------------------------------------------------
+// Procedure: CreateSlotDataForSMBios
+//
+// Description: This function gathers the System Slot status information and
+// saves them in a variable named "SmbiosSlotsVar". This variable
+// with the slot information is needed by the SMBIOS module to
+// create the REQUIRED "Type 9" structure
+//
+// Input: None
+//
+// Output: EFI_STATUS
+// Variable named "SmbiosSlotsVar" with system slot information
+//
+// Note: Refer to SYSTEM_SLOT_DYNAMIC_DATA in SmbiosDynamicData.h for
+// structure information.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+CreateSlotDataForSMBios (VOID)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+#if UPDATE_SLOT_TYPE9
+/*
+//----------------------------------------------------------------------------
+// PORTING REQUIRED - PORTING REQUIRED - PORTING REQUIRED
+//----------------------------------------------------------------------------
+//
+// Create a SYSTEM_SLOT_DYNAMIC_DATA structure and fill it with system slots
+// information - bus number for the slot and its current usage status.
+// Return the slot structure information in a variable named "SmbiosSlotsVar"
+//
+*/
+#endif // UPDATE_SLOT_TYPE9
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: FillStringBufferWithSpaces
+//
+// Description: This function fills the input buffer with spaces. The number
+// of spaces to be filled is specified in the input BufferSize
+//
+// Input: IN UINT8 *BufferPtr
+// IN UINT8 BufferSize
+//
+// Output: Buffer pointed by BufferPtr is filled with spaces
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+FillStringBufferWithSpaces (
+ IN UINT8 *BufferPtr,
+ IN UINT8 BufferSize
+)
+{
+ UINT8 i;
+
+ for (i = 0; i < (BufferSize - 1); i++) {
+ *BufferPtr = 0x20;
+ BufferPtr++;
+ }
+ *BufferPtr = 0;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// ***** PORTING REQUIRED *****
+// (if SMBIOS module is part of the project)
+//----------------------------------------------------------------------------
+// Procedure: CreateBaseBoardDataForSMBios
+//
+// Description: This function provides system chassis information. SMBIOS
+// Core uses these information to dynamically update SMBIOS
+// Chassis Type 2.
+//
+// Input: None
+//
+// Output: Creates variable named "SmbiosBaseBoardVar" with Chassis information
+//
+// Note: Refer to BASE_BOARD_DATA in SmbiosDynamicData.h for structure
+// information.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+CreateBaseBoardDataForSMBios (
+)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+#if UPDATE_BASEBOARD_TYPE2
+/*
+//----------------------------------------------------------------------------
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === Start of SAMPLE TEMPLATE CODE ===
+ // === ===
+ // === Might need changes for specific platform ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+
+ EFI_GUID EfiSmbiosDynamicDataGuid = EFI_SMBIOS_DYNAMIC_DATA_GUID;
+ BASE_BOARD_DATA BaseBoardInfo;
+ UINTN VarSize;
+ UINT32 Attributes = EFI_VARIABLE_BOOTSERVICE_ACCESS;
+
+ char* BoardID_Index[] = {
+ "Board Name 1", // 0x00
+ "Board Name ", // 0x01
+ "Board Name ", // 0x02
+ };
+
+ char* BoardManufacturerName = "XYZ Corporation";
+
+ Status = pBS->LocateProtocol(
+ &gPlatformInfoProtocolGuid,
+ NULL,
+ &gPlatformInfoProtocol);
+ ASSERT_EFI_ERROR(Status);
+
+ Status = pBS->AllocatePool(
+ EfiBootServicesData,
+ strlen(BoardManufacturerName),
+ &BaseBoardInfo.BoardManufacturer);
+
+ strcpy(BaseBoardInfo.BoardManufacturer, BoardManufacturerName);
+
+ Status = pBS->AllocatePool(
+ EfiBootServicesData,
+ strlen(BoardID_Index[gPlatformInfoProtocol->BoardId]),
+ &BaseBoardInfo.BoardName);
+
+ strcpy(BaseBoardInfo.BoardName, BoardID_Index[gPlatformInfoProtocol->BoardId]);
+
+ VarSize = sizeof(BASE_BOARD_DATA);
+
+ Status = pRS->SetVariable(
+ SmbiosBaseBoardVar,
+ &EfiSmbiosDynamicDataGuid,
+ Attributes,
+ VarSize,
+ &BaseBoardInfo);
+
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === End of SAMPLE TEMPLATE CODE ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+//----------------------------------------------------------------------------
+*/
+#endif // UPDATE_BASEBOARD_TYPE2
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// ***** PORTING REQUIRED *****
+// (if SMBIOS module is part of the project)
+//----------------------------------------------------------------------------
+// Procedure: CreateChassisDataForSMBios
+//
+// Description: This function provides system chassis information. SMBIOS
+// Core uses these information to dynamically update SMBIOS
+// Chassis Type 3.
+//
+// Input: None
+//
+// Output: Creates variable named "SmbiosChassisVar" with Chassis information
+//
+// Note: Refer to CHASSIS_DATA in SmbiosDynamicData.h for structure
+// information.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+CreateChassisDataForSMBios (
+)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+#if UPDATE_SYSTEM_CHASSIS_TYPE3
+/*
+//----------------------------------------------------------------------------
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === Start of SAMPLE TEMPLATE CODE ===
+ // === ===
+ // === Might need changes for specific platform ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+
+ EFI_GUID EfiSmbiosDynamicDataGuid = EFI_SMBIOS_DYNAMIC_DATA_GUID;
+ CHASSIS_DATA ChassisInfo;
+ UINTN VarSize;
+ UINT32 Attributes = EFI_VARIABLE_BOOTSERVICE_ACCESS;
+
+ Status = pBS->LocateProtocol(
+ &gPlatformInfoProtocolGuid,
+ NULL,
+ &gPlatformInfoProtocol);
+ ASSERT_EFI_ERROR(Status);
+
+ switch (gPlatformInfoProtocol->PlatformFlavor) {
+ case FlavorMobile:
+ ChassisInfo.Type = 0x09; // EfiMiscChassisTypeLapTop
+ break;
+ case FlavorDesktop:
+ ChassisInfo.Type = 0x03; // EfiMiscChassisTypeDeskTop
+ break;
+ case FlavorUpServer:
+ ChassisInfo.Type = 0x11; // EfiMiscChassisTypeMainServerChassis
+ break;
+ default:
+ ChassisInfo.Type = 0x02; // EfiMiscChassisTypeUnknown;
+ }
+
+ VarSize = sizeof(CHASSIS_DATA);
+ Status = pRS->SetVariable(
+ SmbiosChassisVar,
+ &EfiSmbiosDynamicDataGuid,
+ Attributes,
+ VarSize,
+ &ChassisInfo);
+
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === End of SAMPLE TEMPLATE CODE ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+//----------------------------------------------------------------------------
+*/
+#endif // UPDATE_SYSTEM_CHASSIS_TYPE3
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// ***** PORTING REQUIRED *****
+// (if SMBIOS module is part of the project)
+//----------------------------------------------------------------------------
+// Procedure: CreateCPUDataForSMBios
+//
+// Description: This function gathers the System Processor information and
+// saves them in a variable named "SmbiosCpuVar". This variable
+// with the CPU information is needed by the SMBIOS module to
+// create the "Type 4, 7" structure.
+//
+// Input: None
+//
+// Output: EFI_STATUS
+// Variable named "SmbiosCpuVar" with System CPU information
+//
+// Note: Refer to CPU_DYNAMIC_DATA in SmbiosDynamicData.h for
+// structure information.
+//
+// ******************** PORTING NOTE ********************
+// By default, this function only returns EFI_SUCCESS and should
+// only be ported if the CPU module does not install the
+// SMBIOS_CPU_INFO_PROTOCOL.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+CreateCPUDataForSMBios (VOID)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+#if UPDATE_CPU_TYPE4
+/*
+//----------------------------------------------------------------------------
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === Start of SAMPLE TEMPLATE CODE for Intel Weybridge CRB ===
+ // === platform. Uncomment this block to use. ===
+ // === ===
+ // === Might need changes for other platforms. ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ EFI_GUID gAmiCpuInfoProtocolGuid = AMI_CPU_INFO_PROTOCOL_GUID;
+ EFI_GUID EfiSmbiosDynamicDataGuid = EFI_SMBIOS_DYNAMIC_DATA_GUID;
+ UINTN NumCores = 1;
+ UINTN NumHts = 1;
+ UINTN i;
+ UINTN j;
+ UINT32 Attributes = EFI_VARIABLE_BOOTSERVICE_ACCESS;
+ UINT32 L1Cache;
+ UINT32 L2Cache;
+ UINT32 L3Cache;
+ AMI_CPU_INFO *GetCpuInfo = NULL;
+ AMI_CPU_INFO_PROTOCOL *AmiCpuInfo;
+ CPU_DYNAMIC_DATA CpuInfo;
+ CACHE_DESCRIPTOR_INFO *CacheDescInfo;
+ UINT8 CacheTypeTable[] = {4, 3, 1, 5};
+ UINT8 AssociativityTable[] = {6, 1, 4, 1, 5, 1, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 8};
+
+ Status = pBS->LocateProtocol (&gAmiCpuInfoProtocolGuid, NULL, &AmiCpuInfo);
+ if (EFI_ERROR(Status)) return Status;
+
+ CpuInfo.NumberCPU = NO_OF_PROCESSOR_SOCKETS;
+
+ for(i = 0; i < NO_OF_PROCESSOR_SOCKETS; ++i) {
+ Status = AmiCpuInfo->GetCpuInfo(AmiCpuInfo, (UINTN)i*NumCores*NumHts, &GetCpuInfo);
+ if (Status) {
+ // No data available from CPU module
+ CpuInfo.CpuData[i].CpuData.Status = 0;
+ CpuInfo.CpuData[i].CpuData.CurrentSpeed = 0;
+ // Hardcode MaxSpeed to 4GHz (assumed system max speed)
+ CpuInfo.CpuData[i].CpuData.MaxSpeed = 0x0FA0;
+ CpuInfo.CpuData[i].CpuData.ExtClockFreq = CpuInfo.CpuData[0].CpuData.ExtClockFreq;
+ CpuInfo.CpuData[i].CpuData.ProcessorID_1 = 0;
+ CpuInfo.CpuData[i].CpuData.ProcessorID_2 = 0;
+ CpuInfo.CpuData[i].CpuData.Voltage = BIT01; // Assume 3.3V
+ CpuInfo.CpuData[i].CpuData.Upgrade = CpuInfo.CpuData[0].CpuData.Upgrade;
+ CpuInfo.CpuData[i].CpuData.Family = CpuInfo.CpuData[0].CpuData.Family;
+ MemCpy(CpuInfo.CpuData[i].CpuData.Manufacturer, CpuInfo.CpuData[0].CpuData.Manufacturer, 18);
+ MemCpy(CpuInfo.CpuData[i].CpuData.Version, CpuInfo.CpuData[0].CpuData.Version, 48);
+ continue;
+ }
+
+ NumCores = GetCpuInfo->NumCores;
+ NumHts = GetCpuInfo->NumHts;
+ CacheDescInfo = GetCpuInfo->CacheInfo;
+
+ L1Cache = 0;
+ L2Cache = 0;
+ L3Cache = 0;
+ CpuInfo.CpuData[i].L1Cache.SystemCacheType = 0xFF;
+ CpuInfo.CpuData[i].L2Cache.SystemCacheType = 0xFF;
+ CpuInfo.CpuData[i].L3Cache.SystemCacheType = 0xFF;
+ for(j = 0; CacheDescInfo[j].Desc; ++j) { // End of descriptors, Desc = 0.
+ switch(GetCpuInfo->CacheInfo[j].Level) {
+ case 1:
+ L1Cache = CacheDescInfo[j].Size;
+ if (CpuInfo.CpuData[i].L1Cache.SystemCacheType == 0xFF) {
+ CpuInfo.CpuData[i].L1Cache.SystemCacheType = CacheTypeTable[CacheDescInfo[j].Type];
+ }
+ else {
+ CpuInfo.CpuData[i].L1Cache.SystemCacheType = 0x05;
+ }
+ CpuInfo.CpuData[i].L1Cache.Associativity = AssociativityTable[CacheDescInfo[j].Associativity];
+ break;
+ case 2:
+ L2Cache = CacheDescInfo[j].Size;
+ if (CpuInfo.CpuData[i].L2Cache.SystemCacheType == 0xFF) {
+ CpuInfo.CpuData[i].L2Cache.SystemCacheType = CacheTypeTable[CacheDescInfo[j].Type];
+ }
+ else {
+ CpuInfo.CpuData[i].L2Cache.SystemCacheType = 0x05;
+ }
+ CpuInfo.CpuData[i].L2Cache.Associativity = AssociativityTable[CacheDescInfo[j].Associativity];
+ break;
+ case 3:
+ L3Cache = CacheDescInfo[j].Size;
+ if (CpuInfo.CpuData[i].L3Cache.SystemCacheType == 0xFF) {
+ CpuInfo.CpuData[i].L3Cache.SystemCacheType = CacheTypeTable[CacheDescInfo[j].Type];
+ }
+ else {
+ CpuInfo.CpuData[i].L3Cache.SystemCacheType = 0x05;
+ }
+ CpuInfo.CpuData[i].L3Cache.Associativity = AssociativityTable[CacheDescInfo[j].Associativity];
+ break;
+ }
+ }
+
+ CpuInfo.CpuData[i].CpuData.CurrentSpeed = (UINT16)(GetCpuInfo->IntendedFreq);
+ CpuInfo.CpuData[i].CpuData.MaxSpeed = 3800; // Value from Intel Tiano BIOS
+ CpuInfo.CpuData[i].CpuData.ExtClockFreq = (UINT16)(GetCpuInfo->FSBFreq);
+ CpuInfo.CpuData[i].CpuData.ProcessorID_1 = (UINT32)(GetCpuInfo->Version);
+ CpuInfo.CpuData[i].CpuData.ProcessorID_2 = (UINT32)(GetCpuInfo->Features);
+
+ // From CPU module: GetCpuInfo->Voltage = Volt * 10000
+ // From SMBIOS spec, this field should be set to CPU voltage * 10
+ // Therefore this field should be set to GetCpuInfo->Voltage / 1000
+ CpuInfo.CpuData[i].CpuData.Voltage = (UINT8)(GetCpuInfo->Voltage / 1000);
+ CpuInfo.CpuData[i].CpuData.Status = 0x41;
+ CpuInfo.CpuData[i].CpuData.Upgrade = 1;
+ CpuInfo.CpuData[i].CpuData.Family = 0xBF; // Intel(R) Core(TM) 2 Duo processor
+
+ CpuInfo.CpuData[i].CpuData.CoreCount = GetCpuInfo->NumCores;
+ CpuInfo.CpuData[i].CpuData.CoreEnabled = 1;
+ CpuInfo.CpuData[i].CpuData.ThreadCount = GetCpuInfo->NumHts;
+ CpuInfo.CpuData[i].CpuData.Family2 = 0xBF;
+
+ if(i == 0) {
+ FillStringBufferWithSpaces(CpuInfo.CpuData[i].CpuData.Version, sizeof(CpuInfo.CpuData[i].CpuData.Version));
+ MemCpy(CpuInfo.CpuData[i].CpuData.Version, GetCpuInfo->BrandString, sizeof(CpuInfo.CpuData[i].CpuData.Version) - 1);
+ FillStringBufferWithSpaces(CpuInfo.CpuData[i].CpuData.Manufacturer, sizeof(CpuInfo.CpuData[i].CpuData.Manufacturer));
+ MemCpy(CpuInfo.CpuData[i].CpuData.Manufacturer, "Intel", 6);
+ }
+ else {
+ MemCpy(CpuInfo.CpuData[i].CpuData.Manufacturer, CpuInfo.CpuData[0].CpuData.Manufacturer, sizeof(CpuInfo.CpuData[0].CpuData.Manufacturer));
+ MemCpy(CpuInfo.CpuData[i].CpuData.Version, CpuInfo.CpuData[0].CpuData.Version, sizeof(CpuInfo.CpuData[0].CpuData.Version));
+ }
+ CpuInfo.CpuData[i].L1Cache.CacheConfig = 0x180;
+ CpuInfo.CpuData[i].L1Cache.MaxCacheSize = L1Cache; // CacheL1
+ CpuInfo.CpuData[i].L1Cache.InstalledSize = L1Cache;
+ CpuInfo.CpuData[i].L1Cache.SupportSRAM = 0x01;
+ CpuInfo.CpuData[i].L1Cache.CurrentSRAM = 0x01;
+ CpuInfo.CpuData[i].L1Cache.CacheSpeed = 0;
+ CpuInfo.CpuData[i].L1Cache.ErrorCorrectionType = 0x03;
+
+ CpuInfo.CpuData[i].L2Cache.CacheConfig = 0x281;
+ CpuInfo.CpuData[i].L2Cache.MaxCacheSize = L2Cache; // CacheL2
+ CpuInfo.CpuData[i].L2Cache.InstalledSize = L2Cache;
+ CpuInfo.CpuData[i].L2Cache.SupportSRAM = 0x01;
+ CpuInfo.CpuData[i].L2Cache.CurrentSRAM = 0x01;
+ CpuInfo.CpuData[i].L2Cache.CacheSpeed = 0;
+ CpuInfo.CpuData[i].L2Cache.ErrorCorrectionType = 0x03;
+
+ CpuInfo.CpuData[i].L3Cache.CacheConfig = 0x302;
+ CpuInfo.CpuData[i].L3Cache.MaxCacheSize = L3Cache; // CacheL3
+ CpuInfo.CpuData[i].L3Cache.InstalledSize = L3Cache;
+ CpuInfo.CpuData[i].L3Cache.SupportSRAM = 0x01;
+ CpuInfo.CpuData[i].L3Cache.CurrentSRAM = 0x01;
+ CpuInfo.CpuData[i].L3Cache.CacheSpeed = 0;
+ CpuInfo.CpuData[i].L3Cache.ErrorCorrectionType = 0x03;
+ }
+ Status = pRS->SetVariable(
+ SmbiosCpuVar,
+ &EfiSmbiosDynamicDataGuid,
+ Attributes,
+ sizeof(CPU_DYNAMIC_DATA),
+ &CpuInfo);
+ ASSERT_EFI_ERROR(Status);
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === End of SAMPLE TEMPLATE CODE for Intel Weybridge CRB ===
+ // === platform. Uncomment this block to use. ===
+ // === ===
+ // === Might need changes for other platforms. ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+//----------------------------------------------------------------------------
+*/
+
+/*
+//----------------------------------------------------------------------------
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === Start of SAMPLE TEMPLATE CODE for AMD Warthog ===
+ // === platform. Uncomment this block to use. ===
+ // === ===
+ // === Might need changes for other platforms. ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+
+ EFI_GUID gAmiCpuInfoProtocolGuid = AMI_CPU_INFO_PROTOCOL_GUID;
+ EFI_GUID EfiSmbiosDynamicDataGuid = EFI_SMBIOS_DYNAMIC_DATA_GUID;
+ UINT8 AmiType, AmiAssoc, AmiCurLevel;
+ UINT16 AmiCurSize, L1CacheSize, L2CacheSize, L3CacheSize;
+ UINT32 Attributes = EFI_VARIABLE_BOOTSERVICE_ACCESS;
+ UINTN NumHts = 1, CurNode=0, CurCPU=0, NumCores = 1, CurCacheIndex;
+ AMI_CPU_INFO *AmiCpuInfo = NULL;
+ AMI_CPU_INFO_PROTOCOL *AmiCpuInfoProtocol;
+ CPU_DYNAMIC_DATA CpuInfo;
+ CACHE_DESCRIPTOR_INFO *AmiCacheDesc;
+ CPU_DATA *CurCpuData, *Cpu0Data;
+ CACHE_DATA *CurL1Cache, *CurL2Cache, *CurL3Cache;
+
+ // ==================================================================
+ // The mapping between AMI_CPU_INFO.CACHE_DESCRIPTOR_INFO.Type
+ // and CPU_DYNAMIC_DATA.SINGLE_CPU_DATA.CACHE_DATA.SystemCacheType
+ // should not require a translation table as the cache type is
+ // encoded the same for both structures:
+ //
+ // CACHE_DESCRIPTOR_INFO.Type <-> CACHE_DATA.SystemCacheType
+ // (Other) 1 <-> 1
+ // (Unknown) 2 <-> 2
+ // (Instruction) 3 <-> 3
+ // (Data) 4 <-> 4
+ // (Unified) 5 <-> 5
+ //
+ // ==================================================================
+ // The mapping between AMI_CPU_INFO.CACHE_DESCRIPTOR_INFO.Associativity
+ // and CPU_DYNAMIC_DATA.SINGLE_CPU_DATA.CACHE_DATA.Associativity
+ // should not require a translation table as the cache associativity
+ // is encoded the same for both structures:
+ //
+ // CACHE_DESCRIPTOR_INFO.Associativity <-> CACHE_DATA.Associativity
+ // (Other) 1 <-> 1
+ // (Unknown) 2 <-> 2
+ // (Direct) 3 <-> 3
+ // (2-way Set) 4 <-> 4
+ // (4-way Set) 5 <-> 5
+ // (Fully) 6 <-> 6
+ // (8-way Set) 7 <-> 7
+ // (16-way Set) 8 <-> 8
+ //
+ // ==================================================================
+ // Fill Processor Information Table (Type 4) and associated Cache
+ // Information structures.
+ //
+ // Notes: A SINGLE_CPU_DATA structure is created for each
+ // slot/socket such that only one structure is created for
+ // a multi-core processor. This implies the assumption
+ // that all cores on a processor have identical
+ // configuration.
+ //
+ // ==================================================================
+ Status = pBS->LocateProtocol (
+ &gAmiCpuInfoProtocolGuid,
+ NULL,
+ &AmiCpuInfoProtocol);
+ if (EFI_ERROR(Status))
+ return Status;
+
+ Status = AmiCpuInfoProtocol->GetCpuInfo(
+ AmiCpuInfoProtocol,
+ 0,
+ &AmiCpuInfo);
+ if (EFI_ERROR(Status))
+ return Status;
+
+ CpuInfo.NumberCPU = NO_OF_PROCESSOR_SOCKETS;
+ Cpu0Data = &(CpuInfo.CpuData[0].CpuData);
+
+ // For each Core0 on each slot/node, create a
+ // CPU information table.
+ for(CurNode=0, CurCPU=0;
+ CurNode < NO_OF_PROCESSOR_SOCKETS;
+ CurNode++, CurCPU = AmiCpuInfo->NumCores*CurNode )
+ {
+ Status = AmiCpuInfoProtocol->GetCpuInfo(
+ AmiCpuInfoProtocol,
+ CurCPU,
+ &AmiCpuInfo);
+
+ // some pointers to make code easier to read/type
+ CurCpuData = &(CpuInfo.CpuData[CurNode].CpuData);
+ CurL1Cache = &(CpuInfo.CpuData[CurNode].L1Cache);
+ CurL2Cache = &(CpuInfo.CpuData[CurNode].L2Cache);
+ CurL3Cache = &(CpuInfo.CpuData[CurNode].L3Cache);
+
+ // if an AMI_CPU_INFO structure does not exist for this Socket
+ // then fill with default data and attempt to get next
+ // socket information.
+ if (Status) {
+ CurCpuData->Status = 0;
+ CurCpuData->CurrentSpeed = 0;
+ CurCpuData->MaxSpeed = 0x0FA0;
+ CurCpuData->ExtClockFreq = Cpu0Data->ExtClockFreq;
+ CurCpuData->ProcessorID_1 = 0;
+ CurCpuData->ProcessorID_2 = 0;
+ CurCpuData->Status = 0;
+ CurCpuData->Upgrade = Cpu0Data->Upgrade;
+ CurCpuData->Family = Cpu0Data->Family;
+ MemCpy(CurCpuData->Manufacturer, Cpu0Data->Manufacturer, 18);
+ MemCpy(CurCpuData->Version, Cpu0Data->Version, 48);
+ continue;
+ }
+
+ NumCores = AmiCpuInfo->NumCores;
+ NumHts = AmiCpuInfo->NumHts;
+ AmiCacheDesc = AmiCpuInfo->CacheInfo;
+ L1CacheSize = 0;
+ L2CacheSize = 0;
+ L3CacheSize = 0;
+
+ // if more than one L1, L2, or L3 cache exits,
+ // its type will be unified by default.
+ CurL1Cache->SystemCacheType = 0xFF;
+ CurL2Cache->SystemCacheType = 0xFF;
+ CurL3Cache->SystemCacheType = 0xFF;
+
+ // ==========================================================
+ // Fill Cache Information Table (Type 7) for this slot/node
+ // ==========================================================
+ for ( CurCacheIndex = 0;
+ AmiCacheDesc[CurCacheIndex].Desc; // Desc == 0 is last
+ ++CurCacheIndex )
+ {
+ AmiType = AmiCacheDesc[CurCacheIndex].Type;
+ AmiAssoc = AmiCacheDesc[CurCacheIndex].Associativity;
+ AmiCurLevel = AmiCacheDesc[CurCacheIndex].Level;
+ AmiCurSize = AmiCacheDesc[CurCacheIndex].Size;
+
+ switch ( AmiCurLevel )
+ {
+ case EFI_CACHE_L1:
+ L1CacheSize = AmiCurSize;
+ if (CurL1Cache->SystemCacheType == 0xFF)
+ CurL1Cache->SystemCacheType = AmiType;
+ else
+ CurL1Cache->SystemCacheType = 0x05;
+ CurL1Cache->Associativity = AmiAssoc;
+ break;
+ case EFI_CACHE_L2:
+ L2CacheSize = AmiCurSize;
+ if (CurL2Cache->SystemCacheType == 0xFF)
+ CurL2Cache->SystemCacheType = AmiType;
+ else
+ CurL2Cache->SystemCacheType = 0x05;
+ CurL2Cache->Associativity = AmiAssoc;
+ break;
+ case EFI_CACHE_L3:
+ L3CacheSize = AmiCurSize;
+ if (CurL3Cache->SystemCacheType == 0xFF)
+ CurL3Cache->SystemCacheType = AmiType;
+ else
+ CurL3Cache->SystemCacheType = 0x05;
+ CurL3Cache->Associativity = AmiAssoc;
+ break;
+ } // switch
+ } // for
+
+ CurCpuData->CurrentSpeed = (UINT16)(AmiCpuInfo->ActualFreq);
+#if AMD_SYSTEM_BOARD == 1
+ CurCpuData->MaxSpeed = (UINT16)(AmiCpuInfo->MaxFreq);
+#endif
+ CurCpuData->ExtClockFreq = (UINT16)(AmiCpuInfo->FSBFreq);
+ CurCpuData->ProcessorID_1 = (UINT32)(AmiCpuInfo->Version);
+ CurCpuData->ProcessorID_2 = (UINT32)(AmiCpuInfo->Features);
+ CurCpuData->Status = 0x41; // Socket popuated
+ // and CPU enabled
+ CurCpuData->Upgrade = SMBIOS_PROCESSOR_UPGRADE; // CPU.sdl tokens
+ CurCpuData->Family = SMBIOS_PROCESSOR_FAMILY;
+ if(CurNode == 0) {
+ FillStringBufferWithSpaces(
+ CurCpuData->Version,
+ sizeof(CurCpuData->Version));
+ MemCpy(
+ CurCpuData->Version,
+ AmiCpuInfo->BrandString,
+ sizeof(CurCpuData->Version) - 1);
+ FillStringBufferWithSpaces(
+ CurCpuData->Manufacturer,
+ sizeof(CurCpuData->Manufacturer));
+ MemCpy(
+ CurCpuData->Manufacturer,
+ AmiCpuInfo->BrandString,
+ 5);
+ }
+ else {
+ MemCpy(
+ CurCpuData->Manufacturer,
+ Cpu0Data->Manufacturer,
+ sizeof(Cpu0Data->Manufacturer));
+ MemCpy(
+ CurCpuData->Version,
+ Cpu0Data->Version,
+ sizeof(Cpu0Data->Version));
+ }
+ CurL1Cache->CacheConfig = 0x180;
+ CurL1Cache->MaxCacheSize = L1CacheSize; // CacheL1
+ CurL1Cache->InstalledSize = L1CacheSize;
+ CurL1Cache->SupportSRAM = 0x01;
+ CurL1Cache->CurrentSRAM = 0x01;
+ CurL1Cache->CacheSpeed = 0;
+ CurL1Cache->ErrorCorrectionType = 0x03;
+
+ CurL2Cache->CacheConfig = 0x281;
+ CurL2Cache->MaxCacheSize = L2CacheSize; // CacheL2
+ CurL2Cache->InstalledSize = L2CacheSize;
+ CurL2Cache->SupportSRAM = 0x01;
+ CurL2Cache->CurrentSRAM = 0x01;
+ CurL2Cache->CacheSpeed = 0;
+ CurL2Cache->ErrorCorrectionType = 0x03;
+
+ CurL3Cache->CacheConfig = 0x302;
+ CurL3Cache->MaxCacheSize = L3CacheSize; // CacheL3
+ CurL3Cache->InstalledSize = L3CacheSize;
+ CurL3Cache->SupportSRAM = 0x01;
+ CurL3Cache->CurrentSRAM = 0x01;
+ CurL3Cache->CacheSpeed = 0;
+ CurL3Cache->ErrorCorrectionType = 0x03;
+ } // for
+
+ Status = pRS->SetVariable( SmbiosCpuVar,
+ &EfiSmbiosDynamicDataGuid,
+ Attributes,
+ sizeof(CPU_DYNAMIC_DATA),
+ &CpuInfo );
+ ASSERT_EFI_ERROR(Status);
+
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === End of SAMPLE TEMPLATE CODE for AMD Warthog ===
+ // === platform. Uncomment this block to use. ===
+ // === ===
+ // === Might need changes for other platforms. ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+//----------------------------------------------------------------------------
+*/
+#endif // UPDATE_CPU_TYPE4
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// ***** OPTIONAL *****
+// (if SMBIOS module is part of the project)
+//----------------------------------------------------------------------------
+// Procedure: CreateOnBoardDevDataForSMBios
+//
+// Description: This function gathers the Onboard Device status information and
+// saves them in a variable named "SmbiosOnBoardVar". This variable
+// with the OnBoard Device information is needed by the SMBIOS
+// module to create the "Type 10" structure.
+//
+// Input: None
+//
+// Output: EFI_STATUS
+// Variable named "SmbiosOnBoardVar" with on-board device information
+//
+// Note: Refer to ONBOARD_DEV_DYNAMIC_DATA in SmbiosDynamicData.h for
+// structure information.
+//
+// Set device status to 0 if disabled.
+// Set device status to 0x80 if enabled.
+// Ex: In sample code
+// OnBoardDevInfo.OnBoardDev[0] = 0; // Disabled
+// OnBoardDevInfo.OnBoardDev[0] = 0x80; // Enabled
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+CreateOnBoardDevDataForSMBios (VOID)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+#if UPDATE_ONBOARD_DEV_TYPE10
+/*
+//----------------------------------------------------------------------------
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === Start of SAMPLE TEMPLATE CODE for Intel Weybridge CRB ===
+ // === platform. Uncomment this block to use. ===
+ // === ===
+ // === Might need changes for other platforms. ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+
+ EFI_GUID EfiSmbiosDynamicDataGuid = EFI_SMBIOS_DYNAMIC_DATA_GUID;
+ UINTN VarSize;
+ UINT32 Attributes = EFI_VARIABLE_BOOTSERVICE_ACCESS;
+ ONBOARD_DEV_DYNAMIC_DATA OnBoardDevInfo;
+ UINT64 PciAddress;
+ UINT8 Value8;
+ EFI_GUID gEfiPciRootBridgeIoProtocolGuid = EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *gPciRootBridgeIo;
+
+ Status = pBS->LocateProtocol(
+ &gEfiPciRootBridgeIoProtocolGuid,
+ NULL,
+ &gPciRootBridgeIo);
+ ASSERT_EFI_ERROR(Status);
+
+ // Onboard Video
+ PciAddress = PCI_CFG_ADDRESS (0, 0, 0, MCH_REG_GGC);
+ gPciRootBridgeIo->Pci.Read (
+ gPciRootBridgeIo,
+ EfiPciWidthUint8,
+ PciAddress,
+ 1,
+ &Value8);
+ if (Value8 & BIT01) {
+ OnBoardDevInfo.OnBoardDev[0] = 0; // Disabled
+ }
+ else {
+ OnBoardDevInfo.OnBoardDev[0] = 0x80; // Enabled
+ }
+
+ // Onboard LAN
+ Value8 = *(UINT8*)(SB_RCBA + R_RCBA_BUC);
+ if (Value8 & B_LAN_DISABLE) {
+ OnBoardDevInfo.OnBoardDev[1] = 0; // Disabled
+ }
+ else {
+ OnBoardDevInfo.OnBoardDev[1] = 0x80; // Enabled
+ }
+
+ // Onboard 1394 - Use GPIO49 0/1 = Enabled/Disabled
+ Value8 = IoRead32(GPIO_BASE_ADDRESS + ICH_GPIO_GP_LVL2 + 2);
+ if (Value8 & BIT01) {
+ OnBoardDevInfo.OnBoardDev[2] = 0; // Disabled
+ }
+ else {
+ OnBoardDevInfo.OnBoardDev[2] = 0x80; // Enabled
+ }
+
+ VarSize = sizeof(ONBOARD_DEV_DYNAMIC_DATA);
+ Status = pRS->SetVariable(SmbiosOnBoardVar, &EfiSmbiosDynamicDataGuid,
+ Attributes, VarSize, &OnBoardDevInfo);
+
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === End of SAMPLE TEMPLATE CODE for Intel Weybridge CRB ===
+ // === platform. Uncomment this block to use. ===
+ // === ===
+ // === Might need changes for other platforms. ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+//----------------------------------------------------------------------------
+*/
+#endif // UPDATE_ONBOARD_DEV_TYPE10
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// ***** OPTIONAL *****
+// (if SMBIOS module is part of the project)
+//----------------------------------------------------------------------------
+// Procedure: CreateOnBoardDevExtInfoForSMBios
+//
+// Description: This function gathers the Onboard Device status information
+// and saves them in a variable named "SmbiosOnBoardExtVar".
+// This variable with the OnBoard Device Extended information
+// is needed by the SMBIOS module to create the "Type 41"
+// structure.
+//
+// Input: None
+//
+// Output: EFI_STATUS
+// Variable named "SmbiosOnBoardExtVar" with on-board device
+// information.
+//
+// Note: Refer to ONBOARD_DEV_EXT_DYNAMIC_DATA in SmbiosDynamicData.h for
+// structure information.
+//
+// Set device status to 0 if disabled.
+// Set device status to 0x80 if enabled.
+// Ex: In sample code
+// OnBoardDevInfo.OnBoardDev[0] = 0; // Disabled
+// OnBoardDevInfo.OnBoardDev[0] = 0x80; // Enabled
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+CreateOnBoardDevExtInfoForSMBios (VOID)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+#if UPDATE_DEVICE_EXT_TYPE41
+/*
+//----------------------------------------------------------------------------
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === Start of SAMPLE TEMPLATE CODE for Intel Weybridge CRB ===
+ // === platform. Uncomment this block to use. ===
+ // === ===
+ // === Might need changes for other platforms. ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+
+ EFI_GUID EfiSmbiosDynamicDataGuid = EFI_SMBIOS_DYNAMIC_DATA_GUID;
+ UINTN VarSize;
+ UINT32 Attributes = EFI_VARIABLE_BOOTSERVICE_ACCESS;
+ ONBOARD_DEV_EXT_DYNAMIC_DATA OnBoardDevExtInfo;
+ UINT64 PciAddress;
+ UINT8 Value8;
+ EFI_GUID gEfiPciRootBridgeIoProtocolGuid = EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *gPciRootBridgeIo;
+
+ Status = pBS->LocateProtocol(
+ &gEfiPciRootBridgeIoProtocolGuid,
+ NULL,
+ &gPciRootBridgeIo);
+ ASSERT_EFI_ERROR(Status);
+
+ // Onboard Video
+ PciAddress = PCI_CFG_ADDRESS (0, 0, 0, MCH_REG_GGC);
+ gPciRootBridgeIo->Pci.Read (
+ gPciRootBridgeIo,
+ EfiPciWidthUint8,
+ PciAddress,
+ 1,
+ &Value8);
+ if (Value8 & BIT01) {
+ OnBoardDevExtInfo.OnBoardDev[0] = 0; // Disabled
+ }
+ else {
+ OnBoardDevExtInfo.OnBoardDev[0] = 0x80; // Enabled
+ }
+
+ OnBoardDevExtInfo.BusNumber[0] = 0;
+
+ // Onboard LAN
+ Value8 = *(UINT8*)(SB_RCBA + R_RCBA_BUC);
+ if (Value8 & B_LAN_DISABLE) {
+ OnBoardDevExtInfo.OnBoardDev[1] = 0; // Disabled
+ }
+ else {
+ OnBoardDevExtInfo.OnBoardDev[1] = 0x80; // Enabled
+ }
+
+ OnBoardDevExtInfo.BusNumber[1] = 0;
+
+ // Onboard 1394 - Use GPIO49 0/1 = Enabled/Disabled
+ Value8 = IoRead32(GPIO_BASE_ADDRESS + ICH_GPIO_GP_LVL2 + 2);
+ if (Value8 & BIT01) {
+ OnBoardDevExtInfo.OnBoardDev[2] = 0; // Disabled
+ }
+ else {
+ OnBoardDevExtInfo.OnBoardDev[2] = 0x80; // Enabled
+ }
+
+ PciAddress = PCI_CFG_ADDRESS (0, 0x1C, 2, 0x19);
+ gPciRootBridgeIo->Pci.Read (
+ gPciRootBridgeIo,
+ EfiPciWidthUint8,
+ PciAddress,
+ 1,
+ &Value8);
+
+ OnBoardDevExtInfo.BusNumber[2] = Value8;
+
+ VarSize = sizeof(ONBOARD_DEV_EXT_DYNAMIC_DATA);
+ Status = pRS->SetVariable(SmbiosOnBoardExtVar, &EfiSmbiosDynamicDataGuid,
+ Attributes, VarSize, &OnBoardDevExtInfo);
+
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === End of SAMPLE TEMPLATE CODE for Intel Weybridge CRB ===
+ // === platform. Uncomment this block to use. ===
+ // === ===
+ // === Might need changes for other platforms. ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+//----------------------------------------------------------------------------
+*/
+#endif // UPDATE_DEVICE_EXT_TYPE41
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// ***** PORTING REQUIRED *****
+// (if SMBIOS module is part of the project)
+//----------------------------------------------------------------------------
+// Procedure: CreateBatteryDataForSMBios
+//
+// Description: This function provides system battery information. SMBIOS
+// Core uses these information to dynamically update SMBIOS
+// Portable Battery Data structure Type 22.
+//
+// Input: None
+//
+// Output: EFI_STATUS
+// Variable named "SmbiosBatteryVar" with Battery information
+//
+// Note: Refer to BATTERY_DYNAMIC_DATA in SmbiosDynamicData.h for
+// structure information.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+CreateBatteryDataForSMBios (VOID)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+#if UPDATE_BATTERY_TYPE22
+/*
+//----------------------------------------------------------------------------
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === Start of dummy code ===
+ // === ===
+ // === PORTING IS NEEDED FOR INDIVIDUAL PLATFORM !!! ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+
+ EFI_GUID EfiSmbiosDynamicDataGuid = EFI_SMBIOS_DYNAMIC_DATA_GUID;
+ BATTERY_DYNAMIC_DATA BatteryInfo;
+ UINTN VarSize;
+ UINT32 Attributes = EFI_VARIABLE_BOOTSERVICE_ACCESS;
+ UINT8 DeviceName1[] = "BATT 1";
+ UINT8 DeviceName2[] = "Another Battery Name";
+ UINT8 SbdsVersion1[] = "01.12.912";
+ UINT8 SbdsVersion2[] = "00.01";
+
+ BatteryInfo.BatteryDynamicData[0].DesignCapacity = 1;
+ BatteryInfo.BatteryDynamicData[0].DesignVoltage = 5000;
+ BatteryInfo.BatteryDynamicData[0].SbdsSerialNumber = 0x1111;
+ BatteryInfo.BatteryDynamicData[0].SbdsManufacturedDate = 0x2841;
+ BatteryInfo.BatteryDynamicData[0].DesignCapacityMult = 1000;
+ // When copying strings, MAKE SURE THE ZERO TERMINATOR
+ // for the string is included
+ MemCpy (BatteryInfo.BatteryDynamicData[0].DeviceName, DeviceName1, sizeof(DeviceName1));
+ MemCpy (BatteryInfo.BatteryDynamicData[0].SbdsVersion, SbdsVersion1, sizeof(SbdsVersion1));
+ BatteryInfo.BatteryDynamicData[0].Valid = TRUE;
+
+ BatteryInfo.BatteryDynamicData[1].DesignCapacity = 1;
+ BatteryInfo.BatteryDynamicData[1].DesignVoltage = 9000;
+ BatteryInfo.BatteryDynamicData[1].SbdsSerialNumber = 0x4444;
+ BatteryInfo.BatteryDynamicData[1].SbdsManufacturedDate = 0x1814;
+ BatteryInfo.BatteryDynamicData[1].DesignCapacityMult = 500;
+ // When copying strings, MAKE SURE THE ZERO TERMINATOR
+ // for the string is included
+ MemCpy (BatteryInfo.BatteryDynamicData[1].DeviceName, DeviceName2, sizeof(DeviceName2));
+ MemCpy (BatteryInfo.BatteryDynamicData[1].SbdsVersion, SbdsVersion2, sizeof(SbdsVersion2));
+ BatteryInfo.BatteryDynamicData[1].Valid = FALSE;
+
+ BatteryInfo.BatteryDynamicData[2].DesignCapacity = 1;
+ BatteryInfo.BatteryDynamicData[2].DesignVoltage = 3000;
+ BatteryInfo.BatteryDynamicData[2].SbdsSerialNumber = 0x7777;
+ BatteryInfo.BatteryDynamicData[2].SbdsManufacturedDate = 0x0814;
+ BatteryInfo.BatteryDynamicData[2].DesignCapacityMult = 200;
+ // When copying strings, MAKE SURE THE ZERO TERMINATOR
+ // for the string is included
+ MemCpy (BatteryInfo.BatteryDynamicData[2].DeviceName, DeviceName2, sizeof(DeviceName2));
+ MemCpy (BatteryInfo.BatteryDynamicData[2].SbdsVersion, SbdsVersion2, sizeof(SbdsVersion2));
+ BatteryInfo.BatteryDynamicData[2].Valid = FALSE;
+
+ BatteryInfo.BatteryDynamicData[3].DesignCapacity = 1;
+ BatteryInfo.BatteryDynamicData[3].DesignVoltage = 1000;
+ BatteryInfo.BatteryDynamicData[3].SbdsSerialNumber = 0x9999;
+ BatteryInfo.BatteryDynamicData[3].SbdsManufacturedDate = 0x5814;
+ BatteryInfo.BatteryDynamicData[3].DesignCapacityMult = 700;
+ // When copying strings, MAKE SURE THE ZERO TERMINATOR
+ // for the string is included
+ MemCpy (BatteryInfo.BatteryDynamicData[3].DeviceName, DeviceName2, sizeof(DeviceName2));
+ MemCpy (BatteryInfo.BatteryDynamicData[3].SbdsVersion, SbdsVersion2, sizeof(SbdsVersion2));
+ BatteryInfo.BatteryDynamicData[3].Valid = TRUE;
+
+ VarSize = sizeof(BATTERY_DYNAMIC_DATA);
+ Status = pRS->SetVariable(SmbiosBatteryVar,
+ &EfiSmbiosDynamicDataGuid,
+ Attributes,
+ VarSize,
+ &BatteryInfo);
+
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+ // === ===
+ // === End of dummy code ===
+ // === ===
+ // ==================================================================
+ // ==================================================================
+ // ==================================================================
+//----------------------------------------------------------------------------
+*/
+#endif // UPDATE_BATTERY_TYPE22
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SMIBiosBoardDriverEntryPoint
+//
+// Description: SMBIOS Board driver entry point
+//
+// Input: IN EFI_HANDLE ImageHandle,
+// IN EFI_SYSTEM_TABLE *SystemTable
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+SMIBiosBoardDriverEntryPoint(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+
+ InitAmiLib(ImageHandle, SystemTable);
+
+ Status = pBS->InstallProtocolInterface(&ImageHandle,
+ &gEfiSmbiosBoardProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &SmbiosBoardProtocol);
+ return Status;
+}
+
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
diff --git a/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEdit32.obj b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEdit32.obj
new file mode 100644
index 0000000..227a2cb
--- /dev/null
+++ b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEdit32.obj
Binary files differ
diff --git a/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEdit64.obj b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEdit64.obj
new file mode 100644
index 0000000..dc15171
--- /dev/null
+++ b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEdit64.obj
Binary files differ
diff --git a/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.c b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.c
new file mode 100644
index 0000000..0aff388
--- /dev/null
+++ b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.c
@@ -0,0 +1,204 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/BIN/Modules/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.c 8 4/06/10 3:26p Davidd $
+//
+// $Revision: 8 $
+//
+// $Date: 4/06/10 3:26p $
+//*****************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Modules/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.c $
+//
+// 8 4/06/10 3:26p Davidd
+// Added code to enable shadow ram write by calling the newly added
+// generic OemRuntimeShadowRamWrite function from CSP Lib.
+//
+// 7 6/02/09 4:51p Davidd
+// Updated AMI headers (EIP 22180)
+//
+// 6 10/27/08 1:04p Davidd
+//
+// 5 9/26/08 11:02a Davidd
+// Provided sample code to enable / disable E000 and F000 shadow for Intel
+// chipset.
+//
+// 4 11/19/07 11:47a Robert
+//
+// 3 12/15/06 5:37p Davidd
+// Code cleanup and reformatted to coding standard.
+//
+// 2 11/02/06 10:09a Fasihm
+// Updated the code from Assembly to C, so as to compile and build in the
+// x64 BIOS build environment.
+//
+// 1 5/24/06 11:59a Fasihm
+// Initial check-in for the Santa Rosa Project. (Matanzas CRB) with
+// Crestline + ICH8M + Merom Processor.
+//
+// 1 8/16/05 11:04a Mirk
+//
+// 1 8/10/05 11:31a Davidd
+// Initial checkin. To be used with SMBIOS Core ALPHA_01.04.
+//
+// 1 8/10/05 11:18a Davidd
+// New SmbiosDMIEditBoard component.
+//
+//*****************************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: SmbiosDMIEditBoard.C
+//
+// Description: This file contains code for OEM related code for DMIEdit
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+//----------------------------------------------------------------------------
+// Includes
+
+#include <Token.h>
+#include <EFI.h>
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+
+extern
+VOID OemRuntimeShadowRamWrite(
+ IN BOOLEAN Enable
+);
+
+// //
+// // Sample code for Weybridge CRB. Needs to be changed for other platforms.
+// //
+//UINT8 Reg90Byte; // 0F000 PAM Reg
+//#if ((defined(ITK_SUPPORT) && (ITK_SUPPORT != 0)) || SMBIOS_TABLE_LOCATION)
+//UINT8 Reg95Byte; // 0E000-0E400 PAM Reg
+//UINT8 Reg96Byte; // 0E8000-0EC00 PAM Reg
+//#endif
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// ***** PORTING REQUIRED *****
+// (if SMBIOS module is part of the project)
+//----------------------------------------------------------------------------
+// Procedure: EnableShadowWrite
+//
+// Description: This function enables write to F000 shadow,
+// and E000 shadow if ITK_SUPPORT token
+// or SMBIOS_TABLE_LOCATION token is set.
+//
+// Input: None
+//
+// Output: None
+//
+// Note:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+EnableShadowWrite (VOID)
+{
+ OemRuntimeShadowRamWrite(TRUE); // Call this generic function
+ // if CSP Library in project is
+ // 4.6.4.0_CSPLibrary_013 or later
+
+// //
+// //
+// // Sample code for Weybridge CRB. Needs to be changed for other platforms.
+// //
+
+// UINT8 bValue;
+
+// // 0F000 shadow
+// IoWrite32(0x0CF8, 0x80000090);
+// Reg90Byte = bValue = IoRead8(0x0CFC);
+// bValue |= 0x30;
+// IoWrite8(0x0CFC, bValue);
+
+//#if ((defined(ITK_SUPPORT) && (ITK_SUPPORT != 0)) || SMBIOS_TABLE_LOCATION)
+// // 0E000-0E400 shadow
+// IoWrite32(0x0CF8, 0x80000095);
+// Reg95Byte = bValue = IoRead8(0x0CFD);
+// bValue |= 0x33;
+// IoWrite8(0x0CFD, bValue);
+
+// // 0E800-0EC00 shadow
+// IoWrite32(0x0CF8, 0x80000096);
+// Reg96Byte = bValue = IoRead8(0x0CFE);
+// bValue |= 0x33;
+// IoWrite8(0x0CFE, bValue);
+//#endif
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// ***** PORTING REQUIRED *****
+// (if SMBIOS module is part of the project)
+//----------------------------------------------------------------------------
+// Procedure: DisableShadowWrite
+//
+// Description: This function makes F000 shadow read only,
+// and E000 shadow read only if ITK_SUPPORT token
+// or SMBIOS_TABLE_LOCATION token is set.
+//
+// Input: None
+//
+// Output: None
+//
+// Note:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+DisableShadowWrite (VOID)
+{
+ OemRuntimeShadowRamWrite(FALSE); // Call this generic function
+ // if CSP Library in project is
+ // 4.6.4.0_CSPLibrary_013 or later
+
+// //
+// // Sample code for Weybridge CRB. Needs to be changed for other platforms.
+// //
+
+// // 0F000 shadow
+// IoWrite32(0x0CF8, 0x80000090);
+// IoWrite8(0x0CFC, Reg90Byte);
+
+//#if ((defined(ITK_SUPPORT) && (ITK_SUPPORT != 0)) || SMBIOS_TABLE_LOCATION)
+// // 0E000-0E400 shadow
+// IoWrite32(0x0CF8, 0x80000095);
+// IoWrite8(0x0CFD, Reg95Byte);
+
+// // 0E800-0EC00 shadow
+// IoWrite32(0x0CF8, 0x80000096);
+// IoWrite8(0x0CFE, Reg96Byte);
+//#endif
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.c32 b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.c32
new file mode 100644
index 0000000..e3dbcef
--- /dev/null
+++ b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.c32
@@ -0,0 +1,13 @@
+<component>
+ name = "SmbiosDMIEditBoard"
+ category = ModulePart
+ LocalRoot = "Board\EM\SMBIOS\SmbiosDMIEdit"
+ RefName = "SmbiosDMIEditBoard"
+[files]
+"SmbiosDMIEditBoard.sdl"
+"SmbiosDMIEditBoard.mak"
+"SmbiosDMIEditBoard.dxs"
+"SmbiosDMIEditBoard.c"
+"SmbiosDMIEdit32.obj"
+"SmbiosDMIEditFunc32.obj"
+<endComponent>
diff --git a/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.c64 b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.c64
new file mode 100644
index 0000000..245ea5f
--- /dev/null
+++ b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.c64
@@ -0,0 +1,13 @@
+<component>
+ name = "SmbiosDMIEditBoard"
+ category = ModulePart
+ LocalRoot = "Board\EM\SMBIOS\SmbiosDMIEdit"
+ RefName = "SmbiosDMIEditBoard"
+[files]
+"SmbiosDMIEditBoard.sdl"
+"SmbiosDMIEditBoard.mak"
+"SmbiosDMIEditBoard.dxs"
+"SmbiosDMIEditBoard.c"
+"SmbiosDMIEdit64.obj"
+"SmbiosDMIEditFunc64.obj"
+<endComponent>
diff --git a/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.cif b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.cif
new file mode 100644
index 0000000..9d44520
--- /dev/null
+++ b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.cif
@@ -0,0 +1,17 @@
+<component>
+ name = "SmbiosDMIEditBoard"
+ category = ModulePart
+ LocalRoot = "Board\EM\SMBIOS\SmbiosDMIEdit"
+ RefName = "SmbiosDMIEditBoard"
+[files]
+"SmbiosDMIEditBoard.sdl"
+"SmbiosDMIEditBoard.mak"
+"SmbiosDMIEditBoard.dxs"
+"SmbiosDMIEditBoard.c"
+"SmbiosDMIEdit32.obj"
+"SmbiosDMIEdit64.obj"
+"SmbiosDMIEditFunc32.obj"
+"SmbiosDMIEditFunc64.obj"
+"SmbiosDMIEditBoard.c32"
+"SmbiosDMIEditBoard.c64"
+<endComponent>
diff --git a/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.dxs b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.dxs
new file mode 100644
index 0000000..4c0b432
--- /dev/null
+++ b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.dxs
@@ -0,0 +1,82 @@
+//**********************************************************************//
+//**********************************************************************//
+//** **//
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **//
+//** **//
+//** All Rights Reserved. **//
+//** **//
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **//
+//** **//
+//** Phone: (770)-246-8600 **//
+//** **//
+//**********************************************************************//
+//**********************************************************************//
+//**********************************************************************//
+// $Header: /Alaska/BIN/Modules/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.dxs 4 6/28/12 8:14p Davidd $
+//
+// $Revision: 4 $
+//
+// $Date: 6/28/12 8:14p $
+//**********************************************************************//
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Modules/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.dxs $
+//
+// 4 6/28/12 8:14p Davidd
+// Select SMM_BASE_PROTOCOL_GUID depending on PI_SPECIFICATION_VERSION
+//
+// 3 6/02/09 4:50p Davidd
+// Updated AMI headers (EIP 22180)
+//
+// 2 3/29/07 5:27p Davidd
+// Changed the year in the AMI banner and adjust indentation to coding
+// standard.
+//
+// 1 8/10/05 11:31a Davidd
+// Initial checkin. To be used with SMBIOS Core ALPHA_01.04.
+//
+// 1 8/10/05 11:18a Davidd
+// New SmbiosDMIEditBoard component.
+//
+//**********************************************************************//
+
+#include <token.h>
+
+#include <Protocol\SmbiosGetFlashDataProtocol.h>
+#if PI_SPECIFICATION_VERSION < 0x0001000A
+#include <Protocol\SmmBase.h>
+#else
+#include <Protocol\SmmBase2.h>
+#endif
+#include <Protocol\LoadedImage.h>
+#include <Protocol\DevicePath.h>
+#include <Protocol\SmmSwDispatch.h>
+#include <Protocol\SmiFlash.h>
+
+DEPENDENCY_START
+#if !defined(SMBIOS_DMIEDIT_DATA_LOC) || SMBIOS_DMIEDIT_DATA_LOC != 2
+ EFI_SMBIOS_FLASH_DATA_PROTOCOL_GUID AND
+ EFI_SMI_FLASH_GUID AND
+#endif
+#if PI_SPECIFICATION_VERSION < 0x0001000A
+ EFI_SMM_BASE_PROTOCOL_GUID AND
+#else
+ EFI_SMM_BASE2_PROTOCOL_GUID AND
+#endif
+ EFI_SMM_SW_DISPATCH_PROTOCOL_GUID AND
+ EFI_SMBIOS_PROTOCOL_GUID
+DEPENDENCY_END
+
+//**********************************************************************//
+//**********************************************************************//
+//** **//
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **//
+//** **//
+//** All Rights Reserved. **//
+//** **//
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **//
+//** **//
+//** Phone: (770)-246-8600 **//
+//** **//
+//**********************************************************************//
+//**********************************************************************//
diff --git a/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.mak b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.mak
new file mode 100644
index 0000000..0ef990f
--- /dev/null
+++ b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.mak
@@ -0,0 +1,98 @@
+#************************************************************************
+#************************************************************************
+#** **
+#** (C)Copyright 1985-2009, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#************************************************************************
+#************************************************************************
+
+#************************************************************************
+# $Header: /Alaska/BIN/Modules/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.mak 7 4/08/16 12:59p Davidd $
+#
+# $Revision: 7 $
+#
+# $Date: 4/08/16 12:59p $
+#************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/BIN/Modules/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.mak $
+#
+# 7 4/08/16 12:59p Davidd
+# [TAG] EIP231162
+# [Category] New Feature
+# [Description] Merge Aptio V Smbios -09 changes for Aptio 4
+# 4.6.5.5_SMBIOS_40 release
+# [Files] SmbiosGetFlashData32.ffs
+# SmbiosGetFlashData64.ffs
+# Smbios32.ffs
+# Smbios64.ffs
+# SmbiosDmiEditBoard.mak
+# SmbiosDmiEdit32.obj
+# SmbiosDmiEdit64.obj
+# SmbiosDmiEditFunc32.obj
+# SmbiosDmiEditFunc64.obj
+#
+# 6 4/20/10 12:53p Davidd
+#
+# 5 6/02/09 4:49p Davidd
+# Updated AMI headers (EIP 22180)
+#
+# 4 12/30/08 3:17p Davidd
+# Changes added for x32 and x64 binary support.
+#
+# 3 3/29/07 5:18p Davidd
+# Changed the year in the AMI banner.
+#
+# 2 12/02/05 11:47a Felixp
+#
+# 1 8/10/05 11:31a Davidd
+# Initial checkin. To be used with SMBIOS Core ALPHA_01.04.
+#
+# 1 8/10/05 11:18a Davidd
+# New SmbiosDMIEditBoard component.
+#
+#************************************************************************
+
+!IF !DEFINED(SMBIOS_CORE_SRC_SUPPORT) || "$(SMBIOS_CORE_SRC_SUPPORT)" == "0"
+
+all : SMBIOS_DMIEDIT_BOARD_SUPPORT
+
+SMBIOS_DMIEDIT_BOARD_SUPPORT : $(BUILD_DIR)\SmbiosDMIEditBoard.mak SmbiosDMIEditBoardBin
+
+!IF "$(x64_BUILD)"=="1"
+$(BUILD_DIR)\SmbiosDMIEditBoard.mak : $(SMBIOS_DMIEDIT_BOARD_DIR)\$(@B).cif $(SMBIOS_DMIEDIT_BOARD_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(SMBIOS_DMIEDIT_BOARD_DIR)\$(@B).c64 $(CIF2MAK_DEFAULTS)
+!ELSE
+$(BUILD_DIR)\SmbiosDMIEditBoard.mak : $(SMBIOS_DMIEDIT_BOARD_DIR)\$(@B).cif $(SMBIOS_DMIEDIT_BOARD_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(SMBIOS_DMIEDIT_BOARD_DIR)\$(@B).c32 $(CIF2MAK_DEFAULTS)
+!ENDIF
+
+SmbiosDMIEditBoardBin : $(AMIDXELIB) $(AMICSPLib) $(BUILD_DIR)\AmiBufferValidationLib.lib
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\SmbiosDMIEditBoard.mak all\
+ GUID=AF382531-52E6-4cc4-B247-DB8E320CBBA3 \
+ ENTRY_POINT=SmbiosDmiEditSupportInstall \
+ TYPE=BS_DRIVER \
+ COMPRESS=1\
+
+!ENDIF
+
+#************************************************************************
+#************************************************************************
+#** **
+#** (C)Copyright 1985-2009, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#************************************************************************
+#************************************************************************
diff --git a/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.sdl b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.sdl
new file mode 100644
index 0000000..4a04839
--- /dev/null
+++ b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditBoard.sdl
@@ -0,0 +1,50 @@
+TOKEN
+ Name = "SmbiosDMIEditBoard_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable AMI DMIEdit Board for SMBIOS support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Lock = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "SMBIOS_CORE_SRC_STATUS"
+ Value = "0"
+ Help = "Smbios Core Source is disabled"
+ TokenType = Boolean
+End
+
+TOKEN
+ Name = "SMBIOS_CORE_SRC_STATUS"
+ Value = "1"
+ Help = "Smbios Core Source is enabled"
+ TokenType = Boolean
+ Token = "SMBIOS_CORE_SRC_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "PROCESSOR_DMIEDIT_SUPPORT"
+ Value = "1"
+ Help = "ON -> Type 4 Serial Number, Asset Tag, Part Number update via DmiEdit is supported\OFF -> Type 4 Serial Number, Asset Tag, Part Number update via DmiEdit is not supported"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+PATH
+ Name = "SMBIOS_DMIEDIT_BOARD_DIR"
+End
+
+MODULE
+ Help = "Includes SmbiosDMIEditBoard.mak to Project"
+ File = "SmbiosDMIEditBoard.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\SmbiosDMIEditBoard.ffs"
+ Parent = "FV_MAIN"
+ Token = "SMBIOS_CORE_SRC_STATUS" "=" "0"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditFunc32.obj b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditFunc32.obj
new file mode 100644
index 0000000..19328cb
--- /dev/null
+++ b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditFunc32.obj
Binary files differ
diff --git a/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditFunc64.obj b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditFunc64.obj
new file mode 100644
index 0000000..e1890de
--- /dev/null
+++ b/Board/EM/SMBIOS/SmbiosDMIEdit/SmbiosDMIEditFunc64.obj
Binary files differ
diff --git a/Board/EM/SMBIOS/SmbiosGetFlashData32.ffs b/Board/EM/SMBIOS/SmbiosGetFlashData32.ffs
new file mode 100644
index 0000000..876f3f5
--- /dev/null
+++ b/Board/EM/SMBIOS/SmbiosGetFlashData32.ffs
Binary files differ
diff --git a/Board/EM/SMBIOS/SmbiosGetFlashData64.ffs b/Board/EM/SMBIOS/SmbiosGetFlashData64.ffs
new file mode 100644
index 0000000..83517b1
--- /dev/null
+++ b/Board/EM/SMBIOS/SmbiosGetFlashData64.ffs
Binary files differ
diff --git a/Board/EM/SMBIOS/Smbrun.asm b/Board/EM/SMBIOS/Smbrun.asm
new file mode 100644
index 0000000..17ec967
--- /dev/null
+++ b/Board/EM/SMBIOS/Smbrun.asm
@@ -0,0 +1,890 @@
+ TITLE SMBRUN.ASM -- SMBIOS RUNTIME PnP FUNCTIONS 5Xh
+
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2009, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
+
+;****************************************************************************
+; $Header: /Alaska/BIN/Modules/SMBIOS/Smbrun.asm 6 6/02/09 3:49p Davidd $
+;
+; $Revision: 6 $
+;
+; $Date: 6/02/09 3:49p $
+;
+;****************************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/BIN/Modules/SMBIOS/Smbrun.asm $
+;
+; 6 6/02/09 3:49p Davidd
+; Updated AMI headers and code clean up (EIP 22180)
+;
+; 5 5/19/09 10:53a Davidd
+; Changes done for PnP 54 function support (EIP 19358).
+;
+; 4 1/22/08 4:17p Olegi
+; Modifications for 16-bit PM calls.
+;
+; 2 12/31/07 12:53p Olegi
+; Modifications for 16-bit protected mode interface.
+;
+; 1 12/26/07 5:08p Olegi
+; File moved from Board to Core component.
+;
+; 3 9/06/07 4:23p Vyacheslava
+; Added support for GPNV PnP functions: 55h, 56h, 57h
+; The main procedures are in SMIGPNV module
+;
+; 1 9/06/07 3:31p Vyacheslava
+; Added support for PnP functions: 55h, 56h, 57h
+;
+; 2 8/09/07 4:10p Olegi
+; Support for functions 53 and 54.
+;
+; 1 8/03/07 4:50p Olegi
+; SMBIOS PnP 16-bit functions - initial check-in; functions 50h, 51h and
+; 52h are implemented.
+;
+;****************************************************************************
+
+.586p
+
+;<AMI_FHDR_START>
+;---------------------------------------------------------------------------
+;
+; Name: Smbrun.asm
+;
+; Description: SMBIOS runtime PnP functions 5Xh
+;
+;---------------------------------------------------------------------------
+;<AMI_FHDR_END>
+
+INCLUDE Token.equ
+
+OEM16_CSEG SEGMENT PARA PUBLIC 'CODE' USE16
+ ASSUME cs:OEM16_CSEG, ds:OEM16_CSEG
+
+;------------------------------------------------------------------------------
+; Run Time Function Return Codes (from Core8's RT.EQU)
+;------------------------------------------------------------------------------
+RT_NO_ERROR equ 00h
+RT_INVALID_FUNC equ 81h
+RT_NVR_READ_ERROR equ 82h
+RT_CMOS_READ_ERROR equ 82h
+RT_PCI_BAD_VENDOR_ID equ 83h
+RT_PCI_DEV_NOT_FOUND equ 86h
+RT_PCI_BAD_REG_ADD equ 87h
+RT_PCI_SET_FAILED equ 88h
+RT_PCI_BUF_TOO_SMALL equ 89h
+
+RT_PNP_UNSUPPORTED equ 82h
+RT_PNP_INVALID_NODE equ 83h
+RT_PNP_BAD_PARAMETER equ 84h
+RT_PNP_SET_FAILED equ 85h
+RT_PNP_USE_ESCD equ 8Dh
+
+RT_ESCD_READ_ERROR equ 55h
+RT_ESCD_INVALID equ 56h
+
+RT_DMI_SUCCESS equ 00h
+RT_DMI_UNKNOWN_FUNCTION equ 81h
+RT_DMI_FUNCTION_NOT_SUPPORTED equ 82h
+RT_DMI_INVALID_HANDLE equ 83h
+RT_DMI_BAD_PARAMETER equ 84h
+RT_DMI_INVALID_SUBFUNCTION equ 85h
+RT_DMI_NO_CHANGE equ 86h
+ RT_DMI_NO_EVENTS_PENDING equ 86h
+RT_DMI_ADD_STRUCTURE_FAILED equ 87h
+ ; 88h-8Ch..not defined
+RT_DMI_READ_ONLY equ 8Dh
+ ; 8Eh-8Fh..not defined
+RT_DMI_LOCK_NOT_SUPPORTED equ 90h
+RT_DMI_CURENTLY_LOCKED equ 91h
+RT_DMI_INVALID_LOCK equ 92h
+
+SMBIOS_PNP_FUNC50_DMIEDIT_STRUC struc
+ dataIgnoredByDmiFn50 DB 24 DUP (?)
+ dDmiBiosRevision DD ? ; BYTE
+ dDmiNumStructures DD ? ; WORD
+ dDmiStructureSize DD ? ; WORD
+ dDmiStorageBase DD ? ; DWORD
+ dDmiStorageSize DD ? ; WORD
+SMBIOS_PNP_FUNC50_DMIEDIT_STRUC ends
+
+SMBIOS_PNP_FUNC51_DMIEDIT_STRUC struc
+ wFunction DW ? ; 51h
+ dStructure DD ? ; UINT16*
+ dDmiStructureBuffer DD ? ; UINT32*
+ wDmiSelector DW ?
+ dBiosSelector DW ?
+SMBIOS_PNP_FUNC51_DMIEDIT_STRUC ends
+
+DMIHDR_STRUC STRUCT
+ bType BYTE ?
+ bLength BYTE ?
+ wHandle WORD ?
+DMIHDR_STRUC ENDS
+
+;----------------------------------------------------------------------------
+; STRUCTURE OF DATA BUFFER IN SMBIOS FUNCTION 53H
+;----------------------------------------------------------------------------
+SMBIOSFun53BufferSTRUC STRUC
+ bChangeStatus BYTE ?
+ bChangeType BYTE ?
+ wChangeHandle WORD ?
+ bChangeReserved BYTE 12 DUP (?)
+SMBIOSFun53BufferSTRUC ENDS
+
+;----------------------------------------------------------------------------
+; EQUATES USED IN SMBIOS FUNCTION 53H
+;----------------------------------------------------------------------------
+; equates used in SMBIOS Change Status
+SMBIOS_NO_CHANGE EQU 00h ; 00h..SMBIOS No Change
+SMBIOS_OTHER_CHANGE EQU 01h ; 01h..SMBIOS Other Change
+SMBIOS_UNKNOWN_CHANGE EQU 02h ; 02h..SMBIOS Unknown Change
+SMBIOS_SINGLE_STRUCTURE_AFFECTED EQU 03h ; 03h..SMBIOS Single Structure Affected
+SMBIOS_MULTIPLE_STRUCTURE_AFFECTED EQU 04h ; 04h..SMBIOS Multiple Structure Affected
+
+; equates used in SMBIOS Change Type
+SMBIOS_ONE_MORE_STRUCTURE_CHANGED EQU 00000001b ; Bit-0 = 1, One/More Structure was changed
+SMBIOS_ONE_MORE_STRUCTURE_ADDED EQU 00000010b ; Bit-1 = 1, One/More Structure was added
+ ; Bit7-2.....Reserved
+
+;<AMI_FHDR_START>
+;---------------------------------------------------------------------------
+;
+; Name: SmbiosPnpFunctions
+;
+; Description: SMBIOS PnP functions 50..57
+;
+; Output: None
+;
+;---------------------------------------------------------------------------
+;<AMI_FHDR_END>
+
+SmbiosPnpFunctions PROC FAR PUBLIC
+ pushf
+ push fs
+ push bx
+ push dx
+ push si
+ push bp
+
+ call $+3 ; Push curent IP
+ pop si ; Get current IP in SI
+ sub si, $
+ inc si
+
+ mov bx, 0FF4Ch
+ mov bx, cs:[bx] ; OFFSET RUN_CSEG:Legacy16Data
+ mov bx, cs:[bx+8] ; OFFSET RUN_CSEG:smiflash_table
+ mov dx, WORD PTR cs:[bx+12] ; SMI port IO address
+
+ mov bx, [ebp+00h] ; get the function number
+ sub bx, 50h
+ mov ax, RT_INVALID_FUNC ; Return code for unknown func
+
+;-IF NOT MKF_SMBIOS_DATA_STRUCTURES_BELOW_TOM
+ cmp bx, (smbios_func_table_end - smbios_func_table_start) / 2
+ jae SHORT srfe_00 ; invalid function
+
+ add si, OFFSET cs:smbios_func_table_start
+ shl bx, 1
+ add si, bx
+ call si ; Call proper PnP function
+
+srfe_00:
+ pop bp
+ pop si
+ pop dx
+ pop bx
+ pop fs
+ popf
+
+rt_pnp_exit:
+ pop bx
+ popf
+ pop ebp
+ ret
+
+SmbiosPnpFunctions ENDP
+
+;----------------------------------------------------------------------------
+; SMBIOS_FUNC_TABLE (SHORT is the key word needed to assure 2 bytes per jmp)
+;----------------------------------------------------------------------------
+smbios_func_table_start LABEL BYTE
+ jmp SHORT func_50
+ jmp SHORT func_51
+ jmp SHORT func_52
+ jmp SHORT func_53
+ jmp SHORT func_54
+ jmp SHORT func_55
+ jmp SHORT func_56
+ jmp SHORT func_57
+smbios_func_table_end LABEL BYTE
+
+func_50: jmp rt_get_smbios_info
+func_51: jmp rt_get_smbios_struc
+func_52: jmp rt_set_smbios_struc
+func_53: jmp rt_get_smbios_struc_change_info
+func_54: jmp rt_smbios_control
+func_55: jmp rt_smbios_get_gpnv
+func_56: jmp rt_smbios_read_gpnv
+func_57: jmp rt_smbios_write_gpnv
+
+;<AMI_FHDR_START>
+;---------------------------------------------------------------------------
+;
+; Name: rt_generate_sw_smi
+;
+; Description: Generate SW SMI
+;
+; Input: AL = PnP function number
+; DX = SMI Port
+;
+; Output: None
+;
+;---------------------------------------------------------------------------
+;<AMI_FHDR_END>
+rt_generate_sw_smi PROC NEAR
+ out dx, al
+ movzx bx, al
+ ret
+rt_generate_sw_smi ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: SMBIOS_Func_50h
+; Procedure: RT_GET_SMBIOS_INFO
+;
+; Description: This function returns information about the SMBIOS extensions
+; such as the number of structures present and the size of the
+; largest one. This function is presently called only during RUNTIME.
+;
+; Input: [EBP+00] = Function number (50h)
+; [EBP+02] = BYTE FAR *DmiBiosVersion
+; [EBP+06] = WORD FAR *NumStructures
+; [EBP+0A] = WORD FAR *StructureSize
+; [EBP+0E] = DWORD FAR *DMIStorageBase
+; [EBP+12] = WORD FAR *DMIStorageSize
+; [EBP+16] = WORD BiosSelector
+; DX = SMI IO port address
+;
+; Output: AX = Zero if successful
+; non-zero return code if non successful
+; [EBP+02] = BYTE FAR *DmiBiosVersion filled in with the version
+; of the DMI BIOS spec that this code supports.
+; [EBP+06] = WORD FAR *NumStructures filled with total number of
+; DMI structures that are present in the system.
+; [EBP+0A] = WORD FAR *StructureSize filled with the size in
+; bytes of the largest DMI structure.
+; [EBP+0E] = DWORD FAR *DMIStorageBase filled with the absolute
+; 32Bit address of any memory-mapped structure
+; [EBP+12] = WORD FAR *DMIStorageSize filled with the buffer
+; size needed in Func 52h/54h.
+;
+; Modified: Nothing
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+rt_get_smbios_info PROC NEAR
+
+ push ebx
+ push eax
+ push si
+ push edi
+ push ds
+
+ ; EBX = SS<<4+SP-sizeof(SMBIOS_PNP_FUNC50_DMIEDIT_STRUC)
+ mov ebx, 0
+ mov bx, ss
+ shl ebx, 4
+ movzx edi, sp
+ sub di, size SMBIOS_PNP_FUNC50_DMIEDIT_STRUC
+ add ebx, edi
+
+ mov sp, di
+
+ mov al, 50h
+ call rt_generate_sw_smi
+
+ lds si, DWORD PTR [ebp+02h]
+ mov eax, ss:(SMBIOS_PNP_FUNC50_DMIEDIT_STRUC PTR [di]).dDmiBiosRevision
+ mov BYTE PTR [si], al
+
+ lds si, DWORD PTR [ebp+06h]
+ mov eax, ss:(SMBIOS_PNP_FUNC50_DMIEDIT_STRUC PTR [di]).dDmiNumStructures
+ mov WORD PTR [si], ax
+
+ lds si, DWORD PTR [ebp+0Ah]
+ mov eax, ss:(SMBIOS_PNP_FUNC50_DMIEDIT_STRUC PTR [di]).dDmiStructureSize
+ mov WORD PTR [si], ax
+
+ lds si, DWORD PTR [ebp+0Eh]
+ mov eax, ss:(SMBIOS_PNP_FUNC50_DMIEDIT_STRUC PTR [di]).dDmiStorageBase
+ mov DWORD PTR [si], eax
+
+ lds si, DWORD PTR [ebp+12h]
+ mov eax, ss:(SMBIOS_PNP_FUNC50_DMIEDIT_STRUC PTR [di]).dDmiStorageSize
+ mov WORD PTR [si], ax
+
+ add sp, size SMBIOS_PNP_FUNC50_DMIEDIT_STRUC
+ pop ds
+ pop edi
+ pop si
+ pop eax
+ mov ax, bx
+ pop ebx
+
+ ret
+
+rt_get_smbios_info ENDP
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: SMBIOS_Func_51h
+; Procedure: RT_GET_SMBIOS_STRUC
+;
+; Description: This function copies one DMI structure into the buffer
+; provided by the caller. The caller's DMI structure number is
+; then updated with next DMI structure number (or FFFF if no
+; more DMI structures are present).
+;
+; Input: [EBP+00] = Function number (51h)
+; [EBP+02] = WORD FAR *StructureNum
+; [EBP+06] = WORD FAR *DmiStructureBuffer
+; [EBP+0A] = WORD DmiSelector
+; [EBP+0C] = WORD BiosSelector
+; DX = SMI IO port address
+;
+; Output: AX = Zero if success, non-zero return code if non successful
+; [EBP+02] = WORD FAR *StructureNum updated to contain the next DMI
+; structure number or FFFF if no more structures exist
+; [EBP+06] = WORD FAR *DmiStructureBuffer pointer to buffer that is
+; filled in with the requested DMI structure.
+;
+; Modified: AX
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+rt_get_smbios_struc PROC NEAR
+ push ebx
+ push eax
+;
+; convert *StructureNum and *DmiStructureBuffer from SEG:OFS format
+; to 32-bit addresses
+;
+ push [ebp+2] ; UINT16 *StructureNum
+ push [ebp+4]
+ push [ebp+6] ; UINT8 *DmiStructureBuffer
+ push [ebp+8]
+
+ mov eax, 0
+
+; prepare EBX with 32-bit addresses of *StructureNum and *DmiStructureBuffer
+ mov ebx, 0
+ mov bx, [ebp+4]
+ shl ebx, 4
+ mov ax, [ebp+2]
+ add ebx, eax
+ mov [ebp+2], ebx
+
+ mov ebx, 0
+ mov bx, [ebp+8]
+ shl ebx, 4
+ mov ax, [ebp+6]
+ add ebx, eax
+ mov [ebp+6], ebx
+
+; prepare EBX with 32-bit address out of DS:EBP
+ mov ebx, 0
+ mov bx, ss
+ shl ebx, 4
+ add ebx, ebp
+ mov al, 51h
+ call rt_generate_sw_smi
+
+ pop [ebp+8]
+ pop [ebp+6]
+ pop [ebp+4]
+ pop [ebp+2]
+
+ pop eax
+ mov ax, bx
+ pop ebx
+
+ ret
+
+rt_get_smbios_struc ENDP
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: SMBIOS_Func_52h
+; Procedure: RT_SET_SMBIOS_STRUC
+;
+; Description: This function sets the SMBIOS structure identified by the
+; type and possibly handle, found in the SMBIOS structure
+; header in the given buffer.
+;
+; Input: [EBP+00] = Function number (52h)
+; [EBP+02] = WORD FAR *DmiDataBuffer
+; [EBP+06] = WORD FAR *DmiWorkBuffer
+; [EBP+0A] = WORD Control
+; [EBP+0C] = WORD DmiSelector
+; [EBP+0E] = WORD BiosSelector
+;
+; Output: AX = Zero if successful
+; non-zero return code if unsuccessful
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+rt_set_smbios_struc PROC NEAR
+ push ebx
+ push eax
+ push si
+ push di
+ push ds
+
+ lds di, DWORD PTR [ebp+02h] ; DS:SI = ptr to given data buffer
+
+ push [ebp+2]
+
+ mov eax, 0
+ mov ebx, 0
+ mov bx, [ebp+4]
+ shl ebx, 4
+ mov ax, [ebp+2]
+ add ebx, eax
+ mov [ebp+2], ebx
+
+; prepare EBX with 32-bit address out of DS:EBP
+ mov ebx, 0
+ mov bx, ss
+ shl ebx, 4
+ add ebx, ebp
+ mov al, 52h
+ call rt_generate_sw_smi
+
+ pop [ebp+2]
+
+; Update smbios_change_status
+
+ ; Get the offset of SMBIOS_CHANGE_STRUC data
+ call get_smbios_change_struc
+
+ call SMB_cs_read_x_write_ram
+
+ mov cs:(SMBIOS_CHANGE_STRUC PTR [si]).smbios_change_status, SMBIOS_SINGLE_STRUCTURE_AFFECTED
+ mov cs:(SMBIOS_CHANGE_STRUC PTR [si]).smbios_change_type, SMBIOS_ONE_MORE_STRUCTURE_CHANGED
+ mov ax, ds:WORD PTR (DMIHDR_STRUC PTR [di]).wHandle; AX = handle# of structure being changed
+ mov cs:(SMBIOS_CHANGE_STRUC PTR [si]).smbios_change_handle, ax ; changed handle
+
+ call SMB_cs_read_ram_write_rom
+
+ pop ds
+ pop di
+ pop si
+ pop eax
+ mov ax, bx
+ pop ebx
+ ret
+rt_set_smbios_struc ENDP
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: SMBIOS_Func_53h
+; Procedure: RT_GET_SMBIOS_STRUC_CHANGE_INFO
+;
+; Description: This function returns the information about what type of
+; SMBIOS structure-change occurred.
+;
+; Input: [EBP+00] = Function number (53h)
+; [EBP+02] = WORD FAR *DmiChangeStructure
+; [EBP+06] = WORD DmiSelector
+; [EBP+08] = WORD BiosSelector
+;
+; Output: AX = Zero if successful
+; Non-zero return code if unsuccessful
+;
+; Modified: Nothing
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+rt_get_smbios_struc_change_info PROC NEAR
+
+ push es
+ push ds
+ push gs
+ push fs
+
+ mov gs, WORD PTR [ebp+08h] ; GS = BIOS Selector
+ mov fs, WORD PTR [ebp+06h] ; FS = GPNV Selector
+
+ call SMB_cs_read_x_write_ram
+
+ push si
+ push di
+
+ les di, DWORD PTR [ebp+02h] ; ES:DI = ptr to DMI Change Structure buffer
+
+; Get the offset of SMBIOS_CHANGE_STRUC data
+ call get_smbios_change_struc
+
+ xor ax, ax
+ xchg ah, cs:(SMBIOS_CHANGE_STRUC PTR [si]).smbios_change_status; AH = SMBIOS Change Status
+ xchg al, cs:(SMBIOS_CHANGE_STRUC PTR [si]).smbios_change_type; AL = SMBIOS Change Type
+ mov es:BYTE PTR (SMBIOSFun53BufferSTRUC PTR [di]).bChangeStatus, ah
+ mov es:BYTE PTR (SMBIOSFun53BufferSTRUC PTR [di]).bChangeType, al
+ push ax
+ cmp ah, SMBIOS_MULTIPLE_STRUCTURE_AFFECTED
+ mov ax, 0000h ; DO NOT USE xor ax, ax !!!!!!!!!!!!!!!!
+ ; Flags has the information of prev CMP
+ xchg ax, cs:(SMBIOS_CHANGE_STRUC PTR [si]).smbios_change_handle; AX = handle# of changed structure
+ jnz SHORT rgssci_00 ; single structure affected
+ xor ax, ax ; make handle# 00 for multiple structures change
+
+rgssci_00:
+ mov es:WORD PTR (SMBIOSFun53BufferSTRUC PTR [di]).wChangeHandle, ax
+ pop ax
+ pop si
+ pop di
+
+ call SMB_cs_read_ram_write_rom
+
+ cmp ah, SMBIOS_NO_CHANGE ; any change in status ?
+ mov ax, RT_DMI_SUCCESS ; successful
+ jnz SHORT rgssci_01 ; change in status
+ mov ax, RT_DMI_NO_CHANGE ; no change in status, return with error code
+
+rgssci_01:
+ pop fs
+ pop gs
+ pop ds
+ pop es
+ ret
+
+rt_get_smbios_struc_change_info ENDP
+
+SMBIOS_CHANGE_STRUC STRUCT
+ smbios_change_handle DW ?
+ smbios_change_status DB ?
+ smbios_change_type DB ?
+SMBIOS_CHANGE_STRUC ENDS
+
+get_smbios_change_struc:
+ pushf
+ cli
+ call l_01 ; stores IP
+ mov si, sp
+ mov si, ss:[si-2]
+ popf ; restore IF
+ add si, 11 ; cs:si points to smbios_change_handle
+l_01:
+ ret
+smbios_change_handle DW ?
+smbios_change_status DB ?
+smbios_change_type DB ?
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: SMB_cs_read_x_write_ram
+;
+; Description: This function makes the code segment Write Only.
+;
+; Input: None
+;
+; Notes: This function needs to ported or modified accordingly.
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+SMB_cs_read_x_write_ram PROC NEAR PUBLIC
+ push eax
+ push dx
+ mov dx, 0CF8h
+ mov eax, 80000094h
+ out dx, eax
+ mov dx, 0CFCh
+ in eax, dx
+ or eax, 00020000h ; 0/0/0/96/Bit1, enable E8000 for writing
+ out dx, eax
+ pop dx
+ pop eax
+ ret
+SMB_cs_read_x_write_ram ENDP
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: SMB_cs_read_ram_write_rom
+;
+; Description: This function makes the code segment Read Only.
+;
+; Input: None
+;
+; Notes: This function needs to ported or modified accordingly.
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+SMB_cs_read_ram_write_rom PROC NEAR PUBLIC
+ push eax
+ push dx
+ mov dx, 0CF8h
+ mov eax, 80000094h
+ out dx, eax
+ mov dx, 0CFCh
+ in eax, dx
+ and eax, 0FFFDFFFFh ; 0/0/0/96/Bit1, make E8000 read-only
+ out dx, eax
+ pop dx
+ pop eax
+ ret
+SMB_cs_read_ram_write_rom ENDP
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: SMBIOS_Func_54h
+; Procedure: RT_SMBIOS_CONTROL
+;
+; Description: This function returns the information about what type of
+; SMBIOS structure-change occurred.
+;
+; Input: [EBP+00] = Function number (54h)
+; [EBP+02] = WORD SubFunction - Defines the specific control operation
+; [EBP+04] = VOID FAR *Data - Input/output data buffer, SubFunction specific
+; [EBP+08] = BYTE Control - Conditions for setting the structure
+; [EBP+09] = WORD DmiSelector - SMBIOS data read/write selector
+; [EBP+11] = WORD BiosSelector- PnP BIOS readable/writeable selector
+;
+; Output: AX = Zero if successful
+; Non-zero return code if unsuccessful
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+rt_smbios_control PROC NEAR
+; Do the porting here as needed
+;- mov ax, RT_PNP_UNSUPPORTED ;Return code for unsupported func
+; (debx+03062009)>
+ mov al, 30h ; SmiGpnv
+ call rt_generate_sw_smi
+; <(debx+03062009)
+ ret
+
+rt_smbios_control ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: SMBIOS_Func_55h
+;
+; Description: Required for GPNV support. This function returns information
+; about a General Purpose NonVolatile (GPNV) area. The Handle
+; argument is a pointer to a number that identifies which GPNV's
+; information is requested, a value of 0 accesses the first
+; (or only) area.
+;
+; Input: [EBP+00] DW PnP BIOS Function 55h
+; [EBP+02] DW *Handle - Identifies which GPNV to access
+; [EBP+06] DW *MinGPNVRWSize - Minimum buffer size in bytes for GPNV access
+; [EBP+0A] DW *GPNVSize - Size allocated for GPNV within the R/W Block
+; [EBP+0E] DD *NVStorageBase - 32-bit physical base address for...
+; ... mem. mapped nonvolatile storage media
+; [EBP+12] DW BiosSelector - PnP BIOS readable/writable selector
+;
+; Output: If successful - DMI_SUCCESS If an Error (Bit 7 set) or a
+; Warning occurred the Error Code will be returned in AX, the
+; FLAGS and all other registers will be preserved
+;
+; Notes: On return:
+;
+; *Handle is updated either with the handle of the next GPNV
+; area or, if there are no more areas, 0FFFFh. GPNV handles
+; are assigned sequentially by the system, from 0 to the total
+; number of areas (minus 1).
+;
+; *MinGPNVRW Size is updated with the minimum size, in bytes,
+; of any buffer used to access this GPNV area. For a Flash
+; based GPNV area, this would be the size of the Flash block
+; containing the actual GPNV.
+;
+; *GPNVSize is updated with the size, in bytes, of this GPNV
+; area (which is less than or equal to the MinGPNVRWSize value).
+;
+; *NVStorageBase is updated with the paragraph-aligned, 32-bit
+; absolute physical base address of this GPNV. If non-zero,
+; this value allows the caller to construct a 16-bit data
+; segment descriptor with a limit of MinGPNVRWSize and
+; read/write access. If the value is 0, protected-mode mapping
+; is not required for this GPNV.
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+rt_smbios_get_gpnv PROC NEAR PUBLIC
+ mov al, 30h ; SmiGpnv
+ call rt_generate_sw_smi
+ ret
+rt_smbios_get_gpnv ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: SMBIOS_Func_56h
+;
+; Description: Required for GPNV support. This function is used to read an
+; entire GPNV area into the buffer specified by GPNVBuffer. It
+; is the responsibility of the caller to ensure that GPNVBuffer
+; is large enough to store the entire GPNV storage block - this
+; buffer must be at least the MinGPNVRWSize returned by Function
+; 55h - Get GPNV Information. The Handle argument identifies the
+; specific GPNV to be read. On a successful read of a GPNV area,
+; that GPNV area will be placed in the GPNVBuffer beginning at
+; offset 0. The protected-mode selector GPNVSelector has base
+; equal to NVStorageBase and limit of at least MinGPNVRWSize -
+; so long as the NVStorageBase value returned from Function 55h
+; was non-zero.
+;
+; Input: [EBP+00] DW PnP BIOS Function 56h
+; [EBP+02] DW Handle - Identifies which GPNV is to be read
+; [EBP+04] DW *GPNVBuffer - Address of buffer in which to return GPNV
+; [EBP+08] DW *GPNVLock - Lock value
+; [EBP+0C] DW GPNVSelector - Selector for GPNV Storage
+; [EBP+0E] DW BiosSelector - PnP BIOS readable/writable selector
+;
+; Output: If the GPNV lock is supported and the lock set request succeeds,
+; the caller's GPNVLock is set to the value of the current lock
+; and the function returns DMI_SUCCESS.
+;
+; Notes: If the GPNV request fails, one of the following values is
+; returned:
+; - DMI_LOCK_NOT_SUPPORTED
+; - DMI_INVALID_LOCK
+; - DMI_CURRENTLY_LOCKED
+;
+; For return status codes DMI_SUCCESS, DMI_LOCK_NOT_SUPPORTED
+; and DMI_CURRENTLY_LOCKED, the GPNV Read function returns the
+; current contents of the GPNV associated with Handle as the
+; first GPNVSize bytes within GPNVBuffer, starting at offset 0.
+; If a lock request fails with DMI_CURRENTLY_LOCKED status,
+; the caller's GPNVLock will be set to the value of the current
+; lock.
+; Passing a GPNVLock value of -1 to the GPNV Read causes the
+; GPNVLock value to be ignored - in this case the underlying
+; logic makes no attempt to store a lock value for comparison
+; with lock values passed into GPNV Write. Any value provided
+; for GPNVLock besides -1 is accepted as a valid value for a
+; lock request.
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+rt_smbios_read_gpnv PROC NEAR PUBLIC
+ mov al, 30h ; SmiGpnv
+ call rt_generate_sw_smi
+ ret
+rt_smbios_read_gpnv ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: SMBIOS_Func_57h
+;
+; Description: Required for GPNV support. This function is used to write an
+; entire GPNV from the GPNVBuffer into the nonvolatile storage
+; area. The Handle argument identifies the specific GPNV to be
+; written. The protectedmode selector GPNVSelector has base equal
+; to NVStorageBase and limit of at least MinGPNVRWSize - so long
+; as the NVStorageBase value returned from Get GPNV Information
+; was non-zero. The caller should first call Read GPNV Data
+; (with a lock) to get the current area contents, modify the
+; data, and pass it into this function - this ensures that the
+; GPNVBuffer which is written contains a complete definition for
+; the entire GPNV area. If the BIOS uses some form of block erase
+; device, the caller must also allocate enough buffer space for
+; the BIOS to store all data from the part during the reprogramming
+; operation, not just the data of interest.
+; The data to be written to the GPNV selected by Handle must
+; reside as the first GPNVSize bytes of the GPNVBuffer.
+; Note: The remaining (MinGPNVRWSize-GPNVSize) bytes of the
+; GPNVBuffer area are used as a scratch-area by the BIOS call
+; in processing the write request; the contents of that area of
+; the buffer are destroyed by this function call.
+; The GPNVLock provides a mechanism for cooperative use of the
+; GPNV, and is set during a GPNV Read (Function 56h). If the
+; input GPNVLock value is -1 the caller requests a forced write
+; to the GPNV area, ignoring any outstanding GPNVLock. If the
+; caller is not doing a forced write, the value passed in GPNVLock
+; to the GPNV Write must be the same value as that (set and)
+; returned by a previous GPNV Read (Function 56h).
+;
+; Input: [EBP+00] - PnP BIOS Function 57h
+; [EBP+02] - Handle - Identifies which GPNV is to be written
+; [EBP+04] - *GPNVBuffer - Address of buffer containing complete GPNV to write
+; [EBP+08] - GPNVLock - Lock value
+; [EBP+0A] - GPNVSelector - Selector for GPNV Storage
+; [EBP+0C] - BiosSelector - PnP BIOS readable/writable selector
+;
+; Output: The GPNV Write function returns a value of DMI_ LOCK_NOT_SUPPORTED
+; when a GPNVLock value other than -1 is specified and locking is
+; not supported. A return status of DMI_ CURRENTLY_LOCKED indicates
+; that the call has failed due to an outstanding lock on the GPNV
+; area which does not match the caller's GPNVLock value. Any
+; outstanding GPNVLock value (which was set by a previous Error!
+; Reference source not found.) gets cleared on a successful
+; write of the GPNV.
+; Notes:
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+rt_smbios_write_gpnv PROC NEAR PUBLIC
+ mov al, 30h ; SmiGpnv
+ call rt_generate_sw_smi
+ ret
+rt_smbios_write_gpnv ENDP
+
+
+OEM16_CSEG ENDS
+
+END
+;----------------------------------------------------------------------------
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2009, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
diff --git a/Board/EM/Setup/Advanced.vfr b/Board/EM/Setup/Advanced.vfr
new file mode 100644
index 0000000..d6a6fe7
--- /dev/null
+++ b/Board/EM/Setup/Advanced.vfr
@@ -0,0 +1,184 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/BIN/Board/Setup/Advanced.vfr 14 7/29/11 5:31p Artems $
+//
+// $Revision: 14 $
+//
+// $Date: 7/29/11 5:31p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Board/Setup/Advanced.vfr $
+//
+// 14 7/29/11 5:31p Artems
+// EIP 63462 - driver health support from boot manager
+//
+// 13 2/14/11 11:13a Felixp
+// Enhancement (EIP 53146):
+// Support to Treat Dynamic IFR Pages as subpages
+// (not as top level menu items).
+// The changes necessary to support the corresponding TSE feature are
+// added.
+//
+// 12 6/11/10 12:22p Felixp
+// AMI_CALLBACK_VARSTORE added
+//
+// 11 10/09/09 6:43p Felixp
+// UEFI 2.1 Support (the component is updated to support Framework and
+// UEFI 2.1 HII).
+//
+// 10 6/30/09 2:33p Robert
+// comment corrections
+//
+// 9 6/30/09 11:42a Robert
+// Added Comment and updated parts for coding standards
+//
+// 8 10/30/07 10:46a Felixp
+// AMITSESETUP varstore definition added
+//
+// 7 10/19/05 2:07p Felixp
+// Support for custom varstores (in .sd files) added.
+//
+// 6 9/30/05 11:21a Yul
+// definition of varstore SYSTEM_ACCESS added
+//
+// 5 9/06/05 6:19p Girim
+// Code cleanup.
+//
+// 3 7/12/05 11:13a Felixp
+// workaround for VFR compiler bug in varstore handling
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//**********************************************************************
+//
+// Name: Advanced.vfr
+//
+// Description:
+// Setup script for the "Advanced" top level setup screen
+//
+//**********************************************************************
+//<AMI_FHDR_END>
+
+#include "SetupPrivate.h"
+#define ADVANCED_FORM_SET
+#define FORM_SET_TYPEDEF
+#include <SetupDefinitions.h>
+#undef FORM_SET_TYPEDEF
+
+formset guid = ADVANCED_FORM_SET_GUID,
+ title = STRING_TOKEN(STR_ADVANCED),
+ help = STRING_TOKEN(STR_ADVANCED_HELP),
+ class = ADVANCED_FORM_SET_CLASS,
+ subclass = 0,
+
+ SETUP_DATA_VARSTORE
+ SYSTEM_ACCESS_VARSTORE
+ AMITSESETUP_VARSTORE
+ AMI_CALLBACK_VARSTORE
+
+#if SETUP_GROUP_DYNAMIC_PAGES
+ varstore DYNAMIC_PAGE_COUNT, key = DYNAMIC_PAGE_COUNT_KEY_ID,
+ name = DynamicPageCount, guid = DYNAMIC_PAGE_COUNT_GUID;
+#endif
+
+#if DRIVER_HEALTH_SUPPORT
+ varstore DRIVER_HEALTH_ENABLE, key = DRIVER_HEALTH_ENB_KEY_ID,
+ name = DriverHlthEnable, guid = AMITSE_DRIVER_HEALTH_ENB_GUID;
+
+ varstore DRIVER_HEALTH, key = DRIVER_HEALTH_KEY_ID,
+ name = DriverHealthCount, guid = AMITSE_DRIVER_HEALTH_GUID;
+
+ varstore DRIVER_HEALTH_CTRL_COUNT, key = DRIVER_HEALTH_CTRL_KEY_ID,
+ name = DrvHealthCtrlCnt, guid = AMITSE_DRIVER_HEALTH_CTRL_GUID;
+#endif
+
+ #define FORM_SET_VARSTORE
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_VARSTORE
+
+ form formid = AUTO_ID(ADVANCED_MAIN),
+ title = STRING_TOKEN(STR_ADVANCED);
+
+ #define FORM_SET_ITEM
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_ITEM
+ #define FORM_SET_GOTO
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_GOTO
+
+#if SETUP_GROUP_DYNAMIC_PAGES
+ SEPARATOR
+ suppressif ideqvallist DYNAMIC_PAGE_COUNT.PageCount == 0xFFFF;
+ goto ADVANCED_MAIN,
+ prompt = STRING_TOKEN(STR_EMPTY),
+ help = STRING_TOKEN(STR_EMPTY);
+ endif;
+#endif
+
+#if DRIVER_HEALTH_SUPPORT
+ suppressif ideqvallist DRIVER_HEALTH_ENABLE.Enable == 0xFFFF;
+ goto DRIVER_HEALTH_FORM,
+ prompt = STRING_TOKEN (STR_DRV_HEALTH),
+ help = STRING_TOKEN (STR_DRV_HEALTH_HELP);
+ endif;
+#endif
+
+ endform;
+
+#if DRIVER_HEALTH_SUPPORT
+ form
+ formid = AUTO_ID (DRIVER_HEALTH_FORM),
+ title = STRING_TOKEN (STR_DRV_HEALTH);
+
+ suppressif ideqvallist DRIVER_HEALTH.DrvHandleCount == 0xFFFF;
+ goto DRIVER_HEALTH_SUBFORM,
+ prompt = STRING_TOKEN (STR_EMPTY),
+ help = STRING_TOKEN (STR_DRV_HEALTH_HELP);
+ endif;
+ endform;
+
+ form
+ formid = AUTO_ID (DRIVER_HEALTH_SUBFORM),
+ title = STRING_TOKEN (STR_DRV_HEALTH);
+
+ suppressif ideqvallist DRIVER_HEALTH_CTRL_COUNT.DrvHealthCtrlCnt == 0xFFFF;
+ goto DRIVER_HEALTH_SUBFORM,
+ prompt = STRING_TOKEN (STR_EMPTY),
+ help = STRING_TOKEN (STR_DRV_HEALTH_HELP);
+ endif;
+ endform;
+#endif
+
+ #define FORM_SET_FORM
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_FORM
+endformset;
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/Setup/AmiSetupProtocol.c b/Board/EM/Setup/AmiSetupProtocol.c
new file mode 100644
index 0000000..d392526
--- /dev/null
+++ b/Board/EM/Setup/AmiSetupProtocol.c
@@ -0,0 +1,270 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+///**********************************************************************
+// $Header: /Alaska/BIN/Board/Setup/AmiSetupProtocol.c 3 10/04/12 4:49p Artems $
+//
+// $Revision: 3 $
+//
+// $Date: 10/04/12 4:49p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Board/Setup/AmiSetupProtocol.c $
+//
+// 3 10/04/12 4:49p Artems
+// [TAG] EIP N/A
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Added function headers for CHM builder
+// [Files] AmiSetupProtocol.c
+//
+// 2 8/29/12 2:36p Artems
+// [TAG] EIP N/A
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] setup control interactive callback doesn't work
+// [RootCause] When there are no runtime-registered callbacks,
+// build-time callbacks don't present in callback list
+// [Solution] Fixed code logic to handle situation with no runtime
+// callbacks
+// [Files] AmiSetupProtocol.c Setup.c
+//
+// 1 8/28/12 4:10p Artems
+// [TAG] EIP N/A
+// [Category] New Feature
+// [Description] Add infrastructure to support runtime registration of
+// setup controls callbacks
+// [Files] Setup.c Setup.h Setup.cif AmiSetupProtocol.c
+// AmiSetupProtocol.h
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiSetupProtocol.c
+//
+// Description: AMI Setup protocol implementation
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include <AmiDxeLib.h>
+#include <Setup.h>
+#include <Protocol/AmiSetupProtocol.h>
+
+typedef struct {
+ DLINK Link;
+ SETUP_ITEM_CALLBACK Data;
+} AMI_SETUP_CALLBACK_LINK;
+
+static DLIST AmiCallbackList;
+extern CALLBACK_PARAMETERS *CallbackParametersPtr;
+
+//<AMI_THDR_START>
+//----------------------------------------------------------------------------
+// Name: AmiSetupRegisterCallback
+//
+// Description:
+// This function registers setup control callback
+//
+// Input:
+// IN UINT16 Class - setup control formset class
+// IN UINT16 SubClass - setup control formset subclass
+// IN UINT16 Key - setup control key
+// IN SETUP_ITEM_CALLBACK_HANDLER *Handler - pointer to callback function
+// OUT EFI_HANDLE *Handle - pointer to store handle of registered callback
+//
+// Output:
+// EFI_SUCCESS - operation succeeded
+//
+//----------------------------------------------------------------------------
+//<AMI_THDR_END>
+EFI_STATUS AmiSetupRegisterCallback(
+ IN UINT16 Class,
+ IN UINT16 SubClass,
+ IN UINT16 Key,
+ IN SETUP_ITEM_CALLBACK_HANDLER *Handler,
+ OUT EFI_HANDLE *Handle
+)
+{
+ EFI_STATUS Status;
+ AMI_SETUP_CALLBACK_LINK *NewLink;
+
+ Status = pBS->AllocatePool(EfiBootServicesData, sizeof(AMI_SETUP_CALLBACK_LINK), &NewLink);
+ if(EFI_ERROR(Status))
+ return Status;
+
+ NewLink->Data.Class = Class;
+ NewLink->Data.SubClass = SubClass;
+ NewLink->Data.Key = Key;
+ NewLink->Data.UpdateItem = Handler;
+
+ DListAdd(&AmiCallbackList, (DLINK *)NewLink);
+ *Handle = NewLink;
+ return EFI_SUCCESS;
+}
+
+//<AMI_THDR_START>
+//----------------------------------------------------------------------------
+// Name: AmiSetupUnRegisterCallback
+//
+// Description:
+// This function unregisters previously registered callback
+//
+// Input:
+// IN EFI_HANDLE Handle - handle of callback to unregister
+//
+// Output:
+// EFI_SUCCESS - operation succeeded
+//
+//----------------------------------------------------------------------------
+//<AMI_THDR_END>
+EFI_STATUS AmiSetupUnRegisterCallback(
+ IN EFI_HANDLE Handle
+)
+{
+ DListDelete(&AmiCallbackList, (DLINK *)Handle);
+ pBS->FreePool(Handle);
+ return EFI_SUCCESS;
+}
+
+//<AMI_THDR_START>
+//----------------------------------------------------------------------------
+// Name: AmiSetupGetCallbacks
+//
+// Description:
+// This function returns all registered callbacks
+//
+// Input:
+// IN OUT UINTN *BufferSize - size of buffer where to store output
+// OUT SETUP_ITEM_CALLBACK *Buffer - buffer to store output
+//
+// Output:
+// EFI_SUCCESS - operation succeeded
+// EFI_ERROR - operation failed
+//
+//----------------------------------------------------------------------------
+//<AMI_THDR_END>
+EFI_STATUS AmiSetupGetCallbacks(
+ IN OUT UINTN *BufferSize,
+ OUT SETUP_ITEM_CALLBACK *Buffer
+)
+{
+ UINTN ActualSize;
+ AMI_SETUP_CALLBACK_LINK *Link;
+
+ if(AmiCallbackList.Size == 0)
+ return EFI_NOT_FOUND;
+
+ ActualSize = sizeof(SETUP_ITEM_CALLBACK) * AmiCallbackList.Size;
+ if(*BufferSize < ActualSize) {
+ *BufferSize = ActualSize;
+ return EFI_BUFFER_TOO_SMALL;
+ }
+
+ if(Buffer == NULL)
+ return EFI_INVALID_PARAMETER;
+
+ Link = (AMI_SETUP_CALLBACK_LINK *)AmiCallbackList.pHead;
+ while(Link != NULL) {
+ Buffer->Class = Link->Data.Class;
+ Buffer->SubClass = Link->Data.SubClass;
+ Buffer->Key = Link->Data.Key;
+ Buffer->UpdateItem = Link->Data.UpdateItem;
+ Buffer++;
+ Link = (AMI_SETUP_CALLBACK_LINK *)Link->Link.pNext;
+ }
+
+ *BufferSize = ActualSize;
+ return EFI_SUCCESS;
+}
+
+//<AMI_THDR_START>
+//----------------------------------------------------------------------------
+// Name: AmiSetupGetCallbackParameters
+//
+// Description:
+// This function returns callback parameters from FormBrowser
+//
+// Input:
+// OUT CALLBACK_PARAMETERS **Parameters - pointer to store parameters
+//
+// Output:
+// EFI_SUCCESS - protocol installed
+//
+//----------------------------------------------------------------------------
+//<AMI_THDR_END>
+EFI_STATUS AmiSetupGetCallbackParameters(
+ OUT CALLBACK_PARAMETERS **Parameters
+)
+{
+ *Parameters = CallbackParametersPtr;
+ return EFI_SUCCESS;
+}
+
+static AMI_SETUP_PROTOCOL AmiSetupProtocol = {
+ AmiSetupRegisterCallback,
+ AmiSetupUnRegisterCallback,
+ AmiSetupGetCallbacks,
+ AmiSetupGetCallbackParameters
+};
+
+//<AMI_THDR_START>
+//----------------------------------------------------------------------------
+// Name: InitAmiSetupProtocol
+//
+// Description:
+// This function installs AMI Setup protocol
+//
+// Input:
+// None
+//
+// Output:
+// EFI_SUCCESS - protocol installed
+// EFI_ERROR - error occured during installation
+//
+//----------------------------------------------------------------------------
+//<AMI_THDR_END>
+EFI_STATUS InitAmiSetupProtocol(
+ VOID
+)
+{
+ EFI_STATUS Status;
+ EFI_HANDLE Handle = NULL;
+
+ DListInit(&AmiCallbackList);
+ Status = pBS->InstallMultipleProtocolInterfaces(
+ &Handle,
+ &AmiSetupProtocolGuid,
+ &AmiSetupProtocol,
+ NULL);
+ return Status;
+}
+
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Setup/Boot.vfr b/Board/EM/Setup/Boot.vfr
new file mode 100644
index 0000000..8010c28
--- /dev/null
+++ b/Board/EM/Setup/Boot.vfr
@@ -0,0 +1,255 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/BIN/Board/Setup/Boot.vfr 24 2/27/12 6:35p Artems $
+//
+// $Revision: 24 $
+//
+// $Date: 2/27/12 6:35p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Board/Setup/Boot.vfr $
+//
+// 24 2/27/12 6:35p Artems
+// EIP 83602: Added MANUFACTURING flag to setup controls
+//
+// 23 6/13/11 6:56p Artems
+// Added token to support zero boot timeout
+//
+// 22 3/24/11 12:16p Felixp
+// Enhancement(EIP: 55918)
+// Workaround for defaults processing in TSE
+// There is a peculiar problem with the AMITSESETUP.AMISilentBoot
+// checkbox.
+// The defaults for this control were not loaded in UEFI 2.1 mode.
+// The problem is caused by combination of factors:
+// - AMISilentBoot is a special variable (it holds internal TSE data);
+// - there are several ways to specify default value for a checkbox in
+// UEFI 2.1 VFR syntax
+// (old method of using flags does not work for this special variable).
+//
+// 21 11/18/10 5:46p Felixp
+// Flat Boot List support.
+// Changes necessary to support Flat Boot List
+// introduced in Core 4.6.4.1 are added.
+//
+// 20 2/24/10 11:53a Felixp
+// Fast Boot Control are removed. They are now part of the FastBoot
+// eModule.
+//
+// 19 10/09/09 6:43p Felixp
+// UEFI 2.1 Support (the component is updated to support Framework and
+// UEFI 2.1 HII).
+//
+// 18 6/30/09 11:42a Robert
+// Added Comment and updated parts for coding standards
+//
+// 17 6/06/08 11:55a Felixp
+// Fast boot support is enabled
+//
+// 16 1/31/08 11:51a Olegi
+// NumLock state added.
+//
+// 15 10/30/07 10:42a Felixp
+// SYSTEM_ACCESS varstore declaration added
+//
+// 14 9/05/07 5:26p Felixp
+// Changes needed for TSE from Core 4.6.2
+//
+// 13 2/21/07 5:01p Felixp
+// ADD_BOOT_OPTION varstore updated
+//
+// 12 12/29/06 2:38p Felixp
+//
+// 11 10/08/06 11:34a Felixp
+// Minimum boot timeout changed from 0 to 1 second.
+//
+// 10 12/12/05 8:59p Felixp
+// step for Timeout numeric added.
+//
+// 9 11/08/05 5:11a Felixp
+// Update to be complient with TSE 1.15.1044
+//
+// 8 11/07/05 10:54a Felixp
+// Support for boot with minimum configuration added
+//
+// 7 10/19/05 2:07p Felixp
+// Support for custom varstores (in .sd files) added.
+//
+// 6 9/06/05 6:20p Girim
+// Code cleanup.
+//
+// 4 7/12/05 11:13a Felixp
+// workaround for VFR compiler bug in varstore handling
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//**********************************************************************
+//
+// Name: Boot.vfr
+//
+// Description:
+// Setup script for the "Boot" top level setup screen
+//
+//**********************************************************************
+//<AMI_FHDR_END>
+
+#include "SetupPrivate.h"
+#define BOOT_FORM_SET
+#define FORM_SET_TYPEDEF
+#include <SetupDefinitions.h>
+#undef FORM_SET_TYPEDEF
+
+formset guid = BOOT_FORM_SET_GUID,
+ title = STRING_TOKEN(STR_BOOT),
+ help = STRING_TOKEN(STR_BOOT_HELP),
+ class = BOOT_FORM_SET_CLASS,
+ subclass = 0,
+
+ SETUP_DATA_VARSTORE
+ SYSTEM_ACCESS_VARSTORE
+ BOOT_MANAGER_VARSTORE
+ TIMEOUT_VARSTORE
+ BOOT_ORDER_VARSTORE
+ NEW_BOOT_OPTION_VARSTORE
+ DEL_BOOT_OPTION_VARSTORE
+ LEGACY_DEV_INFO_VARSTORE
+ LEGACY_GROUP_INFO_VARSTORE
+ LEGACY_DEV_ORDER_VARSTORE
+ AMI_CALLBACK_VARSTORE
+ AMITSESETUP_VARSTORE
+
+ #define FORM_SET_VARSTORE
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_VARSTORE
+
+ form
+ formid = AUTO_ID(BOOT_MAIN),
+ title = STRING_TOKEN(STR_BOOT);
+
+ SUBTITLE(STRING_TOKEN(STR_BOOT_CFG))
+
+ numeric varid = TIMEOUT.Value,
+ prompt = STRING_TOKEN(STR_BOOT_TIMEOUT),
+ help = STRING_TOKEN(STR_BOOT_TIMEOUT_HELP),
+#if SUPPORT_ZERO_BOOT_TIMEOUT
+ minimum = 0x0,
+#else
+ minimum = 0x1,
+#endif
+ maximum = 0xffff,
+ step = 1,
+ option text = STRING_TOKEN(STR_EMPTY), value = DEFAULT_BOOT_TIMEOUT, flags = DEFAULT | MANUFACTURING;
+ endnumeric;
+
+ oneof varid = SETUP_DATA.Numlock,
+ prompt = STRING_TOKEN(STR_CSM_BOOTUP_NUMLOCK),
+ help = STRING_TOKEN(STR_CSM_BOOTUP_NUMLOCK_HELP),
+ option text = STRING_TOKEN(STR_CSM_BOOTUP_NUMLOCK_ON), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;
+ option text = STRING_TOKEN(STR_CSM_BOOTUP_NUMLOCK_OFF), value = 0, flags = 0, key = 0;
+ endoneof;
+
+ SEPARATOR
+ checkbox varid = AMITSESETUP.AMISilentBoot,
+ prompt = STRING_TOKEN(STR_QUIET_BOOT),
+ help = STRING_TOKEN(STR_QUIET_BOOT_HELP),
+ flags = DEFAULT_QUIET_BOOT, // Flags behavior for checkbox is overloaded so that it equals a DEFAULT value. 1 = ON, 0 = off
+#if EFI_SPECIFICATION_VERSION>0x20000
+//Workaround for defaults processing in TSE.
+//There is a peculiar problem with this checkbox.
+//The defaults for this control were not loaded in UEFI 2.1 mode.
+//The problem is caused by combination of factors:
+// - AMISilentBoot is a special variable (it holds internal TSE data);
+// - there are several ways to specify default value for a checkbox in UEFI 2.1 VFR syntax
+// (old method of using flags does not work for this special variable).
+ option text = STRING_TOKEN(STR_EMPTY), value = DEFAULT_QUIET_BOOT, flags = DEFAULT | MANUFACTURING;
+#endif
+ endcheckbox;
+
+ #define FORM_SET_ITEM
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_ITEM
+
+ SEPARATOR
+ SUBTITLE(STRING_TOKEN(STR_BOOT_ORDER_SUBTITLE))
+ suppressif ideqvallist BOOT_MANAGER.BootCount == 0xFFFF;
+ oneof varid = BOOT_ORDER.Value,
+ prompt = STRING_TOKEN(STR_BOOT_ORDER_X),
+ help = STRING_TOKEN(STR_BOOT_ORDER_HELP),
+ option
+ text = STRING_TOKEN(STR_EMPTY),
+ value = 0,
+ flags = DEFAULT;
+ option
+ text = STRING_TOKEN(STR_EMPTY),
+ value = 1,
+ flags = 0;
+ endoneof;
+ endif;
+
+#if !defined(GROUP_BOOT_OPTIONS_BY_TAG) || GROUP_BOOT_OPTIONS_BY_TAG==1
+ SEPARATOR
+ suppressif ideqvallist LEGACY_DEV_INFO.GroupCount == 0xFFFF;
+ goto BBS_ORDER_FORM,
+ prompt = STRING_TOKEN(STR_EMPTY),
+ help = STRING_TOKEN(STR_BBS_ORDER_HELP);
+ endif;
+#endif
+ #define FORM_SET_GOTO
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_GOTO
+ endform;
+#if !defined(GROUP_BOOT_OPTIONS_BY_TAG) || GROUP_BOOT_OPTIONS_BY_TAG==1
+ form
+ formid = AUTO_ID(BBS_ORDER_FORM),
+ title = STRING_TOKEN(STR_BOOT);
+
+ suppressif ideqvallist LEGACY_GROUP_INFO.DeviceCount == 0xFFFF;
+ oneof
+ varid = LEGACY_DEV_ORDER.Value,
+ prompt = STRING_TOKEN(STR_BOOT_ORDER_X),
+ help = STRING_TOKEN(STR_BOOT_ORDER_HELP),
+ option
+ text = STRING_TOKEN(STR_EMPTY),
+ value = 0,
+ flags = DEFAULT;
+ option
+ text = STRING_TOKEN(STR_EMPTY),
+ value = 1,
+ flags = 0;
+ endoneof;
+ endif;
+ endform;
+#endif
+ #define FORM_SET_FORM
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_FORM
+endformset;
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Setup/Chipset.vfr b/Board/EM/Setup/Chipset.vfr
new file mode 100644
index 0000000..b1d45ff
--- /dev/null
+++ b/Board/EM/Setup/Chipset.vfr
@@ -0,0 +1,107 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/BIN/Board/Setup/Chipset.vfr 10 6/11/10 12:22p Felixp $
+//
+// $Revision: 10 $
+//
+// $Date: 6/11/10 12:22p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Board/Setup/Chipset.vfr $
+//
+// 10 6/11/10 12:22p Felixp
+// AMI_CALLBACK_VARSTORE added
+//
+// 9 10/09/09 6:43p Felixp
+// UEFI 2.1 Support (the component is updated to support Framework and
+// UEFI 2.1 HII).
+//
+// 8 6/30/09 2:33p Robert
+// comment corrections
+//
+// 7 6/30/09 11:42a Robert
+// Added Comment and updated parts for coding standards
+//
+// 6 10/19/05 2:07p Felixp
+// Support for custom varstores (in .sd files) added.
+//
+// 5 9/06/05 6:19p Girim
+// Code cleanup.
+//
+// 3 7/12/05 11:13a Felixp
+// workaround for VFR compiler bug in varstore handling
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+
+//**********************************************************************
+//
+// Name: Chipset.vfr
+//
+// Description:
+// Setup script for the "Chipset" top level setup screen
+//
+//**********************************************************************
+//<AMI_FHDR_END>
+#include "SetupPrivate.h"
+#define CHIPSET_FORM_SET
+#define FORM_SET_TYPEDEF
+#include <SetupDefinitions.h>
+#undef FORM_SET_TYPEDEF
+
+formset guid = CHIPSET_FORM_SET_GUID,
+ title = STRING_TOKEN(STR_CHIPSET),
+ help = STRING_TOKEN(STR_CHIPSET_HELP),
+ class = CHIPSET_FORM_SET_CLASS,
+ subclass = 0,
+
+ SETUP_DATA_VARSTORE
+ SYSTEM_ACCESS_VARSTORE
+ AMI_CALLBACK_VARSTORE
+
+ #define FORM_SET_VARSTORE
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_VARSTORE
+
+ form formid = AUTO_ID(CHIPSET_MAIN),
+ title = STRING_TOKEN(STR_CHIPSET);
+
+ #define FORM_SET_ITEM
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_ITEM
+ #define FORM_SET_GOTO
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_GOTO
+ endform;
+ #define FORM_SET_FORM
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_FORM
+endformset;
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/Setup/Exit.vfr b/Board/EM/Setup/Exit.vfr
new file mode 100644
index 0000000..ce6d7a8
--- /dev/null
+++ b/Board/EM/Setup/Exit.vfr
@@ -0,0 +1,212 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/BIN/Board/Setup/Exit.vfr 16 10/09/09 6:43p Felixp $
+//
+// $Revision: 16 $
+//
+// $Date: 10/09/09 6:43p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Board/Setup/Exit.vfr $
+//
+// 16 10/09/09 6:43p Felixp
+// UEFI 2.1 Support (the component is updated to support Framework and
+// UEFI 2.1 HII).
+//
+// 15 6/30/09 2:33p Robert
+// comment corrections
+//
+// 14 6/30/09 11:42a Robert
+// Added Comment and updated parts for coding standards
+//
+// 13 2/05/09 3:54p Felixp
+// Enhancement(EIP 13637): TSE Binary 4.6.2_TSE_1_27_1118_BETA or newer
+// required.
+// Page layout is updated to support for SETUP_SHOW_ALL_BBS_DEVICES
+// TSE SDL token.
+// SETUP_SHOW_ALL_BBS_DEVICES SDL token controls legacy (BBS) devices
+// listed
+// in the "Boot Override" section of the "Exit" page.
+// When this token is enabled, all BBS devices will be listed.
+// When this token is disabled, only first device from every BBS group
+// will be listed.
+// The token is disabled by default.
+//
+// 10 2/28/07 7:34p Felixp
+// STR_EFI_SHELL_HELP token updated to specify Shell file names for
+// different build modes
+//
+// 8 1/12/06 9:50a Felixp
+// Support for start up of the shell from the filesystem
+//
+// 7 10/19/05 2:07p Felixp
+// Support for custom varstores (in .sd files) added.
+//
+// 6 10/05/05 7:10p Felixp
+// support for system reset
+//
+// 5 9/01/05 11:41a Girim
+// Added Help strings in the Exit Menu.
+//
+// 3 7/12/05 11:13a Felixp
+// workaround for VFR compiler bug in varstore handling
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//**********************************************************************
+//
+// Name: Exit.vfr
+//
+// Description:
+// Setup script for the "Exit" top level setup screen
+//
+//**********************************************************************
+//<AMI_FHDR_END>
+
+#include "SetupPrivate.h"
+#define EXIT_FORM_SET
+#define FORM_SET_TYPEDEF
+#include <SetupDefinitions.h>
+#undef FORM_SET_TYPEDEF
+
+formset guid = EXIT_FORM_SET_GUID,
+ title = STRING_TOKEN(STR_EXIT),
+ help = STRING_TOKEN(STR_EXIT_HELP),
+ class = EXIT_FORM_SET_CLASS, subclass = 0,
+
+ SETUP_DATA_VARSTORE
+ AMI_CALLBACK_VARSTORE
+ BOOT_MANAGER_VARSTORE
+ BOOT_NOW_COUNT_VARSTORE
+ EFI_SHELL_VARSTORE
+
+ #define FORM_SET_VARSTORE
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_VARSTORE
+
+ form formid = AUTO_ID(EXIT_MAIN),
+ title = STRING_TOKEN(STR_EXIT);
+
+ suppressif ideqval AMI_CALLBACK.Value == SAVE_AND_EXIT_VALUE;
+ goto EXIT_MAIN,
+ prompt = STRING_TOKEN(STR_SAVE_EXIT),
+ help = STRING_TOKEN(STR_SAVE_EXIT_HELP);
+ endif;
+
+ suppressif ideqval AMI_CALLBACK.Value == DISCARD_AND_EXIT_VALUE;
+ goto EXIT_MAIN,
+ prompt = STRING_TOKEN(STR_DISCARD_EXIT),
+ help = STRING_TOKEN(STR_DISCARD_EXIT_HELP);
+ endif;
+
+ suppressif ideqval AMI_CALLBACK.Value == SAVE_AND_RESET_VALUE;
+ goto EXIT_MAIN,
+ prompt = STRING_TOKEN(STR_SAVE_RESET),
+ help = STRING_TOKEN(STR_SAVE_RESET_HELP);
+ endif;
+
+ suppressif ideqval AMI_CALLBACK.Value == DISCARD_AND_RESET_VALUE;
+ goto EXIT_MAIN,
+ prompt = STRING_TOKEN(STR_DISCARD_RESET),
+ help = STRING_TOKEN(STR_DISCARD_RESET_HELP);
+ endif;
+
+ SEPARATOR
+ SUBTITLE(STRING_TOKEN(STR_SAVE_TITLE))
+ suppressif ideqval AMI_CALLBACK.Value == SAVE_VALUE;
+ goto EXIT_MAIN,
+ prompt = STRING_TOKEN(STR_SAVE),
+ help = STRING_TOKEN(STR_SAVE_HELP);
+ endif;
+
+ suppressif ideqval AMI_CALLBACK.Value == DISCARD_VALUE;
+ goto EXIT_MAIN,
+ prompt = STRING_TOKEN(STR_DISCARD),
+ help = STRING_TOKEN(STR_DISCARD_HELP);
+ endif;
+
+ SEPARATOR
+ suppressif ideqval AMI_CALLBACK.Value == RESTORE_DEFAULTS_VALUE;
+ goto EXIT_MAIN,
+ prompt = STRING_TOKEN(STR_RESTORE_DEFAULTS),
+ help = STRING_TOKEN(STR_RESTORE_DEFAULTS_HELP);
+ endif;
+
+ suppressif ideqval AMI_CALLBACK.Value == SAVE_USER_DEFAULTS_VALUE;
+ goto EXIT_MAIN,
+ prompt = STRING_TOKEN(STR_SAVE_USER_DEFAULTS),
+ help = STRING_TOKEN(STR_SAVE_USER_DEFAULTS_HELP);
+ endif;
+
+ suppressif ideqval AMI_CALLBACK.Value == RESTORE_USER_DEFAULTS_VALUE;
+ goto EXIT_MAIN,
+ prompt = STRING_TOKEN(STR_RESTORE_USER_DEFAULTS),
+ help = STRING_TOKEN(STR_RESTORE_USER_DEFAULTS_HELP);
+ endif;
+
+ SEPARATOR
+ SUBTITLE(STRING_TOKEN(STR_BOOT_OPTIONS))
+#if SETUP_SHOW_ALL_BBS_DEVICES
+ suppressif ideqvallist BOOT_NOW_COUNT.BootCount == 0xFFFF;
+#else
+ suppressif ideqvallist BOOT_MANAGER.BootCount == 0xFFFF;
+#endif.
+ goto EXIT_MAIN,
+ prompt = STRING_TOKEN(STR_EMPTY),
+ help = STRING_TOKEN(STR_EMPTY);
+ endif;
+
+#if !Shell_SUPPORT
+ SEPARATOR
+ suppressif ideqvallist EFI_SHELL.Value == 1;
+ goto EXIT_MAIN,
+ prompt = STRING_TOKEN(STR_EFI_SHELL),
+#if EFI64
+ help = STRING_TOKEN(STR_EFI_SHELL_HELP_IPF);
+#elif EFIx64
+ help = STRING_TOKEN(STR_EFI_SHELL_HELP_X64);
+#else
+ help = STRING_TOKEN(STR_EFI_SHELL_HELP);
+#endif
+ endif;
+#endif
+
+ #define FORM_SET_ITEM
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_ITEM
+ #define FORM_SET_GOTO
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_GOTO
+ endform;
+
+ #define FORM_SET_FORM
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_FORM
+endformset;
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Setup/Logo.bmp b/Board/EM/Setup/Logo.bmp
new file mode 100644
index 0000000..eb195ef
--- /dev/null
+++ b/Board/EM/Setup/Logo.bmp
Binary files differ
diff --git a/Board/EM/Setup/Main.vfr b/Board/EM/Setup/Main.vfr
new file mode 100644
index 0000000..14985b5
--- /dev/null
+++ b/Board/EM/Setup/Main.vfr
@@ -0,0 +1,239 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/BIN/Board/Setup/Main.vfr 20 2/15/11 4:33p Artems $
+//
+// $Revision: 20 $
+//
+// $Date: 2/15/11 4:33p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Board/Setup/Main.vfr $
+//
+// 20 2/15/11 4:33p Artems
+// Replaced TABs with spaces
+//
+// 19 9/07/10 11:05p Felixp
+// Minor fix: Spelling error (EIP 39919)
+//
+// 18 6/11/10 12:22p Felixp
+// AMI_CALLBACK_VARSTORE added
+//
+// 17 6/09/10 10:54p Felixp
+// Setup Customization Support. Hidden form with list of all controls is
+// added.
+// The form is used to generate defaults.
+//
+// 16 2/24/10 11:52a Felixp
+// UEFI Specification Compliancy Level information is added.
+//
+// 15 10/09/09 6:43p Felixp
+// UEFI 2.1 Support (the component is updated to support Framework and
+// UEFI 2.1 HII).
+//
+// 14 6/30/09 11:42a Robert
+// Added Comment and updated parts for coding standards
+//
+// 13 9/26/06 8:57a Felixp
+// Language selection control is enabled
+//
+// 12 8/18/06 11:20a Felixp
+//
+// 11 11/21/05 7:32p Felixp
+// multi-language support removed
+//
+// 10 10/19/05 2:07p Felixp
+// Support for custom varstores (in .sd files) added.
+//
+// 9 10/03/05 6:33p Felixp
+// Access Mode is displayed
+//
+// 8 9/06/05 6:19p Girim
+// Code cleanup.
+//
+// 7 7/19/05 10:06p Girim
+// Moved the Memory to NBSetup.c
+//
+// 5 7/12/05 11:13a Felixp
+// workaround for VFR compiler bug in varstore handling
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//**********************************************************************
+//
+// Name: Main.vfr
+//
+// Description:
+// Setup script for the "Main" top level setup screen
+//
+//**********************************************************************
+//<AMI_FHDR_END>
+
+#include "SetupPrivate.h"
+#define MAIN_FORM_SET
+#define FORM_SET_TYPEDEF
+#include <SetupDefinitions.h>
+#undef FORM_SET_TYPEDEF
+
+formset guid = MAIN_FORM_SET_GUID,
+ title = STRING_TOKEN(STR_MAIN),
+ help = STRING_TOKEN(STR_MAIN_HELP),
+ class = MAIN_FORM_SET_CLASS,
+ subclass = 0,
+
+ SETUP_DATA_VARSTORE
+ LANGUAGE_VARSTORE
+ LANGUAGE_CODES_VARSTORE
+ SYSTEM_ACCESS_VARSTORE
+ AMI_CALLBACK_VARSTORE
+
+ #define FORM_SET_VARSTORE
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_VARSTORE
+
+ form formid = AUTO_ID(MAIN_MAIN), // MAIN
+ title = STRING_TOKEN(STR_MAIN);
+
+ SUBTITLE(STRING_TOKEN(STR_BIOS))
+ INVENTORY(STRING_TOKEN(STR_BIOS_VENDOR_NAME),STRING_TOKEN(STR_BIOS_VENDOR_VALUE))
+ INVENTORY(STRING_TOKEN(STR_BIOS_CORE_VERSION_NAME),STRING_TOKEN(STR_BIOS_CORE_VERSION_VALUE))
+ INVENTORY(STRING_TOKEN(STR_BIOS_COMPLIANCY_NAME),STRING_TOKEN(STR_BIOS_COMPLIANCY_VALUE))
+ INVENTORY(STRING_TOKEN(STR_BIOS_VERSION_NAME),STRING_TOKEN(STR_BIOS_VERSION_VALUE))
+ INVENTORY(STRING_TOKEN(STR_BIOS_DATE_NAME),STRING_TOKEN(STR_BIOS_DATE_VALUE))
+
+
+ #define FORM_SET_ITEM
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_ITEM
+ #define FORM_SET_GOTO
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_GOTO
+
+ SEPARATOR
+ suppressif ideqval LANGUAGE_CODES.Value == 0xFFFF;
+ oneof varid = LANGUAGE.Value,
+ prompt = STRING_TOKEN(STR_LANGUAGE_PROMPT),
+ help = STRING_TOKEN(STR_LANGUAGE_HELP),
+ option
+ text = STRING_TOKEN(STR_EMPTY),
+ value = 0,
+ flags = DEFAULT;
+ option
+ text = STRING_TOKEN(STR_EMPTY),
+ value = 1,
+ flags = 0;
+ endoneof;
+ endif;
+
+ SEPARATOR
+ date
+ year varid = Date.Year,
+ prompt = STRING_TOKEN(STR_DATE),
+ help = STRING_TOKEN(STR_DATE_HELP),
+ minimum = 2005,
+ maximum = 2099,
+ step = 1,
+ default = 2005,
+ month varid = Date.Month,
+ prompt = STRING_TOKEN(STR_DATE),
+ help = STRING_TOKEN(STR_DATE_HELP),
+ minimum = 1,
+ maximum = 12,
+ step = 1,
+ default = 1,
+ day varid = Date.Day,
+ prompt = STRING_TOKEN(STR_DATE),
+ help = STRING_TOKEN(STR_DATE_HELP),
+ minimum = 1,
+ maximum = 31,
+ step = 1,
+ default = 1,
+ enddate;
+
+ time
+ hour varid = Time.Hours,
+ prompt = STRING_TOKEN(STR_TIME),
+ help = STRING_TOKEN(STR_TIME_HELP),
+ minimum = 0,
+ maximum = 23,
+ step = 1, default = 0,
+ minute varid = Time.Minutes,
+ prompt = STRING_TOKEN(STR_TIME),
+ help = STRING_TOKEN(STR_TIME_HELP),
+ minimum = 0,
+ maximum = 59,
+ step = 1,
+ default = 0,
+ second varid = Time.Seconds,
+ prompt = STRING_TOKEN(STR_TIME),
+ help = STRING_TOKEN(STR_TIME_HELP),
+ minimum = 0,
+ maximum = 59,
+ step = 1,
+ default = 0,
+ endtime;
+
+ SEPARATOR
+ suppressif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_ADMIN;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ACCESS_LEVEL),
+ text = STRING_TOKEN(STR_ACCESS_USER),
+ flags = 0,
+ key = 0;
+ endif;
+ suppressif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_ACCESS_LEVEL),
+ text = STRING_TOKEN(STR_ACCESS_ADMIN),
+ flags = 0,
+ key = 0;
+ endif;
+
+ // "suppress if TRUE" is not supported by the Framework VFR Compiler
+ suppressif NOT ideqval SYSTEM_ACCESS.Access == 0x55;
+ goto MAIN_HIDDEN,
+ prompt = STRING_TOKEN(STR_EMPTY),
+ help = STRING_TOKEN(STR_EMPTY);
+ endif;
+ endform;
+ #define FORM_SET_FORM
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_FORM
+
+ form formid = AUTO_ID(MAIN_HIDDEN), // MAIN
+ title = STRING_TOKEN(STR_EMPTY);
+ #define CONTROLS_WITH_DEFAULTS
+ #include <SetupDefinitions.h>
+ #undef CONTROLS_WITH_DEFAULTS
+ endform;
+endformset;
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Setup/Security.vfr b/Board/EM/Setup/Security.vfr
new file mode 100644
index 0000000..cd943d0
--- /dev/null
+++ b/Board/EM/Setup/Security.vfr
@@ -0,0 +1,168 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/BIN/Board/Setup/Security.vfr 19 3/08/11 12:09p Felixp $
+//
+// $Revision: 19 $
+//
+// $Date: 3/08/11 12:09p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Board/Setup/Security.vfr $
+//
+// 19 3/08/11 12:09p Felixp
+// Bug fix (EIP 55443): Password length restriction message is updated
+// to work properly during language switch.
+//
+// 18 6/11/10 12:23p Felixp
+// AMI_CALLBACK_VARSTORE added
+//
+// 17 2/24/10 11:52a Felixp
+// Information about expected password length is added.
+//
+// 16 12/08/09 12:19p Oleksiyy
+// EIP 31784: PASSWORD_MIN_SIZE token added to Setup.sdl and Security.vfr.
+//
+// 15 10/09/09 6:43p Felixp
+// UEFI 2.1 Support (the component is updated to support Framework and
+// UEFI 2.1 HII).
+//
+// 14 6/30/09 2:33p Robert
+// comment corrections
+//
+// 13 6/30/09 11:42a Robert
+// Added Comment and updated parts for coding standards
+//
+// 12 9/05/07 5:26p Felixp
+// IDE Security changed removed (will be added with the future Core/Board
+// labels).
+//
+// 8 12/22/05 7:12p Robert
+// Added new strings for the security page so that it has a better
+// description of what setting the passwords will do
+//
+// 7 11/08/05 5:11a Felixp
+// Update to be complient with TSE 1.15.1044
+//
+// 6 10/19/05 2:07p Felixp
+// Support for custom varstores (in .sd files) added.
+//
+// 5 9/06/05 6:20p Girim
+// Added support for distinguishing the Admin and User Passwords and Code
+// cleanup.
+//
+// 3 7/12/05 11:13a Felixp
+// workaround for VFR compiler bug in varstore handling
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//**********************************************************************
+// Name: Security.vfr
+//
+// Description:
+// Setup script for the "Security" top level setup screen
+//**********************************************************************
+//<AMI_FHDR_END>
+
+#include "SetupPrivate.h"
+#define SECURITY_FORM_SET
+#define FORM_SET_TYPEDEF
+#include <SetupDefinitions.h>
+#undef FORM_SET_TYPEDEF
+
+formset guid = SECURITY_FORM_SET_GUID,
+ title = STRING_TOKEN(STR_SECURITY),
+ help = STRING_TOKEN(STR_SECURITY_HELP),
+ class = SECURITY_FORM_SET_CLASS,
+ subclass = 0,
+
+ SETUP_DATA_VARSTORE
+ SYSTEM_ACCESS_VARSTORE
+ AMITSESETUP_VARSTORE
+ AMI_CALLBACK_VARSTORE
+
+ #define FORM_SET_VARSTORE
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_VARSTORE
+
+ form formid = AUTO_ID(SECURITY_MAIN),
+ title = STRING_TOKEN(STR_SECURITY);
+
+ SUBTITLE(STRING_TOKEN(STR_SECURITY_BANNER_ONE))
+
+ SEPARATOR
+
+ SUBTITLE(STRING_TOKEN(STR_SECURITY_BANNER_TWO))
+ SUBTITLE(STRING_TOKEN(STR_SECURITY_BANNER_THREE))
+ SUBTITLE(STRING_TOKEN(STR_SECURITY_BANNER_FOUR))
+ SUBTITLE(STRING_TOKEN(STR_SECURITY_BANNER_FIVE))
+ SUBTITLE(STRING_TOKEN(STR_SECURITY_BANNER_SIX))
+ SUBTITLE(STRING_TOKEN(STR_SECURITY_BANNER_SEVEN))
+ SUBTITLE(STRING_TOKEN(STR_SECURITY_BANNER_EIGHT))
+ SUBTITLE(STRING_TOKEN(STR_SECURITY_BANNER_NINE))
+ SUBTITLE(STRING_TOKEN(STR_SECURITY_BANNER_TEN))
+ INVENTORY(STRING_TOKEN(STR_MIN_PASSWORD_LENGTH_NAME),STRING_TOKEN(STR_MIN_PASSWORD_LENGTH__VALUE))
+ INVENTORY(STRING_TOKEN(STR_MAX_PASSWORD_LENGTH_NAME),STRING_TOKEN(STR_MAX_PASSWORD_LENGTH__VALUE))
+
+ SEPARATOR
+ SEPARATOR
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ password varid = AMITSESETUP.AdminPassword,
+ prompt = STRING_TOKEN(STR_ADMIN_PASSWORD),
+ help = STRING_TOKEN(STR_ADMIN_PASSWORD_HELP),
+ flags = 0,
+ minsize = PASSWORD_MIN_SIZE,
+ maxsize = PASSWORD_MAX_SIZE,
+ encoding = 1,
+ endpassword;
+ endif; // grayout
+
+ password varid = AMITSESETUP.UserPassword,
+ prompt = STRING_TOKEN(STR_USER_PASSWORD),
+ help = STRING_TOKEN(STR_USER_PASSWORD_HELP),
+ flags = 0,
+ minsize = PASSWORD_MIN_SIZE,
+ maxsize = PASSWORD_MAX_SIZE,
+ encoding = 1,
+ endpassword;
+
+ #define FORM_SET_ITEM
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_ITEM
+ #define FORM_SET_GOTO
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_GOTO
+ endform;
+ #define FORM_SET_FORM
+ #include <SetupDefinitions.h>
+ #undef FORM_SET_FORM
+endformset;
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Setup/Setup.c b/Board/EM/Setup/Setup.c
new file mode 100644
index 0000000..5900319
--- /dev/null
+++ b/Board/EM/Setup/Setup.c
@@ -0,0 +1,1541 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/BIN/Board/Setup/Setup.c 67 10/04/12 4:50p Artems $
+//
+// $Revision: 67 $
+//
+// $Date: 10/04/12 4:50p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Board/Setup/Setup.c $
+//
+// 67 10/04/12 4:50p Artems
+// [TAG] EIP N/A
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Added missing function headers for CHM builder
+// [Files] Setup.c
+//
+// 66 8/29/12 2:42p Artems
+// [TAG] EIP N/A
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] setup control interactive callback doesn't work
+// [RootCause] When there are no runtime-registered callbacks,
+// build-time callbacks don't present in callback list
+// [Solution] Fixed code logic to handle situation with no runtime
+// callbacks
+// [Files] AmiSetupProtocol.c Setup.c
+//
+// 65 8/28/12 4:10p Artems
+// [TAG] EIP N/A
+// [Category] New Feature
+// [Description] Add infrastructure to support runtime registration of
+// setup controls callbacks
+// [Files] Setup.c Setup.h Setup.cif AmiSetupProtocol.c
+// AmiSetupProtocol.h
+//
+// 64 4/12/12 4:41p Artems
+// [TAG] EIP81090
+// [Category] Improvement
+// [Description] Show specification version in 2 or 3 digits format
+// depending on value (i.e. 2.1 or 2.3.1)
+// [Files] Setup.c
+//
+// 63 7/01/11 3:15p Artems
+// Added project build number to project version string
+//
+// 62 6/21/11 9:24a Felixp
+// EIP58960: Callback function is updateed to return status of the eLink
+// based callback routine back to the browser.
+//
+// 61 3/21/11 4:15p Felixp
+// Enhancement: Callback function is updated to set ActionRequest to NONE.
+//
+// 60 3/08/11 12:09p Felixp
+// Bug fix (EIP 55443): Password length restriction message is updated
+// to work properly during language switch.
+//
+// 59 2/08/11 3:32p Artems
+// Reduced function header comment line to fit CHM file
+//
+// 58 2/07/11 5:25p Artems
+// EIP 53374: Replaced tabs with spaces
+//
+// 57 2/04/11 7:59p Artems
+// Added PI 1.1 support
+//
+// 1 2/02/11 5:16p Artems
+//
+// 56 9/07/10 11:05p Felixp
+// Minor fix: Spelling error (EIP 39919)
+//
+// 55 2/24/10 11:50a Felixp
+// Use CORE_COMBINED_VERSION token.
+// Initialize UEFI Specification compliancy string
+// Initialize min/max password length string
+//
+// 54 2/05/10 2:11p Felixp
+//
+// 53 2/05/10 2:10p Felixp
+// Improvements in the Setup Callback Mechanism.
+// - The definition of the type of the Setup Callback Handling
+// function,
+// registered using ITEM_CALLBACK eLink, is moved from Setup.c to
+// Setup.h(Core file).
+// The type is renamed from UPDATE_ITEM to
+// SETUP_ITEM_CALLBACK_HANDLER.
+// - The return type of the Setup Callback Handling function is changed
+// from VOID to EFI_STATUS.
+// The status only matters for UEFI 2.1 Configurations. If UEFI 2.1
+// callback handler returns
+// any status other than EFI_UNSUPPORTED, processing of the
+// callback handler list,
+// defined by the SetupItemCallbacks eLink, is terminated and
+// control is returned back to the HII browser.
+// - New GetCallbackParameters function is added. The function provides
+// access to all callback
+// parameters received from the HII browser.
+//
+// 52 11/25/09 11:40a Felixp
+//
+// 51 11/25/09 11:36a Felixp
+// Action parameter of the Callback function is updated based on UEFI
+// errata
+//
+// 50 11/23/09 5:03p Felixp
+// SetupCallBack structure is updated to use formset GUID from Setup.h.
+// DEFAULT_LANGUAGE is replaced with DEFAULT_LANGUAGE_CODE, which is
+// passed from make file using /D
+//
+// 49 10/21/09 3:21p Felixp
+// LastLang/LastLangCodes - use different variable for UEFI 2.0 and UEFI
+// 2.1 modes
+//
+// 48 10/21/09 3:15p Felixp
+//
+// 46 10/09/09 6:43p Felixp
+// UEFI 2.1 Support (the component is updated to support Framework and
+// UEFI 2.1 HII).
+//
+// 45 7/01/09 2:34p Felixp
+// SetupEntry updated to use absence of LastLangCodes variable (instead of
+// Lang or Setup) as an indication of the first boot.
+//
+// 44 6/30/09 2:33p Robert
+// comment corrections
+//
+// 43 6/30/09 2:28p Robert
+// Comment updates
+//
+// 42 6/30/09 11:42a Robert
+// Added Comment and updated parts for coding standards
+//
+// 41 5/22/09 6:46p Felixp
+// Minor bug fix in InitStrings function
+//
+// 40 2/23/09 10:18a Oleksiyy
+// Bug fix (EIP 18214) Build process failed if too many SetupItemCallbacks
+// in one command line. Solution is to
+// forward SETUP_ITEM_CALLBACK_LIST definition into SetupCallbackList.h
+// file, generated during the build process (in Setup.mak), and include it
+// into Setup.c.
+//
+// 39 10/10/08 4:44p Felixp
+// UEFI2.0 Language Variable added and code to sync up values of the new
+// and old language varaibles.
+//
+// 38 4/18/08 6:32p Felixp
+// Undo previous status code reporting changed.
+// They are not needed because the same status codes are reported by the
+// TSE included with Core 4.6.3.2
+//
+// 36 2/21/08 5:19p Felixp
+// 1. CMOS handling code removed because it's platform specific and does
+// not belong in generic Setup module.
+// 2. Core version string updated to use CORE_BUILD_NUMBER
+//
+// 33 1/24/08 1:21p Felixp
+// ALWAYS_PUBLISH_HII_RESOURCES SDL token added
+//
+// 32 10/30/07 11:24a Felixp
+// SDL tokens to hide advanced, chipset, and security formsets added
+//
+// 31 9/05/07 8:31p Felixp
+// Bug fix in Lang variable initialization.
+//
+// 28 8/31/07 12:43a Felixp
+// SetupEntry updated to support defaults generated during build process.
+//
+// 27 3/19/07 8:50a Felixp
+// Bug fix in SetupEntry
+//
+// 26 3/18/07 12:42p Felixp
+// 1. Code clean up
+// 2. Initialization of LangCodes variable when SetupCallback is not
+// invoked
+//
+// 25 3/06/07 3:12p Vyacheslava
+// Support for initialization of the Lang and LangCodes variables based on
+// available languages in HII.
+//
+// 22 12/05/06 12:25p Felixp
+// Use date/time stamps from TimeStamp.h instead of C __DATE__ macro
+//
+// 20 10/30/06 7:16p Felixp
+// Bug fix in Setup variable initialization (HII 0.92 related changes)
+//
+// 19 10/30/06 5:45p Felixp
+// Updated to be complient with HII Spec. 0.92 (used to be 0.91)
+//
+// 18 10/07/06 11:13a Felixp
+// Add "x64" to the BIOS version in x64 mode
+//
+// 17 5/23/06 4:20a Felixp
+// FW Verion extraction logic changed
+//
+// 12 2/06/06 6:30p Felixp
+// Support for Callbacks added
+//
+// 11 11/08/05 5:13a Felixp
+// 1. Now resources are only loaded if Setup is about to be launched
+// 2. Support for unconditional (w/o user intervention) launch of Setup
+// when NVRAM is blank
+//
+// 8 7/19/05 10:09p Felixp
+// 1. InitString modified to update string for all languages
+// 2. Memory information removed (moved to NB)
+//
+// 6 7/14/05 7:06p Felixp
+// Setup variable initialization with default values added
+//
+// 2 5/31/05 11:21a Felixp
+// CPU frequency display disabled
+//
+// 10 5/24/05 3:07p Felixp
+// Modular setup framework implemented
+//
+// 7 3/25/05 7:12p Felixp
+// SetupInit Protocol installed
+//
+// 5 3/17/05 7:50p Felixp
+// form callback support added
+//
+// 4 3/17/05 2:00p Felixp
+// 1. LoadResources updated to support multiple form sets
+// 2. Setup variable created
+//
+// 2 3/07/05 7:06p Felixp
+// support for embedded resources added
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: Setup.c
+//
+// Description:
+// This file contains supporting functions, data types and data that
+// correspond to the Setup driver.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+//=======================================================================
+// Includes
+#include <DXE.h>
+#include <AmiDxeLib.h>
+#include <Protocol/LoadedImage.h>
+#include <Protocol/DevicePath.h>
+#include <Protocol/Cpu.h>
+#include <Protocol/SimpleTextOut.h >
+#include <Protocol/AmiSetupProtocol.h >
+#include <AmiHobs.h>
+#include <TimeStamp.h>
+#if EFI_SPECIFICATION_VERSION>0x20000
+#include <Protocol/HiiString.h>
+#include <Protocol/HiiDatabase.h>
+#else
+#include <Protocol/Hii.h>
+#endif
+#include "SetupPrivate.h"
+#include <SetupCallbackList.h>
+#include <LangList.h>
+
+//=======================================================================
+// MACROs
+#define STR CONVERT_TO_WSTRING
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+#define LastLangCodes L"PlatformLastLangCodes"
+#define LastLang L"PlatformLastLang"
+#define NativeLangCodes L"PlatformLangCodes"
+#define CompatLangCodes L"LangCodes"
+#define NativeLang L"PlatformLang"
+#define CompatLang L"Lang"
+#define LangNativeListToCompatList RfcListToIsoList
+#define LangToCompat RfcToIso
+#define LangToNative IsoToRfc
+#define GetFirstLang GetFirstRfcLang
+#else
+#define LastLangCodes L"LastLangCodes"
+#define LastLang L"LastLang"
+#define NativeLangCodes L"LangCodes"
+#define CompatLangCodes L"PlatformLangCodes"
+#define NativeLang L"Lang"
+#define CompatLang L"PlatformLang"
+#define LangNativeListToCompatList IsoListToRfcList
+#define LangToCompat IsoToRfc
+#define LangToNative RfcToIso
+#define GetFirstLang GetFirstIsoLang
+#endif
+
+//=======================================================================
+// GUIDs
+static EFI_GUID guidSetup = SETUP_GUID;
+static EFI_GUID guidEfiVar = EFI_GLOBAL_VARIABLE;
+
+//=======================================================================
+// Module specific global variables
+EFI_HANDLE ThisImageHandle = NULL;
+#if EFI_SPECIFICATION_VERSION>0x20000
+static EFI_HII_STRING_PROTOCOL *HiiString=NULL;
+static EFI_HII_DATABASE_PROTOCOL *HiiDatabase=NULL;
+#else
+EFI_HII_PROTOCOL *pHii = NULL;
+#endif
+UINT8 Setup[sizeof(SETUP_DATA)];
+
+//<AMI_THDR_START>
+//----------------------------------------------------------------------------
+// Name: SETUP_CALLBACK
+//
+// Fields: Type Name Description
+// EFI_FORM_CALLBACK_PROTOCOL Callback - Callback Protocol Instance for the
+// Class and SubClass defined below
+// UINT16 Class - Value defined to identify a particular Hii form
+// UINT16 SubClass - Secondary value used to uniquely define the an Hii form
+//
+// Description:
+// These Data Structure define a structure used to match a specific
+// Callback Protocol to an HII Form through the use of Class and SubClass
+// values
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_THDR_END>
+typedef struct {
+#if EFI_SPECIFICATION_VERSION>0x20000
+ EFI_HII_CONFIG_ACCESS_PROTOCOL Callback;
+#else
+ EFI_FORM_CALLBACK_PROTOCOL Callback;
+#endif
+ UINT16 Class, SubClass;
+} SETUP_CALLBACK;
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+EFI_STATUS Callback(
+ IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
+ IN EFI_BROWSER_ACTION Action,
+ IN EFI_QUESTION_ID KeyValue,
+ IN UINT8 Type,
+ IN EFI_IFR_TYPE_VALUE *Value,
+ OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest
+);
+#else
+EFI_STATUS Callback(
+ IN EFI_FORM_CALLBACK_PROTOCOL *This,
+ IN UINT16 KeyValue,
+ IN EFI_IFR_DATA_ARRAY *Data,
+ OUT EFI_HII_CALLBACK_PACKET **Packet
+);
+#endif
+
+EFI_STATUS InitAmiSetupProtocol(VOID);
+
+//<AMI_GHDR_START>
+//----------------------------------------------------------------------------
+// Name: Callback_Protocols
+//
+// Description:
+// These Variable definitions define the different formsets and what Callback
+// protocol should be used for each one
+//
+//----------------------------------------------------------------------------
+//<AMI_GHDR_END>
+SETUP_CALLBACK MainCallbackProtocol = {{NULL,NULL,Callback},MAIN_FORM_SET_CLASS,0};
+SETUP_CALLBACK AdvancedCallbackProtocol = {{NULL,NULL,Callback},ADVANCED_FORM_SET_CLASS,0};
+SETUP_CALLBACK ChipsetCallbackProtocol = {{NULL,NULL,Callback},CHIPSET_FORM_SET_CLASS,0};
+SETUP_CALLBACK BootCallbackProtocol = {{NULL,NULL,Callback},BOOT_FORM_SET_CLASS,0};
+SETUP_CALLBACK SecurityCallbackProtocol = {{NULL,NULL,Callback},SECURITY_FORM_SET_CLASS,0};
+SETUP_CALLBACK ExitCallbackProtocol = {{NULL,NULL,Callback},EXIT_FORM_SET_CLASS,0};
+
+EFI_GUID MainFormSetGuid = MAIN_FORM_SET_GUID;
+EFI_GUID AdvancedFormSetGuid = ADVANCED_FORM_SET_GUID;
+EFI_GUID ChipsetFormSetGuid = CHIPSET_FORM_SET_GUID;
+EFI_GUID BootFormSetGuid = BOOT_FORM_SET_GUID;
+EFI_GUID SecurityFormSetGuid = SECURITY_FORM_SET_GUID;
+EFI_GUID ExitFormSetGuid = EXIT_FORM_SET_GUID;
+
+
+//<AMI_THDR_START>
+//----------------------------------------------------------------------------
+// Name: SetupCallBack
+//
+// Fields: Type Name Description
+// EFI_GUID* pGuid - GUID used for future references
+// EFI_FORM_CALLBACK_PROTOCOL* pFormCallback - Structure that defines the Callback
+// that occurs for this package
+// UINT16 Class - Formset Class of the Form Callback Protocol passed in
+// UINT16 SubClass - Formset Sub Class of the Form Callback Protocol passed in
+// EFI_HII_HANDLE HiiHandle - handle that identifies used Hii Package
+//
+// Description:
+// This array contains the different Hii packages that are used in the system
+//
+// Notes:
+// The HiiHandle is updated in the LoadResources function when the Hii Packages
+// are loaded
+//----------------------------------------------------------------------------
+//<AMI_THDR_END>
+CALLBACK_INFO SetupCallBack[] = {
+ // Last field in every structure will be filled by the Setup
+ { &MainFormSetGuid, &MainCallbackProtocol.Callback, MAIN_FORM_SET_CLASS, 0, 0},
+ { &AdvancedFormSetGuid, &AdvancedCallbackProtocol.Callback, ADVANCED_FORM_SET_CLASS, 0, 0},
+ { &ChipsetFormSetGuid, &ChipsetCallbackProtocol.Callback, CHIPSET_FORM_SET_CLASS, 0, 0},
+ { &BootFormSetGuid, &BootCallbackProtocol.Callback, BOOT_FORM_SET_CLASS, 0, 0},
+ { &SecurityFormSetGuid, &SecurityCallbackProtocol.Callback, SECURITY_FORM_SET_CLASS, 0, 0},
+ { &ExitFormSetGuid, &ExitCallbackProtocol.Callback, EXIT_FORM_SET_CLASS, 0, 0}
+};
+
+//<AMI_GHDR_START>
+//----------------------------------------------------------------------------
+// Name: FormsetVisible
+//
+// Description:
+// This array contains information that indicates to the system whether or not
+// a formset is visible when Setup is loaded.
+//
+// Reference:
+// SetupCallBack
+//
+// Notes:
+// Formset index in this array should match with the formset index in the
+// SetupCallBack array
+//
+//----------------------------------------------------------------------------
+//<AMI_GHDR_END>
+BOOLEAN FormsetVisible[] = {
+ TRUE, //Main formset is always displayed
+ SHOW_ADVANCED_FORMSET, //Advanced formset
+ SHOW_CHIPSET_FORMSET, //Chipset formset
+ TRUE, //Boot formset is always displayed
+ SHOW_SECURITY_FORMSET, //Security formset
+ TRUE //Exit formset is always displayed
+};
+
+#define NUMBER_OF_FORMSETS (sizeof(SetupCallBack)/sizeof(CALLBACK_INFO))
+
+//<AMI_THDR_START>
+//----------------------------------------------------------------------------
+// Name: InitString
+//
+// Description:
+// This function updates a string defined by the StrRef Parameter in the HII
+// database with the string and data passed in.
+//
+// Input:
+// EFI_HII_HANDLE HiiHandle - handle that identifies used Hii Package
+// STRING_REF StrRef - String Token defining string in the database to update
+// CHAR16 *sFormat - string with format descriptors in it
+// ... - extra paramaters that define data that correlate to the format
+// descriptors in the String
+//
+// Output:
+// None
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_THDR_END>
+VOID InitString(EFI_HII_HANDLE HiiHandle, STRING_REF StrRef, CHAR16 *sFormat, ...)
+{
+ CHAR16 s[1024];
+ va_list ArgList = va_start(ArgList,sFormat);
+ Swprintf_s_va_list(s,sizeof(s),sFormat,ArgList);
+ va_end(ArgList);
+ HiiLibSetString(HiiHandle, StrRef, s);
+}
+
+//<AMI_THDR_START>
+//----------------------------------------------------------------------------
+// Name: RevisionToString
+//
+// Description:
+// This function converts spec revision number to string
+//
+// Input:
+// OUT CHAR16 *String - pointer to string to store output
+// IN UINT32 Revision - spec revision number
+//
+// Output:
+// None
+//
+//----------------------------------------------------------------------------
+//<AMI_THDR_END>
+VOID RevisionToString(
+ OUT CHAR16 *String,
+ IN UINT32 Revision
+)
+{
+ UINT16 Major;
+ UINT16 MinorH;
+ UINT16 MinorL;
+ UINT16 *Walker;
+
+ Walker = (UINT16 *)&Revision;
+ Major = *(Walker + 1);
+ MinorH = *Walker / 10;
+ MinorL = *Walker % 10;
+
+ if(MinorL != 0)
+ Swprintf(String, L"%d.%d.%d", Major, MinorH, MinorL);
+ else
+ Swprintf(String, L"%d.%d", Major, MinorH);
+}
+
+
+//<AMI_THDR_START>
+//----------------------------------------------------------------------------
+// Name: InitMain
+//
+// Description:
+// This function updates a few generic BIOS strings that are used on the
+// setup pages.
+//
+// Input:
+// EFI_HII_HANDLE HiiHandle - handle that identifies used Hii Package
+//
+// Output:
+// None
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_THDR_END>
+VOID InitMain(EFI_HII_HANDLE HiiHandle)
+{
+ DXE_SERVICES *DxeTable;
+ CHAR16 efi[10];
+ CHAR16 pi[10];
+
+ ///////////////// BIOS /////////////////////////////////////
+ CHAR16 *FirmwareVendor = (pST->FirmwareVendor)
+ ? pST->FirmwareVendor
+ : CONVERT_TO_WSTRING(CORE_VENDOR);
+ UINT32 FirmwareRevision = (pST->FirmwareRevision)
+ ? pST->FirmwareRevision
+ : CORE_COMBINED_VERSION;
+
+ InitString(
+ HiiHandle,STRING_TOKEN(STR_BIOS_VENDOR_VALUE),
+ L"%s", FirmwareVendor
+ );
+ InitString(
+ HiiHandle,STRING_TOKEN(STR_BIOS_CORE_VERSION_VALUE),
+ L"%d.%d.%d.%d",
+ ((UINT16*)&pST->FirmwareRevision)[1],
+ *(UINT16*)&pST->FirmwareRevision / 100,
+ *(UINT16*)&pST->FirmwareRevision % 100 / 10,
+ *(UINT16*)&pST->FirmwareRevision % 10
+ );
+ InitString(
+ HiiHandle,STRING_TOKEN(STR_BIOS_VERSION_VALUE),
+#if PROJECT_BUILD_NUMBER_IN_TITLE_SUPPORTED && defined (PROJECT_BUILD)
+#ifdef EFIx64
+ L"%s %d.%02d.%03d x64",
+#else
+ L"%s %d.%02d.%03d",
+#endif
+ STR(PROJECT_TAG), PROJECT_MAJOR_VERSION, PROJECT_MINOR_VERSION, PROJECT_BUILD
+#else //#if PROJECT_BUILD_NUMBER_IN_TITLE_SUPPORTED && defined (PROJECT_BUILD)
+#ifdef EFIx64
+ L"%s %d.%02d x64",
+#else
+ L"%s %d.%02d",
+#endif
+ STR(PROJECT_TAG), PROJECT_MAJOR_VERSION, PROJECT_MINOR_VERSION
+#endif//#if PROJECT_BUILD_NUMBER_IN_TITLE_SUPPORTED && defined (PROJECT_BUILD)
+ );
+ InitString(
+ HiiHandle,STRING_TOKEN(STR_BIOS_DATE_VALUE),
+ L"%s %s", L_TODAY, L_NOW
+ );
+ VERIFY_EFI_ERROR(LibGetDxeSvcTbl(&DxeTable));
+
+ RevisionToString(efi, pST->Hdr.Revision);
+ RevisionToString(pi, DxeTable->Hdr.Revision);
+
+ InitString(
+ HiiHandle,STRING_TOKEN(STR_BIOS_COMPLIANCY_VALUE),
+ L"UEFI %s; PI %s", efi, pi
+ );
+}
+
+VOID InitParts(EFI_HII_HANDLE HiiHandle, UINT16 Class);
+
+//<AMI_THDR_START>
+//----------------------------------------------------------------------------
+// Name: InitStrings
+//
+// Description:
+// This function is called for each Formset and initializes strings based on
+// the porting provided and then updates the HII database
+//
+// Input:
+// EFI_HII_HANDLE HiiHandle - handle that that identifies used Hii Package
+// CALLBACK_INFO *pCallBackFound - pointer to an instance of CALLBACK_INFO
+// that works with HiiHandle
+//
+// Output:
+// None
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_THDR_END>
+VOID InitStrings(
+ EFI_HII_HANDLE HiiHandle,
+ CALLBACK_INFO *pCallBackFound
+)
+{
+ if (!pCallBackFound || !pCallBackFound->HiiHandle) return;
+
+ InitParts(HiiHandle, pCallBackFound->Class);
+ switch(pCallBackFound->Class)
+ {
+ case MAIN_FORM_SET_CLASS:
+ InitMain(HiiHandle);
+ break;
+ case SECURITY_FORM_SET_CLASS:
+ {
+ InitString(
+ HiiHandle,STRING_TOKEN(STR_MIN_PASSWORD_LENGTH__VALUE),
+ L"%d", PASSWORD_MIN_SIZE
+ );
+ InitString(
+ HiiHandle,STRING_TOKEN(STR_MAX_PASSWORD_LENGTH__VALUE),
+ L"%d", PASSWORD_MAX_SIZE
+ );
+ break;
+ }
+ }
+#if EFI_SPECIFICATION_VERSION>0x20000
+// TODO: Defaults initialization
+#else
+{
+ EFI_HII_VARIABLE_PACK_LIST *pVarPackList, *pVarPack;
+
+ // Get default values from IFR initialized with default values
+ if (EFI_ERROR(pHii->GetDefaultImage(
+ pHii, HiiHandle, EFI_IFR_FLAG_DEFAULT, &pVarPackList
+ ))) return;
+
+ // Find Setup variable(default varstore) in the returned variable list
+ for(pVarPack = pVarPackList; pVarPack->NextVariablePack != NULL; pVarPack = pVarPack->NextVariablePack)
+ {
+ EFI_HII_VARIABLE_PACK *pVar = pVarPack->VariablePack;
+ UINTN i;
+ UINT8 *p, *q;
+ //default varstore has id set to 0
+ if (pVar->VariableId != 0) continue;
+ //if size does not match, don't update the setup data
+ if (pVar->Header.Length - sizeof(*pVar) - pVar->VariableNameLength != sizeof(Setup))
+ {
+ TRACE((
+ TRACE_DXE_CORE,
+ "ERROR: Setup data size mismatch:\n\t"
+ "Setup variable size: %d\n\t"
+ "Default varstore size: %d\n",
+ sizeof(Setup),
+ pVar->Header.Length - sizeof(*pVar) - pVar->VariableNameLength
+ ));
+ break;
+ }
+ p = (UINT8*)&Setup;
+ q = (UINT8*)(pVar + 1) + pVar->VariableNameLength;
+ for(i = 0; i < sizeof(Setup); i++) p[i] |= q[i];
+ break;
+ }
+ pBS->FreePool(pVarPackList);
+}
+#endif
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: InitLanguages
+//
+// Description:
+// Determine the current language that will be used based on language
+// related EFI Variables.
+//
+// Input:
+// EFI_HII_HANDLE HiiHandle - handle that that identifies used Hii Package
+//
+// Output:
+// None
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID InitLanguages(EFI_HII_HANDLE HiiHandle)
+{
+ UINTN Size = 0;
+#if EFI_SPECIFICATION_VERSION>0x20000
+ EFI_STATUS Status;
+ CHAR8* LangCodes = NULL;
+
+ if (HiiString == NULL) {
+ return;
+ }
+
+ Status = HiiString->GetLanguages(HiiString, HiiHandle, LangCodes, &Size);
+ if (Status==EFI_BUFFER_TOO_SMALL){
+ LangCodes = Malloc(Size);
+ Status = HiiString->GetLanguages(HiiString, HiiHandle, LangCodes, &Size);
+ if (EFI_ERROR(Status)) pBS->FreePool(LangCodes);
+ }
+ if (EFI_ERROR(Status)){
+ Size = sizeof(CONVERT_TO_STRING(DEFAULT_LANGUAGE_CODE));
+ LangCodes = Malloc(Size);
+ pBS->CopyMem(
+ LangCodes, CONVERT_TO_STRING(DEFAULT_LANGUAGE_CODE), Size
+ );
+ }
+#else
+ EFI_STATUS PrimaryStatus;
+ EFI_STATUS SecondaryStatus;
+ UINTN i;
+ UINTN Index = 0;
+ CHAR8* LangCodes = NULL;
+ CHAR16* PrimaryLanguages = NULL;
+ EFI_STRING SecondaryLanguages = NULL;
+
+ if (pHii == NULL) {
+ return;
+ }
+
+ // Get list of available languages
+ PrimaryStatus = pHii->GetPrimaryLanguages( pHii,
+ HiiHandle,
+ &PrimaryLanguages );
+
+ SecondaryStatus = pHii->GetSecondaryLanguages( pHii,
+ HiiHandle,
+ PrimaryLanguages,
+ &SecondaryLanguages );
+
+ if ( !EFI_ERROR(PrimaryStatus) ) {
+ Size = Wcslen(PrimaryLanguages);
+ }
+
+ if ( !EFI_ERROR(SecondaryStatus) ) {
+ Size += Wcslen(SecondaryLanguages);
+ }
+
+ if ( Size == 0 ) {
+ // Primary and Secondary languages are not available
+ Size = 3;
+ LangCodes = Malloc(Size);
+ pBS->CopyMem(
+ LangCodes, CONVERT_TO_STRING(DEFAULT_LANGUAGE_CODE),
+ Size
+ );
+ } else {
+ LangCodes = MallocZ(Size);
+ if ( !EFI_ERROR(PrimaryStatus) ) {
+ // Convert PrimaryLanguages from Unicode to EFI defined ASCII LangCodes
+ for (i = 0; PrimaryLanguages[i] != 0; i++) {
+ LangCodes[Index++] = (CHAR8)PrimaryLanguages[i];
+ }
+ pBS->FreePool(PrimaryLanguages);
+ }
+
+ if ( !EFI_ERROR(SecondaryStatus) ) {
+ // Convert SecondaryLanguages from Unicode to EFI defined ASCII LangCodes
+ for (i = 0; SecondaryLanguages[i] != 0; i++) {
+ LangCodes[Index++] = (CHAR8)SecondaryLanguages[i];
+ }
+
+ pBS->FreePool(SecondaryLanguages);
+ }
+ }
+#endif
+ //LangCodes is a volatile variable and needs to be initialized during every boot
+ //However, this routine is not invoked during every boot,
+ //It is always invoked during the first boot.
+ //During subsequent boots it is only invoked when user is trying to enter Setup
+ //In order to initialize LanCodes when this routine is not invoked, let's create
+ //a non-volatile variable LastLangCodes with the copy of LanCodes.
+ //This copy is used to initialize LanCodes when this routine is not invoked.
+ //(This code is part of SynchornizeLanguageVariables routine)
+ pRS->SetVariable( LastLangCodes,
+ &guidSetup,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
+ Size,
+ LangCodes );
+
+ pBS->FreePool(LangCodes);
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: SetupCallback
+//
+// Description:
+// This function publishes all HII resources and initializes the HII databases
+// There is a token ALWAYS_PUBLISH_HII_RESOURCES that would call this function
+// on every boot not just when the user tries to enter Setup
+//
+// Input:
+// IN EFI_EVENT Event - Event that was triggered
+// IN VOID *Context - data pointer to context information
+//
+// Output:
+// None
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID SetupCallback(IN EFI_EVENT Event, IN VOID *Context)
+{
+ static BOOLEAN ResourcesLoaded = FALSE;
+ UINT32 i;
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+ if ( !HiiString
+ && EFI_ERROR(pBS->LocateProtocol(
+ &gEfiHiiStringProtocolGuid, NULL, &HiiString
+ ))
+ ) return ;
+ if ( !HiiDatabase
+ && EFI_ERROR(pBS->LocateProtocol(
+ &gEfiHiiDatabaseProtocolGuid, NULL, &HiiDatabase
+ ))
+ ) return ;
+#else
+ if (!pHii && EFI_ERROR(pBS->LocateProtocol(&gEfiHiiProtocolGuid, NULL, &pHii))) return ;
+#endif
+ if (Event) pBS->CloseEvent(Event);
+ if (ResourcesLoaded) return;
+ ResourcesLoaded = TRUE;
+ LoadResources(ThisImageHandle, NUMBER_OF_FORMSETS, SetupCallBack, InitStrings);
+ //Get list of available languages and initialize Lang and LangCodes variables
+ //All setup packages share the same string pack
+ //that's why it is enough to only process single pack in the SetupCallBack array.
+ InitLanguages(SetupCallBack[0].HiiHandle);
+ //Hide (remove) formsets if necessary
+ for(i = 0; i < NUMBER_OF_FORMSETS; i++){
+ if (!FormsetVisible[i])
+#if EFI_SPECIFICATION_VERSION>0x20000
+ HiiDatabase->RemovePackageList(
+ HiiDatabase, SetupCallBack[i].HiiHandle
+ );
+#else
+ pHii->RemovePack(pHii, SetupCallBack[i].HiiHandle);
+#endif
+ }
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: IsoToRfc
+//
+// Description:
+// This function takes a language string based on the ISO standard and
+// returns a string that represents the same language in the RFC standard
+//
+// Input:
+// IN CHAR8 *IsoLang - ASCII string that represents language in the ISO format
+//
+// Output:
+// CHAR8 * - String that represents RFC version of the ISO language code passed
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+CHAR8* IsoToRfc(IN CHAR8 *IsoLang, OUT UINTN *RfcLangSize){
+ UINTN i;
+ if (IsoLang == NULL) return NULL;
+ for(i = 0; Iso6392LanguageList[i] != NULL; i++){
+ if (MemCmp(Iso6392LanguageList[i], IsoLang, 3) == 0){
+ if (RfcLangSize!=NULL)
+ *RfcLangSize = Strlen(Rfc4646LanguageList[i])+1;
+ return Rfc4646LanguageList[i];
+ }
+ }
+ return NULL;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: RfcToIso
+//
+// Description:
+// This function takes a language string based on the RFC standard and
+// returns a string that represents the same language in the ISO standard
+//
+// Input:
+// IN CHAR8 *RfcLang - ASCII string that represents a language in RFC standard
+//
+// Output:
+// CHAR8 * - String that represents ISO version of the RFC language code passed
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+CHAR8* RfcToIso(IN CHAR8 *RfcLang, OUT UINTN *IsoLangSize){
+ UINTN i;
+ if (RfcLang == NULL) return NULL;
+ for(i = 0; Rfc4646LanguageList[i] != NULL; i++){
+ if (Strcmp(Rfc4646LanguageList[i],RfcLang) == 0){
+ if (IsoLangSize!=NULL) *IsoLangSize = 3;
+ return Iso6392LanguageList[i];
+ }
+ }
+ return NULL;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: IsoListToRfcList
+//
+// Description:
+// This function coverts list of ISO language tags to a list of RFC language tags
+//
+// Input:
+// IN CHAR8 *IsoList - string that represents list of one or more ISO language strings
+// IN UINTN IsoListSize - number of ISO entries in the list
+// OUT UINTN *RfcListSize - pointer to store size of output buffer
+//
+// Output:
+// VOID * - String that represents the RFC version of the ISO language codes passed
+//
+// Notes:
+// ISO tags are 3 characters in size
+// RFC tags are 42(max) characters plus a ';' that ends each tag
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+CHAR8* IsoListToRfcList(IN CHAR8 *IsoList, IN UINTN IsoListSize, OUT UINTN *RfcListSize){
+ CHAR8 *IsoPtr;
+ CHAR8 *RfcList;
+ CHAR8 *RfcPtr;
+
+ if (IsoList==NULL || *IsoList==0 || IsoListSize<3) return NULL;
+ //IsoListSize/3 = number of languages in the list
+ //RFC4646 defines max lang tag size of 42, plus ';'
+ RfcList = Malloc(IsoListSize / 3 * (42 + 1));
+ if (RfcList == NULL) return NULL;
+ for(IsoPtr = IsoList, RfcPtr = RfcList;
+ IsoPtr < IsoList + IsoListSize;
+ IsoPtr += 3
+ ){
+ UINTN Length;
+ CHAR8 *TmpPtr = IsoToRfc(IsoPtr, &Length);
+
+ if (TmpPtr == NULL) continue;
+ Length--; // string length = string size - 1
+ MemCpy(RfcPtr, TmpPtr, Length);
+ RfcPtr += Length;
+ *RfcPtr++ = ';';
+ }
+ if (RfcPtr == RfcList){
+ pBS->FreePool(RfcList);
+ if (RfcListSize) *RfcListSize=0;
+ return NULL;
+ }
+ *(RfcPtr - 1) = 0;
+ if (RfcListSize) *RfcListSize=RfcPtr-RfcList;
+ return RfcList;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: RfcListToIsoList
+//
+// Description:
+// This function coverts list of RFC language tags to a list of ISO language tags
+//
+// Input:
+// IN CHAR8 *RfcList - string that represents list of one or more RFC language strings
+// IN UINTN RfcListSize - number of RFC entries in the list
+// OUT UINTN *IsoListSize - pointer to store size of output buffer
+//
+// Output:
+// CHAR8 * - A string that corresponds to the ISO version of the RFC language codes
+// passed
+//
+// Notes:
+// ISO tags are 3 characters in size
+// RFC tags are 42(max) characters plus a ';' that ends each tag
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+CHAR8* RfcListToIsoList(IN CHAR8 *RfcList, IN UINTN RfcListSize, OUT UINTN *IsoListSize){
+ UINTN Size;
+ CHAR8 *RfcPtr, *RfcEndPtr;
+ CHAR8 *IsoPtr;
+ CHAR8 *IsoList;
+
+ if (RfcList==NULL || *RfcList==0) return NULL;
+ //calculate number of languages in the RfcList
+ for(Size=3, RfcPtr=RfcList; *RfcPtr!=0; RfcPtr++){
+ if (*RfcPtr==';') Size+=3;
+ }
+ IsoList = Malloc(Size);
+ IsoPtr = IsoList;
+ RfcEndPtr = RfcList;
+ while(RfcEndPtr < RfcList+RfcListSize){
+ CHAR8 *IsoLang;
+ CHAR8 OriginalChar;
+ RfcPtr = RfcEndPtr;
+ while(*RfcEndPtr!=';'&&*RfcEndPtr!=0) RfcEndPtr++;
+ OriginalChar = *RfcEndPtr;
+ *RfcEndPtr = 0;
+ IsoLang=RfcToIso(RfcPtr,NULL);
+ if (IsoLang!=NULL){
+ MemCpy(IsoPtr, IsoLang, 3);
+ IsoPtr += 3;
+ }
+ *RfcEndPtr = OriginalChar;
+ RfcEndPtr++;
+ }
+ if (IsoPtr==IsoList){
+ pBS->FreePool(IsoList);
+ if (IsoListSize) *IsoListSize=0;
+ return NULL;
+ }
+ if (IsoListSize) *IsoListSize=IsoPtr-IsoList;
+ return IsoList;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: GetFirstIsoLang
+//
+// Description:
+// This function returns first language from passed ISO list
+//
+// Input:
+// IN CHAR8 *IsoList - string that represents list of one or more ISO languages
+// OUT UINTN *LangSize - pointer to store size of output buffer
+//
+// Output:
+// CHAR8 * - A string that contains first language
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+CHAR8* GetFirstIsoLang(CHAR8* IsoList, UINTN *LangSize){
+ if (LangSize) *LangSize=3;
+ return IsoList;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: GetFirstRfcLang
+//
+// Description:
+// This function returns first language from passed RFC list
+//
+// Input:
+// IN CHAR8 *RfcList - string that represents list of one or more RFC languages
+// OUT UINTN *LangSize - pointer to store size of output buffer
+//
+// Output:
+// CHAR8 * - A string that contains first language
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+CHAR8* GetFirstRfcLang(CHAR8* RfcList, UINTN *LangSize){
+ CHAR8 *RfcPtr;
+
+ for(RfcPtr=RfcList; *RfcPtr!=0 && *RfcPtr!=';'; RfcPtr++);
+ *RfcPtr=0;
+ if (LangSize) *LangSize=RfcPtr-RfcList+1;
+ return RfcList;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: GetLangVariable
+//
+// Description:
+// This function returns language variable stored in NVRAM
+//
+// Input:
+// IN CHAR16 *VariableName - Human-readable name of language variable
+// EFI_GUID *VariableGuid - pointer to variable GUID
+// UINTN *VariableSize - pointer to store output buffer size
+//
+// Output:
+// CHAR8 * - A string that contains list of languages supported by platform
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+CHAR8* GetLangVariable(
+ CHAR16 *VariableName, EFI_GUID *VariableGuid, UINTN *VariableSize
+){
+ UINTN Size = 0;
+ CHAR8 *Buffer = NULL;
+ EFI_STATUS Status;
+
+ Status = GetEfiVariable(VariableName, VariableGuid, NULL, &Size, &Buffer);
+ if (EFI_ERROR(Status)) Buffer=NULL;
+ else if (VariableSize!=NULL) *VariableSize=Size;
+ return Buffer;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SetLangCodes
+//
+// Description:
+// This function stores "PlatformLangCodes" variable
+//
+// Input:
+// IN CHAR16 *VariableName - Human-readable name of language variable
+// CHAR8* LangBuffer - pointer to list of language codes to store
+// UINTN LangBufferSize - size of the passed buffer
+//
+// Output:
+// None
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID SetLangCodes(CHAR16 *VariableName, CHAR8* LangBuffer, UINTN LangBufferSize){
+ if (LangBuffer==NULL) return;
+ pRS->SetVariable(
+ VariableName, &guidEfiVar,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS,
+ LangBufferSize, LangBuffer
+ );
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SetLang
+//
+// Description:
+// This function stores "PlatformLang" variable
+//
+// Input:
+// IN CHAR16 *VariableName - Human-readable name of language variable
+// CHAR8* LangBuffer - pointer to alanguage code to store
+// UINTN LangBufferSize - size of the passed buffer
+//
+// Output:
+// None
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID SetLang(CHAR16 *VariableName, CHAR8* LangBuffer, UINTN LangBufferSize){
+ if (LangBuffer==NULL) return;
+ pRS->SetVariable(
+ VariableName, &guidEfiVar,
+ EFI_VARIABLE_NON_VOLATILE |
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS,
+ LangBufferSize, LangBuffer
+ );
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SynchornizeLanguageVariables
+//
+// Description:
+// This function makes sure that all the Language variable are set to the
+// same value.
+//
+// Input:
+// None
+//
+// Output:
+// None
+//
+// Notes:
+// Uses the following NVRAM variables
+// LangCodes, PlatformLangCodes, Lang, PlatformLang, LastLang
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID SynchornizeLanguageVariables(){
+ CHAR8 *NativeLangBuffer;
+ CHAR8 *CompatLangBuffer;
+ CHAR8 *NativeLangCodesBuffer;
+ CHAR8 *CompatLangCodesBuffer;
+ UINTN NativeLangSize;
+ UINTN CompatLangSize;
+ UINTN NativeLangCodesSize;
+ UINTN CompatLangCodesSize;
+ BOOLEAN FreeNativeLangBuffer;
+
+ //Set LanCodes variables
+ NativeLangCodesBuffer = GetLangVariable(LastLangCodes, &guidSetup, &NativeLangCodesSize);
+ SetLangCodes(NativeLangCodes, NativeLangCodesBuffer, NativeLangCodesSize);
+ CompatLangCodesBuffer = LangNativeListToCompatList(
+ NativeLangCodesBuffer, NativeLangCodesSize, &CompatLangCodesSize
+ );
+ SetLangCodes(CompatLangCodes, CompatLangCodesBuffer, CompatLangCodesSize);
+ pBS->FreePool(CompatLangCodesBuffer);
+ FreeNativeLangBuffer = FALSE;
+
+ //Set Lang variables
+ NativeLangBuffer = GetLangVariable(NativeLang, &guidEfiVar, &NativeLangSize);
+ CompatLangBuffer = GetLangVariable(CompatLang, &guidEfiVar, &CompatLangSize);
+ if (!NativeLangBuffer && CompatLangBuffer){
+ //Derive NativeLang value from the CompatLang
+ NativeLangBuffer = LangToNative(CompatLangBuffer, &NativeLangSize);
+ SetLang(NativeLang, NativeLangBuffer, NativeLangSize);
+ pBS->FreePool(CompatLangBuffer);
+ }else if (NativeLangBuffer && !CompatLangBuffer) {
+ //Derive CompatLang value from the NativeLang
+ CompatLangBuffer = LangToCompat(NativeLangBuffer,&CompatLangSize);
+ SetLang(CompatLang,CompatLangBuffer,CompatLangSize);
+ FreeNativeLangBuffer = TRUE;
+ }else if (!NativeLangBuffer && !CompatLangBuffer) {
+ //Set NativeLang to the first language from the NativeLangCodes list
+ NativeLangBuffer = GetFirstLang(NativeLangCodesBuffer, &NativeLangSize);
+ SetLang(NativeLang, NativeLangBuffer, NativeLangSize);
+ //Derive CompatLang value from the NativeLang
+ CompatLangBuffer = LangToCompat(NativeLangBuffer,&CompatLangSize);
+ SetLang(CompatLang,CompatLangBuffer,CompatLangSize);
+ }else{ //NativeLang && CompatLang
+ CHAR8 *CompatLangInNativeFormat = LangToNative(CompatLangBuffer,NULL);
+ if (!LanguageCodesEqual(CompatLangInNativeFormat,NativeLangBuffer)){
+ CHAR8 *LastLangBuffer=GetLangVariable(LastLang, &guidSetup, NULL);
+ if (LastLangBuffer && LanguageCodesEqual(LastLangBuffer,NativeLangBuffer)){
+ pBS->FreePool(NativeLangBuffer);
+ //Derive NativeLang value from the CompatLang
+ NativeLangBuffer = LangToNative(CompatLangBuffer, &NativeLangSize);
+ SetLang(NativeLang, NativeLangBuffer, NativeLangSize);
+ }else{
+ pBS->FreePool(CompatLangBuffer);
+ //Derive CompatLang value from the NativeLang
+ CompatLangBuffer = LangToCompat(NativeLangBuffer,&CompatLangSize);
+ SetLang(CompatLang,CompatLangBuffer,CompatLangSize);
+ FreeNativeLangBuffer = TRUE;
+ }
+ pBS->FreePool(LastLangBuffer);
+ }
+ }
+ pRS->SetVariable(
+ LastLang, &guidSetup,
+ EFI_VARIABLE_NON_VOLATILE |
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ NativeLangSize, NativeLangBuffer
+ );
+ if (FreeNativeLangBuffer) pBS->FreePool(NativeLangBuffer);
+ pBS->FreePool(NativeLangCodesBuffer);
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: IsVarisbleExist
+//
+// Description:
+// Helper routine that checks if a given variable exists
+//
+// Input:
+// IN CHAR16 *VariableName - Name of the variable to check on
+// IN EFI_GUID *VendorGuid - GUID of the variable to check on
+//
+// Output:
+// TRUE - if variable exsits
+// FALSE - if variable does not exist
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN IsVariableExist(IN CHAR16 *VariableName, IN EFI_GUID *VendorGuid){
+ UINTN Size=0;
+ return
+ pRS->GetVariable(VariableName, VendorGuid, NULL, &Size, NULL)
+ == EFI_BUFFER_TOO_SMALL;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SetupEntry
+//
+// Description:
+// This function is the entry point for the Setup driver. It registers the
+// the Setup callback functions and then it checks if the
+// "Setup" and "Lang" variables are defined. If not it is a first boot
+// (first flash or first boot after BIOS upgrade) and these variables will
+// need to be defined.
+// If "Setup" and "Lang" variables are defined, then make sure the language
+// variables all agree and then return
+//
+// Input:
+// IN EFI_HANDLE ImageHandle - Image handle
+// IN EFI_SYSTEM_TABLE *SystemTable - pointer to the UEFI System Table
+//
+// Output:
+// EFI_SUCCESS
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS SetupEntry(
+ IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ static EFI_EVENT SetupEnterEvent;
+ static EFI_GUID guidSetupEnter = AMITSE_SETUP_ENTER_GUID;
+#if FORCE_USER_TO_SETUP_ON_FIRST_BOOT
+ static UINT32 BootFlow = BOOT_FLOW_CONDITION_FIRST_BOOT;
+ static EFI_GUID guidBootFlow = BOOT_FLOW_VARIABLE_GUID;
+#endif
+
+ EFI_HANDLE Handle=NULL;
+
+ ThisImageHandle = ImageHandle;
+ InitAmiLib(ImageHandle,SystemTable);
+ InitAmiSetupProtocol();
+ pBS->SetMem(Setup, sizeof(Setup), 0);
+
+ if (!IsVariableExist(LastLangCodes, &guidSetup))
+ { //If LastLangCodes Variable is not found,
+ //this is first boot after FW upgrade.
+ //We have to submit resources to HII to get Setup defaults
+ //and list of supported languages.
+ //After that we have to:
+ // 1. If Setup variable is missing,
+ // initialize it with Defaults
+ // 2. If Lang is missing, initialize
+ // Lang variable.
+ // 3. Force user to go to Setup
+ // ( if FORCE_USER_TO_SETUP_ON_FIRST_BOOT SDL token is on).
+ SetupCallback(NULL, NULL); //submit resources to HII and get defaults
+ //Setup global variable is initialized during SetupCallback
+#if EFI_SPECIFICATION_VERSION>0x20000
+// TODO: Defaults initialization
+#else
+ if (!IsVariableExist(L"Setup", &guidSetup))
+ pRS->SetVariable(
+ L"Setup", &guidSetup,
+ EFI_VARIABLE_NON_VOLATILE
+ | EFI_VARIABLE_BOOTSERVICE_ACCESS
+ | EFI_VARIABLE_RUNTIME_ACCESS,
+ sizeof(Setup), &Setup
+ );
+#endif
+#if FORCE_USER_TO_SETUP_ON_FIRST_BOOT
+ if (!IsVariableExist(L"BootFlow", &guidBootFlow)){
+ return pRS->SetVariable(
+ L"BootFlow", &guidBootFlow,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ sizeof(BootFlow), &BootFlow);
+ }
+#endif
+ }
+ else
+ { //otherwise
+ // Register setup callbacks to submit resources to HII
+ // only if/when setup is launched
+#if ALWAYS_PUBLISH_HII_RESOURCES
+ SetupCallback(NULL, NULL);
+#else
+ VOID *pSetupRegistration;
+ RegisterProtocolCallback(
+ &guidSetupEnter, SetupCallback,
+ NULL,&SetupEnterEvent, &pSetupRegistration
+ );
+#endif
+ }
+ SynchornizeLanguageVariables();
+ return EFI_SUCCESS;
+}
+
+//<AMI_THDR_START>
+//----------------------------------------------------------------------------
+// Name: SETUP_ITEM_CALLBACK
+//
+// Fields: Type Name Description
+// UINT16 Class - Primary identification value of an Hii Formset
+// UINT16 SubClass - Secondary identification value of an Hii Formset
+// UINT16 Key - A unique value that identifies a specific item on a setup form
+// SETUP_ITEM_CALLBACK_HANDLER *UpdateItem - function used to update an item
+// defined by the Class, SubClass and Key parameters
+//
+// Description:
+// This Data Structure is used by the setup infrastructure to define
+// callback functions that should be used for interacting with setup forms
+// or individual questions.
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+//<AMI_THDR_END>
+
+
+// Brings the definitions of the SDL token defined list of callbacks into this
+// file as a list of functions that can be called
+#define ITEM_CALLBACK(Class,Subclass,Key,Callback) Callback
+extern SETUP_ITEM_CALLBACK_HANDLER SETUP_ITEM_CALLBACK_LIST EndOfList;
+#undef ITEM_CALLBACK
+
+// This creates an array of callbacks to be used
+#define ITEM_CALLBACK(Class,Subclass,Key,Callback) {Class,Subclass,Key,&Callback}
+SETUP_ITEM_CALLBACK SetupItemCallback[] = { SETUP_ITEM_CALLBACK_LIST {0,0,0,NULL} };
+
+CALLBACK_PARAMETERS *CallbackParametersPtr = NULL;
+CALLBACK_PARAMETERS* GetCallbackParameters(){
+ return CallbackParametersPtr;
+}
+
+static AMI_SETUP_PROTOCOL *AmiSetupProtocol = NULL;
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: Callback
+//
+// Description:
+// This function is used to identify the function to call when an interactive
+// item has been triggered in the setup browser based on the information in
+// the Callback protocol and the SetupCallBack Array
+//
+// Input:
+// IN EFI_FORM_CALLBACK_PROTOCOL *This - Pointer to the instance of the callback
+// protocol
+// IN UINT16 KeyValue - Unique value that defines the type of data to expect in
+// the Data parameter
+// IN EFI_IFR_DATA_ARRAY *Data - Data defined by KeyValue Parameter
+// OUT EFI_HII_CALLBACK_PACKET **Packet - Data passed from the Callback back to
+// the setup Browser
+//
+// Output:
+// EFI_SUCCESS
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+#if EFI_SPECIFICATION_VERSION>0x20000
+EFI_STATUS Callback(
+ IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
+ IN EFI_BROWSER_ACTION Action,
+ IN EFI_QUESTION_ID KeyValue,
+ IN UINT8 Type,
+ IN EFI_IFR_TYPE_VALUE *Value,
+ OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest
+)
+#else
+EFI_STATUS Callback(
+ IN EFI_FORM_CALLBACK_PROTOCOL *This,
+ IN UINT16 KeyValue,
+ IN EFI_IFR_DATA_ARRAY *Data,
+ OUT EFI_HII_CALLBACK_PACKET **Packet
+)
+#endif
+{
+ UINTN i;
+ SETUP_CALLBACK *pCallback = (SETUP_CALLBACK*)This;
+ CALLBACK_PARAMETERS CallbackParameters;
+ EFI_STATUS Status;
+ SETUP_ITEM_CALLBACK *SetupItemCallbacks = NULL;
+ UINTN FixedSize = sizeof(SetupItemCallback);
+ UINTN VarSize = 0;
+ UINT8 *CopyPointer;
+ BOOLEAN AllocatedBuffer = FALSE;
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+ CallbackParameters.This = (VOID*)This;
+ CallbackParameters.Action = Action;
+ CallbackParameters.KeyValue = KeyValue;
+ CallbackParameters.Type = Type;
+ CallbackParameters.Value = Value;
+ CallbackParameters.ActionRequest = ActionRequest;
+ if (ActionRequest) *ActionRequest=EFI_BROWSER_ACTION_REQUEST_NONE;
+ Status = EFI_UNSUPPORTED;
+#else
+ CallbackParameters.This = This;
+ CallbackParameters.KeyValue = KeyValue;
+ CallbackParameters.Data = Data;
+ CallbackParameters.Packet = Packet;
+ Status = EFI_SUCCESS;
+#endif
+
+ CallbackParametersPtr = &CallbackParameters;
+
+ if(AmiSetupProtocol == NULL) {
+ Status = pBS->LocateProtocol(&AmiSetupProtocolGuid, NULL, &AmiSetupProtocol);
+ }
+
+//first get callbacks, registered at runtime
+ Status = AmiSetupProtocol->GetCallbacks(&VarSize, SetupItemCallbacks);
+ if(Status == EFI_NOT_FOUND) { //no runtime callbacks registered
+ SetupItemCallbacks = SetupItemCallback;
+ } else if(Status == EFI_BUFFER_TOO_SMALL) {
+ Status = pBS->AllocatePool(EfiBootServicesData, VarSize + FixedSize, &SetupItemCallbacks);
+ if(EFI_ERROR(Status))
+ return Status;
+ AllocatedBuffer = TRUE;
+ Status = AmiSetupProtocol->GetCallbacks(&VarSize, SetupItemCallbacks);
+ //now add callbacks registered at build time via eLink
+ CopyPointer = (UINT8 *)SetupItemCallbacks;
+ CopyPointer += VarSize;
+ MemCpy(CopyPointer, SetupItemCallback, FixedSize);
+ }
+
+ for(i=0; i<NUMBER_OF_FORMSETS; i++)
+ if (SetupCallBack[i].Class == pCallback->Class && SetupCallBack[i].SubClass == pCallback->SubClass)
+ {
+ SETUP_ITEM_CALLBACK *pItemCallback = SetupItemCallbacks;
+ while(pItemCallback->UpdateItem)
+ {
+ if ( pItemCallback->Class == pCallback->Class
+ && pItemCallback->SubClass == pCallback->SubClass
+ && pItemCallback->Key == KeyValue
+ ){
+ Status = pItemCallback->UpdateItem(
+ SetupCallBack[i].HiiHandle,
+ pItemCallback->Class, pItemCallback->SubClass,
+ KeyValue
+ );
+#if EFI_SPECIFICATION_VERSION>0x20000
+ if (Status != EFI_UNSUPPORTED) break;
+#endif
+ }
+ pItemCallback++;
+ }
+ }
+ CallbackParametersPtr = NULL;
+ if(AllocatedBuffer)
+ pBS->FreePool(SetupItemCallbacks);
+ return Status;
+}
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Setup/Setup.cif b/Board/EM/Setup/Setup.cif
new file mode 100644
index 0000000..36a7790
--- /dev/null
+++ b/Board/EM/Setup/Setup.cif
@@ -0,0 +1,23 @@
+<component>
+ name = "Setup"
+ category = ModulePart
+ LocalRoot = "Board\em\Setup\"
+ RefName = "Setup"
+[files]
+"Setup.sdl"
+"Setup.mak"
+"Setup.c"
+"SetupPrivate.h"
+"Setup.dxs"
+"Setup.uni"
+"Main.vfr"
+"Advanced.vfr"
+"Chipset.vfr"
+"Boot.vfr"
+"Logo.bmp"
+"Security.vfr"
+"Exit.vfr"
+"AmiSetupProtocol.c"
+[parts]
+"AmiSetupProtocol"
+<endComponent>
diff --git a/Board/EM/Setup/Setup.dxs b/Board/EM/Setup/Setup.dxs
new file mode 100644
index 0000000..98b64a6
--- /dev/null
+++ b/Board/EM/Setup/Setup.dxs
@@ -0,0 +1,63 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/BIN/Board/Setup/Setup.dxs 6 2/15/11 4:29p Artems $
+//
+// $Revision: 6 $
+//
+// $Date: 2/15/11 4:29p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Board/Setup/Setup.dxs $
+//
+// 6 2/15/11 4:29p Artems
+// Replaced TABs with spaces
+//
+// 5 6/30/09 11:42a Robert
+// Added Comment and updated parts for coding standards
+//
+// 3 8/22/05 5:30p Felixp
+// dependency from ConsoleControl so that Setup will be started once
+// all devices are connected
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: Setup.dxs
+//
+// Description:
+// Dependancy expression for the Setup component
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+#include <Protocol/ConsoleControl.h>
+
+DEPENDENCY_START
+CONSOLE_IN_DEVICES_STARTED_PROTOCOL_GUID
+DEPENDENCY_END
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/Setup/Setup.mak b/Board/EM/Setup/Setup.mak
new file mode 100644
index 0000000..e156eff
--- /dev/null
+++ b/Board/EM/Setup/Setup.mak
@@ -0,0 +1,259 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/BIN/Board/Setup/Setup.mak 37 3/02/11 12:06p Felixp $
+#
+# $Revision: 37 $
+#
+# $Date: 3/02/11 12:06p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/BIN/Board/Setup/Setup.mak $
+#
+# 37 3/02/11 12:06p Felixp
+# EIP 54915 (Enhancement):
+# Method of generation of the $(BUILD_DIR)\SetupCallbackList.h header is
+# changed
+# to support larger number of callbacks(longer value of the
+# SETUP_ITEM_CALLBACK_LIST macro)
+# registered under SetupItemCallbacks eLink
+#
+# 36 10/06/10 2:34p Felixp
+# Make the make file compatible with Core 4.6.4.0
+#
+# 35 6/09/10 10:53p Felixp
+# Setup Customization Support.
+#
+# 34 2/05/10 12:26p Felixp
+#
+# 33 2/05/10 11:37a Felixp
+# LOGO_FILE_NAME SDL tokens is added to support logo file overrides.
+#
+# 32 11/23/09 5:04p Felixp
+# Initialize DEFAULT_LANGUAGE_CODE macro based on value of the
+# DEFAULT_LANGUAGE token using /D option.
+#
+# 31 10/21/09 3:10p Felixp
+# UEFI2.1 related: start auto-id generated by VfrId from 1000 to avoid
+# conflicts with question ID assigned by VFR compiler
+# (requires new version of VfrId)
+#
+# 30 10/09/09 6:43p Felixp
+# UEFI 2.1 Support (the component is updated to support Framework and
+# UEFI 2.1 HII).
+#
+# 29 6/30/09 11:42a Robert
+# Added Comment and updated parts for coding standards
+#
+# 28 5/22/09 6:48p Felixp
+#
+# 27 3/05/09 1:23p Felixp
+# Improvement:
+# Custom commands for the $(BUILD_DIR)\SetupStrTokens.h target are
+# replaced with the invocation of the standard (rules.mak based) make
+# file.
+# No functionality changes.
+#
+# 26 2/23/09 10:16a Oleksiyy
+# Bug fix (EIP 18214) Build process failed if too many SetupItemCallbacks
+# in one command line. Solution is to
+# forward SETUP_ITEM_CALLBACK_LIST definition into SetupCallbackList.h
+# file, generated during the build process (in Setup.mak), and include it
+# into Setup.c.
+#
+#
+# 25 10/30/07 11:24a Felixp
+# SDL tokens to hide advanced, chipset, and security formsets added
+#
+# 24 9/05/07 12:28p Felixp
+# Dependency from $(BUILD_DIR)\AUTOID.h added.
+#
+# 23 8/31/07 4:46p Felixp
+# Previous changes removed.
+#
+# 20 1/22/07 2:58p Felixp
+# CJK support added (scan string packs with font tool).
+#
+# 19 12/05/06 12:25p Felixp
+# Use date/time stamps from TimeStamp.h instead of C __DATE__ macro
+#
+# 18 2/06/06 6:30p Felixp
+# Support for Callbacks added
+#
+# 13 8/23/05 4:07p Felixp
+# depndency from token.mak added
+#
+# 2 5/31/05 11:20a Felixp
+# Advanced and Chipset Screens Disabled
+#
+# 5 5/24/05 3:07p Felixp
+# Modular setup framework implemented
+#
+# 2 3/07/05 7:08p Felixp
+# when EMBEDDED_RESOURCES is set to 1, setup will be built as application
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: Setup.mak
+#
+# Description:
+# This file contains the build commands for the setup component.
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all : Setup
+
+SetupData : Setup
+
+SETUP_FORMSETS=\
+$(Setup_DIR)\Main.vfr\
+$(Setup_DIR)\Advanced.vfr\
+$(Setup_DIR)\Chipset.vfr\
+$(Setup_DIR)\Boot.vfr\
+$(Setup_DIR)\Security.vfr\
+$(Setup_DIR)\Exit.vfr
+
+VFR_PACKS_TEMP=$(SETUP_FORMSETS: = $(BUILD_DIR^)\)
+VFR_PACKS=$(VFR_PACKS_TEMP:.vfr=.hpk)
+
+!IF $(CORE_COMBINED_VERSION)<262785
+Setup : $(BUILD_DIR)\Setup.mak SetupSdbs SetupFiles SetupBin $(BUILD_DIR)\Logo.FFS
+!ELSE
+PREPARE : $(BUILD_DIR)\Setup.mak SetupSdbs SetupFiles
+$(BUILD_DIR)\SetupStrTokens.h : SetupResources
+Setup : SetupBin $(BUILD_DIR)\Logo.FFS
+!ENDIF
+
+SetupSdbs :
+
+$(BUILD_DIR)\Setup.mak : $(Setup_DIR)\$(@B).cif $(Setup_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(Setup_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+SETUP_AUTO_GENERATED_FILES=$(BUILD_DIR)\AUTOID.h $(BUILD_DIR)\LangList.h $(BUILD_DIR)\SetupStrTokens.h
+SetupFiles : $(SETUP_AUTO_GENERATED_FILES)
+
+$(BUILD_DIR)\AUTOID.h : $(SETUP_FORMSETS) $(SETUP_DEFINITIONS) $(Setup_DIR)\Setup.mak $(BUILD_DIR)\token.mak
+!IF $(EFI_SPECIFICATION_VERSION)>0x20000
+ $(VFRID) /s1024 /o$(BUILD_DIR)\AUTOID.h $(SETUP_FORMSETS) $(SETUP_DEFINITIONS)
+!ELSE
+ $(VFRID) /o$(BUILD_DIR)\AUTOID.h $(SETUP_FORMSETS) $(SETUP_DEFINITIONS)
+!ENDIF
+ type << >>$(BUILD_DIR)\AUTOID.h
+#ifndef AUTO_ID
+#define AUTO_ID(x) x
+#endif
+<<
+
+SETUP_STRGATHER_FLAGS=-db $(BUILD_DIR)\Setup.sdb
+!IF "$(SETUP_SDBS)"!=""
+SETUP_STRGATHER_FLAGS=$(SETUP_STRGATHER_FLAGS) -db $(SETUP_SDBS: = -db )
+!ENDIF
+
+!IF $(CORE_COMBINED_VERSION)<262785
+$(BUILD_DIR)\SetupStrTokens.h : $(SETUP_FORMSETS) $(SETUP_DEFINITIONS) $(SETUP_SDBS) $(Setup_DIR)\Setup.mak $(Setup_DIR)\Setup.uni $(BUILD_DIR)\token.mak
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS) TYPE=SDB\
+ /f $(BUILD_DIR)\Setup.mak all
+ $(MAKE) /$(MAKEFLAGS) /a $(BUILD_DEFAULTS) TYPE=SDB\
+ STRING_CONSUMERS= "STRGATHER_FLAGS=$(SETUP_STRGATHER_FLAGS)"\
+ /f $(BUILD_DIR)\Setup.mak $(BUILD_DIR)\SetupStrTokens.h
+!ELSE
+SetupResources : $(SETUP_FORMSETS) $(SETUP_DEFINITIONS) $(SETUP_SDBS) $(Setup_DIR)\Setup.mak $(Setup_DIR)\Setup.uni $(BUILD_DIR)\token.mak
+ $(MAKE) /$(MAKEFLAGS) $(NO_EXT_OBJS_BUILD_DEFAULTS) TYPE=SDB\
+ /f $(BUILD_DIR)\Setup.mak all
+ $(MAKE) /$(MAKEFLAGS) /a $(NO_EXT_OBJS_BUILD_DEFAULTS) TYPE=RESOURCES\
+ "STRGATHER_FLAGS=$(SETUP_STRGATHER_FLAGS)"\
+ "VFR_PACKS=$(BUILD_DIR)\SetupStr.hpk $(VFR_PACKS)"\
+!IF "$(SETUP_DATA_LAYOUT_OVERRIDE_HEADER)"==""
+ "VFR_INCLUDES=$(SETUP_VFR_INCLUDES)"\
+!ELSE
+ "VFR_INCLUDES=$(SETUP_VFR_INCLUDES) -t $(SETUP_DATA_LAYOUT_OVERRIDE_HEADER)"\
+!ENDIF
+ /f $(BUILD_DIR)\Setup.mak all
+!ENDIF # !IF $(CORE_COMBINED_VERSION)<262785
+
+_INCLUDE=!INCLUDE
+_IF=!IF
+_ENDIF=!ENDIF
+_ERROR=!ERROR
+_MESSAGE=!MESSAGE
+$(BUILD_DIR)\LangList.h : $(BUILD_DIR)\token.mak $(Setup_DIR)\Setup.mak Core\Languages.mak
+ $(ECHO) // Supported Languages > $(BUILD_DIR)\LangList.h
+ $(MAKE) EFI_SPECIFICATION_VERSION=0x20000 FORMAT_NAME=Iso6392 -f<<$(BUILD_DIR)\LangList.mak
+$(_INCLUDE) $(BUILD_DIR)\token.mak
+$(_INCLUDE) Core\Languages.mak
+COMMA_SEPARATED_LIST=$$(SUPPORTED_LANGUAGES: =,),
+$(_IF) "$$(COMMA_SEPARATED_LIST:,,=x)"!="$$(COMMA_SEPARATED_LIST)"
+$(_MESSAGE) Potential problems:
+$(_MESSAGE) - The token is blank
+$(_MESSAGE) - More than one space between language names
+$(_MESSAGE) - One of the language names is not in $$$$(<lang-name>) format
+$(_MESSAGE) - One of the language names is not defined in the ISO 639-2 section of Core\Languages.mak
+$(_MESSAGE) - One of the language names is not defined in the RFC 4646 section of Core\Languages.mak
+$(_ERROR) Invalid format of the SUPPORTED_LANGUAGES token
+$(_ENDIF)
+all :
+ $(ECHO) static CHAR8* $$(FORMAT_NAME)LanguageList[] = {"$$(SUPPORTED_LANGUAGES: =", ")", NULL}; >> $@
+<<KEEP
+ $(MAKE) EFI_SPECIFICATION_VERSION=0x2000A FORMAT_NAME=Rfc4646 -f $(BUILD_DIR)\LangList.mak
+!UNDEF _INCLUDE
+!UNDEF _IF
+!UNDEF _ENDIF
+!UNDEF _ERROR
+!UNDEF _MESSAGE
+
+SetupBin : $(AMIDXELIB)
+ $(SILENT)type << >$(BUILD_DIR)\SetupCallbackList.h
+#define SETUP_ITEM_CALLBACK_LIST $(SetupItemCallbacks)
+<<
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\Setup.mak all\
+ GUID=899407D7-99FE-43d8-9A21-79EC328CAC21\
+ ENTRY_POINT=SetupEntry\
+ "MY_DEFINES=/DDEFAULT_LANGUAGE_CODE=$(DEFAULT_LANGUAGE)"\
+ TYPE=BS_DRIVER SDB_FILES=\
+ "VFR_PACKS=$(BUILD_DIR)\SetupStr.hpk $(VFR_PACKS)"\
+!IF $(CORE_COMBINED_VERSION)<262785
+ "VFR_INCLUDES=$(SETUP_VFR_INCLUDES)" COMPRESS=1\
+!ELSE
+ COMPRESS=1\
+!ENDIF
+ "EXT_HEADERS=$(SETUP_AUTO_GENERATED_FILES) $(BUILD_DIR)\TimeStamp.h $(BUILD_DIR)\token.h"\
+ "INIT_LIST=$(SetupStringInit)"
+
+$(BUILD_DIR)\Logo.ffs : $(LOGO_FILE_NAME)
+ $(MAKE) /f Core\FFS.mak \
+ BUILD_DIR=$(BUILD_DIR) \
+# Don't change the GUID. ChangeLogo expects this GUID.
+ GUID=7BB28B99-61BB-11D5-9A5D-0090273FC14D \
+ TYPE=EFI_FV_FILETYPE_FREEFORM \
+ BINFILE=$** FFSFILE=$@ COMPRESS=1 NAME=$(**B)
+
+
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/Setup/Setup.sdl b/Board/EM/Setup/Setup.sdl
new file mode 100644
index 0000000..c258687
--- /dev/null
+++ b/Board/EM/Setup/Setup.sdl
@@ -0,0 +1,129 @@
+TOKEN
+ Name = "Setup_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable Setup support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "PASSWORD_MAX_SIZE"
+ Value = "20"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PASSWORD_MAX_SIZE"
+ Value = "$(SETUP_PASSWORD_LENGTH)"
+ TokenType = Integer
+ TargetH = Yes
+ Token = "AMITSE_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "PASSWORD_MIN_SIZE"
+ Value = "3"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "FORCE_USER_TO_SETUP_ON_FIRST_BOOT"
+ Value = "0"
+ Help = "When this flag is on, Setup will be automatically launched\whenever NVRAM is blank (during the first boot and\during any subsequent flash update)."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SHOW_ADVANCED_FORMSET"
+ Value = "1"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SHOW_CHIPSET_FORMSET"
+ Value = "1"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SHOW_SECURITY_FORMSET"
+ Value = "1"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ALWAYS_PUBLISH_HII_RESOURCES"
+ Value = "0"
+ Help = "This token controls loading of the Setup related HII resources (setup screens and string).\If this token is cleared, setup resources are only published into HII database if the user enters setup.\If this token is set, setup resources are always published\Keep it off for speed optimization.\Set it to on if Runtime resources processing support is required (if ExportDatabase if used)"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "LOGO_FILE_NAME"
+ Value = "$(Setup_DIR)\Logo.bmp"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+PATH
+ Name = "Setup_DIR"
+End
+
+MODULE
+ Help = "Includes Setup.mak to Project"
+ File = "Setup.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\Setup.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\Logo.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\$(Setup_DIR)"
+ Parent = "IFR_DIR_LIST"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "SETUP_DEFINITIONS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "SETUP_SDBS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "SetupStringInit"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "SETUP_VFR_INCLUDES"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "SetupItemCallbacks"
+ InvokeOrder = ReplaceParent
+End
+
diff --git a/Board/EM/Setup/Setup.uni b/Board/EM/Setup/Setup.uni
new file mode 100644
index 0000000..a5194a7
--- /dev/null
+++ b/Board/EM/Setup/Setup.uni
Binary files differ
diff --git a/Board/EM/Setup/SetupPrivate.h b/Board/EM/Setup/SetupPrivate.h
new file mode 100644
index 0000000..f2dbbcc
--- /dev/null
+++ b/Board/EM/Setup/SetupPrivate.h
@@ -0,0 +1,76 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/BIN/Board/Setup/SetupPrivate.h 7 2/07/11 5:27p Artems $
+//
+// $Revision: 7 $
+//
+// $Date: 2/07/11 5:27p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Board/Setup/SetupPrivate.h $
+//
+// 7 2/07/11 5:27p Artems
+// EIP 53374: Replaced tabs with spaces
+//
+// 6 2/05/10 11:37a Felixp
+// include statements for AutoId.h is removed (the file is now included by
+// Setup.h).
+//
+// 5 6/30/09 11:42a Robert
+// Added Comment and updated parts for coding standards
+//
+// 4 7/14/05 3:55p Felixp
+// VFR.h removed
+//
+// 2 5/24/05 3:07p Felixp
+// Modular setup framework implemented
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: SetupPrivate.h
+//
+// Description:
+// Internal header of the Setup Component
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+#ifndef __SetupPrivate__H__
+#define __SetupPrivate__H__
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include <SetupStrTokens.h>
+#include <Setup.h>
+/****** DO NOT WRITE BELOW THIS LINE *******/
+#ifdef __cplusplus
+}
+#endif
+#endif
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2009, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Sredir/LegacySredir-Board.cif b/Board/EM/Sredir/LegacySredir-Board.cif
new file mode 100644
index 0000000..fd86d84
--- /dev/null
+++ b/Board/EM/Sredir/LegacySredir-Board.cif
@@ -0,0 +1,9 @@
+<component>
+ name = "Legacy Sredir Board"
+ category = ModulePart
+ LocalRoot = "Board\EM\Sredir\"
+ RefName = "LSREDIR_BOARD"
+[files]
+"LegacySredir_Setup.C"
+"SerialCallback.Asm"
+<endComponent>
diff --git a/Board/EM/Sredir/LegacySredir_Setup.C b/Board/EM/Sredir/LegacySredir_Setup.C
new file mode 100644
index 0000000..cede2e2
--- /dev/null
+++ b/Board/EM/Sredir/LegacySredir_Setup.C
@@ -0,0 +1,1509 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Legacy Serial Redirection/LegacySredir_Setup.C 39 12/08/14 3:38a Anbuprakashp $
+//
+// $Revision: 39 $
+//
+// $Date: 12/08/14 3:38a $
+//****************************************************************************
+//****************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Legacy Serial Redirection/LegacySredir_Setup.C $
+//
+// 39 12/08/14 3:38a Anbuprakashp
+// [TAG] EIP192305
+// [Category] Improvement
+// [Description] Replacing SmmGetMemoryType usage in LegacySredir module
+// with AmiBufferValidationLib
+// [Files] LegacySredir.mak, LegacySmmSredir.c, LegacySredir_Setup.C
+//
+// 38 6/16/14 7:53a Divyac
+// [TAG] EIP172073
+// [Category] Improvement
+// [Description] Setup option for Legacy Serial Redirection.
+// [Files] Terminal.sd, Terminal.uni, LegacySredir_Setup.c
+//
+// 37 6/13/14 6:11a Divyac
+// [TAG] EIP172101
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Build Error in Legacy Serial Redirection Driver when
+// COM_MMIO_WIDTH SDL token value is 2.
+// [RootCause] semicolon was missing.
+// [Solution] added semicolon.
+// [Files] LegacySredir_Setup.C
+//
+// 36 12/09/13 4:48a Divyac
+// [TAG] EIP146051
+// [Category] Improvement
+// [Description] Refresh Key needs to be configured via SDL token for
+// Legacy Serial Redirection.
+// [Files] LegacySredir.c, LegacySredir_Setup.C, LegacySredir.h,
+// Sredir.bin
+//
+// 35 6/06/13 2:18a Rameshr
+// [TAG] EIP122654
+// [Category] Improvement
+// [Description] Hardware Loopback device checking added.
+// [Files] legacySredir_Setup.c, LegacySredir.sdl
+//
+// 34 1/07/13 11:48p Rameshr
+// [TAG] EIP110859
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Legacy serial redirection always works on last COM port
+// [RootCause] COM port selection continued for all the COM ports
+// instead breaking when it's find the 1st COM port
+// [Solution] When the 1st com port found for redirection returned from
+// the function
+// [Files] LegacySredir_Setup.c
+//
+// 33 7/06/12 2:48a Rajeshms
+// [TAG] EIP94504
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] screen color attributes are not transmitted to the serial
+// terminal when the VT100+ terminal type is selected in DOS
+// [RootCause] Terminal Type VT100+ was taken as VT100 in Legacy Serial
+// Redirection.
+// [Solution] VT100+ is taken as VT100+ type.
+// [Files] LegacySredir_Setup.c
+//
+// 32 3/29/12 11:53p Rajeshms
+// [TAG] EIP84341
+// [Category] Improvement
+// [Description] Added Separate PCI_UART_INPUT_CLOCK token for setting
+// the Clock for PCI Serial UART.
+// [Files] Terminal.sdl, TerminalSetup.c, SerialIo.c, LegacySredir.c,
+// LegacySredir_Setup.c
+//
+// 31 2/27/12 6:04a Jittenkumarp
+// [TAG] EIP81401
+// [Category] New Feature
+// [Description] Select Redirection After BIOS POST as BootLoader in
+// serial redirection, the behaviour is made same as Core8.
+// [Files] LegacySredir.c, LegacySredir.mak, LegacySredir.sdl,
+// LegacySredir_Setup.c, LegacySredir.h ,SerialBootCall.asm,
+// SredirBootFail.asm,GRAPHREDIR.ASM, INT10REDIR.ASM, OR_MOD.EQU,
+// SREDIR.ASM,LegacySredir.cif
+//
+// 30 12/28/11 10:54p Rajeshms
+// [TAG] EIP65051
+// [Category] Improvement
+// [Description] Data passing between EFI to Legacy has been changed in
+// Legacy console redirection as we are running out of registers to pass
+// parameters from EFI to Legacy.
+// [Files] LegacySredir.c, LegacySredir.h, LegacySredir_Setup.C,
+// SREDIR.ASM, OR_MOD.ASM, OR_MOD.EQU
+//
+// 29 12/12/11 6:30a Rajeshms
+// [TAG] EIP71636
+// [Category] New Feature
+// [Description] Implement the AMI_SERIAL_DEVICE protocol
+// [Files] AmiSerial.c, AmiSerial.sdl, AmiSerial.mak, AmiSerial.chm,
+// AmiSerial.dxs, AmiSerial.cif, Terminal.c, SerialIo.c, TerminalSetup.c,
+// InitTerminalStrings.c, TerminalSetupVar.h, Terminal.cif,
+// TerminalAmiSerial.h, LegacySredir_Setup.c
+//
+// 28 12/12/11 2:10a Jittenkumarp
+// [TAG] EIP75982
+// [Category] New Feature
+// [Description] Redirection After BIOS POST item on the setup menu
+// [Files] Terminal.sd, Terminal.uni, LegacySredir.c,
+// LegacySredir_Setup.c
+//
+// 27 11/09/11 11:54p Rajeshms
+// [TAG]- EIP 63665
+// [Category]-IMPROVEMENT
+// [Description]- Install Linux(Legacy OS) through remote. Some Linux
+// versions are forced to text mode to redirect and some are redirected in
+// graphics mode itself. It might not work for all the Linux versions as
+// the Linux kernel's behave differently.
+// [Files]- Terminal.sdl, Terminal.uni, Terminal.sd, LegacySredir.c,
+// LegacySredir.h, LegacySredir_Setup.c, GRAPHREDIR.ASM, INT10REDIR.ASM,
+// OR_MOD.ASM, OR_MOD.EQU, SREDIR.ASM
+//
+// 26 7/13/11 2:39a Rajeshms
+// [TAG]- EIP 36444
+// [Category]- New Feature
+// [Description]- Add Setup option for Various Putty keyPad support in
+// Legacy console redirection driver
+// [Files]- LegacySredir.c, LegacySredir.h, LegacySredir_Setup.C,
+// SREDIR.ASM, KEYREDIR.ASM, OR_MOD.EQU, SREDIR.MAK
+//
+// 25 6/17/11 4:42a Rameshr
+// [TAG] - EIP 47188
+// [Category]- IMPROVEMENT
+// [Description]- MMIO COM device access width SDL token support added
+// [Files] - legacysredir.c, LegacySredirSmm.c, LegacySredir_setup.c
+//
+// 24 6/16/11 2:07a Rameshr
+// [TAG] - EIP 54019
+// [Category]- BUG FIX
+// [Severity]- Minor
+// [Symptom] - legacy console redirection doesn't work from virtual Serial
+// Port.
+// [RootCause]- Legacy console redirection always ignores the first Node
+// in the device path
+// [Solution] - For the ACPI node checking , first node of the devicepath
+// also included.
+// [Files] - Legacysredir_setup.c
+//
+// 23 6/14/11 5:39a Rameshr
+// [TAG]- EIP 58140
+// [Category]- New Feature
+// [Description]- Add Setup option for Vt-UTF8 combo key support in Legacy
+// console redirection driver
+// [Files]- Sredir.asm, Legacysredir.c, Legacysredir.h,
+// Legacysredir_setup.c
+//
+// 22 1/19/11 4:25a Rameshr
+// [TAG] - EIP 50230
+// [Category]- BUG FIX
+// [Severity]- Minor
+// [Symptom] - SOL is not working correctly.
+// [RootCause]- SOL device is visible even though SOL feature is disabled.
+// [Solution] - Validated the TerminalDriver presence on SOL device and
+// activated it for Legacy console redirection.
+// [Files] - Legacysre_setup.c
+//
+// 21 10/28/10 5:22a Rameshr
+//
+// 20 9/20/10 4:07a Rameshr
+// [TAG]- EIP 44007
+// [Category]-IMPROVEMENT
+// [Description]- Invalid PCI COM device list added as Elink. These
+// devices will not be used for Redirection.
+// [Files]- LegacySredir.mak, LegacySredir.sdl, LegacySredir_Setup.c
+//
+// 19 8/04/10 12:29a Rameshr
+// COM port UID should be from 0 to 3 for SerialIo to work. This
+// dependency removed as UID should be unique and it can be from 00 to
+// 0xFF
+// EIP 39843
+//
+// 18 7/14/10 1:17a Rameshr
+//
+// 16 6/30/10 5:23a Rameshr
+// COM port Validation code added. Skipped the COM port if the port is not
+// a valid one
+// EIP 39300
+//
+// 15 6/11/10 5:20a Rameshr
+// Resolved the programming Error.
+//
+// 14 6/01/10 12:47a Rameshr
+// Support for Baud Rate 38400 in Legacy Console Redirection Driver
+// EIP 38854
+//
+// 13 5/05/10 12:24a Rameshr
+// Legacy Serial Redirection not working when serial port interrupt set to
+// 5
+// EIP 37785
+//
+// 12 5/03/10 1:38a Rameshr
+// Issue:Need to handle different Base Hz values for SerialStatusCode,
+// Terminal, and Legacy Serial Redirection.
+// Solution: Moved Uart input clock into Core.sdl token and used in all
+// the above modules.
+// EIP: 37332
+//
+// 11 4/22/10 7:32a Rameshr
+// Build Error resolved.
+//
+// 10 4/13/10 4:14a Rameshr
+// Recorder Mode support added
+// EIP 36514
+// Some of the MMIO COM port has non standard bits implemented. These bits
+// are reset to 0 in Sredir.bin
+// EIP 37123
+//
+// 9 3/05/10 4:22a Rameshr
+// MMIO COM device support added.
+// EIP 33847
+//
+// 8 10/23/09 10:46a Yul
+// EIP 24167 and EIP 26405
+// Serial redirection selection of 80X24 or 80X25 implemented based on
+// setup question instead of BUILD token
+//
+// 7 9/21/09 3:37p Rameshr
+// compile Error in legacy sredir when using VS 2008
+// EIP 27263
+//
+// 6 6/29/09 12:12p Rameshr
+// Coding Standard and File header updated.
+//
+// 5 4/21/09 12:16p Rameshr
+// Updated the Legacy console redirection to get the Databits,Parity and
+// Stop bits from the Terminal Driver Setup option
+// EIP20874-Legacy serial redirection is using hra coded values for
+// Databits as 8, Parity as None and Stop bit as 1
+//
+// 4 12/04/08 12:56p Rameshraju
+// Added code to get the Serial port base address and IRQ from Device path
+// and other settings from Terminal Setup options
+//
+// 3 9/08/08 5:30p Pats
+// Modified to get port parameters from terminal setup.
+//
+// 2 4/17/07 4:42a Rameshraju
+// PCIserial support added
+//
+//****************************************************************************
+
+//<AMI_FHDR_START>
+//****************************************************************************
+//
+// Name: LegacySredir_Setup.C
+//
+// Description: This File is used to get the Terminal Setup values from EFI
+//****************************************************************************
+//<AMI_FHDR_END>
+
+#pragma warning ( disable : 4214 )
+
+#include "token.h"
+#include "Protocol/LegacySredir.h"
+#include <Setup.h>
+#include <AmiDxeLib.h>
+#include <Protocol/AmiSio.h>
+#include <Protocol/DevicePath.h>
+#include <AcpiRes.h>
+#include <Protocol/PciIo.h>
+#include <PCI.h>
+#include <Protocol/TerminalAmiSerial.h>
+
+EFI_STATUS GetSetupValuesForLegacySredir(
+ OUT AMI_COM_PARAMETERS *AmiComParameters
+ );
+
+//*******************************************************
+// EFI_PARITY_TYPE
+//*******************************************************
+typedef enum {
+ DefaultParity,
+ NoParity,
+ EvenParity,
+ OddParity,
+ MarkParity,
+ SpaceParity
+} EFI_PARITY_TYPE;
+
+//*******************************************************
+// EFI_STOP_BITS_TYPE
+//*******************************************************
+typedef enum {
+ DefaultStopBits,
+ OneStopBit, // 1 stop bit
+ OneFiveStopBits, // 1.5 stop bits
+ TwoStopBits // 2 stop bits
+} EFI_STOP_BITS_TYPE;
+
+#define STOPB 0x4 // Bit2: Number of Stop Bits
+#define PAREN 0x8 // Bit3: Parity Enable
+#define EVENPAR 0x10 // Bit4: Even Parity Select
+#define STICPAR 0x20 // Bit5: Sticky Parity
+#define SERIALDB 0x3 // Bit0-1: Number of Serial
+ // Data Bits
+
+#define SERIAL_REGISTER_THR 0 // WO Transmit Holding Register
+#define SERIAL_REGISTER_RBR 0 // RO Receive Buffer Register
+
+#define SERIAL_REGISTER_FCR 2 // WO FIFO Cotrol Register
+ #define TRFIFOE 0x1 // Bit0: Transmit and Receive
+ // FIFO Enable
+ #define RESETRF 0x2 // Bit1: Reset Reciever FIFO
+ #define RESETTF 0x4 // Bit2: Reset Transmistter FIFO
+#define SERIAL_REGISTER_MCR 4 // R/W Modem Control Register
+ // interrupts
+ #define LME 0x10 // Bit4: Loopback Mode Enable
+#define SERIAL_REGISTER_LSR 5 // R/W Line Status Register
+ #define DR 0x1 // Bit0: Receiver Data Ready Status
+
+#define SERIAL_REGISTER_MSR 6 // R/W Modem Status Register
+ #define CTS 0x10 // Bit4: Clear To Send Status
+ #define DSR 0x20 // Bit5: Data Set Ready Status
+ #define RI 0x40 // Bit6: Ring Indicator Status
+ #define DCD 0x80 // Bit7: Data Carrier Detect Status
+
+#define SERIAL_REGISTER_SCR 7 // R/W Scratch Pad Register
+
+
+
+AMI_COM_PARAMETERS gAmiComParameters;
+BOOLEAN IsFound = FALSE;
+BOOLEAN IsPciDevice;
+
+
+#define TERMINAL_VAR_GUID \
+{0x560bf58a, 0x1e0d, 0x4d7e, 0x95, 0x3f, 0x29, 0x80, 0xa2, 0x61, 0xe0, 0x31}
+EFI_GUID gTerminalVarGuid = TERMINAL_VAR_GUID;
+UINT32 gTotalSioSerialPorts = TOTAL_SIO_SERIAL_PORTS;
+#define SIO_SERIAL_PORTS_LOCATION_VAR_C_NAME L"SioSerialPortsLocationVar"
+#define PCI_SERIAL_PORTS_LOCATION_VAR_C_NAME L"PciSerialPortsLocationVar"
+#define SERIAL_PORTS_ENABLED_VAR_C_NAME L"SerialPortsEnabledVar"
+
+#if (TOTAL_PCI_SERIAL_PORTS > 0)
+ typedef struct {
+ UINT8 Segment[ TOTAL_PCI_SERIAL_PORTS ];
+ UINT8 Bus[ TOTAL_PCI_SERIAL_PORTS ];
+ UINT8 Device[ TOTAL_PCI_SERIAL_PORTS ];
+ UINT8 Function[ TOTAL_PCI_SERIAL_PORTS ];
+ UINT8 AmiPciSerialPresent[ TOTAL_PCI_SERIAL_PORTS ];
+ UINT8 Port[ TOTAL_PCI_SERIAL_PORTS ];
+ } PCI_SERIAL_PORTS_LOCATION_VAR;
+#endif
+#if (TOTAL_SIO_SERIAL_PORTS > 0)
+ typedef struct {
+ UINT8 PortUid[ TOTAL_SIO_SERIAL_PORTS ];
+ UINT8 Valid[ TOTAL_SIO_SERIAL_PORTS ];
+ } SIO_SERIAL_PORTS_LOCATION_VAR;
+#endif
+
+#if (TOTAL_SERIAL_PORTS > 0)
+ typedef struct {
+ UINT8 PortsEnabled[ TOTAL_SERIAL_PORTS ];
+ } SERIAL_PORTS_ENABLED_VAR;
+#endif
+
+UINT32 gComBaudRates[8] = {0, 0, 0, 9600, 19200, 38400, 57600, 115200};
+
+
+#pragma pack(1)
+typedef struct {
+ UINT16 VendorId;
+ UINT16 DeviceId;
+} INVALID_PCICOM;
+#pragma pack()
+
+INVALID_PCICOM InvalidPciCom[] = {INVALID_PCICOM_DEVICELIST
+ {0xFFFF, 0xFFFF}
+ };
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+// Name: InitilizeNonCommonSerialRegsiters
+//
+// Description: This Function is used to Initilize the Non Standard
+// Serial Port Registers
+//
+// Input: AmiComParameters-Address of the COM port parameters Structure
+//
+// Output: None
+//
+// Notes: Some of the MMIO com ports has non Standard bits in Registers
+// Those regsiters are all initilized on this function.
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+InitilizeNonCommonSerialRegsiters(
+ IN AMI_COM_PARAMETERS *AmiComParameters
+)
+{
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+// Name: SerialReadPort
+//
+// Description: This Function is used to Read the
+//
+// Input: IN UINT32 BaseAddress,
+// IN UINT32 Offset,
+// IN BOOLEAN MmioDevice
+//
+// Output: None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+UINT8
+SerialReadPort(
+ IN UINT32 BaseAddress,
+ IN BOOLEAN MmioDevice,
+ IN UINT32 Offset
+)
+{
+ UINT8 TempData8;
+
+ if(MmioDevice) {
+ //
+ // Write into the Scratch Pad Reg
+ //
+
+#if COM_MMIO_WIDTH == 4
+ {
+ UINT32 TempData32;
+ TempData32=*(UINT32*)(BaseAddress +(Offset*COM_MMIO_WIDTH));
+ return (UINT8)(TempData32);
+ }
+#else
+ #if COM_MMIO_WIDTH == 2
+ {
+ UINT16 TempData16;
+ TempData16=*(UINT16*)(BaseAddress +(Offset*COM_MMIO_WIDTH));
+ return (UINT8)(TempData16);
+ }
+ #else
+ TempData8=*(UINT8*)(BaseAddress +(Offset*COM_MMIO_WIDTH));
+ return TempData8;
+ #endif
+#endif
+ }
+ TempData8=IoRead8(BaseAddress + Offset);
+ return TempData8;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+// Name: SerialWritePort
+//
+// Description: This Function is used to Read the
+//
+// Input: IN UINT32 BaseAddress,
+// IN UINT32 Offset,
+// IN BOOLEAN MmioDevice
+// IN UINT8 Data
+//
+// Output: Data
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+SerialWritePort(
+ IN UINT32 BaseAddress,
+ IN BOOLEAN MmioDevice,
+ IN UINT32 Offset,
+ IN UINT8 Data
+)
+{
+
+ if(MmioDevice) {
+ //
+ // Write into the Scratch Pad Reg
+ //
+
+#if COM_MMIO_WIDTH == 4
+ {
+ UINT32 TempData32=(UINT32)Data;
+ *(UINT32*)(BaseAddress +(Offset*COM_MMIO_WIDTH))=TempData32;
+ }
+#else
+ #if COM_MMIO_WIDTH == 2
+ {
+ UINT16 TempData16=(UINT16)Data;
+ *(UINT16*)(BaseAddress +(Offset*COM_MMIO_WIDTH))=(UINT16)TempData16;
+ }
+ #else
+ *(UINT8*)(BaseAddress +(Offset*COM_MMIO_WIDTH))=(UINT8)Data;
+ #endif
+#endif
+ } else {
+
+ IoWrite8(BaseAddress + Offset, Data);
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: CheckForLoopbackDevice
+//
+// Description: Checks if a hardware loopback plug is attached and sets
+// the result in Parameters->SerialDevicePresentOnPort.
+//
+// Input: IN EFI_SERIAL_IO_PROTOCOL *SerialIo
+//
+// Output: VOID
+//
+//<AMI_PHDR_END>
+//**********************************************************************
+BOOLEAN
+CheckForLoopbackDevice(
+ IN UINT32 BaseAddress,
+ IN BOOLEAN MmioDevice
+)
+{
+#if CHECK_FOR_LOOPBACK_DEVICE
+ UINT8 Byte;
+ UINT8 Byte2;
+ UINT8 FcrValue;
+
+
+ FcrValue = SerialReadPort(BaseAddress, MmioDevice, SERIAL_REGISTER_FCR);
+
+ //
+ // Program the FCR
+ //
+ SerialWritePort(BaseAddress, MmioDevice, SERIAL_REGISTER_FCR,
+ TRFIFOE|RESETRF|RESETTF);
+
+ Byte = SerialReadPort(BaseAddress, MmioDevice, SERIAL_REGISTER_FCR);
+ if(Byte == 0xff) {
+ SerialWritePort(BaseAddress, MmioDevice, SERIAL_REGISTER_FCR, FcrValue);
+ return TRUE;
+ }
+
+ //
+ // Wait for 2ms is sufficient for the next byte
+ //
+ pBS->Stall(2000);
+
+ //
+ //check if RECV DATA AVAILABLE IS SET. If Available,Read the data till all data is read
+ //
+
+ do {
+ Byte = SerialReadPort( BaseAddress, MmioDevice, SERIAL_REGISTER_LSR );
+ if(Byte & DR) {
+ Byte2 = SerialReadPort( BaseAddress, MmioDevice, SERIAL_REGISTER_RBR );
+ }
+ } while ((Byte & DR) == TRUE );
+
+ //
+ // Write into THR
+ //
+ SerialWritePort(BaseAddress, MmioDevice, SERIAL_REGISTER_THR,0x80);
+
+ //
+ // Send BackSpace to clear the character(0x80) sent for testing
+ // the presence of Loop Back Device.
+ //
+ SerialWritePort(BaseAddress, MmioDevice, SERIAL_REGISTER_THR,0x08);
+ SerialWritePort(BaseAddress, MmioDevice, SERIAL_REGISTER_THR,0x20);
+ SerialWritePort(BaseAddress, MmioDevice, SERIAL_REGISTER_THR,0x08);
+
+ //
+ // Wait for 5ms is sufficient for the next byte
+ //
+ pBS->Stall(50000);
+
+ Byte = SerialReadPort( BaseAddress, MmioDevice, SERIAL_REGISTER_LSR );
+
+ if(Byte & DR) {
+ Byte2 = SerialReadPort( BaseAddress, MmioDevice, SERIAL_REGISTER_RBR );
+ if(Byte2 == 0x80) {
+ SerialWritePort(BaseAddress, MmioDevice, SERIAL_REGISTER_FCR, FcrValue);
+ return TRUE ;
+ }
+ }
+
+ // Check for hardware loopback plug...
+ Byte2 = SerialReadPort(BaseAddress, MmioDevice, SERIAL_REGISTER_MCR);
+ if (!(Byte2 & LME)) { // if hardware loopback not enabled...
+ // Test for loopback plug and return error if detected
+ // read MSR
+ Byte = SerialReadPort(BaseAddress, MmioDevice, SERIAL_REGISTER_MSR);
+ Byte &= (CTS | DSR | DCD | RI);
+ // check these bits
+ if ((Byte == (CTS | DSR | DCD)) || (Byte == (CTS | DSR | DCD | RI))) {
+ // change MCR
+ SerialWritePort(BaseAddress, MmioDevice, SERIAL_REGISTER_MCR, 0);
+ // read MSR again
+ Byte = SerialReadPort(BaseAddress, MmioDevice, SERIAL_REGISTER_MSR);
+ // restore MCR
+ SerialWritePort(BaseAddress, MmioDevice, SERIAL_REGISTER_MCR, Byte2);
+ // if change loops back...
+ if ((Byte & 0xf0) == 0) {
+ return TRUE;
+ }
+ }
+ }
+
+ return FALSE;
+#else
+ return FALSE;
+#endif
+
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Name: ValidateComPort
+//
+// Description: Validate the COM port using Scratch Pad Registers.
+//
+// Input: IN UINT32 BaseAddress,
+// IN BOOLEAN MmioDevice
+//
+// Output: Comport number
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN
+ValidateComPort(
+ IN UINT32 BaseAddress,
+ IN BOOLEAN MmioDevice
+)
+{
+ UINT32 TempData32=0xAA;
+ UINT8 TempData8=0xAA;
+
+ if(MmioDevice) {
+ //
+ // Write into the Scratch Pad Reg
+ //
+
+#if COM_MMIO_WIDTH == 4
+ *(UINT32*)(BaseAddress +(SERIAL_REGISTER_SCR*COM_MMIO_WIDTH))=TempData32;
+ TempData32=*(UINT32*)(BaseAddress +(SERIAL_REGISTER_SCR*COM_MMIO_WIDTH));
+#else
+ #if COM_MMIO_WIDTH == 2
+ *(UINT16*)(BaseAddress +(SERIAL_REGISTER_SCR*COM_MMIO_WIDTH))=(UINT16)TempData32;
+ TempData32=*(UINT16*)(BaseAddress +(SERIAL_REGISTER_SCR*COM_MMIO_WIDTH));
+ #else
+ *(UINT8*)(BaseAddress +(SERIAL_REGISTER_SCR*COM_MMIO_WIDTH))=(UINT8)TempData32;
+ TempData32=*(UINT8*)(BaseAddress +(SERIAL_REGISTER_SCR*COM_MMIO_WIDTH));
+ #endif
+#endif
+ //
+ // Compare the read value Write Value, Both are same, Port is Valid
+ //
+ if((UINT8)TempData32 == 0xAA) {
+ return TRUE;
+ } else {
+ return FALSE;
+ }
+ } else {
+ //
+ // Write into Scratch Pad ISA Com port
+ //
+ IoWrite8(BaseAddress + SERIAL_REGISTER_SCR, TempData8);
+ TempData8=IoRead8(BaseAddress + SERIAL_REGISTER_SCR);
+ //
+ // Compare the read value Write Value, Both are same, Port is Valid
+ //
+ if(TempData8 == 0xAA) {
+ return TRUE;
+ } else {
+ return FALSE;
+ }
+ }
+ return FALSE;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Name: GetPciSerialComPortNumber
+//
+// Description: This Function is used to get the Comport number to map Terminal Driver Setup values
+//
+// Input: IN UINT8 Device,
+// IN UINT8 Function
+//
+// Output: Comport number
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINT32
+GetPciSerialComPortNumber(
+IN UINT8 Device,
+IN UINT8 Function,
+IN UINT8 PortNo
+)
+{
+#if (TOTAL_PCI_SERIAL_PORTS > 0)
+ UINT32 ComPort;
+ UINT32 i = 0;
+ UINTN PciSerialPortsLocationVarSize =
+ sizeof(PCI_SERIAL_PORTS_LOCATION_VAR);
+ UINT32 PciSerialPortsLocationVarAttributes=0;
+ PCI_SERIAL_PORTS_LOCATION_VAR PciSerialPortsLocationVar;
+ EFI_STATUS Status;
+
+ UINTN SerialPortsEnabledVarSize = sizeof(SERIAL_PORTS_ENABLED_VAR);
+ UINT32 SerialPortsEnabledVarAttributes=0;
+ SERIAL_PORTS_ENABLED_VAR SerialPortsEnabledVar;
+
+ Status = pRS->GetVariable(SERIAL_PORTS_ENABLED_VAR_C_NAME,
+ &gTerminalVarGuid,
+ &SerialPortsEnabledVarAttributes,
+ &SerialPortsEnabledVarSize,
+ &SerialPortsEnabledVar);
+
+ if(EFI_ERROR(Status)) {
+ return 0xFF;
+ }
+
+ Status = pRS->GetVariable(PCI_SERIAL_PORTS_LOCATION_VAR_C_NAME,
+ &gTerminalVarGuid,
+ &PciSerialPortsLocationVarAttributes,
+ &PciSerialPortsLocationVarSize,
+ &PciSerialPortsLocationVar);
+
+ if(EFI_ERROR(Status)) {
+ return 0xFF;
+ }
+
+ ComPort = 0xFF;
+
+ for (i = 0; i < TOTAL_PCI_SERIAL_PORTS; i++) {
+ if ((SerialPortsEnabledVar.PortsEnabled[gTotalSioSerialPorts+i]) &&
+ (PciSerialPortsLocationVar.Device[i] == Device) &&
+ (PciSerialPortsLocationVar.Function[i] == Function)) {
+ if( PciSerialPortsLocationVar.AmiPciSerialPresent[i] ) {
+ if( PciSerialPortsLocationVar.Port[i] != PortNo ) continue;
+ }
+ ComPort = gTotalSioSerialPorts+i;
+ break;
+ }
+ }
+ return ComPort;
+#else
+ return 0xFF;
+#endif
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Name: SkipInvalidPciComDevice
+//
+// Description: Skip the Invalid PCI COM device that is provided in the
+// InvalidPciComDeviceList
+//
+// Input: IN UINT16 VendorId,
+// IN UINT16 DeviceId,
+//
+// Output: TRUE - If the device has to be skipped
+// FALSE - Don't Skip the device
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN
+SkipInvalidPciComDevice(
+ IN UINT16 VendorId,
+ IN UINT16 DeviceId
+)
+{
+ UINT8 i=0;
+
+ while( InvalidPciCom[i].VendorId != 0xFFFF &&
+ InvalidPciCom[i].DeviceId != 0xFFFF ) {
+
+ if( InvalidPciCom[i].VendorId == VendorId &&
+ InvalidPciCom[i].DeviceId == DeviceId ) {
+
+ return TRUE;
+ }
+ i++;
+ }
+
+ return FALSE;
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Name: GetSetupValuesForLegacySredir
+//
+// Description: This Function is used to get the Setup Values of Terminal Module
+//
+// Input: Nothing
+//
+//
+// Output: AmiComParameters - SerialPort, Baudrate, Terminal Type, Flowcontrol
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+GetSetupValuesForLegacySredir(
+OUT AMI_COM_PARAMETERS *AmiComParameters)
+{
+#if (TOTAL_SERIAL_PORTS == 0)
+ return EFI_NOT_FOUND;
+#else
+ EFI_STATUS Status;
+ EFI_GUID SetupGuid = SETUP_GUID;
+ SETUP_DATA SetupData;
+ EFI_DEVICE_PATH_PROTOCOL *SerialDevicePath = NULL;
+ EFI_DEVICE_PATH_PROTOCOL *AmiSioDevicePath = NULL;
+ EFI_DEVICE_PATH_PROTOCOL *TruncatedSerialDevicePath = NULL;
+ ACPI_HID_DEVICE_PATH *AcpiPrevDPNodePtr = NULL;
+ AMI_SIO_PROTOCOL *AmiSioProtocol=NULL;
+ EFI_HANDLE *HandleBuffer, AmiSioProtocolHandle=0;
+ UINTN HandleCount, Index;
+ ASLRF_S_HDR *Header=NULL;
+ T_ITEM_LIST *ResourcesList=NULL;
+ UINT32 SetupDataAttributes = 0;
+ UINTN SetupDataSize = sizeof(SETUP_DATA);
+ UINT8 TerminalTypes[4] = {1, 2, 2, 0};
+ UINT8 DataParityStopBit=0;
+ UINT8 TempSetupValue;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_HANDLE *PciHandleBuffer;
+ UINTN PciHandleCount;
+ UINT8 RevisionId[4];
+ UINT64 Supports=0;
+ ASLR_QWORD_ASD *Resources=NULL;
+ EFI_DEVICE_PATH_PROTOCOL *tmpdp=NULL;
+ EFI_HANDLE TempHandle;
+ EFI_PCI_IO_PROTOCOL *RootPciIo=NULL;
+ EFI_DEVICE_PATH_PROTOCOL *TruncatedDevPath = NULL;
+ EFI_DEVICE_PATH_PROTOCOL *TempDevPath = NULL;
+ UINT16 CommandRegValue;
+ UINT8 ResIndex;
+ UINT16 CommandReg=0;
+ UINTN Bus=0, Device=0, Function=0, SegNum=0;
+ UINT8 Port=0;
+ UINT32 ComPort=0;
+ UINT16 VendorId,DeviceId;
+#if (TOTAL_SIO_SERIAL_PORTS > 0)
+ UINTN i;
+ UINTN k;
+ UINTN ComPortNo;
+ UINTN SioSerialPortsLocationVarSize =
+ sizeof(SIO_SERIAL_PORTS_LOCATION_VAR);
+ UINT32 SioSerialPortsLocationVarAttributes=0;
+ SIO_SERIAL_PORTS_LOCATION_VAR SioSerialPortsLocationVar;
+#endif
+
+#if (TOTAL_PCI_SERIAL_PORTS > 0)
+ UINTN PciSerialPortsLocationVarSize =
+ sizeof(PCI_SERIAL_PORTS_LOCATION_VAR);
+ UINT32 PciSerialPortsLocationVarAttributes=0;
+ PCI_SERIAL_PORTS_LOCATION_VAR PciSerialPortsLocationVar;
+ UINT8 PciComPortforLegacy;
+#endif
+
+ AMI_SERIAL_PROTOCOL *AmiSerialProtocol=NULL;
+ BOOLEAN Pci;
+ BOOLEAN Mmio;
+ UINT64 BaseAddress;
+
+ if (IsFound) {
+ *AmiComParameters = gAmiComParameters;
+ return EFI_SUCCESS;
+ }
+
+ Status = pRS->GetVariable(L"Setup", &SetupGuid, &SetupDataAttributes,
+ &SetupDataSize, &SetupData);
+
+ if (EFI_ERROR (Status)) {
+ return EFI_NOT_FOUND;
+ }
+
+ if(SetupData.ComPortforLegacy >= TOTAL_SIO_SERIAL_PORTS)
+ {
+#if (TOTAL_PCI_SERIAL_PORTS > 0)
+ PciComPortforLegacy = SetupData.ComPortforLegacy-TOTAL_SIO_SERIAL_PORTS;
+ Status = pRS->GetVariable(PCI_SERIAL_PORTS_LOCATION_VAR_C_NAME,
+ &gTerminalVarGuid,
+ &PciSerialPortsLocationVarAttributes,
+ &PciSerialPortsLocationVarSize,
+ &PciSerialPortsLocationVar);
+
+ if (EFI_ERROR (Status)) {
+ return EFI_NOT_FOUND;
+ }
+#endif
+
+ //
+ // Handle AMI_SERIAL_PROTOCOL.
+ //
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ &gAmiSerialProtocolGuid,
+ NULL,
+ &PciHandleCount,
+ &PciHandleBuffer);
+
+ for (Index = 0; Index < PciHandleCount; Index++) {
+ Status = pBS->HandleProtocol (
+ PciHandleBuffer[Index],
+ &gAmiSerialProtocolGuid,
+ &AmiSerialProtocol);
+
+ if (EFI_ERROR (Status)) {
+ continue;
+ }
+
+ AmiSerialProtocol->GetPciLocation(AmiSerialProtocol,&Bus,&Device,&Function,&Port);
+
+ ComPort=GetPciSerialComPortNumber((UINT8)Device, (UINT8)Function,Port);
+
+ if(ComPort==0xFF) {
+ continue;
+ }
+ if (!SetupData.ConsoleRedirectionEnable[ComPort]) {
+ continue;
+ }
+#if (TOTAL_PCI_SERIAL_PORTS > 0)
+ if((!PciSerialPortsLocationVar.AmiPciSerialPresent[PciComPortforLegacy]) ||
+ (!PciSerialPortsLocationVar.Bus[PciComPortforLegacy]==Bus) ||
+ (!PciSerialPortsLocationVar.Device[PciComPortforLegacy]==Device) ||
+ (!PciSerialPortsLocationVar.Function[PciComPortforLegacy]==Function) ||
+ (!PciSerialPortsLocationVar.Port[PciComPortforLegacy]==Port)) {
+ continue;
+ }
+#endif
+ pBS->SetMem(&gAmiComParameters, (sizeof(AMI_COM_PARAMETERS)), 0);
+
+ AmiSerialProtocol->CheckPciMmio(AmiSerialProtocol,&Pci,&Mmio);
+ AmiSerialProtocol->GetBaseAddress(AmiSerialProtocol,&BaseAddress);
+
+ if(Mmio) {
+ gAmiComParameters.MMIOBaseAddress= (UINT32)BaseAddress;
+ } else {
+ gAmiComParameters.BaseAddress= (UINT16)BaseAddress;
+ }
+
+ if(Pci) {
+ IsPciDevice = TRUE;
+ } else {
+ IsPciDevice = FALSE;
+ }
+
+ AmiSerialProtocol->GetSerialIRQ(AmiSerialProtocol,&(gAmiComParameters.SerialIRQ));
+
+ //
+ //Other settings from Termial Redirection driver
+ //
+ gAmiComParameters.Baudrate = gComBaudRates[SetupData.BaudRate[ComPort]];
+ gAmiComParameters.TerminalType = TerminalTypes[SetupData.TerminalType[ComPort]];
+ gAmiComParameters.FlowControl = SetupData.FlowControl[ComPort];
+ gAmiComParameters.LegacyOsResolution = SetupData.LegacyOsResolution[ComPort];
+ gAmiComParameters.RecorderMode = SetupData.RecorderMode[ComPort];
+ gAmiComParameters.VtUtf8 = SetupData.VtUtf8[ComPort];
+ gAmiComParameters.PuttyKeyPad = SetupData.PuttyFunctionKeyPad[ComPort];
+#if (INSTALL_LEGACY_OS_THROUGH_REMOTE == 1)
+ gAmiComParameters.InstallLegacyOSthroughRemote = SetupData.InstallLegacyOSthroughRemote[ComPort];
+#endif
+ gAmiComParameters.RedirectionAfterBiosPost = SetupData.RedirectionAfterBiosPost[ComPort] ;
+
+
+ TempSetupValue=SetupData.Parity[ComPort];
+ // Set parity bits.
+ switch (TempSetupValue) {
+ case NoParity:
+ DataParityStopBit &= ~(PAREN | EVENPAR | STICPAR);
+ break;
+ case EvenParity:
+ DataParityStopBit |= (PAREN | EVENPAR);
+ DataParityStopBit &= ~STICPAR;
+ break;
+ case OddParity:
+ DataParityStopBit |= PAREN;
+ DataParityStopBit &= ~(EVENPAR | STICPAR);
+ break;
+ case SpaceParity:
+ DataParityStopBit |= (PAREN | EVENPAR | STICPAR);
+ break;
+ case MarkParity:
+ DataParityStopBit |= (PAREN | STICPAR);
+ DataParityStopBit &= ~EVENPAR;
+ break;
+ }
+
+ TempSetupValue=SetupData.StopBits[ComPort];
+
+ // Set stop bits.
+ switch (TempSetupValue) {
+ case OneStopBit :
+ DataParityStopBit &= ~STOPB;
+ break;
+ case OneFiveStopBits :
+ case TwoStopBits :
+ DataParityStopBit |= STOPB;
+ break;
+ }
+
+ TempSetupValue=SetupData.DataBits[ComPort];
+
+ // Set data bits.
+ DataParityStopBit &= ~SERIALDB;
+ DataParityStopBit |= (UINT8)((TempSetupValue - 5) & 0x03);
+ gAmiComParameters.DataParityStop= DataParityStopBit;
+
+ IsFound = TRUE;
+ *AmiComParameters = gAmiComParameters;
+ return EFI_SUCCESS;
+ }
+
+ //
+ // Handle PCI COM port.
+ //
+
+ //
+ //Locate All devicepath handles
+ //
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiPciIoProtocolGuid,
+ NULL,
+ &PciHandleCount,
+ &PciHandleBuffer);
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ for (Index = 0; Index < PciHandleCount; Index++) {
+ Status = pBS->HandleProtocol (
+ PciHandleBuffer[Index],
+ &gEfiPciIoProtocolGuid,
+ &PciIo);
+
+
+ PciIo->Pci.Read (PciIo,
+ EfiPciIoWidthUint32,
+ PCI_REV_ID_OFFSET,
+ 1,
+ &RevisionId
+ );
+
+ if ((RevisionId[3] == PCI_CL_COMM) &&
+ ((RevisionId[2] == PCI_CL_COMM_CSL_SERIAL) || (RevisionId[2] == PCI_CL_COMM_CSL_OTHER))) {
+
+ Status = PciIo->GetLocation(PciIo, &SegNum, &Bus,&Device,&Function);
+ if (EFI_ERROR (Status)) {
+ continue;
+ }
+
+ PciIo->Pci.Read (PciIo,
+ EfiPciIoWidthUint16,
+ PCI_VID,
+ 1,
+ &VendorId
+ );
+ PciIo->Pci.Read (PciIo,
+ EfiPciIoWidthUint16,
+ PCI_DID,
+ 1,
+ &DeviceId
+ );
+
+ if(SkipInvalidPciComDevice(VendorId,DeviceId)) {
+ continue;
+ }
+
+ ComPort=GetPciSerialComPortNumber((UINT8)Device, (UINT8)Function, Port);
+
+ if(ComPort==0xFF) {
+ continue;
+ }
+ if (!SetupData.ConsoleRedirectionEnable[ComPort]) {
+ continue;
+ }
+#if (TOTAL_PCI_SERIAL_PORTS > 0)
+
+ if((!PciSerialPortsLocationVar.Segment[PciComPortforLegacy]==SegNum) ||
+ (!PciSerialPortsLocationVar.Bus[PciComPortforLegacy]==Bus) ||
+ (!PciSerialPortsLocationVar.Device[PciComPortforLegacy]==Device) ||
+ (!PciSerialPortsLocationVar.Function[PciComPortforLegacy]==Function)||
+ (!PciSerialPortsLocationVar.Port[PciComPortforLegacy]==Port)) {
+ continue;
+ }
+#endif
+ Supports = 1;
+
+ pBS->SetMem(&gAmiComParameters, (sizeof(AMI_COM_PARAMETERS)), 0);
+
+ for (ResIndex = 0; ResIndex < PCI_MAX_BAR_NO; ResIndex++) {
+ Status = PciIo->GetBarAttributes (
+ PciIo,
+ ResIndex,
+ &Supports,
+ &Resources
+ );
+
+ //
+ //Find the Serial device Resource type. Based on that Enable the IO and Memory
+ //
+ if (Resources->Type == ASLRV_SPC_TYPE_IO) {
+ gAmiComParameters.BaseAddress= (UINT16)Resources->_MIN;
+ Status = PciIo->Pci.Read(PciIo, EfiPciIoWidthUint8, 0x3c, 1, &gAmiComParameters.SerialIRQ);
+ CommandReg = PCI_CMD_IO_SPACE;
+ pBS->FreePool(Resources);
+ break;
+ } else if(Resources->Type == ASLRV_SPC_TYPE_MEM) {
+ gAmiComParameters.MMIOBaseAddress= (UINT32)Resources->_MIN;
+ Status = PciIo->Pci.Read(PciIo, EfiPciIoWidthUint8, 0x3c, 1, &gAmiComParameters.SerialIRQ);
+ CommandReg = PCI_CMD_MEMORY_SPACE;
+ pBS->FreePool(Resources);
+ break;
+ }
+ }
+
+ if(CommandReg != 0) {
+
+ PciIo->Pci.Read (PciIo,
+ EfiPciIoWidthUint16,
+ PCI_COMMAND_REGISTER_OFFSET,
+ 1,
+ &CommandRegValue
+ );
+ CommandRegValue|=CommandReg;
+ PciIo->Pci.Write (PciIo,
+ EfiPciIoWidthUint16,
+ PCI_COMMAND_REGISTER_OFFSET,
+ 1,
+ &CommandRegValue
+ );
+
+ Status = pBS->HandleProtocol (
+ PciHandleBuffer[Index],
+ &gEfiDevicePathProtocolGuid,
+ &tmpdp);
+
+
+ TruncatedDevPath=tmpdp;
+ do {
+ TruncatedDevPath = DPCut(TruncatedDevPath);
+ if(TruncatedDevPath == NULL ) {
+ break;
+ }
+
+ //
+ // Locate handle using device path
+ //
+ TempHandle= NULL;
+ TempDevPath=TruncatedDevPath;
+ Status = pBS->LocateDevicePath(
+ &gEfiPciIoProtocolGuid,
+ &TempDevPath,
+ &TempHandle);
+
+ if(Status == EFI_SUCCESS) {
+
+ RootPciIo=NULL;
+ Status = pBS->HandleProtocol (
+ TempHandle,
+ &gEfiPciIoProtocolGuid,
+ &RootPciIo); // Get Device path protocol
+
+ if(Status == EFI_SUCCESS) {
+
+ RootPciIo->Pci.Read (RootPciIo,
+ EfiPciIoWidthUint16,
+ PCI_COMMAND_REGISTER_OFFSET,
+ 1,
+ &CommandRegValue
+ );
+ CommandRegValue|=CommandReg;
+ RootPciIo->Pci.Write (RootPciIo,
+ EfiPciIoWidthUint16,
+ PCI_COMMAND_REGISTER_OFFSET,
+ 1,
+ &CommandRegValue
+ );
+ }
+
+ }
+
+ }while(TruncatedDevPath != NULL);
+
+ //
+ // Check the Port Presence
+ //
+ if(gAmiComParameters.MMIOBaseAddress != 0) {
+ if(ValidateComPort(gAmiComParameters.MMIOBaseAddress, TRUE) == FALSE) {
+ continue;
+ }
+ if(CheckForLoopbackDevice(gAmiComParameters.MMIOBaseAddress, TRUE) == TRUE) {
+ continue;
+ }
+ } else {
+ if(ValidateComPort(gAmiComParameters.BaseAddress, FALSE) == FALSE) {
+ continue;
+ }
+ if(CheckForLoopbackDevice(gAmiComParameters.BaseAddress, FALSE) == TRUE) {
+ continue;
+ }
+ }
+
+ //
+ //Other settings from Termial Redirection driver
+ //
+ gAmiComParameters.Baudrate = gComBaudRates[SetupData.BaudRate[ComPort]];
+ gAmiComParameters.TerminalType = TerminalTypes[SetupData.TerminalType[ComPort]];
+ gAmiComParameters.FlowControl = SetupData.FlowControl[ComPort];
+ gAmiComParameters.LegacyOsResolution = SetupData.LegacyOsResolution[ComPort];
+ gAmiComParameters.RecorderMode = SetupData.RecorderMode[ComPort];
+ gAmiComParameters.VtUtf8 = SetupData.VtUtf8[ComPort];
+ gAmiComParameters.PuttyKeyPad = SetupData.PuttyFunctionKeyPad[ComPort];
+#if (INSTALL_LEGACY_OS_THROUGH_REMOTE == 1)
+ gAmiComParameters.InstallLegacyOSthroughRemote = SetupData.InstallLegacyOSthroughRemote[ComPort];
+#endif
+ gAmiComParameters.RedirectionAfterBiosPost = SetupData.RedirectionAfterBiosPost[ComPort] ;
+ TempSetupValue=SetupData.Parity[ComPort];
+ // Set parity bits.
+ switch (TempSetupValue) {
+ case NoParity:
+ DataParityStopBit &= ~(PAREN | EVENPAR | STICPAR);
+ break;
+ case EvenParity:
+ DataParityStopBit |= (PAREN | EVENPAR);
+ DataParityStopBit &= ~STICPAR;
+ break;
+ case OddParity:
+ DataParityStopBit |= PAREN;
+ DataParityStopBit &= ~(EVENPAR | STICPAR);
+ break;
+ case SpaceParity:
+ DataParityStopBit |= (PAREN | EVENPAR | STICPAR);
+ break;
+ case MarkParity:
+ DataParityStopBit |= (PAREN | STICPAR);
+ DataParityStopBit &= ~EVENPAR;
+ break;
+ }
+
+ TempSetupValue=SetupData.StopBits[ComPort];
+
+ // Set stop bits.
+ switch (TempSetupValue) {
+ case OneStopBit :
+ DataParityStopBit &= ~STOPB;
+ break;
+ case OneFiveStopBits :
+ case TwoStopBits :
+ DataParityStopBit |= STOPB;
+ break;
+ }
+
+ TempSetupValue=SetupData.DataBits[ComPort];
+
+ // Set data bits.
+ DataParityStopBit &= ~SERIALDB;
+ DataParityStopBit |= (UINT8)((TempSetupValue - 5) & 0x03);
+ gAmiComParameters.DataParityStop= DataParityStopBit;
+
+ IsFound = TRUE;
+ IsPciDevice = TRUE;
+ *AmiComParameters = gAmiComParameters;
+ return EFI_SUCCESS;
+ }
+ }
+ }
+ } else {
+
+ //
+ // Handle ISA COM port.
+ //
+
+
+ //
+ //Locate All devicepath handles
+ //
+ Status = pBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiDevicePathProtocolGuid,
+ NULL,
+ &HandleCount,
+ &HandleBuffer);
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+#if (TOTAL_SIO_SERIAL_PORTS > 0)
+ Status = pRS->GetVariable(SIO_SERIAL_PORTS_LOCATION_VAR_C_NAME,
+ &gTerminalVarGuid,
+ &SioSerialPortsLocationVarAttributes,
+ &SioSerialPortsLocationVarSize,
+ &SioSerialPortsLocationVar);
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ for (Index = 0; Index < HandleCount; Index++) {
+ Status = pBS->HandleProtocol (
+ HandleBuffer[Index],
+ &gEfiDevicePathProtocolGuid,
+ &SerialDevicePath); // Get Device path protocol
+
+ if (EFI_ERROR (Status) || (SerialDevicePath == NULL)) continue;
+
+ TruncatedSerialDevicePath = SerialDevicePath;
+ //
+ //Check for the Serial Port device path
+ //
+ for (;!isEndNode(TruncatedSerialDevicePath);TruncatedSerialDevicePath = NEXT_NODE(TruncatedSerialDevicePath)) {
+ AcpiPrevDPNodePtr = (ACPI_HID_DEVICE_PATH *)(TruncatedSerialDevicePath); //get ACPI device path
+ if ((AcpiPrevDPNodePtr->Header.Type == ACPI_DEVICE_PATH)
+ && (AcpiPrevDPNodePtr->Header.SubType == ACPI_DP)
+ && (AcpiPrevDPNodePtr->HID == EISA_PNP_ID(0x501))) {
+
+ if(TOTAL_SIO_SERIAL_PORTS == 0) {
+ continue;
+ }
+
+ //
+ // Find the Port number ( Setup option offset)
+ //
+ for (k = 0; k < TOTAL_SIO_SERIAL_PORTS; k++) {
+ if ((SioSerialPortsLocationVar.PortUid[k] == (AcpiPrevDPNodePtr->UID) ) &&
+ (SioSerialPortsLocationVar.Valid[k] == 0xFF) &&
+ (k == SetupData.ComPortforLegacy)) {
+ ComPortNo = k;
+ break;
+ }
+ }
+
+ if(k == TOTAL_SIO_SERIAL_PORTS) {
+ continue;
+ }
+ //
+ //Check Terminal redirection device status.
+ //
+ if (!SetupData.ConsoleRedirectionEnable[ComPortNo]) continue;
+
+ //
+ //Locate AmiSioProtocol form this handle to get current resource of this device.
+ //
+ AmiSioDevicePath = SerialDevicePath; //Truncate End device path
+
+ Status = pBS->LocateDevicePath(&gEfiDevicePathProtocolGuid,
+ &AmiSioDevicePath,
+ &AmiSioProtocolHandle);
+
+ if (EFI_ERROR (Status)) continue;
+
+ Status = pBS->HandleProtocol (
+ AmiSioProtocolHandle,
+ &gEfiAmiSioProtocolGuid,
+ &AmiSioProtocol);
+
+ if (EFI_ERROR (Status) || (AmiSioProtocol == NULL)) continue;
+
+ Status = AmiSioProtocol->CurrentRes(AmiSioProtocol,
+ FALSE,
+ &ResourcesList);
+ if (EFI_ERROR(Status)) continue;
+
+ if(ResourcesList){
+ for(i=0; i<ResourcesList->ItemCount; i++){
+ Header=(ASLRF_S_HDR*)ResourcesList->Items[i];
+ switch(Header->Name) {
+ case ASLV_RT_FixedIO:
+ gAmiComParameters.BaseAddress=((ASLR_FixedIO*)Header)->_BAS;
+ break;
+ case ASLV_RT_IO:
+ gAmiComParameters.BaseAddress=((ASLR_IO*)Header)->_MIN;
+ break;
+ case ASLV_RT_IRQ:
+ gAmiComParameters.SerialIRQ = (UINT8)((ASLR_IRQNoFlags*)Header)->_INT;
+ break;
+ }
+ }
+ }
+ if(ValidateComPort(gAmiComParameters.BaseAddress, FALSE) == FALSE) {
+ continue;
+ }
+
+ if(CheckForLoopbackDevice(gAmiComParameters.BaseAddress, FALSE) == TRUE) {
+ continue;
+ }
+ //
+ //Other settings from Termial Redirection driver
+ //
+ gAmiComParameters.Baudrate = gComBaudRates[SetupData.BaudRate[ComPortNo]];
+ gAmiComParameters.TerminalType = TerminalTypes[SetupData.TerminalType[ComPortNo]];
+ gAmiComParameters.FlowControl = SetupData.FlowControl[ComPortNo];
+ gAmiComParameters.LegacyOsResolution = SetupData.LegacyOsResolution[ComPortNo];
+ gAmiComParameters.RecorderMode = SetupData.RecorderMode[ComPortNo];
+ gAmiComParameters.VtUtf8 = SetupData.VtUtf8[ComPortNo];
+ gAmiComParameters.PuttyKeyPad = SetupData.PuttyFunctionKeyPad[ComPortNo];
+#if (INSTALL_LEGACY_OS_THROUGH_REMOTE == 1)
+ gAmiComParameters.InstallLegacyOSthroughRemote = SetupData.InstallLegacyOSthroughRemote[ComPortNo];
+#endif
+ gAmiComParameters.RedirectionAfterBiosPost = SetupData.RedirectionAfterBiosPost[ComPortNo] ;
+ TempSetupValue=SetupData.Parity[ComPortNo];
+ // Set parity bits.
+ switch (TempSetupValue) {
+ case NoParity:
+ DataParityStopBit &= ~(PAREN | EVENPAR | STICPAR);
+ break;
+ case EvenParity:
+ DataParityStopBit |= (PAREN | EVENPAR);
+ DataParityStopBit &= ~STICPAR;
+ break;
+ case OddParity:
+ DataParityStopBit |= PAREN;
+ DataParityStopBit &= ~(EVENPAR | STICPAR);
+ break;
+ case SpaceParity:
+ DataParityStopBit |= (PAREN | EVENPAR | STICPAR);
+ break;
+ case MarkParity:
+ DataParityStopBit |= (PAREN | STICPAR);
+ DataParityStopBit &= ~EVENPAR;
+ break;
+ }
+
+ TempSetupValue=SetupData.StopBits[ComPortNo];
+
+ // Set stop bits.
+ switch (TempSetupValue) {
+ case OneStopBit :
+ DataParityStopBit &= ~STOPB;
+ break;
+ case OneFiveStopBits :
+ case TwoStopBits :
+ DataParityStopBit |= STOPB;
+ break;
+ }
+
+ TempSetupValue=SetupData.DataBits[ComPortNo];
+
+ // Set data bits.
+ DataParityStopBit &= ~SERIALDB;
+ DataParityStopBit |= (UINT8)((TempSetupValue - 5) & 0x03);
+ gAmiComParameters.DataParityStop= DataParityStopBit;
+
+ IsFound = TRUE;
+ IsPciDevice = FALSE;
+ *AmiComParameters = gAmiComParameters;
+ return EFI_SUCCESS;
+ }
+ }
+ }
+ }
+#else
+ return EFI_NOT_FOUND;
+#endif
+ return EFI_NOT_FOUND;
+#endif
+}
+
+//
+//TERMINAL TYPE:
+// db 0 ;ANSI
+// db 1 ;VT100
+// db 2 ;VT-UTF8
+//FLOWCONTROLlIST:
+// db 0 ;none
+// db 1 ;hardware Flow control
+// db 2 ;software
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Sredir/SerialCallback.Asm b/Board/EM/Sredir/SerialCallback.Asm
new file mode 100644
index 0000000..6c5005c
--- /dev/null
+++ b/Board/EM/Sredir/SerialCallback.Asm
@@ -0,0 +1,185 @@
+
+ TITLE SerialCallback.ASM - Oem callback function from sredir.bin
+
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2010, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
+
+;****************************************************************************
+; $Header: /Alaska/SOURCE/Modules/Legacy Serial Redirection/SerialCallback.ASM 1 5/03/10 1:53a Rameshr $
+;
+; $Revision: 1 $
+;
+; $Date: 5/03/10 1:53a $
+;****************************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/SOURCE/Modules/Legacy Serial Redirection/SerialCallback.ASM $
+;
+; 1 5/03/10 1:53a Rameshr
+; Callback function added for read and write function of the Serial Port.
+; EIP 37850
+;
+;****************************************************************************
+
+;----------------------------------------------------------------------------
+; INCLUDE FILES
+;----------------------------------------------------------------------------
+
+;----------------------------------------------------------------------------
+; EXTERNS USED
+;----------------------------------------------------------------------------
+.586p
+OEM16_CSEG SEGMENT PARA PUBLIC 'CODE' USE16
+ ASSUME cs:OEM16_CSEG, ds:OEM16_CSEG
+;-------------------------------------------------------------------------
+ PUBLIC SerialCallBackApiModuleStart
+SerialCallBackApiModuleStart LABEL BYTE
+ jmp SHORT SerialCallbackCsm16Api
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: SerialCsm16_API
+;
+; Description: This routine is implementation of the CSM16 API #B
+;
+; Input: CX 00h - Serial Read
+; 01h - Serial Write
+;
+; Output:
+;
+; Modified: None
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+SerialCallbackCsm16Api PROC FAR PUBLIC
+; Adjust current IP so that the data offsets are valid
+ call $+3 ; Push curent IP
+ pop bx ; Get current IP in BX
+ shr bx, 4
+ mov ax, cs ; Always x000h
+ add ax, bx ; New CS
+ push ax
+ push newSerialOffset-SerialCallBackApiModuleStart
+ retf ; Execute from new CS:IP
+
+newSerialOffset:
+ push bp
+ mov bp, sp
+ mov dx, ss:[bp+42h] ; Serial Port Address
+ mov ax, ss:[bp+40h] ; Write Data, For read it's invalid
+
+ cmp cx, 0
+ je SerialRead
+ cmp cx,1
+ je SerialWrite
+ jmp UnknownFunction
+SerialRead:
+ Call ReadSerialPort
+ jmp UnknownFunction
+SerialWrite:
+ Call WriteSerialPort
+ jmp UnknownFunction
+
+UnknownFunction:
+ pop bp
+
+; Adjust sp as if we returned to csm16_func_ret
+ add sp, 4 ; cs:ip of F000:csm16_func_ret
+
+; Save AX, restore it after popad
+ push ax
+ pop ds
+
+ popad
+
+ push ds
+ pop ax
+
+ pop gs
+ pop fs
+ pop es
+ pop ds
+
+ popf
+ pop ds
+ pop si
+
+ add sp, 2 ; Do not "pop ax", preserving return code
+
+ pop bp
+ add sp, 4
+
+ clc
+ retf
+SerialCallbackCsm16Api ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: WriteSerialPort
+;
+; Description: Oem Function before serial Read
+;
+; Input: None
+;
+; Output: None
+;
+; Modified: None
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+WriteSerialPort PROC NEAR PUBLIC
+ out dx,al
+ jmp $+2
+ ret
+WriteSerialPort ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: ReadSerialPort
+;
+; Description: Oem Function before serial Write
+;
+; Input: None
+;
+; Output: None
+;
+; Modified: None
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+ReadSerialPort PROC NEAR PUBLIC
+ in al,dx
+ jmp $+2
+ ret
+ReadSerialPort ENDP
+
+OEM16_CSEG ENDS
+
+END
+;****************************************************************************
+;****************************************************************************
+;** **
+;** (C)Copyright 1985-2010, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone (770)-246-8600 **
+;** **
+;****************************************************************************
+;****************************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.c b/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.c
new file mode 100644
index 0000000..c179dbc
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.c
@@ -0,0 +1,404 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi S3 Save/SgTpvAcpiS3Save.c 6 7/16/13 5:04a Joshchou $
+//
+// $Revision: 6 $
+//
+// $Date: 7/16/13 5:04a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi S3 Save/SgTpvAcpiS3Save.c $
+//
+// 6 7/16/13 5:04a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Save the dGPU ssid to SANV for restore.
+//
+// 5 3/21/13 3:39a Joshchou
+//
+// 4 1/15/13 5:04a Joshchou
+// [TAG] EIP107237
+// [Category] New Feature
+// [Description] Support SG on ULT platform.
+//
+// 3 10/16/12 4:45a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Update for SA and ACPI RC 0.7.1
+// [Files] SgTpvAcpiS3Save.c
+//
+// 2 9/09/12 10:53p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] SgTpvAcpiS3Save.mak
+// SgTpvAcpiS3Save.c
+// SgTpvAcpiS3Save.dxs
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgTpvAcpiS3Save.cif
+// SgTpvAcpiS3Save.sdl
+// SgTpvAcpiS3Save.mak
+// SgTpvAcpiS3Save.c
+// SgTpvAcpiS3Save.dxs
+//
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: SgTpvAcpiS3Save.c
+//
+// Description: This file will save SG TPV related offset date for S3 resume restore.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include <Token.h>
+#include <AmiCspLib.h>
+#include <AmiDxeLib.h>
+#include <Setup.h>
+#include <PCI.h>
+#include <SaGlobalNvsArea\SaGlobalNvsArea.h>
+#include "CpuRegs.h"
+//#include "CpuPlatformLib.h"
+
+#include "PchRegsPcie.h"
+
+//----------------------------------------------------------------------------
+// Constant, Macro and Type Definition(s)
+//----------------------------------------------------------------------------
+// Constant Definition(s)
+#define NVIDIA_VID 0x10DE
+#define NVOPT_SSID_OFFSET 0x40
+
+#define AMD_SVID_OFFSET 0x4C
+#define AMD_SDID_OFFSET 0x4E
+#define AMD_VID 0x1002
+
+// Function Prototype(s)
+VOID SgTpvAcpiS3Save (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+);
+
+//----------------------------------------------------------------------------
+// Variable and External Declaration(s)
+//----------------------------------------------------------------------------
+// Variable Declaration(s)
+EFI_EVENT gEvent;
+SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL *SaGlobalNvsArea;
+
+// GUID Definition(s)
+EFI_GUID gEfiPciIoProtocolGuid = EFI_PCI_IO_PROTOCOL_GUID;
+EFI_GUID gSetupGuid = SETUP_GUID;
+EFI_GUID gSaGlobalNvsAreaProtocolGuid = SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL_GUID;
+EFI_GUID gEfiBootScriptSaveGuid = EFI_BOOT_SCRIPT_SAVE_GUID;
+
+CPU_FAMILY CpuFamilyId;
+
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SgTpvAcpiS3Save_Init
+//
+// Description: This function is the entry point for this DXE. This function
+// will save SG TPV related offset date for S3 resume restore.
+//
+// Input: ImageHandle - Image handle
+// SystemTable - Pointer to the system table
+//
+// Output: Return Status based on errors that occurred while waiting for
+// time to expire.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+SgTpvAcpiS3Save_Init (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINTN VariableSize = NULL;
+ SETUP_DATA *SetupData = NULL;
+
+
+
+ InitAmiLib(ImageHandle,SystemTable);
+
+ // Initialize Setup Data
+ Status = GetEfiVariable(
+ L"Setup",
+ &gSetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData
+ );
+
+
+ // If Select SG mode
+ if (SetupData->PrimaryDisplay == 4){
+
+ Status = CreateReadyToBootEvent( TPL_NOTIFY, SgTpvAcpiS3Save, \
+ NULL, &gEvent );
+
+ ASSERT_EFI_ERROR(Status);
+
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: SgTpvAcpiS3Save
+//
+// Description: This callback function is called when ReadyToBoot is
+// installed.
+//
+// Input: Event - Event of callback
+// Context - Context of callback.
+//
+// Output: EFI_SUCCESS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID SgTpvAcpiS3Save (
+ IN EFI_EVENT Event,
+ IN VOID *Context )
+{
+
+ EFI_STATUS Status;
+ UINT16 VendorId;
+ UINT8 EndpointBus;
+ UINT16 Data16;
+ UINT32 Data32;
+ UINT16 Count;
+ UINTN Index;
+ UINTN VariableSize = NULL;
+ UINT32 RegEax, RegEbx, RegEcx, RegEdx;
+ SETUP_DATA *SetupData = NULL;
+ EFI_BOOT_SCRIPT_SAVE_PROTOCOL *BootScriptSave;
+ UINT8 RootPortDev;
+ UINT8 RootPortFun;
+
+
+ TRACE((-1, "==============SgTpvAcpiS3Save==========\n"));
+ // Initialize Setup Data
+ Status = GetEfiVariable(
+ L"Setup",
+ &gSetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData
+ );
+ if (EFI_ERROR (Status)) {
+ return ;
+ }
+ //
+ // Locate the SA Global NVS Protocol.
+ //
+ Status = pBS->LocateProtocol (
+ &gSaGlobalNvsAreaProtocolGuid,
+ NULL,
+ &SaGlobalNvsArea
+ );
+ if (EFI_ERROR (Status)) {
+ return ;
+ }
+
+ Status = pBS->LocateProtocol( \
+ &gEfiBootScriptSaveGuid, \
+ NULL, \
+ &BootScriptSave
+ );
+ if (EFI_ERROR (Status)) {
+ return ;
+ }
+
+ CPULib_CpuID(1, &RegEax, &RegEbx, &RegEcx, &RegEdx);
+ CpuFamilyId = (RegEax & CPUID_FULL_FAMILY_MODEL);
+
+ TRACE((-1, "CpuFamilyId = 0x%x\n",CpuFamilyId));
+ RootPortDev = 1;
+ RootPortFun = 0;
+
+ if (CpuFamilyId == EnumCpuHswUlt) {
+ /// For SwitchableGraphics support the dGPU is present on PCH RootPort
+ RootPortDev = PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS;
+ RootPortFun = SG_ULT_PORT_FUNC;
+ }
+
+ //EndpointBus = READ_PCI8 (0, 1, 0, PCI_SBUS);
+ EndpointBus = READ_PCI8 ( 0, RootPortDev, RootPortFun, PCI_SBUS);
+ //
+ // Endpoint Device Not found
+ //
+ if (EndpointBus == 0xFF) {
+ return ;
+ }
+
+ VendorId = READ_PCI16 (EndpointBus, 0, 0, PCI_VID);
+ //
+ // if Device Not found or Devide is not AMD and Nvidia VGA device
+ //
+ if (VendorId == 0xFFFF || ((VendorId != NVIDIA_VID) && (VendorId != AMD_VID))) {
+ return ;
+ }
+
+
+ //
+ // Store the Root port Bus assignemnt for S3 resume path
+ //
+
+ Data32 = READ_PCI32 (0, RootPortDev, RootPortFun, PCI_PBUS);
+ BOOT_SCRIPT_S3_MEM_WRITE_MACRO (
+ BootScriptSave,
+ EfiBootScriptWidthUint32,
+ NB_PCIE_CFG_ADDRESS(0, RootPortDev, RootPortFun, PCI_PBUS),
+ 1,
+ &Data32
+ );
+
+ Data16 = READ_PCI16 (0, RootPortDev, RootPortFun, PCI_BAR3);
+ BOOT_SCRIPT_S3_MEM_WRITE_MACRO (
+ BootScriptSave,
+ EfiBootScriptWidthUint16,
+ NB_PCIE_CFG_ADDRESS(0, RootPortDev, RootPortFun, PCI_BAR3),
+ 1,
+ &Data16
+ );
+
+ //
+ // Store the Generic PCI config space of dGPU for S3 resume path
+ //
+
+ for (Count = 4; Count < 0x40; Count+=4) {
+ Data32 = READ_PCI32 (EndpointBus, 0, 0, Count);
+ BOOT_SCRIPT_S3_MEM_WRITE_MACRO (
+ BootScriptSave,
+ EfiBootScriptWidthUint32,
+ NB_PCIE_CFG_ADDRESS(EndpointBus, 0, 0, Count),
+ 1,
+ &Data32
+ );
+ }
+
+ switch(VendorId){
+ case NVIDIA_VID:
+ //
+ // if PEG is NVIDIA and supports Muxless mode
+ //
+ if (SetupData->SgMuxMode == 2){
+
+
+ //
+ // Set a unique SSID on the Nv Optimus Graphics
+ //
+ Data32 = READ_PCI32 (0, 2, 0, PCI_SVID);
+ WRITE_PCI32 (EndpointBus, 0, 0, NVOPT_SSID_OFFSET, Data32);
+
+ SaGlobalNvsArea->Area->DgpuSsid = READ_PCI32 (EndpointBus, 0, 0, NVOPT_SSID_OFFSET); // DEBUG
+ TRACE((-1, "DgpuSsid in SgTpvAcpiS3Save =0x%X\n", SaGlobalNvsArea->Area->DgpuSsid));
+
+ BOOT_SCRIPT_S3_MEM_WRITE_MACRO (
+ BootScriptSave,
+ EfiBootScriptWidthUint32,
+ NB_PCIE_CFG_ADDRESS(EndpointBus, 0, 0, NVOPT_SSID_OFFSET),
+ 1,
+ &Data32
+ );
+
+ //
+ // Disable Peg Endpoint Function 1 (HDMI Support)
+ //
+ Data16 = READ_PCI16(EndpointBus, 0, 0, PCI_CMD);
+ Data16 = (Data16 & (!(BIT0+BIT1+BIT2)));
+ Data16 = (Data16 | (BIT1+BIT2));
+ WRITE_PCI16 (EndpointBus, 0, 0, PCI_CMD, Data16);
+
+ Data32 = READ_PCI32 (EndpointBus, 0, 0, PCI_BAR0); // Resd Bar 0 MMIO address
+ Data32 += 0x88488;
+ Index = (UINT32)Data32;
+ *(UINT32*)(Data32) &= ~BIT25; // Clear Bit 25
+ // Keep HDA enabled on cold boots. Optimus Gfx driver shall disable it if not needed
+ // or read from CMOS...
+ Data32 = ((SaGlobalNvsArea->Area->SgFeatureList & 0x2) << 24); // dGPUAudioCodec bit2
+ BOOT_SCRIPT_S3_MEM_WRITE_MACRO (
+ BootScriptSave,
+ EfiBootScriptWidthUint32,
+ (UINTN)(Index),
+ 1,
+ &Data32
+ );
+
+ }
+ break;
+ case AMD_VID:
+ //
+ // if PEG is AMD
+ //
+ //
+ // Set a unique SSID on the AMD MXM
+ //
+ Data32 = READ_PCI32 (0, 2, 0, PCI_SVID);
+ WRITE_PCI32 (EndpointBus, 0, 0, AMD_SVID_OFFSET, Data32);
+
+ SaGlobalNvsArea->Area->DgpuSsid = READ_PCI32 (EndpointBus, 0, 0, AMD_SVID_OFFSET); // DEBUG
+ TRACE((-1, "DgpuSsid in SgTpvAcpiS3Save =0x%X\n", SaGlobalNvsArea->Area->DgpuSsid));
+
+ BOOT_SCRIPT_S3_MEM_WRITE_MACRO (
+ BootScriptSave,
+ EfiBootScriptWidthUint32,
+ NB_PCIE_CFG_ADDRESS(EndpointBus, 0, 0, AMD_SVID_OFFSET),
+ 1,
+ &Data32
+ );
+
+ break;
+ default:
+ //
+ // either means the Device ID is not on the list of devices we know - we return from this function
+ break;
+ //
+ }
+
+ pBS->CloseEvent(Event);
+}
+
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012 American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.cif b/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.cif
new file mode 100644
index 0000000..a606e64
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "Sg Acpi S3 Save"
+ category = ModulePart
+ LocalRoot = "Board\EM\SwitchableGraphics\SgTpv\AcpiS3Save"
+ RefName = "SgTpvAcpiS3Save"
+[files]
+"SgTpvAcpiS3Save.sdl"
+"SgTpvAcpiS3Save.mak"
+"SgTpvAcpiS3Save.c"
+"SgTpvAcpiS3Save.dxs"
+<endComponent>
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.dxs b/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.dxs
new file mode 100644
index 0000000..97e1840
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.dxs
@@ -0,0 +1,68 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi S3 Save/SgTpvAcpiS3Save.dxs 2 9/09/12 10:53p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 10:53p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi S3 Save/SgTpvAcpiS3Save.dxs $
+//
+// 2 9/09/12 10:53p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] SgTpvAcpiS3Save.mak
+// SgTpvAcpiS3Save.c
+// SgTpvAcpiS3Save.dxs
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgTpvAcpiS3Save.cif
+// SgTpvAcpiS3Save.sdl
+// SgTpvAcpiS3Save.mak
+// SgTpvAcpiS3Save.c
+// SgTpvAcpiS3Save.dxs
+//
+//
+//
+//**********************************************************************
+#include <Protocol\GlobalNvsArea\GlobalNvsArea.h>
+#include <protocol\AcpiSupport.h>
+
+DEPENDENCY_START
+ EFI_ACPI_SUPPORT_GUID AND
+ EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID
+DEPENDENCY_END
+
+
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//**************************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.mak b/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.mak
new file mode 100644
index 0000000..db66ed0
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.mak
@@ -0,0 +1,107 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi S3 Save/SgTpvAcpiS3Save.mak 4 1/15/13 5:06a Joshchou $
+#
+# $Revision: 4 $
+#
+# $Date: 1/15/13 5:06a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi S3 Save/SgTpvAcpiS3Save.mak $
+#
+# 4 1/15/13 5:06a Joshchou
+# [TAG] EIP107237
+# [Category] New Feature
+# [Description] Support SG function onULT platform.
+#
+# 3 10/16/12 4:46a Joshchou
+# [TAG] None
+# [Category] New Feature
+# [Description] Update for SA and ACPI RC 0.7.1
+# [Files] SgTpvAcpiS3Save.mak
+#
+# 2 9/09/12 10:53p Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Tpv module support for sharkbay.
+# [Files] SgTpvAcpiS3Save.mak
+# SgTpvAcpiS3Save.c
+# SgTpvAcpiS3Save.dxs
+#
+# 1 6/27/11 5:27a Alanlin
+# [TAG] EIP61848
+# [Category] New Feature
+# [Description] Initial check-in.Integrated SwitchableGraphics Intel
+# Reference code 0.6.0
+# [Files] SgTpvAcpiS3Save.cif
+# SgTpvAcpiS3Save.sdl
+# SgTpvAcpiS3Save.mak
+# SgTpvAcpiS3Save.c
+# SgTpvAcpiS3Save.dxs
+#
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: SgTpvAcpiS3Save.mak
+#
+# Description: Make file to build SG TPV ACPI components
+#
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+SgTpv : SgTpvAcpiS3Save
+
+SgTpvAcpiS3Save: $(BUILD_DIR)\SgTpvAcpiS3Save.mak SgTpvAcpiS3SaveBin
+
+#---------------------------------------------------------------------------
+# Generic SgTpvAcpiTables dependencies
+#---------------------------------------------------------------------------
+$(BUILD_DIR)\SgTpvAcpiS3Save.mak : $(SGTPV_ACPIS3_DIR)\SgTpvAcpiS3Save.cif $(BUILD_RULES)
+ $(CIF2MAK) $(SGTPV_ACPIS3_DIR)\SgTpvAcpiS3Save.cif $(CIF2MAK_DEFAULTS)
+
+
+#---------------------------------------------------------------------------
+# Create SgTpvAcpiS3Save DXE Component
+#---------------------------------------------------------------------------
+
+SgTpvAcpiS3SaveBin : $(AMIDXELIB) $(AMICSPLib) $(INTEL_SA_PROTOCOL_LIB) $(CpuPlatformLib_LIB) $(PchPlatformSmmLib_LIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\SgTpvAcpiS3Save.mak all\
+ GUID=C18B8105-AB89-44de-8D37-50B31FAE5D1E\
+ "MY_INCLUDES= $(ACPI_PLATFORM_INCLUDES) $(PLATFORM_INFO_INCLUDES) $(PROJECT_CPU_INCLUDES) /I $(INTEL_SA_PROTOCOL_LIB_DIR)"\
+ ENTRY_POINT=SgTpvAcpiS3Save_Init\
+ OBJECTS="$(SgTpvAcpiS3Save_OBJECTS)" \
+ TYPE=BS_DRIVER \
+ DEPEX1=$(SGTPV_ACPIS3_DIR)\SgTpvAcpiS3Save.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ COMPRESS=1
+
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.sdl b/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.sdl
new file mode 100644
index 0000000..e7f6e7e
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiS3Save/SgTpvAcpiS3Save.sdl
@@ -0,0 +1,35 @@
+TOKEN
+ Name = "SgTpvAcpiS3Save_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable SgAcpiS3Save support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "SGTPV_ACPIS3_DIR"
+ Help = "Path to SG AcpiS3Save folder"
+End
+
+MODULE
+ File = "SgTpvAcpiS3Save.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\SGTPVAcpiS3Save.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "SgTpvAcpiS3Save_OBJECTS"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\$(SGTPV_ACPIS3_DIR)\SgTpvAcpiS3Save.obj"
+ Parent = "SgTpvAcpiS3Save_OBJECTS"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNVdGPU.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNVdGPU.asl
new file mode 100644
index 0000000..b8f2b90
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNVdGPU.asl
@@ -0,0 +1,710 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/OEMSSDT/OEMNVdGPU.asl 2 9/09/12 11:01p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:01p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/OEMSSDT/OEMNVdGPU.asl $
+//
+// 2 9/09/12 11:01p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] OEMSSDT.mak
+// OEMSSDT.asl
+// OEMNVdGPU.asl
+// OEMNViGPU.asl
+// OEMNViGDmisc.asl
+// OEMNvVentura.asl
+// OEMNvGPS.asl
+// OEMSSDT.cif
+//
+// 3 12/26/11 5:00a Alanlin
+// 1.Change OperationRegion of BPCI access type from "AnyAcc" to
+// "DWordAcc" for nVidia VGA.
+//
+//
+// 1 12/12/11 9:10p Alanlin
+//
+//
+//**********************************************************************
+// PEG Endpoint PCIe Base Address.
+External(EBAS)
+External(NVHA)
+
+#ifdef OPTIMUS_DSM_GUID
+Scope(PCI_SCOPE){
+
+ Name(OTM, "OTMACPI 2010-Mar-09 12:08:26") // OTMACPIP build time stamp.
+} // end of Scope
+#endif
+
+Scope(DGPU_SCOPE)
+{
+
+//<AMI_SHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: NVHM
+//
+// Description: Nvidia NVHG (dGPU) OperationRegion
+// OpRegion address (NVHA)is defined in IDG Nvs OpRegion
+//
+//-------------------------------------------------------------------------
+//<AMI_SHDR_END>
+ OperationRegion(NVHM,SystemMemory, NVHA, 0x20400)
+ Field(NVHM, DWordAcc, NoLock, Preserve)
+ {
+ // OpRegion Header
+
+ NVSG, 0x80, // (000h) Signature-"NVSG".
+ NVSZ, 0x20, // (010h) OpRegion Size in KB.
+ NVVR, 0x20, // (014h) OpRegion Version.
+
+ // NVHG data
+
+ NVHO, 0x20, // (018h)NVHM opregion address
+ RVBS, 0x20, // (01Ch)NVIDIA VBIOS image size
+ // (020h)for _ROM
+ RBF1, 0x80000, // 0x10000 bytes in bits
+ RBF2, 0x80000, // 0x10000 bytes in bits
+ MXML, 0x20, // Mxm3 buffer length
+#if MXM30_SUPPORT
+ MXM3, MXM_ROM_MAX_SIZE_bits // MXM 3.0 Data buffer
+#else
+ MXM3, 0x640 // MXM 3.0 Data buffer
+#endif
+
+ }
+
+ Name(OPCE, 2) // Optimus Power-Control ENABLE
+ // 2: The platform should not power down the GPU subsystem
+ // in the _PS3 method (Default)
+ // 3: The platform should power down the GPU subsystem
+ // at the end of the _PS3 ACPI method
+
+ Name(DGPS, Zero)// Power State. dummy control field. Can be a GPIO in EC or PCH
+
+#ifdef OPTIMUS_DSM_GUID
+
+//If dGPU power control is available....
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _PSC
+//
+// Description: Curent dGPU power state, 0-D0, 3-D3, etc.
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Name(_PSC, Zero)
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _PS0
+//
+// Description: dGPU power ON control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(_PS0, 0, NotSerialized)
+ {
+ P8DB(0xB0, OPCE, 2000)
+ Store(Zero, _PSC)
+ If(LNotEqual(DGPS, Zero))
+ {
+ _ON() // with Optimus w/a
+ Store(Zero, DGPS)
+ }
+ }
+
+ Method(_PS1, 0x0, NotSerialized)
+ {
+ Store(One, _PSC)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _PS3
+//
+// Description: dGPU power OFF control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(_PS3, 0, NotSerialized)
+ {
+ P8DB(0xB3, OPCE, 2000)
+ If(LEqual(OPCE, 0x3))
+ {
+ If(LEqual(DGPS, Zero))
+ {
+ _OFF() // w Optimus w/a
+ Store(One, DGPS)
+ }
+ Store(0x2, OPCE) // Reset NV GPU power down flag
+ }
+ Store(0x3, _PSC)
+ }
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _STA
+//
+// Description: dGPU power status.
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_STA,0x0)
+ {
+ Return(0x0F) // Always return DGPU is powered-ON
+ }
+
+#endif // OPTIMUS_DSM_GUID
+
+#if HYBRID_DSM_GUID || MXM_DSM_GUID
+// NON-OPTIMUS mode - MUXed
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _IRC
+//
+// Description: In-rush current
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+// Name(_IRC, 0)
+ Method(_IRC,0,Serialized)
+ {
+ Return(0x00)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _ON
+//
+// Description: dGPU power ON control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_ON,0,Serialized)
+ {
+ SGON() // OEM Mxm Power On
+
+ //Ask OS to do a PnP rescan
+ Notify(PEG_SCOPE,0)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _OFF
+//
+// Description: dGPU power OFF control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_OFF,0,Serialized)
+ {
+ SGOF() // OEM Mxm Power On
+
+ //Ask OS to do a PnP rescan
+ Notify(PEG_SCOPE,0)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _STA
+//
+// Description: Returns curent dGPU power/presence state
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_STA,0,Serialized)
+ {
+ Return(SGST()) // OEM Mxm Power status
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: MXMX
+//
+// Description: Display DDC Mux Control
+//
+// Input:
+// Arg0: Get/Set DDC/Aux Mux State
+// 0- Acquire DDC/Aux Mux on this GPU
+// 1- Release Mux from this GPU
+// 2- Get Mux state
+//
+// Output:
+// 0, Not Acquired.
+// if Arg0 = 0 or 1, Non-Zero return indicates success acquiring MUX
+// (and MUX has switched to this output)
+// if Arg0 = 2, Non-Zero return indicates MUX is currently set to this output
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method (MXMX, 1, Serialized)
+ {
+ P8DB(0x99, Arg0, 2000)
+
+ If (LEqual (Arg0, 0))
+ {
+
+ //Acquire DDC/AUX mux
+ // No mutex implemented. No need to acquire mutex.
+ // Set mux to dGPU
+// SGPO(DSEL, 1)// dGPU_SELECT#
+ SGPO(ESEL, 1)// use EDID_SELECT# as Mutex flag
+ Return(1)
+ }
+
+ If (LEqual (Arg0, 1))
+ {
+
+ //Release DDC/AUX mux
+ // No mutex implemented. No need to release mutex.
+ // 2-way mux. Hence no need to do anything
+ Return(0x1)
+
+ }
+
+ If (LEqual (Arg0, 2))
+ {
+
+ //Get ddc/aux mux status for dGPU
+ Return(SGPI(ESEL))
+ }
+
+ Return(0x0) // mutex not acquired
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: MXDS
+//
+// Description: Display output MUX control
+//
+// Input:
+// Arg0:
+// 0 - Get Mux state
+// 1 - Set Display to active on this GPU
+// 2 - Set Backlight control to active on this GPU
+// 3 - Set Display & Backlight to active on this GPU
+//
+// Output:
+// If Arg0 = 0, Error = Display is not MUXed
+// Else return value of the state of the MUX
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(MXDS, 1, Serialized)
+ {
+ P8DB(0x9A, Arg0, 2000)
+
+ If(LEqual (Arg0, 0))
+ {
+ //Get display mux status for dGPU
+ return(SGPI(DSEL))
+ } else
+// If(LOr(LEqual (Arg0, 1), LEqual (Arg0, 2)))
+ {
+ //Set display mux to dgpu
+ SGPO(DSEL, 1) // dGPU_SELECT
+ SGPO(PSEL, 1) // dGPU_PWM_SELECT
+ }
+
+ Return (0)
+ }
+#endif // MXM && HYBRID
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _ROM
+//
+// Description: Video ROM data buffer
+//
+// Input:
+// Arg0: Integer Offset of the graphics device ROM data
+// Arg1: Integer Size of the buffer to fill in (up to 4K)
+//
+// Output:
+// Buffer Buffer of requested video ROM bytes
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_ROM,2)
+ {
+
+ Store (Arg0, Local0)
+ Store (Arg1, Local1)
+
+ P8DB(0x44, Local1, 100)
+// CreateWordField (RBF1, 2, RVBS) // Vbios image size
+// ShiftLeft(And(RVBS,0xff), 9, RVBS) // size in Bytes (* 512)
+
+ If (LGreater (Local1, 0x1000))
+ {
+ Store (0x1000, Local1)
+ }
+ If (LGreater (Local0, 0x20000))
+ {
+ Return(Buffer(Local1){0})
+ }
+// If (LGreater (Local0, RVBS))
+// {
+// Return(Buffer(Local1){0})
+// }
+//// If (LGreater (Add (Local0, Local1), RVBS))
+//// {
+//// Store (0x00, Local0)
+//// }
+
+ Multiply (Local1, 0x08, Local3)
+ Name (ROM1, Buffer (0x10000) {0})
+ Name (ROM2, Buffer (Local1) {0})
+
+ If(LLess(Local0,0x10000))
+ {
+ Store (RBF1, ROM1)
+ }
+ Else
+ {
+ Subtract(Local0,0x10000,Local0)
+ Store (RBF2, ROM1)
+ }
+
+ Multiply (Local0, 0x08, Local2)
+ CreateField (ROM1, Local2, Local3, TMPB)
+ Store (TMPB, ROM2)
+ Return (ROM2)
+ }
+
+//
+// Check for Nvidia _DSM UUIDs
+//
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HDSM
+//
+// Description: Device Specific Methods for Hybrid dGPU (may be invoked from iGD as well)
+// Implements Mxm and SG specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// nVidia
+// MXM dGPU GUID :9D95A0A0-0060-4D48-B34D-7E5FEA129FD4
+//
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(HDSM, 4, SERIALIZED)
+ {
+
+#ifdef MXM_DSM_GUID
+
+ If(LEqual(Arg0, ToUUID("4004A400-917D-4cf2-B89C-79B62FD55665")))
+ {
+
+ P8DB(0xEE, Arg2, 1000)
+
+ Switch(ToInteger(Arg2))
+ {
+ //
+ // Function 0: MXM_FUNC_MXSS
+ //
+ case (0)
+ {
+ //Sub-Functions 0,16,24 are supported
+ Return(ToBuffer(0x01010001))
+ }
+
+ //
+ // Function 24: MXM_FUNC_MXMI
+ //
+ case (24)
+ {
+ Return(ToBuffer(0x300)) // MXM 1.101 defines revision as 0x300
+ // Return(ToBuffer(0x30)) // MXM 1.101 defines revision as 0x300
+ }
+
+ //
+ // Function 16: MXM_FUNC_MXMS
+ //
+ case (16)
+ {
+ If(LEqual (Arg1, 0x300)) // MXM 1.101 defines revision as 0x300
+ {
+#if MXM30_SUPPORT
+ // calculate true length of MXM block
+ CreateWordField(MXM3, 6, MXLN)
+ Add(MXLN, 8, Local0) // Add length of MXM header
+ CreateField(MXM3, 0, Local0, MXM)
+ Return(ToBuffer(MXM))
+#else
+ // ElkCreek 4 Mxm data structure
+ Name(MXM3, Buffer()
+ {
+ 0x4d, 0x58, 0x4d, 0x5f, 0x03, 0x00, 0x5d, 0x00,
+ 0x30, 0x11, 0xb8, 0xff, 0xf9, 0x3e, 0x00, 0x00,
+ 0x00, 0x00, 0x0a, 0xf0, 0xf9, 0x3e, 0x00, 0x00,
+ 0x60, 0xe9, 0xd0, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x60, 0x6a, 0xda, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x20, 0x2b, 0xe2, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x60, 0x6c, 0xea, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x20, 0x6a, 0xda, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x20, 0x6c, 0xea, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x01, 0x90, 0x01, 0x00, 0x03, 0x00, 0x90, 0x01,
+ 0x13, 0x00, 0x90, 0x01, 0xe5, 0x0d, 0x01, 0x01,
+ 0x01, 0x00, 0x00, 0x00, 0xe5, 0x0d, 0x01, 0x03,
+ 0x00, 0x90, 0xd8, 0x09, 0x11, 0x0a
+ })
+ Return(MXM3)
+#endif
+ }
+ }
+ } // switch
+ Return(0x80000002) //MXM_ERROR_UNSUPPORTED - FunctionCode or SubfunctionCode not supported
+ } // "4004A400-917D-4cf2-B89C-79B62FD55665"
+
+#endif // MXM_DSM_GUID
+
+ Return (0x80000001) //MXM_ERROR_UNSPECIFIED
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _DSM Device Specific Method for dGPU device
+//
+// Description: Implement Mxm and SG specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// MXM dGPU GUID :9D95A0A0-0060-4D48-B34D-7E5FEA129FD4
+// NBCI GUID :D4A50B75-65C7-46F7-BfB7-41514CEA0244
+// Ventura GUID :95DB88FD-940A-4253-A446-70CE0504AEDF
+// Optimus DSM_GUID :A486D8F8-0BDA-471B-A72B-6042A6B5BEE0
+//
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_DSM,4,SERIALIZED)
+ {
+ CreateByteField (Arg0, 3, GUID)
+ P8DB(0xDD, GUID, 1000)
+ //
+ // Check for Nvidia _DSM UUIDs
+ //
+ // common _DSM for dGPU and iGPU: NBCI, SG DSM, Ventura
+ return(IGPU_SCOPE.HDSM(Arg0, Arg1, Arg2, Arg3))
+ }
+
+
+#ifdef OPTIMUS_DSM_GUID
+///////////////////////////////////////////////////////////////////
+// Nvidia Optimus driver w/a. Save PCI context of PEG Video card
+///////////////////////////////////////////////////////////////////
+// PEG Endpoint PCIe Base Address.
+ OperationRegion (BPCI, SystemMemory, EBAS, 0x1000)
+ Field (BPCI, DWordAcc, NoLock, Preserve)
+ {
+// VGAR, 2048,
+ Offset(0x04),
+ //PCIC, 16,
+ PCIC, 32,
+
+ Offset(0x10),
+ GMM1, 32,
+
+ Offset(0x14),
+ GMM2, 32,
+
+ //Offset(0x18),
+ //GMB1, 32,
+
+ Offset(0x1C),
+ GMM3, 32,
+
+ Offset(0x24),
+ GIO1, 32,
+
+ Offset(0x3C),
+ //GIRQ, 8,
+ GIRQ, 32,
+
+ Offset(0x40),
+ SID, 32,
+
+// Offset(0x88),
+// , 5,
+// RETR, 1,
+
+ //Offset(0x114),
+ //VC0R, 32,
+ Offset(0x488),
+ , 25,
+ NHDM, 1 // HDA Enable bit.
+ }
+
+// Create the dGPU PCI Configuration data buffer for dGPU save/restore resources
+ Name(BUFF, Buffer(32){}) // Create dGPU PCI Configuration data buffer as BUFF
+ CreateDWordField(BUFF, 0x00, BUF1) //
+ CreateDWordField(BUFF, 0x01, BUF2) //
+ CreateDWordField(BUFF, 0x02, BUF3) //
+ CreateDWordField(BUFF, 0x03, BUF4) //
+ CreateDWordField(BUFF, 0x04, BUF5) //
+ CreateDWordField(BUFF, 0x05, BUF6) //
+ CreateDWordField(BUFF, 0x06, BUF7) //
+ CreateDWordField(BUFF, 0x07, BUF8) //
+
+// TEST !!! TEST !!! TEST !!!!
+// NvOptimus should not be be using _ON and _OFF methods for power cycling
+// Used here for testing with Intel ElkCreek Mxm interposer
+//
+ Name(CTXT, Zero)// Save Context flag
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _ON
+//
+// Description: Optimus w/a for before dGPU _ON
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(_ON, 0, Serialized)
+ {
+ P8DB(0x01, 0x11, 2000)
+
+ // OEM Mxm Power status
+ SGON()
+
+// Nvidia Optimus driver w/a. Restore saved PCI context of PEG Video card
+// Store(BUF8,VC0R)
+
+ Store(BUF1,PCIC)
+ Store(BUF2,GMM1)
+ Store(BUF3,GMM2)
+ Store(BUF4,GMM3)
+ Store(BUF5,GIO1)
+ Store(BUF6,GIRQ)
+ Store(BUF7,SID)
+
+// Store(1, RETR) // retrain PCI-E bus
+//+<
+// doesn't look like we need delay here...
+// Sleep(0x64)
+
+ Store(SWSMI_NVOEM_CMOS_R, SSMP) // Read CMOS:AudioCodec flag to AcpiNvs:SGFL
+// Clear HDA enable bit if flag not set
+ if(LEqual(And(SGFL, 2), 0))
+ {
+ Store(0, NHDM)
+ }
+
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _OFF
+//
+// Description: Optimus w/a before dGPU _OFF
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(_OFF, 0, Serialized)
+ {
+
+ P8DB(0x0F, 0xFF, 2000)
+
+// store PCI context only once
+ If(LEqual(CTXT, Zero))
+ {
+// Nvidia Optimus driver w/a. Save PCI context of PEG Video card
+// Store(VGAR, VGAB)
+//+>save dGPU resources
+ Store(PCIC,BUF1)
+ Store(GMM1,BUF2)
+ Store(GMM2,BUF3)
+ Store(GMM3,BUF4)
+ Store(GIO1,BUF5)
+ Store(GIRQ,BUF6)
+ Store(SID,BUF7)
+// Store(VC0R,BUF8)
+//+<
+ Store(1, CTXT)
+ }
+ SGOF()
+
+ }
+#endif
+} // end Scope(DGPU_SCOPE)
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNViGDmisc.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNViGDmisc.asl
new file mode 100644
index 0000000..6e3ee2e
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNViGDmisc.asl
@@ -0,0 +1,241 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/OEMSSDT/OEMNViGDmisc.asl 2 9/09/12 11:01p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:01p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/OEMSSDT/OEMNViGDmisc.asl $
+//
+// 2 9/09/12 11:01p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] OEMSSDT.mak
+// OEMSSDT.asl
+// OEMNVdGPU.asl
+// OEMNViGPU.asl
+// OEMNViGDmisc.asl
+// OEMNvVentura.asl
+// OEMNvGPS.asl
+// OEMSSDT.cif
+//
+// 1 12/12/11 9:10p Alanlin
+//
+//
+//
+//**********************************************************************
+
+External(DSEN)
+External(IGPU_SCOPE.CDCK)
+External(DGPU_SCOPE.DD02)
+External(IGPU_SCOPE.IDAB, MethodObj)
+
+//Do not remove this function.
+Method(IDAB, 0, Serialized)
+{
+ If (CondRefOf(IGPU_SCOPE.IDAB))
+ {
+ IGPU_SCOPE.IDAB()
+ }
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HGAS
+//
+// Description: HG Adaptor select, notify
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HGAS) //HG Adaptor select
+{
+ //Stateless button/Hotkey supporting 3 states - Power Saver, Adaptive and Perf
+
+ Increment(IGPU_SCOPE.GPSS)
+ Mod(IGPU_SCOPE.GPSS, 3, IGPU_SCOPE.GPSS)
+
+ Store(1,IGPU_SCOPE.GPPO)
+ Store(1,IGPU_SCOPE.SGNC) //indicate 'policy select' change
+
+ Notify(IGPU_SCOPE, 0xD0)
+ Notify(PCI_SCOPE.WMI1, 0xD0) // Mirror Notify on WMI1
+
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HBRT
+//
+// Description: Send backlight notifications to the DGPU LFP device
+// This is required for Win7 and is backward compatible with Vista
+//
+// Input: Arg0 - 4 - Brightnes Down, 3- Up
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HBRT, 1 , Serialized)
+{
+ Store(Arg0,IGPU_SCOPE.DACE)
+
+ If(And(4,DSEN)) //Note: DSEN variable is expected to be set by IGD miniport only.
+ {
+ If(LEqual(Arg0,4))
+ {
+ Notify(DGPU_SCOPE.DD02,0x87) //Note: DD02 is hardcoded as the LFP device in intelgfx.asl
+ }
+ If(LEqual(Arg0,3))
+ {
+ Notify(DGPU_SCOPE.DD02,0x86)
+ }
+ }
+
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HPFS
+//
+// Description: Panel Fitting Hot Key
+//
+// Input: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HPFS, 0, Serialized) //Panel Fitting Hot Key
+{
+ //
+ // HG Handling of Panel Fitting Switch
+ //
+
+ Store(5,IGPU_SCOPE.DACE) // Indicate display scaling hot key event
+ Store(2,IGPU_SCOPE.SGNC) // Indicate platpolicy change
+
+ //
+ // Expansion Mode toggling
+ //
+ Increment(IGPU_SCOPE.GPSP)
+ Mod(IGPU_SCOPE.GPSP, 4 , IGPU_SCOPE.GPSP)
+
+ Notify(IGPU_SCOPE,0xDC)
+
+}
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HNOT
+//
+// Description: Notification handler for Switchable graphics. Called from GNOT()
+//
+// Input: Arg0 = Current event type:
+// 1 = display switch
+// 2 = lid
+// 3 = dock (!!!!!Acpi ref code, Method(GDCK)sends 4 for Dock notifications )
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method (HNOT, 1, Serialized)
+{
+ Switch(ToInteger(Arg0))
+ {
+ case(1) //Display Switch event
+ {
+ Store(3,IGPU_SCOPE.SGNC) // indicate 'Displaystatus' change
+ Store(1,IGPU_SCOPE.DACE)
+ Notify(IGPU_SCOPE, 0x80)
+ Notify(PCI_SCOPE.WMI1, 0x80) // Mirror Notify on WMI1
+ }
+
+ case (2) //Lid switch event
+ {
+ //Note: NV clarified that only LDES needs to be set
+ Store(1,IGPU_SCOPE.LDES)
+ Notify(IGPU_SCOPE, 0xDB)
+ Notify(PCI_SCOPE.WMI1, 0xDB) // Mirror Notify on WMI1
+ }
+// case (3) //Dock event
+ case (4) //Dock event (!!!Acpi ref code, Method(GDCK)sends 4 for Dock notifications)
+ {
+ Store(IGPU_SCOPE.CDCK, IGPU_SCOPE.DKST) // Store the current dock state
+ Notify(IGPU_SCOPE, 0x81)
+ Notify(PCI_SCOPE.WMI1, 0x81) // Mirror Notify on WMI1
+ }
+
+ Default
+ {
+ Notify(IGPU_SCOPE,0x80)
+ }
+
+ }
+
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: CHPS
+//
+// Description: Shows current Hybrid Policy status on Port80 header
+// Adaptive -> 1, Save power -> 2 and High performance -> 3
+//
+// Input: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(CHPS)
+{
+ P8DB(0xEC, Add(IGPU_SCOPE.GPSS, 1), 2000)
+}
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HDOS
+//
+// Description: Check if the _DOS flag was set during the hot key handling
+//
+// Input: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HDOS, 0, Serialized)
+{
+ If(LEqual(IGPU_SCOPE.DOSF,1))
+ {
+ Store(1,IGPU_SCOPE.SGNC) // indicate 'policy select' change
+ Notify(IGPU_SCOPE,0xD0)
+ Notify(PCI_SCOPE.WMI1, 0xD0) // Mirror Notify on WMI1
+ Store(0, IGPU_SCOPE.DOSF) // Clear the DOSF
+ }
+}
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNViGPU.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNViGPU.asl
new file mode 100644
index 0000000..ae569d1
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNViGPU.asl
@@ -0,0 +1,963 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/OEMSSDT/OEMNViGPU.asl 2 9/09/12 11:01p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:01p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/OEMSSDT/OEMNViGPU.asl $
+//
+// 2 9/09/12 11:01p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] OEMSSDT.mak
+// OEMSSDT.asl
+// OEMNVdGPU.asl
+// OEMNViGPU.asl
+// OEMNViGDmisc.asl
+// OEMNvVentura.asl
+// OEMNvGPS.asl
+// OEMSSDT.cif
+//
+// 1 12/12/11 9:10p Alanlin
+//
+//
+//**********************************************************************
+External(NVGA)
+
+External(NXD1)
+External(NXD2)
+External(NXD3)
+External(NXD4)
+External(NXD5)
+External(NXD6)
+External(NXD7)
+External(NXD8)
+External(DID1)
+External(DID2)
+External(DID3)
+External(DID4)
+External(DID5)
+External(DID6)
+External(DID7)
+External(DID8)
+
+Scope (IGPU_SCOPE)
+{
+
+ Method(_INI,0)
+ {
+ //DIDx values have been changed in MxmAcpiTables.c
+ //Port - D to be used for eDP only and not as DFP. Hence generating a new toggle list
+ Store(DID1, Index(TLPK,0)) // CRT
+ Store(DID2, Index(TLPK,2)) // LFP
+ Store(DID3, Index(TLPK,4)) // DP_B
+ Store(DID4, Index(TLPK,6)) // HDMI_B
+ Store(DID5, Index(TLPK,8)) // HDMI_C
+ Store(DID6, Index(TLPK,10)) // DP_D
+ Store(DID7, Index(TLPK,12)) // HDMI_D
+ Store(DID2, Index(TLPK,14)) // LFP+CRT
+ Store(DID1, Index(TLPK,15))
+ Store(DID2, Index(TLPK,17)) // LFP+DP_B
+ Store(DID3, Index(TLPK,18))
+ Store(DID2, Index(TLPK,20)) // LFP+HDMI_B
+ Store(DID4, Index(TLPK,21))
+ Store(DID2, Index(TLPK,23)) // LFP+HDMI_C
+ Store(DID5, Index(TLPK,24))
+ Store(DID2, Index(TLPK,26)) // LFP+DP_D
+ Store(DID6, Index(TLPK,27))
+ Store(DID2, Index(TLPK,29)) // LFP+HDMI_D
+ Store(DID7, Index(TLPK,30))
+ }
+
+//
+// MXMX method is dupplicated under GFX0 scope in INTELGFX.ASL
+// need to replace it with method in this file.
+//
+#ifndef OPTIMUS_DSM_GUID
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: MXMX
+//
+// Description: Display DDC Mux Control
+//
+// Input:
+// Arg0: Get/Set DDC/Aux Mux State
+// 0- Acquire DDC/Aux Mux on this GPU
+// 1- Release Mux from this GPU
+// 2- Get Mux state
+//
+// Output:
+// 0, Not Acquired.
+// if Arg0 = 0 or 1, Non-Zero return indicates success acquiring MUX
+// (and MUX has switched to this output)
+// if Arg0 = 2, Non-Zero return indicates MUX is currently set to this output
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method (MXMX, 1, Serialized)
+ {
+ P8DB(0x77, Arg0, 2000)
+
+ If (LEqual (Arg0, 0))
+ {
+ //Acquire DDC/AUX mux
+ // No mutex implemented. No need to acquire mutex.
+ // Set mux to iGPU
+ DGPU_SCOPE.SGPO(DSEL, 0)
+ DGPU_SCOPE.SGPO(ESEL, 0) // use edid_select# as mutex flag
+
+ Return(0x1)
+ }
+
+ If (LEqual (Arg0, 1))
+ {
+ //Release DDC/AUX mux
+ // No mutex implemented. No need to release mutex.
+ // 2-way mux. Hence no need to do anything
+ Return(0x1)
+ }
+
+ If (LEqual (Arg0, 2))
+ {
+
+ //Get ddc/aux mux status for iGPU
+ Return(LNot(DGPU_SCOPE.SGPI(ESEL)))
+ }
+
+ Return(0x0) // mutex not acquired
+ }
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: MXDS
+//
+// Description: Display output MUX control
+//
+// Input:
+// Arg0:
+// 0 - Get Mux state
+// 1 - Set Display to active on this GPU
+// 2 - Set Backlight control to active on this GPU
+// 3 - Set Display & Backlight to active on this GPU
+//
+// Output:
+// If Arg0 = 0, Error = Display is not MUXed
+// Else return value of the state of the MUX
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(MXDS, 1, Serialized)
+ {
+ P8DB(0x7A, Arg0, 2000)
+
+ If(LEqual (Arg0, 0))
+ {
+ //Get display mux status for iGPU
+ return(LNot(DGPU_SCOPE.SGPI(DSEL)))
+ } else
+// If(LOr(LEqual (Arg0, 1), LEqual (Arg0, 2)))
+ {
+ //Set display mux to igpu
+ DGPU_SCOPE.SGPO(DSEL, 0)
+ DGPU_SCOPE.SGPO(PSEL, 0)
+ }
+
+ Return (0)
+ }
+
+#endif // OPTIMUS_DSM_GUID
+
+//<AMI_SHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: NVIG
+//
+// Description: Nvidia NVIG (iGPU) OperationRegion
+//
+//-------------------------------------------------------------------------
+//<AMI_SHDR_END>
+ OperationRegion(NVIG,SystemMemory,NVGA,0x400)
+ Field(NVIG, DWordAcc, NoLock, Preserve)
+ {
+ // OpRegion Header
+
+ NISG, 0x80, // (000h) Signature-"NVSG-IGD-DSM-VAR".
+ NISZ, 0x20, // (010h) OpRegion Size in KB.
+ NIVR, 0x20, // (014h) OpRegion Version.
+
+ // OpRegion Data
+ GPSS, 0x20, // Policy Selection Switch Status (Policy selection)
+ GACD, 0x10, // Active Displays
+ GATD, 0x10, // Attached Displays
+ LDES, 0x08, // Lid Event State
+ DKST, 0x08, // Dock State
+ DACE, 0x08, // Display ACPI event
+ DHPE, 0x08, // Display Hot-Plug Event
+ DHPS, 0x08, // Display Hot-Plug Status
+ SGNC, 0x08, // Notify Code (Cause of Notify(..,0xD0))
+ GPPO, 0x08, // Policy Override (Temporary ASL variables)
+ USPM, 0x08, // Update Scaling Preference Mask (Temporary ASL variable)
+ GPSP, 0x08, // Panel Scaling Preference
+ TLSN, 0x08, // Toggle List Sequence Number
+ DOSF, 0x08, // Flag for _DOS
+ ELCL, 0x10, // Endpoint Link Contol Register Value
+ }
+
+ // Toggle List Package
+ Name(TLPK,Package()
+ {
+ //fix this toggle list. DIDx values have been changed in MxmAcpiTables.c
+ 0xFFFFFFFF, 0x2C, // CRT
+ 0xFFFFFFFF, 0x2C, // LFP
+ 0xFFFFFFFF, 0x2C, // DP_B
+ 0xFFFFFFFF, 0x2C, // HDMI_B
+ 0xFFFFFFFF, 0x2C, // HDMI_C
+ 0xFFFFFFFF, 0x2C, // DP_D
+ 0xFFFFFFFF, 0x2C, // HDMI_D
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+CRT
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+DP_B
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+HDMI_B
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+HDMI_C
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+DP_D
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+HDMI_D
+
+ })
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: INDL
+//
+// Description: Initialize Global Next active device list.
+//
+// Input: None
+//
+// Output: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(INDL, 0, Serialized)
+ {
+ Store(0, NXD1)
+ Store(0, NXD2)
+ Store(0, NXD3)
+ Store(0, NXD4)
+ Store(0, NXD5)
+ Store(0, NXD6)
+ Store(0, NXD7)
+ Store(0, NXD8)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: SND1
+//
+// Description: Set Next active device for a single device
+//
+// Input:
+// Arg0 : Device ID of the device that's to be set as next active device.
+//
+// Output: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(SND1, 1, Serialized)
+ {
+ If(LEqual(Arg0, DID1))
+ {
+ Store(1, NXD1)
+ }
+ If(LEqual(Arg0, DID2))
+ {
+ Store(1, NXD2)
+ }
+ If(LEqual(Arg0, DID3))
+ {
+ Store(1, NXD3)
+ }
+ If(LEqual(Arg0, DID4))
+ {
+ Store(1, NXD4)
+ }
+ If(LEqual(Arg0, DID5))
+ {
+ Store(1, NXD5)
+ }
+ If(LEqual(Arg0, DID6))
+ {
+ Store(1, NXD6)
+ }
+ If(LEqual(Arg0, DID7))
+ {
+ Store(1, NXD7)
+ }
+ If(LEqual(Arg0, DID8))
+ {
+ Store(1, NXD8)
+ }
+
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: SNXD
+//
+// Description: Set Next active device
+//
+// Input:
+// Arg0 TLSN
+//
+// Output: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(SNXD, 1, Serialized)
+ {
+ INDL()
+
+ //
+ // Locate the toggle table entry corresponding to TLSN value
+ // Toggle list entries are separated by 0x2C.
+ //
+
+ Store(1, Local0) // Local0 to track entries. Point to the first entry (TLSN starts from 1)
+ Store(0, Local1) // Local1 to track elements inside the TLPK package (ACPI IDs and '0x2C')
+
+ while(LLess(Local0, Arg0)) // TLSN start from 1!!
+ {
+ if(LEqual(DeRefOf(Index(TLPK,Local1)), 0x2C))
+ {
+ Increment(Local0)
+ }
+ Increment(Local1)
+
+ }
+
+ SND1(DeRefOf(Index(TLPK, Local1))) // 1 st ACPI ID in the entry corresponding to TLSN
+ Increment(Local1)
+ if(LNotEqual(DeRefOf(Index(TLPK,Local1)), 0x2C)) // Check for separator
+ {
+ SND1(DeRefOf(Index(TLPK, Local1))) // 2 nd ACPI ID in the entry corresponding to TLSN
+ }
+
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: CTOI
+//
+// Description: Convert _DOD indices-> MDTL index
+//
+// Input:
+// Arg 0 is the currently active display list
+//
+// Output: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(CTOI,1, Serialized)
+ {
+ Switch(ToInteger(Arg0)) //Arg 0 is the currently active display list
+ {
+ //_DOD indices-> MDTL index
+ case(0x1) {Return(1)} //CRT
+ case(0x2) {Return(2)} //LFP
+ case(0x4) {Return(3)} //DP_B
+ case(0x8) {Return(4)} //HDMI_B
+ case(0x10) {Return(5)} //HDMI_C
+ case(0x20) {Return(6)} //DP_D
+ case(0x40) {Return(7)} //HDMI_D
+ case(0x3) {Return(8)} //LFP+CRT
+ case(0x6) {Return(9)} //LFP+DP_B
+ case(0xA) {Return(10)} //LFP+HDMI_B
+ case(0x12) {Return(11)} //LFP+HDMI_C
+ case(0x22) {Return(12)} //LFP+DP_D
+ case(0x42) {Return(13)} //LFP+HDMI_D
+ Default {Return(1)}
+ }
+ }
+
+// Check for Nvidia _DSM UUIDs
+//
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HDSM
+//
+// Description: Device Specific Methods for Hybrid GPU (may be invoked from dGP and iGD)
+// Implements Mxm and SG specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// nVidia
+// SG dGPU GUID :9D95A0A0-0060-4D48-B34D-7E5FEA129FD4
+// NBCI GUID :D4A50B75-65C7-46F7-BfB7-41514CEA0244
+// Ventura GUID :95DB88FD-940A-4253-A446-70CE0504AEDF
+// Optimus DSM_GUID :A486D8F8-0BDA-471B-A72B-6042A6B5BEE0
+//
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(HDSM, 4, SERIALIZED)
+ {
+
+#if NV_VENTURA_SUPPORT == 1
+ //SPB_DSM_GUID {95DB88FD-940A-4253-A446-70CE0504AEDF}
+//x if(CMPB(Arg0, Buffer(){0xFD,0x88,0xDB,0x95,0x0A,0x94,0x53,0x42,0xA4,0x46,0x70,0xCE,0x05,0x04,0xAE,0xDF}))
+ If(LEqual(Arg0, ToUUID("95DB88FD-940A-4253-A446-70CE0504AEDF")))
+ {
+ return ( DGPU_SCOPE.SPB(Arg0, Arg1, Arg2, Arg3))
+ }
+#endif
+
+#if NV_GPS_SUPPORT == 1
+ //SPB_DSM_GUID {A3132D01-8CDA-49BA-A52E-BC9D46DF6B81}
+//x if(CMPB(Arg0, Buffer(){0x01, 0x2D, 0x13, 0xA3, 0xDA, 0x8C, 0xBA, 0x49,0xA5, 0x2E, 0xBC, 0x9D, 0x46, 0xDF, 0x6B, 0x81}))
+ If(LEqual(Arg0, ToUUID("A3132D01-8CDA-49BA-A52E-BC9D46DF6B81")))
+ {
+ return ( DGPU_SCOPE.GPS(Arg0, Arg1, Arg2, Arg3))
+ }
+#endif
+
+#if HYBRID_DSM_GUID || NBCI_DSM_GUID || OPTIMUS_DSM_GUID
+
+ Name(SGCI, 0) // SG Common Interface
+ Name(NBCI, 0) // Notebok Common Interface
+ Name(OPCI, 0) // Optimus Common Interface
+ Name(BUFF, 0) // Buff Parameter
+
+// Hybrid Graphics Methods supported only if MUXed mode is selected
+#ifdef HYBRID_DSM_GUID
+ If(LEqual(Arg0, ToUUID("9D95A0A0-0060-4D48-B34D-7E5FEA129FD4")))
+ {
+ Store(1, SGCI)
+ }
+#endif
+// NBCI Methods can be querried in botd MUXed and MUXless modes
+#ifdef NBCI_DSM_GUID
+ if(LEqual(Arg0, ToUUID("D4A50B75-65C7-46F7-BfB7-41514CEA0244")))
+ {
+ Store(1, NBCI)
+ }
+#endif
+// Optimus Methods can be querried in botd MUXed and MUXless modes
+#ifdef OPTIMUS_DSM_GUID
+ If(LEqual(Arg0, ToUUID("A486D8F8-0BDA-471B-A72B-6042A6B5BEE0")))
+ {
+ Store(1, OPCI)
+ }
+#endif
+
+ If(LOr(OPCI, LOr( SGCI, NBCI)) )
+ {
+
+ P8DB(0xEE, Arg2, 1000)
+
+ if(OPCI) {
+ if(LNotEqual(Arg1, 0x100)) {
+ Return(0x80000002)
+ }
+ }
+ else { // NBCI & SGCI
+ If(LNotEqual(Arg1,0x0102))
+ {
+ Return(0x80000002)
+ }
+ }
+ //
+ // Function 0: NVSG_FUNC_SUPPORT - Return Supported Functions
+ //
+ // Returns:
+ // SGCI: Functions 0-6,18 are supported
+ // NBCI: Functions 0,4-6,18 are supported
+ // OPCI: Functions 0,5,6,12,13,16,17,26,27
+ //
+ If(LEqual(Arg2,0))
+ {
+ if(SGCI){
+ Return(Buffer(){0x7F, 0x00, 0x04, 0x00})
+ } else {
+ if(NBCI){
+ Return(Buffer(){0x73, 0x00, 0x04, 0x00})
+ }
+ else {
+ if(OPCI){
+ //Sub-Functions 0,16,17,26 are supported
+ // Return(ToBuffer(0x04030001))
+ //Sub-Functions 0,5, 6, 12, 13, 16, 17, 26,27 are supported
+ // Return(ToBuffer(0x0c031861))
+ Return(Buffer(){0x61, 0x18, 0x03, 0x0C})
+ //Sub-Functions 0,16 26,27 are supported
+// Return(ToBuffer(0x0c010001))
+
+ }
+ }
+ }
+ }
+
+ //
+ // Function 1: NVSG_FUNC_CAP
+ //
+ // Returns the capabilities of the Switchable Graphics
+ // implementation on the platform
+ //
+ If(LEqual(Arg2,1))
+ {
+ Name (TEMP, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TEMP,0,STS0)
+ if(SGCI){
+ // Return status (bit0-1 Hybrid enabled) and indicate Hybrid power On/Off
+
+ // 0 HG Enable Status = 1
+ // 1 GPU Output MUX Capabilities= 1
+ // 2 GPU Policy Selector Capabilities = 1
+ // 3-4 GPU Control Status = 3
+ // 5 GPU Reset Control = 1
+ // 6 MUX'ed Hot-Plug Capabilities = 0
+ // 7 MUX'ed DDC/AUX Capabilities = 1
+ // 8-10 Notify Codes
+ // 0= Not a Notify(0xD0)
+ // 1= POLICYSELECT change
+ // 2= PLATPOLICY change
+ // 3= DISPLAYSTATUS change
+ // 11-12 EC Notify code
+ // 14-15 Eject Capabilities = 0
+ // 16 Mux'd backlight cap = 0
+ // 17-23 Hybrid EC version = 0
+ // 24-26 HG capability = 3 (Power saver & Boost performance)
+ // 27-28 HG switch = 1 (hot-key or stateless button)
+ // 29 Fasl LCD swithing = 0
+ // 31 = 0
+
+ // Switchable caps
+ Or(STS0,0x0B0000BF,STS0)
+
+ // Switchable Notify Code (Cause of Notify(..,0xD0))
+ Or(STS0,ShiftLeft(SGNC,8,SGNC),STS0)
+ } else {
+ // NBCI
+ // 0..3 Reserved=00
+ // 4 Aux Power States
+ // 6:5 LID State Event
+ // 0= Use the event List to determine support
+ // 1= Force use of Generic Hot-Plug Notify(0x81)
+ // 2= Force use of Specific Lid Event, e.g. Notify (0xDB)
+ // 3= Reserved for future use
+ // 7:8 LID State Enumeration
+ // 0= Use _DCS under _LCD device(default)
+ // 1= Provides status DISPLAYSTATUS Bit[4], for single pannel systems only(recommended)
+ // 2,3= Reserved
+ // 9 Dock State Enumerartion
+ // 0= Doesn't have a Dock(or _DCS under device reflects attachments-via-dock (default)
+ // 1= Provides dock status info via DISPLAYSTATUS Bit[5] (recommended)
+ // 10:30 Reserved
+ // 31 = 0
+
+ // use all defaults for now
+ Or(STS0,0x00000,STS0)
+ }
+ return(TEMP)
+ }
+
+ //
+ // Function 2: NVSG_FUNC_SELECTOR
+ //
+ // Returns device preference between iGPU and dGPU
+ //
+ If(LEqual(Arg2,2))
+ {
+ Name (TMP1, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TMP1,0,STS1)
+
+ //Ignore bits[6:5] since we are not supporting Switchable enable/disable policy selection
+ //Only Switchable policy selection is supported via CAS+F6 hotkey
+
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(DerefOf(Index(Arg3,0)), Local0)
+ ToInteger(Arg3, Local0)
+ And(Local0, 0x1F, Local0)
+
+ If(And(Local0,0x10)) //If Switchable policy update bit is set
+ {
+ And(Local0,0xF,Local0)
+ Store(Local0,GPSS)
+ Notify(IGPU_SCOPE,0xD9) //Broadcast "policy completed" notification
+ Notify(PCI_SCOPE.WMI1, 0xD9) // Mirror Notify on WMI1
+
+ }
+ Else
+ {
+ And(Local0,0xF,Local0)
+ If(LEqual(GPPO,1))
+ {
+ // Retrieve the setting from NVS
+ Store(GPSS,Local0)
+ Or(Local0,0x10,Local0)
+ Store(0,GPPO)
+ }
+ }
+
+ Or(STS1,Local0,STS1)
+
+ Return(TMP1)
+ }
+
+ //
+ // Function 3: NVSG_FUNC_POWERCONTROL
+ //
+ // Allows control of dGPU power methods from the iGPU
+ //
+ If(LEqual(Arg2,3))
+ {
+ Name (TMP2, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TMP2,0,STS2)
+
+ // GPU Power Control
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(DerefOf(Index(Arg3,0)), Local0)
+ ToInteger(Arg3, Local0)
+ And(Local0, 0x3, Local0)
+
+ If(LEqual(Local0,0))
+ {
+ DGPU_SCOPE.SGST()
+ }
+
+ If(LEqual(Local0,1))
+ {
+ DGPU_SCOPE.SGON()
+ }
+
+ If(LEqual(Local0,2))
+ {
+ DGPU_SCOPE.SGOF()
+ }
+
+ //dGPU_PWROK is not working. Using dGPU_PWR_EN# instead as w/a
+ //Or(STS2,DGPU_SCOPE.MPOK,STS2)
+ If(LEqual(DGPU_SCOPE.SGST(), 0xF))
+ {
+ Or(STS2,0x1,STS2)
+ }
+ //else do nothing since STS2 is already 0
+ Return(TMP2)
+ }
+
+ //
+ // Function 4: NVSG_FUNC_PLATPOLICY
+ //
+ // Sets or Returns the current System Policy settings
+ //
+ If(LEqual(Arg2,4))
+ {
+
+// common for SGCI and NBCI
+ Name (TMP3, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TMP3,0,STS3)
+
+ // Panel Scaling Preference
+
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(DerefOf(Index(Arg3,0)), Local0)
+ ToInteger(Arg3, Local0)
+ Store(Local0, Local1)
+ ShiftRight(Local0, 16, Local0)
+ And(Local0, 0x1, USPM)
+
+ ShiftRight(Local1, 13, Local1)
+ And(Local1, 0x3, Local1)
+
+
+ If(LNotEqual(Local1,GPSP))
+ {
+ If(LEqual(USPM,1))
+ {
+ Store(Local1,GPSP)
+ }
+ Else
+ {
+ // Retrieve the setting from NVS
+ Store(GPSP,Local1)
+ Or(STS3,0x8000,STS3) // Set Panel Scaling override
+ }
+ }
+ Or(STS3,ShiftLeft(Local1,13),STS3)
+
+
+ Return(TMP3)
+ }
+
+ //
+ // Function 5: NVSG_FUNC_DISPLAYSTATUS
+ //
+ // Sets or Returns the current display detection,
+ // hot-key toggle sequence
+ //
+ If(LEqual(Arg2,5))
+ {
+// common for SGCI and NBCI
+ Name (TMP4, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TMP4,0,STS4)
+
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(Derefof(Index(Arg3,0)), Local0) //Store input field in local0
+ ToInteger(Arg3, Local0)
+
+ // Next Combination Sequence
+
+ If(And(Local0,0x80000000)) //If Bit31 is set
+ {
+ Store(And(ShiftRight(Local0,25),0x1F),TLSN)
+
+ If(And(Local0,0x40000000)) //If Bit30 is set
+ {
+ Store(1,DOSF)
+ }
+ }
+
+ // Display Mask for Attached and Active Displays
+
+ If(And(Local0,0x01000000)) //If Bit24 is set
+ {
+ Store(And(ShiftRight(Local0,12),0xFFF),GACD)
+ Store(And(Local0,0xFFF),GATD)
+
+ //Get current toggle list index based on currently active display list
+ Store(CTOI(GACD),TLSN)
+ Increment(TLSN)
+
+ If(LGreater(TLSN, 13)) //For Huron River ,13 is the number of entries in the toggle list
+ {
+ Store(1, TLSN)
+ }
+
+ SNXD(TLSN) //This is optional for NV SG
+ }
+
+ // Display Hot-Plug Event/Status
+ Or(STS4,ShiftLeft(DHPE,21),STS4)
+ Or(STS4,ShiftLeft(DHPS,20),STS4)
+
+ // Toggle Sequence number
+ Or(STS4,ShiftLeft(TLSN,8),STS4)
+
+ // Dock State
+ Or(STS4,ShiftLeft(DKST,5),STS4)
+
+ // Lid Event State
+ Or(STS4,ShiftLeft(LDES,4),STS4)
+
+ // Display ACPI Event(SGCI only)
+ Or(STS4,DACE,STS4)
+
+ Store(0,LDES)
+ Store(0,DHPS)
+ Store(0,DHPE)
+ Store(0,DACE)
+
+ Return(TMP4)
+ }
+
+ //
+ // Function 6: NVSG_FUNC_MDTL - Returns Hot-Key display switch toggle sequence
+ //
+ // Returns:
+ // Returns Hot-Key display switch toggle sequence
+ //
+ If(LEqual(Arg2,6))
+ {
+// common for SGCI and NBCI
+ Return(TLPK)
+ }
+ //
+ // Function 16:
+ //
+ If(LEqual(Arg2,16))
+ {
+ CreateWordField(Arg3, 2, USRG) // Object type signature passed in by driver.
+ Name(OPVK, Buffer()
+ {
+ // Key below is for Emerald Lake Fab2 platform
+ // Customer need to ask NVIDIA PM to get the key
+ // Customer need to put the key in between labels "// key start -" and
+ // "// key end -". Please consult NVIDIA PM if any issues
+ //148597456985Genuine NVIDIA Certified Optimus Ready Motherboard for 736019_MIRc
+ // Key start -
+ 0xE4,0x42,0x5F,0x14,0x36,0x26,0x16,0x37,0x4B,0x56,0xE6,0x00,0x00,0x00,0x01,0x00,
+ 0x31,0x34,0x38,0x35,0x39,0x37,0x34,0x35,0x36,0x39,0x38,0x35,0x47,0x65,0x6E,0x75,
+ 0x69,0x6E,0x65,0x20,0x4E,0x56,0x49,0x44,0x49,0x41,0x20,0x43,0x65,0x72,0x74,0x69,
+ 0x66,0x69,0x65,0x64,0x20,0x4F,0x70,0x74,0x69,0x6D,0x75,0x73,0x20,0x52,0x65,0x61,
+ 0x64,0x79,0x20,0x4D,0x6F,0x74,0x68,0x65,0x72,0x62,0x6F,0x61,0x72,0x64,0x20,0x66,
+ 0x6F,0x72,0x20,0x37,0x33,0x36,0x30,0x31,0x39,0x5F,0x4D,0x49,0x52,0x63,0x20,0x20,
+ 0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x2D,0x20,0x3C,0x34,0x27,0x21,0x58,0x29,
+ 0x57,0x27,0x58,0x20,0x27,0x25,0x59,0x5D,0x31,0x29,0x3A,0x2A,0x26,0x39,0x59,0x43,
+ 0x56,0x3B,0x58,0x56,0x58,0x3D,0x59,0x4E,0x3B,0x3A,0x35,0x44,0x25,0x42,0x5A,0x48,
+ 0x55,0x3A,0x58,0x4C,0x25,0x48,0x54,0x21,0x35,0x4B,0x4D,0x37,0x2C,0x3C,0x20,0x2D,
+ 0x20,0x43,0x6F,0x70,0x79,0x72,0x69,0x67,0x68,0x74,0x20,0x32,0x30,0x31,0x30,0x20,
+ 0x4E,0x56,0x49,0x44,0x49,0x41,0x20,0x43,0x6F,0x72,0x70,0x6F,0x72,0x61,0x74,0x69,
+ 0x6F,0x6E,0x20,0x41,0x6C,0x6C,0x20,0x52,0x69,0x67,0x68,0x74,0x73,0x20,0x52,0x65,
+ 0x73,0x65,0x72,0x76,0x65,0x64,0x2D,0x31,0x34,0x38,0x35,0x39,0x37,0x34,0x35,0x36,
+ 0x39,0x38,0x35,0x28,0x52,0x29,
+ //Copyright 2010 NVIDIA Corporation All Rights Reserved-148597456985(R)
+ // Key end -
+ })
+ If(LEqual(USRG, 0x564B)) { // 'VK' for Optimus Validation Key Object.
+ Return(OPVK)
+ }
+ Return(Zero)
+ }
+ //
+ // Function 17 NVOP_FUNC_GETALLOBJECTS
+ //
+ If(LEqual(Arg2,17))
+
+ {
+ Return(Zero)
+ }
+ //
+ // Function 18: NVSG_FUNC_GETEVENTLIST
+ //
+ // Returns:
+ // Returns list of notifiers and their meanings
+ //
+ If(LEqual(Arg2,18))
+ {
+// common for SGCI and NBCI
+ return(Package(){
+ 0xD0, ToUUID("921A2F40-0DC4-402d-AC18-B48444EF9ED2"), // Policy request
+ 0xD9, ToUUID("C12AD361-9FA9-4C74-901F-95CB0945CF3E"), // Policy set
+ 0xDB, ToUUID("42848006-8886-490E-8C72-2BDCA93A8A09"), // Display scaling
+
+ 0xEF, ToUUID("B3E485D2-3CC1-4B54-8F31-77BA2FDC9EBE"), // Policy change
+ 0xF0, ToUUID("360d6fb6-1d4e-4fa6-b848-1be33dd8ec7b"), // Display status
+
+ // unfinished list of events. we do not need this Func18 unless event notifiers differ from standard ones defined in BWG.
+ })
+ }
+ //
+ // Function 26: NVOP_FUNC_OPTIMUSCAPS
+ //
+ If(LEqual(Arg2,26))
+ {
+ // On Input
+ //Bit25-24 Power Control Enable
+ // 2-Platform should not power down GPU in the _PS3 method(default)
+ // 3-Platform should power down GPU in the _PS3 method(default)
+ // Bit0 No flag upd present in this call (SBIOS returns curent status)
+ //
+ CreateField(Arg3,24,2,OMPR)
+ CreateField(Arg3,0,1,FLCH)
+ If(ToInteger(FLCH))
+ {
+ Store(OMPR, DGPU_SCOPE.OPCE) // Optimus Power Control Enable - From DD
+ }
+ // On return
+ // Bit 24:26 Capabilities
+ // 0: No special platf cap
+ // 1: Platform has dynamic GPU power control
+ // Bit6 GPU Display Hot Plug NEW Optimus BWG v02
+ // Bit4:3 Current GPU Control status
+ // 0: GPU is powered off
+ // 1: GPU is powered on and enabled
+ // 2: reserved
+ // 3: GPU Power has stabilized
+ // Bit0
+ // 0:Optimus Disabled
+ // 1:Optimus Enabled
+ Store(Buffer(4) {0, 0, 0, 0}, Local0)
+ CreateField(Local0,0,1,OPEN)
+ CreateField(Local0,3,2,CGCS)
+ CreateField(Local0,6,1,SHPC)
+ CreateField(Local0,24,3,DGPC) // DGPC - Default: No Dynamic GPU Power Control
+ CreateField(Local0,27,2,HDAC) // HDAC - HD Audio Codec Cap
+
+ Store(One, OPEN) // Optimus Enabled
+
+ Store(One, SHPC) // GPU Display Hotplug Supported
+ Store(0x2, HDAC) // HDA BIOS control Supported
+
+ Store(One, DGPC) // Dynamic GPU Power Control Available
+ If(LNotEqual(DGPU_SCOPE.SGST(), 0))
+ {
+ Store(0x3, CGCS) // Current GPU Control status
+ }
+ Return(Local0)
+
+ }//case (26)
+ //
+ // Function 27: NVOP_FUNC_OPTIMUSFLAGS
+ //
+ If(LEqual(Arg2,27))
+ {
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(Derefof(Index(Arg3,0)), Local0) //Store input field in local0
+ ToInteger(Arg3, Local0)
+// Store(Arg3, Local0)
+// CreateField(Local0,0,1,OPFL)
+// CreateField(Local0,1,1,OPVL)
+ If(And(Local0,0x00000002))
+ {
+ Store(Zero, BUFF)
+ If(And(Local0,0x00000001))
+ {
+ Store(One, BUFF)
+ }
+ }
+ And(SGFL, Not(0x2), SGFL)
+ Or(SGFL, ShiftLeft(BUFF,1), SGFL)
+ Store(SWSMI_NVOEM_CMOS_W, SSMP) // Set Audio Codec flag to CMOS
+ Return(Local0)
+ }
+ // FunctionCode or SubFunctionCode not supported
+ Return(0x80000002) // OTHER ARGUMENTS NOT SUPPORTED
+ }
+#endif // common scope for Hybrid/Nbci/Optimus
+
+ // Check for common with dGPU _DSM UUIDs
+// return (DGPU_SCOPE.HDSM(Arg0, Arg1, Arg2, Arg3))
+ Return (0x80000001)
+ }
+} // end PCI0.GFX0 scope
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNvGPS.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNvGPS.asl
new file mode 100644
index 0000000..216f78d
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNvGPS.asl
@@ -0,0 +1,337 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/OEMSSDT/OEMNvGPS.asl 2 9/09/12 11:01p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:01p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/OEMSSDT/OEMNvGPS.asl $
+//
+// 2 9/09/12 11:01p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] OEMSSDT.mak
+// OEMSSDT.asl
+// OEMNVdGPU.asl
+// OEMNViGPU.asl
+// OEMNViGDmisc.asl
+// OEMNvVentura.asl
+// OEMNvGPS.asl
+// OEMSSDT.cif
+//
+// 1 12/12/11 9:10p Alanlin
+//
+//
+//
+//**********************************************************************
+External(\_PR.CPU0._PSS, BuffObj)
+
+External(\_PR.CPU0._PPC, IntObj)
+External(\_PR.CPU1._PPC, IntObj)
+External(\_PR.CPU2._PPC, IntObj)
+External(\_PR.CPU3._PPC, IntObj)
+External(\_PR.CPU4._PPC, IntObj)
+External(\_PR.CPU5._PPC, IntObj)
+External(\_PR.CPU6._PPC, IntObj)
+External(\_PR.CPU7._PPC, IntObj)
+External(\_SB.PCI0.LPCB.H_EC.GTVR) // CPU GT VR (IMVP) Temperature
+External(\_PR.CPU0._TSS, MethodObj)
+External(\_PR.CPU0._PTC, MethodObj)
+
+#define GPS_REVISION_ID 0x00000100 // Revision number
+#define GPS_ERROR_SUCCESS 0x00000000 // Generic Success
+#define GPS_ERROR_UNSPECIFIED 0x00000001 // Generic unspecified error code
+#define GPS_ERROR_UNSUPPORTED 0x00000002 // Sub-Function not supported
+
+#define GPS_FUNC_SUPPORT 0x00000000 // Bit list of supported functions
+#define GPS_FUNC_GETCALLBACKS 0x00000013 // Get system requested callback
+#define GPS_FUNC_PSHARESTATUS 0x00000020 // Get system requested Power Steering Setting
+#define GPS_FUNC_GETPSS 0x00000021 // Get _PSS object
+#define GPS_FUNC_SETPPC 0x00000022 // Set _PCC object
+#define GPS_FUNC_GETPPC 0x00000023 // Get _PCC object
+#define GPS_FUNC_PSHAREPARAMS 0x0000002A // Get sensor information and capabilities
+
+Scope(PCI_SCOPE){
+
+ Name(GPS, "GPSACPI 2012-Aug-12 14:56:05") // MCPACPIP build time stamp.
+
+} // end of Scope
+
+Scope (DGPU_SCOPE)
+{
+
+Name(PSAP, Zero)
+ Name(ECBF, Buffer(20) {})
+ CreateDWordField(ECBF, 0, EDS1)
+ CreateDWordField(ECBF, 4, EDS2)
+ CreateDWordField(ECBF, 8, EDS3)
+ CreateDWordField(ECBF, 12, EDS4)
+ CreateDWordField(ECBF, 16, EPDT)
+
+ Name(GPSP, Buffer(36) {})
+ CreateDWordField(GPSP, 0, RETN)
+ CreateDWordField(GPSP, 4, VRV1)
+ CreateDWordField(GPSP, 8, TGPU)
+ CreateDWordField(GPSP, 12, PDTS)
+ CreateDWordField(GPSP, 16, SFAN)
+ CreateDWordField(GPSP, 20, SKNT)
+ CreateDWordField(GPSP, 24, CPUE)
+ CreateDWordField(GPSP, 28, TMP1)
+ CreateDWordField(GPSP, 32, TMP2)
+
+Name(NLIM, 0) //set one flag for GPS_EVENT_STATUS_CHANGE 1: will update parameter: 0 just call function 0x1c _PCONTROL
+
+ Name(PSCP, 0) // P-State capacity, mainly for s/w debugging
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: GPS
+//
+// Description: Called from _DSM -Device Specific Method for dGPU device.
+// Implement Ventura specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// Ventura DSM_GUID A3132D01-8CDA-49BA-A52E-BC9D46DF6B81
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method (GPS, 4, NotSerialized)
+ {
+
+ Store("------- GPS DSM --------", Debug)
+ // Only Interface Revision 0x0100 is supported
+ If (LNotEqual(Arg1, 0x100))
+ {
+ Return(0x80000002)
+ }
+
+ P8DB(0xDD, Arg2, 1000)
+ // (Arg2) Sub-Function
+ Switch (ToInteger(Arg2))
+ {
+
+ case (GPS_FUNC_SUPPORT)
+ {
+
+ Name(FMSK, Buffer(0x8)
+ {
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+ })
+ Store(Buffer(0x8)
+ {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }, Local0)
+ Divide(GPS_FUNC_SUPPORT, 0x8, Local2, Local1)
+ // Local1 is Quotient, Local2 is Remainder
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_GETCALLBACKS, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_PSHARESTATUS, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_GETPSS, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_SETPPC, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_GETPPC, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_PSHAREPARAMS, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+
+ // mask out specific functions
+ Store( SizeOf(Local0), Local1)
+ While( LNotEqual(Local1, 0) ) {
+ Decrement(Local1)
+ Store( DeRefOf(Index(FMSK, Local1)), Local2)
+ And( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1) )
+ }
+
+ Return(Local0)
+ }
+ //
+ // Function 19: GPS_FUNC_GETCALLBACKS,
+ //
+ case(GPS_FUNC_GETCALLBACKS)
+ {
+ Store("GPS fun 19", Debug)
+ return(arg3)
+ }
+ //
+ // Function 32: GPS_FUNC_PSHARESTATUS,
+ //
+ case(GPS_FUNC_PSHARESTATUS)
+ {
+ Store("GPS fun 20", Debug)
+
+ Name(RET1, Zero)
+ CreateBitField(Arg3,24,NRIT) //new request new IGP turbo state(bit 24 is valid)
+ CreateBitField(Arg3,25,NRIS) //request new IGP turbo state
+ if (NRIS){
+ if(NRIT){
+ Or(RET1, 0x01000000, RET1)
+ }else
+ {
+ //help disable IGP turbo boost
+ And(RET1, 0xFeFFFFFF, RET1)
+ }
+ }
+ Or(RET1, 0x40000000, RET1) // if this machine support GPS
+
+ if(NLIM){
+ Or(RET1, 0x00000001, RET1) // if NLIM falg is set, set bit0 =1
+ }
+
+ Return(RET1)
+ }
+ //
+ // Function 33: GPS_FUNC_GETPSS, Get CPU _PSS structure
+ //
+ case(GPS_FUNC_GETPSS)
+ {
+ Return(\_PR.CPU0._PSS)
+ }
+ //
+ // Function 34: GPS_FUNC_SETPPC, Set current CPU _PPC limit
+ //
+ case(GPS_FUNC_SETPPC)
+ {
+ CreateBYTEField(Arg3, 0, PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU0, 0x80)
+ store(PCAP, PSAP)
+ Return(PCAP)
+ }
+ //
+ // Function 35: GPS_FUNC_GETPPC, Get current CPU _PPC limit
+ //
+ case(GPS_FUNC_GETPPC)
+ {
+ Return(PSAP)
+ }
+
+ case(0x25)
+ {
+ Store("GPS fun 25", Debug)
+ return(\_PR_.CPU0._TSS)
+ }
+ case(0x26)
+ {
+ Store("GPS fun 26", Debug)
+ CreateDWordField(Arg3, Zero, TCAP)
+ Store(TCAP, \_PR_.CPU0._PTC)
+ Notify(\_PR_.CPU0, 0x80)
+ return(TCAP) }
+ //
+ // Function 42: GPS_FUNC_PSHAREPARAMS, Get Power Steering platform parameters
+ //
+ case(GPS_FUNC_PSHAREPARAMS)
+ {
+ Store("GPS fun 2a", Debug)
+
+ CreateBYTEField(Arg3,0,PSH0)
+ CreateBYTEField(Arg3,1,PSH1)
+ CreateBitField(Arg3,8,GPUT)
+ CreateBitField(Arg3,9,CPUT)
+ CreateBitField(Arg3,10,FANS)
+ CreateBitField(Arg3,11,SKIN)
+ CreateBitField(Arg3,12,ENGR)
+ CreateBitField(Arg3,13,SEN1)
+ CreateBitField(Arg3,14,SEN2)
+
+ switch (PSH0){
+ case(0){
+ if(CPUT){
+ store(0x00000200, RETN)
+ Or(RETN, PSH0, RETN)
+ // Please return CPU or EC tempture to PDTS
+ store(\_SB.PCI0.LPCB.H_EC.GTVR,PDTS)
+ }
+ return(GPSP)
+ } //case(0)
+
+ case(1){
+ store(0x00000200, RETN)
+ Or(RETN, PSH0, RETN)
+ store(1000,PDTS)
+ return(GPSP)
+ } //case(1)
+
+ case(2){
+ Or(RETN, PSH0, RETN)
+ store(0x00000000, VRV1)
+ store(0x00000000, TGPU)
+ store(0x00000000, PDTS)
+ store(0x00000000, SFAN)
+ store(0x00000000, CPUE)
+ store(0x00000000, SKNT)
+ store(0x00000000, TMP1)
+ store(0x00000000, TMP2)
+ return(GPSP)
+ } //case(2)
+ } // PSH0 of switch
+
+ }
+ } // end of switch
+
+ Return(0x80000002)
+ } // end GPS
+
+
+} // end DGPU_SCOPE scope
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNvVentura.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNvVentura.asl
new file mode 100644
index 0000000..2de6a1c
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMNvVentura.asl
@@ -0,0 +1,502 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/OEMSSDT/OEMNvVentura.asl 2 9/09/12 11:01p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:01p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/OEMSSDT/OEMNvVentura.asl $
+//
+// 2 9/09/12 11:01p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] OEMSSDT.mak
+// OEMSSDT.asl
+// OEMNVdGPU.asl
+// OEMNViGPU.asl
+// OEMNViGDmisc.asl
+// OEMNvVentura.asl
+// OEMNvGPS.asl
+// OEMSSDT.cif
+//
+// 1 12/12/11 9:10p Alanlin
+//
+//
+//**********************************************************************
+// (Ventura+)>
+EXTERNAL(\_PR.CPU0, DeviceObj)
+EXTERNAL(\_PR.CPU1, DeviceObj)
+EXTERNAL(\_PR.CPU2, DeviceObj)
+EXTERNAL(\_PR.CPU3, DeviceObj)
+//> Andy+ for ClarksField -- 8 processors
+EXTERNAL(\_PR.CPU4, DeviceObj)
+EXTERNAL(\_PR.CPU5, DeviceObj)
+EXTERNAL(\_PR.CPU6, DeviceObj)
+EXTERNAL(\_PR.CPU7, DeviceObj)
+//<
+External(\_PR.CPU0._PSS, BuffObj)
+External(\_PR.CPU0._TSS, BuffObj)
+
+External(\_PR.CPU0._PPC, IntObj)
+External(\_PR.CPU1._PPC, IntObj)
+External(\_PR.CPU2._PPC, IntObj)
+External(\_PR.CPU3._PPC, IntObj)
+//> Andy+ for ClarksField -- 8 processors
+External(\_PR.CPU4._PPC, IntObj)
+External(\_PR.CPU5._PPC, IntObj)
+External(\_PR.CPU6._PPC, IntObj)
+External(\_PR.CPU7._PPC, IntObj)
+//<
+External(\_PR.CPU0._TPC, IntObj)
+External(\_PR.CPU1._TPC, IntObj)
+External(\_PR.CPU2._TPC, IntObj)
+External(\_PR.CPU3._TPC, IntObj)
+//> Andy+ for ClarksField -- 8 processors
+External(\_PR.CPU4._TPC, IntObj)
+External(\_PR.CPU5._TPC, IntObj)
+External(\_PR.CPU6._TPC, IntObj)
+External(\_PR.CPU7._TPC, IntObj)
+//<
+Scope(PCI_SCOPE){
+
+ Name(VEN, "VENACPI 2009-Nov-23 14:56:05") // MCPACPIP build time stamp.
+
+} // end of Scope
+
+Scope (DGPU_SCOPE)
+{
+ // value used to notify iGPU
+
+ Name(VSTS, 1) // Ventura Status
+ Name(THBG, 50000) // Thermal Budget
+ Name(PSCP, 0) // P-State capacity, mainly for s/w debugging
+ Name(TBUD, 0x88B8) // Thermal Budget
+// Name(PBCM, 0)
+
+ // Called by EC to notify thermal budget/status change
+ // Arg0 is one of SPB_EC_ values
+ // Arg1 is an object reference
+ Method (THCH, 2, NotSerialized)
+ {
+ Switch (ToInteger(Arg0))
+ {
+ case ( 0x03)
+ {
+ // VSTS needs to be updated before notification
+ Store(DeRefOf(Arg1), VSTS)
+ Notify(DGPU_SCOPE, 0xC0)
+ }
+ case ( 0x01)
+ {
+ // THBG needs to be updated before notification
+ Store(DeRefOf(Arg1), THBG)
+ Notify(DGPU_SCOPE, 0xC1)
+ }
+ }
+ }
+
+ // Wrapper to call Method(SPB)
+ Method (SPB2, 2, NotSerialized)
+ {
+ Store( Buffer() {0x00, 0x00, 0x00, 0x00}, Local0 )
+ CreateDwordField(Local0, 0, LLLL)
+ Store( Arg1, LLLL )
+ Return( SPB(0x00, 0x101, Arg0, Local0) )
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: SPB
+//
+// Description: Called from _DSM -Device Specific Method for dGPU device.
+// Implement Ventura specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// Ventura DSM_GUID 95DB88FD-940A-4253-A446-70CE0504AEDF
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method (SPB, 4, NotSerialized)
+ {
+
+ Store("------- SPB DSM --------", Debug)
+ // Only Interface Revision 0x0101 is supported
+ If (LNotEqual(Arg1, 0x101))
+ {
+ Return(0x80000002)
+ }
+
+ // (Arg2) Sub-Function
+ Switch (ToInteger(Arg2))
+ {
+ case (0x00)
+ {
+ Name(FMSK, Buffer(0x8)
+ {
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+ })
+ Store(Buffer(0x8)
+ {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }, Local0)
+ Divide(Zero, 0x8, Local2, Local1)
+ // Local1 is Quotient, Local2 is Remainder
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x20, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x21, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x22, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x23, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x24, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x2A, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ // mask out specific functions
+ Store( SizeOf(Local0), Local1)
+ While( LNotEqual(Local1, 0) ) {
+ Decrement(Local1)
+ Store( DeRefOf(Index(FMSK, Local1)), Local2)
+ And( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1) )
+ }
+
+ Return(Local0)
+ }
+
+ // Unit is mWAT
+ case(0x20)
+ {
+ Store(TBUD, Local1)
+ //failsafe to clear ventura status bit
+ And(Local1, 0xFFFFF, Local1)
+ // Just return SPB status for now (bit[0]=1 SPB enabled)
+// If(CondRefOf(PBCM,Local0)){ // Make sure this object is present.
+// If(PBCM){
+// // Software/EC have another chance to disable ventura through VSTS
+// If(LNotEqual(VSTS, 0)) {
+// Or( Local1, 0x40000000, Local1 )
+// }
+// }
+// }
+ Return(Local1)
+ }
+
+ case(0x21)
+ {
+ Return(\_PR.CPU0._PSS)
+ }
+
+ case(0x22)
+ {
+ CreateByteField(Arg3, 0, PCAP)
+
+ Store(PCAP, PSCP)
+ // \_PR.CPU0._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU0, 0x80)
+
+ If(CondRefOf(\_PR.CPU1._PPC, Local0)) {
+ // \_PR.CPU1._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU1, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU2._PPC, Local0)) {
+ // \_PR.CPU2._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU2, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU3._PPC, Local0)) {
+ // \_PR.CPU3._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU3, 0x80)
+ }
+
+//> Andy+ for ClarksField -- 8 processors
+ If(CondRefOf(\_PR.CPU4._PPC, Local0)) {
+ // \_PR.CPU4._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU4, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU5._PPC, Local0)) {
+ // \_PR.CPU5._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU5, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU6._PPC, Local0)) {
+ // \_PR.CPU6._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU6, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU7._PPC, Local0)) {
+ // \_PR.CPU7._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU7, 0x80)
+ }
+//<
+
+ Return(PCAP)
+ }
+
+ case( 0x23)
+ {
+ Return(PSCP)
+ }
+
+ case(0x24)
+ {
+ CreateField(Arg3, 0, 20, THBG)
+ CreateField(Arg3, 30, 1, DDVE)
+ }
+ case(0x2a)
+ {
+ Return(SSNR(Arg3))
+ }
+ } // end of switch
+
+ Return(0x80000002)
+ } // end SPB
+
+ // Ventura Sensor parameters header structure
+ Name(SBHS, Buffer(0x8) {})
+ CreateDWordField(SBHS, 0, VERV)
+ CreateDWordField(SBHS, 4, NUMS)
+
+ // Ventura CPU Sensor structure
+ Name(SSCP, Buffer(44) {})
+ CreateDWordField(SSCP, 4, CSNT)
+ CreateDWordField(SSCP, 8, CPTI)
+ CreateDWordField(SSCP, 12, CICA)
+ CreateDWordField(SSCP, 16, CIRC)
+ CreateDWordField(SSCP, 20, CICV)
+ CreateDWordField(SSCP, 24, CIRA)
+ CreateDWordField(SSCP, 28, CIAV)
+ CreateDWordField(SSCP, 32, CIEP)
+ CreateDWordField(SSCP, 36, CPPF)
+ CreateDWordField(SSCP, 40, CSNR)
+
+ // Ventura GPU Sensor structure
+ Name(SSGP, Buffer(44) {})
+ CreateDWordField(SSGP, 4, GSNT)
+ CreateDWordField(SSGP, 8, GPTI)
+ CreateDWordField(SSGP, 12, GICA)
+ CreateDWordField(SSGP, 16, GIRC)
+ CreateDWordField(SSGP, 20, GICV)
+ CreateDWordField(SSGP, 24, GIRA)
+ CreateDWordField(SSGP, 28, GIAV)
+ CreateDWordField(SSGP, 32, GIEP)
+ CreateDWordField(SSGP, 36, GPPF)
+ CreateDWordField(SSGP, 40, GSNR)
+
+ // Ventura CPU Parameters Structure
+ Name(SCPP, Buffer(72) {})
+ CreateDWordField(SCPP, 0, VRV1)
+ CreateDWordField(SCPP, 4, VCAP)
+ CreateDWordField(SCPP, 8, VCCP)
+ CreateDWordField(SCPP, 12, VCDP)
+ CreateDWordField(SCPP, 16, VCEP)
+ CreateDWordField(SCPP, 20, VCGP)
+ CreateDWordField(SCPP, 24, VCHP)
+ CreateDWordField(SCPP, 28, VCXP)
+ CreateDWordField(SCPP, 32, VCYP)
+ CreateDWordField(SCPP, 36, VCZP)
+ CreateDWordField(SCPP, 40, VCKP)
+ CreateDWordField(SCPP, 44, VCMP)
+ CreateDWordField(SCPP, 48, VCNP)
+ CreateDWordField(SCPP, 52, VCAL)
+ CreateDWordField(SCPP, 56, VCBE)
+ CreateDWordField(SCPP, 60, VCGA)
+ CreateDWordField(SCPP, 64, VCPP)
+ CreateDWordField(SCPP, 68, VCDE)
+
+// Ventura GPU Parameters Structure
+ Name(SGPP, Buffer(40) {})
+ CreateDWordField(SGPP, 0, VRV2)
+ CreateDWordField(SGPP, 4, VGWP)
+ CreateDWordField(SGPP, 8, VGPP)
+ CreateDWordField(SGPP, 12, VGQP)
+ CreateDWordField(SGPP, 16, VGRP)
+ CreateDWordField(SGPP, 20, VGAP)
+ CreateDWordField(SGPP, 24, VGBP)
+ CreateDWordField(SGPP, 28, VGCP)
+ CreateDWordField(SGPP, 32, VGDP)
+ CreateDWordField(SGPP, 36, VGDE)
+
+ Method(SSNR, 1)
+ {
+ Switch (ToInteger(Arg0))
+ {
+ case (0x00)
+ {
+ // Populate Header Structure
+ Store(0x00010000, VERV)
+ Store(0x02, NUMS)
+ Return(SBHS)
+ }
+ case (0x01)
+ {
+ Store(0x00010000, VRV1)
+ Store(0x3E8, VCAP) //VEN_CPU_PARAM_A_CK 0x3E8
+ Store(0x2EE, VCCP) //VEN_CPU_PARAM_C_CK 0x2EE
+ Store(0x2EE, VCDP) //VEN_CPU_PARAM_D_CK 0x2EE
+ Store(0x2EE, VCEP) //VEN_CPU_PARAM_E_CK 0x2EE
+ Store(0x79e, VCGP) //VEN_CPU_PARAM_G_CK 0x79e
+ Store(0x2bc, VCHP) //VEN_CPU_PARAM_H_CK 0x2bc
+ Store(0x258, VCXP) //VEN_CPU_PARAM_X_CK 0x258
+ Store(0x0fa, VCYP) //VEN_CPU_PARAM_Y_CK 0x0fa
+ Store(0x1f4, VCZP) //VEN_CPU_PARAM_Z_CK 0x1f4
+ Store(0x000, VCKP) //VEN_CPU_PARAM_K_CK 0x000
+ Store(0x000, VCMP) //VEN_CPU_PARAM_M_CK 0x000
+ Store(0x000, VCNP) //VEN_CPU_PARAM_N_CK 0x000
+ Store(0x000, VCPP) //VEN_CPU_PARAM_P_CK 0x000
+ Store(0x421, VCAL) //VEN_CPU_PARAM_AL_CK 0x421
+ Store(0x708, VCBE) //VEN_CPU_PARAM_BE_CK 0x708
+ Store(0x016, VCGA) //VEN_CPU_PARAM_GA_CK 0x016
+ Store(0x001, VCDE) //VEN_CPU_PARAM_DEL_CK 0x001
+/* Clarksfield 8 CPU
+ Store(0x3E8, VCAP)
+ Store(0x258, VCCP)
+ Store(0x258, VCDP)
+ Store(0x258, VCEP)
+ Store(0x2CF, VCGP)
+ Store(0x311, VCHP)
+ Store(0x136, VCXP)
+ Store(0x118, VCYP)
+ Store(0x19A, VCZP)
+ Store(0x001, VCKP)
+ Store(0x001, VCMP)
+ Store(0x001, VCNP)
+ Store(0x000, VCPP)
+ Store(0x36B, VCAL)
+ Store(0x13C, VCBE)
+ Store(0x019, VCGA)
+ Store(0x001, VCDE)
+end Clarksfield 8CPUs*/
+
+ Return(SCPP)
+ }
+ case (0x02)
+ {
+ Store(0x00010000, VRV2)
+ Store(0x3E8, VGWP)
+ Store(0x2EE, VGPP)
+ Store(0x2EE, VGQP)
+ Store(0x2EE, VGRP)
+ Store(0x001, VGAP)
+ Store(0x1F4, VGBP)
+ Store(0x000, VGCP)
+ Store(0x000, VGDP)
+ Store(0x001, VGDE)
+/* Clarksfield 8 CPU
+ Store(0x3E8, VGBP)
+ Store(0x001, VGCP)
+ Store(0x001, VGDP)
+ Store(0x000, VGDE)
+end Clarksfield 8CPUs*/
+ Return(SGPP)
+ }
+ case (0x03)
+ {
+ // The below sensor parameter values for GPU and CPU
+ // are board specific. To support for ventura, fill
+ // the SSCP and SSGP structures
+
+ // Populate CPU Sensor values
+ Store(0x0, Index(SSCP, 0)) // Indicate CPU sensor
+ Store(0x00, CSNT)
+ Store(0x01, CPTI)
+ Store(0x84, CICA) // 0x80
+ Store(0x00, CIRC)
+ Store(0x27FF, CICV)
+ Store(0x05, CIRA)
+ Store(0xA000, CIAV)
+ Store(0x03, CIEP)
+ Store(0x0F, CPPF)
+ Store(0x04, CSNR)
+
+ // Populate GPU Sensor values
+ Store(0x1, Index(SSGP, 0)) // Indicate GPU sensor
+ Store(0x00, GSNT)
+ Store(0x01, GPTI)
+ Store(0x8C, GICA) // 0x8A
+ Store(0x00, GIRC)
+ Store(0x27FF, GICV)
+ Store(0x05, GIRA)
+ Store(0xA000, GIAV)
+ Store(0x03, GIEP)
+ Store(0x0F, GPPF)
+ Store(0x04, GSNR)
+
+ Return(Concatenate(SSCP, SSGP))
+ }
+
+ } //switch end
+
+ Return(0x80000002)
+ }
+} // end DGPU_SCOPE scope
+
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.asl
new file mode 100644
index 0000000..f086336
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.asl
@@ -0,0 +1,196 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/OEMSSDT/OEMSSDT.asl 2 9/09/12 11:01p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:01p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/OEMSSDT/OEMSSDT.asl $
+//
+// 2 9/09/12 11:01p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] OEMSSDT.mak
+// OEMSSDT.asl
+// OEMNVdGPU.asl
+// OEMNViGPU.asl
+// OEMNViGDmisc.asl
+// OEMNvVentura.asl
+// OEMNvGPS.asl
+// OEMSSDT.cif
+//
+// 2 12/22/11 6:38a Alanlin
+// Declared "defined(SGTPV_ASL_DEBUG) && (SGTPV_ASL_DEBUG ==1)"
+//
+// 1 12/12/11 9:10p Alanlin
+//
+//
+//**********************************************************************
+
+DefinitionBlock (
+ "OEMACPI.aml",
+ "SSDT",
+ 1,
+ "OEMRef",
+ "OEMTabl",
+ 0x1000
+ ) {
+
+#define OPTIMUS_DSM_GUID 1
+//#define NBCI_DSM_GUID 1
+
+External(P8XH, MethodObj)
+#if defined(SGTPV_ASL_DEBUG) && (SGTPV_ASL_DEBUG ==1)
+#define P8DB(arg0, arg1, arg2) P8XH (0, arg1) P8XH (1, arg0) sleep(arg2)
+#else
+#define P8DB(arg0, arg1, arg2)
+#endif
+
+
+External(PCI_SCOPE, DeviceObj)
+External(PEG_SCOPE, DeviceObj)
+External(DGPU_SCOPE, DeviceObj)
+External(IGPU_SCOPE, DeviceObj)
+External(DGPU_SCOPE._ADR, DeviceObj)
+External(IGPU_SCOPE._DSM, MethodObj)
+External(DGPU_SCOPE.SGST, MethodObj)
+External(DGPU_SCOPE.SGON, MethodObj)
+External(DGPU_SCOPE.SGOF, MethodObj)
+External(DGPU_SCOPE.SGPI, MethodObj)
+External(DGPU_SCOPE.SGPO, MethodObj)
+External(\DSEL)
+External(\ESEL)
+External(\SSEL)
+External(\PSEL)
+External(\HLRS)
+External(\PWEN)
+External(\PWOK)
+External(\SGMD)
+External(\SGFL)
+External(\SSMP)
+
+#include <OEMNVdGPU.ASL> // Include DGPU device namespace
+#include <OEMNViGPU.ASL> // Include NVHG DSM calls
+//#include <NViGDmisc.ASL> // Include misc event callback methods
+#include <OEMNvGPS.ASL> // Include GPS support
+
+
+Scope(PEG_SCOPE)
+{
+ Method(_STA,0,Serialized)
+ {
+ Return(0x000F)
+ }
+}
+
+ Scope(PCI_SCOPE)
+ {
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: WMI1
+//
+// Description: WMI MXM Mapper. ASL Device is used to acccess Nv Optimus native method via WMI API
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Device(WMI1) // placed within PCI Bus scope parallel to iGPU
+ {
+ Name(_HID, "PNP0C14")
+ Name(_UID, "OPT1")
+
+ Name(_WDG, Buffer()
+ {
+ // Methods GUID {F6CB5C3C-9CAE-4ebd-B577-931EA32A2CC0}
+ 0x3C, 0x5C, 0xCB, 0xF6, 0xAE, 0x9C, 0xbd, 0x4e, 0xB5, 0x77, 0x93, 0x1E,
+ 0xA3, 0x2A, 0x2C, 0xC0,
+ 0x4D, 0x58, // Object ID "MX" = method "WMMX"
+ 1, // Instance Count
+ 0x02, // Flags (WMIACPI_REGFLAG_METHOD)
+ }) // End of _WDG
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: WMMX
+//
+// Description: WMI Method execution tunnel. MXM Native methods are called via WMMX index.
+//
+// Input:
+// Arg1: Integer GPU index. 0x10-iGPU, 0x100+PCIe Bus number for the GPU
+//
+// Output:
+// Buffer specific to the funcion being called
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(WMMX, 3)
+ {
+
+ //Arg1 = 0x10 indicates iGPU, 0x100+PCIe Bus number for the GPU
+ //
+ CreateDwordField(Arg2, 0, FUNC) // Get the function name
+
+ If (LEqual(FUNC, 0x534F525F)) // "_ROM"
+ {
+ If (LGreaterEqual(SizeOf(Arg2), 8))
+ {
+ CreateDwordField(Arg2, 4, ARGS)
+ CreateDwordField(Arg2, 8, XARG)
+ Return(DGPU_SCOPE._ROM(ARGS, XARG))
+ }
+ }
+
+ If (LEqual(FUNC, 0x4D53445F)) // "_DSM"
+ {
+ If (LGreaterEqual(SizeOf(Arg2), 28))
+ {
+ CreateField(Arg2, 0, 128, MUID)
+ CreateDwordField(Arg2, 16, REVI)
+ CreateDwordField(Arg2, 20, SFNC)
+ CreateField(Arg2, 0xe0, 0x20, XRG0)
+
+// If(LNotEqual(Arg1,0x10))
+// {
+ If (CondRefOf(IGPU_SCOPE._DSM)) // common with dGPU DSM functions
+ {
+ Return(IGPU_SCOPE._DSM(MUID, REVI, SFNC, XRG0))
+ }
+// }
+ }
+ }
+ Return(0)
+ } // End of WMMX
+ } // End of WMI1 Device
+ } // end scope PCI0
+} // end SSDT
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.cif b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.cif
new file mode 100644
index 0000000..764d465
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.cif
@@ -0,0 +1,15 @@
+<component>
+ name = "OEMSSDT"
+ category = ModulePart
+ LocalRoot = "Board\EM\SwitchableGraphics\SgTpv\AcpiTables\OEMSSDT"
+ RefName = "OEMSSDT"
+[files]
+"OEMSSDT.sdl"
+"OEMSSDT.mak"
+"OEMSSDT.asl"
+"OEMNVdGPU.asl"
+"OEMNViGPU.asl"
+"OEMNViGDmisc.asl"
+"OEMNvVentura.asl"
+"OEMNvGPS.asl"
+<endComponent>
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.mak b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.mak
new file mode 100644
index 0000000..3546d35
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.mak
@@ -0,0 +1,134 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/OEMSSDT/OEMSSDT.mak 4 6/02/13 8:15a Joshchou $
+#
+# $Revision: 4 $
+#
+# $Date: 6/02/13 8:15a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/OEMSSDT/OEMSSDT.mak $
+#
+# 4 6/02/13 8:15a Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Change IASL compiler path to
+# $(ACPIPLATFORM_ASL_COMPILER) in SharkBay project.
+#
+# 3 11/20/12 3:48a Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Create Token for OEM clone
+#
+# 2 9/09/12 11:01p Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Tpv module support for sharkbay.
+# [Files] OEMSSDT.mak
+# OEMSSDT.asl
+# OEMNVdGPU.asl
+# OEMNViGPU.asl
+# OEMNViGDmisc.asl
+# OEMNvVentura.asl
+# OEMNvGPS.asl
+# OEMSSDT.cif
+#
+# 1 12/12/11 9:10p Alanlin
+#
+#
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: OEMSSDT.mak
+#
+# Description: MAke file to build Aptio ACPI ASL components
+#
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+all : BuildOEMSSDT
+
+BuildOEMSSDT : $(BUILD_DIR)\OEMSSDT.ffs
+
+#---------------------------------------------------------------------------
+# Generic AcpiPlatform dependencies
+#---------------------------------------------------------------------------
+$(BUILD_DIR)\OEMSSDT.mak : $(SG_OEMSSDT_DIR)\OEMSSDT.cif $(BUILD_RULES)
+ $(CIF2MAK) $(SG_OEMSSDT_DIR)\OEMSSDT.cif $(CIF2MAK_DEFAULTS)
+
+
+#-----------------------------------------------------------------------
+# ASL compiler definition
+#-----------------------------------------------------------------------
+!IF "$(ACPIPLATFORM_ASL_COMPILER)"==""
+!ERROR It is an invalid path, please check your ASL compiler path.
+!ENDIF
+
+IASL = $(ACPIPLATFORM_ASL_COMPILER)
+#-----------------------------------------------------------------------
+$(BUILD_DIR)\OEMSSDT.aml : $(BUILD_DIR)\OEMSSDT.asl
+# @cl /C /EP $(AOACACPI_ASL_FILE) > $(BUILD_DIR)\AoacAcpi.asl
+# $(IASL) -p $(BUILD_DIR)\OEMSSDT.aml $(SGOEMSSDT_ASL_FILE)
+ $(IASL) -p $@ $*.asl
+
+$(BUILD_DIR)\OEMSSDT.sec: $(BUILD_DIR)\OEMSSDT.aml
+ $(GENSECTION) -I $*.aml -O $@ -S EFI_SECTION_RAW
+
+#Note. Expand the package with OEMSSDT tables.
+# DXE phase will load the tables
+# and update Aml contents if provided in SgTpvAcpiTables.c
+
+$(BUILD_DIR)\OEMSSDT.ffs: $(BUILD_DIR)\OEMSSDT.sec
+ $(GENFFSFILE) -B $(BUILD_DIR) -V -o $@ -P1 <<$(BUILD_DIR)\OEMSSDT.pkg
+
+PACKAGE.INF
+[.]
+BASE_NAME = OEMSSDT
+FFS_FILEGUID = 5B232086-350A-42c7-A70E-3497B5765D85
+FFS_FILETYPE = EFI_FV_FILETYPE_FREEFORM
+FFS_ATTRIB_CHECKSUM = TRUE
+
+IMAGE_SCRIPT =
+{
+ Compress (dummy) {
+ $(PROJECT_DIR)\$(BUILD_DIR)\OEMSSDT.sec
+ }
+}
+<<KEEP
+
+#-----------------------------------------------------------------------#
+# Process SG asl files
+#-----------------------------------------------------------------------#
+$(BUILD_DIR)\OEMSSDT.asl : $(SGOEMSSDT_ASL_FILE)
+ $(CP) /I$(SG_OEMSSDT_DIR) /FItoken.h /C $(SG_OEMSSDT_DIR)\$(@F) > $@
+# include the token.h if needed to check for SDL flags
+# /FItoken.h
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.sdl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.sdl
new file mode 100644
index 0000000..9d79dd6
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/OEMSSDT/OEMSSDT.sdl
@@ -0,0 +1,47 @@
+TOKEN
+ Name = "SGOEMSSDT_SUPPORT"
+ Value = "0"
+ Help = "Add an OEM SSDT for discrete VGA card. When Primarydisplay = Auto or PEG, the system can report OEM SSDT talbes for AMD or nVidia dGPU VGA card."
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "SGOEM_ACPI_SSDT_TABLE"
+ Value = "EFI_SIGNATURE_64 ('O', 'E', 'M', 'T', 'a', 'b', 'l', 0)"
+ Help = "SGOEM Acpi table name"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SGOEM_ACPI_SSDT_GUID"
+ Value = "{0x5B232086, 0x350A, 0x42c7, 0xA7, 0x0E, 0x34, 0x97, 0xB5, 0x76, 0x5D, 0x85}"
+ Help = "SGTpv Acpi Package"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SGOEMSSDT_ASL_FILE"
+ Value = "$(SG_OEMSSDT_DIR)\*.asl"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+PATH
+ Name = "SG_OEMSSDT_DIR"
+End
+
+MODULE
+ Help = "Includes OEMSSDT.mak to Project"
+ File = "OEMSSDT.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\OEMSSDT.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.c b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.c
new file mode 100644
index 0000000..8359da3
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.c
@@ -0,0 +1,988 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvAcpiTables.c 7 3/21/13 3:48a Joshchou $
+//
+// $Revision: 7 $
+//
+// $Date: 3/21/13 3:48a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvAcpiTables.c $
+//
+// 7 3/21/13 3:48a Joshchou
+// [TAG] EIPEIP116106
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] ACPI error in Win8 event viewer on ULT platform
+// [RootCause] We use the PCI_config to save/restore registers,and the
+// value of EBAS is wrong.
+// [Solution] Save the correct value of EBAS in "SgTpvAcpiTables.c"
+// Use the MMIO to save/restore registers
+//
+// 6 1/15/13 6:06a Joshchou
+// [TAG] EIP107237
+// [Category] Improvement
+// [Description] Modify for support SG on ULT platform.
+//
+// 5 12/22/12 2:38a Joshchou
+// [TAG] None
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] Did not get the correct Endpoint Link Contol Register Value
+// [RootCause] Give the wrong address.
+// [Solution] Fix the address.
+//
+// 4 12/18/12 6:21a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Update for SA RC 081
+//
+// 3 10/16/12 4:41a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Update for SA and ACPI RC 0.7.1
+// [Files] SgTpvAcpiTables.c
+//
+// 2 9/09/12 10:57p Joshchou
+//
+// 3 12/12/11 9:17p Alanlin
+// [TAG] EIP74169
+// [Category] Improvement
+// [Description] Add OEMSSDT module part. Token "SGOEMSSDT_SUPPORT" to
+// create OEM SSDT
+// for discrete VGA card.When Primarydisplay = Auto or PEG, it can report
+// OEM SSDT
+// talbes for AMD or nVidia dGPU VGA card.
+// [Files] SgTpvAcpiTables.c
+// SgTpvAcpiTables.cif
+//
+// 2 12/02/11 5:38a Alanlin
+// [TAG] EIP75211
+// [Category] Improvement
+// [Description] Changeing VBIOS size to 128k for _ROM method for nVidia
+// chip.
+//
+// 1 6/27/11 5:26a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgTpvAcpiTables.cif
+// SgTpvAcpiTables.sdl
+// SgTpvAcpiTables.mak
+// SgTpvAcpiTables.c
+//
+//
+// 10 3/17/11 6:15p Alexp
+// Optimus:Add code to preserve HD AudioCodec enable flag in CMOS
+//
+// 9 1/03/11 12:35p Alexp
+// [TAG] EIP50104
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] Nvidia GPU device disappears after S3 resume
+// [RootCause] PEG bridge controller was not restoring secondary and
+// subiordinate bus numbers on S3 resume
+// [Solution] add code to save/restore PCI context using S3_resume
+// Scripts
+// [Files] SgTpvAcpiTables.c
+//
+// 8 11/12/10 1:19p Alexp
+// rearrange the code for Amd and Nvidia tables.
+// Add WiDi DID number if WiDi support is selected in GlobalAcpiNvs flags
+//
+// 7 11/11/10 3:09p Alexp
+// Add debug messages
+//
+// 6 10/06/10 4:17p Alexp
+// comments chnage for NvidiaOpRegion header
+//
+// 5 10/05/10 7:08p Alexp
+// added new field in NVH OpRegion to pass MXM3 data block.
+//
+// 4 9/29/10 1:23p Alexp
+// [TAG] EIP43103 --->change code to update dGPU SVID registers
+//
+// 3 9/23/10 1:12p Alexp
+// BUG fix in disable logic for Func1 on PEG endpoint (HDA) for Optimus
+//
+// 2 9/21/10 5:09p Alexp
+// [TAG] EIP43103 --->fix debug messages
+//
+// 1 9/17/10 1:18p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgTpvAcpiTables.cif;*.sdl;*.mak;*.c
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: SgTpvAcpiTables.c
+//
+// Description: This file contains the routine LoadTpvAcpiTables which installs
+// Acpi Tables for Tpv's Switchable Graphics.
+// File is linked with Intel's SwitchableGraphicsDxe module
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include "SgTpvAcpitables.h"
+//<AMI_THDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NvidiaOpRegion & AmdOpRegion
+//
+// Description: Gfx Vendor specific OperationRegion data structures.
+// Must match ones defined in Asl code
+//
+//----------------------------------------------------------------------------
+//<AMI_THDR_END>
+NVIDIA_OPREGION NvidiaOpRegion;
+AMD_OPREGION AmdOpRegion;
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: LoadTpvAcpiTables
+//
+// Description: Load Third part graphics vendor support SSDT Tables
+//
+// Input: VOID
+//
+// Output:
+// EFI_SUCCESS - SSDT Table load successful.
+// EFI_UNSUPPORTED - Supported SSDT not found.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+LoadTpvAcpiTables (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ BOOLEAN LoadTable;
+ INTN Instance;
+ UINTN NumberOfHandles;
+ UINTN Index;
+ UINTN Size;
+ UINTN TableHandle;
+//UINT16 Data16;
+//UINT32 Data32;
+ UINT32 FvStatus;
+#if (PI_SPECIFICATION_VERSION < 0x00010000)
+ EFI_FIRMWARE_VOLUME_PROTOCOL *FwVol;
+#else
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *FwVol;
+#endif
+ EFI_FV_FILETYPE FileType;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ EFI_ACPI_DESCRIPTION_HEADER *TableHeader;
+ EFI_ACPI_TABLE_VERSION Version;
+// EFI_GUID SGTPV_AcpiTableGuid= SGTPV_ACPI_SSDT_GUID;
+ EFI_GUID SGTPV_AcpiTableGuid;
+ EFI_GUID gSgtpvAcpiSsdtGuid= SGTPV_ACPI_SSDT_GUID;
+ EFI_GUID gSgtpvAcpiPchSsdtGuid= SGTPV_ACPIPCH_SSDT_GUID;
+
+#if SGOEMSSDT_SUPPORT
+ EFI_GUID SGOEM_AcpiTableGuid = SGOEM_ACPI_SSDT_GUID;
+#endif
+ EFI_ACPI_SUPPORT_PROTOCOL *AcpiSupport;
+ EFI_ACPI_COMMON_HEADER *Table;
+
+ UINT16 VendorId;
+
+
+ FwVol = NULL;
+ Table = NULL;
+
+ DEBUG ((EFI_D_ERROR, "CpuFamilyId ==0x%X\n", CpuFamilyId));
+ SGTPV_AcpiTableGuid = gSgtpvAcpiSsdtGuid;
+ if (CpuFamilyId == EnumCpuHswUlt) {
+ SGTPV_AcpiTableGuid = gSgtpvAcpiPchSsdtGuid;
+ }
+
+
+
+ VendorId = McDevFunPciCfg16 (EndpointBus, 0, 0, PCI_VID); // DEBUG
+ DEBUG ((EFI_D_ERROR, "SG TPV Vendor ID %X\n", VendorId));
+
+ switch(VendorId){
+ case NVIDIA_VID:
+ //
+ // Set VendorId if PEG is NVIDIA and supports HG
+ //
+ VendorId = NVIDIA_VID;
+ break;
+ case AMD_VID:
+ //
+ // Set VendorId if PEG is AMD and supports HG
+ //
+ VendorId = AMD_VID;
+ break;
+ default:
+ //
+ // either means the Device ID is not on the list of devices we know - we return from this function
+ //
+ DEBUG ((EFI_D_ERROR, "SG TPV Unsupported Vendor ID\n"));
+ return EFI_UNSUPPORTED;
+ }
+
+
+ ///
+ /// Locate the SA Global NVS Protocol.
+ ///
+ Status = gBS->LocateProtocol (
+ &gSaGlobalNvsAreaProtocolGuid,
+ NULL,
+ (VOID **) &SaGlobalNvsArea
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ SaGlobalNvsArea->Area->EndpointBaseAddress = (UINT32) (MmPciAddress (0, EndpointBus, 0, 0, 0x0));
+
+ //
+ // Locate FV protocol.
+ //
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ #if (PI_SPECIFICATION_VERSION < 0x00010000)
+ &gEfiFirmwareVolumeProtocolGuid,
+ #else
+ &gEfiFirmwareVolume2ProtocolGuid,
+ #endif
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Look for FV with ACPI storage file
+ //
+ for (Index = 0; Index < NumberOfHandles; Index++) {
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = gBS->HandleProtocol (
+ HandleBuffer[Index],
+ #if (PI_SPECIFICATION_VERSION < 0x00010000)
+ &gEfiFirmwareVolumeProtocolGuid,
+ #else
+ &gEfiFirmwareVolume2ProtocolGuid,
+ #endif
+ &FwVol
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // See if it has the ACPI storage file
+ //
+ Size = 0;
+ FvStatus = 0;
+ Status = FwVol->ReadFile (
+ FwVol,
+ &SGTPV_AcpiTableGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+
+ //
+ // If we found it, then we are done
+ //
+ if (!EFI_ERROR (Status)) {
+ break;
+ }
+ }
+
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+ //
+ // Free any allocated buffers
+ //
+ (gBS->FreePool) (HandleBuffer);
+
+ //
+ // Sanity check that we found our data file
+ //
+ ASSERT (FwVol);
+
+ //
+ // By default, a table belongs in all ACPI table versions published.
+ //
+ Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0;
+
+ //
+ // Locate ACPI tables
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiAcpiSupportGuid,
+ NULL,
+ &AcpiSupport
+ );
+
+
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Read tables from the storage file.
+ //
+ Instance = 0;
+
+ while (Status == EFI_SUCCESS) {
+ //
+ // Read the ACPI tables
+ //
+ Status = FwVol->ReadSection (
+ FwVol,
+ &SGTPV_AcpiTableGuid,
+ EFI_SECTION_RAW,
+ Instance,
+ &Table,
+ &Size,
+ &FvStatus
+ );
+ if (!EFI_ERROR (Status)) {
+ //
+ // check for SwitchableGraphics tables and decide which SSDT should be loaded
+ //
+ LoadTable = FALSE;
+ TableHeader = (EFI_ACPI_DESCRIPTION_HEADER *) Table;
+
+ DEBUG ((EFI_D_ERROR, "SG TPV SSDT TblID %X\n", TableHeader->OemTableId));
+
+ switch (((EFI_ACPI_DESCRIPTION_HEADER *) TableHeader)->OemTableId) {
+
+ case EFI_SIGNATURE_64 ('N', 'v', 'd', 'T', 'a', 'b', 'l', 0):
+ if(VendorId != NVIDIA_VID ||
+ SaGlobalNvsArea->Area->SgMode != SgModeMuxed)
+ break;
+
+ DEBUG ((EFI_D_ERROR, "SG TPV Nvidia SG Table\n"));
+ //
+ // This is Nvidia SSDT
+ //
+ LoadTable = TRUE;
+ Status = InstallNvidiaOpRegion ();
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ break;
+
+ case EFI_SIGNATURE_64 ('O', 'p', 't', 'T', 'a', 'b', 'l', 0):
+ if(VendorId != NVIDIA_VID ||
+ SaGlobalNvsArea->Area->SgMode != SgModeMuxless)
+ break;
+
+ DEBUG ((EFI_D_ERROR, "SG TPV Nvidia Optimus Table\n"));
+ //
+ // This is nVidia Optimus SSDT
+ //
+ LoadTable = TRUE;
+ Status = InstallNvidiaOpRegion();
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ break;
+
+ case EFI_SIGNATURE_64 ('A', 'm', 'd', 'T', 'a', 'b', 'l', 0):
+ if(VendorId != AMD_VID)
+ break;
+ //
+ // This is Amd SSDT
+ //
+ LoadTable = TRUE;
+ Status = InstallAmdOpRegion ();
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ break;
+
+ default:
+ DEBUG ((EFI_D_ERROR, "WARNING: SG TPV Unsupported SSDT Signature...\n"));
+ break;
+ }
+
+ //
+ // Add the table
+ //
+ if (LoadTable) {
+ TableHandle = 0;
+ Status = AcpiSupport->SetAcpiTable (
+ AcpiSupport,
+ TableHeader,
+ TRUE,
+ Version,
+ &TableHandle
+ );
+ ASSERT_EFI_ERROR (Status);
+ Status = AcpiSupport->PublishTables (
+ AcpiSupport,
+ Version
+ );
+ ASSERT_EFI_ERROR (Status);
+// if (EFI_ERROR(Status)) break;
+ break; // only one ACPI SG/Optimus table should be loaded
+ }
+ //
+ // Increment the instance
+ //
+ Instance++;
+ Table = NULL;
+ }
+ }
+
+#if SGOEMSSDT_SUPPORT
+ //
+ // Locate ACPI tables
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiAcpiSupportGuid,
+ NULL,
+ &AcpiSupport
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Read tables from the storage file.
+ //
+ Instance = 0;
+
+ while (Status == EFI_SUCCESS) {
+ //
+ // Read the ACPI tables
+ //
+ Status = FwVol->ReadSection (
+ FwVol,
+ &SGOEM_AcpiTableGuid,
+ EFI_SECTION_RAW,
+ Instance,
+ &Table,
+ &Size,
+ &FvStatus
+ );
+ if (!EFI_ERROR (Status)) {
+ //
+ // check for SwitchableGraphics tables and decide which SSDT should be loaded
+ //
+ LoadTable = FALSE;
+ TableHeader = (EFI_ACPI_DESCRIPTION_HEADER *) Table;
+
+ DEBUG ((EFI_D_ERROR, "SG TPV SSDT TblID %X\n", TableHeader->OemTableId));
+
+ switch (((EFI_ACPI_DESCRIPTION_HEADER *) TableHeader)->OemTableId) {
+
+ //
+ // Set OEM SSDT
+ //
+
+ case SGOEM_ACPI_SSDT_TABLE:
+ if(SaGlobalNvsArea->Area->SgMode != SgModeDgpu)
+ break;
+
+ DEBUG ((EFI_D_ERROR, "OEM SSDT Table\n"));
+ //
+ // This is OEM SSDT
+ //
+ LoadTable = TRUE;
+ if(VendorId == NVIDIA_VID)
+ Status = InstallNvidiaOpRegion ();
+ else
+ Status = InstallAmdOpRegion();
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ break;
+
+ default:
+ DEBUG ((EFI_D_ERROR, "WARNING: SG OEM Unsupported SSDT Signature...\n"));
+ break;
+ }
+
+ //
+ // Add the table
+ //
+ if (LoadTable) {
+ TableHandle = 0;
+ Status = AcpiSupport->SetAcpiTable (
+ AcpiSupport,
+ TableHeader,
+ TRUE,
+ Version,
+ &TableHandle
+ );
+ ASSERT_EFI_ERROR (Status);
+ Status = AcpiSupport->PublishTables (
+ AcpiSupport,
+ Version
+ );
+ ASSERT_EFI_ERROR (Status);
+// if (EFI_ERROR(Status)) break;
+ break; // only one ACPI SG/Optimus table should be loaded
+ }
+ //
+ // Increment the instance
+ //
+ Instance++;
+ Table = NULL;
+ }
+ }
+#endif
+
+ DEBUG ((EFI_D_ERROR, "SGtpv:: NDID:0x%x\n", SaGlobalNvsArea->Area->NumberOfValidDeviceId));
+ DEBUG ((EFI_D_ERROR, "SGtpv:: DID1:0x%x\n", SaGlobalNvsArea->Area->DeviceId1));
+ DEBUG ((EFI_D_ERROR, "SGtpv:: DID2:0x%x\n", SaGlobalNvsArea->Area->DeviceId2));
+ DEBUG ((EFI_D_ERROR, "SGtpv:: DID3:0x%x\n", SaGlobalNvsArea->Area->DeviceId3));
+ DEBUG ((EFI_D_ERROR, "SGtpv:: DID4:0x%x\n", SaGlobalNvsArea->Area->DeviceId4));
+ DEBUG ((EFI_D_ERROR, "SGtpv:: DID5:0x%x\n", SaGlobalNvsArea->Area->DeviceId5));
+ DEBUG ((EFI_D_ERROR, "SGtpv:: DID6:0x%x\n", SaGlobalNvsArea->Area->DeviceId6));
+ DEBUG ((EFI_D_ERROR, "SGtpv:: DID7:0x%x\n", SaGlobalNvsArea->Area->DeviceId7));
+ DEBUG ((EFI_D_ERROR, "SGtpv:: DID8:0x%x\n", SaGlobalNvsArea->Area->DeviceId8));
+
+ DEBUG ((EFI_D_ERROR, "SG TPV Gfx acpi UPDATE - COMPLETED\n"));
+ return EFI_SUCCESS;
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+//Procedure: InstallNvidiaOpRegion
+//
+//Description: Nvidia SG specific Asl OpRegion installation function.
+//
+//Input:
+//
+// ImageHandle Handle for this drivers loaded image protocol.
+// SystemTable EFI system table.
+//
+//Output:
+//
+// EFI_SUCCESS The driver installed without error.
+// EFI_ABORTED The driver encountered an error and could not complete
+// installation of the ACPI tables.
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+InstallNvidiaOpRegion (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINTN Size;
+// Locate MXM3 protocol and get Mxm data pointer from function->MxmReturnStructure
+ EFI_GUID EfiMxm3ProtocolGuid = MXM3_EFI_GUID;
+#if MXM30_SUPPORT == 1
+ MXM3_EFI_PROTOCOL *Mxm30Protocol;
+ VOID *MxmLegMemAddr = NULL;
+ UINT32 MxmLegMemSize = 0;
+#endif
+ //
+ // Allocate an ACPI NVS memory buffer as the Nvidia NVIG OpRegion, zero initialize
+ // the entire 1K, and set the Nvidia NVIG OpRegion pointer in the Global NVS
+ // area structure.
+ //
+ Size = sizeof (NVIG_OPREGION);
+ Status = (gBS->AllocatePool) (EfiACPIMemoryNVS, Size, &NvidiaOpRegion.NvIgOpRegion);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ (gBS->SetMem) (NvidiaOpRegion.NvIgOpRegion, Size, 0);
+
+ //
+ // Set up DeviceID values for _DOD.
+ // Note that Display Subtype bits[15-12] and Port index bits[7:4] are set as per NV Switchable 3.0 spec.
+ // Not used by Intel driver.
+ //
+ //
+ // Display Type - CRT
+ //
+ SaGlobalNvsArea->Area->DeviceId1 = 0x80010100;
+
+ if (SaGlobalNvsArea->Area->ActiveLFP == 3) {
+ //
+ // If Active LFP = EDP_A
+ //
+ // Display type - LFP Device Sub Type - eDP
+ //
+ SaGlobalNvsArea->Area->DeviceId2 = 0x8001A420;
+ } else {
+ //
+ // Display Type - LFP Device Sub Type - LVDS
+ //
+ SaGlobalNvsArea->Area->DeviceId2 = 0x80010410;
+ }
+ //
+ // Display type - EFP Device Sub type - DisplayPort 1.1
+ //
+ SaGlobalNvsArea->Area->DeviceId3 = 0x80016330 | ((SaGlobalNvsArea->Area->SgMuxDid3 & 0xFF00) << 10);
+
+ //
+ // Display type - EFP Device Sub type - HDMI 1.2 or 1.3a
+ //
+ SaGlobalNvsArea->Area->DeviceId4 = 0x80017331 | ((SaGlobalNvsArea->Area->SgMuxDid4 & 0xFF00) << 10);
+
+ //
+ // Display type - EFP Device Sub type - HDMI 1.2 or 1.3a
+ //
+ SaGlobalNvsArea->Area->DeviceId5 = 0x80017342 | ((SaGlobalNvsArea->Area->SgMuxDid5 & 0xFF00) << 10);
+
+ //
+ // Display type - EFP Device Sub type - DisplayPort 1.1
+ //
+ SaGlobalNvsArea->Area->DeviceId6 = 0x80016353 | ((SaGlobalNvsArea->Area->SgMuxDid6 & 0xFF00) << 10);
+
+ //
+ // Display type - EFP Device Sub type - HDMI 1.2 or 1.3a
+ //
+ SaGlobalNvsArea->Area->DeviceId7 = 0x80017354 | ((SaGlobalNvsArea->Area->SgMuxDid7 & 0xFF00) << 10);
+
+ //
+ // DeviceId8 is not being used on HuronRiver SG
+ //
+ SaGlobalNvsArea->Area->DeviceId8 = 0x0;
+
+ //
+ // NDID
+ //
+ SaGlobalNvsArea->Area->NumberOfValidDeviceId = VALIDDIDS;//0x7;
+
+ //
+ // NVIG
+ //
+ SaGlobalNvsArea->Area->NvIgOpRegionAddress = (UINT32)(UINTN)(NvidiaOpRegion.NvIgOpRegion);
+
+ //
+ // NVIG Header
+ //
+ (gBS->CopyMem) (NvidiaOpRegion.NvIgOpRegion->NISG, NVIG_HEADER_SIGNATURE, sizeof (NVIG_HEADER_SIGNATURE));
+ NvidiaOpRegion.NvIgOpRegion->NISZ = NVIG_OPREGION_SIZE;
+ NvidiaOpRegion.NvIgOpRegion->NIVR = NVIG_OPREGION_VER;
+
+ //
+ // Panel Scaling Preference
+ //
+ NvidiaOpRegion.NvIgOpRegion->GPSP = SaGlobalNvsArea->Area->IgdPanelScaling;
+
+
+ // Save Link Control register
+ NvidiaOpRegion.NvIgOpRegion->ELCL= MemoryRead16((UINTN)SaGlobalNvsArea->Area->EndpointPcieCapOffset + 0x10);
+
+
+ //
+ // Allocate an ACPI NVS memory buffer as the Nvidia NVHM OpRegion, zero initialize
+ // the entire 62K, and set the Nvidia NVHM OpRegion pointer in the Global NVS
+ // area structure.
+ //
+ Size = sizeof (NVHM_OPREGION);
+ Status = (gBS->AllocatePool) (EfiACPIMemoryNVS, Size, &NvidiaOpRegion.NvHmOpRegion);
+
+ if (EFI_ERROR (Status)) {
+ (gBS->FreePool) (NvidiaOpRegion.NvIgOpRegion);
+ return Status;
+ }
+
+ (gBS->SetMem) (NvidiaOpRegion.NvHmOpRegion, Size, 0);
+
+ //
+ // NVHM
+ //
+ SaGlobalNvsArea->Area->NvHmOpRegionAddress = (UINT32) (UINTN) (NvidiaOpRegion.NvHmOpRegion);
+
+ //
+ // NVHM Header Signature, Size, Version
+ //
+ (gBS->CopyMem) (NvidiaOpRegion.NvHmOpRegion->NVSG, NVHM_HEADER_SIGNATURE, sizeof (NVHM_HEADER_SIGNATURE));
+ NvidiaOpRegion.NvHmOpRegion->NVSZ = NVHM_OPREGION_SIZE;
+ NvidiaOpRegion.NvHmOpRegion->NVVR = NVHM_OPREGION_VER;
+
+ //
+ // NVHM opregion address
+ //
+ NvidiaOpRegion.NvHmOpRegion->NVHO = (UINT32) (UINTN) (NvidiaOpRegion.NvHmOpRegion);
+
+ //
+ // Copy Oprom to allocated space in NV Opregion
+ //
+ NvidiaOpRegion.NvHmOpRegion->RVBS = VbiosSize;
+ (gBS->CopyMem) ((VOID *) (UINTN) NvidiaOpRegion.NvHmOpRegion->RBUF, VbiosAddress, NvidiaOpRegion.NvHmOpRegion->RVBS);
+
+ //
+ // Locate the MXM3 Protocol and update Mxm struct pointers
+ //
+#if MXM30_SUPPORT == 1
+ Status = gBS->LocateProtocol (
+ &EfiMxm3ProtocolGuid,
+ NULL,
+ &Mxm30Protocol
+ );
+ if (!EFI_ERROR(Status))
+ {
+ Status = Mxm30Protocol->MxmReturnStructure(
+ Mxm30Protocol,
+ NULL,
+ (CHAR16*)&MxmLegMemSize,
+ (CHAR16)EFI30_DataBlockID,
+ (CHAR8**)&MxmLegMemAddr
+ );
+ ASSERT_EFI_ERROR (Status);
+ //
+ // Copy MXM3 data structure to allocated space in NV Opregion
+ //
+ NvidiaOpRegion.NvHmOpRegion->MXML = MxmLegMemSize;
+ (gBS->CopyMem) ((VOID *) (UINTN) NvidiaOpRegion.NvHmOpRegion->MXM3, MxmLegMemAddr, MxmLegMemSize);
+ }
+#endif
+ if (Status != EFI_SUCCESS) {
+ (gBS->FreePool) (NvidiaOpRegion.NvIgOpRegion);
+ (gBS->FreePool) (NvidiaOpRegion.NvHmOpRegion);
+ }
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+//Procedure: InstallAmdOpRegion
+//
+//Description: Amd(ATI) SG specific Asl Graphics OpRegion installation function.
+//
+//Input:
+//
+// ImageHandle Handle for this drivers loaded image protocol.
+// SystemTable EFI system table.
+//
+//Output:
+//
+// EFI_SUCCESS The driver installed without error.
+// EFI_ABORTED The driver encountered an error and could not complete
+// installation of the ACPI tables.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+InstallAmdOpRegion (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINTN Size;
+
+ //
+ // Allocate an ACPI NVS memory buffer as the Amd APXM OpRegion, zero initialize
+ // the entire 1K, and set the Amd APXM OpRegion pointer in the Global NVS
+ // area structure.
+ //
+ Size = sizeof (APXM_OPREGION);
+ Status = (gBS->AllocatePool) (EfiACPIMemoryNVS, Size, &AmdOpRegion.ApXmOpRegion);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ (gBS->SetMem) (AmdOpRegion.ApXmOpRegion, Size, 0);
+
+ //
+ // APXM address
+ //
+ SaGlobalNvsArea->Area->ApXmOpRegionAddress = (UINT32) (UINTN) (AmdOpRegion.ApXmOpRegion);
+ AmdOpRegion.ApXmOpRegion->APXA = (UINT32) (UINTN) (AmdOpRegion.ApXmOpRegion);
+
+ //
+ // Note. All fields in Amd OpRegion will be initialized with Zeroes.
+ // Only update those that differ from 0.
+
+ // Set up DIDx values for _DOD
+ //
+ // Device ID - CRT on IGPU
+ //
+ SaGlobalNvsArea->Area->DeviceId1 = 0x80010100;
+
+ //
+ // Device ID - LFP (LVDS or eDP)
+ //
+ SaGlobalNvsArea->Area->DeviceId2 = 0x80010400;
+
+ //
+ // Display type - EFP Device Sub type - DisplayPort 1.1
+ //
+ SaGlobalNvsArea->Area->DeviceId3 = 0x80010300;
+
+ //
+ // Display type - EFP Device Sub type - HDMI 1.2 or 1.3a
+ //
+ SaGlobalNvsArea->Area->DeviceId4 = 0x80010301;
+
+ //
+ // Display type - EFP Device Sub type - HDMI 1.2 or 1.3a
+ //
+ SaGlobalNvsArea->Area->DeviceId5 = 0x80010302;
+
+ //
+ // Display type - EFP Device Sub type - DisplayPort 1.1
+ //
+ SaGlobalNvsArea->Area->DeviceId6 = 0x80010303;
+
+ //
+ // Display type - EFP Device Sub type - HDMI 1.2 or 1.3a
+ //
+
+ //
+ // SG Feature List for ASL usage
+ //
+ if(SaGlobalNvsArea->Area->SgFeatureList & 1) // WIRELESSDISPLAY
+ SaGlobalNvsArea->Area->DeviceId7 = 0x80010306;
+ else
+ SaGlobalNvsArea->Area->DeviceId7 = 0x80010304;
+ //
+ // DeviceId8 is not being used on HuronRiver SG
+ //
+ SaGlobalNvsArea->Area->DeviceId8 = 0x0;
+
+ //
+ // NDID
+ //
+ SaGlobalNvsArea->Area->NumberOfValidDeviceId = VALIDDIDS;//0x7;
+
+ //
+ // APXM Header
+ //
+ (gBS->CopyMem) (AmdOpRegion.ApXmOpRegion->APSG, APXM_HEADER_SIGNATURE, sizeof (APXM_HEADER_SIGNATURE));
+ AmdOpRegion.ApXmOpRegion->APSZ = APXM_OPREGION_SIZE;
+ AmdOpRegion.ApXmOpRegion->APVR = APXM_OPREGION_VER;
+
+ //
+ // Total number of toggle list entries
+ //
+ AmdOpRegion.ApXmOpRegion->NTLE = 15;
+
+ //
+ // The display combinations in the list...
+ //
+ //
+ // CRT
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[0] = 0x0002;
+ //
+ // LFP
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[1] = 0x0001;
+ //
+ // DP_B
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[2] = 0x0008;
+ //
+ // HDMI_B
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[3] = 0x0080;
+ //
+ // HDMI_C
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[4] = 0x0200;
+ //
+ // DP_D
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[5] = 0x0400;
+ //
+ // HDMI_D
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[6] = 0x0800;
+ //
+ // LFP+CRT
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[7] = 0x0003;
+ //
+ // LFP+DP_B
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[8] = 0x0009;
+ //
+ // LFP+HDMI_B
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[9] = 0x0081;
+ //
+ // LFP+HDMI_C
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[10] = 0x0201;
+ //
+ // LFP+DP_D
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[11] = 0x0401;
+ //
+ // LFP+HDMI_D
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[12] = 0x0801;
+ //
+ // Dummy 1
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[13] = 0x0;
+ //
+ // Dummy 2
+ //
+ AmdOpRegion.ApXmOpRegion->TLEX[14] = 0x0;
+
+ //
+ // Panel Scaling Preference
+ //
+ AmdOpRegion.ApXmOpRegion->EXPM = SaGlobalNvsArea->Area->IgdPanelScaling;
+
+
+ // Save Link Control register
+ AmdOpRegion.ApXmOpRegion->ELCL= MemoryRead16((UINTN)SaGlobalNvsArea->Area->EndpointPcieCapOffset + 0x10);
+
+
+ //
+ // Copy Oprom to allocated space in ATI Opregion
+ //
+ AmdOpRegion.ApXmOpRegion->RVBS = VbiosSize;
+ (gBS->CopyMem) ((VOID *) (UINTN) AmdOpRegion.ApXmOpRegion->RBUF, VbiosAddress, AmdOpRegion.ApXmOpRegion->RVBS);
+
+ if (Status != EFI_SUCCESS) {
+ (gBS->FreePool) (AmdOpRegion.ApXmOpRegion);
+ }
+
+ return Status;
+}
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.cif b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.cif
new file mode 100644
index 0000000..cf21dc9
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.cif
@@ -0,0 +1,15 @@
+<component>
+ name = "Sg Acpi Tables"
+ category = ModulePart
+ LocalRoot = "Board\EM\SwitchableGraphics\SgTpv\AcpiTables"
+ RefName = "SgTpvAcpiTables"
+[files]
+"SgTpvAcpiTables.sdl"
+"SgTpvAcpiTables.mak"
+"SgTpvAcpiTables.c"
+"SgTpvAcpitables.h"
+[parts]
+"SgTpvPEG"
+"SgTpvPCH"
+"OEMSSDT"
+<endComponent>
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.mak b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.mak
new file mode 100644
index 0000000..23f5961
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.mak
@@ -0,0 +1,101 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvAcpiTables.mak 5 1/15/13 6:07a Joshchou $
+#
+# $Revision: 5 $
+#
+# $Date: 1/15/13 6:07a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvAcpiTables.mak $
+#
+# 5 1/15/13 6:07a Joshchou
+# [TAG] EIP107237
+# [Category] New Feature
+# [Description] Modify for support SG on ULT platform.
+#
+# 4 12/22/12 2:39a Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Update for SA RC 081,rename the name for corrcet make.
+#
+# 3 11/20/12 3:46a Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Create Token for OEM clone
+#
+# 2 9/09/12 10:57p Joshchou
+#
+# 1 6/27/11 5:26a Alanlin
+# [TAG] EIP61848
+# [Category] New Feature
+# [Description] Initial check-in.Integrated SwitchableGraphics Intel
+# Reference code 0.6.0
+# [Files] SgTpvAcpiTables.cif
+# SgTpvAcpiTables.sdl
+# SgTpvAcpiTables.mak
+# SgTpvAcpiTables.c
+#
+#
+# 3 11/12/10 1:17p Alexp
+# include the token.h in command line to CL preprocessor
+#
+# 2 10/05/10 7:07p Alexp
+# change the default build target
+#
+# 1 9/17/10 1:18p Alexp
+# [TAG] EIP43103
+# [Category] Function Request
+# [Severity] Normal
+# [Symptom] Initial check-in of SgTPV module
+# [RootCause] Request to implement SG reference code .
+# [Solution] Initial check-in.
+# [Files]
+# SgTpvAcpiTables.cif;*.sdl;*.mak;*.c
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: SgTpvAcpiTables.mak
+#
+# Description: Make file to build SG TPV ACPI components
+#
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+BUILD_SGTPV_DIR = $(BUILD_DIR)\$(SGTPV_DIR)
+
+SaInitDxeBin: $(BUILD_SGTPV_DIR)\SgTpvAcpiTables.obj
+
+
+
+$(BUILD_SGTPV_DIR)\SgTpvAcpiTables.obj: $(SGTPV_ACPI_DIR)\SgTpvAcpiTables.c
+ $(CC) $(CFLAGS) /I$(INCLUDE_DIR)/ /DTIANO_RELEASE_VERSION=$(TIANO_RELEASE_VERSION) $(SgTpvDxe_INCLUDES) /Fo$@ $**
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.sdl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.sdl
new file mode 100644
index 0000000..5e121c8
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpiTables.sdl
@@ -0,0 +1,110 @@
+TOKEN
+ Name = "SgTpvAcpiTables_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable SgAcpiTables support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "SGTPV_ACPI_SSDT_GUID"
+ Value = "{0x6A061113, 0xFE54, 0x4A07, 0xA2, 0x8E, 0x0A, 0x69, 0x35, 0x9E, 0xB0, 0x69}"
+ Help = "SGTpv Acpi Package"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SGTPV_ACPIPCH_SSDT_GUID"
+ Value = "{0x9b65fe7c, 0x855e, 0x43cc, 0xa1, 0x70, 0xa2, 0xa6, 0x85, 0xf3, 0x65, 0x5f}"
+ Help = "SGTpv Acpi Package"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SGTPV_ASL_DEBUG"
+ Value = "1"
+ Help = "Turns on debug check points in ASL code"
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "DEBUG_MODE" "=" "1"
+End
+
+TOKEN
+ Name = "NV_VENTURA_SUPPORT"
+ Value = "0"
+ Help = "Switch to enable Nvidia Ventura support with SG and Optimus.\Controls inclusion of different ASL reference code"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NV_GPS_SUPPORT"
+ Value = "0"
+ Help = "Switch to enable Nvidia GPS support with SG and Optimus.\Controls inclusion of different ASL reference code"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NV_GC6_SUPPORT"
+ Value = "0"
+ Help = "Switch to enable Nvidia GC6 support Optimus.Notice:It is sample code for reference,should be modified it by different board design"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NV_OPTIMUS_DISPLAYLESS"
+ Value = "0"
+ Help = "Follow nVidia's suggetion, Optimus displayless platform has no used for other sub-functions.just support sub-functions NVOP_FUNC_SUPPORT, NVOP_FUNC_GETOBJBYTYPE, NVOP_FUNC_GETALLONJS, NVOP_FUNC_OPTIMUSCAPS) in _DSM NVOP_FUNC_SUPPORT (0x00000000) function"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PCI_SCOPE"
+ Value = "\_SB.PCI0"
+ TokenType = Expression
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "PEG_SCOPE"
+ Value = "\_SB.PCI0.PEG0"
+ Help = "PLATFORM PORTING!!! Update iGPU and dGPU device names as defined in SB/NB.SDL"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "IGPU_SCOPE"
+ Value = "\_SB.PCI0.GFX0"
+ Help = "PLATFORM PORTING!!! Update iGPU and dGPU device names as defined in SB/NB.SDL"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+PATH
+ Name = "SGTPV_ACPI_DIR"
+ Help = "Path to SG AcpiTable folder"
+End
+
+MODULE
+ File = "SgTpvAcpiTables.mak"
+End
+
+ELINK
+ Name = "/I$(SGTPV_ACPI_DIR)"
+ Parent = "SwitchableGraphics_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpitables.h b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpitables.h
new file mode 100644
index 0000000..5ee40e5
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvAcpitables.h
@@ -0,0 +1,254 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvAcpitables.h 6 6/05/13 5:08a Joshchou $
+//
+// $Revision: 6 $
+//
+// $Date: 6/05/13 5:08a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvAcpitables.h $
+//
+// 6 6/05/13 5:08a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Increase the size of RBUF to support hybrid Vbios.
+//
+// 5 1/15/13 6:07a Joshchou
+// [TAG] EIP107237
+// [Category] Improvement
+// [Description] Modify for support SG on ULT plaform
+//
+// 4 12/18/12 6:22a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Update for SA RC 081
+//
+// 3 10/16/12 4:41a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Update for SA and ACPI RC 0.7.1
+// [Files] SgTpvAcpitables.h
+//
+// 2 9/09/12 10:57p Joshchou
+//
+//**********************************************************************
+
+#ifndef _SG_TPV_ACPITABLES_H_
+#define _SG_TPV_ACPITABLES_H_
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+#include "EfiScriptLib.h"
+#endif
+
+#include "Acpi3_0.h"
+#include <Token.h>
+#include <Protocol\Mxm30.h>
+
+#include "CpuRegs.h"
+#include "CpuPlatformLib.h"
+
+//#include EFI_PROTOCOL_DEPENDENCY (PciIo)
+#include EFI_PROTOCOL_DEPENDENCY (AcpiSupport)
+#include EFI_PROTOCOL_DEPENDENCY (FirmwareVolume)
+#include EFI_PROTOCOL_DEPENDENCY (SaGlobalNvsArea)
+#include EFI_GUID_DEFINITION (SaDataHob)
+#include EFI_PROTOCOL_DEFINITION (SaPlatformPolicy)
+
+#define MemoryRead16(Address) * (UINT16 *) (Address)
+#define MemoryRead8(Address) * (UINT8 *) (Address)
+
+extern EFI_BOOT_SERVICES *gBS;
+extern EFI_GUID gSaGlobalNvsAreaProtocolGuid;
+extern VOID *VbiosAddress;
+extern UINT32 VbiosSize;
+extern UINT8 EndpointBus;
+extern UINT16 GpioBaseAddress;
+
+extern CPU_FAMILY CpuFamilyId;
+
+SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL *SaGlobalNvsArea;
+
+// Function Prototype declaration
+EFI_STATUS LoadTpvAcpiTables();
+EFI_STATUS InstallNvidiaOpRegion (VOID);
+EFI_STATUS InstallAmdOpRegion (VOID);
+
+//----------------------------------------------------------------------------
+//
+// Switchable Graphics defines.
+//
+//----------------------------------------------------------------------------
+
+//
+// SSDT Guid file
+//
+#define NVIDIA_VID 0x10DE
+#define NVOPT_SSID_OFFSET 0x40
+
+#define AMD_SVID_OFFSET 0x4C
+#define AMD_SDID_OFFSET 0x4E
+#define AMD_VID 0x1002
+
+//
+// OpRegion Header #defines.
+//
+#define NVIG_HEADER_SIGNATURE "NVSG-IGD-DSM-VAR"
+#define NVIG_OPREGION_SIZE 1
+#define NVIG_OPREGION_VER 0x00000201
+#define NVHM_HEADER_SIGNATURE "NvSwitchable_Gfx"
+#define NVHM_OPREGION_SIZE 129
+#define NVHM_OPREGION_VER 0x00000201
+#define APXM_HEADER_SIGNATURE "AMD--PowerXpress"
+#define APXM_OPREGION_SIZE 129
+#define APXM_OPREGION_VER 0x00000201
+
+//
+// OpRegion structures:
+//
+// Note: These structures are packed to 1 byte offsets because the exact
+// data location is requred by the supporting design specification due to
+// the fact that the data is used by ASL and Graphics driver code compiled
+// separatly.
+//
+
+//
+// NVIG OpRegion
+//
+#pragma pack (1)
+typedef struct {
+ // OpRegion Header // Byte offset(decimal)
+
+ CHAR8 NISG[0x10]; // 0 NVIG OpRegion Signature
+ UINT32 NISZ; // 16 NVIG OpRegion Size in KB
+ UINT32 NIVR; // 20 NVIG OpRegion Version
+
+ // OpRegion Data
+ UINT32 GPSS; // 24 Policy Selection Switch Status (Current GPU)
+ UINT16 GACD; // 32 Active Displays
+ UINT16 GATD; // 34 Attached Displays
+ CHAR8 LDES; // 36 Lid Event State
+ CHAR8 DKST; // 37 Dock State
+ CHAR8 DACE; // 38 Display ACPI Event
+ CHAR8 DHPE; // 39 Display Hot-Plug Event
+ CHAR8 DHPS; // 40 Display Hot-Plug Status
+ CHAR8 SGNC; // 41 Notify Code (Cause of Notify(..,0xD0))
+ CHAR8 GPPO; // 42 Policy Override
+ CHAR8 USPM; // 43 Update Scaling Preference Mask
+ CHAR8 GPSP; // 44 Panel Scaling Preference
+ CHAR8 TLSN; // 45 Toggle List Sequence Number
+ CHAR8 DOSF; // 46 Flag for _DOS
+ UINT16 ELCL; // 47 Endpoint Link Contol Register Value
+
+} NVIG_OPREGION; // Total 49 Bytes
+#pragma pack ()
+
+//
+// NVHM OpRegion
+//
+#pragma pack (1)
+typedef struct {
+ // OpRegion Header // Byte offset(decimal)
+
+ CHAR8 NVSG[0x10]; // 0 NVHM OpRegion Signature
+ UINT32 NVSZ; // 16 NVHM OpRegion Size in KB
+ UINT32 NVVR; // 20 NVHM OpRegion Version
+
+ // OpRegion Data
+ UINT32 NVHO; // 24 NVHM Opregion Address
+ UINT32 RVBS; // 28 Nvidia VBIOS Image Size
+ CHAR8 RBUF[0x20000]; // 32 64KB VBIOS
+ UINT32 MXML; // 64k+32 Nvidia Mxm3 Buffer length
+#if MXM30_SUPPORT == 1
+ CHAR8 MXM3[MXM_ROM_MAX_SIZE];// 64k+36 Nvidia Mxm3 Buffer
+#else
+ CHAR8 MXM3[200];
+#endif
+} NVHM_OPREGION; // Total 65568 Bytes
+#pragma pack ()
+
+//
+// Entire Nvidia OpRegion
+//
+#pragma pack(1)
+typedef struct {
+ NVIG_OPREGION *NvIgOpRegion; // 47 Bytes
+ NVHM_OPREGION *NvHmOpRegion; // 65568 Bytes
+} NVIDIA_OPREGION; // Total 65615 Bytes
+#pragma pack()
+
+//
+// APXM OpRegion
+//
+#pragma pack (1)
+typedef struct {
+ // OpRegion Header // Byte offset(decimal)
+
+ CHAR8 APSG[0x10]; // 0 APXM OpRegion Signature
+ UINT32 APSZ; // 16 APXM OpRegion Size in KB
+ UINT32 APVR; // 20 APXM OpRegion Version
+
+ // OpRegion Data
+ UINT32 APXA; // 24 PX OpRegion Address
+ UINT32 RVBS; // 28 PX Runtime VBIOS Image Size
+ UINT16 NTLE; // 32 Total number of toggle list entries
+ UINT16 TLEX[15]; // 34 The display combinations in the list...
+ UINT16 TGXA; // 64 Target GFX adapter as notified by ATPX function 5
+ UINT16 AGXA; // 66 Active GFX adapter as notified by ATPX function 6
+ CHAR8 GSTP; // 68 GPU switch transition in progress
+ CHAR8 DSWR; // 69 Display Switch Request
+ CHAR8 SPSR; // 70 System power source change request
+ CHAR8 DCFR; // 71 Display configuration change request
+ CHAR8 EMDR; // 72 Expansion Mode Change Request
+ CHAR8 PXGS; // 73 PowerXpress graphics switch toggle request
+ UINT16 CACD; // 74 Currently Active Displays
+ UINT16 CCND; // 76 Currently Connected Displays
+ UINT16 NACD; // 78 Next Active Index
+ CHAR8 EXPM; // 80 Expansion Mode
+ UINT16 TLSN; // 81 Toggle list sequence index
+ UINT16 ELCL; // 83 Endpoint Link Contol Register Value
+
+ CHAR8 RBUF[0x20000]; // 83 VBIOS 128KB
+} APXM_OPREGION; // Total 65626 Bytes
+#pragma pack ()
+
+//
+// Entire AMD OpRegion
+//
+#pragma pack (1)
+typedef struct {
+ APXM_OPREGION *ApXmOpRegion; // Total 65617 Bytes
+} AMD_OPREGION;
+#pragma pack ()
+
+#endif
+
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/ATdGPUPCH.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/ATdGPUPCH.asl
new file mode 100644
index 0000000..2467fdc
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/ATdGPUPCH.asl
@@ -0,0 +1,179 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/ATdGPUPCH.asl 1 1/15/13 6:02a Joshchou $
+//
+// $Revision: 1 $
+//
+// $Date: 1/15/13 6:02a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/ATdGPUPCH.asl $
+//
+// 1 1/15/13 6:02a Joshchou
+// [TAG] EIP107237
+// [Category] Improvement
+// [Description] Create componet for SG support on PCH
+// [Files] SgUltAti.cif
+// AtiSSDTPCH.asl
+// ATdGPUPCH.asl
+// ATiGPUPCH.asl
+// ATiGDmiscPCH.asl
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgAti.cif
+// AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+//
+//
+// 2 10/05/10 7:09p Alexp
+// Added debug macro to be able to insert include check points in target
+// ASL code
+//
+// 1 9/17/10 1:20p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgAti.cif;
+// AtiSSDT.asl; ATdGPU.asl;ATiGPU.asl;ATiGDmisc
+//
+// 1 6/08/10 3:45p Alexp
+//
+// 1 6/03/10 2:54p Alexp
+//
+// 10 4/29/10 11:42a Alexp
+// updated ASL names for Mxm power control and switching from GPIO to
+// functional names. E.g. old- PO16 to new-MRST etc.
+//
+// 9 4/02/10 5:06p Alexp
+// Change per Calpella SG BIOS spec 1.03:
+// - add link control register
+// - add WiDi display
+//
+// 8 1/11/10 4:03p Alexp
+// Added Nvidia Optimus Gfx support
+//
+// 7 12/08/09 10:20a Alexp
+// Per BWG 1.2 Added code to save/restore Endpoint Link Contol Register
+// during power cycle of DGPU
+//
+// 6 10/06/09 1:27p Alexp
+// replaced Alias definitions with actual device name scopes for PEG
+// display devices
+//
+// 5 10/05/09 5:35p Alexp
+// updated asl code for Ati and Nvidia according to Calpella SG BWG 1.1
+//
+// 4 8/21/09 4:45p Alexp
+// Updated Nvidia and ATI SG code to match latest Intel Calpella Acpi
+// reference code from Intel code drop v#68 and Ati SG BWG
+// SG Asl code. Made PEG PCIe MMIO base address dependent on
+// PCIE_BASE_ADDRESS SDL token. Before it was hardwired in ASL code which
+// caused SG logic to fail in Mxm & SG Label 005
+//
+// 3 8/20/09 7:08p Alexp
+// upgraded Ati and Nvidia SSDT Asl files to match latest Acpi code drop
+// #68
+//
+// 1 7/16/09 11:17a Alexp
+// Added SG support for AMD ATI Gfx adaptors
+//**********************************************************************
+Scope(DGPUPCH_SCOPE)
+{
+// OperationRegion (PEGR, PCI_Config, 0, 0x100)
+// Field(PEGR, DWordAcc, Lock, Preserve)
+// {
+// Offset(0x4C),
+// SSID, 32,
+// }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _ON
+//
+// Description: dGPU power ON control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_ON,0,Serialized)
+ {
+ SGON() // OEM Mxm Power On
+
+ //Set the SSID for the ATI MXM
+// Store(MXM_SSVID_DID, SSID)
+
+ //Ask OS to do a PnP rescan
+ Notify(SG_ULT_RP_NUM,0)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _OFF
+//
+// Description: dGPU power OFF control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_OFF,0,Serialized)
+ {
+ SGOF() // OEM Mxm Power On
+
+ //Ask OS to do a PnP rescan
+ Notify(SG_ULT_RP_NUM,0)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _STA
+//
+// Description: Returns curent dGPU power/presence state
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_STA,0,Serialized)
+ {
+ Return(SGST()) // OEM Mxm Power status
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _INI
+//
+// Description: dGPU Init control method. Used to force dGPU _ADR to return proper PCI address
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+// Method (_INI)
+// {
+// should already be set by now...
+//// Store(MXM_SSVID_DID, SSID) //Set the SSID for the ATI MXM
+// Store(0x0, DGPUPCH_SCOPE._ADR) //make sure PEGP address returns 0x00000000
+// }
+
+} // end Scope(DGPUPCH_SCOPE)
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/ATiGDmiscPCH.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/ATiGDmiscPCH.asl
new file mode 100644
index 0000000..6c12f59
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/ATiGDmiscPCH.asl
@@ -0,0 +1,277 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/ATiGDmiscPCH.asl 1 1/15/13 6:02a Joshchou $
+//
+// $Revision: 1 $
+//
+// $Date: 1/15/13 6:02a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/ATiGDmiscPCH.asl $
+//
+// 1 1/15/13 6:02a Joshchou
+// [TAG] EIP107237
+// [Category] Improvement
+// [Description] Create componet for SG support on PCH
+// [Files] SgUltAti.cif
+// AtiSSDTPCH.asl
+// ATdGPUPCH.asl
+// ATiGPUPCH.asl
+// ATiGDmiscPCH.asl
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgAti.cif
+// AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+//
+//
+// 4 3/17/11 6:18p Alexp
+// cleaned up the code.
+//
+// 3 11/12/10 1:25p Alexp
+// Change IDAB method: invoke IGD_SCOPE.IDAB is defined there
+//
+// 2 10/05/10 7:09p Alexp
+// Added debug macro to be able to insert include check points in target
+// ASL code
+//
+// 1 9/17/10 1:20p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgAti.cif;
+// AtiSSDT.asl; ATdGPU.asl;ATiGPU.asl;ATiGDmisc
+//
+// 1 6/08/10 3:45p Alexp
+//
+// 1 6/03/10 2:54p Alexp
+//
+// 4 10/05/09 5:35p Alexp
+// updated asl code for Ati and Nvidia according to Calpella SG BWG 1.1
+//
+// 3 8/20/09 7:08p Alexp
+// upgraded Ati and Nvidia SSDT Asl files to match latest Acpi code drop
+// #68
+//
+// 1 7/16/09 11:17a Alexp
+// Added SG support for AMD ATI Gfx adaptors
+//**********************************************************************
+
+External(DSEN)
+External(IGPU_SCOPE.AINT, MethodObj)
+External(DGPUPCH_SCOPE.DD02)
+External(IGPU_SCOPE.IDAB, MethodObj)
+
+//Do not remove this function.
+Method(IDAB, 0, Serialized)
+{
+ If (CondRefOf(IGPU_SCOPE.IDAB))
+ {
+ IGPU_SCOPE.IDAB()
+ }
+}
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HGAS
+//
+// Description: HG Adaptor select, notify
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HGAS) // HG Adaptor Select
+{
+ // Toggle GFX Adapter.
+ Store(1,IGPU_SCOPE.PXGS)
+ Notify(IGPU_SCOPE,0x81)
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HBRT
+//
+// Description: Send backlight notifications to the DGPU LFP device
+// This is required for Win7 and is backward compatible with Vista
+//
+// Input: Arg0 - 4 - Brightnes Down, 3- Up
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HBRT, 1 , Serialized)
+{
+
+ If(And(4,DSEN)) //Note: DSEN variable is expected to be set by IGD miniport only.
+ {
+ If(LEqual(Arg0,4))
+ {
+ Notify(DGPUPCH_SCOPE.DD02,0x87) //Note: DD02 is hardcoded as the LFP device in intelgfx.asl
+ }
+ If(LEqual(Arg0,3))
+ {
+ Notify(DGPUPCH_SCOPE.DD02,0x86)
+ }
+ }
+
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HPFS
+//
+// Description: Panel Fitting Hot Key
+//
+// Input: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HPFS, 0, Serialized) //Panel Fitting Hot Key
+{
+ If(LNotEqual(IGPU_SCOPE.GSTP,1))
+ {
+
+ //
+ // HG Handling of Panel Fitting Switch
+ //
+ If(LEqual(IGPU_SCOPE.AGXA,0))
+ {
+ IGPU_SCOPE.AINT(2, 0)
+ }
+ Else
+ {
+ Store(1,IGPU_SCOPE.EMDR)
+
+ //
+ // Expansion Mode toggling
+ //
+ If(LEqual(IGPU_SCOPE.EXPM,2))
+ {
+ Store(0,IGPU_SCOPE.EXPM)
+ }
+ Else
+ {
+ Increment(IGPU_SCOPE.EXPM)
+ }
+ Notify(IGPU_SCOPE,0x81)
+ }
+ }
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HNOT
+//
+// Description: Notification handler for Switchable graphics. Called from GNOT()
+//
+// Input: Arg0 = Current event type:
+// 1 = display switch
+// 2 = lid
+// 3 = dock (!!!!!Calpella ref code, Method(GDCK)sends 4 for Dock notifications )
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method (HNOT, 1, Serialized)
+{
+
+ Switch(ToInteger(Arg0))
+ {
+ case(1) //Display Switch event
+ {
+ If(LNotEqual(IGPU_SCOPE.GSTP,1))
+ {
+ //
+ // HG Handling of Display Switch Event
+ //
+ // Muxless?
+ If(LEqual(SGMD,0x2))
+ {
+ If(LEqual(IGPU_SCOPE.AGXA,0))
+ {
+ Notify(IGPU_SCOPE,0x80)
+ }
+
+ If(LEqual(IGPU_SCOPE.AGXA,1))
+ {
+ Notify(DGPUPCH_SCOPE,0x80)
+ }
+ }
+ Else
+ {
+ Store(1,IGPU_SCOPE.DSWR)
+ Notify(IGPU_SCOPE,0x81)
+ }
+ }
+ }
+ case (2) //Lid switch event
+ {
+ // Muxless?
+ If(LEqual(SGMD,0x2))
+ {
+ If(LEqual(IGPU_SCOPE.AGXA,0))
+ {
+ Notify(IGPU_SCOPE,0x80)
+ }
+
+ If(LEqual(IGPU_SCOPE.AGXA,1))
+ {
+ Notify(DGPUPCH_SCOPE,0x80)
+ }
+ }
+ Else
+ {
+ Notify(IGPU_SCOPE,0x80) //Placeholder for LID event
+ }
+ }
+// case (3) //Dock event
+ case (4) //Dock event
+ {
+ // Muxless?
+ If(LEqual(SGMD,0x2))
+ {
+ If(LEqual(IGPU_SCOPE.AGXA,0))
+ {
+ Notify(IGPU_SCOPE,0x80)
+ }
+
+ If(LEqual(IGPU_SCOPE.AGXA,1))
+ {
+ Notify(DGPUPCH_SCOPE,0x80)
+ }
+ }
+ Else
+ {
+ Notify(IGPU_SCOPE,0x80) //Placeholder for handling dock event
+ }
+ }
+ Default
+ {
+ Notify(IGPU_SCOPE,0x80)
+ }
+
+ }
+
+} \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/ATiGPUPCH.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/ATiGPUPCH.asl
new file mode 100644
index 0000000..7f653da
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/ATiGPUPCH.asl
@@ -0,0 +1,1339 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/ATiGPUPCH.asl 5 7/16/13 5:18a Joshchou $
+//
+// $Revision: 5 $
+//
+// $Date: 7/16/13 5:18a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/ATiGPUPCH.asl $
+//
+// 5 7/16/13 5:18a Joshchou
+// [TAG] None
+// [Category] New Feature
+// [Description] Enable falg bit14 of ATPX Function 1 to support
+// MSHybrid.
+//
+// 4 6/05/13 5:13a Joshchou
+//
+// 3 3/21/13 4:42a Joshchou
+// [TAG] EIP105607
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Update for support PX5.6
+//
+// 2 2/21/13 5:46a Joshchou
+// [TAG] EIP107720
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Add ATIF function 15 sample code for reference.
+//
+// 1 1/15/13 6:02a Joshchou
+// [TAG] EIP107237
+// [Category] Improvement
+// [Description] Create componet for SG support on PCH
+// [Files] SgUltAti.cif
+// AtiSSDTPCH.asl
+// ATdGPUPCH.asl
+// ATiGPUPCH.asl
+// ATiGDmiscPCH.asl
+//
+// 3 12/06/11 2:14a Alanlin
+// [TAG] EIP76148
+// [Category] New Feature
+// [Description] PX 5.0 feature updated
+//
+// 2 7/14/11 5:39a Alanlin
+// [TAG] EIP64370
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] Screen can't be displayed after install ATI SG driver
+// [RootCause] ASL method return value is incorrect.
+// [Solution] Return correct value to driver.
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgAti.cif
+// AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+//
+//
+// 5 3/17/11 6:18p Alexp
+// cleaned up the code.
+//
+// 4 1/03/11 12:26p Alexp
+// [TAG] EIP47451
+// [Category] Improvement
+// [Description] fixed checkpoint display in ATRM method
+// [Files] atidgpu.asl
+//
+// 3 11/12/10 1:23p Alexp
+// rename ELCT to ELCL in order to avoid name conflict with Intel's ref
+// code in SgDGPU.asl
+//
+// 2 10/05/10 7:09p Alexp
+// Added debug macro to be able to insert include check points in target
+// ASL code
+//
+// 1 9/17/10 1:20p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgAti.cif;
+// AtiSSDT.asl; ATdGPU.asl;ATiGPU.asl;ATiGDmisc
+//
+// 2 6/08/10 4:21p Alexp
+//
+// 1 6/08/10 3:46p Alexp
+//
+// 1 6/08/10 3:45p Alexp
+//
+// 1 6/03/10 2:56p Alexp
+//
+// 8 4/29/10 11:42a Alexp
+// updated ASL names for Mxm power control and switching from GPIO to
+// functional names. E.g. old- PO16 to new-MRST etc.
+//
+// 7 4/02/10 5:06p Alexp
+// Change per Calpella SG BIOS spec 1.03:
+// - add link control register
+// - add WiDi display
+//
+// 6 12/08/09 10:20a Alexp
+// Per BWG 1.2 Added code to save/restore Endpoint Link Contol Register
+// during power cycle of DGPU
+//
+// 5 10/05/09 5:35p Alexp
+// updated asl code for Ati and Nvidia according to Calpella SG BWG 1.1
+//
+// 4 8/21/09 4:45p Alexp
+// Updated Nvidia and ATI SG code to match latest Intel Calpella Acpi
+// reference code from Intel code drop v#68 and Ati SG BWG
+// SG Asl code. Made PEG PCIe MMIO base address dependent on
+// PCIE_BASE_ADDRESS SDL token. Before it was hardwired in ASL code which
+// caused SG logic to fail in Mxm & SG Label 005
+//
+// 1 7/16/09 11:17a Alexp
+// Added SG support for AMD ATI Gfx adaptors
+//
+//
+//**********************************************************************
+External(\ECON, IntObj) // Embedded Controller Availability Flag.
+External(PCI_SCOPE.LPCB.H_EC.LSTE)
+External(MXD1)
+External(MXD2)
+External(MXD3)
+External(MXD4)
+External(MXD5)
+External(MXD6)
+External(MXD7)
+External(MXD8)
+
+External(NXD1)
+External(NXD2)
+External(NXD3)
+External(NXD4)
+External(NXD5)
+External(NXD6)
+External(NXD7)
+External(NXD8)
+
+External(AMDA)
+External(SGMD)
+External(SGFL)
+External(PXFX)
+External(PXDY)
+External(PXFD)
+
+Scope (IGPU_SCOPE)
+{
+/*
+ Method(_INI,0)
+ {
+// Init all scratch pad fields if not already done so in OpRegion Init
+ }
+*/
+
+//<AMI_SHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: APXM
+//
+// Description: AMD PowerExpress OperationRegion.
+// OpRegion address (AMDA)is defined in IDG Nvs OpRegion
+//
+//-------------------------------------------------------------------------
+//<AMI_SHDR_END>
+ OperationRegion(APXM,SystemMemory,AMDA,0x20400)
+ Field(APXM, AnyAcc, NoLock, Preserve)
+ {
+ // OpRegion Header
+
+ APSG, 0x80, // (000h) Signature-"AMD--PowerXpress".
+ APSZ, 0x20, // (010h) OpRegion Size.
+ APVR, 0x20, // (014h) OpRegion Version.
+
+ // OpRegion Data
+ APXA, 0x20, // PX opregion address
+ RVBS, 0x20, // PX Runtime VBIOS image size
+ NTLE, 0x10, // Total number of toggle list entries
+ TLE1, 0x10, // The display combinations in the list...
+ TLE2, 0x10,
+ TLE3, 0x10,
+ TLE4, 0x10,
+ TLE5, 0x10,
+ TLE6, 0x10,
+ TLE7, 0x10,
+ TLE8, 0x10,
+ TLE9, 0x10,
+ TL10, 0x10,
+ TL11, 0x10,
+ TL12, 0x10,
+ TL13, 0x10,
+ TL14, 0x10,
+ TL15, 0x10,
+ TGXA, 0x10, // Target GFX adapter as notified by ATPX function 5
+ AGXA, 0x10, // Active GFX adapter as notified by ATPX function 6
+ GSTP, 0x08, // GPU switch transition in progress
+ DSWR, 0x08, // Display switch request
+ SPSR, 0x08, // System power source change request
+ DCFR, 0x08, // Display configuration change request
+ EMDR, 0x08, // Expansion mode change request
+ PXGS, 0x08, // PowerXpress graphics switch toggle request
+ CACD, 0x10, // Currently active displays
+ CCND, 0x10, // Currently connected displays
+ NACD, 0x10, // Next active displays
+ EXPM, 0x08, // Expansion Mode
+ TLSN, 0x10, // Toggle list sequence index
+ ELCL, 0x10, // Endpoint Link Contol Register Value
+ // for ATRM (_ROM equivalent) data
+ RBF1, 0x40000, // 0x8000 bytes in bits
+ RBF2, 0x40000, // 0x8000 bytes in bits
+ RBF3, 0x40000, // 0x8000 bytes in bits
+ RBF4, 0x40000 // 0x8000 bytes in bits
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: ADPM
+//
+// Description: ADPM -> ATPX Fn 8 Digital port mux mode
+//
+// Input:
+// Arg0 : Integer User selected option (via., setup 0 -> Shared, 1 -> iGPU Only, 2 -> dGPU Only)
+// Arg1 : 1 -> iGPU connector record, 2->dgpu connector record
+//
+// Output:
+// Flag value for ATPX Fn 8.
+// Bit0-> display can be driven by the GPU
+// Bit1-> HPD can be detected by the GPU
+// Bit2-> AUX/DDC can be driven by the GPU
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(ADPM, 2, Serialized)
+ {
+ Store(0, Local1)
+
+ // AUX/DDC Mux settings
+ ShiftRight(Arg0, 16, Local0)
+
+ if(LEqual(Arg1, 1)) // If iGPU connector record
+ {
+ Or (And(Local0, 0x1), Local1, Local1)
+ }
+ else // If dGPU connector record
+ {
+ Or (ShiftRight(And(Local0, 0x2),1), Local1, Local1)
+ }
+ ShiftLeft(Local1, 1, Local1)
+
+
+ // HPD Mux settings
+ ShiftRight(Arg0, 24, Local0)
+
+ if(LEqual(Arg1, 1)) // If iGPU connector record
+ {
+ Or (And(Local0, 0x1), Local1, Local1)
+ }
+ else // If dGPU connector record
+ {
+ Or (ShiftRight(And(Local0, 0x2),1), Local1, Local1)
+ }
+ ShiftLeft(Local1, 1, Local1)
+
+
+ // Display Mux settings
+ ShiftRight(Arg0, 8, Local0)
+
+ if(LEqual(Arg1, 1)) // If iGPU connector record
+ {
+ Or (And(Local0, 0x1), Local1, Local1)
+ }
+ else // If dGPU connector record
+ {
+ Or (ShiftRight(And(Local0, 0x2),1), Local1, Local1)
+ }
+
+ Return (Local1)
+
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: ATPX
+//
+// Description: ATI PowerXpress (PX) Contrl Method: Revision 0.19
+// PX specific Control Method used by integrated graphics
+// or discrete graphics driver on PX enabled platforms.
+//
+// Input:
+// Arg0: Integer Function code.
+// Arg1: Buffer Parameter buffer, 256 bytes
+//
+// Output:
+// Returns Buffer 256 bytes
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(ATPX,2,Serialized)
+ {
+ P8DB(0xA1, Arg0, 2000)
+ //
+ // Function 0: Verify PowerXpress Interface
+ //
+ // Returns the PX interface version and
+ // functions supported by PX System BIOS
+ //
+ If(LEqual(Arg0,0))
+ {
+ Name(TMP1,Buffer(256) {0x00})
+ CreateWordField ( TMP1, 0, F0SS)
+ CreateWordField ( TMP1, 2, F0IV)
+ CreateDwordField( TMP1, 4, F0SF)
+
+ Store(0x0008,F0SS)
+ Store(0x0001,F0IV)
+ Store(0x000000BF,F0SF)
+
+ // For Muxless: Support only Fun1, Fun2, Fun5 and Fun6
+ If(LEqual(SGMD,0x2))
+ {
+
+ Store(0x00000033,F0SF)
+/*
+ If (LEqual(PXDY, 0x01)) { // PX Dynamic Mode Switch Enabled
+ And(F0SF, 0xFFFFFFFD, F0SF) // Don't support PX02
+ }
+ If (LAnd(LEqual(PXDY, 0x01), // Support both Dynamic and Fixed PX switch
+ LEqual(PXFX, 0x01))) {
+ Or(F0SF, 0x2, F0SF) // Support PX02
+ }
+*/
+ }
+
+ Return(TMP1)
+ }
+
+ //
+ // Function 1: Get PowerXpress Parameters
+ //
+ // Returns various PX related platform parameters
+ //
+ If(LEqual(Arg0,1))
+ {
+ Name(TMP2,Buffer(256) {0x00})
+ CreateWordField ( TMP2, 0, F1SS)
+ CreateDwordField ( TMP2, 2, F1VM)
+ CreateDwordField( TMP2, 6, F1FG)
+ Store(0x000A,F1SS) //Structure size of return package
+ Store(0x00007FFF,F1VM) // Bit[14:0]Mask used for valid bit fields
+
+ // Bit0: LVDS I2C is accessible to both graphics controllers.
+ // Bit1: CRT1 I2C is accessible to both graphics controllers.
+ // Bit2: DVI1 I2C is accessible to both graphics controllers.
+ // Bit3: CRT1 RGB signals are multiplexed.
+ // Bit4: TV1 signals are multiplexed.
+ // Bit5: DFP1 signals are multiplexed.
+ // Bit6: Indicates that a separate multiplexer control for I2C/Aux/HPD exists.
+ // Bit7: Indicates that a "dynamic" PX scheme is supported.
+ // Bit8: Reserved.
+ // Bit9: Indicates that "fixed" scheme is not supported, if set to one.
+ // Bit10: Indicates that full dGPU power off in gdynamich scheme is supported, if set to one.
+ // Bit11: Indicates that discrete graphics must be powerd on while a monitor is connected to discrete graphics connector,if set to one
+ // Bit12: Indicates that discrete graphics can drive display outpurs(local dGPU displays are supported),if set to one
+ // Bit13: Indicates that long idle detection is disabled ,if set to one
+ // Bit14: Indicates that Windows Blue "Hybrid Graphics" is required(supported),if set to one
+ // Bits[31:15]: Reserved (must be zero).
+
+ // For Muxless: Set BIT7 for dynamic" PX scheme is supported
+ If(LEqual(SGMD,0x2))
+ {
+ Store(0x00000280,F1FG) // BACO Mode under the Dynamic Scheme
+
+ If(LEqual(PXFD,0x1))
+ {
+ Store(0x00005E80,F1FG) // dGPU Power off under the Dynamic Scheme
+ }
+ }
+ Else
+ {
+ // For Muxed: Set BIT6 to Indicates that a separate multiplexer control for I2C/Aux/HPD exists
+ // and is controlled by function 4 (Monitor I2C Control).
+ Store(0x00000040,F1FG) // Actual PX parameters field
+ }
+
+ Return(TMP2)
+ }
+
+ //
+ // Function 2: Power Control
+ //
+ // Powers on/off the discrete graphics
+ //
+ If(LEqual(Arg0,2))
+ {
+ CreateWordField(Arg1,0,FN2S)
+ CreateByteField(Arg1,2,DGPR)
+
+ If(LEqual(DGPR,0)) // Powers off discrete graphics
+ {
+ DGPUPCH_SCOPE._OFF()
+ }
+ If(LEqual(DGPR,1)) // Powers on discrete graphics
+ {
+ DGPUPCH_SCOPE._ON()
+ }
+ Return(0)
+ }
+
+ //
+ // Function 3: Display Multiplexer Control
+ //
+ // Controls display multiplexers
+ //
+ If(LEqual(Arg0,3))
+ {
+ CreateWordField(Arg1,0,FN3S)
+ CreateWordField(Arg1,2,SDMG)
+
+ // Display Multiplexer Control
+ If(LEqual(SDMG,0)) // Switch Display Muxes to iGFX
+ {
+ DGPUPCH_SCOPE.SGPO(DSEL, 0)
+ }
+ If(LEqual(SDMG,1)) // Switch Display Muxes to dGFX
+ {
+ DGPUPCH_SCOPE.SGPO(SSEL, 1)
+ }
+
+ Return(0)
+ }
+
+ //
+ // Function 4: Monitor I2C Control
+ //
+ // Controls monitor I2C lines
+ //
+ If(LEqual(Arg0,4))
+ {
+ CreateWordField(Arg1,0,FN4S)
+ CreateWordField(Arg1,2,SIMG)
+
+ // I2C Multiplexer Control
+ If(LEqual(SIMG,0)) // Switch I2C Muxes to iGFX
+ {
+ DGPUPCH_SCOPE.SGPO(ESEL, 0)
+ }
+ If(LEqual(SIMG,1)) // Switch I2C Muxes to dGFX
+ {
+ DGPUPCH_SCOPE.SGPO(ESEL, 1)
+ }
+
+ Return(0)
+ }
+
+ //
+ // Function 5: Graphics Device Switch Start Notification
+ //
+ // Notifies SBIOS that GFX device switch process has been started
+ //
+ If(LEqual(Arg0,5))
+ {
+ CreateWordField(Arg1,0,FN5S)
+ CreateWordField(Arg1,2,TGFX)
+ Store(TGFX,TGXA)
+ Store(1,GSTP)
+
+ Return(0)
+ }
+
+ //
+ // Function 6: Graphics Device Switch End Notification
+ //
+ // Notifies SBIOS that GFX device switch process has been completed
+ //
+ If(LEqual(Arg0,6))
+ {
+ CreateWordField(Arg1,0,FN6S)
+ CreateWordField(Arg1,2,AGFX)
+ Store(AGFX,AGXA)
+ Store(0,GSTP)
+
+ Return(0)
+ }
+
+ //
+ // Function 8: Get Display Connectors mapping
+ //
+ If(LEqual(Arg0,8))
+ {
+ Name(TMP3,Buffer(256) {
+ 0x0e,0x00, //Number of reported display connectors
+ 0x46,0x00, //Total Connector structure size in bytes (num of structures * structure size)
+ 0x07,0x01,0x00,0x00,0x01, //Connector structure 1 - CRT on iGPU
+ 0x07,0x01,0x01,0x00,0x01, //Connector structure 2 - CRT on dGPU
+ 0x05,0x00,0x00,0x00,0x04, //Connector structure 3 - LFP on iGPU
+ 0x05,0x00,0x01,0x10,0x01, //Connector structure 4 - LFP on dGPU
+
+ // Digital port mapping on EC4
+ //
+ // Intel ATI EC4 output
+ // Port B -> Port B DP
+ // Port C -> Port C HDMI
+ // Port D -> Port D DP
+ //
+
+ 0x07,0x03,0x00,0x00,0x03, //Connector structure 5 - DisplayPort_B on iGPU
+ 0x07,0x03,0x01,0x10,0x02, //Connector structure 6 - DP on dGPU (MXM port B on EC4)
+ 0x07,0x07,0x00,0x01,0x03, //Connector structure 7 - HDMI/DVI dongle on port B
+ 0x07,0x07,0x01,0x10,0x02, //Connector structure 8 - HDMI/DVI dongle on dGPU (MXM port B on EC4)
+ 0x07,0x09,0x00,0x02,0x03, //Connector structure 9 - HDMI_C on iGPU
+ 0x07,0x09,0x01,0x20,0x02, //Connector structure 10 - HDMI on dGPU (MXM port C on EC4)
+ 0x07,0x0a,0x00,0x03,0x03, //Connector structure 11 - DisplayPort_D on iGPU
+ 0x07,0x0a,0x01,0x30,0x02, //Connector structure 12 - DP on dGPU (MXM port B. Not routed to EC4)
+ 0x07,0x0b,0x00,0x04,0x03, //Connector structure 13 - HDMI/DVI dongle on port D
+ 0x07,0x0b,0x01,0x30,0x02, //Connector structure 14 - HDMI/DVI dongle on dGPU (MXM port B. Not routed to EC4)
+ 0x07,0x0C,0x00,0x06,0x03, //Connector structure 15 - Place holder for Intel Wireless Display
+ })
+
+ CreateWordField (TMP3, 0, ATNO)
+ CreateWordField (TMP3, 2, ATSZ)
+
+ //Modify the display, HPD and Aux/DDC flag in the connector structure based on iGPU Digital port setup option
+
+ //Connector structure 3 - LFP on iGPU
+ Store(ADPM(MXD2, 1), Index(TMP3, 14))
+
+ //Connector structure 4 - LFP on dGPU
+ Store(ADPM(MXD2, 1), Index(TMP3, 19))
+
+ //Connector structure 5 - DisplayPort_B on iGPU
+ Store(ADPM(MXD3, 1), Index(TMP3, 24))
+
+ //Connector structure 6 - DP on dGPU
+ Store(ADPM(MXD3, 2), Index(TMP3, 29))
+
+ //Connector structure 7 - HDMI/DVI dongle on port B
+ Store(ADPM(MXD4, 1), Index(TMP3, 34))
+
+ //Connector structure 8 - HDMI/DVI dongle on dGPU
+ Store(ADPM(MXD4, 2), Index(TMP3, 39))
+
+ //Connector structure 9 - HDMI_C on iGPU
+ Store(ADPM(MXD5, 1), Index(TMP3, 44))
+
+ //Connector structure 10 - HDMI on dGPU
+ Store(ADPM(MXD5, 2), Index(TMP3, 49))
+
+ //Connector structure 11 - DisplayPort_D on iGPU
+ Store(ADPM(MXD6, 1), Index(TMP3, 54))
+
+ //Connector structure 12 - DP on dGPU
+ Store(ADPM(MXD6, 2), Index(TMP3, 59))
+
+ //Connector structure 13 - HDMI/DVI dongle on port D
+ Store(ADPM(MXD7, 1), Index(TMP3, 64))
+
+ //Connector structure 14 - HDMI/DVI dongle on dGPU
+ Store(ADPM(MXD7, 2), Index(TMP3, 69))
+
+ If(And(SGFL, 0x01))
+ {
+ Store(Add(ATNO, 0x1), ATNO)
+ Store(Add(ATSZ, 0x5), ATSZ)
+ }
+
+ Return(TMP3)
+ }
+
+ Return(0) //End of ATPX
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: ATRM
+//
+// Description: ATI PowerXpress (PX) get ROM Method: Revision 0.19
+// PX specific Control Method used by discrete graphics driver
+// on PX enabled platforms to get a runtime modified copy of
+// the discrete graphics device ROM data (Video BIOS).
+//
+// Input:
+// Arg0: Integer Offset of the graphics device ROM data
+// Arg1: Integer Size of the buffer to fill in (up to 4K)
+//
+// Output:
+// Buffer Buffer of requested video ROM bytes
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(ATRM,2,Serialized)
+ {
+ Store(Arg0,Local0)
+ Store(Arg1,Local1)
+
+ P8DB(0x44, ShiftRight(Local0, 8), 1000)
+
+ If(LGreater(Local1,0x1000))
+ {
+ Store(0x1000,Local1)
+ }
+ If(LGreater(Local0,0x10000))
+ {
+ Return(Buffer(Local1){0})
+ }
+ If(LGreater(Local0,RVBS))
+ {
+ Return(Buffer(Local1){0})
+ }
+// If (LGreater (Add (Local0, Local1), RVBS))
+// {
+// Store (0x00, Local0)
+// }
+
+ Multiply(Local1,0x08,Local3)
+ Name(ROM1,Buffer(0x8000){0})
+ Name(ROM2,Buffer(Local1){0})
+
+ If(LLess(Local0, 0x8000)){
+ Store(RBF1, ROM1)
+ }
+ ElseIf(LLess(Local0, 0x10000)){
+ Subtract(Local0,0x8000,Local0)
+ Store(RBF2, ROM1)
+ }
+ ElseIf(LLess(Local0, 0x18000)){
+ Subtract(Local0,0x10000,Local0)
+ Store(RBF3, ROM1)
+ }
+ ElseIf(LLess(Local0, 0x20000)){
+ Subtract(Local0,0x18000,Local0)
+ Store(RBF4, ROM1)
+ }
+ Multiply(Local0,0x08,Local2)
+ CreateField(ROM1,Local2,Local3,TMPB)
+ Store(TMPB,ROM2)
+ Return(ROM2)
+
+ }
+ //
+ // INDL : Initialize Global Next active device list.
+ //
+ // Argments : None.
+ //
+ // returns : None.
+ //
+ Method(INDL, 0, Serialized)
+ {
+ Store(0, NXD1)
+ Store(0, NXD2)
+ Store(0, NXD3)
+ Store(0, NXD4)
+ Store(0, NXD5)
+ Store(0, NXD6)
+ Store(0, NXD7)
+ Store(0, NXD8)
+ }
+ //
+ // SNXD -> Set Next active device.
+ //
+ // Arg0 : Display vector of devices that will be activated
+ //
+ // Returns : None.
+ //
+ Method(SNXD, 1, Serialized)
+ {
+ INDL()
+
+ Store(Arg0, Local0)
+ If(And(Local0, ShiftLeft(1, 1))) // 1-> BIT1 CRT1
+ {
+ Store(1, NXD1) // NXD1 -> CRT
+ }
+ If(And(Local0, ShiftLeft(1, 0))) // 0 -> BIT2 LCD1
+ {
+ Store(1, NXD2) // NXD2 -> LCD
+ }
+ If(And(Local0, ShiftLeft(1, 3))) // 3 -> BIT3 DFP1 (DP_B)
+ {
+ Store(1, NXD3) // NXD3 -> Display port B
+ }
+ If(And(Local0, ShiftLeft(1, 7))) // 7 -> BIT7 DFP2 (HDMI_B)
+ {
+ Store(1, NXD4) // NXD4 -> HDMI B
+ }
+ If(And(Local0, ShiftLeft(1, 9))) // 9 -> BIT9 DFP3 (HDMI_C)
+ {
+ Store(1, NXD5) // NXD5 -> HDMI C
+ }
+ If(And(Local0, ShiftLeft(1, 10))) // 10 -> BIT10 DFP4 (DP_D)
+ {
+ Store(1, NXD6) // NXD6 -> Display port D
+ }
+ If(And(Local0, ShiftLeft(1, 11))) // 11 -> BIT11 DFP5 (HDMI_D)
+ {
+ Store(1, NXD7) // NXD7 -> HDMI D
+ }
+
+ //NXD8 is not used since there are only 7 entries in _DOD
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: ATIF
+//
+// Description: ATI GFX Interface.Provides ATI specific GFX functionality on mobile platforms.
+//
+// Input:
+// Arg0: Integer Function code.
+// Arg1: Package Parameter buffer, 256 bytes
+//
+//
+// Output:
+// Returns Buffer, 256 bytes
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(ATIF,2,Serialized)
+ {
+ P8DB(0xAF, Arg0, 2000)
+
+ //
+ // Function 0: Verify Interface
+ //
+ // Returns the interface version and
+ // functions/notifications supported by System BIOS
+ //
+ If(LEqual(Arg0,0))
+ {
+ Name(TMP0,Buffer(256) {0x00})
+ CreateWordField (TMP0, 0, F0SS)
+ CreateWordField (TMP0, 2, F0IV)
+ CreateDwordField (TMP0, 4, F0SN)
+ CreateDwordField (TMP0, 8, F0SF)
+
+ // Size of return structure=12
+ Store(0x000C,F0SS)
+
+ // Interface version
+ Store(0x0001,F0IV)
+
+ // Supported Notifications Mask
+ Store(0x00000041,F0SN) // Display switch request and PowerXpress graphics switch toggle request supported
+// Store(0x00000001,F0SN) //<Overriding as per edited ATIF spec 0.22- only display switch request supported>>
+
+ //Supported Functions Bit Vector
+ Store(0x00000007,F0SF)
+
+ /*
+ // For Muxless: No ATIF Fn supported
+ If(LEqual(SGMD,0x2))
+ {
+ Store(0x00000000,F0SN)
+ Store(0x00000000,F0SF)
+ }
+ */
+ Return(TMP0)
+ }
+
+ //
+ // Function 1: Get System Parameters
+ //
+ // Returns various system parameters
+ //
+ If(LEqual(Arg0,1))
+ {
+ Name(TMP1,Buffer(256) {0x0})
+ CreateWordField (TMP1, 0, F1SS)
+ CreateDwordField (TMP1, 2, F1VF)
+ CreateDwordField (TMP1, 6, F1FG)
+
+ // Size of return structure=10
+ Store(0x000A, F1SS)
+
+ // Valid Fields Mask
+ Store(0x00000003,F1VF)
+
+ // Flags
+ Store(0x00000001,F1FG) // Notify (VGA, 0x81) is used as a general purpose notification
+ Return(TMP1)
+ }
+
+ //
+ // Function 2: Get System BIOS Requests
+ //
+ // Reports pending system BIOS requests
+ //
+ // Invoked whenever driver receives Notify(VGA,0x81) and
+ // the Notify is designated as a general purpose notification
+ // in the function "Get System Parameters"
+ //
+ If(LEqual(Arg0,2))
+ {
+ CreateBitField(PSBR, 0, PDSW) // Display switch request
+ CreateBitField(PSBR, 1, PEXM) // Expansion mode request
+ CreateBitField(PSBR, 2, PTHR) // Thermal state change request
+ CreateBitField(PSBR, 3, PFPS) // Forced power state change request
+ CreateBitField(PSBR, 4, PSPS) // System power state change request
+ CreateBitField(PSBR, 5, PDCC) // Display configuration change request
+ CreateBitField(PSBR, 6, PXPS) // PowerXpress? graphics controller switch request
+ CreateBitField(PSBR, 7, PBRT) // Panel brightness change request //[ODM_Change]2012/08/20 AMD GOP brightness2 WHQL fail.
+ CreateBitField(PSBR, 8, DCSC) // Panel brightness change request //[ODM_Change]2012/08/20 AMD GOP brightness2 WHQL fail.
+
+ CreateWordField(ATIB, 0, SSZE) // Structure size = 12
+ CreateDWordField(ATIB, 2, PSBI) // Pending System BIOS Requests
+ CreateByteField(ATIB, 6, EXPM) // Expansion Mode
+ CreateByteField(ATIB, 7, THRM) // Thermal State: Target Gfx controller
+ CreateByteField(ATIB, 8, THID) // Thermal State: State Id
+ CreateByteField(ATIB, 9, FPWR) // Forced Power State: Target Gfx controller
+ CreateByteField(ATIB, 10, FPID) // Forced Power State: State Id
+ CreateByteField(ATIB, 11, SPWR) // System Power Source
+ CreateByteField (ATIB, 12, BRTL) // Brightness Level //[ODM_Change]2012/08/20 AMD GOP brightness2 WHQL fail.
+
+ Store(13,SSZE)
+ Store(PSBR,PSBI)
+
+ IF(PDSW) {
+ Store(0,PDSW)
+ }
+
+ IF(PEXM) {
+ Store(0,EXPM)
+ Store(0,PEXM)
+ }
+
+ IF(PTHR) {
+ Store(0, THRM)
+ Store(0, THID)
+ Store(0, PTHR)
+ }
+
+ IF(PFPS) {
+ Store(0, PFPS)
+ }
+
+ IF(PSPS) {
+ Store(0, PSPS)
+ }
+
+ IF(PXPS) {
+ Store(0, PXPS)
+ }
+
+ IF(PBRT) {
+ Store(0, PBRT)
+ }
+
+ IF(DCSC) {
+ Store(0, DCSC )
+ }
+
+ Return(ATIB)
+ }
+
+ //
+ // Function 3: Select Active Displays
+ //
+ // Returns displays to be selected in reposnse to
+ // a display switch request notification
+ //
+ If(LEqual(Arg0,3))
+ {
+ Name(TMP3,Buffer(256) {0x0})
+ CreateWordField (TMP3, 0, F3SS)
+ CreateWordField (TMP3, 2, F3SD)
+ CreateWordField(Arg1,0,AI3S)
+ CreateWordField(Arg1,2,SLDS)
+ CreateWordField(Arg1,4,CODS)
+ Store(SLDS,CACD)
+ Store(CODS,CCND)
+
+ If (\ECON)
+ {
+ If(LEqual(PCI_SCOPE.LPCB.H_EC.LSTE,1))
+ {
+ Or(CCND,0x0001,CCND) // ATI does not send LFP as connected when not LFP is not active. This is as per design
+ }
+ }
+
+ // Size of return structure=4
+ Store(0x0004,F3SS)
+
+ // Next Displays to be Selected
+ // Populate next displays based on Currently Connected and Active displays and the Toggle List Index
+ // CCND, CACD, TLSN,
+ Store(CTOI(CACD),TLSN) // Get current toggle index based on currently Active display vector
+ Store(CACD, Local1) // Initialize Local1 to a safe value
+ Store(NTLE, Local0) // Total number of toggle list entries
+ While(Local0)
+ {
+ Store(NATL(TLSN),Local1) // Get the next combination from toggle list into Local1
+
+ If(LNotEqual(Local1, 0)) //If next toggle list entry is not empty, then
+ {
+ If(LEqual(And(Local1,CCND),Local1)) // If entries in the next combination are actually connected..
+ {
+ Store(1,Local0) // Exit since we got the next active list
+ }
+ }
+ Decrement(Local0) // Decrement toggle list sequence counter
+
+ Increment(TLSN) // Increment toggle list number to point to next active list
+ If(LGreater(TLSN, NTLE)) // If sequence index currently points to last entry....
+ {
+ Store(1,TLSN) // Roll-up to the start of the toggle list
+ }
+ }
+ SNXD(Local1) // Set the selected displays as the next active for _DGS
+ Store(Local1,NACD) // The next active toggle list - put it on Opregion
+ Store(NACD,F3SD) // Store it in the return buffer
+ Return(TMP3)
+ }
+
+//<Overriding as per edited ATIF spec 0.22- only Functions 0,1,2,3 supported>
+// //
+// // Function 5: Get TV Standard from CMOS
+// //
+// // Retrieves current TV standard
+// //
+// If(LEqual(Arg0,5))
+// {
+// Name(TMP5,Buffer(256) {0x0})
+// CreateWordField (TMP5, 0, F5SS)
+//
+// // Size of return structure
+// Store(0x0004,F5SS)
+//
+// // TV Standard Encoding Format
+// Store(0x00,Index(TMP5,2))
+//
+// // TV Standard
+// Store(TVSD,Index(TMP5,3))
+//
+// Return(TMP5)
+//
+// }
+ //
+// //
+// // Function 6: Set TV Standard in CMOS
+// //
+// // Records current TV standard in CMOS
+// //
+// If(LEqual(Arg0,6))
+// {
+// Name(TMP6,Buffer(256) {0x0})
+//
+// CreateWordField(Arg1,0,AI6S)
+// CreateByteField(Arg1,2,TSEF)
+// CreateByteField(Arg1,3,TVST)
+//
+// // Records current TV standard in CMOS
+// Store(TVST,TVSD)
+//
+// Return(TMP6)
+//
+// }
+//
+// //
+// // Function 7: Get Panel Expansion Mode from CMOS
+// //
+// // Retrieves built-in panel expansion mode
+// //
+// If(LEqual(Arg0,7))
+// {
+// Name(TMP7,Buffer(256) {0x0})
+// CreateWordField (TMP7, 0 , F7SS)
+//
+// // Size of return structure
+// Store(0x0003,F7SS)
+ //
+// // Expansion Mode
+// Store(EXPM,Index(TMP7,2))
+ //
+// Return(TMP7)
+ //
+// }
+ //
+// //
+// // Function 8: Set Panel Expansion Mode in CMOS
+// //
+// // Records built-in panel expansion mode in CMOS
+// //
+// If(LEqual(Arg0,8))
+// {
+// Name(TMP8,Buffer(256) {0x0})
+ //
+// CreateWordField(Arg1,0,AI8S)
+// CreateByteField(Arg1,2,EMCM)
+ //
+// // Record Expansion Mode in CMOS
+// Store(EMCM,EXPM)
+ //
+// Return(TMP8)
+// }
+ //
+// //
+// // Function 9: Get Selected Displays from CMOS
+// //
+// // Retrieves Selected Displays
+// //
+// If(LEqual(Arg0,9))
+// {
+// Name(TMP9,Buffer(256) {0x0})
+// CreateWordField (TMP5, 0, F9SS)
+// CreateWordField (TMP5, 2, F9SD)
+// CreateWordField (TMP5, 4, F9DV)
+ //
+// // Size of return structure
+// Store(0x0006,F9SS)
+ //
+// // Supported Displays Mask
+// Store(BSPD,F9SD)
+ //
+// // Selected Displays Vector
+// Store(And(BPSD,3),F9DV) // Only LFP, CRT supported by IGD in PX
+ //
+// Return(TMP9)
+// }
+ //
+// //
+// // Function 10: Set Selected Displays in CMOS
+// //
+// // Records Selected Displays in CMOS
+// //
+// If(LEqual(Arg0,0xA))
+// {
+// Name(TMPA,Buffer(256) {0x0})
+ //
+// CreateWordField(Arg1,0,AIAS)
+// CreateWordField(Arg1,2,SDCM)
+ //
+// // Records Selected Displays in CMOS
+// Store(And(SDCM,3),BPSD) // Only LFP, CRT supported by IGD in PX
+ //
+// Return(TMPA)
+// }
+ //
+// //
+// // Function 12: Thermal Change Notification
+// //
+// // GPU temperature threshold related function
+// //
+// If(LEqual(Arg0,0xC))
+// {
+// Name(TMPC,Package() {0xFFFF,0xFFFFFFFF,0xFF,0xFF,0xFF,0xFF})
+//
+// // Size of return structure
+// Store(0x000A,Index(TMPC,0))
+//
+// // Flags
+////<TO DO>check Store(0x00000003,Index(TMPC,1))
+//
+// // High Temperature Threshold
+////<TO DO>check Store(0x00,Index(TMPC,2))
+//
+// // Low Temperature Threshold
+////<TO DO>check Store(0x00,Index(TMPC,3))
+//
+// // Thermal State At High Temperature Threshold
+////<TO DO>check Store(0x00,Index(TMPC,4))
+//
+// // Thermal State At Low Temperature Threshold
+////<TO DO>check Store(0x00,Index(TMPC,5))
+//
+// Return(TMPC)
+// }
+ //
+// //
+// // Function 13: Temperature Change Notification
+// //
+// // GPU temperature threshold related function
+// //
+// If(LEqual(Arg0,0xD))
+// {
+// Name(TMPD,Package() {0xFFFF,0xFFFFFFFF,0xFF,0xFF,0xFF,0xFF})
+// CreateWordField(Arg1,0,AIDS)
+// CreateWordField(Arg1,2,TGCI)
+// CreateByteField(Arg1,4,CGPT)
+ //
+// Return(TMPD)
+// }
+ //
+ // Function 15: Get Graphics Device Types
+ //
+ // This function reports all graphics devices and XGP ports supported by a given platform
+ //
+ If(LEqual(Arg0,0xF))
+ {
+ Name(TMPF,Buffer(256) {0x0})
+ CreateWordField (TMPF, 0, FFND)
+ CreateWordField (TMPF, 2, FFDS)
+ CreateDwordField (TMPF, 4, FFFG)
+ CreateWordField (TMPF, 8, FFBS)
+ CreateWordField (TMPF, 10, FFDV)
+
+
+
+ Return(TMPF)
+ }
+
+
+
+ Return (0)
+ }
+ Name(ATIB, Buffer(0x100){})
+ Name(PSBR, Buffer(0x4){0x00}) // Pending System BIOS Requests. (these get cleared only when function 2 is called)
+ Name(SSPS, 0x00) // Save System Power Source
+ Method(AFN0, 0, Serialized)
+ {
+ CreateBitField(PSBR, 0, PDSW) // Display switch request
+ Store(One, PDSW) // Set the request to pending state
+ Notify(IGPU_SCOPE, 0x81) // Inform the display driver
+ }
+
+
+ Method(AFN4, 1, Serialized) // Arg0: System Power Source
+ {
+ Store(Arg0, Local0)
+ Store(SSPS, Local1)
+ Store(Local0, SSPS)
+ If(LEqual(Local0, Local1))
+ {
+ } Else
+ {
+ CreateBitField(PSBR,0x04,PSPS)
+ Store(One, PSPS)
+ Notify(IGPU_SCOPE, 0x81)
+ }
+ }
+
+ Method(AFN5, 0, Serialized)
+ {
+ CreateBitField(PSBR,0x05,PDCC)
+ Store(One, PDCC)
+ Notify(IGPU_SCOPE, 0x81)
+ }
+
+ Method(AFN6, 0, Serialized)
+ {
+ CreateBitField(PSBR, 6, PXPS) // PowerXpress graphics switch toggle request
+ Store(One, PXPS) // Set the request to pending state
+ Notify(IGPU_SCOPE, 0x81) // Inform the display driver
+ }
+
+ Method(AFN7, 1, Serialized) // Arg0: Panel Brightness: Backlight Level
+ {
+ CreateBitField(PSBR, 7, PBRT) // Brightness level change request
+ Store(One, PBRT) // Pending brightness level request
+
+ CreateByteField(ATIB, 12, BRTL) // Brightness Level
+ Store(Arg0, BRTL) // Brightness level
+ Notify(IGPU_SCOPE, 0x81)
+ }
+
+ Method(AFN8, 0, Serialized)
+ {
+ CreateBitField(PSBR, 8, DCSC) // Discrete GPU display connect state change request
+ Store(One, DCSC) // Pending brightness level request
+ Notify(IGPU_SCOPE, 0x81)
+ }
+
+ Method(CTOI,1)
+ {
+ If(LNotEqual(NTLE, Zero))
+ {
+ If(LEqual(TLE1, Arg0))
+ {
+ Return(1)
+ }
+ If(LEqual(TLE2, Arg0))
+ {
+ Return(2)
+ }
+ If(LEqual(TLE3, Arg0))
+ {
+ Return(3)
+ }
+ If(LEqual(TLE4, Arg0))
+ {
+ Return(4)
+ }
+ If(LEqual(TLE5, Arg0))
+ {
+ Return(5)
+ }
+ If(LEqual(TLE6, Arg0))
+ {
+ Return(6)
+ }
+ If(LEqual(TLE7, Arg0))
+ {
+ Return(7)
+ }
+ If(LEqual(TLE8, Arg0))
+ {
+ Return(8)
+ }
+ If(LEqual(TLE9, Arg0))
+ {
+ Return(9)
+ }
+ If(LEqual(TL10, Arg0))
+ {
+ Return(10)
+ }
+ If(LEqual(TL11, Arg0))
+ {
+ Return(11)
+ }
+ If(LEqual(TL12, Arg0))
+ {
+ Return(12)
+ }
+ If(LEqual(TL13, Arg0))
+ {
+ Return(13)
+ }
+ If(LEqual(TL14, Arg0))
+ {
+ Return(14)
+ }
+ If(LEqual(TL15, Arg0))
+ {
+ Return(15)
+ }
+ }
+ Return(1) //If no match, then set TLSN to 1
+ }
+
+ Method(NATL,1)
+ {
+ If(LNotEqual(NTLE, Zero))
+ {
+ If(LEqual(Arg0,1))
+ {
+ Return(TLE2)
+ }
+ If(LEqual(Arg0,2))
+ {
+ Return(TLE3)
+ }
+ If(LEqual(Arg0,3))
+ {
+ Return(TLE4)
+ }
+ If(LEqual(Arg0,4))
+ {
+ Return(TLE5)
+ }
+ If(LEqual(Arg0,5))
+ {
+ Return(TLE6)
+ }
+ If(LEqual(Arg0,6))
+ {
+ Return(TLE7)
+ }
+ If(LEqual(Arg0,7))
+ {
+ Return(TLE8)
+ }
+ If(LEqual(Arg0,8))
+ {
+ Return(TLE9)
+ }
+ If(LEqual(Arg0,9))
+ {
+ Return(TL10)
+ }
+ If(LEqual(Arg0,10))
+ {
+ Return(TL11)
+ }
+ If(LEqual(Arg0,11))
+ {
+ Return(TL12)
+ }
+ If(LEqual(Arg0,12))
+ {
+ Return(TL13)
+ }
+ If(LEqual(Arg0,13))
+ {
+ Return(TL14)
+ }
+ If(LEqual(Arg0,14))
+ {
+ Return(TL15)
+ }
+ If(LEqual(Arg0,15))
+ {
+ Return(TLE1)
+ }
+ }
+ Return(0)
+ }
+} // end PCI0.GFX0 scope
+
+
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/AtiSSDTPCH.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/AtiSSDTPCH.asl
new file mode 100644
index 0000000..5a2939c
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/AtiSSDTPCH.asl
@@ -0,0 +1,145 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/AtiSSDTPCH.asl 2 7/16/13 5:15a Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 7/16/13 5:15a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/AtiSSDTPCH.asl $
+//
+// 2 7/16/13 5:15a Joshchou
+// [TAG] None
+// [Category] New Feature
+// [Description] Add _DSW method to support MSHybrid.
+//
+// 1 1/15/13 6:02a Joshchou
+// [TAG] EIP107237
+// [Category] Improvement
+// [Description] Create componet for SG support on PCH
+// [Files] SgUltAti.cif
+// AtiSSDTPCH.asl
+// ATdGPUPCH.asl
+// ATiGPUPCH.asl
+// ATiGDmiscPCH.asl
+//
+// 2 12/22/11 6:36a Alanlin
+// Declared "defined(SGTPV_ASL_DEBUG) && (SGTPV_ASL_DEBUG ==1)"
+//
+// 1 6/27/11 5:26a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgAti.cif
+// AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+//
+//
+// 3 11/12/10 1:22p Alexp
+// include "token.h" inside the command line to CL preprocessor in
+// SgAcpiTable.mak
+//
+// 2 10/05/10 7:09p Alexp
+// Added debug macro to be able to insert include check points in target
+// ASL code
+//
+// 1 9/17/10 1:20p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgAti.cif;
+// AtiSSDT.asl; ATdGPU.asl;ATiGPU.asl;ATiGDmisc
+//
+// 1 6/08/10 3:45p Alexp
+//
+// 1 6/03/10 2:56p Alexp
+//
+// 1 7/16/09 11:17a Alexp
+// Added SG support for AMD ATI Gfx adaptors
+//
+//
+//**********************************************************************
+
+DefinitionBlock (
+ "Amd.aml",
+ "SSDT",
+ 1,
+ "AmdRef",
+ "AmdTabl",
+ 0x1000
+ ){
+
+External(P8XH, MethodObj)
+#if defined(SGTPV_ASL_DEBUG) && (SGTPV_ASL_DEBUG ==1)
+#define P8DB(arg0, arg1, arg2) P8XH (0, arg1) P8XH (1, arg0) sleep(arg2)
+#else
+#define P8DB(arg0, arg1, arg2)
+#endif
+
+External(PCI_SCOPE, DeviceObj)
+External(SG_ULT_RP_NUM, DeviceObj)
+External(DGPUPCH_SCOPE, DeviceObj)
+External(IGPU_SCOPE, DeviceObj)
+External(DGPUPCH_SCOPE._ADR, DeviceObj)
+External(DGPUPCH_SCOPE.SGST, MethodObj)
+External(DGPUPCH_SCOPE.SGON, MethodObj)
+External(DGPUPCH_SCOPE.SGOF, MethodObj)
+External(DGPUPCH_SCOPE.SGPI, MethodObj)
+External(DGPUPCH_SCOPE.SGPO, MethodObj)
+External(\DSEL)
+External(\ESEL)
+External(\SSEL)
+External(\PSEL)
+External(\HLRS)
+External(\PWEN)
+
+
+#include <ATdGPUPCH.ASL> // Include dGPU device namespace
+#include <ATiGPUPCH.ASL> // Include IGD _DSM and AMD ATIF/ATPM/ATRM methods
+#include <ATiGDmiscPCH.ASL> // Include misc event callback methods
+
+Scope(SG_ULT_RP_NUM)
+{
+ Method(_DSW, 3, NotSerialized)
+ {
+ If(Arg1)
+ {
+ Store("RP05 -_DSW call ", Debug)
+ }
+ Else
+ {
+ If(LAnd(Arg0, Arg2))
+ {
+ Store("RP05 -_DSW call-1 ", Debug)
+ }
+ Else
+ {
+ Store("RP05 -_DSW call-2 ", Debug)
+ }
+ }
+ }
+}
+
+} // end SSDT
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NVdGPUPCH.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NVdGPUPCH.asl
new file mode 100644
index 0000000..74a28b4
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NVdGPUPCH.asl
@@ -0,0 +1,621 @@
+//Endpoint PCIe Base Address.
+External(EBAS)
+External(NVHA)
+
+#ifdef OPTIMUS_DSM_GUID
+Scope(PCI_SCOPE){
+
+ Name(OTM, "OTMACPI 2010-Mar-09 12:08:26") // OTMACPIP build time stamp.
+} // end of Scope
+#endif
+
+Scope(DGPUPCH_SCOPE)
+{
+
+//<AMI_SHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: PCI2
+//
+// Description: For save/store PCIE NV PCI register from 0 to 256 byte by Dword access while do _ON & OFF
+//
+//-------------------------------------------------------------------------
+//<AMI_SHDR_END>
+ OperationRegion (PCI2, SystemMemory, EBAS, 0x500)
+ Field(PCI2, DWordAcc, Lock, Preserve)
+ {
+ Offset(0x4),
+ CMDR, 8,
+ VGAR, 2000,
+ Offset(0x48B),
+ , 1,
+ NHDA, 1,
+ }
+ Name(VGAB, Buffer(0xFA)
+ {
+ 0x00
+ })
+ Name(GPRF, Zero)
+
+//<AMI_SHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: NVHM
+//
+// Description: Nvidia NVHG (dGPU) OperationRegion
+// OpRegion address (NVHA)is defined in IDG Nvs OpRegion
+//
+//-------------------------------------------------------------------------
+//<AMI_SHDR_END>
+ OperationRegion(NVHM,SystemMemory, NVHA, 0x20400)
+ Field(NVHM, DWordAcc, NoLock, Preserve)
+ {
+ // OpRegion Header
+
+ NVSG, 0x80, // (000h) Signature-"NVSG".
+ NVSZ, 0x20, // (010h) OpRegion Size in KB.
+ NVVR, 0x20, // (014h) OpRegion Version.
+
+ // NVHG data
+
+ NVHO, 0x20, // (018h)NVHM opregion address
+ RVBS, 0x20, // (01Ch)NVIDIA VBIOS image size
+ // (020h)for _ROM
+ RBF1, 0x40000, // 0x8000 bytes in bits
+ RBF2, 0x40000, // 0x8000 bytes in bits
+ RBF3, 0x40000, // 0x8000 bytes in bits
+ RBF4, 0x40000, // 0x8000 bytes in bits
+ MXML, 0x20, // Mxm3 buffer length
+#if MXM30_SUPPORT
+ MXM3, MXM_ROM_MAX_SIZE_bits // MXM 3.0 Data buffer
+#else
+ MXM3, 0x640 // MXM 3.0 Data buffer
+#endif
+
+ }
+
+ Name(OPCE, 2) // Optimus Power-Control ENABLE
+ // 2: The platform should not power down the GPU subsystem
+ // in the _PS3 method (Default)
+ // 3: The platform should power down the GPU subsystem
+ // at the end of the _PS3 ACPI method
+
+ Name(DGPS, Zero)// Power State. dummy control field. Can be a GPIO in EC or PCH
+
+#ifdef OPTIMUS_DSM_GUID
+
+//If dGPU power control is available....
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _PSC
+//
+// Description: Curent dGPU power state, 0-D0, 3-D3, etc.
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Name(_PSC, Zero)
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _PS0
+//
+// Description: dGPU power ON control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(_PS0, 0, NotSerialized)
+ {
+ P8DB(0xB0, OPCE, 2000)
+ Store(Zero, _PSC)
+ If(LNotEqual(DGPS, Zero))
+ {
+ _ON() // with Optimus w/a
+ Store(Zero, DGPS)
+ }
+ Store(0x0,NHDA) //NV HDMI audio did not need enable
+ }
+
+ Method(_PS1, 0x0, NotSerialized)
+ {
+ Store(One, _PSC)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _PS3
+//
+// Description: dGPU power OFF control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(_PS3, 0, NotSerialized)
+ {
+ P8DB(0xB3, OPCE, 2000)
+ If(LEqual(OPCE, 0x3))
+ {
+ If(LEqual(DGPS, Zero))
+ {
+ _OFF() // w Optimus w/a
+ Store(One, DGPS)
+ }
+ Store(0x2, OPCE) // Reset NV GPU power down flag
+ }
+ Store(0x3, _PSC)
+ }
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _STA
+//
+// Description: dGPU power status.
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_STA,0x0)
+ {
+ Return(0x0F) // Always return DGPU is powered-ON
+ }
+
+#endif // OPTIMUS_DSM_GUID
+
+#if HYBRID_DSM_GUID || MXM_DSM_GUID
+// NON-OPTIMUS mode - MUXed
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _IRC
+//
+// Description: In-rush current
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+// Name(_IRC, 0)
+ Method(_IRC,0,Serialized)
+ {
+ Return(0x00)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _ON
+//
+// Description: dGPU power ON control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_ON,0,Serialized)
+ {
+ SGON() // OEM Mxm Power On
+ //Ask OS to do a PnP rescan
+ Notify(SG_ULT_RP_NUM,0)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _OFF
+//
+// Description: dGPU power OFF control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_OFF,0,Serialized)
+ {
+ SGOF() // OEM Mxm Power On
+
+ //Ask OS to do a PnP rescan
+ Notify(SG_ULT_RP_NUM,0)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _STA
+//
+// Description: Returns curent dGPU power/presence state
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_STA,0,Serialized)
+ {
+ Return(SGST()) // OEM Mxm Power status
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: MXMX
+//
+// Description: Display DDC Mux Control
+//
+// Input:
+// Arg0: Get/Set DDC/Aux Mux State
+// 0- Acquire DDC/Aux Mux on this GPU
+// 1- Release Mux from this GPU
+// 2- Get Mux state
+//
+// Output:
+// 0, Not Acquired.
+// if Arg0 = 0 or 1, Non-Zero return indicates success acquiring MUX
+// (and MUX has switched to this output)
+// if Arg0 = 2, Non-Zero return indicates MUX is currently set to this output
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method (MXMX, 1, Serialized)
+ {
+ P8DB(0x99, Arg0, 2000)
+
+ If (LEqual (Arg0, 0))
+ {
+
+ //Acquire DDC/AUX mux
+ // No mutex implemented. No need to acquire mutex.
+ // Set mux to dGPU
+// SGPO(DSEL, 1)// dGPU_SELECT#
+ SGPO(ESEL, 1)// use EDID_SELECT# as Mutex flag
+ Return(1)
+ }
+
+ If (LEqual (Arg0, 1))
+ {
+
+ //Release DDC/AUX mux
+ // No mutex implemented. No need to release mutex.
+ // 2-way mux. Hence no need to do anything
+ Return(0x1)
+
+ }
+
+ If (LEqual (Arg0, 2))
+ {
+
+ //Get ddc/aux mux status for dGPU
+ Return(SGPI(ESEL))
+ }
+
+ Return(0x0) // mutex not acquired
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: MXDS
+//
+// Description: Display output MUX control
+//
+// Input:
+// Arg0:
+// 0 - Get Mux state
+// 1 - Set Display to active on this GPU
+// 2 - Set Backlight control to active on this GPU
+// 3 - Set Display & Backlight to active on this GPU
+//
+// Output:
+// If Arg0 = 0, Error = Display is not MUXed
+// Else return value of the state of the MUX
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(MXDS, 1, Serialized)
+ {
+ P8DB(0x9A, Arg0, 2000)
+
+ If(LEqual (Arg0, 0))
+ {
+ //Get display mux status for dGPU
+ return(SGPI(DSEL))
+ } else
+// If(LOr(LEqual (Arg0, 1), LEqual (Arg0, 2)))
+ {
+ //Set display mux to dgpu
+ SGPO(DSEL, 1) // dGPU_SELECT
+ SGPO(PSEL, 1) // dGPU_PWM_SELECT
+ }
+
+ Return (0)
+ }
+#endif // MXM && HYBRID
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _ROM
+//
+// Description: Video ROM data buffer
+//
+// Input:
+// Arg0: Integer Offset of the graphics device ROM data
+// Arg1: Integer Size of the buffer to fill in (up to 4K)
+//
+// Output:
+// Buffer Buffer of requested video ROM bytes
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_ROM,2)
+ {
+
+ Store (Arg0, Local0)
+ Store (Arg1, Local1)
+
+ P8DB(0x44, Local1, 100)
+
+
+ If (LGreater (Local1, 0x1000))
+ {
+ Store (0x1000, Local1)
+ }
+ If (LGreater (Local0, 0x20000))
+ {
+ Return(Buffer(Local1){0})
+ }
+
+
+ Multiply (Local1, 0x08, Local3)
+ Name (ROM1, Buffer (0x8000) {0})
+ Name (ROM2, Buffer (Local1) {0})
+
+ If(LLess(Local0, 0x8000)){
+ Store(RBF1, ROM1)
+ }
+ ElseIf(LLess(Local0, 0x10000)){
+ Subtract(Local0,0x8000,Local0)
+ Store(RBF2, ROM1)
+ }
+ ElseIf(LLess(Local0, 0x18000)){
+ Subtract(Local0,0x10000,Local0)
+ Store(RBF3, ROM1)
+ }
+ ElseIf(LLess(Local0, 0x20000)){
+ Subtract(Local0,0x18000,Local0)
+ Store(RBF4, ROM1)
+ }
+
+ Multiply (Local0, 0x08, Local2)
+ CreateField (ROM1, Local2, Local3, TMPB)
+ Store (TMPB, ROM2)
+ Return (ROM2)
+ }
+
+//
+// Check for Nvidia _DSM UUIDs
+//
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HDSM
+//
+// Description: Device Specific Methods for Hybrid dGPU (may be invoked from iGD as well)
+// Implements Mxm and SG specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// nVidia
+// MXM dGPU GUID :9D95A0A0-0060-4D48-B34D-7E5FEA129FD4
+//
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(HDSM, 4, SERIALIZED)
+ {
+
+#ifdef MXM_DSM_GUID
+
+ If(LEqual(Arg0, ToUUID("4004A400-917D-4cf2-B89C-79B62FD55665")))
+ {
+
+ P8DB(0xEE, Arg2, 1000)
+
+ Switch(ToInteger(Arg2))
+ {
+ //
+ // Function 0: MXM_FUNC_MXSS
+ //
+ case (0)
+ {
+ //Sub-Functions 0,16,24 are supported
+ Return(ToBuffer(0x01010001))
+ }
+
+ //
+ // Function 24: MXM_FUNC_MXMI
+ //
+ case (24)
+ {
+ Return(ToBuffer(0x300)) // MXM 1.101 defines revision as 0x300
+ // Return(ToBuffer(0x30)) // MXM 1.101 defines revision as 0x300
+ }
+
+ //
+ // Function 16: MXM_FUNC_MXMS
+ //
+ case (16)
+ {
+ If(LEqual (Arg1, 0x300)) // MXM 1.101 defines revision as 0x300
+ {
+#if MXM30_SUPPORT
+ // calculate true length of MXM block
+ CreateWordField(MXM3, 6, MXLN)
+ Add(MXLN, 8, Local0) // Add length of MXM header
+ CreateField(MXM3, 0, Local0, MXM)
+ Return(ToBuffer(MXM))
+#else
+ // ElkCreek 4 Mxm data structure
+ Name(MXM3, Buffer()
+ {
+ 0x4d, 0x58, 0x4d, 0x5f, 0x03, 0x00, 0x5d, 0x00,
+ 0x30, 0x11, 0xb8, 0xff, 0xf9, 0x3e, 0x00, 0x00,
+ 0x00, 0x00, 0x0a, 0xf0, 0xf9, 0x3e, 0x00, 0x00,
+ 0x60, 0xe9, 0xd0, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x60, 0x6a, 0xda, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x20, 0x2b, 0xe2, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x60, 0x6c, 0xea, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x20, 0x6a, 0xda, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x20, 0x6c, 0xea, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x01, 0x90, 0x01, 0x00, 0x03, 0x00, 0x90, 0x01,
+ 0x13, 0x00, 0x90, 0x01, 0xe5, 0x0d, 0x01, 0x01,
+ 0x01, 0x00, 0x00, 0x00, 0xe5, 0x0d, 0x01, 0x03,
+ 0x00, 0x90, 0xd8, 0x09, 0x11, 0x0a
+ })
+ Return(MXM3)
+#endif
+ }
+ }
+ } // switch
+ Return(0x80000002) //MXM_ERROR_UNSUPPORTED - FunctionCode or SubfunctionCode not supported
+ } // "4004A400-917D-4cf2-B89C-79B62FD55665"
+
+#endif // MXM_DSM_GUID
+
+ Return (0x80000001) //MXM_ERROR_UNSPECIFIED
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _DSM Device Specific Method for dGPU device
+//
+// Description: Implement Mxm and SG specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// MXM dGPU GUID :9D95A0A0-0060-4D48-B34D-7E5FEA129FD4
+// NBCI GUID :D4A50B75-65C7-46F7-BfB7-41514CEA0244
+// Ventura GUID :95DB88FD-940A-4253-A446-70CE0504AEDF
+// Optimus DSM_GUID :A486D8F8-0BDA-471B-A72B-6042A6B5BEE0
+//
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_DSM,4,SERIALIZED)
+ {
+ CreateByteField (Arg0, 3, GUID)
+ P8DB(0xDD, GUID, 1000)
+ //
+ // Check for Nvidia _DSM UUIDs
+ //
+ // common _DSM for dGPU and iGPU: NBCI, SG DSM, Ventura
+ return(IGPU_SCOPE.HDSM(Arg0, Arg1, Arg2, Arg3))
+ }
+
+
+#ifdef OPTIMUS_DSM_GUID
+
+
+// TEST !!! TEST !!! TEST !!!!
+// NvOptimus should not be be using _ON and _OFF methods for power cycling
+// Used here for testing with Intel ElkCreek Mxm interposer
+//
+ Name(CTXT, Zero)// Save Context flag
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _ON
+//
+// Description: Optimus w/a for before dGPU _ON
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(_ON, 0, Serialized)
+ {
+ P8DB(0x01, 0x11, 2000)
+
+ // OEM Mxm Power status
+ SGON()
+
+// Nvidia Optimus driver w/a. Restore saved PCI context of PEG Video card
+// Skip restore resource if GPRF = 1
+ If(LNotEqual(GPRF, One))
+ {
+ Store(CMDR,local0)
+ Store(Zero, CMDR)
+ Store(VGAB, VGAR)
+ Store(0x06, CMDR)
+ Store(0x0,NHDA) //NV HDMI audio did not need enable
+ Store(local0,CMDR)
+ }
+
+// Store(1, RETR) // retrain PCI-E bus
+//+<
+// doesn't look like we need delay here...
+// Sleep(0x64)
+
+ Store(SWSMI_NVOEM_CMOS_R, SSMP) // Read CMOS:AudioCodec flag to AcpiNvs:SGFL
+// Clear HDA enable bit if flag not set
+/* if(LEqual(And(SGFL, 2), 0))
+ {
+ Store(0, NHDM)
+ }
+*/
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _OFF
+//
+// Description: Optimus w/a before dGPU _OFF
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(_OFF, 0, Serialized)
+ {
+
+ P8DB(0x0F, 0xFF, 2000)
+
+// store PCI context only once
+ If(LEqual(CTXT, Zero))
+ {
+// Nvidia Optimus driver w/a. Save PCI context of PEG Video card
+ //+ for GC6 , need to de-assert EC FB_CLAMP
+
+ //-
+ // Skip restore resource if GPRF = 1
+ If(LNotEqual(GPRF, One))
+ {
+ Store(VGAR, VGAB)
+
+ }
+//+<
+ Store(1, CTXT)
+ }
+ SGOF()
+
+ }
+#endif
+} // end Scope(DGPUPCH_SCOPE)
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NViGDmiscPCH.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NViGDmiscPCH.asl
new file mode 100644
index 0000000..b642537
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NViGDmiscPCH.asl
@@ -0,0 +1,280 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/NViGDmiscPCH.asl 1 1/15/13 6:03a Joshchou $
+//
+// $Revision: 1 $
+//
+// $Date: 1/15/13 6:03a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/NViGDmiscPCH.asl $
+//
+// 1 1/15/13 6:03a Joshchou
+// [TAG] EIP107237
+// [Category] Improvement
+// [Description] Create componet for SG support on PCH
+// [Files] SgUltNvidia.cif
+// NVdGPUPCH.asl
+// NViGPUPCH.asl
+// NViGDmiscPCH.asl
+// OpSSDTPCH.asl
+// NvVenturaPCH.asl
+// NvGPSPCH.asl
+// NvSSDTPCH.asl
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+//
+//
+// 4 11/12/10 1:27p Alexp
+// Change IDAB method: invoke IGD_SCOPE.IDAB is it's defined
+//
+// 3 10/08/10 12:04p Alexp
+// code clean up: removed unused externs
+//
+// 2 10/05/10 7:14p Alexp
+// 1. Added debug macro to be able to insert check points in target ASL
+// code
+// 2. Reuse NVdGPU.asl file to build OpSSDT for Optimus and NvSSDT for
+// MUXed SG targets.
+// NvOptimus.asl no longer required
+//
+// 1 9/17/10 1:21p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgNvidia.cif;
+// NvSSDT.asl; NVdGPU.asl;NViGPU.asl;NViGDmisc
+// OpSSDT.asl;NvOptimus.asl;NvVenture.asl
+//
+// 1 6/08/10 3:45p Alexp
+//
+// 1 6/03/10 2:54p Alexp
+//
+// 6 10/05/09 5:35p Alexp
+// updated asl code for Ati and Nvidia according to Calpella SG BWG 1.1
+//
+// 5 8/20/09 7:08p Alexp
+// upgraded Ati and Nvidia SSDT Asl files to match latest Acpi code drop
+// #68
+//
+// 4 8/10/09 4:21p Alexp
+// changed with latest reference code from Intel MPG. not yet tested
+//
+// 3 7/16/09 11:17a Alexp
+// Added SG support for AMD ATI Gfx adaptors
+//
+//
+//**********************************************************************
+
+External(DSEN)
+External(IGPU_SCOPE.CDCK)
+External(DGPUPCH_SCOPE.DD02)
+External(IGPU_SCOPE.IDAB, MethodObj)
+
+//Do not remove this function.
+Method(IDAB, 0, Serialized)
+{
+ If (CondRefOf(IGPU_SCOPE.IDAB))
+ {
+ IGPU_SCOPE.IDAB()
+ }
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HGAS
+//
+// Description: HG Adaptor select, notify
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HGAS) //HG Adaptor select
+{
+ //Stateless button/Hotkey supporting 3 states - Power Saver, Adaptive and Perf
+
+ Increment(IGPU_SCOPE.GPSS)
+ Mod(IGPU_SCOPE.GPSS, 3, IGPU_SCOPE.GPSS)
+
+ Store(1,IGPU_SCOPE.GPPO)
+ Store(1,IGPU_SCOPE.SGNC) //indicate 'policy select' change
+
+ Notify(IGPU_SCOPE, 0xD0)
+ Notify(PCI_SCOPE.WMI1, 0xD0) // Mirror Notify on WMI1
+
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HBRT
+//
+// Description: Send backlight notifications to the DGPU LFP device
+// This is required for Win7 and is backward compatible with Vista
+//
+// Input: Arg0 - 4 - Brightnes Down, 3- Up
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HBRT, 1 , Serialized)
+{
+ Store(Arg0,IGPU_SCOPE.DACE)
+
+ If(And(4,DSEN)) //Note: DSEN variable is expected to be set by IGD miniport only.
+ {
+ If(LEqual(Arg0,4))
+ {
+ Notify(DGPUPCH_SCOPE.DD02,0x87) //Note: DD02 is hardcoded as the LFP device in intelgfx.asl
+ }
+ If(LEqual(Arg0,3))
+ {
+ Notify(DGPUPCH_SCOPE.DD02,0x86)
+ }
+ }
+
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HPFS
+//
+// Description: Panel Fitting Hot Key
+//
+// Input: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HPFS, 0, Serialized) //Panel Fitting Hot Key
+{
+ //
+ // HG Handling of Panel Fitting Switch
+ //
+
+ Store(5,IGPU_SCOPE.DACE) // Indicate display scaling hot key event
+ Store(2,IGPU_SCOPE.SGNC) // Indicate platpolicy change
+
+ //
+ // Expansion Mode toggling
+ //
+ Increment(IGPU_SCOPE.GPSP)
+ Mod(IGPU_SCOPE.GPSP, 4 , IGPU_SCOPE.GPSP)
+
+ Notify(IGPU_SCOPE,0xDC)
+
+}
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HNOT
+//
+// Description: Notification handler for Switchable graphics. Called from GNOT()
+//
+// Input: Arg0 = Current event type:
+// 1 = display switch
+// 2 = lid
+// 3 = dock (!!!!!Acpi ref code, Method(GDCK)sends 4 for Dock notifications )
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method (HNOT, 1, Serialized)
+{
+ Switch(ToInteger(Arg0))
+ {
+ case(1) //Display Switch event
+ {
+ Store(3,IGPU_SCOPE.SGNC) // indicate 'Displaystatus' change
+ Store(1,IGPU_SCOPE.DACE)
+ Notify(IGPU_SCOPE, 0x80)
+ Notify(PCI_SCOPE.WMI1, 0x80) // Mirror Notify on WMI1
+ }
+
+ case (2) //Lid switch event
+ {
+ //Note: NV clarified that only LDES needs to be set
+ Store(1,IGPU_SCOPE.LDES)
+ Notify(IGPU_SCOPE, 0xDB)
+ Notify(PCI_SCOPE.WMI1, 0xDB) // Mirror Notify on WMI1
+ }
+// case (3) //Dock event
+ case (4) //Dock event (!!!Acpi ref code, Method(GDCK)sends 4 for Dock notifications)
+ {
+ Store(IGPU_SCOPE.CDCK, IGPU_SCOPE.DKST) // Store the current dock state
+ Notify(IGPU_SCOPE, 0x81)
+ Notify(PCI_SCOPE.WMI1, 0x81) // Mirror Notify on WMI1
+ }
+
+ Default
+ {
+ Notify(IGPU_SCOPE,0x80)
+ }
+
+ }
+
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: CHPS
+//
+// Description: Shows current Hybrid Policy status on Port80 header
+// Adaptive -> 1, Save power -> 2 and High performance -> 3
+//
+// Input: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(CHPS)
+{
+ P8DB(0xEC, Add(IGPU_SCOPE.GPSS, 1), 2000)
+}
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HDOS
+//
+// Description: Check if the _DOS flag was set during the hot key handling
+//
+// Input: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HDOS, 0, Serialized)
+{
+ If(LEqual(IGPU_SCOPE.DOSF,1))
+ {
+ Store(1,IGPU_SCOPE.SGNC) // indicate 'policy select' change
+ Notify(IGPU_SCOPE,0xD0)
+ Notify(PCI_SCOPE.WMI1, 0xD0) // Mirror Notify on WMI1
+ Store(0, IGPU_SCOPE.DOSF) // Clear the DOSF
+ }
+}
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NViGPUPCH.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NViGPUPCH.asl
new file mode 100644
index 0000000..cdb7061
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NViGPUPCH.asl
@@ -0,0 +1,1078 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/NViGPUPCH.asl 2 2/21/13 5:41a Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 2/21/13 5:41a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/NViGPUPCH.asl $
+//
+// 2 2/21/13 5:41a Joshchou
+// [TAG] EIP106524
+// [Category] New Feature
+// [Description] Support GC6 function for Optimus
+//
+// 1 1/15/13 6:03a Joshchou
+// [TAG] EIP107237
+// [Category] Improvement
+// [Description] Create componet for SG support on PCH
+// [Files] SgUltNvidia.cif
+// NVdGPUPCH.asl
+// NViGPUPCH.asl
+// NViGDmiscPCH.asl
+// OpSSDTPCH.asl
+// NvVenturaPCH.asl
+// NvGPSPCH.asl
+// NvSSDTPCH.asl
+//
+// 6 4/11/12 3:54a Alanlin
+// [TAG] EIP82808
+// [Category] Improvement
+// [Description] nVidia GPS function improvement.
+// [Files] Board\EM\SgTpv\AcpiTables\SgTpvAcpiTables.sdl
+// Board\EM\SgTpv\AcpiTables\NvGPS.asl
+// Board\EM\SgTpv\AcpiTables\NViGPU.asl
+//
+// 5 12/02/11 5:37a Alanlin
+// [TAG] EIP75211
+// [Category] Improvement
+// [Description] Following nVidia's suggestion to change OperationRegion
+// access type from "AnyAcc" to "DWordAcc" for nVidia new chip.
+//
+// 4 12/02/11 1:00a Alanlin
+// [TAG] EIP75359
+// [Category] Improvement
+// [Description] 1.Fixed \_SB_.PCI0.GFX0.HDSM method can't be
+// unassembled if use windebug utility to check it.
+// 2.Fixed _DSM sub function 0x1B will report "Unexpected argument type"
+// message if use windebug utility to check it.
+//
+// 2 10/14/11 2:59a Alanlin
+// [TAG] EIP64451
+// [Category] New Feature
+// [Description] Optimus GPS feature update
+// [Files] NvSSDT.asl
+// NViGPU.asl
+// OpSSDT.asl
+// NvGPS.asl
+// SgNvidia.cif
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+//
+//
+// 7 3/17/11 6:17p Alexp
+// Optimus:Add code to preserve HD AudioCodec enable flag in CMOS
+//
+// 6 11/12/10 1:28p Alexp
+// bring back the field ELCL to hold the Link Control register value. Not
+// used as it's overriden in SG Reference Code in SgDGPU.asl
+//
+// 5 11/11/10 3:15p Alexp
+// Optimization: bring Optimus _DSM functions from NvdGPU.asl
+//
+// 4 10/08/10 1:50p Alexp
+// re-arrange debug messages
+//
+// 3 10/06/10 3:34p Alexp
+// Include defines for different Nvidia GUID functions. Helps to control
+// inclusion of peices of ASL depending on type of desired SG mode
+//
+// 2 10/05/10 7:14p Alexp
+// 1. Added debug macro to be able to insert check points in target ASL
+// code
+// 2. Reuse NVdGPU.asl file to build OpSSDT for Optimus and NvSSDT for
+// MUXed SG targets.
+// NvOptimus.asl no longer required
+//
+// 1 9/17/10 1:21p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgNvidia.cif;
+// NvSSDT.asl; NVdGPU.asl;NViGPU.asl;NViGDmisc
+// OpSSDT.asl;NvOptimus.asl;NvVenture.asl
+//
+//**********************************************************************
+External(NVGA)
+
+External(NXD1)
+External(NXD2)
+External(NXD3)
+External(NXD4)
+External(NXD5)
+External(NXD6)
+External(NXD7)
+External(NXD8)
+External(DID1)
+External(DID2)
+External(DID3)
+External(DID4)
+External(DID5)
+External(DID6)
+External(DID7)
+External(DID8)
+
+Scope (IGPU_SCOPE)
+{
+
+ Method(_INI,0)
+ {
+ //DIDx values have been changed in MxmAcpiTables.c
+ //Port - D to be used for eDP only and not as DFP. Hence generating a new toggle list
+ Store(DID1, Index(TLPK,0)) // CRT
+ Store(DID2, Index(TLPK,2)) // LFP
+ Store(DID3, Index(TLPK,4)) // DP_B
+ Store(DID4, Index(TLPK,6)) // HDMI_B
+ Store(DID5, Index(TLPK,8)) // HDMI_C
+ Store(DID6, Index(TLPK,10)) // DP_D
+ Store(DID7, Index(TLPK,12)) // HDMI_D
+ Store(DID2, Index(TLPK,14)) // LFP+CRT
+ Store(DID1, Index(TLPK,15))
+ Store(DID2, Index(TLPK,17)) // LFP+DP_B
+ Store(DID3, Index(TLPK,18))
+ Store(DID2, Index(TLPK,20)) // LFP+HDMI_B
+ Store(DID4, Index(TLPK,21))
+ Store(DID2, Index(TLPK,23)) // LFP+HDMI_C
+ Store(DID5, Index(TLPK,24))
+ Store(DID2, Index(TLPK,26)) // LFP+DP_D
+ Store(DID6, Index(TLPK,27))
+ Store(DID2, Index(TLPK,29)) // LFP+HDMI_D
+ Store(DID7, Index(TLPK,30))
+ }
+
+//
+// MXMX method is dupplicated under GFX0 scope in INTELGFX.ASL
+// need to replace it with method in this file.
+//
+#ifndef OPTIMUS_DSM_GUID
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: MXMX
+//
+// Description: Display DDC Mux Control
+//
+// Input:
+// Arg0: Get/Set DDC/Aux Mux State
+// 0- Acquire DDC/Aux Mux on this GPU
+// 1- Release Mux from this GPU
+// 2- Get Mux state
+//
+// Output:
+// 0, Not Acquired.
+// if Arg0 = 0 or 1, Non-Zero return indicates success acquiring MUX
+// (and MUX has switched to this output)
+// if Arg0 = 2, Non-Zero return indicates MUX is currently set to this output
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method (MXMX, 1, Serialized)
+ {
+ P8DB(0x77, Arg0, 2000)
+
+ If (LEqual (Arg0, 0))
+ {
+ //Acquire DDC/AUX mux
+ // No mutex implemented. No need to acquire mutex.
+ // Set mux to iGPU
+ DGPUPCH_SCOPE.SGPO(DSEL, 0)
+ DGPUPCH_SCOPE.SGPO(ESEL, 0) // use edid_select# as mutex flag
+
+ Return(0x1)
+ }
+
+ If (LEqual (Arg0, 1))
+ {
+ //Release DDC/AUX mux
+ // No mutex implemented. No need to release mutex.
+ // 2-way mux. Hence no need to do anything
+ Return(0x1)
+ }
+
+ If (LEqual (Arg0, 2))
+ {
+
+ //Get ddc/aux mux status for iGPU
+ Return(LNot(DGPUPCH_SCOPE.SGPI(ESEL)))
+ }
+
+ Return(0x0) // mutex not acquired
+ }
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: MXDS
+//
+// Description: Display output MUX control
+//
+// Input:
+// Arg0:
+// 0 - Get Mux state
+// 1 - Set Display to active on this GPU
+// 2 - Set Backlight control to active on this GPU
+// 3 - Set Display & Backlight to active on this GPU
+//
+// Output:
+// If Arg0 = 0, Error = Display is not MUXed
+// Else return value of the state of the MUX
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(MXDS, 1, Serialized)
+ {
+ P8DB(0x7A, Arg0, 2000)
+
+ If(LEqual (Arg0, 0))
+ {
+ //Get display mux status for iGPU
+ return(LNot(DGPUPCH_SCOPE.SGPI(DSEL)))
+ } else
+// If(LOr(LEqual (Arg0, 1), LEqual (Arg0, 2)))
+ {
+ //Set display mux to igpu
+ DGPUPCH_SCOPE.SGPO(DSEL, 0)
+ DGPUPCH_SCOPE.SGPO(PSEL, 0)
+ }
+
+ Return (0)
+ }
+
+#endif // OPTIMUS_DSM_GUID
+
+//<AMI_SHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: NVIG
+//
+// Description: Nvidia NVIG (iGPU) OperationRegion
+//
+//-------------------------------------------------------------------------
+//<AMI_SHDR_END>
+ OperationRegion(NVIG,SystemMemory,NVGA,0x45)
+ Field(NVIG, DWordAcc, NoLock, Preserve)
+ {
+ // OpRegion Header
+
+ NISG, 0x80, // (000h) Signature-"NVSG-IGD-DSM-VAR".
+ NISZ, 0x20, // (010h) OpRegion Size in KB.
+ NIVR, 0x20, // (014h) OpRegion Version.
+
+ // OpRegion Data
+ GPSS, 0x20, // Policy Selection Switch Status (Policy selection)
+ GACD, 0x10, // Active Displays
+ GATD, 0x10, // Attached Displays
+ LDES, 0x08, // Lid Event State
+ DKST, 0x08, // Dock State
+ DACE, 0x08, // Display ACPI event
+ DHPE, 0x08, // Display Hot-Plug Event
+ DHPS, 0x08, // Display Hot-Plug Status
+ SGNC, 0x08, // Notify Code (Cause of Notify(..,0xD0))
+ GPPO, 0x08, // Policy Override (Temporary ASL variables)
+ USPM, 0x08, // Update Scaling Preference Mask (Temporary ASL variable)
+ GPSP, 0x08, // Panel Scaling Preference
+ TLSN, 0x08, // Toggle List Sequence Number
+ DOSF, 0x08, // Flag for _DOS
+ ELCL, 0x10, // Endpoint Link Contol Register Value
+ }
+
+ // Toggle List Package
+ Name(TLPK,Package()
+ {
+ //fix this toggle list. DIDx values have been changed in MxmAcpiTables.c
+ 0xFFFFFFFF, 0x2C, // CRT
+ 0xFFFFFFFF, 0x2C, // LFP
+ 0xFFFFFFFF, 0x2C, // DP_B
+ 0xFFFFFFFF, 0x2C, // HDMI_B
+ 0xFFFFFFFF, 0x2C, // HDMI_C
+ 0xFFFFFFFF, 0x2C, // DP_D
+ 0xFFFFFFFF, 0x2C, // HDMI_D
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+CRT
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+DP_B
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+HDMI_B
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+HDMI_C
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+DP_D
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+HDMI_D
+
+ })
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: INDL
+//
+// Description: Initialize Global Next active device list.
+//
+// Input: None
+//
+// Output: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(INDL, 0, Serialized)
+ {
+ Store(0, NXD1)
+ Store(0, NXD2)
+ Store(0, NXD3)
+ Store(0, NXD4)
+ Store(0, NXD5)
+ Store(0, NXD6)
+ Store(0, NXD7)
+ Store(0, NXD8)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: SND1
+//
+// Description: Set Next active device for a single device
+//
+// Input:
+// Arg0 : Device ID of the device that's to be set as next active device.
+//
+// Output: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(SND1, 1, Serialized)
+ {
+ If(LEqual(Arg0, DID1))
+ {
+ Store(1, NXD1)
+ }
+ If(LEqual(Arg0, DID2))
+ {
+ Store(1, NXD2)
+ }
+ If(LEqual(Arg0, DID3))
+ {
+ Store(1, NXD3)
+ }
+ If(LEqual(Arg0, DID4))
+ {
+ Store(1, NXD4)
+ }
+ If(LEqual(Arg0, DID5))
+ {
+ Store(1, NXD5)
+ }
+ If(LEqual(Arg0, DID6))
+ {
+ Store(1, NXD6)
+ }
+ If(LEqual(Arg0, DID7))
+ {
+ Store(1, NXD7)
+ }
+ If(LEqual(Arg0, DID8))
+ {
+ Store(1, NXD8)
+ }
+
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: SNXD
+//
+// Description: Set Next active device
+//
+// Input:
+// Arg0 TLSN
+//
+// Output: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(SNXD, 1, Serialized)
+ {
+ INDL()
+
+ //
+ // Locate the toggle table entry corresponding to TLSN value
+ // Toggle list entries are separated by 0x2C.
+ //
+
+ Store(1, Local0) // Local0 to track entries. Point to the first entry (TLSN starts from 1)
+ Store(0, Local1) // Local1 to track elements inside the TLPK package (ACPI IDs and '0x2C')
+
+ while(LLess(Local0, Arg0)) // TLSN start from 1!!
+ {
+ if(LEqual(DeRefOf(Index(TLPK,Local1)), 0x2C))
+ {
+ Increment(Local0)
+ }
+ Increment(Local1)
+
+ }
+
+ SND1(DeRefOf(Index(TLPK, Local1))) // 1 st ACPI ID in the entry corresponding to TLSN
+ Increment(Local1)
+ if(LNotEqual(DeRefOf(Index(TLPK,Local1)), 0x2C)) // Check for separator
+ {
+ SND1(DeRefOf(Index(TLPK, Local1))) // 2 nd ACPI ID in the entry corresponding to TLSN
+ }
+
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: CTOI
+//
+// Description: Convert _DOD indices-> MDTL index
+//
+// Input:
+// Arg 0 is the currently active display list
+//
+// Output: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(CTOI,1, Serialized)
+ {
+ Switch(ToInteger(Arg0)) //Arg 0 is the currently active display list
+ {
+ //_DOD indices-> MDTL index
+ case(0x1) {Return(1)} //CRT
+ case(0x2) {Return(2)} //LFP
+ case(0x4) {Return(3)} //DP_B
+ case(0x8) {Return(4)} //HDMI_B
+ case(0x10) {Return(5)} //HDMI_C
+ case(0x20) {Return(6)} //DP_D
+ case(0x40) {Return(7)} //HDMI_D
+ case(0x3) {Return(8)} //LFP+CRT
+ case(0x6) {Return(9)} //LFP+DP_B
+ case(0xA) {Return(10)} //LFP+HDMI_B
+ case(0x12) {Return(11)} //LFP+HDMI_C
+ case(0x22) {Return(12)} //LFP+DP_D
+ case(0x42) {Return(13)} //LFP+HDMI_D
+ Default {Return(1)}
+ }
+ }
+
+// Check for Nvidia _DSM UUIDs
+//
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HDSM
+//
+// Description: Device Specific Methods for Hybrid GPU (may be invoked from dGP and iGD)
+// Implements Mxm and SG specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// nVidia
+// SG dGPU GUID :9D95A0A0-0060-4D48-B34D-7E5FEA129FD4
+// NBCI GUID :D4A50B75-65C7-46F7-BfB7-41514CEA0244
+// Ventura GUID :95DB88FD-940A-4253-A446-70CE0504AEDF
+// Optimus DSM_GUID :A486D8F8-0BDA-471B-A72B-6042A6B5BEE0
+//
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(HDSM, 4, SERIALIZED)
+ {
+
+#if NV_VENTURA_SUPPORT == 1
+ //SPB_DSM_GUID {95DB88FD-940A-4253-A446-70CE0504AEDF}
+//x if(CMPB(Arg0, Buffer(){0xFD,0x88,0xDB,0x95,0x0A,0x94,0x53,0x42,0xA4,0x46,0x70,0xCE,0x05,0x04,0xAE,0xDF}))
+ If(LEqual(Arg0, ToUUID("95DB88FD-940A-4253-A446-70CE0504AEDF")))
+ {
+ return ( DGPUPCH_SCOPE.SPB(Arg0, Arg1, Arg2, Arg3))
+ }
+#endif
+
+#if NV_GPS_SUPPORT == 1
+ //SPB_DSM_GUID {A3132D01-8CDA-49BA-A52E-BC9D46DF6B81}
+//x if(CMPB(Arg0, Buffer(){0x01, 0x2D, 0x13, 0xA3, 0xDA, 0x8C, 0xBA, 0x49,0xA5, 0x2E, 0xBC, 0x9D, 0x46, 0xDF, 0x6B, 0x81}))
+ If(LEqual(Arg0, ToUUID("A3132D01-8CDA-49BA-A52E-BC9D46DF6B81")))
+ {
+ return ( DGPUPCH_SCOPE.GPS(Arg0, Arg1, Arg2, Arg3))
+ }
+#endif
+
+#if NV_GC6_SUPPORT == 1
+ If(LEqual(Arg0, ToUUID("CBECA351-067B-4924-9CBD-B46B00B86F34")))
+ {
+ return ( DGPUPCH_SCOPE.NGC6(Arg0, Arg1, Arg2, Arg3))
+ }
+#endif
+
+#if HYBRID_DSM_GUID || NBCI_DSM_GUID || OPTIMUS_DSM_GUID
+
+ Name(SGCI, 0) // SG Common Interface
+ Name(NBCI, 0) // Notebok Common Interface
+ Name(OPCI, 0) // Optimus Common Interface
+ Name(BUFF, 0) // Buff Parameter
+
+// Hybrid Graphics Methods supported only if MUXed mode is selected
+#ifdef HYBRID_DSM_GUID
+ If(LEqual(Arg0, ToUUID("9D95A0A0-0060-4D48-B34D-7E5FEA129FD4")))
+ {
+ Store(1, SGCI)
+ }
+#endif
+// NBCI Methods can be querried in botd MUXed and MUXless modes
+#ifdef NBCI_DSM_GUID
+ if(LEqual(Arg0, ToUUID("D4A50B75-65C7-46F7-BfB7-41514CEA0244")))
+ {
+ Store(1, NBCI)
+ }
+#endif
+// Optimus Methods can be querried in botd MUXed and MUXless modes
+#ifdef OPTIMUS_DSM_GUID
+ If(LEqual(Arg0, ToUUID("A486D8F8-0BDA-471B-A72B-6042A6B5BEE0")))
+ {
+ Store(1, OPCI)
+ }
+#endif
+
+ If(LOr(OPCI, LOr( SGCI, NBCI)) )
+ {
+
+ P8DB(0xEE, Arg2, 1000)
+
+ if(OPCI) {
+ if(LNotEqual(Arg1, 0x100)) {
+ Return(0x80000002)
+ }
+ }
+ else { // NBCI & SGCI
+ If(LNotEqual(Arg1,0x0102))
+ {
+ Return(0x80000002)
+ }
+ }
+ //
+ // Function 0: NVSG_FUNC_SUPPORT - Return Supported Functions
+ //
+ // Returns:
+ // SGCI: Functions 0-6,18 are supported
+ // NBCI: Functions 0,4-6,18 are supported
+ // OPCI: Functions 0,5,6,12,13,16,17,26,27
+ //
+ If(LEqual(Arg2,0))
+ {
+ if(SGCI){
+ Return(Buffer(){0x7F, 0x00, 0x04, 0x00})
+ } else {
+ if(NBCI){
+ Return(Buffer(){0x73, 0x00, 0x04, 0x00})
+ }
+ else {
+ if(OPCI){
+ //Sub-Functions 0,16,17,26 are supported
+ // Return(ToBuffer(0x04030001))
+ //Sub-Functions 0,5, 6, 12, 13, 16, 17, 26,27 are supported
+ // Return(ToBuffer(0x0c031861))
+ // Follow nVidia's suggetion, Optimus displayless platform has no used for other sub-functions.
+ #if NV_OPTIMUS_DISPLAYLESS == 1
+ Return(Buffer(){0x01, 0x00, 0x03, 0x04})
+ #else
+ Return(Buffer(){0x61, 0x18, 0x03, 0x0C})
+ #endif
+ //Sub-Functions 0,16 26,27 are supported
+// Return(ToBuffer(0x0c010001))
+
+ }
+ }
+ }
+ }
+
+ //
+ // Function 1: NVSG_FUNC_CAP
+ //
+ // Returns the capabilities of the Switchable Graphics
+ // implementation on the platform
+ //
+ If(LEqual(Arg2,1))
+ {
+ Name (TEMP, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TEMP,0,STS0)
+ if(SGCI){
+ // Return status (bit0-1 Hybrid enabled) and indicate Hybrid power On/Off
+
+ // 0 HG Enable Status = 1
+ // 1 GPU Output MUX Capabilities= 1
+ // 2 GPU Policy Selector Capabilities = 1
+ // 3-4 GPU Control Status = 3
+ // 5 GPU Reset Control = 1
+ // 6 MUX'ed Hot-Plug Capabilities = 0
+ // 7 MUX'ed DDC/AUX Capabilities = 1
+ // 8-10 Notify Codes
+ // 0= Not a Notify(0xD0)
+ // 1= POLICYSELECT change
+ // 2= PLATPOLICY change
+ // 3= DISPLAYSTATUS change
+ // 11-12 EC Notify code
+ // 14-15 Eject Capabilities = 0
+ // 16 Mux'd backlight cap = 0
+ // 17-23 Hybrid EC version = 0
+ // 24-26 HG capability = 3 (Power saver & Boost performance)
+ // 27-28 HG switch = 1 (hot-key or stateless button)
+ // 29 Fasl LCD swithing = 0
+ // 31 = 0
+
+ // Switchable caps
+ Or(STS0,0x0B0000BF,STS0)
+
+ // Switchable Notify Code (Cause of Notify(..,0xD0))
+ Or(STS0,ShiftLeft(SGNC,8,SGNC),STS0)
+ } else {
+ // NBCI
+ // 0..3 Reserved=00
+ // 4 Aux Power States
+ // 6:5 LID State Event
+ // 0= Use the event List to determine support
+ // 1= Force use of Generic Hot-Plug Notify(0x81)
+ // 2= Force use of Specific Lid Event, e.g. Notify (0xDB)
+ // 3= Reserved for future use
+ // 7:8 LID State Enumeration
+ // 0= Use _DCS under _LCD device(default)
+ // 1= Provides status DISPLAYSTATUS Bit[4], for single pannel systems only(recommended)
+ // 2,3= Reserved
+ // 9 Dock State Enumerartion
+ // 0= Doesn't have a Dock(or _DCS under device reflects attachments-via-dock (default)
+ // 1= Provides dock status info via DISPLAYSTATUS Bit[5] (recommended)
+ // 10:30 Reserved
+ // 31 = 0
+
+ // use all defaults for now
+ Or(STS0,0x00000,STS0)
+ }
+ return(TEMP)
+ }
+
+ //
+ // Function 2: NVSG_FUNC_SELECTOR
+ //
+ // Returns device preference between iGPU and dGPU
+ //
+ If(LEqual(Arg2,2))
+ {
+ Name (TMP1, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TMP1,0,STS1)
+
+ //Ignore bits[6:5] since we are not supporting Switchable enable/disable policy selection
+ //Only Switchable policy selection is supported via CAS+F6 hotkey
+
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(DerefOf(Index(Arg3,0)), Local0)
+ ToInteger(Arg3, Local0)
+ And(Local0, 0x1F, Local0)
+
+ If(And(Local0,0x10)) //If Switchable policy update bit is set
+ {
+ And(Local0,0xF,Local0)
+ Store(Local0,GPSS)
+ Notify(IGPU_SCOPE,0xD9) //Broadcast "policy completed" notification
+ Notify(PCI_SCOPE.WMI1, 0xD9) // Mirror Notify on WMI1
+
+ }
+ Else
+ {
+ And(Local0,0xF,Local0)
+ If(LEqual(GPPO,1))
+ {
+ // Retrieve the setting from NVS
+ Store(GPSS,Local0)
+ Or(Local0,0x10,Local0)
+ Store(0,GPPO)
+ }
+ }
+
+ Or(STS1,Local0,STS1)
+
+ Return(TMP1)
+ }
+
+ //
+ // Function 3: NVSG_FUNC_POWERCONTROL
+ //
+ // Allows control of dGPU power methods from the iGPU
+ //
+ If(LEqual(Arg2,3))
+ {
+ Name (TMP2, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TMP2,0,STS2)
+
+ // GPU Power Control
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(DerefOf(Index(Arg3,0)), Local0)
+ ToInteger(Arg3, Local0)
+ And(Local0, 0x3, Local0)
+
+ If(LEqual(Local0,0))
+ {
+ DGPUPCH_SCOPE.SGST()
+ }
+
+ If(LEqual(Local0,1))
+ {
+ DGPUPCH_SCOPE.SGON()
+ }
+
+ If(LEqual(Local0,2))
+ {
+ DGPUPCH_SCOPE.SGOF()
+ }
+
+ //dGPU_PWROK is not working. Using dGPU_PWR_EN# instead as w/a
+ //Or(STS2,DGPUPCH_SCOPE.MPOK,STS2)
+ If(LEqual(DGPUPCH_SCOPE.SGST(), 0xF))
+ {
+ Or(STS2,0x1,STS2)
+ }
+ //else do nothing since STS2 is already 0
+ Return(TMP2)
+ }
+
+ //
+ // Function 4: NVSG_FUNC_PLATPOLICY
+ //
+ // Sets or Returns the current System Policy settings
+ //
+ If(LEqual(Arg2,4))
+ {
+
+// common for SGCI and NBCI
+ Name (TMP3, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TMP3,0,STS3)
+
+ // Panel Scaling Preference
+
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(DerefOf(Index(Arg3,0)), Local0)
+ ToInteger(Arg3, Local0)
+ Store(Local0, Local1)
+ ShiftRight(Local0, 16, Local0)
+ And(Local0, 0x1, USPM)
+
+ ShiftRight(Local1, 13, Local1)
+ And(Local1, 0x3, Local1)
+
+
+ If(LNotEqual(Local1,GPSP))
+ {
+ If(LEqual(USPM,1))
+ {
+ Store(Local1,GPSP)
+ }
+ Else
+ {
+ // Retrieve the setting from NVS
+ Store(GPSP,Local1)
+ Or(STS3,0x8000,STS3) // Set Panel Scaling override
+ }
+ }
+ Or(STS3,ShiftLeft(Local1,13),STS3)
+
+
+ Return(TMP3)
+ }
+
+ //
+ // Function 5: NVSG_FUNC_DISPLAYSTATUS
+ //
+ // Sets or Returns the current display detection,
+ // hot-key toggle sequence
+ //
+ If(LEqual(Arg2,5))
+ {
+// common for SGCI and NBCI
+ Name (TMP4, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TMP4,0,STS4)
+
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(Derefof(Index(Arg3,0)), Local0) //Store input field in local0
+ ToInteger(Arg3, Local0)
+
+ // Next Combination Sequence
+
+ If(And(Local0,0x80000000)) //If Bit31 is set
+ {
+ Store(And(ShiftRight(Local0,25),0x1F),TLSN)
+
+ If(And(Local0,0x40000000)) //If Bit30 is set
+ {
+ Store(1,DOSF)
+ }
+ }
+
+ // Display Mask for Attached and Active Displays
+
+ If(And(Local0,0x01000000)) //If Bit24 is set
+ {
+ Store(And(ShiftRight(Local0,12),0xFFF),GACD)
+ Store(And(Local0,0xFFF),GATD)
+
+ //Get current toggle list index based on currently active display list
+ Store(CTOI(GACD),TLSN)
+ Increment(TLSN)
+
+ If(LGreater(TLSN, 13)) //For Huron River ,13 is the number of entries in the toggle list
+ {
+ Store(1, TLSN)
+ }
+
+ SNXD(TLSN) //This is optional for NV SG
+ }
+
+ // Display Hot-Plug Event/Status
+ Or(STS4,ShiftLeft(DHPE,21),STS4)
+ Or(STS4,ShiftLeft(DHPS,20),STS4)
+
+ // Toggle Sequence number
+ Or(STS4,ShiftLeft(TLSN,8),STS4)
+
+ // Dock State
+ Or(STS4,ShiftLeft(DKST,5),STS4)
+
+ // Lid Event State
+ Or(STS4,ShiftLeft(LDES,4),STS4)
+
+ // Display ACPI Event(SGCI only)
+ Or(STS4,DACE,STS4)
+
+ Store(0,LDES)
+ Store(0,DHPS)
+ Store(0,DHPE)
+ Store(0,DACE)
+
+ Return(TMP4)
+ }
+
+ //
+ // Function 6: NVSG_FUNC_MDTL - Returns Hot-Key display switch toggle sequence
+ //
+ // Returns:
+ // Returns Hot-Key display switch toggle sequence
+ //
+ If(LEqual(Arg2,6))
+ {
+// common for SGCI and NBCI
+ Return(TLPK)
+ }
+ //
+ // Function 16:
+ //
+ If(LEqual(Arg2,16))
+ {
+ CreateWordField(Arg3, 2, USRG) // Object type signature passed in by driver.
+ Name(OPVK, Buffer()
+ {
+ // Key below is for Emerald Lake Fab2 platform
+ // Customer need to ask NVIDIA PM to get the key
+ // Customer need to put the key in between labels "// key start -" and
+ // "// key end -". Please consult NVIDIA PM if any issues
+ //148597456985Genuine NVIDIA Certified Optimus Ready Motherboard for 736019_MIRc
+ // Key start -
+ 0xE4,0x42,0x5F,0x14,0x36,0x26,0x16,0x37,0x4B,0x56,0xE6,0x00,0x00,0x00,0x01,0x00,
+ 0x31,0x34,0x38,0x35,0x39,0x37,0x34,0x35,0x36,0x39,0x38,0x35,0x47,0x65,0x6E,0x75,
+ 0x69,0x6E,0x65,0x20,0x4E,0x56,0x49,0x44,0x49,0x41,0x20,0x43,0x65,0x72,0x74,0x69,
+ 0x66,0x69,0x65,0x64,0x20,0x4F,0x70,0x74,0x69,0x6D,0x75,0x73,0x20,0x52,0x65,0x61,
+ 0x64,0x79,0x20,0x4D,0x6F,0x74,0x68,0x65,0x72,0x62,0x6F,0x61,0x72,0x64,0x20,0x66,
+ 0x6F,0x72,0x20,0x37,0x33,0x36,0x30,0x31,0x39,0x5F,0x4D,0x49,0x52,0x63,0x20,0x20,
+ 0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x2D,0x20,0x3C,0x34,0x27,0x21,0x58,0x29,
+ 0x57,0x27,0x58,0x20,0x27,0x25,0x59,0x5D,0x31,0x29,0x3A,0x2A,0x26,0x39,0x59,0x43,
+ 0x56,0x3B,0x58,0x56,0x58,0x3D,0x59,0x4E,0x3B,0x3A,0x35,0x44,0x25,0x42,0x5A,0x48,
+ 0x55,0x3A,0x58,0x4C,0x25,0x48,0x54,0x21,0x35,0x4B,0x4D,0x37,0x2C,0x3C,0x20,0x2D,
+ 0x20,0x43,0x6F,0x70,0x79,0x72,0x69,0x67,0x68,0x74,0x20,0x32,0x30,0x31,0x30,0x20,
+ 0x4E,0x56,0x49,0x44,0x49,0x41,0x20,0x43,0x6F,0x72,0x70,0x6F,0x72,0x61,0x74,0x69,
+ 0x6F,0x6E,0x20,0x41,0x6C,0x6C,0x20,0x52,0x69,0x67,0x68,0x74,0x73,0x20,0x52,0x65,
+ 0x73,0x65,0x72,0x76,0x65,0x64,0x2D,0x31,0x34,0x38,0x35,0x39,0x37,0x34,0x35,0x36,
+ 0x39,0x38,0x35,0x28,0x52,0x29,
+ //Copyright 2010 NVIDIA Corporation All Rights Reserved-148597456985(R)
+ // Key end -
+ })
+ If(LEqual(USRG, 0x564B)) { // 'VK' for Optimus Validation Key Object.
+ Return(OPVK)
+ }
+ Return(Zero)
+ }
+ //
+ // Function 17 NVOP_FUNC_GETALLOBJECTS
+ //
+ If(LEqual(Arg2,17))
+
+ {
+ Return(Zero)
+ }
+ //
+ // Function 18: NVSG_FUNC_GETEVENTLIST
+ //
+ // Returns:
+ // Returns list of notifiers and their meanings
+ //
+ If(LEqual(Arg2,18))
+ {
+// common for SGCI and NBCI
+ return(Package(){
+ 0xD0, ToUUID("921A2F40-0DC4-402d-AC18-B48444EF9ED2"), // Policy request
+ 0xD9, ToUUID("C12AD361-9FA9-4C74-901F-95CB0945CF3E"), // Policy set
+ 0xDB, ToUUID("42848006-8886-490E-8C72-2BDCA93A8A09"), // Display scaling
+
+ 0xEF, ToUUID("B3E485D2-3CC1-4B54-8F31-77BA2FDC9EBE"), // Policy change
+ 0xF0, ToUUID("360d6fb6-1d4e-4fa6-b848-1be33dd8ec7b"), // Display status
+
+ // unfinished list of events. we do not need this Func18 unless event notifiers differ from standard ones defined in BWG.
+ })
+ }
+ //
+ // Function 26: NVOP_FUNC_OPTIMUSCAPS
+ //
+ If(LEqual(Arg2,26))
+ {
+ // On Input
+ //Bit25-24 Power Control Enable
+ // 2-Platform should not power down GPU in the _PS3 method(default)
+ // 3-Platform should power down GPU in the _PS3 method(default)
+ // Bit0 No flag upd present in this call (SBIOS returns curent status)
+ //
+ CreateField(Arg3,24,2,OMPR)
+ CreateField(Arg3,0,1,FLCH)
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_TARGET 1:1
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_TARGET_SBIOS 0x00000000
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_TARGET_DRIVER 0x00000001
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_WR_EN 2:2
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_WR_EN_FALSE 0x00000000
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_WR_EN_TRUE 0x00000001
+ CreateField(Arg3,One,One,DVSR)
+ CreateField(Arg3,0x02,One,DVSC)
+ If(ToInteger(FLCH))
+ {
+ Store(OMPR, DGPUPCH_SCOPE.OPCE) // Optimus Power Control Enable - From DD
+ }
+ // On return
+ // Bit 24:26 Capabilities
+ // 0: No special platf cap
+ // 1: Platform has dynamic GPU power control
+ // Bit6 GPU Display Hot Plug NEW Optimus BWG v02
+ // Bit4:3 Current GPU Control status
+ // 0: GPU is powered off
+ // 1: GPU is powered on and enabled
+ // 2: reserved
+ // 3: GPU Power has stabilized
+ // Bit0
+ // 0:Optimus Disabled
+ // 1:Optimus Enabled
+ Store(Buffer(4) {0, 0, 0, 0}, Local0)
+ CreateField(Local0,0,1,OPEN)
+ CreateField(Local0,3,2,CGCS)
+ CreateField(Local0,6,1,SHPC)
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_ACTUAL 8:8
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_ACTUAL_SBIOS 0x00000000
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_ACTUAL_DRIVER 0x00000001
+ CreateField(Local0,0x08,One,SNSR)
+ CreateField(Local0,24,3,DGPC) // DGPC - Default: No Dynamic GPU Power Control
+ CreateField(Local0,27,2,HDAC) // HDAC - HD Audio Codec Cap
+
+ Store(One, OPEN) // Optimus Enabled
+
+ Store(One, SHPC) // GPU Display Hotplug Supported
+ Store(0x2, HDAC) // HDA BIOS control Supported
+
+ Store(One, DGPC) // Dynamic GPU Power Control Available
+ //if (NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_WR_EN is set)
+ //{
+ // GPRF = NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_TARGET
+ //}
+ //NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_ACTUAL = GPRF
+ If(ToInteger(DVSC))
+ {
+ If(ToInteger(DVSR))
+ {
+ Store(One, DGPUPCH_SCOPE.GPRF)
+ }
+ Else
+ {
+ Store(Zero, DGPUPCH_SCOPE.GPRF)
+ }
+ }
+ Store(DGPUPCH_SCOPE.GPRF, SNSR)
+
+
+
+ If(LNotEqual(DGPUPCH_SCOPE.SGST(), 0))
+ {
+ Store(0x3, CGCS) // Current GPU Control status
+ }
+ Return(Local0)
+
+ }//case (26)
+ //
+ // Function 27: NVOP_FUNC_OPTIMUSFLAGS
+ //
+ If(LEqual(Arg2,27))
+ {
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(Derefof(Index(Arg3,0)), Local0) //Store input field in local0
+ ToInteger(Arg3, Local0)
+// Store(Arg3, Local0)
+// CreateField(Local0,0,1,OPFL)
+// CreateField(Local0,1,1,OPVL)
+ If(And(Local0,0x00000002))
+ {
+ Store(Zero, BUFF)
+ If(And(Local0,0x00000001))
+ {
+ Store(One, BUFF)
+ }
+ }
+ And(SGFL, Not(0x2), SGFL)
+ Or(SGFL, ShiftLeft(BUFF,1), SGFL)
+ Store(SWSMI_NVOEM_CMOS_W, SSMP) // Set Audio Codec flag to CMOS
+ Return(Local0)
+ }
+ // FunctionCode or SubFunctionCode not supported
+ Return(0x80000002) // OTHER ARGUMENTS NOT SUPPORTED
+ }
+#endif // common scope for Hybrid/Nbci/Optimus
+
+ // Check for common with dGPU _DSM UUIDs
+// return (DGPUPCH_SCOPE.HDSM(Arg0, Arg1, Arg2, Arg3))
+ Return (0x80000001)
+ }
+} // end PCI0.GFX0 scope
+
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvGC6PCH.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvGC6PCH.asl
new file mode 100644
index 0000000..01d467b
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvGC6PCH.asl
@@ -0,0 +1,365 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/NvGC6PCH.asl 1 2/21/13 5:39a Joshchou $Revision:
+//
+// $Date: 2/21/13 5:39a $Log:
+//
+//
+//
+//**********************************************************************
+External(\_SB.PCI0.LPCB.H_EC, DeviceObj)
+
+External(SG_ULT_RP_NUM.LNKD)
+External(SG_ULT_RP_NUM.LNKS)
+External(DGPUPCH_SCOPE.TGPC, MethodObj)
+
+#define JT_REVISION_ID 0x00000103 // Revision number
+#define JT_FUNC_SUPPORT 0x00000000 // Function is supported?
+#define JT_FUNC_CAPS 0x00000001 // Capabilities
+#define JT_FUNC_POWERCONTROL 0x00000003 // dGPU Power Control
+#define JT_FUNC_PLATPOLICY 0x00000004 // Platform Policy
+#define JT_FUNC_DISPLAYSTATUS 0x00000005 // Query the Display Hot-Key
+#define JT_FUNC_MDTK 0x00000006 // Display Hot-Key Toggle List
+
+
+//!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
+//!!!!!!!Note:This Asl Code is sample code for reference,should be modified it by different board design!!!!!!!!!!
+//!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
+
+
+Scope(\_SB.PCI0.LPCB.H_EC)
+{
+ // Nvidia recommneded to use EC IO for SBIOS to communicate GC6 entry/exit to EC,
+ // Use EC RAM is polling mechanism and might cause the longer delay time for GC6 T1/T2 timing.
+ // Here we just use EC RAM for example, pleae use EC IO access for production solution.
+ OperationRegion(ECF3,EmbeddedControl,0,0xFF)
+ Field(ECF3, ByteAcc, Lock, Preserve)
+ {
+ Offset(0xF0), // assume GC6 control flags located at offset 0xE0
+ EC6I, 1, // EC flag to prepare GC6 entry
+ EC6O, 1, // EC flag to prepare GC6 exit
+ FBST, 1, // the state of FB_CLAMP
+ }
+ Mutex(GC6M, 0)
+ Method(ECNV, 1, NotSerialized)
+ {
+ Acquire(GC6M, 0xFFFF)
+ If(LEqual(Arg0, Zero))
+ {
+ Store(One, EC6I)
+ }
+ If(LEqual(Arg0, One))
+ {
+ Store(One, EC6O)
+ }
+ Release(GC6M)
+ }
+
+ Method(_Q60, 0, NotSerialized) // for GC6 entry Q-event
+ {
+ Store("------- GC6I-SCI _Q event --------", Debug)
+ CreateField(DGPUPCH_SCOPE.TGPC,0x0A,0x2,PRGE) // PRGE : PCIe Root Power GC6 Enter Sequence
+ If(LEqual(ToInteger(PRGE), 0x0)) // DAGC : Link Disable after GC6 Entry complete & before GPU Power Down
+ {
+ Store(One, SG_ULT_RP_NUM.LNKD) // PCIE link disabling.
+ }
+
+ DGPUPCH_SCOPE.SGPO(HLRS, 0) // dGPU RST# to low
+ DGPUPCH_SCOPE.SGPO(PWEN, 0) // dGPU PWN Enable to low
+
+ If(LEqual(ToInteger(PRGE), 0x2)) // DAGP : Link Disable after GC6 Entry & GPU Power down is complete
+ {
+ Store(One, SG_ULT_RP_NUM.LNKD) // PCIE link disabling.
+ }
+ }
+ Method(_Q61, 0, NotSerialized) // for GC6 exit Q-event
+ {
+ Store("------- GC6O-SCI _Q event --------",Debug)
+ }
+}
+
+Scope (DGPUPCH_SCOPE)
+{
+ Name(TGPC, Buffer(0x04)
+ {
+ 0x00
+ }
+ )
+
+ Method(GC6I, 0, Serialized)
+ {
+ Store("<<< GC6I >>>", Debug)
+ CreateField(TGPC,0x06,0x2,ECOC) // NOC: Notify on complete: Reserve
+ CreateField(TGPC,0x0A,0x2,PRGE) // PRGE : PCIe Root Power GC6 Enter Sequence
+ If(Lor(LEqual(ToInteger(PRGE), 0x3), LEqual(ToInteger(PRGE), 0x1))) // DBGS : Link Disable before GC6 Entry starts (E0)
+ {
+ Store(One, SG_ULT_RP_NUM.LNKD) // PCIE link disabling.
+ }
+ \_SB.PCI0.LPCB.H_EC.ECNV (0) // notify EC to prepare GC6 entry.
+ }
+
+ Method(GC6O, 0, Serialized)
+ {
+ Store("<<< GC6O >>>", Debug)
+ CreateField(TGPC,0x06,0x2,ECOC) // NOC: Notify on complete: Reserve
+ CreateField(TGPC,0x08,0x2,PRGX) // PRGX : PCIe Root Power GC6 Exit Sequence
+ If(LEqual(ToInteger(PRGX), Zero)) // EBPG : Link Enable before GPU Power-On & GC6 Exit begins (X0)
+ {
+ Store(Zero, SG_ULT_RP_NUM.LNKD) // PCIE link enabling
+ }
+ DGPUPCH_SCOPE.SGPO(HLRS, 0) // dGPU RST# is low
+ DGPUPCH_SCOPE.SGPO(PWEN, 1) // dGPU PWR Enable is high
+ //+ Todo - need to addd more delay to make sure all power rail is ready and stable
+ // if you have PWR_OK to check, please check PWR_OK instead of delay here
+ //....................
+ //-
+ // GC6 T5 1.5ms
+ Store(Zero, Local0) // Delay by Stall(0x32) *30 times.= 1.5ms , you can add more if you don't think 1.5ms is good enough
+ While(LLess(Local0, 0x1E))
+ {
+ Add(Local0, One, Local0)
+ Stall(0x32)
+ }
+ DGPUPCH_SCOPE.SGPO(HLRS, 1) // dGPU RST# is high
+ If(LEqual(ToInteger(PRGX), 0x3)) // EAPG : Link Enable after GPU Power-On Reset, but before GC6 Exit begins
+ {
+ Store(Zero, SG_ULT_RP_NUM.LNKD) // PCIE link enabling
+ }
+
+ // Haswell UTL has no LNKS register, please remove it from Haswell platform
+ While(LLess(SG_ULT_RP_NUM.LNKS, 0x07))
+ {
+ Sleep(One)
+ }
+ \_SB.PCI0.LPCB.H_EC.ECNV (1) // notify EC to prepare GC6 exit.
+ }
+
+ Method(GETS, 0, Serialized)
+ {
+ If(LEqual(DGPUPCH_SCOPE.SGPI(PWEN), One)) // dGPU PWR Enable is high
+ {
+ Store("<<< GETS() return 0x1 >>>", Debug)
+ Return(One)// GC6 - dGPU on
+ }
+ Else
+ {
+ If(LEqual(\_SB.PCI0.LPCB.H_EC.FBST, One)) // FB_CLAMP asserted.
+ {
+ Store("<<< GETS() return 0x3 >>>", Debug)
+ Return(0x03)// GC6 - dGPU off, FB On, w/ FB_CLAMP asserted
+ }
+ Else
+ {
+ Store("<<< GETS() return 0x2 >>>", Debug)
+ Return(0x02)// GC6 - dGPU & FB Powered off
+ }
+ }
+ }
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: NGC6
+//
+// Description: Called from _DSM -Device Specific Method for dGPU device.
+// Implement Ventura specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// Ventura DSM_GUID CBECA351-067B4924-9CBDB46B00B86F34
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method (NGC6, 4, NotSerialized)
+ {
+
+ Store("------- GC6 DSM --------", Debug)
+ // Only Interface Revision 0x0100 is supported
+ If (LLess(Arg1, 0x100))
+ {
+ Return(0x80000001)
+ }
+
+ // (Arg2) Sub-Function
+ Switch (ToInteger(Arg2))
+ {
+ //
+ // Function 0:
+ //
+ case (JT_FUNC_SUPPORT)
+ {
+ Return(Buffer(0x04)
+ {
+ 0x1B, 0x00, 0x00, 0x00
+ })
+ }
+ //
+ // Function 1:
+ //
+ case (JT_FUNC_CAPS)
+ {
+
+ Name(JTB1, Buffer(0x4)
+ {
+ 0x00
+ })
+ CreateField(JTB1,Zero,One,JTEN)
+ CreateField(JTB1,One,0x02,SREN)
+ CreateField(JTB1,0x03,0x03,PLPR)
+ CreateField(JTB1,0x06,0x02,FBPR)
+ CreateField(JTB1,0x08,0x02,GUPR)
+ CreateField(JTB1,0x0A,One,GC6R)
+ CreateField(JTB1,0x0B,One,PTRH)
+ CreateField(JTB1,0x14,0x0C,JTRV)
+ Store(One, JTEN) // JT enable
+ Store(One, GC6R) // GC6 integrated ROM
+ Store(One, PTRH) // No SMI Handler
+ Store(One, SREN) // Disable NVSR
+ Store(JT_REVISION_ID, JTRV) // JT rev
+
+ Return(JTB1)
+ }
+ //
+ // Function 2:
+ //
+ case(0x00000002)
+ {
+ Store("GPS fun 19", Debug)
+ return(arg3)
+ }
+ //
+ // Function 3:
+ //
+ case(0x00000003)
+ {
+ CreateField(Arg3,Zero,0x03,GUPC)
+ CreateField(Arg3,0x04,One,PLPC)
+ Name(JTB3, Buffer(0x04)
+ {
+ 0x00
+ })
+ CreateField(JTB3,Zero,0x03,GUPS)
+ CreateField(JTB3,0x03,One,GPGS) // dGPU Power status
+ CreateField(JTB3,0x07,One,PLST)
+ If(LEqual(ToInteger(GUPC), One)) // EGNS
+ {
+ Store(Arg3,TGPC) // Store GC6 control input for GC6I GC6O
+ GC6I()
+ Store(One, PLST)
+ }
+ Else
+ {
+ If(LEqual(ToInteger(GUPC), 0x02)) // EGIS
+ {
+ Store(Arg3,TGPC) // Store GC6 control input for GC6I GC6O
+ GC6I()
+ If(LEqual(ToInteger(PLPC), Zero))
+ {
+ Store(Zero, PLST)
+ }
+ }
+ Else
+ {
+ If(LEqual(ToInteger(GUPC), 0x03)) // XGXS
+ {
+ Store(Arg3,TGPC) // Store GC6 control input for GC6I GC6O
+ GC6O()
+ If(LNotEqual(ToInteger(PLPC), Zero))
+ {
+ Store(Zero, PLST)
+ }
+ }
+ Else
+ {
+ If(LEqual(ToInteger(GUPC), 0x04)) // XGIS
+ {
+ Store(Arg3,TGPC) // Store GC6 control input for GC6I GC6O
+ GC6O()
+ If(LNotEqual(ToInteger(PLPC), Zero))
+ {
+ Store(Zero, PLST)
+ }
+ }
+ Else
+ {
+ If(LEqual(ToInteger(GUPC), Zero))
+ {
+ Store(GETS(), GUPS)
+ If(LEqual(ToInteger(GUPS), 0x01))
+ {
+ Store(One, GPGS) // dGPU power status is Power OK
+ }
+ Else
+ {
+ Store(Zero, GPGS) // dGPU power status is Power off
+ }
+ }
+ Else
+ {
+ If(LEqual(ToInteger(GUPC), 0x6)) // XLCM
+ {
+ //+ De-assert FB_CLAMP
+
+ //-
+ }
+ }
+ }
+ }
+ }
+ }
+ Return(JTB3)
+ }
+ //
+ // Function 4:
+ //
+ case(JT_FUNC_PLATPOLICY)
+ {
+ Return(0x80000002)
+ }
+
+ } // end of switch
+
+ Return(0x80000002)
+ } // end NGC6
+
+
+} // end DGPUPCH_SCOPE scope
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvGPSPCH.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvGPSPCH.asl
new file mode 100644
index 0000000..fc6fd14
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvGPSPCH.asl
@@ -0,0 +1,331 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/NvGPSPCH.asl 1 1/15/13 6:03a Joshchou $
+//
+// $Revision: 1 $
+//
+// $Date: 1/15/13 6:03a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/NvGPSPCH.asl $
+//
+// 1 1/15/13 6:03a Joshchou
+// [TAG] EIP107237
+// [Category] Improvement
+// [Description] Create componet for SG support on PCH
+// [Files] SgUltNvidia.cif
+// NVdGPUPCH.asl
+// NViGPUPCH.asl
+// NViGDmiscPCH.asl
+// OpSSDTPCH.asl
+// NvVenturaPCH.asl
+// NvGPSPCH.asl
+// NvSSDTPCH.asl
+//
+// 2 4/11/12 3:52a Alanlin
+// [TAG] EIP82808
+// [Category] Improvement
+// [Description] nVidia GPS function improvement.
+// [Files] Board\EM\SgTpv\AcpiTables\SgTpvAcpiTables.sdl
+// Board\EM\SgTpv\AcpiTables\NvGPS.asl
+// Board\EM\SgTpv\AcpiTables\NViGPU.asl
+//
+// 1 10/14/11 2:56a Alanlin
+//
+//
+//**********************************************************************
+External(\_PR.CPU0._PSS, BuffObj)
+
+External(\_PR.CPU0._PPC, IntObj)
+External(\_PR.CPU1._PPC, IntObj)
+External(\_PR.CPU2._PPC, IntObj)
+External(\_PR.CPU3._PPC, IntObj)
+External(\_PR.CPU4._PPC, IntObj)
+External(\_PR.CPU5._PPC, IntObj)
+External(\_PR.CPU6._PPC, IntObj)
+External(\_PR.CPU7._PPC, IntObj)
+External(\_SB.PCI0.LPCB.H_EC.GTVR) // CPU GT VR (IMVP) Temperature
+External(\_PR.CPU0._TSS, MethodObj)
+External(\_PR.CPU0._PTC, MethodObj)
+
+#define GPS_REVISION_ID 0x00000100 // Revision number
+#define GPS_ERROR_SUCCESS 0x00000000 // Generic Success
+#define GPS_ERROR_UNSPECIFIED 0x00000001 // Generic unspecified error code
+#define GPS_ERROR_UNSUPPORTED 0x00000002 // Sub-Function not supported
+
+#define GPS_FUNC_SUPPORT 0x00000000 // Bit list of supported functions
+#define GPS_FUNC_GETCALLBACKS 0x00000013 // Get system requested callback
+#define GPS_FUNC_PSHARESTATUS 0x00000020 // Get system requested Power Steering Setting
+#define GPS_FUNC_GETPSS 0x00000021 // Get _PSS object
+#define GPS_FUNC_SETPPC 0x00000022 // Set _PCC object
+#define GPS_FUNC_GETPPC 0x00000023 // Get _PCC object
+#define GPS_FUNC_PSHAREPARAMS 0x0000002A // Get sensor information and capabilities
+
+Scope(PCI_SCOPE){
+
+ Name(GPS, "GPSACPI 2012-Aug-12 14:56:05") // MCPACPIP build time stamp.
+
+} // end of Scope
+
+Scope (DGPUPCH_SCOPE)
+{
+
+Name(PSAP, Zero)
+ Name(ECBF, Buffer(20) {})
+ CreateDWordField(ECBF, 0, EDS1)
+ CreateDWordField(ECBF, 4, EDS2)
+ CreateDWordField(ECBF, 8, EDS3)
+ CreateDWordField(ECBF, 12, EDS4)
+ CreateDWordField(ECBF, 16, EPDT)
+
+ Name(GPSP, Buffer(36) {})
+ CreateDWordField(GPSP, 0, RETN)
+ CreateDWordField(GPSP, 4, VRV1)
+ CreateDWordField(GPSP, 8, TGPU)
+ CreateDWordField(GPSP, 12, PDTS)
+ CreateDWordField(GPSP, 16, SFAN)
+ CreateDWordField(GPSP, 20, SKNT)
+ CreateDWordField(GPSP, 24, CPUE)
+ CreateDWordField(GPSP, 28, TMP1)
+ CreateDWordField(GPSP, 32, TMP2)
+
+Name(NLIM, 0) //set one flag for GPS_EVENT_STATUS_CHANGE 1: will update parameter: 0 just call function 0x1c _PCONTROL
+
+ Name(PSCP, 0) // P-State capacity, mainly for s/w debugging
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: GPS
+//
+// Description: Called from _DSM -Device Specific Method for dGPU device.
+// Implement Ventura specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// Ventura DSM_GUID A3132D01-8CDA-49BA-A52E-BC9D46DF6B81
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method (GPS, 4, NotSerialized)
+ {
+
+ Store("------- GPS DSM --------", Debug)
+ // Only Interface Revision 0x0100 is supported
+ If (LNotEqual(Arg1, 0x100))
+ {
+ Return(0x80000002)
+ }
+
+ P8DB(0xDD, Arg2, 1000)
+ // (Arg2) Sub-Function
+ Switch (ToInteger(Arg2))
+ {
+
+ case (GPS_FUNC_SUPPORT)
+ {
+
+ Name(FMSK, Buffer(0x8)
+ {
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+ })
+ Store(Buffer(0x8)
+ {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }, Local0)
+ Divide(GPS_FUNC_SUPPORT, 0x8, Local2, Local1)
+ // Local1 is Quotient, Local2 is Remainder
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_GETCALLBACKS, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_PSHARESTATUS, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_GETPSS, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_SETPPC, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_GETPPC, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_PSHAREPARAMS, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+
+ // mask out specific functions
+ Store( SizeOf(Local0), Local1)
+ While( LNotEqual(Local1, 0) ) {
+ Decrement(Local1)
+ Store( DeRefOf(Index(FMSK, Local1)), Local2)
+ And( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1) )
+ }
+
+ Return(Local0)
+ }
+ //
+ // Function 19: GPS_FUNC_GETCALLBACKS,
+ //
+ case(GPS_FUNC_GETCALLBACKS)
+ {
+ Store("GPS fun 19", Debug)
+ return(arg3)
+ }
+ //
+ // Function 32: GPS_FUNC_PSHARESTATUS,
+ //
+ case(GPS_FUNC_PSHARESTATUS)
+ {
+ Store("GPS fun 20", Debug)
+
+ Name(RET1, Zero)
+ CreateBitField(Arg3,24,NRIT) //new request new IGP turbo state(bit 24 is valid)
+ CreateBitField(Arg3,25,NRIS) //request new IGP turbo state
+ if (NRIS){
+ if(NRIT){
+ Or(RET1, 0x01000000, RET1)
+ }else
+ {
+ //help disable IGP turbo boost
+ And(RET1, 0xFeFFFFFF, RET1)
+ }
+ }
+ Or(RET1, 0x40000000, RET1) // if this machine support GPS
+
+ if(NLIM){
+ Or(RET1, 0x00000001, RET1) // if NLIM falg is set, set bit0 =1
+ }
+
+ Return(RET1)
+ }
+ //
+ // Function 33: GPS_FUNC_GETPSS, Get CPU _PSS structure
+ //
+ case(GPS_FUNC_GETPSS)
+ {
+ Return(\_PR.CPU0._PSS)
+ }
+ //
+ // Function 34: GPS_FUNC_SETPPC, Set current CPU _PPC limit
+ //
+ case(GPS_FUNC_SETPPC)
+ {
+ CreateBYTEField(Arg3, 0, PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU0, 0x80)
+ store(PCAP, PSAP)
+ Return(PCAP)
+ }
+ //
+ // Function 35: GPS_FUNC_GETPPC, Get current CPU _PPC limit
+ //
+ case(GPS_FUNC_GETPPC)
+ {
+ Return(PSAP)
+ }
+
+ case(0x25)
+ {
+ Store("GPS fun 25", Debug)
+ return(\_PR_.CPU0._TSS)
+ }
+ case(0x26)
+ {
+ Store("GPS fun 26", Debug)
+ CreateDWordField(Arg3, Zero, TCAP)
+ Store(TCAP, \_PR_.CPU0._PTC)
+ Notify(\_PR_.CPU0, 0x80)
+ return(TCAP) }
+ //
+ // Function 42: GPS_FUNC_PSHAREPARAMS, Get Power Steering platform parameters
+ //
+ case(GPS_FUNC_PSHAREPARAMS)
+ {
+ Store("GPS fun 2a", Debug)
+
+ CreateBYTEField(Arg3,0,PSH0)
+ CreateBYTEField(Arg3,1,PSH1)
+ CreateBitField(Arg3,8,GPUT)
+ CreateBitField(Arg3,9,CPUT)
+ CreateBitField(Arg3,10,FANS)
+ CreateBitField(Arg3,11,SKIN)
+ CreateBitField(Arg3,12,ENGR)
+ CreateBitField(Arg3,13,SEN1)
+ CreateBitField(Arg3,14,SEN2)
+
+ switch (PSH0){
+ case(0){
+ if(CPUT){
+ store(0x00000200, RETN)
+ Or(RETN, PSH0, RETN)
+ // Please return CPU or EC tempture to PDTS
+ store(\_SB.PCI0.LPCB.H_EC.GTVR,PDTS)
+ }
+ return(GPSP)
+ } //case(0)
+
+ case(1){
+ store(0x00000300, RETN) //need to return CPU and GPU status bits for Querytype1
+ Or(RETN, PSH0, RETN)
+ store(1000,PDTS)
+ return(GPSP)
+ } //case(1)
+
+ case(2){
+ store(0x0102, RETN) //RETN[0:3] need to be the same as input argument, bit8 is GPU temp status bit
+ store(0x00000000, VRV1)
+ store(0x00000000, TGPU)
+ store(0x00000000, PDTS)
+ store(0x00000000, SFAN)
+ store(0x00000000, CPUE)
+ store(0x00000000, SKNT)
+ store(0x00000000, TMP1)
+ store(0x00000000, TMP2)
+ return(GPSP)
+ } //case(2)
+ } // PSH0 of switch
+
+ }
+ } // end of switch
+
+ Return(0x80000002)
+ } // end GPS
+
+
+} // end DGPUPCH_SCOPE scope
+
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvSSDTPCH.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvSSDTPCH.asl
new file mode 100644
index 0000000..a4d8fc3
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvSSDTPCH.asl
@@ -0,0 +1,365 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/NvSSDTPCH.asl 2 2/21/13 5:42a Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 2/21/13 5:42a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/NvSSDTPCH.asl $
+//
+// 2 2/21/13 5:42a Joshchou
+// [TAG] EIP106524
+// [Category] New Feature
+// [Description] Support GC6 function for Optimus
+//
+// 1 1/15/13 6:03a Joshchou
+// [TAG] EIP107237
+// [Category] Improvement
+// [Description] Create componet for SG support on PCH
+// [Files] SgUltNvidia.cif
+// NVdGPUPCH.asl
+// NViGPUPCH.asl
+// NViGDmiscPCH.asl
+// OpSSDTPCH.asl
+// NvVenturaPCH.asl
+// NvGPSPCH.asl
+// NvSSDTPCH.asl
+//
+// 5 12/22/11 6:31a Alanlin
+// Declared "defined(SGTPV_ASL_DEBUG) && (SGTPV_ASL_DEBUG ==1)"
+//
+//
+// 3 12/02/11 12:38a Alanlin
+// [TAG] EIP75359
+// [Category] Improvement
+// [Description] Report _STA asl method to PCIe root port for nVidia
+// GPU.
+//
+// 2 10/14/11 2:59a Alanlin
+// [TAG] EIP64451
+// [Category] New Feature
+// [Description] Optimus GPS feature update
+// [Files] NvSSDT.asl
+// NViGPU.asl
+// OpSSDT.asl
+// NvGPS.asl
+// SgNvidia.cif
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+//
+//
+// 5 3/17/11 6:17p Alexp
+// Optimus:Add code to preserve HD AudioCodec enable flag in CMOS
+//
+// 4 11/12/10 1:25p Alexp
+// rename ELCT to ELCL in order to avoid name conflict with Intel's ref
+// code in SgDGPU.asl
+//
+// 3 10/06/10 3:34p Alexp
+// Include defines for different Nvidia GUID functions. Helps to control
+// inclusion of peices of ASL depending on type of desired SG mode
+//
+// 2 10/05/10 7:14p Alexp
+// 1. Added debug macro to be able to insert check points in target ASL
+// code
+// 2. Reuse NVdGPU.asl file to build OpSSDT for Optimus and NvSSDT for
+// MUXed SG targets.
+// NvOptimus.asl no longer required
+//
+// 1 9/17/10 1:21p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgNvidia.cif;
+// NvSSDT.asl; NVdGPU.asl;NViGPU.asl;NViGDmisc
+// OpSSDT.asl;NvOptimus.asl;NvVenture.asl
+//
+//
+//**********************************************************************
+
+DefinitionBlock (
+ "Nvidia.aml",
+ "SSDT",
+ 1,
+ "NvdRef",
+ "NvdTabl",
+ 0x1000
+ ) {
+
+#define HYBRID_DSM_GUID 1
+#define MXM_DSM_GUID 1
+//#define NBCI_DSM_GUID 1
+
+External(P8XH, MethodObj)
+
+#if defined(SGTPV_ASL_DEBUG) && (SGTPV_ASL_DEBUG ==1)
+#define P8DB(arg0, arg1, arg2) P8XH (0, arg1) P8XH (1, arg0) sleep(arg2)
+#else
+#define P8DB(arg0, arg1, arg2)
+#endif
+
+External(PCI_SCOPE, DeviceObj)
+External(SG_ULT_RP_NUM, DeviceObj)
+External(DGPUPCH_SCOPE, DeviceObj)
+External(IGPU_SCOPE, DeviceObj)
+External(DGPUPCH_SCOPE._ADR, DeviceObj)
+External(IGPU_SCOPE._DSM, MethodObj)
+External(DGPUPCH_SCOPE.SGST, MethodObj)
+External(DGPUPCH_SCOPE.SGON, MethodObj)
+External(DGPUPCH_SCOPE.SGOF, MethodObj)
+External(DGPUPCH_SCOPE.SGPI, MethodObj)
+External(DGPUPCH_SCOPE.SGPO, MethodObj)
+External(\DSEL)
+External(\ESEL)
+External(\SSEL)
+External(\PSEL)
+External(\HLRS)
+External(\PWEN)
+External(\SGMD)
+External(\SGFL)
+External(\SSMP)
+External(\PWOK)
+
+#include <NVdGPUPCH.ASL> // Include DGPU device namespace
+#include <NViGPUPCH.ASL> // Include NVHG DSM calls
+#include <NViGDmiscPCH.ASL> // Include misc event callback methods
+#if NV_VENTURA_SUPPORT == 1
+#include <NvVenturaPCH.ASL> // Include Ventura support
+#endif
+#if NV_GPS_SUPPORT == 1
+#include <NvGPSPCH.ASL> // Include GPS support
+#endif
+
+#if NV_GC6_SUPPORT == 1
+#include <NvGC6PCH.ASL> // Include GC6 support
+#endif
+
+Scope(SG_ULT_RP_NUM)
+{
+ Method(_STA,0,Serialized)
+ {
+ Return(0x000F)
+ }
+}
+Scope(PCI_SCOPE)
+{
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: WMI1
+//
+// Description: WMI MXM Mapper. ASL Device is used to acccess Mxm native method via WMI API
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Device(WMI1) // placed within PCI Bus scope parallel to iGPU
+ {
+ Name(_HID, "PNP0C14")
+ Name(_UID, "MXM2")
+
+ Name(_WDG, Buffer()
+ {
+ // Methods GUID {F6CB5C3C-9CAE-4ebd-B577-931EA32A2CC0}
+ 0x3C, 0x5C, 0xCB, 0xF6, 0xAE, 0x9C, 0xbd, 0x4e, 0xB5, 0x77, 0x93, 0x1E,
+ 0xA3, 0x2A, 0x2C, 0xC0,
+ 0x4D, 0x58, // Object ID "MX" = method "WMMX"
+ 1, // Instance Count
+ 0x02, // Flags (WMIACPI_REGFLAG_METHOD)
+
+ // NVHG_NOTIFY_POLICYCHANGE
+ // WMI Notify - Hybrid Policy Request D0
+ // GUID {921A2F40-0DC4-402d-AC18-B48444EF9ED2}
+ 0x40, 0x2F, 0x1A, 0x92, 0xC4, 0x0D, 0x2D, 0x40, 0xAC, 0x18, 0xB4, 0x84, 0x44, 0xEF, 0x9E, 0xD2,
+ 0xD0, 0x00, 0x01, 0x08,
+
+ // NVHG_NOTIFY_POLICYSET
+ // WMI Notify D9 - Hybrid Policy Set
+ // GUID {C12AD361-9FA9-4C74-901F-95CB0945CF3E}
+ 0x61, 0xD3, 0x2A, 0xC1, 0xA9, 0x9F, 0x74, 0x4C, 0x90, 0x1F, 0x95, 0xCB, 0x09, 0x45, 0xCF, 0x3E,
+ 0xD9, 0x00, 0x01, 0x08,
+
+ // NVHG_DISPLAY_SCALING
+ // Notify event DB - Display scaling change
+ // GUID {42848006-8886-490E-8C72-2BDCA93A8A09}
+ 0x06, 0x80, 0x84, 0x42, 0x86, 0x88, 0x0E, 0x49, 0x8C, 0x72, 0x2B, 0xDC, 0xA9, 0x3A, 0x8A, 0x09,
+ 0xDB, 0x00, 0x01, 0x08,
+
+ // NVHG_DISPLAY_HOTKEY, ACPI_NOTIFY_PANEL_SWITCH GUID
+ // Notify event 80 (fixed) - Hot-Key, use _DGS, _DCS etc.
+ // GUID {E06BDE62-EE75-48F4-A583-B23E69ABF891}
+ 0x62, 0xDE, 0x6B, 0xE0, 0x75, 0xEE, 0xF4, 0x48, 0xA5, 0x83, 0xB2, 0x3E, 0x69, 0xAB, 0xFB, 0x91,
+ 0x80, 0x00, 0x01, 0x08,
+
+ // NVHG_DISPLAY_HOTplug, ACPI_NOTIFY_DEVICE_HOTPLUG
+ // Notify event 81 (fixed) - Hot-Plug, query _DCS
+ // GUID {3ADEBD0F-0C5F-46ED-AB2E-04962B4FDCBC}
+ 0x0F, 0xBD, 0xDe, 0x3A, 0x5F, 0x0C, 0xED, 0x46, 0xAB, 0x2E, 0x04, 0x96, 0x2B, 0x4F, 0xDC, 0xBC,
+ 0x81, 0x00, 0x01, 0x08,
+
+ // NVHG_BRIGHTNESS_INC, ACPI_NOTIFY_INC_BRIGHTNESS_HOTKEY
+ // Notify event 86 (fixed) - Backlight Increase
+ // GUID {1E519311-3E75-4208-B05E-EBE17E3FF41F}
+ 0x11, 0x93, 0x51, 0x1E, 0x75, 0x3E, 0x08, 0x42, 0xB0, 0x5E, 0xEB, 0xE1, 0x7E, 0x3F, 0xF4, 0x1F,
+ 0x86, 0x00, 0x01, 0x08,
+
+ // NVHG_BRIGHTNESS_DEC, ACPI_NOTIFY_DEC_BRIGHTNESS_HOTKEY
+ // Notify event 87 (fixed) - Backlight Decrease
+ // GUID {37F85341-4418-4F24-8533-38FFC7295542}
+ 0x41, 0x53, 0xF8, 0x37, 0x18, 0x44, 0x24, 0x4F, 0x85, 0x33, 0x38, 0xFF, 0xC7, 0x29, 0x55, 0x42,
+ 0x87, 0x00, 0x01, 0x08,
+
+ // MOF data {05901221-D566-11d1-B2F0-00A0C9062910}
+ 0x21, 0x12, 0x90, 0x05, 0x66, 0xd5, 0xd1, 0x11, 0xb2, 0xf0,
+ 0x00, 0xa0, 0xc9, 0x06, 0x29, 0x10,
+ 0x58, 0x4D, // Object ID "XM"
+ 1, // Instance Count = 1
+ 0x00 // Flags
+ }
+ ) // End of _WDG
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: WMMX
+//
+// Description: WMI Method execution tunnel. MXM Native methods are called via WMMX index.
+//
+// Input:
+// Arg1: Integer GPU index. 0x10-iGPU, 0x0-0xf - dGPU
+//
+// Output:
+// Buffer specific to the funcion being called
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(WMMX, 3)
+ {
+
+ //Arg1 = 0x10 indicates iGPU, 0x0~0x0F for dgpu
+ CreateDwordField(Arg2, 0, FUNC) // Get the function name
+ If (LEqual(FUNC, 0x4D53445F)) // "_DSM"
+ {
+ If (LGreaterEqual(SizeOf(Arg2), 28))
+ {
+ CreateField(Arg2, 0, 128, MUID)
+ CreateDwordField(Arg2, 16, REVI)
+ CreateDwordField(Arg2, 20, SFNC)
+ CreateField(Arg2, 0xe0, 0x20, XRG0)
+
+ If(LNotEqual(Arg1,0x10))
+ {
+ If (CondRefOf(IGPU_SCOPE._DSM)) // common with dGPU DSM functions
+ {
+ Return(IGPU_SCOPE._DSM(MUID, REVI, SFNC, XRG0))
+ }
+ }
+ }
+ }
+
+ ElseIf (LEqual(FUNC, 0x584D584D)) // "MXMX"
+ {
+ CreateDWordField(Arg2, 8, XRG1)
+ If (LEqual(Arg1, 0x10))
+ {
+ Return(IGPU_SCOPE.MXMX(XRG1))
+ }
+ Else
+ {
+ Return(DGPUPCH_SCOPE.MXMX(XRG1))
+ }
+ }
+
+ ElseIf (LEqual(FUNC, 0x5344584D)) // "MXDS"
+ {
+ CreateDWordField(Arg2, 8, XRG2)
+ If (LEqual(Arg1, 0x10))
+ {
+ Return(IGPU_SCOPE.MXDS(XRG2))
+ }
+ Else
+ {
+ Return(DGPUPCH_SCOPE.MXDS(XRG2))
+ }
+ }
+ Return(0)
+ } // End of WMMX
+
+ Name(WQXM, Buffer()
+ {
+ 0x46,0x4F,0x4D,0x42,0x01,0x00,0x00,0x00,0x8B,0x02,0x00,0x00,0x0C,0x08,0x00,0x00,
+ 0x44,0x53,0x00,0x01,0x1A,0x7D,0xDA,0x54,0x18,0xD2,0x83,0x00,0x01,0x06,0x18,0x42,
+ 0x10,0x05,0x10,0x8A,0xE6,0x80,0x42,0x04,0x92,0x43,0xA4,0x30,0x30,0x28,0x0B,0x20,
+ 0x86,0x90,0x0B,0x26,0x26,0x40,0x04,0x84,0xBC,0x0A,0xB0,0x29,0xC0,0x24,0x88,0xFA,
+ 0xF7,0x87,0x28,0x09,0x0E,0x25,0x04,0x42,0x12,0x05,0x98,0x17,0xA0,0x5B,0x80,0x61,
+ 0x01,0xB6,0x05,0x98,0x16,0xE0,0x18,0x92,0x4A,0x03,0xA7,0x04,0x96,0x02,0x21,0xA1,
+ 0x02,0x94,0x0B,0xF0,0x2D,0x40,0x3B,0xA2,0x24,0x0B,0xB0,0x0C,0x23,0x02,0x8F,0x82,
+ 0xA1,0x71,0x68,0xEC,0x30,0x2C,0x13,0x4C,0x83,0x38,0x8C,0xB2,0x91,0x45,0x60,0xDC,
+ 0x4E,0x05,0xC8,0x15,0x20,0x4C,0x80,0x78,0x54,0x61,0x34,0x07,0x45,0xE0,0x42,0x63,
+ 0x64,0x40,0xC8,0xA3,0x00,0xAB,0xA3,0xD0,0xA4,0x12,0xD8,0xBD,0x00,0x8D,0x02,0xB4,
+ 0x09,0x70,0x28,0x40,0xA1,0x00,0x6B,0x18,0x72,0x06,0x21,0x5B,0xD8,0xC2,0x68,0x50,
+ 0x80,0x45,0x14,0x8D,0xE0,0x2C,0x2A,0x9E,0x93,0x50,0x02,0xDA,0x1B,0x82,0xF0,0x8C,
+ 0xD9,0x18,0x9E,0x10,0x83,0x54,0x86,0x21,0x88,0xB8,0x11,0x8E,0xA5,0xFD,0x41,0x10,
+ 0xF9,0xAB,0xD7,0xB8,0x1D,0x69,0x34,0xA8,0xB1,0x26,0x38,0x76,0x8F,0xE6,0x84,0x3B,
+ 0x17,0x20,0x7D,0x6E,0x02,0x39,0xBA,0xD3,0xA8,0x73,0xD0,0x64,0x78,0x0C,0x2B,0xC1,
+ 0x7F,0x80,0x4F,0x01,0x78,0xD7,0x80,0x9A,0xFE,0xC1,0x33,0x41,0x70,0xA8,0x21,0x7A,
+ 0xD4,0xE1,0x4E,0xE0,0xBC,0x8E,0x84,0x41,0x1C,0xD1,0x71,0x63,0x67,0x75,0x32,0x07,
+ 0x5D,0xAA,0x00,0xB3,0x07,0x00,0x0D,0x2E,0xC1,0x69,0x9F,0x49,0xE8,0xF7,0x80,0xF3,
+ 0xE9,0x79,0x6C,0x6C,0x10,0xA8,0x91,0xF9,0xFF,0x0F,0xED,0x41,0x9E,0x56,0xCC,0x90,
+ 0xCF,0x02,0x87,0xC5,0xC4,0x1E,0x19,0xE8,0x78,0xC0,0x7F,0x00,0x78,0x34,0x88,0xF0,
+ 0x66,0xE0,0xF9,0x9A,0x60,0x50,0x08,0x39,0x19,0x0F,0x4A,0xCC,0xF9,0x80,0xCC,0x25,
+ 0xC4,0x43,0xC0,0x31,0xC4,0x08,0x7A,0x46,0x45,0x23,0x6B,0x22,0x3E,0x03,0x78,0xDC,
+ 0x96,0x05,0x42,0x09,0x0C,0xEC,0x73,0xC3,0x3B,0x84,0x61,0x71,0xA3,0x09,0xEC,0xF3,
+ 0x85,0x05,0x0E,0x0A,0x05,0xEB,0xBB,0x42,0xCC,0xE7,0x81,0xE3,0x3C,0x60,0x0B,0x9F,
+ 0x28,0x01,0x3E,0x24,0x8F,0x06,0xDE,0x20,0xE1,0x5B,0x3F,0x02,0x10,0xE0,0x27,0x06,
+ 0x13,0x58,0x1E,0x30,0x7A,0x94,0xF6,0x2B,0x00,0x21,0xF8,0x8B,0xC5,0x53,0xC0,0xEB,
+ 0x40,0x84,0x63,0x81,0x29,0x72,0x6C,0x68,0x78,0x7E,0x70,0x88,0x1E,0xF5,0x5C,0xC2,
+ 0x1F,0x4D,0x94,0x53,0x38,0x1C,0x1F,0x39,0x8C,0x10,0xFE,0x49,0xE3,0xC9,0xC3,0x9A,
+ 0xEF,0x00,0x9A,0xD2,0x5B,0xC0,0xFB,0x83,0x47,0x80,0x11,0x20,0xE1,0x68,0x82,0x89,
+ 0x7C,0x3A,0x01,0xD5,0xFF,0xFF,0x74,0x02,0xB8,0xBA,0x01,0x14,0x37,0x6A,0x9D,0x49,
+ 0x7C,0x2C,0xF1,0xAD,0xE4,0xBC,0x43,0xC5,0x7F,0x93,0x78,0x3A,0xF1,0x34,0x1E,0x4C,
+ 0x42,0x44,0x89,0x18,0x21,0xA2,0xEF,0x27,0x46,0x08,0x15,0x31,0x6C,0xA4,0x37,0x80,
+ 0xE7,0x13,0xE3,0x84,0x08,0xF4,0x74,0xC2,0x42,0x3E,0x34,0xA4,0xE1,0x74,0x02,0x50,
+ 0xE0,0xFF,0x7F,0x3A,0x81,0x1F,0xF5,0x74,0x82,0x1E,0xAE,0x4F,0x19,0x18,0xE4,0x03,
+ 0xF2,0xA9,0xC3,0xF7,0x1F,0x13,0xF8,0x78,0xC2,0x45,0x1D,0x4F,0x50,0xA7,0x07,0x1F,
+ 0x4F,0xD8,0x19,0xE1,0x2C,0x1E,0x03,0x7C,0x3A,0xC1,0xDC,0x13,0x7C,0x3A,0x01,0xDB,
+ 0x68,0x60,0x1C,0x4F,0xC0,0x77,0x74,0xC1,0x1D,0x4F,0xC0,0x30,0x18,0x18,0xE7,0x13,
+ 0xE0,0x31,0x5E,0xDC,0x31,0xC0,0x43,0xE0,0x03,0x78,0xDC,0x38,0x3D,0x2B,0x9D,0x14,
+ 0xF2,0x24,0xC2,0x07,0x85,0x39,0xB0,0xE0,0x14,0xDA,0xF4,0xA9,0xD1,0xA8,0x55,0x83,
+ 0x32,0x35,0xCA,0x34,0xA8,0xD5,0xA7,0x52,0x63,0xC6,0xCE,0x19,0x0E,0xF8,0x10,0xD0,
+ 0x89,0xC0,0xF2,0x9E,0x0D,0x02,0xB1,0x0C,0x0A,0x81,0x58,0xFA,0xAB,0x45,0x20,0x0E,
+ 0x0E,0xA2,0xFF,0x3F,0x88,0x23,0xD2,0x0A,0xC4,0xFF,0x7F,0x7F
+ }
+ ) // End of WQXM
+ } // End of WMI1 Device
+ } // end scope PCI0
+} // end SSDT
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvVenturaPCH.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvVenturaPCH.asl
new file mode 100644
index 0000000..f89191e
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/NvVenturaPCH.asl
@@ -0,0 +1,521 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/NvVenturaPCH.asl 1 1/15/13 6:03a Joshchou $
+//
+// $Revision: 1 $
+//
+// $Date: 1/15/13 6:03a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/NvVenturaPCH.asl $
+//
+// 1 1/15/13 6:03a Joshchou
+// [TAG] EIP107237
+// [Category] Improvement
+// [Description] Create componet for SG support on PCH
+// [Files] SgUltNvidia.cif
+// NVdGPUPCH.asl
+// NViGPUPCH.asl
+// NViGDmiscPCH.asl
+// OpSSDTPCH.asl
+// NvVenturaPCH.asl
+// NvGPSPCH.asl
+// NvSSDTPCH.asl
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+//
+
+//
+// 2 10/05/10 7:14p Alexp
+// 1. Added debug macro to be able to insert check points in target ASL
+// code
+// 2. Reuse NVdGPU.asl file to build OpSSDT for Optimus and NvSSDT for
+// MUXed SG targets.
+// NvOptimus.asl no longer required
+//
+// 1 9/17/10 1:21p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgNvidia.cif;
+// NvSSDT.asl; NVdGPU.asl;NViGPU.asl;NViGDmisc
+// OpSSDT.asl;NvOptimus.asl;NvVenture.asl
+//
+// 1 6/08/10 3:45p Alexp
+//
+//**********************************************************************
+// (Ventura+)>
+EXTERNAL(\_PR.CPU0, DeviceObj)
+EXTERNAL(\_PR.CPU1, DeviceObj)
+EXTERNAL(\_PR.CPU2, DeviceObj)
+EXTERNAL(\_PR.CPU3, DeviceObj)
+//> Andy+ for ClarksField -- 8 processors
+EXTERNAL(\_PR.CPU4, DeviceObj)
+EXTERNAL(\_PR.CPU5, DeviceObj)
+EXTERNAL(\_PR.CPU6, DeviceObj)
+EXTERNAL(\_PR.CPU7, DeviceObj)
+//<
+External(\_PR.CPU0._PSS, BuffObj)
+External(\_PR.CPU0._TSS, BuffObj)
+
+External(\_PR.CPU0._PPC, IntObj)
+External(\_PR.CPU1._PPC, IntObj)
+External(\_PR.CPU2._PPC, IntObj)
+External(\_PR.CPU3._PPC, IntObj)
+//> Andy+ for ClarksField -- 8 processors
+External(\_PR.CPU4._PPC, IntObj)
+External(\_PR.CPU5._PPC, IntObj)
+External(\_PR.CPU6._PPC, IntObj)
+External(\_PR.CPU7._PPC, IntObj)
+//<
+External(\_PR.CPU0._TPC, IntObj)
+External(\_PR.CPU1._TPC, IntObj)
+External(\_PR.CPU2._TPC, IntObj)
+External(\_PR.CPU3._TPC, IntObj)
+//> Andy+ for ClarksField -- 8 processors
+External(\_PR.CPU4._TPC, IntObj)
+External(\_PR.CPU5._TPC, IntObj)
+External(\_PR.CPU6._TPC, IntObj)
+External(\_PR.CPU7._TPC, IntObj)
+//<
+Scope(PCI_SCOPE){
+
+ Name(VEN, "VENACPI 2009-Nov-23 14:56:05") // MCPACPIP build time stamp.
+
+} // end of Scope
+
+Scope (DGPUPCH_SCOPE)
+{
+ // value used to notify iGPU
+
+ Name(VSTS, 1) // Ventura Status
+ Name(THBG, 50000) // Thermal Budget
+ Name(PSCP, 0) // P-State capacity, mainly for s/w debugging
+ Name(TBUD, 0x88B8) // Thermal Budget
+// Name(PBCM, 0)
+
+ // Called by EC to notify thermal budget/status change
+ // Arg0 is one of SPB_EC_ values
+ // Arg1 is an object reference
+ Method (THCH, 2, NotSerialized)
+ {
+ Switch (ToInteger(Arg0))
+ {
+ case ( 0x03)
+ {
+ // VSTS needs to be updated before notification
+ Store(DeRefOf(Arg1), VSTS)
+ Notify(DGPUPCH_SCOPE, 0xC0)
+ }
+ case ( 0x01)
+ {
+ // THBG needs to be updated before notification
+ Store(DeRefOf(Arg1), THBG)
+ Notify(DGPUPCH_SCOPE, 0xC1)
+ }
+ }
+ }
+
+ // Wrapper to call Method(SPB)
+ Method (SPB2, 2, NotSerialized)
+ {
+ Store( Buffer() {0x00, 0x00, 0x00, 0x00}, Local0 )
+ CreateDwordField(Local0, 0, LLLL)
+ Store( Arg1, LLLL )
+ Return( SPB(0x00, 0x101, Arg0, Local0) )
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: SPB
+//
+// Description: Called from _DSM -Device Specific Method for dGPU device.
+// Implement Ventura specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// Ventura DSM_GUID 95DB88FD-940A-4253-A446-70CE0504AEDF
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method (SPB, 4, NotSerialized)
+ {
+
+ Store("------- SPB DSM --------", Debug)
+ // Only Interface Revision 0x0101 is supported
+ If (LNotEqual(Arg1, 0x101))
+ {
+ Return(0x80000002)
+ }
+
+ // (Arg2) Sub-Function
+ Switch (ToInteger(Arg2))
+ {
+ case (0x00)
+ {
+ Name(FMSK, Buffer(0x8)
+ {
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+ })
+ Store(Buffer(0x8)
+ {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }, Local0)
+ Divide(Zero, 0x8, Local2, Local1)
+ // Local1 is Quotient, Local2 is Remainder
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x20, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x21, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x22, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x23, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x24, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x2A, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ // mask out specific functions
+ Store( SizeOf(Local0), Local1)
+ While( LNotEqual(Local1, 0) ) {
+ Decrement(Local1)
+ Store( DeRefOf(Index(FMSK, Local1)), Local2)
+ And( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1) )
+ }
+
+ Return(Local0)
+ }
+
+ // Unit is mWAT
+ case(0x20)
+ {
+ Store(TBUD, Local1)
+ //failsafe to clear ventura status bit
+ And(Local1, 0xFFFFF, Local1)
+ // Just return SPB status for now (bit[0]=1 SPB enabled)
+// If(CondRefOf(PBCM,Local0)){ // Make sure this object is present.
+// If(PBCM){
+// // Software/EC have another chance to disable ventura through VSTS
+// If(LNotEqual(VSTS, 0)) {
+// Or( Local1, 0x40000000, Local1 )
+// }
+// }
+// }
+ Return(Local1)
+ }
+
+ case(0x21)
+ {
+ Return(\_PR.CPU0._PSS)
+ }
+
+ case(0x22)
+ {
+ CreateByteField(Arg3, 0, PCAP)
+
+ Store(PCAP, PSCP)
+ // \_PR.CPU0._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU0, 0x80)
+
+ If(CondRefOf(\_PR.CPU1._PPC, Local0)) {
+ // \_PR.CPU1._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU1, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU2._PPC, Local0)) {
+ // \_PR.CPU2._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU2, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU3._PPC, Local0)) {
+ // \_PR.CPU3._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU3, 0x80)
+ }
+
+//> Andy+ for ClarksField -- 8 processors
+ If(CondRefOf(\_PR.CPU4._PPC, Local0)) {
+ // \_PR.CPU4._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU4, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU5._PPC, Local0)) {
+ // \_PR.CPU5._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU5, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU6._PPC, Local0)) {
+ // \_PR.CPU6._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU6, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU7._PPC, Local0)) {
+ // \_PR.CPU7._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU7, 0x80)
+ }
+//<
+
+ Return(PCAP)
+ }
+
+ case( 0x23)
+ {
+ Return(PSCP)
+ }
+
+ case(0x24)
+ {
+ CreateField(Arg3, 0, 20, THBG)
+ CreateField(Arg3, 30, 1, DDVE)
+ }
+ case(0x2a)
+ {
+ Return(SSNR(Arg3))
+ }
+ } // end of switch
+
+ Return(0x80000002)
+ } // end SPB
+
+ // Ventura Sensor parameters header structure
+ Name(SBHS, Buffer(0x8) {})
+ CreateDWordField(SBHS, 0, VERV)
+ CreateDWordField(SBHS, 4, NUMS)
+
+ // Ventura CPU Sensor structure
+ Name(SSCP, Buffer(44) {})
+ CreateDWordField(SSCP, 4, CSNT)
+ CreateDWordField(SSCP, 8, CPTI)
+ CreateDWordField(SSCP, 12, CICA)
+ CreateDWordField(SSCP, 16, CIRC)
+ CreateDWordField(SSCP, 20, CICV)
+ CreateDWordField(SSCP, 24, CIRA)
+ CreateDWordField(SSCP, 28, CIAV)
+ CreateDWordField(SSCP, 32, CIEP)
+ CreateDWordField(SSCP, 36, CPPF)
+ CreateDWordField(SSCP, 40, CSNR)
+
+ // Ventura GPU Sensor structure
+ Name(SSGP, Buffer(44) {})
+ CreateDWordField(SSGP, 4, GSNT)
+ CreateDWordField(SSGP, 8, GPTI)
+ CreateDWordField(SSGP, 12, GICA)
+ CreateDWordField(SSGP, 16, GIRC)
+ CreateDWordField(SSGP, 20, GICV)
+ CreateDWordField(SSGP, 24, GIRA)
+ CreateDWordField(SSGP, 28, GIAV)
+ CreateDWordField(SSGP, 32, GIEP)
+ CreateDWordField(SSGP, 36, GPPF)
+ CreateDWordField(SSGP, 40, GSNR)
+
+ // Ventura CPU Parameters Structure
+ Name(SCPP, Buffer(72) {})
+ CreateDWordField(SCPP, 0, VRV1)
+ CreateDWordField(SCPP, 4, VCAP)
+ CreateDWordField(SCPP, 8, VCCP)
+ CreateDWordField(SCPP, 12, VCDP)
+ CreateDWordField(SCPP, 16, VCEP)
+ CreateDWordField(SCPP, 20, VCGP)
+ CreateDWordField(SCPP, 24, VCHP)
+ CreateDWordField(SCPP, 28, VCXP)
+ CreateDWordField(SCPP, 32, VCYP)
+ CreateDWordField(SCPP, 36, VCZP)
+ CreateDWordField(SCPP, 40, VCKP)
+ CreateDWordField(SCPP, 44, VCMP)
+ CreateDWordField(SCPP, 48, VCNP)
+ CreateDWordField(SCPP, 52, VCAL)
+ CreateDWordField(SCPP, 56, VCBE)
+ CreateDWordField(SCPP, 60, VCGA)
+ CreateDWordField(SCPP, 64, VCPP)
+ CreateDWordField(SCPP, 68, VCDE)
+
+// Ventura GPU Parameters Structure
+ Name(SGPP, Buffer(40) {})
+ CreateDWordField(SGPP, 0, VRV2)
+ CreateDWordField(SGPP, 4, VGWP)
+ CreateDWordField(SGPP, 8, VGPP)
+ CreateDWordField(SGPP, 12, VGQP)
+ CreateDWordField(SGPP, 16, VGRP)
+ CreateDWordField(SGPP, 20, VGAP)
+ CreateDWordField(SGPP, 24, VGBP)
+ CreateDWordField(SGPP, 28, VGCP)
+ CreateDWordField(SGPP, 32, VGDP)
+ CreateDWordField(SGPP, 36, VGDE)
+
+ Method(SSNR, 1)
+ {
+ Switch (ToInteger(Arg0))
+ {
+ case (0x00)
+ {
+ // Populate Header Structure
+ Store(0x00010000, VERV)
+ Store(0x02, NUMS)
+ Return(SBHS)
+ }
+ case (0x01)
+ {
+ Store(0x00010000, VRV1)
+ Store(0x3E8, VCAP) //VEN_CPU_PARAM_A_CK 0x3E8
+ Store(0x2EE, VCCP) //VEN_CPU_PARAM_C_CK 0x2EE
+ Store(0x2EE, VCDP) //VEN_CPU_PARAM_D_CK 0x2EE
+ Store(0x2EE, VCEP) //VEN_CPU_PARAM_E_CK 0x2EE
+ Store(0x79e, VCGP) //VEN_CPU_PARAM_G_CK 0x79e
+ Store(0x2bc, VCHP) //VEN_CPU_PARAM_H_CK 0x2bc
+ Store(0x258, VCXP) //VEN_CPU_PARAM_X_CK 0x258
+ Store(0x0fa, VCYP) //VEN_CPU_PARAM_Y_CK 0x0fa
+ Store(0x1f4, VCZP) //VEN_CPU_PARAM_Z_CK 0x1f4
+ Store(0x000, VCKP) //VEN_CPU_PARAM_K_CK 0x000
+ Store(0x000, VCMP) //VEN_CPU_PARAM_M_CK 0x000
+ Store(0x000, VCNP) //VEN_CPU_PARAM_N_CK 0x000
+ Store(0x000, VCPP) //VEN_CPU_PARAM_P_CK 0x000
+ Store(0x421, VCAL) //VEN_CPU_PARAM_AL_CK 0x421
+ Store(0x708, VCBE) //VEN_CPU_PARAM_BE_CK 0x708
+ Store(0x016, VCGA) //VEN_CPU_PARAM_GA_CK 0x016
+ Store(0x001, VCDE) //VEN_CPU_PARAM_DEL_CK 0x001
+/* Clarksfield 8 CPU
+ Store(0x3E8, VCAP)
+ Store(0x258, VCCP)
+ Store(0x258, VCDP)
+ Store(0x258, VCEP)
+ Store(0x2CF, VCGP)
+ Store(0x311, VCHP)
+ Store(0x136, VCXP)
+ Store(0x118, VCYP)
+ Store(0x19A, VCZP)
+ Store(0x001, VCKP)
+ Store(0x001, VCMP)
+ Store(0x001, VCNP)
+ Store(0x000, VCPP)
+ Store(0x36B, VCAL)
+ Store(0x13C, VCBE)
+ Store(0x019, VCGA)
+ Store(0x001, VCDE)
+end Clarksfield 8CPUs*/
+
+ Return(SCPP)
+ }
+ case (0x02)
+ {
+ Store(0x00010000, VRV2)
+ Store(0x3E8, VGWP)
+ Store(0x2EE, VGPP)
+ Store(0x2EE, VGQP)
+ Store(0x2EE, VGRP)
+ Store(0x001, VGAP)
+ Store(0x1F4, VGBP)
+ Store(0x000, VGCP)
+ Store(0x000, VGDP)
+ Store(0x001, VGDE)
+/* Clarksfield 8 CPU
+ Store(0x3E8, VGBP)
+ Store(0x001, VGCP)
+ Store(0x001, VGDP)
+ Store(0x000, VGDE)
+end Clarksfield 8CPUs*/
+ Return(SGPP)
+ }
+ case (0x03)
+ {
+ // The below sensor parameter values for GPU and CPU
+ // are board specific. To support for ventura, fill
+ // the SSCP and SSGP structures
+
+ // Populate CPU Sensor values
+ Store(0x0, Index(SSCP, 0)) // Indicate CPU sensor
+ Store(0x00, CSNT)
+ Store(0x01, CPTI)
+ Store(0x84, CICA) // 0x80
+ Store(0x00, CIRC)
+ Store(0x27FF, CICV)
+ Store(0x05, CIRA)
+ Store(0xA000, CIAV)
+ Store(0x03, CIEP)
+ Store(0x0F, CPPF)
+ Store(0x04, CSNR)
+
+ // Populate GPU Sensor values
+ Store(0x1, Index(SSGP, 0)) // Indicate GPU sensor
+ Store(0x00, GSNT)
+ Store(0x01, GPTI)
+ Store(0x8C, GICA) // 0x8A
+ Store(0x00, GIRC)
+ Store(0x27FF, GICV)
+ Store(0x05, GIRA)
+ Store(0xA000, GIAV)
+ Store(0x03, GIEP)
+ Store(0x0F, GPPF)
+ Store(0x04, GSNR)
+
+ Return(Concatenate(SSCP, SSGP))
+ }
+
+ } //switch end
+
+ Return(0x80000002)
+ }
+} // end DGPUPCH_SCOPE scope
+
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/OpSSDTPCH.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/OpSSDTPCH.asl
new file mode 100644
index 0000000..39ae4c7
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/OpSSDTPCH.asl
@@ -0,0 +1,292 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/OpSSDTPCH.asl 4 7/16/13 5:13a Joshchou $
+//
+// $Revision: 4 $
+//
+// $Date: 7/16/13 5:13a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/OpSSDTPCH.asl $
+//
+// 4 7/16/13 5:13a Joshchou
+// [TAG] None
+// [Category] New Feature
+// [Description] Add _DSW method to support MSHybrid.
+//
+// 3 2/21/13 5:42a Joshchou
+// [TAG] EIP106524
+// [Category] New Feature
+// [Description] Support GC6 function for Optimus
+//
+// 2 2/07/13 3:02a Joshchou
+//
+// 1 1/15/13 6:03a Joshchou
+// [TAG] EIP107237
+// [Category] Improvement
+// [Description] Create componet for SG support on PCH
+// [Files] SgUltNvidia.cif
+// NVdGPUPCH.asl
+// NViGPUPCH.asl
+// NViGDmiscPCH.asl
+// OpSSDTPCH.asl
+// NvVenturaPCH.asl
+// NvGPSPCH.asl
+// NvSSDTPCH.asl
+//
+// 5 12/22/11 6:31a Alanlin
+// Declared "defined(SGTPV_ASL_DEBUG) && (SGTPV_ASL_DEBUG ==1)"
+//
+//
+// 3 12/02/11 12:40a Alanlin
+// [TAG] EIP75359
+// [Category] Improvement
+// [Description] Report _STA asl method to PCIe root port for nVidia
+// GPU.
+//
+// 2 10/14/11 2:59a Alanlin
+// [TAG] EIP64451
+// [Category] New Feature
+// [Description] Optimus GPS feature update
+// [Files] NvSSDT.asl
+// NViGPU.asl
+// OpSSDT.asl
+// NvGPS.asl
+// SgNvidia.cif
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+//
+//
+// 6 3/17/11 6:17p Alexp
+// Optimus:Add code to preserve HD AudioCodec enable flag in CMOS
+//
+// 5 11/12/10 1:26p Alexp
+// rename ELCT to ELCL in order to avoid name conflict with Intel's ref
+// code in SgDGPU.asl
+//
+// 4 10/06/10 3:34p Alexp
+// Include defines for different Nvidia GUID functions. Helps to control
+// inclusion of peices of ASL depending on type of desired SG mode
+//
+// 3 10/05/10 7:14p Alexp
+// 1. Added debug macro to be able to insert check points in target ASL
+// code
+// 2. Reuse NVdGPU.asl file to build OpSSDT for Optimus and NvSSDT for
+// MUXed SG targets.
+// NvOptimus.asl no longer required
+//
+// 2 9/17/10 3:22p Alexp
+// remove test comments
+//
+// 1 9/17/10 1:21p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgNvidia.cif;
+// NvSSDT.asl; NVdGPU.asl;NViGPU.asl;NViGDmisc
+// OpSSDT.asl;NvOptimus.asl;NvVenture.asl
+//
+//**********************************************************************
+
+DefinitionBlock (
+ "NvOpt.aml",
+ "SSDT",
+ 1,
+ "OptRef",
+ "OptTabl",
+ 0x1000
+ ) {
+
+#define OPTIMUS_DSM_GUID 1
+//#define NBCI_DSM_GUID 1
+
+External(P8XH, MethodObj)
+#if defined(SGTPV_ASL_DEBUG) && (SGTPV_ASL_DEBUG ==1)
+#define P8DB(arg0, arg1, arg2) P8XH (0, arg1) P8XH (1, arg0) sleep(arg2)
+#else
+#define P8DB(arg0, arg1, arg2)
+#endif
+
+
+External(PCI_SCOPE, DeviceObj)
+External(SG_ULT_RP_NUM, DeviceObj)
+External(DGPUPCH_SCOPE, DeviceObj)
+External(IGPU_SCOPE, DeviceObj)
+External(DGPUPCH_SCOPE._ADR, DeviceObj)
+External(IGPU_SCOPE._DSM, MethodObj)
+External(DGPUPCH_SCOPE.SGST, MethodObj)
+External(DGPUPCH_SCOPE.SGON, MethodObj)
+External(DGPUPCH_SCOPE.SGOF, MethodObj)
+External(DGPUPCH_SCOPE.SGPI, MethodObj)
+External(DGPUPCH_SCOPE.SGPO, MethodObj)
+External(\DSEL)
+External(\ESEL)
+External(\SSEL)
+External(\PSEL)
+External(\HLRS)
+External(\PWEN)
+External(\PWOK)
+External(\SGMD)
+External(\SGFL)
+External(\SSMP)
+
+#include <NVdGPUPCH.ASL> // Include DGPU device namespace
+#include <NViGPUPCH.ASL> // Include NVHG DSM calls
+//#include <NViGDmiscPCH.ASL> // Include misc event callback methods
+
+#if NV_VENTURA_SUPPORT == 1
+#include <NvVenturaPCH.ASL> // Include Ventura support
+#endif
+#if NV_GPS_SUPPORT == 1
+#include <NvGPSPCH.ASL> // Include GPS support
+#endif
+
+#if NV_GC6_SUPPORT == 1
+#include <NvGC6PCH.ASL> // Include GC6 support
+#endif
+
+Scope(SG_ULT_RP_NUM)
+{
+ Method(_DSW, 3, NotSerialized)
+ {
+ If(Arg1)
+ {
+ Store("RP05 -_DSW call ", Debug)
+ }
+ Else
+ {
+ If(LAnd(Arg0, Arg2))
+ {
+ Store("RP05 -_DSW call-1 ", Debug)
+ }
+ Else
+ {
+ Store("RP05 -_DSW call-2 ", Debug)
+ }
+ }
+ }
+}
+
+ Scope(PCI_SCOPE)
+ {
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: WMI1
+//
+// Description: WMI MXM Mapper. ASL Device is used to acccess Nv Optimus native method via WMI API
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Device(WMI1) // placed within PCI Bus scope parallel to iGPU
+ {
+ Name(_HID, "PNP0C14")
+ Name(_UID, "OPT1")
+
+ Name(_WDG, Buffer()
+ {
+ // Methods GUID {F6CB5C3C-9CAE-4ebd-B577-931EA32A2CC0}
+ 0x3C, 0x5C, 0xCB, 0xF6, 0xAE, 0x9C, 0xbd, 0x4e, 0xB5, 0x77, 0x93, 0x1E,
+ 0xA3, 0x2A, 0x2C, 0xC0,
+ 0x4D, 0x58, // Object ID "MX" = method "WMMX"
+ 1, // Instance Count
+ 0x02, // Flags (WMIACPI_REGFLAG_METHOD)
+ }) // End of _WDG
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: WMMX
+//
+// Description: WMI Method execution tunnel. MXM Native methods are called via WMMX index.
+//
+// Input:
+// Arg1: Integer GPU index. 0x10-iGPU, 0x100+PCIe Bus number for the GPU
+//
+// Output:
+// Buffer specific to the funcion being called
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(WMMX, 3)
+ {
+
+ //Arg1 = 0x10 indicates iGPU, 0x100+PCIe Bus number for the GPU
+ //
+ CreateDwordField(Arg2, 0, FUNC) // Get the function name
+
+ If (LEqual(FUNC, 0x534F525F)) // "_ROM"
+ {
+ If (LGreaterEqual(SizeOf(Arg2), 8))
+ {
+ CreateDwordField(Arg2, 4, ARGS)
+ CreateDwordField(Arg2, 8, XARG)
+ Return(DGPUPCH_SCOPE._ROM(ARGS, XARG))
+ }
+ }
+
+ If (LEqual(FUNC, 0x4D53445F)) // "_DSM"
+ {
+ If (LGreaterEqual(SizeOf(Arg2), 28))
+ {
+ CreateField(Arg2, 0, 128, MUID)
+ CreateDwordField(Arg2, 16, REVI)
+ CreateDwordField(Arg2, 20, SFNC)
+ CreateField(Arg2, 0xe0, 0x20, XRG0)
+
+// If(LNotEqual(Arg1,0x10))
+// {
+ If (CondRefOf(IGPU_SCOPE._DSM)) // common with dGPU DSM functions
+ {
+ Return(IGPU_SCOPE._DSM(MUID, REVI, SFNC, XRG0))
+ }
+// }
+ }
+ }
+ Return(0)
+ } // End of WMMX
+ } // End of WMI1 Device
+ } // end scope PCI0
+} // end SSDT
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgTpvPCH.cif b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgTpvPCH.cif
new file mode 100644
index 0000000..27b1157
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgTpvPCH.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "SgTpvPCH"
+ category = ModulePart
+ LocalRoot = "Board\EM\SwitchableGraphics\SgTpv\AcpiTables\SgTpvPCH"
+ RefName = "SgTpvPCH"
+[files]
+"SgTpvPCH.sdl"
+"SgTpvPCH.mak"
+[parts]
+"AtiSGULT"
+"nVidiaSGULT"
+<endComponent>
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgTpvPCH.mak b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgTpvPCH.mak
new file mode 100644
index 0000000..02d9298
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgTpvPCH.mak
@@ -0,0 +1,132 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/SgTpvPCH.mak 2 6/02/13 8:14a Joshchou $
+#
+# $Revision: 2 $
+#
+# $Date: 6/02/13 8:14a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPCH/SgTpvPCH.mak $
+#
+# 2 6/02/13 8:14a Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Change IASL compiler path to
+# $(ACPIPLATFORM_ASL_COMPILER) in SharkBay project.
+#
+# 1 1/15/13 6:01a Joshchou
+# [TAG] EIP107237
+# [Category] Improvement
+# [Description] Create componet for SG support on PCH
+# [Files] SgTpvPCH.cif
+# SgTpvPCH.sdl
+# SgTpvPCH.mak
+#
+# 3 11/20/12 3:48a Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Create Token for OEM clone
+#
+# 2 9/09/12 11:01p Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Tpv module support for sharkbay.
+# [Files] OEMSSDT.mak
+# OEMSSDT.asl
+# OEMNVdGPU.asl
+# OEMNViGPU.asl
+# OEMNViGDmisc.asl
+# OEMNvVentura.asl
+# OEMNvGPS.asl
+# OEMSSDT.cif
+#
+# 1 12/12/11 9:10p Alanlin
+#
+#
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: OEMSSDT.mak
+#
+# Description: MAke file to build Aptio ACPI ASL components
+#
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+SGPCHASL: $(BUILD_DIR)\SGTPVPCHssdt.ffs
+
+
+#-----------------------------------------------------------------------------
+# SG SSDT ACPI Tables
+#-----------------------------------------------------------------------------
+!IF "$(ACPIPLATFORM_ASL_COMPILER)"==""
+!ERROR It is an invalid path, please check your ASL compiler path.
+!ENDIF
+
+IASL = $(ACPIPLATFORM_ASL_COMPILER)
+#-----------------------------------------------------------------------
+$(BUILD_DIR)\OpSSDTPCH.aml $(BUILD_DIR)\NvSSDTPCH.aml $(BUILD_DIR)\AtiSSDTPCH.aml: $(BUILD_DIR)\OpSSDTPCH.asl $(BUILD_DIR)\NvSSDTPCH.asl $(BUILD_DIR)\AtiSSDTPCH.asl
+ $(SILENT)$(IASL) -p $@ $*.asl
+
+$(BUILD_DIR)\OpSSDTPCH.sec $(BUILD_DIR)\NvSSDTPCH.sec $(BUILD_DIR)\ATIssdtPCH.sec: $(BUILD_DIR)\OpSSDTPCH.aml $(BUILD_DIR)\NvSSDTPCH.aml $(BUILD_DIR)\AtiSSDTPCH.aml
+ $(GENSECTION) -I $*.aml -O $@ -S EFI_SECTION_RAW
+
+#Note. Expand the package with multiple SG SSDT tables.
+# DXE phase will load the tables depending on present Mxm Gfx card
+# and update Aml contents if provided in AcpiTables.c
+$(BUILD_DIR)\SGTPVPCHssdt.ffs: $(BUILD_DIR)\OpSSDTPCH.sec $(BUILD_DIR)\NvSSDTPCH.sec $(BUILD_DIR)\AtiSSDTPCH.sec
+ $(GENFFSFILE) -B $(BUILD_DIR) -V -o $@ -P1 <<$(BUILD_DIR)\SGTPVPCHssdt.pkg
+
+PACKAGE.INF
+[.]
+BASE_NAME = SgTpvPCHACPI
+FFS_FILEGUID = 9B65FE7C-855E-43cc-A170-A2A685F3655F
+FFS_FILETYPE = EFI_FV_FILETYPE_FREEFORM
+FFS_ATTRIB_CHECKSUM = TRUE
+
+IMAGE_SCRIPT =
+{
+ Compress (dummy) {
+ $(PROJECT_DIR)\$(BUILD_DIR)\OpSSDTPCH.sec
+ $(PROJECT_DIR)\$(BUILD_DIR)\NvSSDTPCH.sec
+ $(PROJECT_DIR)\$(BUILD_DIR)\AtiSSDTPCH.sec
+ }
+}
+<<KEEP
+#-----------------------------------------------------------------------#
+# Process SG asl files
+#-----------------------------------------------------------------------#
+$(BUILD_DIR)\OpSSDTPCH.asl $(BUILD_DIR)\NvSSDTPCH.asl $(BUILD_DIR)\AtiSSDTPCH.asl : $(INTEL_OPSSDTPCH_ASL_FILE) $(INTEL_NVSSDTPCH_ASL_FILE) $(INTEL_ATISSDTPCH_ASL_FILE)
+ $(CP) /I$(SG_TPVPCH_DIR) /FItoken.h /C $(SG_TPVPCH_DIR)\$(@F) > $@
+# include the token.h if needed to check for SDL flags
+# /FItoken.h
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgTpvPCH.sdl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgTpvPCH.sdl
new file mode 100644
index 0000000..665005f
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgTpvPCH.sdl
@@ -0,0 +1,53 @@
+TOKEN
+ Name = "SgTpvPCH_SUPPORT"
+ Value = "1"
+ Help = "Add an OEM SSDT for discrete VGA card. When Primarydisplay = Auto or PEG, the system can report OEM SSDT talbes for AMD or nVidia dGPU VGA card."
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "DGPUPCH_SCOPE"
+ Value = "\_SB.PCI0.RP0$(SG_ULT_RPNum).PEGP"
+ Help = "PLATFORM PORTING!!! Update iGPU and dGPU device names as defined in SB/NB.SDL"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "INTEL_OPSSDTPCH_ASL_FILE"
+ Value = "$(SG_TPVPCH_DIR)\OpSSDTPCH.asl"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "INTEL_NVSSDTPCH_ASL_FILE"
+ Value = "$(SG_TPVPCH_DIR)\NvSSDTPCH.asl"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "INTEL_ATISSDTPCH_ASL_FILE"
+ Value = "$(SG_TPVPCH_DIR)\AtiSSDTPCH.asl"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+PATH
+ Name = "SG_TPVPCH_DIR"
+End
+
+MODULE
+ Help = "Includes SgTpvPEG.mak to Project"
+ File = "SgTpvPCH.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\SGTPVPCHssdt.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgUltAti.cif b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgUltAti.cif
new file mode 100644
index 0000000..803c483
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgUltAti.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "AtiUlt"
+ category = ModulePart
+ LocalRoot = "Board\EM\SwitchableGraphics\SgTpv\AcpiTables\SgTpvPCH"
+ RefName = "AtiSGULT"
+[files]
+"AtiSSDTPCH.asl"
+"ATdGPUPCH.asl"
+"ATiGPUPCH.asl"
+"ATiGDmiscPCH.asl"
+<endComponent>
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgUltNvidia.cif b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgUltNvidia.cif
new file mode 100644
index 0000000..d9c2f85
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPCH/SgUltNvidia.cif
@@ -0,0 +1,15 @@
+<component>
+ name = "nVidiaUlt"
+ category = ModulePart
+ LocalRoot = "Board\EM\SwitchableGraphics\SgTpv\AcpiTables\SgTpvPCH"
+ RefName = "nVidiaSGULT"
+[files]
+"NVdGPUPCH.asl"
+"NViGPUPCH.asl"
+"NViGDmiscPCH.asl"
+"OpSSDTPCH.asl"
+"NvVenturaPCH.asl"
+"NvGPSPCH.asl"
+"NvSSDTPCH.asl"
+"NvGC6PCH.asl"
+<endComponent>
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/ATdGPU.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/ATdGPU.asl
new file mode 100644
index 0000000..d4cce5d
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/ATdGPU.asl
@@ -0,0 +1,204 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/ATdGPU.asl 1 1/15/13 5:58a Joshchou $
+//
+// $Revision: 1 $
+//
+// $Date: 1/15/13 5:58a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/ATdGPU.asl $
+//
+// 1 1/15/13 5:58a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Create componet for SG support on PEG
+// [Files] SgAti.cif
+// AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+//
+// 2 9/09/12 11:02p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+// SgAti.cif
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgAti.cif
+// AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+//
+//
+// 2 10/05/10 7:09p Alexp
+// Added debug macro to be able to insert include check points in target
+// ASL code
+//
+// 1 9/17/10 1:20p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgAti.cif;
+// AtiSSDT.asl; ATdGPU.asl;ATiGPU.asl;ATiGDmisc
+//
+// 1 6/08/10 3:45p Alexp
+//
+// 1 6/03/10 2:54p Alexp
+//
+// 10 4/29/10 11:42a Alexp
+// updated ASL names for Mxm power control and switching from GPIO to
+// functional names. E.g. old- PO16 to new-MRST etc.
+//
+// 9 4/02/10 5:06p Alexp
+// Change per Calpella SG BIOS spec 1.03:
+// - add link control register
+// - add WiDi display
+//
+// 8 1/11/10 4:03p Alexp
+// Added Nvidia Optimus Gfx support
+//
+// 7 12/08/09 10:20a Alexp
+// Per BWG 1.2 Added code to save/restore Endpoint Link Contol Register
+// during power cycle of DGPU
+//
+// 6 10/06/09 1:27p Alexp
+// replaced Alias definitions with actual device name scopes for PEG
+// display devices
+//
+// 5 10/05/09 5:35p Alexp
+// updated asl code for Ati and Nvidia according to Calpella SG BWG 1.1
+//
+// 4 8/21/09 4:45p Alexp
+// Updated Nvidia and ATI SG code to match latest Intel Calpella Acpi
+// reference code from Intel code drop v#68 and Ati SG BWG
+// SG Asl code. Made PEG PCIe MMIO base address dependent on
+// PCIE_BASE_ADDRESS SDL token. Before it was hardwired in ASL code which
+// caused SG logic to fail in Mxm & SG Label 005
+//
+// 3 8/20/09 7:08p Alexp
+// upgraded Ati and Nvidia SSDT Asl files to match latest Acpi code drop
+// #68
+//
+// 1 7/16/09 11:17a Alexp
+// Added SG support for AMD ATI Gfx adaptors
+//**********************************************************************
+Scope(DGPU_SCOPE)
+{
+// OperationRegion (PEGR, PCI_Config, 0, 0x100)
+// Field(PEGR, DWordAcc, Lock, Preserve)
+// {
+// Offset(0x4C),
+// SSID, 32,
+// }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _ON
+//
+// Description: dGPU power ON control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_ON,0,Serialized)
+ {
+ SGON() // OEM Mxm Power On
+
+ //Set the SSID for the ATI MXM
+// Store(MXM_SSVID_DID, SSID)
+
+ //Ask OS to do a PnP rescan
+ Notify(PEG_SCOPE,0)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _OFF
+//
+// Description: dGPU power OFF control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_OFF,0,Serialized)
+ {
+ SGOF() // OEM Mxm Power On
+
+ //Ask OS to do a PnP rescan
+ Notify(PEG_SCOPE,0)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _STA
+//
+// Description: Returns curent dGPU power/presence state
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_STA,0,Serialized)
+ {
+ Return(SGST()) // OEM Mxm Power status
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _INI
+//
+// Description: dGPU Init control method. Used to force dGPU _ADR to return proper PCI address
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+// Method (_INI)
+// {
+// should already be set by now...
+//// Store(MXM_SSVID_DID, SSID) //Set the SSID for the ATI MXM
+// Store(0x0, DGPU_SCOPE._ADR) //make sure PEGP address returns 0x00000000
+// }
+
+} // end Scope(DGPU_SCOPE)
+
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/ATiGDmisc.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/ATiGDmisc.asl
new file mode 100644
index 0000000..f8ab4dd
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/ATiGDmisc.asl
@@ -0,0 +1,302 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/ATiGDmisc.asl 1 1/15/13 5:58a Joshchou $
+//
+// $Revision: 1 $
+//
+// $Date: 1/15/13 5:58a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/ATiGDmisc.asl $
+//
+// 1 1/15/13 5:58a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Create componet for SG support on PEG
+// [Files] SgAti.cif
+// AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+//
+// 2 9/09/12 11:02p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+// SgAti.cif
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgAti.cif
+// AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+//
+//
+// 4 3/17/11 6:18p Alexp
+// cleaned up the code.
+//
+// 3 11/12/10 1:25p Alexp
+// Change IDAB method: invoke IGD_SCOPE.IDAB is defined there
+//
+// 2 10/05/10 7:09p Alexp
+// Added debug macro to be able to insert include check points in target
+// ASL code
+//
+// 1 9/17/10 1:20p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgAti.cif;
+// AtiSSDT.asl; ATdGPU.asl;ATiGPU.asl;ATiGDmisc
+//
+// 1 6/08/10 3:45p Alexp
+//
+// 1 6/03/10 2:54p Alexp
+//
+// 4 10/05/09 5:35p Alexp
+// updated asl code for Ati and Nvidia according to Calpella SG BWG 1.1
+//
+// 3 8/20/09 7:08p Alexp
+// upgraded Ati and Nvidia SSDT Asl files to match latest Acpi code drop
+// #68
+//
+// 1 7/16/09 11:17a Alexp
+// Added SG support for AMD ATI Gfx adaptors
+//**********************************************************************
+
+External(DSEN)
+External(IGPU_SCOPE.AINT, MethodObj)
+External(DGPU_SCOPE.DD02)
+External(IGPU_SCOPE.IDAB, MethodObj)
+
+//Do not remove this function.
+Method(IDAB, 0, Serialized)
+{
+ If (CondRefOf(IGPU_SCOPE.IDAB))
+ {
+ IGPU_SCOPE.IDAB()
+ }
+}
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HGAS
+//
+// Description: HG Adaptor select, notify
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HGAS) // HG Adaptor Select
+{
+ // Toggle GFX Adapter.
+ Store(1,IGPU_SCOPE.PXGS)
+ Notify(IGPU_SCOPE,0x81)
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HBRT
+//
+// Description: Send backlight notifications to the DGPU LFP device
+// This is required for Win7 and is backward compatible with Vista
+//
+// Input: Arg0 - 4 - Brightnes Down, 3- Up
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HBRT, 1 , Serialized)
+{
+
+ If(And(4,DSEN)) //Note: DSEN variable is expected to be set by IGD miniport only.
+ {
+ If(LEqual(Arg0,4))
+ {
+ Notify(DGPU_SCOPE.DD02,0x87) //Note: DD02 is hardcoded as the LFP device in intelgfx.asl
+ }
+ If(LEqual(Arg0,3))
+ {
+ Notify(DGPU_SCOPE.DD02,0x86)
+ }
+ }
+
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HPFS
+//
+// Description: Panel Fitting Hot Key
+//
+// Input: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HPFS, 0, Serialized) //Panel Fitting Hot Key
+{
+ If(LNotEqual(IGPU_SCOPE.GSTP,1))
+ {
+
+ //
+ // HG Handling of Panel Fitting Switch
+ //
+ If(LEqual(IGPU_SCOPE.AGXA,0))
+ {
+ IGPU_SCOPE.AINT(2, 0)
+ }
+ Else
+ {
+ Store(1,IGPU_SCOPE.EMDR)
+
+ //
+ // Expansion Mode toggling
+ //
+ If(LEqual(IGPU_SCOPE.EXPM,2))
+ {
+ Store(0,IGPU_SCOPE.EXPM)
+ }
+ Else
+ {
+ Increment(IGPU_SCOPE.EXPM)
+ }
+ Notify(IGPU_SCOPE,0x81)
+ }
+ }
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HNOT
+//
+// Description: Notification handler for Switchable graphics. Called from GNOT()
+//
+// Input: Arg0 = Current event type:
+// 1 = display switch
+// 2 = lid
+// 3 = dock (!!!!!Calpella ref code, Method(GDCK)sends 4 for Dock notifications )
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method (HNOT, 1, Serialized)
+{
+
+ Switch(ToInteger(Arg0))
+ {
+ case(1) //Display Switch event
+ {
+ If(LNotEqual(IGPU_SCOPE.GSTP,1))
+ {
+ //
+ // HG Handling of Display Switch Event
+ //
+ // Muxless?
+ If(LEqual(SGMD,0x2))
+ {
+ If(LEqual(IGPU_SCOPE.AGXA,0))
+ {
+ Notify(IGPU_SCOPE,0x80)
+ }
+
+ If(LEqual(IGPU_SCOPE.AGXA,1))
+ {
+ Notify(DGPU_SCOPE,0x80)
+ }
+ }
+ Else
+ {
+ Store(1,IGPU_SCOPE.DSWR)
+ Notify(IGPU_SCOPE,0x81)
+ }
+ }
+ }
+ case (2) //Lid switch event
+ {
+ // Muxless?
+ If(LEqual(SGMD,0x2))
+ {
+ If(LEqual(IGPU_SCOPE.AGXA,0))
+ {
+ Notify(IGPU_SCOPE,0x80)
+ }
+
+ If(LEqual(IGPU_SCOPE.AGXA,1))
+ {
+ Notify(DGPU_SCOPE,0x80)
+ }
+ }
+ Else
+ {
+ Notify(IGPU_SCOPE,0x80) //Placeholder for LID event
+ }
+ }
+// case (3) //Dock event
+ case (4) //Dock event
+ {
+ // Muxless?
+ If(LEqual(SGMD,0x2))
+ {
+ If(LEqual(IGPU_SCOPE.AGXA,0))
+ {
+ Notify(IGPU_SCOPE,0x80)
+ }
+
+ If(LEqual(IGPU_SCOPE.AGXA,1))
+ {
+ Notify(DGPU_SCOPE,0x80)
+ }
+ }
+ Else
+ {
+ Notify(IGPU_SCOPE,0x80) //Placeholder for handling dock event
+ }
+ }
+ Default
+ {
+ Notify(IGPU_SCOPE,0x80)
+ }
+
+ }
+
+}
+
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/ATiGPU.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/ATiGPU.asl
new file mode 100644
index 0000000..19548a3
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/ATiGPU.asl
@@ -0,0 +1,1359 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/ATiGPU.asl 5 7/16/13 5:19a Joshchou $
+//
+// $Revision: 5 $
+//
+// $Date: 7/16/13 5:19a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/ATiGPU.asl $
+//
+// 5 7/16/13 5:19a Joshchou
+// [TAG] None
+// [Category] New Feature
+// [Description] Enable falg bit14 of ATPX Function 1 to support
+// MSHybrid.
+//
+// 4 6/05/13 5:13a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Increase the size of RBUF to support hybrid Vbios.
+// Improve some code for support PX5.6.
+// Add notification for customer call from EC event.
+//
+// 3 3/21/13 3:50a Joshchou
+// [TAG] EIP105607
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update for support PX5.6
+//
+// 2 2/21/13 5:46a Joshchou
+// [TAG] EIP107720
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Add ATIF function 15 sample code for reference.
+//
+// 1 1/15/13 5:58a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Create componet for SG support on PEG
+// [Files] SgAti.cif
+// AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+//
+// 3 11/20/12 3:44a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Comment some unused External
+//
+// 2 9/09/12 11:02p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+// SgAti.cif
+//
+// 3 12/06/11 2:14a Alanlin
+// [TAG] EIP76148
+// [Category] New Feature
+// [Description] PX 5.0 feature updated
+//
+// 2 7/14/11 5:39a Alanlin
+// [TAG] EIP64370
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] Screen can't be displayed after install ATI SG driver
+// [RootCause] ASL method return value is incorrect.
+// [Solution] Return correct value to driver.
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgAti.cif
+// AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+//
+//
+// 5 3/17/11 6:18p Alexp
+// cleaned up the code.
+//
+// 4 1/03/11 12:26p Alexp
+// [TAG] EIP47451
+// [Category] Improvement
+// [Description] fixed checkpoint display in ATRM method
+// [Files] atidgpu.asl
+//
+// 3 11/12/10 1:23p Alexp
+// rename ELCT to ELCL in order to avoid name conflict with Intel's ref
+// code in SgDGPU.asl
+//
+// 2 10/05/10 7:09p Alexp
+// Added debug macro to be able to insert include check points in target
+// ASL code
+//
+// 1 9/17/10 1:20p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgAti.cif;
+// AtiSSDT.asl; ATdGPU.asl;ATiGPU.asl;ATiGDmisc
+//
+// 2 6/08/10 4:21p Alexp
+//
+// 1 6/08/10 3:46p Alexp
+//
+// 1 6/08/10 3:45p Alexp
+//
+// 1 6/03/10 2:56p Alexp
+//
+// 8 4/29/10 11:42a Alexp
+// updated ASL names for Mxm power control and switching from GPIO to
+// functional names. E.g. old- PO16 to new-MRST etc.
+//
+// 7 4/02/10 5:06p Alexp
+// Change per Calpella SG BIOS spec 1.03:
+// - add link control register
+// - add WiDi display
+//
+// 6 12/08/09 10:20a Alexp
+// Per BWG 1.2 Added code to save/restore Endpoint Link Contol Register
+// during power cycle of DGPU
+//
+// 5 10/05/09 5:35p Alexp
+// updated asl code for Ati and Nvidia according to Calpella SG BWG 1.1
+//
+// 4 8/21/09 4:45p Alexp
+// Updated Nvidia and ATI SG code to match latest Intel Calpella Acpi
+// reference code from Intel code drop v#68 and Ati SG BWG
+// SG Asl code. Made PEG PCIe MMIO base address dependent on
+// PCIE_BASE_ADDRESS SDL token. Before it was hardwired in ASL code which
+// caused SG logic to fail in Mxm & SG Label 005
+//
+// 1 7/16/09 11:17a Alexp
+// Added SG support for AMD ATI Gfx adaptors
+//
+//
+//**********************************************************************
+External(\ECON, IntObj) // Embedded Controller Availability Flag.
+External(PCI_SCOPE.LPCB.H_EC.LSTE)
+External(MXD1)
+External(MXD2)
+External(MXD3)
+External(MXD4)
+External(MXD5)
+External(MXD6)
+External(MXD7)
+External(MXD8)
+
+External(NXD1)
+External(NXD2)
+External(NXD3)
+External(NXD4)
+External(NXD5)
+External(NXD6)
+External(NXD7)
+External(NXD8)
+
+External(AMDA)
+External(SGMD)
+External(SGFL)
+//External(PXFX)
+//External(PXDY)
+External(PXFD)
+
+Scope (IGPU_SCOPE)
+{
+/*
+ Method(_INI,0)
+ {
+// Init all scratch pad fields if not already done so in OpRegion Init
+ }
+*/
+
+//<AMI_SHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: APXM
+//
+// Description: AMD PowerExpress OperationRegion.
+// OpRegion address (AMDA)is defined in IDG Nvs OpRegion
+//
+//-------------------------------------------------------------------------
+//<AMI_SHDR_END>
+ OperationRegion(APXM,SystemMemory,AMDA,0x20400)
+ Field(APXM, AnyAcc, NoLock, Preserve)
+ {
+ // OpRegion Header
+
+ APSG, 0x80, // (000h) Signature-"AMD--PowerXpress".
+ APSZ, 0x20, // (010h) OpRegion Size.
+ APVR, 0x20, // (014h) OpRegion Version.
+
+ // OpRegion Data
+ APXA, 0x20, // PX opregion address
+ RVBS, 0x20, // PX Runtime VBIOS image size
+ NTLE, 0x10, // Total number of toggle list entries
+ TLE1, 0x10, // The display combinations in the list...
+ TLE2, 0x10,
+ TLE3, 0x10,
+ TLE4, 0x10,
+ TLE5, 0x10,
+ TLE6, 0x10,
+ TLE7, 0x10,
+ TLE8, 0x10,
+ TLE9, 0x10,
+ TL10, 0x10,
+ TL11, 0x10,
+ TL12, 0x10,
+ TL13, 0x10,
+ TL14, 0x10,
+ TL15, 0x10,
+ TGXA, 0x10, // Target GFX adapter as notified by ATPX function 5
+ AGXA, 0x10, // Active GFX adapter as notified by ATPX function 6
+ GSTP, 0x08, // GPU switch transition in progress
+ DSWR, 0x08, // Display switch request
+ SPSR, 0x08, // System power source change request
+ DCFR, 0x08, // Display configuration change request
+ EMDR, 0x08, // Expansion mode change request
+ PXGS, 0x08, // PowerXpress graphics switch toggle request
+ CACD, 0x10, // Currently active displays
+ CCND, 0x10, // Currently connected displays
+ NACD, 0x10, // Next active displays
+ EXPM, 0x08, // Expansion Mode
+ TLSN, 0x10, // Toggle list sequence index
+ ELCL, 0x10, // Endpoint Link Contol Register Value
+ // for ATRM (_ROM equivalent) data
+ RBF1, 0x40000, // 0x8000 bytes in bits
+ RBF2, 0x40000, // 0x8000 bytes in bits
+ RBF3, 0x40000, // 0x8000 bytes in bits
+ RBF4, 0x40000 // 0x8000 bytes in bits
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: ADPM
+//
+// Description: ADPM -> ATPX Fn 8 Digital port mux mode
+//
+// Input:
+// Arg0 : Integer User selected option (via., setup 0 -> Shared, 1 -> iGPU Only, 2 -> dGPU Only)
+// Arg1 : 1 -> iGPU connector record, 2->dgpu connector record
+//
+// Output:
+// Flag value for ATPX Fn 8.
+// Bit0-> display can be driven by the GPU
+// Bit1-> HPD can be detected by the GPU
+// Bit2-> AUX/DDC can be driven by the GPU
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(ADPM, 2, Serialized)
+ {
+ Store(0, Local1)
+
+ // AUX/DDC Mux settings
+ ShiftRight(Arg0, 16, Local0)
+
+ if(LEqual(Arg1, 1)) // If iGPU connector record
+ {
+ Or (And(Local0, 0x1), Local1, Local1)
+ }
+ else // If dGPU connector record
+ {
+ Or (ShiftRight(And(Local0, 0x2),1), Local1, Local1)
+ }
+ ShiftLeft(Local1, 1, Local1)
+
+
+ // HPD Mux settings
+ ShiftRight(Arg0, 24, Local0)
+
+ if(LEqual(Arg1, 1)) // If iGPU connector record
+ {
+ Or (And(Local0, 0x1), Local1, Local1)
+ }
+ else // If dGPU connector record
+ {
+ Or (ShiftRight(And(Local0, 0x2),1), Local1, Local1)
+ }
+ ShiftLeft(Local1, 1, Local1)
+
+
+ // Display Mux settings
+ ShiftRight(Arg0, 8, Local0)
+
+ if(LEqual(Arg1, 1)) // If iGPU connector record
+ {
+ Or (And(Local0, 0x1), Local1, Local1)
+ }
+ else // If dGPU connector record
+ {
+ Or (ShiftRight(And(Local0, 0x2),1), Local1, Local1)
+ }
+
+ Return (Local1)
+
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: ATPX
+//
+// Description: ATI PowerXpress (PX) Contrl Method: Revision 0.19
+// PX specific Control Method used by integrated graphics
+// or discrete graphics driver on PX enabled platforms.
+//
+// Input:
+// Arg0: Integer Function code.
+// Arg1: Buffer Parameter buffer, 256 bytes
+//
+// Output:
+// Returns Buffer 256 bytes
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(ATPX,2,Serialized)
+ {
+ P8DB(0xA1, Arg0, 2000)
+ //
+ // Function 0: Verify PowerXpress Interface
+ //
+ // Returns the PX interface version and
+ // functions supported by PX System BIOS
+ //
+ If(LEqual(Arg0,0))
+ {
+ Name(TMP1,Buffer(256) {0x00})
+ CreateWordField ( TMP1, 0, F0SS)
+ CreateWordField ( TMP1, 2, F0IV)
+ CreateDwordField( TMP1, 4, F0SF)
+
+ Store(0x0008,F0SS)
+ Store(0x0001,F0IV)
+ Store(0x000000BF,F0SF)
+
+ // For Muxless: Support only Fun1, Fun2, Fun5 and Fun6
+ If(LEqual(SGMD,0x2))
+ {
+
+ Store(0x00000033,F0SF)
+/*
+ If (LEqual(PXDY, 0x01)) { // PX Dynamic Mode Switch Enabled
+ And(F0SF, 0xFFFFFFFD, F0SF) // Don't support PX02
+ }
+ If (LAnd(LEqual(PXDY, 0x01), // Support both Dynamic and Fixed PX switch
+ LEqual(PXFX, 0x01))) {
+ Or(F0SF, 0x2, F0SF) // Support PX02
+ }
+*/
+ }
+
+ Return(TMP1)
+ }
+
+ //
+ // Function 1: Get PowerXpress Parameters
+ //
+ // Returns various PX related platform parameters
+ //
+ If(LEqual(Arg0,1))
+ {
+ Name(TMP2,Buffer(256) {0x00})
+ CreateWordField ( TMP2, 0, F1SS)
+ CreateDwordField ( TMP2, 2, F1VM)
+ CreateDwordField( TMP2, 6, F1FG)
+ Store(0x000A,F1SS) //Structure size of return package
+ Store(0x00007FFF,F1VM) // Bit[14:0]Mask used for valid bit fields
+
+ // Bit0: LVDS I2C is accessible to both graphics controllers.
+ // Bit1: CRT1 I2C is accessible to both graphics controllers.
+ // Bit2: DVI1 I2C is accessible to both graphics controllers.
+ // Bit3: CRT1 RGB signals are multiplexed.
+ // Bit4: TV1 signals are multiplexed.
+ // Bit5: DFP1 signals are multiplexed.
+ // Bit6: Indicates that a separate multiplexer control for I2C/Aux/HPD exists.
+ // Bit7: Indicates that a "dynamic" PX scheme is supported.
+ // Bit8: Reserved.
+ // Bit9: Indicates that "fixed" scheme is not supported, if set to one.
+ // Bit10: Indicates that full dGPU power off in gdynamich scheme is supported, if set to one.
+ // Bit11: Indicates that discrete graphics must be powerd on while a monitor is connected to discrete graphics connector,if set to one
+ // Bit12: Indicates that discrete graphics can drive display outpurs(local dGPU displays are supported),if set to one
+ // Bit13: Indicates that long idle detection is disabled ,if set to one
+ // Bit14: Indicates that Windows Blue "Hybrid Graphics" is required(supported),if set to one
+ // Bits[31:15]: Reserved (must be zero).
+
+ // For Muxless: Set BIT7 for dynamic" PX scheme is supported
+ If(LEqual(SGMD,0x2))
+ {
+ Store(0x00000280,F1FG) // BACO Mode under the Dynamic Scheme
+
+ If(LEqual(PXFD,0x1))
+ {
+ Store(0x00005E80,F1FG) // dGPU Power off under the Dynamic Scheme
+ }
+ }
+ Else
+ {
+ // For Muxed: Set BIT6 to Indicates that a separate multiplexer control for I2C/Aux/HPD exists
+ // and is controlled by function 4 (Monitor I2C Control).
+ Store(0x00000040,F1FG) // Actual PX parameters field
+ }
+
+ Return(TMP2)
+ }
+
+ //
+ // Function 2: Power Control
+ //
+ // Powers on/off the discrete graphics
+ //
+ If(LEqual(Arg0,2))
+ {
+ CreateWordField(Arg1,0,FN2S)
+ CreateByteField(Arg1,2,DGPR)
+
+ If(LEqual(DGPR,0)) // Powers off discrete graphics
+ {
+ DGPU_SCOPE._OFF()
+ }
+ If(LEqual(DGPR,1)) // Powers on discrete graphics
+ {
+ DGPU_SCOPE._ON()
+ }
+ Return(0)
+ }
+
+ //
+ // Function 3: Display Multiplexer Control
+ //
+ // Controls display multiplexers
+ //
+ If(LEqual(Arg0,3))
+ {
+ CreateWordField(Arg1,0,FN3S)
+ CreateWordField(Arg1,2,SDMG)
+
+ // Display Multiplexer Control
+ If(LEqual(SDMG,0)) // Switch Display Muxes to iGFX
+ {
+ DGPU_SCOPE.SGPO(DSEL, 0)
+ }
+ If(LEqual(SDMG,1)) // Switch Display Muxes to dGFX
+ {
+ DGPU_SCOPE.SGPO(SSEL, 1)
+ }
+
+ Return(0)
+ }
+
+ //
+ // Function 4: Monitor I2C Control
+ //
+ // Controls monitor I2C lines
+ //
+ If(LEqual(Arg0,4))
+ {
+ CreateWordField(Arg1,0,FN4S)
+ CreateWordField(Arg1,2,SIMG)
+
+ // I2C Multiplexer Control
+ If(LEqual(SIMG,0)) // Switch I2C Muxes to iGFX
+ {
+ DGPU_SCOPE.SGPO(ESEL, 0)
+ }
+ If(LEqual(SIMG,1)) // Switch I2C Muxes to dGFX
+ {
+ DGPU_SCOPE.SGPO(ESEL, 1)
+ }
+
+ Return(0)
+ }
+
+ //
+ // Function 5: Graphics Device Switch Start Notification
+ //
+ // Notifies SBIOS that GFX device switch process has been started
+ //
+ If(LEqual(Arg0,5))
+ {
+ CreateWordField(Arg1,0,FN5S)
+ CreateWordField(Arg1,2,TGFX)
+ Store(TGFX,TGXA)
+ Store(1,GSTP)
+
+ Return(0)
+ }
+
+ //
+ // Function 6: Graphics Device Switch End Notification
+ //
+ // Notifies SBIOS that GFX device switch process has been completed
+ //
+ If(LEqual(Arg0,6))
+ {
+ CreateWordField(Arg1,0,FN6S)
+ CreateWordField(Arg1,2,AGFX)
+ Store(AGFX,AGXA)
+ Store(0,GSTP)
+
+ Return(0)
+ }
+
+ //
+ // Function 8: Get Display Connectors mapping
+ //
+ If(LEqual(Arg0,8))
+ {
+ Name(TMP3,Buffer(256) {
+ 0x0e,0x00, //Number of reported display connectors
+ 0x46,0x00, //Total Connector structure size in bytes (num of structures * structure size)
+ 0x07,0x01,0x00,0x00,0x01, //Connector structure 1 - CRT on iGPU
+ 0x07,0x01,0x01,0x00,0x01, //Connector structure 2 - CRT on dGPU
+ 0x05,0x00,0x00,0x00,0x04, //Connector structure 3 - LFP on iGPU
+ 0x05,0x00,0x01,0x10,0x01, //Connector structure 4 - LFP on dGPU
+
+ // Digital port mapping on EC4
+ //
+ // Intel ATI EC4 output
+ // Port B -> Port B DP
+ // Port C -> Port C HDMI
+ // Port D -> Port D DP
+ //
+
+ 0x07,0x03,0x00,0x00,0x03, //Connector structure 5 - DisplayPort_B on iGPU
+ 0x07,0x03,0x01,0x10,0x02, //Connector structure 6 - DP on dGPU (MXM port B on EC4)
+ 0x07,0x07,0x00,0x01,0x03, //Connector structure 7 - HDMI/DVI dongle on port B
+ 0x07,0x07,0x01,0x10,0x02, //Connector structure 8 - HDMI/DVI dongle on dGPU (MXM port B on EC4)
+ 0x07,0x09,0x00,0x02,0x03, //Connector structure 9 - HDMI_C on iGPU
+ 0x07,0x09,0x01,0x20,0x02, //Connector structure 10 - HDMI on dGPU (MXM port C on EC4)
+ 0x07,0x0a,0x00,0x03,0x03, //Connector structure 11 - DisplayPort_D on iGPU
+ 0x07,0x0a,0x01,0x30,0x02, //Connector structure 12 - DP on dGPU (MXM port B. Not routed to EC4)
+ 0x07,0x0b,0x00,0x04,0x03, //Connector structure 13 - HDMI/DVI dongle on port D
+ 0x07,0x0b,0x01,0x30,0x02, //Connector structure 14 - HDMI/DVI dongle on dGPU (MXM port B. Not routed to EC4)
+ 0x07,0x0C,0x00,0x06,0x03, //Connector structure 15 - Place holder for Intel Wireless Display
+ })
+
+ CreateWordField (TMP3, 0, ATNO)
+ CreateWordField (TMP3, 2, ATSZ)
+
+ //Modify the display, HPD and Aux/DDC flag in the connector structure based on iGPU Digital port setup option
+
+ //Connector structure 3 - LFP on iGPU
+ Store(ADPM(MXD2, 1), Index(TMP3, 14))
+
+ //Connector structure 4 - LFP on dGPU
+ Store(ADPM(MXD2, 1), Index(TMP3, 19))
+
+ //Connector structure 5 - DisplayPort_B on iGPU
+ Store(ADPM(MXD3, 1), Index(TMP3, 24))
+
+ //Connector structure 6 - DP on dGPU
+ Store(ADPM(MXD3, 2), Index(TMP3, 29))
+
+ //Connector structure 7 - HDMI/DVI dongle on port B
+ Store(ADPM(MXD4, 1), Index(TMP3, 34))
+
+ //Connector structure 8 - HDMI/DVI dongle on dGPU
+ Store(ADPM(MXD4, 2), Index(TMP3, 39))
+
+ //Connector structure 9 - HDMI_C on iGPU
+ Store(ADPM(MXD5, 1), Index(TMP3, 44))
+
+ //Connector structure 10 - HDMI on dGPU
+ Store(ADPM(MXD5, 2), Index(TMP3, 49))
+
+ //Connector structure 11 - DisplayPort_D on iGPU
+ Store(ADPM(MXD6, 1), Index(TMP3, 54))
+
+ //Connector structure 12 - DP on dGPU
+ Store(ADPM(MXD6, 2), Index(TMP3, 59))
+
+ //Connector structure 13 - HDMI/DVI dongle on port D
+ Store(ADPM(MXD7, 1), Index(TMP3, 64))
+
+ //Connector structure 14 - HDMI/DVI dongle on dGPU
+ Store(ADPM(MXD7, 2), Index(TMP3, 69))
+
+ If(And(SGFL, 0x01))
+ {
+ Store(Add(ATNO, 0x1), ATNO)
+ Store(Add(ATSZ, 0x5), ATSZ)
+ }
+
+ Return(TMP3)
+ }
+
+ Return(0) //End of ATPX
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: ATRM
+//
+// Description: ATI PowerXpress (PX) get ROM Method: Revision 0.19
+// PX specific Control Method used by discrete graphics driver
+// on PX enabled platforms to get a runtime modified copy of
+// the discrete graphics device ROM data (Video BIOS).
+//
+// Input:
+// Arg0: Integer Offset of the graphics device ROM data
+// Arg1: Integer Size of the buffer to fill in (up to 4K)
+//
+// Output:
+// Buffer Buffer of requested video ROM bytes
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(ATRM,2,Serialized)
+ {
+ Store(Arg0,Local0)
+ Store(Arg1,Local1)
+
+ P8DB(0x44, ShiftRight(Local0, 8), 1000)
+
+ If(LGreater(Local1,0x1000))
+ {
+ Store(0x1000,Local1)
+ }
+ If(LGreater(Local0,0x10000))
+ {
+ Return(Buffer(Local1){0})
+ }
+ If(LGreater(Local0,RVBS))
+ {
+ Return(Buffer(Local1){0})
+ }
+// If (LGreater (Add (Local0, Local1), RVBS))
+// {
+// Store (0x00, Local0)
+// }
+
+ Multiply(Local1,0x08,Local3)
+ Name(ROM1,Buffer(0x8000){0})
+ Name(ROM2,Buffer(Local1){0})
+
+ If(LLess(Local0, 0x8000)){
+ Store(RBF1, ROM1)
+ }
+ ElseIf(LLess(Local0, 0x10000)){
+ Subtract(Local0,0x8000,Local0)
+ Store(RBF2, ROM1)
+ }
+ ElseIf(LLess(Local0, 0x18000)){
+ Subtract(Local0,0x10000,Local0)
+ Store(RBF3, ROM1)
+ }
+ ElseIf(LLess(Local0, 0x20000)){
+ Subtract(Local0,0x18000,Local0)
+ Store(RBF4, ROM1)
+ }
+ Multiply(Local0,0x08,Local2)
+ CreateField(ROM1,Local2,Local3,TMPB)
+ Store(TMPB,ROM2)
+ Return(ROM2)
+
+ }
+ //
+ // INDL : Initialize Global Next active device list.
+ //
+ // Argments : None.
+ //
+ // returns : None.
+ //
+ Method(INDL, 0, Serialized)
+ {
+ Store(0, NXD1)
+ Store(0, NXD2)
+ Store(0, NXD3)
+ Store(0, NXD4)
+ Store(0, NXD5)
+ Store(0, NXD6)
+ Store(0, NXD7)
+ Store(0, NXD8)
+ }
+ //
+ // SNXD -> Set Next active device.
+ //
+ // Arg0 : Display vector of devices that will be activated
+ //
+ // Returns : None.
+ //
+ Method(SNXD, 1, Serialized)
+ {
+ INDL()
+
+ Store(Arg0, Local0)
+ If(And(Local0, ShiftLeft(1, 1))) // 1-> BIT1 CRT1
+ {
+ Store(1, NXD1) // NXD1 -> CRT
+ }
+ If(And(Local0, ShiftLeft(1, 0))) // 0 -> BIT2 LCD1
+ {
+ Store(1, NXD2) // NXD2 -> LCD
+ }
+ If(And(Local0, ShiftLeft(1, 3))) // 3 -> BIT3 DFP1 (DP_B)
+ {
+ Store(1, NXD3) // NXD3 -> Display port B
+ }
+ If(And(Local0, ShiftLeft(1, 7))) // 7 -> BIT7 DFP2 (HDMI_B)
+ {
+ Store(1, NXD4) // NXD4 -> HDMI B
+ }
+ If(And(Local0, ShiftLeft(1, 9))) // 9 -> BIT9 DFP3 (HDMI_C)
+ {
+ Store(1, NXD5) // NXD5 -> HDMI C
+ }
+ If(And(Local0, ShiftLeft(1, 10))) // 10 -> BIT10 DFP4 (DP_D)
+ {
+ Store(1, NXD6) // NXD6 -> Display port D
+ }
+ If(And(Local0, ShiftLeft(1, 11))) // 11 -> BIT11 DFP5 (HDMI_D)
+ {
+ Store(1, NXD7) // NXD7 -> HDMI D
+ }
+
+ //NXD8 is not used since there are only 7 entries in _DOD
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: ATIF
+//
+// Description: ATI GFX Interface.Provides ATI specific GFX functionality on mobile platforms.
+//
+// Input:
+// Arg0: Integer Function code.
+// Arg1: Package Parameter buffer, 256 bytes
+//
+//
+// Output:
+// Returns Buffer, 256 bytes
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(ATIF,2,Serialized)
+ {
+ P8DB(0xAF, Arg0, 2000)
+
+ //
+ // Function 0: Verify Interface
+ //
+ // Returns the interface version and
+ // functions/notifications supported by System BIOS
+ //
+ If(LEqual(Arg0,0))
+ {
+ Name(TMP0,Buffer(256) {0x00})
+ CreateWordField (TMP0, 0, F0SS)
+ CreateWordField (TMP0, 2, F0IV)
+ CreateDwordField (TMP0, 4, F0SN)
+ CreateDwordField (TMP0, 8, F0SF)
+
+ // Size of return structure=12
+ Store(0x000C,F0SS)
+
+ // Interface version
+ Store(0x0001,F0IV)
+
+ // Supported Notifications Mask
+ Store(0x00000041,F0SN) // Display switch request and PowerXpress graphics switch toggle request supported
+// Store(0x00000001,F0SN) //<Overriding as per edited ATIF spec 0.22- only display switch request supported>>
+
+ //Supported Functions Bit Vector
+ Store(0x00000007,F0SF)
+
+ /*
+ // For Muxless: No ATIF Fn supported
+ If(LEqual(SGMD,0x2))
+ {
+ Store(0x00000000,F0SN)
+ Store(0x00000000,F0SF)
+ }
+ */
+ Return(TMP0)
+ }
+
+ //
+ // Function 1: Get System Parameters
+ //
+ // Returns various system parameters
+ //
+ If(LEqual(Arg0,1))
+ {
+ Name(TMP1,Buffer(256) {0x0})
+ CreateWordField (TMP1, 0, F1SS)
+ CreateDwordField (TMP1, 2, F1VF)
+ CreateDwordField (TMP1, 6, F1FG)
+
+ // Size of return structure=10
+ Store(0x000A, F1SS)
+
+ // Valid Fields Mask
+ Store(0x00000003,F1VF)
+
+ // Flags
+ Store(0x00000001,F1FG) // Notify (VGA, 0x81) is used as a general purpose notification
+ Return(TMP1)
+ }
+
+ //
+ // Function 2: Get System BIOS Requests
+ //
+ // Reports pending system BIOS requests
+ //
+ // Invoked whenever driver receives Notify(VGA,0x81) and
+ // the Notify is designated as a general purpose notification
+ // in the function "Get System Parameters"
+ //
+ If(LEqual(Arg0,2))
+ {
+ CreateBitField(PSBR, 0, PDSW) // Display switch request
+ CreateBitField(PSBR, 1, PEXM) // Expansion mode request
+ CreateBitField(PSBR, 2, PTHR) // Thermal state change request
+ CreateBitField(PSBR, 3, PFPS) // Forced power state change request
+ CreateBitField(PSBR, 4, PSPS) // System power state change request
+ CreateBitField(PSBR, 5, PDCC) // Display configuration change request
+ CreateBitField(PSBR, 6, PXPS) // PowerXpress? graphics controller switch request
+ CreateBitField(PSBR, 7, PBRT) // Panel brightness change request //[ODM_Change]2012/08/20 AMD GOP brightness2 WHQL fail.
+ CreateBitField(PSBR, 8, DCSC) // Panel brightness change request //[ODM_Change]2012/08/20 AMD GOP brightness2 WHQL fail.
+
+ CreateWordField(ATIB, 0, SSZE) // Structure size = 12
+ CreateDWordField(ATIB, 2, PSBI) // Pending System BIOS Requests
+ CreateByteField(ATIB, 6, EXPM) // Expansion Mode
+ CreateByteField(ATIB, 7, THRM) // Thermal State: Target Gfx controller
+ CreateByteField(ATIB, 8, THID) // Thermal State: State Id
+ CreateByteField(ATIB, 9, FPWR) // Forced Power State: Target Gfx controller
+ CreateByteField(ATIB, 10, FPID) // Forced Power State: State Id
+ CreateByteField(ATIB, 11, SPWR) // System Power Source
+ CreateByteField (ATIB, 12, BRTL) // Brightness Level //[ODM_Change]2012/08/20 AMD GOP brightness2 WHQL fail.
+
+ Store(13,SSZE)
+ Store(PSBR,PSBI)
+
+ IF(PDSW) {
+ Store(0,PDSW)
+ }
+
+ IF(PEXM) {
+ Store(0,EXPM)
+ Store(0,PEXM)
+ }
+
+ IF(PTHR) {
+ Store(0, THRM)
+ Store(0, THID)
+ Store(0, PTHR)
+ }
+
+ IF(PFPS) {
+ Store(0, PFPS)
+ }
+
+ IF(PSPS) {
+ Store(0, PSPS)
+ }
+
+ IF(PXPS) {
+ Store(0, PXPS)
+ }
+
+ IF(PBRT) {
+ Store(0, PBRT)
+ }
+
+ IF(DCSC) {
+ Store(0, DCSC )
+ }
+
+ Return(ATIB)
+ }
+
+ //
+ // Function 3: Select Active Displays
+ //
+ // Returns displays to be selected in reposnse to
+ // a display switch request notification
+ //
+ If(LEqual(Arg0,3))
+ {
+ Name(TMP3,Buffer(256) {0x0})
+ CreateWordField (TMP3, 0, F3SS)
+ CreateWordField (TMP3, 2, F3SD)
+ CreateWordField(Arg1,0,AI3S)
+ CreateWordField(Arg1,2,SLDS)
+ CreateWordField(Arg1,4,CODS)
+ Store(SLDS,CACD)
+ Store(CODS,CCND)
+
+ If (\ECON)
+ {
+ If(LEqual(PCI_SCOPE.LPCB.H_EC.LSTE,1))
+ {
+ Or(CCND,0x0001,CCND) // ATI does not send LFP as connected when not LFP is not active. This is as per design
+ }
+ }
+
+ // Size of return structure=4
+ Store(0x0004,F3SS)
+
+ // Next Displays to be Selected
+ // Populate next displays based on Currently Connected and Active displays and the Toggle List Index
+ // CCND, CACD, TLSN,
+ Store(CTOI(CACD),TLSN) // Get current toggle index based on currently Active display vector
+ Store(CACD, Local1) // Initialize Local1 to a safe value
+ Store(NTLE, Local0) // Total number of toggle list entries
+ While(Local0)
+ {
+ Store(NATL(TLSN),Local1) // Get the next combination from toggle list into Local1
+
+ If(LNotEqual(Local1, 0)) //If next toggle list entry is not empty, then
+ {
+ If(LEqual(And(Local1,CCND),Local1)) // If entries in the next combination are actually connected..
+ {
+ Store(1,Local0) // Exit since we got the next active list
+ }
+ }
+ Decrement(Local0) // Decrement toggle list sequence counter
+
+ Increment(TLSN) // Increment toggle list number to point to next active list
+ If(LGreater(TLSN, NTLE)) // If sequence index currently points to last entry....
+ {
+ Store(1,TLSN) // Roll-up to the start of the toggle list
+ }
+ }
+ SNXD(Local1) // Set the selected displays as the next active for _DGS
+ Store(Local1,NACD) // The next active toggle list - put it on Opregion
+ Store(NACD,F3SD) // Store it in the return buffer
+ Return(TMP3)
+ }
+
+//<Overriding as per edited ATIF spec 0.22- only Functions 0,1,2,3 supported>
+// //
+// // Function 5: Get TV Standard from CMOS
+// //
+// // Retrieves current TV standard
+// //
+// If(LEqual(Arg0,5))
+// {
+// Name(TMP5,Buffer(256) {0x0})
+// CreateWordField (TMP5, 0, F5SS)
+//
+// // Size of return structure
+// Store(0x0004,F5SS)
+//
+// // TV Standard Encoding Format
+// Store(0x00,Index(TMP5,2))
+//
+// // TV Standard
+// Store(TVSD,Index(TMP5,3))
+//
+// Return(TMP5)
+//
+// }
+ //
+// //
+// // Function 6: Set TV Standard in CMOS
+// //
+// // Records current TV standard in CMOS
+// //
+// If(LEqual(Arg0,6))
+// {
+// Name(TMP6,Buffer(256) {0x0})
+//
+// CreateWordField(Arg1,0,AI6S)
+// CreateByteField(Arg1,2,TSEF)
+// CreateByteField(Arg1,3,TVST)
+//
+// // Records current TV standard in CMOS
+// Store(TVST,TVSD)
+//
+// Return(TMP6)
+//
+// }
+//
+// //
+// // Function 7: Get Panel Expansion Mode from CMOS
+// //
+// // Retrieves built-in panel expansion mode
+// //
+// If(LEqual(Arg0,7))
+// {
+// Name(TMP7,Buffer(256) {0x0})
+// CreateWordField (TMP7, 0 , F7SS)
+//
+// // Size of return structure
+// Store(0x0003,F7SS)
+ //
+// // Expansion Mode
+// Store(EXPM,Index(TMP7,2))
+ //
+// Return(TMP7)
+ //
+// }
+ //
+// //
+// // Function 8: Set Panel Expansion Mode in CMOS
+// //
+// // Records built-in panel expansion mode in CMOS
+// //
+// If(LEqual(Arg0,8))
+// {
+// Name(TMP8,Buffer(256) {0x0})
+ //
+// CreateWordField(Arg1,0,AI8S)
+// CreateByteField(Arg1,2,EMCM)
+ //
+// // Record Expansion Mode in CMOS
+// Store(EMCM,EXPM)
+ //
+// Return(TMP8)
+// }
+ //
+// //
+// // Function 9: Get Selected Displays from CMOS
+// //
+// // Retrieves Selected Displays
+// //
+// If(LEqual(Arg0,9))
+// {
+// Name(TMP9,Buffer(256) {0x0})
+// CreateWordField (TMP5, 0, F9SS)
+// CreateWordField (TMP5, 2, F9SD)
+// CreateWordField (TMP5, 4, F9DV)
+ //
+// // Size of return structure
+// Store(0x0006,F9SS)
+ //
+// // Supported Displays Mask
+// Store(BSPD,F9SD)
+ //
+// // Selected Displays Vector
+// Store(And(BPSD,3),F9DV) // Only LFP, CRT supported by IGD in PX
+ //
+// Return(TMP9)
+// }
+ //
+// //
+// // Function 10: Set Selected Displays in CMOS
+// //
+// // Records Selected Displays in CMOS
+// //
+// If(LEqual(Arg0,0xA))
+// {
+// Name(TMPA,Buffer(256) {0x0})
+ //
+// CreateWordField(Arg1,0,AIAS)
+// CreateWordField(Arg1,2,SDCM)
+ //
+// // Records Selected Displays in CMOS
+// Store(And(SDCM,3),BPSD) // Only LFP, CRT supported by IGD in PX
+ //
+// Return(TMPA)
+// }
+ //
+// //
+// // Function 12: Thermal Change Notification
+// //
+// // GPU temperature threshold related function
+// //
+// If(LEqual(Arg0,0xC))
+// {
+// Name(TMPC,Package() {0xFFFF,0xFFFFFFFF,0xFF,0xFF,0xFF,0xFF})
+//
+// // Size of return structure
+// Store(0x000A,Index(TMPC,0))
+//
+// // Flags
+////<TO DO>check Store(0x00000003,Index(TMPC,1))
+//
+// // High Temperature Threshold
+////<TO DO>check Store(0x00,Index(TMPC,2))
+//
+// // Low Temperature Threshold
+////<TO DO>check Store(0x00,Index(TMPC,3))
+//
+// // Thermal State At High Temperature Threshold
+////<TO DO>check Store(0x00,Index(TMPC,4))
+//
+// // Thermal State At Low Temperature Threshold
+////<TO DO>check Store(0x00,Index(TMPC,5))
+//
+// Return(TMPC)
+// }
+ //
+// //
+// // Function 13: Temperature Change Notification
+// //
+// // GPU temperature threshold related function
+// //
+// If(LEqual(Arg0,0xD))
+// {
+// Name(TMPD,Package() {0xFFFF,0xFFFFFFFF,0xFF,0xFF,0xFF,0xFF})
+// CreateWordField(Arg1,0,AIDS)
+// CreateWordField(Arg1,2,TGCI)
+// CreateByteField(Arg1,4,CGPT)
+ //
+// Return(TMPD)
+// }
+ //
+ // Function 15: Get Graphics Device Types
+ //
+ // This function reports all graphics devices and XGP ports supported by a given platform
+ //
+ If(LEqual(Arg0,0xF))
+ {
+ Name(TMPF,Buffer(256) {0x0})
+ CreateWordField (TMPF, 0, FFND)
+ CreateWordField (TMPF, 2, FFDS)
+ CreateDwordField (TMPF, 4, FFFG)
+ CreateWordField (TMPF, 8, FFBS)
+ CreateWordField (TMPF, 10, FFDV)
+
+
+
+ Return(TMPF)
+ }
+
+
+
+ Return (0)
+ }
+ Name(ATIB, Buffer(0x100){})
+ Name(PSBR, Buffer(0x4){0x00}) // Pending System BIOS Requests. (these get cleared only when function 2 is called)
+ Name(SSPS, 0x00) // Save System Power Source
+ Method(AFN0, 0, Serialized)
+ {
+ CreateBitField(PSBR, 0, PDSW) // Display switch request
+ Store(One, PDSW) // Set the request to pending state
+ Notify(IGPU_SCOPE, 0x81) // Inform the display driver
+ }
+
+
+ Method(AFN4, 1, Serialized) // Arg0: System Power Source
+ {
+ Store(Arg0, Local0)
+ Store(SSPS, Local1)
+ Store(Local0, SSPS)
+ If(LEqual(Local0, Local1))
+ {
+ } Else
+ {
+ CreateBitField(PSBR,0x04,PSPS)
+ Store(One, PSPS)
+ Notify(IGPU_SCOPE, 0x81)
+ }
+ }
+
+ Method(AFN5, 0, Serialized)
+ {
+ CreateBitField(PSBR,0x05,PDCC)
+ Store(One, PDCC)
+ Notify(IGPU_SCOPE, 0x81)
+ }
+
+ Method(AFN6, 0, Serialized)
+ {
+ CreateBitField(PSBR, 6, PXPS) // PowerXpress graphics switch toggle request
+ Store(One, PXPS) // Set the request to pending state
+ Notify(IGPU_SCOPE, 0x81) // Inform the display driver
+ }
+
+ Method(AFN7, 1, Serialized) // Arg0: Panel Brightness: Backlight Level
+ {
+ CreateBitField(PSBR, 7, PBRT) // Brightness level change request
+ Store(One, PBRT) // Pending brightness level request
+
+ CreateByteField(ATIB, 12, BRTL) // Brightness Level
+ Store(Arg0, BRTL) // Brightness level
+ Notify(IGPU_SCOPE, 0x81)
+ }
+
+ Method(AFN8, 0, Serialized)
+ {
+ CreateBitField(PSBR, 8, DCSC) // Discrete GPU display connect state change request
+ Store(One, DCSC) // Pending brightness level request
+ Notify(IGPU_SCOPE, 0x81)
+ }
+
+ Method(CTOI,1)
+ {
+ If(LNotEqual(NTLE, Zero))
+ {
+ If(LEqual(TLE1, Arg0))
+ {
+ Return(1)
+ }
+ If(LEqual(TLE2, Arg0))
+ {
+ Return(2)
+ }
+ If(LEqual(TLE3, Arg0))
+ {
+ Return(3)
+ }
+ If(LEqual(TLE4, Arg0))
+ {
+ Return(4)
+ }
+ If(LEqual(TLE5, Arg0))
+ {
+ Return(5)
+ }
+ If(LEqual(TLE6, Arg0))
+ {
+ Return(6)
+ }
+ If(LEqual(TLE7, Arg0))
+ {
+ Return(7)
+ }
+ If(LEqual(TLE8, Arg0))
+ {
+ Return(8)
+ }
+ If(LEqual(TLE9, Arg0))
+ {
+ Return(9)
+ }
+ If(LEqual(TL10, Arg0))
+ {
+ Return(10)
+ }
+ If(LEqual(TL11, Arg0))
+ {
+ Return(11)
+ }
+ If(LEqual(TL12, Arg0))
+ {
+ Return(12)
+ }
+ If(LEqual(TL13, Arg0))
+ {
+ Return(13)
+ }
+ If(LEqual(TL14, Arg0))
+ {
+ Return(14)
+ }
+ If(LEqual(TL15, Arg0))
+ {
+ Return(15)
+ }
+ }
+ Return(1) //If no match, then set TLSN to 1
+ }
+
+ Method(NATL,1)
+ {
+ If(LNotEqual(NTLE, Zero))
+ {
+ If(LEqual(Arg0,1))
+ {
+ Return(TLE2)
+ }
+ If(LEqual(Arg0,2))
+ {
+ Return(TLE3)
+ }
+ If(LEqual(Arg0,3))
+ {
+ Return(TLE4)
+ }
+ If(LEqual(Arg0,4))
+ {
+ Return(TLE5)
+ }
+ If(LEqual(Arg0,5))
+ {
+ Return(TLE6)
+ }
+ If(LEqual(Arg0,6))
+ {
+ Return(TLE7)
+ }
+ If(LEqual(Arg0,7))
+ {
+ Return(TLE8)
+ }
+ If(LEqual(Arg0,8))
+ {
+ Return(TLE9)
+ }
+ If(LEqual(Arg0,9))
+ {
+ Return(TL10)
+ }
+ If(LEqual(Arg0,10))
+ {
+ Return(TL11)
+ }
+ If(LEqual(Arg0,11))
+ {
+ Return(TL12)
+ }
+ If(LEqual(Arg0,12))
+ {
+ Return(TL13)
+ }
+ If(LEqual(Arg0,13))
+ {
+ Return(TL14)
+ }
+ If(LEqual(Arg0,14))
+ {
+ Return(TL15)
+ }
+ If(LEqual(Arg0,15))
+ {
+ Return(TLE1)
+ }
+ }
+ Return(0)
+ }
+} // end PCI0.GFX0 scope
+
+
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/AtiSSDT.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/AtiSSDT.asl
new file mode 100644
index 0000000..5264ff1
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/AtiSSDT.asl
@@ -0,0 +1,143 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/AtiSSDT.asl 1 1/15/13 5:58a Joshchou $
+//
+// $Revision: 1 $
+//
+// $Date: 1/15/13 5:58a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/AtiSSDT.asl $
+//
+// 1 1/15/13 5:58a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Create componet for SG support on PEG
+// [Files] SgAti.cif
+// AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+//
+// 2 9/09/12 11:02p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+// SgAti.cif
+//
+// 2 12/22/11 6:36a Alanlin
+// Declared "defined(SGTPV_ASL_DEBUG) && (SGTPV_ASL_DEBUG ==1)"
+//
+// 1 6/27/11 5:26a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgAti.cif
+// AtiSSDT.asl
+// ATdGPU.asl
+// ATiGPU.asl
+// ATiGDmisc.asl
+//
+//
+// 3 11/12/10 1:22p Alexp
+// include "token.h" inside the command line to CL preprocessor in
+// SgAcpiTable.mak
+//
+// 2 10/05/10 7:09p Alexp
+// Added debug macro to be able to insert include check points in target
+// ASL code
+//
+// 1 9/17/10 1:20p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgAti.cif;
+// AtiSSDT.asl; ATdGPU.asl;ATiGPU.asl;ATiGDmisc
+//
+// 1 6/08/10 3:45p Alexp
+//
+// 1 6/03/10 2:56p Alexp
+//
+// 1 7/16/09 11:17a Alexp
+// Added SG support for AMD ATI Gfx adaptors
+//
+//
+//**********************************************************************
+
+DefinitionBlock (
+ "Amd.aml",
+ "SSDT",
+ 1,
+ "AmdRef",
+ "AmdTabl",
+ 0x1000
+ ){
+
+External(P8XH, MethodObj)
+#if defined(SGTPV_ASL_DEBUG) && (SGTPV_ASL_DEBUG ==1)
+#define P8DB(arg0, arg1, arg2) P8XH (0, arg1) P8XH (1, arg0) sleep(arg2)
+#else
+#define P8DB(arg0, arg1, arg2)
+#endif
+
+External(PCI_SCOPE, DeviceObj)
+External(PEG_SCOPE, DeviceObj)
+External(DGPU_SCOPE, DeviceObj)
+External(IGPU_SCOPE, DeviceObj)
+External(DGPU_SCOPE._ADR, DeviceObj)
+External(DGPU_SCOPE.SGST, MethodObj)
+External(DGPU_SCOPE.SGON, MethodObj)
+External(DGPU_SCOPE.SGOF, MethodObj)
+External(DGPU_SCOPE.SGPI, MethodObj)
+External(DGPU_SCOPE.SGPO, MethodObj)
+External(\DSEL)
+External(\ESEL)
+External(\SSEL)
+External(\PSEL)
+External(\HLRS)
+External(\PWEN)
+External(\PWOK)
+
+#include <ATdGPU.ASL> // Include dGPU device namespace
+#include <ATiGPU.ASL> // Include IGD _DSM and AMD ATIF/ATPM/ATRM methods
+#include <ATiGDmisc.ASL> // Include misc event callback methods
+
+} // end SSDT
+
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NVdGPU.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NVdGPU.asl
new file mode 100644
index 0000000..0359b5e
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NVdGPU.asl
@@ -0,0 +1,806 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/NVdGPU.asl 4 3/21/13 3:55a Joshchou $
+//
+// $Revision: 4 $
+//
+// $Date: 3/21/13 3:55a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/NVdGPU.asl $
+//
+// 4 3/21/13 3:55a Joshchou
+// [TAG] EIP115355
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] NV HD audio did not disable
+// [RootCause] 0x488 [25] is not disable.
+// [Solution] Clear this bit in _PS0 method and _on method.
+//
+// 3 2/21/13 5:35a Joshchou
+// [TAG] EIP106524
+// [Category] New Feature
+// [Description] Support GC6 function for Optimus.
+//
+// 2 2/07/13 3:12a Joshchou
+// [TAG] EIP111393
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Shows Error Event ACPI (ID 10) in Win8 event viewer
+// [RootCause] We use PCI_CONFIG to save/restore registers.
+// [Solution] Change to use MMIO to save/restore registers.
+//
+// 1 1/15/13 5:58a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Create componet for SG support on PEG
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+// NvGPS.asl
+//
+// 7 12/22/12 2:32a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Update for SA RC 0.8.1.
+// Since RC has saved and restored registers,
+// do not have to save/restore register here.
+//
+// 6 12/12/12 4:20a Joshchou
+// [TAG] EIP108203
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] Optimus function can not work normally
+//
+// 5 10/19/12 8:22a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Save/restore TC/VC remapping setting register
+// [Files] NVdGPU.asl
+//
+// 4 10/16/12 4:37a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] save/store PCIE NV PCI register from 0 to 256 byte by
+// Dword access while do _ON & OFF for NV SG
+// [Files] NVdGPU.asl
+//
+// 2 9/09/12 11:04p Joshchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+// NvGPS.asl
+//
+// 6 12/26/11 4:59a Alanlin
+// 1.Change OperationRegion of BPCI access type from "AnyAcc" to
+// "DWordAcc" for nVidia VGA.
+//
+//
+// 4 12/22/11 6:28a Alanlin
+// [Category] Bug Fix
+// [Description] Fixed NV dGPU Driver has yellow mark when OS is Win7
+// x32.
+//
+// 3 12/02/11 5:36a Alanlin
+// [TAG] EIP75211
+// [Category] Improvement
+// [Description] 1.Following nVidia's suggestion to change
+// OperationRegion access type from "AnyAcc" to "DWordAcc" for nVidia new
+// chip.
+// 2.Changeing VBIOS size to 128k for _ROM method for nVidia chip.
+//
+// 2 10/06/11 11:08p Alanlin
+// [Category] Improvement
+// [Description] Fixed build error when MXM30_SUPPORT = 0.
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+//
+//
+// 7 3/17/11 6:17p Alexp
+// Optimus:Add code to preserve HD AudioCodec enable flag in CMOS
+//
+// 6 1/03/11 12:29p Alexp
+// [TAG] EIP50104
+// [Category] Improvement
+// [Description] optimize PCI context save/restore in DGPU._OFF() method
+// [Files] NVdGPU.asl
+//
+// 5 11/11/10 3:15p Alexp
+// Bug Fix: DGPU_SCOPE._ON - remove write to Link train bit field RETR
+// that was redefined in SgDGPU.asl
+// Optimization: Move Optimus _DSM functions to NviGPU.asl
+//
+// 4 10/08/10 1:49p Alexp
+// re-arrange check point messages
+//
+// 3 10/06/10 3:34p Alexp
+// Include defines for different Nvidia GUID functions. Helps to control
+// inclusion of peices of ASL depending on type of desired SG mode
+//
+// 2 10/05/10 7:14p Alexp
+// 1. Added debug macro to be able to insert check points in target ASL
+// code
+// 2. Reuse NVdGPU.asl file to build OpSSDT for Optimus and NvSSDT for
+// MUXed SG targets.
+// NvOptimus.asl no longer required
+//
+// 1 9/17/10 1:21p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgNvidia.cif;
+// NvSSDT.asl; NVdGPU.asl;NViGPU.asl;NViGDmisc
+// OpSSDT.asl;NvOptimus.asl;NvVenture.asl
+//
+//**********************************************************************
+// PEG Endpoint PCIe Base Address.
+External(EBAS)
+External(NVHA)
+
+#ifdef OPTIMUS_DSM_GUID
+Scope(PCI_SCOPE){
+
+ Name(OTM, "OTMACPI 2010-Mar-09 12:08:26") // OTMACPIP build time stamp.
+} // end of Scope
+#endif
+
+Scope(DGPU_SCOPE)
+{
+//<AMI_SHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: PCI2
+//
+// Description: For save/store PCIE NV PCI register from 0 to 256 byte by Dword access while do _ON & OFF
+//
+//-------------------------------------------------------------------------
+//<AMI_SHDR_END>
+ OperationRegion (PCI2, SystemMemory, EBAS, 0x500)
+ Field(PCI2, DWordAcc, Lock, Preserve)
+ {
+ Offset(0x4),
+ CMDR, 8,
+ VGAR, 2000,
+ Offset(0x48B),
+ , 1,
+ NHDA, 1,
+ }
+ Name(VGAB, Buffer(0xFA)
+ {
+ 0x00
+ })
+ Name(GPRF, Zero)
+
+//<AMI_SHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: NVHM
+//
+// Description: Nvidia NVHG (dGPU) OperationRegion
+// OpRegion address (NVHA)is defined in IDG Nvs OpRegion
+//
+//-------------------------------------------------------------------------
+//<AMI_SHDR_END>
+ OperationRegion(NVHM,SystemMemory, NVHA, 0x20400)
+ Field(NVHM, DWordAcc, NoLock, Preserve)
+ {
+ // OpRegion Header
+
+ NVSG, 0x80, // (000h) Signature-"NVSG".
+ NVSZ, 0x20, // (010h) OpRegion Size in KB.
+ NVVR, 0x20, // (014h) OpRegion Version.
+
+ // NVHG data
+
+ NVHO, 0x20, // (018h)NVHM opregion address
+ RVBS, 0x20, // (01Ch)NVIDIA VBIOS image size
+ // (020h)for _ROM
+ RBF1, 0x40000, // 0x8000 bytes in bits
+ RBF2, 0x40000, // 0x8000 bytes in bits
+ RBF3, 0x40000, // 0x8000 bytes in bits
+ RBF4, 0x40000, // 0x8000 bytes in bits
+ MXML, 0x20, // Mxm3 buffer length
+#if MXM30_SUPPORT
+ MXM3, MXM_ROM_MAX_SIZE_bits // MXM 3.0 Data buffer
+#else
+ MXM3, 0x640 // MXM 3.0 Data buffer
+#endif
+
+ }
+
+ Name(OPCE, 2) // Optimus Power-Control ENABLE
+ // 2: The platform should not power down the GPU subsystem
+ // in the _PS3 method (Default)
+ // 3: The platform should power down the GPU subsystem
+ // at the end of the _PS3 ACPI method
+
+ Name(DGPS, Zero)// Power State. dummy control field. Can be a GPIO in EC or PCH
+
+#ifdef OPTIMUS_DSM_GUID
+
+//If dGPU power control is available....
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _PSC
+//
+// Description: Curent dGPU power state, 0-D0, 3-D3, etc.
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Name(_PSC, Zero)
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _PS0
+//
+// Description: dGPU power ON control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(_PS0, 0, NotSerialized)
+ {
+ P8DB(0xB0, OPCE, 2000)
+ Store(0x0,NHDA) //NV HDMI audio did not need enable
+ Store(Zero, _PSC)
+ If(LNotEqual(DGPS, Zero))
+ {
+ _ON() // with Optimus w/a
+ Store(Zero, DGPS)
+ }
+ }
+
+ Method(_PS1, 0x0, NotSerialized)
+ {
+ Store(One, _PSC)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _PS3
+//
+// Description: dGPU power OFF control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(_PS3, 0, NotSerialized)
+ {
+ P8DB(0xB3, OPCE, 2000)
+ If(LEqual(OPCE, 0x3))
+ {
+ If(LEqual(DGPS, Zero))
+ {
+ _OFF() // w Optimus w/a
+ Store(One, DGPS)
+ }
+ Store(0x2, OPCE) // Reset NV GPU power down flag
+ }
+ Store(0x3, _PSC)
+ }
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _STA
+//
+// Description: dGPU power status.
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_STA,0x0)
+ {
+ Return(0x0F) // Always return DGPU is powered-ON
+ }
+
+#endif // OPTIMUS_DSM_GUID
+
+#if HYBRID_DSM_GUID || MXM_DSM_GUID
+// NON-OPTIMUS mode - MUXed
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _IRC
+//
+// Description: In-rush current
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+// Name(_IRC, 0)
+ Method(_IRC,0,Serialized)
+ {
+ Return(0x00)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _ON
+//
+// Description: dGPU power ON control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_ON,0,Serialized)
+ {
+ SGON() // OEM Mxm Power On
+ //Ask OS to do a PnP rescan
+ Notify(PEG_SCOPE,0)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _OFF
+//
+// Description: dGPU power OFF control method
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_OFF,0,Serialized)
+ {
+ SGOF() // OEM Mxm Power On
+
+ //Ask OS to do a PnP rescan
+ Notify(PEG_SCOPE,0)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _STA
+//
+// Description: Returns curent dGPU power/presence state
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_STA,0,Serialized)
+ {
+ Return(SGST()) // OEM Mxm Power status
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: MXMX
+//
+// Description: Display DDC Mux Control
+//
+// Input:
+// Arg0: Get/Set DDC/Aux Mux State
+// 0- Acquire DDC/Aux Mux on this GPU
+// 1- Release Mux from this GPU
+// 2- Get Mux state
+//
+// Output:
+// 0, Not Acquired.
+// if Arg0 = 0 or 1, Non-Zero return indicates success acquiring MUX
+// (and MUX has switched to this output)
+// if Arg0 = 2, Non-Zero return indicates MUX is currently set to this output
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method (MXMX, 1, Serialized)
+ {
+ P8DB(0x99, Arg0, 2000)
+
+ If (LEqual (Arg0, 0))
+ {
+
+ //Acquire DDC/AUX mux
+ // No mutex implemented. No need to acquire mutex.
+ // Set mux to dGPU
+// SGPO(DSEL, 1)// dGPU_SELECT#
+ SGPO(ESEL, 1)// use EDID_SELECT# as Mutex flag
+ Return(1)
+ }
+
+ If (LEqual (Arg0, 1))
+ {
+
+ //Release DDC/AUX mux
+ // No mutex implemented. No need to release mutex.
+ // 2-way mux. Hence no need to do anything
+ Return(0x1)
+
+ }
+
+ If (LEqual (Arg0, 2))
+ {
+
+ //Get ddc/aux mux status for dGPU
+ Return(SGPI(ESEL))
+ }
+
+ Return(0x0) // mutex not acquired
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: MXDS
+//
+// Description: Display output MUX control
+//
+// Input:
+// Arg0:
+// 0 - Get Mux state
+// 1 - Set Display to active on this GPU
+// 2 - Set Backlight control to active on this GPU
+// 3 - Set Display & Backlight to active on this GPU
+//
+// Output:
+// If Arg0 = 0, Error = Display is not MUXed
+// Else return value of the state of the MUX
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(MXDS, 1, Serialized)
+ {
+ P8DB(0x9A, Arg0, 2000)
+
+ If(LEqual (Arg0, 0))
+ {
+ //Get display mux status for dGPU
+ return(SGPI(DSEL))
+ } else
+// If(LOr(LEqual (Arg0, 1), LEqual (Arg0, 2)))
+ {
+ //Set display mux to dgpu
+ SGPO(DSEL, 1) // dGPU_SELECT
+ SGPO(PSEL, 1) // dGPU_PWM_SELECT
+ }
+
+ Return (0)
+ }
+#endif // MXM && HYBRID
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _ROM
+//
+// Description: Video ROM data buffer
+//
+// Input:
+// Arg0: Integer Offset of the graphics device ROM data
+// Arg1: Integer Size of the buffer to fill in (up to 4K)
+//
+// Output:
+// Buffer Buffer of requested video ROM bytes
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_ROM,2)
+ {
+
+ Store (Arg0, Local0)
+ Store (Arg1, Local1)
+
+ P8DB(0x44, Local1, 100)
+// CreateWordField (RBF1, 2, RVBS) // Vbios image size
+// ShiftLeft(And(RVBS,0xff), 9, RVBS) // size in Bytes (* 512)
+
+ If (LGreater (Local1, 0x1000))
+ {
+ Store (0x1000, Local1)
+ }
+ If (LGreater (Local0, 0x20000))
+ {
+ Return(Buffer(Local1){0})
+ }
+// If (LGreater (Local0, RVBS))
+// {
+// Return(Buffer(Local1){0})
+// }
+//// If (LGreater (Add (Local0, Local1), RVBS))
+//// {
+//// Store (0x00, Local0)
+//// }
+
+ Multiply (Local1, 0x08, Local3)
+ Name (ROM1, Buffer (0x8000) {0})
+ Name (ROM2, Buffer (Local1) {0})
+
+ If(LLess(Local0, 0x8000)){
+ Store(RBF1, ROM1)
+ }
+ ElseIf(LLess(Local0, 0x10000)){
+ Subtract(Local0,0x8000,Local0)
+ Store(RBF2, ROM1)
+ }
+ ElseIf(LLess(Local0, 0x18000)){
+ Subtract(Local0,0x10000,Local0)
+ Store(RBF3, ROM1)
+ }
+ ElseIf(LLess(Local0, 0x20000)){
+ Subtract(Local0,0x18000,Local0)
+ Store(RBF4, ROM1)
+ }
+
+ Multiply (Local0, 0x08, Local2)
+ CreateField (ROM1, Local2, Local3, TMPB)
+ Store (TMPB, ROM2)
+ Return (ROM2)
+ }
+
+//
+// Check for Nvidia _DSM UUIDs
+//
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HDSM
+//
+// Description: Device Specific Methods for Hybrid dGPU (may be invoked from iGD as well)
+// Implements Mxm and SG specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// nVidia
+// MXM dGPU GUID :9D95A0A0-0060-4D48-B34D-7E5FEA129FD4
+//
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(HDSM, 4, SERIALIZED)
+ {
+
+#ifdef MXM_DSM_GUID
+
+ If(LEqual(Arg0, ToUUID("4004A400-917D-4cf2-B89C-79B62FD55665")))
+ {
+
+ P8DB(0xEE, Arg2, 1000)
+
+ Switch(ToInteger(Arg2))
+ {
+ //
+ // Function 0: MXM_FUNC_MXSS
+ //
+ case (0)
+ {
+ //Sub-Functions 0,16,24 are supported
+ Return(ToBuffer(0x01010001))
+ }
+
+ //
+ // Function 24: MXM_FUNC_MXMI
+ //
+ case (24)
+ {
+ Return(ToBuffer(0x300)) // MXM 1.101 defines revision as 0x300
+ // Return(ToBuffer(0x30)) // MXM 1.101 defines revision as 0x300
+ }
+
+ //
+ // Function 16: MXM_FUNC_MXMS
+ //
+ case (16)
+ {
+ If(LEqual (Arg1, 0x300)) // MXM 1.101 defines revision as 0x300
+ {
+#if MXM30_SUPPORT
+ // calculate true length of MXM block
+ CreateWordField(MXM3, 6, MXLN)
+ Add(MXLN, 8, Local0) // Add length of MXM header
+ CreateField(MXM3, 0, Local0, MXM)
+ Return(ToBuffer(MXM))
+#else
+ // ElkCreek 4 Mxm data structure
+ Name(MXM3, Buffer()
+ {
+ 0x4d, 0x58, 0x4d, 0x5f, 0x03, 0x00, 0x5d, 0x00,
+ 0x30, 0x11, 0xb8, 0xff, 0xf9, 0x3e, 0x00, 0x00,
+ 0x00, 0x00, 0x0a, 0xf0, 0xf9, 0x3e, 0x00, 0x00,
+ 0x60, 0xe9, 0xd0, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x60, 0x6a, 0xda, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x20, 0x2b, 0xe2, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x60, 0x6c, 0xea, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x20, 0x6a, 0xda, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x20, 0x6c, 0xea, 0xfe, 0xf9, 0x3e, 0x00, 0x00,
+ 0x01, 0x90, 0x01, 0x00, 0x03, 0x00, 0x90, 0x01,
+ 0x13, 0x00, 0x90, 0x01, 0xe5, 0x0d, 0x01, 0x01,
+ 0x01, 0x00, 0x00, 0x00, 0xe5, 0x0d, 0x01, 0x03,
+ 0x00, 0x90, 0xd8, 0x09, 0x11, 0x0a
+ })
+ Return(MXM3)
+#endif
+ }
+ }
+ } // switch
+ Return(0x80000002) //MXM_ERROR_UNSUPPORTED - FunctionCode or SubfunctionCode not supported
+ } // "4004A400-917D-4cf2-B89C-79B62FD55665"
+
+#endif // MXM_DSM_GUID
+
+ Return (0x80000001) //MXM_ERROR_UNSPECIFIED
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _DSM Device Specific Method for dGPU device
+//
+// Description: Implement Mxm and SG specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// MXM dGPU GUID :9D95A0A0-0060-4D48-B34D-7E5FEA129FD4
+// NBCI GUID :D4A50B75-65C7-46F7-BfB7-41514CEA0244
+// Ventura GUID :95DB88FD-940A-4253-A446-70CE0504AEDF
+// Optimus DSM_GUID :A486D8F8-0BDA-471B-A72B-6042A6B5BEE0
+//
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(_DSM,4,SERIALIZED)
+ {
+ CreateByteField (Arg0, 3, GUID)
+ P8DB(0xDD, GUID, 1000)
+ //
+ // Check for Nvidia _DSM UUIDs
+ //
+ // common _DSM for dGPU and iGPU: NBCI, SG DSM, Ventura
+ return(IGPU_SCOPE.HDSM(Arg0, Arg1, Arg2, Arg3))
+ }
+
+
+#ifdef OPTIMUS_DSM_GUID
+// TEST !!! TEST !!! TEST !!!!
+// NvOptimus should not be be using _ON and _OFF methods for power cycling
+// Used here for testing with Intel ElkCreek Mxm interposer
+//
+ Name(CTXT, Zero)// Save Context flag
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _ON
+//
+// Description: Optimus w/a for before dGPU _ON
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(_ON, 0, Serialized)
+ {
+ P8DB(0x01, 0x11, 2000)
+ // OEM Mxm Power status
+ SGON()
+
+// Nvidia Optimus driver w/a. Restore saved PCI context of PEG Video card
+// Skip restore resource if GPRF = 1
+ If(LNotEqual(GPRF, One))
+ {
+ Store(CMDR,local0)
+ Store(Zero, CMDR)
+ Store(VGAB, VGAR)
+ Store(0x06, CMDR)
+ Store(0x0,NHDA) //NV HDMI audio did not need enable
+ Store(local0,CMDR)
+ }
+
+// Store(1, RETR) // retrain PCI-E bus
+//+<
+// doesn't look like we need delay here...
+// Sleep(0x64)
+
+ Store(SWSMI_NVOEM_CMOS_R, SSMP) // Read CMOS:AudioCodec flag to AcpiNvs:SGFL
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: _OFF
+//
+// Description: Optimus w/a before dGPU _OFF
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+ Method(_OFF, 0, Serialized)
+ {
+
+ P8DB(0x0F, 0xFF, 2000)
+// store PCI context only once
+ If(LEqual(CTXT, Zero))
+ {
+// Nvidia Optimus driver w/a. Save PCI context of PEG Video card
+ //+ for GC6 , need to de-assert EC FB_CLAMP
+
+ //-
+ // Skip restore resource if GPRF = 1
+ If(LNotEqual(GPRF, One))
+ {
+ Store(VGAR, VGAB)
+
+ }
+//+<
+ Store(1, CTXT)
+ }
+
+ SGOF()
+
+ }
+#endif
+} // end Scope(DGPU_SCOPE)
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NViGDmisc.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NViGDmisc.asl
new file mode 100644
index 0000000..e81c4a6
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NViGDmisc.asl
@@ -0,0 +1,306 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/NViGDmisc.asl 1 1/15/13 5:59a Joshchou $
+//
+// $Revision: 1 $
+//
+// $Date: 1/15/13 5:59a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/NViGDmisc.asl $
+//
+// 1 1/15/13 5:59a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Create componet for SG support on PEG
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+// NvGPS.asl
+//
+// 2 9/09/12 11:04p Joshchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+// NvGPS.asl
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+//
+//
+// 4 11/12/10 1:27p Alexp
+// Change IDAB method: invoke IGD_SCOPE.IDAB is it's defined
+//
+// 3 10/08/10 12:04p Alexp
+// code clean up: removed unused externs
+//
+// 2 10/05/10 7:14p Alexp
+// 1. Added debug macro to be able to insert check points in target ASL
+// code
+// 2. Reuse NVdGPU.asl file to build OpSSDT for Optimus and NvSSDT for
+// MUXed SG targets.
+// NvOptimus.asl no longer required
+//
+// 1 9/17/10 1:21p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgNvidia.cif;
+// NvSSDT.asl; NVdGPU.asl;NViGPU.asl;NViGDmisc
+// OpSSDT.asl;NvOptimus.asl;NvVenture.asl
+//
+// 1 6/08/10 3:45p Alexp
+//
+// 1 6/03/10 2:54p Alexp
+//
+// 6 10/05/09 5:35p Alexp
+// updated asl code for Ati and Nvidia according to Calpella SG BWG 1.1
+//
+// 5 8/20/09 7:08p Alexp
+// upgraded Ati and Nvidia SSDT Asl files to match latest Acpi code drop
+// #68
+//
+// 4 8/10/09 4:21p Alexp
+// changed with latest reference code from Intel MPG. not yet tested
+//
+// 3 7/16/09 11:17a Alexp
+// Added SG support for AMD ATI Gfx adaptors
+//
+//
+//**********************************************************************
+
+External(DSEN)
+External(IGPU_SCOPE.CDCK)
+External(DGPU_SCOPE.DD02)
+External(IGPU_SCOPE.IDAB, MethodObj)
+
+//Do not remove this function.
+Method(IDAB, 0, Serialized)
+{
+ If (CondRefOf(IGPU_SCOPE.IDAB))
+ {
+ IGPU_SCOPE.IDAB()
+ }
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HGAS
+//
+// Description: HG Adaptor select, notify
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HGAS) //HG Adaptor select
+{
+ //Stateless button/Hotkey supporting 3 states - Power Saver, Adaptive and Perf
+
+ Increment(IGPU_SCOPE.GPSS)
+ Mod(IGPU_SCOPE.GPSS, 3, IGPU_SCOPE.GPSS)
+
+ Store(1,IGPU_SCOPE.GPPO)
+ Store(1,IGPU_SCOPE.SGNC) //indicate 'policy select' change
+
+ Notify(IGPU_SCOPE, 0xD0)
+ Notify(PCI_SCOPE.WMI1, 0xD0) // Mirror Notify on WMI1
+
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HBRT
+//
+// Description: Send backlight notifications to the DGPU LFP device
+// This is required for Win7 and is backward compatible with Vista
+//
+// Input: Arg0 - 4 - Brightnes Down, 3- Up
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HBRT, 1 , Serialized)
+{
+ Store(Arg0,IGPU_SCOPE.DACE)
+
+ If(And(4,DSEN)) //Note: DSEN variable is expected to be set by IGD miniport only.
+ {
+ If(LEqual(Arg0,4))
+ {
+ Notify(DGPU_SCOPE.DD02,0x87) //Note: DD02 is hardcoded as the LFP device in intelgfx.asl
+ }
+ If(LEqual(Arg0,3))
+ {
+ Notify(DGPU_SCOPE.DD02,0x86)
+ }
+ }
+
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HPFS
+//
+// Description: Panel Fitting Hot Key
+//
+// Input: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HPFS, 0, Serialized) //Panel Fitting Hot Key
+{
+ //
+ // HG Handling of Panel Fitting Switch
+ //
+
+ Store(5,IGPU_SCOPE.DACE) // Indicate display scaling hot key event
+ Store(2,IGPU_SCOPE.SGNC) // Indicate platpolicy change
+
+ //
+ // Expansion Mode toggling
+ //
+ Increment(IGPU_SCOPE.GPSP)
+ Mod(IGPU_SCOPE.GPSP, 4 , IGPU_SCOPE.GPSP)
+
+ Notify(IGPU_SCOPE,0xDC)
+
+}
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HNOT
+//
+// Description: Notification handler for Switchable graphics. Called from GNOT()
+//
+// Input: Arg0 = Current event type:
+// 1 = display switch
+// 2 = lid
+// 3 = dock (!!!!!Acpi ref code, Method(GDCK)sends 4 for Dock notifications )
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method (HNOT, 1, Serialized)
+{
+ Switch(ToInteger(Arg0))
+ {
+ case(1) //Display Switch event
+ {
+ Store(3,IGPU_SCOPE.SGNC) // indicate 'Displaystatus' change
+ Store(1,IGPU_SCOPE.DACE)
+ Notify(IGPU_SCOPE, 0x80)
+ Notify(PCI_SCOPE.WMI1, 0x80) // Mirror Notify on WMI1
+ }
+
+ case (2) //Lid switch event
+ {
+ //Note: NV clarified that only LDES needs to be set
+ Store(1,IGPU_SCOPE.LDES)
+ Notify(IGPU_SCOPE, 0xDB)
+ Notify(PCI_SCOPE.WMI1, 0xDB) // Mirror Notify on WMI1
+ }
+// case (3) //Dock event
+ case (4) //Dock event (!!!Acpi ref code, Method(GDCK)sends 4 for Dock notifications)
+ {
+ Store(IGPU_SCOPE.CDCK, IGPU_SCOPE.DKST) // Store the current dock state
+ Notify(IGPU_SCOPE, 0x81)
+ Notify(PCI_SCOPE.WMI1, 0x81) // Mirror Notify on WMI1
+ }
+
+ Default
+ {
+ Notify(IGPU_SCOPE,0x80)
+ }
+
+ }
+
+}
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: CHPS
+//
+// Description: Shows current Hybrid Policy status on Port80 header
+// Adaptive -> 1, Save power -> 2 and High performance -> 3
+//
+// Input: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(CHPS)
+{
+ P8DB(0xEC, Add(IGPU_SCOPE.GPSS, 1), 2000)
+}
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HDOS
+//
+// Description: Check if the _DOS flag was set during the hot key handling
+//
+// Input: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+Method(HDOS, 0, Serialized)
+{
+ If(LEqual(IGPU_SCOPE.DOSF,1))
+ {
+ Store(1,IGPU_SCOPE.SGNC) // indicate 'policy select' change
+ Notify(IGPU_SCOPE,0xD0)
+ Notify(PCI_SCOPE.WMI1, 0xD0) // Mirror Notify on WMI1
+ Store(0, IGPU_SCOPE.DOSF) // Clear the DOSF
+ }
+}
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NViGPU.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NViGPU.asl
new file mode 100644
index 0000000..2410021
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NViGPU.asl
@@ -0,0 +1,1108 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/NViGPU.asl 2 2/21/13 5:36a Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 2/21/13 5:36a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/NViGPU.asl $
+//
+// 2 2/21/13 5:36a Joshchou
+// [TAG] EIP106524
+// [Category] New Feature
+// [Description] Support GC6 function for Optimus.
+//
+// 1 1/15/13 5:59a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Create componet for SG support on PEG
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+// NvGPS.asl
+//
+// 3 12/22/12 2:34a Joshchou
+// [TAG] None
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] Sometimes boot to OS will BSOD on customer's platform.
+// [RootCause] The NVIG's structure dose not match with the real size.
+// [Solution] Fix the structure size.
+//
+// 2 9/09/12 11:04p Joshchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+// NvGPS.asl
+//
+// 6 4/11/12 3:54a Alanlin
+// [TAG] EIP82808
+// [Category] Improvement
+// [Description] nVidia GPS function improvement.
+// [Files] Board\EM\SgTpv\AcpiTables\SgTpvAcpiTables.sdl
+// Board\EM\SgTpv\AcpiTables\NvGPS.asl
+// Board\EM\SgTpv\AcpiTables\NViGPU.asl
+//
+// 5 12/02/11 5:37a Alanlin
+// [TAG] EIP75211
+// [Category] Improvement
+// [Description] Following nVidia's suggestion to change OperationRegion
+// access type from "AnyAcc" to "DWordAcc" for nVidia new chip.
+//
+// 4 12/02/11 1:00a Alanlin
+// [TAG] EIP75359
+// [Category] Improvement
+// [Description] 1.Fixed \_SB_.PCI0.GFX0.HDSM method can't be
+// unassembled if use windebug utility to check it.
+// 2.Fixed _DSM sub function 0x1B will report "Unexpected argument type"
+// message if use windebug utility to check it.
+//
+// 2 10/14/11 2:59a Alanlin
+// [TAG] EIP64451
+// [Category] New Feature
+// [Description] Optimus GPS feature update
+// [Files] NvSSDT.asl
+// NViGPU.asl
+// OpSSDT.asl
+// NvGPS.asl
+// SgNvidia.cif
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+//
+//
+// 7 3/17/11 6:17p Alexp
+// Optimus:Add code to preserve HD AudioCodec enable flag in CMOS
+//
+// 6 11/12/10 1:28p Alexp
+// bring back the field ELCL to hold the Link Control register value. Not
+// used as it's overriden in SG Reference Code in SgDGPU.asl
+//
+// 5 11/11/10 3:15p Alexp
+// Optimization: bring Optimus _DSM functions from NvdGPU.asl
+//
+// 4 10/08/10 1:50p Alexp
+// re-arrange debug messages
+//
+// 3 10/06/10 3:34p Alexp
+// Include defines for different Nvidia GUID functions. Helps to control
+// inclusion of peices of ASL depending on type of desired SG mode
+//
+// 2 10/05/10 7:14p Alexp
+// 1. Added debug macro to be able to insert check points in target ASL
+// code
+// 2. Reuse NVdGPU.asl file to build OpSSDT for Optimus and NvSSDT for
+// MUXed SG targets.
+// NvOptimus.asl no longer required
+//
+// 1 9/17/10 1:21p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgNvidia.cif;
+// NvSSDT.asl; NVdGPU.asl;NViGPU.asl;NViGDmisc
+// OpSSDT.asl;NvOptimus.asl;NvVenture.asl
+//
+//**********************************************************************
+External(NVGA)
+
+External(NXD1)
+External(NXD2)
+External(NXD3)
+External(NXD4)
+External(NXD5)
+External(NXD6)
+External(NXD7)
+External(NXD8)
+External(DID1)
+External(DID2)
+External(DID3)
+External(DID4)
+External(DID5)
+External(DID6)
+External(DID7)
+External(DID8)
+
+Scope (IGPU_SCOPE)
+{
+
+ Method(_INI,0)
+ {
+ //DIDx values have been changed in MxmAcpiTables.c
+ //Port - D to be used for eDP only and not as DFP. Hence generating a new toggle list
+ Store(DID1, Index(TLPK,0)) // CRT
+ Store(DID2, Index(TLPK,2)) // LFP
+ Store(DID3, Index(TLPK,4)) // DP_B
+ Store(DID4, Index(TLPK,6)) // HDMI_B
+ Store(DID5, Index(TLPK,8)) // HDMI_C
+ Store(DID6, Index(TLPK,10)) // DP_D
+ Store(DID7, Index(TLPK,12)) // HDMI_D
+ Store(DID2, Index(TLPK,14)) // LFP+CRT
+ Store(DID1, Index(TLPK,15))
+ Store(DID2, Index(TLPK,17)) // LFP+DP_B
+ Store(DID3, Index(TLPK,18))
+ Store(DID2, Index(TLPK,20)) // LFP+HDMI_B
+ Store(DID4, Index(TLPK,21))
+ Store(DID2, Index(TLPK,23)) // LFP+HDMI_C
+ Store(DID5, Index(TLPK,24))
+ Store(DID2, Index(TLPK,26)) // LFP+DP_D
+ Store(DID6, Index(TLPK,27))
+ Store(DID2, Index(TLPK,29)) // LFP+HDMI_D
+ Store(DID7, Index(TLPK,30))
+ }
+
+//
+// MXMX method is dupplicated under GFX0 scope in INTELGFX.ASL
+// need to replace it with method in this file.
+//
+#ifndef OPTIMUS_DSM_GUID
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: MXMX
+//
+// Description: Display DDC Mux Control
+//
+// Input:
+// Arg0: Get/Set DDC/Aux Mux State
+// 0- Acquire DDC/Aux Mux on this GPU
+// 1- Release Mux from this GPU
+// 2- Get Mux state
+//
+// Output:
+// 0, Not Acquired.
+// if Arg0 = 0 or 1, Non-Zero return indicates success acquiring MUX
+// (and MUX has switched to this output)
+// if Arg0 = 2, Non-Zero return indicates MUX is currently set to this output
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method (MXMX, 1, Serialized)
+ {
+ P8DB(0x77, Arg0, 2000)
+
+ If (LEqual (Arg0, 0))
+ {
+ //Acquire DDC/AUX mux
+ // No mutex implemented. No need to acquire mutex.
+ // Set mux to iGPU
+ DGPU_SCOPE.SGPO(DSEL, 0)
+ DGPU_SCOPE.SGPO(ESEL, 0) // use edid_select# as mutex flag
+
+ Return(0x1)
+ }
+
+ If (LEqual (Arg0, 1))
+ {
+ //Release DDC/AUX mux
+ // No mutex implemented. No need to release mutex.
+ // 2-way mux. Hence no need to do anything
+ Return(0x1)
+ }
+
+ If (LEqual (Arg0, 2))
+ {
+
+ //Get ddc/aux mux status for iGPU
+ Return(LNot(DGPU_SCOPE.SGPI(ESEL)))
+ }
+
+ Return(0x0) // mutex not acquired
+ }
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: MXDS
+//
+// Description: Display output MUX control
+//
+// Input:
+// Arg0:
+// 0 - Get Mux state
+// 1 - Set Display to active on this GPU
+// 2 - Set Backlight control to active on this GPU
+// 3 - Set Display & Backlight to active on this GPU
+//
+// Output:
+// If Arg0 = 0, Error = Display is not MUXed
+// Else return value of the state of the MUX
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(MXDS, 1, Serialized)
+ {
+ P8DB(0x7A, Arg0, 2000)
+
+ If(LEqual (Arg0, 0))
+ {
+ //Get display mux status for iGPU
+ return(LNot(DGPU_SCOPE.SGPI(DSEL)))
+ } else
+// If(LOr(LEqual (Arg0, 1), LEqual (Arg0, 2)))
+ {
+ //Set display mux to igpu
+ DGPU_SCOPE.SGPO(DSEL, 0)
+ DGPU_SCOPE.SGPO(PSEL, 0)
+ }
+
+ Return (0)
+ }
+
+#endif // OPTIMUS_DSM_GUID
+
+//<AMI_SHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: NVIG
+//
+// Description: Nvidia NVIG (iGPU) OperationRegion
+//
+//-------------------------------------------------------------------------
+//<AMI_SHDR_END>
+ OperationRegion(NVIG,SystemMemory,NVGA,0x45)
+ Field(NVIG, DWordAcc, NoLock, Preserve)
+ {
+ // OpRegion Header
+
+ NISG, 0x80, // (000h) Signature-"NVSG-IGD-DSM-VAR".
+ NISZ, 0x20, // (010h) OpRegion Size in KB.
+ NIVR, 0x20, // (014h) OpRegion Version.
+
+ // OpRegion Data
+ GPSS, 0x20, // Policy Selection Switch Status (Policy selection)
+ GACD, 0x10, // Active Displays
+ GATD, 0x10, // Attached Displays
+ LDES, 0x08, // Lid Event State
+ DKST, 0x08, // Dock State
+ DACE, 0x08, // Display ACPI event
+ DHPE, 0x08, // Display Hot-Plug Event
+ DHPS, 0x08, // Display Hot-Plug Status
+ SGNC, 0x08, // Notify Code (Cause of Notify(..,0xD0))
+ GPPO, 0x08, // Policy Override (Temporary ASL variables)
+ USPM, 0x08, // Update Scaling Preference Mask (Temporary ASL variable)
+ GPSP, 0x08, // Panel Scaling Preference
+ TLSN, 0x08, // Toggle List Sequence Number
+ DOSF, 0x08, // Flag for _DOS
+ ELCL, 0x10, // Endpoint Link Contol Register Value
+ }
+
+ // Toggle List Package
+ Name(TLPK,Package()
+ {
+ //fix this toggle list. DIDx values have been changed in MxmAcpiTables.c
+ 0xFFFFFFFF, 0x2C, // CRT
+ 0xFFFFFFFF, 0x2C, // LFP
+ 0xFFFFFFFF, 0x2C, // DP_B
+ 0xFFFFFFFF, 0x2C, // HDMI_B
+ 0xFFFFFFFF, 0x2C, // HDMI_C
+ 0xFFFFFFFF, 0x2C, // DP_D
+ 0xFFFFFFFF, 0x2C, // HDMI_D
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+CRT
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+DP_B
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+HDMI_B
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+HDMI_C
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+DP_D
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x2C, // LFP+HDMI_D
+
+ })
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: INDL
+//
+// Description: Initialize Global Next active device list.
+//
+// Input: None
+//
+// Output: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(INDL, 0, Serialized)
+ {
+ Store(0, NXD1)
+ Store(0, NXD2)
+ Store(0, NXD3)
+ Store(0, NXD4)
+ Store(0, NXD5)
+ Store(0, NXD6)
+ Store(0, NXD7)
+ Store(0, NXD8)
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: SND1
+//
+// Description: Set Next active device for a single device
+//
+// Input:
+// Arg0 : Device ID of the device that's to be set as next active device.
+//
+// Output: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(SND1, 1, Serialized)
+ {
+ If(LEqual(Arg0, DID1))
+ {
+ Store(1, NXD1)
+ }
+ If(LEqual(Arg0, DID2))
+ {
+ Store(1, NXD2)
+ }
+ If(LEqual(Arg0, DID3))
+ {
+ Store(1, NXD3)
+ }
+ If(LEqual(Arg0, DID4))
+ {
+ Store(1, NXD4)
+ }
+ If(LEqual(Arg0, DID5))
+ {
+ Store(1, NXD5)
+ }
+ If(LEqual(Arg0, DID6))
+ {
+ Store(1, NXD6)
+ }
+ If(LEqual(Arg0, DID7))
+ {
+ Store(1, NXD7)
+ }
+ If(LEqual(Arg0, DID8))
+ {
+ Store(1, NXD8)
+ }
+
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: SNXD
+//
+// Description: Set Next active device
+//
+// Input:
+// Arg0 TLSN
+//
+// Output: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(SNXD, 1, Serialized)
+ {
+ INDL()
+
+ //
+ // Locate the toggle table entry corresponding to TLSN value
+ // Toggle list entries are separated by 0x2C.
+ //
+
+ Store(1, Local0) // Local0 to track entries. Point to the first entry (TLSN starts from 1)
+ Store(0, Local1) // Local1 to track elements inside the TLPK package (ACPI IDs and '0x2C')
+
+ while(LLess(Local0, Arg0)) // TLSN start from 1!!
+ {
+ if(LEqual(DeRefOf(Index(TLPK,Local1)), 0x2C))
+ {
+ Increment(Local0)
+ }
+ Increment(Local1)
+
+ }
+
+ SND1(DeRefOf(Index(TLPK, Local1))) // 1 st ACPI ID in the entry corresponding to TLSN
+ Increment(Local1)
+ if(LNotEqual(DeRefOf(Index(TLPK,Local1)), 0x2C)) // Check for separator
+ {
+ SND1(DeRefOf(Index(TLPK, Local1))) // 2 nd ACPI ID in the entry corresponding to TLSN
+ }
+
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: CTOI
+//
+// Description: Convert _DOD indices-> MDTL index
+//
+// Input:
+// Arg 0 is the currently active display list
+//
+// Output: None
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(CTOI,1, Serialized)
+ {
+ Switch(ToInteger(Arg0)) //Arg 0 is the currently active display list
+ {
+ //_DOD indices-> MDTL index
+ case(0x1) {Return(1)} //CRT
+ case(0x2) {Return(2)} //LFP
+ case(0x4) {Return(3)} //DP_B
+ case(0x8) {Return(4)} //HDMI_B
+ case(0x10) {Return(5)} //HDMI_C
+ case(0x20) {Return(6)} //DP_D
+ case(0x40) {Return(7)} //HDMI_D
+ case(0x3) {Return(8)} //LFP+CRT
+ case(0x6) {Return(9)} //LFP+DP_B
+ case(0xA) {Return(10)} //LFP+HDMI_B
+ case(0x12) {Return(11)} //LFP+HDMI_C
+ case(0x22) {Return(12)} //LFP+DP_D
+ case(0x42) {Return(13)} //LFP+HDMI_D
+ Default {Return(1)}
+ }
+ }
+
+// Check for Nvidia _DSM UUIDs
+//
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: HDSM
+//
+// Description: Device Specific Methods for Hybrid GPU (may be invoked from dGP and iGD)
+// Implements Mxm and SG specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// nVidia
+// SG dGPU GUID :9D95A0A0-0060-4D48-B34D-7E5FEA129FD4
+// NBCI GUID :D4A50B75-65C7-46F7-BfB7-41514CEA0244
+// Ventura GUID :95DB88FD-940A-4253-A446-70CE0504AEDF
+// Optimus DSM_GUID :A486D8F8-0BDA-471B-A72B-6042A6B5BEE0
+//
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(HDSM, 4, SERIALIZED)
+ {
+
+#if NV_VENTURA_SUPPORT == 1
+ //SPB_DSM_GUID {95DB88FD-940A-4253-A446-70CE0504AEDF}
+//x if(CMPB(Arg0, Buffer(){0xFD,0x88,0xDB,0x95,0x0A,0x94,0x53,0x42,0xA4,0x46,0x70,0xCE,0x05,0x04,0xAE,0xDF}))
+ If(LEqual(Arg0, ToUUID("95DB88FD-940A-4253-A446-70CE0504AEDF")))
+ {
+ return ( DGPU_SCOPE.SPB(Arg0, Arg1, Arg2, Arg3))
+ }
+#endif
+
+#if NV_GPS_SUPPORT == 1
+ //SPB_DSM_GUID {A3132D01-8CDA-49BA-A52E-BC9D46DF6B81}
+//x if(CMPB(Arg0, Buffer(){0x01, 0x2D, 0x13, 0xA3, 0xDA, 0x8C, 0xBA, 0x49,0xA5, 0x2E, 0xBC, 0x9D, 0x46, 0xDF, 0x6B, 0x81}))
+ If(LEqual(Arg0, ToUUID("A3132D01-8CDA-49BA-A52E-BC9D46DF6B81")))
+ {
+ return ( DGPU_SCOPE.GPS(Arg0, Arg1, Arg2, Arg3))
+ }
+#endif
+
+#if NV_GC6_SUPPORT == 1
+ If(LEqual(Arg0, ToUUID("CBECA351-067B-4924-9CBD-B46B00B86F34")))
+ {
+ return ( DGPU_SCOPE.NGC6(Arg0, Arg1, Arg2, Arg3))
+ }
+#endif
+
+#if HYBRID_DSM_GUID || NBCI_DSM_GUID || OPTIMUS_DSM_GUID
+
+ Name(SGCI, 0) // SG Common Interface
+ Name(NBCI, 0) // Notebok Common Interface
+ Name(OPCI, 0) // Optimus Common Interface
+ Name(BUFF, 0) // Buff Parameter
+
+// Hybrid Graphics Methods supported only if MUXed mode is selected
+#ifdef HYBRID_DSM_GUID
+ If(LEqual(Arg0, ToUUID("9D95A0A0-0060-4D48-B34D-7E5FEA129FD4")))
+ {
+ Store(1, SGCI)
+ }
+#endif
+// NBCI Methods can be querried in botd MUXed and MUXless modes
+#ifdef NBCI_DSM_GUID
+ if(LEqual(Arg0, ToUUID("D4A50B75-65C7-46F7-BfB7-41514CEA0244")))
+ {
+ Store(1, NBCI)
+ }
+#endif
+// Optimus Methods can be querried in botd MUXed and MUXless modes
+#ifdef OPTIMUS_DSM_GUID
+ If(LEqual(Arg0, ToUUID("A486D8F8-0BDA-471B-A72B-6042A6B5BEE0")))
+ {
+ Store(1, OPCI)
+ }
+#endif
+
+ If(LOr(OPCI, LOr( SGCI, NBCI)) )
+ {
+
+ P8DB(0xEE, Arg2, 1000)
+
+ if(OPCI) {
+ if(LNotEqual(Arg1, 0x100)) {
+ Return(0x80000002)
+ }
+ }
+ else { // NBCI & SGCI
+ If(LNotEqual(Arg1,0x0102))
+ {
+ Return(0x80000002)
+ }
+ }
+ //
+ // Function 0: NVSG_FUNC_SUPPORT - Return Supported Functions
+ //
+ // Returns:
+ // SGCI: Functions 0-6,18 are supported
+ // NBCI: Functions 0,4-6,18 are supported
+ // OPCI: Functions 0,5,6,12,13,16,17,26,27
+ //
+ If(LEqual(Arg2,0))
+ {
+ if(SGCI){
+ Return(Buffer(){0x7F, 0x00, 0x04, 0x00})
+ } else {
+ if(NBCI){
+ Return(Buffer(){0x73, 0x00, 0x04, 0x00})
+ }
+ else {
+ if(OPCI){
+ //Sub-Functions 0,16,17,26 are supported
+ // Return(ToBuffer(0x04030001))
+ //Sub-Functions 0,5, 6, 12, 13, 16, 17, 26,27 are supported
+ // Return(ToBuffer(0x0c031861))
+ // Follow nVidia's suggetion, Optimus displayless platform has no used for other sub-functions.
+ #if NV_OPTIMUS_DISPLAYLESS == 1
+ Return(Buffer(){0x01, 0x00, 0x03, 0x04})
+ #else
+ Return(Buffer(){0x61, 0x18, 0x03, 0x0C})
+ #endif
+ //Sub-Functions 0,16 26,27 are supported
+// Return(ToBuffer(0x0c010001))
+
+ }
+ }
+ }
+ }
+
+ //
+ // Function 1: NVSG_FUNC_CAP
+ //
+ // Returns the capabilities of the Switchable Graphics
+ // implementation on the platform
+ //
+ If(LEqual(Arg2,1))
+ {
+ Name (TEMP, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TEMP,0,STS0)
+ if(SGCI){
+ // Return status (bit0-1 Hybrid enabled) and indicate Hybrid power On/Off
+
+ // 0 HG Enable Status = 1
+ // 1 GPU Output MUX Capabilities= 1
+ // 2 GPU Policy Selector Capabilities = 1
+ // 3-4 GPU Control Status = 3
+ // 5 GPU Reset Control = 1
+ // 6 MUX'ed Hot-Plug Capabilities = 0
+ // 7 MUX'ed DDC/AUX Capabilities = 1
+ // 8-10 Notify Codes
+ // 0= Not a Notify(0xD0)
+ // 1= POLICYSELECT change
+ // 2= PLATPOLICY change
+ // 3= DISPLAYSTATUS change
+ // 11-12 EC Notify code
+ // 14-15 Eject Capabilities = 0
+ // 16 Mux'd backlight cap = 0
+ // 17-23 Hybrid EC version = 0
+ // 24-26 HG capability = 3 (Power saver & Boost performance)
+ // 27-28 HG switch = 1 (hot-key or stateless button)
+ // 29 Fasl LCD swithing = 0
+ // 31 = 0
+
+ // Switchable caps
+ Or(STS0,0x0B0000BF,STS0)
+
+ // Switchable Notify Code (Cause of Notify(..,0xD0))
+ Or(STS0,ShiftLeft(SGNC,8,SGNC),STS0)
+ } else {
+ // NBCI
+ // 0..3 Reserved=00
+ // 4 Aux Power States
+ // 6:5 LID State Event
+ // 0= Use the event List to determine support
+ // 1= Force use of Generic Hot-Plug Notify(0x81)
+ // 2= Force use of Specific Lid Event, e.g. Notify (0xDB)
+ // 3= Reserved for future use
+ // 7:8 LID State Enumeration
+ // 0= Use _DCS under _LCD device(default)
+ // 1= Provides status DISPLAYSTATUS Bit[4], for single pannel systems only(recommended)
+ // 2,3= Reserved
+ // 9 Dock State Enumerartion
+ // 0= Doesn't have a Dock(or _DCS under device reflects attachments-via-dock (default)
+ // 1= Provides dock status info via DISPLAYSTATUS Bit[5] (recommended)
+ // 10:30 Reserved
+ // 31 = 0
+
+ // use all defaults for now
+ Or(STS0,0x00000,STS0)
+ }
+ return(TEMP)
+ }
+
+ //
+ // Function 2: NVSG_FUNC_SELECTOR
+ //
+ // Returns device preference between iGPU and dGPU
+ //
+ If(LEqual(Arg2,2))
+ {
+ Name (TMP1, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TMP1,0,STS1)
+
+ //Ignore bits[6:5] since we are not supporting Switchable enable/disable policy selection
+ //Only Switchable policy selection is supported via CAS+F6 hotkey
+
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(DerefOf(Index(Arg3,0)), Local0)
+ ToInteger(Arg3, Local0)
+ And(Local0, 0x1F, Local0)
+
+ If(And(Local0,0x10)) //If Switchable policy update bit is set
+ {
+ And(Local0,0xF,Local0)
+ Store(Local0,GPSS)
+ Notify(IGPU_SCOPE,0xD9) //Broadcast "policy completed" notification
+ Notify(PCI_SCOPE.WMI1, 0xD9) // Mirror Notify on WMI1
+
+ }
+ Else
+ {
+ And(Local0,0xF,Local0)
+ If(LEqual(GPPO,1))
+ {
+ // Retrieve the setting from NVS
+ Store(GPSS,Local0)
+ Or(Local0,0x10,Local0)
+ Store(0,GPPO)
+ }
+ }
+
+ Or(STS1,Local0,STS1)
+
+ Return(TMP1)
+ }
+
+ //
+ // Function 3: NVSG_FUNC_POWERCONTROL
+ //
+ // Allows control of dGPU power methods from the iGPU
+ //
+ If(LEqual(Arg2,3))
+ {
+ Name (TMP2, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TMP2,0,STS2)
+
+ // GPU Power Control
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(DerefOf(Index(Arg3,0)), Local0)
+ ToInteger(Arg3, Local0)
+ And(Local0, 0x3, Local0)
+
+ If(LEqual(Local0,0))
+ {
+ DGPU_SCOPE.SGST()
+ }
+
+ If(LEqual(Local0,1))
+ {
+ DGPU_SCOPE.SGON()
+ }
+
+ If(LEqual(Local0,2))
+ {
+ DGPU_SCOPE.SGOF()
+ }
+
+ //dGPU_PWROK is not working. Using dGPU_PWR_EN# instead as w/a
+ //Or(STS2,DGPU_SCOPE.MPOK,STS2)
+ If(LEqual(DGPU_SCOPE.SGST(), 0xF))
+ {
+ Or(STS2,0x1,STS2)
+ }
+ //else do nothing since STS2 is already 0
+ Return(TMP2)
+ }
+
+ //
+ // Function 4: NVSG_FUNC_PLATPOLICY
+ //
+ // Sets or Returns the current System Policy settings
+ //
+ If(LEqual(Arg2,4))
+ {
+
+// common for SGCI and NBCI
+ Name (TMP3, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TMP3,0,STS3)
+
+ // Panel Scaling Preference
+
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(DerefOf(Index(Arg3,0)), Local0)
+ ToInteger(Arg3, Local0)
+ Store(Local0, Local1)
+ ShiftRight(Local0, 16, Local0)
+ And(Local0, 0x1, USPM)
+
+ ShiftRight(Local1, 13, Local1)
+ And(Local1, 0x3, Local1)
+
+
+ If(LNotEqual(Local1,GPSP))
+ {
+ If(LEqual(USPM,1))
+ {
+ Store(Local1,GPSP)
+ }
+ Else
+ {
+ // Retrieve the setting from NVS
+ Store(GPSP,Local1)
+ Or(STS3,0x8000,STS3) // Set Panel Scaling override
+ }
+ }
+ Or(STS3,ShiftLeft(Local1,13),STS3)
+
+
+ Return(TMP3)
+ }
+
+ //
+ // Function 5: NVSG_FUNC_DISPLAYSTATUS
+ //
+ // Sets or Returns the current display detection,
+ // hot-key toggle sequence
+ //
+ If(LEqual(Arg2,5))
+ {
+// common for SGCI and NBCI
+ Name (TMP4, Buffer () {0x00, 0x00, 0x00, 0x00})
+ CreateDwordField(TMP4,0,STS4)
+
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(Derefof(Index(Arg3,0)), Local0) //Store input field in local0
+ ToInteger(Arg3, Local0)
+
+ // Next Combination Sequence
+
+ If(And(Local0,0x80000000)) //If Bit31 is set
+ {
+ Store(And(ShiftRight(Local0,25),0x1F),TLSN)
+
+ If(And(Local0,0x40000000)) //If Bit30 is set
+ {
+ Store(1,DOSF)
+ }
+ }
+
+ // Display Mask for Attached and Active Displays
+
+ If(And(Local0,0x01000000)) //If Bit24 is set
+ {
+ Store(And(ShiftRight(Local0,12),0xFFF),GACD)
+ Store(And(Local0,0xFFF),GATD)
+
+ //Get current toggle list index based on currently active display list
+ Store(CTOI(GACD),TLSN)
+ Increment(TLSN)
+
+ If(LGreater(TLSN, 13)) //For Huron River ,13 is the number of entries in the toggle list
+ {
+ Store(1, TLSN)
+ }
+
+ SNXD(TLSN) //This is optional for NV SG
+ }
+
+ // Display Hot-Plug Event/Status
+ Or(STS4,ShiftLeft(DHPE,21),STS4)
+ Or(STS4,ShiftLeft(DHPS,20),STS4)
+
+ // Toggle Sequence number
+ Or(STS4,ShiftLeft(TLSN,8),STS4)
+
+ // Dock State
+ Or(STS4,ShiftLeft(DKST,5),STS4)
+
+ // Lid Event State
+ Or(STS4,ShiftLeft(LDES,4),STS4)
+
+ // Display ACPI Event(SGCI only)
+ Or(STS4,DACE,STS4)
+
+ Store(0,LDES)
+ Store(0,DHPS)
+ Store(0,DHPE)
+ Store(0,DACE)
+
+ Return(TMP4)
+ }
+
+ //
+ // Function 6: NVSG_FUNC_MDTL - Returns Hot-Key display switch toggle sequence
+ //
+ // Returns:
+ // Returns Hot-Key display switch toggle sequence
+ //
+ If(LEqual(Arg2,6))
+ {
+// common for SGCI and NBCI
+ Return(TLPK)
+ }
+ //
+ // Function 16:
+ //
+ If(LEqual(Arg2,16))
+ {
+ CreateWordField(Arg3, 2, USRG) // Object type signature passed in by driver.
+ Name(OPVK, Buffer()
+ {
+ // Key below is for Emerald Lake Fab2 platform
+ // Customer need to ask NVIDIA PM to get the key
+ // Customer need to put the key in between labels "// key start -" and
+ // "// key end -". Please consult NVIDIA PM if any issues
+ //148597456985Genuine NVIDIA Certified Optimus Ready Motherboard for 736019_MIRc
+ // Key start -
+ 0xE4,0x42,0x5F,0x14,0x36,0x26,0x16,0x37,0x4B,0x56,0xE6,0x00,0x00,0x00,0x01,0x00,
+ 0x31,0x34,0x38,0x35,0x39,0x37,0x34,0x35,0x36,0x39,0x38,0x35,0x47,0x65,0x6E,0x75,
+ 0x69,0x6E,0x65,0x20,0x4E,0x56,0x49,0x44,0x49,0x41,0x20,0x43,0x65,0x72,0x74,0x69,
+ 0x66,0x69,0x65,0x64,0x20,0x4F,0x70,0x74,0x69,0x6D,0x75,0x73,0x20,0x52,0x65,0x61,
+ 0x64,0x79,0x20,0x4D,0x6F,0x74,0x68,0x65,0x72,0x62,0x6F,0x61,0x72,0x64,0x20,0x66,
+ 0x6F,0x72,0x20,0x37,0x33,0x36,0x30,0x31,0x39,0x5F,0x4D,0x49,0x52,0x63,0x20,0x20,
+ 0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x2D,0x20,0x3C,0x34,0x27,0x21,0x58,0x29,
+ 0x57,0x27,0x58,0x20,0x27,0x25,0x59,0x5D,0x31,0x29,0x3A,0x2A,0x26,0x39,0x59,0x43,
+ 0x56,0x3B,0x58,0x56,0x58,0x3D,0x59,0x4E,0x3B,0x3A,0x35,0x44,0x25,0x42,0x5A,0x48,
+ 0x55,0x3A,0x58,0x4C,0x25,0x48,0x54,0x21,0x35,0x4B,0x4D,0x37,0x2C,0x3C,0x20,0x2D,
+ 0x20,0x43,0x6F,0x70,0x79,0x72,0x69,0x67,0x68,0x74,0x20,0x32,0x30,0x31,0x30,0x20,
+ 0x4E,0x56,0x49,0x44,0x49,0x41,0x20,0x43,0x6F,0x72,0x70,0x6F,0x72,0x61,0x74,0x69,
+ 0x6F,0x6E,0x20,0x41,0x6C,0x6C,0x20,0x52,0x69,0x67,0x68,0x74,0x73,0x20,0x52,0x65,
+ 0x73,0x65,0x72,0x76,0x65,0x64,0x2D,0x31,0x34,0x38,0x35,0x39,0x37,0x34,0x35,0x36,
+ 0x39,0x38,0x35,0x28,0x52,0x29,
+ //Copyright 2010 NVIDIA Corporation All Rights Reserved-148597456985(R)
+ // Key end -
+ })
+ If(LEqual(USRG, 0x564B)) { // 'VK' for Optimus Validation Key Object.
+ Return(OPVK)
+ }
+ Return(Zero)
+ }
+ //
+ // Function 17 NVOP_FUNC_GETALLOBJECTS
+ //
+ If(LEqual(Arg2,17))
+
+ {
+ Return(Zero)
+ }
+ //
+ // Function 18: NVSG_FUNC_GETEVENTLIST
+ //
+ // Returns:
+ // Returns list of notifiers and their meanings
+ //
+ If(LEqual(Arg2,18))
+ {
+// common for SGCI and NBCI
+ return(Package(){
+ 0xD0, ToUUID("921A2F40-0DC4-402d-AC18-B48444EF9ED2"), // Policy request
+ 0xD9, ToUUID("C12AD361-9FA9-4C74-901F-95CB0945CF3E"), // Policy set
+ 0xDB, ToUUID("42848006-8886-490E-8C72-2BDCA93A8A09"), // Display scaling
+
+ 0xEF, ToUUID("B3E485D2-3CC1-4B54-8F31-77BA2FDC9EBE"), // Policy change
+ 0xF0, ToUUID("360d6fb6-1d4e-4fa6-b848-1be33dd8ec7b"), // Display status
+
+ // unfinished list of events. we do not need this Func18 unless event notifiers differ from standard ones defined in BWG.
+ })
+ }
+ //
+ // Function 26: NVOP_FUNC_OPTIMUSCAPS
+ //
+ If(LEqual(Arg2,26))
+ {
+ // On Input
+ //Bit25-24 Power Control Enable
+ // 2-Platform should not power down GPU in the _PS3 method(default)
+ // 3-Platform should power down GPU in the _PS3 method(default)
+ // Bit0 No flag upd present in this call (SBIOS returns curent status)
+ //
+ CreateField(Arg3,24,2,OMPR)
+ CreateField(Arg3,0,1,FLCH)
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_TARGET 1:1
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_TARGET_SBIOS 0x00000000
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_TARGET_DRIVER 0x00000001
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_WR_EN 2:2
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_WR_EN_FALSE 0x00000000
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_WR_EN_TRUE 0x00000001
+ CreateField(Arg3,One,One,DVSR)
+ CreateField(Arg3,0x02,One,DVSC)
+ If(ToInteger(FLCH))
+ {
+ Store(OMPR, DGPU_SCOPE.OPCE) // Optimus Power Control Enable - From DD
+ }
+ // On return
+ // Bit 24:26 Capabilities
+ // 0: No special platf cap
+ // 1: Platform has dynamic GPU power control
+ // Bit6 GPU Display Hot Plug NEW Optimus BWG v02
+ // Bit4:3 Current GPU Control status
+ // 0: GPU is powered off
+ // 1: GPU is powered on and enabled
+ // 2: reserved
+ // 3: GPU Power has stabilized
+ // Bit0
+ // 0:Optimus Disabled
+ // 1:Optimus Enabled
+ Store(Buffer(4) {0, 0, 0, 0}, Local0)
+ CreateField(Local0,0,1,OPEN)
+ CreateField(Local0,3,2,CGCS)
+ CreateField(Local0,6,1,SHPC)
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_ACTUAL 8:8
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_ACTUAL_SBIOS 0x00000000
+ //#define NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_ACTUAL_DRIVER 0x00000001
+ CreateField(Local0,0x08,One,SNSR)
+ CreateField(Local0,24,3,DGPC) // DGPC - Default: No Dynamic GPU Power Control
+ CreateField(Local0,27,2,HDAC) // HDAC - HD Audio Codec Cap
+
+ Store(One, OPEN) // Optimus Enabled
+
+ Store(One, SHPC) // GPU Display Hotplug Supported
+ Store(0x2, HDAC) // HDA BIOS control Supported
+
+ Store(One, DGPC) // Dynamic GPU Power Control Available
+ //if (NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_WR_EN is set)
+ //{
+ // GPRF = NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_TARGET
+ //}
+ //NVOP_FUNC_OPTIMUSCAPS_CFG_SPACE_OWNER_ACTUAL = GPRF
+ If(ToInteger(DVSC))
+ {
+ If(ToInteger(DVSR))
+ {
+ Store(One, DGPU_SCOPE.GPRF)
+ }
+ Else
+ {
+ Store(Zero, DGPU_SCOPE.GPRF)
+ }
+ }
+ Store(DGPU_SCOPE.GPRF, SNSR)
+ If(LNotEqual(DGPU_SCOPE.SGST(), 0))
+ {
+ Store(0x3, CGCS) // Current GPU Control status
+ }
+ Return(Local0)
+
+ }//case (26)
+ //
+ // Function 27: NVOP_FUNC_OPTIMUSFLAGS
+ //
+ If(LEqual(Arg2,27))
+ {
+ //bugbug:Proxy is sending Arg3 as Buffer and not package!
+ //ToInteger(Derefof(Index(Arg3,0)), Local0) //Store input field in local0
+ ToInteger(Arg3, Local0)
+// Store(Arg3, Local0)
+// CreateField(Local0,0,1,OPFL)
+// CreateField(Local0,1,1,OPVL)
+ If(And(Local0,0x00000002))
+ {
+ Store(Zero, BUFF)
+ If(And(Local0,0x00000001))
+ {
+ Store(One, BUFF)
+ }
+ }
+ And(SGFL, Not(0x2), SGFL)
+ Or(SGFL, ShiftLeft(BUFF,1), SGFL)
+ Store(SWSMI_NVOEM_CMOS_W, SSMP) // Set Audio Codec flag to CMOS
+ Return(Local0)
+ }
+ // FunctionCode or SubFunctionCode not supported
+ Return(0x80000002) // OTHER ARGUMENTS NOT SUPPORTED
+ }
+#endif // common scope for Hybrid/Nbci/Optimus
+
+ // Check for common with dGPU _DSM UUIDs
+// return (DGPU_SCOPE.HDSM(Arg0, Arg1, Arg2, Arg3))
+ Return (0x80000001)
+ }
+} // end PCI0.GFX0 scope
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvGC6.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvGC6.asl
new file mode 100644
index 0000000..55cd3f6
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvGC6.asl
@@ -0,0 +1,363 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/NvGC6.asl 1 2/21/13 5:32a Joshchou $Revision:
+//
+// $Date: 2/21/13 5:32a $Log:
+//
+//
+//
+//**********************************************************************
+External(\_SB.PCI0.LPCB.H_EC, DeviceObj)
+
+External(\_SB.PCI0.PEG0.LNKD)
+External(\_SB.PCI0.PEG0.LNKS)
+External(DGPU_SCOPE.TGPC, MethodObj)
+
+#define JT_REVISION_ID 0x00000103 // Revision number
+#define JT_FUNC_SUPPORT 0x00000000 // Function is supported?
+#define JT_FUNC_CAPS 0x00000001 // Capabilities
+#define JT_FUNC_POWERCONTROL 0x00000003 // dGPU Power Control
+#define JT_FUNC_PLATPOLICY 0x00000004 // Platform Policy
+#define JT_FUNC_DISPLAYSTATUS 0x00000005 // Query the Display Hot-Key
+#define JT_FUNC_MDTK 0x00000006 // Display Hot-Key Toggle List
+
+//!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
+//!!!!!!!Note:This Asl Code is sample code for reference,should be modified it by different board design!!!!!!!!!!
+//!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
+
+Scope(\_SB.PCI0.LPCB.H_EC)
+{
+ // Nvidia recommneded to use EC IO for SBIOS to communicate GC6 entry/exit to EC,
+ // Use EC RAM is polling mechanism and might cause the longer delay time for GC6 T1/T2 timing.
+ // Here we just use EC RAM for example, pleae use EC IO access for production solution.
+ OperationRegion(ECF3,EmbeddedControl,0,0xFF)
+ Field(ECF3, ByteAcc, Lock, Preserve)
+ {
+ Offset(0xF0), // assume GC6 control flags located at offset 0xE0
+ EC6I, 1, // EC flag to prepare GC6 entry
+ EC6O, 1, // EC flag to prepare GC6 exit
+ FBST, 1, // the state of FB_CLAMP
+ }
+ Mutex(GC6M, 0)
+ Method(ECNV, 1, NotSerialized)
+ {
+ Acquire(GC6M, 0xFFFF)
+ If(LEqual(Arg0, Zero))
+ {
+ Store(One, EC6I)
+ }
+ If(LEqual(Arg0, One))
+ {
+ Store(One, EC6O)
+ }
+ Release(GC6M)
+ }
+
+ Method(_Q60, 0, NotSerialized) // for GC6 entry Q-event
+ {
+ Store("------- GC6I-SCI _Q event --------", Debug)
+ CreateField(DGPU_SCOPE.TGPC,0x0A,0x2,PRGE) // PRGE : PCIe Root Power GC6 Enter Sequence
+ If(LEqual(ToInteger(PRGE), 0x0)) // DAGC : Link Disable after GC6 Entry complete & before GPU Power Down
+ {
+ Store(One,\_SB.PCI0.PEG0.LNKD) // PCIE link disabling.
+ }
+
+ DGPU_SCOPE.SGPO(HLRS, 0) // dGPU RST# to low
+ DGPU_SCOPE.SGPO(PWEN, 0) // dGPU PWN Enable to low
+
+ If(LEqual(ToInteger(PRGE), 0x2)) // DAGP : Link Disable after GC6 Entry & GPU Power down is complete
+ {
+ Store(One, \_SB.PCI0.PEG0.LNKD) // PCIE link disabling.
+ }
+ }
+ Method(_Q61, 0, NotSerialized) // for GC6 exit Q-event
+ {
+ Store("------- GC6O-SCI _Q event --------",Debug)
+ }
+}
+
+Scope (DGPU_SCOPE)
+{
+ Name(TGPC, Buffer(0x04)
+ {
+ 0x00
+ }
+ )
+
+ Method(GC6I, 0, Serialized)
+ {
+ Store("<<< GC6I >>>", Debug)
+ CreateField(TGPC,0x06,0x2,ECOC) // NOC: Notify on complete: Reserve
+ CreateField(TGPC,0x0A,0x2,PRGE) // PRGE : PCIe Root Power GC6 Enter Sequence
+ If(Lor(LEqual(ToInteger(PRGE), 0x3), LEqual(ToInteger(PRGE), 0x1))) // DBGS : Link Disable before GC6 Entry starts (E0)
+ {
+ Store(One, \_SB.PCI0.PEG0.LNKD) // PCIE link disabling.
+ }
+ \_SB.PCI0.LPCB.H_EC.ECNV (0) // notify EC to prepare GC6 entry.
+ }
+
+ Method(GC6O, 0, Serialized)
+ {
+ Store("<<< GC6O >>>", Debug)
+ CreateField(TGPC,0x06,0x2,ECOC) // NOC: Notify on complete: Reserve
+ CreateField(TGPC,0x08,0x2,PRGX) // PRGX : PCIe Root Power GC6 Exit Sequence
+ If(LEqual(ToInteger(PRGX), Zero)) // EBPG : Link Enable before GPU Power-On & GC6 Exit begins (X0)
+ {
+ Store(Zero, \_SB.PCI0.PEG0.LNKD) // PCIE link enabling
+ }
+ DGPU_SCOPE.SGPO(HLRS, 0) // dGPU RST# is low
+ DGPU_SCOPE.SGPO(PWEN, 1) // dGPU PWR Enable is high
+ //+ Todo - need to addd more delay to make sure all power rail is ready and stable
+ // if you have PWR_OK to check, please check PWR_OK instead of delay here
+ //....................
+ //-
+ // GC6 T5 1.5ms
+ Store(Zero, Local0) // Delay by Stall(0x32) *30 times.= 1.5ms , you can add more if you don't think 1.5ms is good enough
+ While(LLess(Local0, 0x1E))
+ {
+ Add(Local0, One, Local0)
+ Stall(0x32)
+ }
+ DGPU_SCOPE.SGPO(HLRS, 1) // dGPU RST# is high
+ If(LEqual(ToInteger(PRGX), 0x3)) // EAPG : Link Enable after GPU Power-On Reset, but before GC6 Exit begins
+ {
+ Store(Zero, \_SB.PCI0.PEG0.LNKD) // PCIE link enabling
+ }
+
+ // Haswell UTL has no LNKS register, please remove it from Haswell platform
+ While(LLess(\_SB.PCI0.PEG0.LNKS, 0x07))
+ {
+ Sleep(One)
+ }
+ \_SB.PCI0.LPCB.H_EC.ECNV (1) // notify EC to prepare GC6 exit.
+ }
+
+ Method(GETS, 0, Serialized)
+ {
+ If(LEqual(DGPU_SCOPE.SGPI(PWEN), One)) // dGPU PWR Enable is high
+ {
+ Store("<<< GETS() return 0x1 >>>", Debug)
+ Return(One)// GC6 - dGPU on
+ }
+ Else
+ {
+ If(LEqual(\_SB.PCI0.LPCB.H_EC.FBST, One)) // FB_CLAMP asserted.
+ {
+ Store("<<< GETS() return 0x3 >>>", Debug)
+ Return(0x03)// GC6 - dGPU off, FB On, w/ FB_CLAMP asserted
+ }
+ Else
+ {
+ Store("<<< GETS() return 0x2 >>>", Debug)
+ Return(0x02)// GC6 - dGPU & FB Powered off
+ }
+ }
+ }
+
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: NGC6
+//
+// Description: Called from _DSM -Device Specific Method for dGPU device.
+// Implement Ventura specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// Ventura DSM_GUID CBECA351-067B4924-9CBDB46B00B86F34
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method (NGC6, 4, NotSerialized)
+ {
+
+ Store("------- GC6 DSM --------", Debug)
+ // Only Interface Revision 0x0100 is supported
+ If (LLess(Arg1, 0x100))
+ {
+ Return(0x80000001)
+ }
+
+ // (Arg2) Sub-Function
+ Switch (ToInteger(Arg2))
+ {
+ //
+ // Function 0:
+ //
+ case (JT_FUNC_SUPPORT)
+ {
+ Return(Buffer(0x04)
+ {
+ 0x1B, 0x00, 0x00, 0x00
+ })
+ }
+ //
+ // Function 1:
+ //
+ case (JT_FUNC_CAPS)
+ {
+
+ Name(JTB1, Buffer(0x4)
+ {
+ 0x00
+ })
+ CreateField(JTB1,Zero,One,JTEN)
+ CreateField(JTB1,One,0x02,SREN)
+ CreateField(JTB1,0x03,0x03,PLPR)
+ CreateField(JTB1,0x06,0x02,FBPR)
+ CreateField(JTB1,0x08,0x02,GUPR)
+ CreateField(JTB1,0x0A,One,GC6R)
+ CreateField(JTB1,0x0B,One,PTRH)
+ CreateField(JTB1,0x14,0x0C,JTRV)
+ Store(One, JTEN) // JT enable
+ Store(One, GC6R) // GC6 integrated ROM
+ Store(One, PTRH) // No SMI Handler
+ Store(One, SREN) // Disable NVSR
+ Store(JT_REVISION_ID, JTRV) // JT rev
+
+ Return(JTB1)
+ }
+ //
+ // Function 2:
+ //
+ case(0x00000002)
+ {
+ Store("GPS fun 19", Debug)
+ return(arg3)
+ }
+ //
+ // Function 3:
+ //
+ case(0x00000003)
+ {
+ CreateField(Arg3,Zero,0x03,GUPC)
+ CreateField(Arg3,0x04,One,PLPC)
+ Name(JTB3, Buffer(0x04)
+ {
+ 0x00
+ })
+ CreateField(JTB3,Zero,0x03,GUPS)
+ CreateField(JTB3,0x03,One,GPGS) // dGPU Power status
+ CreateField(JTB3,0x07,One,PLST)
+ If(LEqual(ToInteger(GUPC), One)) // EGNS
+ {
+ Store(Arg3,TGPC) // Store GC6 control input for GC6I GC6O
+ GC6I()
+ Store(One, PLST)
+ }
+ Else
+ {
+ If(LEqual(ToInteger(GUPC), 0x02)) // EGIS
+ {
+ Store(Arg3,TGPC) // Store GC6 control input for GC6I GC6O
+ GC6I()
+ If(LEqual(ToInteger(PLPC), Zero))
+ {
+ Store(Zero, PLST)
+ }
+ }
+ Else
+ {
+ If(LEqual(ToInteger(GUPC), 0x03)) // XGXS
+ {
+ Store(Arg3,TGPC) // Store GC6 control input for GC6I GC6O
+ GC6O()
+ If(LNotEqual(ToInteger(PLPC), Zero))
+ {
+ Store(Zero, PLST)
+ }
+ }
+ Else
+ {
+ If(LEqual(ToInteger(GUPC), 0x04)) // XGIS
+ {
+ Store(Arg3,TGPC) // Store GC6 control input for GC6I GC6O
+ GC6O()
+ If(LNotEqual(ToInteger(PLPC), Zero))
+ {
+ Store(Zero, PLST)
+ }
+ }
+ Else
+ {
+ If(LEqual(ToInteger(GUPC), Zero))
+ {
+ Store(GETS(), GUPS)
+ If(LEqual(ToInteger(GUPS), 0x01))
+ {
+ Store(One, GPGS) // dGPU power status is Power OK
+ }
+ Else
+ {
+ Store(Zero, GPGS) // dGPU power status is Power off
+ }
+ }
+ Else
+ {
+ If(LEqual(ToInteger(GUPC), 0x6)) // XLCM
+ {
+ //+ De-assert FB_CLAMP
+
+ //-
+ }
+ }
+ }
+ }
+ }
+ }
+ Return(JTB3)
+ }
+ //
+ // Function 4:
+ //
+ case(JT_FUNC_PLATPOLICY)
+ {
+ Return(0x80000002)
+ }
+
+ } // end of switch
+
+ Return(0x80000002)
+ } // end NGC6
+
+
+} // end DGPU_SCOPE scope
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvGPS.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvGPS.asl
new file mode 100644
index 0000000..9fcec38
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvGPS.asl
@@ -0,0 +1,356 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/NvGPS.asl 1 1/15/13 5:59a Joshchou $
+//
+// $Revision: 1 $
+//
+// $Date: 1/15/13 5:59a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/NvGPS.asl $
+//
+// 1 1/15/13 5:59a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Create componet for SG support on PEG
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+// NvGPS.asl
+//
+// 2 9/09/12 11:05p Joshchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+// NvGPS.asl
+//
+// 2 4/11/12 3:52a Alanlin
+// [TAG] EIP82808
+// [Category] Improvement
+// [Description] nVidia GPS function improvement.
+// [Files] Board\EM\SgTpv\AcpiTables\SgTpvAcpiTables.sdl
+// Board\EM\SgTpv\AcpiTables\NvGPS.asl
+// Board\EM\SgTpv\AcpiTables\NViGPU.asl
+//
+// 1 10/14/11 2:56a Alanlin
+//
+//
+//**********************************************************************
+External(\_PR.CPU0._PSS, BuffObj)
+
+External(\_PR.CPU0._PPC, IntObj)
+External(\_PR.CPU1._PPC, IntObj)
+External(\_PR.CPU2._PPC, IntObj)
+External(\_PR.CPU3._PPC, IntObj)
+External(\_PR.CPU4._PPC, IntObj)
+External(\_PR.CPU5._PPC, IntObj)
+External(\_PR.CPU6._PPC, IntObj)
+External(\_PR.CPU7._PPC, IntObj)
+External(\_SB.PCI0.LPCB.H_EC.GTVR) // CPU GT VR (IMVP) Temperature
+External(\_PR.CPU0._TSS, MethodObj)
+External(\_PR.CPU0._PTC, MethodObj)
+
+#define GPS_REVISION_ID 0x00000100 // Revision number
+#define GPS_ERROR_SUCCESS 0x00000000 // Generic Success
+#define GPS_ERROR_UNSPECIFIED 0x00000001 // Generic unspecified error code
+#define GPS_ERROR_UNSUPPORTED 0x00000002 // Sub-Function not supported
+
+#define GPS_FUNC_SUPPORT 0x00000000 // Bit list of supported functions
+#define GPS_FUNC_GETCALLBACKS 0x00000013 // Get system requested callback
+#define GPS_FUNC_PSHARESTATUS 0x00000020 // Get system requested Power Steering Setting
+#define GPS_FUNC_GETPSS 0x00000021 // Get _PSS object
+#define GPS_FUNC_SETPPC 0x00000022 // Set _PCC object
+#define GPS_FUNC_GETPPC 0x00000023 // Get _PCC object
+#define GPS_FUNC_PSHAREPARAMS 0x0000002A // Get sensor information and capabilities
+
+Scope(PCI_SCOPE){
+
+ Name(GPS, "GPSACPI 2012-Aug-12 14:56:05") // MCPACPIP build time stamp.
+
+} // end of Scope
+
+Scope (DGPU_SCOPE)
+{
+
+Name(PSAP, Zero)
+ Name(ECBF, Buffer(20) {})
+ CreateDWordField(ECBF, 0, EDS1)
+ CreateDWordField(ECBF, 4, EDS2)
+ CreateDWordField(ECBF, 8, EDS3)
+ CreateDWordField(ECBF, 12, EDS4)
+ CreateDWordField(ECBF, 16, EPDT)
+
+ Name(GPSP, Buffer(36) {})
+ CreateDWordField(GPSP, 0, RETN)
+ CreateDWordField(GPSP, 4, VRV1)
+ CreateDWordField(GPSP, 8, TGPU)
+ CreateDWordField(GPSP, 12, PDTS)
+ CreateDWordField(GPSP, 16, SFAN)
+ CreateDWordField(GPSP, 20, SKNT)
+ CreateDWordField(GPSP, 24, CPUE)
+ CreateDWordField(GPSP, 28, TMP1)
+ CreateDWordField(GPSP, 32, TMP2)
+
+Name(NLIM, 0) //set one flag for GPS_EVENT_STATUS_CHANGE 1: will update parameter: 0 just call function 0x1c _PCONTROL
+
+ Name(PSCP, 0) // P-State capacity, mainly for s/w debugging
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: GPS
+//
+// Description: Called from _DSM -Device Specific Method for dGPU device.
+// Implement Ventura specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// Ventura DSM_GUID A3132D01-8CDA-49BA-A52E-BC9D46DF6B81
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method (GPS, 4, NotSerialized)
+ {
+
+ Store("------- GPS DSM --------", Debug)
+ // Only Interface Revision 0x0100 is supported
+ If (LNotEqual(Arg1, 0x100))
+ {
+ Return(0x80000002)
+ }
+
+ P8DB(0xDD, Arg2, 1000)
+ // (Arg2) Sub-Function
+ Switch (ToInteger(Arg2))
+ {
+
+ case (GPS_FUNC_SUPPORT)
+ {
+
+ Name(FMSK, Buffer(0x8)
+ {
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+ })
+ Store(Buffer(0x8)
+ {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }, Local0)
+ Divide(GPS_FUNC_SUPPORT, 0x8, Local2, Local1)
+ // Local1 is Quotient, Local2 is Remainder
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_GETCALLBACKS, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_PSHARESTATUS, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_GETPSS, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_SETPPC, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_GETPPC, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(GPS_FUNC_PSHAREPARAMS, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+
+ // mask out specific functions
+ Store( SizeOf(Local0), Local1)
+ While( LNotEqual(Local1, 0) ) {
+ Decrement(Local1)
+ Store( DeRefOf(Index(FMSK, Local1)), Local2)
+ And( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1) )
+ }
+
+ Return(Local0)
+ }
+ //
+ // Function 19: GPS_FUNC_GETCALLBACKS,
+ //
+ case(GPS_FUNC_GETCALLBACKS)
+ {
+ Store("GPS fun 19", Debug)
+ return(arg3)
+ }
+ //
+ // Function 32: GPS_FUNC_PSHARESTATUS,
+ //
+ case(GPS_FUNC_PSHARESTATUS)
+ {
+ Store("GPS fun 20", Debug)
+
+ Name(RET1, Zero)
+ CreateBitField(Arg3,24,NRIT) //new request new IGP turbo state(bit 24 is valid)
+ CreateBitField(Arg3,25,NRIS) //request new IGP turbo state
+ if (NRIS){
+ if(NRIT){
+ Or(RET1, 0x01000000, RET1)
+ }else
+ {
+ //help disable IGP turbo boost
+ And(RET1, 0xFeFFFFFF, RET1)
+ }
+ }
+ Or(RET1, 0x40000000, RET1) // if this machine support GPS
+
+ if(NLIM){
+ Or(RET1, 0x00000001, RET1) // if NLIM falg is set, set bit0 =1
+ }
+
+ Return(RET1)
+ }
+ //
+ // Function 33: GPS_FUNC_GETPSS, Get CPU _PSS structure
+ //
+ case(GPS_FUNC_GETPSS)
+ {
+ Return(\_PR.CPU0._PSS)
+ }
+ //
+ // Function 34: GPS_FUNC_SETPPC, Set current CPU _PPC limit
+ //
+ case(GPS_FUNC_SETPPC)
+ {
+ CreateBYTEField(Arg3, 0, PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU0, 0x80)
+ store(PCAP, PSAP)
+ Return(PCAP)
+ }
+ //
+ // Function 35: GPS_FUNC_GETPPC, Get current CPU _PPC limit
+ //
+ case(GPS_FUNC_GETPPC)
+ {
+ Return(PSAP)
+ }
+
+ case(0x25)
+ {
+ Store("GPS fun 25", Debug)
+ return(\_PR_.CPU0._TSS)
+ }
+ case(0x26)
+ {
+ Store("GPS fun 26", Debug)
+ CreateDWordField(Arg3, Zero, TCAP)
+ Store(TCAP, \_PR_.CPU0._PTC)
+ Notify(\_PR_.CPU0, 0x80)
+ return(TCAP) }
+ //
+ // Function 42: GPS_FUNC_PSHAREPARAMS, Get Power Steering platform parameters
+ //
+ case(GPS_FUNC_PSHAREPARAMS)
+ {
+ Store("GPS fun 2a", Debug)
+
+ CreateBYTEField(Arg3,0,PSH0)
+ CreateBYTEField(Arg3,1,PSH1)
+ CreateBitField(Arg3,8,GPUT)
+ CreateBitField(Arg3,9,CPUT)
+ CreateBitField(Arg3,10,FANS)
+ CreateBitField(Arg3,11,SKIN)
+ CreateBitField(Arg3,12,ENGR)
+ CreateBitField(Arg3,13,SEN1)
+ CreateBitField(Arg3,14,SEN2)
+
+ switch (PSH0){
+ case(0){
+ if(CPUT){
+ store(0x00000200, RETN)
+ Or(RETN, PSH0, RETN)
+ // Please return CPU or EC tempture to PDTS
+ store(\_SB.PCI0.LPCB.H_EC.GTVR,PDTS)
+ }
+ return(GPSP)
+ } //case(0)
+
+ case(1){
+ store(0x00000300, RETN) //need to return CPU and GPU status bits for Querytype1
+ Or(RETN, PSH0, RETN)
+ store(1000,PDTS)
+ return(GPSP)
+ } //case(1)
+
+ case(2){
+ store(0x0102, RETN) //RETN[0:3] need to be the same as input argument, bit8 is GPU temp status bit
+ store(0x00000000, VRV1)
+ store(0x00000000, TGPU)
+ store(0x00000000, PDTS)
+ store(0x00000000, SFAN)
+ store(0x00000000, CPUE)
+ store(0x00000000, SKNT)
+ store(0x00000000, TMP1)
+ store(0x00000000, TMP2)
+ return(GPSP)
+ } //case(2)
+ } // PSH0 of switch
+
+ }
+ } // end of switch
+
+ Return(0x80000002)
+ } // end GPS
+
+
+} // end DGPU_SCOPE scope
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvSSDT.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvSSDT.asl
new file mode 100644
index 0000000..4f4673e
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvSSDT.asl
@@ -0,0 +1,391 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/NvSSDT.asl 2 2/21/13 5:37a Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 2/21/13 5:37a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/NvSSDT.asl $
+//
+// 2 2/21/13 5:37a Joshchou
+// [TAG] EIP106524
+// [Category] New Feature
+// [Description] Support GC6 function for Optimus.
+//
+// 1 1/15/13 5:58a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Create componet for SG support on PEG
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+// NvGPS.asl
+//
+// 2 9/09/12 11:04p Joshchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+// NvGPS.asl
+//
+// 5 12/22/11 6:31a Alanlin
+// Declared "defined(SGTPV_ASL_DEBUG) && (SGTPV_ASL_DEBUG ==1)"
+//
+//
+// 3 12/02/11 12:38a Alanlin
+// [TAG] EIP75359
+// [Category] Improvement
+// [Description] Report _STA asl method to PCIe root port for nVidia
+// GPU.
+//
+// 2 10/14/11 2:59a Alanlin
+// [TAG] EIP64451
+// [Category] New Feature
+// [Description] Optimus GPS feature update
+// [Files] NvSSDT.asl
+// NViGPU.asl
+// OpSSDT.asl
+// NvGPS.asl
+// SgNvidia.cif
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+//
+//
+// 5 3/17/11 6:17p Alexp
+// Optimus:Add code to preserve HD AudioCodec enable flag in CMOS
+//
+// 4 11/12/10 1:25p Alexp
+// rename ELCT to ELCL in order to avoid name conflict with Intel's ref
+// code in SgDGPU.asl
+//
+// 3 10/06/10 3:34p Alexp
+// Include defines for different Nvidia GUID functions. Helps to control
+// inclusion of peices of ASL depending on type of desired SG mode
+//
+// 2 10/05/10 7:14p Alexp
+// 1. Added debug macro to be able to insert check points in target ASL
+// code
+// 2. Reuse NVdGPU.asl file to build OpSSDT for Optimus and NvSSDT for
+// MUXed SG targets.
+// NvOptimus.asl no longer required
+//
+// 1 9/17/10 1:21p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgNvidia.cif;
+// NvSSDT.asl; NVdGPU.asl;NViGPU.asl;NViGDmisc
+// OpSSDT.asl;NvOptimus.asl;NvVenture.asl
+//
+//
+//**********************************************************************
+
+DefinitionBlock (
+ "Nvidia.aml",
+ "SSDT",
+ 1,
+ "NvdRef",
+ "NvdTabl",
+ 0x1000
+ ) {
+
+#define HYBRID_DSM_GUID 1
+#define MXM_DSM_GUID 1
+//#define NBCI_DSM_GUID 1
+
+External(P8XH, MethodObj)
+
+#if defined(SGTPV_ASL_DEBUG) && (SGTPV_ASL_DEBUG ==1)
+#define P8DB(arg0, arg1, arg2) P8XH (0, arg1) P8XH (1, arg0) sleep(arg2)
+#else
+#define P8DB(arg0, arg1, arg2)
+#endif
+
+External(PCI_SCOPE, DeviceObj)
+External(PEG_SCOPE, DeviceObj)
+External(DGPU_SCOPE, DeviceObj)
+External(IGPU_SCOPE, DeviceObj)
+External(DGPU_SCOPE._ADR, DeviceObj)
+External(IGPU_SCOPE._DSM, MethodObj)
+External(DGPU_SCOPE.SGST, MethodObj)
+External(DGPU_SCOPE.SGON, MethodObj)
+External(DGPU_SCOPE.SGOF, MethodObj)
+External(DGPU_SCOPE.SGPI, MethodObj)
+External(DGPU_SCOPE.SGPO, MethodObj)
+External(\DSEL)
+External(\ESEL)
+External(\SSEL)
+External(\PSEL)
+External(\HLRS)
+External(\PWEN)
+External(\PWOK)
+External(\SGMD)
+External(\SGFL)
+External(\SSMP)
+
+
+#include <NVdGPU.ASL> // Include DGPU device namespace
+#include <NViGPU.ASL> // Include NVHG DSM calls
+#include <NViGDmisc.ASL> // Include misc event callback methods
+#if NV_VENTURA_SUPPORT == 1
+#include <NvVentura.ASL> // Include Ventura support
+#endif
+#if NV_GPS_SUPPORT == 1
+#include <NvGPS.ASL> // Include GPS support
+#endif
+#if NV_GC6_SUPPORT == 1
+#include <NvGC6.ASL> // Include GC6 support
+#endif
+
+Scope(PEG_SCOPE)
+{
+ Method(_STA,0,Serialized)
+ {
+ Return(0x000F)
+ }
+}
+Scope(PCI_SCOPE)
+{
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: WMI1
+//
+// Description: WMI MXM Mapper. ASL Device is used to acccess Mxm native method via WMI API
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Device(WMI1) // placed within PCI Bus scope parallel to iGPU
+ {
+ Name(_HID, "PNP0C14")
+ Name(_UID, "MXM2")
+
+ Name(_WDG, Buffer()
+ {
+ // Methods GUID {F6CB5C3C-9CAE-4ebd-B577-931EA32A2CC0}
+ 0x3C, 0x5C, 0xCB, 0xF6, 0xAE, 0x9C, 0xbd, 0x4e, 0xB5, 0x77, 0x93, 0x1E,
+ 0xA3, 0x2A, 0x2C, 0xC0,
+ 0x4D, 0x58, // Object ID "MX" = method "WMMX"
+ 1, // Instance Count
+ 0x02, // Flags (WMIACPI_REGFLAG_METHOD)
+
+ // NVHG_NOTIFY_POLICYCHANGE
+ // WMI Notify - Hybrid Policy Request D0
+ // GUID {921A2F40-0DC4-402d-AC18-B48444EF9ED2}
+ 0x40, 0x2F, 0x1A, 0x92, 0xC4, 0x0D, 0x2D, 0x40, 0xAC, 0x18, 0xB4, 0x84, 0x44, 0xEF, 0x9E, 0xD2,
+ 0xD0, 0x00, 0x01, 0x08,
+
+ // NVHG_NOTIFY_POLICYSET
+ // WMI Notify D9 - Hybrid Policy Set
+ // GUID {C12AD361-9FA9-4C74-901F-95CB0945CF3E}
+ 0x61, 0xD3, 0x2A, 0xC1, 0xA9, 0x9F, 0x74, 0x4C, 0x90, 0x1F, 0x95, 0xCB, 0x09, 0x45, 0xCF, 0x3E,
+ 0xD9, 0x00, 0x01, 0x08,
+
+ // NVHG_DISPLAY_SCALING
+ // Notify event DB - Display scaling change
+ // GUID {42848006-8886-490E-8C72-2BDCA93A8A09}
+ 0x06, 0x80, 0x84, 0x42, 0x86, 0x88, 0x0E, 0x49, 0x8C, 0x72, 0x2B, 0xDC, 0xA9, 0x3A, 0x8A, 0x09,
+ 0xDB, 0x00, 0x01, 0x08,
+
+ // NVHG_DISPLAY_HOTKEY, ACPI_NOTIFY_PANEL_SWITCH GUID
+ // Notify event 80 (fixed) - Hot-Key, use _DGS, _DCS etc.
+ // GUID {E06BDE62-EE75-48F4-A583-B23E69ABF891}
+ 0x62, 0xDE, 0x6B, 0xE0, 0x75, 0xEE, 0xF4, 0x48, 0xA5, 0x83, 0xB2, 0x3E, 0x69, 0xAB, 0xFB, 0x91,
+ 0x80, 0x00, 0x01, 0x08,
+
+ // NVHG_DISPLAY_HOTplug, ACPI_NOTIFY_DEVICE_HOTPLUG
+ // Notify event 81 (fixed) - Hot-Plug, query _DCS
+ // GUID {3ADEBD0F-0C5F-46ED-AB2E-04962B4FDCBC}
+ 0x0F, 0xBD, 0xDe, 0x3A, 0x5F, 0x0C, 0xED, 0x46, 0xAB, 0x2E, 0x04, 0x96, 0x2B, 0x4F, 0xDC, 0xBC,
+ 0x81, 0x00, 0x01, 0x08,
+
+ // NVHG_BRIGHTNESS_INC, ACPI_NOTIFY_INC_BRIGHTNESS_HOTKEY
+ // Notify event 86 (fixed) - Backlight Increase
+ // GUID {1E519311-3E75-4208-B05E-EBE17E3FF41F}
+ 0x11, 0x93, 0x51, 0x1E, 0x75, 0x3E, 0x08, 0x42, 0xB0, 0x5E, 0xEB, 0xE1, 0x7E, 0x3F, 0xF4, 0x1F,
+ 0x86, 0x00, 0x01, 0x08,
+
+ // NVHG_BRIGHTNESS_DEC, ACPI_NOTIFY_DEC_BRIGHTNESS_HOTKEY
+ // Notify event 87 (fixed) - Backlight Decrease
+ // GUID {37F85341-4418-4F24-8533-38FFC7295542}
+ 0x41, 0x53, 0xF8, 0x37, 0x18, 0x44, 0x24, 0x4F, 0x85, 0x33, 0x38, 0xFF, 0xC7, 0x29, 0x55, 0x42,
+ 0x87, 0x00, 0x01, 0x08,
+
+ // MOF data {05901221-D566-11d1-B2F0-00A0C9062910}
+ 0x21, 0x12, 0x90, 0x05, 0x66, 0xd5, 0xd1, 0x11, 0xb2, 0xf0,
+ 0x00, 0xa0, 0xc9, 0x06, 0x29, 0x10,
+ 0x58, 0x4D, // Object ID "XM"
+ 1, // Instance Count = 1
+ 0x00 // Flags
+ }
+ ) // End of _WDG
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: WMMX
+//
+// Description: WMI Method execution tunnel. MXM Native methods are called via WMMX index.
+//
+// Input:
+// Arg1: Integer GPU index. 0x10-iGPU, 0x0-0xf - dGPU
+//
+// Output:
+// Buffer specific to the funcion being called
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(WMMX, 3)
+ {
+
+ //Arg1 = 0x10 indicates iGPU, 0x0~0x0F for dgpu
+ CreateDwordField(Arg2, 0, FUNC) // Get the function name
+ If (LEqual(FUNC, 0x4D53445F)) // "_DSM"
+ {
+ If (LGreaterEqual(SizeOf(Arg2), 28))
+ {
+ CreateField(Arg2, 0, 128, MUID)
+ CreateDwordField(Arg2, 16, REVI)
+ CreateDwordField(Arg2, 20, SFNC)
+ CreateField(Arg2, 0xe0, 0x20, XRG0)
+
+ If(LNotEqual(Arg1,0x10))
+ {
+ If (CondRefOf(IGPU_SCOPE._DSM)) // common with dGPU DSM functions
+ {
+ Return(IGPU_SCOPE._DSM(MUID, REVI, SFNC, XRG0))
+ }
+ }
+ }
+ }
+
+ ElseIf (LEqual(FUNC, 0x584D584D)) // "MXMX"
+ {
+ CreateDWordField(Arg2, 8, XRG1)
+ If (LEqual(Arg1, 0x10))
+ {
+ Return(IGPU_SCOPE.MXMX(XRG1))
+ }
+ Else
+ {
+ Return(DGPU_SCOPE.MXMX(XRG1))
+ }
+ }
+
+ ElseIf (LEqual(FUNC, 0x5344584D)) // "MXDS"
+ {
+ CreateDWordField(Arg2, 8, XRG2)
+ If (LEqual(Arg1, 0x10))
+ {
+ Return(IGPU_SCOPE.MXDS(XRG2))
+ }
+ Else
+ {
+ Return(DGPU_SCOPE.MXDS(XRG2))
+ }
+ }
+ Return(0)
+ } // End of WMMX
+
+ Name(WQXM, Buffer()
+ {
+ 0x46,0x4F,0x4D,0x42,0x01,0x00,0x00,0x00,0x8B,0x02,0x00,0x00,0x0C,0x08,0x00,0x00,
+ 0x44,0x53,0x00,0x01,0x1A,0x7D,0xDA,0x54,0x18,0xD2,0x83,0x00,0x01,0x06,0x18,0x42,
+ 0x10,0x05,0x10,0x8A,0xE6,0x80,0x42,0x04,0x92,0x43,0xA4,0x30,0x30,0x28,0x0B,0x20,
+ 0x86,0x90,0x0B,0x26,0x26,0x40,0x04,0x84,0xBC,0x0A,0xB0,0x29,0xC0,0x24,0x88,0xFA,
+ 0xF7,0x87,0x28,0x09,0x0E,0x25,0x04,0x42,0x12,0x05,0x98,0x17,0xA0,0x5B,0x80,0x61,
+ 0x01,0xB6,0x05,0x98,0x16,0xE0,0x18,0x92,0x4A,0x03,0xA7,0x04,0x96,0x02,0x21,0xA1,
+ 0x02,0x94,0x0B,0xF0,0x2D,0x40,0x3B,0xA2,0x24,0x0B,0xB0,0x0C,0x23,0x02,0x8F,0x82,
+ 0xA1,0x71,0x68,0xEC,0x30,0x2C,0x13,0x4C,0x83,0x38,0x8C,0xB2,0x91,0x45,0x60,0xDC,
+ 0x4E,0x05,0xC8,0x15,0x20,0x4C,0x80,0x78,0x54,0x61,0x34,0x07,0x45,0xE0,0x42,0x63,
+ 0x64,0x40,0xC8,0xA3,0x00,0xAB,0xA3,0xD0,0xA4,0x12,0xD8,0xBD,0x00,0x8D,0x02,0xB4,
+ 0x09,0x70,0x28,0x40,0xA1,0x00,0x6B,0x18,0x72,0x06,0x21,0x5B,0xD8,0xC2,0x68,0x50,
+ 0x80,0x45,0x14,0x8D,0xE0,0x2C,0x2A,0x9E,0x93,0x50,0x02,0xDA,0x1B,0x82,0xF0,0x8C,
+ 0xD9,0x18,0x9E,0x10,0x83,0x54,0x86,0x21,0x88,0xB8,0x11,0x8E,0xA5,0xFD,0x41,0x10,
+ 0xF9,0xAB,0xD7,0xB8,0x1D,0x69,0x34,0xA8,0xB1,0x26,0x38,0x76,0x8F,0xE6,0x84,0x3B,
+ 0x17,0x20,0x7D,0x6E,0x02,0x39,0xBA,0xD3,0xA8,0x73,0xD0,0x64,0x78,0x0C,0x2B,0xC1,
+ 0x7F,0x80,0x4F,0x01,0x78,0xD7,0x80,0x9A,0xFE,0xC1,0x33,0x41,0x70,0xA8,0x21,0x7A,
+ 0xD4,0xE1,0x4E,0xE0,0xBC,0x8E,0x84,0x41,0x1C,0xD1,0x71,0x63,0x67,0x75,0x32,0x07,
+ 0x5D,0xAA,0x00,0xB3,0x07,0x00,0x0D,0x2E,0xC1,0x69,0x9F,0x49,0xE8,0xF7,0x80,0xF3,
+ 0xE9,0x79,0x6C,0x6C,0x10,0xA8,0x91,0xF9,0xFF,0x0F,0xED,0x41,0x9E,0x56,0xCC,0x90,
+ 0xCF,0x02,0x87,0xC5,0xC4,0x1E,0x19,0xE8,0x78,0xC0,0x7F,0x00,0x78,0x34,0x88,0xF0,
+ 0x66,0xE0,0xF9,0x9A,0x60,0x50,0x08,0x39,0x19,0x0F,0x4A,0xCC,0xF9,0x80,0xCC,0x25,
+ 0xC4,0x43,0xC0,0x31,0xC4,0x08,0x7A,0x46,0x45,0x23,0x6B,0x22,0x3E,0x03,0x78,0xDC,
+ 0x96,0x05,0x42,0x09,0x0C,0xEC,0x73,0xC3,0x3B,0x84,0x61,0x71,0xA3,0x09,0xEC,0xF3,
+ 0x85,0x05,0x0E,0x0A,0x05,0xEB,0xBB,0x42,0xCC,0xE7,0x81,0xE3,0x3C,0x60,0x0B,0x9F,
+ 0x28,0x01,0x3E,0x24,0x8F,0x06,0xDE,0x20,0xE1,0x5B,0x3F,0x02,0x10,0xE0,0x27,0x06,
+ 0x13,0x58,0x1E,0x30,0x7A,0x94,0xF6,0x2B,0x00,0x21,0xF8,0x8B,0xC5,0x53,0xC0,0xEB,
+ 0x40,0x84,0x63,0x81,0x29,0x72,0x6C,0x68,0x78,0x7E,0x70,0x88,0x1E,0xF5,0x5C,0xC2,
+ 0x1F,0x4D,0x94,0x53,0x38,0x1C,0x1F,0x39,0x8C,0x10,0xFE,0x49,0xE3,0xC9,0xC3,0x9A,
+ 0xEF,0x00,0x9A,0xD2,0x5B,0xC0,0xFB,0x83,0x47,0x80,0x11,0x20,0xE1,0x68,0x82,0x89,
+ 0x7C,0x3A,0x01,0xD5,0xFF,0xFF,0x74,0x02,0xB8,0xBA,0x01,0x14,0x37,0x6A,0x9D,0x49,
+ 0x7C,0x2C,0xF1,0xAD,0xE4,0xBC,0x43,0xC5,0x7F,0x93,0x78,0x3A,0xF1,0x34,0x1E,0x4C,
+ 0x42,0x44,0x89,0x18,0x21,0xA2,0xEF,0x27,0x46,0x08,0x15,0x31,0x6C,0xA4,0x37,0x80,
+ 0xE7,0x13,0xE3,0x84,0x08,0xF4,0x74,0xC2,0x42,0x3E,0x34,0xA4,0xE1,0x74,0x02,0x50,
+ 0xE0,0xFF,0x7F,0x3A,0x81,0x1F,0xF5,0x74,0x82,0x1E,0xAE,0x4F,0x19,0x18,0xE4,0x03,
+ 0xF2,0xA9,0xC3,0xF7,0x1F,0x13,0xF8,0x78,0xC2,0x45,0x1D,0x4F,0x50,0xA7,0x07,0x1F,
+ 0x4F,0xD8,0x19,0xE1,0x2C,0x1E,0x03,0x7C,0x3A,0xC1,0xDC,0x13,0x7C,0x3A,0x01,0xDB,
+ 0x68,0x60,0x1C,0x4F,0xC0,0x77,0x74,0xC1,0x1D,0x4F,0xC0,0x30,0x18,0x18,0xE7,0x13,
+ 0xE0,0x31,0x5E,0xDC,0x31,0xC0,0x43,0xE0,0x03,0x78,0xDC,0x38,0x3D,0x2B,0x9D,0x14,
+ 0xF2,0x24,0xC2,0x07,0x85,0x39,0xB0,0xE0,0x14,0xDA,0xF4,0xA9,0xD1,0xA8,0x55,0x83,
+ 0x32,0x35,0xCA,0x34,0xA8,0xD5,0xA7,0x52,0x63,0xC6,0xCE,0x19,0x0E,0xF8,0x10,0xD0,
+ 0x89,0xC0,0xF2,0x9E,0x0D,0x02,0xB1,0x0C,0x0A,0x81,0x58,0xFA,0xAB,0x45,0x20,0x0E,
+ 0x0E,0xA2,0xFF,0x3F,0x88,0x23,0xD2,0x0A,0xC4,0xFF,0x7F,0x7F
+ }
+ ) // End of WQXM
+ } // End of WMI1 Device
+ } // end scope PCI0
+} // end SSDT
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvVentura.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvVentura.asl
new file mode 100644
index 0000000..ec6a303
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/NvVentura.asl
@@ -0,0 +1,546 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/NvVentura.asl 1 1/15/13 5:59a Joshchou $
+//
+// $Revision: 1 $
+//
+// $Date: 1/15/13 5:59a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/NvVentura.asl $
+//
+// 1 1/15/13 5:59a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Create componet for SG support on PEG
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+// NvGPS.asl
+//
+// 2 9/09/12 11:05p Joshchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+// NvGPS.asl
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+//
+
+//
+// 2 10/05/10 7:14p Alexp
+// 1. Added debug macro to be able to insert check points in target ASL
+// code
+// 2. Reuse NVdGPU.asl file to build OpSSDT for Optimus and NvSSDT for
+// MUXed SG targets.
+// NvOptimus.asl no longer required
+//
+// 1 9/17/10 1:21p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgNvidia.cif;
+// NvSSDT.asl; NVdGPU.asl;NViGPU.asl;NViGDmisc
+// OpSSDT.asl;NvOptimus.asl;NvVenture.asl
+//
+// 1 6/08/10 3:45p Alexp
+//
+//**********************************************************************
+// (Ventura+)>
+EXTERNAL(\_PR.CPU0, DeviceObj)
+EXTERNAL(\_PR.CPU1, DeviceObj)
+EXTERNAL(\_PR.CPU2, DeviceObj)
+EXTERNAL(\_PR.CPU3, DeviceObj)
+//> Andy+ for ClarksField -- 8 processors
+EXTERNAL(\_PR.CPU4, DeviceObj)
+EXTERNAL(\_PR.CPU5, DeviceObj)
+EXTERNAL(\_PR.CPU6, DeviceObj)
+EXTERNAL(\_PR.CPU7, DeviceObj)
+//<
+External(\_PR.CPU0._PSS, BuffObj)
+External(\_PR.CPU0._TSS, BuffObj)
+
+External(\_PR.CPU0._PPC, IntObj)
+External(\_PR.CPU1._PPC, IntObj)
+External(\_PR.CPU2._PPC, IntObj)
+External(\_PR.CPU3._PPC, IntObj)
+//> Andy+ for ClarksField -- 8 processors
+External(\_PR.CPU4._PPC, IntObj)
+External(\_PR.CPU5._PPC, IntObj)
+External(\_PR.CPU6._PPC, IntObj)
+External(\_PR.CPU7._PPC, IntObj)
+//<
+External(\_PR.CPU0._TPC, IntObj)
+External(\_PR.CPU1._TPC, IntObj)
+External(\_PR.CPU2._TPC, IntObj)
+External(\_PR.CPU3._TPC, IntObj)
+//> Andy+ for ClarksField -- 8 processors
+External(\_PR.CPU4._TPC, IntObj)
+External(\_PR.CPU5._TPC, IntObj)
+External(\_PR.CPU6._TPC, IntObj)
+External(\_PR.CPU7._TPC, IntObj)
+//<
+Scope(PCI_SCOPE){
+
+ Name(VEN, "VENACPI 2009-Nov-23 14:56:05") // MCPACPIP build time stamp.
+
+} // end of Scope
+
+Scope (DGPU_SCOPE)
+{
+ // value used to notify iGPU
+
+ Name(VSTS, 1) // Ventura Status
+ Name(THBG, 50000) // Thermal Budget
+ Name(PSCP, 0) // P-State capacity, mainly for s/w debugging
+ Name(TBUD, 0x88B8) // Thermal Budget
+// Name(PBCM, 0)
+
+ // Called by EC to notify thermal budget/status change
+ // Arg0 is one of SPB_EC_ values
+ // Arg1 is an object reference
+ Method (THCH, 2, NotSerialized)
+ {
+ Switch (ToInteger(Arg0))
+ {
+ case ( 0x03)
+ {
+ // VSTS needs to be updated before notification
+ Store(DeRefOf(Arg1), VSTS)
+ Notify(DGPU_SCOPE, 0xC0)
+ }
+ case ( 0x01)
+ {
+ // THBG needs to be updated before notification
+ Store(DeRefOf(Arg1), THBG)
+ Notify(DGPU_SCOPE, 0xC1)
+ }
+ }
+ }
+
+ // Wrapper to call Method(SPB)
+ Method (SPB2, 2, NotSerialized)
+ {
+ Store( Buffer() {0x00, 0x00, 0x00, 0x00}, Local0 )
+ CreateDwordField(Local0, 0, LLLL)
+ Store( Arg1, LLLL )
+ Return( SPB(0x00, 0x101, Arg0, Local0) )
+ }
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: SPB
+//
+// Description: Called from _DSM -Device Specific Method for dGPU device.
+// Implement Ventura specific callback functions
+//
+// Input:
+// Arg0: UUID Unique function identifier.
+// Ventura DSM_GUID 95DB88FD-940A-4253-A446-70CE0504AEDF
+// Arg1: Integer Revision Level
+// Arg2: Integer Function Index (0 = Return Supported Functions)
+// Arg3: Package Parameters
+//
+// Output:
+// Sub-function 0 and unsupported function calls always returns a buffer.
+// Other subfunctions may return a buffer or a package as defined in the function.
+// When a single DWord is returned the following values have special meaning,
+// controlled by reserved Bit31 as follows:
+// MXM_ERROR_SUCCESS 0x00000000 Success
+// MXM_ERROR_UNSPECIFIED 0x80000001 Generic unspecified error code
+// MXM_ERROR_UNSUPPORTED 0x80000002 FunctionCode or SubFunctionCode not
+// supported by this system
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method (SPB, 4, NotSerialized)
+ {
+
+ Store("------- SPB DSM --------", Debug)
+ // Only Interface Revision 0x0101 is supported
+ If (LNotEqual(Arg1, 0x101))
+ {
+ Return(0x80000002)
+ }
+
+ // (Arg2) Sub-Function
+ Switch (ToInteger(Arg2))
+ {
+ case (0x00)
+ {
+ Name(FMSK, Buffer(0x8)
+ {
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+ })
+ Store(Buffer(0x8)
+ {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }, Local0)
+ Divide(Zero, 0x8, Local2, Local1)
+ // Local1 is Quotient, Local2 is Remainder
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x20, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x21, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x22, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x23, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x24, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ Divide(0x2A, 8, Local2, Local1)
+ ShiftLeft(0x01, Local2, Local2)
+ Or( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1))
+
+ // mask out specific functions
+ Store( SizeOf(Local0), Local1)
+ While( LNotEqual(Local1, 0) ) {
+ Decrement(Local1)
+ Store( DeRefOf(Index(FMSK, Local1)), Local2)
+ And( DeRefOf(Index(Local0, Local1)), Local2, Index(Local0, Local1) )
+ }
+
+ Return(Local0)
+ }
+
+ // Unit is mWAT
+ case(0x20)
+ {
+ Store(TBUD, Local1)
+ //failsafe to clear ventura status bit
+ And(Local1, 0xFFFFF, Local1)
+ // Just return SPB status for now (bit[0]=1 SPB enabled)
+// If(CondRefOf(PBCM,Local0)){ // Make sure this object is present.
+// If(PBCM){
+// // Software/EC have another chance to disable ventura through VSTS
+// If(LNotEqual(VSTS, 0)) {
+// Or( Local1, 0x40000000, Local1 )
+// }
+// }
+// }
+ Return(Local1)
+ }
+
+ case(0x21)
+ {
+ Return(\_PR.CPU0._PSS)
+ }
+
+ case(0x22)
+ {
+ CreateByteField(Arg3, 0, PCAP)
+
+ Store(PCAP, PSCP)
+ // \_PR.CPU0._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU0, 0x80)
+
+ If(CondRefOf(\_PR.CPU1._PPC, Local0)) {
+ // \_PR.CPU1._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU1, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU2._PPC, Local0)) {
+ // \_PR.CPU2._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU2, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU3._PPC, Local0)) {
+ // \_PR.CPU3._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU3, 0x80)
+ }
+
+//> Andy+ for ClarksField -- 8 processors
+ If(CondRefOf(\_PR.CPU4._PPC, Local0)) {
+ // \_PR.CPU4._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU4, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU5._PPC, Local0)) {
+ // \_PR.CPU5._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU5, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU6._PPC, Local0)) {
+ // \_PR.CPU6._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU6, 0x80)
+ }
+
+ If(CondRefOf(\_PR.CPU7._PPC, Local0)) {
+ // \_PR.CPU7._PPC(PCAP)
+ Store(PCAP, \_PR.CPU0._PPC)
+ Notify(\_PR.CPU7, 0x80)
+ }
+//<
+
+ Return(PCAP)
+ }
+
+ case( 0x23)
+ {
+ Return(PSCP)
+ }
+
+ case(0x24)
+ {
+ CreateField(Arg3, 0, 20, THBG)
+ CreateField(Arg3, 30, 1, DDVE)
+ }
+ case(0x2a)
+ {
+ Return(SSNR(Arg3))
+ }
+ } // end of switch
+
+ Return(0x80000002)
+ } // end SPB
+
+ // Ventura Sensor parameters header structure
+ Name(SBHS, Buffer(0x8) {})
+ CreateDWordField(SBHS, 0, VERV)
+ CreateDWordField(SBHS, 4, NUMS)
+
+ // Ventura CPU Sensor structure
+ Name(SSCP, Buffer(44) {})
+ CreateDWordField(SSCP, 4, CSNT)
+ CreateDWordField(SSCP, 8, CPTI)
+ CreateDWordField(SSCP, 12, CICA)
+ CreateDWordField(SSCP, 16, CIRC)
+ CreateDWordField(SSCP, 20, CICV)
+ CreateDWordField(SSCP, 24, CIRA)
+ CreateDWordField(SSCP, 28, CIAV)
+ CreateDWordField(SSCP, 32, CIEP)
+ CreateDWordField(SSCP, 36, CPPF)
+ CreateDWordField(SSCP, 40, CSNR)
+
+ // Ventura GPU Sensor structure
+ Name(SSGP, Buffer(44) {})
+ CreateDWordField(SSGP, 4, GSNT)
+ CreateDWordField(SSGP, 8, GPTI)
+ CreateDWordField(SSGP, 12, GICA)
+ CreateDWordField(SSGP, 16, GIRC)
+ CreateDWordField(SSGP, 20, GICV)
+ CreateDWordField(SSGP, 24, GIRA)
+ CreateDWordField(SSGP, 28, GIAV)
+ CreateDWordField(SSGP, 32, GIEP)
+ CreateDWordField(SSGP, 36, GPPF)
+ CreateDWordField(SSGP, 40, GSNR)
+
+ // Ventura CPU Parameters Structure
+ Name(SCPP, Buffer(72) {})
+ CreateDWordField(SCPP, 0, VRV1)
+ CreateDWordField(SCPP, 4, VCAP)
+ CreateDWordField(SCPP, 8, VCCP)
+ CreateDWordField(SCPP, 12, VCDP)
+ CreateDWordField(SCPP, 16, VCEP)
+ CreateDWordField(SCPP, 20, VCGP)
+ CreateDWordField(SCPP, 24, VCHP)
+ CreateDWordField(SCPP, 28, VCXP)
+ CreateDWordField(SCPP, 32, VCYP)
+ CreateDWordField(SCPP, 36, VCZP)
+ CreateDWordField(SCPP, 40, VCKP)
+ CreateDWordField(SCPP, 44, VCMP)
+ CreateDWordField(SCPP, 48, VCNP)
+ CreateDWordField(SCPP, 52, VCAL)
+ CreateDWordField(SCPP, 56, VCBE)
+ CreateDWordField(SCPP, 60, VCGA)
+ CreateDWordField(SCPP, 64, VCPP)
+ CreateDWordField(SCPP, 68, VCDE)
+
+// Ventura GPU Parameters Structure
+ Name(SGPP, Buffer(40) {})
+ CreateDWordField(SGPP, 0, VRV2)
+ CreateDWordField(SGPP, 4, VGWP)
+ CreateDWordField(SGPP, 8, VGPP)
+ CreateDWordField(SGPP, 12, VGQP)
+ CreateDWordField(SGPP, 16, VGRP)
+ CreateDWordField(SGPP, 20, VGAP)
+ CreateDWordField(SGPP, 24, VGBP)
+ CreateDWordField(SGPP, 28, VGCP)
+ CreateDWordField(SGPP, 32, VGDP)
+ CreateDWordField(SGPP, 36, VGDE)
+
+ Method(SSNR, 1)
+ {
+ Switch (ToInteger(Arg0))
+ {
+ case (0x00)
+ {
+ // Populate Header Structure
+ Store(0x00010000, VERV)
+ Store(0x02, NUMS)
+ Return(SBHS)
+ }
+ case (0x01)
+ {
+ Store(0x00010000, VRV1)
+ Store(0x3E8, VCAP) //VEN_CPU_PARAM_A_CK 0x3E8
+ Store(0x2EE, VCCP) //VEN_CPU_PARAM_C_CK 0x2EE
+ Store(0x2EE, VCDP) //VEN_CPU_PARAM_D_CK 0x2EE
+ Store(0x2EE, VCEP) //VEN_CPU_PARAM_E_CK 0x2EE
+ Store(0x79e, VCGP) //VEN_CPU_PARAM_G_CK 0x79e
+ Store(0x2bc, VCHP) //VEN_CPU_PARAM_H_CK 0x2bc
+ Store(0x258, VCXP) //VEN_CPU_PARAM_X_CK 0x258
+ Store(0x0fa, VCYP) //VEN_CPU_PARAM_Y_CK 0x0fa
+ Store(0x1f4, VCZP) //VEN_CPU_PARAM_Z_CK 0x1f4
+ Store(0x000, VCKP) //VEN_CPU_PARAM_K_CK 0x000
+ Store(0x000, VCMP) //VEN_CPU_PARAM_M_CK 0x000
+ Store(0x000, VCNP) //VEN_CPU_PARAM_N_CK 0x000
+ Store(0x000, VCPP) //VEN_CPU_PARAM_P_CK 0x000
+ Store(0x421, VCAL) //VEN_CPU_PARAM_AL_CK 0x421
+ Store(0x708, VCBE) //VEN_CPU_PARAM_BE_CK 0x708
+ Store(0x016, VCGA) //VEN_CPU_PARAM_GA_CK 0x016
+ Store(0x001, VCDE) //VEN_CPU_PARAM_DEL_CK 0x001
+/* Clarksfield 8 CPU
+ Store(0x3E8, VCAP)
+ Store(0x258, VCCP)
+ Store(0x258, VCDP)
+ Store(0x258, VCEP)
+ Store(0x2CF, VCGP)
+ Store(0x311, VCHP)
+ Store(0x136, VCXP)
+ Store(0x118, VCYP)
+ Store(0x19A, VCZP)
+ Store(0x001, VCKP)
+ Store(0x001, VCMP)
+ Store(0x001, VCNP)
+ Store(0x000, VCPP)
+ Store(0x36B, VCAL)
+ Store(0x13C, VCBE)
+ Store(0x019, VCGA)
+ Store(0x001, VCDE)
+end Clarksfield 8CPUs*/
+
+ Return(SCPP)
+ }
+ case (0x02)
+ {
+ Store(0x00010000, VRV2)
+ Store(0x3E8, VGWP)
+ Store(0x2EE, VGPP)
+ Store(0x2EE, VGQP)
+ Store(0x2EE, VGRP)
+ Store(0x001, VGAP)
+ Store(0x1F4, VGBP)
+ Store(0x000, VGCP)
+ Store(0x000, VGDP)
+ Store(0x001, VGDE)
+/* Clarksfield 8 CPU
+ Store(0x3E8, VGBP)
+ Store(0x001, VGCP)
+ Store(0x001, VGDP)
+ Store(0x000, VGDE)
+end Clarksfield 8CPUs*/
+ Return(SGPP)
+ }
+ case (0x03)
+ {
+ // The below sensor parameter values for GPU and CPU
+ // are board specific. To support for ventura, fill
+ // the SSCP and SSGP structures
+
+ // Populate CPU Sensor values
+ Store(0x0, Index(SSCP, 0)) // Indicate CPU sensor
+ Store(0x00, CSNT)
+ Store(0x01, CPTI)
+ Store(0x84, CICA) // 0x80
+ Store(0x00, CIRC)
+ Store(0x27FF, CICV)
+ Store(0x05, CIRA)
+ Store(0xA000, CIAV)
+ Store(0x03, CIEP)
+ Store(0x0F, CPPF)
+ Store(0x04, CSNR)
+
+ // Populate GPU Sensor values
+ Store(0x1, Index(SSGP, 0)) // Indicate GPU sensor
+ Store(0x00, GSNT)
+ Store(0x01, GPTI)
+ Store(0x8C, GICA) // 0x8A
+ Store(0x00, GIRC)
+ Store(0x27FF, GICV)
+ Store(0x05, GIRA)
+ Store(0xA000, GIAV)
+ Store(0x03, GIEP)
+ Store(0x0F, GPPF)
+ Store(0x04, GSNR)
+
+ Return(Concatenate(SSCP, SSGP))
+ }
+
+ } //switch end
+
+ Return(0x80000002)
+ }
+} // end DGPU_SCOPE scope
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/OpSSDT.asl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/OpSSDT.asl
new file mode 100644
index 0000000..3fac84f
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/OpSSDT.asl
@@ -0,0 +1,281 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/OpSSDT.asl 4 7/16/13 5:23a Joshchou $
+//
+// $Revision: 4 $
+//
+// $Date: 7/16/13 5:23a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/OpSSDT.asl $
+//
+// 4 7/16/13 5:23a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Remove _STA method in the scope of root port because
+// it's not required.
+//
+//
+// 2 2/21/13 5:37a Joshchou
+// [TAG] EIP106524
+// [Category] New Feature
+// [Description] Support GC6 function for Optimus.
+//
+// 1 1/15/13 5:59a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Create componet for SG support on PEG
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+// NvGPS.asl
+//
+// 2 9/09/12 11:05p Joshchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+// NvGPS.asl
+//
+// 5 12/22/11 6:31a Alanlin
+// Declared "defined(SGTPV_ASL_DEBUG) && (SGTPV_ASL_DEBUG ==1)"
+//
+//
+// 3 12/02/11 12:40a Alanlin
+// [TAG] EIP75359
+// [Category] Improvement
+// [Description] Report _STA asl method to PCIe root port for nVidia
+// GPU.
+//
+// 2 10/14/11 2:59a Alanlin
+// [TAG] EIP64451
+// [Category] New Feature
+// [Description] Optimus GPS feature update
+// [Files] NvSSDT.asl
+// NViGPU.asl
+// OpSSDT.asl
+// NvGPS.asl
+// SgNvidia.cif
+//
+// 1 6/27/11 5:27a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgNvidia.cif
+// NvSSDT.asl
+// NVdGPU.asl
+// NViGPU.asl
+// NViGDmisc.asl
+// OpSSDT.asl
+// NvVentura.asl
+//
+//
+// 6 3/17/11 6:17p Alexp
+// Optimus:Add code to preserve HD AudioCodec enable flag in CMOS
+//
+// 5 11/12/10 1:26p Alexp
+// rename ELCT to ELCL in order to avoid name conflict with Intel's ref
+// code in SgDGPU.asl
+//
+// 4 10/06/10 3:34p Alexp
+// Include defines for different Nvidia GUID functions. Helps to control
+// inclusion of peices of ASL depending on type of desired SG mode
+//
+// 3 10/05/10 7:14p Alexp
+// 1. Added debug macro to be able to insert check points in target ASL
+// code
+// 2. Reuse NVdGPU.asl file to build OpSSDT for Optimus and NvSSDT for
+// MUXed SG targets.
+// NvOptimus.asl no longer required
+//
+// 2 9/17/10 3:22p Alexp
+// remove test comments
+//
+// 1 9/17/10 1:21p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgNvidia.cif;
+// NvSSDT.asl; NVdGPU.asl;NViGPU.asl;NViGDmisc
+// OpSSDT.asl;NvOptimus.asl;NvVenture.asl
+//
+//**********************************************************************
+
+DefinitionBlock (
+ "NvOpt.aml",
+ "SSDT",
+ 1,
+ "OptRef",
+ "OptTabl",
+ 0x1000
+ ) {
+
+#define OPTIMUS_DSM_GUID 1
+//#define NBCI_DSM_GUID 1
+
+External(P8XH, MethodObj)
+#if defined(SGTPV_ASL_DEBUG) && (SGTPV_ASL_DEBUG ==1)
+#define P8DB(arg0, arg1, arg2) P8XH (0, arg1) P8XH (1, arg0) sleep(arg2)
+#else
+#define P8DB(arg0, arg1, arg2)
+#endif
+
+
+External(PCI_SCOPE, DeviceObj)
+External(PEG_SCOPE, DeviceObj)
+External(DGPU_SCOPE, DeviceObj)
+External(IGPU_SCOPE, DeviceObj)
+External(DGPU_SCOPE._ADR, DeviceObj)
+External(IGPU_SCOPE._DSM, MethodObj)
+External(DGPU_SCOPE.SGST, MethodObj)
+External(DGPU_SCOPE.SGON, MethodObj)
+External(DGPU_SCOPE.SGOF, MethodObj)
+External(DGPU_SCOPE.SGPI, MethodObj)
+External(DGPU_SCOPE.SGPO, MethodObj)
+External(\DSEL)
+External(\ESEL)
+External(\SSEL)
+External(\PSEL)
+External(\HLRS)
+External(\PWEN)
+External(\PWOK)
+External(\SGMD)
+External(\SGFL)
+External(\SSMP)
+
+#include <NVdGPU.ASL> // Include DGPU device namespace
+#include <NViGPU.ASL> // Include NVHG DSM calls
+//#include <NViGDmisc.ASL> // Include misc event callback methods
+
+#if NV_VENTURA_SUPPORT == 1
+#include <NvVentura.ASL> // Include Ventura support
+#endif
+#if NV_GPS_SUPPORT == 1
+#include <NvGPS.ASL> // Include GPS support
+#endif
+#if NV_GC6_SUPPORT == 1
+#include <NvGC6.ASL> // Include GC6 support
+#endif
+
+ Scope(PCI_SCOPE)
+ {
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: WMI1
+//
+// Description: WMI MXM Mapper. ASL Device is used to acccess Nv Optimus native method via WMI API
+//
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Device(WMI1) // placed within PCI Bus scope parallel to iGPU
+ {
+ Name(_HID, "PNP0C14")
+ Name(_UID, "OPT1")
+
+ Name(_WDG, Buffer()
+ {
+ // Methods GUID {F6CB5C3C-9CAE-4ebd-B577-931EA32A2CC0}
+ 0x3C, 0x5C, 0xCB, 0xF6, 0xAE, 0x9C, 0xbd, 0x4e, 0xB5, 0x77, 0x93, 0x1E,
+ 0xA3, 0x2A, 0x2C, 0xC0,
+ 0x4D, 0x58, // Object ID "MX" = method "WMMX"
+ 1, // Instance Count
+ 0x02, // Flags (WMIACPI_REGFLAG_METHOD)
+ }) // End of _WDG
+
+//<AMI_PHDR_START>
+//------------------------------------------------------------------------
+//
+// Procedure: WMMX
+//
+// Description: WMI Method execution tunnel. MXM Native methods are called via WMMX index.
+//
+// Input:
+// Arg1: Integer GPU index. 0x10-iGPU, 0x100+PCIe Bus number for the GPU
+//
+// Output:
+// Buffer specific to the funcion being called
+//-------------------------------------------------------------------------
+//<AMI_PHDR_END>
+ Method(WMMX, 3)
+ {
+
+ //Arg1 = 0x10 indicates iGPU, 0x100+PCIe Bus number for the GPU
+ //
+ CreateDwordField(Arg2, 0, FUNC) // Get the function name
+
+ If (LEqual(FUNC, 0x534F525F)) // "_ROM"
+ {
+ If (LGreaterEqual(SizeOf(Arg2), 8))
+ {
+ CreateDwordField(Arg2, 4, ARGS)
+ CreateDwordField(Arg2, 8, XARG)
+ Return(DGPU_SCOPE._ROM(ARGS, XARG))
+ }
+ }
+
+ If (LEqual(FUNC, 0x4D53445F)) // "_DSM"
+ {
+ If (LGreaterEqual(SizeOf(Arg2), 28))
+ {
+ CreateField(Arg2, 0, 128, MUID)
+ CreateDwordField(Arg2, 16, REVI)
+ CreateDwordField(Arg2, 20, SFNC)
+ CreateField(Arg2, 0xe0, 0x20, XRG0)
+
+// If(LNotEqual(Arg1,0x10))
+// {
+ If (CondRefOf(IGPU_SCOPE._DSM)) // common with dGPU DSM functions
+ {
+ Return(IGPU_SCOPE._DSM(MUID, REVI, SFNC, XRG0))
+ }
+// }
+ }
+ }
+ Return(0)
+ } // End of WMMX
+ } // End of WMI1 Device
+ } // end scope PCI0
+} // end SSDT
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//****************************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgAti.cif b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgAti.cif
new file mode 100644
index 0000000..295726c
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgAti.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "Ati"
+ category = ModulePart
+ LocalRoot = "Board\EM\SwitchableGraphics\SgTpv\AcpiTables\SgTpvPEG"
+ RefName = "AtiSG"
+[files]
+"AtiSSDT.asl"
+"ATdGPU.asl"
+"ATiGPU.asl"
+"ATiGDmisc.asl"
+<endComponent>
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgNvidia.cif b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgNvidia.cif
new file mode 100644
index 0000000..014f0f6
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgNvidia.cif
@@ -0,0 +1,15 @@
+<component>
+ name = "nVidia"
+ category = ModulePart
+ LocalRoot = "Board\EM\SwitchableGraphics\SgTpv\AcpiTables\SgTpvPEG"
+ RefName = "nVidiaSG"
+[files]
+"NvSSDT.asl"
+"NVdGPU.asl"
+"NViGPU.asl"
+"NViGDmisc.asl"
+"OpSSDT.asl"
+"NvVentura.asl"
+"NvGPS.asl"
+"NvGC6.asl"
+<endComponent>
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgTpvPEG.cif b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgTpvPEG.cif
new file mode 100644
index 0000000..2f84740
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgTpvPEG.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "SgTpvPEG"
+ category = ModulePart
+ LocalRoot = "Board\EM\SwitchableGraphics\SgTpv\AcpiTables\SgTpvPEG"
+ RefName = "SgTpvPEG"
+[files]
+"SgTpvPEG.sdl"
+"SgTpvPEG.mak"
+[parts]
+"AtiSG"
+"nVidiaSG"
+<endComponent>
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgTpvPEG.mak b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgTpvPEG.mak
new file mode 100644
index 0000000..4536804
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgTpvPEG.mak
@@ -0,0 +1,131 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/SgTpvPEG.mak 2 6/02/13 8:13a Joshchou $
+#
+# $Revision: 2 $
+#
+# $Date: 6/02/13 8:13a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg Acpi Tables/SgTpvPEG/SgTpvPEG.mak $
+#
+# 2 6/02/13 8:13a Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Change IASL compiler path to
+# $(ACPIPLATFORM_ASL_COMPILER) in SharkBay project.
+#
+# 1 1/15/13 5:57a Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Create componet for SG ASL code support on PEG
+# [Files] SgTpvPEG.cif
+# SgTpvPEG.sdl
+# SgTpvPEG.mak
+#
+# 3 11/20/12 3:48a Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Create Token for OEM clone
+#
+# 2 9/09/12 11:01p Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Tpv module support for sharkbay.
+# [Files] OEMSSDT.mak
+# OEMSSDT.asl
+# OEMNVdGPU.asl
+# OEMNViGPU.asl
+# OEMNViGDmisc.asl
+# OEMNvVentura.asl
+# OEMNvGPS.asl
+# OEMSSDT.cif
+#
+# 1 12/12/11 9:10p Alanlin
+#
+#
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: OEMSSDT.mak
+#
+# Description: MAke file to build Aptio ACPI ASL components
+#
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+SGPEGASL: $(BUILD_DIR)\SGTPVssdt.ffs
+
+#-----------------------------------------------------------------------------
+# SG SSDT ACPI Tables
+#-----------------------------------------------------------------------------
+!IF "$(ACPIPLATFORM_ASL_COMPILER)"==""
+!ERROR It is an invalid path, please check your ASL compiler path.
+!ENDIF
+
+IASL = $(ACPIPLATFORM_ASL_COMPILER)
+#-----------------------------------------------------------------------
+$(BUILD_DIR)\OpSSDT.aml $(BUILD_DIR)\NvSSDT.aml $(BUILD_DIR)\AtiSSDT.aml: $(BUILD_DIR)\OpSSDT.asl $(BUILD_DIR)\NvSSDT.asl $(BUILD_DIR)\AtiSSDT.asl
+ $(SILENT)$(IASL) -p $@ $*.asl
+
+$(BUILD_DIR)\OpSSDT.sec $(BUILD_DIR)\NvSSDT.sec $(BUILD_DIR)\ATIssdt.sec: $(BUILD_DIR)\OpSSDT.aml $(BUILD_DIR)\NvSSDT.aml $(BUILD_DIR)\AtiSSDT.aml
+ $(GENSECTION) -I $*.aml -O $@ -S EFI_SECTION_RAW
+
+#Note. Expand the package with multiple SG SSDT tables.
+# DXE phase will load the tables depending on present Mxm Gfx card
+# and update Aml contents if provided in AcpiTables.c
+$(BUILD_DIR)\SGTPVssdt.ffs: $(BUILD_DIR)\OpSSDT.sec $(BUILD_DIR)\NvSSDT.sec $(BUILD_DIR)\AtiSSDT.sec
+ $(GENFFSFILE) -B $(BUILD_DIR) -V -o $@ -P1 <<$(BUILD_DIR)\SGTPVssdt.pkg
+
+PACKAGE.INF
+[.]
+BASE_NAME = SgTpvACPI
+FFS_FILEGUID = 6A061113-FE54-4A07-A28E-0A69359EB069
+FFS_FILETYPE = EFI_FV_FILETYPE_FREEFORM
+FFS_ATTRIB_CHECKSUM = TRUE
+
+IMAGE_SCRIPT =
+{
+ Compress (dummy) {
+ $(PROJECT_DIR)\$(BUILD_DIR)\OpSSDT.sec
+ $(PROJECT_DIR)\$(BUILD_DIR)\NvSSDT.sec
+ $(PROJECT_DIR)\$(BUILD_DIR)\AtiSSDT.sec
+ }
+}
+<<KEEP
+#-----------------------------------------------------------------------#
+# Process SG asl files
+#-----------------------------------------------------------------------#
+$(BUILD_DIR)\OpSSDT.asl $(BUILD_DIR)\NvSSDT.asl $(BUILD_DIR)\AtiSSDT.asl : $(INTEL_OPSSDT_ASL_FILE) $(INTEL_NVSSDT_ASL_FILE) $(INTEL_ATISSDT_ASL_FILE)
+ $(CP) /I$(SG_TPVPEG_DIR) /FItoken.h /C $(SG_TPVPEG_DIR)\$(@F) > $@
+# include the token.h if needed to check for SDL flags
+# /FItoken.h
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgTpvPEG.sdl b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgTpvPEG.sdl
new file mode 100644
index 0000000..b43b0dd
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/AcpiTables/SgTpvPEG/SgTpvPEG.sdl
@@ -0,0 +1,53 @@
+TOKEN
+ Name = "SgTpvPEG_SUPPORT"
+ Value = "1"
+ Help = "Add an OEM SSDT for discrete VGA card. When Primarydisplay = Auto or PEG, the system can report OEM SSDT talbes for AMD or nVidia dGPU VGA card."
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "DGPU_SCOPE"
+ Value = "\_SB.PCI0.PEG0.PEGP"
+ Help = "PLATFORM PORTING!!! Update iGPU and dGPU device names as defined in SB/NB.SDL"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "INTEL_OPSSDT_ASL_FILE"
+ Value = "$(SG_TPVPEG_DIR)\OpSSDT.asl"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "INTEL_NVSSDT_ASL_FILE"
+ Value = "$(SG_TPVPEG_DIR)\NvSSDT.asl"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "INTEL_ATISSDT_ASL_FILE"
+ Value = "$(SG_TPVPEG_DIR)\AtiSSDT.asl"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+PATH
+ Name = "SG_TPVPEG_DIR"
+End
+
+MODULE
+ Help = "Includes SgTpvPEG.mak to Project"
+ File = "SgTpvPEG.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\SGTPVssdt.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/SwitchableGraphics/SgTpv/MXM30/MXM30.cif b/Board/EM/SwitchableGraphics/SgTpv/MXM30/MXM30.cif
new file mode 100644
index 0000000..02fd8c4
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/MXM30/MXM30.cif
@@ -0,0 +1,18 @@
+<component>
+ name = "Sg nVidia API"
+ category = ModulePart
+ LocalRoot = "Board\EM\SwitchableGraphics\SgTpv\MXM30"
+ RefName = "MXM_NBCI"
+[files]
+"MXM30.sdl"
+"MXM30.mak"
+"Mxm30Dxe.dxs"
+"Mxm30Dxe.c"
+"Mxm30Efi.c"
+"NBCIEfi.c"
+"MxmInt15.asm"
+"Mxm30ElkCreek4.mxm"
+"Mxm30ElkCreekIII.mxm"
+[parts]
+"MXM_Protocol"
+<endComponent>
diff --git a/Board/EM/SwitchableGraphics/SgTpv/MXM30/MXM30.mak b/Board/EM/SwitchableGraphics/SgTpv/MXM30/MXM30.mak
new file mode 100644
index 0000000..2ac9f97
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/MXM30/MXM30.mak
@@ -0,0 +1,161 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia API/MXM30.mak 2 9/09/12 11:12p Joshchou $
+#
+# $Revision: 2 $
+#
+# $Date: 9/09/12 11:12p $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia API/MXM30.mak $
+#
+# 2 9/09/12 11:12p Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Tpv module support for sharkbay.
+# [Files] MXM30.mak
+# Mxm30Dxe.dxs
+# Mxm30Dxe.c
+# Mxm30Efi.c
+# NBCIEfi.c
+# MxmInt15.asm
+# MXM30.cif
+#
+# 1 6/27/11 5:25a Alanlin
+# [TAG] EIP61848
+# [Category] New Feature
+# [Description] Initial check-in.Integrated SwitchableGraphics Intel
+# Reference code 0.6.0
+# [Files] MXM30.cif
+# MXM30.sdl
+# MXM30.mak
+# Mxm30Dxe.dxs
+# Mxm30Dxe.c
+# Mxm30Efi.c
+# NBCIEfi.c
+# MxmInt15.asm
+# Mxm30ElkCreek4.mxm
+# Mxm30ElkCreekIII.mxm
+#
+#
+# 2 9/23/10 1:04p Alexp
+# change the build target
+#
+# 1 9/17/10 1:15p Alexp
+# [TAG] EIP43103
+# [Category] Function Request
+# [Severity] Normal
+# [Symptom] Initial check-in of SgTPV module
+# [RootCause] Request to implement SG reference code .
+# [Solution] Initial check-in.
+# [Files]
+# Mxm30.cif;*.sdl;*.mak;
+# Mxm30Dxe.c;*.dxs
+# Mxm30efi.c
+# MxmInt15.asm
+# NbciEfi.c
+# Mxm30ElkCreek3(4).mxm
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: MXM30.mak
+#
+# Description: Make file to build Switchable Graphics MXM component
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+SgTpv: MXM30
+
+MXM30 : $(BUILD_DIR)\MXM30.mak Mxm30DxeBin $(BUILD_DIR)\MXMdat.ffs
+
+$(BUILD_DIR)\MXM30.mak : $(MXM30_DIR)\MXM30.cif $(MXM30_DIR)\MXM30.mak $(BUILD_RULES)
+ $(CIF2MAK) $(MXM30_DIR)\MXM30.cif $(CIF2MAK_DEFAULTS)
+
+#--------------------------------------------------------------------------
+# 1.
+#--------------------------------------------------------------------------
+BUILD_MXM_DIR = $(BUILD_DIR)\$(MXM30_DIR)
+
+##SGDxeBin : $(BUILD_MXM_DIR)\Mxm30Efi.obj $(BUILD_MXM_DIR)\NbciEfi.obj
+#SGDxeBin : $(BUILD_MXM_DIR)\Mxm30Efi.obj
+
+##$(BUILD_MXM_DIR)\Mxm30Efi.obj $(BUILD_MXM_DIR)\NbciEfi.obj: $(MXM30_DIR)\Mxm30Efi.c $(MXM30_DIR)\NbciEfi.c
+#$(BUILD_MXM_DIR)\Mxm30Efi.obj: $(MXM30_DIR)\Mxm30Efi.c
+# $(CC) $(CFLAGS) $(MXM_INCLUDES) /I$(MXM30_DIR) /Fo$@ $(MXM30_DIR)\$(@F)
+
+MXM_DXE_OBJECTS = \
+$(BUILD_MXM_DIR)\Mxm30Dxe.obj\
+$(BUILD_MXM_DIR)\Mxm30Efi.obj\
+
+#$(BUILD_MXM_DIR)\Nbci.obj\
+
+MXM_INCLUDES= \
+ /I $(MXM30_DIR)\
+ /I$(CORE_DIR)\
+ $(INTEL_MPG_INCLUDES)\
+ $(INTEL_MCH_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+ /I$(NB_BOARD_DIR)\
+ /I$(SB_BOARD_DIR)
+
+Mxm30DxeBin : $(AMIDXELIB) $(AMICSPLib)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\MXM30.mak all\
+ NAME=Mxm30Dxe\
+ MAKEFILE=$(BUILD_DIR)\MXM30.mak \
+ GUID=31A0B6EF-A400-4419-8327-0FB134AA59E7 \
+ ENTRY_POINT=MxmDriverEntryPoint\
+ DEPEX1=$(MXM30_DIR)\Mxm30Dxe.DXS DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ "MY_INCLUDES=$(MXM_INCLUDES)"\
+ "OBJECTS=$(MXM_DXE_OBJECTS)"\
+ TYPE=RT_DRIVER\
+ COMPRESS=1
+
+#--------------------------------------------------------------------------
+# 2.
+#--------------------------------------------------------------------------
+$(BUILD_DIR)\MXMint15.obj: $(MXM30_DIR)\MXMint15.asm
+ $(ASM16) $(AFLAGS16) /Fo$(BUILD_DIR)\ $(MXM30_DIR)\$(@B).asm
+
+#--------------------------------------------------------------------------
+# 3.
+#---------------------------------------------------------------------------
+# Build Mxm block file. In case external utils want to update Mxm
+# Don't change the GUID. LocateMXMffs expects this GUID.
+#---------------------------------------------------------------------------
+$(BUILD_DIR)\MXMdat.ffs : $(MXM30_DIR)\$(MXM_FILE_NAME)
+ $(MAKE) /f Core\FFS.mak \
+ NAME=$(@B) \
+ BUILD_DIR=$(BUILD_DIR) SOURCE_DIR=$(MXM30_DIR) \
+ GUID=6707536E-46AF-42d3-8F6C-15F2F202C234 \
+ TYPE=EFI_FV_FILETYPE_FREEFORM \
+ BINFILE=$** FFSFILE=$@ COMPRESS=1 NAME=$(**B)
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/MXM30/MXM30.sdl b/Board/EM/SwitchableGraphics/SgTpv/MXM30/MXM30.sdl
new file mode 100644
index 0000000..9562308
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/MXM30/MXM30.sdl
@@ -0,0 +1,135 @@
+TOKEN
+ Name = "MXM30_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable MXM30 Legacy int15, Efi and Acpi interfaces"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "MXM_REVISION"
+ Value = "3"
+ Help = "1: Support MXM rev2.0, 2: Support MXM rev2.1, 3: Support MXM rev3.0."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "MXM_REV_SUPPORTED"
+ Value = "30h"
+ Help = "the revision of the MXM software specification that is supported by the MXM module\Format is binary coded decimal, for example: 0x30 = 3.0, etc."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MXM_FUNC_SUPPORTED"
+ Value = "3"
+ Help = "the bit map of function list supported by the MXM module\Bit 0 = `1' MxmReturnSpecLevel method is required\Bit 1 = `1' MxmReturnStucture is also required"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NBCI_REVISION"
+ Value = "1"
+ Help = "1: Support NBCI rev1.1"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "NBCI_REV_SUPPORTED"
+ Value = "11h"
+ Help = "the revision of the NBCI software specification that is supported by the NBCI module\Format is binary coded decimal, for example: 0x11 = 1.1, etc."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NBCI_FUNC_SUPPORTED"
+ Value = "3"
+ Help = "the bit map of function list supported by the Nbci module\Bit 0 = `1' NbciReturnSpecLevel method is required\Bit 1 = `1' NbciReturnStucture is also required"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MXM_ROM_MAX_SIZE"
+ Value = "200"
+ Help = "Max size of MXM module data structure"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MXM_ROM_MAX_SIZE_bits"
+ Value = "$(MXM_ROM_MAX_SIZE)*8"
+ Help = "Max size of MXM module data structure 1600"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MXMOEM1_GUID"
+ Value = "{0x6707536e, 0x46af, 0x42d3, 0x8f, 0x6c, 0x15, 0xf2, 0xf2, 0x2, 0xc2, 0x34}"
+ Help = "MXM module FFS file"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MXM_FILE_NAME"
+ Value = "Mxm30ElkCreek4.mxm"
+ Help = "MXM module file name"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+PATH
+ Name = "MXM30_DIR"
+ Help = "Path to MXM30 Module in Project"
+End
+
+MODULE
+ Help = "Includes MXM30.mak to Project"
+ File = "MXM30.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\mxmint15.obj"
+ Parent = "CSM_OEMINT_OBJS"
+ Priority = 10
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "MXMINT15Proc"
+ Parent = "CsmOemInterrupts"
+ ProcID = 015h
+ SrcFile = "Board\em\mxm30\mxmint15.asm"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\Mxm30Dxe.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\MXMdat.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30Dxe.c b/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30Dxe.c
new file mode 100644
index 0000000..83ec3e6
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30Dxe.c
@@ -0,0 +1,377 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia API/Mxm30Dxe.c 2 9/09/12 11:12p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:12p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia API/Mxm30Dxe.c $
+//
+// 2 9/09/12 11:12p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] MXM30.mak
+// Mxm30Dxe.dxs
+// Mxm30Dxe.c
+// Mxm30Efi.c
+// NBCIEfi.c
+// MxmInt15.asm
+// MXM30.cif
+//
+// 3 4/11/12 4:06a Alanlin
+// Nvidia Optimus support when CSM module is disabled or CSM is never on
+// setup menu.
+//
+// 2 12/12/11 9:19p Alanlin
+// [TAG] EIP74169
+// [Category] Improvement
+// [Description] Add OEMSSDT module part. Token "SGOEMSSDT_SUPPORT" to
+// create OEM SSDT for discrete VGA card.
+// When Primarydisplay = Auto or PEG, it can report OEM SSDT talbes for
+// AMD or nVidia dGPU VGA card.
+//
+// 1 6/27/11 5:25a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] MXM30.cif
+// MXM30.sdl
+// MXM30.mak
+// Mxm30Dxe.dxs
+// Mxm30Dxe.c
+// Mxm30Efi.c
+// NBCIEfi.c
+// MxmInt15.asm
+// Mxm30ElkCreek4.mxm
+// Mxm30ElkCreekIII.mxm
+//
+//
+// 2 9/23/10 1:04p Alexp
+// comment out unused BDS callback defines
+//
+// 1 9/17/10 1:16p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// Mxm30.cif;*.sdl;*.mak;
+// Mxm30Dxe.c;*.dxs
+// Mxm30efi.c
+// MxmInt15.asm
+// NbciEfi.c
+// Mxm30ElkCreek3(4).mxm
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: Mxm30DXE.c
+//
+// Description: This file contains the etry point of EFI MXM30 Support driver
+// The function istalls MXM EFI, Legacy and Acpi interfaces if
+// enabled in Setup
+// Installs Acpi Tables for Switchable Graphics
+//
+// Notes: MAKE SURE NO PEI OR DXE SPECIFIC CODE IS NEEDED
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include <Token.h>
+#include <AmiDxeLib.h>
+#include <DXE.h>
+#include "SB.h"
+#include "Setup.h"
+#include <Protocol\Mxm30.h>
+#if defined(CsmOptOut_SUPPORT) && (CsmOptOut_SUPPORT == 1)
+#include <AmiLoadCsmPolicy.h>
+#endif
+
+#if ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+#include <Protocol\LegacyBios.h>
+#include <Protocol\LegacyRegion.h>
+#include <Protocol\LegacyBiosExt.h>
+#endif
+#if defined(CsmOptOut_SUPPORT) && (CsmOptOut_SUPPORT == 1)
+AMI_OPROM_POLICY_PROTOCOL *gAmiOpRomPolicyProtocol = NULL;
+EFI_GUID gAmiOpromPolicyProtocolGuid = AMI_OPROM_POLICY_PROTOCOL_GUID;
+#endif
+
+extern EFI_BOOT_SERVICES *pBS;
+extern EFI_RUNTIME_SERVICES *pRS;
+
+VOID *gMxmLegMemAddr = NULL;
+UINTN gMxmLegMemSize = 0;
+
+//#define BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID \
+// {0xdbc9fd21, 0xfad8, 0x45b0, 0x9e, 0x78, 0x27, 0x15, 0x88, 0x67, 0xcc, 0x93}
+
+//EFI_EVENT mMxmEvent;
+//VOID *mMxmReg;
+//EFI_GUID gBdsAllDriversConnectedProtocolGuid = BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID;
+
+// extern functions
+EFI_STATUS MXM30Interfaces (EFI_HANDLE ImageHandle, EFI_SYSTEM_TABLE *SystemTable);
+//EFI_STATUS NBCIInterfaces (EFI_HANDLE ImageHandle, EFI_SYSTEM_TABLE *SystemTable);
+
+#if ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: UpdateInt15MxMData
+//
+// Description: Get the address of MXM data buffer in legacy bios region
+//
+// Input: EFI_LEGACY_BIOS_PROTOCOL *LegacyBiosProtocol;
+//
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+UpdateInt15MxmSISData (
+ IN EFI_LEGACY_BIOS_PROTOCOL *LegacyBiosProtocol
+)
+{
+ EFI_STATUS Status;
+ UINT32 Addr16;
+ EFI_IA32_REGISTER_SET RegSet;
+ UINT32 *ivt = (UINT32*)0;
+
+ // Get the Data Pointer to MXM Structure within Int15 MXM handler
+ MemSet(&RegSet, sizeof (EFI_IA32_REGISTER_SET), 0);
+ RegSet.X.AX = 0x5f80;
+ RegSet.X.BX = 0xFF01;
+ RegSet.X.CX = EFI30_DataBlockID;
+ RegSet.X.ES = 0;
+ RegSet.X.DI = 0;
+ Addr16 = ivt[0x15];
+ Status = LegacyBiosProtocol->FarCall86 (LegacyBiosProtocol,
+ (UINT16)(Addr16 >> 16),
+ (UINT16)Addr16,
+ &RegSet, 0, 0);
+ Status = (RegSet.X.AX == 0x5F80 || RegSet.X.ES == 0)? EFI_UNSUPPORTED : EFI_SUCCESS;
+ ASSERT_EFI_ERROR(Status);
+
+// return updated address
+ gMxmLegMemAddr = (UINT8*)((RegSet.X.ES << 4) + (RegSet.X.DI));
+
+// TO DO. Expand the routine to obtain the address of _DOD buffer(MXM Int15 5f80, Func 9)
+
+ return Status;
+}
+#endif
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: MxmDriverEntryPoint
+//
+// Description: Entry point of EFI MXM Support driver. The function istalls
+// 1. Install MXM protocol;
+// 2. Update data structure to be passed to Int15 binary
+// must support multiple MXM data modules. Dependent on controller's handle
+// Load MXM data block <1Mb area.
+// a. Copy MXM Structure below 1MB
+// 1. Allocate Legacy mem space for MXM dat <1MB
+// OR
+// 2. Update the MXM data by the pointer returned by Int15 5F80 Func01(default)
+// b. Update the pointer to MXM data in EFI Protocol API
+// c. Create an ACPI SSDT table and copy MXM block there (ASL MXM logic must handle different MXM modules...)
+//
+// Input: EFI_HANDLE ImageHandle,
+// EFI_SYSTEM_TABLE *SystemTable
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+MxmDriverEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ SETUP_DATA SetupData;
+ EFI_GUID SetupGuid = SETUP_GUID;//SYSTEM_CONFIGURATION_GUID;
+ EFI_GUID EfiMxmStructGuid = MXMOEM1_GUID;
+// MXM_STRUCT_HDR *MxmHdr;
+
+#if ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+ EFI_LEGACY_BIOS_EXT_PROTOCOL *BiosExtensions = NULL;
+ EFI_LEGACY_BIOS_PROTOCOL *LegacyBiosProtocol = NULL;
+#endif
+ VOID *MxmData;
+ UINTN ImageSize, Size;
+#if ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+ UINT32 LockUnlockAddr, LockUnlockSize;
+#endif
+ EFI_STATUS CsmOptOutStatus = EFI_SUCCESS;
+
+ InitAmiLib(ImageHandle, SystemTable);
+ TRACE((-1, "==============MxmDriverEntryPoint============\n"));
+ //
+ // Check if the module is enabled in Setup; if not - return EFI_UNSUPPORTED
+ //
+ Size = sizeof(SETUP_DATA);
+ Status = pRS->GetVariable(L"Setup",
+ &SetupGuid,
+ NULL,
+ &Size,
+ &SetupData);
+ if (EFI_ERROR(Status)) return Status;
+
+ // Check to see if Primary Display is set to enable SG
+ //
+ if ((SetupData.PrimaryDisplay == 1)|| //PEG
+ (SetupData.PrimaryDisplay == 3)|| //AUTO
+ (SetupData.PrimaryDisplay == 4)) //SG
+ { }
+ else
+ return EFI_UNSUPPORTED;
+#if ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+ #if defined(CsmOptOut_SUPPORT) && (CsmOptOut_SUPPORT == 1)
+ CsmOptOutStatus = pBS->LocateProtocol(&gAmiOpromPolicyProtocolGuid, NULL, &gAmiOpRomPolicyProtocol);
+ #endif
+ if (!EFI_ERROR(CsmOptOutStatus)){
+ Status = pBS->LocateProtocol(&gEfiLegacyBiosProtocolGuid, NULL, &LegacyBiosProtocol);
+ if (EFI_ERROR(Status)) return Status;
+
+ Status = pBS->LocateProtocol(&gEfiLegacyBiosExtProtocolGuid, NULL, &BiosExtensions);
+ if (EFI_ERROR(Status)) return Status;
+ }
+#endif
+// TBD. Proper Mxm structure block can be loaded based on matching dGPU's PCI Dev`ice/Vendor ID with the file Guid
+// e.g. EfiMxmStructGuid = Nvidia Mxm, AMD Mxm etc.
+// Also, multiple Mxm structure can be loaded if design supports 2 or more Mxm cards plugged in simultaneusly
+// Latter scenario will require MxmInt15.asm changes
+
+ Status = LoadFile(&EfiMxmStructGuid, &MxmData, &ImageSize);
+ ASSERT_EFI_ERROR(Status);
+ if (EFI_ERROR(Status)) return Status;
+ // just in case we'll need to change MXM data
+ // MxmHdr = (MXM_STRUCT_HDR*)MxmData;
+ // if(Strcmp(MxmHdr->Sig,"*MXM_"))
+ // return EFI_UNSUPPORTED;
+
+ gMxmLegMemAddr = (UINT8*)0xE0000;
+ Size = 0x20000;
+
+#if ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+ if (!EFI_ERROR(CsmOptOutStatus)){
+ BiosExtensions->UnlockShadow(
+ (UINT8*)gMxmLegMemAddr, Size,
+ &LockUnlockAddr, &LockUnlockSize);
+ }
+#endif
+
+ gMxmLegMemAddr = MxmData;
+ // Int15 may update gMxmLegMemAddr
+#if ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+ if (!EFI_ERROR(CsmOptOutStatus)){
+ // will copy MXM struct to the address returned by Int15 5F80, Func01
+ Status = UpdateInt15MxmSISData(LegacyBiosProtocol);
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+/*
+#else
+ //
+ // Allocate MXM and E000:0 area
+ //
+ Address = 0xE0000;
+ Status = pBS->AllocatePages (
+ AllocateAddress,
+ EfiBootServicesCode,
+ ImageSize,
+ &gMxmLegMemAddr);
+#endif
+*/
+ if (EFI_ERROR(Status)) {
+ BiosExtensions->LockShadow(LockUnlockAddr, LockUnlockSize);
+ return Status;
+ }
+
+ gMxmLegMemSize = ImageSize;
+ //
+ // Copy the image into the shadow.
+ //
+ pBS->CopyMem(gMxmLegMemAddr, MxmData, gMxmLegMemSize);
+
+ BiosExtensions->LockShadow(LockUnlockAddr, LockUnlockSize);
+
+ } // (!EFI_ERROR(CsmOptOutStatus))
+#endif // ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+// Install NBCI & MXM3_EFI_PROTOCOL only if Primary Display is set to enable SG
+#if SGOEMSSDT_SUPPORT
+ if ((SetupData.PrimaryDisplay == 4) || (SetupData.PrimaryDisplay == 1) || (SetupData.PrimaryDisplay == 3)) //SG
+#else
+ if (SetupData.PrimaryDisplay == 4) //SG
+#endif
+ {
+
+// Install NBCI_EFI_PROTOCOL, Int15 5F80 handle
+// Status = NBCIInterfaces(ImageHandle, SystemTable);
+// Install MXM_EFI_PROTOCOL, Int15 5F80 handle
+ Status = MXM30Interfaces(ImageHandle, SystemTable);
+ ASSERT_EFI_ERROR (Status);
+ if (EFI_ERROR(Status)) return Status;
+
+// wait till Mxm PEG Card is enumerated in BDS
+/*
+ Status = RegisterProtocolCallback(
+ &gBdsAllDriversConnectedProtocolGuid,
+ // Function is linked from MxmAcpiTable.c. Contains OEM implementation for Mxm Acpi table load
+ LoadAcpiTables,
+ NULL,
+ &mMxmEvent,
+ &mMxmReg
+ );
+
+*/
+ }
+ return Status;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30Dxe.dxs b/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30Dxe.dxs
new file mode 100644
index 0000000..a4ef880
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30Dxe.dxs
@@ -0,0 +1,105 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia API/Mxm30Dxe.dxs 2 9/09/12 11:12p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:12p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia API/Mxm30Dxe.dxs $
+//
+// 2 9/09/12 11:12p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] MXM30.mak
+// Mxm30Dxe.dxs
+// Mxm30Dxe.c
+// Mxm30Efi.c
+// NBCIEfi.c
+// MxmInt15.asm
+// MXM30.cif
+//
+// 2 4/11/12 4:07a Alanlin
+// Nvidia Optimus support when CSM module is disabled or CSM is never on
+// setup menu.
+//
+// 1 6/27/11 5:25a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] MXM30.cif
+// MXM30.sdl
+// MXM30.mak
+// Mxm30Dxe.dxs
+// Mxm30Dxe.c
+// Mxm30Efi.c
+// NBCIEfi.c
+// MxmInt15.asm
+// Mxm30ElkCreek4.mxm
+// Mxm30ElkCreekIII.mxm
+//
+//
+// 1 9/17/10 1:16p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// Mxm30.cif;*.sdl;*.mak;
+// Mxm30Dxe.c;*.dxs
+// Mxm30efi.c
+// MxmInt15.asm
+// NbciEfi.c
+// Mxm30ElkCreek3(4).mxm
+//
+// 2 6/03/10 3:08p Alexp
+//
+// 1 6/03/10 2:54p Alexp
+//
+//**********************************************************************
+#include <Token.h>
+#include <protocol\PciRootBridgeIo.h>
+#include <protocol\AcpiSupport.h>
+#if ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+#include <Protocol\CsmPlatform.h>
+#endif
+
+DEPENDENCY_START
+#if ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+ AMI_CSM_DRIVER_STARTED_GUID AND
+#endif
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID AND
+ EFI_ACPI_SUPPORT_GUID
+DEPENDENCY_END
+
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//**************************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30Efi.c b/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30Efi.c
new file mode 100644
index 0000000..b0aa207
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30Efi.c
@@ -0,0 +1,425 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia API/Mxm30Efi.c 2 9/09/12 11:12p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:12p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia API/Mxm30Efi.c $
+//
+// 2 9/09/12 11:12p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] MXM30.mak
+// Mxm30Dxe.dxs
+// Mxm30Dxe.c
+// Mxm30Efi.c
+// NBCIEfi.c
+// MxmInt15.asm
+// MXM30.cif
+//
+// 1 6/27/11 5:25a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] MXM30.cif
+// MXM30.sdl
+// MXM30.mak
+// Mxm30Dxe.dxs
+// Mxm30Dxe.c
+// Mxm30Efi.c
+// NBCIEfi.c
+// MxmInt15.asm
+// Mxm30ElkCreek4.mxm
+// Mxm30ElkCreekIII.mxm
+//
+//
+// 1 9/17/10 1:16p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// Mxm30.cif;*.sdl;*.mak;
+// Mxm30Dxe.c;*.dxs
+// Mxm30efi.c
+// MxmInt15.asm
+// NbciEfi.c
+// Mxm30ElkCreek3(4).mxm
+//
+// 1 6/08/10 3:43p Alexp
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: Mxm30Efi.c
+//
+// Description: This file installs
+// 1)Mxm EFI protocol
+// 2)Mxm Legacy Int15 and
+// 3)Acpi interfaces for Switchable Graphics
+//
+// Notes: MAKE SURE NO PEI OR DXE SPECIFIC CODE IS NEEDED
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include <Token.h>
+#include <AmiDxeLib.h>
+#include <DXE.h>
+
+#include <Protocol\Mxm30.h>
+
+extern EFI_BOOT_SERVICES *pBS;
+extern EFI_RUNTIME_SERVICES *pRS;
+
+// Defined in Mxm30Dxe.c
+extern VOID *gMxmLegMemAddr;
+extern UINTN gMxmLegMemSize;
+/////////////////////////////////////////
+// MXM EFI PROTOCOL PROTOTYPES //
+/////////////////////////////////////////
+
+EFI_STATUS MxmReturnSpecLevel (
+ IN MXM3_EFI_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT CHAR16 usStructSize,
+ IN OUT CHAR8 *pucRevisionLevel,
+ OUT UINTN *puSupportFuncs
+);
+
+EFI_STATUS MxmReturnStructure (
+ IN MXM3_EFI_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT CHAR16 *usStructSize,
+ IN CHAR16 usDataBlockID,
+ OUT CHAR8 **pMxmStruct
+);
+
+EFI_STATUS MxmSelectOutputDevice (
+ IN MXM3_EFI_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT CHAR16 usStructSize,
+ IN EFI_HANDLE ChildHandle,
+ IN CHAR8 ucOutputSetting
+);
+
+EFI_STATUS MxmCheckOutputDevice (
+ IN MXM3_EFI_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT CHAR16 usStructSize,
+ IN EFI_HANDLE ChildHandle,
+ OUT CHAR8 ucDisplayAvailable
+);
+
+MXM3_EFI_PROTOCOL Mxm30Protocol = {
+ MxmReturnSpecLevel,
+ MxmReturnStructure,
+ MxmSelectOutputDevice,
+ MxmCheckOutputDevice
+};
+
+////////////////////////////////
+// MXM EFI PROTOCOL FUNCTIONS //
+////////////////////////////////
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: MxmReturnSpecLevel
+//
+// Description: Caller provides pointer to location, which on call contains the Module requested Spec Revision
+// Level, and which on exit, will contain the Platform's preferred Revision Level and Bit Field of
+// supported functions.
+//
+// Input: UINT8 *This
+// EFI_HANDLE ControllerHandle
+// UCHAR16 usStructSize
+//
+// Output: EFI_STATUS =
+// EFI_SUCCESS, EFI_UNSUPPORTED, EFI_INVALID_PARAMETER, EFI_BUFFER_TOO_SMALL
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+// Where the integer value passed in uSupportFuncs indicates supported functions:
+// Bit 0 = `1' (this method is required)
+// Bit 1 = `1' (MxmReturnStucture is also required)
+// Bit 2 = `1' if MxmSelectOutputDevice is supported, `0' if not
+// Bit 3 = `1' if MxmCheckOutputDevice is supported, `0' if not
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS MxmReturnSpecLevel (
+ IN MXM3_EFI_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT CHAR16 usStructSize,
+ IN OUT CHAR8 *pucRevisionLevel,
+ OUT UINTN *puSupportFuncs
+){
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ *pucRevisionLevel = EFI30_DataBlockID;
+ *puSupportFuncs = EFI30_SupportFuncs;
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: MxmReturnStructure
+//
+// Description: Caller provides expected MXM Interface Revision Level and a pointer which,
+// on return will contain the MXM structure.
+//
+// Input: UINT8 *This
+// EFI_HANDLE ControllerHandle
+// UCHAR16 usStructSize
+//
+// Output: EFI_STATUS =
+// EFI_SUCCESS, EFI_UNSUPPORTED, EFI_INVALID_PARAMETER, EFI_BUFFER_TOO_SMALL
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+// ControllerHandle - used to differentiate which MXM module is being referenced.
+// This is the EFI handle for the PCI device. ChildHandle where used, is the output device (the display).
+// usStructSize - set to the size of the supplied buffer by the caller, and on return should contain the
+// actual size of the structure. If the structure is larger than the buffer, EFI_BUFFER_TOO_SMALL
+// should be returned as the status of the call
+// usDataBlockID - Identifier for the data block to return. To obtain the MXM information structure, use usDataBlockID[0..7] to specify the revision
+// of the MXM software specification that is supported by the MXM module.Format is binary coded decimal, for example: 0030h = 3.0, etc.
+// To obtain an additional vendor specific data block, use lower 8 bits to specify an identifier in the range 0x80-0x8F.
+// If the system BIOS does not contain MXM Graphics Module Software Specification Version 3.0 such a data block, it should return an error.
+// Graphics vendors should not assume a specific assignment within this range - the SBIOS can store
+// the data for different vendors in any order in the 0x80-0x8F identifier range
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS MxmReturnStructure (
+ IN MXM3_EFI_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT CHAR16 *usStructSize,
+ IN CHAR16 usDataBlockID,
+ OUT CHAR8 **pMxmStruct
+){
+ EFI_STATUS Status = EFI_SUCCESS;
+// Only supports Rev 3.0
+ if(usDataBlockID != EFI30_DataBlockID)
+ return EFI_UNSUPPORTED;
+
+// TO DO: calculate the offset within *pMxmStruct by comparing the DevID in the MXM Header with given controller handle DevID
+ *pMxmStruct = gMxmLegMemAddr;
+ *usStructSize = (CHAR16)gMxmLegMemSize;
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: MxmSelectOutputDevice
+//
+// Description: Select Output Device Channel.
+// Caller provides the handle of the target adapter, the handle of the display and the output setting
+//
+// Input: UINT8 *This
+// EFI_HANDLE ControllerHandle
+// UCHAR16 usStructSize
+//
+// Output: EFI_STATUS =
+// EFI_SUCCESS, EFI_UNSUPPORTED, EFI_INVALID_PARAMETER, EFI_BUFFER_TOO_SMALL
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+// Where the value passed in ucOutputSetting may indicate one of the following actions:
+// 0 - Acquire shared Display DDC
+// 1 - Enable this Display Output
+// 3 - Enable this Display - Both Output and DDC
+// 4 - Release shared Display DDC
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS MxmSelectOutputDevice (
+ IN MXM3_EFI_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT CHAR16 usStructSize,
+ IN EFI_HANDLE ChildHandle,
+ IN CHAR8 ucOutputSetting
+){
+
+ return EFI_UNSUPPORTED;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: MxmCheckOutputDevice
+//
+// Description: Check Availability of Output Device. Caller provides the handle of
+// the target adapter and the handle of the display
+//
+// Input: UINT8 *This
+// EFI_HANDLE ControllerHandle
+// UCHAR16 usStructSize
+//
+// Output: EFI_STATUS =
+// EFI_SUCCESS, EFI_UNSUPPORTED, EFI_INVALID_PARAMETER, EFI_BUFFER_TOO_SMALL
+// UCHAR8 ucDisplayAvailable
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes: The returned value ucDisplayAvailable will be one of the following values:
+// 0 - Connector is currently available
+// 1 - Connector is not currently available
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS MxmCheckOutputDevice (
+ IN MXM3_EFI_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT CHAR16 usStructSize,
+ IN EFI_HANDLE ChildHandle,
+ OUT CHAR8 ucDisplayAvailable
+){
+
+ return EFI_UNSUPPORTED;
+}
+
+///////////////////////////////////////
+// END of MXM EFI PROTOCOL FUNCTIONS //
+///////////////////////////////////////
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: LoadFile
+//
+// Description: Reads the file with the given GUID.
+//
+// Input:
+// IN EFI_GUID *Guid,
+// IN VOID **Buffer
+// IN UINTN *BufferSize
+//
+// Output:
+// EFI_STATUS
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS LoadFile(
+ EFI_GUID *Guid,
+ VOID **Buffer,
+ UINTN *BufferSize
+)
+{
+ EFI_STATUS Status;
+ UINTN NumHandles;
+ EFI_HANDLE *HandleBuffer;
+ EFI_FIRMWARE_VOLUME_PROTOCOL *Fv;
+ UINT32 FvStatus;
+ UINTN i;
+ EFI_GUID EfiFVProtocolGuid = EFI_FIRMWARE_VOLUME_PROTOCOL_GUID;
+
+ *Buffer = 0;
+ *BufferSize = 0;
+
+ Status = pBS->LocateHandleBuffer(ByProtocol,&EfiFVProtocolGuid,NULL,&NumHandles,&HandleBuffer);
+ if (EFI_ERROR(Status)) return Status;
+
+ for (i = 0; i < NumHandles; ++i) {
+ Status = pBS->HandleProtocol(HandleBuffer[i],&EfiFVProtocolGuid,&Fv);
+ if (EFI_ERROR(Status)) continue;
+ Status = Fv->ReadSection(Fv,Guid,EFI_SECTION_RAW,0,Buffer,BufferSize,&FvStatus);
+ if (Status == EFI_SUCCESS) break;
+ }
+
+ pBS->FreePool(HandleBuffer);
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: MXM30Interfaces
+//
+// Description: Entry point of EFI MXM Support driver. The function istalls
+// 1. Install MXM protocol;
+// 2. Update data structure to be passed to Int15 binary
+// must support multiple MXM data modules. Dependent on controller's handle
+// Load MXM data block <1Mb area.
+// a. Copy MXM Structure below 1MB
+// 1. Allocate Legacy mem space for MXM dat <1MB
+// OR
+// 2. Update the MXM data by the pointer returned by Int15 5F80 Func01(default)
+// b. Update the pointer to MXM data in EFI Protocol API
+// c. Create an ACPI SSDT table and copy MXM block there (ASL MXM logic must handle different MXM modules...)
+//
+// Input: EFI_HANDLE ImageHandle,
+// EFI_SYSTEM_TABLE *SystemTable
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+MXM30Interfaces (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+ EFI_GUID gEfiMxm3ProtocolGuid = MXM3_EFI_GUID;
+
+ Status = pBS->InstallProtocolInterface (
+ &ImageHandle,
+ &gEfiMxm3ProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &Mxm30Protocol
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30ElkCreek4.mxm b/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30ElkCreek4.mxm
new file mode 100644
index 0000000..a5712b1
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30ElkCreek4.mxm
Binary files differ
diff --git a/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30ElkCreekIII.mxm b/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30ElkCreekIII.mxm
new file mode 100644
index 0000000..3eebd74
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/MXM30/Mxm30ElkCreekIII.mxm
Binary files differ
diff --git a/Board/EM/SwitchableGraphics/SgTpv/MXM30/MxmInt15.asm b/Board/EM/SwitchableGraphics/SgTpv/MXM30/MxmInt15.asm
new file mode 100644
index 0000000..ad7ea06
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/MXM30/MxmInt15.asm
@@ -0,0 +1,553 @@
+
+ TITLE MXMINT15.ASM -- OEM INTERRUPT IMPLEMENTATION
+
+;**********************************************************************
+;**********************************************************************
+;** **
+;** (C)Copyright 1985-2012, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;**********************************************************************
+;**********************************************************************
+;**********************************************************************
+; $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia API/MxmInt15.asm 2 9/09/12 11:12p Joshchou $
+;
+; $Revision: 2 $
+;
+; $Date: 9/09/12 11:12p $
+;**********************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia API/MxmInt15.asm $
+;
+; 2 9/09/12 11:12p Joshchou
+; [TAG] None
+; [Category] Improvement
+; [Description] Tpv module support for sharkbay.
+; [Files] MXM30.mak
+; Mxm30Dxe.dxs
+; Mxm30Dxe.c
+; Mxm30Efi.c
+; NBCIEfi.c
+; MxmInt15.asm
+; MXM30.cif
+;
+; 1 6/27/11 5:25a Alanlin
+; [TAG] EIP61848
+; [Category] New Feature
+; [Description] Initial check-in.Integrated SwitchableGraphics Intel
+; Reference code 0.6.0
+; [Files] MXM30.cif
+; MXM30.sdl
+; MXM30.mak
+; Mxm30Dxe.dxs
+; Mxm30Dxe.c
+; Mxm30Efi.c
+; NBCIEfi.c
+; MxmInt15.asm
+; Mxm30ElkCreek4.mxm
+; Mxm30ElkCreekIII.mxm
+;
+;
+; 1 9/17/10 1:16p Alexp
+; [TAG] EIP43103
+; [Category] Function Request
+; [Severity] Normal
+; [Symptom] Initial check-in of SgTPV module
+; [RootCause] Request to implement SG reference code .
+; [Solution] Initial check-in.
+; [Files]
+; Mxm30.cif;*.sdl;*.mak;
+; Mxm30Dxe.c;*.dxs
+; Mxm30efi.c
+; MxmInt15.asm
+; NbciEfi.c
+; Mxm30ElkCreek3(4).mxm
+;
+; 2 6/03/10 3:07p Alexp
+;
+; 1 6/03/10 2:54p Alexp
+;
+;
+;**********************************************************************
+INCLUDE Token.equ
+.386p
+
+CSMOEM_CSEG SEGMENT PARA PUBLIC 'CODE' USE16
+ ASSUME cs:CSMOEM_CSEG, ds:CSMOEM_CSEG
+
+OldIntHandler LABEL DWORD
+ IntSegSav dw 0
+ IntOfsSav dw 0
+
+;<AMI_FHDR_START>
+;---------------------------------------------------------------------------
+;
+; Name: MXMINT15Proc
+;
+; Description: MXM INT15 function implememtation
+; + nVidia's NBCI Int15 supplement functions
+;
+;---------------------------------------------------------------------------
+;<AMI_FHDR_END>
+
+MXMINT15Proc PROC NEAR PUBLIC
+
+ cmp ax, 5f80h
+ je igd_mxmcall
+; cmp ax, 5f14h ; NVidia Vbios is calling this method. Keeping it commented out since the call is not documented
+; je igd_misccall
+ jmp DWORD PTR cs:[OldIntHandler]
+
+;;igd_misccall:
+;; Output Spec Support Level
+;; BX = 078Fh, Get Miscellaneous Status
+; cmp bx, 078fh
+; jne notSupported
+;; CL = Bit map of dock, lid and AC status:
+;; Bits 7 - 3 = Reserved
+;; Bit 2 = 0, no AC power
+;; = 1, AC power active
+;; Bit 1 = 0, lid open
+;; = 1, lid closed
+;; Bit 0 = 0, not docked
+;; = 1, docked
+; mov cl, 00000100b ; Bitmap of supported functions.
+; jmp short mxmExit
+
+igd_mxmcall:
+
+; MXM rev3.0 <=9
+; NBCI <=9
+; Optimus 13
+ cmp bl, 13
+ ja short notSupported
+
+ push si
+ movzx si, bl
+ shl si, 1
+ stc ; default->not supported
+ call WORD PTR cs:[mxmFuncTable+si] ; Call this function.
+ pop si
+ jc short notSupported
+mxmExit:
+
+ mov ax, 05fh
+
+notSupported:
+; sti
+ clc
+ retf 0002
+; iret
+
+MXMINT15Proc ENDP
+
+mxmFuncTable::
+ DW OFFSET mxmInt15Fun0
+ DW OFFSET mxmInt15Fun1
+ DW OFFSET mxmInt15Fun2
+ DW OFFSET mxmInt15Fun3
+ DW OFFSET mxmInt15Fun4
+ DW OFFSET mxmnotSupported ; mxmInt15Fun5
+ DW OFFSET mxmnotSupported ; mxmInt15Fun6
+ DW OFFSET mxmInt15Fun7
+ DW OFFSET mxmInt15Fun8
+ DW OFFSET mxmInt15Fun9
+ DW OFFSET mxmnotSupported ; mxmInt15FunA
+ DW OFFSET mxmnotSupported ; mxmInt15FunB
+ DW OFFSET mxmnotSupported ; mxmInt15FunC
+ DW OFFSET mxmInt15FunD ; OptimusInt15FunD
+
+mxmDODTable:: ; table must be consistent with _DOD method return in ASL
+ DD 80000100h ; CRT
+ DD 80000400h ; LVDS
+ DD 80006300h ; DP_B
+ DD 80008301h ; dP->HDMI B interop dongle
+ DD 80008302h ; dP->HDMI C interop dongle
+ DD 80006303h ; DP_D
+
+DODCount EQU (($ - mxmDODTable) / 4)
+
+mxmFunc4String::
+ DB 'MXM 3.0 VBIOS: AMI Int15 5F80 Interface', 0dh, 0ah, 0
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+; Procedure: mxmnotSupported
+; Input:
+; Output:
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+mxmnotSupported PROC NEAR
+ ret
+mxmnotSupported ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+; Procedure: mxmInt15Fun0
+; Description: Function 0 Output Specification Support Level
+; Input:
+; AX = 5F80h ; MXM2.0, MXM2.1, MXM3.0
+; BL = 00h ; MXM2.0, MXM2.1, MXM3.0
+; BH = Adapter Index ; MXM2.0, MXM2.1
+; 0 = Primary MXM adapter (default) ; MXM2.0, MXM2.1
+; 1 = Secondary MXM adapter ; MXM2.0, MXM2.1
+; BH = FFh ; MXM3.0
+; EBX[31:16] = Adapter ID ; MXM3.0
+; Bits [31:24] Bus ; MXM3.0
+; Bits [23:19] Device ; MXM3.0
+; Bits [18:16] Function ; MXM3.0
+; CL = Revision of the MXM software specification that is supported by the MXM module ; MXM2.0, MXM2.1
+; Format is binary coded decimal, for example:
+; 10h = 1.0, 11h = 1.1, 20h = 2.0, etc.
+; CX = Revision of the MXM software specification that is supported by the MXM module. ; MXM3.0
+; Format is binary coded decimal, for example: 0030h = 3.0, etc
+; CX = 'OP' 4F50h Optimus Interface
+; CX = 'NB' 4E42h NBCI Interface
+; Output:
+; AX = 005Fh to indicate that the system bios supports this function ; MXM2.0, MXM2.1, MXM3.0
+; BL = Revision of the MXM software specification that is supported by the system ; MXM2.0, MXM2.1, MXM3.0
+; Format is binary coded decimal, for example:
+; 10h = 1.0, 11h = 1.1, 20h = 2.0, etc.
+; CX = MXM functions supported ; MXM2.0, MXM2.1, MXM3.0
+; Bit 0 = 1
+; Bit 1 = 1 if Function 1 is supported, 0 if not supported ; MXM2.0, MXM2.1, MXM3.0
+; Bit 2 = 1 if Function 2 is supported, 0 if not supported ; MXM2.0, MXM2.1, MXM3.0
+; Bit 3 = 1 if Function 3 is supported, 0 if not supported ; MXM2.0, MXM2.1, MXM3.0
+; Bit 4 = 1 if Function 4 is supported, 0 if not supported ; MXM2.1, MXM3.0
+; Bit 7 = 1 if Function 7 is supported, 0 if not supported ; MXM3.0
+; Bit 8 = 1 if Function 8 is supported, 0 if not supported ; MXM3.0
+; Bit 9 = 1 if Function 9 is supported, 0 if not supported ; MXM3.0
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mxmInt15Fun0 PROC NEAR
+; Check signature if Optimus, Mxm or NBCI
+ cmp cx, 'OP'
+ je OptimusFun1
+; MXM rev3.0
+ mov bl, 030h ; Support 3.0
+ mov cx, 0000010011b ; Support funcion 0,1,4
+ jmp short @F
+; mov cx, 1100001011b ; Support funcion 0,1,3,8,9
+; mov cx, 11 0001 1011b ; Support funcion 0,1,3,4,8,9
+; mov cx, 1110011111b ; Support funcion 0,1,2,3,4,7,8,9.
+OptimusFun1:
+ mov bl, 011h ; rev 1.1
+ mov cx, 2001h ; Support funcion 0,13
+@@:
+ clc
+ ret
+mxmInt15Fun0 ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+; Procedure: mxmInt15Fun1
+; Description: Function 1 Output a Pointer to the MXM Structure
+; Input:
+; AX = 5F80h ; MXM2.0, MXM2.1, MXM3.0
+; BL = 01h ; MXM2.0, MXM2.1, MXM3.0
+; BH = FFh ; MXM3.0
+; EBX[31:16] = Adapter ID ; MXM3.0
+; Bits [31:24] Bus ; MXM3.0
+; Bits [23:19] Device ; MXM3.0
+; Bits [18:16] Function ; MXM3.0
+; CL = Revision of the MXM software specification that is supported by the MXM module ; MXM2.0, MXM2.1
+; CX = Identifier for the data block to return ; MXM3.0
+; Output:
+; AX = 005Fh to indicate that the system bios supports this function ; MXM2.0, MXM2.1, MXM3.0
+; BX = Vendor ID of data block if CX = 0x80-0x8F, else 0. ; MXM3.0
+; ES:DI = Pointer to the MXM structure in real mode memory (< 1MB) ; MXM2.0, MXM2.1, MXM3.0
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mxmInt15Fun1 PROC NEAR
+
+; MXM rev3.0
+ mov di, OFFSET mxm30Struc
+ cmp cl, 030h ; Assume this DI for 3.0 MXM.
+ jz short returnMxmStruc
+
+ jmp short exit
+
+returnMxmStruc:
+ mov bx, 0
+ mov ax, cs ; Get ES for MXM structure.
+ mov es, ax
+ clc
+exit:
+ ret
+mxmInt15Fun1 ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+; Procedure: mxmInt15Fun2
+; Description: Function 2 Output a Pointer to the EDID Structure for the Internal Panel
+; Input:
+; AX = 5F80h ; MXM2.0, MXM2.1, MXM3.0
+; BL = 02h ; MXM2.0, MXM2.1, MXM3.0
+; BH = Adapter Index ; MXM2.0, MXM2.1
+; 0 = Primary MXM adapter (default)
+; 1 = Secondary MXM adapter
+; BH = FFh ; MXM3.0
+; EBX[31:16] = Adapter ID ; MXM3.0
+; Bits [31:24] Bus
+; Bits [23:19] Device
+; Bits [18:16] Function
+; EDX = Display device identifier (32-bit value as used in _DOD) ; MXM3.0
+; Output:
+; AX = 005Fh to indicate that the system bios supports this function ; MXM2.0, MXM2.1, MXM3.0
+; BL = EDID structures returned ; MXM2.1, MXM3.0
+; 00 = 128byte EDID 1.3 followed by a 128byte DI-EXT block.
+; 02 = 128byte EDID 1.3 structure only
+; ES:DI = Pointer to the EDID structure in real mode memory (< 1MB) ; MXM2.0, MXM2.1, MXM3.0
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mxmInt15Fun2 PROC NEAR
+ ret
+mxmInt15Fun2 ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+; Procedure: mxmInt15Fun3
+; Description: Function 3 Select Output Device Channel
+; Input:
+; AX = 5F80h ; MXM2.0, MXM2.1, MXM3.0
+; BL = 03h ; MXM2.0, MXM2.1, MXM3.0
+; BH = Adapter Index ; MXM2.0, MXM2.1
+; 0 = Primary MXM adapter (default)
+; 1 = Secondary MXM adapter
+; BH = FFh ; MXM3.0
+; EBX[31:16] = Adapter ID ; MXM3.0
+; Bits [31:24] Bus
+; Bits [23:19] Device
+; Bits [18:16] Function
+; CL = Selection ; MXM2.0, MXM2.1, MXM3.0
+; 0 - Acquire shared Display DDC
+; 1 - Display Output
+; 3 - Both
+; 4 - Release shared Display DDC
+; CH = Device index (range 0 - 7) ; MXM2.0, MXM2.1
+; according to the order in which the MXM Output Device Structure
+; for this device appears in the MXM Data Structure.
+; EDX = Display device identifier (32-bit value as used in _DOD) ; MXM3.0
+; Output:
+; AX = 005Fh to indicate that the SBIOS supports this function ; MXM2.0, MXM2.1, MXM3.0
+; BL For CL=0 the SBIOS shall return a 0h if the mutex was successfully acquired. ; MXM2.0, MXM2.1, MXM3.0
+; When non-zero the mutex was not aquired.
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mxmInt15Fun3 PROC NEAR
+;; mov bl, 0 ; Display DDC acquired
+;; mov cl, 0 ; Display DDC acquired
+ mov bl, cl ; temp fix. actual mutex lock implementation is needed
+ clc
+ ret
+mxmInt15Fun3 ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+; Procedure: mxmInt15Fun4
+; Description: Function 4 Boot Message
+; Input:
+; AX = 5F80h ; MXM2.1, MXM3.0
+; BL = 04h ; MXM2.1, MXM3.0
+; Output:
+; AX = 005Fh to indicate that the SBIOS supports this function ; MXM2.1, MXM3.0
+; BL = Mode If zero then the Pointer is a (zero-terminated) Sign-On Text String. ; MXM2.1
+; BX = Mode If zero then the Pointer is a (zero-terminated) Sign-On Text String. ; MXM3.0
+; ES:DI = Pointer String/Image in real mode memory (< 1MB). ; MXM2.1, MXM3.0
+; A zero length string indicates the normal sign-on message should be suppressed
+; e.g. to support a graphical splash screen.
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mxmInt15Fun4 PROC NEAR
+; Note. Nvidia Vbios replaces normal Vbios POST messages with the boot string
+ mov di, OFFSET mxmFunc4String
+ mov bx, 0
+ mov ax, cs ; Get ES for MXM structure.
+ mov es, ax
+ clc
+ ret
+mxmInt15Fun4 ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+; Procedure: mxmInt15Fun7
+; Description: Function 7 Returns a Pointer to the VBIOS Image for ROM-Less Adapters
+; Input:
+; AX = 5F80h ; MXM3.0
+; BL = 07h ; MXM3.0
+; BH = FFh ; MXM3.0
+; EBX[31:16] = Adapter ID ; MXM3.0
+; Bits [31:24] Bus
+; Bits [23:19] Device
+; Bits [18:16] Function
+; Output:
+; AX = 005Fh to indicate that the SBIOS supports this function ; MXM3.0
+; ES:DI = Pointer to the requested VBIOS image in real mode memory (< 1MB). ; MXM3.0
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mxmInt15Fun7 PROC NEAR
+ ret
+mxmInt15Fun7 ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+; Procedure: mxmInt15Fun8
+; Description: Function 8 Check Availability of Output Device
+; Input:
+; AX = 5F80h ; MXM3.0
+; BL = 08h ; MXM3.0
+; BH = FFh ; MXM3.0
+; EBX[31:16] = Adapter ID ; MXM3.0
+; Bits [31:24] Bus
+; Bits [23:19] Device
+; Bits [18:16] Function
+; EDX = Display device identifier (32-bit value as used in _DOD) ; MXM3.0
+; Output:
+; AX = 005Fh to indicate that the SBIOS supports this function ; MXM3.0
+; BL = Available ; MXM3.0
+; BL = 0 indicates the connector is currently available.
+; BL = 1 indicates the connector is not currently available
+; and no display detection should occur on it.
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mxmInt15Fun8 PROC NEAR
+
+ cmp bh, 0ffh
+ jne invalidDOD
+ mov si, 0
+ mov cx, DODCount ; no of entries
+@@: cmp edx, DWORD PTR cs:[mxmDODTable+si] ; Call this function.
+ je goodDOD
+ add si, 4 ; dword offset
+ loop @B
+
+invalidDOD:
+ stc ; default->not supported
+ mov bl, 1 ; connector is not currently available
+ ret
+
+goodDOD:
+ mov bl, 0 ; connector is available
+ clc
+ ret
+mxmInt15Fun8 ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+; Procedure: mxmInt15Fun9
+; Description: Function 9 Identify Output Devices
+; Input:
+; AX = 5F80h ; MXM3.0
+; BL = 09h ; MXM3.0
+; BH = 00h ; MXM3.0
+; Output:
+; AX = 005Fh to indicate that the SBIOS supports this function; MXM3.0
+; BL = Number of entries in table. ; MXM3.0
+; ES:DI = Pointer to the table. ; MXM3.0
+; This is a table of 32-bit values identical to the buffer returned by _DOD. ; MXM3.0
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+mxmInt15Fun9 PROC NEAR
+
+ cmp bh, 0
+ jne invalidFunc9
+ mov di, OFFSET mxmDODTable
+ mov bl, DODCount ; number of entries
+ mov ax, cs
+ mov es, ax
+ clc
+invalidFunc9:
+ ret
+mxmInt15Fun9 ENDP
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+; Procedure: mxmInt15FunD
+; Description: Optimus: Discrete graphics subsystem power control
+; Input:
+; AX = 5F80h
+; BL = 0Dh
+; BH = FFh
+; EBX[31:16] = Adapter ID
+; Bits [31:24] Bus
+; Bits [23:19] Device
+; Bits [18:16] Function
+; CL = Request GPU subsystem state (0 = Powered off/1 = Powered on)
+; Output:
+; AX = 005Fh to indicate that the system bios supports this function and it completed successfully
+; BL = GPU power state which has been set
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+mxmInt15FunD PROC NEAR
+;!!!! EmeraldLake specific
+ mov dx, 0538h ; DX = mux register
+ cmp cl, 0
+ je dGPU_off
+ cmp cl, 1
+ je dGPU_on
+ ret
+
+dGPU_off:
+ in eax, dx
+ or eax, 00400000h
+ out dx, eax
+ mov bl, cl
+ jmp short OK_FuncD
+
+dGPU_on:
+ in eax, dx
+ and eax, NOT (00400000h)
+ out dx, eax
+ mov bl, cl
+;!!!! EmeraldLake specific
+
+OK_FuncD:
+ clc
+ ret
+mxmInt15FunD ENDP
+
+ PUBLIC mxmStrucSrart
+mxmStrucSrart:
+
+;----------------------------------------------------------------------------
+; MXM rev3.0 data structure
+;----------------------------------------------------------------------------
+mxm30Struc:
+; include MXM30.INC ; First SIS is for first MXM in single MXM config (instance index 0)
+ MxmTbl db MKF_MXM_ROM_MAX_SIZE dup (0dbh)
+
+ PUBLIC mxmStrucEnd
+mxmStrucEnd:
+
+
+CSMOEM_CSEG ENDS
+END
+
+
+;**********************************************************************
+;**********************************************************************
+;** **
+;** (C)Copyright 1985-2012, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;**********************************************************************
+;**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/MXM30/NBCIEfi.c b/Board/EM/SwitchableGraphics/SgTpv/MXM30/NBCIEfi.c
new file mode 100644
index 0000000..eeaf289
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/MXM30/NBCIEfi.c
@@ -0,0 +1,367 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia API/NBCIEfi.c 2 9/09/12 11:12p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:12p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia API/NBCIEfi.c $
+//
+// 2 9/09/12 11:12p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] MXM30.mak
+// Mxm30Dxe.dxs
+// Mxm30Dxe.c
+// Mxm30Efi.c
+// NBCIEfi.c
+// MxmInt15.asm
+// MXM30.cif
+//
+// 1 6/27/11 5:25a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] MXM30.cif
+// MXM30.sdl
+// MXM30.mak
+// Mxm30Dxe.dxs
+// Mxm30Dxe.c
+// Mxm30Efi.c
+// NBCIEfi.c
+// MxmInt15.asm
+// Mxm30ElkCreek4.mxm
+// Mxm30ElkCreekIII.mxm
+//
+//
+// 1 9/17/10 1:16p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// Mxm30.cif;*.sdl;*.mak;
+// Mxm30Dxe.c;*.dxs
+// Mxm30efi.c
+// MxmInt15.asm
+// NbciEfi.c
+// Mxm30ElkCreek3(4).mxm
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: NBCIEfi.c
+//
+// Description: This file installs
+// Nbci EFI protocol
+//
+// Notes: MAKE SURE NO PEI OR DXE SPECIFIC CODE IS NEEDED
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#include <Token.h>
+#include <AmiDxeLib.h>
+#include <DXE.h>
+
+#include <Protocol\NBCI.h>
+
+extern EFI_BOOT_SERVICES *pBS;
+extern EFI_RUNTIME_SERVICES *pRS;
+
+// Defined in Mxm30Dxe.c
+extern VOID *gMxmLegMemAddr;
+extern UINTN gMxmLegMemSize;
+/////////////////////////////////////////
+// Nbci EFI PROTOCOL PROTOTYPES //
+/////////////////////////////////////////
+
+EFI_STATUS NbciReturnSpecLevel (
+ IN NBCI_EFI_PROTOCOL *This,
+ IN OUT CHAR8 *pucRevisionLevel,
+ OUT UINTN *puSupportFuncs
+);
+
+EFI_STATUS NbciReturnStructure (
+ IN NBCI_EFI_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT CHAR16 usStructSize,
+ IN CHAR16 usDataBlockID,
+ OUT CHAR8 *pNbciStruct
+);
+
+EFI_STATUS NbciSelectOutputDevice (
+ IN NBCI_EFI_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT CHAR16 usStructSize,
+ IN EFI_HANDLE ChildHandle,
+ IN CHAR8 ucOutputSetting
+);
+
+EFI_STATUS NbciCheckOutputDevice (
+ IN NBCI_EFI_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT CHAR16 usStructSize,
+ IN EFI_HANDLE ChildHandle,
+ OUT CHAR8 ucDisplayAvailable
+);
+
+NBCI_EFI_PROTOCOL NBCIProtocol = {
+ NbciReturnSpecLevel,
+ NbciReturnStructure,
+ NbciSelectOutputDevice,
+ NbciCheckOutputDevice
+};
+
+// Auxilary Functions. Defined in Mxm30Efi.c
+EFI_STATUS UpdateInt15MxmSISData (
+ IN EFI_LEGACY_BIOS_PROTOCOL *LegacyBiosProtocol
+);
+
+////////////////////////////////
+// Nbci EFI PROTOCOL FUNCTIONS //
+////////////////////////////////
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NbciReturnSpecLevel
+//
+// Description: Caller provides pointer to location, which on call contains the Module requested Spec Revision
+// Level, and which on exit, will contain the Platform's preferred Revision Level and Bit Field of
+// supported functions.
+//
+// Input:
+// CHAR8 *pucRevisionLevel
+// UINTN *puSupportFuncs
+//
+// Output: EFI_STATUS =
+// EFI_SUCCESS, EFI_UNSUPPORTED, EFI_INVALID_PARAMETER, EFI_BUFFER_TOO_SMALL
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+// Where the integer value passed in uSupportFuncs indicates supported functions:
+// Bit 0 = `1' (this method is required)
+// Bit 1 = `1' (NbciReturnStucture is also required)
+// Bit 2 = `1' if NbciSelectOutputDevice is supported, `0' if not
+// Bit 3 = `1' if NbciCheckOutputDevice is supported, `0' if not
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS NbciReturnSpecLevel (
+ IN NBCI_EFI_PROTOCOL *This,
+ IN OUT CHAR8 *pucRevisionLevel,
+ OUT UINTN *puSupportFuncs
+){
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ *pucRevisionLevel = EFI_NBCI_DataBlockID;
+ *puSupportFuncs = EFI_NBCI_SupportFuncs;
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NbciReturnStructure
+//
+// Description: Caller provides expected Nbci Interface Revision Level and a pointer which,
+// on return will contain the Nbci structure.
+//
+// Input: UINT8 *This
+// EFI_HANDLE ControllerHandle
+// UCHAR16 usStructSize
+//
+// Output: EFI_STATUS =
+// EFI_SUCCESS, EFI_UNSUPPORTED, EFI_INVALID_PARAMETER, EFI_BUFFER_TOO_SMALL
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+// ControllerHandle - used to differentiate which Nbci module is being referenced.
+// This is the EFI handle for the PCI device. ChildHandle where used, is the output device (the display).
+// usStructSize - set to the size of the supplied buffer by the caller, and on return should contain the
+// actual size of the structure. If the structure is larger than the buffer, EFI_BUFFER_TOO_SMALL
+// should be returned as the status of the call
+// usDataBlockID - Identifier for the data block to return. To obtain the Nbci information structure, use usDataBlockID[0..7] to specify the revision
+// of the Nbci software specification that is supported by the Nbci module.Format is binary coded decimal, for example: 0030h = 3.0, etc.
+// To obtain an additional vendor specific data block, use lower 8 bits to specify an identifier in the range 0x80-0x8F.
+// If the system BIOS does not contain Nbci Graphics Module Software Specification Version 3.0 such a data block, it should return an error.
+// Graphics vendors should not assume a specific assignment within this range - the SBIOS can store
+// the data for different vendors in any order in the 0x80-0x8F identifier range
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS NbciReturnStructure (
+ IN NBCI_EFI_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT CHAR16 *usStructSize,
+ IN CHAR16 usDataBlockID,
+ OUT CHAR8 **pNbciStruct
+){
+ EFI_STATUS Status = EFI_SUCCESS;
+// Only supports Rev 3.0
+ if(usDataBlockID != EFI_NBCI_DataBlockID)
+ return EFI_UNSUPPORTED;
+
+ UpdateInt15MxmSISData(This);
+
+// TO DO: calculate the offset within *pNbciStruct by comparing the DevID in the Nbci Header with given controller handle DevID
+ *pNbciStruct = (CHAR8*)gMxmLegMemAddr;
+ *usStructSize = (CHAR16)gMxmLegMemSize;
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NbciSelectOutputDevice
+//
+// Description: Select Output Device Channel.
+// Caller provides the handle of the target adapter, the handle of the display and the output setting
+//
+// Input: UINT8 *This
+// EFI_HANDLE ControllerHandle
+// UCHAR16 usStructSize
+//
+// Output: EFI_STATUS =
+// EFI_SUCCESS, EFI_UNSUPPORTED, EFI_INVALID_PARAMETER, EFI_BUFFER_TOO_SMALL
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+// Where the value passed in ucOutputSetting may indicate one of the following actions:
+// 0 - Acquire shared Display DDC
+// 1 - Enable this Display Output
+// 3 - Enable this Display - Both Output and DDC
+// 4 - Release shared Display DDC
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS NbciSelectOutputDevice (
+ IN NBCI_EFI_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT CHAR16 usStructSize,
+ IN EFI_HANDLE ChildHandle,
+ IN CHAR8 ucOutputSetting
+){
+
+ return EFI_UNSUPPORTED;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NbciCheckOutputDevice
+//
+// Description: Check Availability of Output Device. Caller provides the handle of
+// the target adapter and the handle of the display
+//
+// Input: UINT8 *This
+// EFI_HANDLE ControllerHandle
+// UCHAR16 usStructSize
+//
+// Output: EFI_STATUS =
+// EFI_SUCCESS, EFI_UNSUPPORTED, EFI_INVALID_PARAMETER, EFI_BUFFER_TOO_SMALL
+// UCHAR8 ucDisplayAvailable
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes: The returned value ucDisplayAvailable will be one of the following values:
+// 0 - Connector is currently available
+// 1 - Connector is not currently available
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS NbciCheckOutputDevice (
+ IN NBCI_EFI_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT CHAR16 usStructSize,
+ IN EFI_HANDLE ChildHandle,
+ OUT CHAR8 ucDisplayAvailable
+){
+
+ return EFI_UNSUPPORTED;
+}
+
+///////////////////////////////////////
+// END of Nbci EFI PROTOCOL FUNCTIONS //
+///////////////////////////////////////
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NBCIInterfaces
+//
+// Description: Common entry point to install:
+// 1. Install Nbci protocol;
+//
+// Input: EFI_HANDLE ImageHandle
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+NBCIInterfaces (
+ IN EFI_HANDLE ImageHandle
+)
+{
+ EFI_STATUS Status;
+ EFI_GUID gEfiNBCIProtocolGuid = NBCI_EFI_GUID;
+
+// Install NBCI_EFI_PROTOCOL
+ Status = pBS->InstallProtocolInterface (
+ &ImageHandle,
+ &gEfiNbciProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &NBCIProtocol
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.asl b/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.asl
new file mode 100644
index 0000000..93eabab
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.asl
@@ -0,0 +1,79 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia Optimus SMM/NvOptimusSMM.asl 2 9/09/12 11:07p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:07p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia Optimus SMM/NvOptimusSMM.asl $
+//
+// 2 9/09/12 11:07p Joshchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] NvOptimusSMM.mak
+// NvOptimusSMM.c
+// NvOptimusSMM.dxs
+// NvOptimusSMM.ssp
+// NvOptimusSMM.asl
+// NvOptimusSMM.cif
+//
+//**********************************************************************
+External(DGPU_SCOPE.OPTF)
+
+Scope(\_SB.PCI0.LPCB.EC0) {
+ Method(_Q4F) {
+
+ If(LEqual(HMIS, one))
+ {
+ Store(0, DGPU_SCOPE.OPTF)
+ }
+ else
+ {
+ Store(1, DGPU_SCOPE.OPTF)
+ }
+ Notify(PEG_SCOPE,0x81)
+
+ }
+
+ OperationRegion(ECIS, EmbeddedControl, 0, 0xFF) // dummy
+
+ Field(ECIS, ByteAcc, Lock, Preserve) {
+
+ offset(0x78), //
+ , 6,
+ HMIS, 1, // 1 : hdmi plug in, 0 : out
+ }
+
+}
+
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.c b/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.c
new file mode 100644
index 0000000..85a894c
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.c
@@ -0,0 +1,223 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia Optimus SMM/NvOptimusSMM.c 3 10/16/12 4:25a Joshchou $
+//
+// $Revision: 3 $
+//
+// $Date: 10/16/12 4:25a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia Optimus SMM/NvOptimusSMM.c $
+//
+// 3 10/16/12 4:25a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Update for SA and ACPI RC 0.7.1
+// [Files] NvOptimusSmm.c
+//
+// 2 9/09/12 11:07p Joshchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] NvOptimusSMM.mak
+// NvOptimusSMM.c
+// NvOptimusSMM.dxs
+// NvOptimusSMM.ssp
+// NvOptimusSMM.asl
+// NvOptimusSMM.cif
+//
+//**********************************************************************
+#include "Efi.h"
+#include "token.h"
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+#include <Protocol\SmmSwDispatch.h>
+#include <Protocol\SmmBase.h>
+#include <CmosAccess.h>
+#include <Core\EM\CmosManager\CmosManager.h>
+
+#include <SaGlobalNvsArea\SaGlobalNvsArea.h>
+
+
+SYSTEM_AGENT_GLOBAL_NVS_AREA *mSaGlobalNvsAreaPtr = NULL;
+extern EFI_BOOT_SERVICES *pBS;
+//
+// GUID Definitions
+//
+EFI_GUID mSwDispatchProtocolGuid = EFI_SMM_SW_DISPATCH_PROTOCOL_GUID;
+EFI_GUID gSmmCmosServiceProtocolGuid = EFI_SMM_CMOS_ACCESS_GUID;
+EFI_GUID gSaGlobalNvsAreaProtocolGuid = SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL_GUID;
+
+EFI_CMOS_MANAGER_INTERFACE *CmosManager=NULL ;
+VOID NvCmosFunction (EFI_HANDLE DispatchHandle,EFI_SMM_SW_DISPATCH_CONTEXT *DispatchContext );
+VOID NvCmosFunction1 (EFI_HANDLE DispatchHandle,EFI_SMM_SW_DISPATCH_CONTEXT *DispatchContext );
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NvCmosFunction
+//
+// Description: Write AcpiNvs->AudioCodec to CMOS:AudioCodec.
+//
+// Input:EFI_HANDLE DispatchHandle,
+// EFI_SMM_SW_DISPATCH_CONTEXT *DispatchContext
+//
+// Output:
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID NvCmosFunction (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_SW_DISPATCH_CONTEXT *DispatchContext )
+{
+ UINT8 CheckPoint;
+
+ CheckPoint = (mSaGlobalNvsAreaPtr->SgFeatureList & 0x2) >> 1; // dGPUAudioCodec flag bit2
+ CmosManager->Access.Write(&CmosManager->Access, CMOS_OEM_NVSWSMI_CODE, CheckPoint);
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NvCmosFunction1
+//
+// Description: Read CMOS:AudioCodec to AcpiNvs->AudioCodec.
+//
+// Input: EFI_HANDLE DispatchHandle,
+// EFI_SMM_SW_DISPATCH_CONTEXT *DispatchContext
+//
+// Output:
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID NvCmosFunction1 (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_SW_DISPATCH_CONTEXT *DispatchContext )
+{
+ UINT8 CheckPoint;
+
+ CmosManager->Access.Read(&CmosManager->Access, CMOS_OEM_NVSWSMI_CODE,&CheckPoint);
+ mSaGlobalNvsAreaPtr->SgFeatureList |= (CheckPoint & 1) << 1; // dGPUAudioCodec flag bit2
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: InSmmFunction
+//
+// Description: InSmmFunction
+//
+// Input:
+//
+// Output:
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS InSmmFunction (EFI_HANDLE ImageHandle,EFI_SYSTEM_TABLE *SystemTable )
+{
+ EFI_STATUS Status;
+ SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL *SaGlobalNvsAreaProtocol;
+ EFI_SMM_SW_DISPATCH_PROTOCOL *SwDispatch;
+ EFI_SMM_SW_DISPATCH_CONTEXT NvSwSmiContext = {SWSMI_NVOEM_CMOS_W};
+ EFI_SMM_SW_DISPATCH_CONTEXT NvSwSmiContext1 = {SWSMI_NVOEM_CMOS_R};
+ EFI_HANDLE SwHandle;
+
+ UINT8 CheckPoint;
+
+
+ Status = pBS->LocateProtocol ( &mSwDispatchProtocolGuid, NULL, &SwDispatch );
+ ASSERT_EFI_ERROR(Status);
+ //
+ // Locate the Global NVS Protocol.
+ //
+ Status = pBS->LocateProtocol (&gSaGlobalNvsAreaProtocolGuid, NULL, &SaGlobalNvsAreaProtocol);
+ ASSERT_EFI_ERROR (Status);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ mSaGlobalNvsAreaPtr = SaGlobalNvsAreaProtocol->Area;
+ TRACE((-1,"AcpiNvs Addr->SgFeatureList = %X\n", &mSaGlobalNvsAreaPtr->SgFeatureList));
+
+ LOCATE_CMOS_ACCESS_SMM_PROTOCOL(Status, CmosManager);
+
+ if (CmosManager != NULL)
+ {
+ Status = SwDispatch->Register( SwDispatch, NvCmosFunction, &NvSwSmiContext, &SwHandle);
+ Status = SwDispatch->Register( SwDispatch, NvCmosFunction1, &NvSwSmiContext1, &SwHandle);
+// Init dGPUAudioCodec flag
+ CmosManager->Access.Read(&CmosManager->Access,CMOS_OEM_NVSWSMI_CODE,&CheckPoint);
+ mSaGlobalNvsAreaPtr->SgFeatureList |= (CheckPoint & 1) << 1; // dGPUAudioCodec flag bit2
+ }
+
+ return Status;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NvSwSmiEntry
+//
+// Description: NvSwSmiEntry
+//
+// Input: EFI_HANDLE ImageHandle,
+// EFI_SYSTEM_TABLE *SystemTable
+//
+// Output:
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS NvSwSmiEntry (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable )
+{
+ InitAmiLib(ImageHandle,SystemTable);
+
+ return InitSmmHandler( ImageHandle, SystemTable, InSmmFunction, NULL );
+}
+
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.cif b/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.cif
new file mode 100644
index 0000000..db24ffb
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.cif
@@ -0,0 +1,13 @@
+<component>
+ name = "Sg nVidia Optimus SMM"
+ category = ModulePart
+ LocalRoot = "Board\EM\SwitchableGraphics\SgTpv\NvOptimusSMM\"
+ RefName = "NvOptimusSMM"
+[files]
+"NvOptimusSMM.sdl"
+"NvOptimusSMM.mak"
+"NvOptimusSMM.c"
+"NvOptimusSMM.dxs"
+"NvOptimusSMM.ssp"
+"NvOptimusSMM.asl"
+<endComponent>
diff --git a/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.dxs b/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.dxs
new file mode 100644
index 0000000..1b47f48
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.dxs
@@ -0,0 +1,65 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia Optimus SMM/NvOptimusSMM.dxs 2 9/09/12 11:07p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:07p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia Optimus SMM/NvOptimusSMM.dxs $
+//
+// 2 9/09/12 11:07p Joshchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] NvOptimusSMM.mak
+// NvOptimusSMM.c
+// NvOptimusSMM.dxs
+// NvOptimusSMM.ssp
+// NvOptimusSMM.asl
+// NvOptimusSMM.cif
+//
+//**********************************************************************
+
+//#include "EfiDepex.h"
+#include <Protocol\SmmBase.h>
+#include "protocol\SmmSwDispatch.h"
+#include <CmosAccess.h>
+#include <Protocol\GlobalNvsArea\GlobalNvsArea.h>
+
+DEPENDENCY_START
+ EFI_SMM_CMOS_ACCESS_GUID AND
+ EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID AND
+ EFI_SMM_BASE_PROTOCOL_GUID AND
+ EFI_SMM_SW_DISPATCH_PROTOCOL_GUID
+DEPENDENCY_END
+
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.mak b/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.mak
new file mode 100644
index 0000000..2ab5deb
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.mak
@@ -0,0 +1,109 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia Optimus SMM/NvOptimusSMM.mak 3 10/16/12 4:26a Joshchou $
+#
+# $Revision: 3 $
+#
+# $Date: 10/16/12 4:26a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia Optimus SMM/NvOptimusSMM.mak $
+#
+# 3 10/16/12 4:26a Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Update for SA and ACPI RC 0.7.1
+# [Files] NvOptimusSMM.mak
+#
+# 2 9/09/12 11:07p Joshchou
+# [TAG] EIPNone
+# [Category] Improvement
+# [Description] Tpv module support for sharkbay.
+# [Files] NvOptimusSMM.mak
+# NvOptimusSMM.c
+# NvOptimusSMM.dxs
+# NvOptimusSMM.ssp
+# NvOptimusSMM.asl
+# NvOptimusSMM.cif
+#
+# 1 6/27/11 5:26a Alanlin
+# [TAG] EIP61848
+# [Category] New Feature
+# [Description] Initial check-in.Integrated SwitchableGraphics Intel
+# Reference code 0.6.0
+# [Files] NvOptimusSMM.cif
+# NvOptimusSMM.sdl
+# NvOptimusSMM.mak
+# NvOptimusSMM.c
+# NvOptimusSMM.dxs
+# NvOptimusSMM.ssp
+# NvOptimusSMM.asl
+#
+#
+# 1 3/17/11 6:14p Alexp
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: NvOptimusSMM.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+SgTpv : NvOptimusSMM
+
+NvOptimusSMM : $(BUILD_DIR)\NvOptimusSMM.mak NvOptimusSMMBin
+
+$(BUILD_DIR)\NvOptimusSMM.mak : $(NvOptimusSMM_DIR)\$(@B).cif $(NvOptimusSMM_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(NvOptimusSMM_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+NvOptimusSMM_INCLUDES=\
+ $(INTEL_MPG_INCLUDES)\
+ $(ACPI_PLATFORM_INCLUDES)\
+ /DTIANO_RELEASE_VERSION=$(TIANO_RELEASE_VERSION)\
+ /I $(INTEL_SA_PROTOCOL_LIB_DIR)\
+
+# /I$(NvOptimusSMM_DIR) \
+# $(PROJECT_INCLUDES)\
+# $(Foundation_INCLUDES)\
+# /FIinclude\CompilerDirective.h\
+
+NvOptimusSMMBin :$(AMIDXELIB) $(INTEL_SA_PROTOCOL_LIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\NvOptimusSMM.mak all\
+ GUID=8A4E8240-74F8-4024-AE2B-B39221C9FA59\
+ "MY_INCLUDES= $(NvOptimusSMM_INCLUDES)"\
+ DEPEX1=$(NvOptimusSMM_DIR)\NvOptimusSMM.dxs\
+ ENTRY_POINT=NvSwSmiEntry \
+ TYPE=BS_DRIVER \
+ COMPRESS=1\
+
+# OBJECTS="$(BUILD_DIR)\$(NvOptimusSMM_DIR)\NvOptimusSMM.obj" \
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.sdl b/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.sdl
new file mode 100644
index 0000000..c77f960
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.sdl
@@ -0,0 +1,67 @@
+TOKEN
+ Name = "NvOptimusSMM_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable NvOptimusSMM support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "SWSMI_NVOEM_CMOS_W"
+ Value = "0xB6"
+ Help = "Value to be written into SMI command register \to write AcpiNvs->AudioCodec to CMOS"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0-0xff"
+End
+
+TOKEN
+ Name = "SWSMI_NVOEM_CMOS_R"
+ Value = "0xB7"
+ Help = "Value to be written into SMI command register \to write CMOS:AudioCodec to AcpiNvs->AudioCodec"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0-0xff"
+End
+
+TOKEN
+ Name = "CMOS_NVOEM_OFFSET"
+ Value = "0x74"
+ Help = "select fixed Offset in CMOS. By default the offset is assigned by CmosManager, see NvOptimus.ssp"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+PATH
+ Name = "NvOptimusSMM_DIR"
+End
+
+MODULE
+ Help = "Includes NvOptimusSMM.mak to Project"
+ File = "NvOptimusSMM.mak"
+End
+
+#ELINK
+# Name = "$(NvOptimusSMM_DIR)\NvOptimusSMM.asl"
+# Parent = "GENERIC_ACPI_ASL"
+# InvokeOrder = AfterParent
+# Disable = Yes
+#End
+
+ELINK
+ Name = "$(BUILD_DIR)\NvOptimusSMM.ffs"
+ Parent = "$(BUILD_DIR)\SaInitDxe.ffs"
+ InvokeOrder = BeforeParent
+# Parent = "FV_MAIN"
+# InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(NvOptimusSMM_DIR)\NvOptimusSMM.SSP"
+ Parent = "ADDON_SSP_FILES"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.ssp b/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.ssp
new file mode 100644
index 0000000..09c17e9
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/NvOptimusSMM/NvOptimusSMM.ssp
@@ -0,0 +1,59 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia Optimus SMM/NvOptimusSMM.ssp 2 9/09/12 11:07p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:07p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/Sg nVidia Optimus SMM/NvOptimusSMM.ssp $
+//
+// 2 9/09/12 11:07p Joshchou
+// [TAG] EIPNone
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] NvOptimusSMM.mak
+// NvOptimusSMM.c
+// NvOptimusSMM.dxs
+// NvOptimusSMM.ssp
+// NvOptimusSMM.asl
+// NvOptimusSMM.cif
+//
+//**********************************************************************
+
+NvramField (CMOS_OEM_NVSWSMI_CODE)
+ OptionBits = 1
+ Default = 1
+ Checksum = NO
+// Location = MKF_CMOS_NVOEM_OFFSET, 0FFh
+EndNvramField
+
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/SgTpv.cif b/Board/EM/SwitchableGraphics/SgTpv/SgTpv.cif
new file mode 100644
index 0000000..263df51
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/SgTpv.cif
@@ -0,0 +1,20 @@
+<component>
+ name = "Sg TPV"
+ category = ModulePart
+ LocalRoot = "Board\EM\SwitchableGraphics\SgTpv\"
+ RefName = "SgTpv"
+[files]
+"SgTpv.sdl"
+"SgTpv.mak"
+"SgTpvPei.c"
+"SgTpvPei.dxs"
+"SgTpvDxe.c"
+"SgTpvDxe.dxs"
+[parts]
+"MXM_NBCI"
+"NvOptimusSMM"
+"SgTpvAcpiTables"
+"SgTpvAcpiS3Save"
+[dependOn]
+"SwitchableGraphics"
+<endComponent>
diff --git a/Board/EM/SwitchableGraphics/SgTpv/SgTpv.mak b/Board/EM/SwitchableGraphics/SgTpv/SgTpv.mak
new file mode 100644
index 0000000..5094a83
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/SgTpv.mak
@@ -0,0 +1,266 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012 American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/SgTpv.mak 5 1/15/13 5:00a Joshchou $
+#
+# $Revision: 5 $
+#
+# $Date: 1/15/13 5:00a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/SgTpv.mak $
+#
+# 5 1/15/13 5:00a Joshchou
+# [TAG] EIP107237
+# [Category] New Feature
+# [Description] Support SG function on ULT platform.
+#
+# 4 12/18/12 6:20a Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Update for SA RC 081
+#
+# 3 9/24/12 8:27a Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Update for Reference Code v0.70
+# [Files] SgTpv.mak
+#
+# 2 9/09/12 11:15p Joshchou
+# [TAG] EIPNone
+# [Category] New Feature
+# [Description] Tpv module support for sharkbay.
+# [Files] SgTpv.sdl
+# SgTpv.mak
+# SgTpvPei.c
+# SgTpvPei.dxs
+# SgTpvDxe.c
+# SgTpvDxe.dxs
+# SgTpv.cif
+#
+# 1 6/27/11 5:25a Alanlin
+# [TAG] EIP61848
+# [Category] New Feature
+# [Description] Initial check-in.Integrated SwitchableGraphics Intel
+# Reference code 0.6.0
+# [Files] SgTpv.cif
+# SgTpv.sdl
+# SgTpv.mak
+# SgTpvPei.c
+# SgTpvPei.dxs
+# SgTpvDxe.c
+# SgTpvDxe.dxs
+#
+#
+# 3 12/07/10 3:13p Alexp
+# SgTpvPeiBin build rule: replace EDK_DEFAULTS with EDKIIGLUE_DEFAULTS
+# macro.
+# Fixes the build error if project includes Rules.mak without
+# modifications file.
+#
+# 2 11/12/10 1:57p Alexp
+#
+# 1 9/17/10 1:12p Alexp
+# [TAG] EIP43103
+# [Category] Function Request
+# [Severity] Normal
+# [Symptom] Initial check-in of SgTPV module
+# [RootCause] Request to implement SG reference code .
+# [Solution] Initial check-in.
+# [Files]
+# SgTpv.cif;*.sdl;*.mak;
+# SgTpvPei.c;*.dxs;
+# SgTpvDxe.c;*.dxs
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: SgTpv.mak
+#
+# Description:
+# Make file to build Switchable Graphics module for Third Party Gfx vendors
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+SwitchableGraphics: SgTpv
+
+SgTpv : $(BUILD_DIR)\SgTpv.mak SgTpvDxeBin SgTpvPeiBin
+
+$(BUILD_DIR)\SgTpv.mak : $(SgTpv_DIR)\$(@B).cif $(SgTpv_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(SgTpv_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+BUILD_SGTPV_DIR = $(BUILD_DIR)\$(SgTpv_DIR)
+
+################################################################################
+# PEI
+################################################################################
+SgTpv_PEI_OBJECTS = \
+$(BUILD_SGTPV_DIR)\SGTpvPei.obj
+
+SgTpvPei_INCLUDES=\
+ $(EDK_INCLUDES)\
+ $(PROJECT_INCLUDES)\
+ $(INTEL_MCH_INCLUDES)\
+ $(INTEL_MCH_INCLUDES)\SaDataHob\
+ $(INTEL_MCH_INCLUDES)\SaPlatformPolicy\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(SwitchableGraphics_INCLUDES)\
+ /I$(NB_BOARD_DIR)\
+ /I$(SgTpv_DIR)
+
+SgTpvPei_DEFINES=\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=SgTpvPeiInit"\
+ /D __EDKII_GLUE_BASE_LIB__ \
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_PEI_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_PEI_SERVICES_LIB__ \
+ /D __EDKII_GLUE_PEI_MEMORY_ALLOCATION_LIB__
+
+SgTpvPei_LIBS=\
+ $(SaGuidLib_LIB)\
+ $(INTEL_SA_PPI_LIB)\
+ $(IntelPchPpiLib_LIB)\
+ $(EDKFRAMEWORKPPILIB) \
+ $(BUILD_DIR)\IA32\EdkIIGlueBaseLib.lib\
+ $(EdkIIGlueBaseLibIA32_LIB)\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB) \
+ $(BUILD_DIR)\IA32\EdkIIGluePeiDebugLibReportStatusCode.lib\
+ $(BUILD_DIR)\IA32\EdkIIGluePeiReportStatusCodeLib.lib\
+ $(BUILD_DIR)\IA32\EdkIIGluePeiServicesLib.lib\
+ $(BUILD_DIR)\IA32\EdkIIGluePeiMemoryAllocationLib.lib\
+ $(BUILD_DIR)\IA32\EdkIIGlueBasePciLibPciExpress.lib\
+
+# $(EdkIIGlueBasePciLibPciExpress_LIB) \
+# $(EdkIIGluePeiMemoryAllocationLib_LIB) \
+# $(EdkIIGluePeiServicesLib_LIB) \
+# $(EdkIIGluePeiReportStatusCodeLib_LIB) \
+# $(EdkIIGluePeiDxeDebugLibReportStatusCode_LIB) \
+
+# $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+
+# $(EdkIIGlueBaseMemoryLib_LIB)\
+
+# $(EdkIIGluePeiDebugLibReportStatusCode_LIB)\
+
+# $(PEILIB)
+
+# $(SwitchableGraphicsPei_LIBS)
+
+SgTpvPeiBin : $(SgTpvPei_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\SgTpv.mak all\
+ "MY_INCLUDES=$(SgTpvPei_INCLUDES)"\
+ "MY_DEFINES=$(SgTpvPei_DEFINES)"\
+ OBJECTS="$(SgTpv_PEI_OBJECTS)" \
+ NAME=SgTpvPei\
+ MAKEFILE=$(BUILD_DIR)\SgTpv.mak\
+ GUID=0E2DAF63-8A4F-4026-A899-DE2D7F46E5EC\
+ ENTRY_POINT=_ModuleEntryPoint\
+ TYPE=PEIM \
+ EDKIIModule=PEIM\
+ DEPEX1=$(SgTpv_DIR)\SgTpvPei.dxs\
+ DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX\
+ COMPRESS=0
+
+################################################################################
+# DXE
+################################################################################
+SgTpv_DXE_OBJECTS = \
+$(BUILD_SGTPV_DIR)\SGTpvDxe.obj
+
+SgTpvDxe_INCLUDES=\
+ $(EDK_INCLUDES) \
+ $(MISCFRAMEWORK_INCLUDES)\
+ $(EDK_SOURCE_INCLUDES)\
+ $(INTEL_MCH_INCLUDES)\
+ $(INTEL_MCH_INCLUDES)\SaDataHob\
+ $(INTEL_MCH_INCLUDES)\SaPlatformPolicy\
+ $(INTEL_PCH_INCLUDES)\
+ $(INTEL_MPG_INCLUDES)\
+ $(IndustryStandard_INCLUDES)\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(ACPI_PLATFORM_INCLUDES)\
+ $(PROJECT_CPU_INCLUDES)\
+ /I$(SgTpv_DIR)\
+ /I$(INTEL_SYSTEM_AGENT_DIR)\SaInit\
+ /I$(EDK_SOURCE)\Foundation\Efi\Include\
+
+# $(SwitchableGraphics_INCLUDES)\
+
+
+
+SgTpvDxe_LIBS=\
+ $(EDKPROTOCOLLIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+ $(EFISCRIPTLIB)\
+ $(EFIDRIVERLIB)\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(BUILD_DIR)\IA32\EdkIIGlueBaseLib.lib\
+ $(EdkIIGlueBaseMemoryLib_LIB)\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EdkIIGlueEdkDxeRuntimeDriverLib_LIB)\
+ $(EdkIIGlueDxeMemoryAllocationLib_LIB)\
+ $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueDxeServicesTableLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueUefiBootServicesTableLib_LIB)\
+ $(EdkIIGlueUefiLib_LIB)\
+ $(EdkIIGlueDxeHobLib_LIB)\
+ $(INTEL_SA_PROTOCOL_LIB)\
+ $(SaGuidLib_LIB)\
+ $(IntelMpgProtocolLib_LIB)\
+ $(EdkIIGlueBasePciExpressLib_LIB)\
+ $(EdkIIGlueBasePciLibPciExpress_LIB)\
+ $(CpuPlatformLib_LIB)\
+ $(PchPlatformSmmLib_LIB)\
+
+ #$(EdkIIGlueBaseLib_LIB)\
+
+
+SgTpvDxeBin : $(SgTpvDxe_LIBS)
+ $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+ /f $(BUILD_DIR)\SgTpv.mak all\
+ GUID=3FE57AC2-C675-46B1-8458-AC6206588424\
+ NAME=SgTpvDxe\
+ MAKEFILE=$(BUILD_DIR)\SgTpv.mak\
+ "MY_INCLUDES = $(SgTpvDxe_INCLUDES)" \
+ OBJECTS="$(SgTpv_DXE_OBJECTS)" \
+ ENTRY_POINT=SgTpvDxeEntryPoint\
+ TYPE=BS_DRIVER\
+ EDKIIModule=DXEDRIVER\
+ DEPEX1=$(SgTpv_DIR)\SgTpvDxe.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ COMPRESS=1
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012 American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/SgTpv.sdl b/Board/EM/SwitchableGraphics/SgTpv/SgTpv.sdl
new file mode 100644
index 0000000..41b10af
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/SgTpv.sdl
@@ -0,0 +1,40 @@
+TOKEN
+ Name = SgTpv_SUPPORT
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Help = "Main switch to enable SgTpv support in Project"
+End
+
+TOKEN
+ Name = "EFI_PEI_END_OF_SG_TPV_PPI_GUID"
+ Value = "{0xc81aa794, 0xdf62, 0x4a39, 0xaf, 0xf6, 0xa6, 0x8c, 0x9, 0xe2, 0x3b, 0xdd}"
+ Help = "End of SG TPV PPI GUID"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+PATH
+ Name = SgTpv_DIR
+ Help = "Path to SgTpv Module in Project"
+End
+
+MODULE
+ Help = "Includes SgTpv.mak to Project"
+ File = "SgTpv.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\SgTpvPei.ffs"
+ Parent = "$(BUILD_DIR)\SaInitPeim.ffs"
+ InvokeOrder = BeforeParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\SgTpvDxe.ffs"
+ Parent = "$(BUILD_DIR)\SaInitDxe.ffs"
+ InvokeOrder = BeforeParent
+End \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/SgTpvDxe.c b/Board/EM/SwitchableGraphics/SgTpv/SgTpvDxe.c
new file mode 100644
index 0000000..d3f8465
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/SgTpvDxe.c
@@ -0,0 +1,260 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/SgTpvDxe.c 4 5/13/14 4:44a Joshchou $
+//
+// $Revision: 4 $
+//
+// $Date: 5/13/14 4:44a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/SgTpvDxe.c $
+//
+// 4 5/13/14 4:44a Joshchou
+// [TAG] EIP167034
+// [Category] Improvement
+// [Description] Review the variable's attribute.
+//
+// 3 1/15/13 5:02a Joshchou
+// [TAG] EIP107237
+// [Category] New Feature
+// [Description] Support SG function on ULT platform.
+//
+// 2 9/09/12 11:15p Joshchou
+// [TAG] EIPNone
+// [Category] New Feature
+// [Description] Tpv module support for sharkbay.
+// [Files] SgTpv.sdl
+// SgTpv.mak
+// SgTpvPei.c
+// SgTpvPei.dxs
+// SgTpvDxe.c
+// SgTpvDxe.dxs
+// SgTpv.cif
+//
+// 2 12/06/11 2:15a Alanlin
+// [TAG] EIP76248
+// [Category] New Feature
+// [Description] PX 5.0 feature updated
+//
+// 1 6/27/11 5:25a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgTpv.cif
+// SgTpv.sdl
+// SgTpv.mak
+// SgTpvPei.c
+// SgTpvPei.dxs
+// SgTpvDxe.c
+// SgTpvDxe.dxs
+//
+//
+// 2 9/24/10 5:37p Alexp
+// [TAG] EIP43103 --> fix CPU exception error by checking if
+// endpoint bus is enabled in PEG root bridge
+//
+// 1 9/17/10 1:12p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgTpv.cif;*.sdl;*.mak;
+// SgTpvPei.c;*.dxs;
+// SgTpvDxe.c;*.dxs
+//
+// 2 6/16/10 5:07p Alexp
+//
+// 1 6/10/10 4:22p Alexp
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: SgTpvDXE.c
+//
+// Description: This file contains the etry point of SgTpv Support driver
+//
+// Notes: MAKE SURE NO PEI OR DXE SPECIFIC CODE IS NEEDED
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+//
+// External include files do NOT need to be explicitly specified in real EDKII
+// environment
+//
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+#include "EfiScriptLib.h"
+#endif
+
+#include <Token.h>
+#include <SetupDataDefinition.h>
+#include "SaAccess.h"
+
+#include "CpuRegs.h"
+#include "CpuPlatformLib.h"
+#include "PchRegsPcie.h"
+
+#include EFI_PROTOCOL_PRODUCER (SaPlatformPolicy)
+
+#define AMD_VID 0x1002
+#define NVIDIA_VID 0x10DE
+#define SETUP_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+SETUP_DATA SetupDataBuffer;
+CPU_FAMILY CpuFamilyId;
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SgTpvDxeEntryPoint
+//
+// Description: Entry point of EFI SG Support driver.
+//
+// Input: EFI_HANDLE ImageHandle,
+// EFI_SYSTEM_TABLE *SystemTable
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+SgTpvDxeEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+ DXE_PLATFORM_SA_POLICY_PROTOCOL *DxePlatformSaPolicy;
+ UINT8 EndpointBus;
+ EFI_GUID gSetupGuid = SETUP_GUID;
+ UINTN VariableSize = 0;
+ UINT8 RootPortDev;
+ UINT8 RootPortFun;
+ UINT32 Attributes = 0;
+
+
+ EfiInitializeDriverLib (ImageHandle, SystemTable);
+ CpuFamilyId = GetCpuFamily();
+ //
+ // Locate the SG Policy Protocol
+ //
+ Status = gBS->LocateProtocol (
+ &gDxePlatformSaPolicyGuid,
+ NULL,
+ &DxePlatformSaPolicy
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ //
+ // Update SG DXE Policy -
+ //
+
+ // 1 = Load secondary display device VBIOS; 0 = Do not load
+ //
+ DxePlatformSaPolicy->VbiosConfig->LoadVbios = LOADVBIOS;
+ DxePlatformSaPolicy->VbiosConfig->VbiosSource = VBIOSSOURCE;
+ DxePlatformSaPolicy->VbiosConfig->ExecuteVbios = EXECUTEVBIOS;
+#if (defined(SGOEMSSDT_SUPPORT) && (SGOEMSSDT_SUPPORT != 0))
+ DxePlatformSaPolicy->VbiosConfig->ExecuteVbios = 0;
+#endif
+
+ //
+ // Endpoint Base Addresses and Capability Structure Offsets for ASL usage
+ //
+
+ if (CpuFamilyId == EnumCpuHswUlt) {
+ /// For SwitchableGraphics support the dGPU is present on PCH RootPort
+ RootPortDev = PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS;
+ RootPortFun = SG_ULT_PORT_FUNC;
+ } else {
+ /// Assume: For SwitchableGraphics support the dGPU is present on PEG RootPort by default
+ RootPortDev = SA_PEG10_DEV_NUM;
+ RootPortFun = SA_PEG10_FUN_NUM;
+ }
+
+ //EndpointBus = McD1PciCfg8 (PCI_SBUS);
+ EndpointBus = MmPci8 (0, 0, RootPortDev, RootPortFun, PCI_SBUS);
+
+ if (EndpointBus != 0xff &&
+ McDevFunPciCfg16 (EndpointBus, 0, 0, PCI_VID) == NVIDIA_VID)
+ {
+ DxePlatformSaPolicy->VbiosConfig->ExecuteVbios = 0;
+ }
+
+ VariableSize = sizeof (SETUP_DATA);
+ Status = gRT->GetVariable (
+ L"Setup",
+ &gSetupGuid,
+ &Attributes,
+ &VariableSize,
+ &SetupDataBuffer
+ );
+ DEBUG ((EFI_D_ERROR, "SgTpvDxeEntryPoint Attributes = %x\n",Attributes));
+
+
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+ #if defined(CsmOptOut_SUPPORT) && (CsmOptOut_SUPPORT == 1)
+ if ((SetupDataBuffer.CsmLaunchPolicy == 0) || (SetupDataBuffer.BootOptionFilter == 2))
+ {DxePlatformSaPolicy->VbiosConfig->ExecuteVbios = 0;}
+ #endif
+#else
+ DxePlatformSaPolicy->VbiosConfig->ExecuteVbios = 0;
+#endif
+// if (SetupDataBuffer.PrimaryDisplay == 4)
+// {
+ if (EndpointBus != 0xff &&
+ McDevFunPciCfg16 (EndpointBus, 0, 0, PCI_VID) == AMD_VID)
+ {
+ SetupDataBuffer.TPVCardCheck = 1;
+ } else
+ SetupDataBuffer.TPVCardCheck = 0;
+
+ Status = gRT->SetVariable (
+ L"Setup",
+ &gSetupGuid,
+ Attributes,
+ sizeof(SETUP_DATA),
+ &SetupDataBuffer
+ );
+// } // SetupDataBuffer.PrimaryDisplay == 4
+
+ return Status;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/SgTpvDxe.dxs b/Board/EM/SwitchableGraphics/SgTpv/SgTpvDxe.dxs
new file mode 100644
index 0000000..4513007
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/SgTpvDxe.dxs
@@ -0,0 +1,88 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/SgTpvDxe.dxs 2 9/09/12 11:15p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:15p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/SgTpvDxe.dxs $
+//
+// 2 9/09/12 11:15p Joshchou
+// [TAG] EIPNone
+// [Category] New Feature
+// [Description] Tpv module support for sharkbay.
+// [Files] SgTpv.sdl
+// SgTpv.mak
+// SgTpvPei.c
+// SgTpvPei.dxs
+// SgTpvDxe.c
+// SgTpvDxe.dxs
+// SgTpv.cif
+//
+// 1 6/27/11 5:25a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgTpv.cif
+// SgTpv.sdl
+// SgTpv.mak
+// SgTpvPei.c
+// SgTpvPei.dxs
+// SgTpvDxe.c
+// SgTpvDxe.dxs
+//
+// 2 3/30/11 10:27p Alanlin
+//
+// 1 9/17/10 1:12p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgTpv.cif;*.sdl;*.mak;
+// SgTpvPei.c;*.dxs;
+// SgTpvDxe.c;*.dxs
+//
+//**********************************************************************
+
+#include "EfiDepex.h"
+#include EFI_PROTOCOL_DEPENDENCY (SaPlatformPolicy)
+#include EFI_PROTOCOL_DEPENDENCY (PciIo)
+
+DEPENDENCY_START
+ DXE_PLATFORM_SA_POLICY_GUID AND
+ EFI_PCI_IO_PROTOCOL_GUID
+DEPENDENCY_END
+
+
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//**************************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SgTpv/SgTpvPei.c b/Board/EM/SwitchableGraphics/SgTpv/SgTpvPei.c
new file mode 100644
index 0000000..beb41c9
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/SgTpvPei.c
@@ -0,0 +1,266 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/SgTpvPei.c 4 10/30/13 6:42a Joshchou $
+//
+// $Revision: 4 $
+//
+// $Date: 10/30/13 6:42a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/SgTpvPei.c $
+//
+// 4 10/30/13 6:42a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] system assert after clear nvram,and we have give it
+// value,so do not assert
+//
+// 3 2/07/13 2:58a Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Install a PPI for broadcasting OEM.
+//
+// 2 9/09/12 11:15p Joshchou
+// [TAG] EIPNone
+// [Category] New Feature
+// [Description] Tpv module support for sharkbay.
+// [Files] SgTpv.sdl
+// SgTpv.mak
+// SgTpvPei.c
+// SgTpvPei.dxs
+// SgTpvDxe.c
+// SgTpvDxe.dxs
+// SgTpv.cif
+//
+// 3 12/06/11 2:33a Alanlin
+// [TAG] EIP76248
+// [Category] New Feature
+// [Description] PX 5.0 feature updated.
+//
+// 2 10/14/11 2:54a Alanlin
+// [TAG] EIP72054
+// [Category] Improvement
+// [Description] SgTpv is not compatible with SETUP_DATA_LAYOUT_OVERRIDE
+// in core > 4.6.4.1
+// [Files] Board\EM\SgTpv\SgTpvPei.c
+//
+// 1 6/27/11 5:25a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgTpv.cif
+// SgTpv.sdl
+// SgTpv.mak
+// SgTpvPei.c
+// SgTpvPei.dxs
+// SgTpvDxe.c
+// SgTpvDxe.dxs
+//
+//
+// 5 3/17/11 6:12p Alexp
+// 1. Add nNvOptimusSMM module part
+// 2. cleaned up SgTpvPei.c
+// 3. Optimus:Add code to preserve HD AudioCodec enable flag in CMOS
+//
+// 4 11/12/10 1:08p Alexp
+// Update to match Intel HR SwitchableGraphics Reference Code Version
+// 1.00
+// Code to set SSID for IGD moved to SgPei.c
+//
+// 3 9/30/10 2:51p Alexp
+// [TAG] EIP43103 ---> Set IGD SSID/SVID based on the SG mode
+//
+// 2 9/21/10 5:23p Alexp
+// [TAG] EIP43103 ---> re-arranged include statements
+//
+// 1 9/17/10 1:12p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgTpv.cif;*.sdl;*.mak;
+// SgTpvPei.c;*.dxs;
+// SgTpvDxe.c;*.dxs
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: SgTpvPEI.c
+//
+// Description: This file contains the PEI SG Entry point SgPei_Init.
+// The function updates SG Policy settings
+//
+// Notes: MAKE SURE NO PEI OR DXE SPECIFIC CODE IS NEEDED
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include <Token.h>
+
+#define SETUP_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGluePeim.h"
+#include "EdkIIGlueIoLib.h"
+#endif
+
+#include "Pei.h"
+
+#include "SaAccess.h"
+
+#include EFI_PPI_DEPENDENCY (Variable)
+#include EFI_PPI_DEPENDENCY (SaPlatformPolicy)
+#include EFI_GUID_DEFINITION (SaDataHob)
+
+static EFI_GUID gSetupGuid = SETUP_GUID;
+
+#include <SetupDataDefinition.h>
+
+EFI_GUID guidEndOfSgTpvPei = EFI_PEI_END_OF_SG_TPV_PPI_GUID;
+
+static EFI_PEI_PPI_DESCRIPTOR EndOfSgTpvPpiList[] =
+{
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &guidEndOfSgTpvPei, NULL
+ }
+};
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SgTpvPeiInit
+//
+// Description: This function is the entry point for this PEI.
+//
+// Input: FfsHeader Pointer to the FFS file header
+// PeiServices Pointer to the PEI services table
+//
+// Output: Return Status based on errors that occurred while waiting for
+// time to expire.
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS
+EFIAPI
+SgTpvPeiInit (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+)
+{
+ EFI_STATUS Status;
+ EFI_PEI_READ_ONLY_VARIABLE_PPI *VariableServices;
+ UINTN VariableSize;
+ SETUP_DATA SetupData;
+
+ SA_PLATFORM_POLICY_PPI *SaPlatformPolicyPpi;
+ EFI_GUID gSaPlatformPolicyPpiGuid = SA_PLATFORM_POLICY_PPI_GUID;
+
+DEBUG ((EFI_D_ERROR, "==============SgTpvPeiInit==========\n"));
+ //
+ // Locate Variable Ppi
+ //
+ Status = (*PeiServices)->LocatePpi(PeiServices,
+ &gPeiReadOnlyVariablePpiGuid,
+ 0,
+ NULL,
+ &VariableServices);
+
+ //
+ // Make sure we have a PPI, if not, just return.
+ //
+ if (!VariableServices) {
+ return EFI_UNSUPPORTED;
+ }
+ VariableSize = sizeof(SETUP_DATA);
+ //
+ // Get Setup Variable
+ //
+ Status = VariableServices->PeiGetVariable (
+ PeiServices,
+ L"Setup",
+ &gSetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData);
+
+ if (EFI_ERROR(Status))
+ return Status;
+
+ //
+ // Get platform policy settings through the SgPlatformPolicy PPI
+ //
+ Status = (**PeiServices).LocatePpi (
+ PeiServices,
+ &gSaPlatformPolicyPpiGuid,
+ 0,
+ NULL,
+ &SaPlatformPolicyPpi
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // GPIO Assigned from policy
+ //
+
+ //
+ // Initialzie the Platform Configuration
+ //
+
+ //
+ // Switchable Graphics mode set as MUXED (By default)
+ //
+ if( SetupData.PrimaryDisplay == 4 ) {
+ SaPlatformPolicyPpi->PlatformData->SgMode = SetupData.SgMuxMode;
+ SaPlatformPolicyPpi->PlatformData->PXFixedDynamicMode = SetupData.PX_FIXED_DYNAMIC_MODE;
+
+ } else if ((SetupData.PrimaryDisplay == 1) || (SetupData.PrimaryDisplay == 3)) { // PEG || Auto
+
+ SaPlatformPolicyPpi->PlatformData->SgMode = 3;//SgModeDgpu;
+
+ } else if (SetupData.PrimaryDisplay == 0) { // IGFX
+ //
+ // In IGFX only mode mode set Switchable Gfx mode as Disabled
+ //
+ SaPlatformPolicyPpi->PlatformData->SgMode = SgModeDisabled;
+ }
+
+ //
+ // Set SSID/SVID for IGD in SG mode only
+ //
+ SaPlatformPolicyPpi->PlatformData->SgSubSystemId = (UINT16)((SG_MUXLESS_SSVID_DID >> 16 )& 0xFFFF);
+ (*PeiServices)->InstallPpi(PeiServices,EndOfSgTpvPpiList);
+ return Status;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SgTpv/SgTpvPei.dxs b/Board/EM/SwitchableGraphics/SgTpv/SgTpvPei.dxs
new file mode 100644
index 0000000..d19e0fc
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SgTpv/SgTpvPei.dxs
@@ -0,0 +1,85 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/SgTpvPei.dxs 2 9/09/12 11:15p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:15p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/Sg TPV/SgTpvPei.dxs $
+//
+// 2 9/09/12 11:15p Joshchou
+// [TAG] EIPNone
+// [Category] New Feature
+// [Description] Tpv module support for sharkbay.
+// [Files] SgTpv.sdl
+// SgTpv.mak
+// SgTpvPei.c
+// SgTpvPei.dxs
+// SgTpvDxe.c
+// SgTpvDxe.dxs
+// SgTpv.cif
+//
+// 1 6/27/11 5:25a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SgTpv.cif
+// SgTpv.sdl
+// SgTpv.mak
+// SgTpvPei.c
+// SgTpvPei.dxs
+// SgTpvDxe.c
+// SgTpvDxe.dxs
+//
+//
+// 1 9/17/10 1:12p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of SgTPV module
+// [RootCause] Request to implement SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SgTpv.cif;*.sdl;*.mak;
+// SgTpvPei.c;*.dxs;
+// SgTpvDxe.c;*.dxs
+//
+//**********************************************************************
+
+#include "EfiDepex.h"
+#include EFI_PPI_DEPENDENCY (SaPlatformPolicy)
+
+DEPENDENCY_START
+ SA_PLATFORM_POLICY_PPI_GUID
+DEPENDENCY_END
+
+
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//**************************************************************************** \ No newline at end of file
diff --git a/Board/EM/SwitchableGraphics/SwitchableGraphics.chm b/Board/EM/SwitchableGraphics/SwitchableGraphics.chm
new file mode 100644
index 0000000..768e160
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SwitchableGraphics.chm
Binary files differ
diff --git a/Board/EM/SwitchableGraphics/SwitchableGraphics.cif b/Board/EM/SwitchableGraphics/SwitchableGraphics.cif
new file mode 100644
index 0000000..2350167
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SwitchableGraphics.cif
@@ -0,0 +1,14 @@
+<component>
+ name = "SwitchableGraphics"
+ category = eModule
+ LocalRoot = "Board\EM\SwitchableGraphics\"
+ RefName = "SwitchableGraphics"
+[files]
+"SwitchableGraphics.sdl"
+"SwitchableGraphics.mak"
+"SwitchableGraphics.sd"
+"SwitchableGraphics.uni"
+"SwitchableGraphics.chm"
+[parts]
+"SgTpv"
+<endComponent>
diff --git a/Board/EM/SwitchableGraphics/SwitchableGraphics.mak b/Board/EM/SwitchableGraphics/SwitchableGraphics.mak
new file mode 100644
index 0000000..e2ab8a0
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SwitchableGraphics.mak
@@ -0,0 +1,100 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/SwitchableGraphics.mak 2 9/09/12 11:26p Joshchou $
+#
+# $Revision: 2 $
+#
+# $Date: 9/09/12 11:26p $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/SwitchableGraphics.mak $
+#
+# 2 9/09/12 11:26p Joshchou
+# [TAG] None
+# [Category] Improvement
+# [Description] Tpv module support for sharkbay.
+# [Files] SwitchableGraphics.sdl
+# SwitchableGraphics.mak
+# SwitchableGraphics.sd
+# SwitchableGraphics.uni
+# SwitchableGraphics.chm
+# SwitchableGraphics.cif
+#
+# 1 6/27/11 5:13a Alanlin
+# [TAG] EIP61848
+# [Category] New Feature
+# [Description] Initial check-in.Integrated SwitchableGraphics Intel
+# Reference code 0.6.0
+# [Files] SwitchableGraphics.cif
+# SwitchableGraphics.sdl
+# SwitchableGraphics.mak
+# SwitchableGraphics.sd
+# SwitchableGraphics.uni
+#
+#
+# 4 9/17/10 3:21p Alexp
+#
+# [TAG] EIP43103
+# [Category] Function Request
+# [Severity] Normal
+# [Symptom] Initial check-in of iIntel Switchable Graphics module
+# [RootCause] Request to implement Intel Huron River SG reference code .
+# [Solution] Initial check-in.
+# [Files]
+# SwitchableGraphics.cif; *.chm; *.sdl; *.mak; *.sd;*.uni
+#
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: SwitchableGraphics.mak
+#
+# Description: Makfile for SG Setup menu.
+#
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+all : SwitchableGraphics
+
+SwitchableGraphics: $(BUILD_DIR)\SwitchableGraphics.mak
+
+$(BUILD_DIR)\SwitchableGraphics.mak : $(SwitchableGraphics_DIR)\SwitchableGraphics.cif $(SwitchableGraphics_DIR)\SwitchableGraphics.mak $(BUILD_RULES)
+ $(CIF2MAK) $(SwitchableGraphics_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+#---------------------------------------------------------------------------
+# Create Sg Setup Screen(s)
+#---------------------------------------------------------------------------
+SetupSdbs : SwitchableGraphicsSDB
+
+SwitchableGraphicsSDB : $(BUILD_DIR)\SwitchableGraphics.mak
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $** all\
+ TYPE=SDB NAME=SwitchableGraphics STRING_CONSUMERS=$(SwitchableGraphics_DIR)\SwitchableGraphics.sd
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/SwitchableGraphics/SwitchableGraphics.sd b/Board/EM/SwitchableGraphics/SwitchableGraphics.sd
new file mode 100644
index 0000000..5bb4cf4
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SwitchableGraphics.sd
@@ -0,0 +1,216 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/SwitchableGraphics.sd 2 9/09/12 11:26p Joshchou $
+//
+// $Revision: 2 $
+//
+// $Date: 9/09/12 11:26p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/SwitchableGraphics/SwitchableGraphics.sd $
+//
+// 2 9/09/12 11:26p Joshchou
+// [TAG] None
+// [Category] Improvement
+// [Description] Tpv module support for sharkbay.
+// [Files] SwitchableGraphics.sdl
+// SwitchableGraphics.mak
+// SwitchableGraphics.sd
+// SwitchableGraphics.uni
+// SwitchableGraphics.chm
+// SwitchableGraphics.cif
+//
+// 3 1/30/12 6:46a Alanlin
+// [TAG] EIP81672
+// [Category] New Feature
+// [Description] SwitchableGraphics setting goto define.
+// [Files] SwitchableGraphics.sd
+//
+// 2 12/06/11 2:24a Alanlin
+// [TAG] EIP76248
+// [Category] New Feature
+// [Description] PX 5.0 feature updated
+//
+// 1 6/27/11 5:13a Alanlin
+// [TAG] EIP61848
+// [Category] New Feature
+// [Description] Initial check-in.Integrated SwitchableGraphics Intel
+// Reference code 0.6.0
+// [Files] SwitchableGraphics.cif
+// SwitchableGraphics.sdl
+// SwitchableGraphics.mak
+// SwitchableGraphics.sd
+// SwitchableGraphics.uni
+//
+//
+// 1 9/17/10 1:46p Alexp
+// [TAG] EIP43103
+// [Category] Function Request
+// [Severity] Normal
+// [Symptom] Initial check-in of iIntel Switchable Graphics module
+// [RootCause] Request to implement Intel Huron River SG reference code .
+// [Solution] Initial check-in.
+// [Files]
+// SwitchableGraphics.cif; *.chm; *.sdl; *.mak; *.sd;*.uni
+//
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: SwitchableGraphics.sd
+//
+// Description: Switchable Graphics Setup page layout
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#ifdef SETUP_DATA_DEFINITION
+/***********************************************************/
+/* Put NVRAM data definitions here.
+/* For example: UINT8 Data1;
+/* These definitions will be converted by the build process
+/* to a definitions of SETUP_DATA fields.
+/***********************************************************/
+ UINT8 SgMuxMode;
+// UINT8 PX_FIXED_MODE;
+// UINT8 PX_DYNAMIC_MODE;
+ UINT8 PX_FIXED_DYNAMIC_MODE;
+ UINT8 TPVCardCheck;
+#endif
+
+//---------------------------------------------------------------------------
+#if defined(VFRCOMPILE) && !defined(CONTROLS_ARE_DEFINED)
+#define CONTROL_DEFINITION
+#endif
+//---------------------------------------------------------------------------
+
+//**********************************************************************
+// ADVANCED - Onboard Devices Form
+//**********************************************************************
+#ifdef CONTROL_DEFINITION
+
+#define SG_ONEOF_SGMUXMODE\
+ oneof varid = SETUP_DATA.SgMuxMode,\
+ prompt = STRING_TOKEN(STR_SG_MODE),\
+ help = STRING_TOKEN(STR_SG_MODE_HELP),\
+ option text = STRING_TOKEN(STR_SG_MUXLESS), value = 2, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+/*
+#define SG_ONEOF_PXFIXEDMODE\
+ oneof varid = SETUP_DATA.PX_FIXED_MODE,
+ prompt = STRING_TOKEN(STR_PX_FIXED_MODE),
+ help = STRING_TOKEN(STR_PX_FIXED_MODE_HELP),
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING;
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
+ endoneof;
+
+#define SG_ONEOF_PXDYNAMICMODE\
+ oneof varid = SETUP_DATA.PX_DYNAMIC_MODE,
+ prompt = STRING_TOKEN(STR_PX_DYNAMIC_MODE),
+ help = STRING_TOKEN(STR_PX_DYNAMIC_MODE_HELP),
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING;
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
+ endoneof;
+*/
+
+#define SG_ONEOF_PXFIXEDDYNAMICMODE\
+ oneof varid = SETUP_DATA.PX_FIXED_DYNAMIC_MODE,\
+ prompt = STRING_TOKEN(STR_PX_FIXED_DYNAMIC_MODE),\
+ help = STRING_TOKEN(STR_PX_FIXED_DYNAMIC_MODE_HELP),\
+ option text = STRING_TOKEN(STR_BACO_DYNAMIC_SCHEME), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING;\
+ option text = STRING_TOKEN(STR_DGPUOFF_DYNAMIC_SCHEME), value = 1, flags = RESET_REQUIRED;\
+ endoneof;
+
+#define SG_GOTO_SWITCHABLEGRAPHICS\
+ goto SG_FORM_ID, \
+ prompt = STRING_TOKEN(STR_SG_FORM),\
+ help = STRING_TOKEN(STR_SG_FORM_HELP);
+
+#endif // CONTROL_DEFINITION
+
+//---------------------------------------------------------------------------
+#ifdef CONTROLS_WITH_DEFAULTS
+ SG_ONEOF_SGMUXMODE
+/*
+ SG_ONEOF_PXFIXEDMODE
+ SG_ONEOF_PXDYNAMICMODE
+*/
+ SG_ONEOF_PXFIXEDDYNAMICMODE
+#endif // CONTROLS_WITH_DEFAULTS
+//---------------------------------------------------------------------------
+
+//**********************************************************************
+// Advanced - SwitchableGraphics Configuration Form
+//**********************************************************************
+
+#ifdef ADVANCED_FORM_SET
+
+ #ifndef SUPPRESS_GRAYOUT_ENDIF //old Core
+ #define SUPPRESS_GRAYOUT_ENDIF endif;
+ #endif
+
+ #ifdef FORM_SET_ITEM
+ // Define controls to be added to the main page of the formset
+
+ #endif
+
+ #ifdef FORM_SET_GOTO
+ // Define goto commands for the forms defined in this file
+ SG_GOTO_SWITCHABLEGRAPHICS
+ #endif
+
+ #ifdef FORM_SET_FORM
+ #ifndef SWITCHABLEGRAPHICS_FORM_SETUP
+ #define SWITCHABLEGRAPHICS_FORM_SETUP
+
+ // Define forms
+ form formid = AUTO_ID(SG_FORM_ID),
+ title = STRING_TOKEN(STR_SG_FORM);
+
+ // Define controls to be added to the main page of the formset
+
+ grayoutif NOT ideqval SETUP_DATA.PrimaryDisplay == 4;
+ SG_ONEOF_SGMUXMODE
+ endif;
+
+ suppressif NOT ideqval SETUP_DATA.PrimaryDisplay == 4 OR
+ ideqval SETUP_DATA.TPVCardCheck == 0;
+ SG_ONEOF_PXFIXEDDYNAMICMODE
+ endif;
+
+ endform;
+ #endif // SWITCHABLEGRAPHICS_FORM_SETUP
+ #endif // FORM_SET_FORM
+
+#endif // ADVANCED_FORM_SET
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/SwitchableGraphics/SwitchableGraphics.sdl b/Board/EM/SwitchableGraphics/SwitchableGraphics.sdl
new file mode 100644
index 0000000..125e8f3
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SwitchableGraphics.sdl
@@ -0,0 +1,155 @@
+TOKEN
+ Name = "AmiSgTPV_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable SwitchableGraphics TPV support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Token = "SwitchableGraphics_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "SG_MUXLESS_SSVID_DID"
+ Value = "0x21118086"
+ Help = "SUBSYSTEM VENDOR & DEVICE ID. Using Intel iGPU"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "LOADVBIOS"
+ Value = "1"
+ Help = "1 = Load secondary display device VBIOS; 0 = Do not load"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "EXECUTEVBIOS"
+ Value = "0"
+ Help = "0 = Do no execute\1 = Execute the secondary display device VBIOS (only if LoadVbios == 1)"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "VBIOSSOURCE"
+ Value = "1"
+ Help = "1 = secondary display device VBIOS Source is PCI Card\0 = secondary display device VBIOS Source is FW Volume"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SGMUXDID1"
+ Value = "0x00030301"
+ Help = "CRT Display; SGMUXDID format\0x|<HPD Mux> |<Aux Mux>|<Disp Mux>|<Port Type>|\0x|31 24|23 16|15 8|7 0|\HPD/Aux/Disp Mux: 1 = iGPU Only, 2 = dGPU Only, 3 = Shared"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SGMUXDID2"
+ Value = "0x00030302"
+ Help = "LFP Display"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SGMUXDID3"
+ Value = "0x03030308"
+ Help = "DisplayPort_B Display"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SGMUXDID4"
+ Value = "0x03030304"
+ Help = "HDMI_B Display"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SGMUXDID5"
+ Value = "0x03030305"
+ Help = "HDMI_C Display"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SGMUXDID6"
+ Value = "0x0303030A"
+ Help = "DisplayPort_D Display"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SGMUXDID7"
+ Value = "0x00030306"
+ Help = "HDMI_D Display"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SGMUXDID8"
+ Value = "0x00000000"
+ Help = "Unused"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "VALIDDIDS"
+ Value = "7"
+ Help = "Number of valis Device IDs"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+PATH
+ Name = "SwitchableGraphics_DIR"
+ Help = "SwitchableGraphics DXE source directory"
+End
+
+PATH
+ Name = "INCLUDE_DIR"
+ Path = "Include"
+End
+
+MODULE
+ Help = "Includes SwitchableGraphics.mak to Project"
+ File = "SwitchableGraphics.mak"
+End
+
+ELINK
+ Name = "/I$(SwitchableGraphics_DIR)"
+ Parent = "SwitchableGraphics_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\SwitchableGraphics.sdb"
+ Parent = "SETUP_SDBS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(SwitchableGraphics_DIR)\SwitchableGraphics.sd"
+ Parent = "SETUP_DEFINITIONS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "SwitchableGraphics_INCLUDES"
+ InvokeOrder = ReplaceParent
+End
+
diff --git a/Board/EM/SwitchableGraphics/SwitchableGraphics.uni b/Board/EM/SwitchableGraphics/SwitchableGraphics.uni
new file mode 100644
index 0000000..6e14e8b
--- /dev/null
+++ b/Board/EM/SwitchableGraphics/SwitchableGraphics.uni
Binary files differ
diff --git a/Board/EM/TCG2/Common/AmiTcgBinaries.cif b/Board/EM/TCG2/Common/AmiTcgBinaries.cif
new file mode 100644
index 0000000..4b3b4b1
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgBinaries.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "AmiTcgBinaries"
+ category = ModulePart
+ LocalRoot = "Board\EM\TCG2\Common"
+ RefName = "AmiTcgBinaries"
+[files]
+"TcgBins.sdl"
+"TcgBins.mak"
+"TPM32BIN.bin"
+"LEGX16.bin"
+"MPTPM.bin"
+<endComponent>
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatform.cif b/Board/EM/TCG2/Common/AmiTcgPlatform.cif
new file mode 100644
index 0000000..0670fe2
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatform.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "AmiTcgPlatform"
+ category = ModulePart
+ LocalRoot = "Board\EM\TCG2\Common"
+ RefName = "AmiTcgPlatform"
+[files]
+"AmiTcgPlatform.sdl"
+[parts]
+"AmiTcgPlatformPei"
+"AmiTcgPlatformDxe"
+<endComponent>
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatform.sdl b/Board/EM/TCG2/Common/AmiTcgPlatform.sdl
new file mode 100644
index 0000000..2fb0944
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatform.sdl
@@ -0,0 +1,213 @@
+TOKEN
+ Name = "AMI_TCG_PLATFORM_SUPPORT"
+ Value = "1"
+ Help = "Main token TCG to allow override of TCG functions"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+
+TOKEN
+ Name = "TCG_SIZE"
+ Value = "010000h"
+ Help = "Size of Dxecore to measure"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+
+
+TOKEN
+ Name = "USE_AMI_PERSISTENT_BIOS_MANAGEMENT_FLAGS_SUPPORT"
+ Value = "1"
+ Help = "Main token TCG to allow override of TCG functions"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+End
+
+
+TOKEN
+ Name = "DONT_SEND_SELFTEST_TILL_READY_TO_BOOT"
+ Value = "1"
+ Help = "Main token TCG send selftest on ready to boot"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "SELF_TEST_VID"
+ Value = "015D1h"
+ Help = "Size of Dxecore to measure"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+
+TOKEN
+ Name = "Measure_Boot_Data"
+ Value = "0"
+ Help = "token to determine if EFI boot data information are measured"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "WAKE_EVENT_MEASUREMENT"
+ Value = "0"
+ Help = "token to allow measurement of wake events. Note LOG_EV_EFI_ACTION also needs to be enabled"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+Token = "LOG_EV_EFI_ACTION" "=" "1"
+End
+
+TOKEN
+ Name = "PPI_DISPLAY_OFFSET"
+ Value = "001"
+ Help = ""
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "Measure_Smbios_Tables"
+ Value = "0"
+ Help = "token to determine if smbios tables are measured"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TCGMeasureSecureBootVariables"
+ Value = "1"
+ Help = "Set 1 to measure secure boot Variables if Secureboot is Enabled. Note this requires WHCK connectedStandby compliance"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "SecureBoot_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "UnconfiguredSecureBootVariables"
+ Value = "0"
+ Help = "Set 1 to allow measurement of Secureboot Variables even when Secureboot is not configured. Enabling this token will add about 50-100ms to platform boot time"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "SecureBoot_SUPPORT" "=" "1"
+ Token = "TCGMeasureSecureBootVariables" "=" "1"
+End
+
+TOKEN
+ Name = "MeasureCPUMicrocodeToken"
+ Value = "0"
+ Help = "Set 1 to measure cpu microcode"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "AMI_ZTEIC_SUPPORT" "=" "0"
+End
+
+TOKEN
+ Name = "MEASURE_CRTM_VERSION_PEI_FUNCTION"
+ Value = "MeasureCRTMVersion"
+ Help = "Function to measure crtm version. Input:EFI_PEI_SERVICES **. AMI function Modified Pcr 0"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MEASURE_TCG_PCCLIENT_ID_PEI_FUNCTION"
+ Value = "MeasureTCGPcClientSpecID"
+ Help = "Function to Measure TCG PcClient Spec ID. Input:EFI_PEI_SERVICES ** and PEI_TCG_PPI. Modifies Pcr 0"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MEASURE_CORE_DXE_FW_VOL_PEI_FUNCTION"
+ Value = "MeasureDxeCoreFwVol"
+ Help = "Function to Measure Dxe FW volume. Gets Tcg Ppi, Peiservices and pointer to dxe fw vol. Modifies Pcr 0"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MEASURE_PCI_OPTION_ROM_DXE_FUNCTION"
+ Value = "MeasurePCIOproms"
+ Help = "Function to measure dxe firmware volume. Inputs: None. Modifies Pcr 2"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MEASURE_HANDOFF_TABLES_DXE_FUNCTION"
+ Value = "MeasureHandoffTables"
+ Help = "Measures BIOS tables ACPI and Smbios tables. Inputs: None. Modifies Pcr 0-ACPI, Pcr 1=Smbios"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MEASURE_CPU_MICROCODE_DXE_FUNCTION"
+ Value = "MeasureCpuMicroCode"
+ Help = "Measures CPU Microcode Information. Input:None. Modifies Pcr 1"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MEASURES_TCG_BOOT_SEPARATORS_DXE_FUNCTION"
+ Value = "MeasureSeparators"
+ Help = "Measures TCG separtors. Input None: Modifies: Pcr 0-7"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MEASURE_SECURE_BOOT_DXE_FUNCTION"
+ Value = "MeasureSecurebootVariables"
+ Help = "Measures Secureboot Variables. Input: None. Modifies PCR 5"
+ TokenType = Expression
+ TargetH = Yes
+ Token = "SecureBoot_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "MEASURES_BOOT_VARIABLES_DXE_FUNCTION"
+ Value = "MeasureAllBootVariables"
+ Help = "Measures EFI boot Variables. Input: None. Modifies PCR 5"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+
+TOKEN
+ Name = "MEASURE_WAKE_EVENT_DXE_FUNCTION"
+ Value = "MeasureWakeEvent"
+ Help = "Function to Measure platform wake event. Modifies PCR 6"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "SKIP_PHYSICAL_PRESENCE_LOCK_FUNCTION"
+ Value = "DummySkipPhysicalPresence"
+ Help = "Function to alert if locking of physical presence should be skipped"
+ TokenType = Expression
+ TargetH = Yes
+End \ No newline at end of file
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformDxe.c b/Board/EM/TCG2/Common/AmiTcgPlatformDxe.c
new file mode 100644
index 0000000..e237fcb
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformDxe.c
@@ -0,0 +1,5594 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformDxe/AmiTcgPlatformDxe.c 5 7/02/14 10:26p Fredericko $
+//
+// $Revision: 5 $
+//
+// $Date: 7/02/14 10:26p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformDxe/AmiTcgPlatformDxe.c $
+//
+// 5 7/02/14 10:26p Fredericko
+//
+// 4 6/14/14 12:34a Fredericko
+// Fix locking of Physical Presense
+//
+// 3 6/09/14 4:57p Fredericko
+// Changes for SetVariable vulnerability during Runtime
+//
+// 2 6/03/14 7:55p Fredericko
+// Tcm Support changes
+//
+// 1 4/21/14 2:17p Fredericko
+//
+// 5 3/28/14 7:47p Fredericko
+// [TAG] EIP159964
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] WHCK TCG OS Interface might faile
+// [RootCause] MOR variable needs to be a runtime variable
+// [Solution] Make MOR variable a runtime variable
+// [Files] AmiTcgplatformdxe.c
+//
+// 4 3/17/14 9:28p Fredericko
+//
+// 3 3/17/14 3:21p Fredericko
+//
+// 2 3/14/14 3:24p Fredericko
+//
+// 1 10/08/13 12:04p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:55p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 48 12/12/12 6:53p Fredericko
+//
+// 47 12/03/12 11:02p Fredericko
+// [TAG] EIP104961
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] UEFI 2.3.1 SCT test failed in Generic\EfiCompliant case.
+// The VariableAttribute of SecureBoot is not correct.
+// [RootCause] Changes to Secureboot module
+// [Solution] Remove secureboot variable check in Tcg
+// [Files] AmiTcgPlatformDxe.c
+// xTcgdxe.c
+//
+// 46 11/30/12 7:23p Fredericko
+//
+// 2 11/30/12 7:18p Fredericko
+// [TAG] EIP104949
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] UEFI 2.3.1 SCT test failed in Generic\EfiCompliant case.
+// TpmOldvar is not defined in the Spec.
+// [RootCause] Using Global EFI GUID for a locally defined variable.
+// [Solution] Change GUID
+// Also Fix for EIP 104961. Build error when using SecureBoot module
+// 4.6.5.1_SECBOOT_WIN8_ 016 and newer.
+// Setup variable change.
+// [Files] AmiTcgPlatformDxe.c
+// TCGMisc.h
+//
+// 45 11/05/12 11:13a Fredericko
+// Continue Selftest Vendor ID Token added
+//
+// 44 10/30/12 10:47a Fredericko
+// 1.Close PciIoEvent on Readytoboot
+// 2. Token to measure Secureboot Variables even if secureboot is disabled
+// 3. Changes to the measure of separators for boot speed
+//
+// 43 10/22/12 1:25a Jittenkumarp
+// [TAG] EIP100790
+// [Category] Improvement
+// [Description] ActivateApplication in AMITSE delayed if the SoftKbd
+// support enabled thereforTPM Message are not displayed
+// [Files] AmiTcgPlatformDxe.c, TCG.sdl, TPMPwd.c , AmiTcgPlatform.sdl
+//
+// 42 9/19/12 4:27p Fredericko
+// [TAG] EIP98198
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] inconsistent usage of uppercase and lowercase hexadecimal
+// digits for the BOOT#### EFI variables in AmiTcgPlatform
+// [RootCause] use of lower case for generic definition of BOOT variable
+// for searching and hashing
+// [Solution] Base case on TSE_CAPITAL_BOOT_OPTION token. default is
+// uppercase
+// [Files] AmiTcgPlatformDxe.c
+//
+// 41 9/13/12 5:14p Fredericko
+// [TAG] EIP96218
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] AMIUEFI: When dbx is not defined, the system is not
+// measuring an entry for dbx in the log. ( Winqual Bug ID : 958441 )
+// [RootCause] Not measuring dbx event into Tcg Event log when dbx
+// variable was not defined.
+// [Solution] Measure with Datalength of zero for Events when
+// SecureBootSupport is enabled but Keys are not installed
+//
+// [Files] xTcgDxe.c
+// AmiTcgPlatformDxe.c
+//
+// 40 5/19/12 6:34p Fredericko
+// changes for TPM_PASSWORD_AUTHENTICATION Token support.
+//
+// 39 5/18/12 6:09p Fredericko
+// Changes for Confirm_SETUP_CHANGE token.
+//
+// 38 5/18/12 4:10p Fredericko
+// Made changes for possible display corruption from AmiPostMgr protocol
+//
+// 37 5/09/12 3:59p Fredericko
+// Changes in the way Separators are measured.
+//
+// 36 4/28/12 3:30p Fredericko
+// Changed when selftest is called. Also put Perf macro info for DP log.
+//
+// 35 4/27/12 6:38p Fredericko
+//
+// 34 4/27/12 6:22p Fredericko
+// Changes for system boot speed when TCG is enabled
+//
+// 33 4/25/12 10:50a Yul
+// [TAG] EIP69594
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] In some rare situatations POST text screen outputs are
+// corrupted.
+// [RootCause] Using GetVariable() to read PlatformLang variable.
+// [Solution] Using HiiLibGetString() to get the necessary string.
+// [Files] AmiTcgPlatformDxe.c
+//
+// 32 4/22/12 6:56p Fredericko
+//
+// 31 4/19/12 8:02p Fredericko
+// EIP83480: ClearLastBootFailed Flag before reseting system from TCG.
+// Keep track of PPI UI. If it has already been launched don't launch
+// again.
+// LegacySerialIO can cause multiple launch of TCG PPI UI.
+//
+// 30 3/22/12 5:05p Fredericko
+// Token to allow disabling measurement of smbios tables.
+//
+// 29 3/19/12 6:56p Fredericko
+// [TAG] EIP82866
+// [Category] Improvement
+// [Description] 1. AMIUEFI: Implement the NoPPIClear flag and provide
+// operations to set/clear the value or a BIOS config option
+// 2. Changes for Tcg Performance Metrics Improvement.
+// [Files] NoPpiClear : AmiTcgNvFlagSample.c, AmiTcgNvFlagSample.sdl,
+// AmiTcgPlatformDxe.c, TcgSmm.c
+// Performance Metrics Files Changed: Tcg.sdl, TcgMisc.h, TcgDxe.c,
+// TcgCommon.c, TcgCommon.h,
+// AmiTcgPlatformPeiLib.c, AmiTcgPlatformDxe.c, TcgDxe.dxs
+//
+// 28 2/17/12 7:50p Fredericko
+// 1.Fix PPI_Confirmation token where some strings were not displaying
+// -EIP 81592
+// 2. Fix possible hang from size issue of AMITSESETUP variable during Ppi
+// calls.
+//
+// 27 2/03/12 6:34p Fredericko
+// [TAG] EIP81665
+// [Category] Improvement
+// [Description] Support for MOR feature improvement.
+// Reset Mor on Ready to boot. MeasureSecureBoot variables if
+// TcgMeasureSecureboot token is enabled.
+// Support to use either zeros as separators or -1 as separator.
+// [Files] Tcg.sdl, AmiTcgPlatformDxe.c, Tcgdxe.c, Tcglegacy.c
+//
+// 26 1/20/12 9:19p Fredericko
+//
+// 25 1/17/12 5:40p Rahuls
+// Fix possible sync error situations between TPM status from O.S. and
+// BIOS.
+//
+// 24 1/17/12 12:04p Fredericko
+// [TAG] EIP81011
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Clear TPM Via OS fail
+// [RootCause] BIOS was not syncing BIOS with O.S. changes
+// [Solution] Synchronize BIOS information with O.S. request when O.S.
+// changes TPM state with Physical Presence and Ownership
+// [Files] AmiTcgPlatformDxe.c
+//
+// 23 12/30/11 5:04p Fredericko
+// [TAG] EIP78141
+// [Category] New Feature
+// [Description] Added hooks to override generic TPM platform hash
+// functions.
+// [Files] 1. AmiTcgPlatform.sdl
+// 2. AmiTcgPlatformPei.h
+// 3. AmiTcgPlatformPeiLib.c
+// 4. AmiTcgPlatformPeiAfterMem.c
+// 5. AmiTcgPlatformDxe.c
+// 6. AmiTcgPlatformDxe.h
+//
+// 22 12/18/11 10:32p Fredericko
+// [TAG] EIP63922
+// [Category] Improvement
+// [Description] [MBY] After udpate SMBIOS to v30, system hang at CKP
+// 0xA0 if DEBUG_MODE = 1.
+//
+// 21 12/15/11 5:21p Fredericko
+//
+// 20 12/12/11 7:10p Fredericko
+//
+// 19 11/23/11 6:06p Fredericko
+// [TAG] EIP74297
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Process for when CONFIRM_SETUP_CHANGE is enabled will not
+// behave as defined
+// [RootCause] TpmNvflags were not set with consideration for when
+// CONFIRM_SETUP_CHANGE is enabled
+// [Solution] Set policy with reference to token
+// [Files] AmiTcgPlatformDxe.c
+// AmiTcgNvflagSample.c
+//
+//
+//
+// [TAG] EIP75882
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Added support for the measurement of Secureboot
+// variables
+// [Files] AmiTcgPlatformDxe.c
+//
+//
+//
+// [TAG] EIP63922
+// [Category] Improvement
+// [Description] Support for Smbios label 30 and up. Callback on
+// publishing of Smbios tables
+// [Files] AmiTcgPlatformDxe.c
+//
+// 18 11/14/11 2:09p Fredericko
+// [TAG] EIP54573
+// [Category] Improvement
+// [Description] Added Support to allow or disallow the measurement of
+// EFI boot Data into PCR 5.
+// [Files] AmiTcgPlatform.sdl
+// AmiTcgPlatformDxe.c
+//
+// 17 10/10/11 12:11a Fredericko
+// [TAG] EIP70220
+// [Category] Improvement
+// [Description] Remove dependency on CSM
+// [Files] TcgLegacy.sdl
+// AmiTcgPlatformDxe.c
+// AmiTcgPlatformDxe.h
+// xTcgDxe.c
+//
+// 16 9/27/11 10:33p Fredericko
+// [TAG] EIP67286
+// [Category] Improvement
+// [Description] changes for Tcg Setup policy
+// [Files] Tcg.sdl
+// TcgPei.cif
+// TcgPei.mak
+// xtcgPei.c
+// xTcgPeiAfterMem.c
+// TcgPeiAfterMem.mak
+// TcgDxe.cif
+// TcgDxe.mak
+// xTcgDxe.c
+// AmiTcgPlatformPeilib.c
+// AmiTcgPlatformDxelib.c
+//
+// 15 9/03/11 8:08p Fredericko
+//
+// 14 8/29/11 5:41p Fredericko
+// Reverting previous changes.
+//
+// 13 8/29/11 4:43p Fredericko
+// [TAG] EIP63922
+// [Category] Improvement
+// [Description] Fix changes to match smbios v30. Smbios tables were not
+// being found on ready to boot.
+// [Files] AmiTcgPlatformdxe.c
+//
+// 12 8/26/11 3:38p Fredericko
+// [TAG] EIP67736
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] System Hange
+// [RootCause] Overflow condition in comparism of length of Ffs
+// [Solution] Check overflow condition in loop and break if it occurs
+// [Files] AmiTcgPlatformDxe.c
+//
+// 11 8/10/11 4:34p Fredericko
+// [TAG] EIP66465
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] 1. Reset for PpiProvision flags to be updated in NVRAM
+// 2. Fix for Ppi 11. TPM was being left activated
+// 3. Legacy free support changes
+// 4. Getplatform language pointer changes.
+// [Files] 1. AmiTcgPlatformDxe.c
+//
+// 10 8/09/11 6:32p Fredericko
+// [TAG] EIP66468
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] 1. Changes for Tcg Ppi 1.2 support.
+// [Files] 1 TcgSmm.h
+// 2.TcgSmm.c
+// 3.Tcg_ppi1_2.asl
+// 4. AmiTcgNvflagsSample.c
+// 5. AmiTcgPlatformPeiLib.c
+// 6. AmiTcgPlatformDxe.sdl
+// 7. AmiTcgPlatformDxe.c
+//
+// 9 7/25/11 3:42a Fredericko
+// [TAG] EIP65177
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Tcg Ppi Spec ver 1.2 update
+//
+// 8 4/28/11 6:33p Fredericko
+// Changes for Lifetime lock settings
+//
+// 7 4/26/11 1:54p Fredericko
+// Added support for function level override of specific functions.
+//
+// 6 4/25/11 1:26p Fredericko
+// Added closing brackets that was causing build error when lifetime lock
+// token was set.
+//
+// 5 4/06/11 6:46p Fredericko
+// PPI confirmation Override changes
+//
+// 4 4/01/11 9:35a Fredericko
+// Updated function Header
+//
+// 3 3/29/11 5:51p Fredericko
+// Changes for core 464 and ACPI tables support
+//
+// 2 3/29/11 2:26p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiTcgPlatformDxe.c
+//
+// Description: Function file for AmiTcgPlatformDxe
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include "AmiTcgPlatformDxe.h"
+#include "AmiTcgPlatformDxeLib.h"
+#include "AmiTcgPlatformDxeStrTokens.h"
+#include <token.h>
+#include "TcgPlatformSetupPolicy.h"
+#if defined AmiBoardInfo_SUPPORT && AmiBoardInfo_SUPPORT == 1
+#include <AmiBoardInfo.h>
+#endif
+#if (defined(TCGMeasureSecureBootVariables) && (TCGMeasureSecureBootVariables != 0))
+#include <ImageAuthentication.h>
+#endif
+
+#define BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID \
+ {0xdbc9fd21, 0xfad8, 0x45b0, 0x9e, 0x78, 0x27, 0x15, 0x88, 0x67, 0xcc, 0x93}
+
+EFI_GUID gBdsAllDriversConnectedProtocolGuid = BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID;
+
+#if TPM_PASSWORD_AUTHENTICATION
+#define TCG_PASSWORD_AUTHENTICATION_GUID \
+ {0xB093BDD6, 0x2DE2, 0x4871,0x87,0x68, 0xEE,0x1D, 0xA5, 0x72, 0x49, 0xB4 }
+EFI_GUID TcgPasswordAuthenticationGuid = TCG_PASSWORD_AUTHENTICATION_GUID;
+#endif
+
+extern MEASURE_PCI_OPTION_ROM_FUNC_PTR MEASURE_PCI_OPTION_ROM_DXE_FUNCTION;
+MEASURE_PCI_OPTION_ROM_FUNC_PTR *MeasurePCIOpromsFuncPtr = MEASURE_PCI_OPTION_ROM_DXE_FUNCTION;
+
+extern MEASURE_HANDOFF_TABLES_FUNC_PTR MEASURE_HANDOFF_TABLES_DXE_FUNCTION;
+MEASURE_HANDOFF_TABLES_FUNC_PTR *MeasureHandoffTablesFuncPtr = MEASURE_HANDOFF_TABLES_DXE_FUNCTION;
+
+extern MEASURE_CPU_MICROCODE_FUNC_PTR MEASURE_CPU_MICROCODE_DXE_FUNCTION;
+MEASURE_CPU_MICROCODE_FUNC_PTR *MeasureCpuMicroCodeFuncPtr = MEASURE_CPU_MICROCODE_DXE_FUNCTION;
+
+extern MEASURE_BOOT_VAR_FUNC_PTR MEASURES_BOOT_VARIABLES_DXE_FUNCTION;
+MEASURE_BOOT_VAR_FUNC_PTR *MeasureAllBootVariablesFuncPtr = MEASURES_BOOT_VARIABLES_DXE_FUNCTION;
+
+#if (defined(TCGMeasureSecureBootVariables) && (TCGMeasureSecureBootVariables != 0))
+extern MEASURE_SECURE_BOOT_FUNC_PTR MEASURE_SECURE_BOOT_DXE_FUNCTION;
+MEASURE_SECURE_BOOT_FUNC_PTR *MeasureSecurebootVariablesFuncPtr = MEASURE_SECURE_BOOT_DXE_FUNCTION;
+#endif
+
+extern MEASURES_TCG_BOOT_SEPARATORS_DXE_FUNC_PTR MEASURES_TCG_BOOT_SEPARATORS_DXE_FUNCTION;
+MEASURES_TCG_BOOT_SEPARATORS_DXE_FUNC_PTR *MeasureSeparatorsFuncPtr = MEASURES_TCG_BOOT_SEPARATORS_DXE_FUNCTION;
+
+extern MEASURE_WAKE_EVENT_DXE_FUNC_PTR MEASURE_WAKE_EVENT_DXE_FUNCTION;
+MEASURE_WAKE_EVENT_DXE_FUNC_PTR *MeasureWakeEventFuncPtr = MEASURE_WAKE_EVENT_DXE_FUNCTION;
+
+extern SKIP_PHYSICAL_PRESENCE_LOCK_PTR SKIP_PHYSICAL_PRESENCE_LOCK_FUNCTION;
+SKIP_PHYSICAL_PRESENCE_LOCK_PTR *DummySkipPhysicalPresencePtr = SKIP_PHYSICAL_PRESENCE_LOCK_FUNCTION;
+
+
+static TCG_PROTOCOL_NOTIFY Ctx;
+static void *SearchKey;
+typedef UINT32 extended_request;
+AMI_POST_MANAGER_PROTOCOL *pAmiPostMgr = NULL;
+EFI_GUID gAmiPostManagerProtocolGuid = \
+ AMI_POST_MANAGER_PROTOCOL_GUID;
+EFI_HII_HANDLE gHiiHandle;
+EFI_EVENT PciIoev;
+
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+#else
+EFI_HII_PROTOCOL *Hii;
+#endif
+
+static UINT8 ppi_request;
+static EFI_HANDLE gAmiTcgPlatformImageHandle;
+static EFI_EVENT ReadyToBootEvent;
+
+#if TPM_PASSWORD_AUTHENTICATION
+BOOLEAN AuthenticateSet;
+BOOLEAN AdminPasswordValid;
+BOOLEAN PasswordSupplied;
+
+VOID SignalProtocolEvent(IN EFI_GUID *TcgPasswordAuthenticationGuid);
+
+#endif
+
+EFI_GUID gAMITcgPlatformProtocolguid = AMI_TCG_PLATFORM_PROTOCOL_GUID;
+#if (defined(TCGMeasureSecureBootVariables) && (TCGMeasureSecureBootVariables != 0))
+EFI_GUID gEfiImageSecurityDatabaseguid = EFI_IMAGE_SECURITY_DATABASE_GUID;
+#endif
+EFI_GUID gTpmDeviceProtocolGuid = EFI_TPM_DEVICE_PROTOCOL_GUID;
+EFI_GUID gEfiTpmDxeDeviceProtocolGuid = EFI_TPM_DEVICE_PROTOCOL_GUID;
+
+#if (defined(SMBIOS_SUPPORT) && (SMBIOS_SUPPORT == 1))
+EFI_GUID gSmBiosTablePublished = TCG_SMBIOS_EFI_TABLE_GROUP;
+#endif
+
+static BOOLEAN IsRunPpiUIAlreadyDone = FALSE;
+
+void run_PPI_UI(
+ IN EFI_EVENT ev,
+ IN VOID *ctx);
+
+EFI_STATUS TcgSetVariableWithNewAttributes(
+ IN CHAR16 *Name, IN EFI_GUID *Guid, IN UINT32 Attributes,
+ IN UINTN DataSize, IN VOID *Data
+);
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: MeasureVariable
+//
+// Description: Measures a provided variable
+//
+// Input: IN TPM_PCRINDEX PCRIndex,
+// IN TCG_EVENTTYPE EventType,
+// IN CHAR16 *VarName,
+// IN EFI_GUID *VendorGuid,
+// IN VOID *VarData,
+// IN UINTN VarSize
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS MeasureVariable(
+ IN TPM_PCRINDEX PCRIndex,
+ IN TCG_EVENTTYPE EventType,
+ IN CHAR16 *VarName,
+ IN EFI_GUID *VendorGuid,
+ IN VOID *VarData,
+ IN UINTN VarSize )
+{
+ EFI_STATUS Status;
+ EFI_TCG_PROTOCOL *tcgSvc;
+ TCG_PCR_EVENT *TcgEvent = NULL;
+ UINTN VarNameLength;
+ TCG_EFI_VARIABLE_DATA *VarLog;
+ EFI_PHYSICAL_ADDRESS Last;
+ UINT32 evNum;
+
+ Status = pBS->LocateProtocol(
+ &gEfiTcgProtocolGuid,
+ NULL,
+ &tcgSvc );
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ VarNameLength = Wcslen( VarName );
+
+ Status = pBS->AllocatePool( EfiBootServicesData,
+ _TPM_STRUCT_PARTIAL_SIZE( TCG_PCR_EVENT,Event )
+ + (UINT32)(sizeof(*VarLog) + VarNameLength
+ * sizeof(*VarName) + VarSize - 3 ),
+ &TcgEvent );
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ TcgEvent->PCRIndex = PCRIndex;
+ TcgEvent->EventType = EventType;
+ TcgEvent->EventSize = (UINT32)( sizeof (*VarLog) + VarNameLength
+ * sizeof (*VarName) + VarSize - 3 );
+
+ pBS->AllocatePool( EfiBootServicesData, TcgEvent->EventSize, &VarLog );
+
+ if ( VarLog == NULL )
+ {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ VarLog->VariableName = *VendorGuid;
+ VarLog->UnicodeNameLength = VarNameLength;
+ VarLog->VariableDataLength = VarSize;
+
+ pBS->CopyMem(
+ (CHAR16*)(VarLog->UnicodeName),
+ VarName,
+ VarNameLength * sizeof (*VarName)
+ );
+
+ pBS->CopyMem(
+ (CHAR16*)(VarLog->UnicodeName) + VarNameLength,
+ VarData,
+ VarSize);
+
+ pBS->CopyMem( TcgEvent->Event,
+ VarLog,
+ TcgEvent->EventSize );
+
+ Status = tcgSvc->HashLogExtendEvent(
+ tcgSvc,
+ (EFI_PHYSICAL_ADDRESS)VarLog,
+ TcgEvent->EventSize,
+ TCG_ALG_SHA,
+ TcgEvent,
+ &evNum,
+ &Last );
+
+ if ( TcgEvent != NULL )
+ {
+ pBS->FreePool( TcgEvent );
+ }
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ if ( VarLog != NULL )
+ {
+ pBS->FreePool( VarLog );
+ }
+
+ return Status;
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcmMeasureVariable
+//
+// Description: Measures a provided variable
+//
+// Input: IN TPM_PCRINDEX PCRIndex,
+// IN TCG_EVENTTYPE EventType,
+// IN CHAR16 *VarName,
+// IN EFI_GUID *VendorGuid,
+// IN VOID *VarData,
+// IN UINTN VarSize
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS TcmMeasureVariable(
+ IN TPM_PCRINDEX PCRIndex,
+ IN TCG_EVENTTYPE EventType,
+ IN CHAR16 *VarName,
+ IN EFI_GUID *VendorGuid,
+ IN VOID *VarData,
+ IN UINTN VarSize )
+{
+ EFI_STATUS Status;
+ EFI_TCM_PROTOCOL *tcgSvc;
+ TCM_PCR_EVENT *TcgEvent = NULL;
+ UINTN VarNameLength;
+ TCG_EFI_VARIABLE_DATA *VarLog;
+ EFI_PHYSICAL_ADDRESS Last;
+ UINT32 evNum;
+
+ Status = pBS->LocateProtocol(
+ &gEfiTcgProtocolGuid,
+ NULL,
+ &tcgSvc );
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ VarNameLength = Wcslen( VarName );
+
+ Status = pBS->AllocatePool( EfiBootServicesData,
+ _TPM_STRUCT_PARTIAL_SIZE( TCM_PCR_EVENT,Event )
+ + (UINT32)(sizeof(*VarLog) + VarNameLength
+ * sizeof(*VarName) + VarSize - 3 ),
+ &TcgEvent );
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ TcgEvent->PCRIndex = PCRIndex;
+ TcgEvent->EventType = EventType;
+ TcgEvent->EventSize = (UINT32)( sizeof (*VarLog) + VarNameLength
+ * sizeof (*VarName) + VarSize - 3 );
+
+ pBS->AllocatePool( EfiBootServicesData, TcgEvent->EventSize, &VarLog );
+
+ if ( VarLog == NULL )
+ {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ VarLog->VariableName = *VendorGuid;
+ VarLog->UnicodeNameLength = VarNameLength;
+ VarLog->VariableDataLength = VarSize;
+
+ pBS->CopyMem(
+ (CHAR16*)(VarLog->UnicodeName),
+ VarName,
+ VarNameLength * sizeof (*VarName)
+ );
+
+ pBS->CopyMem(
+ (CHAR16*)(VarLog->UnicodeName) + VarNameLength,
+ VarData,
+ VarSize
+ );
+
+ pBS->CopyMem( TcgEvent->Event,
+ VarLog,
+ TcgEvent->EventSize );
+
+ Status = tcgSvc->HashLogExtendEvent(
+ tcgSvc,
+ (EFI_PHYSICAL_ADDRESS)VarLog,
+ TcgEvent->EventSize,
+ TCG_ALG_SHA,
+ TcgEvent,
+ &evNum,
+ &Last );
+
+ if ( TcgEvent != NULL )
+ {
+ pBS->FreePool( TcgEvent );
+ }
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ if ( VarLog != NULL )
+ {
+ pBS->FreePool( VarLog );
+ }
+
+ return Status;
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: confirmUser
+//
+// Description: Wait on key press from ConIn; Accept Esc or F10.
+// Timeout if user doesn't respond
+//
+// INPUT:
+//
+// OUTPUT: UINT8
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+UINT8 confirmUser( )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_INPUT_KEY key;
+ EFI_GUID guid = AMI_OS_PPI_CONFIRMATION_OVERRIDE_GUID;
+ AMI_CONFIRMATION_OVERRIDE_PROTOCOL *ConfirmOverride;
+
+ Status = pBS->LocateProtocol( &guid, NULL, &ConfirmOverride);
+
+ if(!EFI_ERROR(Status)){
+ return(ConfirmOverride->ConfirmUser());
+ }
+
+ if ( pST->ConIn )
+ {
+ while ( TRUE )
+ {
+ Status = pST->ConIn->ReadKeyStroke( pST->ConIn, &key );
+
+ if ( Status == EFI_SUCCESS )
+ {
+ if ( ( ppi_request == TCPA_PPIOP_CLEAR_ENACT || ppi_request ==
+ TCPA_PPIOP_CLEAR || ppi_request == TCPA_PPIOP_SETNOPPICLEAR_FALSE
+ || ppi_request == TCPA_PPIOP_ENABLE_ACTV_CLEAR
+ || ppi_request == TCPA_PPIOP_ENABLE_ACTV_CLEAR_ENABLE_ACTV) )
+ {
+ if ( key.ScanCode == TCG_CLEAR_REQUEST_KEY )
+ {
+ return TRUE;
+ }
+ }
+ else {
+
+ if ( key.ScanCode == TCG_CONFIGURATION_ACCEPT_KEY )
+ {
+ return TRUE;
+ }
+ }
+ if ( key.ScanCode == TCG_CONFIGURATION_IGNORE_KEY )
+ {
+ return FALSE;
+ }
+ }
+ }
+ }
+ return FALSE;
+}
+
+
+EFI_STATUS LogTcgEvent( TCG_PCR_EVENT *TcgEvent,
+ EFI_TCG_PROTOCOL *tcgSvc)
+{
+ UINT32 EventNumber;
+
+ if(tcgSvc == NULL) return EFI_INVALID_PARAMETER;
+
+ return( tcgSvc->LogEvent(tcgSvc,
+ TcgEvent,
+ &EventNumber,
+ 0x01));
+
+}
+
+
+EFI_STATUS ExtendEvent(
+ IN EFI_TCG_PROTOCOL *tcgSvc,
+ IN TPM_PCRINDEX PCRIndex,
+ IN TCG_DIGEST *Digest,
+ OUT TCG_DIGEST *NewPCRValue )
+{
+ struct {
+ TPM_1_2_CMD_HEADER hdr;
+ TPM_PCRINDEX PcrIndex;
+ UINT8 Digest[20];
+ } ExtendCmd;
+
+ UINT8 result[100];
+
+ if(tcgSvc == NULL) return EFI_INVALID_PARAMETER;
+
+ ExtendCmd.hdr.Tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ ExtendCmd.hdr.ParamSize = TPM_H2NL(sizeof(TPM_1_2_CMD_HEADER) + sizeof(TPM_PCRINDEX) + 20);
+ ExtendCmd.hdr.Ordinal = TPM_H2NL( TPM_ORD_Extend );
+ ExtendCmd.PcrIndex = TPM_H2NL( PCRIndex );
+
+ pBS->CopyMem( ExtendCmd.Digest,
+ Digest->digest,
+ 20);
+
+ return (tcgSvc->PassThroughToTpm( tcgSvc,
+ sizeof(TPM_1_2_CMD_HEADER) + sizeof(TPM_PCRINDEX) + 20,
+ (UINT8 *)&ExtendCmd,
+ sizeof (result),
+ (UINT8*)&result));
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: MeasureSeparatorEvent
+//
+// Description: Measure Tcg Event Separator
+//
+// Input: IN TPM_PCRINDEX PCRIndex,
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS MeasureSeparatorEvent(
+ IN TPM_PCRINDEX PCRIndex )
+{
+ TCG_PCR_EVENT *TcgEvent = NULL;
+ static EFI_TCG_PROTOCOL *tcgSvc = NULL;
+ UINT32 evNum;
+ EFI_PHYSICAL_ADDRESS Last;
+ EFI_STATUS Status;
+ static UINT8 SeparatorInfo[36];
+ UINT8 *tempDigest = NULL;
+ UINT64 HashedDataLen = 20;
+#if USE_ZERO_SEPARATOR == 1
+ UINT32 EventData = 0;
+#else
+ UINT32 EventData = -1;
+#endif
+
+ TcgEvent = (TCG_PCR_EVENT *)SeparatorInfo;
+
+ if(tcgSvc == NULL)
+ {
+ Status = pBS->LocateProtocol(
+ &gEfiTcgProtocolGuid,
+ NULL,
+ &tcgSvc );
+
+ TcgEvent->EventType = EV_SEPARATOR;
+ TcgEvent->EventSize = (UINT32)sizeof (EventData);
+
+ pBS->CopyMem( TcgEvent->Event,
+ &EventData,
+ TcgEvent->EventSize);
+ }
+
+ TcgEvent->PCRIndex = PCRIndex;
+
+ //extend hash data
+ Status = tcgSvc->HashLogExtendEvent(tcgSvc,
+ (EFI_PHYSICAL_ADDRESS)&EventData,
+ TcgEvent->EventSize,
+ TCG_ALG_SHA,
+ TcgEvent,
+ &evNum,
+ &Last );
+
+ return Status;
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcmMeasureSeparatorEvent
+//
+// Description: Measure Tcg Event Separator
+//
+// Input: IN TPM_PCRINDEX PCRIndex,
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS TcmMeasureSeparatorEvent(
+ IN TPM_PCRINDEX PCRIndex )
+{
+ TCM_PCR_EVENT *TcgEvent = NULL;
+ EFI_TCM_PROTOCOL *tcgSvc;
+ UINT32 evNum;
+ EFI_PHYSICAL_ADDRESS Last;
+ EFI_STATUS Status;
+#if USE_ZERO_SEPARATOR == 1
+ UINT32 EventData = 0;
+#else
+ UINT32 EventData = -1;
+#endif
+
+ Status = pBS->LocateProtocol(
+ &gEfiTcgProtocolGuid,
+ NULL,
+ &tcgSvc );
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ Status = pBS->AllocatePool( EfiBootServicesData,
+ _TPM_STRUCT_PARTIAL_SIZE( TCM_PCR_EVENT, Event )
+ + sizeof (EventData),
+ &TcgEvent );
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ TcgEvent->PCRIndex = PCRIndex;
+ TcgEvent->EventType = EV_SEPARATOR;
+ TcgEvent->EventSize = (UINT32)sizeof (EventData);
+
+ pBS->CopyMem( TcgEvent->Event,
+ &EventData,
+ sizeof (EventData));
+
+ Status = tcgSvc->HashLogExtendEvent(
+ tcgSvc,
+ (EFI_PHYSICAL_ADDRESS)&EventData,
+ TcgEvent->EventSize,
+ TCG_ALG_SHA,
+ TcgEvent,
+ &evNum,
+ &Last );
+
+ if ( TcgEvent != NULL )
+ {
+ pBS->FreePool( TcgEvent );
+ }
+
+ return Status;
+}
+
+
+
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Name: doCpuMicrocodeTcgEvent
+//
+// Description: Measures EV_CPU_MICROCODE event
+//
+// Input: IN Buffer
+// IN size
+//
+// Output: Device path size
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS doCpuMicrocodeTcgEvent(
+ IN VOID * buffer,
+ IN UINTN size )
+{
+ EFI_STATUS Status;
+ EFI_TCG_PCR_EVENT ev;
+ UINT32 EventNum;
+ EFI_TCG_PROTOCOL *tcg;
+
+
+ Status = pBS->LocateProtocol( &gEfiTcgProtocolGuid, NULL, &tcg );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ ev.Header.PCRIndex = PCRi_HOST_PLATFORM_CONFIG;
+ ev.Header.EventType = EV_CPU_MICROCODE;
+ ev.Header.EventDataSize = sizeof(ev.Event.Mcu);
+ ev.Event.Mcu.MicrocodeEntrypoint = (EFI_PHYSICAL_ADDRESS)( UINTN ) buffer;
+
+ Status = tcg->HashLogExtendEvent(
+ tcg,
+ ev.Event.Mcu.MicrocodeEntrypoint,
+ (UINT64)size,
+ TCG_ALG_SHA,
+ (TCG_PCR_EVENT*)&ev,
+ &EventNum,
+ 0
+ );
+ return Status;
+}
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Name: doTcmCpuMicrocodeTcgEvent
+//
+// Description: Measures EV_CPU_MICROCODE event
+//
+// Input: IN Buffer
+// IN size
+//
+// Output: Device path size
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS doTcmCpuMicrocodeTcgEvent(
+ IN VOID * buffer,
+ IN UINTN size )
+{
+ EFI_STATUS Status;
+ EFI_TCM_PCR_EVENT ev;
+ UINT32 EventNum;
+ EFI_TCM_PROTOCOL *tcg;
+
+
+ Status = pBS->LocateProtocol( &gEfiTcgProtocolGuid, NULL, &tcg );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ ev.Header.PCRIndex = PCRi_HOST_PLATFORM_CONFIG;
+ ev.Header.EventType = EV_CPU_MICROCODE;
+ ev.Header.EventDataSize = sizeof(ev.Event.Mcu);
+ ev.Event.Mcu.MicrocodeEntrypoint = (EFI_PHYSICAL_ADDRESS)( UINTN ) buffer;
+
+ Status = tcg->HashLogExtendEvent(
+ tcg,
+ ev.Event.Mcu.MicrocodeEntrypoint,
+ (UINT64)size,
+ TCG_ALG_SHA,
+ (TCM_PCR_EVENT*)&ev,
+ &EventNum,
+ 0
+ );
+ return Status;
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Name: measureCpuMicroCode
+//
+// Description: Locates CPU Microcode update and measures it as a TCG event
+//
+// Input: NONE
+//
+// Output: Device path size
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS MeasureCpuMicroCode( )
+{
+ EFI_STATUS Status;
+ VOID *KeyBuffer = 0;
+ EFI_GUID FileName;
+ EFI_FV_FILE_ATTRIBUTES FileAttr;
+ UINTN FileSize;
+ VOID *FileBuffer;
+ VOID *FileBufS;
+ UINT32 AuthStat;
+ EFI_HANDLE *Handles;
+ UINTN NumHandles;
+ EFI_FIRMWARE_VOLUME_PROTOCOL *FwVol;
+ EFI_FIRMWARE_VOLUME_HEADER *FvHdr;
+ BOOLEAN Nested = TRUE;
+ UINT8 *FvPtr;
+ UINT8 *EndOfFv;
+ UINT32 MicrocodeFfsSize;
+ UINT8 *EndOfMicrocode;
+ UINT8 *gStartOfMicrocode = 0;
+ UINT32 gMicrocodeFlashSize = 0;
+ EFI_FV_FILETYPE FileType;
+ AMI_TCG_DXE_FUNCTION_OVERRIDE_PROTOCOL *POverride;
+ EFI_GUID Overrideguid =\
+ AMI_MEASURE_CPU_MICROCODE_GUID;
+
+ Status = pBS->LocateProtocol(
+ &Overrideguid,
+ NULL,
+ &POverride );
+
+ if(!EFI_ERROR(Status)){
+ return (POverride->Function());
+ }
+
+ Status = pBS->LocateHandleBuffer(
+ ByProtocol,
+ &gEfiFirmwareVolumeProtocolGuid,
+ NULL,
+ &NumHandles,
+ &Handles
+ );
+ ASSERT( !EFI_ERROR( Status ));
+
+ for (; NumHandles > 0; NumHandles-- )
+ {
+ Status = pBS->HandleProtocol(
+ Handles[NumHandles - 1],
+ &gEfiFirmwareVolumeProtocolGuid,
+ &FwVol
+ );
+
+ if ( EFI_ERROR( Status ))
+ {
+ break;
+ }
+
+ Status = pBS->AllocatePool( EfiBootServicesData,
+ FwVol->KeySize,
+ &KeyBuffer );
+
+ if ( KeyBuffer == NULL )
+ {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ pBS->SetMem( KeyBuffer, FwVol->KeySize, 0 );
+
+ do
+ {
+ FileType = EFI_FV_FILETYPE_RAW;
+ Status = FwVol->GetNextFile(
+ FwVol,
+ KeyBuffer,
+ &FileType,
+ &FileName,
+ &FileAttr,
+ &FileSize );
+
+ if ( !EFI_ERROR( Status )
+ && MemCmp( &FileName, &gMicrocodeGuid,
+ sizeof(gMicrocodeGuid)) == 0 )
+ {
+ Nested = FALSE;
+ FileBuffer = NULL;
+ Status = FwVol->ReadFile(
+ FwVol,
+ &FileName,
+ &FileBuffer,
+ &FileSize,
+ &FileType,
+ &FileAttr,
+ &AuthStat
+ );
+ ASSERT( !EFI_ERROR( Status ));
+
+ TRACE((TRACE_ALWAYS, "CPU Microcode found: %x size %x\n",
+ FileBuffer, FileSize));
+
+ if(AutoSupportType()){
+ Status = doTcmCpuMicrocodeTcgEvent( FileBuffer, FileSize );
+ }else{
+ Status = doCpuMicrocodeTcgEvent( FileBuffer, FileSize );
+ }
+
+ TRACE((TRACE_ALWAYS, "\tMeasured: %x\n", Status));
+ pBS->FreePool( FileBuffer );
+ goto Exit;
+ }
+ } while ( !EFI_ERROR( Status ));
+ }
+Exit:
+
+ if ( Nested == TRUE )
+ {
+ //if error it could be a nested firmware volume so check
+ //for volume within volume
+ FvHdr = (EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)FV_MAIN_BASE;
+
+ FvPtr = (UINT8*)FvHdr + FvHdr->HeaderLength;
+ EndOfFv = (UINT8*)FvHdr + FvHdr->FvLength;
+
+ while ( FvPtr < EndOfFv && *FvPtr != -1 )
+ {
+ if ( guidcmp( &gMicrocodeGuid,
+ &((EFI_FFS_FILE_HEADER*)FvPtr)->Name ) == 0 )
+ {
+ goto FOUND_MICROCODE_FILE;
+ }
+
+ FvPtr += *(UINT32*)&((EFI_FFS_FILE_HEADER*)FvPtr)->Size & 0xffffff;
+ FvPtr = (UINT8*)(((UINTN)FvPtr + 7) & ~7); //8 byte alignment
+
+ if( (*(UINT32*)&((EFI_FFS_FILE_HEADER*)FvPtr)->Size & 0xffffff) == 0xffffff )
+ break;
+
+ }
+ return EFI_NOT_FOUND;
+
+FOUND_MICROCODE_FILE:
+
+ gStartOfMicrocode = FvPtr + sizeof(EFI_FFS_FILE_HEADER);
+
+ MicrocodeFfsSize
+ = ((*(UINT32*)((EFI_FFS_FILE_HEADER*)FvPtr)->Size) & 0xffffff);
+
+ gMicrocodeFlashSize = MicrocodeFfsSize - sizeof(EFI_FFS_FILE_HEADER);
+ EndOfMicrocode = gStartOfMicrocode + gMicrocodeFlashSize;
+
+ FileBufS = (void*)gStartOfMicrocode;
+
+ if(AutoSupportType()){
+ Status = doTcmCpuMicrocodeTcgEvent( FileBufS, gMicrocodeFlashSize );
+ }else{
+ Status = doCpuMicrocodeTcgEvent( FileBufS, gMicrocodeFlashSize );
+ }
+
+ TRACE((TRACE_ALWAYS, "\tMeasured: %x\n", Status));
+ }
+ pBS->FreePool( Handles );
+
+ if ( KeyBuffer )
+ {
+ pBS->FreePool( KeyBuffer );
+ }
+ return Status;
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: SendTpmCommand
+//
+// Description: Sends a command to the TPM
+//
+// Input: IN EFI_TCG_PROTOCOL *tcg,
+// IN UINT32 ord,
+// IN int dataSize,
+// IN OUT VOID *data
+//
+// Output: TPM_RESULT
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************s
+TPM_RESULT SendTpmCommand(
+ IN EFI_TCG_PROTOCOL *tcg,
+ IN UINT32 ord,
+ IN int dataSize,
+ IN OUT void * data )
+{
+ EFI_STATUS Status;
+ static UINT8 result[0x400];
+ TPM_1_2_RET_HEADER * tpmResult;
+
+ struct
+ {
+ TPM_1_2_CMD_HEADER hdr;
+ UINT8 data[0x100];
+ } cmd;
+
+ cmd.hdr.Tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ cmd.hdr.ParamSize = TPM_H2NL( sizeof (TPM_1_2_RET_HEADER) + dataSize );
+ cmd.hdr.Ordinal = TPM_H2NL( ord );
+
+ MemCpy( cmd.data, data, dataSize );
+
+ Status = tcg->PassThroughToTpm( tcg,
+ sizeof (TPM_1_2_CMD_HEADER) + dataSize,
+ (UINT8*)&cmd,
+ sizeof (result),
+ (UINT8*)&result );
+
+ tpmResult = (TPM_1_2_RET_HEADER*)result;
+
+ TRACE((TRACE_ALWAYS, "\tpmResult->RetCode: %x\n", TPM_H2NL(tpmResult->RetCode)));
+
+ return tpmResult->RetCode;
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: DoResetNow
+//
+// Description: Callback function to execute TPM reset
+//
+// Input: IN EFI_EVENT ev,
+// IN VOID *ctx
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS DoResetNow(
+ IN EFI_EVENT ev,
+ IN VOID *ctx )
+{
+ EFI_RESET_TYPE resetType = *(EFI_RESET_TYPE*)ctx;
+
+ TRACE((TRACE_ALWAYS, "TCG: DoResetNow resets the system: type(%d)\n",
+ resetType));
+
+ TRACE((TRACE_ALWAYS, "TCG: DoResetNow resets the system: type(%x)\n",
+ (EFI_RESET_TYPE*)ctx));
+
+ pRS->ResetSystem( resetType, 0, 0, NULL );
+ TRACE((TRACE_ALWAYS, "\tError: Reset failed???\n"));
+ return EFI_SUCCESS;
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: GET_PFA
+//
+// Description: Returns PCI device Bus Device Function infomation
+//
+//
+// Input: EFI_PCI_IO_PROTOCOL *pciIo
+//
+// Output: UINT16
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+UINT16 GET_PFA(
+ IN EFI_PCI_IO_PROTOCOL *pciIo )
+{
+ UINTN seg;
+ UINTN bus;
+ UINTN dev;
+ UINTN func;
+ EFI_STATUS Status;
+
+ Status = pciIo->GetLocation( pciIo, &seg, &bus, &dev, &func );
+ ASSERT( !EFI_ERROR( Status ));
+
+ if ( EFI_ERROR( Status ))
+ {
+ return 0;
+ }
+ ASSERT( func < 8 );
+ ASSERT( dev < 32 );
+ ASSERT( bus < 256 );
+ return (UINT16)((bus << 8) | (dev << 3) | func );
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: ClearFastBootLastBootFailedFlag
+//
+// Description: FastBoot clear boot fail flag callback
+//
+// Input:
+// IN EFI_EVENT Event - Callback event
+// IN VOID *Context - pointer to calling context
+//
+// Output: None
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID ClearFastBootLastBootFailedFlag()
+{
+ EFI_STATUS Status;
+ UINT32 LastBootFailed;
+ UINTN Size = sizeof(UINT32);
+ EFI_GUID FastBootVariableGuid = FAST_BOOT_VARIABLE_GUID;
+
+
+ Status = pRS->GetVariable(L"LastBootFailed", &FastBootVariableGuid, NULL, &Size, &LastBootFailed);
+ if(!EFI_ERROR(Status)) {
+ Status = pRS->SetVariable(L"LastBootFailed",
+ &FastBootVariableGuid,
+ EFI_VARIABLE_NON_VOLATILE,
+ 0,
+ &LastBootFailed);
+ }
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: RequestSystemReset
+//
+// Description: Requests for system reset through core else creates a call
+// back to execute reset
+//
+// Input: IN EFI_RESET_TYPE type
+//
+// Output: VOID
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+void RequestSystemReset(
+ IN EFI_RESET_TYPE type )
+{
+ EFI_STATUS Status;
+ static EFI_EVENT ev;
+ static void * reg;
+ static EFI_RESET_TYPE ptype;
+
+ ptype = type;
+
+ TRACE((TRACE_ALWAYS, "TCG: Resets the system: type(%d)\n", type));
+ TRACE((TRACE_ALWAYS, "TCG: Resets the system: typeaddress(%x)\n",
+ &type));
+
+ ClearFastBootLastBootFailedFlag();
+
+ pRS->ResetSystem( type, 0, 0, NULL );
+ TRACE((TRACE_ALWAYS, "\tError: Reset failed???\n"));
+
+ Status = pBS->CreateEvent( EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK, DoResetNow, (void*)&ptype, &ev);
+ ASSERT( !EFI_ERROR( Status ));
+ Status = pBS->RegisterProtocolNotify(&gEfiResetArchProtocolGuid, ev, &reg);
+ TRACE((TRACE_ALWAYS,
+ "\tRegister DoResetNow after Reset Architecture driver\n"));
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: read_TPM_capabilities
+//
+// Description: Executes TPM operation to read capabilities
+//
+// Input: IN EFI_TCG_PROTOCOL* tcg
+//
+// Output: TPM capabilities structure
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+TPM_Capabilities_PermanentFlag read_TPM_capabilities(
+ IN EFI_TCG_PROTOCOL* tcg )
+{
+ TPM_Capabilities_PermanentFlag * cap;
+ EFI_STATUS Status;
+ TPM_GetCapabilities_Input cmdGetCap;
+ TPM_RQU_COMMAND_HDR NuvotoncmdGetTpmStatus;
+ TPM_Capabilities_PermanentFlag NuvotonCap;
+ static UINT8 result[0x100];
+
+ if(*(UINT16 *)(UINTN)(PORT_TPM_IOMEMBASE + 0xF00) != 0x1050)
+ {
+ cmdGetCap.Tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ cmdGetCap.ParamSize = TPM_H2NL( sizeof (cmdGetCap));
+
+ if(AutoSupportType()){
+ cmdGetCap.CommandCode = TPM_H2NL( TCM_ORD_GetCapability );
+ cmdGetCap.CommandCode = TPM_H2NL( TCM_ORD_GetCapability );
+ cmdGetCap.caparea = TPM_H2NL( TPM_CAP_FLAG );
+ }else{
+ cmdGetCap.CommandCode = TPM_H2NL( TPM_ORD_GetCapability );
+ cmdGetCap.CommandCode = TPM_H2NL( TPM_ORD_GetCapability );
+ cmdGetCap.caparea = TPM_H2NL( TPM_CAP_FLAG );
+ }
+
+ cmdGetCap.subCapSize = TPM_H2NL( 4 ); // subCap is always 32bit long
+ cmdGetCap.subCap = TPM_H2NL( TPM_CAP_FLAG_PERMANENT );
+
+ Status = tcg->PassThroughToTpm( tcg,
+ sizeof (cmdGetCap),
+ (UINT8*)&cmdGetCap,
+ sizeof (result),
+ result );
+
+ cap = (TPM_Capabilities_PermanentFlag*)result;
+
+ TRACE((TRACE_ALWAYS,
+ "GetCapability: %r; size: %x; retCode:%x; tag:%x; bytes %08x\n", Status,
+ TPM_H2NL(cap->ParamSize ), TPM_H2NL(cap->RetCode ),
+ (UINT32) TPM_H2NS(cap->tag ), TPM_H2NL( *(UINT32*)&cap->disabled )));
+
+ return *cap;
+ }else{
+
+ MemSet(&NuvotonCap,sizeof(TPM_Capabilities_PermanentFlag), 0);
+
+ NuvotoncmdGetTpmStatus.tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ NuvotoncmdGetTpmStatus.paramSize = TPM_H2NL( sizeof (TPM_RQU_COMMAND_HDR));
+ NuvotoncmdGetTpmStatus.ordinal = TPM_H2NL( NTC_ORD_GET_TPM_STATUS );
+
+ Status = tcg->PassThroughToTpm( tcg,
+ sizeof (NuvotoncmdGetTpmStatus),
+ (UINT8*)&NuvotoncmdGetTpmStatus,
+ sizeof (result),
+ result );
+
+ if(((NUVOTON_SPECIFIC_FLAGS *)result)->RetCode == 0)
+ {
+ if(((NUVOTON_SPECIFIC_FLAGS *)result)->isdisabled){
+ NuvotonCap.disabled = 1;
+ }
+
+ if(((NUVOTON_SPECIFIC_FLAGS *)result)->isdeactivated){
+ NuvotonCap.deactivated = 1;
+ }
+
+ if(((NUVOTON_SPECIFIC_FLAGS *)result)->isOwnerSet){
+ NuvotonCap.ownership = 1;
+ }
+ }else{
+
+ NuvotonCap.RetCode = ((NUVOTON_SPECIFIC_FLAGS *)result)->RetCode;
+ }
+
+ return NuvotonCap;
+ }
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: read_volatile_flags
+//
+// Description: Executes TPM operation to read capabilities
+//
+// Input: IN EFI_TCG_PROTOCOL* tcg
+//
+// Output: TPM capabilities structure
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+TPM_VOLATILE_FLAGS read_volatile_flags(
+ IN EFI_TCG_PROTOCOL* tcg )
+{
+ TPM_VOLATILE_FLAGS *cap;
+ EFI_STATUS Status;
+ TPM_GetCapabilities_Input cmdGetCap;
+ static UINT8 result[0x100];
+
+ cmdGetCap.Tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ cmdGetCap.ParamSize = TPM_H2NL( sizeof (cmdGetCap));
+ cmdGetCap.CommandCode = TPM_H2NL( TPM_ORD_GetCapability );
+ cmdGetCap.caparea = TPM_H2NL( TPM_CAP_FLAG );
+
+
+ cmdGetCap.subCapSize = TPM_H2NL( 4 ); // subCap is always 32bit long
+ cmdGetCap.subCap = TPM_H2NL( TPM_CAP_FLAG_VOLATILE );
+
+ Status = tcg->PassThroughToTpm( tcg,
+ sizeof (cmdGetCap),
+ (UINT8*)&cmdGetCap,
+ sizeof (result),
+ result );
+
+ cap = (TPM_VOLATILE_FLAGS *)result;
+
+ return *cap;
+}
+
+
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: CheckTpmOwnership
+//
+// Description: Executes TPM operation to read capabilities
+//
+// Input: IN EFI_TCG_PROTOCOL *tcg
+//
+// Output: void
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+UINT8 CheckTpmOwnership(
+ IN EFI_TCG_PROTOCOL *tcg )
+{
+ EFI_STATUS Status;
+ TPM_GetCapabilities_Input cmdGetCap;
+ static UINT8 Ownership_Result[0x200];
+ UINT8 TPM_Ownership;
+ TPM_RQU_COMMAND_HDR NuvotoncmdGetTpmStatus;
+
+ if(*(UINT16 *)(UINTN)(PORT_TPM_IOMEMBASE + 0xF00) != 0x1050)
+ {
+ cmdGetCap.Tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ cmdGetCap.ParamSize = TPM_H2NL( sizeof (cmdGetCap));
+
+ if(AutoSupportType()){
+ cmdGetCap.CommandCode = TPM_H2NL( TCM_ORD_GetCapability );
+ }else{
+ cmdGetCap.CommandCode = TPM_H2NL( TPM_ORD_GetCapability );
+ }
+
+ cmdGetCap.caparea = TPM_H2NL( TPM_CAP_PROPERTY );
+ cmdGetCap.subCapSize = TPM_H2NL( 4 ); // subCap is always 32bit long
+ cmdGetCap.subCap = TPM_H2NL( TPM_CAP_PROP_OWNER );
+ Status = tcg->PassThroughToTpm( tcg,
+ sizeof (cmdGetCap),
+ (UINT8*)&cmdGetCap,
+ sizeof (Ownership_Result),
+ Ownership_Result );
+
+ TPM_Ownership = (UINT8 )Ownership_Result[0x0E];
+ return TPM_Ownership;
+ }else{
+
+ NuvotoncmdGetTpmStatus.tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ NuvotoncmdGetTpmStatus.paramSize = TPM_H2NL( sizeof (TPM_RQU_COMMAND_HDR));
+ NuvotoncmdGetTpmStatus.ordinal = TPM_H2NL( NTC_ORD_GET_TPM_STATUS );
+
+ Status = tcg->PassThroughToTpm( tcg,
+ sizeof (NuvotoncmdGetTpmStatus),
+ (UINT8*)&NuvotoncmdGetTpmStatus,
+ sizeof (Ownership_Result),
+ Ownership_Result );
+
+ if(((NUVOTON_SPECIFIC_FLAGS *)Ownership_Result)->RetCode == 0)
+ {
+ return ((NUVOTON_SPECIFIC_FLAGS *)Ownership_Result)->isOwnerSet;
+ }else{
+ return 0;
+ }
+ }
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: EfiLibGetSystemConfigurationTable
+//
+// Description: Get table from configuration table by name
+//
+// Input: IN EFI_GUID *TableGuid,
+// IN OUT VOID **Table
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS EfiLibGetSystemConfigurationTable(
+ IN EFI_GUID *TableGuid,
+ IN OUT VOID **Table )
+{
+ UINTN Index;
+
+ *Table = NULL;
+
+ for ( Index = 0; Index < pST->NumberOfTableEntries; Index++ )
+ {
+ if ( !MemCmp( TableGuid, &(pST->ConfigurationTable[Index].VendorGuid),
+ sizeof(EFI_GUID)))
+ {
+ *Table = pST->ConfigurationTable[Index].VendorTable;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: MeasureHandoffTables
+//
+// Description: Measures, Logs and Extends EFI Handoff Tables. eg: SMBIOS
+//
+// Input: VOID
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS MeasureHandoffTables()
+{
+ EFI_STATUS Status;
+ EFI_TCG_PROTOCOL *tcgSvc;
+ TCG_PCR_EVENT *ev = NULL;
+ UINT32 evNum;
+#if ( defined(Measure_Smbios_Tables) && (Measure_Smbios_Tables!= 0) )
+#if SMBIOS_SUPPORT == 1
+ TCG_EFI_HANDOFF_TABLE_POINTERS HandoffTables;
+ SMBIOS_TABLE_ENTRY_POINT *SmbiosTable;
+#endif
+#endif
+ TCG_EFI_HANDOFF_TABLE_POINTERS AcpiHandoffTables;
+ EFI_PHYSICAL_ADDRESS Last;
+ mem_in dsdt;
+ ACPI_HDR *hdr1;
+
+#if defined AmiBoardInfo_SUPPORT && AmiBoardInfo_SUPPORT == 1
+ EFI_GUID gAmiBoardInfoGuid = AMI_BOARD_INFO_PROTOCOL_GUID;
+ AMI_BOARD_INFO_PROTOCOL *gAmiBoardInfoProtocol=NULL;
+#endif
+
+
+ Status = pBS->LocateProtocol( &gEfiTcgProtocolGuid,
+ NULL,
+ &tcgSvc );
+ ASSERT( !EFI_ERROR( Status ));
+
+ //Measuring ACPI hand off table
+ //first measure static DSDT in firmware volume
+#if !defined(AmiBoardInfo_SUPPORT)||(AmiBoardInfo_SUPPORT==0)
+ GetDsdt( &dsdt );
+#else
+ Status = pBS->LocateProtocol(&gAmiBoardInfoGuid, NULL,(VOID**)&gAmiBoardInfoProtocol);
+ if (EFI_ERROR(Status))
+ {
+ gAmiBoardInfoProtocol = NULL;
+ TRACE((-1, "ACPI: Can't find AMI Board Info Protocol %r EXITING!",Status));
+ dsdt.address = 0;
+ dsdt.datat = 3;
+ dsdt.size = 0;
+ }else{
+
+ dsdt.address = (EFI_PHYSICAL_ADDRESS)gAmiBoardInfoProtocol->BoardAcpiInfo;
+ dsdt.datat = 2;
+ dsdt.size = ((ACPI_HDR*)gAmiBoardInfoProtocol->BoardAcpiInfo)->Length;
+ }
+#endif
+
+
+ //if found it we can now measure
+ if ( dsdt.datat == 2 )
+ {
+ Status = pBS->AllocatePool( EfiBootServicesData,
+ _TPM_STRUCT_PARTIAL_SIZE( TCG_PCR_EVENT, Event)
+ + sizeof (AcpiHandoffTables), &ev );
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ ev->PCRIndex = PCRi_HOST_PLATFORM_CONFIG;
+ ev->EventType = EV_EFI_HANDOFF_TABLES;
+ ev->EventSize = sizeof (AcpiHandoffTables);
+
+ AcpiHandoffTables.NumberOfTables = 1;
+ AcpiHandoffTables.TableEntry[0].VendorGuid = gDsdtGuidDxe;
+ hdr1 = (ACPI_HDR*)dsdt.address;
+ AcpiHandoffTables.TableEntry[0].VendorTable = (VOID*)hdr1;
+
+ pBS->CopyMem( ev->Event,
+ &AcpiHandoffTables,
+ sizeof (AcpiHandoffTables));
+
+ Status = tcgSvc->HashLogExtendEvent(
+ tcgSvc,
+ (EFI_PHYSICAL_ADDRESS)hdr1,
+ hdr1->Length,
+ TCG_ALG_SHA,
+ ev,
+ &evNum,
+ &Last );
+ }
+
+#if ( defined(Measure_Smbios_Tables) && (Measure_Smbios_Tables!= 0) )
+#if SMBIOS_SUPPORT == 1
+ Status = EfiLibGetSystemConfigurationTable(
+ &gEfiSmbiosTableGuid,
+ &SmbiosTable
+ );
+#endif
+
+
+#if SMBIOS_SUPPORT == 1
+
+ if ( !EFI_ERROR( Status ))
+ {
+ Status = pBS->AllocatePool( EfiBootServicesData,
+ _TPM_STRUCT_PARTIAL_SIZE( TCG_PCR_EVENT, Event )
+ + sizeof (HandoffTables), &ev );
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ ev->PCRIndex = PCRi_HOST_PLATFORM_CONFIG;
+ ev->EventType = EV_EFI_HANDOFF_TABLES;
+ ev->EventSize = sizeof (HandoffTables);
+
+ HandoffTables.NumberOfTables = 1;
+ HandoffTables.TableEntry[0].VendorGuid = gEfiSmbiosTableGuid;
+ HandoffTables.TableEntry[0].VendorTable = SmbiosTable;
+
+ pBS->CopyMem( ev->Event,
+ &HandoffTables,
+ sizeof (HandoffTables));
+
+ Status = tcgSvc->HashLogExtendEvent(
+ tcgSvc,
+ (EFI_PHYSICAL_ADDRESS)SmbiosTable->TableAddress,
+ SmbiosTable->TableLength,
+ TCG_ALG_SHA,
+ ev,
+ &evNum,
+ &Last );
+ }
+#endif
+#endif
+
+ if ( ev != NULL )
+ {
+ pBS->FreePool( ev );
+ }
+
+ return Status;
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcmMeasureHandoffTables
+//
+// Description: Measures, Logs and Extends EFI Handoff Tables. eg: SMBIOS
+//
+// Input: VOID
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS TcmMeasureHandoffTables(
+ VOID )
+{
+ EFI_STATUS Status;
+ EFI_TCM_PROTOCOL *tcgSvc;
+
+#if SMBIOS_SUPPORT == 1
+ SMBIOS_TABLE_ENTRY_POINT *SmbiosTable;
+#endif
+ TCM_PCR_EVENT *ev = NULL;
+ UINT32 evNum;
+#if SMBIOS_SUPPORT == 1
+ TCG_EFI_HANDOFF_TABLE_POINTERS HandoffTables;
+#endif
+ TCG_EFI_HANDOFF_TABLE_POINTERS AcpiHandoffTables;
+ EFI_PHYSICAL_ADDRESS Last;
+ mem_in dsdt;
+ ACPI_HDR *hdr1;
+ EFI_GUID DsdtGuid = DSDT_GUID;
+ EFI_GUID SmbiosTableGuid = EFI_SMBIOS_TABLE_GUID;
+
+#if defined AmiBoardInfo_SUPPORT && AmiBoardInfo_SUPPORT == 1
+ EFI_GUID gAmiBoardInfoGuid = AMI_BOARD_INFO_PROTOCOL_GUID;
+ AMI_BOARD_INFO_PROTOCOL *gAmiBoardInfoProtocol=NULL;
+#endif
+
+ Status = pBS->LocateProtocol( &gEfiTcgProtocolGuid,
+ NULL,
+ &tcgSvc );
+ ASSERT( !EFI_ERROR( Status ));
+
+ //Measuring ACPI hand off table
+ //first measure static DSDT in firmware volume
+#if !defined AmiBoardInfo_SUPPORT && AmiBoardInfo_SUPPORT == 0
+ GetDsdt( &dsdt );
+#else
+ Status = pBS->LocateProtocol(&gAmiBoardInfoGuid, NULL,(VOID**)&gAmiBoardInfoProtocol);
+ if (EFI_ERROR(Status))
+ {
+ gAmiBoardInfoProtocol = NULL;
+ TRACE((-1, "ACPI: Can't find AMI Board Info Protocol %r EXITING!",Status));
+ dsdt.address = 0;
+ dsdt.datat = 3;
+ dsdt.size = 0;
+ }else{
+
+ dsdt.address = (EFI_PHYSICAL_ADDRESS)gAmiBoardInfoProtocol->BoardAcpiInfo;
+ dsdt.datat = 2;
+ dsdt.size = ((ACPI_HDR*)gAmiBoardInfoProtocol->BoardAcpiInfo)->Length;
+ }
+#endif
+ //if found it we can now measure
+ if ( dsdt.datat == 2 )
+ {
+ Status = pBS->AllocatePool( EfiBootServicesData,
+ _TPM_STRUCT_PARTIAL_SIZE( TCM_PCR_EVENT, Event)
+ + sizeof (AcpiHandoffTables), &ev );
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ ev->PCRIndex = 1;
+ ev->EventType = EV_EFI_HANDOFF_TABLES;
+ ev->EventSize = sizeof (AcpiHandoffTables);
+
+ AcpiHandoffTables.NumberOfTables = 1;
+ AcpiHandoffTables.TableEntry[0].VendorGuid = DsdtGuid;
+ hdr1 = (ACPI_HDR*)dsdt.address;
+ AcpiHandoffTables.TableEntry[0].VendorTable = (VOID*)hdr1;
+
+ pBS->CopyMem( ev->Event,
+ &AcpiHandoffTables,
+ sizeof (AcpiHandoffTables));
+
+ Status = tcgSvc->HashLogExtendEvent(
+ tcgSvc,
+ (EFI_PHYSICAL_ADDRESS)hdr1,
+ hdr1->Length,
+ TCG_ALG_SHA,
+ ev,
+ &evNum,
+ &Last );
+ }
+
+
+#if (defined(SMBIOS_SUPPORT) && (SMBIOS_SUPPORT == 1))
+ Status = EfiLibGetSystemConfigurationTable(
+ &SmbiosTableGuid,
+ &SmbiosTable
+ );
+#endif
+
+#if (defined(SMBIOS_SUPPORT) && (SMBIOS_SUPPORT == 1))
+
+ if ( !EFI_ERROR( Status ))
+ {
+ Status = pBS->AllocatePool( EfiBootServicesData,
+ _TPM_STRUCT_PARTIAL_SIZE( TCM_PCR_EVENT, Event )
+ + sizeof (HandoffTables), &ev );
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ ev->PCRIndex = PCRi_HOST_PLATFORM_CONFIG;
+ ev->EventType = EV_EFI_HANDOFF_TABLES;
+ ev->EventSize = sizeof (HandoffTables);
+
+ HandoffTables.NumberOfTables = 1;
+ HandoffTables.TableEntry[0].VendorGuid = SmbiosTableGuid;
+ HandoffTables.TableEntry[0].VendorTable = SmbiosTable;
+
+ pBS->CopyMem( ev->Event,
+ &HandoffTables,
+ sizeof (HandoffTables));
+
+ Status = tcgSvc->HashLogExtendEvent(
+ tcgSvc,
+ (EFI_PHYSICAL_ADDRESS)SmbiosTable->TableAddress,
+ SmbiosTable->TableLength,
+ TCG_ALG_SHA,
+ ev,
+ &evNum,
+ &Last );
+ }
+#endif
+
+ if ( ev != NULL )
+ {
+ pBS->FreePool( ev );
+ }
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ return Status;
+}
+
+
+
+
+//----------------------------------------------------------------------------
+// Procedure: TcgMeasureAction
+// Description: Measure a Tcg Action
+// INPUT: String
+// OUTPUT: EFI_STATUS
+//----------------------------------------------------------------------------
+EFI_STATUS
+EFIAPI
+TcgMeasureActionI (
+ IN CHAR8 *String,
+ IN UINT32 PCRIndex
+ )
+{
+
+ TCG_PCR_EVENT *TcgEvent = NULL;
+ EFI_PHYSICAL_ADDRESS Last;
+ EFI_TCG_PROTOCOL *tcgSvc;
+ UINT32 evNum;
+ UINT32 Len;
+ EFI_STATUS Status;
+
+
+ Status = pBS->LocateProtocol (
+ &gEfiTcgProtocolGuid,
+ NULL,
+ &tcgSvc);
+
+ ASSERT(!EFI_ERROR(Status));
+
+ Len = (UINT32)Strlen(String);
+ Status = pBS->AllocatePool (EfiBootServicesData,
+ _TPM_STRUCT_PARTIAL_SIZE (TCG_PCR_EVENT, Event) +
+ Len,
+ &TcgEvent);
+
+ ASSERT(!EFI_ERROR(Status));
+
+ TcgEvent->PCRIndex = PCRIndex;
+ TcgEvent->EventType = EV_EFI_ACTION;
+ TcgEvent->EventSize = Len;
+
+ pBS->CopyMem (TcgEvent->Event,
+ String,
+ Len);
+
+ Status = tcgSvc->HashLogExtendEvent (
+ tcgSvc,
+ (EFI_PHYSICAL_ADDRESS)String,
+ TcgEvent->EventSize,
+ TCG_ALG_SHA,
+ TcgEvent,
+ &evNum,
+ &Last);
+
+ if(TcgEvent!=NULL)
+ {
+ pBS->FreePool (TcgEvent);
+ }
+
+ return Status;
+}
+
+
+
+//----------------------------------------------------------------------------
+// Procedure: TcgMeasureAction
+// Description: Measure a Tcg Action
+// INPUT: String
+// OUTPUT: EFI_STATUS
+//----------------------------------------------------------------------------
+EFI_STATUS
+EFIAPI
+TcmMeasureActionI (
+ IN CHAR8 *String,
+ IN UINT32 PCRIndex
+ )
+{
+
+ TCM_PCR_EVENT *TcgEvent = NULL;
+ EFI_PHYSICAL_ADDRESS Last;
+ EFI_TCM_PROTOCOL *tcgSvc;
+ UINT32 evNum;
+ UINT32 Len;
+ EFI_STATUS Status;
+
+
+ Status = pBS->LocateProtocol (
+ &gEfiTcgProtocolGuid,
+ NULL,
+ &tcgSvc);
+
+ ASSERT(!EFI_ERROR(Status));
+
+ Len = (UINT32)Strlen(String);
+ Status = pBS->AllocatePool (EfiBootServicesData,
+ _TPM_STRUCT_PARTIAL_SIZE (TCM_PCR_EVENT, Event) +
+ Len,
+ &TcgEvent);
+
+ ASSERT(!EFI_ERROR(Status));
+
+ TcgEvent->PCRIndex = PCRIndex;
+ TcgEvent->EventType = EV_EFI_ACTION;
+ TcgEvent->EventSize = Len;
+
+ pBS->CopyMem (TcgEvent->Event,
+ String,
+ Len);
+
+ Status = tcgSvc->HashLogExtendEvent (
+ tcgSvc,
+ (EFI_PHYSICAL_ADDRESS)String,
+ TcgEvent->EventSize,
+ TCG_ALG_SHA,
+ TcgEvent,
+ &evNum,
+ &Last);
+
+ if(TcgEvent!=NULL)
+ {
+ pBS->FreePool (TcgEvent);
+ }
+
+ return Status;
+}
+
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: ReadVariable
+//
+// Description: Reads Boot Variable
+//
+// Input: IN CHAR16 *VarName,
+// IN EFI_GUID *VendorGuid,
+// OUT UINTN *VarSize
+//
+// Output: VOID*
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+VOID* ReadVariable(
+ IN CHAR16 *VarName,
+ IN EFI_GUID *VendorGuid,
+ OUT UINTN *VarSize )
+{
+ EFI_STATUS Status;
+ VOID *VarData;
+
+ *VarSize = 0;
+ Status = pRS->GetVariable(
+ VarName,
+ VendorGuid,
+ NULL,
+ VarSize,
+ NULL
+ );
+
+ if ( Status != EFI_BUFFER_TOO_SMALL )
+ {
+ return NULL;
+ }
+
+
+ pBS->AllocatePool( EfiBootServicesData, *VarSize, &VarData );
+
+ if ( VarData != NULL )
+ {
+ Status = pRS->GetVariable(
+ VarName,
+ VendorGuid,
+ NULL,
+ VarSize,
+ VarData
+ );
+
+ if ( EFI_ERROR( Status ))
+ {
+ pBS->FreePool( VarData );
+ VarData = NULL;
+ *VarSize = 0;
+ }
+ }
+ return VarData;
+}
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: ReadAndMeasureBootVariable
+//
+// Description: Read and Measures Boot Variable
+//
+// Input: IN CHAR16 *VarName,
+// IN EFI_GUID *VendorGuid,
+// OUT UINTN *VarSize
+// OUT VOID **VarData
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS ReadAndMeasureBootVariable(
+ IN CHAR16 *VarName,
+ IN EFI_GUID *VendorGuid,
+ OUT UINTN *VarSize,
+ OUT VOID **VarData )
+{
+ EFI_STATUS Status;
+
+ *VarData = ReadVariable( VarName, VendorGuid, VarSize );
+
+ if ( *VarData == NULL )
+ {
+ return EFI_NOT_FOUND;
+ }
+
+ if(AutoSupportType()){
+ Status = TcmMeasureVariable(
+ PCRi_IPL_CONFIG_AND_DATA,
+ EV_EFI_VARIABLE_BOOT,
+ VarName,
+ VendorGuid,
+ *VarData,
+ *VarSize);
+
+ }else{
+ Status = MeasureVariable(
+ PCRi_IPL_CONFIG_AND_DATA,
+ EV_EFI_VARIABLE_BOOT,
+ VarName,
+ VendorGuid,
+ *VarData,
+ *VarSize);
+ }
+ return Status;
+}
+
+
+#if (defined(TCGMeasureSecureBootVariables) && (TCGMeasureSecureBootVariables != 0))
+
+UINTN
+TcgGetImageExeInfoTableSize (
+ EFI_IMAGE_EXECUTION_INFO_TABLE *ImageExeInfoTable
+)
+{
+ UINTN Index;
+ EFI_IMAGE_EXECUTION_INFO *ImageExeInfoItem;
+ UINTN TotalSize;
+
+ if (ImageExeInfoTable == NULL) {
+ return 0;
+ }
+
+ ImageExeInfoItem = (EFI_IMAGE_EXECUTION_INFO *) ((UINT8 *) ImageExeInfoTable + sizeof (EFI_IMAGE_EXECUTION_INFO_TABLE));
+ TotalSize = sizeof (EFI_IMAGE_EXECUTION_INFO_TABLE);
+ for (Index = 0; Index < ImageExeInfoTable->NumberOfImages; Index++) {
+ TotalSize += ImageExeInfoItem->InfoSize;
+ ImageExeInfoItem = (EFI_IMAGE_EXECUTION_INFO *) ((UINT8 *) ImageExeInfoItem + ImageExeInfoItem->InfoSize);
+ }
+
+ return TotalSize;
+}
+
+
+EFI_STATUS MeasureSecurebootVariables(
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINT8 *VarData = NULL;
+ CHAR16 *SecurityVar[]={
+ L"SecureBoot",
+ L"PK",
+ L"KEK",
+ L"db",
+ L"dbx",
+ L"ImageExecTable"
+ };
+
+ EFI_GUID Varguid;
+ TCG_EVENTTYPE Eventtypes[]={
+ EV_EFI_VARIABLE_DRIVER_CONFIG,
+ EV_EFI_VARIABLE_DRIVER_CONFIG,
+ EV_EFI_VARIABLE_DRIVER_CONFIG,
+ EV_EFI_VARIABLE_DRIVER_CONFIG,
+ EV_EFI_VARIABLE_DRIVER_CONFIG,
+ EV_EFI_EXECUTION_INFO_TABLE
+ };
+
+ UINTN VarSize = 0;
+ UINTN i=0;
+ TCG_PCR_EVENT *TcgEvent = NULL;
+ EFI_TCG_PROTOCOL *tcgSvc;
+#if 0
+ UINT32 evNum;
+ EFI_PHYSICAL_ADDRESS Last;
+ EFI_SIGNATURE_LIST *pList;
+ UINTN Tablesize;
+#endif
+ EFI_IMAGE_EXECUTION_INFO_TABLE *ImageExeInfoTable = NULL;
+ static BOOLEAN Skip = FALSE;
+
+ Status = pBS->LocateProtocol(
+ &gEfiTcgProtocolGuid,
+ NULL,
+ &tcgSvc );
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ for(i=0; i<5; i++)
+ {
+ if(i==3 || i==4)
+ {
+ Varguid = gEfiImageSecurityDatabaseguid;
+ }else{
+ Varguid = TcgEfiGlobalVariableGuid;
+ }
+
+ VarData = ReadVariable( SecurityVar[i], &Varguid, &VarSize );
+
+ if ( VarData == NULL )
+ {
+#if (defined(UnconfiguredSecureBootVariables) && (UnconfiguredSecureBootVariables != 0))
+ VarSize = 0;
+#else
+ continue;
+#endif
+ }
+
+#if (defined(UnconfiguredSecureBootVariables) && (UnconfiguredSecureBootVariables == 0))
+ if( i == 0 && ((UINT8)(*VarData)) == 0) Skip = TRUE;
+ if (Skip == TRUE) continue;
+#endif
+
+ Status = MeasureVariable(PCRi_HOST_PLATFORM_MANUFACTURER_CONTROL,
+ Eventtypes[i],
+ SecurityVar[i],
+ &Varguid,
+ VarData,
+ VarSize);
+ }
+
+#if 0
+ //now measure the efi_image_execution_table
+ ImageExeInfoTable = GetEfiConfigurationTable(pST, &gEfiImageSecurityDatabaseGuid);
+ Tablesize = TcgGetImageExeInfoTableSize(ImageExeInfoTable);
+
+ if(Tablesize!=0)
+ {
+
+ Status = pBS->AllocatePool( EfiBootServicesData,
+ _TPM_STRUCT_PARTIAL_SIZE( TCG_PCR_EVENT, Event )
+ + (sizeof(EFI_IMAGE_EXECUTION_INFO)),
+ &TcgEvent );
+
+ ASSERT( !EFI_ERROR( Status ));
+
+ TcgEvent->PCRIndex = PCRi_IPL_CONFIG_AND_DATA;
+ TcgEvent->EventType = EV_EFI_EXECUTION_INFO_TABLE;
+ TcgEvent->EventSize = (UINT32)(sizeof(EFI_IMAGE_EXECUTION_INFO));
+
+ pBS->CopyMem( TcgEvent->Event,
+ SecurityVar[i],
+ TcgEvent->EventSize);
+
+ Status = tcgSvc->HashLogExtendEvent(tcgSvc,
+ (EFI_PHYSICAL_ADDRESS)ImageExeInfoTable,
+ Tablesize,
+ TCG_ALG_SHA,
+ TcgEvent,
+ &evNum,
+ &Last );
+
+ if ( TcgEvent != NULL )
+ {
+ pBS->FreePool( TcgEvent );
+ }
+ }
+
+#endif
+ return Status;
+}
+
+
+#endif
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: MeasureAllBootVariables
+//
+// Description: Measures all the boot Variables
+//
+// Input:
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS MeasureAllBootVariables(
+ VOID )
+{
+ EFI_STATUS Status;
+ CHAR16 BootVarName[] = L"BootOrder";
+ UINT16 *BootOrder;
+ UINTN BootCount;
+ UINTN Index;
+ VOID *BootVarData = NULL;
+ UINTN Size;
+
+ Status = ReadAndMeasureBootVariable(
+ BootVarName,
+ &TcgEfiGlobalVariableGuid,
+ &BootCount,
+ &BootOrder
+ );
+
+ if ( Status == EFI_NOT_FOUND )
+ {
+ return EFI_SUCCESS;
+ }
+
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ BootCount /= sizeof (*BootOrder);
+
+ for ( Index = 0; Index < BootCount; Index++ )
+ {
+
+#if defined (TSE_CAPITAL_BOOT_OPTION) && (TSE_CAPITAL_BOOT_OPTION == 0)
+ Swprintf_s( BootVarName, sizeof(BootVarName), L"Boot%04x",
+ BootOrder[Index] );
+#else
+ Swprintf_s( BootVarName, sizeof(BootVarName), L"Boot%04X",
+ BootOrder[Index] );
+#endif
+
+ Status = ReadAndMeasureBootVariable(
+ BootVarName,
+ &TcgEfiGlobalVariableGuid,
+ &Size,
+ &BootVarData
+ );
+
+ if ( !EFI_ERROR( Status ))
+ {
+ if ( BootVarData != NULL )
+ {
+ pBS->FreePool( BootVarData );
+ }
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+
+
+
+#if ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: GetPCIOPROMImage
+//
+// Description: Finds Onboard Option ROM Images
+//
+//
+// Input: IN EFI_HANDLE PciHandle,
+// OUT VOID *RomImage,
+// OUT UINTN *Romsize,
+// OUT UINTN *Flags
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS GetPCIOPROMImage(
+ IN EFI_HANDLE PciHandle,
+ OUT VOID *RomImage,
+ OUT UINTN *Romsize,
+ OUT UINTN *Flags )
+{
+ EFI_LEGACY_BIOS_PROTOCOL *LgBP;
+ EFI_STATUS status;
+
+ status = pBS->LocateProtocol(
+ &gEfiLegacyBiosProtocolGuid,
+ NULL,
+ &LgBP );
+
+ if(EFI_ERROR(status))return status;
+
+ status = LgBP->CheckPciRom( LgBP,
+ PciHandle,
+ RomImage,
+ Romsize,
+ Flags );
+ return status;
+}
+#endif
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: MeasurePciOptionRom
+//
+// Description: Measures EV_ID_OPROM_EXECUTE event
+// address (PFA) and with digest of the specified PCI device
+// OpRom image
+//
+//
+// Input: IN VOID *pImage,
+// IN UINTN len,
+// IN UINT16 pfa
+// Output:
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS MeasurePciOptionRom(
+ IN VOID *pImage,
+ IN UINTN len,
+ UINT16 pfa )
+{
+ EFI_STATUS Status=EFI_SUCCESS;
+ EFI_TCG_PROTOCOL *tcgSvc;
+// EFI_TCM_PROTOCOL *tcmSvc;
+ EFI_TCG_PCR_EVENT ev;
+// EFI_TCM_PCR_EVENT TcmEvent;
+ UINT32 evNum;
+ EFI_PHYSICAL_ADDRESS Last;
+ UINT64 digestLen;
+ UINT8 *pDigest;
+
+
+ if(!AutoSupportType())
+ {
+ Status = pBS->LocateProtocol(
+ &gEfiTcgProtocolGuid,
+ NULL,
+ &tcgSvc
+ );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return EFI_SUCCESS;
+ }
+
+ ev.Header.PCRIndex = PCRi_OPROM_CODE;
+ ev.Header.EventType = EV_EVENT_TAG;
+ ev.Event.Tagged.EventID = EV_ID_OPROM_EXECUTE;
+ ev.Event.Tagged.EventSize =
+ sizeof(ev.Event.Tagged.EventData.OptionRomExecute);
+ ev.Header.EventDataSize = _TPM_STRUCT_PARTIAL_SIZE(struct _EFI_TCG_EV_TAG,
+ EventData ) + ev.Event.Tagged.EventSize;
+
+ ev.Event.Tagged.EventData.OptionRomExecute.PFA = pfa;
+ ev.Event.Tagged.EventData.OptionRomExecute.Reserved = 0;
+ digestLen = sizeof (ev.Event.Tagged.EventData.OptionRomExecute.Hash);
+ pDigest = ev.Event.Tagged.EventData.OptionRomExecute.Hash.digest;
+
+ Status = tcgSvc->HashAll(
+ tcgSvc,
+ (UINT8*)pImage,
+ len,
+ TCG_ALG_SHA,
+ &digestLen,
+ &pDigest);
+ if ( EFI_ERROR( Status )){
+ return Status;
+ }
+
+ Status = tcgSvc->HashLogExtendEvent(
+ tcgSvc,
+ (EFI_PHYSICAL_ADDRESS)&ev.Event, ev.Header.EventDataSize,
+ TCG_ALG_SHA,(TCG_PCR_EVENT*)&ev,
+ &evNum,&Last);
+ }else{
+ /*
+ Status = pBS->LocateProtocol (
+ &gEfiTcgProtocolGuid,
+ NULL,
+ &tcmSvc);
+
+ if ( EFI_ERROR( Status ))
+ {
+ return EFI_SUCCESS;
+ }
+
+ TcmEvent.Header.PCRIndex = PCRi_OPROM_CODE;
+ TcmEvent.Header.EventType = EV_EVENT_TAG;
+ TcmEvent.Event.Tagged.EventID = EV_ID_OPROM_EXECUTE;
+ TcmEvent.Event.Tagged.EventSize =
+ sizeof(TcmEvent.Event.Tagged.EventData.OptionRomExecute);
+ TcmEvent.Header.EventDataSize = _TPM_STRUCT_PARTIAL_SIZE(struct _EFI_TCG_EV_TAG,
+ EventData ) + TcmEvent.Event.Tagged.EventSize;
+
+ TcmEvent.Event.Tagged.EventData.OptionRomExecute.PFA = pfa;
+ TcmEvent.Event.Tagged.EventData.OptionRomExecute.Reserved = 0;
+ digestLen = sizeof (TcmEvent.Event.Tagged.EventData.OptionRomExecute.Hash);
+ pDigest = TcmEvent.Event.Tagged.EventData.OptionRomExecute.Hash.digest;
+
+ Status = tcmSvc->HashAll(
+ tcmSvc,
+ (UINT8*)pImage,
+ len,
+ TCG_ALG_SHA,
+ &digestLen,
+ &pDigest);
+ if ( EFI_ERROR( Status )){
+ return Status;
+ }
+
+ Status = tcmSvc->HashLogExtendEvent(
+ tcmSvc,
+ (EFI_PHYSICAL_ADDRESS)&TcmEvent.Event, TcmEvent.Header.EventDataSize,
+ TCG_ALG_SHA,(TCM_PCR_EVENT*)&TcmEvent,
+ &evNum,&Last);*/
+ }
+
+ return Status;
+}
+
+
+
+EFI_STATUS ResetMorVariable()
+{
+ EFI_STATUS Status;
+ EFI_GUID MorGuid = MEMORY_ONLY_RESET_CONTROL_GUID;
+ UINT32 Attribs = EFI_VARIABLE_NON_VOLATILE
+ | EFI_VARIABLE_BOOTSERVICE_ACCESS
+ | EFI_VARIABLE_RUNTIME_ACCESS;
+
+ UINT8 Temp = 0xFE;
+ UINTN TempSize = sizeof (UINT8);
+
+
+
+ Status = pRS->GetVariable(
+ L"MemoryOverwriteRequestControl",
+ &MorGuid,
+ &Attribs,
+ &TempSize,
+ &Temp );
+
+ if ( EFI_ERROR( Status ) || ((Temp & 01)!= 0) )
+ {
+ Temp &= 0xFE;
+ Status = pRS->SetVariable(
+ L"MemoryOverwriteRequestControl",
+ &MorGuid,
+ Attribs,
+ sizeof (UINT8),
+ &Temp );
+ }
+
+ return Status;
+}
+
+
+EFI_STATUS MeasureWakeEvent()
+{
+ UINT8 nWake;
+ EFI_STATUS Status;
+ CHAR8 WakeString[0xD] = "Wake Event ";
+
+ Status = GetTcgWakeEventType( &nWake );
+ if ( EFI_ERROR( Status )){return Status;}
+
+ TRACE((TRACE_ALWAYS, "TCG: GetTcgWakeEventType: Status=%r; WakeType=%x\n",
+ Status, nWake));
+
+ WakeString[0xB] = nWake;
+
+ if(AutoSupportType()){
+ Status = TcmMeasureActionI( WakeString, (UINT32)PCRi_STATE_TRANSITION );
+ if ( EFI_ERROR( Status )){return Status;}
+ }else{
+ Status = TcgMeasureActionI( WakeString, (UINT32)PCRi_STATE_TRANSITION );
+ if ( EFI_ERROR( Status )){return Status;}
+ }
+
+ return Status;
+}
+
+
+
+
+EFI_STATUS MeasureSeparators()
+{
+ TPM_PCRINDEX PcrIndex = 0;
+ EFI_STATUS Status;
+
+ if(AutoSupportType()){
+ for ( PcrIndex = 0; PcrIndex < 8; PcrIndex++ )
+ {
+ Status = TcmMeasureSeparatorEvent( PcrIndex );
+ }
+ }else{
+ for ( PcrIndex = 0; PcrIndex < 8; PcrIndex++ )
+ {
+ Status = MeasureSeparatorEvent( PcrIndex );
+ }
+ }
+ return Status;
+}
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: DummySkipPhysicalPresencePtr
+//
+// Description: Always return false. Can be overridden with OEM function
+//
+// Input: IN EFI_EVENT efiev
+// IN VOID *ctx
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+UINT8 DummySkipPhysicalPresence()
+{
+ return FALSE;
+}
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: tcgReadyToBoot
+//
+// Description: Generic Measurements done before EFI boots OS
+//
+// Input: IN EFI_EVENT efiev
+// IN VOID *ctx
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+void tcgReadyToBoot(
+ IN EFI_EVENT efiev,
+ IN VOID *ctx )
+{
+ static UINTN mBootAttempts = 0;
+
+ EFI_STATUS Status;
+ EFI_TCG_PROTOCOL *tcg;
+ EFI_TPM_DEVICE_PROTOCOL *TpmDevice;
+ BOOLEAN Support = FALSE;
+ UINT16 physical_presence;
+ BOOLEAN SkipPpLock = FALSE;
+#if SET_LIFETIME_PPLOCK == 1
+ TPM_Capabilities_PermanentFlag cap;
+#endif
+#if MANUFACTURING_MODE_SUPPORT
+ BOOLEAN *ResetAllTcgVar = NULL;
+ EFI_GUID TcgManufacturingGuid = AMI_TCG_MANUFACTURING_MODE_HOB_GUID;
+ BOOLEAN *TcgMfgModeVar = NULL;
+ void **DummyPtr;
+#endif
+
+
+
+ PERF_START(0,L"TcgReadyToboot",NULL,0);
+
+ TRACE((TRACE_ALWAYS, "TcgReady to boot entry\n"));
+
+ Status = pBS->LocateProtocol( &gEfiTcgProtocolGuid, NULL, &tcg );
+
+ Support = AutoSupportType();
+
+ Status = pBS->LocateProtocol( &gEfiTpmDxeDeviceProtocolGuid, NULL, &TpmDevice );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return;
+ }
+
+ if ( mBootAttempts == 0 )
+ {
+ ResetMorVariable();
+
+#if defined (WAKE_EVENT_MEASUREMENT) && (WAKE_EVENT_MEASUREMENT != 0)
+ MeasureWakeEventFuncPtr();
+#endif
+ PERF_START(0,L"SelfTest",NULL,0);
+#if defined DONT_SEND_SELFTEST_TILL_READY_TO_BOOT && DONT_SEND_SELFTEST_TILL_READY_TO_BOOT == 1
+ if(*(UINT16 *)(UINTN)(PORT_TPM_IOMEMBASE + 0xF00) == SELF_TEST_VID)
+ {
+ SendTpmCommand( tcg, TPM_ORD_ContinueSelfTest,0, 0);
+ }
+#endif
+ PERF_END(0,L"SelfTest",NULL,0);
+ //
+ // Measure handoff tables
+ //
+ if(!Support){
+ Status = MeasureHandoffTablesFuncPtr( );
+ }
+
+ if(Support){
+ Status = TcmMeasureActionI (
+ "Calling EFI Application from Boot Option",
+ (UINT32)PCRi_IPL_CONFIG_AND_DATA );
+ }else{
+ Status = TcgMeasureActionI (
+ "Calling EFI Application from Boot Option",
+ (UINT32)PCRi_IPL_CONFIG_AND_DATA );
+ }
+
+ if ( EFI_ERROR( Status )){return;}
+ //
+ // Measure BootOrder & Boot#### variables
+ //
+
+#if ( defined(Measure_Boot_Data) && (Measure_Boot_Data!= 0) )
+ Status = MeasureAllBootVariablesFuncPtr( );
+
+
+ if ( EFI_ERROR( Status ))
+ {
+ TRACE((TRACE_ALWAYS, "Boot Variables not Measured. Error!\n"));
+ }
+#endif
+
+#if (defined(TCGMeasureSecureBootVariables) && (TCGMeasureSecureBootVariables != 0))
+ PERF_START(0,L"MeasureSecBoot",NULL,0);
+ Status = MeasureSecurebootVariablesFuncPtr ();
+
+ if ( EFI_ERROR( Status ))
+ {
+ TRACE((TRACE_ALWAYS, "Error Measuring Secure Vars\n"));
+ }
+ PERF_END(0,L"MeasureSecBoot",NULL,0);
+#endif
+
+ //
+ // 4. Measure PE/COFF OS loader, would be done by DxeCore
+ //
+ PERF_START(0,L"OsSeparators",NULL,0);
+ MeasureSeparatorsFuncPtr();
+ PERF_END(0,L"OsSeparators",NULL,0);
+
+ pBS->CloseEvent(PciIoev);
+ }
+ else {
+ //.0
+
+ // 8. Not first attempt, meaning a return from last attempt
+ //
+ if(Support){
+ Status = TcmMeasureActionI (
+ "Returning from EFI Application from Boot Option",
+ (UINT32)PCRi_IPL_CONFIG_AND_DATA );
+ }else{
+ Status = TcgMeasureActionI (
+ "Returning from EFI Application from Boot Option",
+ (UINT32)PCRi_IPL_CONFIG_AND_DATA );
+ }
+ if ( EFI_ERROR( Status )){return;}
+ }
+
+ //
+ // Increase boot attempt counter
+ //
+ if ( mBootAttempts == 0 ) //do this once
+ {
+ #if SET_LIFETIME_PPLOCK == 1
+
+ cap = read_TPM_capabilities( tcg );
+
+ if ( cap.physicalPresenceLifetimeLock == 0)
+ {
+ if(AutoSupportType()){
+ physical_presence = TPM_H2NS(TPM_PHYSICAL_PRESENCE_CMD_ENABLE );
+ if(cap.physicalPresenceCMDEnable == 0 && cap.physicalPresenceHWEnable == 0){
+ SendTpmCommand( tcg, TCM_TSC_ORD_PhysicalPresence,
+ sizeof(physical_presence), &physical_presence );
+
+ }
+ physical_presence = TPM_H2NS( TPM_PHYSICAL_PRESENCE_LIFETIME_LOCK );
+ SendTpmCommand( tcg, TCM_TSC_ORD_PhysicalPresence,
+ sizeof(physical_presence), &physical_presence );
+ }else{
+ physical_presence = TPM_H2NS(TPM_PHYSICAL_PRESENCE_CMD_ENABLE );
+ if(cap.physicalPresenceCMDEnable == 0 && cap.physicalPresenceHWEnable == 0){
+ SendTpmCommand( tcg, TSC_ORD_PhysicalPresence,
+ sizeof(physical_presence), &physical_presence );
+
+ }
+ physical_presence = TPM_H2NS( TPM_PHYSICAL_PRESENCE_LIFETIME_LOCK );
+ SendTpmCommand( tcg, TSC_ORD_PhysicalPresence,
+ sizeof(physical_presence), &physical_presence );
+ }
+
+
+ }
+ #endif
+
+#if MANUFACTURING_MODE_SUPPORT
+ DummyPtr = &TcgMfgModeVar;
+ TcgMfgModeVar = (UINT8*)LocateATcgHob(
+ pST->NumberOfTableEntries,
+ pST->ConfigurationTable,
+ &TcgManufacturingGuid);
+
+ if(*DummyPtr != NULL){
+ if(*TcgMfgModeVar == 1 ) {
+ SkipPpLock = TRUE;
+ }
+ }
+#else
+ SkipPpLock = DummySkipPhysicalPresencePtr();
+#endif
+ if( SkipPpLock == FALSE)
+ {
+ //always lock at the end of boot
+ physical_presence = TPM_H2NS( TPM_PHYSICAL_PRESENCE_LOCK );
+ SendTpmCommand( tcg, TSC_ORD_PhysicalPresence,
+ sizeof(physical_presence), &physical_presence );
+ }
+
+ }
+
+
+ mBootAttempts++;
+ TRACE((TRACE_ALWAYS, "TcgReady to booot exit\n"));
+ PERF_END(0,L"TcgReadyToboot",NULL,0);
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: SetTcgReadyToBoot
+//
+// Description: Sets ready to boot callback on ready to boot for security device
+//
+// Input: NONE
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+EFIAPI SetTcgReadyToBoot()
+{
+ EFI_STATUS Status;
+ AMI_TCG_DXE_FUNCTION_OVERRIDE_PROTOCOL *POverride;
+ EFI_GUID Overrideguid =\
+ AMI_SET_TCG_READYTOBOOT_GUID;
+
+ Status = pBS->LocateProtocol(&Overrideguid,
+ NULL,
+ &POverride );
+
+ if(!EFI_ERROR(Status)){
+ return (POverride->Function());
+ }
+
+ #if defined(EFI_EVENT_SIGNAL_READY_TO_BOOT)\
+ && EFI_SPECIFICATION_VERSION < 0x20000
+
+ Status = gBS->CreateEvent( EFI_EVENT_SIGNAL_READY_TO_BOOT,
+ EFI_TPL_CALLBACK,
+ tcgReadyToBoot, NULL, &ReadyToBootEvent );
+
+ #else
+ #if (defined(SMBIOS_SUPPORT) && (SMBIOS_SUPPORT == 1))
+ #if (defined(SMBIOS_VER_32) && (SMBIOS_VER_32 == 1))
+ Status = pBS->CreateEventEx(
+ EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ tcgReadyToBoot,
+ (VOID *)&gAmiTcgPlatformImageHandle,
+ &gSmBiosTablePublished,
+ &ReadyToBootEvent);
+ #else
+ Status = CreateReadyToBootEvent( EFI_TPL_CALLBACK - 1,
+ tcgReadyToBoot,
+ NULL,
+ &ReadyToBootEvent );
+ #endif
+ #else
+
+ Status = CreateReadyToBootEvent( EFI_TPL_CALLBACK,
+ tcgReadyToBoot,
+ NULL,
+ &ReadyToBootEvent );
+ #endif
+ #endif
+
+ return Status;
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: OnPciIOInstalled
+//
+// Description: Checks if PCI device has an Option Rom and initiates the
+// Option rom measurment
+//
+// Input:
+// IN EFI_EVENT ev
+// IN VOID *ctx
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS OnPciIOInstalled(
+ IN EFI_EVENT ev,
+ IN VOID *ctx )
+{
+ EFI_PCI_IO_PROTOCOL *pciIo;
+ EFI_STATUS Status;
+ VOID * searchKey = ctx;
+ UINTN handlesSize = 0;
+ EFI_HANDLE *handles = 0;
+ UINTN i;
+#if ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+ VOID * EmbImage;
+ UINTN EmbImageSize;
+ UINTN Flags;
+#endif
+ EFI_PCI_EXPANSION_ROM_HEADER *EfiRomHeader;
+ UINTN seg, bus, dev, func;
+
+ TRACE((TRACE_ALWAYS, "OnPciIOInstalled\n"));
+
+ while ( 1 )
+ {
+ Status = pBS->LocateHandleBuffer( ByRegisterNotify,
+ NULL,
+ searchKey,
+ &handlesSize,
+ &handles );
+
+ if ( EFI_ERROR( Status ) || handles == 0 || handlesSize == 0 )
+ {
+ TRACE((TRACE_ALWAYS, "OnPciIOInstalled...exit\n"));
+ return EFI_SUCCESS;
+ }
+
+ for ( i = 0; i != handlesSize; i++ )
+ {
+ Status = pBS->HandleProtocol( handles[i],
+ &gEfiPciIoProtocolGuid,
+ &pciIo );
+ TRACE((TRACE_ALWAYS, "\n\n xtcgdxe::PCIOPROM\n\n"));
+ TRACE((TRACE_ALWAYS, "\tHandle %x; HandleProtocol:%r\n",
+ handles[i], Status));
+
+ if ( EFI_ERROR( Status ))
+ {
+ continue;
+ }
+
+ Status = pciIo->GetLocation( pciIo, &seg, &bus, &dev, &func );
+ TRACE((TRACE_ALWAYS,
+ "\tPCI Device(%r): %x %x %x %x; RomSize:%x; Rom[0-4]=%08x\n",
+ Status, seg, bus, dev, func, pciIo->RomSize,
+ (UINT32)((pciIo->RomImage == 0) ? 0 : *(UINT32*)pciIo->RomImage)));
+
+ EfiRomHeader = (EFI_PCI_EXPANSION_ROM_HEADER*) pciIo->RomImage;
+
+ if ((UINT32)pciIo->RomSize == 0 || pciIo->RomImage == 0
+ || EfiRomHeader->Signature !=
+ PCI_EXPANSION_ROM_HEADER_SIGNATURE )
+ {
+#if ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+ if ((pciIo->RomSize == 0) || (pciIo->RomImage == NULL))
+ {
+ //could be an onboard device
+ EmbImage = 0;
+ Flags = 0;
+ Status = GetPCIOPROMImage( handles[i],
+ &EmbImage,
+ &EmbImageSize,
+ &Flags );
+
+ if ( Flags == 0x02 )
+ {
+ MeasurePciOptionRom( EmbImage, EmbImageSize,
+ GET_PFA( pciIo ));
+ continue;
+ }
+ }
+#endif
+ continue;
+ }
+ MeasurePciOptionRom( pciIo->RomImage,
+ (UINT32)pciIo->RomSize,
+ GET_PFA( pciIo ));
+ }
+ pBS->FreePool( handles );
+ }
+
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: MeasurePCIOproms
+//
+// Description: Sets callback to measure PCI option roms that are given control
+//
+// Input: NONE
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+EFIAPI MeasurePCIOproms()
+{
+ EFI_STATUS Status;
+ AMI_TCG_DXE_FUNCTION_OVERRIDE_PROTOCOL *POverride;
+ EFI_GUID Overrideguid =\
+ AMI_MEASURE_PCIOPROM_GUID;
+
+
+ Status = pBS->LocateProtocol(
+ &Overrideguid,
+ NULL,
+ &POverride );
+
+ if(!EFI_ERROR(Status)){
+ return (POverride->Function());
+ }
+
+ SearchKey = (void*)&Ctx;
+ Status = pBS->CreateEvent( EFI_EVENT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ OnPciIOInstalled,
+ SearchKey,
+ &PciIoev );
+
+ ASSERT( !EFI_ERROR( Status ));
+ Status = pBS->RegisterProtocolNotify( &gEfiPciIoProtocolGuid,
+ PciIoev,
+ &SearchKey );
+
+ Ctx = *(TCG_PROTOCOL_NOTIFY*)SearchKey;
+
+ return EFI_SUCCESS;
+}
+
+
+
+
+EFI_STATUS
+EFIAPI GetProtocolVersion(
+ AMI_TCG_PROTOCOL_VERSION *VerInf)
+{
+ VerInf->MajorVersion = 1;
+ VerInf->MinorVersion = 0;
+ VerInf->Reserve = 0;
+ VerInf->Flag = 0;
+ return EFI_SUCCESS;
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: extend_request
+//
+// Description: Convert the opcode into array of 2-bit values.For each 2-bit: 0 - no change; 1 - turn off; 2 - turn on
+// indexes: 0 - enable flag; 1 - active flag; 2 - onwership
+// 3 - clear
+//
+// INPUT: IN UINT8 rqst
+//
+// OUTPUT: extended_request
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+extended_request extend_request(
+ IN UINT8 rqst )
+{
+
+ if ( rqst )
+ {
+ switch ( rqst )
+ {
+ case TCPA_PPIOP_ENABLE:
+ return PPIXOP_ENABLE;
+ case TCPA_PPIOP_DISABLE:
+ return PPIXOP_DISABLE;
+ case TCPA_PPIOP_ACTIVATE:
+ return PPIXOP_ACTIVATE;
+ case TCPA_PPIOP_DEACTIVATE:
+ return PPIXOP_DEACTIVATE;
+ case TCPA_PPIOP_CLEAR:
+ return PPIXOP_CLEAR;
+ case TCPA_PPIOP_ENABLE_ACTV:
+ return (PPIXOP_ENABLE | PPIXOP_ACTIVATE);
+ case TCPA_PPIOP_DEACT_DSBL:
+ return (PPIXOP_DISABLE | PPIXOP_DEACTIVATE);
+ case TCPA_PPIOP_OWNER_ON:
+ return PPIXOP_OWNER_ON;
+ case TCPA_PPIOP_OWNER_OFF:
+ return PPIXOP_OWNER_OFF;
+ case TCPA_PPIOP_ENACTVOWNER:
+ return (PPIXOP_ENABLE | PPIXOP_ACTIVATE | PPIXOP_OWNER_ON);
+ case TCPA_PPIOP_DADISBLOWNER:
+ return (PPIXOP_DISABLE | PPIXOP_DEACTIVATE | PPIXOP_OWNER_OFF);
+ case TCPA_PPIOP_CLEAR_ENACT:
+ return (PPIXOP_CLEAR| PPIXOP_ENABLE | PPIXOP_ACTIVATE );
+ case TCPA_PPIOP_ENABLE_ACTV_CLEAR:
+ return (PPIXOP_ENABLE | PPIXOP_ACTIVATE | PPIXOP_CLEAR);
+ case TCPA_PPIOP_ENABLE_ACTV_CLEAR_ENABLE_ACTV:
+ return((PPIXOP_ENABLE<<8) |(PPIXOP_ACTIVATE<<8) | PPIXOP_CLEAR | PPIXOP_ENABLE | PPIXOP_ACTIVATE);
+ default:
+ return 0;
+ }
+ }
+ else {
+ return 0;
+ }
+}
+
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: execute_request
+//
+// Description: Execute TPM operation
+//
+// INPUT: IN UINT8 rqst
+//
+// OUTPUT: error code if any as result of executing the operation
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+UINT8 expecting_reset = FALSE;
+TPM_RESULT execute_request(
+ IN UINT8 rqst )
+{
+ extended_request erqst, erqstSave;
+ EFI_STATUS Status;
+ EFI_TCG_PROTOCOL *tcg;
+ EFI_TPM_DEVICE_PROTOCOL *TpmDevice;
+ TPM_RESULT tpmStatus = 0;
+ TPM_Capabilities_PermanentFlag cap;
+ UINT8 zero = 0;
+ UINT8 one = 1;
+ UINT32 Temp = 0;
+ BOOLEAN SupportType = FALSE;
+
+ erqst = extend_request( rqst );
+
+ erqstSave = erqst;
+
+ Status = pBS->LocateProtocol( &gEfiTpmDxeDeviceProtocolGuid,
+ NULL, &TpmDevice );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return TCPA_PPI_BIOSFAIL;
+ }
+
+ Status = pBS->LocateProtocol( &gEfiTcgProtocolGuid, NULL, &tcg );
+
+ if ( EFI_ERROR( Status ))
+ {
+ TRACE((TRACE_ALWAYS, "Error: failed to locate TCG protocol: %r\n"));
+ return TCPA_PPI_BIOSFAIL;
+ }
+
+ if(!AutoSupportType()){
+ TpmDevice->Init( TpmDevice );
+ }else{
+ SupportType = TRUE;
+ }
+
+ cap = read_TPM_capabilities( tcg );
+
+ if(!AutoSupportType())
+ {
+ //use switch case
+ switch( rqst)
+ {
+ case 1:
+ // send tpm command to enable the TPM
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_PhysicalEnable, 0, 0 );
+ break;
+ case 2:
+ //disable TPM
+ tpmStatus = SendTpmCommand( tcg,TPM_ORD_PhysicalDisable, 0, 0 );
+ break;
+ case 3:
+ //Activate TPM
+ tpmStatus = SendTpmCommand( tcg,TPM_ORD_PhysicalSetDeactivated, 1,&zero );
+ break;
+ case 4:
+ //Dectivate TPM
+ tpmStatus = SendTpmCommand( tcg,TPM_ORD_PhysicalSetDeactivated, 1,&one );
+ break;
+ case 5:
+ //force clear
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_ForceClear, 0, 0 );
+ break;
+ case 6:
+ //Enable + Activate
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_PhysicalEnable, 0, 0 );
+ if(!tpmStatus){
+ tpmStatus = SendTpmCommand( tcg,TPM_ORD_PhysicalSetDeactivated, 1,&zero );
+ }
+ break;
+ case 7:
+ //Deactivate + Disable
+ tpmStatus = SendTpmCommand( tcg,TPM_ORD_PhysicalSetDeactivated, 1,&one );
+ if(!tpmStatus){
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_PhysicalDisable, 0, 0 );
+ }
+ break;
+ case 8:
+ //set Owner Install true
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_SetOwnerInstall,1, &one );
+ break;
+ case 9:
+ //set Owner Install False
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_SetOwnerInstall,1, &zero );
+ break;
+ case 10:
+ //Enable + Activate + set Owner Install true
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_PhysicalEnable, 0, 0 );
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg,TPM_ORD_PhysicalSetDeactivated, 1,&zero );
+ }
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_SetOwnerInstall,1, &one );
+ if((TPM_H2NL( tpmStatus ) & TCG_DEACTIVED_ERROR) == TCG_DEACTIVED_ERROR )
+ {
+ Temp = TCPA_PPIOP_OWNER_ON | (rqst << 04);
+ Status = TcgSetVariableWithNewAttributes(L"TcgINTPPI", &TcgEfiGlobalVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (UINT32), &Temp );
+
+ if(!AutoSupportType()){
+ TpmDevice->Close( TpmDevice );
+ }
+ WritePpiResult( rqst, (UINT16)( TPM_H2NL( tpmStatus )));
+ RequestSystemReset( EfiResetCold );
+ }
+ break;
+ case 11:
+ //Setownerfalse + Deactivate + disable
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_SetOwnerInstall,1, &zero );
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg,TPM_ORD_PhysicalSetDeactivated, 1,&one );
+
+ }
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_PhysicalDisable, 0, 0 );
+ }
+ break;
+ case 14:
+ //clear + Enable + Activate
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_ForceClear, 0, 0 );
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_PhysicalEnable, 0, 0 );
+ }
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg,TPM_ORD_PhysicalSetDeactivated, 1,&zero );
+ }
+ break;
+ case 12:
+ case 13:
+ //not supported
+ //cases 15-20 are handles elsewhere
+ break;
+ case 21:
+ //Enable + Activate + clear
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_PhysicalEnable, 0, 0 );
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg,TPM_ORD_PhysicalSetDeactivated, 1,&zero );
+ }
+
+ Temp = TCPA_PPIOP_CLEAR | (rqst << 04);
+
+ Status = TcgSetVariableWithNewAttributes(L"TcgINTPPI", &TcgEfiGlobalVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (UINT32), &Temp );
+
+
+ if(!AutoSupportType()){
+ TpmDevice->Close( TpmDevice );
+ }
+
+ WritePpiResult( rqst, (UINT16)( TPM_H2NL( tpmStatus )));
+ RequestSystemReset( EfiResetCold );
+ break;
+ case 22:
+ //Enable + Activate + clear + Enable + Activate
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_PhysicalEnable, 0, 0 );
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg,TPM_ORD_PhysicalSetDeactivated, 1,&zero );
+ }
+
+ //after force clear, update request and reset the system for
+ // tcg flags to be updated
+ Temp = TCPA_PPIOP_CLEAR_ENACT | (rqst << 04);
+
+ Status = TcgSetVariableWithNewAttributes(L"TcgINTPPI", &TcgEfiGlobalVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (UINT32), &Temp );
+
+ if(!AutoSupportType()){
+ TpmDevice->Close( TpmDevice );
+ }
+
+ WritePpiResult( rqst, (UINT16)( TPM_H2NL( tpmStatus )));
+ RequestSystemReset( EfiResetCold );
+ break;
+ default:
+ break;
+
+ }
+ }else{
+
+ //use switch case
+ switch( rqst)
+ {
+ case 1:
+ // send tpm command to enable the TPM
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_PhysicalEnable, 0, 0 );
+ break;
+ case 2:
+ //disable TPM
+ tpmStatus = SendTpmCommand( tcg,TCM_ORD_PhysicalDisable, 0, 0 );
+ break;
+ case 3:
+ //Activate TPM
+ tpmStatus = SendTpmCommand( tcg,TCM_ORD_PhysicalSetDeactivated, 1,&zero );
+ break;
+ case 4:
+ //Dectivate TPM
+ tpmStatus = SendTpmCommand( tcg,TCM_ORD_PhysicalSetDeactivated, 1,&one );
+ break;
+ case 5:
+ //force clear
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_ForceClear, 0, 0 );
+ break;
+ case 6:
+ //Enable + Activate
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_PhysicalEnable, 0, 0 );
+ if(!tpmStatus){
+ tpmStatus = SendTpmCommand( tcg,TCM_ORD_PhysicalSetDeactivated, 1,&zero );
+ }
+ break;
+ case 7:
+ //Deactivate + Disable
+ tpmStatus = SendTpmCommand( tcg,TCM_ORD_PhysicalSetDeactivated, 1,&one );
+ if(!tpmStatus){
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_PhysicalDisable, 0, 0 );
+ }
+ break;
+ case 8:
+ //set Owner Install true
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_SetOwnerInstall,1, &one );
+ break;
+ case 9:
+ //set Owner Install False
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_SetOwnerInstall,1, &zero );
+ break;
+ case 10:
+ //Enable + Activate + set Owner Install true
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_PhysicalEnable, 0, 0 );
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg,TCM_ORD_PhysicalSetDeactivated, 1,&zero );
+ }
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_SetOwnerInstall,1, &one );
+ if((TPM_H2NL( tpmStatus ) & TCG_DEACTIVED_ERROR) == TCG_DEACTIVED_ERROR )
+ {
+ Temp = TCPA_PPIOP_OWNER_ON | (rqst << 04);
+
+ Status = TcgSetVariableWithNewAttributes(L"TcgINTPPI", &TcgEfiGlobalVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (UINT32), &Temp );
+
+ if(!AutoSupportType()){
+ TpmDevice->Close( TpmDevice );
+ }
+ WritePpiResult( rqst, (UINT16)( TPM_H2NL( tpmStatus )));
+ RequestSystemReset( EfiResetCold );
+ }
+ break;
+ case 11:
+ //Setownerfalse + Deactivate + disable
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_SetOwnerInstall,1, &zero );
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg,TCM_ORD_PhysicalSetDeactivated, 1,&one );
+
+ }
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_PhysicalDisable, 0, 0 );
+ }
+ break;
+ case 14:
+ //clear + Enable + Activate
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_ForceClear, 0, 0 );
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_PhysicalEnable, 0, 0 );
+ }
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg,TCM_ORD_PhysicalSetDeactivated, 1,&zero );
+ }
+ break;
+ case 12:
+ case 13:
+ //not supported
+ //cases 15-20 are handles elsewhere
+ break;
+ case 21:
+ //Enable + Activate + clear
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_PhysicalEnable, 0, 0 );
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg,TCM_ORD_PhysicalSetDeactivated, 1,&zero );
+ }
+
+ Temp = TCPA_PPIOP_CLEAR | (rqst << 04);
+
+ Status = TcgSetVariableWithNewAttributes(L"TcgINTPPI", &TcgEfiGlobalVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (UINT32), &Temp );
+
+ if(!AutoSupportType()){
+ TpmDevice->Close( TpmDevice );
+ }
+
+ WritePpiResult( rqst, (UINT16)( TPM_H2NL( tpmStatus )));
+ RequestSystemReset( EfiResetCold );
+ break;
+ case 22:
+ //Enable + Activate + clear + Enable + Activate
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_PhysicalEnable, 0, 0 );
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg,TCM_ORD_PhysicalSetDeactivated, 1,&zero );
+ }
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_ForceClear, 0, 0 );
+ }
+
+ //after force clear, update request and reset the system for
+ // tcg flags to be updated
+ Temp = TCPA_PPIOP_ENABLE_ACTV | (rqst << 04);
+
+ Status = TcgSetVariableWithNewAttributes(L"TcgINTPPI", &TcgEfiGlobalVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (UINT32), &Temp );
+
+ if(!AutoSupportType()){
+ TpmDevice->Close( TpmDevice );
+ }
+
+ WritePpiResult( rqst, (UINT16)( TPM_H2NL( tpmStatus )));
+ RequestSystemReset( EfiResetCold );
+ break;
+ default:
+ break;
+
+ }
+ }
+
+ WritePpiResult( rqst, (UINT16)( TPM_H2NL( tpmStatus )));
+ //
+ // System may need reset so that TPM reload permanent flags
+ //
+ return tpmStatus;
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: ProcessTcgSetup
+//
+// Description: Handles Tcg Setup functionality
+//
+// Input: NONE
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+EFIAPI ProcessTcgSetup()
+{
+ UINT8 Disable = 0;
+ EFI_STATUS Status;
+ EFI_TCG_PROTOCOL *tcg;
+ EFI_TPM_DEVICE_PROTOCOL *TpmDevice;
+ TPM_Capabilities_PermanentFlag cap;
+ UINT8 Temp = 0;
+ UINT8 TpmOwner;
+#if CONFIRM_SETUP_CHANGE
+ EFI_EVENT ev;
+#endif
+ void *SimpleIn = NULL;
+ static void *reg;
+ TCG_PLATFORM_SETUP_PROTOCOL *ProtocolInstance;
+ EFI_GUID Policyguid = TCG_PLATFORM_SETUP_POLICY_GUID;
+ EFI_GUID EfiGlobalVariableGuid =\
+ TCG_VARIABLE_GUID;
+
+ UINT32 TpmOldVarAttributes = EFI_VARIABLE_BOOTSERVICE_ACCESS|\
+ EFI_VARIABLE_NON_VOLATILE;
+
+ UINTN Size = sizeof(UINT8);
+ TCG_CONFIGURATION Config;
+ UINT8 TpmOldVar = 0;
+ AMI_TCG_DXE_FUNCTION_OVERRIDE_PROTOCOL *POverride;
+ EFI_GUID Overrideguid =\
+ AMI_PROCESS_TCG_SETUP_GUID;
+
+
+ Status = pBS->LocateProtocol(&Overrideguid,
+ NULL,
+ &POverride );
+
+ if(!EFI_ERROR(Status)){
+ return (POverride->Function());
+ }
+
+ Status = pBS->LocateProtocol( &gTpmDeviceProtocolGuid, NULL, &TpmDevice );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ Status = pBS->LocateProtocol( &gEfiTcgProtocolGuid, NULL, &tcg );
+
+ if ( EFI_ERROR( Status ))
+ {
+ TRACE((TRACE_ALWAYS, "Error: failed to locate TCG protocol: %r\n"));
+ return Status;
+ }
+
+ Status = pBS->LocateProtocol (&Policyguid, NULL, &ProtocolInstance);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ cap = read_TPM_capabilities( tcg );
+ TpmOwner = CheckTpmOwnership( tcg );
+
+ MemCpy(&Config, &ProtocolInstance->ConfigFlags, sizeof(TCG_CONFIGURATION));
+
+ //update onwership and Deactivated statuses
+ Config.TpmEnaDisable = cap.disabled;
+ Config.TpmActDeact = cap.deactivated;
+ Config.TpmOwnedUnowned = TpmOwner;
+ Config.TpmHardware = AMI_TPM_HARDWARE_PRESET;
+ Config.TpmError = 0;
+
+ Status = pRS->GetVariable (
+ L"TpmOldvar",
+ &TcgEfiGlobalVariableGuid,
+ &TpmOldVarAttributes,
+ &Size,
+ &TpmOldVar);
+
+ if(EFI_ERROR(Status))
+ {
+ TpmOldVar = Config.TpmEnable;
+ //set variable
+ Status = pRS->SetVariable (
+ L"TpmOldvar",
+ &TcgEfiGlobalVariableGuid,
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ Size,
+ &TpmOldVar);
+ }else
+ {
+ if(TpmOldVar == Config.TpmEnable)
+ {
+ if(Config.TpmEnable != (~( cap.disabled | cap.deactivated )& BIT00))
+ {
+ Config.PpiSetupSyncFlag = 1;
+ }
+ }else{
+ TpmOldVar = Config.TpmEnable;
+
+ Status = TcgSetVariableWithNewAttributes(L"TpmOldvar", &TcgEfiGlobalVariableGuid, \
+ TpmOldVarAttributes,\
+ Size, &TpmOldVar );
+ }
+ }
+
+ if(Config.PpiSetupSyncFlag != 0)
+ {
+ //ppi request happened so sync setup variables
+ TRACE((TRACE_ALWAYS, "\n Setup and PPi request sync \n"));
+ Config.TpmEnable = (~( cap.disabled | cap.deactivated )& BIT00);
+ Config.TpmOperation = 0;
+ Config.PpiSetupSyncFlag = 0;
+
+ TpmOldVar = Config.TpmEnable;
+
+ Status = TcgSetVariableWithNewAttributes(L"TpmOldvar", &TcgEfiGlobalVariableGuid, \
+ TpmOldVarAttributes,\
+ Size, &TpmOldVar );
+
+ }
+
+
+ UpDateASL(Config.TpmSupport);
+
+ ProtocolInstance->UpdateStatusFlags(&Config, TRUE);
+
+ if(Config.TpmEnable != (~( cap.disabled | cap.deactivated )& BIT00))
+ {
+ TRACE((TRACE_ALWAYS, "\n TMP_ENABLE != Setup in setup \n"));
+
+#if CONFIRM_SETUP_CHANGE
+
+ if ( Config.TpmEnable ) {
+ ppi_request = TCPA_PPIOP_ENABLE_ACTV;
+
+ Config.Reserved5 = TRUE;
+ ProtocolInstance->UpdateStatusFlags(&Config, TRUE);
+
+ Status = pBS->CreateEvent( EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ run_PPI_UI,
+ 0,
+ &ev );
+ if(EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ Status = pBS->RegisterProtocolNotify(
+ &gBdsAllDriversConnectedProtocolGuid,
+ ev,
+ &reg );
+ if(EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ run_PPI_UI( NULL, NULL );
+ return Status;
+
+ }
+ else if ( !Config.TpmEnable ) {
+ ppi_request = TCPA_PPIOP_DEACT_DSBL;
+
+ Config.Reserved5 = TRUE;
+ ProtocolInstance->UpdateStatusFlags(&Config, TRUE);
+
+ Status = pBS->CreateEvent( EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ run_PPI_UI,
+ 0,
+ &ev );
+
+ if(EFI_ERROR(Status)){
+ return Status;
+ }
+
+ Status = pBS->RegisterProtocolNotify(
+ &gBdsAllDriversConnectedProtocolGuid,
+ ev,
+ &reg );
+ if(EFI_ERROR(Status)){
+ return Status;
+ }
+
+ run_PPI_UI( NULL, NULL );
+ return Status;
+
+ }
+
+#else
+
+ if ( execute_request( Config.TpmEnable ? TCPA_PPIOP_ENABLE_ACTV :
+ TCPA_PPIOP_DEACT_DSBL ) != 0 )
+ {
+ //Do nothing but update setup to display TPM ERROR on execution of
+ //setup command and continue to boot
+ Config.TpmError = AMI_TPM_HARDWARE_SETUP_REQUEST_ERROR;
+ ProtocolInstance->UpdateStatusFlags(&Config, TRUE);
+ }
+ else {
+ ProtocolInstance->UpdateStatusFlags(&Config, TRUE);
+ RequestSystemReset( EfiResetCold );
+ }
+
+#endif
+
+ }
+ else if ( Config.TpmOperation )
+ {
+
+#if CONFIRM_SETUP_CHANGE
+ ppi_request = Config.TpmOperation;
+
+ Config.Reserved5 = TRUE;
+ ProtocolInstance->UpdateStatusFlags(&Config, TRUE);
+
+ Status = pBS->CreateEvent( EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ run_PPI_UI,
+ 0,
+ &ev );
+
+ if(EFI_ERROR(Status)){
+ return Status;
+ }
+
+ Status = pBS->RegisterProtocolNotify(
+ &gBdsAllDriversConnectedProtocolGuid,
+ ev,
+ &reg );
+ if(EFI_ERROR(Status)){
+ return Status;
+ }
+
+ run_PPI_UI( NULL, NULL );
+ return Status;
+
+#else
+ TRACE((TRACE_ALWAYS, "\n ENABLE == Setup in setup \n"));
+
+ if ( execute_request( Config.TpmOperation ) != 0 )
+ {
+ //Do nothing but update setup to display TPM ERROR on execution of
+ //setup command and continue to boot
+ //Do nothing but update setup to display TPM ERROR on execution of
+ //setup command and continue to boot
+ Config.TpmError = AMI_TPM_HARDWARE_SETUP_REQUEST_ERROR;
+ Config.TpmOperation = 0;
+ ProtocolInstance->UpdateStatusFlags(&Config, TRUE);
+ if(EFI_ERROR(Status))return Status;
+
+ }
+ else {
+ //reset to update setup
+ if(Config.TpmOperation == TCPA_PPIOP_CLEAR)
+ {
+ Config.TpmEnable = 0;
+ }
+ Config.TpmOperation = 0;
+ ProtocolInstance->UpdateStatusFlags(&Config, TRUE);
+ RequestSystemReset( EfiResetCold );
+ }
+#endif
+ }
+
+ return Status;
+
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: GetStringFromToken
+//
+// Description: Gets a UNI string by Token
+//
+// Input: IN STRING_REF Token,
+// OUT CHAR16 **String
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS GetStringFromToken(
+ IN STRING_REF Token,
+ OUT CHAR16 **String )
+{
+ EFI_STATUS Status;
+ UINTN StringBufferLength;
+ UINT16 *Temp;
+ UINTN Size = 0;
+
+
+ //
+ // Find the string based on the current language
+ //
+ StringBufferLength = 0x500;
+ Status = pBS->AllocatePool( EfiBootServicesData,
+ sizeof (CHAR16) * 0x500,
+ String );
+ Temp = *String;
+ while ( Temp < *String + StringBufferLength )
+ {
+ *Temp = 0x0;
+ Temp++;
+ }
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+
+ Status = HiiLibGetString (
+ gHiiHandle,
+ Token,
+ &StringBufferLength,
+ *String
+ );
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+#else
+ if ( Hii == NULL )
+ {
+ return EFI_NOT_FOUND;
+ }
+
+ Status = Hii->GetString(
+ Hii,
+ gHiiHandle,
+ Token,
+ TRUE,
+ NULL,
+ &StringBufferLength,
+ *String
+ );
+#endif
+
+
+ if ( EFI_ERROR( Status ))
+ {
+ pBS->FreePool( *String );
+ return EFI_NOT_FOUND;
+ }
+
+ return EFI_SUCCESS;
+}
+
+STRING_REF ppi_op_names[] = {
+ STRING_TOKEN( STR_TCG_ENABLE ),
+ STRING_TOKEN( STR_TCG_DISABLE ),
+
+ STRING_TOKEN( STR_TCG_ACTIVATE ),
+ STRING_TOKEN( STR_TCG_DEACTIVATE ),
+
+ STRING_TOKEN( STR_TCG_ALLOW ),
+ STRING_TOKEN( STR_TCG_DISALLOW ),
+
+ STRING_TOKEN( STR_TCG_CLEAR ),
+ STRING_TOKEN( STR_TCG_NOTCLEAR ),
+
+ STRING_TOKEN( STR_TCG_ENABLE ),
+ STRING_TOKEN( STR_TCG_DISABLE ),
+
+ STRING_TOKEN( STR_TCG_ACTIVATE ),
+ STRING_TOKEN( STR_TCG_DEACTIVATE ),
+
+};
+
+
+STRING_REF NV_op_names[] = {
+ STRING_TOKEN( STR_TCG_SETNOPPIPROVISION ),
+ STRING_TOKEN( STR_TCG_SETNOPPICLEAR ),
+ STRING_TOKEN( STR_TCG_SETNOPPIMAINTENANCE ),
+ STRING_TOKEN( STR_TCG_SETNOPPIPROVISIONACCPET ),
+ STRING_TOKEN( STR_TCG_SETNOPPICLEARACCPET ),
+ STRING_TOKEN( STR_TCG_SETNOPPIMAINTENANCEACCEPT ),
+};
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: displOperations
+//
+// Description: Display requested actions as a list of operations
+//
+// INPUT: IN extended_request erqst,
+// IN int count,
+// IN CHAR16 *DesStr
+//
+// OUTPUT: VOID
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+void displOperations(
+ IN extended_request erqst,
+ IN int count,
+ IN CHAR16 *DesStr )
+{
+ int i, j;
+ CHAR16 * strDelim = L", ";
+ UINT32 r;
+ CHAR16 *String;
+
+ if ( count == 2 )
+ {
+ strDelim = L" and ";
+ }
+
+ for ( i = 0, r = erqst, j = 0; i <= PPI_MAX_BASIC_OP; i++, r >>= 2 )
+ {
+ if ( r & PPI_FEATURE_CHANGE )
+ {
+ GetStringFromToken( ppi_op_names[(i* 2) + (r & PPI_FEATURE_ON ? 0 : 1)],
+ &String );
+
+ Wcscpy( DesStr + Wcslen( DesStr ), String );
+ j++;
+
+ if ( j < count )
+ {
+ Wcscpy( DesStr + Wcslen( DesStr ), strDelim );
+ }
+
+ if ( j == count - 2 )
+ {
+ strDelim = L", and ";
+ }
+ }
+ }
+}
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: displTpmNvOperations
+//
+// Description: Display requested actions as a list of operations
+//
+// INPUT: IN extended_request erqst,
+// IN CHAR16 *DesStr
+//
+// OUTPUT: VOID
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+void displTpmNvOperations(
+ IN UINT8 erqst,
+ IN CHAR16 *DesStr )
+{
+ CHAR16 *String;
+
+ GetStringFromToken( STRING_TOKEN(STR_TCG_CONFIGURATION), &String );
+
+ if(erqst == TCPA_PPIOP_SETNOPPIPROVISION_TRUE){
+
+ Wcscpy( DesStr + Wcslen( DesStr ), String );
+ GetStringFromToken( STRING_TOKEN(STR_TCG_SETNOPPIPROVISION) , &String );
+ Wcscpy( DesStr + Wcslen( DesStr ), String );
+
+ }else if(erqst == TCPA_PPIOP_SETNOPPICLEAR_TRUE){
+
+ Wcscpy( DesStr + Wcslen( DesStr ), String );
+ GetStringFromToken( STRING_TOKEN(STR_TCG_SETNOPPICLEAR) , &String );
+ Wcscpy( DesStr + Wcslen( DesStr ), String );
+
+ }else if(erqst == TCPA_PPIOP_SETNOPPIMAINTENANCE_TRUE){
+
+ Wcscpy( DesStr + Wcslen( DesStr ), String );
+ GetStringFromToken( STRING_TOKEN(STR_TCG_SETNOPPIMAINTENANCE) , &String );
+ Wcscpy( DesStr + Wcslen( DesStr ), String );
+
+ }
+
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: prompt_operation
+//
+// Description: Display information on the requested TPM operation to the user;
+//
+// INPUT: IN int rqst
+//
+// OUTPUT: VOID
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+void prompt_operation(
+ IN int rqst )
+{
+ int i;
+ UINT32 r;
+ int count = 0;
+ EFI_STATUS Status;
+ CHAR16 TempChar;
+ CHAR16 *StrBuffer = NULL;
+ CHAR16 *String;
+ UINT8 rq = (UINT8) rqst;
+ UINTN CurX, CurY;
+ AMITSESETUP TSEVar;
+ UINTN Size;
+ EFI_GUID AmiTseSetupguid = AMITSESETUP_GUID;
+
+ extended_request erqst;
+
+ erqst = extend_request( rq );
+
+ //
+ // Allocate the memory for the string buffer
+ //
+ Status = pBS->AllocatePool(
+ EfiBootServicesData,
+ sizeof (CHAR16) * 0x100,
+ (VOID*) &StrBuffer
+ );
+
+ if ( EFI_ERROR( Status ) || StrBuffer == NULL )
+ {
+ return;
+ }
+
+ MemSet( StrBuffer, sizeof (CHAR16) * 0x100, 0 );
+
+ Status = pBS->LocateProtocol( &gAmiPostManagerProtocolGuid,
+ NULL,
+ &pAmiPostMgr );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return;
+ }
+ //
+ // If we are silent mode switch to Bios post mode
+ //
+
+ #if EFI_SPECIFICATION_VERSION<0x2000A
+ Status = pBS->LocateProtocol (&gEfiHiiProtocolGuid, NULL, &Hii);
+ ASSERT(!EFI_ERROR(Status));
+ #endif
+
+ pAmiPostMgr->SwitchToPostScreen( );
+
+ Size = sizeof (AMITSESETUP);
+
+ Status = pRS->GetVariable(L"AMITSESetup", \
+ &AmiTseSetupguid, \
+ NULL, \
+ &Size, \
+ &TSEVar );
+
+ //
+ // Count number of simple operations
+ //
+ for ( i = 0, r = erqst; i <= PPI_MAX_BASIC_OP; i++, r >>= 2 )
+ {
+ if ( r & PPI_FEATURE_CHANGE )
+ {
+ count++;
+ }
+ }
+ TRACE((TRACE_ALWAYS, "PPI operations count: %d\n", count));
+
+ //
+ // Display the string
+ //
+ if(Status == EFI_SUCCESS){
+ if(TSEVar.AMISilentBoot == 0x00){
+ pAmiPostMgr->DisplayPostMessage( StrBuffer );
+ }
+ }
+
+//CurX, CurY;
+ pAmiPostMgr->GetCurPos(&CurX, &CurY);
+
+ CurX = 0;
+ CurY -= PPI_DISPLAY_OFFSET;
+
+ pAmiPostMgr->SetCurPos(CurX, CurY);
+ GetStringFromToken( STRING_TOKEN( STR_TCG_BLANK ), &String );
+ Wcscpy( StrBuffer, String );
+
+ for(i=0; i<PPI_DISPLAY_OFFSET; i++)
+ {
+ pAmiPostMgr->DisplayPostMessage( StrBuffer );
+ }
+
+ MemSet( StrBuffer, sizeof (CHAR16) * 0x100, 0 );
+
+ if (rq < TCPA_PPIOP_SETNOPPIPROVISION_FALSE || rq > TCPA_PPIOP_SETNOPPIMAINTENANCE_TRUE)
+ {
+ GetStringFromToken( STRING_TOKEN( STR_TCG_CONFIGURATION ), &String );
+ Wcscpy( StrBuffer + Wcslen( StrBuffer ), String );
+ displOperations( erqst, count, StrBuffer );
+ GetStringFromToken( STRING_TOKEN( STR_TPM ), &String );
+ Wcscpy( StrBuffer + Wcslen( StrBuffer ), String );
+ }else{
+ displTpmNvOperations( rq , StrBuffer );
+ }
+
+ if ( Wcslen( StrBuffer ) > 79 )
+ {
+ for ( i = 79; i > 1; i-- )
+ {
+ if ( StrBuffer[i] == 0x0020 )
+ {
+ break;
+ }
+ }
+
+ TempChar = StrBuffer[i + 1];
+ StrBuffer[i + 1] = 0000;
+ //
+ // Display the string
+ //
+ pAmiPostMgr->DisplayPostMessage( StrBuffer );
+ StrBuffer[i + 1] = TempChar;
+ pAmiPostMgr->DisplayPostMessage( &StrBuffer[i + 1] );
+ }
+ else {
+ //
+ // Display the string
+ //
+ pAmiPostMgr->DisplayPostMessage( StrBuffer );
+ }
+
+ //take care of Note messages
+ if ( ppi_request == TCPA_PPIOP_ENABLE_ACTV
+ || ppi_request == TCPA_PPIOP_ENACTVOWNER )
+ {
+ GetStringFromToken( STRING_TOKEN( STR_TCG_NOTE ), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+ }
+
+ if ( ppi_request == TCPA_PPIOP_DEACT_DSBL
+ || ppi_request == TCPA_PPIOP_DADISBLOWNER)
+ {
+ GetStringFromToken( STRING_TOKEN( STR_TCG_NOTE1 ), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+ }
+
+ if ( ppi_request == TCPA_PPIOP_CLEAR_ENACT
+ || ppi_request == TCPA_PPIOP_ENABLE_ACTV_CLEAR_ENABLE_ACTV)
+ {
+ GetStringFromToken( STRING_TOKEN( STR_TCG_NOTE2 ), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+ }
+
+ GetStringFromToken( STRING_TOKEN( STR_TCG_BLANK ), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+
+ //take care of warning messages
+ if ( ppi_request == TCPA_PPIOP_CLEAR_ENACT
+ || ppi_request == TCPA_PPIOP_ENABLE_ACTV_CLEAR_ENABLE_ACTV )
+ {
+ GetStringFromToken( STRING_TOKEN( STR_TCG_WARNING ), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+ }
+
+ if ( ppi_request == TCPA_PPIOP_CLEAR
+ || ppi_request == TCPA_PPIOP_ENABLE_ACTV_CLEAR)
+ {
+ GetStringFromToken( STRING_TOKEN( STR_TCG_WARNING1 ), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+ }
+
+ if ( ppi_request == TCPA_PPIOP_DISABLE || ppi_request == TCPA_PPIOP_DEACTIVATE
+ || ppi_request == TCPA_PPIOP_DEACT_DSBL || ppi_request == TCPA_PPIOP_DADISBLOWNER)
+ {
+ GetStringFromToken( STRING_TOKEN( STR_TCG_WARNING2 ), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+ }
+
+ GetStringFromToken( STRING_TOKEN( STR_TCG_BLANK ), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+
+
+ MemSet( StrBuffer, sizeof (CHAR16) * 0x100, 0 );
+
+ //
+ // Display the one line space
+ //
+ pAmiPostMgr->DisplayPostMessage( StrBuffer );
+
+ if ( ppi_request == TCPA_PPIOP_CLEAR_ENACT || ppi_request ==
+ TCPA_PPIOP_CLEAR || ppi_request == TCPA_PPIOP_SETNOPPICLEAR_FALSE
+ || ppi_request == TCPA_PPIOP_ENABLE_ACTV_CLEAR
+ || ppi_request == TCPA_PPIOP_ENABLE_ACTV_CLEAR_ENABLE_ACTV)
+ {
+ GetStringFromToken( STRING_TOKEN( STR_TCG_KEY1 ), &String );
+ }
+ else {
+ GetStringFromToken( STRING_TOKEN( STR_TCG_KEY2 ), &String );
+ }
+
+ Wcscpy( StrBuffer + Wcslen( StrBuffer ), String );
+
+ //
+ // Display the string
+ //
+ if (rq < TCPA_PPIOP_SETNOPPIPROVISION_FALSE || rq > TCPA_PPIOP_SETNOPPIMAINTENANCE_TRUE){
+ displOperations( erqst, count, StrBuffer );
+ GetStringFromToken( STRING_TOKEN( STR_TPM ), &String );
+ Wcscpy( StrBuffer + Wcslen( StrBuffer ), String );
+ }else{
+ if(rq == TCPA_PPIOP_SETNOPPIPROVISION_TRUE){
+ GetStringFromToken( STRING_TOKEN(STR_TCG_SETNOPPIPROVISIONACCPET) , &String );
+ Wcscpy( StrBuffer + Wcslen( StrBuffer ), String );
+
+ }
+ else if(rq == TCPA_PPIOP_SETNOPPICLEAR_TRUE){
+ GetStringFromToken( STRING_TOKEN(STR_TCG_SETNOPPICLEARACCPET) , &String );
+ Wcscpy( StrBuffer + Wcslen( StrBuffer ), String );
+ }
+ }
+
+ if (Wcslen( StrBuffer ) > 79 )
+ {
+ for ( i = 79; i > 1; i-- )
+ {
+ if ( StrBuffer[i] == 0x0020 )
+
+ {
+ break;
+ }
+ }
+
+ TempChar = StrBuffer[i + 1];
+ StrBuffer[i + 1] = 0000;
+ //
+ // Display the string
+ //
+ pAmiPostMgr->DisplayPostMessage( StrBuffer );
+ StrBuffer[i + 1] = TempChar;
+ pAmiPostMgr->DisplayPostMessage( &StrBuffer[i + 1] );
+ }
+ else {
+ //
+ // Display the string
+ //
+ pAmiPostMgr->DisplayPostMessage( StrBuffer );
+ }
+
+
+ GetStringFromToken( STRING_TOKEN( STR_TCG_CONFIRAMATION ), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+
+ MemSet( StrBuffer, sizeof (CHAR16) * 0x100, 0 );
+ //Wcscpy (StrBuffer + Wcslen (StrBuffer), String);
+
+ //
+ // Display the one line space
+ //
+ pAmiPostMgr->DisplayPostMessage( StrBuffer );
+
+ pBS->FreePool( StrBuffer );
+
+ return;
+}
+
+
+
+
+void run_PPI_UI(
+ IN EFI_EVENT ev,
+ IN VOID *ctx)
+{
+
+ static UINT8 RequestConfirmed = FALSE;
+ EFI_GUID Oempolicyguid = AMI_BIOSPPI_FLAGS_MANAGEMENT_GUID;
+ PERSISTENT_BIOS_TPM_MANAGEMENT_FLAGS_PROTOCOL *OemTpmBiosPolicy;
+ PERSISTENT_BIOS_TPM_FLAGS TpmNvflags;
+ EFI_STATUS Status;
+ TCG_PLATFORM_SETUP_PROTOCOL *ProtocolInstance;
+ EFI_GUID Policyguid = TCG_PLATFORM_SETUP_POLICY_GUID;
+ TCG_CONFIGURATION Config;
+ TSE_POST_STATUS TsePostStatus;
+#if TPM_PASSWORD_AUTHENTICATION
+ UINT32 GlobalVariable;
+ UINTN Size;
+ if ( PasswordSupplied )
+ {
+ goto CheckConfirm;
+ }
+#else
+ if(IsRunPpiUIAlreadyDone ==TRUE){
+ return;
+ }
+#endif
+
+
+ if (pAmiPostMgr == NULL) {
+ Status = pBS->LocateProtocol( &gAmiPostManagerProtocolGuid,
+ NULL,
+ &pAmiPostMgr );
+
+ if (EFI_ERROR(Status)) {
+ return;
+ }
+ }
+
+ //
+ // Calling GetPostStatus() to check current TSE_POST_STATUS
+ //
+ TsePostStatus = pAmiPostMgr->GetPostStatus();
+
+ if ( pST->ConIn == NULL || pST->ConOut == NULL || TsePostStatus == TSE_POST_STATUS_BEFORE_POST_SCREEN )
+ {
+ TRACE((TRACE_ALWAYS, "\tTextIn/Out not ready: in=%x; out=%x\n",
+ pST->ConIn, pST->ConOut));
+ return;
+ }
+
+ IsRunPpiUIAlreadyDone = TRUE;
+
+ Status = pBS->LocateProtocol (&Policyguid, NULL, &ProtocolInstance);
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+
+
+ MemCpy(&Config, &ProtocolInstance->ConfigFlags, sizeof(TCG_CONFIGURATION));
+
+ Config.PpiSetupSyncFlag = TRUE;
+
+ ProtocolInstance->UpdateStatusFlags(&Config, TRUE);
+
+ Status = pBS->LocateProtocol( &Oempolicyguid, NULL, &OemTpmBiosPolicy);
+ if(!EFI_ERROR(Status)){
+ Status = OemTpmBiosPolicy->ReadBiosTpmflags(&TpmNvflags);
+ if(!EFI_ERROR(Status)){
+
+ switch( ppi_request)
+ {
+ case 1:
+ if(TpmNvflags.NoPpiProvision == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 2:
+ if(TpmNvflags.NoPpiProvision == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 3:
+ if(TpmNvflags.NoPpiProvision == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 4:
+ if(TpmNvflags.NoPpiProvision == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 5:
+ if(TpmNvflags.NoPpiClear == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 6:
+ if(TpmNvflags.NoPpiProvision == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 7:
+ if(TpmNvflags.NoPpiProvision == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 8:
+ if(TpmNvflags.NoPpiProvision == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 9:
+ if(TpmNvflags.NoPpiProvision == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 10:
+ if(TpmNvflags.NoPpiProvision == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 11:
+ if(TpmNvflags.NoPpiProvision == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 12:
+ //TPM_SetCapability command
+ if(TpmNvflags.NoPpiMaintenance == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 13:
+ if(TpmNvflags.NoPpiProvision == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 14:
+ if(TpmNvflags.NoPpiProvision == TRUE && TpmNvflags.NoPpiClear == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 15:
+ //SetNoPpiProvision_false
+ RequestConfirmed = TRUE;
+ break;
+ case 16:
+ RequestConfirmed = FALSE;
+ break;
+ case 17:
+ //SetNoPpiClear_false
+ RequestConfirmed = TRUE;
+ break;
+ case 18:
+ //SetNoPpiClear_True
+ RequestConfirmed = FALSE;
+ break;
+ case 19:
+ //SetNoPpiMaintenance_False
+ RequestConfirmed = TRUE;
+ break;
+ case 20:
+ RequestConfirmed = FALSE;
+ break;
+ case 21:
+ //Enable + Activate + Clear
+ if(TpmNvflags.NoPpiClear == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ case 22:
+ //Enable + Activate + clear + Enable + Activate
+ if(TpmNvflags.NoPpiProvision == TRUE && TpmNvflags.NoPpiClear == TRUE)
+ {
+ RequestConfirmed = TRUE;
+ }
+ break;
+ default:
+ break;
+
+ }
+
+ }
+ }
+
+#if CONFIRM_SETUP_CHANGE
+ if(Config.Reserved5 == TRUE)
+ {
+ Config.Reserved5 = FALSE;
+ RequestConfirmed = FALSE;
+ ProtocolInstance->UpdateStatusFlags(&Config, TRUE);
+ }
+#endif
+
+#if TPM_PASSWORD_AUTHENTICATION
+ prompt_operation( ppi_request );
+ RequestConfirmed = confirmUser( );
+#else
+ if(RequestConfirmed == FALSE)
+ {
+ prompt_operation( ppi_request );
+ RequestConfirmed = confirmUser( );
+ }
+#endif
+
+
+ #if TPM_PASSWORD_AUTHENTICATION
+
+ if ( check_authenticate_set( ) && RequestConfirmed )
+ {
+ GlobalVariable = 0x58494d41; // "AMIX"
+ Status = pRS->SetVariable(
+ L"AskPassword",
+ &TcgEfiGlobalVariableGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ sizeof (UINT32),
+ &GlobalVariable
+ );
+
+ if ( EFI_ERROR( Status ))
+ {
+ Status = pRS->GetVariable(
+ L"AskPassword",
+ &TcgEfiGlobalVariableGuid,
+ NULL,
+ &Size,
+ &GlobalVariable
+ );
+ GlobalVariable = 0x58494d41; // "AMIX"
+ Status = pRS->SetVariable(
+ L"AskPassword",
+ &TcgEfiGlobalVariableGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ Size,
+ &GlobalVariable
+ );
+ }
+ SignalProtocolEvent(&TcgPasswordAuthenticationGuid);
+ return;
+ }
+CheckConfirm:
+ #endif
+
+ if ( !RequestConfirmed )
+ {
+ TRACE((TRACE_ALWAYS, "\tPPI request was turned down: user cancel\n"));
+ TRACE((TRACE_ALWAYS, "Another key pressed for PPI setup, Write_result"));
+ WritePpiResult( ppi_request, TCPA_PPI_USERABORT );
+ return;
+ }
+
+ #if TPM_PASSWORD_AUTHENTICATION
+
+ if ( check_authenticate_set( ))
+ {
+ GlobalVariable = 0;
+ Status = pRS->SetVariable(
+ L"AskPassword",
+ &TcgEfiGlobalVariableGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ sizeof (UINT32),
+ &GlobalVariable
+ );
+
+ if ( EFI_ERROR( Status ))
+ {
+ Status = pRS->GetVariable(
+ L"AskPassword",
+ &TcgEfiGlobalVariableGuid,
+ NULL,
+ &Size,
+ &GlobalVariable
+ );
+ GlobalVariable = 0;
+ Status = pRS->SetVariable(
+ L"AskPassword",
+ &TcgEfiGlobalVariableGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ Size,
+ &GlobalVariable
+ );
+ }
+
+ if ( !check_user_is_administrator( ))
+ {
+ WritePpiResult( ppi_request, TCPA_PPI_USERABORT );
+ return;
+ }
+ }
+ #endif
+
+ TRACE((TRACE_ALWAYS, "F10 pressed for PPI setup, execute request"));
+
+ //verify and do TPM related Ppi over here
+ if(ppi_request >= TCPA_PPIOP_SETNOPPIPROVISION_FALSE &&
+ ppi_request <= TCPA_PPIOP_SETNOPPIMAINTENANCE_TRUE )
+ {
+ if(ppi_request == TCPA_PPIOP_SETNOPPIPROVISION_FALSE)
+ {
+ if(TpmNvflags.NoPpiProvision != FALSE){
+ TpmNvflags.NoPpiProvision = 0;
+ Status = OemTpmBiosPolicy->SetBiosTpmflags(&TpmNvflags);
+ if(Status){
+ WritePpiResult( ppi_request, TCPA_PPI_BIOSFAIL );
+ }else{
+ WritePpiResult( ppi_request, (UINT16)EFI_SUCCESS );
+ }
+ }else{
+ WritePpiResult( ppi_request, (UINT16)EFI_SUCCESS );
+ }
+ }else if(ppi_request == TCPA_PPIOP_SETNOPPIPROVISION_TRUE)
+ {
+ if(TpmNvflags.NoPpiProvision != TRUE){
+ TpmNvflags.NoPpiProvision = TRUE;
+ Status = OemTpmBiosPolicy->SetBiosTpmflags(&TpmNvflags);
+ if(Status){
+ WritePpiResult( ppi_request, TCPA_PPI_BIOSFAIL );
+ }else{
+ WritePpiResult( ppi_request, (UINT16)EFI_SUCCESS );
+ }
+ }else{
+ WritePpiResult( ppi_request, (UINT16)EFI_SUCCESS );
+ }
+ }
+ else if(ppi_request == TCPA_PPIOP_SETNOPPICLEAR_FALSE){
+ if(TpmNvflags.NoPpiClear != FALSE){
+ TpmNvflags.NoPpiClear = 0;
+ Status = OemTpmBiosPolicy->SetBiosTpmflags(&TpmNvflags);
+ if(Status){
+ WritePpiResult( ppi_request, TCPA_PPI_BIOSFAIL );
+ }else{
+ WritePpiResult( ppi_request, (UINT16)EFI_SUCCESS );
+ }
+ } else{
+ WritePpiResult( ppi_request, (UINT16)EFI_SUCCESS );
+ }
+ }else if(ppi_request == TCPA_PPIOP_SETNOPPICLEAR_TRUE){
+ if(TpmNvflags.NoPpiClear != TRUE){
+ TpmNvflags.NoPpiClear = TRUE;
+ Status = OemTpmBiosPolicy->SetBiosTpmflags(&TpmNvflags);
+ if(Status){
+ WritePpiResult( ppi_request, TCPA_PPI_BIOSFAIL );
+ }else{
+ WritePpiResult( ppi_request, (UINT16)EFI_SUCCESS );
+ }
+ }else{
+ WritePpiResult( ppi_request, (UINT16)EFI_SUCCESS );
+ }
+
+ }else if(ppi_request == TCPA_PPIOP_SETNOPPIMAINTENANCE_FALSE){
+ if(TpmNvflags.NoPpiMaintenance != FALSE){
+ TpmNvflags.NoPpiMaintenance = FALSE;
+ Status = OemTpmBiosPolicy->SetBiosTpmflags(&TpmNvflags);
+ if(Status){
+ WritePpiResult( ppi_request, TCPA_PPI_BIOSFAIL );
+ }else{
+ WritePpiResult( ppi_request, (UINT16)EFI_SUCCESS );
+ }
+ }else{
+ WritePpiResult( ppi_request, (UINT16)EFI_SUCCESS );
+ }
+ }else if(ppi_request == TCPA_PPIOP_SETNOPPIMAINTENANCE_TRUE){
+ if(TpmNvflags.NoPpiMaintenance != TRUE){
+ TpmNvflags.NoPpiMaintenance = TRUE;
+ Status = OemTpmBiosPolicy->SetBiosTpmflags(&TpmNvflags);
+ if(Status){
+ WritePpiResult( ppi_request, TCPA_PPI_BIOSFAIL );
+ }else{
+ WritePpiResult( ppi_request, (UINT16)EFI_SUCCESS );
+ }
+ }
+ }else{
+ WritePpiResult( ppi_request, (UINT16)EFI_SUCCESS );
+ }
+
+ RequestSystemReset( EfiResetCold);
+ }else
+ {
+
+ if(ppi_request != 0)
+ {
+ if ( execute_request( ppi_request ) == 0 )
+ {
+ ppi_request = 0;
+ RequestSystemReset( EfiResetCold);
+ }
+ else {
+ pST->ConOut->OutputString(
+ pST->ConOut,
+ L"\n\r Error trying to complete TPM request.\n\r" );
+ RequestSystemReset( EfiResetCold);
+ }
+ }
+ }
+}
+
+
+
+#if TPM_PASSWORD_AUTHENTICATION
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: OnAdminPasswordValid
+//
+// Description: Sets AdminPasswordValid to TRUE [If TPM_PASSWORD_AUTHENTICATION]
+//
+//
+// Input: IN EFI_EVENT ev,
+// IN VOID *ctx
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS OnAdminPasswordValid(
+ IN EFI_EVENT ev,
+ IN VOID *ctx )
+{
+ AdminPasswordValid = TRUE;
+ return EFI_SUCCESS;
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: OnPasswordSupplied
+//
+// Description: Sets PasswordSupplied to TRUE and runs PPI User Interface
+//
+//
+// Input: IN EFI_EVENT ev,
+// IN VOID *ctx
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS OnPasswordSupplied(
+ IN EFI_EVENT ev,
+ IN VOID *ctx )
+{
+ PasswordSupplied = TRUE;
+ run_PPI_UI( ev, ctx);
+ return EFI_SUCCESS;
+}
+
+
+//****************************************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: check_authenticate_set
+//
+// Description: checks if password authentication set in Setup
+//
+//
+// Input:
+//
+// Output: BOOLEAN
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//****************************************************************************************
+BOOLEAN check_authenticate_set( )
+{
+ EFI_STATUS Status;
+ SETUP_DATA *sd = NULL;
+ BOOLEAN CheckPassword = FALSE;
+
+ if ( AuthenticateSet )
+ {
+ return TRUE;
+ }
+ Status = getSetupData( &sd, NULL, NULL );
+
+ if ( !EFI_ERROR( Status ))
+ {
+ CheckPassword = sd->TpmAuthenticate;
+ }
+
+ if ( CheckPassword )
+ {
+ AuthenticateSet = TRUE;
+ return TRUE;
+ }
+ return FALSE;
+}
+
+//****************************************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: check_user_is_administrator
+//
+// Description: check if user was authenticated as an administrator (optional)
+//
+//
+// Input:
+//
+// Output: BOOLEAN
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//****************************************************************************************
+BOOLEAN check_user_is_administrator( )
+{
+ if ( check_authenticate_set( ))
+ {
+ if ( AdminPasswordValid )
+ {
+ return TRUE;
+ }
+ else {
+ return FALSE;
+ }
+ }
+ return TRUE;
+}
+
+
+EFI_STATUS PasswordAuthHelperFunction( )
+{
+ UINT32 GlobalVariable = 0;
+ EFI_STATUS Status;
+ EFI_EVENT ev;
+ static VOID *reg;
+
+ //
+ // Hook Up Admin Password Notification ;
+ //
+ AuthenticateSet = check_authenticate_set( );
+ AdminPasswordValid = FALSE;
+ PasswordSupplied = FALSE;
+ {
+ Status = pBS->CreateEvent( EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_NOTIFY,
+ OnAdminPasswordValid,
+ &reg,
+ &ev );
+ ASSERT( !EFI_ERROR( Status ));
+ Status = pBS->RegisterProtocolNotify( &gAmitseAdminPasswordValidGuid,
+ ev,
+ &reg );
+ }
+
+ {
+ Status = pBS->CreateEvent( EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_NOTIFY,
+ OnPasswordSupplied,
+ &reg,
+ &ev );
+ ASSERT( !EFI_ERROR( Status ));
+ Status = pBS->RegisterProtocolNotify( &gAmitsePasswordPromptExitGuid,
+ ev,
+ &reg );
+ }
+
+ Status = pRS->SetVariable(
+ L"AskPassword",
+ &TcgEfiGlobalVariableGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ sizeof (UINT32),
+ &GlobalVariable );
+
+ return Status;
+}
+
+
+
+#endif
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: ResetOSTcgVar
+//
+// Description: Function to reset TCG variables on certain scenerions
+//
+// Input:
+//
+// Output: VOID
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+void ResetOSTcgVar( )
+{
+ EFI_STATUS Status;
+ EFI_GUID AmitcgefiOsVariableGuid = AMI_TCG_EFI_OS_VARIABLE_GUID;
+ AMI_PPI_NV_VAR Temp;
+ UINT32 Attribs = EFI_VARIABLE_NON_VOLATILE
+ | EFI_VARIABLE_BOOTSERVICE_ACCESS;
+ UINTN TempSize = sizeof (AMI_PPI_NV_VAR);
+
+ Temp.RQST = 0;
+ Temp.RCNT = 0;
+ Temp.ERROR = 0;
+ Temp.Flag = 0;
+ Temp.AmiMisc = 0;
+
+ Status = pRS->GetVariable(
+ L"AMITCGPPIVAR",
+ &AmitcgefiOsVariableGuid,
+ &Attribs,
+ &TempSize,
+ &Temp );
+
+ if ( EFI_ERROR( Status ) || Temp.RQST != 0 )
+ {
+ Temp.RQST = 0;
+ Temp.RCNT = 0;
+ Temp.ERROR = 0;
+ Temp.Flag = 0;
+ Temp.AmiMisc = 0;
+
+ Status = TcgSetVariableWithNewAttributes(L"AMITCGPPIVAR", &AmitcgefiOsVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (AMI_PPI_NV_VAR), &Temp);
+
+ }
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: ProcessTcgPpiRequest
+//
+// Description: Process Tcg Ppi requests
+//
+// Input: NONE
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+EFIAPI ProcessTcgPpiRequest()
+{
+ EFI_STATUS Status;
+ UINT32 Temp = 0;
+ UINT32 Attribs = EFI_VARIABLE_NON_VOLATILE
+ | EFI_VARIABLE_BOOTSERVICE_ACCESS;
+ UINTN TempSize = sizeof (UINT32);
+ AMI_TCG_DXE_FUNCTION_OVERRIDE_PROTOCOL *POverride;
+ EFI_GUID Overrideguid =\
+ AMI_PROCESS_TCG_PPI_REQUEST_GUID;
+ TCG_PLATFORM_SETUP_PROTOCOL *ProtocolInstance;
+ EFI_GUID Policyguid = TCG_PLATFORM_SETUP_POLICY_GUID;
+ TCG_CONFIGURATION Config;
+#if defined TCGPPISPEC_1_2_SUPPORT && TCGPPISPEC_1_2_SUPPORT == 1
+ EFI_GUID Oempolicyguid = AMI_BIOSPPI_FLAGS_MANAGEMENT_GUID;
+ EFI_GUID FlagsStatusguid = AMI_TCG_CONFIRMATION_FLAGS_GUID;
+ PERSISTENT_BIOS_TPM_MANAGEMENT_FLAGS_PROTOCOL *OemTpmBiosPolicy;
+ PERSISTENT_BIOS_TPM_FLAGS TpmNvflags;
+#endif
+ EFI_TCG_PROTOCOL *tcg;
+ EFI_TPM_DEVICE_PROTOCOL *TpmDevice;
+ TPM_RESULT tpmStatus = 0;
+ UINT32 Intrqst;
+ UINT8 one = 1;
+ UINT8 zero = 0;
+
+
+ Status = pBS->LocateProtocol(&Overrideguid,
+ NULL,
+ &POverride );
+
+ if(!EFI_ERROR(Status)){
+ return (POverride->Function());
+ }
+
+ Status = pBS->LocateProtocol (&Policyguid, NULL, &ProtocolInstance);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ //copy NV confirmation flags for O.S. request
+#if defined TCGPPISPEC_1_2_SUPPORT && TCGPPISPEC_1_2_SUPPORT == 1
+ Status = pBS->LocateProtocol( &Oempolicyguid, NULL, &OemTpmBiosPolicy);
+ if(!EFI_ERROR(Status)){
+ Status = OemTpmBiosPolicy->ReadBiosTpmflags(&TpmNvflags);
+ if(EFI_ERROR(Status)){
+ TpmNvflags.NoPpiProvision = 0;
+ TpmNvflags.NoPpiClear = 0;
+ TpmNvflags.NoPpiMaintenance = 0;
+ }
+ }else{
+ //all request require confirmation
+ TpmNvflags.NoPpiProvision = 0;
+ TpmNvflags.NoPpiClear = 0;
+ TpmNvflags.NoPpiMaintenance = 0;
+ }
+
+ Status = TcgSetVariableWithNewAttributes(L"TPMPERBIOSFLAGS", &FlagsStatusguid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (PERSISTENT_BIOS_TPM_FLAGS), &TpmNvflags );
+
+#endif
+
+
+#if TPM_PASSWORD_AUTHENTICATION
+ Status = PasswordAuthHelperFunction( );
+#endif
+
+
+
+ ppi_request = ReadPpiRequest( );
+ ppi_request &= 0xFF;
+
+ Status = pRS->GetVariable(
+ L"TcgINTPPI",
+ &TcgEfiGlobalVariableGuid,
+ &Attribs,
+ &TempSize,
+ &Temp );
+
+ if(EFI_ERROR(Status)){
+ //if error do nothing. It is alright for
+ //this variable to not exist.
+ Temp = 0;
+ }
+
+ TRACE((TRACE_ALWAYS, "\n PPI_request is: %x \n", ppi_request));
+
+ if (Temp != 0)
+ {
+ MemCpy(&Config, &ProtocolInstance->ConfigFlags, sizeof(TCG_CONFIGURATION));
+
+ Config.PpiSetupSyncFlag = TRUE;
+
+ ProtocolInstance->UpdateStatusFlags(&Config, TRUE);
+
+ Status = pBS->LocateProtocol( &gEfiTpmDxeDeviceProtocolGuid,NULL, &TpmDevice);
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ Status = pBS->LocateProtocol( &gEfiTcgProtocolGuid, NULL, &tcg );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ if(!AutoSupportType()){
+ TpmDevice->Init( TpmDevice );
+
+ Intrqst = (TCPA_PPIOP_ENACTVOWNER << 4 | TCPA_PPIOP_OWNER_ON);
+ if ( Temp == Intrqst)
+ {
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_SetOwnerInstall, 1, &one );
+ WritePpiResult( ppi_request >> 04, (UINT16)( TPM_H2NL( tpmStatus )));
+ if(!AutoSupportType()){
+ TpmDevice->Close( TpmDevice );
+ }
+ Temp = 0;
+ Status = TcgSetVariableWithNewAttributes(L"TcgINTPPI", &TcgEfiGlobalVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (UINT32), &Temp );
+ RequestSystemReset( EfiResetCold );
+ }
+ //no ppi request so check for setup request
+ Intrqst = (TCPA_PPIOP_ENABLE_ACTV_CLEAR << 4 | TCPA_PPIOP_CLEAR);
+ if ( Temp == Intrqst)
+ {
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_ForceClear, 0, 0 );
+
+ if(!AutoSupportType()){
+ TpmDevice->Close( TpmDevice );
+ }
+ Temp = 0;
+ Status = TcgSetVariableWithNewAttributes(L"TcgINTPPI", &TcgEfiGlobalVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (UINT32), &Temp );
+
+ RequestSystemReset( EfiResetCold );
+ }
+
+ //no ppi request so check for setup request
+ Intrqst = (TCPA_PPIOP_ENABLE_ACTV_CLEAR_ENABLE_ACTV << 4 | TCPA_PPIOP_ENABLE_ACTV);
+ if ( Temp == Intrqst)
+ {
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_PhysicalEnable, 0, 0 );
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg,TPM_ORD_PhysicalSetDeactivated, 1,&zero );
+ }
+ WritePpiResult( ppi_request >> 04, (UINT16)( TPM_H2NL( tpmStatus )));
+ if(!AutoSupportType()){
+ TpmDevice->Close( TpmDevice );
+ }
+ Temp = 0;
+ Status = TcgSetVariableWithNewAttributes(L"TcgINTPPI", &TcgEfiGlobalVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (UINT32), &Temp );
+ RequestSystemReset( EfiResetCold );
+ }
+
+ Intrqst = (TCPA_PPIOP_ENABLE_ACTV_CLEAR_ENABLE_ACTV << 4 | TCPA_PPIOP_CLEAR_ENACT);
+ if ( Temp == Intrqst)
+ {
+ tpmStatus = SendTpmCommand( tcg, TPM_ORD_ForceClear, 0, 0 );
+ if(!tpmStatus)
+ {
+ WritePpiResult( ppi_request >> 04, (UINT16)( TPM_H2NL( tpmStatus )));
+ Temp = TCPA_PPIOP_ENABLE_ACTV_CLEAR_ENABLE_ACTV << 4 | TCPA_PPIOP_ENABLE_ACTV;
+
+ Status = TcgSetVariableWithNewAttributes(L"TcgINTPPI", &TcgEfiGlobalVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (UINT32), &Temp );
+
+ RequestSystemReset( EfiResetCold );
+ }
+ }
+ }
+ else
+ {
+ Intrqst = (TCPA_PPIOP_ENACTVOWNER << 4 | TCPA_PPIOP_OWNER_ON);
+ if ( Temp == Intrqst)
+ {
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_SetOwnerInstall, 1, &one );
+ WritePpiResult( ppi_request >> 04, (UINT16)( TPM_H2NL( tpmStatus )));
+ if(!AutoSupportType()){
+ TpmDevice->Close( TpmDevice );
+ }
+ Temp = 0;
+ Status = TcgSetVariableWithNewAttributes(L"TcgINTPPI", &TcgEfiGlobalVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (UINT32), &Temp );
+
+ RequestSystemReset( EfiResetCold );
+ }
+ //no ppi request so check for setup request
+ Intrqst = (TCPA_PPIOP_ENABLE_ACTV_CLEAR << 4 | TCPA_PPIOP_CLEAR);
+ if ( Temp == Intrqst)
+ {
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_ForceClear, 0, 0 );
+
+ if(!AutoSupportType()){
+ TpmDevice->Close( TpmDevice );
+ }
+ Temp = 0;
+ Status = TcgSetVariableWithNewAttributes(L"TcgINTPPI", &TcgEfiGlobalVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (UINT32), &Temp );
+
+ RequestSystemReset( EfiResetCold );
+ }
+
+ //no ppi request so check for setup request
+ Intrqst = (TCPA_PPIOP_ENABLE_ACTV_CLEAR_ENABLE_ACTV << 4 | TCPA_PPIOP_ENABLE_ACTV);
+ if ( Temp == Intrqst)
+ {
+ tpmStatus = SendTpmCommand( tcg, TCM_ORD_PhysicalEnable, 0, 0 );
+ if(!tpmStatus)
+ {
+ tpmStatus = SendTpmCommand( tcg,TCM_ORD_PhysicalSetDeactivated, 1,&zero );
+ }
+ WritePpiResult( ppi_request >> 04, (UINT16)( TPM_H2NL( tpmStatus )));
+ if(!AutoSupportType()){
+ TpmDevice->Close( TpmDevice );
+ }
+ Temp = 0;
+ Status = TcgSetVariableWithNewAttributes(L"TcgINTPPI", &TcgEfiGlobalVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ sizeof (UINT32), &Temp );
+ RequestSystemReset( EfiResetCold );
+ }
+ }
+ }
+
+ if(ppi_request == TCPA_PPIOP_UNOWNEDFIELDUPGRADE || ppi_request == TCPA_PPIOP_SETOPAUTH
+ || ppi_request == TCPA_PPIOP_SETNOPPIMAINTENANCE_FALSE || ppi_request == TCPA_PPIOP_SETNOPPIMAINTENANCE_TRUE){
+ //these commands are optional and not supported
+ return EFI_SUCCESS;
+ }
+
+
+ if(ppi_request > 0 && ppi_request <= TCPA_PPIOP_ENABLE_ACTV_CLEAR_ENABLE_ACTV)
+ {
+ EFI_EVENT ev;
+ static VOID *reg;
+
+ #if TPM_PASSWORD_AUTHENTICATION
+
+ AuthenticateSet = check_authenticate_set( );
+
+ #endif
+
+ Status = pBS->CreateEvent( EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ run_PPI_UI,
+ 0,
+ &ev );
+
+ if(EFI_ERROR(Status)){
+ return Status;
+ }
+
+ Status = pBS->RegisterProtocolNotify(
+ &gBdsAllDriversConnectedProtocolGuid,
+ ev,
+ &reg );
+ if(EFI_ERROR(Status)) {
+ return Status;
+ }
+ }
+
+ return Status;
+}
+
+
+
+AMI_TCG_PLATFORM_PROTOCOL AmiTcgPlatformProtocol = {
+ MEASURE_CPU_MICROCODE_DXE_FUNCTION,
+ MEASURE_PCI_OPTION_ROM_DXE_FUNCTION,
+ ProcessTcgSetup,
+ ProcessTcgPpiRequest,
+ SetTcgReadyToBoot,
+ GetProtocolVersion,
+ ResetOSTcgVar
+};
+
+
+EFI_STATUS
+EFIAPI AmiTcgPlatformDXE_Entry(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable )
+{
+ EFI_STATUS Status;
+
+ InitAmiLib( ImageHandle, SystemTable );
+
+ gAmiTcgPlatformImageHandle = ImageHandle;
+
+ Status = pBS->InstallProtocolInterface(
+ &ImageHandle,
+ &gAMITcgPlatformProtocolguid,
+ EFI_NATIVE_INTERFACE,
+ &AmiTcgPlatformProtocol);
+
+ LoadStrings( ImageHandle, &gHiiHandle );
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: SignalProtocolEvent
+//
+// Description:
+// Internal function that installs/uninstalls protocol with a specified
+// GUID and NULL interface. Such protocols can be used as event
+// signaling mechanism.
+//
+// Input:
+// IN EFI_GUID *TcgPasswordAuthenticationGuid - Pointer to the protocol GUID
+//
+// Output:
+// VOID
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID
+SignalProtocolEvent (
+ IN EFI_GUID *TcgPasswordAuthenticationGuid )
+{
+ EFI_HANDLE Handle = NULL;
+ pBS->InstallProtocolInterface (
+ &Handle, TcgPasswordAuthenticationGuid, EFI_NATIVE_INTERFACE, NULL
+ );
+ pBS->UninstallProtocolInterface (
+ Handle, TcgPasswordAuthenticationGuid, NULL
+ );
+ return;
+}
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformDxe.cif b/Board/EM/TCG2/Common/AmiTcgPlatformDxe.cif
new file mode 100644
index 0000000..079f6a6
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformDxe.cif
@@ -0,0 +1,15 @@
+<component>
+ name = "AmiTcgPlatformDxe"
+ category = ModulePart
+ LocalRoot = "Board\EM\TCG2\Common"
+ RefName = "AmiTcgPlatformDxe"
+[files]
+"AmiTcgPlatformDxe.sdl"
+"AmiTcgPlatformDxe.mak"
+"AmiTcgPlatformDxe.c"
+"AmiTcgPlatformDxe.h"
+"AmiTcgPlatformDxe.dxs"
+"AmiTcgPlatformDxeLib.h"
+"AmiTcgPlatformDxeLib.c"
+"AmiTcgPlatformDxeString.uni"
+<endComponent>
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformDxe.dxs b/Board/EM/TCG2/Common/AmiTcgPlatformDxe.dxs
new file mode 100644
index 0000000..6eceed8
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformDxe.dxs
@@ -0,0 +1,82 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformDxe/AmiTcgPlatformDxe.dxs 1 4/21/14 2:17p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:17p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformDxe/AmiTcgPlatformDxe.dxs $
+//
+// 1 4/21/14 2:17p Fredericko
+//
+// 1 10/08/13 12:04p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:55p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 3 7/25/11 3:44a Fredericko
+// [TAG] EIP65177
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Tcg Ppi Spec ver 1.2 update
+//
+// 2 3/29/11 2:27p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiTcgPlatformDxe.dxs
+//
+// Description: Dependency file for AmiTcgPlatformDxe
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include "TcgService.h"
+#include <Token.h>
+
+DEPENDENCY_START
+#if defined(TCGPPISPEC_1_2_SUPPORT)&&(TCGPPISPEC_1_2_SUPPORT==1)
+ EFI_TCG_PROTOCOL_GUID AND
+ AMI_BIOSPPI_FLAGS_MANAGEMENT_GUID
+#else
+ EFI_TCG_PROTOCOL_GUID
+#endif
+DEPENDENCY_END
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformDxe.h b/Board/EM/TCG2/Common/AmiTcgPlatformDxe.h
new file mode 100644
index 0000000..eb04d34
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformDxe.h
@@ -0,0 +1,425 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformDxe/AmiTcgPlatformDxe.h 1 4/21/14 2:17p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:17p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformDxe/AmiTcgPlatformDxe.h $
+//
+// 1 4/21/14 2:17p Fredericko
+//
+// 1 10/08/13 12:04p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 2 10/03/13 2:19p Fredericko
+//
+// 1 7/10/13 5:55p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 11 1/20/12 9:20p Fredericko
+//
+// 10 12/30/11 5:06p Fredericko
+// [TAG] EIP78141
+// [Category] New Feature
+// [Description] Added hooks to override generic TPM platform hash
+// functions.
+// [Files] 1. AmiTcgPlatform.sdl
+// 2. AmiTcgPlatformPei.h
+// 3. AmiTcgPlatformPeiLib.c
+// 4. AmiTcgPlatformPeiAfterMem.c
+// 5. AmiTcgPlatformDxe.c
+// 6. AmiTcgPlatformDxe.h
+//
+// 9 11/28/11 7:31p Fredericko
+// [TAG] EIP63922
+// [Category] Improvement
+// [Description] Support for Smbios label 30 and up. Callback on
+// publishing of Smbios tables
+// [Files] AmiTcgPlatformDxe.c
+//
+// 8 10/10/11 11:36a Fredericko
+// [TAG] EIP70220
+// [Category] Improvement
+// [Description] Remove dependency on CSM
+// [Files] TcgLegacy.sdl
+// AmiTcgPlatformDxe.c
+// AmiTcgPlatformDxe.h
+// xTcgDxe.c
+//
+// 7 10/10/11 12:12a Fredericko
+// [TAG] EIP70220
+// [Category] Improvement
+// [Description] Remove dependency on CSM
+// [Files] TcgLegacy.sdl
+// AmiTcgPlatformDxe.c
+// AmiTcgPlatformDxe.h
+// xTcgDxe.c
+//
+// 6 7/25/11 3:43a Fredericko
+// [TAG] EIP65177
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Tcg Ppi Spec ver 1.2 update
+//
+// 5 4/28/11 6:34p Fredericko
+// Removed VFR compile
+//
+// 4 4/26/11 1:54p Fredericko
+// Added support for function level override of specific functions. GUID
+// definitions added
+//
+// 3 4/06/11 10:40a Fredericko
+// Core 4.6.5.0 build error changes
+//
+// 2 3/29/11 2:27p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiTcgPlatformDxe.h
+//
+// Description: Header file for AmiTcgPlatformDxe
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include <EFI.h>
+#include "TcgPc.h"
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <TcgCommon.h>
+#include <token.h>
+#if SMBIOS_SUPPORT == 1
+ #include <SmBios.h>
+#endif
+#include <TcgMisc.h>
+#include <protocol\TcgService\TcgTcmService.h>
+#include <protocol\TcgService\TcgService.h>
+#include <Protocol\TpmDevice\TpmDevice.h>
+#include <Include/Setup.h>
+#include "Protocol/CpuIo.h"
+#include "Protocol/FirmwareVolume.h"
+#include "Protocol/DevicePath.h"
+
+#if ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+#include "Protocol/LegacyBios.h"
+#endif
+
+#include "Protocol/PciIo.h"
+#include "Protocol/Variable.h"
+#include "Protocol/Reset.h"
+#include "Protocol/SimpleTextOut.h"
+#include "Protocol/SimpleTextIn.h"
+#include "Protocol/UgaDraw.h"
+#include "AMIPostMgr.h"
+#if EFI_SPECIFICATION_VERSION>0x20000
+ #include "Include\UefiHii.h"
+ #include "Protocol/HiiDatabase.h"
+ #include "Protocol/HiiString.h"
+#else
+ #include "Protocol/HII.h"
+#endif
+#include <Protocol\SmmBase.h>
+#include <Protocol\SmmSwDispatch.h>
+#include <Include\Acpi.h>
+#include <Include\Acpi11.h>
+#include "AmiTcgPlatformDxeLib.h"
+#include <AcpiRes.h>
+
+
+
+
+//--------------------------------------------------------------------------
+//GUID Definitions
+//--------------------------------------------------------------------------
+#define EFI_SMBIOS_TABLE_GUID \
+ {0xeb9d2d31, 0x2d88, 0x11d3, 0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}
+
+#define AMI_TCG_PLATFORM_PROTOCOL_GUID\
+ {0x8c939604, 0x700, 0x4415, 0x9d, 0x62, 0x11, 0x61, 0xdb, 0x81, 0x64, 0xa6}
+
+#define AMI_PROCESS_TCG_PPI_REQUEST_GUID\
+ { 0x30ad2b83, 0xadd0, 0x414b, 0xb1, 0x1c, 0xf9, 0x3c, 0xc1, 0xd0, 0xb7,\
+ 0x9b}
+
+#define AMI_PROCESS_TCG_SETUP_GUID\
+ { 0xc77dd102, 0x1db4, 0x4997, 0xae, 0x37, 0x4e, 0x8c, 0x52, 0x1e, 0xf5,\
+ 0x67}
+
+#define AMI_MEASURE_CPU_MICROCODE_GUID\
+ { 0x5cf308b5, 0xfa23, 0x4100, 0x8a, 0x76, 0xf3, 0x26, 0xc2, 0x81, 0x48,\
+ 0x80}
+
+#define AMI_MEASURE_PCIOPROM_GUID\
+ { 0x76f3992d, 0x529e, 0x4efe, 0x8b, 0xbe, 0x8e, 0x1e, 0xd4, 0x32, 0xc2,\
+ 0x23}
+
+#define AMI_SET_TCG_READYTOBOOT_GUID\
+ { 0xa4524a9c, 0xb5e, 0x492d, 0xae, 0xc9, 0x30, 0x86, 0x31, 0xb1, 0x89,\
+ 0xb4}
+
+#define TCG_SMBIOS_EFI_TABLE_GROUP \
+ { 0xb3dae700, 0x2a77, 0x4ea4, 0xaf, 0x79, 0x32, 0x97, 0xb4, 0x84, 0xbe, 0x61 }
+
+
+EFI_GUID gEfiSmbiosTableGuid = EFI_SMBIOS_TABLE_GUID;
+
+#define MINI_SETUP_GUID { 0xB1DA0ADF, 0x4F77, 0x4070,\
+ { 0xA8, 0x8E, 0xBF, 0xFE, 0x1C, 0x60, 0x52, 0x9A } }
+
+#define GUID_VARIABLE_DECLARATION( Variable, Guid ) extern EFI_GUID Variable
+
+EFI_GUID gMicrocodeGuid = {
+ 0x17088572, 0x377F, 0x44ef, 0x8F, 0x4E, 0xB0, 0x9F, 0xFF, 0x46, 0xA0, 0x70
+};
+
+#if TPM_PASSWORD_AUTHENTICATION
+
+EFI_GUID gAmitseAdminPasswordValidGuid = AMITSE_ADMIN_PASSWORD_VALID_GUID;
+
+
+#define AMITSE_PASSWORD_PROMPT_EXIT_GUID { 0xb9b038b0, 0xe2b6, 0x4aab, \
+ 0x94, 0x35, 0x41, 0x65, 0xec, 0xfe, 0xd0, 0x32 }
+
+
+EFI_GUID gAmitsePasswordPromptExitGuid = AMITSE_PASSWORD_PROMPT_EXIT_GUID;
+
+#define AMITSE_PASSWORD_PROMPT_ENTER_GUID \
+{ 0x73e7e01, 0x2611, 0x4e85, 0xb8, 0x96, 0xa3, 0xb6, 0x76, 0x7c, 0xba, 0x0 }
+
+EFI_GUID gAmitsePasswordPromptEnterGuid = AMITSE_PASSWORD_PROMPT_ENTER_GUID;
+#endif
+
+EFI_GUID gEfiTcgProtocolGuid = EFI_TCG_PROTOCOL_GUID;
+EFI_GUID gDsdtGuidDxe = DSDT_GUID;
+EFI_GUID TcgEfiGlobalVariableGuid = TCG_EFI_GLOBAL_VARIABLE_GUID;
+
+
+#define TCG_DEACTIVED_ERROR 0x06
+
+//---------------------------------------------------------------------------
+// Structure Definitions
+//---------------------------------------------------------------------------
+#if defined CORE_REVISION && CORE_REVISION < 5
+typedef struct _EFI_LIST_ENTRY
+{
+ struct _EFI_LIST_ENTRY *ForwardLink;
+ struct _EFI_LIST_ENTRY *BackLink;
+} EFI_LIST_ENTRY;
+#endif
+
+typedef struct
+{
+ UINTN Signature;
+ EFI_LIST_ENTRY AllEntries; // All entries
+ EFI_GUID ProtocolID; // ID of the protocol
+ EFI_LIST_ENTRY Protocols; // All protocol interfaces
+ EFI_LIST_ENTRY Notify; // Registerd notification handlers
+} TCG_PROTOCOL_ENTRY;
+
+typedef struct
+{
+ UINTN Signature;
+ TCG_PROTOCOL_ENTRY *Protocol;
+ EFI_LIST_ENTRY Link; // All notifications for this protocol
+ EFI_EVENT Event; // Event to notify
+ EFI_LIST_ENTRY *Position; // Last position notified
+} TCG_PROTOCOL_NOTIFY;
+
+typedef struct
+{
+ UINT8 MajorVersion;
+ UINT8 MinorVersion;
+ UINT8 Reserve;
+ UINT8 Flag;
+} AMI_TCG_PROTOCOL_VERSION;
+
+
+
+
+//**********************************************************************
+// Function Declarations
+//**********************************************************************
+EFI_STATUS
+OnAcpiInstalled(IN EFI_EVENT ev,
+ IN VOID *ctx );
+
+
+
+EFI_STATUS measureCpuMicroCode();
+
+
+EFI_FORWARD_DECLARATION( AMI_TCG_PLATFORM_PROTOCOL );
+
+
+typedef
+EFI_STATUS
+(EFIAPI * MEASURE_CPU_MICROCODE)(
+
+);
+
+
+typedef
+EFI_STATUS
+(EFIAPI * MEASURE_HANDOFF_TABLES)(
+
+);
+
+
+typedef
+EFI_STATUS
+(EFIAPI * MEASURE_PCI_OPROMS)(
+
+);
+
+
+typedef
+EFI_STATUS
+(EFIAPI * PROCESS_TCG_SETUP)(
+
+);
+
+
+
+typedef
+EFI_STATUS
+(EFIAPI * PROCESS_TCG_PPI_REQUEST)(
+
+);
+
+
+
+typedef
+EFI_STATUS
+(EFIAPI * MEASURE_VARIABLES)(
+
+);
+
+
+typedef
+EFI_STATUS
+(EFIAPI * TCG_READY_TO_BOOT)(
+
+);
+
+typedef
+EFI_STATUS
+(EFIAPI * GET_PROTOCOL_VERSION)(
+ AMI_TCG_PROTOCOL_VERSION *
+);
+
+typedef
+EFI_STATUS
+(EFIAPI * GET_)(
+ AMI_TCG_PROTOCOL_VERSION *
+);
+
+
+typedef
+VOID
+(EFIAPI * RESETOSTCGVAR)(
+);
+
+
+typedef
+EFI_STATUS
+(EFIAPI * AMI_TCG_DXE_FUNCTION_OVERRIDE)(
+);
+
+
+
+typedef struct _AMI_TCG_DXE_FUNCTION_OVERRIDE_PROTOCOL
+{
+ AMI_TCG_DXE_FUNCTION_OVERRIDE Function;
+} AMI_TCG_DXE_FUNCTION_OVERRIDE_PROTOCOL;
+
+
+
+typedef EFI_STATUS (MEASURE_PCI_OPTION_ROM_FUNC_PTR)(
+);
+
+typedef EFI_STATUS (MEASURE_HANDOFF_TABLES_FUNC_PTR)(
+);
+
+
+typedef EFI_STATUS (MEASURE_CPU_MICROCODE_FUNC_PTR)(
+);
+
+
+typedef EFI_STATUS (MEASURE_BOOT_VAR_FUNC_PTR)(
+);
+
+#if (defined(TCGMeasureSecureBootVariables) && (TCGMeasureSecureBootVariables!= 0))
+typedef EFI_STATUS (MEASURE_SECURE_BOOT_FUNC_PTR)(
+);
+#endif
+
+
+typedef EFI_STATUS (MEASURES_TCG_BOOT_SEPARATORS_DXE_FUNC_PTR)(
+
+);
+
+
+typedef EFI_STATUS (MEASURE_WAKE_EVENT_DXE_FUNC_PTR)(
+);
+
+typedef UINT8 (SKIP_PHYSICAL_PRESENCE_LOCK_PTR)(
+);
+
+extern MEASURE_PCI_OPTION_ROM_FUNC_PTR *MeasurePCIOpromsFuncPtr;
+extern MEASURE_HANDOFF_TABLES_FUNC_PTR *MeasureHandoffTablesFuncPtr;
+extern MEASURE_CPU_MICROCODE_FUNC_PTR *MeasureCpuMicroCodeFuncPtr;
+extern MEASURE_BOOT_VAR_FUNC_PTR *MeasureAllBootVariablesFuncPtr;
+#if (defined(TCGMeasureSecureBootVariables) && (TCGMeasureSecureBootVariables != 0))
+extern MEASURE_SECURE_BOOT_FUNC_PTR *MeasureSecurebootVariablesFuncPtr;
+#endif
+extern MEASURES_TCG_BOOT_SEPARATORS_DXE_FUNC_PTR *MeasureSeparatorsFuncPtr;
+extern MEASURE_WAKE_EVENT_DXE_FUNC_PTR *MeasureWakeEventFuncPtr;
+
+typedef struct _AMI_TCG_PLATFORM_PROTOCOL
+{
+ MEASURE_CPU_MICROCODE MeasureCpuMicroCode;
+ MEASURE_PCI_OPROMS MeasurePCIOproms;
+ PROCESS_TCG_SETUP ProcessTcgSetup;
+ PROCESS_TCG_PPI_REQUEST ProcessTcgPpiRequest;
+ TCG_READY_TO_BOOT SetTcgReadyToBoot;
+ GET_PROTOCOL_VERSION GetProtocolVersion;
+ RESETOSTCGVAR ResetOSTcgVar;
+} AMI_TCG_PLATFORM_PROTOCOL;
+
+extern EFI_GUID gEfiTcgProtocolGuid;
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformDxe.mak b/Board/EM/TCG2/Common/AmiTcgPlatformDxe.mak
new file mode 100644
index 0000000..0db5de0
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformDxe.mak
@@ -0,0 +1,172 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformDxe/AmiTcgPlatformDxe.mak 1 4/21/14 2:17p Fredericko $
+#
+# $Revision: 1 $
+#
+# $Date: 4/21/14 2:17p $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformDxe/AmiTcgPlatformDxe.mak $
+#
+# 1 4/21/14 2:17p Fredericko
+#
+# 1 10/08/13 12:04p Fredericko
+# Initial Check-In for Tpm-Next module
+#
+# 1 7/10/13 5:55p Fredericko
+# [TAG] EIP120969
+# [Category] New Feature
+# [Description] TCG (TPM20)
+#
+# 7 9/27/11 10:31p Fredericko
+# [TAG] EIP67286
+# [Category] Improvement
+# [Description] changes for Tcg Setup policy
+# [Files] Tcg.sdl
+# TcgPei.cif
+# TcgPei.mak
+# xtcgPei.c
+# xTcgPeiAfterMem.c
+# TcgPeiAfterMem.mak
+# TcgDxe.cif
+# TcgDxe.mak
+# xTcgDxe.c
+# AmiTcgPlatformPeilib.c
+# AmiTcgPlatformDxelib.c
+#
+# 6 9/02/11 6:16p Fredericko
+#
+# 4 5/31/11 1:56p Daniels
+# [TAG] EIP58387
+# [Category] Improvement
+# [Description] Add StrGather flags to allow strings to be overridden
+# with TCGDXE_SDBS eLink.
+# [Files] AmiTcgPlatformDxe.sdl, AmiTcgPlatformDxe.mak
+#
+# 3 4/22/11 8:58p Fredericko
+# Changes for x32bit mode build
+#
+# 2 3/29/11 2:26p Fredericko
+# [TAG] EIP 54642
+# [Category] Improvement
+# [Description] 1. Checkin Files related to TCG function override
+# 2. Include TCM and TPM auto detection
+# [Files] Affects all TCG files
+#
+#
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: AmiTcgPlatformDxe
+#
+# Description: Make file for AmiTcgPlatformDxe
+#
+#<AMI_FHDR_END>
+#************************************************************************
+all : AmiTcgPlatformDxe $(BUILD_DIR)\AmiTcgLibDxe.lib
+
+
+
+#---------------------------------------------------------------------------
+# $(BUILD_DIR)\AmiTcgLibDxe.lib
+#---------------------------------------------------------------------------
+$(BUILD_DIR)\AmiTcgLibDxe.lib : $(BUILD_DIR)\AmiTcgPlatformDxe.mak MakeAmiTcgDxeLib
+
+AMITCGLIB_CFLAGS=$(CFLAGS)\
+ /I$(TCG_DIR)\
+ /I$(TPM12_DIR)\
+ /I$(TCG_DIR)\Common\
+ /I$(AMI_TCG_PLATFORM_DXE_DIR)
+
+AMI_TCG_LIB_OBJECTS = \
+ $(BUILD_DIR)\$(AMI_TCG_PLATFORM_DXE_DIR)\AmiTcgPlatformDxeLib.obj \
+
+
+!IFNDEF LIB_BUILD_DIR
+!IF "$(PROCESSOR)"=="x64"
+AMITCMLIB = $(BUILD_DIR)\IA32\AmiTcmlib.lib
+!ELSE
+AMITCMLIB = $(BUILD_DIR)\AmiTcmlib.lib
+!ENDIF
+!ENDIF #LIB_BUILD_DIR
+
+MakeAmiTcgDxeLib: $(BUILD_DIR)\AmiTcmlib.lib
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\AmiTcgPlatformDxe.mak all\
+ "CFLAGS=$(AMITCGLIB_CFLAGS) "\
+ OBJECTS="$(AMI_TCG_LIB_OBJECTS)"\
+ NAME=AmiTcgLibDxe\
+ MAKEFILE=$(BUILD_DIR)\AmiTcgPlatformDxe.mak \
+ TYPE=LIBRARY
+
+
+#---------------------------------------------------------------------------
+# Making AmiTcgPlatformDxe
+#---------------------------------------------------------------------------
+AmiTcgPlatformDxe : $(BUILD_DIR)\AmiTcgPlatformDxe.mak AmiTcgPlatformDxebin
+
+$(BUILD_DIR)\AmiTcgPlatformDxe.mak : $(AMI_TCG_PLATFORM_DXE_DIR)\$(@B).cif $(AMI_TCG_PLATFORM_DXE_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(AMI_TCG_PLATFORM_DXE_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+
+TCGDXEOVERRIDE_CFLAGS=$(CFLAGS)\
+ /I$(TcgPlatformSetupPolicy_DIR)\
+ /I$(TCG_DIR)\
+ /I$(TPM12_DIR)\
+ /I$(TCG_DIR)\Common\
+ /I$(TCG_DIR)\protocol\TcgService\
+ /I$(TCG_DIR)\protocol\TpmDevice\
+ /I$(PROJECT_DIR)\Include\Protocol\
+
+AmiTcgPlatformDXE_OBJECTS = \
+$(BUILD_DIR)\$(AMI_TCG_PLATFORM_DXE_DIR)\AmiTcgPlatformDxe.obj \
+
+
+AmiTcgPlatformDxebin: $(AMIDXELIB) $(BUILD_DIR)\AmiTcgLibDxe.lib
+ @echo CFLAGS=$(CFLAGS)
+ @echo TCGDXEOVERRIDE_CFLAGS=$(TCGDXEOVERRIDE_CFLAGS)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\AmiTcgPlatformDxe.mak all\
+ "CFLAGS=$(TCGDXEOVERRIDE_CFLAGS)"\
+ "CPFLAGS=$(TCGDXEOVERRIDE_CFLAGS)"\
+ GUID=A29A63E3-E4E7-495f-8A6A-07738300CBB3 \
+ ENTRY_POINT=AmiTcgPlatformDXE_Entry \
+ TYPE=BS_DRIVER \
+ "OBJECTS=$(AmiTcgPlatformDXE_OBJECTS)"\
+ DEPEX1=$(AMI_TCG_PLATFORM_DXE_DIR)\AmiTcgPlatformDxe.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ COMPRESS=1 HAS_RESOURCES=1\
+!IF "$(TCGDXE_SDBS: =)"==""
+ "STRGATHER_FLAGS=-db $(BUILD_DIR)\$(AMI_TCG_PLATFORM_DXE_DIR)\AmiTcgPlatformDxeString.sdb"\
+!ELSE
+ "STRGATHER_FLAGS=-db $(BUILD_DIR)\$(AMI_TCG_PLATFORM_DXE_DIR)\AmiTcgPlatformDxeString.sdb -db $(TCGDXE_SDBS: = -db )"\
+!ENDIF
+#---------------------------------------------------------------------------
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformDxe.sdl b/Board/EM/TCG2/Common/AmiTcgPlatformDxe.sdl
new file mode 100644
index 0000000..72db6d9
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformDxe.sdl
@@ -0,0 +1,41 @@
+TOKEN
+ Name = "AMI_TCG_PLATFORM_DXE_SUPPORT"
+ Value = "1"
+ Help = "Disable AmiTcgPlatformDxe"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Token = "TPM12Enabled" "!=" "0"
+End
+
+PATH
+ Name = "AMI_TCG_PLATFORM_DXE_DIR"
+End
+
+MODULE
+ Help = "Includes AmiTcgPlatform.mak to Project"
+ File = "AmiTcgPlatformDxe.mak"
+End
+
+TOKEN
+ Name = "SMBIOS_VER_32"
+ Value = "0"
+ Help = "Projects support smbios version 4.6.3_SMBIOS_32 and later"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+
+ELINK
+ Name = "$(BUILD_DIR)\AmiTcgPlatformDxe.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "TCGDXE_SDBS"
+ InvokeOrder = ReplaceParent
+END \ No newline at end of file
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformDxeLib.c b/Board/EM/TCG2/Common/AmiTcgPlatformDxeLib.c
new file mode 100644
index 0000000..4ac3182
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformDxeLib.c
@@ -0,0 +1,1275 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformDxe/AmiTcgPlatformDxeLib.c 2 6/09/14 4:58p Fredericko $
+//
+// $Revision: 2 $
+//
+// $Date: 6/09/14 4:58p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformDxe/AmiTcgPlatformDxeLib.c $
+//
+// 2 6/09/14 4:58p Fredericko
+// Changes for SetVariable vulnerability during Runtime
+//
+// 1 4/21/14 2:17p Fredericko
+//
+// 2 3/14/14 3:24p Fredericko
+//
+// 1 10/08/13 12:04p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:55p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 7 10/30/12 10:47a Fredericko
+//
+// 6 5/20/12 2:14p Fredericko
+//
+// 5 9/27/11 10:33p Fredericko
+// [TAG] EIP67286
+// [Category] Improvement
+// [Description] changes for Tcg Setup policy
+// [Files] Tcg.sdl
+// TcgPei.cif
+// TcgPei.mak
+// xtcgPei.c
+// xTcgPeiAfterMem.c
+// TcgPeiAfterMem.mak
+// TcgDxe.cif
+// TcgDxe.mak
+// xTcgDxe.c
+// AmiTcgPlatformPeilib.c
+// AmiTcgPlatformDxelib.c
+//
+// 4 7/25/11 3:46a Fredericko
+// [TAG] EIP65177
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Tcg Ppi Spec ver 1.2 update
+//
+// 3 3/29/11 5:52p Fredericko
+// Changes for core 464 and ACPI tables support
+//
+// 2 3/29/11 2:28p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiTcgPlatformDxeLib.c
+//
+// Description: Function file for AmiTcgPlatformDxe library
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include "AmiTcgPlatformDxeLib.h"
+
+
+EFI_GUID TcgBoardEfiGlobalVariableGuid = TCG_EFI_GLOBAL_VARIABLE_GUID;
+EFI_GUID AmitcgefiOsVariableGuid = AMI_TCG_EFI_OS_VARIABLE_GUID;
+
+
+EFI_GUID gSetupGuid = SETUP_GUID;
+EFI_GUID gTcgAcpiSupportGuid= EFI_ACPI_SUPPORT_GUID;
+EFI_GUID gEfiAmiboardTcgWakeEventDataHobGuid = EFI_TCG_WAKE_EVENT_DATA_HOB_GUID;
+EFI_GUID gEfiAmiboardHobListGuid = TCG_EFI_HOB_LIST_GUID;
+
+static UINT8 TcgAMLDATA;
+
+EFI_SMM_SYSTEM_TABLE *mSmst;
+EFI_SMM_BASE_PROTOCOL *pSmmBase;
+
+EFI_GUID gDsdtGuid = DSDT_GUID;
+
+EFI_STATUS getSetupData (
+ SETUP_DATA** ppsd,
+ UINT32 * pattr,
+ UINTN * psz );
+
+
+
+#define GET_HOB_TYPE( Hob ) ((Hob).Header->HobType)
+#define GET_HOB_LENGTH( Hob ) ((Hob).Header->HobLength)
+#define GET_NEXT_HOB( Hob ) ((Hob).Raw + GET_HOB_LENGTH( Hob ))
+#define END_OF_HOB_LIST( Hob ) (GET_HOB_TYPE( Hob ) == \
+ EFI_HOB_TYPE_END_OF_HOB_LIST)
+extern
+BOOLEAN
+__stdcall AutoSupportType ();
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: GetHob
+//
+// Description: Find instance of a HOB type in a HOB list
+//
+//
+// Input: IN UINT16 Type,
+// IN VOID *HobStart
+//
+// Output: VOID*
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+VOID* GetHob(
+ IN UINT16 Type,
+ IN VOID *HobStart )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ Hob.Raw = HobStart;
+
+ //
+ // Return input if not found
+ //
+ if ( HobStart == NULL )
+ {
+ return HobStart;
+ }
+
+ //
+ // Parse the HOB list, stop if end of list or matching type found.
+ //
+ while ( !END_OF_HOB_LIST( Hob ))
+ {
+ if ( Hob.Header->HobType == Type )
+ {
+ break;
+ }
+
+ Hob.Raw = GET_NEXT_HOB( Hob );
+ }
+
+ //
+ // Return input if not found
+ //
+ if ( END_OF_HOB_LIST( Hob ))
+ {
+ return HobStart;
+ }
+
+ return (VOID*)(Hob.Raw);
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: CompareGuid
+//
+// Description: Compares two input GUIDs
+//
+//
+// Input: IN EFI_GUID *G1,
+// IN EFI_GUID *G2
+//
+// Output: BOOLEAN
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+BOOLEAN CompareGuid(
+ IN EFI_GUID *G1,
+ IN EFI_GUID *G2 )
+{
+ UINT32 *p1 = (UINT32*)G1, *p2 = (UINT32*)G2;
+ UINTN i;
+
+ for ( i = 0; i < 4; ++i )
+ {
+ if ( p1[i] != p2[i] )
+ {
+ return FALSE;
+ }
+ }
+ return TRUE;
+ ;
+}
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: GetNextGuidHob
+//
+// Description: Find GUID HOB
+//
+// Input: HobStart A pointer to the start hob.
+// Guid A pointer to a guid.
+// Output:
+// Buffer A pointer to the buffer.
+// BufferSize Buffer size.
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS GetNextGuidHob(
+ IN OUT VOID **HobStart,
+ IN EFI_GUID * Guid,
+ OUT VOID **Buffer,
+ OUT UINTN *BufferSize OPTIONAL )
+{
+ EFI_STATUS Status;
+ EFI_PEI_HOB_POINTERS GuidHob;
+
+ if ( Buffer == NULL )
+ {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for ( Status = EFI_NOT_FOUND; EFI_ERROR( Status );)
+ {
+ GuidHob.Raw = *HobStart;
+
+ if ( END_OF_HOB_LIST( GuidHob ))
+ {
+ return EFI_NOT_FOUND;
+ }
+
+ GuidHob.Raw = GetHob( EFI_HOB_TYPE_GUID_EXTENSION, *HobStart );
+
+ if ( GuidHob.Header->HobType == EFI_HOB_TYPE_GUID_EXTENSION )
+ {
+ if ( CompareGuid( Guid, &GuidHob.Guid->Name ))
+ {
+ Status = EFI_SUCCESS;
+ *Buffer = (VOID*)((UINT8*)(&GuidHob.Guid->Name)
+ + sizeof (EFI_GUID));
+
+ if ( BufferSize != NULL )
+ {
+ *BufferSize = GuidHob.Header->HobLength
+ - sizeof (EFI_HOB_GUID_TYPE);
+ }
+ }
+ }
+
+ *HobStart = GET_NEXT_HOB( GuidHob );
+ }
+
+ return Status;
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: LocateATcgHob
+//
+// Description: Finds a Tcg HOB
+//
+//
+// Input: IN UINTN NoTableEntries,
+// IN EFI_CONFIGURATION_TABLE *ConfigTable,
+// IN EFI_GUID *HOB_guid
+//
+// Output: VOID*
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+VOID* LocateATcgHob(
+ IN UINTN NoTableEntries,
+ IN EFI_CONFIGURATION_TABLE *ConfigTable,
+ IN EFI_GUID *HOB_guid )
+{
+ VOID *HobStart;
+ VOID *PtrHob;
+
+ while ( NoTableEntries > 0 )
+ {
+ NoTableEntries--;
+
+ if ((!MemCmp(
+ &ConfigTable[NoTableEntries].VendorGuid,
+ &gEfiAmiboardHobListGuid, sizeof(EFI_GUID)
+ )))
+ {
+ HobStart = ConfigTable[NoTableEntries].VendorTable;
+
+ if ( !EFI_ERROR(
+ GetNextGuidHob( &HobStart, HOB_guid, &PtrHob, NULL )
+ ))
+ {
+ return PtrHob;
+ }
+ }
+ }
+ return NULL;
+}
+
+
+
+
+//*******************************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: GetTcgWakeEventType
+//
+// Description: Reads and Reports the source of the wake-up event.
+//
+// Input: IN OUT UINT8 *pWake - output parameter returns the indication of the
+// type of the wakup source:
+// one of the following:
+// SMBIOS_WAKEUP_TYPE_OTHERS
+// SMBIOS_WAKEUP_TYPE_UNKNOWN
+// SMBIOS_WAKEUP_TYPE_APM_TIMER
+// SMBIOS_WAKEUP_TYPE_MODEM_RING
+// SMBIOS_WAKEUP_TYPE_LAN_REMOTE
+// SMBIOS_WAKEUP_TYPE_POWER_SWITCH
+// SMBIOS_WAKEUP_TYPE_PCI_PME
+// SMBIOS_WAKEUP_TYPE_AC_POWER_RESTORED
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//******************************************************************************
+EFI_STATUS GetTcgWakeEventType(
+ IN OUT UINT8 *pWake )
+{
+ EFI_BOOT_MODE *BootMode = NULL;
+ UINTN NoTableEntries;
+ EFI_CONFIGURATION_TABLE *ConfigTable;
+ VOID *HobStart;
+
+ *pWake = SMBIOS_WAKEUP_TYPE_UNKNOWN;
+
+ NoTableEntries = pST->NumberOfTableEntries,
+ ConfigTable = pST->ConfigurationTable;
+
+ while ( NoTableEntries > 0 )
+ {
+ NoTableEntries--;
+
+ if ( !MemCmp(
+ &ConfigTable[NoTableEntries].VendorGuid,
+ &gEfiAmiboardHobListGuid, sizeof(EFI_GUID)
+ ))
+ {
+ HobStart = ConfigTable[NoTableEntries].VendorTable;
+
+ if ( !EFI_ERROR(
+ GetNextGuidHob( &HobStart,
+ &gEfiAmiboardTcgWakeEventDataHobGuid,
+ &BootMode, NULL )
+ ))
+ {
+ break;
+ }
+ }
+ }
+
+ if ( BootMode != NULL )
+ {
+ if ( *BootMode == BOOT_ON_S4_RESUME || *BootMode == BOOT_ON_S5_RESUME
+ || *BootMode == BOOT_WITH_FULL_CONFIGURATION )
+ {
+ *pWake = (UINT8)SMBIOS_WAKEUP_TYPE_POWER_SWITCH;
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgGetDSDTTable
+//
+// Description: Gets Acpi DSDT table
+//
+//
+// Input:
+//
+// Output: VOID *
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+VOID* TcgGetDSDTTable(EFI_ACPI_SUPPORT_PROTOCOL * mTcgAcpiSupport )
+{
+ INTN Index;
+ PACPI_HDR Table;
+ UINTN Handle;
+ EFI_STATUS Status;
+ EFI_ACPI_TABLE_VERSION Version;
+
+
+ if(mTcgAcpiSupport == NULL)return NULL;
+
+ for ( Index = 0;; ++Index )
+ {
+ Status = mTcgAcpiSupport->GetAcpiTable(
+ mTcgAcpiSupport,
+ Index,
+ &Table,
+ &Version,
+ &Handle
+ );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return 0;
+ }
+
+ if (((PACPI_HDR)Table)->Signature == FACP_SIG )
+ {
+ return (VOID*)(UINTN)((PFACP32)Table )->DSDT;
+ }
+ }
+}
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgConvertAslName
+//
+// Description: converts String a to ASL string NAME
+//
+//
+// Input: IN UINT8 *AslName
+//
+// Output: UINT32
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+UINT32 TcgConvertAslName(
+ IN UINT8 *AslName )
+{
+ AML_NAME_SEG n;
+ //Limit to 4 characters
+ UINTN l = Strlen( AslName );
+
+ //-------------------------
+ n.NAME = 0x5F5F5F5F;
+ MemCpy( &n.Name[0], AslName, l );
+ return n.NAME;
+}
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgFindAslObjectName
+//
+// Description: converts String a to ASL string NAME
+//
+//
+// Input: IN UINT8 *Start,
+// IN UINT8 *ObjName,
+// IN UINTN Len
+//
+// Output: VOID *
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+VOID* TcgFindAslObjectName(
+ IN UINT8 *Start,
+ IN UINT8 *ObjName,
+ IN UINTN Len )
+{
+ unsigned int i;
+ UINT8 *p;
+ AML_NAME_SEG *obj, nm;
+
+ //------------------------------
+ nm.NAME = TcgConvertAslName( ObjName );
+
+ p = Start;
+
+ for ( i = 0; i < Len; i++ )
+ {
+ obj = (AML_NAME_SEG*)(&p[i]);
+
+ if ( obj->NAME != nm.NAME )
+ {
+ continue;
+ }
+ return &p[i];
+ }
+ return NULL;
+}
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgCheckOpCode
+//
+// Description: converts String a to ASL string NAME
+//
+//
+// Input: IN UINT8 *NameStart,
+// IN UINT8 OpCode,
+// IN UINT8 ExtOpCode,
+// IN OUT ASL_OBJ_INFO *ObjInfo
+//
+// Output: BOOLEAN
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+BOOLEAN TcgCheckOpCode(
+ IN UINT8 *NameStart,
+ IN UINT8 OpCode,
+ IN UINT8 ExtOpCode,
+ IN OUT ASL_OBJ_INFO *ObjInfo )
+{
+ UINT8 *p;
+
+ //---------------------
+ //Maximum number of bytes in PackageLength is 4
+ if ((*(NameStart - 1)) == TCGAML_PR_ROOT || (*(NameStart - 1)) ==
+ TCGAML_PR_PARENT )
+ {
+ NameStart--;
+ }
+
+ //if we Looking For ASL Name Object its a special case.
+ if ( OpCode == TCGAML_OP_NAME && !ExtOpCode )
+ {
+ p = NameStart - 1;
+
+ if ( *p == OpCode )
+ {
+ ObjInfo->Object = p;
+ ObjInfo->ObjName = NameStart;
+ ObjInfo->Length = 0;
+ return TRUE;
+ }
+ return FALSE;
+ }
+
+ //if we Looking For ASL Name Object its a special case.
+ if ( OpCode == TCGAML_OP_OPREG && ExtOpCode )
+ {
+ p = NameStart - 2;
+
+ if ( *p == ExtOpCode && *(p + 1) == OpCode )
+ {
+ ObjInfo->Object = p;
+ ObjInfo->ObjName = NameStart;
+ ObjInfo->Length = 0;
+ return TRUE;
+ }
+ return FALSE;
+ }
+ return FALSE;
+}
+
+
+EFI_STATUS TcgSetVariableWithNewAttributes(
+ IN CHAR16 *Name, IN EFI_GUID *Guid, IN UINT32 Attributes,
+ IN UINTN DataSize, IN VOID *Data
+)
+{
+ EFI_STATUS Status;
+
+ Status = pRS->SetVariable(Name, Guid, Attributes, DataSize, Data);
+ if (!EFI_ERROR(Status) || Status != EFI_INVALID_PARAMETER) return Status;
+
+ Status = pRS->SetVariable(Name, Guid, 0, 0, NULL);
+ if (EFI_ERROR(Status)) return Status;
+
+ return pRS->SetVariable(Name, Guid, Attributes, DataSize, Data);
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgGetAslObj
+//
+// Description: converts String a to ASL string NAME
+//
+//
+// Input: IN UINT8 *Start,
+// IN UINTN Length,
+// IN UINT8 *Name,
+// IN ASL_OBJ_TYPE ObjType,
+// IN ASL_OBJ_INFO *ObjInfo
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS TcgGetAslObj(
+ IN UINT8 *Start,
+ IN UINTN Length,
+ IN UINT8 *Name,
+ IN ASL_OBJ_TYPE ObjType,
+ IN ASL_OBJ_INFO *ObjInfo )
+{
+ UINT8 *pn, *s, eop, op;
+ UINTN l, i;
+ BOOLEAN objfound = FALSE;
+
+ s = Start;
+ l = Length;
+
+ while ( !objfound )
+ {
+ pn = TcgFindAslObjectName( s, Name, l );
+
+ if ( !pn )
+ {
+ return EFI_NOT_FOUND;
+ }
+
+ //If we found the name let's check if it is the Object we are looking for
+ //it could be just object referance, or field definition inside the object,
+ //or double name, or multiple name definition we must filter such situations
+ // and make sure we have got the actual object but not its reference instance
+ switch ( ObjType )
+ {
+ case otScope:
+ i = 0;
+ eop = 0;
+ op = TCGAML_OP_SCOPE;
+ break;
+ case otName:
+ i = 0;
+ eop = 0;
+ op = TCGAML_OP_NAME;
+ break;
+ case otProc:
+ i = 6;
+ eop = TCGAML_PR_EXTOP;
+ op = TCGAML_OP_PROC;
+ break;
+ case otTermal:
+ i = 0;
+ eop = TCGAML_PR_EXTOP;
+ op = TCGAML_OP_THERMAL;
+ break;
+ case otDevice:
+ i = 0;
+ eop = TCGAML_PR_EXTOP;
+ op = TCGAML_OP_DEVICE;
+ break;
+ case otMethod:
+ i = 1;
+ eop = 0;
+ op = TCGAML_OP_METHOD;
+ break;
+ case otPwrRes:
+ i = 3;
+ eop = TCGAML_PR_EXTOP;
+ op = TCGAML_OP_PWRRES;
+ break;
+ case otOpReg:
+ i = 0;
+ eop = TCGAML_PR_EXTOP;
+ op = TCGAML_OP_OPREG;
+ break;
+
+ default: return EFI_NOT_FOUND;
+ } //switch
+
+ objfound = TcgCheckOpCode( pn, op, eop, ObjInfo );
+
+ if ( !objfound )
+ {
+ l -= (UINTN)( pn - s ) - 4;
+ s = pn + 4;
+ continue;
+ }
+ ObjInfo->ObjType = ObjType;
+ ObjInfo->DataStart = pn + i + 4;
+
+ return EFI_SUCCESS;
+ }
+
+ return EFI_NOT_FOUND;
+}
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: LocateACPITableProtocol
+//
+// Description: Locates ACPI Table Protocol
+//
+//
+// Input: IN EFI_GUID *Protocol,
+// OUT VOID **Instance
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+#if !defined(AmiBoardInfo_SUPPORT) || (AmiBoardInfo_SUPPORT==0)
+EFI_STATUS LocateACPITableProtocol(
+ IN EFI_GUID *Protocol,
+ OUT VOID **Instance )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ EFI_FV_FILETYPE FileType;
+ UINT32 FvStatus = 0;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINTN Size;
+ UINTN i;
+
+
+ Status = pBS->LocateHandleBuffer( ByProtocol,
+ Protocol,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+
+ for ( i = 0; i < NumberOfHandles; i++ )
+ {
+ Status = pBS->HandleProtocol( HandleBuffer[i], Protocol, Instance );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ Status = ((EFI_FIRMWARE_VOLUME_PROTOCOL*)(*Instance))->ReadFile(
+ *Instance,
+ &
+ gDsdtGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus );
+
+ if ( Status == EFI_SUCCESS )
+ {
+ break;
+ }
+ }
+ pBS->FreePool( HandleBuffer );
+ return Status;
+}
+#endif
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: read_PPI_request
+//
+// Description: Reads and returns TCG PPI requests Value
+//
+//
+// Input:
+//
+// Output: UINT8
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+UINT8 ReadPpiRequest( )
+{
+ UINTN Size = sizeof(AMI_PPI_NV_VAR);
+ AMI_PPI_NV_VAR Temp;
+ EFI_STATUS Status;
+
+ Status = pRS->GetVariable( L"AMITCGPPIVAR", \
+ &AmitcgefiOsVariableGuid, \
+ NULL, \
+ &Size, \
+ &Temp );
+
+ if(Status == EFI_NOT_FOUND)
+ {
+ Temp.RQST = 0;
+ Temp.RCNT = 0;
+ Temp.ERROR = 0;
+ Temp.Flag = 0;
+ Temp.AmiMisc = 0;
+
+ Status = TcgSetVariableWithNewAttributes(L"AMITCGPPIVAR", &AmitcgefiOsVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ Size, &Temp );
+ }
+
+ return Temp.RQST;
+}
+
+
+
+
+
+//****************************************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: write_PPI_result
+//
+// Description: Updates TCG PPI variable in NVRAM
+//
+//
+// Input: IN UINT8 last_op,
+// IN UINT16 status
+//
+// Output: VOID
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//****************************************************************************************
+void WritePpiResult(
+ IN UINT8 last_op,
+ IN UINT16 status )
+{
+ UINTN Size = sizeof(AMI_PPI_NV_VAR);
+ AMI_PPI_NV_VAR Temp;
+ EFI_STATUS Status;
+ UINT8 Manip = 0;
+
+ Status = pRS->GetVariable( L"AMITCGPPIVAR", \
+ &AmitcgefiOsVariableGuid, \
+ NULL, \
+ &Size, \
+ &Temp );
+
+ //now set variable to data
+ Temp.RQST = Manip;
+ Manip = (UINT8)( status & 0xFFFF );
+ Temp.ERROR = Manip;
+
+ if(status>0xFF && status<0xFFFF)
+ {
+ Temp.AmiMisc = (UINT8)(status >> 8);
+ }else{
+ Temp.AmiMisc = 0;
+ }
+
+ if ( EFI_ERROR( Status ))
+ {
+ TRACE((TRACE_ALWAYS, "Error Setting Return value\n"));
+ return;
+ }
+
+ Status = TcgSetVariableWithNewAttributes(L"AMITCGPPIVAR", &AmitcgefiOsVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ Size, &Temp );
+}
+
+
+
+//****************************************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: getSetupData
+//
+// Description: Retrieved SETUP_DATA structure from NVRAM
+//
+//
+// Input: IN OUT SETUP_DATA** ppsd,
+// IN UINT32* pattr,
+// IN UINTN* psz
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//****************************************************************************************
+EFI_STATUS getSetupData(
+ IN OUT SETUP_DATA** ppsd,
+ IN UINT32 * pattr,
+ IN UINTN * psz )
+{
+ EFI_STATUS Status;
+ UINTN sz = 0;
+
+ *ppsd = NULL;
+ Status = pRS->GetVariable( L"Setup", &gSetupGuid, pattr, &sz, *ppsd );
+
+ if ( !EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ if ( Status == EFI_BUFFER_TOO_SMALL )
+ {
+ Status = pBS->AllocatePool( EfiBootServicesData, sz, ppsd );
+
+ if ( !(*ppsd))
+ {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ Status = pRS->GetVariable( L"Setup", &gSetupGuid, pattr, &sz, *ppsd );
+ }
+
+ if ( psz != NULL )
+ {
+ *psz = sz;
+ }
+ return Status;
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: GetDsdt
+//
+// Description: Locates ACPI Table Protocol
+//
+//
+// Input: IN OUT mem_in *dsdt
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+#if !defined(AmiBoardInfo_SUPPORT) || (AmiBoardInfo_SUPPORT==0)
+EFI_STATUS GetDsdt(
+ IN OUT mem_in *dsdt )
+{
+ EFI_FIRMWARE_VOLUME_PROTOCOL *fv;
+ EFI_STATUS Status;
+ UINT32 FvStatus;
+
+ //---------------------------------------------
+ Status = pBS->LocateProtocol( &gEfiFirmwareVolumeProtocolGuid, NULL, &fv );
+ Status = LocateACPITableProtocol( &gEfiFirmwareVolumeProtocolGuid, &fv );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return EFI_ABORTED;
+ }
+
+ dsdt->address = 0;
+ Status
+ = fv->ReadSection( fv,
+ &gDsdtGuid,
+ EFI_SECTION_RAW,
+ 0,
+ (VOID**)&dsdt->address,
+ &((UINTN)dsdt->size),
+ &FvStatus );
+
+
+ if ( EFI_ERROR( Status ))
+ {
+ dsdt->address = 0;
+ dsdt->datat = 3;
+ dsdt->size = 0;
+ }
+ else {
+ dsdt->datat = 2;
+ }
+
+
+ return EFI_SUCCESS;
+}
+#endif
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgUpdateAslNameObject
+//
+// Description: Locates ACPI Table Protocol
+//
+//
+// Input: IN PACPI_HDR PDsdt,
+// IN UINT8 *ObjName,
+// IN UINT64 Value
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS TcgUpdateAslNameObject(
+ IN PACPI_HDR PDsdt,
+ IN UINT8 *ObjName,
+ IN UINT64 Value )
+{
+ EFI_STATUS Status;
+ ASL_OBJ_INFO obj;
+ UINT32 Length;
+ UINT8 *ptr;
+
+
+ Length = PDsdt->Length - sizeof(ACPI_HDR);
+ ptr = (UINT8*)PDsdt + sizeof(ACPI_HDR);
+
+ Status = TcgGetAslObj( ptr, Length, ObjName, otName, &obj );
+
+
+ switch ( *((UINT8*)obj.DataStart))
+ {
+ case TCGAML_PR_BYTE: {
+ UINT8 *p = (UINT8*)((UINT8*)obj.DataStart + 1);
+ //----------------------------------
+ *p = (UINT8)Value;
+ } break;
+
+ case TCGAML_PR_WORD: {
+ UINT16 *p = (UINT16*)((UINT8*)obj.DataStart + 1);
+ //----------------------------------
+ *p = (UINT16)Value;
+ } break;
+
+ case TCGAML_PR_DWORD: {
+ UINT32 *p = (UINT32*)((UINT8*)obj.DataStart + 1);
+ //----------------------------------
+ *p = (UINT32)Value;
+ } break;
+
+ case TCGAML_PR_QWORD: {
+ UINT64 *p = (UINT64*)((UINT8*)obj.DataStart + 1);
+ //----------------------------------
+ *p = (UINT64)Value;
+ } break;
+
+ case TCGAML_ZERO_OP: case TCGAML_ONE_OP: {
+ if ((Value == 0) || (Value == 1))
+ {
+ UINT8 *p = (UINT8*)((UINT8*)obj.DataStart);
+ *p = (UINT8)Value;
+ }
+ else {
+ return EFI_INVALID_PARAMETER;
+ }
+ } break;
+ default: {
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgUpdateAslObj
+//
+// Description: Updates TPM acpi variable for TPM support
+//
+//
+// Input: IN EFI_EVENT ev,
+// IN VOID *ctx,
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS TcgUpdateAslObj(
+ IN EFI_EVENT ev,
+ IN VOID *ctx )
+{
+ EFI_STATUS Status;
+ PACPI_HDR DsdtTable;
+ EFI_ACPI_SUPPORT_PROTOCOL *mTcgAcpiSupport;
+
+ Status = pBS->LocateProtocol( &gTcgAcpiSupportGuid, NULL, &mTcgAcpiSupport );
+
+ if ( EFI_ERROR( Status ))
+ {
+ TRACE((TRACE_ALWAYS, "TcgBoard_c:Unable to locate AcpiSupport\n"));
+ return Status;
+ }
+
+ DsdtTable = TcgGetDSDTTable(mTcgAcpiSupport);
+
+ if ( !DsdtTable )
+ {
+ TRACE((TRACE_ALWAYS, "TcgBoard.c::DSDT Table not found.\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ Status = TcgUpdateAslNameObject( DsdtTable, "TPMF", TcgAMLDATA );
+
+ //also update TCM flags
+ if(AutoSupportType()){
+ TcgAMLDATA = 0x1;
+ Status = TcgUpdateAslNameObject( DsdtTable, "TCMF", TcgAMLDATA );
+ }else{
+ TcgAMLDATA = 0x0;
+ Status = TcgUpdateAslNameObject( DsdtTable, "TCMF", TcgAMLDATA );
+ }
+
+ TRACE((TRACE_ALWAYS, "TcgBoard_c:TCGUpdateAslNameOpject_DONE\n"));
+
+ return Status;
+}
+
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: UpDateASL
+//
+// Description: Update TCG ASL Support in ACPI base
+//
+//
+// Input: IN UINT8 TcgSupport
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS UpDateASL(
+ IN UINT8 TcgSupport )
+{
+ EFI_EVENT ev;
+ static VOID *reg;
+ EFI_STATUS Status;
+ VOID *ctx;
+ EFI_ACPI_SUPPORT_PROTOCOL *mTcgAcpiSupport;
+
+ TcgAMLDATA = TcgSupport;
+
+ Status = pBS->LocateProtocol( &gTcgAcpiSupportGuid, NULL, &mTcgAcpiSupport );
+
+ if ( EFI_ERROR( Status ))
+ {
+ Status = pBS->CreateEvent( EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_DRIVER, TcgUpdateAslObj, &reg, &ev );
+ ASSERT( !EFI_ERROR( Status ));
+ Status = pBS->RegisterProtocolNotify( &gTcgAcpiSupportGuid, ev, &reg );
+
+ return Status;
+ }
+ ev = NULL;
+ ctx = NULL;
+
+ Status = TcgUpdateAslObj( ev, ctx );
+ return Status;
+}
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2013, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformDxeLib.h b/Board/EM/TCG2/Common/AmiTcgPlatformDxeLib.h
new file mode 100644
index 0000000..349a4bb
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformDxeLib.h
@@ -0,0 +1,201 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformDxe/AmiTcgPlatformDxeLib.h 1 4/21/14 2:17p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:17p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformDxe/AmiTcgPlatformDxeLib.h $
+//
+// 1 4/21/14 2:17p Fredericko
+//
+// 1 10/08/13 12:04p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:55p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 4 7/25/11 3:45a Fredericko
+// [TAG] EIP65177
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Tcg Ppi Spec ver 1.2 update
+//
+// 3 4/28/11 6:34p Fredericko
+// Removed VFR compile
+//
+// 2 3/29/11 2:27p Fredericko
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiTcgPlatformDxeLib.h
+//
+// Description: Header firl for AmiTcgPlatformDxe library
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include <Protocol\SmmBase.h>
+#include <Protocol\SmmSwDispatch.h>
+#include <token.h>
+#include <Include\Acpi.h>
+#include <Include\Acpi11.h>
+#include <Include/Setup.h>
+#include <AmiDxeLib.h>
+#include <AcpiRes.h>
+#include <TcgMisc.h>
+#include <HOB.h>
+#include "Protocol/CpuIo.h"
+#include "Protocol/AcpiSupport.h"
+#include "TcgPc.h"
+
+#define TCPA_PPIOP_ENABLE 1
+#define TCPA_PPIOP_DISABLE 2
+#define TCPA_PPIOP_ACTIVATE 3
+#define TCPA_PPIOP_DEACTIVATE 4
+#define TCPA_PPIOP_CLEAR 5
+#define TCPA_PPIOP_ENABLE_ACTV 6
+#define TCPA_PPIOP_DEACT_DSBL 7
+#define TCPA_PPIOP_OWNER_ON 8
+#define TCPA_PPIOP_OWNER_OFF 9
+#define TCPA_PPIOP_ENACTVOWNER 10
+#define TCPA_PPIOP_DADISBLOWNER 11
+#define TCPA_PPIOP_UNOWNEDFIELDUPGRADE 12
+#define TCPA_PPIOP_SETOPAUTH 13
+#define TCPA_PPIOP_CLEAR_ENACT 14
+#define TCPA_PPIOP_SETNOPPIPROVISION_FALSE 15
+#define TCPA_PPIOP_SETNOPPIPROVISION_TRUE 16
+#define TCPA_PPIOP_SETNOPPICLEAR_FALSE 17
+#define TCPA_PPIOP_SETNOPPICLEAR_TRUE 18
+#define TCPA_PPIOP_SETNOPPIMAINTENANCE_FALSE 19
+#define TCPA_PPIOP_SETNOPPIMAINTENANCE_TRUE 20
+#define TCPA_PPIOP_ENABLE_ACTV_CLEAR 21
+#define TCPA_PPIOP_ENABLE_ACTV_CLEAR_ENABLE_ACTV 22
+#define EFI_TPL_DRIVER 6
+
+#define TCGAML_PR_BYTE 0x0A
+#define TCGAML_PR_WORD 0x0B
+#define TCGAML_PR_DWORD 0x0C
+#define TCGAML_PR_QWORD 0x0E
+#define TCGAML_ZERO_OP 0x00
+#define TCGAML_ONE_OP 0x01
+
+//Opcode Definition for Name Object
+#define TCGAML_OP_ALIAS 0x06
+#define TCGAML_OP_NAME 0x08
+#define TCGAML_OP_SCOPE 0x10
+#define TCGAML_OP_ALIAS 0x06
+#define TCGAML_OP_NAME 0x08
+#define TCGAML_OP_SCOPE 0x10
+#define TCGAML_OP_BUFFER 0x11
+#define TCGAML_OP_PACKAGE 0x12
+#define TCGAML_OP_VARPACK 0x13
+#define TCGAML_OP_METHOD 0x14
+#define TCGAML_PR_EXTOP 0x5B //'['
+#define TCGAML_PR_PARENT 0x5E //'^'
+#define TCGAML_PR_ROOT 0x5C //'\'
+
+#define TCGAML_OP_RETURN 0xA4
+
+#define TCGAML_OP_OPREG 0x80
+#define TCGAML_OP_DEVICE 0x82
+#define TCGAML_OP_PROC 0x83
+#define TCGAML_OP_PWRRES 0x84
+#define TCGAML_OP_THERMAL 0x85
+
+#ifndef SMBIOS_WAKEUP_TYPE_UNKNOWN
+#define SMBIOS_WAKEUP_TYPE_UNKNOWN 0x02
+#endif
+#ifndef SMBIOS_WAKEUP_TYPE_POWER_SWITCH
+#define SMBIOS_WAKEUP_TYPE_POWER_SWITCH 0x06
+#endif
+
+#define AMI_TPM_HARDWARE_PRESET 0
+#define AMI_TPM_HARDWARE_NOTPRESET 1
+#define AMI_TPM_HARDWARE_SETUP_REQUEST_ERROR 1
+
+
+EFI_STATUS GetDsdt(
+ IN OUT mem_in *dsdt );
+
+EFI_STATUS getSetupData (
+ SETUP_DATA** ppsd,
+ UINT32 * pattr,
+ UINTN * psz );
+
+EFI_STATUS GetTcgWakeEventType(
+ IN OUT UINT8 *pWake );
+
+EFI_STATUS UpDateASL(
+ IN UINT8 TcgSupport );
+
+UINT8 ReadPpiRequest( );
+
+void Update_PpiVar(
+ IN UINT8 value );
+
+void WritePpiResult(
+ IN UINT8 last_op,
+ IN UINT16 status );
+
+VOID* LocateATcgHob(
+ IN UINTN NoTableEntries,
+ IN EFI_CONFIGURATION_TABLE *ConfigTable,
+ IN EFI_GUID *HOB_guid );
+
+
+#if TPM_PASSWORD_AUTHENTICATION
+BOOLEAN check_authenticate_set();
+
+BOOLEAN check_user_is_administrator( );
+#endif
+
+
+EFI_STATUS readTpmSetup(
+ IN OUT UINT8* enable_old,
+ IN OUT UINT8* enable,
+ IN OUT UINT8* operation,
+ IN OUT UINT8* support );
+
+
+EFI_STATUS UpdateTpmSetup(
+ IN UINT8 enabled,
+ IN UINT8 op );
+
+EFI_STATUS UpdateTpmCapSetup(
+ IN UINT8 EnaDis,
+ IN UINT8 ActDeact,
+ IN UINT8 OwnUnOwned,
+ IN UINT8 Hardware,
+ IN UINT8 TpmError);
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformDxeString.uni b/Board/EM/TCG2/Common/AmiTcgPlatformDxeString.uni
new file mode 100644
index 0000000..e6ba91f
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformDxeString.uni
Binary files differ
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformPei.cif b/Board/EM/TCG2/Common/AmiTcgPlatformPei.cif
new file mode 100644
index 0000000..3578811
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformPei.cif
@@ -0,0 +1,14 @@
+<component>
+ name = "AmiTcgPlatformPei"
+ category = ModulePart
+ LocalRoot = "Board\EM\TCG2\Common"
+ RefName = "AmiTcgPlatformPei"
+[files]
+"AmiTcgPlatformPei.h"
+"AmiTcgPlatformPei.dxs"
+"AmiTcgPlatformPei.sdl"
+"AmiTcgPlatformPeiLib.c"
+[parts]
+"AmiTcgPlatformPeiBeforeMem"
+"AmiTcgPlatformPeiAfterMem"
+<endComponent>
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformPei.dxs b/Board/EM/TCG2/Common/AmiTcgPlatformPei.dxs
new file mode 100644
index 0000000..8987919
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformPei.dxs
@@ -0,0 +1,70 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformPei/AmiTcgPlatformPei.dxs 1 4/21/14 2:17p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:17p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformPei/AmiTcgPlatformPei.dxs $
+//
+// 1 4/21/14 2:17p Fredericko
+//
+// 1 10/08/13 12:03p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:54p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 2 3/29/11 2:19p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiTcgPlatformPei.dxs
+//
+// Description: Dependency file
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include "PPI\TcgService\TcgService.h"
+
+DEPENDENCY_START
+ PEI_TCG_PPI_GUID
+DEPENDENCY_END
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformPei.h b/Board/EM/TCG2/Common/AmiTcgPlatformPei.h
new file mode 100644
index 0000000..a8c8b9f
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformPei.h
@@ -0,0 +1,338 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformPei/AmiTcgPlatformPei.h 1 4/21/14 2:17p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:17p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformPei/AmiTcgPlatformPei.h $
+//
+// 1 4/21/14 2:17p Fredericko
+//
+// 1 10/08/13 12:03p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:54p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 6 12/30/11 4:40p Fredericko
+// [TAG] EIP78141
+// [Category] New Feature
+// [Description] Added hooks to override generic TPM platform hash
+// functions.
+// [Files] 1. AmiTcgPlatform.sdl
+// 2. AmiTcgPlatformPei.h
+// 3. AmiTcgPlatformPeiLib.c
+// 4. AmiTcgPlatformPeiAfterMem.c
+// 5. AmiTcgPlatformDxe.c
+// 6. AmiTcgPlatformDxe.h
+//
+// 5 9/01/11 2:25p Fredericko
+// [TAG] EIP66113
+// [Category] Improvement
+// [Description] Support LTsx on server platforms where startup commands
+// are sent by the ACM binaries.
+// [Files] AmiTcgPlatformPeiBoardBeforeMem.c
+// AmiTcgPlatformPeiLib.c
+// AmiTcgPlatformPei.h
+//
+// 4 4/28/11 6:30p Fredericko
+// Removed VFR compile
+//
+// 3 4/26/11 1:51p Fredericko
+// Added support for function level override of specific functions. GUID
+// definitions added and generic function override definition also added.
+//
+// 2 3/29/11 2:18p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiTcgPlatformPei.h
+//
+// Description: Header file for AmiTcgPlatformPei
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include <Include/Setup.h>
+
+#define AMI_TCG_PLATFORM_PPI_BEFORE_MEM_GUID\
+ {0xc1e6791d, 0xf35b, 0x43ef, 0x92, 0xa, 0xbe, 0x6, 0xba, 0x7f, 0x86, 0xa1}
+
+#define AMI_TCG_PLATFORM_PPI_AFTER_MEM_GUID\
+ {0x890c2cef, 0x43c8, 0x4209, 0xa7, 0x8d, 0xae, 0x14, 0xaa, 0x17, 0x98, 0xb4}
+
+#define EFI_PEI_PERMANENT_MEMORY_INSTALLED_PPI \
+ {0xf894643d, 0xc449, 0x42d1, 0x8e, 0xa8, 0x85, 0xbd, 0xd8, 0xc6, 0x5b, 0xde}
+
+#define TCG_LOCK_DOWN_VAR_GUID\
+ {0x6e605536, 0xa30a, 0x4d56, 0x93, 0x9e, 0x1c, 0x37, 0x3f, 0x79, 0x8d, 0x7b}
+
+#define AMI_MEMORY_ABSENT_OVERRIDE_GUID\
+ { 0x9c109e5e, 0xbf38, 0x4a78, 0x9c, 0xac, 0x43, 0xde, 0x7e, 0x72, 0x6f,\
+ 0x9e}
+
+#define AMI_VERIFY_TCG_VARIABLES_GUID\
+ { 0x4f44fa64, 0xa8d6, 0x4c19, 0xb6, 0x1d, 0x63, 0x10, 0x9d, 0x77, 0xd3,\
+ 0xd2}
+
+#define AMI_MEMORY_PRESENT_FUNCTION_OVERRIDE_GUID\
+ { 0x4d7161bc, 0xbe35, 0x43af, 0x87, 0x9b, 0x95, 0x6e, 0xb3, 0x79, 0x83,\
+ 0xd6}
+
+#define AMI_SET_PHYSICAL_PRESENCE_GUID\
+ { 0x126f424e, 0xf45b, 0x4406, 0x80, 0x1e, 0x2a, 0xac, 0xf4, 0x4, 0x16,\
+ 0x7f}
+
+#define AMI_SKIP_TPM_STARTUP_GUID \
+ { 0x6ee1b483, 0xa9b8, 0x4eaf, 0x9a, 0xe1, 0x3b, 0x28, 0xc5, 0xcf, 0xf3,\
+ 0x6b}
+
+
+#define EFI_MAX_BIT 0x80000000
+
+#define TCG_LOG_MAX_TABLE_SIZE 0x100
+#define _CR( Record, TYPE,\
+ Field )((TYPE*) ((CHAR8*) (Record) - (CHAR8*) &(((TYPE*) 0)->Field)))
+
+
+static EFI_GUID gSetupGuid = SETUP_GUID;
+
+#pragma pack (1)
+typedef struct
+{
+ EFI_PHYSICAL_ADDRESS PostCodeAddress;
+ #if x64_BUILD
+ UINT64 PostCodeLength;
+ #else
+ UINTN PostCodeLength;
+ #endif
+} EFI_TCG_EV_POST_CODE;
+
+typedef struct
+{
+ EFI_TCG_PCR_EVENT_HEADER Header;
+ EFI_TCG_EV_POST_CODE Event;
+} PEI_EFI_POST_CODE;
+
+typedef struct
+{
+ EFI_TCM_PCR_EVENT_HEADER Header;
+ EFI_TCG_EV_POST_CODE Event;
+} TCM_PEI_EFI_POST_CODE;
+#pragma pack ()
+
+typedef struct _TCG_PEI_MEMORY_CALLBACK
+{
+ EFI_PEI_NOTIFY_DESCRIPTOR NotifyDesc;
+ EFI_FFS_FILE_HEADER *FfsHeader;
+} TCG_PEI_MEMORY_CALLBACK;
+
+
+EFI_FORWARD_DECLARATION( AMI_TCG_PLATFORM_PPI );
+
+
+typedef
+EFI_STATUS
+(EFIAPI * SET_TPM_PHYSICAL_PRESENCE)(
+ IN EFI_PEI_SERVICES **PeiServices
+);
+
+
+typedef
+EFI_STATUS
+(EFIAPI * MEMORY_PRESENT_ENTRY)(
+ IN EFI_PEI_SERVICES **PeiServices
+);
+
+
+typedef
+EFI_STATUS
+(EFIAPI * MEMORY_ABSENT_ENTRY)(
+ IN EFI_PEI_SERVICES **PeiServices
+);
+
+
+typedef
+EFI_STATUS
+(EFIAPI * READ_RESET_MOR)(
+ IN EFI_PEI_SERVICES **PeiServices
+);
+
+typedef
+EFI_STATUS
+(EFIAPI * VERIFYTCGVARIABLES)(
+ IN EFI_PEI_SERVICES **PeiServices
+);
+
+
+
+TPM_Capabilities_PermanentFlag TCGPEI_GETCAP(
+ IN EFI_PEI_SERVICES **PeiServices );
+
+void
+EFIAPI xTcgPeiEntry(
+ IN PEI_TCG_PPI *tcg,
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **ps );
+
+
+//-----------------------------------------------------------
+//HELPER FUNCTIONS
+//-----------------------------------------------------------
+VOID OverwriteSystemMemory(
+IN EFI_PEI_SERVICES **PeiServices
+);
+
+
+EFI_STATUS MeasureCRTMVersion(
+ IN EFI_PEI_SERVICES **PeiServices
+);
+
+
+EFI_STATUS
+ MeasureTcmCRTMVersion(
+ IN EFI_PEI_SERVICES **PeiServices
+);
+
+EFI_STATUS TcgPeiTpmStartup(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_BOOT_MODE BootMode
+);
+
+EFI_STATUS SendStartupandSelftest(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_BOOT_MODE BootMode
+);
+
+TCM_Capabilities_PermanentFlag TCMPEI_GETCAP(
+IN EFI_PEI_SERVICES **PeiServices );
+
+
+EFI_STATUS MeasureDxeCoreFwVol(
+ IN PEI_TCG_PPI * tcg,
+ IN EFI_PEI_SERVICES **ps,
+ IN EFI_FIRMWARE_VOLUME_HEADER *fwv
+);
+
+BOOLEAN Lock_TPMPhysicalPresence(
+ IN EFI_PEI_SERVICES **PeiServices
+);
+
+
+EFI_STATUS ContinueTPMSelfTest(
+ IN EFI_PEI_SERVICES **ps
+);
+
+EFI_STATUS MeasureTCGPcClientSpecID(
+ IN EFI_PEI_SERVICES **ps,
+ IN PEI_TCG_PPI *tcg
+);
+
+EFI_STATUS LocateTcgPpi(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_TPM_PPI **gTpmDevicePpi,
+ IN PEI_TCG_PPI **gTcgPpi
+);
+
+EFI_STATUS LocateTcmPpi(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_TPM_PPI **gTpmDevicePpi,
+ IN PEI_TCM_PPI **gTcmPpi
+);
+
+
+EFI_STATUS TcgPeiBuildHobGuid(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_GUID *Guid,
+ IN UINTN DataLength,
+ OUT VOID **Hob );
+
+
+typedef
+EFI_STATUS
+(EFIAPI * AMI_TCG_PEI_FUNCTION_OVERRIDE)(
+ IN EFI_PEI_SERVICES **PeiServices
+);
+
+
+
+EFI_STATUS FindDxeCoreFile(
+ IN EFI_PEI_SERVICES **ps,
+ OUT EFI_FIRMWARE_VOLUME_HEADER **fwMain );
+
+typedef struct _AMI_TCG_PLATFORM_PPI_AFTER_MEM
+{
+ SET_TPM_PHYSICAL_PRESENCE SetPhysicalPresence;
+ MEMORY_PRESENT_ENTRY MemoryPresentFunctioOverride;
+ VERIFYTCGVARIABLES VerifyTcgVariables;
+} AMI_TCG_PLATFORM_PPI_AFTER_MEM;
+
+
+typedef struct _AMI_TCG_PLATFORM_PPI_BEFORE_MEM
+{
+ MEMORY_ABSENT_ENTRY MemoryAbsentFunctionOverride;
+} AMI_TCG_PLATFORM_PPI_BEFORE_MEM;
+
+
+typedef struct _AMI_TCG_PEI_FUNCTION_OVERRIDE_PPI
+{
+ AMI_TCG_PEI_FUNCTION_OVERRIDE Function;
+} AMI_TCG_PEI_FUNCTION_OVERRIDE_PPI;
+
+typedef EFI_STATUS (MEASURE_CRTM_VERSION_PEI_FUNC_PTR)(
+ IN EFI_PEI_SERVICES **PeiServices
+);
+
+typedef EFI_STATUS (MEASURE_TCG_PCCLIENT_ID_PEI_FUNC_PTR)(
+ IN EFI_PEI_SERVICES **ps,
+ IN PEI_TCG_PPI *tcg
+);
+
+typedef EFI_STATUS (MEASURE_CORE_DXE_FW_VOL_PEI_FUNC_PTR)(
+ IN PEI_TCG_PPI * tcg,
+ IN EFI_PEI_SERVICES **ps,
+ IN EFI_FIRMWARE_VOLUME_HEADER *fwv
+);
+
+extern MEASURE_CRTM_VERSION_PEI_FUNC_PTR *MeasureCRTMVersionFuncPtr;
+extern MEASURE_TCG_PCCLIENT_ID_PEI_FUNC_PTR *MeasureTCGPcClientSpecIDFuncPtr;
+extern MEASURE_CORE_DXE_FW_VOL_PEI_FUNC_PTR *MeasureDxeCoreFwVolFuncPtr;
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformPei.sdl b/Board/EM/TCG2/Common/AmiTcgPlatformPei.sdl
new file mode 100644
index 0000000..944669f
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformPei.sdl
@@ -0,0 +1,28 @@
+PATH
+ Name = "AMI_TCG_PLATFORM_PEI_DIR"
+End
+
+MODULE
+ Help = "Includes AmiTcgPlatform.mak to Project"
+ File = "AmiTcgPlatformPeiAfterMem.mak"
+End
+
+MODULE
+ Help = "Includes AmiTcgPlatform.mak to Project"
+ File = "AmiTcgPlatformPeiBeforeMem.mak"
+End
+
+
+
+ELINK
+ Name = "$(BUILD_DIR)\AmiTcgPlatformPeiAfterMem.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+End
+
+
+ELINK
+ Name = "$(BUILD_DIR)\AmiTcgPlatformPeiBeforeMem.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+End \ No newline at end of file
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformPeiAfterMem.c b/Board/EM/TCG2/Common/AmiTcgPlatformPeiAfterMem.c
new file mode 100644
index 0000000..70cd5d0
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformPeiAfterMem.c
@@ -0,0 +1,782 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformPei/AmiTcgPlatformPeiAfterMem/AmiTcgPlatformPeiAfterMem.c 1 4/21/14 2:17p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:17p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformPei/AmiTcgPlatformPeiAfterMem/AmiTcgPlatformPeiAfterMem.c $
+//
+// 1 4/21/14 2:17p Fredericko
+//
+// 1 10/08/13 12:04p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:54p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 18 9/19/12 10:33a Fredericko
+// [TAG] EIP90807
+// [Category] Improvement
+// [Description] MonotonicCounter variable guid changed.
+// [Files] xTcgPei.c, AmiTcgPlatformPeiAfterMem.c
+//
+// 17 4/27/12 6:19p Fredericko
+// Changes for fast system boot when TCG is enabled.
+//
+// 16 2/03/12 6:20p Fredericko
+// [TAG] EIP81665
+// [Category] Improvement
+// [Description] Support for MOR feature improvement. Remove Unneeded
+// Code.
+// [Files] Tcg.sdl, AmiTcgPlatformDxe.c, Tcgdxe.c, Tcglegacy.c
+//
+// 15 12/30/11 5:01p Fredericko
+// [TAG] EIP78141
+// [Category] New Feature
+// [Description] Added hooks to override generic TPM platform hash
+// functions.
+// [Files] 1. AmiTcgPlatform.sdl
+// 2. AmiTcgPlatformPei.h
+// 3. AmiTcgPlatformPeiLib.c
+// 4. AmiTcgPlatformPeiAfterMem.c
+// 5. AmiTcgPlatformDxe.c
+// 6. AmiTcgPlatformDxe.h
+//
+// 14 10/24/11 12:28p Fredericko
+//
+// 13 9/03/11 8:07p Fredericko
+//
+// 12 8/26/11 3:01p Fredericko
+//
+// 11 4/26/11 4:16p Fredericko
+//
+// 10 4/26/11 1:56p Fredericko
+// Added support for function level override of specific functions.
+//
+// 9 4/22/11 8:57p Fredericko
+// Added extra logic for verifying and setting physical presence.
+//
+// 8 4/01/11 10:54a Fredericko
+// Changes for TPM support in Legacy IO mode. Signal TpmPei driver to call
+// init function for TPM.
+//
+// 7 4/01/11 9:34a Fredericko
+// Updated function Header
+//
+// 6 3/31/11 4:59p Fredericko
+// Changes for TCG_LEGACY support
+//
+// 5 3/30/11 11:54a Fredericko
+//
+// 4 3/29/11 9:21p Fredericko
+// if startup or selftest fails, treat it as a fatal error; return
+//
+// 3 3/29/11 2:24p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiTcgPlatformPeiAfterMem.c
+//
+// Description: Function file for AmiTcgPlatformPeiAfterMem
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include <Efi.h>
+#include <Pei.h>
+#include <TcgCommon.h>
+#include <AmiPeiLib.h>
+#include <TcgMisc.h>
+#include "PPI\TcgService\TcgTcmService.h"
+#include "PPI\TcgService\TcgService.h"
+#include "PPI\TpmDevice\TpmDevice.h"
+#include "PPI\CpuIo.h"
+#include "PPI\LoadFile.h"
+#include <Ppi\ReadOnlyVariable.h>
+#include "AmiTcgPlatformPei.h"
+
+
+EFI_GUID gAMITcgPlatformPpiAfterMemGuid = AMI_TCG_PLATFORM_PPI_AFTER_MEM_GUID;
+EFI_GUID gAmiTcmSignalguid = AMI_TCM_CALLBACK_GUID;
+EFI_GUID gAmiLegacyTpmguid = AMI_TPM_LEGACY_GUID;
+
+static EFI_PEI_PPI_DESCRIPTOR TcmInitPpi[] = {
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gAmiTcmSignalguid,
+ NULL
+};
+
+static EFI_PEI_PPI_DESCRIPTOR LegacyTpmInitPpi[] = {
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gAmiLegacyTpmguid,
+ NULL
+};
+
+
+#if TCG_LEGACY == 1
+ EFI_STATUS Configure_Tpm_Chip( );
+#endif
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: VerifyTcgVariables
+//
+// Description: Function to check whether we need to reset TCG variables
+//
+//
+// Input: EFI_PEI_SERVICES **PeiServices
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS VerifyTcgVariables(
+ EFI_PEI_SERVICES **PeiServices )
+{
+ CHAR16 Monotonic[] = L"MonotonicCounter";
+#if defined(CORE_COMBINED_VERSION) && (CORE_COMBINED_VERSION > 262797)
+ EFI_GUID Guid = AMI_GLOBAL_VARIABLE_GUID;
+#else
+ EFI_GUID Guid = EFI_GLOBAL_VARIABLE;
+#endif
+ EFI_GUID TcgGuid = AMI_TCG_RESETVAR_HOB_GUID;
+ UINTN Size = sizeof(UINT32);
+ UINT32 Dummy;
+ EFI_PEI_READ_ONLY_VARIABLE_PPI *ReadOnlyVariable;
+ EFI_STATUS Status;
+ EFI_HOB_GUID_TYPE *Hob;
+ BOOLEAN ResetAllTcgVar = FALSE;
+ EFI_GUID gTcgReadOnlyVariablePpiGuid
+ = EFI_TCG_PEI_READ_ONLY_VARIABLE_PPI_GUID;
+ AMI_TCG_PEI_FUNCTION_OVERRIDE_PPI *VerifyVarOverride;
+ EFI_GUID VarOverrideguid = AMI_VERIFY_TCG_VARIABLES_GUID;
+
+
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &VarOverrideguid,
+ 0, NULL,
+ &VerifyVarOverride);
+
+ if(!EFI_ERROR(Status)){
+ return (VerifyVarOverride->Function(PeiServices));
+ }
+
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &gTcgReadOnlyVariablePpiGuid,
+ 0, NULL,
+ &ReadOnlyVariable
+ );
+
+ Status = ReadOnlyVariable->GetVariable( PeiServices, Monotonic, &Guid,
+ NULL, &Size, &Dummy );
+
+ // if not found, then this is the first boot
+ if ( EFI_ERROR( Status ))
+ {
+ ResetAllTcgVar = TRUE;
+ Status = TcgPeiBuildHobGuid(
+ PeiServices,
+ &TcgGuid,
+ sizeof (BOOLEAN),
+ &Hob );
+ Hob++;
+ (*PeiServices)->CopyMem( Hob, &ResetAllTcgVar, sizeof (ResetAllTcgVar));
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: Set_TPMPhysicalPresence
+//
+// Description: Sets TPM physical Presence
+//
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS Set_TPMPhysicalPresence(
+ IN EFI_PEI_SERVICES **PeiServices )
+{
+ EFI_STATUS Status;
+ TPM_RSP_COMMAND_HDR RspHdr;
+
+ AMI_TCG_PEI_FUNCTION_OVERRIDE_PPI *SetPhysicalOverride;
+ EFI_GUID Overrideguid = AMI_SET_PHYSICAL_PRESENCE_GUID;
+ struct
+ {
+ TPM_RQU_COMMAND_HDR CmdHdr;
+ UINT8 Data[0x4];
+ } cmd;
+
+ UINT16 physical_CMD_on = TPM_H2NS(TPM_PHYSICAL_PRESENCE_CMD_ENABLE );
+ UINT16 physical_on = TPM_H2NS(TPM_PHYSICAL_PRESENCE_PRESENT );
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCG_PPI *TcgPpi = NULL;
+
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &Overrideguid,
+ 0, NULL,
+ &SetPhysicalOverride);
+
+ if(!EFI_ERROR(Status)){
+ return (SetPhysicalOverride->Function(PeiServices));
+ }
+
+ cmd.CmdHdr.tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ cmd.CmdHdr.paramSize = TPM_H2NL((UINT32)( sizeof (cmd.CmdHdr)
+ + sizeof(TPM_PHYSICAL_PRESENCE)));
+
+ cmd.CmdHdr.ordinal = TPM_H2NL(TSC_ORD_PhysicalPresence );
+
+ if ( Lock_TPMPhysicalPresence( PeiServices ))
+ {
+ physical_on = TPM_H2NS( TPM_PHYSICAL_PRESENCE_LOCK );
+ }else{
+ if(*(UINT16 *)(UINTN)(PORT_TPM_IOMEMBASE + 0xF00) == 0x15D1){
+ Status = ContinueTPMSelfTest( PeiServices );
+ }
+ }
+
+ Status = LocateTcgPpi(PeiServices, &TpmPpi, &TcgPpi);
+ if(EFI_ERROR(Status))return EFI_NOT_FOUND;
+
+ Status = TpmPpi->Init( TpmPpi, PeiServices );
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ MemCpy( cmd.Data, &physical_CMD_on, sizeof(TPM_PHYSICAL_PRESENCE));
+
+ Status =TcgPpi->TCGPassThroughToTpm(
+ TcgPpi,
+ PeiServices,
+ (sizeof (cmd.CmdHdr) + sizeof(TPM_PHYSICAL_PRESENCE)),
+ (UINT8*)&cmd,
+ sizeof (RspHdr),
+ (UINT8*)&RspHdr );
+
+ MemCpy( cmd.Data, &physical_on, sizeof(TPM_PHYSICAL_PRESENCE));
+
+ Status = TcgPpi->TCGPassThroughToTpm(
+ TcgPpi,
+ PeiServices,
+ (sizeof (cmd.CmdHdr) + sizeof(TPM_PHYSICAL_PRESENCE)),
+ (UINT8*)&cmd,
+ sizeof (RspHdr),
+ (UINT8*)&RspHdr );
+
+ Status = TpmPpi->Close( TpmPpi, PeiServices );
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ if ( RspHdr.returnCode != 0 )
+ {
+ return EFI_DEVICE_ERROR;
+ }
+ return EFI_SUCCESS;
+}
+
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: Set_TCMPhysicalPresence
+//
+// Description: Sets TCM physical Presence
+//
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS Set_TCMPhysicalPresence(
+ IN EFI_PEI_SERVICES **PeiServices )
+{
+ EFI_STATUS Status;
+ TPM_RSP_COMMAND_HDR RspHdr;
+
+ struct
+ {
+ TPM_RQU_COMMAND_HDR CmdHdr;
+ UINT8 Data[0x4];
+ } cmd;
+
+ UINT16 physical_CMD_on = TPM_H2NS(TPM_PHYSICAL_PRESENCE_CMD_ENABLE );
+ UINT16 physical_on = TPM_H2NS(TPM_PHYSICAL_PRESENCE_PRESENT );
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCM_PPI *TcgPpi = NULL;
+
+ cmd.CmdHdr.tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ cmd.CmdHdr.paramSize = TPM_H2NL((UINT32)( sizeof (cmd.CmdHdr)
+ + sizeof(TPM_PHYSICAL_PRESENCE)));
+
+ cmd.CmdHdr.ordinal = TPM_H2NL(TCM_TSC_ORD_PhysicalPresence );
+
+
+ if ( Lock_TPMPhysicalPresence( PeiServices ))
+ {
+ physical_on = TPM_H2NS( TPM_PHYSICAL_PRESENCE_LOCK );
+ }
+
+ Status = LocateTcmPpi(PeiServices, &TpmPpi, &TcgPpi);
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+ MemCpy( cmd.Data, &physical_CMD_on, sizeof(TPM_PHYSICAL_PRESENCE));
+
+ Status = TcgPpi->TCMPassThroughToTcm(
+ TcgPpi,
+ PeiServices,
+ (sizeof (cmd.CmdHdr) + sizeof(TPM_PHYSICAL_PRESENCE)),
+ (UINT8*)&cmd,
+ sizeof (RspHdr),
+ (UINT8*)&RspHdr );
+
+ MemCpy( cmd.Data, &physical_on, sizeof(TPM_PHYSICAL_PRESENCE));
+
+ Status = TcgPpi->TCMPassThroughToTcm(
+ TcgPpi,
+ PeiServices,
+ (sizeof (cmd.CmdHdr) + sizeof(TPM_PHYSICAL_PRESENCE)),
+ (UINT8*)&cmd,
+ sizeof (RspHdr),
+ (UINT8*)&RspHdr );
+
+ if ( RspHdr.returnCode != 0 )
+ {
+ return EFI_DEVICE_ERROR;
+ }
+ return EFI_SUCCESS;
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgPeiGetRawImage
+//
+// Description: Loads binary from RAW section of main firwmare volume
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices
+// IN OUT VOID **Buffer
+// IN OUT UINT16 *size
+// IN EFI_GUID guid
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+EFIAPI TcgPeiGetRawImage(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN OUT VOID **Buffer,
+ IN OUT UINT16 *size,
+ EFI_GUID guid )
+{
+ EFI_STATUS Status;
+ EFI_FIRMWARE_VOLUME_HEADER *pFV;
+ UINTN FvNum = 0;
+ EFI_FFS_FILE_HEADER *ppFile = NULL;
+ MPDRIVER_LEGHEADER *Temp;
+ BOOLEAN Found = FALSE;
+
+ while ( TRUE )
+ {
+ Status = (*PeiServices)->FfsFindNextVolume( PeiServices, FvNum, &pFV );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ ppFile = NULL;
+
+ while ( TRUE )
+ {
+ Status = (*PeiServices)->FfsFindNextFile( PeiServices,
+ EFI_FV_FILETYPE_FREEFORM,
+ pFV,
+ &ppFile );
+
+ if ( Status == EFI_NOT_FOUND )
+ {
+ break;
+ }
+
+ if ( guidcmp( &ppFile->Name, &guid ) == 0 )
+ {
+ Found = TRUE;
+ break;
+ }
+ }
+
+ if ( Found )
+ {
+ break;
+ }
+ else {
+ FvNum++;
+ }
+ }
+
+ (*PeiServices)->FfsFindSectionData( PeiServices,
+ EFI_SECTION_RAW,
+ ppFile,
+ Buffer );
+
+ if ( Buffer == NULL )
+ {
+ return EFI_NOT_FOUND;
+ }
+
+ Temp = ((MPDRIVER_LEGHEADER*)(*Buffer));
+ *size = Temp->Size;
+
+ return Status;
+}
+
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: MemoryPresentEntry
+//
+// Description: This function performs TPM MP initialization
+//
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: EFI STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+EFIAPI MemoryPresentEntry(
+ IN EFI_PEI_SERVICES **PeiServices )
+{
+ EFI_STATUS Status;
+ EFI_HOB_GUID_TYPE *Hob;
+ TCG_LOG_HOB *TcgLog;
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCG_PPI *TcgPpi = NULL;
+ EFI_HOB_GUID_TYPE *ptrBootMode;
+ EFI_BOOT_MODE BootMode;
+ EFI_HOB_GUID_TYPE *MpHobType;
+ EFI_PHYSICAL_ADDRESS MPRuntime;
+ void *TcgMPBuffer = NULL;
+ FAR32LOCALS InitCall;
+ void *MPRuntimePtr = NULL;
+ UINT16 Pages = 0;
+ UINT32 Offset = 0;
+ UINT8 FuncID = 1;
+ void *ParamIN = NULL;
+ void *ParamOut = NULL;
+ UINT32 RetVal = 0;
+ EFI_FFS_FILE_HEADER *FfsHeader = NULL;
+ EFI_PEI_CPU_IO_PPI *CpuIo = (*PeiServices)->CpuIo;
+ UINT8 MPFILEERROR = 0xFA;
+ BOOLEAN ResetMor = FALSE;
+#if TCG_LEGACY == 1
+ BOOLEAN TpmLegBin = TRUE;
+ EFI_GUID MpFileGuid = EFI_TCG_MPDriver_GUID;
+#else
+ BOOLEAN TpmLegBin = FALSE;
+ EFI_GUID MpFileGuid = EFI_TCM_MPDriver_GUID;
+#endif
+
+ AMI_TCG_PEI_FUNCTION_OVERRIDE_PPI *MpOverride;
+ EFI_GUID Overrideguid = AMI_MEMORY_PRESENT_FUNCTION_OVERRIDE_GUID;
+
+ EFI_GUID gPeiEfiAmiTcgWakeEventDataHobGuid = \
+ EFI_TCG_WAKE_EVENT_DATA_HOB_GUID;
+ EFI_GUID gEfiPeiAmiTcgLogHobGuid = EFI_TCG_LOG_HOB_GUID;
+ EFI_GUID gEfiTcgMpDriverHobGuid = EFI_TCG_MPDriver_HOB_GUID;
+
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &Overrideguid,
+ 0, NULL,
+ &MpOverride);
+
+ if(!EFI_ERROR(Status)){
+ return (MpOverride->Function(PeiServices));
+ }
+
+#if TCG_LEGACY == 1
+ Status = Configure_Tpm_Chip( );
+ if ( EFI_ERROR( Status ))
+ {
+ PEI_TRACE((-1, PeiServices,
+ "Device not configured for legacy IO aborting TPM initialization\n"));
+ return Status;
+ }
+#endif
+
+ Status = (*PeiServices)->GetBootMode( PeiServices, &BootMode );
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+ if((AutoSupportType()) || (TpmLegBin == TRUE)){
+
+ PEI_TRACE((-1, PeiServices,"Setting up Binary Images\n"));
+
+ Status = TcgPeiGetRawImage( PeiServices, &TcgMPBuffer, &Pages, MpFileGuid );
+
+ if ( TcgMPBuffer == NULL )
+ {
+ PEI_TRACE((-1, PeiServices,
+ "Unable to Find TCM OEM MPDriver!!! Please make sure TCM porting is done correctly\n"));
+ PEI_TRACE((-1, PeiServices,"Unrecoverable Error. HALTING SYSTEM\n"));
+ CpuIo->Io.Write( PeiServices, CpuIo, 0, 0x80, 1, &MPFILEERROR );
+ while ( 1 )
+ {
+ ;
+ }
+ }
+
+ (*PeiServices)->AllocatePages( PeiServices,
+ EfiRuntimeServicesCode,
+ (UINTN)((Pages / 4096)+1),
+ &MPRuntime );
+
+ MPRuntimePtr = (void*)MPRuntime;
+ MemCpy( MPRuntimePtr, TcgMPBuffer, Pages );
+
+ Offset = ((MPDRIVER_LEGHEADER*)MPRuntimePtr)->CodeP;
+ MPRuntime += Offset;
+
+ //Assuming we are in Protected mode with flat address selector 10 as
+ //set by startup32.asm
+ InitCall.Offset = (UINT32)MPRuntime;
+ InitCall.Selector = SEL_flatCS;
+ InitCall.Codep = ((MPDRIVER_LEGHEADER*)MPRuntimePtr)->CodeP;
+ InitCall.Size = Pages;
+
+ //create Hob to pass PEI Capabilities information
+ Status = TcgPeiBuildHobGuid(
+ PeiServices,
+ &gEfiTcgMpDriverHobGuid,
+ sizeof (FAR32LOCALS),
+ &MpHobType );
+
+ ASSERT_PEI_ERROR( PeiServices, Status );
+ MpHobType++;
+ (*PeiServices)->CopyMem( MpHobType, &InitCall, sizeof (FAR32LOCALS));
+ if ( EFI_ERROR( Status )) {
+ return Status;
+ }
+
+ if(AutoSupportType())
+ {
+ Status = (*PeiServices)->InstallPpi( PeiServices, TcmInitPpi );
+ if ( EFI_ERROR( Status )) {
+ return Status;
+ }
+ }else{//legacy IO support for TPM
+ Status = (*PeiServices)->InstallPpi( PeiServices, LegacyTpmInitPpi );
+ if ( EFI_ERROR( Status )) {
+ return Status;
+ }
+ }
+
+ #if (StartupCmd_SelfTest_State == 1)
+ Status = SendStartupandSelftest(PeiServices,BootMode);
+ if(EFI_ERROR(Status))return Status; //if startup or selftest fails, treat it as a fatal error; return
+ #endif
+ }
+
+ #if (StartupCmd_SelfTest_State == 0)
+ Status = SendStartupandSelftest(PeiServices,BootMode);
+ if(EFI_ERROR(Status))return Status; //if startup or selftest fails, treat it as a fatal error; return
+ #endif
+
+ if((BootMode == BOOT_ON_S3_RESUME) || (BootMode == BOOT_IN_RECOVERY_MODE)){
+ return EFI_SUCCESS;
+ }
+
+ Status = TcgPeiBuildHobGuid(
+ PeiServices,
+ &gPeiEfiAmiTcgWakeEventDataHobGuid,
+ sizeof (BootMode),
+ &ptrBootMode );
+
+ ASSERT_PEI_ERROR( PeiServices, Status );
+ ptrBootMode++;
+ (*PeiServices)->CopyMem( ptrBootMode, &BootMode, sizeof (BootMode));
+
+ //even if TPM is deactivated still build hob but
+ //don't populate it.
+ Status = TcgPeiBuildHobGuid(
+ PeiServices,
+ &gEfiPeiAmiTcgLogHobGuid,
+ sizeof (*TcgLog) + TCG_LOG_MAX_TABLE_SIZE,
+ &Hob );
+
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+ TcgLog = (TCG_LOG_HOB*)(Hob + 1);
+ (*PeiServices)->SetMem( TcgLog, sizeof (*TcgLog), 0 );
+ TcgLog->TableMaxSize = TCG_LOG_MAX_TABLE_SIZE;
+
+ if(!AutoSupportType())
+ {
+ Status = MeasureCRTMVersionFuncPtr( PeiServices );
+ ASSERT_PEI_ERROR( PeiServices, Status );
+ }else{
+ Status = MeasureTcmCRTMVersion( PeiServices );
+ ASSERT_PEI_ERROR( PeiServices, Status );
+ }
+
+ Status = LocateTcgPpi(PeiServices, &TpmPpi, &TcgPpi);
+ if(EFI_ERROR(Status))return EFI_NOT_FOUND;
+
+ return Status;
+}
+
+
+
+
+static AMI_TCG_PLATFORM_PPI_AFTER_MEM mAmiTcgPlatformPPI = {
+ Set_TPMPhysicalPresence,
+ MemoryPresentEntry,
+ VerifyTcgVariables
+};
+
+
+static EFI_PEI_PPI_DESCRIPTOR mAmiTcgPlatformPPIListAfterMem[] = {
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI
+ | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &gAMITcgPlatformPpiAfterMemGuid,
+ &mAmiTcgPlatformPPI
+ }
+};
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: AmiTcgPlatformPEI_EntryAfterMem
+//
+// Description: Installs AMIplatform PPI for initialization in PEI after
+// memory is installed
+//
+// Input: IN EFI_FFS_FILE_HEADER *FfsHeader,
+// IN EFI_PEI_SERVICES **PeiServices
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+EFIAPI AmiTcgPlatformPEI_EntryAfterMem(
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+){
+ EFI_STATUS Status;
+
+ Status = (*PeiServices)->InstallPpi( PeiServices, mAmiTcgPlatformPPIListAfterMem );
+ return Status;
+}
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformPeiAfterMem.cif b/Board/EM/TCG2/Common/AmiTcgPlatformPeiAfterMem.cif
new file mode 100644
index 0000000..5e3bfa8
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformPeiAfterMem.cif
@@ -0,0 +1,9 @@
+<component>
+ name = "AmiTcgPlatformPeiAfterMem"
+ category = ModulePart
+ LocalRoot = "Board\EM\TCG2\Common"
+ RefName = "AmiTcgPlatformPeiAfterMem"
+[files]
+"AmiTcgPlatformPeiAfterMem.c"
+"AmiTcgPlatformPeiAfterMem.mak"
+<endComponent>
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformPeiAfterMem.mak b/Board/EM/TCG2/Common/AmiTcgPlatformPeiAfterMem.mak
new file mode 100644
index 0000000..031d566
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformPeiAfterMem.mak
@@ -0,0 +1,98 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformPei/AmiTcgPlatformPeiAfterMem/AmiTcgPlatformPeiAfterMem.mak 1 4/21/14 2:17p Fredericko $
+#
+# $Revision: 1 $
+#
+# $Date: 4/21/14 2:17p $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformPei/AmiTcgPlatformPeiAfterMem/AmiTcgPlatformPeiAfterMem.mak $
+#
+# 1 4/21/14 2:17p Fredericko
+#
+# 1 10/08/13 12:04p Fredericko
+# Initial Check-In for Tpm-Next module
+#
+# 2 10/03/13 2:13p Fredericko
+#
+# 1 7/10/13 5:54p Fredericko
+# [TAG] EIP120969
+# [Category] New Feature
+# [Description] TCG (TPM20)
+#
+# 2 3/29/11 2:24p Fredericko
+# [TAG] EIP 54642
+# [Category] Improvement
+# [Description] 1. Checkin Files related to TCG function override
+# 2. Include TCM and TPM auto detection
+# [Files] Affects all TCG files
+#
+#
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: AmiTcgPlatformPeiAfterMem.mak
+#
+# Description: Make file for AmiTcgPlatformPeiAfterMem
+#
+#<AMI_FHDR_END>
+#************************************************************************
+all : AmiTcgPlatformPeiAfterMem
+
+AmiTcgPlatformPeiAfterMem : $(BUILD_DIR)\AmiTcgPlatformPeiAfterMem.mak AmiTcgPlatformPeiAfterMembin
+
+$(BUILD_DIR)\AmiTcgPlatformPeiAfterMem.mak : $(AMI_TCG_PLATFORM_PEI_DIR)\$(@B).cif $(AMI_TCG_PLATFORM_PEI_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(AMI_TCG_PLATFORM_PEI_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+
+#---------------------------------------------------------------------------
+# Making AmiTcgPlatformPei
+#---------------------------------------------------------------------------
+AMI_TCG_PEI_PLATFORM_OBJECTS_AFTER_MEM = \
+ $(BUILD_DIR)\$(AMI_TCG_PLATFORM_PEI_DIR)\AmiTcgPlatformPeiAfterMem.obj \
+
+TCGPEIOVERRIDE_CFLAGS=$(CFLAGS)\
+ /I$(TCG_DIR)\
+ /I$(TPM12_DIR)\
+ /I$(TCG_DIR)\Common\
+ /I$(AMI_TCG_PLATFORM_PEI_DIR)\
+
+AmiTcgPlatformPeiAfterMembin : $(AMIPEILIB) $(BUILD_DIR)\AmiTcgLibPei.lib
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\AmiTcgPlatformPeiAfterMem.mak all \
+ "CFLAGS=$(TCGPEIOVERRIDE_CFLAGS) "\
+ "CPFLAGS=$(TCGPEIOVERRIDE_CFLAGS) "\
+ GUID=9B3F28D5-10A6-46c8-BA72-BD40B847A71A\
+ "OBJECTS=$(AMI_TCG_PEI_PLATFORM_OBJECTS_AFTER_MEM)" \
+ ENTRY_POINT=AmiTcgPlatformPEI_EntryAfterMem \
+ TYPE=PEIM \
+ DEPEX1=$(AMI_TCG_PLATFORM_PEI_DIR)\AmiTcgPlatformPei.dxs \
+ DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX \
+ COMPRESS=1
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformPeiBeforeMem.c b/Board/EM/TCG2/Common/AmiTcgPlatformPeiBeforeMem.c
new file mode 100644
index 0000000..f76147e
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformPeiBeforeMem.c
@@ -0,0 +1,279 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformPei/AmiTcgPlatformPeiBeforeMem/AmiTcgPlatformPeiBeforeMem.c 1 4/21/14 2:17p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:17p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformPei/AmiTcgPlatformPeiBeforeMem/AmiTcgPlatformPeiBeforeMem.c $
+//
+// 1 4/21/14 2:17p Fredericko
+//
+// 1 10/08/13 12:04p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:54p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 8 4/27/12 6:18p Fredericko
+//
+// 7 1/17/12 11:24a Fredericko
+// Install Tpm_Initialized Ppi in PEI
+//
+// 6 10/24/11 12:27p Fredericko
+//
+// 5 9/01/11 2:23p Fredericko
+// [TAG] EIP66113
+// [Category] Improvement
+// [Description] Support LTsx on server platforms where startup commands
+// are sent by the ACM binaries.
+// [Files] AmiTcgPlatformPeiBoardBeforeMem.c
+// AmiTcgPlatformPeiLib.c
+// AmiTcgPlatformPei.h
+//
+// 4 4/26/11 1:52p Fredericko
+// Added support for function level override of specific functions.
+//
+// 3 4/01/11 9:34a Fredericko
+// Updated function Header
+//
+// 2 3/29/11 2:22p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiTcgPlatformPeiBeforeMem.c
+//
+// Description: Function file for AmiTcgPlatformPeiBeforeMem
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include <Efi.h>
+#include <Pei.h>
+#include <TcgCommon.h>
+#include <AmiPeiLib.h>
+#include <TcgMisc.h>
+#include "PPI\TcgService\TcgTcmService.h"
+#include "PPI\TcgService\TcgService.h"
+#include "PPI\TpmDevice\TpmDevice.h"
+#include "PPI\CpuIo.h"
+#include "PPI\LoadFile.h"
+#include <Ppi\ReadOnlyVariable.h>
+#include "AmiTcgPlatformPei.h"
+
+
+EFI_GUID gAMITcgPlatformPpiBeforeMemguid = AMI_TCG_PLATFORM_PPI_BEFORE_MEM_GUID;
+EFI_GUID gTpmInitializedguid = PEI_TPM_INITIALIZED_PPI_GUID;
+
+static EFI_PEI_PPI_DESCRIPTOR Tpm_Initialized[] =
+{
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &gTpmInitializedguid, NULL
+ }
+};
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: MemoryAbsentEntry
+//
+// Description: This function performs TPM MA initialization
+//
+//
+// Input: IN EFI_FFS_FILE_HEADER *FfsHeader
+// IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+MemoryAbsentEntry(
+ IN EFI_PEI_SERVICES **PeiServices )
+{
+ EFI_STATUS Status;
+ EFI_BOOT_MODE BootMode;
+ void *TcgDrvBuffer = NULL;
+ UINT16 Pages = 0;
+ EFI_GUID guid = EFI_TCG_MADriver_GUID;
+ EFI_HOB_GUID_TYPE *MAHobType;
+ MASTRUCT MAHob;
+ FAR32LOCALS CommonLegX;
+ EFI_GUID gEfiTcgMADriverHobGuid = EFI_TCG_MADriver_HOB_GUID;
+ AMI_TCG_PEI_FUNCTION_OVERRIDE_PPI *PpiOverride;
+ EFI_GUID Overrideguid = AMI_MEMORY_ABSENT_OVERRIDE_GUID;
+ EFI_GUID SkipTpmStartupGuid = AMI_SKIP_TPM_STARTUP_GUID;
+ BOOLEAN SkipTpmStartup = FALSE;
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &SkipTpmStartupGuid,
+ 0, NULL,
+ &PpiOverride);
+
+ if(!EFI_ERROR(Status)) {
+ SkipTpmStartup = TRUE;
+ }
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &Overrideguid,
+ 0, NULL,
+ &PpiOverride);
+
+ if(!EFI_ERROR(Status)){
+ return (PpiOverride->Function(PeiServices));
+ }
+
+ Status = (*PeiServices)->GetBootMode( PeiServices, &BootMode );
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+#if (StartupCmd_SelfTest_State == 1)
+ if(!AutoSupportType()){
+ if (!SkipTpmStartup) {
+ Status = TcgPeiTpmStartup( PeiServices, BootMode );
+ ASSERT_PEI_ERROR( PeiServices, Status );
+ }
+
+ Status = ContinueTPMSelfTest( PeiServices );
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+ if(!EFI_ERROR(Status)){
+ (*PeiServices)->InstallPpi(PeiServices, Tpm_Initialized);
+ }
+
+ if ((BootMode == BOOT_ON_S3_RESUME) || (BootMode == BOOT_IN_RECOVERY_MODE))
+ {
+ return Status;
+ }
+ }
+#else
+ if ((BootMode == BOOT_ON_S3_RESUME) || (BootMode == BOOT_IN_RECOVERY_MODE))
+ {
+ return Status;
+ }
+#endif
+
+ if(AutoSupportType()){
+ Status = FillDriverLocByFile(&CommonLegX.Offset,PeiServices,&guid,&TcgDrvBuffer,(UINTN*)&Pages);
+ if(EFI_ERROR(Status))return EFI_NOT_FOUND;
+ if ( CommonLegX.Offset == NULL )
+ {
+ return EFI_NOT_FOUND;
+ }
+
+ MAHob.Offset = CommonLegX.Offset;
+ MAHob.Selector = SEL_flatCS;
+ MAHob.Codep = ((MPDRIVER_LEGHEADER*)((UINT8*)(TcgDrvBuffer)))->CodeP;
+
+ Status = TcgPeiBuildHobGuid(
+ PeiServices,
+ &gEfiTcgMADriverHobGuid,
+ sizeof (MASTRUCT),
+ &MAHobType );
+
+ ASSERT_PEI_ERROR( PeiServices, Status );
+ MAHobType++;
+
+ (*PeiServices)->CopyMem( MAHobType, &MAHob, sizeof (MASTRUCT));
+ return Status;
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+
+
+static AMI_TCG_PLATFORM_PPI_BEFORE_MEM mAmiTcgPlatformPPI = {
+ MemoryAbsentEntry,
+};
+
+
+static EFI_PEI_PPI_DESCRIPTOR mAmiTcgPlatformPPIListBeforeMem[] = {
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI
+ | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &gAMITcgPlatformPpiBeforeMemguid,
+ &mAmiTcgPlatformPPI
+ }
+};
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: AmiTcgPlatformPEI_EntryBeforeMem
+//
+// Description: Installs AMIplatform PPI for initialization in PEI before
+// memory is installed
+//
+// Input: IN EFI_FFS_FILE_HEADER *FfsHeader,
+// IN EFI_PEI_SERVICES **PeiServices
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+EFIAPI AmiTcgPlatformPEI_EntryBeforeMem(
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+){
+ EFI_STATUS Status;
+
+ Status = (*PeiServices)->InstallPpi( PeiServices, mAmiTcgPlatformPPIListBeforeMem );
+ return Status;
+}
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformPeiBeforeMem.cif b/Board/EM/TCG2/Common/AmiTcgPlatformPeiBeforeMem.cif
new file mode 100644
index 0000000..903e850
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformPeiBeforeMem.cif
@@ -0,0 +1,9 @@
+<component>
+ name = "AmiTcgPlatformPeiBeforeMem"
+ category = ModulePart
+ LocalRoot = "Board\EM\TCG2\Common"
+ RefName = "AmiTcgPlatformPeiBeforeMem"
+[files]
+"AmiTcgPlatformPeiBeforeMem.c"
+"AmiTcgPlatformPeiBeforeMem.mak"
+<endComponent>
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformPeiBeforeMem.mak b/Board/EM/TCG2/Common/AmiTcgPlatformPeiBeforeMem.mak
new file mode 100644
index 0000000..0c3c2c3
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformPeiBeforeMem.mak
@@ -0,0 +1,150 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformPei/AmiTcgPlatformPeiBeforeMem/AmiTcgPlatformPeiBeforeMem.mak 2 6/09/14 4:53p Fredericko $
+#
+# $Revision: 2 $
+#
+# $Date: 6/09/14 4:53p $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformPei/AmiTcgPlatformPeiBeforeMem/AmiTcgPlatformPeiBeforeMem.mak $
+#
+# 2 6/09/14 4:53p Fredericko
+#
+# 1 4/21/14 2:17p Fredericko
+#
+# 1 10/08/13 12:04p Fredericko
+# Initial Check-In for Tpm-Next module
+#
+# 1 7/10/13 5:54p Fredericko
+# [TAG] EIP120969
+# [Category] New Feature
+# [Description] TCG (TPM20)
+#
+# 4 9/27/11 10:29p Fredericko
+# [TAG] EIP67286
+# [Category] Improvement
+# [Description] changes for Tcg Setup policy
+# [Files] Tcg.sdl
+# TcgPei.cif
+# TcgPei.mak
+# xtcgPei.c
+# xTcgPeiAfterMem.c
+# TcgPeiAfterMem.mak
+# TcgDxe.cif
+# TcgDxe.mak
+# xTcgDxe.c
+# AmiTcgPlatformPeilib.c
+# AmiTcgPlatformDxelib.c
+#
+# 3 4/22/11 8:56p Fredericko
+# Changes for x32bit mode build
+#
+# 2 3/29/11 2:22p Fredericko
+# [TAG] EIP 54642
+# [Category] Improvement
+# [Description] 1. Checkin Files related to TCG function override
+# 2. Include TCM and TPM auto detection
+# [Files] Affects all TCG files
+#
+#
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: AmiTcgPlatformPeiBeforeMem.mak
+#
+# Description: Make file for AmiTcgPlatformPeiBeforeMem
+#
+#<AMI_FHDR_END>
+#************************************************************************
+all : AmiTcgPlatformPeiBeforeMem $(BUILD_DIR)\AmiTcgLibPei.lib
+
+AmiTcgPlatformPeiBeforeMem : $(BUILD_DIR)\AmiTcgPlatformPeiBeforeMem.mak AmiTcgPlatformPeiBeforeMembin
+
+$(BUILD_DIR)\AmiTcgPlatformPeiBeforeMem.mak : $(AMI_TCG_PLATFORM_PEI_DIR)\$(@B).cif $(AMI_TCG_PLATFORM_PEI_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(AMI_TCG_PLATFORM_PEI_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+$(BUILD_DIR)\AmiTcgLibPei.lib : $(BUILD_DIR)\AmiTcgPlatformPeiBeforeMem.mak Make_AMITTCG_LIB
+
+AMITCGLIB_CFLAGS=$(CFLAGS)\
+ /I$(TcgPlatformSetupPeiPolicy_DIR)\
+ /I$(TCG_DIR)\
+ /I$(TPM12_DIR)\
+ /I$(TCG_DIR)\Common\
+ /I$(TCG_DIR)\Common\Tpm20Includes\
+ /I$(AMI_TCG_PLATFORM_PEI_DIR)
+
+
+AMI_TCG_LIB_OBJECTS = \
+ $(BUILD_DIR)\$(AMI_TCG_PLATFORM_PEI_DIR)\AmiTcgPlatformPeiLib.obj
+
+!IFNDEF LIB_BUILD_DIR
+!IF "$(PROCESSOR)"=="x64"
+TCGLIB=$(BUILD_DIR)\IA32\TisLib.lib
+AMITCMLIB = $(BUILD_DIR)\IA32\AmiTcmlib.lib
+!ELSE
+TCGLIB=$(BUILD_DIR)\TisLib.lib
+AMITCMLIB = $(BUILD_DIR)\AmiTcmlib.lib
+!ENDIF
+!ENDIF #LIB_BUILD_DIR
+
+Make_AMITTCG_LIB : $(TCGLIB) $(AMITCMLIB) $(AMICSPLib)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\AmiTcgPlatformPeiBeforeMem.mak all\
+ "CFLAGS=$(AMITCGLIB_CFLAGS) "\
+ OBJECTS="$(AMI_TCG_LIB_OBJECTS)"\
+ NAME=AmiTcgLibPei\
+ MAKEFILE=$(BUILD_DIR)\AmiTcgPlatformPeiBeforeMem.mak \
+ TYPE=PEI_LIBRARY
+
+
+#---------------------------------------------------------------------------
+# Making AmiTcgPlatformPei
+#---------------------------------------------------------------------------
+AMI_TCG_PEI_PLATFORM_OBJECTS_BEFORE_MEM = \
+ $(BUILD_DIR)\$(AMI_TCG_PLATFORM_PEI_DIR)\AmiTcgPlatformPeiBeforeMem.obj \
+
+TCGPEIOVERRIDE_CFLAGS=$(CFLAGS)\
+ /I$(TCG_DIR)\
+ /I$(TPM12_DIR)\
+ /I$(TCG_DIR)\Common\
+ /I$(AMI_TCG_PLATFORM_PEI_DIR)\
+
+AmiTcgPlatformPeiBeforeMembin : $(AMIPEILIB) $(BUILD_DIR)\AmiTcgLibPei.lib
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\AmiTcgPlatformPeiBeforeMem.mak all \
+ "CFLAGS=$(TCGPEIOVERRIDE_CFLAGS) "\
+ "CPFLAGS=$(TCGPEIOVERRIDE_CFLAGS) "\
+ GUID=E9312938-E56B-4614-A252-CF7D2F377E26\
+ "OBJECTS=$(AMI_TCG_PEI_PLATFORM_OBJECTS_BEFORE_MEM)" \
+ ENTRY_POINT=AmiTcgPlatformPEI_EntryBeforeMem \
+ TYPE=PEIM \
+ DEPEX1=$(AMI_TCG_PLATFORM_PEI_DIR)\AmiTcgPlatformPei.dxs \
+ DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX \
+ COMPRESS=0
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/TCG2/Common/AmiTcgPlatformPeiLib.c b/Board/EM/TCG2/Common/AmiTcgPlatformPeiLib.c
new file mode 100644
index 0000000..b7a3ee1
--- /dev/null
+++ b/Board/EM/TCG2/Common/AmiTcgPlatformPeiLib.c
@@ -0,0 +1,1907 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformPei/AmiTcgPlatformPeiLib.c 3 6/14/14 12:32a Fredericko $
+//
+// $Revision: 3 $
+//
+// $Date: 6/14/14 12:32a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgPlatform/AmiTcgPlatformPei/AmiTcgPlatformPeiLib.c $
+//
+// 3 6/14/14 12:32a Fredericko
+// Fix locking of Physical Presense
+//
+// 2 6/09/14 4:51p Fredericko
+// Changes for SetVariable vulnerability during Runtime
+//
+// 1 4/21/14 2:17p Fredericko
+//
+// 1 10/08/13 12:04p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:54p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 19 3/31/13 7:40p Fredericko
+// [TAG] EIP118211
+// [Category] Improvement
+// [Description] Implement ability to skip Physical presence lock in
+// manufacturing mode
+// [Files] TcgPei.c, AmiTcgPlatformDxe.c, AmiTcgNvflagSample.c
+//
+// [TAG] EIP
+// [Category] Improvement
+// [Description] Timing policy changes for slower TPMs (ability to skip
+// setting of physical presence in PEI to DXE)
+// [Files] AmiTcgPlatformDxe.c, AmiTcgNvflagSample.c,
+// AmiTcgPlatformPei.c
+//
+// 18 3/06/13 3:23p Fredericko
+// [TAG] EIP112717
+// [Category] Improvement
+// [Description] Change code to use PCR from token definition file
+// instead of using numbers
+// [Files] xTcgDxe.c
+// AmiTcgPlatformPeiLib.c
+// AmiTcgPlatformDxe.c
+//
+// 17 11/05/12 11:12a Fredericko
+// Continue Selftest Vendor ID Token added
+//
+// 16 4/27/12 6:16p Fredericko
+// 1. Remove unused functions.
+//
+// 15 3/19/12 6:47p Fredericko
+// Changes for Tcg Performance Metrics Improvement.
+// Files Changed: Tcg.sdl, TcgMisc.h, TcgDxe.c, TcgCommon.c, TcgCommon.h,
+// AmiTcgPlatformPeiLib.c, AmiTcgPlatformDxe.c, TcgDxe.dxs
+//
+// 14 2/03/12 5:52p Fredericko
+// [TAG] EIP81665
+// [Category] Improvement
+// [Description] Support for MOR feature improvement. Removed unneed
+// functions.
+// EIP: 80813: System will assert in AmiTcgPlatformPei.lib if PeiRamboot
+// module is not included in the project
+// [Files] Tcg.sdl, AmiTcgPlatformDxe.c, Tcgdxe.c, Tcglegacy.c
+//
+// 13 12/30/11 4:58p Fredericko
+// [TAG] EIP78141
+// [Category] New Feature
+// [Description] Added hooks to override generic TPM platform hash
+// functions.
+// [Files] 1. AmiTcgPlatform.sdl
+// 2. AmiTcgPlatformPei.h
+// 3. AmiTcgPlatformPeiLib.c
+// 4. AmiTcgPlatformPeiAfterMem.c
+// 5. AmiTcgPlatformDxe.c
+// 6. AmiTcgPlatformDxe.h
+//
+// 12 12/18/11 10:27p Fredericko
+// Changes to support TcgplatformPeiPolicy in relation to O.S. requests.
+//
+// 11 12/12/11 3:52p Fredericko
+// [TAG] EIP76865
+// [Category] Improvement
+// [Description] Dual Support for TCM and TPM. System could hang in TXT
+// if txt is enabled in setup
+// [Files] AmiTcgPlatfompeilib.c, AmiTcgPlatformPpi.cif,
+// AmiTcgPlatformPpi.h, AmiTcgPlatformProtocol.cif,
+// AmiTcgPlatformProtocol.h,
+// EMpTcmPei.c, TcgDxe.cif, TcgPei.cif, TcgPeiAfterMem.cif,
+// TcgPeiAfterMem.mak, TcgTcmPeiAfterMem.c, xTcgDxe.c, xTcgPei.c,
+// xTcgPeiAfterMem.c
+//
+// 10 9/27/11 10:28p Fredericko
+// [TAG] EIP67286
+// [Category] Improvement
+// [Description] changes for Tcg Setup policy
+// [Files] Tcg.sdl
+// TcgPei.cif
+// TcgPei.mak
+// xtcgPei.c
+// xTcgPeiAfterMem.c
+// TcgPeiAfterMem.mak
+// TcgDxe.cif
+// TcgDxe.mak
+// xTcgDxe.c
+// AmiTcgPlatformPeilib.c
+// AmiTcgPlatformDxelib.c
+//
+// 9 9/01/11 2:25p Fredericko
+// [TAG] EIP66113
+// [Category] Improvement
+// [Description] Support LTsx on server platforms where startup commands
+// are sent by the ACM binaries.
+// [Files] AmiTcgPlatformPeiBoardBeforeMem.c
+// AmiTcgPlatformPeiLib.c
+// AmiTcgPlatformPei.h
+//
+// 8 8/26/11 3:00p Fredericko
+//
+// 7 8/09/11 6:30p Fredericko
+// [TAG] EIP66468
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] 1. Changes for Tcg Ppi 1.2 support.
+// [Files] 1 TcgSmm.h
+// 2.TcgSmm.c
+// 3.Tcg_ppi1_2.asl
+// 4. AmiTcgNvflagsSample.c
+// 5. AmiTcgPlatformPeiLib.c
+// 6. AmiTcgPlatformDxe.sdl
+// 7. AmiTcgPlatformDxe.c
+//
+// 6 7/25/11 3:23a Fredericko
+// [TAG] EIP65177
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] TCG Ppi Sec ver 1.2 update
+//
+// 5 4/05/11 8:08p Fredericko
+// Changes for the measurement of FVMAIN in the case of the trusted
+// cryptographic module
+//
+// 4 4/04/11 2:17p Fredericko
+// Measurement of Dxe FVol commented back into code
+//
+// 3 3/29/11 9:20p Fredericko
+// Handle TPM startup and selftest errors as fatal errors. Don't continue
+// with any TPM initialization.
+//
+// 2 3/29/11 2:20p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiTcgPlatformPeilib.c
+//
+// Description: Function file that contains library files for AmiTcgPlatformPei
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include <Efi.h>
+#include <Pei.h>
+#include <TcgCommon.h>
+#include <Tpm20Includes\Tpm20Pei.h>
+#include <AmiPeiLib.h>
+#include <TcgMisc.h>
+#include "PPI\TcgService\TcgTcmService.h"
+#include "PPI\TcgService\TcgService.h"
+#include "PPI\TpmDevice\TpmDevice.h"
+#include "PPI\CpuIo.h"
+#include "PPI\LoadFile.h"
+#include <Ppi\ReadOnlyVariable.h>
+#include <ppi\ReadOnlyVariable2.h>
+#include "AmiTcgPlatformPei.h"
+#include "TcgPlatformSetupPeiPolicy.h"
+#include <ppi\AmiTcgPlatformPpi.h>
+#include <Token.h>
+
+
+//*************************************************************************
+// GLOBAL DEFINITIONS
+//*************************************************************************
+EFI_GUID gTcgPpiguid = PEI_TCG_PPI_GUID;
+EFI_GUID gTpmDevicePpiguid = PEI_TPM_PPI_GUID;
+EFI_GUID Descguid = AMI_TCG_PERM_FLAGS_GUID;
+EFI_GUID Tpm20Hobguid = TPM20_HOB_GUID;
+
+
+EFI_GUID gTpmguidEndOfPei = EFI_PEI_END_OF_PEI_PHASE_PPI_GUID;
+
+
+EFI_GUID gTcgReadOnlyVariablePpiGuid
+ = EFI_TCG_PEI_READ_ONLY_VARIABLE_PPI_GUID;
+
+
+EFI_GUID TcgBoardEfiGlobalVariableGuid = TCG_EFI_GLOBAL_VARIABLE_GUID;
+
+typedef struct
+{
+ TPM_1_2_CMD_HEADER hdr;
+ UINT32 pcr;
+ TCG_DIGEST digest;
+} TPM_EXTEND_CMD;
+
+typedef struct
+{
+ TPM_1_2_RET_HEADER rethdr;
+ TCG_DIGEST Outdigest;
+} TPM_EXTEND_RET;
+
+//**********************************************************************
+// Links
+//**********************************************************************
+extern MEASURE_CRTM_VERSION_PEI_FUNC_PTR MEASURE_CRTM_VERSION_PEI_FUNCTION;
+MEASURE_CRTM_VERSION_PEI_FUNC_PTR *MeasureCRTMVersionFuncPtr = MEASURE_CRTM_VERSION_PEI_FUNCTION;
+
+extern MEASURE_TCG_PCCLIENT_ID_PEI_FUNC_PTR MEASURE_TCG_PCCLIENT_ID_PEI_FUNCTION;
+MEASURE_TCG_PCCLIENT_ID_PEI_FUNC_PTR *MeasureTCGPcClientSpecIDFuncPtr = MEASURE_TCG_PCCLIENT_ID_PEI_FUNCTION;
+
+extern MEASURE_CORE_DXE_FW_VOL_PEI_FUNC_PTR MEASURE_CORE_DXE_FW_VOL_PEI_FUNCTION;
+MEASURE_CORE_DXE_FW_VOL_PEI_FUNC_PTR *MeasureDxeCoreFwVolFuncPtr = MEASURE_CORE_DXE_FW_VOL_PEI_FUNCTION;
+
+
+//**********************************************************************
+// TCG_Helper functions
+//**********************************************************************
+#pragma pack(1)
+typedef struct _TCG_PEI_CALLBACK_CONTEXT
+{
+ PEI_TPM_PPI *TpmDevice;
+ EFI_PEI_SERVICES **PeiServices;
+} TCG_PEI_CALLBACK_CONTEXT;
+#pragma pack()
+
+UINT8 Tpm20SupportType()
+{
+ return (TRUE);
+}
+
+static AMI_TPM20SUPPORTTYPE_PPI Tpm20SupportTypePpi = {
+ Tpm20SupportType
+};
+
+
+static EFI_PEI_PPI_DESCRIPTOR mTpm20SupportList[] = {
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI
+ | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &Tpm20Hobguid,
+ &Tpm20SupportTypePpi
+ }
+};
+
+
+EFI_STATUS
+__stdcall TcgCommonPassThrough(
+ IN VOID *CallbackContext,
+ IN UINT32 NoInputBuffers,
+ IN TPM_TRANSMIT_BUFFER *InputBuffers,
+ IN UINT32 NoOutputBuffers,
+ IN OUT TPM_TRANSMIT_BUFFER *OutputBuffers )
+{
+ TCG_PEI_CALLBACK_CONTEXT *Ctx;
+
+ Ctx = (TCG_PEI_CALLBACK_CONTEXT*)CallbackContext;
+
+ return Ctx->TpmDevice->Transmit(
+ Ctx->TpmDevice,
+ Ctx->PeiServices,
+ NoInputBuffers,
+ InputBuffers,
+ NoOutputBuffers,
+ OutputBuffers
+ );
+}
+
+BOOLEAN IsMfgMode(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN CONST EFI_PEI_READ_ONLY_VARIABLE2_PPI *ReadVariablePpi
+);
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgPeiBuildHobGuid
+//
+// Description: Internal abstracted function to create a Hob
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+// IN EFI_GUID *Guid,
+// IN UINTN DataLength,
+// OUT VOID **Hob
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS TcgPeiBuildHobGuid(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_GUID *Guid,
+ IN UINTN DataLength,
+ OUT VOID **Hob )
+{
+ EFI_STATUS Status;
+
+ Status = (*PeiServices)->CreateHob(
+ PeiServices,
+ EFI_HOB_TYPE_GUID_EXTENSION,
+ (UINT16) ( sizeof (EFI_HOB_GUID_TYPE) + DataLength ),
+ Hob
+ );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ ((EFI_HOB_GUID_TYPE*)(*Hob))->Name = *Guid;
+
+ return EFI_SUCCESS;
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: FillDriverLocByFile
+//
+// Description: Helper function to locate a Driver by guid and fill in
+// Offset data about it. Mainly for MA Driver
+//
+//
+// Input: IN OUT UINT32* Offset,
+// IN EFI_PEI_SERVICES **ps,
+// IN EFI_GUID *Driveguid,
+// IN OUT VOID **MAStart,
+// IN OUT UINTN *MASize
+//
+//
+// Output: VOID
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS FillDriverLocByFile(
+ IN OUT UINT32 * Offset,
+ IN EFI_PEI_SERVICES **ps,
+ IN EFI_GUID *Driveguid,
+ IN OUT VOID **MAStart,
+ IN OUT UINTN *MASize )
+{
+ UINT8 * Temp;
+ EFI_FIRMWARE_VOLUME_HEADER *pFV;
+ EFI_FFS_FILE_HEADER *ppFile;
+ EFI_STATUS Status;
+ UINTN Instance = 0;
+ MPDRIVER_LEGHEADER *Buffer;
+ UINT32 CodeSec = 0;
+
+ while ( TRUE )
+ {
+ Status = (*ps)->FfsFindNextVolume( ps, Instance, &pFV );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ ppFile = NULL;
+ //
+ // Start new search in volume
+ //
+ while ( TRUE )
+ {
+ Status = (*ps)->FfsFindNextFile( ps,
+ EFI_FV_FILETYPE_FREEFORM,
+ pFV,
+ &ppFile );
+
+ if ( Status == EFI_NOT_FOUND )
+ {
+ break;
+ }
+
+ if ( CompareGuid( &(ppFile->Name), Driveguid ))
+ {
+ Temp = ((UINT8*) ppFile + sizeof (EFI_FFS_FILE_HEADER)
+ + sizeof(ppFile->Size));
+ Buffer = (MPDRIVER_LEGHEADER*)(Temp + 1);
+ CodeSec = Buffer->CodeP;
+ *Offset = (UINT32)Buffer + CodeSec;
+ *MAStart = Buffer;
+ *MASize = (UINTN)Buffer->Size;
+ return Status;
+ }
+ }
+ Instance += 1;
+ }
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: FillDriverLoc
+//
+// Description: Minor function to fill in MPDriver Offsets for TPM
+// Device PPI
+//
+//
+// Input: IN OUT UINT32* Offset,
+// IN EFI_PEI_SERVICES **ps,
+// IN EFI_GUID *Driveguid
+//
+// Output: VOID
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+VOID FillDriverLoc(
+ IN OUT UINT32 * Offset,
+ IN EFI_PEI_SERVICES **ps,
+ IN EFI_GUID *Driveguid )
+{
+ EFI_HOB_GUID_TYPE *DrvHob;
+ UINT8 * Temp;
+
+ (*ps)->GetHobList( ps, &DrvHob );
+ while ( !EFI_ERROR( FindNextHobByType( EFI_HOB_TYPE_GUID_EXTENSION, &DrvHob )))
+ {
+ if ((DrvHob->Header.HobType == EFI_HOB_TYPE_GUID_EXTENSION)
+ && (guidcmp( &DrvHob->Name, Driveguid )) == 0 )
+ {
+ Temp = (UINT8*)++DrvHob;
+ *Offset = *(UINT32*) Temp;
+ break;
+ }
+ }
+}
+
+
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: LocateTcgPpi
+//
+// Description: Locates and initializes TCG Ppi
+//
+//
+// Input: IN EFI_FFS_FILE_HEADER *FfsHeader
+// IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS LocateTcgPpi(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_TPM_PPI **gTpmDevicePpi,
+ IN PEI_TCG_PPI **gTcgPpi
+)
+{
+ EFI_STATUS Status;
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &gTpmDevicePpiguid,
+ 0, NULL,
+ gTpmDevicePpi);
+
+
+ if(EFI_ERROR(Status)){
+ PEI_TRACE((-1, PeiServices, "gTpmDevicePpiguid NOT found %r \n", Status));
+ return Status;
+ }
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &gTcgPpiguid,
+ 0, NULL,
+ gTcgPpi);
+
+ if(EFI_ERROR(Status)){
+ PEI_TRACE((-1, PeiServices, "gTcgPpiguid NOT found %r \n", Status));
+ return Status;
+ }
+
+ return Status;
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: LocateTcgPpi
+//
+// Description: Locates and initializes TCG Ppi
+//
+//
+// Input: IN EFI_FFS_FILE_HEADER *FfsHeader
+// IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS LocateTcmPpi(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_TPM_PPI **gTpmDevicePpi,
+ IN PEI_TCM_PPI **gTcmPpi
+)
+{
+ EFI_STATUS Status;
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &gTpmDevicePpiguid,
+ 0, NULL,
+ gTpmDevicePpi);
+
+
+ if(EFI_ERROR(Status))return Status;
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &gTcgPpiguid,
+ 0, NULL,
+ gTcmPpi);
+
+ return Status;
+}
+
+
+EFI_STATUS Tpm20PeiSendStartup(IN EFI_PEI_SERVICES **PeiServices)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ TPM2_Startup_Cmd StartupCmd;
+ TPM2_Common_RespHdr StartupReponse;
+ UINT32 ReturnSize = 0;
+ EFI_BOOT_MODE BootMode;
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCG_PPI *TcgPpi = NULL;
+
+
+ Status = LocateTcgPpi(PeiServices,&TpmPpi, &TcgPpi);
+ if(EFI_ERROR(Status))return EFI_NOT_FOUND;
+
+ Status = TpmPpi->Init(TpmPpi, PeiServices );
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ StartupCmd.tag = (TPMI_ST_COMMAND_TAG)TPM_H2NS(TPM_ST_NO_SESSIONS);
+ StartupCmd.CommandSize = TPM_H2NL((sizeof(TPM2_Startup_Cmd)));
+ StartupCmd.CommandCode = TPM_H2NL(TPM_CC_Startup);
+
+ Status = (*PeiServices)->GetBootMode (PeiServices, &BootMode);
+ if(EFI_ERROR(Status))return Status;
+
+ if(BootMode == BOOT_ON_S3_RESUME){
+ StartupCmd.StartupType = TPM_H2NS(TPM_SU_STATE);
+ }else{
+ StartupCmd.StartupType = TPM_H2NS(TPM_SU_CLEAR);
+ }
+
+ ReturnSize = (UINT32)sizeof(StartupReponse);
+
+ MemSet((UINT8 *)&StartupReponse,(UINTN)sizeof(StartupReponse), 0);
+
+ Status = TcgPpi->TCGPassThroughToTpm(TcgPpi,
+ PeiServices,
+ sizeof(TPM2_Startup_Cmd),
+ (UINT8*)&StartupCmd,
+ ReturnSize,
+ (UINT8*)&StartupReponse);
+
+ if((StartupReponse.ResponseCode) != TPM_RC_SUCCESS){
+ Status = EFI_DEVICE_ERROR;
+ }
+
+ return Status;
+}
+
+
+EFI_STATUS Tpm20PeiSelfTest(IN EFI_PEI_SERVICES **PeiServices)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ TPM2_SelfTest SelfTestCmd;
+ TPM2_Common_RespHdr SelfTestReponse;
+ UINT32 ReturnSize = 0;
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCG_PPI *TcgPpi = NULL;
+
+ Status = LocateTcgPpi(PeiServices,&TpmPpi, &TcgPpi);
+ if(EFI_ERROR(Status))return EFI_NOT_FOUND;
+
+ Status = TpmPpi->Init(TpmPpi, PeiServices );
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ SelfTestCmd.tag = (TPMI_ST_COMMAND_TAG)TPM_H2NS(TPM_ST_NO_SESSIONS);
+ SelfTestCmd.CommandSize = TPM_H2NL((sizeof(TPM2_SelfTest)));
+ SelfTestCmd.CommandCode = TPM_H2NL(TPM_CC_SelfTest);
+ SelfTestCmd.SelfTestType = 0;
+
+ ReturnSize = (UINT32)sizeof(SelfTestReponse);
+
+ MemSet((UINT8 *)&SelfTestReponse,(UINTN)sizeof(SelfTestReponse), 0);
+
+ Status = TcgPpi->TCGPassThroughToTpm(TcgPpi,
+ PeiServices,
+ sizeof(SelfTestCmd),
+ (UINT8*)&SelfTestCmd,
+ ReturnSize,
+ (UINT8*)&SelfTestReponse);
+
+
+ Status = TpmPpi->Close(TpmPpi, PeiServices );
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ return Status;
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgPeiTpmStartup
+//
+// Description: Sends Initial TPM Startup Command
+//
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+// IN EFI_BOOT_MODE BootMode
+//
+// Output: EFI STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+ TcgPeiTpmStartup(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_BOOT_MODE BootMode )
+{
+ EFI_STATUS Status;
+ TPM_1_2_CMD_STARTUP cmdStartup;
+ TPM_1_2_RET_HEADER retHeader;
+ TPM_STARTUP_TYPE TpmSt;
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCG_PPI *TcgPpi = NULL;
+ TCG_PLATFORM_SETUP_INTERFACE *TcgPeiPolicy = NULL;
+ EFI_GUID gTcgPeiPolicyGuid =\
+ TCG_PLATFORM_SETUP_PEI_POLICY_GUID;
+ TCG_CONFIGURATION ConfigFlags;
+ EFI_HOB_GUID_TYPE *ptrTpm20Hob;
+ UINT8 Tpm20Device = FALSE;
+
+ TpmSt = TPM_ST_CLEAR;
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &gTcgPeiPolicyGuid,
+ 0, NULL,
+ &TcgPeiPolicy);
+
+ if(EFI_ERROR(Status) || TcgPeiPolicy == NULL )return Status;
+
+ Status = TcgPeiPolicy->getTcgPeiPolicy(PeiServices, &ConfigFlags);
+
+ if(EFI_ERROR(Status))return Status;
+
+ if(ConfigFlags.DisallowTpm == 1)
+ {
+ BootMode = BOOT_IN_RECOVERY_MODE; //deactivate the TPM
+ }
+
+ if ( BootMode == BOOT_ON_S3_RESUME )
+ {
+ TpmSt = TPM_ST_STATE;
+ }
+
+#if (TCG_CONVENTIONAL_BIOS_6_1)
+
+ if ( BootMode == BOOT_IN_RECOVERY_MODE )
+ {
+ TpmSt = TPM_ST_DEACTIVATED;
+ }
+#endif
+
+ Status = LocateTcgPpi(PeiServices,&TpmPpi, &TcgPpi);
+ if(EFI_ERROR(Status))return EFI_NOT_FOUND;
+
+ Status = TpmPpi->Init(TpmPpi, PeiServices );
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ cmdStartup.Header.Tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ cmdStartup.Header.ParamSize = TPM_H2NL( sizeof (cmdStartup));
+ cmdStartup.Header.Ordinal = TPM_H2NL( TPM_ORD_Startup );
+ cmdStartup.StartupType = TPM_H2NS( TpmSt );
+
+ Status = TcgPpi->TCGPassThroughToTpm(
+ TcgPpi,
+ PeiServices,
+ sizeof (cmdStartup),
+ (UINT8*)&cmdStartup,
+ sizeof (retHeader),
+ (UINT8*)&retHeader);
+
+ PEI_TRACE((-1, PeiServices,
+ "Tcg Startup Command Return Code: size: %x; retCode:%x; tag:%x; bytes %08x\n",
+ TPM_H2NL(retHeader.ParamSize ),
+ TPM_H2NL(retHeader.RetCode ),
+ (UINT32)
+ TPM_H2NS(retHeader.Tag )));
+
+ if ( retHeader.ParamSize == 0 )
+ {
+ return EFI_DEVICE_ERROR;
+
+ }else if(retHeader.RetCode != 0){
+ //up till this point we do not know if it is a 1.2 device or
+ //a 2.0 device possibly a TPM 20 device send StartupCmd for TPM 20
+ Status = Tpm20PeiSendStartup(PeiServices);
+ if(!EFI_ERROR(Status)){
+ //TPM 2.0 device using TIS interface create TPM20 hob
+ Status = TcgPeiBuildHobGuid( PeiServices,
+ &Tpm20Hobguid,
+ sizeof (UINT8),
+ &ptrTpm20Hob );
+
+ ASSERT_PEI_ERROR( PeiServices, Status );
+ ptrTpm20Hob++;
+ Tpm20Device = TRUE;
+ (*PeiServices)->CopyMem( ptrTpm20Hob, &Tpm20Device, sizeof (Tpm20Device));
+
+ Status = (*PeiServices)->InstallPpi( PeiServices, &mTpm20SupportList[0] );
+ if ( EFI_ERROR( Status ))
+ {
+ return EFI_UNLOAD_IMAGE;
+ }
+ }
+ }
+ Status = TpmPpi->Close(TpmPpi, PeiServices );
+ if (EFI_ERROR( Status )){
+ return Status;
+ }
+
+ return (Status | TPM_H2NL( retHeader.RetCode ));
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcmPeiStartup
+//
+// Description: Sends Initial TPM Startup Command
+//
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+// IN EFI_BOOT_MODE BootMode
+//
+// Output: EFI STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+static
+EFI_STATUS
+__stdcall TcmPeiStartup(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_BOOT_MODE BootMode )
+{
+ EFI_STATUS Status;
+ TPM_1_2_CMD_STARTUP cmdStartup;
+ TPM_1_2_RET_HEADER retHeader;
+ TPM_STARTUP_TYPE TpmSt;
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCM_PPI *TcgPpi = NULL;
+
+ TpmSt = TPM_ST_CLEAR;
+
+ if ( BootMode == BOOT_ON_S3_RESUME )
+ {
+ TpmSt = TPM_ST_STATE;
+ }
+
+#if (TCG_CONVENTIONAL_BIOS_6_1)
+
+ if ( BootMode == BOOT_IN_RECOVERY_MODE )
+ {
+ TpmSt = TPM_ST_DEACTIVATED;
+ }
+#endif
+
+ Status = LocateTcmPpi(PeiServices,&TpmPpi, &TcgPpi);
+ if(EFI_ERROR(Status))return EFI_NOT_FOUND;
+
+ Status = TpmPpi->Init(TpmPpi, PeiServices );
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+
+ cmdStartup.Header.Tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ cmdStartup.Header.ParamSize = TPM_H2NL( sizeof (cmdStartup));
+ cmdStartup.Header.Ordinal = TPM_H2NL( TCM_ORD_Startup );
+
+ cmdStartup.StartupType = TcgCommonH2NS( TpmSt );
+
+ Status = TcgPpi->TCMPassThroughToTcm(
+ TcgPpi,
+ PeiServices,
+ sizeof (cmdStartup),
+ (UINT8*)&cmdStartup,
+ sizeof (retHeader),
+ (UINT8*)&retHeader);
+
+
+ Status = TpmPpi->Close(TpmPpi, PeiServices );
+ if (EFI_ERROR( Status )){
+ return Status;
+ }
+
+ PEI_TRACE((-1, PeiServices,
+ "Tcg Startup Command Return Code: size: %x; retCode:%x; tag:%x; bytes %08x\n",
+ TPM_H2NL(retHeader.ParamSize ),
+ TPM_H2NL(retHeader.RetCode ),
+ (UINT32)
+ TPM_H2NS(retHeader.Tag )));
+
+ if ( retHeader.ParamSize == 0 )
+ {
+ return EFI_DEVICE_ERROR;
+ }
+ return (Status | TPM_H2NL( retHeader.RetCode ));
+}
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: ContinueTPMSelfTest
+//
+// Description: Executes ContinueSelfTest operation on TPM. Certain TPM
+// operation require this operation to be execute before.
+//
+// Input: IN EFI_PEI_SERVICES **ps
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS ContinueTPMSelfTest(
+ IN EFI_PEI_SERVICES **ps )
+{
+ TPM_1_2_CMD_HEADER cmd;
+ TPM_1_2_RET_HEADER result;
+ EFI_STATUS Status;
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCG_PPI *TcgPpi = NULL;
+ AMI_TPM20SUPPORTTYPE_PPI *Tpm20SupportType = NULL;
+
+ Status = (*ps)->LocatePpi(
+ ps,
+ &Tpm20Hobguid,
+ 0, NULL,
+ &Tpm20SupportType);
+
+
+ if(!EFI_ERROR(Status) && Tpm20SupportType!= NULL){
+ return (Tpm20PeiSelfTest(ps));
+ }
+
+
+#if defined DONT_SEND_SELFTEST_TILL_READY_TO_BOOT && DONT_SEND_SELFTEST_TILL_READY_TO_BOOT == 1
+ if(*(UINT16 *)(UINTN)(PORT_TPM_IOMEMBASE + 0xF00) == SELF_TEST_VID)
+ {
+ return EFI_SUCCESS;
+ }
+#endif
+
+ Status = LocateTcgPpi(ps,&TpmPpi, &TcgPpi);
+ if(EFI_ERROR(Status))return EFI_NOT_FOUND;
+
+ Status = TpmPpi->Init(TpmPpi, ps );
+ if ( EFI_ERROR( Status )){
+ return Status;
+ }
+
+ cmd.Tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ cmd.ParamSize = TPM_H2NL( sizeof (cmd));
+ cmd.Ordinal = TPM_H2NL( TPM_ORD_ContinueSelfTest );
+
+ Status = TcgPpi->TCGPassThroughToTpm(
+ TcgPpi,
+ ps,
+ sizeof (cmd),
+ (UINT8*)&cmd,
+ sizeof (result),
+ (UINT8*)&result );
+
+ PEI_TRACE((-1, ps, "TCG Pei: Self Test : status=%x; RetCode=%x\n", Status,
+ TPM_H2NL( result.RetCode )));
+
+ Status = TpmPpi->Close(TpmPpi, ps );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+ else if ( result.RetCode != 0 )
+ {
+ return EFI_DEVICE_ERROR;
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: ContinueTCMSelfTest
+//
+// Description: Executes ContinueSelfTest operation on TPM. Certain TPM
+// operation require this operation to be execute before.
+//
+// Input: IN EFI_PEI_SERVICES **ps
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+
+EFI_STATUS ContinueTCMSelfTest(
+ IN EFI_PEI_SERVICES **ps )
+{
+ TPM_1_2_CMD_HEADER cmd;
+ TPM_1_2_RET_HEADER result;
+ EFI_STATUS Status;
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCG_PPI *TcgPpi = NULL;
+
+
+ Status = LocateTcgPpi(ps,&TpmPpi, &TcgPpi);
+ if(EFI_ERROR(Status))return EFI_NOT_FOUND;
+
+ Status = TpmPpi->Init(TpmPpi, ps );
+ if ( EFI_ERROR( Status )){
+ return Status;
+ }
+
+ cmd.Tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ cmd.ParamSize = TPM_H2NL( sizeof (cmd));
+ cmd.Ordinal = TPM_H2NL(TCM_ORD_ContinueSelfTest );
+
+ Status = TcgPpi->TCGPassThroughToTpm(
+ TcgPpi,
+ ps,
+ sizeof (cmd),
+ (UINT8*)&cmd,
+ sizeof (result),
+ (UINT8*)&result );
+
+ PEI_TRACE((-1, ps, "TCG Pei: Self Test : status=%x; RetCode=%x\n", Status,
+ TPM_H2NL( result.RetCode )));
+
+ Status = TpmPpi->Close(TpmPpi, ps );
+
+ if ( EFI_ERROR( Status ))
+ {
+ return Status;
+ }
+
+ if ( result.RetCode != 0 )
+ {
+ return EFI_DEVICE_ERROR;
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: SendStartupandSelftest
+//
+// Description: This function performs TPM MA initialization
+//
+//
+// Input: IN EFI_FFS_FILE_HEADER *FfsHeader
+// IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS SendStartupandSelftest(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_BOOT_MODE BootMode
+)
+{
+ EFI_STATUS Status;
+ EFI_GUID SkipTpmStartupGuid = AMI_SKIP_TPM_STARTUP_GUID;
+ BOOLEAN SkipTpmStartup = FALSE;
+ AMI_TCG_PEI_FUNCTION_OVERRIDE_PPI *PpiOverride;
+ TCG_PLATFORM_SETUP_INTERFACE *TcgPeiPolicy = NULL;
+ EFI_GUID gTcgPeiPolicyGuid =\
+ TCG_PLATFORM_SETUP_PEI_POLICY_GUID;
+ TCG_CONFIGURATION ConfigFlags;
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &SkipTpmStartupGuid,
+ 0, NULL,
+ &PpiOverride);
+
+ if(!EFI_ERROR(Status)) {
+ SkipTpmStartup = TRUE;
+ }
+
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &gTcgPeiPolicyGuid,
+ 0, NULL,
+ &TcgPeiPolicy);
+
+ if(EFI_ERROR(Status) || TcgPeiPolicy == NULL )return Status;
+
+ Status = TcgPeiPolicy->getTcgPeiPolicy(PeiServices, &ConfigFlags);
+
+ if(EFI_ERROR(Status))return Status;
+
+ if(ConfigFlags.DisallowTpm == 1)
+ {
+ BootMode = BOOT_IN_RECOVERY_MODE; //deactivate the TPM
+ Status = TcgPeiTpmStartup( PeiServices, BootMode );
+ return Status;
+ }
+
+ if(!AutoSupportType()){
+ if (!SkipTpmStartup) {
+ Status = TcgPeiTpmStartup( PeiServices, BootMode );
+ if(Status){
+ //sartup command failed
+ return EFI_DEVICE_ERROR;
+ }
+ }
+
+ Status = ContinueTPMSelfTest( PeiServices );
+ if(Status){
+ //Selftest command failed
+ return EFI_DEVICE_ERROR;
+ }
+ }else{
+ Status = TcmPeiStartup( PeiServices, BootMode );
+ if(Status){
+ //sartup command failed
+ return EFI_DEVICE_ERROR;
+ }
+
+ Status = ContinueTCMSelfTest( PeiServices );
+ if(Status){
+ //selftest command failed
+ return EFI_DEVICE_ERROR;
+ }
+ }
+ return Status;
+}
+
+
+
+
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TCGPEI_GETCAP
+//
+// Description: Executes TPM operation to read capabilities
+//
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: TPM_Capabilities_PermanentFlag
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+TPM_Capabilities_PermanentFlag INTTCGPEI_GETCAP(
+ IN EFI_PEI_SERVICES **PeiServices )
+{
+ TPM_Capabilities_PermanentFlag *cap = NULL;
+ EFI_STATUS Status;
+ TPM_GetCapabilities_Input cmdGetCap;
+ UINT8 result[0x100];
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCG_PPI *TcgPpi = NULL;
+ EFI_GUID TcgPpiguid = PEI_TCG_PPI_GUID;
+ EFI_GUID TpmDevicePpiguid = PEI_TPM_PPI_GUID;
+
+ cmdGetCap.Tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ cmdGetCap.ParamSize = TPM_H2NL( sizeof (cmdGetCap));
+ cmdGetCap.CommandCode = TPM_H2NL( TPM_ORD_GetCapability );
+ cmdGetCap.caparea = TPM_H2NL( TPM_CAP_FLAG );
+ cmdGetCap.subCapSize = TPM_H2NL( 4 ); // subCap is always 32bit long
+ cmdGetCap.subCap = TPM_H2NL( TPM_CAP_FLAG_PERMANENT );
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &TpmDevicePpiguid,
+ 0, NULL,
+ &TpmPpi);
+
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+ Status = TpmPpi->Init(TpmPpi, PeiServices);
+
+ if(Status){
+ MemSet(result,sizeof(TPM_Capabilities_PermanentFlag), 0);
+ cap = (TPM_Capabilities_PermanentFlag*)result;
+ return *cap;
+ }
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &TcgPpiguid,
+ 0, NULL,
+ &TcgPpi);
+
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+
+ Status = TcgPpi->TCGPassThroughToTpm(
+ TcgPpi,
+ PeiServices,
+ sizeof(cmdGetCap),
+ (UINT8*)&cmdGetCap,
+ 0x100,
+ result );
+
+ cap = (TPM_Capabilities_PermanentFlag*)result;
+
+ PEI_TRACE((-1, PeiServices,
+ "GetCapability: %r; size: %x; retCode:%x; tag:%x; bytes %08x\n",
+ Status,TPM_H2NL( cap->ParamSize ), TPM_H2NL(cap->RetCode ),
+ (UINT32)TPM_H2NS(cap->tag ), TPM_H2NL( *(UINT32*)&cap->disabled )));
+
+
+ Status = TpmPpi->Close(TpmPpi, PeiServices);
+
+ return *cap;
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TCGPEI_GETCAP
+//
+// Description: Executes TPM operation to read capabilities
+//
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: TPM_Capabilities_PermanentFlag
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+TPM_Capabilities_PermanentFlag NuvotonProprietaryGetFlags(
+ IN EFI_PEI_SERVICES **PeiServices )
+{
+ TPM_Capabilities_PermanentFlag cap;
+ EFI_STATUS Status;
+ TPM_RQU_COMMAND_HDR cmdGetTpmStatus;
+ UINT8 result[0x100];
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCG_PPI *TcgPpi = NULL;
+ EFI_GUID TcgPpiguid = PEI_TCG_PPI_GUID;
+ EFI_GUID TpmDevicePpiguid = PEI_TPM_PPI_GUID;
+
+ cmdGetTpmStatus.tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ cmdGetTpmStatus.paramSize = TPM_H2NL( sizeof (TPM_RQU_COMMAND_HDR));
+ cmdGetTpmStatus.ordinal = TPM_H2NL( NTC_ORD_GET_TPM_STATUS );
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &TpmDevicePpiguid,
+ 0, NULL,
+ &TpmPpi);
+
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+ Status = TpmPpi->Init(TpmPpi, PeiServices);
+
+ MemSet(&cap,sizeof(TPM_Capabilities_PermanentFlag), 0);
+
+ if(Status){
+ return cap;
+ }
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &TcgPpiguid,
+ 0, NULL,
+ &TcgPpi);
+
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+
+ Status = TcgPpi->TCGPassThroughToTpm(
+ TcgPpi,
+ PeiServices,
+ sizeof(cmdGetTpmStatus),
+ (UINT8*)&cmdGetTpmStatus,
+ 0x100,
+ result );
+
+ if(((NUVOTON_SPECIFIC_FLAGS *)result)->RetCode == 0)
+ {
+ if(((NUVOTON_SPECIFIC_FLAGS *)result)->isdisabled){
+ cap.disabled = 1;
+ }
+
+ if(((NUVOTON_SPECIFIC_FLAGS *)result)->isdeactivated){
+ cap.deactivated = 1;
+ }
+
+ if(((NUVOTON_SPECIFIC_FLAGS *)result)->isOwnerSet){
+ cap.ownership = 1;
+ }
+ }else{
+ cap.RetCode = ((NUVOTON_SPECIFIC_FLAGS *)result)->RetCode;
+ }
+
+
+ Status = TpmPpi->Close(TpmPpi, PeiServices);
+
+ return cap;
+}
+
+
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TCGPEI_GETCAP
+//
+// Description: Executes TPM operation to read capabilities
+//
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: TPM_Capabilities_PermanentFlag
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+TPM_Capabilities_PermanentFlag TCGPEI_GETCAP(
+ IN EFI_PEI_SERVICES **PeiServices )
+{
+ TPM_PERM_FLAGS *CapPpi;
+ EFI_GUID guid = AMI_TCG_PERM_FLAGS_GUID;
+ EFI_STATUS Status;
+ TPM_Capabilities_PermanentFlag Cap;
+ EFI_PEI_PPI_DESCRIPTOR *FlagsPpiDesc;
+ TPM_PERM_FLAGS *FlagsPpi;
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &guid,
+ 0,
+ NULL,
+ &CapPpi);
+
+
+ if (EFI_ERROR(Status)){
+ //
+ // Allocate descriptor and PPI structures
+ Status = (*PeiServices)->AllocatePool (PeiServices, sizeof (EFI_PEI_PPI_DESCRIPTOR), &FlagsPpiDesc);
+ ASSERT_PEI_ERROR (PeiServices, Status);
+ (*PeiServices)->SetMem ((VOID*) FlagsPpiDesc, sizeof (EFI_PEI_PPI_DESCRIPTOR), 0);
+
+ Status = (*PeiServices)->AllocatePool (PeiServices, sizeof (TPM_PERM_FLAGS), &FlagsPpi);
+ ASSERT_PEI_ERROR (PeiServices, Status);
+ (*PeiServices)->SetMem ((VOID*) FlagsPpi, sizeof (TPM_PERM_FLAGS), 0);
+
+ Cap = INTTCGPEI_GETCAP( PeiServices );
+ (*PeiServices)->CopyMem(&FlagsPpi->Capabilities, &Cap, sizeof(TPM_Capabilities_PermanentFlag));
+
+ FlagsPpiDesc->Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
+ FlagsPpiDesc->Ppi = FlagsPpi;
+
+ FlagsPpiDesc->Guid = &Descguid;
+ Status = (**PeiServices).InstallPpi (PeiServices, FlagsPpiDesc);
+ ASSERT_PEI_ERROR (PeiServices, Status);
+
+ return Cap;
+ }
+ else{
+ return CapPpi->Capabilities;
+ }
+}
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TCGPEI_GETCAP
+//
+// Description: Executes TPM operation to read capabilities
+//
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: TPM_Capabilities_PermanentFlag
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+TCM_Capabilities_PermanentFlag TCMPEI_GETCAP(
+ IN EFI_PEI_SERVICES **PeiServices )
+{
+ TCM_Capabilities_PermanentFlag * cap = NULL;
+ EFI_STATUS Status;
+ TPM_GetCapabilities_Input cmdGetCap;
+ UINT8 result[0x100];
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCM_PPI *TcgPpi = NULL;
+
+
+ cmdGetCap.Tag = TPM_H2NS( TPM_TAG_RQU_COMMAND );
+ cmdGetCap.ParamSize = TPM_H2NL( sizeof (cmdGetCap));
+ cmdGetCap.CommandCode = TPM_H2NL( TCM_ORD_GetCapability );
+
+ cmdGetCap.caparea = TPM_H2NL( TPM_CAP_FLAG );
+ cmdGetCap.subCapSize = TPM_H2NL( 4 ); // subCap is always 32bit long
+ cmdGetCap.subCap = TPM_H2NL( TPM_CAP_FLAG_PERMANENT );
+
+ Status = LocateTcmPpi(PeiServices, &TpmPpi, &TcgPpi);
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+ Status = TpmPpi->Init(TpmPpi, PeiServices );
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+ Status = TcgPpi->TCMPassThroughToTcm(
+ TcgPpi,
+ PeiServices,
+ sizeof(cmdGetCap),
+ (UINT8*)&cmdGetCap,
+ 0x100,
+ result );
+
+ cap = (TCM_Capabilities_PermanentFlag*)result;
+
+ PEI_TRACE((-1, PeiServices,
+ "GetCapability: %r; size: %x; retCode:%x; tag:%x; bytes %08x\n",
+ Status,TPM_H2NL( cap->ParamSize ), TPM_H2NL(cap->RetCode ),
+ (UINT32)TPM_H2NS(cap->tag ), TPM_H2NL( *(UINT32*)&cap->disabled )));
+
+ Status = TpmPpi->Close(TpmPpi, PeiServices );
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+ return *cap;
+}
+
+
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: MeasureCRTMVersion
+//
+// Description: Measures EFI CRTM Version
+// Demo Version[546BFB1E1D0C4055A4AD4EF4BF17B83A]
+//
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+ MeasureCRTMVersion(
+ IN EFI_PEI_SERVICES **PeiServices )
+{
+ EFI_TCG_PCR_EVENT TcgEvent;
+ UINT32 EventNum;
+ UINTN Len = sizeof(EFI_GUID);
+ EFI_GUID CrtmVersion = CRTM_GUID;
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCG_PPI *TcgPpi = NULL;
+ EFI_STATUS Status;
+
+ TcgEvent.Header.PCRIndex = PCRi_CRTM_AND_POST_BIOS;
+ TcgEvent.Header.EventType = EV_S_CRTM_VERSION;
+ TcgEvent.Header.EventDataSize = Len;
+
+ Status = LocateTcgPpi(PeiServices,&TpmPpi, &TcgPpi);
+ if(EFI_ERROR(Status))return EFI_NOT_FOUND;
+
+ MemCpy(
+ &TcgEvent.Event.SCrtmVersion,
+ &CrtmVersion,
+ Len
+ );
+
+ return TcgPpi->TCGHashLogExtendEvent(
+ TcgPpi,
+ PeiServices,
+ (UINT8*)&TcgEvent.Event,
+ TcgEvent.Header.EventDataSize,
+ (TCG_PCR_EVENT*)&TcgEvent,
+ &EventNum
+ );
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: MeasureTcmCRTMVersion
+//
+// Description: Measures EFI CRTM Version
+// Demo Version[546BFB1E1D0C4055A4AD4EF4BF17B83A]
+//
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+ MeasureTcmCRTMVersion(
+ IN EFI_PEI_SERVICES **PeiServices )
+{
+ EFI_TCM_PCR_EVENT TcmEvent;
+ UINT32 EventNum;
+ UINTN Len = sizeof(EFI_GUID);
+ EFI_GUID CrtmVersion = CRTM_GUID;
+ PEI_TPM_PPI *TpmPpi = NULL;
+ PEI_TCM_PPI *TcgPpi = NULL;
+ EFI_STATUS Status;
+
+ TcmEvent.Header.PCRIndex = PCRi_CRTM_AND_POST_BIOS;
+ TcmEvent.Header.EventType = EV_S_CRTM_VERSION;
+ TcmEvent.Header.EventDataSize = Len;
+
+ MemCpy(&TcmEvent.Event.SCrtmVersion,
+ &CrtmVersion, Len);
+
+ Status = LocateTcmPpi(PeiServices, &TpmPpi, &TcgPpi);
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+ return TcgPpi->TCMHashLogExtendEvent(TcgPpi,
+ PeiServices,
+ (UINT8*)&TcmEvent.Event,
+ TcmEvent.Header.EventDataSize,
+ (TCM_PCR_EVENT*)&TcmEvent,
+ &EventNum);
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: MeasureTCGPcClientSpecID
+//
+// Description: Includes a measurement of the TcgSpecID into PCR[0]
+//
+//
+// Input: IN PEI_TCG_PPI* tcg,
+// IN EFI_PEI_SERVICES **ps
+//
+// Output:
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS MeasureTCGPcClientSpecID(
+ IN EFI_PEI_SERVICES **ps,
+ IN PEI_TCG_PPI *tcg )
+{
+ TCG_PCR_EVENT ev;
+ TCG_PCClientSpecIDEventStruct TcgInfo;
+ TCG_VendorInfoStruct TcgVenInfo;
+ UINT32 n;
+ EFI_STATUS status;
+ UINT8 i = 0, times = 0;
+
+ PEI_TRACE((-1, ps, "TCG Pei: TCG_PcClientSpecID\n"));
+
+ MemCpy(
+ TcgVenInfo.TCGBIOSVENDOR,
+ TCG_BIOS_VENDOR,
+ sizeof(TcgVenInfo.TCGBIOSVENDOR));
+
+ MemCpy(
+ TcgVenInfo.TCGOEMID,
+ TCG_OEM_ID,
+ sizeof(TcgVenInfo.TCGOEMID));
+
+ //fill in pc-client spec id
+ TcgInfo.PlatformClass = TCG_PLATFORM_CLASS;
+ TcgInfo.BIOSTypeInterface = TCG_BIOS_TYPE_INTERFACE;
+ TcgInfo.BIOSTypeMapping = TCG_BIOS_TYPE_MAPPING;
+ TcgInfo.SpecVersionMajor = TCG_SPEC_VERSION_MAJOR;
+ TcgInfo.SpecVersionMinor = TCG_SPEC_VERSION_MINOR;
+ TcgInfo.SpecErrata = TCG_SPEC_ERRATA;
+ TcgInfo.Reserved = 0x00;
+ TcgInfo.VendorInfo = &TcgVenInfo;
+ TcgInfo.VendorInfoSize = sizeof(TcgInfo.VendorInfo );
+
+
+ ev.PCRIndex = PCRi_CRTM_AND_POST_BIOS;
+ ev.EventType = EV_SPECIFICATION_IDENTIFIER;
+ ev.EventSize = sizeof (TcgInfo);
+ ev.Event[0] = *(UINT8*)&TcgInfo;
+
+M_TRY_AGAIN:
+ status = tcg->TCGHashLogExtendEvent(tcg,
+ ps,
+ (UINT8*)&TcgInfo,
+ sizeof(TcgInfo),
+ &ev,
+ &n );
+
+ if ( EFI_ERROR( status ))
+ {
+ if ( status == EFI_NOT_READY )
+ {
+ i = 0;
+ do
+ {
+ i++;
+ } while ( i < 200 );
+
+ if ( times > 0x2 )
+ {
+ PEI_TRACE((-1, ps,"xTcgPei::Could not measure PC_CLIENTSPECID \n"));
+ goto M_TRY_DONE;
+ }
+ times++;
+ goto M_TRY_AGAIN;
+ }
+ }
+M_TRY_DONE:
+ return status;
+}
+
+
+
+
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: MeasureDxeCoreFwVol
+//
+// Description: Measures the firmware volume as a EV_POST_CODE event
+//
+//
+// Input: IN PEI_TCG_PPI* tcg,
+// IN EFI_PEI_SERVICES **ps,
+// IN EFI_FIRMWARE_VOLUME_HEADER *fwv
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS MeasureDxeCoreFwVol(
+ IN PEI_TCG_PPI * tcg,
+ IN EFI_PEI_SERVICES **ps,
+ IN EFI_FIRMWARE_VOLUME_HEADER *fwv )
+{
+ PEI_EFI_POST_CODE ev;
+ UINT32 n;
+ EFI_STATUS status;
+ void *Context = NULL;;
+
+
+ PEI_TRACE((-1, ps, "TCG Pei: measure FwMain: at %x size %d\n", fwv,
+ fwv->FvLength));
+
+ ev.Header.PCRIndex = PCRi_CRTM_AND_POST_BIOS;
+ ev.Header.EventType = EV_POST_CODE;
+ ev.Header.EventDataSize = sizeof (EFI_TCG_EV_POST_CODE);
+ ev.Event.PostCodeAddress = (EFI_PHYSICAL_ADDRESS)FV_MAIN_BASE;
+
+#if PARTIALLY_MEASURE_FVMAIN == 1
+ #if x64_BUILD
+ ev.Event.PostCodeLength = (UINT64)TCG_FV_MAIN_SIZE;
+ #else
+ ev.Event.PostCodeLength = (UINTN)TCG_FV_MAIN_SIZE;
+ #endif
+#else
+#if defined x64_BUILD && x64_BUILD == 1
+ ev.Event.PostCodeLength = (UINT64)fwv->FvLength;
+#else
+ ev.Event.PostCodeLength = (UINTN)fwv->FvLength;
+#endif
+#endif
+ status = tcg->TCGHashLogExtendEvent( tcg, ps, (UINT8*)fwv,
+ (UINT32)ev.Event.PostCodeLength,
+ (TCG_PCR_EVENT*)&ev, &n );
+
+ return status;
+
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcmMeasureDxeCoreFwVol
+//
+// Description: Measures the firmware volume as a EV_POST_CODE event
+//
+//
+// Input: IN PEI_TCM_PPI* tcg,
+// IN EFI_PEI_SERVICES **ps,
+// IN EFI_FIRMWARE_VOLUME_HEADER *fwv
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS TCMMeasureDxeCoreFwVol(
+ IN PEI_TCM_PPI * tcg,
+ IN EFI_PEI_SERVICES **ps,
+ IN EFI_FIRMWARE_VOLUME_HEADER *fwv )
+{
+ TCM_PEI_EFI_POST_CODE tcmev;
+ UINT32 n;
+ EFI_STATUS status;
+ TCG_DIGEST TempDigest;
+ void *Context = NULL;;
+
+
+ PEI_TRACE((-1, ps, "TCG Pei: measure FwMain: at %x size %d\n", fwv,
+ fwv->FvLength));
+
+ tcmev.Header.PCRIndex = PCRi_CRTM_AND_POST_BIOS;
+ tcmev.Header.EventType = EV_POST_CODE;
+ tcmev.Header.EventDataSize = sizeof (EFI_TCG_EV_POST_CODE );
+
+ SHA1HashAll( Context, fwv, (UINTN)fwv->FvLength, &TempDigest );
+
+ tcmev.Event.PostCodeAddress = (EFI_PHYSICAL_ADDRESS)&TempDigest;
+#if x64_BUILD
+ tcmev.Event.PostCodeLength = (UINT64)TPM_SHA1_160_HASH_LEN;
+#else
+ tcmev.Event.PostCodeLength = (UINTN)TPM_SHA1_160_HASH_LEN;
+#endif
+
+ status = tcg->TCMHashLogExtendEvent( tcg, ps, (UINT8*)&TempDigest,
+ (UINT32)tcmev.Event.PostCodeLength,
+ (TCM_PCR_EVENT*)&tcmev, &n );
+
+ return status;
+}
+
+
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: Lock_TPMPhysicalPresence
+//
+// Description: check whether to Lock TPM physical Presence
+//
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: BOOLEAN
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+BOOLEAN Lock_TPMPhysicalPresence(
+ IN EFI_PEI_SERVICES **PeiServices )
+{
+ EFI_GUID gAmiTcgEfiOSVarguid
+ = AMI_TCG_EFI_OS_VARIABLE_GUID;
+ UINTN OSVarSize = sizeof(AMI_PPI_NV_VAR);
+ UINT32 Attribs = EFI_VARIABLE_NON_VOLATILE
+ | EFI_VARIABLE_BOOTSERVICE_ACCESS;
+ UINTN Size = sizeof(UINT8);
+ UINTN INTSize = sizeof(UINT32);
+ UINT32 OwnerCap = 0;
+ EFI_GUID peiTcgEfiGlobalVariableGuid \
+ = TCG_EFI_GLOBAL_VARIABLE_GUID;
+ TCG_PLATFORM_SETUP_INTERFACE *TcgPeiPolicy = NULL;
+ EFI_GUID gTcgPeiPolicyGuid =\
+ TCG_PLATFORM_SETUP_PEI_POLICY_GUID;
+#if MANUFACTURING_MODE_SUPPORT
+ EFI_STATUS Status;
+ EFI_PEI_READ_ONLY_VARIABLE2_PPI *ReadVariable2Ppi;
+ EFI_GUID TcgManufacturingModeGuid = AMI_TCG_MANUFACTURING_MODE_HOB_GUID;
+ EFI_HOB_GUID_TYPE *TcgManufacturingModeHob;
+ BOOLEAN ManufacturingModeVar = FALSE;
+#endif
+
+#if MANUFACTURING_MODE_SUPPORT
+ Status = (*PeiServices)->LocatePpi(PeiServices,
+ &gEfiPeiReadOnlyVariable2PpiGuid,
+ 0,
+ NULL,
+ &ReadVariable2Ppi);
+
+ ASSERT_PEI_ERROR(PeiServices, Status);
+ if(!EFI_ERROR(Status)){
+ if(IsMfgMode(PeiServices, ReadVariable2Ppi)){
+
+ ManufacturingModeVar = TRUE;
+ Status = TcgPeiBuildHobGuid(PeiServices,
+ &TcgManufacturingModeGuid,
+ sizeof (BOOLEAN),
+ &TcgManufacturingModeHob );
+
+ TcgManufacturingModeHob++;
+ (*PeiServices)->CopyMem( TcgManufacturingModeHob, &ManufacturingModeVar, sizeof (ManufacturingModeVar));
+
+ return FALSE;
+ }
+ }
+#endif
+ return FALSE;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/LEGX16.bin b/Board/EM/TCG2/Common/LEGX16.bin
new file mode 100644
index 0000000..8dd33df
--- /dev/null
+++ b/Board/EM/TCG2/Common/LEGX16.bin
Binary files differ
diff --git a/Board/EM/TCG2/Common/MPTPM.bin b/Board/EM/TCG2/Common/MPTPM.bin
new file mode 100644
index 0000000..a301a53
--- /dev/null
+++ b/Board/EM/TCG2/Common/MPTPM.bin
Binary files differ
diff --git a/Board/EM/TCG2/Common/Setup/HandleLoadDefaultsSetup.c b/Board/EM/TCG2/Common/Setup/HandleLoadDefaultsSetup.c
new file mode 100644
index 0000000..e4a2cbb
--- /dev/null
+++ b/Board/EM/TCG2/Common/Setup/HandleLoadDefaultsSetup.c
@@ -0,0 +1,141 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgSetup/HandleLoadDefaultsSetup.c 2 6/11/14 4:16p Fredericko $
+//
+// $Revision: 2 $
+//
+// $Date: 6/11/14 4:16p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgSetup/HandleLoadDefaultsSetup.c $
+//
+// 2 6/11/14 4:16p Fredericko
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 1 10/08/13 12:05p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:57p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 1 11/22/11 6:41p Fredericko
+// [TAG] EIP67286
+// [Category] Improvement
+// [Description] Separate out how load defaults are handled in setup
+// from the TpmPwd.c
+// [Files] 1. HandleLoadDefaultsSetup.c
+// 2. TcgSetup.cif
+// 3. TcgSetup.mak
+// 4. TpmPwd.c
+//
+//**********************************************************************
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: TPMPwd.c
+//
+// Description:
+// Contains functions that handle TPM authentication
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#include "token.h"
+#include <EFI.h>
+#include <Protocol/SimpleTextIn.h>
+#include <Setup.h>
+#include "HiiLib.h"
+#include "KeyMon.h"
+#include "Core\EM\AMITSE\Inc\Variable.h"
+#include "TcgPlatformSetupPolicy.h"
+
+#if EFI_SPECIFICATION_VERSION>0x20000 && !defined(GUID_VARIABLE_DEFINITION)
+ #include "Include\UefiHii.h"
+ #include "Protocol/HiiDatabase.h"
+ #include "Protocol/HiiString.h"
+#else
+ #include "Protocol/HII.h"
+#endif
+
+extern EFI_BOOT_SERVICES *gBS;
+extern EFI_SYSTEM_TABLE *gST;
+extern EFI_RUNTIME_SERVICES *gRT;
+
+
+//****************************************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgUpdateDefaultsHook
+//
+// Description: Updates TCG status on F3
+//
+// Input: VOID
+//
+// Output: BOOLEAN
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//****************************************************************************************
+VOID TcgUpdateDefaultsHook(VOID )
+{
+ EFI_STATUS Status;
+ SETUP_DATA SetupData;
+ TCG_PLATFORM_SETUP_PROTOCOL *ProtocolInstance;
+ EFI_GUID Policyguid = TCG_PLATFORM_SETUP_POLICY_GUID;
+
+ //for OEMS that might want to update some policy on loaddefaults
+ //they need to update the policy on load defaults before this function is run
+ Status = gBS->LocateProtocol (&Policyguid, NULL, &ProtocolInstance);
+ if (EFI_ERROR (Status) || ProtocolInstance == NULL) {
+ return;
+ }
+
+ Status = VarSetValue(0, (UINT32)(((UINTN)&SetupData.TpmSupport - (UINTN)&SetupData)), (UINTN)sizeof(UINT8), &ProtocolInstance->ConfigFlags.TpmSupport );
+ Status = VarSetValue(0, (UINT32)(((UINTN)&SetupData.TcmSupport - (UINTN)&SetupData)), (UINTN)sizeof(UINT8), &ProtocolInstance->ConfigFlags.TcmSupport );
+ Status = VarSetValue(0, (UINT32)(((UINTN)&SetupData.TpmEnable - (UINTN)&SetupData)), (UINTN)sizeof(UINT8), &ProtocolInstance->ConfigFlags.TpmEnable );
+ Status = VarSetValue(0, (UINT32)(((UINTN)&SetupData.TpmAuthenticate - (UINTN)&SetupData)), (UINTN)sizeof(UINT8), &ProtocolInstance->ConfigFlags.TpmAuthenticate );
+ Status = VarSetValue(0, (UINT32)(((UINTN)&SetupData.TpmOperation - (UINTN)&SetupData)), (UINTN)sizeof(UINT8), &ProtocolInstance->ConfigFlags.TpmOperation );
+ Status = VarSetValue(0, (UINT32)(((UINTN)&SetupData.TpmHrdW - (UINTN)&SetupData)), (UINTN)sizeof(UINT8), &ProtocolInstance->ConfigFlags.TpmHardware );
+ Status = VarSetValue(0, (UINT32)(((UINTN)&SetupData.TpmEnaDisable - (UINTN)&SetupData)), (UINTN)sizeof(UINT8), &ProtocolInstance->ConfigFlags.TpmEnaDisable );
+ Status = VarSetValue(0, (UINT32)(((UINTN)&SetupData.TpmActDeact - (UINTN)&SetupData)), (UINTN)sizeof(UINT8), &ProtocolInstance->ConfigFlags.TpmActDeact );
+ Status = VarSetValue(0, (UINT32)(((UINTN)&SetupData.TpmOwnedUnowned - (UINTN)&SetupData)), (UINTN)sizeof(UINT8), &ProtocolInstance->ConfigFlags.TpmOwnedUnowned );
+ Status = VarSetValue(0, (UINT32)(((UINTN)&SetupData.TcgSupportEnabled - (UINTN)&SetupData)), (UINTN)sizeof(UINT8), &ProtocolInstance->ConfigFlags.TcgSupportEnabled );
+ Status = VarSetValue(0, (UINT32)(((UINTN)&SetupData.TpmError - (UINTN)&SetupData)), (UINTN)sizeof(UINT8), &ProtocolInstance->ConfigFlags.TpmError );
+ Status = VarSetValue(0, (UINT32)(((UINTN)&SetupData.SuppressTcg - (UINTN)&SetupData)), (UINTN)sizeof(UINT8), &ProtocolInstance->ConfigFlags.DisallowTpm );
+
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/Setup/TPMPwd.c b/Board/EM/TCG2/Common/Setup/TPMPwd.c
new file mode 100644
index 0000000..07cd976
--- /dev/null
+++ b/Board/EM/TCG2/Common/Setup/TPMPwd.c
@@ -0,0 +1,346 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
+// $Header: /Alaska/Projects/Intel/Haswell/LynxPoint_SharkBay-DT_Crb_1AQQW/Board/EM/TCG2/Common/Setup/TPMPwd.c 1 7/08/15 4:25a Chienhsieh $
+//
+// $Revision: 1 $
+//
+// $Date: 7/08/15 4:25a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/Projects/Intel/Haswell/LynxPoint_SharkBay-DT_Crb_1AQQW/Board/EM/TCG2/Common/Setup/TPMPwd.c $
+//
+// 1 7/08/15 4:25a Chienhsieh
+//
+// 2 6/11/14 4:15p Fredericko
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 1 10/08/13 12:05p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:57p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 7 10/22/12 1:21a Jittenkumarp
+// [TAG] EIP100790
+// [Category] Improvement
+// [Description] ActivateApplication in AMITSE delayed if the SoftKbd
+// support enabled thereforTPM Message are not displayed
+// [Files] AmiTcgPlatformDxe.c, TCG.sdl, TPMPwd.c , AmiTcgPlatform.sdl
+//
+// 6 11/22/11 6:45p Fredericko
+// [TAG] EIP67286
+// [Category] Improvement
+// [Description] Separate out how load defaults are handled in setup
+// from the TpmPwd.c
+// [Files] 1. HandleLoadDefaultsSetup.c
+// 2. TcgSetup.cif
+// 3. TcgSetup.mak
+// 4. TpmPwd.c
+//
+// 5 10/07/11 6:55p Fredericko
+//
+// 4 9/03/11 8:07p Fredericko
+//
+// 3 8/26/11 2:59p Fredericko
+// [TAG] EIP67286
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Tpm strings will not update probably when load optimize
+// defaults is selected in setup
+// [RootCause] Tcgsetup.sd did not account for F3 from setup
+// [Solution] Fix TcgSetup.sd to update setup that status information
+// for TPM will be available after reset.
+// [Files] Tcg.sdl, TPMPwd.c, TcgSetup.sd, TcgSetup.uni
+//
+// 2 3/29/11 1:26p Fredericko
+//
+// 1 3/28/11 2:58p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+// 7 8/09/10 2:32p Fredericko
+// UEFI 2.1 changes
+//
+// 6 5/19/10 6:25p Fredericko
+// Updated AMI Function Headers
+// Code Beautification
+// EIP 37653
+//
+// 5 6/02/09 1:18p Fredericko
+//
+// 4 4/30/09 6:27p Fredericko
+// Updated Header Date
+//
+// 3 4/30/09 5:47p Fredericko
+// AMI company Header Address added
+//
+// 2 10/01/07 5:33p Fasihm
+// Corrected the directive for AMIPostMgr.h to point to the correct
+// location.
+//
+// 1 8/09/07 11:35a Pats
+// Added to support password authentication. Requires TSE with capability
+// of replacing ProcessConInAvailability through elinks.
+//
+//**********************************************************************
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: TPMPwd.c
+//
+// Description:
+// Contains functions that handle TPM authentication
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#include "token.h"
+#include <EFI.h>
+#include <Protocol/SimpleTextIn.h>
+#include <Protocol/EfiOEMBadging.h>
+#include <Setup.h>
+#include "AMITSEStrTokens.h"
+#include "commonoem.h"
+#include "Protocol\AMIPostMgr.h"
+#include "LogoLib.h"
+#include "Mem.h"
+#include "HiiLib.h"
+#include "PwdLib.h"
+#include "KeyMon.h"
+#include "bootflow.h"
+#include "commonoem.h"
+#include "Core\EM\AMITSE\Inc\Variable.h"
+#include "TcgPlatformSetupPolicy.h"
+
+#if EFI_SPECIFICATION_VERSION>0x20000 && !defined(GUID_VARIABLE_DEFINITION)
+ #include "Include\UefiHii.h"
+ #include "Protocol/HiiDatabase.h"
+ #include "Protocol/HiiString.h"
+#else
+ #include "Protocol/HII.h"
+#endif
+
+#if TPM_PASSWORD_AUTHENTICATION
+#define TCG_PASSWORD_AUTHENTICATION_GUID \
+ {0xB093BDD6, 0x2DE2, 0x4871, 0x87, 0x68, 0xEE, 0x1D, 0xA5, 0x72, 0x49, 0xB4 }
+EFI_GUID TcgPasswordAuthenticationGuid = TCG_PASSWORD_AUTHENTICATION_GUID;
+#endif
+
+extern EFI_BOOT_SERVICES *gBS;
+extern EFI_SYSTEM_TABLE *gST;
+extern EFI_RUNTIME_SERVICES *gRT;
+
+
+typedef struct
+{ UINT16 VID;
+ UINT16 DID;
+} TCM_ID_STRUC;
+
+
+TCM_ID_STRUC TCMSupportedArray[NUMBER_OF_SUPPORTED_TCM_DEVICES]={
+ {SUPPORTED_TCM_DEVICE_1_VID,SUPPORTED_TCM_DEVICE_1_DID}, //ZTEIC
+ {SUPPORTED_TCM_DEVICE_2_VID,SUPPORTED_TCM_DEVICE_2_DID} //ZTEIC2
+};
+
+
+
+//****************************************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TCGProcessConInAvailability
+//
+// Description: This is a replacement for the ProcessConInAvailability
+// hook in TSE, to provide password verification in the
+// TCG eModule.
+// This function is a hook called when TSE determines
+// that console is available. This function is available
+// as ELINK. In the generic implementation boot password
+// is prompted in this function.
+//
+//
+// Input: VOID
+//
+// Output: BOOLEAN
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//****************************************************************************************
+BOOLEAN TCGProcessConInAvailability (
+ EFI_EVENT Event,
+ VOID *Context )
+{
+ CHAR16 *text = NULL;
+ UINTN NoOfRetries;
+ UINT32 PasswordInstalled = AMI_PASSWORD_NONE;
+ UINTN Index;
+ EFI_INPUT_KEY Key;
+ BOOLEAN bScreenUsed = FALSE;
+ UINTN VariableSize = sizeof(UINT32);
+ UINT32 VariableData;
+ BOOLEAN PasswordRequest = FALSE;
+ EFI_GUID TcgEfiGlobalVariableGuid = TCG_EFI_GLOBAL_VARIABLE_GUID;
+ EFI_STATUS Status;
+
+ Status = gRT->GetVariable(
+ L"AskPassword",
+ &TcgEfiGlobalVariableGuid,
+ NULL,
+ &VariableSize,
+ &VariableData
+ );
+
+ if ( VariableData == 0x58494d41 ) // "AMIX"
+ {
+ PasswordRequest = TRUE;
+ }
+
+ PasswordInstalled = PasswordCheckInstalled( );
+ NoOfRetries = 3;
+
+ #if SETUP_USER_PASSWORD_POLICY
+
+ if ((PasswordInstalled & AMI_PASSWORD_USER) || (PasswordRequest))
+ {
+ #else
+
+ if ((PasswordInstalled & AMI_PASSWORD_ANY) || (PasswordRequest))
+ {
+ #endif
+
+ bScreenUsed = TRUE;
+
+ if ( AMI_PASSWORD_NONE ==
+ CheckSystemPassword( AMI_PASSWORD_NONE, &NoOfRetries, NULL ))
+ {
+ while ( 1 )
+ {
+ //Patch
+ //Ctl-Alt-Del is not recognized by core unless a
+ //ReadKeyStroke is issued
+ gBS->WaitForEvent( 1, &(gST->ConIn->WaitForKey), &Index );
+ gST->ConIn->ReadKeyStroke( gST->ConIn, &Key );
+ }
+ }
+ }
+
+ return bScreenUsed;
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: AutoSupportType
+//
+// Description: verifies support for a TCM module on a platform
+//
+// Input: NONE
+//
+// Output: BOOLEAN
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+extern
+BOOLEAN
+__stdcall AutoSupportType ()
+{
+#if TCG_LEGACY == 0
+ UINTN i=0;
+
+ for(i=0;i<(sizeof(TCMSupportedArray)/sizeof(TCM_ID_STRUC));i++){
+ if((TCMSupportedArray[i].VID == *(UINT16 *)(UINTN)(PORT_TPM_IOMEMBASE + 0xF00)) &&
+ (TCMSupportedArray[i].DID == *(UINT16 *)(UINTN)(PORT_TPM_IOMEMBASE + 0xF02))){
+ return TRUE;
+ }
+ }
+#endif
+ return FALSE;
+}
+
+//****************************************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: PasswordAuthentication
+//
+// Description: This function is available as ELINK. In will create a Event for password
+// authenication
+//
+//
+// Input: VOID
+//
+// Output:
+// Notes:
+//<AMI_PHDR_END>
+//****************************************************************************************
+
+VOID PasswordAuthentication( VOID )
+{
+ EFI_STATUS Status;
+ VOID *Registration;
+ EFI_EVENT Event;
+
+ Status = gBS->CreateEvent (
+ EVT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ TCGProcessConInAvailability,
+ NULL,
+ &Event
+ );
+ if(EFI_ERROR(Status)) {
+ return ;
+ }
+
+ Status = gBS->RegisterProtocolNotify (
+ &TcgPasswordAuthenticationGuid,
+ Event,
+ &Registration
+ );
+ if(EFI_ERROR(Status)) {
+ return ;
+ }
+
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/Setup/TcgSetup.c b/Board/EM/TCG2/Common/Setup/TcgSetup.c
new file mode 100644
index 0000000..38d9ed3
--- /dev/null
+++ b/Board/EM/TCG2/Common/Setup/TcgSetup.c
@@ -0,0 +1,67 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgSetup/TcgSetup.c 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgSetup/TcgSetup.c $
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 1 10/08/13 12:05p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:57p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 2 3/29/11 1:24p Fredericko
+//
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: TcgSetup.c
+//
+// Description:
+//
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/Setup/TcgSetup.cif b/Board/EM/TCG2/Common/Setup/TcgSetup.cif
new file mode 100644
index 0000000..5f7509f
--- /dev/null
+++ b/Board/EM/TCG2/Common/Setup/TcgSetup.cif
@@ -0,0 +1,15 @@
+<component>
+ name = "TcgSetup"
+ category = ModulePart
+ LocalRoot = "Board\EM\TCG2\Common\Setup"
+ RefName = "TcgSetup"
+[files]
+"TcgSetup.sdl"
+"TcgSetup.mak"
+"TcgSetup.c"
+"TcgSetup.sd"
+"TcgSetup.uni"
+"TcgSetupBoard.h"
+"TPMPwd.c"
+"HandleLoadDefaultsSetup.c"
+<endComponent>
diff --git a/Board/EM/TCG2/Common/Setup/TcgSetup.mak b/Board/EM/TCG2/Common/Setup/TcgSetup.mak
new file mode 100644
index 0000000..b95543c
--- /dev/null
+++ b/Board/EM/TCG2/Common/Setup/TcgSetup.mak
@@ -0,0 +1,123 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgSetup/TcgSetup.mak 1 4/21/14 2:18p Fredericko $
+#
+# $Revision: 1 $
+#
+# $Date: 4/21/14 2:18p $
+#**********************************************************************
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgSetup/TcgSetup.mak $
+#
+# 1 4/21/14 2:18p Fredericko
+#
+# 1 10/08/13 12:05p Fredericko
+# Initial Check-In for Tpm-Next module
+#
+# 1 7/10/13 5:57p Fredericko
+# [TAG] EIP120969
+# [Category] New Feature
+# [Description] TCG (TPM20)
+#
+# 5 11/22/11 6:44p Fredericko
+# [TAG] EIP67286
+# [Category] Improvement
+# [Description] Separate out how load defaults are handled in setup
+# from the TpmPwd.c
+# [Files] 1. HandleLoadDefaultsSetup.c
+# 2. TcgSetup.cif
+# 3. TcgSetup.mak
+# 4. TpmPwd.c
+#
+# 4 10/07/11 6:54p Fredericko
+#
+# 3 8/26/11 3:23p Fredericko
+#
+# 2 3/29/11 1:23p Fredericko
+#
+# 1 3/28/11 2:57p Fredericko
+# [TAG] EIP 54642
+# [Category] Improvement
+# [Description] 1. Checkin Files related to TCG function override
+# 2. Include TCM and TPM auto detection
+# [Files] Affects all TCG files
+#
+# 19 5/19/10 6:20p Fredericko
+# Updated AMI copyright header
+# Included File Header
+# EIP 37653
+#
+#*************************************************************************
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: TcgSetup.mak
+#
+# Description: Make file for the OEM-specific sub-component of TCG
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all:
+
+$(BUILD_DIR)\TcgSetup.mak : $(TCG_SETUP_DIR)\$(@B).cif $(TCG_SETUP_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(TCG_SETUP_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+TPMTSE_CFLAGS=$(CFLAGS) \
+ -I $(TSEBIN_DIR)\Inc \
+ -I $(TSEBIN_DIR)\
+ /I$(TcgPlatformSetupPolicy_DIR)\
+
+!IF $(TPM_PASSWORD_AUTHENTICATION)
+#---------------------------------------------------------------------------
+# Compile Password customization file
+#---------------------------------------------------------------------------
+AMITSEBin : $(BUILD_DIR)\$(TCG_SETUP_DIR)\TPMPwd.obj
+
+$(BUILD_DIR)\$(TCG_SETUP_DIR)\TPMPwd.obj : $(TCG_SETUP_DIR)\TPMPwd.obj
+ $(CC) $(TPMTSE_CFLAGS) /Fo$(BUILD_DIR)\$(TCG_SETUP_DIR)\TPMPwd.obj $(TCG_SETUP_DIR)\TPMPwd.c
+#---------------------------------------------------------------------------
+!ENDIF
+
+AMITSEBin : $(BUILD_DIR)\$(TCG_SETUP_DIR)\HandleLoadDefaultsSetup.obj
+
+$(BUILD_DIR)\$(TCG_SETUP_DIR)\HandleLoadDefaultsSetup.obj : $(TCG_SETUP_DIR)\HandleLoadDefaultsSetup.obj
+ $(CC) $(TPMTSE_CFLAGS) /Fo$(BUILD_DIR)\$(TCG_SETUP_DIR)\HandleLoadDefaultsSetup.obj $(TCG_SETUP_DIR)\HandleLoadDefaultsSetup.c
+
+#---------------------------------------------------------------------------
+# Create TCG Setup Screens
+#---------------------------------------------------------------------------
+SetupSdbs :$(BUILD_DIR)\TcgSetup.mak TCGSDB
+
+TCGSDB :
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\TcgSetup.mak all\
+ TYPE=SDB NAME=TcgSetup STRING_CONSUMERS=$(TCG_SETUP_DIR)\TcgSetup.sd
+#---------------------------------------------------------------------------
+
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/TCG2/Common/Setup/TcgSetup.sd b/Board/EM/TCG2/Common/Setup/TcgSetup.sd
new file mode 100644
index 0000000..fe83c2d
--- /dev/null
+++ b/Board/EM/TCG2/Common/Setup/TcgSetup.sd
@@ -0,0 +1,672 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgSetup/TcgSetup.sd 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgSetup/TcgSetup.sd $
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 2 3/17/14 3:22p Fredericko
+//
+// 1 10/08/13 12:05p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 2 10/03/13 2:45p Fredericko
+//
+// 1 7/10/13 5:57p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 6 9/28/11 6:33p Fredericko
+// [TAG] EIPEIP000000
+// [Category] Improvement
+// [Description] Provide a way to destroy TPM support without modifying
+// SDL token
+// [Files] TcgSetup.sd
+//
+// 5 9/07/11 9:31p Fredericko
+//
+// 4 8/29/11 6:52p Fredericko
+// [TAG] EIP00000
+// [Category] Improvement
+// [Description] Tcg Setup Improvement for Tpm status reporting
+// [Files] TcgSetup.sd
+//
+// 3 8/23/11 1:38a Fredericko
+// [TAG] EIP48182
+// [Category] Improvement
+// [Description] Changes to adopted setup customization.
+// [Files] TcgSetup.sd
+//
+// 19 5/19/10 6:24p Fredericko
+// Updated AMI copyright header
+//
+// 18 4/10/10 9:42p Fredericko
+// setup display operations on TPM operations
+//
+// 17 3/19/10 5:26p Fredericko
+// modified for legacy IO interface support
+//
+// 16 11/09/09 12:08p Fredericko
+// Checked in changes for UEFI 2.1. Also backward compatible with UEFI
+// 2.0. Please note that tools update might be required. Should build fine
+// with Tools Version 28.
+//
+// 15 4/30/09 6:26p Fredericko
+// Updated Header Date
+//
+// 14 4/30/09 5:46p Fredericko
+// AMI company Header Address changed
+//
+// 13 12/17/08 8:44p Rameshraju
+// Tpmenableold variable moved out from the Setup structure. EIP 17549
+//
+// 12 8/12/08 12:14p Fasihm
+// Added the Manufacturing flag to all the setup questions.
+//
+// 11 6/25/08 6:23p Fredericko
+// TXT related setup questions and information added.
+//
+// 10 1/04/08 3:51p Fredericko
+// Remove #define in Setup variables since it can cause Setup Size
+// problems in relation to the compiler
+//
+// 9 10/08/07 9:21a Fredericko
+//
+// 7 8/09/07 11:01a Pats
+// Modified to support password authentication, and to reset system if TPM
+// State is changed.
+//
+// 6 6/08/07 6:39p Fredericko
+// New TPm feature to allow disabling/Enabling TPM support. Status display
+// changes.
+//
+// 5 5/24/07 11:32a Fredericko
+// Improve Aesthetic value of TPM module in setup
+//
+// 4 5/22/07 7:21p Fredericko
+//
+// 3 5/22/07 4:00p Fredericko
+// TPM setup display status feature added
+//
+// 2 3/12/07 11:46a Fredericko
+// Feature: Grayout Setup operation if TCG is disabled in setup.
+//
+// 1 10/06/06 5:15p Andriyn
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: TCG.sd
+//
+// Description: TCG Form Template
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifdef SETUP_DATA_DEFINITION
+/***********************************************************/
+/* Put NVRAM data definitions here.
+/* For example: UINT8 Data1;
+/* These definitions will be converted by the build process
+/* to a definitions of SETUP_DATA fields.
+/***********************************************************/
+ UINT8 TpmEnable;
+ UINT8 TpmOperation;
+ UINT8 TpmEnaDisable;
+ UINT8 TpmActDeact;
+ UINT8 TpmOwnedUnowned;
+ UINT8 TpmSupport;
+ UINT8 TcgSupportEnabled;
+ UINT8 TcmSupport;
+ UINT8 TpmHrdW;
+ UINT8 TpmAuthenticate;
+ UINT8 SuppressTcg;
+ UINT8 TpmError;
+ UINT8 Tpm20Device;
+ UINT8 ShaPolicy;
+#endif
+
+#if defined(VFRCOMPILE) && !defined(CONTROLS_ARE_DEFINED)
+#define CONTROL_DEFINITION
+#endif
+#ifdef CONTROL_DEFINITION
+
+#define TCG_ONEOF_TPMSUPPORT\
+ oneof varid = SETUP_DATA.TpmSupport,\
+ prompt = STRING_TOKEN(STR_TPM_SUPPORT_PROMPT ),\
+ help = STRING_TOKEN(STR_TPMSUPPORT_HELP),\
+ option text = STRING_TOKEN(STR_TPM_DISABLE), value = 0, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_TPM_ENABLE), value = 1, flags = RESET_REQUIRED | MANUFACTURING | DEFAULT;\
+ endoneof;
+
+
+#define TCG_ONEOF_TCMSUPPORT\
+ oneof varid = SETUP_DATA.TpmSupport,\
+ prompt = STRING_TOKEN(STR_TCM_SUPPORT_PROMPT ),\
+ help = STRING_TOKEN(STR_TPMSUPPORT_HELP),\
+ option text = STRING_TOKEN(STR_TPM_DISABLE), value = 0, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_TPM_ENABLE), value = 1, flags = RESET_REQUIRED | MANUFACTURING | DEFAULT;\
+ endoneof;
+
+#define TCG_ONEOF_TPMAUTHENTICATE\
+ oneof varid = SETUP_DATA.TpmAuthenticate,\
+ prompt = STRING_TOKEN(STR_TPM_PASS_PROMPT),\
+ help = STRING_TOKEN(STR_TPM_PASS_HELP),\
+ option text = STRING_TOKEN(STR_TPM_DISABLE), value = 0, flags = RESET_REQUIRED | MANUFACTURING | DEFAULT;\
+ option text = STRING_TOKEN(STR_TPM_ENABLE), value = 1, flags = RESET_REQUIRED;\
+ endoneof;
+
+#define TCG_ONEOF_TPMENABLE\
+ oneof varid = SETUP_DATA.TpmEnable,\
+ prompt = STRING_TOKEN(STR_TPM_PROMPT),\
+ help = STRING_TOKEN(STR_TPM_HELP),\
+ option text = STRING_TOKEN(STR_TPM_DISABLED), value = 0, flags = RESET_REQUIRED | MANUFACTURING | DEFAULT;\
+ option text = STRING_TOKEN(STR_TPM_ENABLED), value = 1, flags = RESET_REQUIRED;\
+ endoneof;
+
+#define TCG_ONEOF_TCMENABLE\
+ oneof varid = SETUP_DATA.TpmEnable,\
+ prompt = STRING_TOKEN(STR_TCM_PROMPT),\
+ help = STRING_TOKEN(STR_TPM_HELP),\
+ option text = STRING_TOKEN(STR_TPM_DISABLED), value = 0, flags = RESET_REQUIRED | MANUFACTURING | DEFAULT;\
+ option text = STRING_TOKEN(STR_TPM_ENABLED), value = 1, flags = RESET_REQUIRED;\
+ endoneof;
+
+#define TCG_ONEOF_TPMOPERATION\
+ oneof varid = SETUP_DATA.TpmOperation,\
+ prompt = STRING_TOKEN(STR_TPMOP_PROMPT),\
+ help = STRING_TOKEN(STR_TPMOP_HELP),\
+ option text = STRING_TOKEN(STR_TPM_NONE), value = 0, flags = RESET_REQUIRED | MANUFACTURING | DEFAULT;\
+ option text = STRING_TOKEN(STR_TPM_OWNER), value = TCPA_PPIOP_OWNER_ON, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_TPM_NOOWNER), value = TCPA_PPIOP_OWNER_OFF, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_TPM_CLEAR), value = TCPA_PPIOP_CLEAR, flags = RESET_REQUIRED;\
+ endoneof;
+
+
+#define TCG_ONEOF_TCMOPERATION\
+ oneof varid = SETUP_DATA.TpmOperation,\
+ prompt = STRING_TOKEN(STR_TPMOP_PROMPT),\
+ help = STRING_TOKEN(STR_TPMOP_HELP),\
+ option text = STRING_TOKEN(STR_TPM_NONE), value = 0, flags = RESET_REQUIRED | MANUFACTURING | DEFAULT;\
+ option text = STRING_TOKEN(STR_TPM_OWNER), value = TCPA_PPIOP_OWNER_ON, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_TPM_NOOWNER), value = TCPA_PPIOP_OWNER_OFF, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_TCM_CLEAR), value = TCPA_PPIOP_CLEAR, flags = RESET_REQUIRED;\
+ endoneof;
+
+#define TCG_ONEOF_HASHPOLICY\
+ oneof varid = SETUP_DATA.ShaPolicy,\
+ prompt = STRING_TOKEN(STR_HASHPOLICY),\
+ help = STRING_TOKEN(STR_HASHPOLICY_HELP),\
+ option text = STRING_TOKEN(STR_SHA1), value = 0, flags = RESET_REQUIRED | MANUFACTURING | DEFAULT;\
+ endoneof;
+
+
+
+#define TCG_ONEOF_TPMENADISABLE\
+ oneof varid = SETUP_DATA.TpmEnaDisable,\
+ prompt = STRING_TOKEN(STR_ENABLED_PROMPT),\
+ help = STRING_TOKEN(STR_ONOFFSTATE_HELP),\
+ option text = STRING_TOKEN(STR_TPMDISABLED), value = 1, flags = DEFAULT | MANUFACTURING;\
+ option text = STRING_TOKEN(STR_TPMENABLED), value = 0, flags = 0;\
+ endoneof;
+
+#define TCG_ONEOF_TCMENADISABLE\
+ oneof varid = SETUP_DATA.TpmEnaDisable,\
+ prompt = STRING_TOKEN(STR_TCM_ENABLED_PROMPT),\
+ help = STRING_TOKEN(STR_ONOFFSTATE_HELP),\
+ option text = STRING_TOKEN(STR_TPMDISABLED), value = 1, flags = DEFAULT | MANUFACTURING;\
+ option text = STRING_TOKEN(STR_TPMENABLED), value = 0, flags = 0;\
+ endoneof;
+
+#define TCG_ONEOF_TPMACTDEACT\
+ oneof varid = SETUP_DATA.TpmActDeact,\
+ prompt = STRING_TOKEN(STR_ACTIVATE_PROMPT),\
+ help = STRING_TOKEN(STR_ONOFFSTATE_HELP),\
+ option text = STRING_TOKEN(STR_TPMDEACTIVATED), value = 1, flags = DEFAULT | MANUFACTURING;\
+ option text = STRING_TOKEN(STR_TPMACTIVATED), value = 0, flags = 0;\
+ endoneof;
+
+#define TCG_ONEOF_TCMACTDEACT\
+ oneof varid = SETUP_DATA.TpmActDeact,\
+ prompt = STRING_TOKEN(STR_TCM_ACTIVATE_PROMPT),\
+ help = STRING_TOKEN(STR_ONOFFSTATE_HELP),\
+ option text = STRING_TOKEN(STR_TPMDEACTIVATED), value = 1, flags = DEFAULT |MANUFACTURING;\
+ option text = STRING_TOKEN(STR_TPMACTIVATED), value = 0, flags = 0;\
+ endoneof;
+
+#define TCG_ONEOF_TPMOWNEDUNOWNED\
+ oneof varid = SETUP_DATA.TpmOwnedUnowned,\
+ prompt = STRING_TOKEN(STR_OWNED_OR_UNOWNED_PROMPT),\
+ help = STRING_TOKEN(STR_OWNED_OR_UNOWNED_HELP),\
+ option text = STRING_TOKEN(STR_OWNED), value = 1, flags = 0;\
+ option text = STRING_TOKEN(STR_UNOWNED), value = 0, flags = DEFAULT | MANUFACTURING;\
+ endoneof;
+
+#define TCG_ONEOF_TCMOWNEDUNOWNED\
+ oneof varid = SETUP_DATA.TpmOwnedUnowned,\
+ prompt = STRING_TOKEN(STR_TCM_OWNED_OR_UNOWNED_PROMPT),\
+ help = STRING_TOKEN(STR_OWNED_OR_UNOWNED_HELP),\
+ option text = STRING_TOKEN(STR_OWNED), value = 1, flags = 0;\
+ option text = STRING_TOKEN(STR_UNOWNED), value = 0, flags = DEFAULT |MANUFACTURING;\
+ endoneof;
+
+#endif //#ifdef CONTROL_DEFINITION
+
+#ifdef CONTROLS_WITH_DEFAULTS
+ TCG_ONEOF_TPMSUPPORT
+ TCG_ONEOF_TCMSUPPORT
+ TCG_ONEOF_TPMAUTHENTICATE
+ TCG_ONEOF_TPMENABLE
+ TCG_ONEOF_TCMENABLE
+ TCG_ONEOF_TPMOPERATION
+ TCG_ONEOF_TCMOPERATION
+ TCG_ONEOF_TPMENADISABLE
+ TCG_ONEOF_TCMENADISABLE
+ TCG_ONEOF_TPMACTDEACT
+ TCG_ONEOF_TCMACTDEACT
+ TCG_ONEOF_TPMOWNEDUNOWNED
+ TCG_ONEOF_TCMOWNEDUNOWNED
+#endif //#ifdef CONTROLS_WITH_DEFAULTS
+
+#ifdef FORM_SET_TYPEDEF
+ #include <TcgSetupBoard.h>
+ #include <token.h>
+#endif // FORM_SET_TYPEDEF
+
+#ifdef ADVANCED_FORM_SET
+ #ifndef SUPPRESS_GRAYOUT_ENDIF //old Core
+ #define SUPPRESS_GRAYOUT_ENDIF endif;
+ #endif
+
+ #ifdef FORM_SET_ITEM
+ // Define controls to be added to the main page of the formset
+ #endif
+
+ #ifdef FORM_SET_GOTO
+ // Define goto commands for the forms defined in this file
+ suppressif ideqval SETUP_DATA.SuppressTcg == 1;
+ suppressif ideqval SETUP_DATA.Tpm20Device == 1;
+ goto TCG_FORM_ID,
+ prompt = STRING_TOKEN(STR_TCG_FORM),
+ help = STRING_TOKEN(STR_TCG_FORM_HELP);
+ endif;
+ suppressif ideqval SETUP_DATA.Tpm20Device == 0;
+ goto TCG20_FORM_ID,
+ prompt = STRING_TOKEN(STR_TCG_FORM),
+ help = STRING_TOKEN(STR_TCG_FORM_HELP);
+ endif;
+ endif;
+ #endif
+
+#ifdef FORM_SET_FORM
+
+ #ifndef TCG_FORM_TCG
+ #define TCG_FORM_TCG
+
+ // Define forms
+ form formid = AUTO_ID(TCG_FORM_ID),
+ title = STRING_TOKEN(STR_TCG_FORM);
+
+
+ SUBTITLE(STRING_TOKEN(STR_TPM_CONFIGURATION))
+
+#if TPM_PASSWORD_AUTHENTICATION
+
+ suppressif ideqval SETUP_DATA.TcmSupport == 1;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER AND
+ ideqval SETUP_DATA.TpmAuthenticate == 1;
+
+ TCG_ONEOF_TPMSUPPORT
+
+ SUPPRESS_GRAYOUT_ENDIF // suppress-grayout
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval AMITSESETUP.AdminPassword == 0 OR
+ ideqval SETUP_DATA.TcmSupport == 1 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+
+ TCG_ONEOF_TPMAUTHENTICATE
+
+ SUPPRESS_GRAYOUT_ENDIF // suppress-grayout
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval SETUP_DATA.TcmSupport == 1 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER AND
+ ideqval SETUP_DATA.TpmAuthenticate == 1;
+
+ TCG_ONEOF_TPMENABLE
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval SETUP_DATA.TcmSupport == 1 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER AND
+ ideqval SETUP_DATA.TpmAuthenticate == 1 OR
+ ideqval SETUP_DATA.TpmActDeact == 1 OR
+ ideqval SETUP_DATA.TpmEnable == 0;
+
+ TCG_ONEOF_TPMOPERATION
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.TcmSupport == 0;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER AND
+ ideqval SETUP_DATA.TpmAuthenticate == 1;
+
+ TCG_ONEOF_TCMSUPPORT
+
+ SUPPRESS_GRAYOUT_ENDIF // suppress-grayout
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval AMITSESETUP.AdminPassword == 0 OR
+ ideqval SETUP_DATA.TcmSupport == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+
+ TCG_ONEOF_TPMAUTHENTICATE
+
+ SUPPRESS_GRAYOUT_ENDIF // suppress-grayout
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval SETUP_DATA.TcmSupport == 0 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER AND
+ ideqval SETUP_DATA.TpmAuthenticate == 1;
+
+ TCG_ONEOF_TCMENABLE
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval SETUP_DATA.TcmSupport == 0 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER AND
+ ideqval SETUP_DATA.TpmAuthenticate == 1 OR
+ ideqval SETUP_DATA.TpmActDeact == 1 OR
+ ideqval SETUP_DATA.TpmEnable == 0;
+
+ TCG_ONEOF_TPMOPERATION
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+#if DISPLAY_TPM_SETUP_ERROR == 1
+ suppressif ideqval SETUP_DATA.TpmError == 0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_TPM_SETUP_ERROR),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ endif;
+#endif
+
+#else
+
+ suppressif ideqval SETUP_DATA.TcmSupport == 1;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+
+ TCG_ONEOF_TPMSUPPORT
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval SETUP_DATA.TcmSupport == 1 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+
+ TCG_ONEOF_TPMENABLE
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval SETUP_DATA.TcmSupport == 1 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER OR
+ ideqval SETUP_DATA.TpmActDeact == 1 OR
+ ideqval SETUP_DATA.TpmEnable == 0;
+
+ TCG_ONEOF_TPMOPERATION
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+
+ suppressif ideqval SETUP_DATA.TcmSupport == 0;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+
+ TCG_ONEOF_TCMSUPPORT
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval SETUP_DATA.TcmSupport == 0 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+
+ TCG_ONEOF_TCMENABLE
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval SETUP_DATA.TcmSupport == 0 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER OR
+ ideqval SETUP_DATA.TpmActDeact == 1 OR
+ ideqval SETUP_DATA.TpmEnable == 0;
+
+ TCG_ONEOF_TPMOPERATION
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+#endif
+
+ SEPARATOR
+ SEPARATOR
+
+ SUBTITLE(STRING_TOKEN(STR_TPM_STATUS_INFO))
+
+#if TCG_LEGACY == 0
+ suppressif ideqval SETUP_DATA.TpmHrdW == 0 OR
+ ideqval SETUP_DATA.TpmHrdW == 2;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_TPMHARDWARE),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ endif;
+
+ suppressif ideqval SETUP_DATA.TcgSupportEnabled == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_TPMSUPP),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ endif;
+
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 0 OR
+ ideqval SETUP_DATA.TpmHrdW == 1;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_TPMOPTIMIZE),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ endif;
+#endif
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval SETUP_DATA.TcmSupport == 1 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SETUP_DATA.TpmEnable == 0 OR
+ ideqval SETUP_DATA.TpmEnable == 1;
+
+ TCG_ONEOF_TPMENADISABLE
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval SETUP_DATA.TcmSupport == 1 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SETUP_DATA.TpmEnable == 0 OR
+ ideqval SETUP_DATA.TpmEnable == 1;
+
+ TCG_ONEOF_TPMACTDEACT
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval SETUP_DATA.TcmSupport == 1 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SETUP_DATA.TpmEnable == 0 OR
+ ideqval SETUP_DATA.TpmEnable == 1;
+
+ TCG_ONEOF_TPMOWNEDUNOWNED
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval SETUP_DATA.TcmSupport == 0 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SETUP_DATA.TpmEnable == 0 OR
+ ideqval SETUP_DATA.TpmEnable == 1;
+
+ TCG_ONEOF_TCMENADISABLE
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval SETUP_DATA.TcmSupport == 0 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SETUP_DATA.TpmEnable == 0 OR
+ ideqval SETUP_DATA.TpmEnable == 1;
+
+ TCG_ONEOF_TCMACTDEACT
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+ suppressif ideqval SETUP_DATA.TpmHrdW == 1 OR
+ ideqval SETUP_DATA.TpmHrdW == 2 OR
+ ideqval SETUP_DATA.TcmSupport == 0 OR
+ ideqval SETUP_DATA.TcgSupportEnabled == 0 OR
+ ideqval SETUP_DATA.TpmSupport == 0;
+ grayoutif ideqval SETUP_DATA.TpmEnable == 0 OR
+ ideqval SETUP_DATA.TpmEnable == 1;
+
+ TCG_ONEOF_TCMOWNEDUNOWNED
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+#if DISPLAY_TPM_SETUP_ERROR == 1
+ suppressif ideqval SETUP_DATA.TpmError == 0;
+ text
+ help = STRING_TOKEN(STR_EMPTY),
+ text = STRING_TOKEN(STR_TPM_SETUP_ERROR),
+ text = STRING_TOKEN(STR_EMPTY),
+ flags = 0,
+ key = 0;
+ endif;
+#endif
+ endform;
+ #endif // #ifndef TCG_FORM_TCG
+
+#ifdef FORM_SET_FORM
+
+ #ifndef TCG20_FORM_TCG
+ #define TCG20_FORM_TCG
+
+ // Define forms
+ form formid = AUTO_ID(TCG20_FORM_ID),
+ title = STRING_TOKEN(STR_TCG_FORM);
+
+ SEPARATOR
+ SEPARATOR
+
+ TCG_ONEOF_TPMSUPPORT
+
+ SEPARATOR
+
+ SUBTITLE(STRING_TOKEN(STR_TPM_20_DEVICE))
+
+ grayoutif ideqval SETUP_DATA.CsmLaunchPolicy == 1;
+ TCG_ONEOF_HASHPOLICY
+ endif;
+
+ endform;
+ #endif
+#endif //end TCG20_FORM
+
+ #endif
+#endif // ADVANCED_FORM_SET
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/Setup/TcgSetup.sdl b/Board/EM/TCG2/Common/Setup/TcgSetup.sdl
new file mode 100644
index 0000000..287713b
--- /dev/null
+++ b/Board/EM/TCG2/Common/Setup/TcgSetup.sdl
@@ -0,0 +1,50 @@
+TOKEN
+ Name = "TCGSETUP_SUPPORT"
+ Value = "1"
+ Help = "Main switch to control TCG setup pages"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "DISPLAY_TPM_SETUP_ERROR"
+ Value = "0"
+ Help = "Control warning message in setup if a TPM request form setup failed "
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+ TargetMAK = Yes
+End
+
+MODULE
+ Help = "Includes TcgSetup.mak to Project"
+ File = "TcgSetup.mak"
+End
+
+PATH
+ Name = "TCG_SETUP_DIR"
+ Help = "Tcg Setup Directory"
+End
+
+ELINK
+ Name = "$(TCG_SETUP_DIR)\TcgSetup.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 0
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\TcgSetup.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 0
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "-i $(TCG_SETUP_DIR)"
+ Parent = "SETUP_VFR_INCLUDES"
+ Priority = 0
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/TCG2/Common/Setup/TcgSetup.uni b/Board/EM/TCG2/Common/Setup/TcgSetup.uni
new file mode 100644
index 0000000..f845d95
--- /dev/null
+++ b/Board/EM/TCG2/Common/Setup/TcgSetup.uni
Binary files differ
diff --git a/Board/EM/TCG2/Common/Setup/TcgSetupBoard.h b/Board/EM/TCG2/Common/Setup/TcgSetupBoard.h
new file mode 100644
index 0000000..879a191
--- /dev/null
+++ b/Board/EM/TCG2/Common/Setup/TcgSetupBoard.h
@@ -0,0 +1,95 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgSetup/TcgSetupBoard.h 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgSetup/TcgSetupBoard.h $
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 1 10/08/13 12:05p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:57p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 3 7/25/11 3:16a Fredericko
+// [TAG] EIP65177
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] TCG PPI Spec ver 1.2 update
+//
+// 2 3/29/11 1:26p Fredericko
+//
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: TcgSetupBoard.h
+//
+// Description:
+//
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#define TCPA_PPIOP_ENABLE 1
+#define TCPA_PPIOP_DISABLE 2
+#define TCPA_PPIOP_ACTIVATE 3
+#define TCPA_PPIOP_DEACTIVATE 4
+#define TCPA_PPIOP_CLEAR 5
+#define TCPA_PPIOP_ENABLE_ACTV 6
+#define TCPA_PPIOP_DEACT_DSBL 7
+#define TCPA_PPIOP_OWNER_ON 8
+#define TCPA_PPIOP_OWNER_OFF 9
+#define TCPA_PPIOP_ENACTVOWNER 10
+#define TCPA_PPIOP_DADISBLOWNER 11
+#define TCPA_PPIOP_UNOWNEDFIELDUPGRADE 12
+#define TCPA_PPIOP_SETOPAUTH 13
+#define TCPA_PPIOP_CLEAR_ENACT 14
+#define TCPA_PPIOP_SETNOPPIPROVISION_FALSE 15
+#define TCPA_PPIOP_SETNOPPIPROVISION_TRUE 16
+#define TCPA_PPIOP_SETNOPPICLEAR_FALSE 17
+#define TCPA_PPIOP_SETNOPPICLEAR_TRUE 18
+#define TCPA_PPIOP_SETNOPPIMAINTENANCE_FALSE 19
+#define TCPA_PPIOP_SETNOPPIMAINTENANCE_TRUE 20
+#define TCPA_PPIOP_ENABLE_ACTV_CLEAR 21
+#define TCPA_PPIOP_ENABLE_ACTV_CLEAR_ENABLE_ACTV 22
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/TPM32BIN.bin b/Board/EM/TCG2/Common/TPM32BIN.bin
new file mode 100644
index 0000000..c51c29c
--- /dev/null
+++ b/Board/EM/TCG2/Common/TPM32BIN.bin
Binary files differ
diff --git a/Board/EM/TCG2/Common/TcgBins.mak b/Board/EM/TCG2/Common/TcgBins.mak
new file mode 100644
index 0000000..e2cf864
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgBins.mak
@@ -0,0 +1,102 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgBinaries/TcgBins.mak 1 4/21/14 2:16p Fredericko $
+#
+# $Revision: 1 $
+#
+# $Date: 4/21/14 2:16p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/TCG2/Common/AmiTcgBinaries/TcgBins.mak $
+#
+# 1 4/21/14 2:16p Fredericko
+#
+# 1 10/08/13 12:03p Fredericko
+# Initial Check-In for Tpm-Next module
+#
+# 1 7/10/13 5:52p Fredericko
+# [TAG] EIP120969
+# [Category] New Feature
+# [Description] TCG (TPM20)
+#
+# 2 3/29/11 2:47p Fredericko
+#
+#
+# [TAG] EIP 54642
+# [Category] Improvement
+# [Description] 1. Checkin Files related to TCG function override
+# 2. Include TCM and TPM auto detection
+# [Files] Affects all TCG files
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: TcgDxe.MAK
+#
+# Description: Make file for the tcgdxe component
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all : TcgBinaries
+
+TcgBinaries : $(BUILD_DIR)\LEGX16.ffs $(BUILD_DIR)\MPTPM.ffs $(BUILD_DIR)\TPM32BIN.ffs
+
+$(BUILD_DIR)\MPTPM.ffs: $(TCG_BINS_DIR)\$(@B).bin
+ $(MAKE) /$(MAKEFLAGS) /f Core\FFS.mak \
+ NAME=$(@B) \
+ BUILD_DIR=$(BUILD_DIR) SOURCE_DIR=$(TCG_BINS_DIR) \
+ GUID=7D113AA9-6280-48c6-BACE-DFE7668E8307 \
+ TYPE=EFI_FV_FILETYPE_FREEFORM \
+ COMPRESS=1\
+ BINFILE=$(TCG_BINS_DIR)\$(@B).bin FFSFILE=$@
+
+
+#
+# Create TPM32BIN.ffs
+#
+$(BUILD_DIR)\TPM32BIN.ffs : $(TCG_BINS_DIR)\$(@B).bin
+ $(MAKE) /$(MAKEFLAGS) /f Core\FFS.mak \
+ NAME=$(@B) \
+ BUILD_DIR=$(BUILD_DIR) SOURCE_DIR=$(TCG_BINS_DIR) \
+ GUID=0AA31BC6-3379-41e8-825A-53F82CC0F254 \
+ TYPE=EFI_FV_FILETYPE_FREEFORM \
+ COMPRESS=1\
+ BINFILE=$(TCG_BINS_DIR)\$(@B).bin FFSFILE=$@
+
+#
+# Create LEG16.ffs
+#
+$(BUILD_DIR)\LEGX16.ffs : $(TCG_BINS_DIR)\$(@B).bin
+ $(MAKE) /$(MAKEFLAGS) /f Core\FFS.mak \
+ NAME=$(@B) \
+ BUILD_DIR=$(BUILD_DIR) SOURCE_DIR=$(TCG_BINS_DIR) \
+ GUID=142204E2-C7B1-4af9-A729-923758D96D03 \
+ TYPE=EFI_FV_FILETYPE_FREEFORM \
+ COMPRESS=1\
+ BINFILE=$** FFSFILE=$@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/TCG2/Common/TcgBins.sdl b/Board/EM/TCG2/Common/TcgBins.sdl
new file mode 100644
index 0000000..f3eddde
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgBins.sdl
@@ -0,0 +1,42 @@
+TOKEN
+ Name = "AMI_TCG_BINARIES"
+ Value = "1"
+ Help = "Main switch to enable Ami TCG binaries support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+
+MODULE
+ Help = "Include make file for module"
+ File = "TcgBins.mak"
+End
+
+
+
+PATH
+ Name = "TCG_BINS_DIR"
+ Help = "Directory for module part"
+End
+
+
+ELINK
+ Name = "$(BUILD_DIR)\TPM32BIN.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\LEGX16.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\MPTPM.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/TCG2/Common/TcgDxeplatform.c b/Board/EM/TCG2/Common/TcgDxeplatform.c
new file mode 100644
index 0000000..520c0f9
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgDxeplatform.c
@@ -0,0 +1,168 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgDxeplatform/TcgDxeplatform.c 1 4/21/14 2:17p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:17p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgDxeplatform/TcgDxeplatform.c $
+//
+// 1 4/21/14 2:17p Fredericko
+//
+// 1 10/08/13 12:04p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:56p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 5 1/20/12 9:14p Fredericko
+//
+// 4 4/04/11 2:16p Fredericko
+// Removed #pragma optimization directives
+//
+// 3 4/01/11 9:39a Fredericko
+// Updated function Header
+//
+// 2 3/29/11 1:21p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: TcgDxeplatform.c
+//
+// Description: Function file for TcgDxeplatform
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include<EFI.h>
+#include "AmiTcgPlatformDxe.h"
+
+
+EFI_GUID gAmiTcgPlatformProtocolguid = AMI_TCG_PLATFORM_PROTOCOL_GUID;
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgDxeplatformEntry
+//
+// Description:
+//
+// Input: IN EFI_HANDLE ImageHandle,
+// IN EFI_SYSTEM_TABLE *SystemTable
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+EFIAPI TcgDxeplatformEntry(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable ){
+
+ AMI_TCG_PLATFORM_PROTOCOL *AmiTcgPlatformProtocol = NULL;
+ EFI_STATUS Status;
+ BOOLEAN *ResetAllTcgVar = NULL;
+ EFI_GUID legTcgGuid = AMI_TCG_RESETVAR_HOB_GUID;
+ void ** DummyPtr;
+
+ InitAmiLib( ImageHandle, SystemTable );
+
+ DummyPtr = &ResetAllTcgVar;
+ ResetAllTcgVar = (UINT8*)LocateATcgHob(
+ pST->NumberOfTableEntries,
+ pST->ConfigurationTable,
+ &legTcgGuid );
+
+ Status = pBS->LocateProtocol( &gAmiTcgPlatformProtocolguid, NULL,
+ &AmiTcgPlatformProtocol);
+
+ DummyPtr = &ResetAllTcgVar;
+
+ if ( *DummyPtr != NULL )
+ {
+ //if ResetAllTcgVar, call setAllTcgVariable to zero
+ if ( *ResetAllTcgVar == TRUE )
+ {
+ AmiTcgPlatformProtocol->ResetOSTcgVar();
+ }
+ }
+
+ if(EFI_ERROR(Status)){
+ return EFI_SUCCESS;
+ }
+
+
+ Status = AmiTcgPlatformProtocol->ProcessTcgPpiRequest();
+ if(EFI_ERROR(Status)){
+ TRACE((TRACE_ALWAYS, "\n Possible ERROR Processing Ppi Request from O.S.\n"));
+ }
+
+ Status = AmiTcgPlatformProtocol->ProcessTcgSetup();
+ if(EFI_ERROR(Status)){
+ TRACE((TRACE_ALWAYS, "\n Possible ERROR Processing Tcg Setup\n"));
+ }
+
+#if (defined(MeasureCPUMicrocodeToken) && (MeasureCPUMicrocodeToken == 1))
+ Status = AmiTcgPlatformProtocol->MeasureCpuMicroCode();
+ if(EFI_ERROR(Status)){
+ TRACE((TRACE_ALWAYS, "\n Possible ERROR Measuring CPU Microde\n"));
+ }
+#endif
+
+ Status = AmiTcgPlatformProtocol->MeasurePCIOproms();
+ if(EFI_ERROR(Status)){
+ TRACE((TRACE_ALWAYS, "\n Possible ERROR Measuring PCI Option Roms\n"));
+ }
+
+ Status = AmiTcgPlatformProtocol->SetTcgReadyToBoot();
+ if(EFI_ERROR(Status)){
+ TRACE((TRACE_ALWAYS, "\n Possible ERROR process Tcg Ready to boot Callback\n"));
+ }
+
+ return Status;
+}
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/TcgDxeplatform.cif b/Board/EM/TCG2/Common/TcgDxeplatform.cif
new file mode 100644
index 0000000..54878a1
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgDxeplatform.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "TcgDxeplatform"
+ category = ModulePart
+ LocalRoot = "Board\EM\TCG2\Common"
+ RefName = "TcgDxeplatform"
+[files]
+"TcgDxeplatform.sdl"
+"TcgDxeplatform.mak"
+"TcgDxeplatform.c"
+"TcgDxeplatform.h"
+"TcgDxeplatform.dxs"
+<endComponent>
diff --git a/Board/EM/TCG2/Common/TcgDxeplatform.dxs b/Board/EM/TCG2/Common/TcgDxeplatform.dxs
new file mode 100644
index 0000000..65e6b6a
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgDxeplatform.dxs
@@ -0,0 +1,70 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgDxeplatform/TcgDxeplatform.dxs 1 4/21/14 2:17p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:17p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgDxeplatform/TcgDxeplatform.dxs $
+//
+// 1 4/21/14 2:17p Fredericko
+//
+// 1 10/08/13 12:04p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:56p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 2 3/29/11 1:21p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: TcgDxeplatform.dxs
+//
+// Description: Dependency file
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include "AmiTcgPlatformDxe.h"
+
+DEPENDENCY_START
+ AMI_TCG_PLATFORM_PROTOCOL_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
diff --git a/Board/EM/TCG2/Common/TcgDxeplatform.h b/Board/EM/TCG2/Common/TcgDxeplatform.h
new file mode 100644
index 0000000..126698d
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgDxeplatform.h
@@ -0,0 +1,69 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgDxeplatform/TcgDxeplatform.h 1 4/21/14 2:17p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:17p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgDxeplatform/TcgDxeplatform.h $
+//
+// 1 4/21/14 2:17p Fredericko
+//
+// 1 10/08/13 12:04p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:56p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 2 3/29/11 1:21p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: TcgDxeplatform.h
+//
+// Description: Header file for TcgDxeplatform
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/TcgDxeplatform.mak b/Board/EM/TCG2/Common/TcgDxeplatform.mak
new file mode 100644
index 0000000..068570d
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgDxeplatform.mak
@@ -0,0 +1,88 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgDxeplatform/TcgDxeplatform.mak 1 4/21/14 2:17p Fredericko $
+#
+# $Revision: 1 $
+#
+# $Date: 4/21/14 2:17p $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgDxeplatform/TcgDxeplatform.mak $
+#
+# 1 4/21/14 2:17p Fredericko
+#
+# 1 10/08/13 12:04p Fredericko
+# Initial Check-In for Tpm-Next module
+#
+# 1 7/10/13 5:56p Fredericko
+# [TAG] EIP120969
+# [Category] New Feature
+# [Description] TCG (TPM20)
+#
+# 3 3/29/11 1:20p Fredericko
+# [TAG] EIP 54642
+# [Category] Improvement
+# [Description] 1. Checkin Files related to TCG function override
+# 2. Include TCM and TPM auto detection
+# [Files] Affects all TCG files
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: TcgDxeplatform.mak
+#
+# Description: Make file for the TcgDxeplatform component
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all: $(BUILD_DIR)\TcgDxeplatform.mak TcgDxeplatformBin
+
+$(BUILD_DIR)\TcgDxeplatform.mak : $(TCG_DXE_PLATFORM_DIR)\$(@B).cif $(TCG_DXE_PLATFORM_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(TCG_DXE_PLATFORM_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+TcgDxeplatform_CFLAGS=$(CFLAGS)\
+ /I$(TCG_DIR)\
+ /I$(TPM12_DIR)\
+ /I$(TCG_DIR)\Common\
+ /I$(TCG_DXE_PLATFORM_DIR)\
+ /I$(TCG_DIR)\protocol\TcgService\
+ /I$(TCG_DIR)\protocol\TpmDevice\
+ /I$(PROJECT_DIR)\Include\Protocol
+
+TcgDxeplatformBin : $(AMIDXELIB) $(BUILD_DIR)\AmiTcgLibDxe.lib
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\TcgDxeplatform.mak all\
+ "CFLAGS=$(TcgDxeplatform_CFLAGS) "\
+ "CPFLAGS=$(TcgDxeplatform_CFLAGS) "\
+ GUID=2688B232-9C02-4c12-BE1F-857C0FF2AAE3\
+ ENTRY_POINT=TcgDxeplatformEntry \
+ TYPE=BS_DRIVER \
+ DEPEX1=$(TCG_DXE_PLATFORM_DIR)\TcgDxeplatform.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ EXT_HEADERS=$(BUILD_DIR)\token.h \
+ COMPRESS=1\
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/TCG2/Common/TcgDxeplatform.sdl b/Board/EM/TCG2/Common/TcgDxeplatform.sdl
new file mode 100644
index 0000000..63ce7b5
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgDxeplatform.sdl
@@ -0,0 +1,28 @@
+TOKEN
+ Name = "TCG_DXE_PLATFORM_SUPPORT"
+ Value = "1"
+ Help = "Tcgdxe platform supprt"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Token = "TPM12Enabled" "!=" "0"
+End
+
+
+MODULE
+ Help = "Includes TcgDxeplatform.mak to Project"
+ File = "TcgDxeplatform.mak"
+End
+
+
+PATH
+ Name = "TCG_DXE_PLATFORM_DIR"
+ Help = ""
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\TcgDxeplatform.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/TCG2/Common/TcgPeiplatform.c b/Board/EM/TCG2/Common/TcgPeiplatform.c
new file mode 100644
index 0000000..6476964
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPeiplatform.c
@@ -0,0 +1,240 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgPeiplatform/TcgPeiplatform.c 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgPeiplatform/TcgPeiplatform.c $
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 1 10/08/13 12:04p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:56p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 5 4/26/11 1:46p Fredericko
+// Function call changes to match changes to function header definition
+// for Memoryabsent function.
+//
+// 4 4/04/11 2:14p Fredericko
+// Removed #pragma optimization directives
+//
+// 3 3/29/11 9:18p Fredericko
+// Handle TPM memory present errors
+//
+// 2 3/29/11 1:19p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: TcgPeiPlatform.c
+//
+// Description: Function file for TcgPeiPlatform
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include <Efi.h>
+#include <Pei.h>
+#include <TcgCommon.h>
+#include <AmiPeiLib.h>
+#include <TcgMisc.h>
+#include "PPI\TcgService\TcgTcmService.h"
+#include "PPI\TcgService\TcgService.h"
+#include "PPI\TpmDevice\TpmDevice.h"
+#include "PPI\CpuIo.h"
+#include "PPI\LoadFile.h"
+#include <Ppi\ReadOnlyVariable.h>
+#include "AmiTcgPlatformPei.h"
+
+
+
+EFI_GUID gAmiTcgPlatformPpiBeforeMem = AMI_TCG_PLATFORM_PPI_BEFORE_MEM_GUID;
+EFI_GUID gAmiTcgPlatformPpiAfterMem = AMI_TCG_PLATFORM_PPI_AFTER_MEM_GUID;
+EFI_GUID gCacheInstallGuid = EFI_PEI_PERMANENT_MEMORY_INSTALLED_PPI;
+
+EFI_STATUS
+EFIAPI OnMemoryDiscovered(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
+ IN VOID *Ppi );
+
+
+static EFI_PEI_NOTIFY_DESCRIPTOR TcgAmiPlatformInitNotify[] =
+{
+ {
+ EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | \
+ EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &gAmiTcgPlatformPpiAfterMem,
+ OnMemoryDiscovered
+ }
+};
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: OnMemoryDiscovered
+//
+// Description: Call Memory Present initialization on memory Installation
+//
+//
+// Input: IN EFI_PEI_SERVICES **PeiServices,
+// IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
+// IN VOID *Ppi
+//
+// Output: EFI STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+EFIAPI OnMemoryDiscovered(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
+ IN VOID *Ppi )
+{
+ EFI_STATUS Status;
+ AMI_TCG_PLATFORM_PPI_AFTER_MEM *AmiTcgPlatformPPI = NULL;
+ EFI_BOOT_MODE BootMode;
+
+
+ Status = (*PeiServices)->LocatePpi (
+ PeiServices,
+ &gAmiTcgPlatformPpiAfterMem ,
+ 0,
+ NULL,
+ &AmiTcgPlatformPPI);
+
+ if ( EFI_ERROR( Status )){
+ Status = (*PeiServices)->NotifyPpi (PeiServices, \
+ TcgAmiPlatformInitNotify);
+
+ return Status;
+ }
+
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+ Status = (*PeiServices)->GetBootMode( PeiServices, &BootMode );
+ ASSERT_PEI_ERROR( PeiServices, Status );
+
+ Status = AmiTcgPlatformPPI->VerifyTcgVariables(PeiServices);
+ Status = AmiTcgPlatformPPI->MemoryPresentFunctioOverride(PeiServices);
+ if(EFI_ERROR(Status))return Status;
+
+ if((BootMode == BOOT_ON_S3_RESUME) || (BootMode == BOOT_IN_RECOVERY_MODE)){
+ return EFI_SUCCESS;
+ }
+
+ Status = AmiTcgPlatformPPI->SetPhysicalPresence(PeiServices);
+ return (Status);
+}
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgPeiPlatformEntry
+//
+// Description:
+//
+// Input: IN EFI_FFS_FILE_HEADER *FfsHeader
+// IN EFI_PEI_SERVICES **PeiServices,
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+EFIAPI TcgPeiplatformEntry(
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices ){
+
+ AMI_TCG_PLATFORM_PPI_BEFORE_MEM *AmiTcgPlatformPPI = NULL;
+ EFI_STATUS Status;
+ TCG_PEI_MEMORY_CALLBACK *MemCallback;
+
+ Status = (*PeiServices)->LocatePpi (
+ PeiServices,
+ &gAmiTcgPlatformPpiBeforeMem,
+ 0,
+ NULL,
+ &AmiTcgPlatformPPI);
+
+
+ if(EFI_ERROR(Status)){
+ return EFI_SUCCESS;
+ }
+
+ AmiTcgPlatformPPI->MemoryAbsentFunctionOverride(PeiServices);
+
+ Status = (**PeiServices).AllocatePool(
+ PeiServices,
+ sizeof (TCG_PEI_MEMORY_CALLBACK),
+ &MemCallback);
+
+ if ( !EFI_ERROR( Status ))
+ {
+ MemCallback->NotifyDesc.Flags
+ = (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK
+ | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
+ MemCallback->NotifyDesc.Guid = &gCacheInstallGuid;
+ MemCallback->NotifyDesc.Notify = OnMemoryDiscovered;
+ MemCallback->FfsHeader = FfsHeader;
+
+ Status = (*PeiServices)->NotifyPpi( PeiServices,
+ &MemCallback->NotifyDesc );
+ }
+
+ return Status;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/TcgPeiplatform.cif b/Board/EM/TCG2/Common/TcgPeiplatform.cif
new file mode 100644
index 0000000..e562f7e
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPeiplatform.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "TcgPeiplatform"
+ category = ModulePart
+ LocalRoot = "Board\EM\TCG2\Common"
+ RefName = "TcgPeiplatform"
+[files]
+"TcgPeiplatform.sdl"
+"TcgPeiplatform.mak"
+"TcgPeiplatform.c"
+"TcgPeiplatform.h"
+"TcgPeiplatform.dxs"
+<endComponent>
diff --git a/Board/EM/TCG2/Common/TcgPeiplatform.dxs b/Board/EM/TCG2/Common/TcgPeiplatform.dxs
new file mode 100644
index 0000000..4ebca57
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPeiplatform.dxs
@@ -0,0 +1,70 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgPeiplatform/TcgPeiplatform.dxs 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgPeiplatform/TcgPeiplatform.dxs $
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 1 10/08/13 12:05p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:56p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 2 3/29/11 1:19p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: TcgPeiPlatform.dxs
+//
+// Description: Dependency file
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include "AmiTcgPlatformPei.h"
+
+DEPENDENCY_START
+ AMI_TCG_PLATFORM_PPI_BEFORE_MEM_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
diff --git a/Board/EM/TCG2/Common/TcgPeiplatform.h b/Board/EM/TCG2/Common/TcgPeiplatform.h
new file mode 100644
index 0000000..79d6724
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPeiplatform.h
@@ -0,0 +1,66 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgPeiplatform/TcgPeiplatform.h 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgPeiplatform/TcgPeiplatform.h $
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 1 10/08/13 12:05p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:56p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 2 3/29/11 1:19p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: TcgPeiPlatform
+//
+// Description: Header file for TcgPeiplatform
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/TcgPeiplatform.mak b/Board/EM/TCG2/Common/TcgPeiplatform.mak
new file mode 100644
index 0000000..bc9c606
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPeiplatform.mak
@@ -0,0 +1,85 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgPeiplatform/TcgPeiplatform.mak 1 4/21/14 2:17p Fredericko $
+#
+# $Revision: 1 $
+#
+# $Date: 4/21/14 2:17p $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgPeiplatform/TcgPeiplatform.mak $
+#
+# 1 4/21/14 2:17p Fredericko
+#
+# 1 10/08/13 12:04p Fredericko
+# Initial Check-In for Tpm-Next module
+#
+# 1 7/10/13 5:56p Fredericko
+# [TAG] EIP120969
+# [Category] New Feature
+# [Description] TCG (TPM20)
+#
+# 4 3/29/11 1:18p Fredericko
+# [TAG] EIP 54642
+# [Category] Improvement
+# [Description] 1. Checkin Files related to TCG function override
+# 2. Include TCM and TPM auto detection
+# [Files] Affects all TCG files
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: TcgPeiplatform.mak
+#
+# Description: Make file for the TcgPeiplatform component
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all: $(BUILD_DIR)\TcgPeiplatform.mak TcgPeiplatformBin
+
+$(BUILD_DIR)\TcgPeiplatform.mak : $(TCG_PEI_PLATFORM_DIR)\$(@B).cif $(TCG_PEI_PLATFORM_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(TCG_PEI_PLATFORM_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+TcgPeiplatform_CFLAGS=$(CFLAGS)\
+ /I$(TCG_DIR)\
+ /I$(TPM12_DIR)\
+ /I$(TCG_DIR)\Common\
+ /I$(TCG_PEI_PLATFORM_DIR)
+
+TcgPeiplatformBin : $(AMIPEILIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\TcgPeiplatform.mak all\
+ "CFLAGS=$(TcgPeiplatform_CFLAGS) "\
+ GUID=6B844C5B-6B75-42ca-8E8E-1CB94412B59B\
+ ENTRY_POINT=TcgPeiplatformEntry \
+ TYPE=PEIM \
+ DEPEX1=$(TCG_PEI_PLATFORM_DIR)\TcgPeiplatform.dxs \
+ DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX \
+ EXT_HEADERS=$(BUILD_DIR)\token.h \
+ COMPRESS=0\
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
diff --git a/Board/EM/TCG2/Common/TcgPeiplatform.sdl b/Board/EM/TCG2/Common/TcgPeiplatform.sdl
new file mode 100644
index 0000000..e7e8523
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPeiplatform.sdl
@@ -0,0 +1,16 @@
+MODULE
+ Help = "Includes TcgPeiplatform.mak to Project"
+ File = "TcgPeiplatform.mak"
+End
+
+
+PATH
+ Name = "TCG_PEI_PLATFORM_DIR"
+ Help = ""
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\TcgPeiplatform.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.c b/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.c
new file mode 100644
index 0000000..09fd431
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.c
@@ -0,0 +1,301 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.c 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.c $
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 2 12/10/13 12:56p Fredericko
+// [TAG] EIP143615
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Bitlocker WHCK failure
+// [RootCause] PPI interface for TPM 1.2 device was failing
+// [Solution] Fix the error in PPI interface error
+// [Files] TcgPlatformSetupPeiPolicy.c
+//
+// 1 10/08/13 12:05p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 2 10/03/13 2:42p Fredericko
+//
+// 1 7/10/13 5:56p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 4 9/07/12 11:00a Fredericko
+// [TAG] EIP94081
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] TcgPlatformSetupPeiPolicy.c does not load defaults when
+// unable to load Setup variable
+// [RootCause] Setupvariables not initialized if NVRAM is corrupted.
+// [Solution] Initialize TCG variables to default if NVRAM corrupted
+// [Files] TcgPlatformSetupPeiPolicy.c
+//
+// 3 12/18/11 10:24p Fredericko
+// Changes to support TcgplatformPeiPolicy in relation to O.S. requests.
+//
+// 2 10/07/11 6:52p Fredericko
+//
+// 1 9/27/11 10:10p Fredericko
+// [TAG] EIP67286
+// [Category] Improvement
+// [Description] Initial check-in for Tcg Setup policy for pei
+// [Files] TcgPlatformSetupPeiPolicy.cif
+// TcgPlatformSetupPeiPolicy.c
+// TcgPlatformSetupPeiPolicy.h
+// TcgPlatformSetupPeiPolicy.sdl
+// TcgPlatformSetupPeiPolicy.mak
+// TcgPlatformSetupPeiPolicy.dxs
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: TcgPlatformpeipolicy.c
+//
+// Description: Installs Tcg policy from setup variables in Pei
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include <AmiPeiLib.h>
+#include "TcgPlatformSetupPeiPolicy.h"
+
+EFI_GUID gTcgPlatformSetupPolicyGuid = TCG_PLATFORM_SETUP_PEI_POLICY_GUID;
+EFI_GUID gTcgPeiInternalflagsGuid = PEI_TCG_INTERNAL_FLAGS_GUID;
+EFI_GUID gTcgInternalPeiSyncflagGuid = TCG_PPI_SYNC_FLAG_GUID;
+
+
+EFI_STATUS
+ getTcgPeiPolicy (IN EFI_PEI_SERVICES **PeiServices ,
+ IN TCG_CONFIGURATION *ConfigFlags)
+
+{
+ EFI_STATUS Status;
+ EFI_PEI_READ_ONLY_VARIABLE_PPI *ReadOnlyVariable;
+ EFI_GUID gPeiReadOnlyVariablePpiGuid
+ = EFI_PEI_READ_ONLY_VARIABLE_PPI_GUID;
+ UINTN VariableSize = sizeof(SETUP_DATA);
+ SETUP_DATA SetupData;
+ EFI_GUID gSetupGuid = SETUP_GUID;
+ UINT8 DisallowTpmFlag=0;
+ UINT8 SyncVar = 0;
+ UINTN SyncVarSize = sizeof(UINT8);
+
+ //
+ //
+ //
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &gPeiReadOnlyVariablePpiGuid,
+ 0, NULL,
+ &ReadOnlyVariable);
+
+ PEI_TRACE((-1, PeiServices, "gPeiReadOnlyVariablePpiGuid Status = %r \n", Status));
+
+ if(!EFI_ERROR(Status)){
+
+ Status = ReadOnlyVariable->GetVariable(PeiServices,
+ L"Setup",
+ &gSetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData);
+
+ PEI_TRACE((-1, PeiServices, "gSetupGuid Status = %r \n", Status));
+
+ if (EFI_ERROR(Status)) {
+ ConfigFlags->TpmSupport = 0;
+ ConfigFlags->TcmSupport = 0;
+ ConfigFlags->TpmEnable = 0;
+ ConfigFlags->TpmAuthenticate = 0;
+ ConfigFlags->TpmOperation = 0;
+ ConfigFlags->Tpm20Device = 0;
+ } else {
+ ConfigFlags->TpmSupport = SetupData.TpmSupport;
+ ConfigFlags->TcmSupport = SetupData.TcmSupport;
+ ConfigFlags->TpmEnable = SetupData.TpmEnable ;
+ ConfigFlags->TpmAuthenticate = SetupData.TpmAuthenticate;
+ ConfigFlags->TpmOperation = SetupData.TpmOperation;
+ ConfigFlags->Tpm20Device = SetupData.Tpm20Device;
+ ConfigFlags->Reserved1 = SetupData.ShaPolicy;
+ }
+
+
+ VariableSize = sizeof(UINT8);
+ Status = ReadOnlyVariable->GetVariable(PeiServices,
+ L"InternalDisallowTpmFlag",
+ &gTcgPeiInternalflagsGuid,
+ NULL,
+ &VariableSize,
+ &DisallowTpmFlag);
+ if(EFI_ERROR(Status)){
+ Status = EFI_SUCCESS;
+ DisallowTpmFlag = 0;
+ }
+
+ PEI_TRACE((-1, PeiServices, "gTcgPeiInternalflagsGuid Status = %r \n", Status));
+
+ Status = ReadOnlyVariable->GetVariable(PeiServices,
+ L"TcgInternalSyncFlag",
+ &gTcgInternalPeiSyncflagGuid,
+ NULL,
+ &SyncVarSize,
+ &SyncVar);
+
+ PEI_TRACE((-1, PeiServices, "gTcgInternalPeiSyncflagGuid Status = %r \n", Status));
+
+ if(EFI_ERROR(Status)){
+ SyncVar = 0;
+ Status = EFI_SUCCESS;
+ }
+
+ ConfigFlags->Reserved2 = 0;
+ ConfigFlags->DisallowTpm = DisallowTpmFlag;
+ ConfigFlags->TpmHardware = 0;
+ ConfigFlags->TpmEnaDisable = 0;
+ ConfigFlags->TpmActDeact = 0;
+ ConfigFlags->TpmOwnedUnowned = 0;
+ ConfigFlags->TcgSupportEnabled = 0;
+ ConfigFlags->TpmError = 0;
+ ConfigFlags->PpiSetupSyncFlag = SyncVar;
+ ConfigFlags->Reserved3 = 0;
+
+ ConfigFlags->Reserved4 = 0;
+ ConfigFlags->Reserved5 = 0;
+ }else{
+ ConfigFlags->TpmSupport = 0;
+ ConfigFlags->TcmSupport = 0;
+ ConfigFlags->TpmEnable = 0 ;
+ ConfigFlags->TpmAuthenticate = 0;
+ ConfigFlags->TpmOperation = 0;
+ ConfigFlags->DisallowTpm = 0;
+ ConfigFlags->Reserved1 = 0;
+ ConfigFlags->Reserved2 = 0;
+
+ ConfigFlags->TpmHardware = 0;
+ ConfigFlags->TpmEnaDisable = 0;
+ ConfigFlags->TpmActDeact = 0;
+ ConfigFlags->TpmOwnedUnowned = 0;
+ ConfigFlags->TcgSupportEnabled = 0;
+ ConfigFlags->TpmError = 0;
+ ConfigFlags->PpiSetupSyncFlag = 0;
+ ConfigFlags->Reserved3 = 0;
+
+ ConfigFlags->Reserved4 = 0;
+ ConfigFlags->Reserved5 = 0;
+ }
+
+ return Status;
+
+}
+
+
+
+static TCG_PLATFORM_SETUP_INTERFACE TcgPlatformSetupInstance = {
+ TCG_PLATFORM_SETUP_PEI_PROTOCOL_REVISION_1,
+ getTcgPeiPolicy
+};
+
+static EFI_PEI_PPI_DESCRIPTOR TcgPlatformSetupPeiPolicyDesc[] = {
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI
+ | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &gTcgPlatformSetupPolicyGuid,
+ &TcgPlatformSetupInstance
+ }
+};
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgPlatformSetupPolicyEntryPoint
+//
+// Description: Entry point for TcgPlatformSetupPolicyEntryPoint
+//
+// Input: ImageHandle Image handle of this driver.
+// SystemTable Global system service table.
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+EFIAPI
+TcgPlatformSetupPeiPolicyEntryPoint (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+)
+{
+ EFI_STATUS Status;
+ EFI_PEI_READ_ONLY_VARIABLE_PPI *ReadOnlyVariable;
+ EFI_GUID gPeiReadOnlyVariablePpiGuid
+ = EFI_PEI_READ_ONLY_VARIABLE_PPI_GUID;
+ UINTN VariableSize = sizeof(SETUP_DATA);
+ SETUP_DATA SetupData;
+ EFI_GUID gSetupGuid = SETUP_GUID;
+
+
+ Status = (*PeiServices)->LocatePpi(
+ PeiServices,
+ &gPeiReadOnlyVariablePpiGuid,
+ 0, NULL,
+ &ReadOnlyVariable);
+
+ if (EFI_ERROR(Status))
+ return EFI_SUCCESS;
+
+ Status = ReadOnlyVariable->GetVariable(PeiServices,
+ L"Setup",
+ &gSetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData);
+
+ Status = (**PeiServices).InstallPpi (PeiServices, TcgPlatformSetupPeiPolicyDesc);
+
+ return Status;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.cif b/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.cif
new file mode 100644
index 0000000..8a074e3
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "TcgPlatformSetupPeiPolicy"
+ category = ModulePart
+ LocalRoot = "Board\EM\TCG2\Common\TcgPlatformSetupPeiPolicy\"
+ RefName = "TcgPlatformSetupPeiPolicy"
+[files]
+"TcgPlatformSetupPeiPolicy.c"
+"TcgPlatformSetupPeiPolicy.h"
+"TcgPlatformSetupPeiPolicy.sdl"
+"TcgPlatformSetupPeiPolicy.mak"
+"TcgPlatformSetupPeiPolicy.dxs"
+<endComponent>
diff --git a/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.dxs b/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.dxs
new file mode 100644
index 0000000..537a053
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.dxs
@@ -0,0 +1,52 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.dxs 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: TcgPlatformpeipolicy.dxs
+//
+// Description: Dependency file for TcgPlatformpeipolicy
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include <Ppi\ReadOnlyVariable.h>
+
+DEPENDENCY_START
+ EFI_PEI_READ_ONLY_VARIABLE_PPI_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.h b/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.h
new file mode 100644
index 0000000..d13e433
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.h
@@ -0,0 +1,167 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.h 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.h $
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 1 10/08/13 12:05p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:56p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 2 12/18/11 10:25p Fredericko
+// Changes to support TcgplatformPeiPolicy in relation to O.S. requests.
+//
+// 1 9/27/11 10:10p Fredericko
+// [TAG] EIP67286
+// [Category] Improvement
+// [Description] Initial check-in for Tcg Setup policy for pei
+// [Files] TcgPlatformSetupPeiPolicy.cif
+// TcgPlatformSetupPeiPolicy.c
+// TcgPlatformSetupPeiPolicy.h
+// TcgPlatformSetupPeiPolicy.sdl
+// TcgPlatformSetupPeiPolicy.mak
+// TcgPlatformSetupPeiPolicy.dxs
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: TcgPlatformpeipolicy.h
+//
+// Description: Header file for TcgPlatformpeipolicy
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#ifndef _TCG_PLATFORM_SETUP_PEI_POLICY_H_
+#define _TCG_PLATFORM_SETUP_PEI_POLICY_H_
+
+#include <Efi.h>
+#include <token.h>
+#include <Setup.h>
+#include <Ppi\ReadOnlyVariable.h>
+
+
+
+#define TCG_PLATFORM_SETUP_PEI_POLICY_GUID \
+ { \
+ 0xa76b4e22, 0xb50a, 0x401d, 0x8b, 0x35, 0x51, 0x24, 0xb0, 0xba, 0x41, 0x4 \
+ }
+
+#define TCG_PPI_SYNC_FLAG_GUID \
+ {\
+ 0xf3ed95df, 0x828e, 0x41c7, 0xbc, 0xa0, 0x16, 0xc4, 0x19, 0x65, 0xa6, 0x34 \
+ }
+
+#define PEI_TCG_INTERNAL_FLAGS_GUID \
+ {\
+ 0x70fff0ff, 0xa543, 0x45b9, 0x8b, 0xe3, 0x1b, 0xdb, 0x90, 0x41, 0x20, 0x80 \
+ }
+
+//
+// Protocol revision number
+// Any backwards compatible changes to this protocol will result in an update in the revision number
+// Major changes will require publication of a new protocol
+//
+#define TCG_PLATFORM_SETUP_PEI_PROTOCOL_REVISION_1 1
+
+#pragma pack(1)
+typedef struct {
+ //
+ // Byte 0, bit definition for functionality enable/disable
+ //
+ UINT8 TpmSupport; // 0: Disabled; 1: Enabled
+ UINT8 TcmSupport; // 0: Disabled; 1: Enabled
+ UINT8 TpmEnable; // 0: Disabled; 1: Enabled
+ UINT8 TpmAuthenticate;
+ UINT8 TpmOperation; // 0: Disabled; 1: Enabled
+ UINT8 DisallowTpm; // 0: Disabled; 1: Enabled
+ UINT8 Reserved1;
+ UINT8 Reserved2;
+
+ //
+ // Byte 1, bit definition for Status Information
+ //
+ UINT8 TpmHardware; // 0: Disabled; 1: Enabled
+ UINT8 TpmEnaDisable;
+ UINT8 TpmActDeact;
+ UINT8 TpmOwnedUnowned;
+ UINT8 TcgSupportEnabled; // 0: Disabled; 1: Enabled
+ UINT8 TpmError;
+ UINT8 PpiSetupSyncFlag;
+ UINT8 Reserved3;
+
+ //
+ // Byte 2, Reserved bytes
+ //
+ UINT8 Reserved4;
+
+ //
+ // Byte 3, Reserved bytes
+ //
+ UINT8 Reserved5;
+
+ //TPM 20 Configuration
+ UINT8 Tpm20Device;
+
+} TCG_CONFIGURATION;
+
+#pragma pack()
+
+
+typedef
+EFI_STATUS
+(EFIAPI * GET_TCG_PEI_POLICY)(
+ IN EFI_PEI_SERVICES **PeiServices ,
+ IN TCG_CONFIGURATION *ConfigFlags
+);
+
+
+//
+// AMT DXE Platform Policiy ====================================================
+//
+typedef struct _TCG_PLATFORM_SETUP_INTERFACE {
+ UINT8 Revision;
+ GET_TCG_PEI_POLICY getTcgPeiPolicy;
+} TCG_PLATFORM_SETUP_INTERFACE;
+
+
+#endif
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.mak b/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.mak
new file mode 100644
index 0000000..57ba48a
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.mak
@@ -0,0 +1,88 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.mak 1 4/21/14 2:18p Fredericko $
+#
+# $Revision: 1 $
+#
+# $Date: 4/21/14 2:18p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.mak $
+#
+# 1 4/21/14 2:18p Fredericko
+#
+# 1 10/08/13 12:05p Fredericko
+# Initial Check-In for Tpm-Next module
+#
+# 1 7/10/13 5:56p Fredericko
+# [TAG] EIP120969
+# [Category] New Feature
+# [Description] TCG (TPM20)
+#
+# 4 10/07/11 11:54a Fredericko
+#
+# 1 9/27/11 10:10p Fredericko
+# [TAG] EIP67286
+# [Category] Improvement
+# [Description] Initial check-in for Tcg Setup policy for pei
+# [Files] TcgPlatformSetupPeiPolicy.cif
+# TcgPlatformSetupPeiPolicy.c
+# TcgPlatformSetupPeiPolicy.h
+# TcgPlatformSetupPeiPolicy.sdl
+# TcgPlatformSetupPeiPolicy.mak
+# TcgPlatformSetupPeiPolicy.dxs
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: TcgPlatformpeipolicy.mak
+#
+# Description: Make file for TcgPlatformpeipolicy
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+All : TcgPlatformSetupPeiPolicy
+
+TcgPlatformSetupPeiPolicy : $(BUILD_DIR)\TcgPlatformSetupPeiPolicy.mak TcgPlatformSetupPeiPolicyBin
+
+$(BUILD_DIR)\TcgPlatformSetupPeiPolicy.mak : $(TcgPlatformSetupPeiPolicy_DIR)\$(@B).cif $(TcgPlatformSetupPeiPolicy_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(TcgPlatformSetupPeiPolicy_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+TcgPlatformSetupPeiPolicyBin : $(AMIPEILIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\TcgPlatformSetupPeiPolicy.mak all\
+ GUID=0FE9DA53-043D-4265-A94D-FD77FEDE2EB4\
+ ENTRY_POINT=TcgPlatformSetupPeiPolicyEntryPoint\
+ DEPEX1=$(TcgPlatformSetupPeiPolicy_DIR)\TcgPlatformSetupPeiPolicy.dxs\
+ DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX\
+ TYPE=PEIM\
+ COMPRESS=0
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.sdl b/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.sdl
new file mode 100644
index 0000000..7756da4
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPlatformSetupPeiPolicy/TcgPlatformSetupPeiPolicy.sdl
@@ -0,0 +1,25 @@
+TOKEN
+ Name = "TcgPlatformSetupPeiPolicy_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable TcgPlatformSetupPeiPolicy support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "TcgPlatformSetupPeiPolicy_DIR"
+End
+
+MODULE
+ Help = "IncludesTcgPlatformSetupPeiPolicy.mak to Project"
+ File = "TcgPlatformSetupPeiPolicy.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\TcgPlatformSetupPeiPolicy.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.c b/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.c
new file mode 100644
index 0000000..6a39194
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.c
@@ -0,0 +1,441 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.c 2 6/09/14 4:59p Fredericko $
+//
+// $Revision: 2 $
+//
+// $Date: 6/09/14 4:59p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.c $
+//
+// 2 6/09/14 4:59p Fredericko
+// Changes for SetVariable vulnerability during Runtime
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 1 10/08/13 12:05p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 2 10/03/13 2:43p Fredericko
+//
+// 1 7/10/13 5:57p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 7 5/19/12 6:42p Fredericko
+//
+// 6 12/15/11 3:30p Fredericko
+// removed check for setup changes before NVRAM writes
+//
+// 5 10/26/11 2:14p Fredericko
+// [TAG] EIP72872
+// [Category] Improvement
+// [Description] Do not call setvariable if no change to TPM setup
+// information
+// [Files] TcgPlatformSetupPolicy.c
+//
+// 4 10/24/11 1:52p Fredericko
+// [TAG] EIP72872
+// [Category] Improvement
+// [Description] TCG module do not call SetVariable() for setup data if
+// no setup changes
+// [Files] TcgPlatformSetupPolicy.c
+//
+// 3 10/07/11 6:52p Fredericko
+//
+// 2 9/28/11 6:30p Fredericko
+//
+// 1 9/27/11 10:11p Fredericko
+// [TAG] EIP67286
+// [Category] Improvement
+// [Description] Initial check-in for Tcg Setup policy for Dxe
+// [Files] TcgPlatformSetupPolicy.cif
+// TcgPlatformSetupPolicy.c
+// TcgPlatformSetupPolicy.h
+// TcgPlatformSetupPolicy.sdl
+// TcgPlatformSetupPolicy.mak
+// TcgPlatformSetupPolicy.dxs
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+// Name: TcgPlatformSetupPolicy.c
+//
+// Description: Policy file to allow reading and update of TCG policy
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include <AmiDxeLib.h>
+#include "TcgPlatformSetupPolicy.h"
+
+TCG_PLATFORM_SETUP_PROTOCOL *TcgPlatformSetupInstance = NULL;
+
+EFI_HANDLE gImageHandle;
+static TCG_CONFIGURATION InitialConfigFlags;
+EFI_GUID gTcgPlatformSetupPolicyGuid = TCG_PLATFORM_SETUP_POLICY_GUID;
+EFI_GUID gTcgInternalSyncflagGuid = TCG_PPI_SYNC_FLAG_GUID;
+EFI_GUID gTcgInternalflagsGuid = TCG_INTERNAL_FLAGS_GUID;
+
+
+EFI_STATUS
+ UpdateTcgStatusFlags (TCG_CONFIGURATION *StatusFlags, BOOLEAN UpdateNvram)
+
+{
+ EFI_STATUS Status;
+ UINTN VariableSize = sizeof(SETUP_DATA);
+ SETUP_DATA SetupDataBuffer;
+ UINTN SetupVariableSize = sizeof(SETUP_DATA);
+ UINT32 SetupVariableAttributes;
+ EFI_GUID gSetupGuid = SETUP_GUID;
+ TCG_PLATFORM_SETUP_PROTOCOL *NewTcgPlatformSetupInstance = NULL;
+ TCG_PLATFORM_SETUP_PROTOCOL *OldTcgPlatformSetupInstance = NULL;
+
+ if(InitialConfigFlags.DisallowTpm == 1)return EFI_INVALID_PARAMETER;
+
+ Status = pBS->LocateProtocol (&gTcgPlatformSetupPolicyGuid, NULL, &OldTcgPlatformSetupInstance);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = pBS->AllocatePool (
+ EfiBootServicesData,
+ sizeof (TCG_PLATFORM_SETUP_PROTOCOL),
+ (VOID**)&NewTcgPlatformSetupInstance
+ );
+
+ if(StatusFlags == NULL)
+ {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if(TcgPlatformSetupInstance == NULL) return EFI_OUT_OF_RESOURCES;
+
+ NewTcgPlatformSetupInstance->ConfigFlags.TpmSupport = InitialConfigFlags.TpmSupport;
+ NewTcgPlatformSetupInstance->ConfigFlags.TcmSupport = StatusFlags->TcmSupport;
+ NewTcgPlatformSetupInstance->ConfigFlags.TpmEnable = StatusFlags->TpmEnable ;
+ NewTcgPlatformSetupInstance->ConfigFlags.TpmAuthenticate = InitialConfigFlags.TpmAuthenticate;
+ NewTcgPlatformSetupInstance->ConfigFlags.TpmOperation = StatusFlags->TpmOperation;
+ NewTcgPlatformSetupInstance->ConfigFlags.DisallowTpm = 0;
+ NewTcgPlatformSetupInstance->ConfigFlags.Reserved1 = StatusFlags->Reserved1;
+ NewTcgPlatformSetupInstance->ConfigFlags.Reserved2 = StatusFlags->Reserved2;
+
+ NewTcgPlatformSetupInstance->ConfigFlags.TpmHardware = StatusFlags->TpmHardware;
+ NewTcgPlatformSetupInstance->ConfigFlags.TpmEnaDisable = StatusFlags->TpmEnaDisable;
+ NewTcgPlatformSetupInstance->ConfigFlags.TpmActDeact = StatusFlags->TpmActDeact;
+ NewTcgPlatformSetupInstance->ConfigFlags.TpmOwnedUnowned = StatusFlags->TpmOwnedUnowned;
+ NewTcgPlatformSetupInstance->ConfigFlags.TcgSupportEnabled = StatusFlags->TcgSupportEnabled ;
+ NewTcgPlatformSetupInstance->ConfigFlags.TpmError = StatusFlags->TpmError;
+ NewTcgPlatformSetupInstance->ConfigFlags.PpiSetupSyncFlag = StatusFlags->PpiSetupSyncFlag;
+ NewTcgPlatformSetupInstance->ConfigFlags.Reserved3 = StatusFlags->Reserved3;
+
+ NewTcgPlatformSetupInstance->ConfigFlags.Reserved4 = StatusFlags->Reserved4;
+ NewTcgPlatformSetupInstance->ConfigFlags.Reserved5 = StatusFlags->Reserved5;
+ NewTcgPlatformSetupInstance->ConfigFlags.Tpm20Device = StatusFlags->Tpm20Device;
+
+
+ NewTcgPlatformSetupInstance->UpdateStatusFlags = UpdateTcgStatusFlags;
+
+ Status = pBS->UninstallMultipleProtocolInterfaces(
+ gImageHandle,
+ &gTcgPlatformSetupPolicyGuid,
+ OldTcgPlatformSetupInstance,
+ NULL
+ );
+
+ Status = pBS->InstallMultipleProtocolInterfaces (
+ &gImageHandle,
+ &gTcgPlatformSetupPolicyGuid,
+ NewTcgPlatformSetupInstance,
+ NULL
+ );
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ if(UpdateNvram){
+
+ Status = pRS->GetVariable (
+ L"Setup",
+ &gSetupGuid,
+ &SetupVariableAttributes,
+ &SetupVariableSize,
+ &SetupDataBuffer);
+
+ SetupDataBuffer.TpmEnable = NewTcgPlatformSetupInstance->ConfigFlags.TpmEnable;
+ SetupDataBuffer.TpmSupport = NewTcgPlatformSetupInstance->ConfigFlags.TpmSupport;
+ SetupDataBuffer.TcmSupport = NewTcgPlatformSetupInstance->ConfigFlags.TcmSupport;
+ SetupDataBuffer.TpmAuthenticate = NewTcgPlatformSetupInstance->ConfigFlags.TpmAuthenticate;
+ SetupDataBuffer.TpmOperation = NewTcgPlatformSetupInstance->ConfigFlags.TpmOperation;
+ SetupDataBuffer.TpmEnaDisable = NewTcgPlatformSetupInstance->ConfigFlags.TpmEnaDisable;
+ SetupDataBuffer.TpmActDeact = NewTcgPlatformSetupInstance->ConfigFlags.TpmActDeact;
+ SetupDataBuffer.TpmHrdW = NewTcgPlatformSetupInstance->ConfigFlags.TpmHardware;
+ SetupDataBuffer.TpmOwnedUnowned = NewTcgPlatformSetupInstance->ConfigFlags.TpmOwnedUnowned;
+ SetupDataBuffer.TpmError = NewTcgPlatformSetupInstance->ConfigFlags.TpmError;
+ SetupDataBuffer.TcgSupportEnabled = NewTcgPlatformSetupInstance->ConfigFlags.TcgSupportEnabled;
+ SetupDataBuffer.Tpm20Device = NewTcgPlatformSetupInstance->ConfigFlags.Tpm20Device;
+ SetupDataBuffer.ShaPolicy = NewTcgPlatformSetupInstance->ConfigFlags.Reserved1;
+
+ Status = pRS->SetVariable (
+ L"Setup",
+ &gSetupGuid,
+ SetupVariableAttributes,
+ SetupVariableSize,
+ &SetupDataBuffer);
+
+ SetupVariableAttributes = EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_NON_VOLATILE;
+
+ Status = pRS->SetVariable (
+ L"TcgInternalSyncFlag",
+ &gTcgInternalSyncflagGuid,
+ SetupVariableAttributes,
+ sizeof(UINT8),
+ &(NewTcgPlatformSetupInstance->ConfigFlags.PpiSetupSyncFlag));
+
+ if(Status == EFI_INVALID_PARAMETER)
+ {
+ Status = pRS->SetVariable( L"TcgInternalSyncFlag", \
+ &gTcgInternalSyncflagGuid, \
+ 0, \
+ 0, \
+ NULL);
+
+ if(EFI_ERROR(Status))return Status;
+
+ Status = pRS->SetVariable( L"TcgInternalSyncFlag", \
+ &gTcgInternalSyncflagGuid, \
+ SetupVariableAttributes, \
+ sizeof(UINT8), \
+ &(NewTcgPlatformSetupInstance->ConfigFlags.PpiSetupSyncFlag));
+ }
+ }
+
+ return Status;
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: TcgPlatformSetupPolicyEntryPoint
+//
+// Description: Entry point for TcgPlatformSetupPolicyEntryPoint
+//
+// Input: ImageHandle Image handle of this driver.
+// SystemTable Global system service table.
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS
+EFIAPI
+TcgPlatformSetupPolicyEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+ UINTN VariableSize = 0;
+ SETUP_DATA SetupDataBuffer;
+ SETUP_DATA *SetupData = &SetupDataBuffer;
+ UINTN SetupVariableSize;
+ UINT32 SetupVariableAttributes;
+ EFI_GUID gSetupGuid = SETUP_GUID;
+ UINT8 SyncVar;
+ UINT8 DisallowTpmFlag;
+ UINTN TempSizeofSyncVar = sizeof(UINT8);
+
+ InitAmiLib (ImageHandle, SystemTable);
+
+ SetupVariableSize = sizeof (SETUP_DATA);
+
+ Status = pBS->AllocatePool (
+ EfiBootServicesData,
+ sizeof (TCG_PLATFORM_SETUP_PROTOCOL),
+ (VOID**)&TcgPlatformSetupInstance
+ );
+
+
+ if (EFI_ERROR(Status)) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ Status = pRS->GetVariable (
+ L"InternalDisallowTpmFlag",
+ &gTcgInternalflagsGuid,
+ &SetupVariableAttributes,
+ &TempSizeofSyncVar,
+ &DisallowTpmFlag);
+
+
+ if(EFI_ERROR(Status)){
+ DisallowTpmFlag = 0;
+ Status = EFI_SUCCESS;
+ }
+ else if(DisallowTpmFlag == 1)
+ {
+ MemSet(&TcgPlatformSetupInstance->ConfigFlags, sizeof(TCG_CONFIGURATION), 0);
+ TcgPlatformSetupInstance->ConfigFlags.DisallowTpm = 1;
+ MemSet(&InitialConfigFlags, sizeof(TCG_CONFIGURATION), 0);
+
+ InitialConfigFlags.DisallowTpm = 1;
+
+ TcgPlatformSetupInstance->Revision = TCG_PLATFORM_SETUP_PROTOCOL_REVISION_1;
+ TcgPlatformSetupInstance->UpdateStatusFlags = UpdateTcgStatusFlags;
+
+ Status = pRS->GetVariable (
+ L"Setup",
+ &gSetupGuid,
+ &SetupVariableAttributes,
+ &SetupVariableSize,
+ &SetupDataBuffer);
+
+
+ SetupDataBuffer.TpmEnable = 0;
+ SetupDataBuffer.TpmSupport = 0;
+ SetupDataBuffer.TcmSupport = 0;
+ SetupDataBuffer.TpmAuthenticate = 0;
+ SetupDataBuffer.TpmOperation = 0;
+ SetupDataBuffer.TpmEnaDisable = 0;
+ SetupDataBuffer.TpmActDeact = 0;
+ SetupDataBuffer.TpmHrdW = 0;
+ SetupDataBuffer.TpmOwnedUnowned = 0;
+ SetupDataBuffer.TpmError = 0;
+ SetupDataBuffer.SuppressTcg = DisallowTpmFlag;
+ SetupDataBuffer.TcgSupportEnabled = 0;
+
+ Status = pRS->SetVariable (
+ L"Setup",
+ &gSetupGuid,
+ SetupVariableAttributes,
+ SetupVariableSize,
+ &SetupDataBuffer);
+
+ return Status;
+ }
+
+
+ Status = pRS->GetVariable (
+ L"TcgInternalSyncFlag",
+ &gTcgInternalSyncflagGuid,
+ &SetupVariableAttributes,
+ &TempSizeofSyncVar,
+ &SyncVar);
+
+ if(EFI_ERROR(Status)){
+ SyncVar = 0;
+ }
+
+
+ Status = pRS->GetVariable (
+ L"Setup",
+ &gSetupGuid,
+ &SetupVariableAttributes,
+ &SetupVariableSize,
+ &SetupDataBuffer);
+
+ TcgPlatformSetupInstance->Revision = TCG_PLATFORM_SETUP_PROTOCOL_REVISION_1;
+
+ if (EFI_ERROR(Status))
+ {
+ MemSet(&TcgPlatformSetupInstance->ConfigFlags, sizeof(TCG_CONFIGURATION), 0);
+ SetupData = NULL;
+ } else {
+
+ MemSet(&TcgPlatformSetupInstance->ConfigFlags, sizeof(TCG_CONFIGURATION), 0);
+ TcgPlatformSetupInstance->ConfigFlags.TpmSupport = (SetupData->TpmSupport);
+ TcgPlatformSetupInstance->ConfigFlags.TcmSupport = (SetupData->TcmSupport);
+ TcgPlatformSetupInstance->ConfigFlags.TpmEnable = (SetupData->TpmEnable);
+ TcgPlatformSetupInstance->ConfigFlags.TpmAuthenticate = (SetupData->TpmAuthenticate);
+ TcgPlatformSetupInstance->ConfigFlags.TpmOperation = (SetupData->TpmOperation);
+ TcgPlatformSetupInstance->ConfigFlags.PpiSetupSyncFlag = SyncVar;
+ TcgPlatformSetupInstance->ConfigFlags.Reserved1 = (SetupData->ShaPolicy);
+ TcgPlatformSetupInstance->ConfigFlags.Reserved2 = 0;
+ TcgPlatformSetupInstance->ConfigFlags.DisallowTpm = DisallowTpmFlag;
+ TcgPlatformSetupInstance->ConfigFlags.TpmHardware = (SetupData->TpmHrdW);
+ TcgPlatformSetupInstance->ConfigFlags.TpmEnaDisable = (SetupData->TpmEnaDisable);
+ TcgPlatformSetupInstance->ConfigFlags.TpmActDeact = (SetupData->TpmActDeact);
+ TcgPlatformSetupInstance->ConfigFlags.TpmOwnedUnowned = (SetupData->TpmOwnedUnowned);
+ TcgPlatformSetupInstance->ConfigFlags.TcgSupportEnabled = (SetupData->TcgSupportEnabled);
+ TcgPlatformSetupInstance->ConfigFlags.TpmError = (SetupData->TpmError);
+ TcgPlatformSetupInstance->ConfigFlags.Reserved3 = 0;
+ TcgPlatformSetupInstance->ConfigFlags.Reserved4 = 0;
+ TcgPlatformSetupInstance->ConfigFlags.Reserved5 = 0;
+ TcgPlatformSetupInstance->ConfigFlags.Tpm20Device = SetupData->Tpm20Device;
+ }
+
+ TcgPlatformSetupInstance->UpdateStatusFlags = UpdateTcgStatusFlags;
+
+ InitialConfigFlags.TpmSupport = TcgPlatformSetupInstance->ConfigFlags.TpmSupport;
+ InitialConfigFlags.TcmSupport = TcgPlatformSetupInstance->ConfigFlags.TcmSupport;
+ InitialConfigFlags.TpmEnable = TcgPlatformSetupInstance->ConfigFlags.TpmEnable;
+ InitialConfigFlags.TpmAuthenticate = TcgPlatformSetupInstance->ConfigFlags.TpmAuthenticate;
+ InitialConfigFlags.TpmOperation = TcgPlatformSetupInstance->ConfigFlags.TpmOperation;
+ InitialConfigFlags.Reserved1 = TcgPlatformSetupInstance->ConfigFlags.Reserved1 ;
+ InitialConfigFlags.Reserved2 = TcgPlatformSetupInstance->ConfigFlags.Reserved2;
+
+ InitialConfigFlags.TpmHardware = TcgPlatformSetupInstance->ConfigFlags.TpmHardware;
+ InitialConfigFlags.TpmEnaDisable = TcgPlatformSetupInstance->ConfigFlags.TpmEnaDisable;
+ InitialConfigFlags.TpmActDeact = TcgPlatformSetupInstance->ConfigFlags.TpmActDeact;
+ InitialConfigFlags.TpmOwnedUnowned = TcgPlatformSetupInstance->ConfigFlags.TpmOwnedUnowned;
+ InitialConfigFlags.TcgSupportEnabled = TcgPlatformSetupInstance->ConfigFlags.TcgSupportEnabled;
+ InitialConfigFlags.TpmError = TcgPlatformSetupInstance->ConfigFlags.TpmError;
+ InitialConfigFlags.PpiSetupSyncFlag = TcgPlatformSetupInstance->ConfigFlags.PpiSetupSyncFlag;
+ InitialConfigFlags.Reserved3 = TcgPlatformSetupInstance->ConfigFlags.Reserved3;
+
+ InitialConfigFlags.Reserved4 = TcgPlatformSetupInstance->ConfigFlags.Reserved4;
+ InitialConfigFlags.Reserved5 = TcgPlatformSetupInstance->ConfigFlags.Reserved5;
+
+ InitialConfigFlags.Tpm20Device = TcgPlatformSetupInstance->ConfigFlags.Tpm20Device;
+
+ //
+ //
+ Status = pBS->InstallMultipleProtocolInterfaces (
+ &ImageHandle,
+ &gTcgPlatformSetupPolicyGuid,
+ TcgPlatformSetupInstance,
+ NULL
+ );
+
+ gImageHandle = ImageHandle;
+
+ return Status;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.cif b/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.cif
new file mode 100644
index 0000000..f3fd80e
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.cif
@@ -0,0 +1,12 @@
+<component>
+ name = "TcgPlatformSetupPolicy"
+ category = ModulePart
+ LocalRoot = "Board\EM\TCG2\Common\TcgPlatformSetupPolicy\"
+ RefName = "TcgPlatformSetupPolicy"
+[files]
+"TcgPlatformSetupPolicy.c"
+"TcgPlatformSetupPolicy.h"
+"TcgPlatformSetupPolicy.sdl"
+"TcgPlatformSetupPolicy.mak"
+"TcgPlatformSetupPolicy.dxs"
+<endComponent>
diff --git a/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.dxs b/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.dxs
new file mode 100644
index 0000000..8980c70
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.dxs
@@ -0,0 +1,52 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.dxs 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: TcgPlatformpolicy.dxs
+//
+// Description: dependency file for TcgPlatformpolicy
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include <Protocol\Variable.h>
+
+DEPENDENCY_START
+ EFI_VARIABLE_ARCH_PROTOCOL_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.h b/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.h
new file mode 100644
index 0000000..09637df
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.h
@@ -0,0 +1,165 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.h 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.h $
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 1 10/08/13 12:05p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:57p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 1 9/27/11 10:11p Fredericko
+// [TAG] EIP67286
+// [Category] Improvement
+// [Description] Initial check-in for Tcg Setup policy for Dxe
+// [Files] TcgPlatformSetupPolicy.cif
+// TcgPlatformSetupPolicy.c
+// TcgPlatformSetupPolicy.h
+// TcgPlatformSetupPolicy.sdl
+// TcgPlatformSetupPolicy.mak
+// TcgPlatformSetupPolicy.dxs
+//
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: TcgPlatformpolicy.h
+//
+// Description: Header file for TcgPlatformpolicy
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#ifndef _TCG_PLATFORM_SETUP_POLICY_H_
+#define _TCG_PLATFORM_SETUP_POLICY_H_
+
+#include <Efi.h>
+#include <token.h>
+#include <Setup.h>
+
+
+
+#define TCG_PLATFORM_SETUP_POLICY_GUID \
+ { \
+ 0xbb6cbeff, 0xe072, 0x40d2, 0xa6, 0xeb, 0xba, 0xb7, 0x5b, 0xde, 0x87, 0xe7 \
+ }
+
+#define TCG_PPI_SYNC_FLAG_GUID \
+ {\
+ 0xf3ed95df, 0x828e, 0x41c7, 0xbc, 0xa0, 0x16, 0xc4, 0x19, 0x65, 0xa6, 0x34 \
+ }
+
+#define TCG_INTERNAL_FLAGS_GUID \
+ {\
+ 0x70fff0ff, 0xa543, 0x45b9, 0x8b, 0xe3, 0x1b, 0xdb, 0x90, 0x41, 0x20, 0x80 \
+ }
+
+
+//
+// Protocol revision number
+// Any backwards compatible changes to this protocol will result in an update in the revision number
+// Major changes will require publication of a new protocol
+//
+#define TCG_PLATFORM_SETUP_PROTOCOL_REVISION_1 1
+
+#pragma pack(1)
+
+typedef struct {
+ //
+ // Byte 0, bit definition for functionality enable/disable
+ //
+ UINT8 TpmSupport; // 0: Disabled; 1: Enabled
+ UINT8 TcmSupport; // 0: Disabled; 1: Enabled
+ UINT8 TpmEnable; // 0: Disabled; 1: Enabled
+ UINT8 TpmAuthenticate;
+ UINT8 TpmOperation; // 0: Disabled; 1: Enabled
+ UINT8 DisallowTpm; // 0: Disabled; 1: Enabled
+ UINT8 Reserved1;
+ UINT8 Reserved2;
+
+ //
+ // Byte 1, bit definition for Status Information
+ //
+ UINT8 TpmHardware; // 0: Disabled; 1: Enabled
+ UINT8 TpmEnaDisable;
+ UINT8 TpmActDeact;
+ UINT8 TpmOwnedUnowned;
+ UINT8 TcgSupportEnabled; // 0: Disabled; 1: Enabled
+ UINT8 TpmError;
+ UINT8 PpiSetupSyncFlag;
+ UINT8 Reserved3;
+
+ //
+ // Byte 2, Reserved bytes
+ //
+ UINT8 Reserved4;
+
+ //
+ // Byte 3, Reserved bytes
+ //
+ UINT8 Reserved5;
+
+ //TPM 20 Configuration
+ UINT8 Tpm20Device;
+} TCG_CONFIGURATION;
+
+
+#pragma pack()
+
+typedef
+EFI_STATUS
+(EFIAPI * UPDATE_AMI_TCG_STATUS_FLAGS)(
+ TCG_CONFIGURATION *StatusFlags,
+ BOOLEAN UpdateNvram
+);
+
+
+//
+// AMT DXE Platform Policiy ====================================================
+//
+typedef struct _TCG_PLATFORM_SETUP_PROTOCOL {
+ UINT8 Revision;
+ TCG_CONFIGURATION ConfigFlags;
+ UPDATE_AMI_TCG_STATUS_FLAGS UpdateStatusFlags;
+} TCG_PLATFORM_SETUP_PROTOCOL;
+
+
+#endif
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.mak b/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.mak
new file mode 100644
index 0000000..1d5fe1c
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.mak
@@ -0,0 +1,88 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.mak 1 4/21/14 2:18p Fredericko $
+#
+# $Revision: 1 $
+#
+# $Date: 4/21/14 2:18p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.mak $
+#
+# 1 4/21/14 2:18p Fredericko
+#
+# 1 10/08/13 12:05p Fredericko
+# Initial Check-In for Tpm-Next module
+#
+# 1 7/10/13 5:57p Fredericko
+# [TAG] EIP120969
+# [Category] New Feature
+# [Description] TCG (TPM20)
+#
+# 2 9/29/11 1:55a Fredericko
+#
+# 1 9/27/11 10:11p Fredericko
+# [TAG] EIP67286
+# [Category] Improvement
+# [Description] Initial check-in for Tcg Setup policy for Dxe
+# [Files] TcgPlatformSetupPolicy.cif
+# TcgPlatformSetupPolicy.c
+# TcgPlatformSetupPolicy.h
+# TcgPlatformSetupPolicy.sdl
+# TcgPlatformSetupPolicy.mak
+# TcgPlatformSetupPolicy.dxs
+#
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: TcgPlatformpolicy.mak
+#
+# Description: Make file for TcgPlatformpolicy
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+All : TcgPlatformSetupPolicy
+
+TcgPlatformSetupPolicy : $(BUILD_DIR)\TcgPlatformSetupPolicy.mak TcgPlatformSetupPolicyBin
+
+$(BUILD_DIR)\TcgPlatformSetupPolicy.mak : $(TcgPlatformSetupPolicy_DIR)\$(@B).cif $(TcgPlatformSetupPolicy_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(TcgPlatformSetupPolicy_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+TcgPlatformSetupPolicyBin : $(AMIDXELIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\TcgPlatformSetupPolicy.mak all\
+ GUID=196CA3D8-9A5A-4735-B328-8FFC1D93D188\
+ ENTRY_POINT=TcgPlatformSetupPolicyEntryPoint\
+ DEPEX1=$(TcgPlatformSetupPolicy_DIR)\TcgPlatformSetupPolicy.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ TYPE=BS_DRIVER\
+ COMPRESS=1
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.sdl b/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.sdl
new file mode 100644
index 0000000..b5bf040
--- /dev/null
+++ b/Board/EM/TCG2/Common/TcgPlatformSetupPolicy/TcgPlatformSetupPolicy.sdl
@@ -0,0 +1,25 @@
+TOKEN
+ Name = "TcgPlatformSetupPolicy_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable TcgPlatformSetupPolicy support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+PATH
+ Name = "TcgPlatformSetupPolicy_DIR"
+End
+
+MODULE
+ Help = "Includes AmtPlatformPolicy.mak to Project"
+ File = "TcgPlatformSetupPolicy.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\TcgPlatformSetupPolicy.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.DXS b/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.DXS
new file mode 100644
index 0000000..ec6fb4e
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.DXS
@@ -0,0 +1,85 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20Acpi/Tpm20Acpi.DXS 1 4/21/14 2:19p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:19p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20Acpi/Tpm20Acpi.DXS $
+//
+// 1 4/21/14 2:19p Fredericko
+//
+// 2 3/14/14 3:50p Fredericko
+//
+// 1 10/08/13 12:06p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 2 8/30/13 11:05p Fredericko
+//
+// 1 7/10/13 5:58p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 3 7/25/11 3:21a Fredericko
+// [TAG] EIP65177
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] TCG Ppi Sec ver 1.2 update
+//
+// 2 5/20/10 8:54a Fredericko
+//
+// Included File Header
+// Included File Revision History
+// EIP 37653
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: TCGSmm.dxs
+//
+// Description:
+// Dependency for TcgSmm
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include "Tpm20Acpi.h"
+#include <Protocol\AcpiTable.h>
+#include <Protocol\AcpiTable.h>
+#include <Tpm20Includes\TrEEProtocol.h>
+#include <Protocol\SmmSwDispatch.h>
+
+DEPENDENCY_START
+ EFI_ACPI_TABLE_PROTOCOL_GUID AND
+ EFI_TREE_PROTOCOL_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
diff --git a/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.c b/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.c
new file mode 100644
index 0000000..6d12019
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.c
@@ -0,0 +1,373 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20Acpi/Tpm20Acpi.c 2 4/21/14 3:18p Fredericko $
+//
+// $Revision: 2 $
+//
+// $Date: 4/21/14 3:18p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20Acpi/Tpm20Acpi.c $
+//
+// 2 4/21/14 3:18p Fredericko
+//
+// 1 4/21/14 2:19p Fredericko
+//
+// 1 10/08/13 12:06p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 2 10/03/13 3:01p Fredericko
+//
+// 1 7/10/13 5:58p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name:
+//
+// Description:
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#include "Tpm20Acpi.h"
+#include <Token.h>
+#include <AmiDxeLib.h>
+#include "Tpm20CRBLib.h"
+
+
+EFI_TPM2_ACPI_TABLE mTpm2AcpiTemplate = {
+ {
+ EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE,
+ sizeof (mTpm2AcpiTemplate),
+ EFI_TPM2_ACPI_TABLE_REVISION,
+ //
+ // initialize to 0
+ //
+ //
+ },
+ 0, // Flags
+ (EFI_PHYSICAL_ADDRESS)(UINTN)0xFFFFFFFF, // Control Area
+ EFI_TPM2_ACPI_TABLE_START_METHOD_ACPI,
+};
+
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: GetHob
+//
+// Description: Find instance of a HOB type in a HOB list
+//
+// Input:
+// Type The HOB type to return.
+// HobStart The first HOB in the HOB list.
+//
+// Output:
+// Pointer to the Hob matching the type or NULL
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+VOID* GetHob(
+ IN UINT16 Type,
+ IN VOID *HobStart )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ Hob.Raw = HobStart;
+
+ //
+ // Return input if not found
+ //
+ if ( HobStart == NULL )
+ {
+ return HobStart;
+ }
+
+ //
+ // Parse the HOB list, stop if end of list or matching type found.
+ //
+ while ( !END_OF_HOB_LIST( Hob ))
+ {
+ if ( Hob.Header->HobType == Type )
+ {
+ break;
+ }
+
+ Hob.Raw = GET_NEXT_HOB( Hob );
+ }
+
+ //
+ // Return input if not found
+ //
+ if ( END_OF_HOB_LIST( Hob ))
+ {
+ return HobStart;
+ }
+
+ return (VOID*)(Hob.Raw);
+}
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: CompareGuid
+//
+// Description: Compares two input GUIDs
+//
+// Input: Comparision status
+//
+// Output: None
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+BOOLEAN CompareGuid(
+ EFI_GUID *G1,
+ EFI_GUID *G2 )
+{
+ UINT32 *p1 = (UINT32*)G1, *p2 = (UINT32*)G2;
+ UINTN i;
+
+ for ( i = 0; i < 4; ++i )
+ {
+ if ( p1[i] != p2[i] )
+ {
+ return FALSE;
+ }
+ }
+ return TRUE;
+ ;
+}
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: GetNextGuidHob
+//
+// Description: Find GUID HOB
+//
+// Input: HobStart A pointer to the start hob.
+// Guid A pointer to a guid.
+// Output:
+// Buffer A pointer to the buffer.
+// BufferSize Buffer size.
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS GetNextGuidHob(
+ IN OUT VOID **HobStart,
+ IN EFI_GUID * Guid,
+ OUT VOID **Buffer,
+ OUT UINTN *BufferSize OPTIONAL )
+{
+ EFI_STATUS Status;
+ EFI_PEI_HOB_POINTERS GuidHob;
+
+ if ( Buffer == NULL )
+ {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for ( Status = EFI_NOT_FOUND; EFI_ERROR( Status );)
+ {
+ GuidHob.Raw = *HobStart;
+
+ if ( END_OF_HOB_LIST( GuidHob ))
+ {
+ return EFI_NOT_FOUND;
+ }
+
+ GuidHob.Raw = GetHob( EFI_HOB_TYPE_GUID_EXTENSION, *HobStart );
+
+ if ( GuidHob.Header->HobType == EFI_HOB_TYPE_GUID_EXTENSION )
+ {
+ if ( CompareGuid( Guid, &GuidHob.Guid->Name ))
+ {
+ Status = EFI_SUCCESS;
+ *Buffer = (VOID*)((UINT8*)(&GuidHob.Guid->Name)
+ + sizeof (EFI_GUID));
+
+ if ( BufferSize != NULL )
+ {
+ *BufferSize = GuidHob.Header->HobLength
+ - sizeof (EFI_HOB_GUID_TYPE);
+ }
+ }
+ }
+
+ *HobStart = GET_NEXT_HOB( GuidHob );
+ }
+
+ return Status;
+}
+
+
+
+VOID* FindHob(
+ IN UINTN NoTableEntries,
+ IN EFI_CONFIGURATION_TABLE *ConfigTable,
+ IN EFI_GUID *HOB_guid )
+{
+ VOID *HobStart;
+ VOID *PtrHob;
+ EFI_GUID Hoblistguid = HOB_LIST_GUID;
+
+ while ( NoTableEntries > 0 )
+ {
+ NoTableEntries--;
+
+ if ((!MemCmp(
+ &ConfigTable[NoTableEntries].VendorGuid,
+ &Hoblistguid, sizeof(EFI_GUID)
+ )))
+ {
+ HobStart = ConfigTable[NoTableEntries].VendorTable;
+
+ if ( !EFI_ERROR(
+ GetNextGuidHob( &HobStart, HOB_guid, &PtrHob, NULL )
+ ))
+ {
+ TRACE ((TRACE_ALWAYS, "Hob found = %x \n", PtrHob));
+ return PtrHob;
+ }
+ }
+ }
+ return NULL;
+}
+
+
+
+EFI_STATUS
+Tpm20PublishAcpiTable (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINTN TableKey = 0;
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
+ EFI_TPM2_ACPI_CONTROL_AREA *CtrlAreaMap = NULL;
+ EFI_GUID Meguid = ME_DATA_HOB_GUID;
+ INTEL_PTT_HOB_DATA *StolenAddress = NULL;
+
+ mTpm2AcpiTemplate.Header.OemRevision = TPM20TABLEOEMREVISION;
+ mTpm2AcpiTemplate.Header.CreatorId = CREATOR_ID_AMI;
+ mTpm2AcpiTemplate.Header.OemTableId = EFI_SIGNATURE_64 ('T', 'p', 'm', '2', 'T', 'a', 'b', 'l');
+
+ //
+ // Publish the TPM ACPI table
+ //
+ Status = pBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID **) &AcpiTable);
+ if(EFI_ERROR(Status))return Status;
+
+ if(!isTpm20CrbPresent())
+ {
+ mTpm2AcpiTemplate.AddressOfControlArea = 0;
+ mTpm2AcpiTemplate.StartMethod = 6;
+ }else{
+
+ StolenAddress = (INTEL_PTT_HOB_DATA *)FindHob ( pST->NumberOfTableEntries,
+ pST->ConfigurationTable,
+ &Meguid);
+
+ if(StolenAddress != 0){
+ if(((UINTN)((UINT64 *)StolenAddress->BufferAddress)) != 0){
+ mTpm2AcpiTemplate.AddressOfControlArea = StolenAddress->BufferAddress;
+ }else{
+ mTpm2AcpiTemplate.AddressOfControlArea = TPM20_CRBBASE;
+ }
+ }else{
+ mTpm2AcpiTemplate.AddressOfControlArea = TPM20_CRBBASE;
+ }
+
+ mTpm2AcpiTemplate.StartMethod = 2;
+ CtrlAreaMap = (EFI_TPM2_ACPI_CONTROL_AREA *)(UINTN) mTpm2AcpiTemplate.AddressOfControlArea;
+ MemSet (CtrlAreaMap, sizeof(EFI_TPM2_ACPI_CONTROL_AREA), 0);
+ CtrlAreaMap->CommandSize = 0xF80;
+ CtrlAreaMap->ResponseSize = 0xF80;
+ CtrlAreaMap->Command = (UINTN)mTpm2AcpiTemplate.AddressOfControlArea + 0x80;
+ CtrlAreaMap->Response = (UINTN)mTpm2AcpiTemplate.AddressOfControlArea + 0x80;
+
+ TRACE ((TRACE_ALWAYS, "Ftpm Windows Buffer Control Area Address = %x\n", mTpm2AcpiTemplate.AddressOfControlArea));
+ TRACE ((TRACE_ALWAYS, "Ftpm Windows Command/Response Buffer Address = %x\n", CtrlAreaMap->Command));
+ }
+
+ TRACE ((TRACE_ALWAYS, " Before Installation of ACPI table \n"));
+ Status = AcpiTable->InstallAcpiTable (AcpiTable,
+ &mTpm2AcpiTemplate,
+ sizeof(EFI_TPM2_ACPI_TABLE),
+ &TableKey);
+
+ if(EFI_ERROR(Status))return Status;
+
+ return Status;
+}
+
+
+EFI_STATUS
+EFIAPI
+Tpm20AcpiInitEntry (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+)
+{
+ EFI_STATUS Status;
+
+ InitAmiLib( ImageHandle, SystemTable );
+
+ Status = Tpm20PublishAcpiTable ();
+
+ return Status;
+}
+
+
+
+
+
+
+
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.cif b/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.cif
new file mode 100644
index 0000000..2d62ae1
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.cif
@@ -0,0 +1,15 @@
+<component>
+ name = "Tpm20Acpi"
+ category = ModulePart
+ LocalRoot = "Board\EM\TCG2\Common\Tpm20Acpi"
+ RefName = "Tpm20Acpi"
+[files]
+"Tpm20Acpi.sdl"
+"Tpm20Acpi.mak"
+"Tpm20Acpi.h"
+"Tpm20Acpi.c"
+"Tpm20Acpi.DXS"
+"TpmCrb.asl"
+"tcg_ppi1_2_Ex.asl"
+"tcg_ppi1_2.asl"
+<endComponent>
diff --git a/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.h b/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.h
new file mode 100644
index 0000000..d07ee42
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.h
@@ -0,0 +1,141 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20Acpi/Tpm20Acpi.h 1 4/21/14 2:19p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:19p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20Acpi/Tpm20Acpi.h $
+//
+// 1 4/21/14 2:19p Fredericko
+//
+// 1 10/08/13 12:06p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:58p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name:
+//
+// Description:
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#ifndef _TPM20ACPI_H_
+#define _TPM20ACPI_H_
+
+#include <Efi.h>
+#include <Protocol\AcpiTable.h>
+#include <Hob.h>
+
+#define ME_DATA_HOB_GUID \
+ { 0x1e94f097, 0x5acd, 0x4089, 0xb2, 0xe3, 0xb9, 0xa5, 0xc8, 0x79, 0xa7, 0x0c }
+
+#define INTERNAL_NVS_AREA_PROTOCOL_GUID \
+ { \
+ 0x74e1e48, 0x8132, 0x47a1, 0x8c, 0x2c, 0x3f, 0x14, 0xad, 0x9a, 0x66, 0xdc \
+ }
+
+#define EFI_SIGNATURE_16(A, B) ((A) | (B << 8))
+#define EFI_SIGNATURE_32(A, B, C, D) (EFI_SIGNATURE_16 (A, B) | (EFI_SIGNATURE_16 (C, D) << 16))
+
+#ifndef EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE
+#define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE EFI_SIGNATURE_32('T', 'P', 'M', '2')
+
+#define EFI_SIGNATURE_64(A, B, C, D, E, F, G, H) \
+ (EFI_SIGNATURE_32 (A, B, C, D) | ((UINT64) (EFI_SIGNATURE_32 (E, F, G, H)) << 32))
+
+#endif
+
+#define TPM20TABLEOEMREVISION 1
+#define CREATOR_ID_AMI 0x20494D41 //" IMA""AMI "(AMI)
+#define EFI_TPM2_ACPI_TABLE_START_METHOD_ACPI 2
+#define EFI_TPM2_ACPI_TABLE_REVISION 3
+
+#pragma pack (1)
+
+
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+ UINT8 Revision;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT64 OemTableId;
+ UINT32 OemRevision;
+ UINT32 CreatorId;
+ UINT32 CreatorRevision;
+} EFI_ACPI_DESCRIPTION_HEADER;
+
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Flags;
+ UINT64 AddressOfControlArea;
+ UINT32 StartMethod;
+} EFI_TPM2_ACPI_TABLE;
+
+typedef struct {
+ UINT32 Reserved;
+ UINT32 Error;
+ UINT32 Cancel;
+ UINT32 Start;
+ UINT64 InterruptControl;
+ UINT32 CommandSize;
+ UINT64 Command;
+ UINT32 ResponseSize;
+ UINT64 Response;
+} EFI_TPM2_ACPI_CONTROL_AREA;
+
+typedef struct {
+ UINT64 BufferAddress;
+}INTEL_PTT_HOB_DATA;
+
+#pragma pack ()
+
+#define GET_HOB_TYPE( Hob ) ((Hob).Header->HobType)
+#define GET_HOB_LENGTH( Hob ) ((Hob).Header->HobLength)
+#define GET_NEXT_HOB( Hob ) ((Hob).Raw + GET_HOB_LENGTH( Hob ))
+#define END_OF_HOB_LIST( Hob ) (GET_HOB_TYPE( Hob ) ==\
+ EFI_HOB_TYPE_END_OF_HOB_LIST)
+
+EFI_STATUS GetNextGuidHob(
+ IN OUT VOID **HobStart,
+ IN EFI_GUID * Guid,
+ OUT VOID **Buffer,
+ OUT UINTN *BufferSize OPTIONAL );
+
+#endif
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2005, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.mak b/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.mak
new file mode 100644
index 0000000..40a658f
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.mak
@@ -0,0 +1,191 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20Acpi/Tpm20Acpi.mak 3 4/30/14 11:55a Fredericko $
+#
+# $Revision: 3 $
+#
+# $Date: 4/30/14 11:55a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20Acpi/Tpm20Acpi.mak $
+#
+# 3 4/30/14 11:55a Fredericko
+#
+# 2 4/25/14 4:46p Fredericko
+# Use Fixed memory descriptor to prevent O.S. from reassigning TPM
+# resources
+#
+# 1 4/21/14 2:19p Fredericko
+#
+# 3 3/14/14 3:51p Fredericko
+#
+# 2 3/11/14 6:51p Fredericko
+# [TAG] EIP151925
+# [Category] New Feature
+# [Description] Changes for TcgGeneric Regression Testing
+#
+# 1 10/08/13 12:06p Fredericko
+# Initial Check-In for Tpm-Next module
+#
+# 2 7/11/13 6:18p Fredericko
+#
+# 1 7/10/13 5:58p Fredericko
+# [TAG] EIP120969
+# [Category] New Feature
+# [Description] TCG (TPM20)
+#
+# 4 12/07/11 4:30p Fredericko
+# [TAG] EIP59683
+# [Category] Improvement
+# [Description] Allow selection between writing to SMI port as a word
+# or as a Byte.
+# Some platforms might require word writes to the SMI Status port.
+# [Files] Tcg.cif, Tcg.sdl, Tcg_ppi1_2_Ex.asl, TcgSmm.mak, TcgSmm.c
+#
+# 3 8/09/10 2:32p Fredericko
+#
+# 2 5/20/10 8:50a Fredericko
+# Included File Header
+# Included File Revision History
+# EIP 37653
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: TCGSmm.mak
+#
+# Description:
+# Make file for TCG SMM module
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+all : Tpm20Acpi
+
+Tpm20Acpi : $(BUILD_DIR)\Tpm20Acpi.mak Tpm20AcpiBin
+
+$(BUILD_DIR)\Tpm20Acpi.mak : $(TPM20ACPI_DIR)\Tpm20Acpi.cif $(TPM20ACPI_DIR)\Tpm20Acpi.mak $(BUILD_RULES)
+ $(CIF2MAK) $(TPM20ACPI_DIR)\Tpm20Acpi.cif $(CIF2MAK_DEFAULTS)
+
+Tpm20PlatformFlags=$(CFLAGS) \
+ /I$(TCG_DIR)\
+ /I$(TCG_DIR)\Common\
+ /I$(PROJECT_DIR)\Include\Protocol\
+ /I$(TCG_DIR)\Protocol\
+ /I$(TPM20_CRBLIB)\
+
+Tpm20AcpiBin : $(AMICSPLib) $(AMIDXELIB) $(BUILD_DIR)\Tpm20CRBLib.lib
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\Tpm20Acpi.mak all\
+ "CFLAGS=$(Tpm20PlatformFlags) "\
+ "CPFLAGS=$(Tpm20PlatformFlags) "\
+ GUID=4C8BDF60-2085-4577-8A46-96CB180967BC\
+ ENTRY_POINT=Tpm20AcpiInitEntry\
+ TYPE=BS_DRIVER \
+ COMPRESS=1\
+
+
+$(BUILD_DIR)\tpm.asl: $(TPM20ACPI_DIR)\Tpm20Acpi.mak
+ copy << $@
+//tpm.asl
+Device(\_SB.PCI0.TPM)
+ {
+ Method(_HID, 0){ //PnP Device ID
+ If(TCMF)
+ {
+ Return(EISAID("ZIT0101"))
+ }
+ Else
+ {
+ If(LEqual(TTDP, 0)){
+ Return(EISAID("PNP0C31"))
+ }else{
+ Return("MSFT0101")
+ }
+ }
+ }
+
+
+ Method(_STR,0)
+ {
+ If(LEqual(TTDP, 0)){
+ Return (Unicode ("TPM 1.2 Device"))
+ }else {
+ Return (Unicode ("TPM 2.0 Device"))
+ }
+ }
+
+ Name(_UID,0x01)
+ Name(CRST,ResourceTemplate()
+ {
+ Memory32Fixed (ReadOnly, 0xFED40000, 0x5000,PCRS)
+ })
+
+ OperationRegion(TMMB, SystemMemory, 0x0FED40000, 0x5000)
+ Field(TMMB, ByteAcc, Lock, Preserve)
+ {
+ Offset(0x0000),
+ ACCS, 8, // Access
+ Offset(0x0018),
+ TSTA, 8, // Status
+ TBCA, 8, // Burst Count
+ Offset(0x0F00),
+ TVID, 16, // TPM Chip VID
+ TDID, 16 // TPM Chip DID
+ }
+
+ Method(_STA, 0){
+ If(LEqual(TTDP, 0)){
+ If(TPMF){
+ Return(0x0F) // TPM Support
+ }
+ Return(0x00) // No TPM Support
+ }ElseIF(LEqual(TTDP, 1)){
+ if(TTPF){
+ Return(0x0F) // TPM Support
+ }
+ }
+ Return(0x00) // No TPM Support
+ }
+
+ Method(_CRS, 0, Serialized)
+ {
+ If(LEqual(TTPF, 1))
+ {
+ CreateDWordField(CRST, ^PCRS._BAS, MTFD) // Min
+ CreateDWordField(CRST, ^PCRS._LEN, LTFD) // Length
+
+ Store(0x0FED40000, MTFD)
+ Store(0x00005000, LTFD)
+ }
+
+ Return (CRST)
+ }
+
+ }
+<<
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.sdl b/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.sdl
new file mode 100644
index 0000000..850243a
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20Acpi/Tpm20Acpi.sdl
@@ -0,0 +1,72 @@
+TOKEN
+ Name = "TPM20ACPI_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable TCGSMM support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Token = "TPM20Enabled" "!=" "0"
+End
+
+PATH
+ Name = "TPM20ACPI_DIR"
+End
+
+MODULE
+ Help = "Includes Tpm20Acpi.mak to Project"
+ File = "Tpm20Acpi.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\Tpm20Acpi.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\tpm.asl"
+ Parent = "GENERIC_ASL"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(TPM20ACPI_DIR)\TpmCrb.asl"
+ Parent = "GENERIC_ASL"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(TPM20ACPI_DIR)\tcg_ppi1_2.asl"
+ Parent = "GENERIC_ASL"
+ InvokeOrder = AfterParent
+ Token = "OVERRIDE_TCG_ASL" "=" "0"
+ Token = "TCGPPISPEC_1_2_SUPPORT" "=" "1"
+ Token = "WORD_ACCESS_SMI_PORT" "=" "0"
+End
+
+ELINK
+ Name = "$(TPM20ACPI_DIR)\tcg_ppi1_2_Ex.asl"
+ Parent = "GENERIC_ASL"
+ InvokeOrder = AfterParent
+ Token = "OVERRIDE_TCG_ASL" "=" "0"
+ Token = "TCGPPISPEC_1_2_SUPPORT" "=" "1"
+ Token = "WORD_ACCESS_SMI_PORT" "=" "1"
+End
+
+TOKEN
+ Name = "TPMF"
+ Value = "0"
+ Help = "TPM ASL update Variable"
+ TokenType = Integer
+ TargetASL = Yes
+ TargetH = Yes
+End
+
+ELINK
+ Name = "/D PTT_FLAG"
+ Help = "Intel platforms only"
+ Parent = "GLOBAL_DEFINES"
+ InvokeOrder = AfterParent
+End
+
diff --git a/Board/EM/TCG2/Common/Tpm20Acpi/TpmCrb.asl b/Board/EM/TCG2/Common/Tpm20Acpi/TpmCrb.asl
new file mode 100644
index 0000000..43dc77e
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20Acpi/TpmCrb.asl
@@ -0,0 +1,387 @@
+Scope (\_SB.PCI0)
+{
+ Device (FTPM)
+ {
+ //
+ // Define _HID, "PNP0C31" is defined in
+ //
+ Name (_HID, "MSFT0101")
+
+ //
+ // Readable name of this device, don't know if this way is correct yet
+ //
+ Name (_STR, Unicode ("TPM 2.0 Device"))
+
+ //
+ // Return the resource consumed by TPM device
+ //
+ Name(_CRS,ResourceTemplate()
+ {
+ Memory32Fixed (ReadOnly, 0xFED70000, 0x1000,PCRS)
+ })
+
+ OperationRegion (TPMR, SystemMemory, 0xFED70000, 0x1000)
+ Field (TPMR, AnyAcc, NoLock, Preserve)
+ {
+ Offset(0x04),
+ FERR, 32,
+ Offset(0x0c),
+ BEGN, 32,
+ }
+
+ OperationRegion (CRBD, SystemMemory, 0xFED70000, 0x1000)
+ Field (CRBD, AnyAcc, NoLock, Preserve)
+ {
+ Offset(0x04),
+ HERR, 32,
+ Offset (0x40),
+ HCMD, 32,
+ Offset(0x44),
+ HSTS, 32,
+ }
+
+ OperationRegion (ASMI, SystemIO, SMIA , 0x1)
+ Field (ASMI, ByteAcc, NoLock, Preserve)
+ {
+ INQ,8
+ }
+
+ OperationRegion (BSMI, SystemIO, SMIB , 0x1)
+ Field (BSMI, ByteAcc, NoLock, Preserve)
+ {
+ DAT,8
+ }
+
+ Method (_STA, 0)
+ {
+ If(LEqual(TTDP, 1)){
+ If(LEqual(TTPF, 0)){
+ Return (0x0f)
+ }
+ }
+ Return (0x0)
+ }
+
+
+ Method (STRT, 3, Serialized, 0, IntObj, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
+ {
+ //
+ // Switch by function index
+ //
+ Switch (ToInteger (Arg1))
+ {
+ Case (0)
+ {
+ //
+ // Standard query, supports function 1-1
+ //
+ Return (Buffer () {0x03})
+ }
+ Case (1)
+ {
+ If(LEqual(Or(And(HSTS,0x00000002),And(HSTS,0x00000001)),0x00000003))
+ {
+ //
+ // Trigger the FTPM_CMD interrupt
+ //
+ Store (0x00000001, HCMD)
+ }
+ Else
+ {
+ //Set Error Bit
+ Store(0x00000001,FERR)
+ //Clear Start Bit
+ Store(0x00000000,BEGN)
+ }
+ Return (0)
+ }
+ }
+
+ Return (0)
+ }
+
+ Method (CRYF, 3, Serialized, 0, {BuffObj, PkgObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
+ {
+ //
+ // Switch by function index
+ //
+ Switch (ToInteger(Arg1))
+ {
+ Case (0)
+ {
+ //
+ // Standard query
+ //
+ Return (Buffer () {0x03})
+ }
+ Case (1)
+ {
+ //
+ // Return failure if no TPM present
+ //
+ Name(TPMV, Package () {0x01, Package () {0x1, 0x20}})
+ Return (TPMV)
+ }
+ }
+ Return (Buffer () {0})
+ }
+
+ Method (PPIR, 3, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
+ {
+ //
+ // Switch by function index
+ //
+ Switch (ToInteger(Arg1))
+ {
+ Case (0)
+ {
+ //
+ // Standard query, supports function 1-8
+ //
+ return (Buffer() {0xff,0x01}) //support functions 0-6
+ }
+ Case (1)
+ {
+ //
+ // a) Get Physical Presence Interface Version
+ //
+ Return ("1.2")
+ }
+
+ //
+ // Function 2: Submit TPM Operation request
+ // Arg3[0]: Integer - Operation Value
+ case(2)
+ {
+ ToInteger(DeRefOf(Index(Arg2,0)), TMF2) //save request in temp flag
+ Store(0x12, TMF1)
+ Store(TMF1,DAT)
+ Store(OFST,INQ)
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ Store(TMF2,DAT)
+ Store(OFST,INQ)
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ if(Lequal(DAT,0xF1)){
+ return(0x1)
+ }
+
+ return (Zero) //Success
+ }
+
+ //
+ // Function 3: Get pending TPM operation
+ case(3)
+ {
+ Name(PPI1, Package(){0,0})
+ Store(0x11,DAT) //read rqst operation
+ Store(OFST,INQ) //should cause SMI
+
+ if(Lequal(DAT,0xFF)){
+ return(0x1)
+ }
+
+ Store(DAT, Index(PPI1,1))
+ return(PPI1)
+ }
+
+ //
+ // Function 4: Get platform-specific action to transition
+ // ot Pre-OS
+ // Returns:
+ // 0: None
+ // 1: Shutdown
+ // 2: Reboot
+ // 3: OS Vendor Specific
+ case(4)
+ {
+ return (TRST) //Shutdown
+ }
+
+ //
+ // Function 5: Return TPM responce
+ //
+ case(5)
+ {
+ Name(PPI2, Package(){0,0,0})
+ Store(0x21,DAT)
+ Store(OFST,INQ)
+ Store(DAT, Index(PPI2,1))
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ Store(0x31,DAT)
+ Store(OFST,INQ)
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ IF (Lequal(DAT, 0xF0))
+ {
+ Store(0x51,DAT)
+ Store(OFST,INQ)
+ if(Lequal(DAT,0xFF)){
+ Store(0xFFFFFFF0, Index(PPI2,2))
+ return(PPI2)
+ }
+ }
+ ElseIF (Lequal(DAT, 0xF1))
+ {
+ Store(0x51,DAT)
+ Store(OFST,INQ)
+ if(Lequal(DAT,0xFF)){
+ Store(0xFFFFFFF1, Index(PPI2,2))
+ return(PPI2)
+ }
+ }
+ Else
+ {Store(DAT, Index(PPI2,2))}
+
+ return(PPI2)
+ }
+
+
+ //
+ // Function 6: Submit preferred user language
+ // Ppi Spec 1.2 section 2.1.6
+ // Arg3[0]: String - preferred language code
+ case(6)
+ {
+ return ( 0x03 ) //Success
+ }
+
+
+ //
+ // Function 7: Submit TPM Operation Request to Pre-OS Environment 2
+ // Ppi Spec 1.2 section 2.1.7
+ // Arg3[0]: String - preferred language code
+ case(7)
+ {
+ ToInteger(DeRefOf(Index(Arg2,0)), TMF2) //save request in temp flag
+ Store(0x12, TMF1)
+ Store(TMF1,DAT)
+ Store(OFST,INQ)
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ Store(TMF2,DAT)
+ Store(OFST,INQ)
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ if(Lequal(DAT,0xF1)){
+ return(0x1)
+ }
+
+ return (Zero) //Success
+ }
+
+ case(8)
+ {
+ ToInteger(DeRefOf(Index(Arg2,0)), TMF2) //save request in temp flag
+ Store(0x43, TMF1)
+ Store(TMF1,DAT)
+ Store(OFST,INQ)
+ Store(TMF2,DAT)
+ Store(OFST,INQ)
+ return (DAT)
+ }
+
+ default { }
+ }
+ }
+
+ Method (MORI, 3, Serialized, 0, IntObj, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
+ {
+ //
+ // Switch by function index
+ //
+ Switch (ToInteger (Arg1))
+ {
+ //
+ // Function 0: Return supported funcitons
+ //
+ case(0)
+ {
+ return (Buffer() {0x3}) //support functions 0 and 1
+ }
+
+ //
+ // Function 1: Set MOR Bit State
+ //
+ case(1)
+ {
+ Store(0x22, TMF1)
+ Store(TMF1,DAT)
+ Store(OFST,INQ)
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ ToInteger(DeRefOf(Index(Arg2,0)), TMF1) //save request in temp flag
+ Store(TMF1,DAT)
+ Store(OFST,INQ)
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ return (Zero)
+ }
+ default { }
+ }
+ return (Buffer() {0})
+ }
+
+ Method (_DSM, 4, Serialized, 0, UnknownObj, {BuffObj, IntObj, IntObj, PkgObj})
+ {
+
+ //
+ // TCG Physical Presence Interface
+ //
+ If(LEqual(Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653")))
+ {
+ Return (PPIR (Arg1, Arg2, Arg3))
+ }
+
+ //
+ // TCG Memory Clear Interface
+ //
+ If(LEqual(Arg0, ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d")))
+ {
+ Return (MORI (Arg1, Arg2, Arg3))
+ }
+
+ //
+ // TPM2 ACPI Start Method
+ //
+ If(LEqual(Arg0, ToUUID ("cf8e16a5-c1e8-4e25-b712-4f54a96702c8")))
+ {
+ Return (CRYF (Arg1, Arg2, Arg3))
+ }
+
+ If(LEqual(Arg0, ToUUID ("6bbf6cab-5463-4714-b7cd-f0203c0368d4")))
+ {
+ Return (STRT (Arg1, Arg2, Arg3))
+ }
+
+ Return (Buffer () {0})
+ }
+
+ }
+} \ No newline at end of file
diff --git a/Board/EM/TCG2/Common/Tpm20Acpi/tcg_ppi1_2.asl b/Board/EM/TCG2/Common/Tpm20Acpi/tcg_ppi1_2.asl
new file mode 100644
index 0000000..3406155
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20Acpi/tcg_ppi1_2.asl
@@ -0,0 +1,256 @@
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: _DSM PPI Method for TPM device
+//
+// Description: Implement Phisical Presence Interface
+//
+// Input: \_SB.PCI0.LPCB.TP
+//
+// Output: PPI result
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+Scope(\_SB.PCI0.TPM)
+{
+ OperationRegion (ASMI, SystemIO, SMIA , 0x1)
+ Field (ASMI, ByteAcc, NoLock, Preserve)
+ {
+ INQ,8
+ }
+
+ OperationRegion (BSMI, SystemIO, SMIB , 0x1)
+ Field (BSMI, ByteAcc, NoLock, Preserve)
+ {
+ DAT,8
+ }
+
+
+ Method( _DSM , 4)
+ {
+ if( LEqual(Arg0,ToUUID("3DDDFAA6-361B-4EB4-A424-8D10089D1653")))
+ {
+ switch(ToInteger(Arg2))
+ {
+ //
+ // Function 0: Return supported funcitons
+ //
+ case(0)
+ {
+ return (Buffer() {0xff,0x01}) //support functions 0-6
+ }
+
+ //
+ // Function 1: Ge PPI Version
+ //
+ case(1)
+ {
+ return ("1.2")
+ }
+
+ //
+ // Function 2: Submit TPM Operation request
+ // Arg3[0]: Integer - Operation Value
+ case(2)
+ {
+ ToInteger(DeRefOf(Index(Arg3,0)), TMF2) //save request in temp flag
+ Store(0x12, TMF1)
+ Store(TMF1,DAT)
+ Store(OFST,INQ)
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ Store(TMF2,DAT)
+ Store(OFST,INQ)
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ if(Lequal(DAT,0xF1)){
+ return(0x1)
+ }
+
+
+ return (Zero) //Success
+ }
+
+ //
+ // Function 3: Get pending TPM operation
+ case(3)
+ {
+ Name(PPI1, Package(){0,0})
+ Store(0x11,DAT) //read rqst operation
+ Store(OFST,INQ) //should cause SMI
+
+ if(Lequal(DAT,0xFF)){
+ return(0x1)
+ }
+
+ Store(DAT, Index(PPI1,1))
+ return(PPI1)
+ }
+
+ //
+ // Function 4: Get platform-specific action to transition
+ // ot Pre-OS
+ // Returns:
+ // 0: None
+ // 1: Shutdown
+ // 2: Reboot
+ // 3: OS Vendor Specific
+ case(4)
+ {
+ return (TRST) //Shutdown
+ }
+
+ //
+ // Function 5: Return TPM responce
+ //
+ case(5)
+ {
+ Name(PPI2, Package(){0,0,0})
+ Store(0x21,DAT)
+ Store(OFST,INQ)
+ Store(DAT, Index(PPI2,1))
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ Store(0x31,DAT)
+ Store(OFST,INQ)
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ IF (Lequal(DAT, 0xF0))
+ {
+ Store(0x51,DAT)
+ Store(OFST,INQ)
+ if(Lequal(DAT,0xFF)){
+ Store(0xFFFFFFF0, Index(PPI2,2))
+ return(PPI2)
+ }
+ }
+ ElseIF (Lequal(DAT, 0xF1))
+ {
+ Store(0x51,DAT)
+ Store(OFST,INQ)
+ if(Lequal(DAT,0xFF)){
+ Store(0xFFFFFFF1, Index(PPI2,2))
+ return(PPI2)
+ }
+ }
+ Else
+ {Store(DAT, Index(PPI2,2))}
+ return(PPI2)
+ }
+
+
+ //
+ // Function 6: Submit preferred user language
+ // Ppi Spec 1.2 section 2.1.6
+ // Arg3[0]: String - preferred language code
+ case(6)
+ {
+ return ( 0x03 ) //Success
+ }
+
+
+ //
+ // Function 7: Submit TPM Operation Request to Pre-OS Environment 2
+ // Ppi Spec 1.2 section 2.1.7
+ // Arg3[0]: String - preferred language code
+ case(7)
+ {
+ ToInteger(DeRefOf(Index(Arg3,0)), TMF2) //save request in temp flag
+ Store(0x12, TMF1)
+ Store(TMF1,DAT)
+ Store(OFST,INQ)
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ Store(TMF2,DAT)
+ Store(OFST,INQ)
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ if(Lequal(DAT,0xF1)){
+ return(0x1)
+ }
+
+ return (Zero) //Success
+ }
+
+ case(8)
+ {
+
+ ToInteger(DeRefOf(Index(Arg3,0)), TMF2) //save request in temp flag
+ Store(0x43, TMF1)
+ Store(TMF1,DAT)
+ Store(OFST,INQ)
+ Store(TMF2,DAT)
+ Store(OFST,INQ)
+ return (DAT)
+ }
+
+ default { }
+ }
+ } else {if(LEqual(Arg0,
+ ToUUID("376054ED-CC13-4675-901C-4756D7F2D45D"))){
+ //
+ // Reset Atack Mitigation
+ //
+ switch(ToInteger(Arg2))
+ {
+ //
+ // Function 0: Return supported funcitons
+ //
+ case(0)
+ {
+ return (Buffer() {0x3}) //support functions 0 and 1
+ }
+
+ //
+ // Function 1: Set MOR Bit State
+ //
+ case(1)
+ {
+ Store(0x22, TMF1)
+ Store(TMF1,DAT)
+ Store(OFST,INQ)
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ ToInteger(DeRefOf(Index(Arg3,0)), TMF1) //save request in temp flag
+ Store(TMF1,DAT)
+ Store(OFST,INQ)
+
+ if(Lequal(DAT,0xFF)){
+ return(0x2)
+ }
+
+ return (Zero)
+ }
+ default { }
+ }
+
+ }}
+ return (Buffer() {0})
+ }
+}
diff --git a/Board/EM/TCG2/Common/Tpm20Acpi/tcg_ppi1_2_Ex.asl b/Board/EM/TCG2/Common/Tpm20Acpi/tcg_ppi1_2_Ex.asl
new file mode 100644
index 0000000..6d74b1e
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20Acpi/tcg_ppi1_2_Ex.asl
@@ -0,0 +1,301 @@
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: _DSM PPI Method for TPM device
+//
+// Description: Implement Phisical Presence Interface using WordAcc
+//
+// Input: \_SB.PCI0.LPCB.TP
+//
+// Output: PPI result
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+Scope(\_SB.TPM)
+{
+ OperationRegion (TSMI, SystemIO, SMIA , 0x2)
+ Field (TSMI, WordAcc, NoLock, Preserve)
+ {
+ SMI,16,
+ }
+
+ Method( _DSM , 4)
+ {
+ if( LEqual(Arg0,ToUUID("3DDDFAA6-361B-4EB4-A424-8D10089D1653")))
+ {
+ switch(ToInteger(Arg2))
+ {
+ //
+ // Function 0: Return supported funcitons
+ //
+ case(0)
+ {
+ return (Buffer() {0xff,0x01}) //support functions 0-6
+ }
+
+ //
+ // Function 1: Ge PPI Version
+ //
+ case(1)
+ {
+ return ("1.2")
+ }
+
+ //
+ // Function 2: Submit TPM Operation request
+ // Arg3[0]: Integer - Operation Value
+ case(2)
+ {
+ ToInteger(DeRefOf(Index(Arg3,0)), TMF2) //save request in temp flag
+ Store(OFST, TMF1)
+ Or(0x1200, TMF1, TMF1)
+
+ Store(0xFA,P80D)
+ Store(TMF1,SMI)
+ Store(SMI,TMF1)
+ ShiftRight(TMF1, 0x8, TMF1)
+
+ if(Lequal(TMF1,0xFF)){
+ return(0x2)
+ }
+
+ ShiftLeft(TMF2, 0x8, TMF2)
+ Or(OFST, TMF2, TMF2)
+
+ Store(TMF2,SMI)
+ Store(SMI,TMF1)
+ ShiftRight(TMF1, 0x8, TMF1)
+
+ if(Lequal(TMF1,0xFF)){
+ return(0x2)
+ }
+
+ if(Lequal(TMF1,0xFF)){
+ return(0x1)
+ }
+
+ return (Zero) //Success
+ }
+
+ //
+ // Function 3: Get pending TPM operation
+ case(3)
+ {
+ Store(0xFB,P80D)
+ Name(PPI1, Package(){0,0})
+ Store(OFST,TMF1)
+ Or(0x1100, TMF1, TMF1)
+
+ Store(TMF1, SMI)
+ Store(SMI,TMF1)
+ ShiftRight(TMF1, 0x8, TMF1)
+
+ if(Lequal(TMF1,0xFF)){
+ return(0x1)
+ }
+
+ Store(TMF1, Index(PPI1,1))
+ return(PPI1)
+ }
+
+ //
+ // Function 4: Get platform-specific action to transition
+ // ot Pre-OS
+ // Returns:
+ // 0: None
+ // 1: Shutdown
+ // 2: Reboot
+ // 3: OS Vendor Specific
+ case(4)
+ {
+ Store(0xFC,P80D)
+ return (TRST) //Shutdown
+ }
+
+ //
+ // Function 5: Return TPM responce
+ //
+ case(5)
+ {
+ Name(PPI2, Package(){0,0,0})
+ Store(0xFD,P80D)
+ Store(OFST,TMF1)
+ Or(0x2100, TMF1, TMF1)
+ Store(TMF1,SMI)
+
+ Store(SMI,TMF1)
+ ShiftRight(TMF1, 0x8, TMF1)
+
+ if(Lequal(TMF1,0xFF)){
+ return(0x2)
+ }
+
+ Store(TMF1, Index(PPI2,1))
+
+ Store(OFST,TMF1)
+ Or(0x3100, TMF1, TMF1)
+
+ Store(TMF1,SMI)
+
+ Store(SMI,TMF1)
+ ShiftRight(TMF1, 0x8, TMF1)
+
+
+ if(Lequal(TMF1,0xFF)){
+ return(0x2)
+ }
+
+ IF (Lequal(TMF1, 0xF0))
+ {
+ Store(OFST,TMF1)
+ Or(0x5100, TMF1, TMF1)
+ Store(TMF1,SMI)
+ Store(SMI,TMF1)
+ ShiftRight(TMF1, 0x8, TMF1)
+
+ if(Lequal(TMF1,0xFF)){
+ Store(0xFFFFFFF0, Index(PPI2,2))
+ return(PPI2)
+ }
+
+ }
+ ElseIF (Lequal(TMF1, 0xF1))
+ {
+ Store(OFST,TMF1)
+ Or(0x5100, TMF1, TMF1)
+ Store(TMF1,SMI)
+ Store(SMI,TMF1)
+ ShiftRight(TMF1, 0x8, TMF1)
+
+ if(Lequal(TMF1,0xFF)){
+ Store(0xFFFFFFF1, Index(PPI2,2))
+ return(PPI2)
+ }
+ }
+ Else
+ {Store(TMF1, Index(PPI2,2))}
+ return(PPI2)
+ }
+
+
+ //
+ // Function 6: Submit preferred user language
+ // Ppi Spec 1.2 section 2.1.6
+ // Arg3[0]: String - preferred language code
+ case(6)
+ {
+ return ( 0x03 ) //Success
+ }
+
+
+ //
+ // Function 7: Submit TPM Operation Request to Pre-OS Environment 2
+ // Ppi Spec 1.2 section 2.1.7
+ // Arg3[0]: String - preferred language code
+ case(7)
+ {
+ ToInteger(DeRefOf(Index(Arg3,0)), TMF2) //save request in temp flag
+ Store(0xFE,P80D)
+ Store(OFST,TMF1)
+ Or(0x1200, TMF1, TMF1)
+ Store(TMF1,SMI)
+
+ Store(SMI,TMF1)
+ ShiftRight(TMF1, 0x8, TMF1)
+
+ if(Lequal(TMF1,0xFF)){
+ return(0x2)
+ }
+
+ ShiftLeft(TMF2, 0x8, TMF2)
+ Or(OFST, TMF2, TMF2)
+
+ Store(TMF2,SMI)
+ Store(SMI,TMF1)
+ ShiftRight(TMF1, 0x8, TMF1)
+
+
+ if(Lequal(TMF1,0xFF)){
+ return(0x2)
+ }
+
+ if(Lequal(TMF1,0xF1)){
+ return(0x1)
+ }
+
+ return (Zero) //Success
+ }
+
+ case(8)
+ {
+ Store(0xFF,P80D)
+ ToInteger(DeRefOf(Index(Arg3,0)), TMF2) //save request in temp flag
+ Store(OFST,TMF1)
+ Or(0x4300, TMF1, TMF1)
+ Store(TMF1,SMI)
+ Store(SMI,TMF1)
+ ShiftLeft(TMF2, 0x8, TMF2)
+ Or(OFST, TMF2, TMF2)
+ Store(TMF2,SMI)
+ Store(SMI,TMF1)
+ ShiftRight(TMF1, 0x8, TMF1)
+ return (TMF1)
+ }
+
+ default { }
+ }
+ } else {if(LEqual(Arg0,
+ ToUUID("376054ED-CC13-4675-901C-4756D7F2D45D"))){
+ //
+ // Reset Atack Mitigation
+ //
+ switch(ToInteger(Arg2))
+ {
+ //
+ // Function 0: Return supported funcitons
+ //
+ case(0)
+ {
+ return (Buffer() {0x3}) //support functions 0 and 1
+ }
+
+ //
+ // Function 1: Set MOR Bit State
+ //
+ case(1)
+ {
+ Store(0xF1,P80D)
+ Or(0x2200, TMF1, TMF1)
+ Store(TMF1,SMI)
+ Store(SMI,TMF1)
+ ShiftRight(TMF1, 0x8, TMF1)
+
+ if(Lequal(TMF1,0xFF)){
+ return(0x2)
+ }
+
+ ToInteger(DeRefOf(Index(Arg3,0)), TMF1) //save request in temp flag
+ ShiftLeft(TMF1, 0x8, TMF1)
+ Or(OFST, TMF1, TMF1)
+ Store(TMF1,SMI)
+ Store(SMI,TMF1)
+ ShiftRight(TMF1, 0x8, TMF1)
+
+ if(Lequal(TMF1,0xFF)){
+ return(0x2)
+ }
+
+ return (Zero)
+ }
+ default { }
+ }
+
+ }}
+ return (Buffer() {0})
+ }
+}
diff --git a/Board/EM/TCG2/Common/Tpm20PlatformDxe.c b/Board/EM/TCG2/Common/Tpm20PlatformDxe.c
new file mode 100644
index 0000000..cf35e7f
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20PlatformDxe.c
@@ -0,0 +1,2508 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20PlatformDxe.c 4 6/14/14 12:39a Fredericko $
+//
+// $Revision: 4 $
+//
+// $Date: 6/14/14 12:39a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20PlatformDxe.c $
+//
+// 4 6/14/14 12:39a Fredericko
+//
+// 3 6/09/14 5:02p Fredericko
+// Changes for SetVariable vulnerability during Runtime
+//
+// 2 4/25/14 4:44p Fredericko
+// when secureboot is disabled
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 5 3/17/14 3:26p Fredericko
+//
+// 4 3/14/14 3:48p Fredericko
+//
+// 3 3/11/14 6:49p Fredericko
+// [TAG] EIP151925
+// [Category] New Feature
+// [Description] Changes for TcgGeneric Regression Testing
+//
+// 2 10/09/13 6:32p Fredericko
+//
+// 1 10/08/13 12:06p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 5 10/03/13 2:52p Fredericko
+//
+// 4 9/16/13 1:37p Fredericko
+// TPM 2.0 UEFI preboot fixes.
+//
+// 3 8/30/13 11:03p Fredericko
+//
+// 2 7/11/13 6:16p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20).
+//
+// 1 7/10/13 5:57p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name:
+//
+// Description:
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include "Tpm20PlatformDxe.h"
+#include <ImageAuthentication.h>
+#include <EfiImage.h>
+#include <DevicePath.h>
+#include <Smbios.h>
+#include <DiskIo.h>
+#include <BlockIo.h>
+#include "Protocol/CpuIo.h"
+#include "Protocol/FirmwareVolume.h"
+#include "Protocol/DevicePath.h"
+#include "AMIPostMgr.h"
+#include "Tpm20PlatformDxeStrTokens.h"
+#include "TcgPlatformSetupPolicy.h"
+
+#pragma optimize("",off)
+
+#if (defined(TCGMeasureSecureBootVariables) && (TCGMeasureSecureBootVariables != 0))
+EFI_GUID gEfiImageSecurityDatabaseguid = EFI_IMAGE_SECURITY_DATABASE_GUID;
+#endif
+EFI_GUID AmitcgefiOsVariableGuid = AMI_TCG_EFI_OS_VARIABLE_GUID;
+
+#define AMI_VALID_BOOT_IMAGE_CERT_TBL_GUID \
+ { 0x6683D10C, 0xCF6E, 0x4914, 0xB5, 0xB4, 0xAB, 0x8E, 0xD7, 0x37, 0x0E, 0xD7 }
+
+#define BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID \
+ {0xdbc9fd21, 0xfad8, 0x45b0, 0x9e, 0x78, 0x27, 0x15, 0x88, 0x67, 0xcc, 0x93}
+
+EFI_GUID gBdsAllDriversConnectedProtocolGuid = BDS_ALL_DRIVERS_CONNECTED_PROTOCOL_GUID;
+EFI_GUID gAmiPostManagerProtocolGuid = AMI_POST_MANAGER_PROTOCOL_GUID;
+
+EFI_GUID gEfiGlobalVariableGuid = EFI_GLOBAL_VARIABLE;
+
+EFI_GUID ZeroGuid = {0,0,0,0,0,0,0,0,0,0,0};
+
+EFI_GUID gEfiSmbiosTableGuid = EFI_SMBIOS_TABLE_GUID;
+EFI_GUID FlagsStatusguid = AMI_TCG_CONFIRMATION_FLAGS_GUID;
+
+UINTN mMeasureGptCount = 0;
+EFI_TREE_PROTOCOL *TrEEProtocolInstance = NULL;
+static UINT8 PpiRequest;
+
+EFI_HII_HANDLE gHiiHandle;
+AMI_POST_MANAGER_PROTOCOL *pAmiPostMgr = NULL;
+EFI_HANDLE PlatformProtocolHandle;
+static PERSISTENT_BIOS_TPM_FLAGS TpmNvflags;
+
+#pragma pack (1)
+typedef struct
+{
+ EFI_PHYSICAL_ADDRESS PostCodeAddress;
+ #if x64_BUILD
+ UINT64 PostCodeLength;
+ #else
+ UINTN PostCodeLength;
+ #endif
+} EFI_TCG_EV_POST_CODE;
+
+typedef struct
+{
+ EFI_TCG_PCR_EVENT_HEADER Header;
+ EFI_TCG_EV_POST_CODE Event;
+} PEI_EFI_POST_CODE;
+#pragma pack()
+
+BOOLEAN CompareGuid(
+ EFI_GUID *G1,
+ EFI_GUID *G2 );
+
+//
+//
+// Data Table definition
+//
+typedef struct _AMI_VALID_CERT_IN_SIG_DB {
+ UINT32 SigOffset;
+ UINT32 SigLength;
+} AMI_VALID_CERT_IN_SIG_DB;
+
+
+typedef struct _AMI_INTERNAL_HLXE_PROTOCOL AMI_INTERNAL_HLXE_PROTOCOL;
+
+typedef
+EFI_STATUS
+(EFIAPI * INTERNAL_HASH_LOG_EXTEND_EVENT) (
+ IN UINT8 *DataToHash,
+ IN UINT64 Flags,
+ IN UINTN DataSize,
+ IN OUT TCG_PCR_EVENT_HDR *NewEventHdr,
+ IN UINT8 *NewEventData
+);
+
+
+struct _AMI_INTERNAL_HLXE_PROTOCOL {
+ INTERNAL_HASH_LOG_EXTEND_EVENT InternalHashLogExtend;
+};
+
+EFI_STATUS EfiGetSystemConfigurationTable(
+ IN EFI_GUID *TableGuid,
+ OUT VOID **Table)
+{
+ *Table = GetEfiConfigurationTable(pST, TableGuid);
+ return (*Table == NULL) ? EFI_NOT_FOUND : EFI_SUCCESS;
+}
+
+
+
+EFI_STATUS
+EFIAPI
+GetRandomAuthPassword(
+ IN UINT16 RNGValueLength,
+ IN OUT UINT8 *RNGValue
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ return Status;
+}
+
+
+EFI_STATUS
+EFIAPI
+TpmRevokeTrust (
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ return Status;
+}
+
+
+#define GET_HOB_TYPE( Hob ) ((Hob).Header->HobType)
+#define GET_HOB_LENGTH( Hob ) ((Hob).Header->HobLength)
+#define GET_NEXT_HOB( Hob ) ((Hob).Raw + GET_HOB_LENGTH( Hob ))
+#define END_OF_HOB_LIST( Hob ) (GET_HOB_TYPE( Hob ) == \
+ EFI_HOB_TYPE_END_OF_HOB_LIST)
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: GetHob
+//
+// Description: Find instance of a HOB type in a HOB list
+//
+//
+// Input: IN UINT16 Type,
+// IN VOID *HobStart
+//
+// Output: VOID*
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+VOID* GetHob(
+ IN UINT16 Type,
+ IN VOID *HobStart )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ Hob.Raw = HobStart;
+
+ //
+ // Return input if not found
+ //
+ if ( HobStart == NULL )
+ {
+ return HobStart;
+ }
+
+ //
+ // Parse the HOB list, stop if end of list or matching type found.
+ //
+ while ( !END_OF_HOB_LIST( Hob ))
+ {
+ if ( Hob.Header->HobType == Type )
+ {
+ break;
+ }
+
+ Hob.Raw = GET_NEXT_HOB( Hob );
+ }
+
+ //
+ // Return input if not found
+ //
+ if ( END_OF_HOB_LIST( Hob ))
+ {
+ return HobStart;
+ }
+
+ return (VOID*)(Hob.Raw);
+}
+
+
+
+EFI_STATUS
+MeasureSeparatorEvent (
+ IN UINT32 PCRIndex
+)
+{
+ UINT32 EventData;
+ TrEE_EVENT *Tpm20Event=NULL;
+ UINT64 Flags = 0;
+ EFI_STATUS Status;
+
+ if(TrEEProtocolInstance == NULL) return EFI_NOT_FOUND;
+
+ pBS->AllocatePool(EfiBootServicesData, (sizeof(TrEE_EVENT_HEADER) + \
+ sizeof(UINT32) + sizeof(UINT32)), &Tpm20Event);
+
+ if(Tpm20Event==NULL) return EFI_OUT_OF_RESOURCES;
+
+ EventData = 0;
+ Tpm20Event->Size = sizeof(TrEE_EVENT_HEADER) + sizeof(UINT32) + sizeof(EventData);
+ Tpm20Event->Header.HeaderSize = sizeof(TrEE_EVENT_HEADER);
+ Tpm20Event->Header.HeaderVersion = 1;
+ Tpm20Event->Header.PCRIndex = PCRIndex;
+ Tpm20Event->Header.EventType = EV_SEPARATOR;
+
+ pBS->CopyMem ((UINT32 *)((UINTN)&Tpm20Event->Event[0]),
+ &EventData,
+ sizeof(UINT32));
+
+ Status = TrEEProtocolInstance->HashLogExtendEvent(TrEEProtocolInstance,
+ Flags, (EFI_PHYSICAL_ADDRESS)&EventData, (UINT64)sizeof(EventData),
+ Tpm20Event);
+
+ pBS->FreePool(Tpm20Event);
+
+ return Status;
+}
+
+
+
+#if (defined(TCGMeasureSecureBootVariables) && (TCGMeasureSecureBootVariables != 0))
+EFI_STATUS
+MeasureCertificate(UINTN sizeOfCertificate,
+ UINT8 *pterCertificate)
+{
+ EFI_STATUS Status;
+ TrEE_EVENT *Tcg20Event;
+ EFI_VARIABLE_DATA *VarLog = NULL;
+ BOOLEAN AlreadyMeasuredCert = FALSE;
+ UINTN i=0;
+ UINTN VarNameLength;
+ static BOOLEAN initialized = 0;
+ static TPM_DIGEST digestTrackingArray[5];
+ static TPM_DIGEST zeroDigest;
+ UINT8 *tempDigest = NULL;
+ UINT64 HashedDataLen = 20;
+ SHA1_CTX Sha1Ctx;
+ TCG_DIGEST *Sha1Digest = NULL;
+ UINT64 Flags = 0;
+ UINT32 EventSize = 0;
+ UINT8 *EventDataPtr;
+
+ if(TrEEProtocolInstance == NULL) return EFI_NOT_FOUND;
+
+ VarNameLength = Wcslen(L"db");
+
+ EventSize = (UINT32)( sizeof (*VarLog) + VarNameLength
+ * sizeof (CHAR16) + sizeOfCertificate) - 3;
+
+ pBS->AllocatePool(EfiBootServicesData, (sizeof(TrEE_EVENT_HEADER) + \
+ sizeof(UINT32) + EventSize), &Tcg20Event);
+
+ if(Tcg20Event==NULL) return EFI_OUT_OF_RESOURCES;
+
+ if(!initialized)
+ {
+ for(i=0;i<5; i++)
+ {
+ pBS->SetMem(digestTrackingArray[i].digest,20, 0);
+ }
+ pBS->SetMem(zeroDigest.digest,20, 0);
+ initialized = TRUE;
+ }
+
+ Tcg20Event->Size = sizeof(TrEE_EVENT_HEADER) + sizeof(UINT32) + EventSize;
+ Tcg20Event->Header.HeaderSize = sizeof(TrEE_EVENT_HEADER);
+ Tcg20Event->Header.HeaderVersion = 1;
+ Tcg20Event->Header.PCRIndex = 7;
+ Tcg20Event->Header.EventType = 0x800000E0;
+
+ Status = pBS->AllocatePool(EfiBootServicesData, EventSize, &VarLog);
+
+ if ( VarLog == NULL ){
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ VarLog->VariableName = gEfiImageSecurityDatabaseGuid;
+ VarLog->UnicodeNameLength = VarNameLength;
+ VarLog->VariableDataLength = sizeOfCertificate;
+
+ pBS->CopyMem((CHAR16*)(VarLog->UnicodeName),
+ L"db",
+ VarNameLength * sizeof (CHAR16));
+
+ pBS->CopyMem((CHAR16*)(VarLog->UnicodeName) + VarNameLength,
+ pterCertificate,
+ sizeOfCertificate);
+
+ //before extending verify if we have already measured it.
+ SHA1Init(&Sha1Ctx);
+
+ SHA1Update(&Sha1Ctx,
+ VarLog,
+ (u32)EventSize);
+
+ SHA1Final((unsigned char *)&Sha1Digest->digest, &Sha1Ctx);
+
+ for(i=0; i<5; i++)
+ {
+ //tempDigest
+ if(!MemCmp(digestTrackingArray[i].digest, Sha1Digest, 20))
+ return EFI_SUCCESS; //already measured
+
+ if(!MemCmp(digestTrackingArray[i].digest, zeroDigest.digest, 20))
+ break; //we need to measure
+ }
+
+ pBS->CopyMem(digestTrackingArray[i].digest, Sha1Digest, 20);
+
+ EventDataPtr = (UINT8 *)Tcg20Event;
+
+ EventDataPtr += sizeof(TrEE_EVENT_HEADER) + sizeof(UINT32);
+
+ pBS->CopyMem(EventDataPtr, VarLog, EventSize);
+
+ Status = TrEEProtocolInstance->HashLogExtendEvent(TrEEProtocolInstance,
+ Flags, (EFI_PHYSICAL_ADDRESS)(UINT8 *)(UINTN)VarLog, (UINT64)EventSize,
+ Tcg20Event);
+ return Status;
+}
+#endif
+
+
+
+#if (defined(TCGMeasureSecureBootVariables) && (TCGMeasureSecureBootVariables != 0))
+EFI_STATUS FindandMeasureSecureBootCertificate()
+{
+ EFI_STATUS Status;
+ UINTN VarSize = 0;
+ UINTN i=0;
+ UINT8 *SecureDBBuffer = NULL;
+ UINT8 *CertificateBuffer = NULL;
+ UINTN SizeofCerificate = 0;
+ EFI_GUID Certificateguid = AMI_VALID_BOOT_IMAGE_CERT_TBL_GUID;
+ AMI_VALID_CERT_IN_SIG_DB *CertInfo;
+ UINT8 *CertOffsetPtr = NULL;
+
+ VarSize = 0;
+
+ Status = pRS->GetVariable(L"db",
+ &gEfiImageSecurityDatabaseGuid,
+ NULL,
+ &VarSize,
+ NULL);
+
+ if ( Status != EFI_BUFFER_TOO_SMALL )
+ {
+ return EFI_NOT_FOUND;
+ }
+
+ Status = pBS->AllocatePool(EfiBootServicesData, VarSize, &SecureDBBuffer);
+
+ if ( SecureDBBuffer != NULL )
+ {
+ Status = pRS->GetVariable(L"db",
+ &gEfiImageSecurityDatabaseGuid,
+ NULL,
+ &VarSize,
+ SecureDBBuffer);
+
+ if ( EFI_ERROR( Status ))
+ {
+ pBS->FreePool( SecureDBBuffer );
+ SecureDBBuffer = NULL;
+ return EFI_NOT_FOUND;
+ }
+ }else{
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //we need to find the pointer in the EFI system table and work from
+ //there
+ CertInfo = NULL;
+ EfiGetSystemConfigurationTable(&Certificateguid, &CertInfo );
+ if(CertInfo == NULL){
+ return EFI_NOT_FOUND;
+ }
+ if(CertInfo->SigLength == 0){
+ return EFI_NOT_READY;
+ }
+
+ CertOffsetPtr = NULL;
+ CertOffsetPtr = (SecureDBBuffer + CertInfo->SigOffset);
+ MeasureCertificate((UINTN)CertInfo->SigLength,CertOffsetPtr);
+
+ if(SecureDBBuffer!=NULL){
+ pBS->FreePool( SecureDBBuffer );
+ }
+
+ return Status;
+}
+#endif
+
+
+UINTN Tpm20AsciiStrLen (
+ IN CHAR8 *String)
+{
+ UINTN Length;
+ for (Length = 0; *String != '\0'; String++, Length++);
+ return Length;
+}
+
+
+
+EFI_STATUS
+EFIAPI
+MeasureAction (
+ IN CHAR8 *String
+)
+{
+ TCG_PCR_EVENT_HDR TcgEvent;
+ AMI_INTERNAL_HLXE_PROTOCOL *InternalHLXE = NULL;
+ EFI_GUID gEfiAmiHLXEGuid = AMI_PROTOCOL_INTERNAL_HLXE_GUID;
+ EFI_STATUS Status;
+
+ TcgEvent.PCRIndex = 5;
+ TcgEvent.EventType = EV_EFI_ACTION;
+ TcgEvent.EventSize = (UINT32)Tpm20AsciiStrLen (String);
+
+ Status = pBS->LocateProtocol(&gEfiAmiHLXEGuid, NULL, &InternalHLXE);
+ if(EFI_ERROR(Status))return Status;
+
+ Status = InternalHLXE->InternalHashLogExtend((UINT8*)String, 0, TcgEvent.EventSize, &TcgEvent, (UINT8*)String);
+ return Status;
+}
+
+
+
+
+
+EFI_STATUS
+EFIAPI
+TreeMeasurePeImage (
+ IN BOOLEAN BootPolicy,
+ IN EFI_PHYSICAL_ADDRESS ImageAddress,
+ IN UINTN ImageSize,
+ IN UINTN LinkTimeBase,
+ IN UINT16 ImageType,
+ IN EFI_HANDLE DeviceHandle,
+ IN EFI_DEVICE_PATH_PROTOCOL *FilePath
+ )
+{
+
+ EFI_STATUS Status;
+ TCG_PCR_EVENT_HDR TcgEvent;
+ UINT8 *EventData = NULL;
+ EFI_IMAGE_LOAD_EVENT *ImageLoad;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *FullPath;
+ UINT32 FullPathSize;
+ SHA1_CTX Sha1Ctx;
+ EFI_IMAGE_DOS_HEADER *DosHdr;
+ UINT32 PeCoffHeaderOffset;
+ EFI_IMAGE_NT_HEADERS64 *Hdr;
+ EFI_IMAGE_SECTION_HEADER *Section;
+ UINT8 *HashBase;
+ UINTN HashSize;
+ UINTN SumOfBytesHashed;
+ EFI_IMAGE_SECTION_HEADER *SectionHeader;
+ UINTN Index, iPos;
+ TCG_DIGEST Sha1Digest;
+ AMI_INTERNAL_HLXE_PROTOCOL *InternalHLXE = NULL;
+ EFI_GUID gEfiAmiHLXEGuid = AMI_PROTOCOL_INTERNAL_HLXE_GUID;
+ TCG_PLATFORM_SETUP_PROTOCOL *ProtocolInstance;
+ EFI_GUID Policyguid = TCG_PLATFORM_SETUP_POLICY_GUID;
+ SHA2_CTX Sha2Ctx;
+// unsigned char Sha2DigestArray[32];
+ UINT8 HashPolicy;
+
+
+ Status = pBS->LocateProtocol (&Policyguid, NULL, &ProtocolInstance);
+ if (EFI_ERROR (Status)) {
+ return 0;
+ }
+
+ HashPolicy = ProtocolInstance->ConfigFlags.Reserved1;
+
+
+ ImageLoad = NULL;
+ FullPath = NULL;
+ SectionHeader = NULL;
+ FullPathSize = 0;
+
+ TRACE ((TRACE_ALWAYS, "TreeMeasurePeImage Entry\n"));
+
+ if (DeviceHandle != NULL) {
+ //
+ // Skip images loaded from FVs
+ //
+ Status = pBS->OpenProtocol (
+ DeviceHandle,
+ &gEfiFirmwareVolumeProtocolGuid,
+ NULL,
+ NULL,
+ NULL,
+ EFI_OPEN_PROTOCOL_TEST_PROTOCOL
+ );
+
+ if (!EFI_ERROR (Status)) {
+ goto Done;
+ }
+ ASSERT (Status == EFI_UNSUPPORTED);
+
+ //
+ // Get device path for the device handle
+ //
+ Status = pBS->HandleProtocol (
+ DeviceHandle,
+ &gEfiDevicePathProtocolGuid,
+ &DevicePath
+ );
+ if (EFI_ERROR (Status)) {
+ FullPathSize = (UINT32)DPLength (FullPath);
+ }else{
+ FullPath = DPAdd (DevicePath, FilePath);
+ FullPathSize = (UINT32)DPLength (FullPath);
+ }
+ }
+
+ //Allocate Event log memory
+ Status = pBS ->AllocatePool(EfiBootServicesData, ((sizeof (*ImageLoad)
+ - sizeof (ImageLoad->DevicePath)) + FullPathSize), &EventData);
+
+ if(EFI_ERROR(Status))return Status;
+ //
+ // Determine destination PCR by BootPolicy
+ //
+ TcgEvent.EventSize = sizeof (*ImageLoad) - sizeof (ImageLoad->DevicePath);
+ TcgEvent.EventSize += FullPathSize;
+
+ switch (ImageType) {
+ case EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION:
+ TcgEvent.PCRIndex = 4;
+ TcgEvent.EventType = EV_EFI_BOOT_SERVICES_APPLICATION;
+ break;
+ case EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER:
+ TcgEvent.PCRIndex = 2;
+ TcgEvent.EventType = EV_EFI_BOOT_SERVICES_DRIVER;
+ goto Done;
+ break;
+ case EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER:
+ TcgEvent.PCRIndex = 2;
+ TcgEvent.EventType = EV_EFI_RUNTIME_SERVICES_DRIVER;
+ goto Done;
+ break;
+ default:
+ TcgEvent.EventType = ImageType;
+ Status = EFI_UNSUPPORTED;
+ goto Done;
+ }
+
+ PERF_START(0,L"MeasurePeImg",NULL,0);
+
+ Status = pBS ->AllocatePool(EfiBootServicesData,TcgEvent.EventSize, &ImageLoad);
+
+ if (ImageLoad == NULL) {
+ Status = EFI_OUT_OF_RESOURCES;
+ goto Done;
+ }
+
+ ImageLoad->ImageLocationInMemory = ImageAddress;
+ ImageLoad->ImageLengthInMemory = ImageSize;
+ ImageLoad->ImageLinkTimeAddress = LinkTimeBase;
+ ImageLoad->LengthOfDevicePath = FullPathSize;
+ pBS->CopyMem( ImageLoad->DevicePath, FullPath, FullPathSize );
+
+ //
+ // Check PE/COFF image
+ //
+ DosHdr = (EFI_IMAGE_DOS_HEADER *)(UINTN)ImageAddress;
+ PeCoffHeaderOffset = 0;
+ if (DosHdr->e_magic == EFI_IMAGE_DOS_SIGNATURE) {
+ PeCoffHeaderOffset = DosHdr->e_lfanew;
+ }
+ if (((EFI_TE_IMAGE_HEADER *)((UINT8 *)(UINTN)ImageAddress + PeCoffHeaderOffset))->Signature
+ == EFI_TE_IMAGE_HEADER_SIGNATURE) {
+ goto Done;
+ }
+
+ //
+ // PE/COFF Image Measurement
+ //
+ // NOTE: The following codes/steps are based upon the authenticode image hashing in
+ // PE/COFF Specification 8.0 Appendix A.
+ //
+ //
+
+ // 1. Load the image header into memory.
+
+ // 2. Initialize a SHA hash context.
+ if(HashPolicy == 0){ SHA1Init(&Sha1Ctx);}
+ else if(HashPolicy == 1){sha256_init( &Sha2Ctx );};
+
+
+ //
+ // Measuring PE/COFF Image Header;
+ // But CheckSum field and SECURITY data directory (certificate) are excluded
+ //
+ Hdr = (EFI_IMAGE_NT_HEADERS *)((UINT8 *)(UINTN)ImageAddress + PeCoffHeaderOffset);
+
+ //
+ // 3. Calculate the distance from the base of the image header to the image checksum address.
+ // 4. Hash the image header from its base to beginning of the image checksum.
+ //
+ HashBase = (UINT8 *)(UINTN)ImageAddress;
+ HashSize = (UINTN) ((UINT8 *)(&Hdr->OptionalHeader.CheckSum) - HashBase);
+ if(HashPolicy == 0){
+ SHA1Update(&Sha1Ctx,
+ HashBase,
+ (u32)HashSize);
+ }else if(HashPolicy == 1){
+ sha256_process( &Sha2Ctx, HashBase, (u32)HashSize );
+ }
+
+
+
+ //
+ // 5. Skip over the image checksum (it occupies a single ULONG).
+ // 6. Get the address of the beginning of the Cert Directory.
+ // 7. Hash everything from the end of the checksum to the start of the Cert Directory.
+ //
+ HashBase = (UINT8 *) &Hdr->OptionalHeader.CheckSum + sizeof (UINT32);
+ HashSize = (UINTN) ((UINT8 *)(&Hdr->OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_SECURITY]) - HashBase);
+
+ if(HashPolicy == 0){
+ SHA1Update(&Sha1Ctx,
+ HashBase,
+ (u32)HashSize);
+ }else if(HashPolicy == 1){
+ sha256_process( &Sha2Ctx, HashBase, (u32)HashSize );
+ }
+
+ //
+ // 8. Skip over the Cert Directory. (It is sizeof(IMAGE_DATA_DIRECTORY) bytes.)
+ // 9. Hash everything from the end of the Cert Directory to the end of image header.
+ //
+ HashBase = (UINT8 *) &Hdr->OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_SECURITY + 1];
+ HashSize = Hdr->OptionalHeader.SizeOfHeaders -
+ (UINTN) ((UINT8 *)(&Hdr->OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_SECURITY + 1]) - (UINT8 *)(UINTN)ImageAddress);
+
+ if(HashPolicy == 0){
+ SHA1Update(&Sha1Ctx,
+ HashBase,
+ (u32)HashSize);
+ }else if(HashPolicy == 1){
+ sha256_process( &Sha2Ctx, HashBase, (u32)HashSize );
+ }
+
+
+ //
+ // 10. Set the SUM_OF_BYTES_HASHED to the size of the header
+ //
+ SumOfBytesHashed = Hdr->OptionalHeader.SizeOfHeaders;
+
+ //
+ // 11. Build a temporary table of pointers to all the IMAGE_SECTION_HEADER
+ // structures in the image. The 'NumberOfSections' field of the image
+ // header indicates how big the table should be. Do not include any
+ // IMAGE_SECTION_HEADERs in the table whose 'SizeOfRawData' field is zero.
+ //
+ pBS ->AllocatePool(EfiBootServicesData,sizeof (EFI_IMAGE_SECTION_HEADER) * Hdr->FileHeader.NumberOfSections, &SectionHeader);
+
+ if(SectionHeader==NULL)return EFI_OUT_OF_RESOURCES;
+ pBS->SetMem(SectionHeader, (sizeof (EFI_IMAGE_SECTION_HEADER) * Hdr->FileHeader.NumberOfSections), 0);
+
+ //
+ // 12. Using the 'PointerToRawData' in the referenced section headers as
+ // a key, arrange the elements in the table in ascending order. In other
+ // words, sort the section headers according to the disk-file offset of
+ // the section.
+ //
+ Section = (EFI_IMAGE_SECTION_HEADER *) (
+ (UINT8 *)(UINTN)ImageAddress +
+ PeCoffHeaderOffset +
+ sizeof(UINT32) +
+ sizeof(EFI_IMAGE_FILE_HEADER) +
+ Hdr->FileHeader.SizeOfOptionalHeader
+ );
+ for (Index = 0; Index < Hdr->FileHeader.NumberOfSections; Index++) {
+ iPos = Index;
+ while ((iPos > 0) && (Section->PointerToRawData < SectionHeader[iPos - 1].PointerToRawData)) {
+ pBS->CopyMem (&SectionHeader[iPos], &SectionHeader[iPos - 1], sizeof(EFI_IMAGE_SECTION_HEADER));
+ iPos--;
+ }
+ pBS->CopyMem( &SectionHeader[iPos], Section,
+ sizeof(EFI_IMAGE_SECTION_HEADER));
+ Section += 1;
+ }
+
+ //
+ // 13. Walk through the sorted table, bring the corresponding section
+ // into memory, and hash the entire section (using the 'SizeOfRawData'
+ // field in the section header to determine the amount of data to hash).
+ // 14. Add the section's 'SizeOfRawData' to SUM_OF_BYTES_HASHED .
+ // 15. Repeat steps 13 and 14 for all the sections in the sorted table.
+ //
+ for (Index = 0; Index < Hdr->FileHeader.NumberOfSections; Index++) {
+ Section = (EFI_IMAGE_SECTION_HEADER *) &SectionHeader[Index];
+ if (Section->SizeOfRawData == 0) {
+ continue;
+ }
+ HashBase = (UINT8 *)(UINTN)ImageAddress + Section->PointerToRawData;
+ HashSize = (UINTN) Section->SizeOfRawData;
+
+ if(HashPolicy == 0){
+ SHA1Update(&Sha1Ctx,
+ HashBase,
+ (u32)HashSize);
+ }else if(HashPolicy == 1){
+ sha256_process( &Sha2Ctx, HashBase, (u32)HashSize );
+ }
+
+
+ SumOfBytesHashed += HashSize;
+ }
+
+ //
+ // 16. If the file size is greater than SUM_OF_BYTES_HASHED, there is extra
+ // data in the file that needs to be added to the hash. This data begins
+ // at file offset SUM_OF_BYTES_HASHED and its length is:
+ // FileSize - (CertDirectory->Size)
+ //
+ if (ImageSize > SumOfBytesHashed) {
+ HashBase = (UINT8 *)(UINTN)ImageAddress + SumOfBytesHashed;
+ HashSize = (UINTN)(ImageSize -
+ Hdr->OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_SECURITY].Size -
+ SumOfBytesHashed);
+
+ if(HashPolicy == 0){
+ SHA1Update(&Sha1Ctx,
+ HashBase,
+ (u32)HashSize);
+ }else if(HashPolicy == 1){
+ sha256_process( &Sha2Ctx, HashBase, (u32)HashSize );
+ }
+ }
+
+ //
+ // 17. Finalize the SHA hash.
+ //
+ if(HashPolicy == 0){
+ SHA1Final(Sha1Digest.digest, &Sha1Ctx);
+ pBS->CopyMem(&TcgEvent.Digest, Sha1Digest.digest, SHA1_DIGEST_SIZE);
+ }else if(HashPolicy == 1){
+ //sha256_done( &Sha2Ctx, Sha2DigestArray );
+ //pBS->CopyMem(&TcgEvent.Digest.digestSha2, Sha2DigestArray, SHA256_DIGEST_SIZE);
+ }
+
+ //
+ // HashLogExtendEvent
+ //
+ pBS->CopyMem(EventData, ImageLoad, TcgEvent.EventSize);
+
+ Status = pBS->LocateProtocol(&gEfiAmiHLXEGuid, NULL, &InternalHLXE);
+ if(EFI_ERROR(Status))return Status;
+
+ InternalHLXE->InternalHashLogExtend(NULL, 0, 0, &TcgEvent, EventData);
+
+ PERF_END(0,L"MeasurePeImg",NULL,0);
+
+ if(BootPolicy == TRUE){
+#if (defined(TCGMeasureSecureBootVariables) && (TCGMeasureSecureBootVariables != 0))
+ FindandMeasureSecureBootCertificate();
+#endif
+ }
+
+Done:
+ if (ImageLoad != NULL) {
+ pBS->FreePool (ImageLoad);
+ }
+
+ if (FullPathSize > 0) {
+ pBS->FreePool (FullPath);
+ }
+
+ if (SectionHeader != NULL) {
+ pBS->FreePool (SectionHeader);
+ }
+ return Status;
+}
+
+
+
+//*******************************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: FindAndMeasureDxeFWVol
+//
+// Description:
+//
+// Input:
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//******************************************************************************
+EFI_STATUS FindAndMeasureDxeFWVol()
+{
+ EFI_STATUS Status;
+ EFI_GUID NameGuid =\
+ {0x7739f24c, 0x93d7, 0x11d4,\
+ 0x9a, 0x3a, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d};
+ UINTN Size;
+ void *Buffer = NULL;
+ VOID *HobStart;
+ UINTN TableEntries;
+ EFI_PEI_HOB_POINTERS FirmwareVolumeHob;
+ BOOLEAN Found = FALSE;
+ TrEE_EVENT *Tcg20Event = NULL;
+ EFI_TCG_EV_POST_CODE EventData;
+
+
+ if(TrEEProtocolInstance == NULL) return EFI_NOT_FOUND;
+
+ Status = pBS->AllocatePool(EfiBootServicesData, (sizeof(TrEE_EVENT_HEADER) + \
+ sizeof(UINT32) + sizeof(EventData)), &Tcg20Event);
+
+ if(EFI_ERROR(Status) || (Tcg20Event == NULL))return Status;
+
+
+ TableEntries = pST->NumberOfTableEntries;
+
+ while ( TableEntries > 0 )
+ {
+ TableEntries--;
+
+ if ((!MemCmp(
+ &pST->ConfigurationTable[TableEntries].VendorGuid,
+ &NameGuid, sizeof(EFI_GUID))))
+ {
+ HobStart = pST->ConfigurationTable[TableEntries].VendorTable;
+ FirmwareVolumeHob.Raw = GetHob (EFI_HOB_TYPE_FV, HobStart);
+ if (FirmwareVolumeHob.Header->HobType != EFI_HOB_TYPE_FV) {
+ continue;
+ }
+ break;
+ }
+ }
+
+ for (Status = EFI_NOT_FOUND; EFI_ERROR (Status);) {
+ if (END_OF_HOB_LIST (FirmwareVolumeHob)) {
+ return EFI_NOT_FOUND;
+ }
+
+ if (GET_HOB_TYPE (FirmwareVolumeHob) == EFI_HOB_TYPE_FV) {
+ if ((((UINT64)FirmwareVolumeHob.FirmwareVolume->BaseAddress)\
+ < (UINT64)NVRAM_ADDRESS ) ||
+ ((UINT64)FirmwareVolumeHob.FirmwareVolume->BaseAddress) == FV_MAIN_BASE)
+ {
+ Found = TRUE;
+ break;
+ }
+ }
+
+ FirmwareVolumeHob.Raw = GET_NEXT_HOB (FirmwareVolumeHob);
+ }
+
+ if(Found == FALSE)return EFI_NOT_FOUND;
+
+ pBS->AllocatePool(EfiBootServicesData, (UINTN)FirmwareVolumeHob.FirmwareVolume->Length, Buffer);
+
+ if(Buffer == NULL) return EFI_OUT_OF_RESOURCES;
+
+ if(FirmwareVolumeHob.FirmwareVolume->BaseAddress == FV_MAIN_BASE)
+ {
+ if(FirmwareVolumeHob.FirmwareVolume->Length > TCG_SIZE){
+ Size = TCG_SIZE;
+ }else{
+ Size = FirmwareVolumeHob.FirmwareVolume->Length;
+ }
+
+ pBS->CopyMem(Buffer, (UINT8 *)(EFI_PHYSICAL_ADDRESS)FirmwareVolumeHob.FirmwareVolume->BaseAddress,\
+ Size);
+
+ }else{
+
+ Buffer = (UINT8 *)(EFI_PHYSICAL_ADDRESS)FirmwareVolumeHob.FirmwareVolume->BaseAddress;
+ Size = FirmwareVolumeHob.FirmwareVolume->Length;
+ }
+
+ EventData.PostCodeAddress = \
+ (EFI_PHYSICAL_ADDRESS)FirmwareVolumeHob.FirmwareVolume->BaseAddress;
+
+ #if defined x64_BUILD && x64_BUILD == 1
+ EventData.PostCodeLength = Size;
+ #else
+ EventData.PostCodeLength = Size;
+ #endif
+
+
+ Tcg20Event->Size = sizeof(TrEE_EVENT_HEADER) + sizeof(UINT32) + sizeof(EventData);
+ Tcg20Event->Header.HeaderSize = sizeof(TrEE_EVENT_HEADER);
+ Tcg20Event->Header.HeaderVersion = 1;
+ Tcg20Event->Header.PCRIndex = 0;
+ Tcg20Event->Header.EventType = EV_POST_CODE;
+
+ pBS->CopyMem(Tcg20Event->Event, &EventData,sizeof(EventData));
+
+
+ Status = TrEEProtocolInstance->HashLogExtendEvent(TrEEProtocolInstance,
+ 0, EventData.PostCodeAddress, Size,
+ Tcg20Event);
+
+ return Status;
+}
+
+
+EFI_STATUS
+EFIAPI
+MeasureHandoffTables (
+ VOID
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+#if Measure_Smbios_Tables
+ SMBIOS_TABLE_ENTRY_POINT *SmbiosTable;
+ TrEE_EVENT *Tpm20Event;
+
+ if(TrEEProtocolInstance == NULL) return EFI_NOT_FOUND;
+
+ Status = pBS->AllocatePool(EfiBootServicesData, (sizeof(TrEE_EVENT_HEADER) + \
+ sizeof(UINT32) + sizeof(EFI_HANDOFF_TABLE_POINTERS)), &Tpm20Event);
+
+ if(EFI_ERROR(Status) || (Tpm20Event == NULL))return Status;
+
+ Status = EfiGetSystemConfigurationTable (&gEfiSmbiosTableGuid,
+ (VOID **) &SmbiosTable);
+
+ if (!EFI_ERROR (Status)) {
+ ASSERT (SmbiosTable != NULL);
+ }
+
+ Tpm20Event->Size = sizeof(TrEE_EVENT_HEADER) + \
+ sizeof(UINT32) + sizeof(EFI_HANDOFF_TABLE_POINTERS);
+
+ Tpm20Event->Header.HeaderSize = sizeof(TrEE_EVENT_HEADER);
+ Tpm20Event->Header.HeaderVersion = 1;
+ Tpm20Event->Header.PCRIndex = 1;
+ Tpm20Event->Header.EventType = EV_EFI_HANDOFF_TABLES;
+
+ ((EFI_HANDOFF_TABLE_POINTERS *)((UINTN)&Tpm20Event->Event[0]))->NumberOfTables = 1;
+ ((EFI_HANDOFF_TABLE_POINTERS *)((UINTN)&Tpm20Event->Event[0]))->TableEntry[0].VendorGuid = gEfiSmbiosTableGuid;
+ ((EFI_HANDOFF_TABLE_POINTERS *)((UINTN)&Tpm20Event->Event[0]))->TableEntry[0].VendorTable = SmbiosTable;
+
+ Status = TrEEProtocolInstance->HashLogExtendEvent(TrEEProtocolInstance,
+ 0, (EFI_PHYSICAL_ADDRESS)(UINT8*)(UINTN)SmbiosTable->TableAddress,
+ SmbiosTable->TableLength,
+ Tpm20Event);
+
+ pBS->FreePool(Tpm20Event);
+#endif
+
+ return Status;
+}
+
+
+
+VOID *
+EFIAPI
+ReadVariable (
+ IN CHAR16 *VarName,
+ IN EFI_GUID *VendorGuid,
+ OUT UINTN *VarSize
+ )
+{
+ EFI_STATUS Status;
+ VOID *VarData;
+
+ *VarSize = 0;
+ Status = pRS->GetVariable (
+ VarName,
+ VendorGuid,
+ NULL,
+ VarSize,
+ NULL
+ );
+ if (Status != EFI_BUFFER_TOO_SMALL) {
+ return NULL;
+ }
+
+ pBS->AllocatePool (EfiBootServicesData, *VarSize, &VarData);
+ if (VarData != NULL) {
+ Status = pRS->GetVariable (
+ VarName,
+ VendorGuid,
+ NULL,
+ VarSize,
+ VarData
+ );
+ if (EFI_ERROR (Status)) {
+ pBS->FreePool (VarData);
+ VarData = NULL;
+ *VarSize = 0;
+ }
+ }
+ return VarData;
+}
+
+
+
+EFI_STATUS
+EFIAPI
+MeasureVariable (
+ IN UINT32 PCRIndex,
+ IN UINT32 EventType,
+ IN CHAR16 *VarName,
+ IN EFI_GUID *VendorGuid,
+ IN VOID *VarData,
+ IN UINTN VarSize
+ )
+{
+ EFI_STATUS Status;
+ TrEE_EVENT *Tpm20Event;
+ UINTN EventSize;
+ UINTN VarNameLength;
+ EFI_VARIABLE_DATA *VarLog;
+
+ VarNameLength = Wcslen (VarName);
+
+ if(TrEEProtocolInstance == NULL) return EFI_NOT_FOUND;
+
+ EventSize = (UINT32)(sizeof (*VarLog) + VarNameLength * sizeof (*VarName) + VarSize
+ - sizeof (VarLog->UnicodeName) - sizeof (VarLog->VariableData));
+
+ pBS->AllocatePool(EfiBootServicesData, (sizeof(TrEE_EVENT_HEADER) + \
+ sizeof(UINT32) + EventSize), &Tpm20Event);
+
+ if(Tpm20Event==NULL)return EFI_OUT_OF_RESOURCES;
+
+ Tpm20Event->Size = sizeof(TrEE_EVENT_HEADER) + \
+ sizeof(UINT32) + (UINT32)EventSize;
+
+ Tpm20Event->Header.HeaderSize = sizeof(TrEE_EVENT_HEADER);
+ Tpm20Event->Header.HeaderVersion = 1;
+ Tpm20Event->Header.PCRIndex = PCRIndex;
+ Tpm20Event->Header.EventType = EventType;
+
+
+ ((EFI_VARIABLE_DATA *)((UINTN)&Tpm20Event->Event[0]))->VariableName = *VendorGuid;
+ ((EFI_VARIABLE_DATA *)((UINTN)&Tpm20Event->Event[0]))->UnicodeNameLength = VarNameLength;
+ ((EFI_VARIABLE_DATA *)((UINTN)&Tpm20Event->Event[0]))->VariableDataLength = VarSize;
+
+ pBS->CopyMem (((EFI_VARIABLE_DATA *)((UINTN)&Tpm20Event->Event[0]))->UnicodeName,
+ VarName,
+ VarNameLength * sizeof (*VarName));
+
+ pBS->CopyMem ((CHAR16 *)((EFI_VARIABLE_DATA *)((UINTN)&Tpm20Event->Event[0]))->UnicodeName + VarNameLength,
+ VarData,
+ VarSize);
+
+ Status = TrEEProtocolInstance->HashLogExtendEvent(TrEEProtocolInstance,
+ 0, (EFI_PHYSICAL_ADDRESS)(UINT8 *)(&Tpm20Event->Event[0]), EventSize,
+ Tpm20Event);
+
+ pBS->FreePool(Tpm20Event);
+
+ return Status;
+}
+
+
+EFI_STATUS
+EFIAPI
+TcgMeasureGptTable (
+ IN EFI_HANDLE GptHandle
+ )
+{
+ EFI_STATUS Status;
+ EFI_BLOCK_IO_PROTOCOL *BlockIo;
+ EFI_DISK_IO_PROTOCOL *DiskIo;
+ EFI_PARTITION_TABLE_HEADER *PrimaryHeader;
+ EFI_PARTITION_ENTRY *PartitionEntry;
+ UINT8 *EntryPtr;
+ UINTN NumberOfPartition;
+ UINT32 Index;
+ UINT64 Flags;
+ EFI_GPT_DATA *GptData;
+ UINT32 EventSize;
+ MASTER_BOOT_RECORD *Mbr;
+ UINT8 Count;
+ UINT32 LBAofGptHeader = 0;
+ TCG_PCR_EVENT_HDR TcgEvent;
+ AMI_INTERNAL_HLXE_PROTOCOL *InternalHLXE = NULL;
+ EFI_GUID gEfiAmiHLXEGuid = AMI_PROTOCOL_INTERNAL_HLXE_GUID;
+
+ if (mMeasureGptCount > 0) {
+ return EFI_SUCCESS;
+ }
+
+ Status = pBS->HandleProtocol (GptHandle, &gEfiBlockIoProtocolGuid, (VOID**)&BlockIo);
+ if (EFI_ERROR (Status)) {
+ return EFI_UNSUPPORTED;
+ }
+ Status = pBS->HandleProtocol (GptHandle, &gEfiDiskIoProtocolGuid, (VOID**)&DiskIo);
+ if (EFI_ERROR (Status)) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //Read the protective MBR
+ pBS->AllocatePool (EfiBootServicesData, BlockIo->Media->BlockSize, &Mbr);
+ if (Mbr == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ Status = DiskIo->ReadDisk (
+ DiskIo,
+ BlockIo->Media->MediaId,
+ 0 * BlockIo->Media->BlockSize,
+ BlockIo->Media->BlockSize,
+ (UINT8 *)Mbr
+ );
+
+ for(Count=0; Count<MAX_MBR_PARTITIONS;Count++){
+ if(Mbr->Partition[Count].OSIndicator == 0xEE){//(i.e., GPT Protective)
+ LBAofGptHeader = *(Mbr->Partition[Count].StartingLBA);
+ break;
+ }
+ }
+
+ if(LBAofGptHeader == 0x00)//Did not find the correct GPTHeader so return EFI_NOT_FOUND
+ return EFI_NOT_FOUND;
+
+ //
+ // Read the EFI Partition Table Header
+ //
+ pBS->AllocatePool (EfiBootServicesData, BlockIo->Media->BlockSize, &PrimaryHeader);
+ if (PrimaryHeader == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ Status = DiskIo->ReadDisk (
+ DiskIo,
+ BlockIo->Media->MediaId,
+ LBAofGptHeader * BlockIo->Media->BlockSize,
+ BlockIo->Media->BlockSize,
+ (UINT8 *)PrimaryHeader);
+
+// if(PrimaryHeader->Header.Signature != EFI_GPT_HEADER_ID)//Check for "EFI PART" signature
+ if (MemCmp(EFI_GPT_HEADER_ID, &PrimaryHeader->Header.Signature, sizeof(UINT64))) return EFI_NOT_FOUND;
+
+ if (EFI_ERROR (Status)) {
+ TRACE ((TRACE_ALWAYS, "Failed to Read Partition Table Header!\n"));
+ pBS->FreePool (PrimaryHeader);
+ return EFI_DEVICE_ERROR;
+ }
+
+ //
+ // Read the partition entry.
+ //
+ pBS->AllocatePool (EfiBootServicesData, PrimaryHeader->NumberOfPartitionEntries * PrimaryHeader->SizeOfPartitionEntry, &EntryPtr);
+ if (EntryPtr == NULL) {
+ pBS->FreePool (PrimaryHeader);
+ return EFI_OUT_OF_RESOURCES;
+ }
+ Status = DiskIo->ReadDisk (
+ DiskIo,
+ BlockIo->Media->MediaId,
+ Mul64(PrimaryHeader->PartitionEntryLBA, BlockIo->Media->BlockSize),
+ PrimaryHeader->NumberOfPartitionEntries * PrimaryHeader->SizeOfPartitionEntry,
+ EntryPtr
+ );
+ if (EFI_ERROR (Status)) {
+ pBS->FreePool (PrimaryHeader);
+ pBS->FreePool (EntryPtr);
+ return EFI_DEVICE_ERROR;
+ }
+
+ //
+ // Count the valid partition
+ //
+ PartitionEntry = (EFI_PARTITION_ENTRY *)EntryPtr;
+ NumberOfPartition = 0;
+ for (Index = 0; Index < PrimaryHeader->NumberOfPartitionEntries; Index++) {
+ if (MemCmp (&PartitionEntry->PartitionTypeGUID, &ZeroGuid, sizeof(EFI_GUID))) {
+ NumberOfPartition++;
+ }
+ PartitionEntry++;
+ }
+
+ //
+ // Parepare Data for Measurement
+ //
+ EventSize = (UINT32)(sizeof (EFI_GPT_DATA) - sizeof (GptData->Partitions)
+ + NumberOfPartition * PrimaryHeader->SizeOfPartitionEntry);
+
+ pBS->AllocatePool (EfiBootServicesData, EventSize, &GptData);
+ if (GptData == NULL) {
+ pBS->FreePool (PrimaryHeader);
+ pBS->FreePool (EntryPtr);
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ MemSet(GptData, EventSize, 0);
+
+ TcgEvent.PCRIndex = 5;
+ TcgEvent.EventType = EV_EFI_GPT_EVENT;
+ TcgEvent.EventSize = EventSize;
+
+ Flags = 0;
+
+ //
+ // Copy the EFI_PARTITION_TABLE_HEADER and NumberOfPartition
+ //
+ pBS->CopyMem ((UINT8 *)GptData, (UINT8*)PrimaryHeader, sizeof (EFI_PARTITION_TABLE_HEADER));
+ GptData->NumberOfPartitions = NumberOfPartition;
+ //
+ // Copy the valid partition entry
+ //
+ PartitionEntry = (EFI_PARTITION_ENTRY*)EntryPtr;
+ NumberOfPartition = 0;
+ for (Index = 0; Index < PrimaryHeader->NumberOfPartitionEntries; Index++) {
+ if (MemCmp (&PartitionEntry->PartitionTypeGUID, &ZeroGuid, sizeof(EFI_GUID))) {
+ pBS->CopyMem (
+ (UINT8 *)&GptData->Partitions + NumberOfPartition * sizeof (EFI_PARTITION_ENTRY),
+ (UINT8 *)PartitionEntry,
+ sizeof (EFI_PARTITION_ENTRY)
+ );
+ NumberOfPartition++;
+ }
+ PartitionEntry++;
+ }
+
+ //
+ // Measure the GPT data
+ //
+ if(NumberOfPartition > 0)
+ {
+
+ Status = pBS->LocateProtocol(&gEfiAmiHLXEGuid, NULL, &InternalHLXE);
+ if(EFI_ERROR(Status))return Status;
+
+ InternalHLXE->InternalHashLogExtend((UINT8 *)GptData, 0, EventSize, &TcgEvent, (UINT8 *)GptData);
+
+ if (!EFI_ERROR (Status)) {
+ mMeasureGptCount++;
+ TRACE ((TRACE_ALWAYS, "\n GPT measurement successfull !!!\n"));
+ }
+ }
+
+ pBS->FreePool (PrimaryHeader);
+ pBS->FreePool (EntryPtr);
+ pBS->FreePool (GptData);
+ return Status;
+}
+
+
+
+
+
+EFI_STATUS
+EFIAPI
+MeasureGptTable ()
+{
+ EFI_STATUS Status;
+ EFI_HANDLE Handle;
+ EFI_HANDLE *HandleArray;
+ UINTN HandleArrayCount;
+ UINTN Index;
+ EFI_DEVICE_PATH_PROTOCOL *BlockIoDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+ TRACE ((TRACE_ALWAYS, "MeasureGptTable\n"));
+
+
+ Status = pBS->LocateHandleBuffer (ByProtocol, &gEfiBlockIoProtocolGuid, NULL, &HandleArrayCount, &HandleArray);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ for (Index=0; Index < HandleArrayCount; Index++) {
+ Status = pBS->HandleProtocol (HandleArray[Index], &gEfiDevicePathProtocolGuid, (VOID *) &BlockIoDevicePath);
+ if (EFI_ERROR (Status) || BlockIoDevicePath == NULL) {
+ continue;
+ }
+ for (DevicePath = BlockIoDevicePath; !IsDevicePathEnd (DevicePath); DevicePath = NextDevicePathNode (DevicePath)) {
+ if ((DevicePathType (DevicePath) == ACPI_DEVICE_PATH) && (DevicePathSubType (DevicePath) == ACPI_DP)) {
+ Status = pBS->LocateDevicePath (&gEfiBlockIoProtocolGuid, &DevicePath, &Handle);
+ if (!EFI_ERROR (Status)) {
+ Status = TcgMeasureGptTable (Handle);
+ if (!EFI_ERROR (Status)) {
+ //
+ // GPT partition check done.
+ //
+// mMeasureGptTableFlag = TRUE;
+ }
+ }
+ break;
+ }
+ }
+ }
+
+ return Status;
+}
+
+#if (defined(TCGMeasureSecureBootVariables) && (TCGMeasureSecureBootVariables != 0))
+EFI_STATUS
+MeasureSecureBootState(
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINT32 Attribute;
+ UINTN DataSize;
+ UINT8 *Variable;
+ UINT64 MaxStorSize;
+ UINT64 RemStorSize;
+ UINT64 MaxVarSize;
+ TCG_PCR_EVENT_HDR TcgEvent;
+ CHAR16 *VarName;
+ EFI_GUID VendorGuid;
+
+ Attribute = EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS;
+
+ TcgEvent.PCRIndex = 7;
+ TcgEvent.EventType = EV_EFI_VARIABLE_DRIVER_CONFIG;
+
+ // Query maximum size of the variable and allocate memory
+
+ Status = pRS->QueryVariableInfo(Attribute, &MaxStorSize, &RemStorSize, &MaxVarSize);
+ if (EFI_ERROR(Status)) {
+ return (Status);
+ }
+
+ DataSize = (UINTN)MaxStorSize;
+ pBS->AllocatePool(EfiBootServicesData, DataSize, &Variable);
+ if (Variable == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ MemSet(Variable, DataSize, 0); // Clear the buffer
+
+ // 1.Measure Secure Boot Variable Value
+
+ Status = pRS->GetVariable (
+ EFI_SECURE_BOOT_NAME,
+ &gEfiGlobalVariableGuid,
+ NULL,
+ &DataSize,
+ Variable
+ );
+
+ VarName = EFI_SECURE_BOOT_NAME;
+ VendorGuid = gEfiGlobalVariableGuid;
+
+ if(EFI_ERROR(Status) || *Variable == 0){
+ DataSize = 0;
+ *Variable = 0;
+ }
+
+
+ Status = MeasureVariable (
+ 7,
+ EV_EFI_VARIABLE_DRIVER_CONFIG,
+ VarName,
+ &VendorGuid,
+ Variable,
+ DataSize
+ );
+
+ // 2.Measure PK Variable Value
+
+ DataSize = (UINTN)MaxStorSize; // DataSize gets updated by GetVariable. So initialize everytime before the call
+ MemSet(Variable, DataSize, 0); // Clear the buffer
+
+ Status = pRS->GetVariable (
+ EFI_PLATFORM_KEY_NAME,
+ &gEfiGlobalVariableGuid,
+ NULL,
+ &DataSize,
+ Variable
+ );
+
+ VarName = EFI_PLATFORM_KEY_NAME;
+ VendorGuid = gEfiGlobalVariableGuid;
+
+ if(EFI_ERROR(Status)){
+ DataSize = 0;
+ *Variable = 0;
+ }
+
+ Status = MeasureVariable (
+ 7,
+ EV_EFI_VARIABLE_DRIVER_CONFIG,
+ VarName,
+ &VendorGuid,
+ Variable,
+ DataSize
+ );
+
+ // 3.Measure KEK Variable Value
+
+ DataSize = (UINTN)MaxStorSize; // DataSize gets updated by GetVariable. So initialize everytime before the call
+ MemSet(Variable, DataSize, 0); // Clear the buffer
+
+ Status = pRS->GetVariable (
+ EFI_KEY_EXCHANGE_KEY_NAME,
+ &gEfiGlobalVariableGuid,
+ NULL,
+ &DataSize,
+ Variable
+ );
+
+ VarName = EFI_KEY_EXCHANGE_KEY_NAME;
+ VendorGuid = gEfiGlobalVariableGuid;
+
+ if(EFI_ERROR(Status)){
+ DataSize = 0;
+ *Variable = 0;
+ }
+
+ Status = MeasureVariable (
+ 7,
+ EV_EFI_VARIABLE_DRIVER_CONFIG,
+ VarName,
+ &VendorGuid,
+ Variable,
+ DataSize
+ );
+
+ if(EFI_ERROR(Status)){
+ goto Exit;
+ }
+
+ // 4.Measure EFI_IMAGE_SECURITY_DATABASE Variable Value
+
+ DataSize = (UINTN)MaxStorSize; // DataSize gets updated by GetVariable. So initialize everytime before the call
+ MemSet(Variable, DataSize, 0); // Clear the buffer
+
+ Status = pRS->GetVariable (
+ EFI_IMAGE_SECURITY_DATABASE,
+ &gEfiImageSecurityDatabaseGuid,
+ NULL,
+ &DataSize,
+ Variable
+ );
+
+ VarName = EFI_IMAGE_SECURITY_DATABASE;
+ VendorGuid = gEfiImageSecurityDatabaseGuid;
+
+ if(EFI_ERROR(Status)){
+ DataSize = 0;
+ *Variable = 0;
+ }
+
+ Status = MeasureVariable (
+ 7,
+ EV_EFI_VARIABLE_DRIVER_CONFIG,
+ VarName,
+ &VendorGuid,
+ Variable,
+ DataSize
+ );
+
+ if(EFI_ERROR(Status)){
+ goto Exit;
+ }
+
+ // 5.Measure EFI_IMAGE_SECURITY_DATABASE1 Variable Value
+
+ DataSize = (UINTN)MaxStorSize; // DataSize gets updated by GetVariable. So initialize everytime before the call
+ MemSet(Variable, DataSize, 0); // Clear the buffer
+
+ Status = pRS->GetVariable (
+ EFI_IMAGE_SECURITY_DATABASE1,
+ &gEfiImageSecurityDatabaseGuid,
+ NULL,
+ &DataSize,
+ Variable
+ );
+
+ VarName = EFI_IMAGE_SECURITY_DATABASE1;
+ VendorGuid = gEfiImageSecurityDatabaseGuid;
+
+ if(EFI_ERROR(Status)){
+ DataSize = 0;
+ *Variable = 0;
+ }
+
+ Status = MeasureVariable (
+ 7,
+ EV_EFI_VARIABLE_DRIVER_CONFIG,
+ VarName,
+ &VendorGuid,
+ Variable,
+ DataSize
+ );
+
+ if(EFI_ERROR(Status)){
+ goto Exit;
+ }
+
+Exit:
+ pBS->FreePool(Variable);
+ return EFI_SUCCESS;
+}
+#endif
+
+
+EFI_STATUS ResetMorVariable()
+{
+ EFI_STATUS Status;
+ EFI_GUID MorGuid = MEMORY_ONLY_RESET_CONTROL_GUID;
+ UINT32 Attribs = EFI_VARIABLE_NON_VOLATILE
+ | EFI_VARIABLE_BOOTSERVICE_ACCESS;
+
+ UINT8 Temp = 0;
+ UINTN TempSize = sizeof (UINT8);
+
+
+
+ Status = pRS->GetVariable(
+ L"MemoryOverwriteRequestControl",
+ &MorGuid,
+ &Attribs,
+ &TempSize,
+ &Temp );
+
+ if ( EFI_ERROR( Status ) || (Temp&01) != 0 )
+ {
+ Temp &= 0xFE;
+ Status = pRS->SetVariable(
+ L"MemoryOverwriteRequestControl",
+ &MorGuid,
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS
+ | EFI_VARIABLE_RUNTIME_ACCESS,
+ sizeof (UINT8),
+ &Temp );
+ }
+
+ return Status;
+}
+
+EFI_STATUS
+InternalMeasureAction (
+ IN CHAR8 *ActionString
+ )
+{
+ return EFI_SUCCESS; //not supported
+}
+
+
+EFI_STATUS
+InternalMeasureGpt (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+
+ return EFI_SUCCESS; //not supported;
+}
+
+
+
+EFI_TCG_PLATFORM_PROTOCOL mTcgPlatformProtocol = {
+ TreeMeasurePeImage,
+ InternalMeasureAction,
+ InternalMeasureGpt
+};
+
+
+EFI_STATUS InstallTcgPlatformProtocol(
+ VOID
+)
+{
+
+ EFI_GUID gEfiTcgPrivateInterfaceGuid = EFI_TCG_PLATFORM_PROTOCOL_GUID;
+
+ return pBS->InstallProtocolInterface (
+ &PlatformProtocolHandle,
+ &gEfiTcgPrivateInterfaceGuid,
+ EFI_NATIVE_INTERFACE,
+ &mTcgPlatformProtocol
+ );
+
+}
+
+
+VOID
+EFIAPI
+Tpm20OnReadyToBoot (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+ UINT32 PcrIndex;
+ static BOOLEAN mBootAttempts=0;
+
+ if (mBootAttempts == 0) {
+
+ ResetMorVariable();
+ //
+ // Measure handoff tables
+ //
+ Status = MeasureHandoffTables ();
+ if (EFI_ERROR (Status)) {
+ TRACE ((TRACE_ALWAYS, "HandoffTables not measured.\n"));
+ }
+ else {
+ TRACE((TRACE_ALWAYS, "HandoffTables measured.\n"));
+ }
+
+ //
+ // Measure the fact that Secure Boot is disabled
+ //
+#if (defined(TCGMeasureSecureBootVariables) && (TCGMeasureSecureBootVariables != 0))
+ Status = MeasureSecureBootState();
+ if (EFI_ERROR (Status)) {
+ TRACE ((TRACE_ALWAYS, "Measuring secure boot state failed.\n"));
+ }
+ else {
+ TRACE((TRACE_ALWAYS, "Secure boot state measured.\n"));
+ }
+#endif
+
+
+ //
+ // This is the first boot attempt
+ //
+ Status = MeasureAction (
+ "EFI_CALLING_EFI_APPLICATION"
+ );
+ if (EFI_ERROR (Status)) {
+ TRACE ((TRACE_ALWAYS, "First boot attempt not Measured.\n"));
+ }
+ else {
+ TRACE((TRACE_ALWAYS, "First boot attempt measured.\n"));
+ }
+
+ //
+ // Draw a line between pre-boot env and entering post-boot env
+ //
+ for (PcrIndex = 0; PcrIndex < 8; PcrIndex++) {
+ Status = MeasureSeparatorEvent (PcrIndex);
+ if (EFI_ERROR (Status)) {
+ TRACE ((TRACE_ALWAYS, "Measuring separtator event failed.\n"));
+ }
+ else {
+ TRACE((TRACE_ALWAYS, "Separator event measured.\n"));
+ }
+
+ }
+
+ //
+ // Measure GPT
+ //
+ Status = MeasureGptTable ();
+ if (EFI_ERROR (Status)) {
+ TRACE ((TRACE_ALWAYS, "Measuring GPT failed.\n"));
+ }
+ else {
+ TRACE((TRACE_ALWAYS, "GPT measured.\n"));
+ }
+ }
+ else {
+ //
+ // Not first attempt, meaning a return from last attempt
+ //
+/*
+ Status = MeasureAction (
+ "EFI_RETURNING_FROM_EFI_APPLICATOIN"
+ );
+ if (EFI_ERROR (Status)) {
+ TRACE ((TRACE_ALWAYS, "Measuring additional boot attempt failed.\n"));
+ }
+*/
+ }
+ //
+ // Increase boot attempt counter.
+ //
+ mBootAttempts++;
+
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: GetStringFromToken
+//
+// Description: Gets a UNI string by Token
+//
+// Input: IN STRING_REF Token,
+// OUT CHAR16 **String
+//
+// Output: EFI_STATUS
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+EFI_STATUS GetStringFromToken(
+ IN STRING_REF Token,
+ OUT CHAR16 **String )
+{
+ EFI_STATUS Status;
+ UINTN StringBufferLength;
+ UINT16 *Temp;
+ UINTN Size = 0;
+
+
+ //
+ // Find the string based on the current language
+ //
+ StringBufferLength = 0x500;
+ Status = pBS->AllocatePool( EfiBootServicesData,
+ sizeof (CHAR16) * 0x500,
+ String );
+ Temp = *String;
+ while ( Temp < *String + StringBufferLength )
+ {
+ *Temp = 0x0;
+ Temp++;
+ }
+
+#if EFI_SPECIFICATION_VERSION>0x20000
+
+ Status = HiiLibGetString (
+ gHiiHandle,
+ Token,
+ &StringBufferLength,
+ *String
+ );
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+#else
+ if ( Hii == NULL )
+ {
+ return EFI_NOT_FOUND;
+ }
+
+ Status = Hii->GetString(
+ Hii,
+ gHiiHandle,
+ Token,
+ TRUE,
+ NULL,
+ &StringBufferLength,
+ *String
+ );
+#endif
+
+
+ if ( EFI_ERROR( Status ))
+ {
+ pBS->FreePool( *String );
+ return EFI_NOT_FOUND;
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+
+EFI_STATUS TcgSetVariableWithNewAttributes(
+ IN CHAR16 *Name, IN EFI_GUID *Guid, IN UINT32 Attributes,
+ IN UINTN DataSize, IN VOID *Data
+)
+{
+ EFI_STATUS Status;
+
+ Status = pRS->SetVariable(Name, Guid, Attributes, DataSize, Data);
+ if (!EFI_ERROR(Status) || Status != EFI_INVALID_PARAMETER) return Status;
+
+ Status = pRS->SetVariable(Name, Guid, 0, 0, NULL);
+ if (EFI_ERROR(Status)) return Status;
+
+ return pRS->SetVariable(Name, Guid, Attributes, DataSize, Data);
+}
+
+
+//****************************************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: write_PPI_result
+//
+// Description: Updates TCG PPI variable in NVRAM
+//
+//
+// Input: IN UINT8 last_op,
+// IN UINT16 status
+//
+// Output: VOID
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//****************************************************************************************
+void WritePpiResult(
+ IN UINT8 last_op,
+ IN UINT16 status )
+{
+ UINTN Size = sizeof(AMI_PPI_NV_VAR);
+ AMI_PPI_NV_VAR Temp;
+ EFI_STATUS Status;
+ UINT8 Manip = 0;
+
+ Status = pRS->GetVariable( L"AMITCGPPIVAR", \
+ &AmitcgefiOsVariableGuid, \
+ NULL, \
+ &Size, \
+ &Temp );
+
+ //now set variable to data
+ Temp.RQST = Manip;
+ Manip = (UINT8)( status & 0xFFFF );
+ Temp.ERROR = Manip;
+
+ if(status>0xFF && status<0xFFFF)
+ {
+ Temp.AmiMisc = (UINT8)(status >> 8);
+ }else{
+ Temp.AmiMisc = 0;
+ }
+
+ if ( EFI_ERROR( Status ))
+ {
+ TRACE((TRACE_ALWAYS, "Error Setting Return value\n"));
+ return;
+ }
+
+
+ Status = TcgSetVariableWithNewAttributes(L"AMITCGPPIVAR", &AmitcgefiOsVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE \
+ | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ Size, &Temp );
+
+}
+
+
+
+/**
+ Send ClearControl command to TPM2.
+
+ @param Disable if we need disable owner clear flag.
+
+ @retval EFI_SUCCESS Operation completed successfully.
+ @retval EFI_DEVICE_ERROR Unexpected device behavior.
+**/
+EFI_STATUS
+EFIAPI
+Tpm2ClearControl (
+ IN TPMI_YES_NO Disable
+ )
+{
+ EFI_STATUS Status;
+ TPM2_CLEAR_CONTROL_COMMAND Cmd;
+ TPM2_CLEAR_CONTROL_RESPONSE Res;
+ UINT32 ResultBufSize;
+ UINT32 CmdSize;
+ UINT32 RespSize;
+ UINT8 *Buffer;
+ UINT8 *AuthSizeOffset;
+
+ Cmd.Header.tag = (TPMI_ST_COMMAND_TAG)TPM_H2NS(TPM_ST_SESSIONS);
+ Cmd.Header.commandCode = TPM_H2NL(TPM_CC_ClearControl);
+ Cmd.Auth = TPM_H2NL(TPM_RH_PLATFORM);
+
+ Buffer = (UINT8 *)&Cmd.AuthorizationSize;
+
+ //
+ // Add in Auth session
+ //
+ AuthSizeOffset = Buffer;
+ *(UINT32 *)Buffer = 0;
+ Buffer += sizeof(UINT32);
+
+ // authHandle
+ *(UINT32 *)Buffer = TPM_H2NL(TPM_RS_PW);
+ Buffer += sizeof(UINT32);
+
+ // nonce = nullNonce
+ *(UINT16 *)Buffer = 0;
+ Buffer += sizeof(UINT16);
+
+ // sessionAttributes = 0
+ *(UINT8 *)Buffer = 0;
+ Buffer += sizeof(UINT8);
+
+ // auth = nullAuth
+ *(UINT16 *)Buffer = 0;
+ Buffer += sizeof(UINT16);
+
+ // authorizationSize
+ *(UINT32 *)AuthSizeOffset = TPM_H2NL((UINT32)(Buffer - AuthSizeOffset - sizeof(UINT32)));
+
+ // disable
+ *(UINT8 *)Buffer = Disable;
+ Buffer += sizeof(UINT8);
+
+ CmdSize = (UINT32)(Buffer - (UINT8 *)&Cmd);
+ Cmd.Header.paramSize = TPM_H2NL(CmdSize);
+
+ ResultBufSize = sizeof(Res);
+ Status = TrEEProtocolInstance->SubmitCommand(TrEEProtocolInstance,CmdSize,(UINT8 *)&Cmd , ResultBufSize , (UINT8 *)&Res);
+
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ if (ResultBufSize > sizeof(Res)) {
+ TRACE((TRACE_ALWAYS, "ClearControl: Failed ExecuteCommand: Buffer Too Small\r\n"));
+ Status = EFI_BUFFER_TOO_SMALL;
+ goto ClearControlEND;
+ }
+
+ //
+ // Validate response headers
+ //
+ RespSize = TPM_H2NL(Res.Header.paramSize);
+ if (RespSize > sizeof(Res)) {
+ TRACE((TRACE_ALWAYS, "ClearControl: Response size too large! %d\r\n", RespSize));
+ Status = EFI_BUFFER_TOO_SMALL;
+ goto ClearControlEND;
+ }
+
+ //
+ // Fail if command failed
+ //
+ if (TPM_H2NL(Res.Header.responseCode) != TPM_RC_SUCCESS) {
+ TRACE((TRACE_ALWAYS, "ClearControl: Response Code error! 0x%08x\r\n", TPM_H2NL(Res.Header.responseCode)));
+ Status = EFI_DEVICE_ERROR;
+ goto ClearControlEND;
+ }
+
+ //
+ // Unmarshal the response
+ //
+
+ // None
+
+ Status = EFI_SUCCESS;
+
+ClearControlEND:
+ return Status;
+}
+
+
+
+EFI_STATUS
+EFIAPI
+Tpm2Clear (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ TPM2_CLEAR_COMMAND Cmd;
+ TPM2_CLEAR_RESPONSE Res;
+ UINT32 ResultBufSize;
+ UINT32 CmdSize;
+ UINT32 RespSize;
+ UINT8 *Buffer;
+ UINT8 *AuthSizeOffset;
+
+ Cmd.Header.tag = (TPMI_ST_COMMAND_TAG)TPM_H2NS(TPM_ST_SESSIONS);
+ Cmd.Header.commandCode = TPM_H2NL(TPM_CC_Clear);
+ Cmd.Auth = TPM_H2NL(TPM_RH_PLATFORM);
+
+ Buffer = (UINT8 *)&Cmd.AuthorizationSize;
+
+ //
+ // Add in Auth session
+ //
+ AuthSizeOffset = Buffer;
+ *(UINT32 *)Buffer = 0;
+ Buffer += sizeof(UINT32);
+
+ // authHandle
+ *(UINT32 *)Buffer = TPM_H2NL(TPM_RS_PW);
+ Buffer += sizeof(UINT32);
+
+ // nonce = nullNonce
+ *(UINT16 *)Buffer = 0;
+ Buffer += sizeof(UINT16);
+
+ // sessionAttributes = 0
+ *(UINT8 *)Buffer = 0;
+ Buffer += sizeof(UINT8);
+
+ // auth = nullAuth
+ *(UINT16 *)Buffer = 0;
+ Buffer += sizeof(UINT16);
+
+ // authorizationSize
+ *(UINT32 *)AuthSizeOffset = TPM_H2NL((UINT32)(Buffer - AuthSizeOffset - sizeof(UINT32)));
+
+ CmdSize = (UINT32)(Buffer - (UINT8 *)&Cmd);
+ Cmd.Header.paramSize = TPM_H2NL(CmdSize);
+
+ ResultBufSize = sizeof(Res);
+
+ Status = TrEEProtocolInstance->SubmitCommand(TrEEProtocolInstance,CmdSize,(UINT8 *)&Cmd , ResultBufSize , (UINT8 *)&Res);
+ if (EFI_ERROR(Status)) {
+ return Status;
+ }
+
+ if (ResultBufSize > sizeof(Res)) {
+ TRACE((TRACE_ALWAYS, "Clear: Failed ExecuteCommand: Buffer Too Small\r\n"));
+ Status = EFI_BUFFER_TOO_SMALL;
+ goto ClearEND;
+ }
+
+ //
+ // Validate response headers
+ //
+ RespSize = TPM_H2NL(Res.Header.paramSize);
+ if (RespSize > sizeof(Res)) {
+ TRACE((TRACE_ALWAYS, "Clear: Response size too large! %d\r\n", RespSize));
+ Status = EFI_BUFFER_TOO_SMALL;
+ goto ClearEND;
+ }
+
+ //
+ // Fail if command failed
+ //
+ if (TPM_H2NL(Res.Header.responseCode) != TPM_RC_SUCCESS) {
+ TRACE((TRACE_ALWAYS, "Clear: Response Code error! 0x%08x\r\n", TPM_H2NL(Res.Header.responseCode)));
+ Status = EFI_DEVICE_ERROR;
+ goto ClearEND;
+ }
+
+ //
+ // Unmarshal the response
+ //
+
+ // None
+
+ Status = EFI_SUCCESS;
+
+ClearEND:
+ return Status;
+}
+
+
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure: read_PPI_request
+//
+// Description: Reads and returns TCG PPI requests Value
+//
+//
+// Input:
+//
+// Output: UINT8
+//
+// Modified:
+//
+// Referrals:
+//
+// Notes:
+//<AMI_PHDR_END>
+//**********************************************************************
+UINT8 ReadPpiRequest( )
+{
+ UINTN Size = sizeof(AMI_PPI_NV_VAR);
+ AMI_PPI_NV_VAR Temp;
+ EFI_STATUS Status;
+
+ Status = pRS->GetVariable( L"AMITCGPPIVAR", \
+ &AmitcgefiOsVariableGuid, \
+ NULL, \
+ &Size, \
+ &Temp );
+
+ if(Status == EFI_NOT_FOUND)
+ {
+ Temp.RQST = 0;
+ Temp.RCNT = 0;
+ Temp.ERROR = 0;
+ Temp.Flag = 0;
+ Temp.AmiMisc = 0;
+
+ Status = TcgSetVariableWithNewAttributes(L"AMITCGPPIVAR", &AmitcgefiOsVariableGuid, \
+ EFI_VARIABLE_NON_VOLATILE \
+ | EFI_VARIABLE_BOOTSERVICE_ACCESS,\
+ Size, &Temp );
+
+ }
+
+ return Temp.RQST;
+}
+
+
+
+void HandleTpm20Ppi(IN EFI_EVENT ev,
+ IN VOID *ctx)
+{
+ BOOLEAN UserAction;
+ UINT8 StringType = 0;
+ UINTN CurX, CurY;
+ CHAR16 *StrBuffer = NULL;
+ CHAR16 *String;
+ EFI_INPUT_KEY key;
+ TSE_POST_STATUS TsePostStatus;
+ EFI_STATUS Status;
+
+
+ TRACE((TRACE_ALWAYS, "HandleTpm20Ppi Entry \n"));
+ if (pAmiPostMgr == NULL) {
+ Status = pBS->LocateProtocol( &gAmiPostManagerProtocolGuid,
+ NULL,
+ &pAmiPostMgr );
+ if (EFI_ERROR(Status)) {
+ return;
+ }
+ }
+
+ //
+ // Calling GetPostStatus() to check current TSE_POST_STATUS
+ //
+ TsePostStatus = pAmiPostMgr->GetPostStatus();
+
+ if ( pST->ConIn == NULL || pST->ConOut == NULL || TsePostStatus == TSE_POST_STATUS_BEFORE_POST_SCREEN )
+ {
+ TRACE((TRACE_ALWAYS, "\tTextIn/Out not ready: in=%x; out=%x\n",
+ pST->ConIn, pST->ConOut));
+ return;
+ }
+
+ switch(PpiRequest){
+ case TPM20_PP_NO_ACTION_MAX:
+ return;
+
+ case TPM20_PP_CLEAR_CONTROL_CLEAR_2:
+ case TPM20_PP_CLEAR_CONTROL_CLEAR_3:
+ case TPM20_PP_CLEAR_CONTROL_CLEAR_4:
+ if(TpmNvflags.NoPpiClear != 1)
+ {
+ UserAction = TRUE;
+ StringType = 1;
+ break;
+ }
+ case TPM20_PP_SET_NO_PPI_CLEAR_FALSE:
+ UserAction = FALSE;
+ StringType = 0;
+ break;
+
+ case TPM20_PP_SET_NO_PPI_CLEAR_TRUE:
+ if(TpmNvflags.NoPpiClear != 1)
+ {
+ UserAction = TRUE;
+ StringType = 2;
+ break;
+ }
+
+ default:
+ if (PpiRequest <= TPM20_PP_NO_ACTION_MAX){
+ WritePpiResult( PpiRequest, (UINT16)(0));
+ }else{
+ WritePpiResult( PpiRequest, (UINT16)(TCPA_PPI_BIOSFAIL));
+ }
+ return;
+ }
+
+ if(UserAction)
+ {
+ pAmiPostMgr->SwitchToPostScreen( );
+
+ Status = pBS->AllocatePool(EfiBootServicesData,
+ sizeof (CHAR16) * 0x100,
+ (VOID*) &StrBuffer);
+
+ if ( EFI_ERROR( Status ) || StrBuffer == NULL )
+ {
+ return;
+ }
+
+ MemSet( StrBuffer, sizeof (CHAR16) * 0x100, 0 );
+
+ pAmiPostMgr->DisplayPostMessage( StrBuffer );
+
+ pAmiPostMgr->GetCurPos(&CurX, &CurY);
+
+ CurX = 0;
+ CurY -= PPI_DISPLAY_OFFSET;
+
+ if(StringType == 1){
+
+ GetStringFromToken( STRING_TOKEN(TPM_CLEAR_STR), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+ GetStringFromToken( STRING_TOKEN( TPM_WARNING_CLEAR ), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+ GetStringFromToken( STRING_TOKEN( TPM_CAUTION_KEY ), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+
+ }else if(StringType == 2){
+
+ GetStringFromToken( STRING_TOKEN(TPM_PPI_HEAD_STR), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+ GetStringFromToken( STRING_TOKEN( TPM_NOTE_CLEAR ), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+ GetStringFromToken( STRING_TOKEN( TPM_ACCEPT_KEY ), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+ }
+
+ GetStringFromToken( STRING_TOKEN( TPM_REJECT_KEY ), &String );
+ pAmiPostMgr->DisplayPostMessage( String );
+
+ if ( pST->ConIn )
+ {
+ while ( TRUE )
+ {
+ Status = pST->ConIn->ReadKeyStroke( pST->ConIn, &key );
+ if ( Status == EFI_SUCCESS )
+ {
+ if ( PpiRequest == TPM20_PP_CLEAR_CONTROL_CLEAR_2 ||
+ PpiRequest == TPM20_PP_CLEAR_CONTROL_CLEAR_3 ||
+ PpiRequest == TPM20_PP_CLEAR_CONTROL_CLEAR_4 )
+ {
+ if ( key.ScanCode == TCG_CLEAR_REQUEST_KEY )
+ {
+ break;
+ }
+ }
+ else if(PpiRequest == TPM20_PP_SET_NO_PPI_CLEAR_FALSE ||
+ PpiRequest == TPM20_PP_SET_NO_PPI_CLEAR_TRUE)
+ {
+
+ if ( key.ScanCode == TCG_CONFIGURATION_ACCEPT_KEY )
+ {
+ break;
+ }
+ }
+ else if ( key.ScanCode == TCG_CONFIGURATION_IGNORE_KEY )
+ {
+ return;
+ }
+ }
+ }
+ }
+
+ }
+
+ if ( PpiRequest == TPM20_PP_CLEAR_CONTROL_CLEAR_2 ||
+ PpiRequest == TPM20_PP_CLEAR_CONTROL_CLEAR_3 ||
+ PpiRequest == TPM20_PP_CLEAR_CONTROL_CLEAR_4 )
+ {
+ Status = Tpm2ClearControl(0);
+ if(!EFI_ERROR(Status)){
+
+ Status = Tpm2Clear();
+ if(EFI_ERROR(Status)){
+ TRACE((TRACE_ALWAYS, "Error Clearing TPM20 device\n"));
+ WritePpiResult( PpiRequest, (UINT16)(TCPA_PPI_BIOSFAIL));
+ }else{
+ WritePpiResult( PpiRequest, (UINT16)(0));
+ }
+ }else{
+ TRACE((TRACE_ALWAYS, "Tpm2ClearControl failure\n"));
+ WritePpiResult( PpiRequest, (UINT16)(TCPA_PPI_BIOSFAIL));
+ }
+ }
+ else if(PpiRequest == TPM20_PP_SET_NO_PPI_CLEAR_FALSE ||
+ PpiRequest == TPM20_PP_SET_NO_PPI_CLEAR_TRUE)
+ {
+ if(PpiRequest == TPM20_PP_SET_NO_PPI_CLEAR_FALSE)
+ {
+ TpmNvflags.NoPpiClear = 0;
+
+ }else{
+ TpmNvflags.NoPpiClear = 1;
+ }
+
+ Status = TcgSetVariableWithNewAttributes(L"TPMPERBIOSFLAGS", &FlagsStatusguid, \
+ EFI_VARIABLE_NON_VOLATILE \
+ | EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ sizeof (PERSISTENT_BIOS_TPM_FLAGS), &TpmNvflags);
+
+ if(EFI_ERROR(Status)){
+ TRACE((TRACE_ALWAYS, "Error Clearing TPM20 device\n"));
+ WritePpiResult( PpiRequest, (UINT16)(TCPA_PPI_BIOSFAIL));
+ }
+ else{
+ WritePpiResult( PpiRequest, (UINT16)(0));
+ }
+ }else{
+ WritePpiResult( PpiRequest, (UINT16)(0));
+ }
+
+ TRACE((TRACE_ALWAYS, "TPM20 changes made reseting system\n"));
+ pRS->ResetSystem (EfiResetCold, EFI_SUCCESS, 0, NULL);
+}
+
+VOID
+EFIAPI
+Tpm20OnExitBootServices (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+
+ //
+ // Measure invocation of ExitBootServices,
+ //
+ Status = MeasureAction (
+ "Exit Boot Services Invocation");
+
+ //
+ // Measure success of ExitBootServices
+ //
+ Status = MeasureAction (
+ "Exit Boot Services Returned with Success");
+}
+
+
+
+EFI_STATUS
+Tpm20PlatformEntry(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable )
+{
+ EFI_STATUS Status;
+ EFI_GUID gEfiTrEEProtocolGuid = EFI_TREE_PROTOCOL_GUID;
+ EFI_EVENT ReadyToBootEvent;
+ EFI_EVENT ev;
+ EFI_EVENT ExitBSEvent;
+ static VOID *reg;
+ UINTN Size = sizeof(PERSISTENT_BIOS_TPM_FLAGS);
+
+
+ InitAmiLib( ImageHandle, SystemTable );
+
+ TRACE((TRACE_ALWAYS, "Tpm20PlatformEntry\n"));
+
+ Status = pBS->LocateProtocol(&gEfiTrEEProtocolGuid, NULL, &TrEEProtocolInstance);
+ if(EFI_ERROR(Status))return Status;
+
+ Status = InstallTcgPlatformProtocol();
+ if(EFI_ERROR(Status))return Status;
+
+ //we found TrEE protocol do Tpm20
+ //Initializations set ready to boot callback
+ //install platform protocol
+
+ Status = CreateReadyToBootEvent(TPL_CALLBACK,
+ Tpm20OnReadyToBoot,
+ NULL,
+ &ReadyToBootEvent);
+
+ Status = pBS->CreateEvent (
+ EVT_SIGNAL_EXIT_BOOT_SERVICES,
+ EFI_TPL_NOTIFY,
+ Tpm20OnExitBootServices,
+ NULL,
+ &ExitBSEvent
+ );
+ LoadStrings( ImageHandle, &gHiiHandle );
+
+ Status = pRS->GetVariable( L"TPMPERBIOSFLAGS", \
+ &FlagsStatusguid, \
+ NULL, \
+ &Size, \
+ &TpmNvflags );
+
+ if(EFI_ERROR(Status))
+ {
+ TpmNvflags.NoPpiProvision = 1;
+ TpmNvflags.NoPpiClear = 0;
+ TpmNvflags.NoPpiMaintenance = 0;
+
+ Status = TcgSetVariableWithNewAttributes(L"TPMPERBIOSFLAGS", &FlagsStatusguid, \
+ EFI_VARIABLE_NON_VOLATILE \
+ | EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ sizeof (PERSISTENT_BIOS_TPM_FLAGS), &TpmNvflags);
+
+ if(EFI_ERROR(Status))return Status;
+ }
+
+ PpiRequest = ReadPpiRequest();
+ PpiRequest &= 0xFF;
+
+ if(PpiRequest > 0 && PpiRequest <= TCPA_PPIOP_ENABLE_ACTV_CLEAR_ENABLE_ACTV){
+
+ Status = pBS->CreateEvent( EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ HandleTpm20Ppi,
+ 0,
+ &ev );
+
+ if(EFI_ERROR(Status)){
+ return Status;
+ }
+
+ Status = pBS->RegisterProtocolNotify(
+ &gBdsAllDriversConnectedProtocolGuid,
+ ev,
+ &reg );
+ if(EFI_ERROR(Status)) {
+ return Status;
+ }
+ }
+
+ return Status;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/Tpm20PlatformDxe.cif b/Board/EM/TCG2/Common/Tpm20PlatformDxe.cif
new file mode 100644
index 0000000..4727bfc
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20PlatformDxe.cif
@@ -0,0 +1,17 @@
+<component>
+ name = "Tpm20PlatformDxe"
+ category = ModulePart
+ LocalRoot = "Board\EM\TCG2\Common"
+ RefName = "Tpm20PlatformDxe"
+[files]
+"Tpm20PlatformDxe.sdl"
+"Tpm20PlatformDxe.mak"
+"Tpm20PlatformDxe.c"
+"Tpm20PlatformDxe.h"
+"Tpm20PlatformDxe.dxs"
+"Tpm20PlatformDxeLib.h"
+"Tpm20PlatformDxeLib.c"
+"Tpm20PlatformDxeString.uni"
+[parts]
+"Tpm20Acpi"
+<endComponent>
diff --git a/Board/EM/TCG2/Common/Tpm20PlatformDxe.dxs b/Board/EM/TCG2/Common/Tpm20PlatformDxe.dxs
new file mode 100644
index 0000000..51aaaae
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20PlatformDxe.dxs
@@ -0,0 +1,77 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20PlatformDxe.dxs 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20PlatformDxe.dxs $
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 1 10/08/13 12:06p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:58p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 3 7/25/11 3:44a Fredericko
+// [TAG] EIP65177
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Tcg Ppi Spec ver 1.2 update
+//
+// 2 3/29/11 2:27p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiTcgPlatformDxe.dxs
+//
+// Description: Dependency file for AmiTcgPlatformDxe
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include <Tpm20Includes\TrEEProtocol.h>
+#include <Token.h>
+
+DEPENDENCY_START
+ EFI_TREE_PROTOCOL_GUID
+DEPENDENCY_END
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/TCG2/Common/Tpm20PlatformDxe.h b/Board/EM/TCG2/Common/Tpm20PlatformDxe.h
new file mode 100644
index 0000000..ea43a76
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20PlatformDxe.h
@@ -0,0 +1,459 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20PlatformDxe.h 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20PlatformDxe.h $
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 1 10/08/13 12:06p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 3 8/30/13 11:04p Fredericko
+//
+// 2 7/11/13 6:17p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20).
+//
+// 1 7/10/13 5:58p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 11 1/20/12 9:20p Fredericko
+//
+// 10 12/30/11 5:06p Fredericko
+// [TAG] EIP78141
+// [Category] New Feature
+// [Description] Added hooks to override generic TPM platform hash
+// functions.
+// [Files] 1. AmiTcgPlatform.sdl
+// 2. AmiTcgPlatformPei.h
+// 3. AmiTcgPlatformPeiLib.c
+// 4. AmiTcgPlatformPeiAfterMem.c
+// 5. AmiTcgPlatformDxe.c
+// 6. AmiTcgPlatformDxe.h
+//
+// 9 11/28/11 7:31p Fredericko
+// [TAG] EIP63922
+// [Category] Improvement
+// [Description] Support for Smbios label 30 and up. Callback on
+// publishing of Smbios tables
+// [Files] AmiTcgPlatformDxe.c
+//
+// 8 10/10/11 11:36a Fredericko
+// [TAG] EIP70220
+// [Category] Improvement
+// [Description] Remove dependency on CSM
+// [Files] TcgLegacy.sdl
+// AmiTcgPlatformDxe.c
+// AmiTcgPlatformDxe.h
+// xTcgDxe.c
+//
+// 7 10/10/11 12:12a Fredericko
+// [TAG] EIP70220
+// [Category] Improvement
+// [Description] Remove dependency on CSM
+// [Files] TcgLegacy.sdl
+// AmiTcgPlatformDxe.c
+// AmiTcgPlatformDxe.h
+// xTcgDxe.c
+//
+// 6 7/25/11 3:43a Fredericko
+// [TAG] EIP65177
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Tcg Ppi Spec ver 1.2 update
+//
+// 5 4/28/11 6:34p Fredericko
+// Removed VFR compile
+//
+// 4 4/26/11 1:54p Fredericko
+// Added support for function level override of specific functions. GUID
+// definitions added
+//
+// 3 4/06/11 10:40a Fredericko
+// Core 4.6.5.0 build error changes
+//
+// 2 3/29/11 2:27p Fredericko
+// [TAG] EIP 54642
+// [Category] Improvement
+// [Description] 1. Checkin Files related to TCG function override
+// 2. Include TCM and TPM auto detection
+// [Files] Affects all TCG files
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiTcgPlatformDxe.h
+//
+// Description: Header file for AmiTcgPlatformDxe
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include <efi.h>
+#include <TcgMisc.h>
+#include <Token.h>
+#include <AmiDxeLib.h>
+#include <Tpm20Includes\TrEEProtocol.h>
+#include "protocol\TpmDevice\TpmDevice.h"
+#include <Tpm20Includes\Tpm20.h>
+
+//--------------------------------------------------------------------------
+//GUID Definitions
+//--------------------------------------------------------------------------
+#define EFI_SMBIOS_TABLE_GUID \
+ { \
+ 0xeb9d2d31, 0x2d88, 0x11d3, 0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d \
+ }
+
+
+#define EFI_DP_TYPE_MASK 0x7F
+#define EFI_DP_TYPE_UNPACKED 0x80
+#define END_INSTANCE_DEVICE_PATH_SUBTYPE 0x01
+#define END_DEVICE_PATH_TYPE 0x7F
+#define END_ENTIRE_DEVICE_PATH_SUBTYPE 0xFF
+
+#define DP_IS_END_TYPE(a)
+#define DP_IS_END_SUBTYPE(a) ( ((a)->SubType == END_ENTIRE_DEVICE_PATH_SUBTYPE )
+
+#define DevicePathType(a) ( ((a)->Type) & EFI_DP_TYPE_MASK )
+#define DevicePathSubType(a) ( (a)->SubType )
+#define DevicePathNodeLength(a) ( ((a)->Length[0]) | ((a)->Length[1] << 8) )
+
+#define IsDevicePathEndType(a) ( DevicePathType(a) == END_DEVICE_PATH_TYPE )
+#define IsDevicePathEndSubType(a) ( (a)->SubType == END_ENTIRE_DEVICE_PATH_SUBTYPE )
+#define IsDevicePathEnd(a) ( IsDevicePathEndType(a) && IsDevicePathEndSubType(a) )
+#define NextDevicePathNode(a) ( (EFI_DEVICE_PATH_PROTOCOL *) ( ((UINT8 *) (a)) + DevicePathNodeLength(a)))
+
+
+#define MBR_SIGNATURE 0xaa55
+
+#define EXTENDED_DOS_PARTITION 0x05
+#define EXTENDED_WINDOWS_PARTITION 0x0F
+
+#define MAX_MBR_PARTITIONS 4
+
+#define PMBR_GPT_PARTITION 0xEE
+#define EFI_PARTITION 0xEF
+
+#define MBR_SIZE 512
+
+
+//---------------------------------------------------------------------------
+// Structure Definitions
+//---------------------------------------------------------------------------
+#pragma pack(push, 1)
+
+//
+// ------------------------------------------------------------------
+// Name: Data_Structures
+//
+// Description:
+// Data Structures needed for MBR
+//
+// MASTER_BOOT_RECORD - Data Structure definition of the
+// MBR located in the first block on an MBR drive
+//
+// MBR_PARTITION - Data Structure definition for each
+// partition in the MBR
+//
+// ------------------------------------------------------------------
+//
+#pragma pack(1)
+
+///
+/// Data Structure definition for each partition in the MBR
+///
+typedef struct _MBR_PARTITION {
+ UINT8 BootIndicator;
+ UINT8 StartHead;
+ UINT8 StartSector;
+ UINT8 StartTrack;
+ UINT8 OSIndicator;
+ UINT8 EndHead;
+ UINT8 EndSector;
+ UINT8 EndTrack;
+ UINT8 StartingLBA[4];
+ UINT8 SizeInLBA[4];
+} MBR_PARTITION_RECORD;
+
+///
+/// Data Structure definition of the MBR located in the first block on an MBR drive
+///
+typedef struct _MASTER_BOOT_RECORD {
+ UINT8 BootStrapCode[440];
+ UINT8 UniqueMbrSignature[4];
+ UINT8 Unknown[2];
+ MBR_PARTITION_RECORD Partition[MAX_MBR_PARTITIONS];
+ UINT16 Signature;
+} MASTER_BOOT_RECORD;
+
+
+#define EFI_GPT_HEADER_ID "EFI PART"
+
+
+typedef struct
+{
+ EFI_TABLE_HEADER Header;
+ EFI_LBA MyLba;
+ EFI_LBA AlternateLba;
+ EFI_LBA FirstUsableLba;
+ EFI_LBA LastUsableLba;
+ EFI_GUID DiskGuid;
+ EFI_LBA PartitionEntryLba;
+ UINT32 NumberOfPartitionEntries;
+ UINT32 SizeOfPartitionEntry;
+ UINT32 Crc32;
+} GPT_HEADER;
+
+
+///
+/// GPT Partition Table Header.
+///
+typedef struct {
+ ///
+ /// The table header for the GPT partition Table.
+ /// This header contains EFI_PTAB_HEADER_ID.
+ ///
+ EFI_TABLE_HEADER Header;
+ ///
+ /// The LBA that contains this data structure.
+ ///
+ EFI_LBA MyLBA;
+ ///
+ /// LBA address of the alternate GUID Partition Table Header.
+ ///
+ EFI_LBA AlternateLBA;
+ ///
+ /// The first usable logical block that may be used
+ /// by a partition described by a GUID Partition Entry.
+ ///
+ EFI_LBA FirstUsableLBA;
+ ///
+ /// The last usable logical block that may be used
+ /// by a partition described by a GUID Partition Entry.
+ ///
+ EFI_LBA LastUsableLBA;
+ ///
+ /// GUID that can be used to uniquely identify the disk.
+ ///
+ EFI_GUID DiskGUID;
+ ///
+ /// The starting LBA of the GUID Partition Entry array.
+ ///
+ EFI_LBA PartitionEntryLBA;
+ ///
+ /// The number of Partition Entries in the GUID Partition Entry array.
+ ///
+ UINT32 NumberOfPartitionEntries;
+ ///
+ /// The size, in bytes, of each the GUID Partition
+ /// Entry structures in the GUID Partition Entry
+ /// array. This field shall be set to a value of 128 x 2^n where n is
+ /// an integer greater than or equal to zero (e.g., 128, 256, 512, etc.).
+ ///
+ UINT32 SizeOfPartitionEntry;
+ ///
+ /// The CRC32 of the GUID Partition Entry array.
+ /// Starts at PartitionEntryLBA and is
+ /// computed over a byte length of
+ /// NumberOfPartitionEntries * SizeOfPartitionEntry.
+ ///
+ UINT32 PartitionEntryArrayCRC32;
+} EFI_PARTITION_TABLE_HEADER;
+
+///
+/// GPT Partition Entry.
+///
+typedef struct {
+ ///
+ /// Unique ID that defines the purpose and type of this Partition. A value of
+ /// zero defines that this partition entry is not being used.
+ ///
+ EFI_GUID PartitionTypeGUID;
+ ///
+ /// GUID that is unique for every partition entry. Every partition ever
+ /// created will have a unique GUID.
+ /// This GUID must be assigned when the GUID Partition Entry is created.
+ ///
+ EFI_GUID UniquePartitionGUID;
+ ///
+ /// Starting LBA of the partition defined by this entry
+ ///
+ EFI_LBA StartingLBA;
+ ///
+ /// Ending LBA of the partition defined by this entry.
+ ///
+ EFI_LBA EndingLBA;
+ ///
+ /// Attribute bits, all bits reserved by UEFI
+ /// Bit 0: If this bit is set, the partition is required for the platform to function. The owner/creator of the
+ /// partition indicates that deletion or modification of the contents can result in loss of platform
+ /// features or failure for the platform to boot or operate. The system cannot function normally if
+ /// this partition is removed, and it should be considered part of the hardware of the system.
+ /// Actions such as running diagnostics, system recovery, or even OS install or boot, could
+ /// potentially stop working if this partition is removed. Unless OS software or firmware
+ /// recognizes this partition, it should never be removed or modified as the UEFI firmware or
+ /// platform hardware may become non-functional.
+ /// Bit 1: If this bit is set, then firmware must not produce an EFI_BLOCK_IO_PROTOCOL device for
+ /// this partition. By not producing an EFI_BLOCK_IO_PROTOCOL partition, file system
+ /// mappings will not be created for this partition in UEFI.
+ /// Bit 2: This bit is set aside to let systems with traditional PC-AT BIOS firmware implementations
+ /// inform certain limited, special-purpose software running on these systems that a GPT
+ /// partition may be bootable. The UEFI boot manager must ignore this bit when selecting
+ /// a UEFI-compliant application, e.g., an OS loader.
+ /// Bits 3-47: Undefined and must be zero. Reserved for expansion by future versions of the UEFI
+ /// specification.
+ /// Bits 48-63: Reserved for GUID specific use. The use of these bits will vary depending on the
+ /// PartitionTypeGUID. Only the owner of the PartitionTypeGUID is allowed
+ /// to modify these bits. They must be preserved if Bits 0-47 are modified..
+ ///
+ UINT64 Attributes;
+ ///
+ /// Null-terminated name of the partition.
+ ///
+ CHAR16 PartitionName[36];
+} EFI_PARTITION_ENTRY;
+
+
+
+
+typedef struct tdEFI_GPT_DATA {
+ EFI_PARTITION_TABLE_HEADER EfiPartitionHeader;
+ UINTN NumberOfPartitions;
+ EFI_PARTITION_ENTRY Partitions[1];
+} EFI_GPT_DATA;
+
+#define TPM20_PP_NO_ACTION 0
+#define TPM20_PP_CLEAR_CONTROL_CLEAR 5
+#define TPM20_PP_CLEAR_CONTROL_CLEAR_2 14
+#define TPM20_PP_SET_NO_PPI_CLEAR_FALSE 17
+#define TPM20_PP_SET_NO_PPI_CLEAR_TRUE 18
+#define TPM20_PP_CLEAR_CONTROL_CLEAR_3 21
+#define TPM20_PP_CLEAR_CONTROL_CLEAR_4 22
+
+#define TPM20_PP_NO_ACTION_MAX 20
+
+
+typedef UINT8 TPMI_YES_NO;
+typedef UINT32 ClearControl_In;
+typedef UINT32 Clear_In;
+
+#pragma pack(push, 1)
+
+typedef struct {
+ TPM_ST tag;
+ UINT32 paramSize;
+ TPM_CC commandCode;
+} INT_TPM2_COMMAND_HEADER;
+
+typedef struct {
+ TPM_ST tag;
+ UINT32 paramSize;
+ TPM_RC responseCode;
+} INT_TPM2_RESPONSE_HEADER;
+
+typedef struct {
+ INT_TPM2_COMMAND_HEADER Header;
+ TPMI_RH_CLEAR Auth;
+ UINT32 AuthorizationSize;
+ TPMS_AUTH_SESSION_COMMAND PwapAuth;
+ TPMI_YES_NO Disable;
+} TPM2_CLEAR_CONTROL_COMMAND;
+
+typedef struct {
+ INT_TPM2_RESPONSE_HEADER Header;
+ UINT32 ParameterSize;
+ TPMS_AUTH_SESSION_COMMAND PwapAuthSeq;
+} TPM2_CLEAR_CONTROL_RESPONSE;
+
+typedef struct {
+ INT_TPM2_COMMAND_HEADER Header;
+ TPMI_RH_CLEAR Auth;
+ UINT32 AuthorizationSize;
+ TPMS_AUTH_SESSION_COMMAND PwapAuth;
+} TPM2_CLEAR_COMMAND;
+
+typedef struct {
+ INT_TPM2_RESPONSE_HEADER Header;
+ UINT32 ParameterSize;
+ TPMS_AUTH_SESSION_COMMAND PwapAuthSeq;
+} TPM2_CLEAR_RESPONSE;
+
+
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TCG_MEASURE_PE_IMAGE) (
+ IN BOOLEAN BootPolicy,
+ IN EFI_PHYSICAL_ADDRESS ImageAddress,
+ IN UINTN ImageSize,
+ IN UINTN LinkTimeBase,
+ IN UINT16 ImageType,
+ IN EFI_HANDLE DeviceHandle,
+ IN EFI_DEVICE_PATH_PROTOCOL *FilePath
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TCG_MEASURE_ACTION) (
+ IN CHAR8 *ActionString
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TCG_MEASURE_GPT_TABLE) (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ );
+
+typedef struct _EFI_TCG_PLATFORM_PROTOCOL {
+ EFI_TCG_MEASURE_PE_IMAGE MeasurePeImage;
+ EFI_TCG_MEASURE_ACTION MeasureAction;
+ EFI_TCG_MEASURE_GPT_TABLE MeasureGptTable;
+} EFI_TCG_PLATFORM_PROTOCOL;
+
+#define EFI_TCG_PLATFORM_PROTOCOL_GUID \
+ { 0x8c4c9a41, 0xbf56, 0x4627, 0x9e, 0xa, 0xc8, 0x38, 0x6d, 0x66, 0x11, 0x5c }
+
+
+#pragma pack(pop)
+#pragma pack(pop)
+
+//**********************************************************************
+// Function Declarations
+//**********************************************************************
+
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/Tpm20PlatformDxe.mak b/Board/EM/TCG2/Common/Tpm20PlatformDxe.mak
new file mode 100644
index 0000000..34a7498
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20PlatformDxe.mak
@@ -0,0 +1,104 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20PlatformDxe.mak 2 4/25/14 4:44p Fredericko $
+#
+# $Revision: 2 $
+#
+# $Date: 4/25/14 4:44p $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20PlatformDxe.mak $
+#
+# 2 4/25/14 4:44p Fredericko
+# when secureboot is disabled
+#
+# 1 4/21/14 2:18p Fredericko
+#
+# 1 10/08/13 12:06p Fredericko
+# Initial Check-In for Tpm-Next module
+#
+# 2 7/11/13 6:16p Fredericko
+# [TAG] EIP120969
+# [Category] New Feature
+# [Description] TCG (TPM20).
+#
+# 1 7/10/13 5:57p Fredericko
+# [TAG] EIP120969
+# [Category] New Feature
+# [Description] TCG (TPM20)
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name:
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#************************************************************************
+all : Tpm20PlatformDxe
+
+Tpm20PlatformDxe : $(BUILD_DIR)\Tpm20PlatformDxe.mak Tpm20PlatformDxeBin
+
+$(BUILD_DIR)\Tpm20PlatformDxe.mak : $(TPM_20_PLATFORM_DXE_DIR)\$(@B).cif $(TPM_20_PLATFORM_DXE_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(TPM_20_PLATFORM_DXE_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+Tpm20PlatformFlags=$(CFLAGS) \
+ /I$(TCG_DIR)\
+ /I$(TPM12_DIR)\
+ /I$(CORE_DIR)\
+ /I$(TCG_DIR)\Common\
+ /I$(PROJECT_DIR)\Include\Protocol\
+ /I$(TCG_DIR)\Protocol\
+ /I$(TcgPlatformSetupPolicy_DIR)\
+!IF "$(SecureBoot_SUPPORT)" == "1"
+ /I$(ImageVerificationLib_DIR)\
+!ENDIF
+
+TCG20PLTFM_OBJECTS = \
+$(BUILD_DIR)\$(TPM_20_PLATFORM_DXE_DIR)\Tpm20PlatformDxe.obj \
+
+#---------------------------------------------------------------------------
+# Making AmiTcgPlatformDxe
+#---------------------------------------------------------------------------
+
+Tpm20PlatformDxeBin : $(AMIDXELIB) $(SHALIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\Tpm20PlatformDxe.mak all\
+ "CFLAGS=$(Tpm20PlatformFlags)"\
+ "CPFLAGS=$(Tpm20PlatformFlags)"\
+ GUID=0718AD81-F26A-4850-A6EC-F268E309D707 \
+ ENTRY_POINT=Tpm20PlatformEntry \
+ TYPE=BS_DRIVER \
+ "OBJECTS=$(TCG20PLTFM_OBJECTS)"\
+ DEPEX1=$(TPM_20_PLATFORM_DXE_DIR)\Tpm20PlatformDxe.dxs \
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ COMPRESS=1 HAS_RESOURCES=1\
+ "STRGATHER_FLAGS=-db $(BUILD_DIR)\$(TPM_20_PLATFORM_DXE_DIR)\Tpm20PlatformDxeString.sdb"\
+#---------------------------------------------------------------------------
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/TCG2/Common/Tpm20PlatformDxe.sdl b/Board/EM/TCG2/Common/Tpm20PlatformDxe.sdl
new file mode 100644
index 0000000..e510add
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20PlatformDxe.sdl
@@ -0,0 +1,27 @@
+TOKEN
+ Name = "Tpm20PlatformSupport"
+ Value = "1"
+ Help = "Enable or Disable TCG_generic support"
+ TokenType = Boolean
+ TargetH = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Token = "TPM20Enabled" "!=" "0"
+End
+
+
+PATH
+ Name = "TPM_20_PLATFORM_DXE_DIR"
+End
+
+MODULE
+ Help = ""
+ File = "Tpm20PlatformDxe.mak"
+End
+
+
+ELINK
+ Name = "$(BUILD_DIR)\Tpm20PlatformDxe.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
diff --git a/Board/EM/TCG2/Common/Tpm20PlatformDxeLib.c b/Board/EM/TCG2/Common/Tpm20PlatformDxeLib.c
new file mode 100644
index 0000000..be62875
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20PlatformDxeLib.c
@@ -0,0 +1,57 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20PlatformDxeLib.c 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20PlatformDxeLib.c $
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 1 10/08/13 12:06p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 1 7/10/13 5:58p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+//
+//*************************************************************************
+//
+// Name:
+//
+// Description:
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/TCG2/Common/Tpm20PlatformDxeLib.h b/Board/EM/TCG2/Common/Tpm20PlatformDxeLib.h
new file mode 100644
index 0000000..2e086db
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20PlatformDxeLib.h
@@ -0,0 +1,73 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20PlatformDxeLib.h 1 4/21/14 2:18p Fredericko $
+//
+// $Revision: 1 $
+//
+// $Date: 4/21/14 2:18p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/TCG2/Common/Tpm20PlatformDxe/Tpm20PlatformDxeLib.h $
+//
+// 1 4/21/14 2:18p Fredericko
+//
+// 1 10/08/13 12:06p Fredericko
+// Initial Check-In for Tpm-Next module
+//
+// 2 7/11/13 6:17p Fredericko
+//
+// 1 7/10/13 5:58p Fredericko
+// [TAG] EIP120969
+// [Category] New Feature
+// [Description] TCG (TPM20)
+//
+// 4 7/25/11 3:45a Fredericko
+// [TAG] EIP65177
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Tcg Ppi Spec ver 1.2 update
+//
+// 3 4/28/11 6:34p Fredericko
+// Removed VFR compile
+//
+// 2 3/29/11 2:27p Fredericko
+//
+//
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: AmiTcgPlatformDxeLib.h
+//
+// Description: Header firl for AmiTcgPlatformDxe library
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/TCG2/Common/Tpm20PlatformDxeString.uni b/Board/EM/TCG2/Common/Tpm20PlatformDxeString.uni
new file mode 100644
index 0000000..a346596
--- /dev/null
+++ b/Board/EM/TCG2/Common/Tpm20PlatformDxeString.uni
Binary files differ
diff --git a/Board/EM/Thunderbolt/ReleaseNotes.chm b/Board/EM/Thunderbolt/ReleaseNotes.chm
new file mode 100644
index 0000000..4330c0a
--- /dev/null
+++ b/Board/EM/Thunderbolt/ReleaseNotes.chm
Binary files differ
diff --git a/Board/EM/Thunderbolt/TbtDxe/TbtDxe.c b/Board/EM/Thunderbolt/TbtDxe/TbtDxe.c
new file mode 100644
index 0000000..a1ec300
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtDxe/TbtDxe.c
@@ -0,0 +1,652 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtDxe/TbtDxe.c 10 5/19/14 7:32a Barretlin $
+//
+// $Revision: 10 $
+//
+// $Date: 5/19/14 7:32a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtDxe/TbtDxe.c $
+//
+// 10 5/19/14 7:32a Barretlin
+// [TAG] EIP165410
+// [Category] New Feature
+// [Description] Support Thunderbolt AIC at NB PCIE slot
+// [Files] TbtPei.c TbtDxe.c TbtGpe.asl TbtSmm.c TbtOemBoard.c
+// TbtOemLib.c TbtOemLib.h TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+// TbtSetupReset.c
+//
+// 9 5/19/14 7:11a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Using setup item choose return value of _RMV method in
+// ASL code
+// [Files] TbtDxe.c TbtGpe.asl TbtOemBoard.c TbtOemBoard.h TbtSetup.sd
+// TbtSetup.sdl TbtSetup.uni
+//
+// 8 2/27/14 8:38a Barretlin
+// [TAG] EIP N/A
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] when thunderbolt is disable in run time, PCIE device whcih
+// using the same PCIE slot might work abnormal
+// [RootCause] protect thunderbolt device function still work
+// [Solution] According thunderbolt policy to skip protect function
+// [Files] TbtDxe.c TbtDxeLib.c
+//
+// 7 1/05/14 1:43p Barretlin
+// [TAG] EIP N/A
+// [Category] New Feature
+// [Description] Support Thunderbolt feature Enable/Disable in run time
+// Support dynamic Thunderbolt AIC location in run time
+// [Files] TbtDxe.c TbtGpe.asl
+//
+// 6 6/21/13 7:40a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix build error with non Intel RC project
+// [Files] TbtDxe.sdl TbtDxe.c TbtGpe.asl TbtDxeLib.h
+//
+// 5 6/18/13 1:41p Barretlin
+// [TAG] EIP126581
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Follow Thunderbolt BIOS Spec rev1.0 to disable ASL code
+// to call Thunderbolt SwSMI when Native PCIE is enable
+// [Files] TbtDxe.c
+//
+// 4 4/10/13 2:31p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Change reported MMIO address way in ASL code
+// [Files] TbtDxe.c TbtGpe.asl
+//
+// 3 4/10/13 1:26p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix Thunderbolt ready to boot event does not be excuted
+// on ULT platform
+// [Files] TbtDxe.c
+//
+// 2 1/18/13 2:26a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Improve _RMV ASL code for SharkBay RC
+// [Files] TbtDxe.sdl TbtDxe.c TbtGpe.asl
+//
+// 1 1/10/13 4:56a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 11 12/12/12 3:02a Barretlin
+// [TAG] EIP108272
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update to Spec 1.4 to support Redwood Ridge chip
+// [Files] TbtPei.c TbtSmm.c TbtDxe.c TbtDxe.sdl TbtGpe.asl
+// TbtOemBoard.c TbtOemBoard.h TbtOemLib.c TbtOemLib.h
+//
+// 10 10/28/12 10:50p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Change GPIO routing for SharkBay ULT platform
+// [Files] TbtDxe.c TbtGpe.asl TbtDxeLib.c TbtDxeLib.h TbtSmm.c
+//
+// 9 10/03/12 9:15p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Change Programming security level timing for saving
+// boot time
+// [Files] TbtPei.c TbtDxe.c TbtOemBoard.c TbtOemBoard.h
+// TbtOemBoard.sdl TbtOemLib.c TbtOemLib.h
+//
+// 8 7/31/12 2:52a Barretlin
+// [TAG] EIP96350
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Change ACPI method from level trigger to edge
+// trigger(_L1x to _E1x)
+// [Files] TbtDxe.c
+//
+// 7 7/31/12 2:46a Barretlin
+// [TAG] EIP91119
+// [Category] Improvement
+// [Description] Resolution for enable/disable Thunderbolt device option
+// rom at POST time
+// [Files] TbtDxe.c
+//
+// 6 7/25/12 11:58p Barretlin
+// [TAG] EIP90644
+// [Category] Improvement
+// [Description] Change pre-boot event timing from ready to boot to pci
+// bus finish assigning resources
+// [Files] TbtDxe.sdl TbtDxe.c TbtDxeLib.c TbtDxeLib.h
+//
+// 5 5/21/12 2:21a Barretlin
+// [TAG] EIP90003
+// [Category] Improvement
+// [Description] If TBT devices with option rom enabled, system maybe
+// cannot boot to OS.
+// [Files] TbtDxe.c TbtSmm.c TbtOemBoard.sdl
+//
+// 4 5/07/12 6:34a Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Add three setup items for debug
+// [Files] TbtDxe.c
+// TbtGpe.asl
+// TbtSmm.c
+// TbtSetup.sd
+// TbtSetup.uni
+// TbtOemBoard.c
+// TbtOemBoard.h
+//
+// 3 4/14/12 4:50a Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Improve ASL code, which redefines device name and RMV
+// mothod at same address when project supports RMV method, that might
+// cause conflict.
+// [Files] TbtDxe.c TbtGpe.asl
+//
+// 2 2/20/12 12:15a Wesleychen
+// - Add ProgramTbtSecurityLevel().
+// - Add a ready to boot event to invoke SW SMI for resource adjust.
+// - Revise the ACPI table update routine become a protocol callback
+// routine.
+//
+// 1 12/08/11 4:09a Wesleychen
+// Thunderbolt eModule initially releases.
+//
+//*************************************************************************
+#include <Efi.h>
+#include <token.h>
+#include <Setup.h>
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+#include <PciBus.h>
+#include <Acpi20.h>
+#include <Protocol\AcpiSupport.h>
+#include <TbtOemBoard.h>
+
+#if ACPI_SUPPORT
+ #if defined(PI_SPECIFICATION_VERSION)&&(PI_SPECIFICATION_VERSION>=0x00010014)
+ #include <Protocol\AcpiSystemDescriptionTable.h>
+ #else
+ #include <Protocol\AcpiSupport.h>
+ #endif
+#endif
+#if CSM_SUPPORT
+#include <Protocol\CsmPlatform.h>
+#endif
+#ifndef EFI_SIGNATURE_16
+#define EFI_SIGNATURE_16(A, B) ((A) | (B << 8))
+#endif
+
+#ifndef EFI_SIGNATURE_32
+#define EFI_SIGNATURE_32(A, B, C, D) (EFI_SIGNATURE_16 (A, B) | (EFI_SIGNATURE_16 (C, D) << 16))
+#endif
+
+EFI_GUID gOemTbtProtocolGuid = AMI_TBT_PLATFROM_POLICY_PROTOCOL_GUID;
+EFI_GUID TbtHRStatusGuid = AMI_TBT_HR_STATUS_GUID;
+EFI_GUID gTbtHobGuid = AMI_TBT_HOB_GUID;
+EFI_GUID HobListGuid = HOB_LIST_GUID;
+EFI_GUID SetupGuid = SETUP_GUID;
+#ifdef CSM_OPRROM_POLICY_GUID
+EFI_GUID gCsmOpromPolicyGuid = CSM_OPRROM_POLICY_GUID;
+#endif
+
+AMI_TBT_PLATFORM_POLICY_PROTOCOL *gAmiTbtPlatformPolicy = NULL;
+
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+} EFI_ACPI_COMMON_HEADER;
+
+EFI_EVENT mAcpiEvent;
+//VOID *mAcpiReg;
+VOID *CsmOpromPolicyRegs;
+static EFI_BOOT_MODE BootMode;
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: DsdtTableUpdate
+//
+// Description: Update the DSDT table
+//
+// Input: DsdtTable - The table points to DSDT table.
+//
+// Output: None
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+DsdtTableUpdate (
+ IN ACPI_HDR *DsdtTable
+ )
+{
+ UINT8 *CurrPtr;
+ UINT8 *DsdtPointer;
+ UINT32 *Signature = NULL;
+ UINT8 DoneFlag = 0;
+ UINT8 TbtAslStartPoint = 0;
+ UINT8 HexStr[36] = {'0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F','G','H',\
+ 'I','J','K','L','M','N','O','P','Q','R','S','T','U','V','W','X','Y','Z'};
+
+ CurrPtr = (UINT8 *) DsdtTable;
+ if (gAmiTbtPlatformPolicy != NULL && (!(gAmiTbtPlatformPolicy->TbtAICSupport))) {
+ TRACE((-1, "TbtDxe: Updating DSDT table for Thunderbolt\n"));
+
+ for (DsdtPointer = CurrPtr;
+ DsdtPointer <= (CurrPtr + ((EFI_ACPI_COMMON_HEADER *) CurrPtr)->Length);
+ DsdtPointer++ )
+ {
+ Signature = (UINT32 *) DsdtPointer;
+
+ if (*Signature == EFI_SIGNATURE_32 ('O', 'E', '1', 'X')) {
+ *DsdtPointer = '_';
+ // BIOS support of Thunderbolt devices Specification Update
+ // Revision 1.00
+ // Change ACPI method from level trigger to edge trigger(_L1x to _E1x)
+ #if defined ULT_SUPPORT && ULT_SUPPORT == 1
+ if(IsULTPchSeries()){
+ *(DsdtPointer + 2) = HexStr[gAmiTbtPlatformPolicy->TbtHotPlugEvt/16];
+ *(DsdtPointer + 3) = HexStr[gAmiTbtPlatformPolicy->TbtHotPlugEvt%16];
+ } else {
+ *(DsdtPointer + 3) = HexStr[gAmiTbtPlatformPolicy->TbtHotPlugEvt];
+ }
+ #else
+ *(DsdtPointer + 3) = HexStr[gAmiTbtPlatformPolicy->TbtHotPlugEvt];
+ #endif
+
+ DoneFlag = DoneFlag | 0x0f;
+ TRACE((-1, "TbtDxe: Update Thunderbolt GPE event method\n"));
+ } // GPE event
+
+ if(DoneFlag == 0x0F) return;
+ } //for loop
+ }// !(gAmiTbtPlatformPolicy->TbtAICSupport)
+
+ if (gAmiTbtPlatformPolicy != NULL && gAmiTbtPlatformPolicy->TbtAICSupport) {
+ TRACE((-1, "TbtDxe: Updating DSDT table for Thunderbolt AIC\n"));
+
+ for (DsdtPointer = CurrPtr;
+ DsdtPointer <= (CurrPtr + ((EFI_ACPI_COMMON_HEADER *) CurrPtr)->Length);
+ DsdtPointer++ )
+ {
+ Signature = (UINT32 *) DsdtPointer;
+ switch(*Signature){
+ case (EFI_SIGNATURE_32 ('O', 'E', '1', 'X')):
+ *DsdtPointer = '_';
+ // BIOS support of Thunderbolt devices Specification Update
+ // Revision 1.00
+ // Change ACPI method from level trigger to edge trigger(_L1x to _E1x)
+ #if defined ULT_SUPPORT && ULT_SUPPORT == 1
+ if(IsULTPchSeries()){
+ *(DsdtPointer + 2) = HexStr[gAmiTbtPlatformPolicy->TbtHotPlugEvt/16];
+ *(DsdtPointer + 3) = HexStr[gAmiTbtPlatformPolicy->TbtHotPlugEvt%16];
+ } else {
+ *(DsdtPointer + 3) = HexStr[gAmiTbtPlatformPolicy->TbtHotPlugEvt];
+ }
+ #else
+ *(DsdtPointer + 3) = HexStr[gAmiTbtPlatformPolicy->TbtHotPlugEvt];
+ #endif
+
+ DoneFlag = DoneFlag | BIT00;
+ TRACE((-1, "TbtDxe: Update Thunderbolt GPE event method\n"));
+ break;
+#if defined TBT_INTEL_RC_CONFIG && TBT_INTEL_RC_CONFIG == 1
+#if defined TBT_UP_PORT_FUNC && TBT_UP_PORT_FUNC == 0
+ case (EFI_SIGNATURE_32 ('R', 'P', '0', '1')):
+#elif defined TBT_UP_PORT_FUNC && TBT_UP_PORT_FUNC == 1
+ case (EFI_SIGNATURE_32 ('R', 'P', '0', '2')):
+#elif defined TBT_UP_PORT_FUNC && TBT_UP_PORT_FUNC == 2
+ case (EFI_SIGNATURE_32 ('R', 'P', '0', '3')):
+#elif defined TBT_UP_PORT_FUNC && TBT_UP_PORT_FUNC == 3
+ case (EFI_SIGNATURE_32 ('R', 'P', '0', '4')):
+#elif defined TBT_UP_PORT_FUNC && TBT_UP_PORT_FUNC == 4
+ case (EFI_SIGNATURE_32 ('R', 'P', '0', '5')):
+#elif defined TBT_UP_PORT_FUNC && TBT_UP_PORT_FUNC == 5
+ case (EFI_SIGNATURE_32 ('R', 'P', '0', '6')):
+#elif defined TBT_UP_PORT_FUNC && TBT_UP_PORT_FUNC == 6
+ case (EFI_SIGNATURE_32 ('R', 'P', '0', '7')):
+#else
+ case (EFI_SIGNATURE_32 ('R', 'P', '0', '8')):
+#endif
+#endif // TBT_INTEL_RC_CONFIG
+ if (DoneFlag){
+ if (gAmiTbtPlatformPolicy->Dev == 0x1C && \
+ gAmiTbtPlatformPolicy->Fun != TBT_UP_PORT_FUNC){
+ *(DsdtPointer + 3) = HexStr[(gAmiTbtPlatformPolicy->Fun + 1)];
+ DoneFlag++;
+ TRACE((-1, "TbtDxe: Update Thunderbolt Host ASL location to SB root port %x\n", gAmiTbtPlatformPolicy->Fun));
+ }
+ if (gAmiTbtPlatformPolicy->Bus == 0 && \
+ gAmiTbtPlatformPolicy->Dev == 1){
+ *DsdtPointer = HexStr[25]; // 'P'
+ *(DsdtPointer + 1) = HexStr[14]; // 'E'
+ *(DsdtPointer + 2) = HexStr[16]; // 'G'
+ *(DsdtPointer + 3) = HexStr[(gAmiTbtPlatformPolicy->Fun)];
+ DoneFlag++;
+ TRACE((-1, "TbtDxe: Update Thunderbolt Host ASL location to PEG%x\n", gAmiTbtPlatformPolicy->Fun));
+ }
+ }
+ break;
+ default:
+ break;
+ } // switch
+
+#if defined TBT_S3_WAK_SMI && TBT_S3_WAK_SMI == 1 && TBT_PCI0_INI_SUPPORT == 1
+ if(DoneFlag == 0x06) return;
+#elif defined TBT_PCI0_INI_SUPPORT && TBT_PCI0_INI_SUPPORT == 1
+ if(DoneFlag == 0x05) return;
+#else
+ if(DoneFlag == 0x04) return;
+#endif
+ } // for loop
+ }// gAmiTbtPlatformPolicy->TbtAICSupport
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: CreateTbtAcpiCallback
+//
+// Description: This function will create all ACPI components for SB when
+// ACPI support protocol is available.
+//
+// Input: Event - Event of callback
+// Context - Context of callback.
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID CreateTbtAcpiCallback (
+ IN EFI_EVENT Event,
+ IN VOID *Context )
+{
+ UINTN Index;
+ EFI_ACPI_SUPPORT_PROTOCOL *As;
+ FACP_20 *Table = NULL;
+ EFI_ACPI_TABLE_VERSION Version;
+ UINTN Handle;
+ ACPI_HDR *DsdtPtr = NULL;
+ EFI_STATUS Status;
+ //UINT8 SubBus;
+ UINTN HRStatusSize = sizeof(AMI_TBT_HR_STATUS_DATA);
+ AMI_TBT_HR_STATUS_DATA HRStatusData;
+ UINT8 TbtSmiNotifyEnable;
+ UINT8 TbtBus;
+ SETUP_DATA *SetupData;
+ UINTN VariableSize = sizeof(SETUP_DATA);
+
+ Status = pBS->LocateProtocol(&gEfiAcpiSupportGuid, NULL, &As);
+
+ // Find DSDT ACPI Table
+ for (Index = 0; Index < ACPI_RSDT_TABLE_NUM; Index++) {
+ Status = As->GetAcpiTable(As, Index, &Table, &Version, &Handle);
+ if (EFI_ERROR(Status)) break;//no more tables left
+
+ if ((Table->Header.Signature == FACP_SIG) && (DsdtPtr == NULL)) {
+ DsdtPtr = (ACPI_HDR*)Table->DSDT;
+
+ TRACE((-1, "TbtDxe: Found DSDT Table at 0x%08X\n", DsdtPtr));
+
+ DsdtTableUpdate (DsdtPtr);
+
+ // Thunderbolt BIOS Implementation guide for Redwood Ridge/Falcon Ridge
+ // based devices rev 1.0
+ // 2.1.3.2 BIOS setup options for Thunderbolt
+ // Switch between Native PCIe Enable and Disabled with the following settings:
+ // --------------------------------------------------------------------
+ // Native PCIe support disabled (default) | Native PCIe support enabled
+ // --------------------------------------------------------------------
+ // SCI Call Enabled | SCI Call Enabled
+ // --------------------------------------------------------------------
+ // SMI Call Enabled | SMI Call Disabled
+ // --------------------------------------------------------------------
+ // Notify Call Enabled | Notify Call Enabled
+ // --------------------------------------------------------------------
+ Status = pBS->AllocatePool( EfiBootServicesData,
+ VariableSize,
+ &SetupData );
+ ASSERT_EFI_ERROR(Status);
+
+ Status = pRS->GetVariable( L"Setup", \
+ &SetupGuid, \
+ NULL, \
+ &VariableSize, \
+ SetupData );
+ ASSERT_EFI_ERROR (Status);
+
+#if defined TBT_INTEL_RC_CONFIG && TBT_INTEL_RC_CONFIG == 1
+ if (SetupData->PciExpNative){
+ TbtSmiNotifyEnable = gAmiTbtPlatformPolicy->NotifyEnabled << 1;
+ } else {
+ TbtSmiNotifyEnable = gAmiTbtPlatformPolicy->SwSmiEnabled | (gAmiTbtPlatformPolicy->NotifyEnabled << 1);
+ }
+#else
+ // For non Intel RC project
+ TbtSmiNotifyEnable = gAmiTbtPlatformPolicy->SwSmiEnabled | (gAmiTbtPlatformPolicy->NotifyEnabled << 1);
+#endif
+ Status = UpdateAslNameObject(DsdtPtr, "TSNE", TbtSmiNotifyEnable);
+ TRACE((-1, "TbtDxe: Updating TSNE Name Object %r\n", Status));
+ ASSERT_EFI_ERROR(Status);
+ pBS->FreePool(SetupData);
+
+ //Update System MMIO PCIE Base address
+ //TRACE((-1, "TbtDxe: Update TBT Host DownStream port MMIO Base address in ASL code\n"));
+ //SubBus = READ_PCI8(gAmiTbtPlatformPolicy->Bus, gAmiTbtPlatformPolicy->Dev, gAmiTbtPlatformPolicy->Fun, PCI_PBUS+1);
+ //Status = UpdateAslNameObject(DsdtPtr, "PEMA", (PCIEX_BASE_ADDRESS | (SubBus << 20)));
+ //TRACE((-1, "TbtDxe: Updating PEMA Name Object %r\n", Status));
+ //ASSERT_EFI_ERROR(Status);
+
+ //Update TBT Host location bus in ASL code
+ if (gAmiTbtPlatformPolicy->TbtAICSupport){
+ if (gAmiTbtPlatformPolicy->Bus == 0 && gAmiTbtPlatformPolicy->Dev == 0x1c){
+ Status = UpdateAslNameObject(DsdtPtr, "TBRP", (gAmiTbtPlatformPolicy->Fun + 1));
+ TRACE((-1, "TbtDxe: Updating TBRP Name Object %r\n", Status));
+ ASSERT_EFI_ERROR(Status);
+ } else if (gAmiTbtPlatformPolicy->Bus == 0 && gAmiTbtPlatformPolicy->Dev == 1){
+ Status = UpdateAslNameObject(DsdtPtr, "TBRP", (gAmiTbtPlatformPolicy->Fun + 0x20));
+ TRACE((-1, "TbtDxe: Updating TBRP Name Object %r\n", Status));
+ ASSERT_EFI_ERROR(Status);
+ }
+ }
+ TbtBus = MMIO_READ8(TBT_CFG_ADDRESS(gAmiTbtPlatformPolicy->Bus, gAmiTbtPlatformPolicy->Dev, gAmiTbtPlatformPolicy->Fun, PCI_SBUS));
+ Status = UpdateAslNameObject(DsdtPtr, "TBUS", TbtBus);
+ TRACE((-1, "TbtDxe: Updating TBUS Name Object %r\n", Status));
+ ASSERT_EFI_ERROR(Status);
+
+ //Update TBT Host Information in ASL code
+ TRACE((-1, "TbtDxe: Update TBT Host Information in ASL code\n"));
+ Status = pRS->GetVariable( L"TbtHRStatusVar", \
+ &TbtHRStatusGuid, \
+ NULL, \
+ &HRStatusSize, \
+ &HRStatusData );
+ if (!EFI_ERROR(Status)){
+ Status = UpdateAslNameObject(DsdtPtr, "TBHR", HRStatusData.TbtHRSeries);
+ TRACE((-1, "TbtDxe: Updating TBHR Name Object %r\n", Status));
+ ASSERT_EFI_ERROR(Status);
+ }
+
+ // Update _RMV method return value for Thunderbolt
+ Status = UpdateAslNameObject( DsdtPtr, "TBMV", gAmiTbtPlatformPolicy->TbtRmvReturnValue);
+ TRACE((-1, "TbtDxe: Update TRMV ASL object value = %x, %r\n", gAmiTbtPlatformPolicy->TbtRmvReturnValue, Status));
+ ASSERT_EFI_ERROR(Status);
+
+ break;
+ }
+ }
+ // Kill the Event
+ pBS->CloseEvent(Event);
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: DisableTbtDeviceRomCallback
+//
+// Description: Disable all Tbt devices option ROM to aviod S4 resume problem.
+//
+// Input: Event - Event of callback
+// Context - Context of callback.
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID DisableTbtDeviceRomCallback (
+ IN EFI_EVENT Event,
+ IN VOID *Context )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE Handle;
+ UINTN Size = sizeof(EFI_HANDLE);
+ CSM_PLATFORM_POLICY_DATA *CsmOpromPolicyData;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ PCI_DEV_INFO *Device;
+
+ TRACE((-1, "TbtDxe: DisableTbtDeviceRomCallback() Entry\n"));
+
+ Status = pBS->LocateHandle(ByRegisterNotify, NULL, CsmOpromPolicyRegs, &Size, &Handle);
+ if (EFI_ERROR(Status)) return;
+
+ Status = pBS->HandleProtocol(Handle, &gCsmOpromPolicyGuid, &CsmOpromPolicyData);
+ if (EFI_ERROR(Status)) return;
+
+ if(CsmOpromPolicyData == NULL) return; //post-process OpROM callback
+ if(CsmOpromPolicyData->PciIo == NULL) return; // OEM Service ROM
+
+ PciIo = CsmOpromPolicyData->PciIo;
+ Device = (PCI_DEV_INFO*)PciIo;
+ while ((Device->Type != tPciRootBrg) && (Device->ParentBrg != NULL)) {
+ Device = Device->ParentBrg;
+ if (Device->Address.Addr.Bus != gAmiTbtPlatformPolicy->Bus) continue;
+ if (Device->Address.Addr.Device != gAmiTbtPlatformPolicy->Dev) continue;
+ if (Device->Address.Addr.Function != gAmiTbtPlatformPolicy->Fun) continue;
+ if (gAmiTbtPlatformPolicy->TbtOptionRom || (BootMode & BOOT_ON_S4_RESUME)){
+ CsmOpromPolicyData->ExecuteThisRom = FALSE; //this attritube default is TRUE
+ TRACE((-1, "TbtDxe: ExecuteThisRom is setted FALSE.\n"));
+ }
+
+ break;
+ }
+
+ TRACE((-1, "TbtDxe: DisableTbtDeviceRomCallback() Exit\n"));
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: InvokeSmiHandlerBeforeBoot
+//
+// Description: To invoke SW SMI befor boot for reaource adjust.
+//
+// Input: Event - Event of callback
+// Context - Context of callback.
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID InvokeSmiHandlerBeforeBoot (
+ IN EFI_EVENT Event,
+ IN VOID *Context )
+{
+ TbtDxeInvokeSmiHandler();
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: TbtDxe_Init
+//
+// Description: This function is the entry point for this DXE.
+//
+// Input: ImageHandle - Image handle
+// SystemTable - Pointer to the system table
+//
+// Output: Return Status based on errors that occurred while waiting for
+// time to expire.
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS TbtDxe_Init (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable )
+{
+ EFI_STATUS Status;
+ EFI_EVENT CsmOpromPolicyEvent = NULL;
+ TBT_HOB *gTbtHob;
+
+ InitAmiLib(ImageHandle, SystemTable);
+ TRACE((-1, "TbtDxe: TbtDxe_Init() Entry!!\n"));
+
+ Status = pBS->LocateProtocol( \
+ &gOemTbtProtocolGuid, \
+ NULL, \
+ &gAmiTbtPlatformPolicy);
+ if (!EFI_ERROR(Status)) {
+ BootMode = GetBootMode();
+ if (gAmiTbtPlatformPolicy->TbtEnable){
+#ifdef CSM_OPRROM_POLICY_GUID
+ Status = RegisterProtocolCallback (&gCsmOpromPolicyGuid,
+ DisableTbtDeviceRomCallback,
+ NULL, &CsmOpromPolicyEvent,
+ &CsmOpromPolicyRegs);
+#endif
+ if (gAmiTbtPlatformPolicy->SmiNotifyEnabled) {
+#if (ACPI_SUPPORT)
+ Status = CreateReadyToBootEvent( TPL_NOTIFY,
+ CreateTbtAcpiCallback,
+ NULL,
+ &mAcpiEvent);
+#endif
+ } // SmiNotifyEnabled
+
+ gTbtHob = (TBT_HOB *)GetEfiConfigurationTable(SystemTable, &HobListGuid);
+ if (gTbtHob){
+ Status = FindNextHobByGuid((EFI_GUID*)&gTbtHobGuid, &gTbtHob);
+ if (!(EFI_ERROR(Status)) && gTbtHob->TbtSecurityLevelFlag){
+ TRACE((-1, "TbtDxe: Need Finish final programming !!!\n"));
+ FinialProgramTbtSecurityLevel(gAmiTbtPlatformPolicy);
+ }
+ } // gTbtHob
+ else TRACE((-1, "TbtDxe: Can not find Thunderbolt Hob !!!\n"));
+ }// TbtEnable
+ }// gAmiTbtPlatformPolicy success
+ TRACE((-1, "TbtDxe: TbtDxe_Init() Exit!!\n"));
+
+ return EFI_SUCCESS;
+}
+
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtDxe/TbtDxe.cif b/Board/EM/Thunderbolt/TbtDxe/TbtDxe.cif
new file mode 100644
index 0000000..5e71252
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtDxe/TbtDxe.cif
@@ -0,0 +1,14 @@
+<component>
+ name = "TbtDxe"
+ category = ModulePart
+ LocalRoot = "Board\EM\Thunderbolt\TbtDxe\"
+ RefName = "TbtDxe"
+[files]
+"TbtDxe.sdl"
+"TbtDxe.mak"
+"TbtDxe.c"
+"TbtDxe.dxs"
+"TbtGpe.asl"
+"TbtDxeLib.c"
+"TbtDxeLib.h"
+<endComponent>
diff --git a/Board/EM/Thunderbolt/TbtDxe/TbtDxe.dxs b/Board/EM/Thunderbolt/TbtDxe/TbtDxe.dxs
new file mode 100644
index 0000000..3e8c7e0
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtDxe/TbtDxe.dxs
@@ -0,0 +1,54 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtDxe/TbtDxe.dxs 1 1/10/13 4:56a Barretlin $
+//
+// $Revision: 1 $
+//
+// $Date: 1/10/13 4:56a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtDxe/TbtDxe.dxs $
+//
+// 1 1/10/13 4:56a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 2 2/20/12 12:15a Wesleychen
+// Revise the ACPI table update routine become a protocol callback
+// routine.
+//
+// 1 12/08/11 4:09a Wesleychen
+// Thunderbolt eModule initially releases.
+//
+//**********************************************************************
+#include <TbtOemboard.h>
+
+DEPENDENCY_START
+ AMI_TBT_PLATFROM_POLICY_PROTOCOL_GUID
+DEPENDENCY_END
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtDxe/TbtDxe.mak b/Board/EM/Thunderbolt/TbtDxe/TbtDxe.mak
new file mode 100644
index 0000000..7fa124a
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtDxe/TbtDxe.mak
@@ -0,0 +1,104 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtDxe/TbtDxe.mak 1 1/10/13 4:56a Barretlin $
+#
+# $Revision: 1 $
+#
+# $Date: 1/10/13 4:56a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtDxe/TbtDxe.mak $
+#
+# 1 1/10/13 4:56a Barretlin
+# Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+# Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+#
+# 2 2/20/12 12:09a Wesleychen
+# [TAG] None
+# [Category] Improvement
+# [Description] Add TbtDxeLib.
+# [Files] TbtDxeLib.c; TbtDxeLib.h; TbtDxe.mak; TbtDxe.sdl;
+# TbtDxe.cif.
+#
+# 1 12/08/11 4:09a Wesleychen
+# Thunderbolt eModule initially releases.
+#
+# 6 1/13/10 2:13p Felixp
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: TbtDxe.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+All : TbtDxe
+
+CFLAGS = $(CFLAGS) /I$(TbtDxe_DIR)
+#----------------------------------------------------------------------------
+# Generic TBT dependencies
+#----------------------------------------------------------------------------
+$(BUILD_DIR)\TbtDxe.mak : $(TbtDxe_DIR)\$(@B).cif $(TbtDxe_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(TbtDxe_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+#----------------------------------------------------------------------------
+# Add files into CSP Library
+#----------------------------------------------------------------------------
+AMI_CSP_LIB_LIBRARY_PATH = $(AMI_CSP_LIB_LIBRARY_PATH);$(TbtDxe_DIR)
+
+AMI_CSP_LIB_INCLUDE_FILES = "$(TbtDxe_DIR)\TbtDxeLib.h" + \
+$(AMI_CSP_LIB_INCLUDE_FILES)
+
+AMI_CSP_LIB_OBJS = $(AMI_CSP_LIB_OBJS) \
+$(BUILD_DIR)\TbtDxeLib.obj
+
+{$(TbtDxe_DIR)}.c{$(BUILD_DIR)}.obj::
+ $(CC) $(CFLAGS) /I $(TbtDxe_DIR) /Fo$(BUILD_DIR)\ $<
+
+$(BUILD_DIR)\TbtDxeLib.obj : $(TbtDxe_DIR)\TbtDxeLib.c
+
+#----------------------------------------------------------------------------
+# Create TBT DXE Component
+#----------------------------------------------------------------------------
+TbtDxe : $(BUILD_DIR)\TbtDxe.mak TbtDxeBin
+TBT_DXE_OBJECTS =\
+$$(BUILD_DIR)\$(TbtDxe_DIR)\TbtDxe.obj \
+
+TbtDxeBin : $(AMICSPLib) $(AMIDXELIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\TbtDxe.mak all\
+ GUID=EFB7F614-BC8B-4DDD-B09A-22079FC1512F\
+ ENTRY_POINT=TbtDxe_Init \
+ "MY_INCLUDES=$(TBT_OEMBOARD_INCLUDES)"\
+ TYPE=BS_DRIVER\
+ DEPEX1=$(TbtDxe_DIR)\TbtDxe.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ COMPRESS=1
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtDxe/TbtDxe.sdl b/Board/EM/Thunderbolt/TbtDxe/TbtDxe.sdl
new file mode 100644
index 0000000..eef55bc
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtDxe/TbtDxe.sdl
@@ -0,0 +1,586 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtDxe/TbtDxe.sdl 8 7/26/13 2:46a Barretlin $
+#
+# $Revision: 8 $
+#
+# $Date: 7/26/13 2:46a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtDxe/TbtDxe.sdl $
+#
+# 8 7/26/13 2:46a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Separate ASL code for Intel RC and non Intel RC
+# [Files] TbtDxe.sdl TbtDxe.cif
+#
+# 7 6/21/13 7:40a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Fix build error with non Intel RC project
+# [Files] TbtDxe.sdl TbtDxe.c TbtGpe.asl TbtDxeLib.h
+#
+# 6 5/27/13 8:54a Barretlin
+# [TAG] EIP122882
+# [Category] Bug Fix
+# [Severity] Normal
+# [Symptom] let system entering sleep status continually and waking up
+# system via Thunderbolt Lan device, system will auto-wake
+# [RootCause] PCIE PME status is not cleared by ASL in SB module
+# [Solution] Clear PCIE PME status againg before system entring sleep
+# status
+# [Files] TbtDxe.sdl TbtGpe.asl
+#
+# 5 4/10/13 1:37p Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Adding a TPTS method into _PTS method in ASL code
+# [Files] TbtDxe.sdl TbtGpe.asl
+#
+# 4 3/21/13 4:58a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Use token to decide where location of OS_UP command for
+# RR chip is
+# [Files] TbtDxe.sdl TbtGpe.asl
+#
+# 3 2/08/13 1:23a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Following Intel sample code move _INI method of
+# thunderbolt from under PCIE root port to under system bus
+# [Files] TbtDxe.sdl TbtGpe.asl
+#
+# 2 1/18/13 2:26a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Improve _RMV ASL code for SharkBay RC
+# [Files] TbtDxe.sdl TbtDxe.c TbtGpe.asl
+#
+# 1 1/10/13 4:56a Barretlin
+# Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+# Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+#
+# 7 12/12/12 3:02a Barretlin
+# [TAG] EIP108272
+# [Category] Spec Update
+# [Severity] Important
+# [Description] Update to Spec 1.4 to support Redwood Ridge chip
+# [Files] TbtPei.c TbtSmm.c TbtDxe.c TbtDxe.sdl TbtGpe.asl
+# TbtOemBoard.c TbtOemBoard.h TbtOemLib.c TbtOemLib.h
+#
+# 6 7/25/12 11:58p Barretlin
+# [TAG] EIP90644
+# [Category] Improvement
+# [Description] Change pre-boot event timing from ready to boot to pci
+# bus finish assigning resources
+# [Files] TbtDxe.sdl TbtDxe.c TbtDxeLib.c TbtDxeLib.h
+#
+# 5 5/22/12 9:48a Barretlin
+# [TAG] EIPNone
+# [Category] Improvement
+# [Description] Rollback default value of token
+# [Files] TbtDxe.sdl
+#
+# 4 5/07/12 6:30a Barretlin
+# [TAG] None
+# [Category] Improvement
+# [Description] change default value of token, because of it is need
+# SwSMI when S3 resume
+# [Files] TbtDxe.sdl
+#
+# 3 4/16/12 10:17a Barretlin
+# [TAG] EIP86590
+# [Category] Bug Fix
+# [Symptom] Only EP#1 can be detected after resume from S3
+# [Solution] Adding a TWAK method into _WAK method
+# [Files] TbtDxe.sdl TbtGpe.asl
+#
+# 2 2/20/12 12:09a Wesleychen
+# [TAG] None
+# [Category] Improvement
+# [Description] Add TbtDxeLib.
+# [Files] TbtDxeLib.c; TbtDxeLib.h; TbtDxe.mak; TbtDxe.sdl;
+# TbtDxe.cif.
+#
+# 1 12/08/11 4:09a Wesleychen
+# Thunderbolt eModule initially releases.
+#
+#*************************************************************************
+
+TOKEN
+ Name = "TbtDxe_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Help = "Main switch to enable TbtDxe support in Project"
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "1"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "0"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "0"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "0"
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "0"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "2"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "1"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "1"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "1"
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "0"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "3"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "2"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "2"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "2"
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "0"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "4"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "3"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "3"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "3"
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "0"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "5"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "4"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "4"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "4"
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "0"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "6"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "5"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "5"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "5"
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "0"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "7"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "6"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "6"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "6"
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "0"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "8"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "7"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RPNum"
+ Value = "7"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_FUNC" "=" "7"
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "0"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RP_NUM"
+ Value = "\_SB.PCI0.RP0$(TBT_RPNum)"
+ TokenType = Expression
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RP_NUM"
+ Value = "\_SB.PCI0.PEX$(TBT_RPNum)"
+ TokenType = Expression
+ TargetH = Yes
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "0"
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RMV_REPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Help = "Enable:1/Disable:0 Thunderbolt module report _RMV function in ASL code."
+ Token = "DESKTOP_306AX" "=" "1"
+ Token = "HOTPLUG_RMV_SUPPORT" "=" "0"
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "1"
+End
+
+TOKEN
+ Name = "TBT_RMV_REPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Help = "Enable:1/Disable:0 Thunderbolt module report _RMV function in ASL code."
+ Token = "MOBILE_306AX" "=" "1"
+ Token = "HOTPLUG_RMV_SUPPORT" "=" "0"
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "1"
+End
+
+TOKEN
+ Name = "TBT_RMV_REPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Help = "Enable:1/Disable:0 Thunderbolt module report _RMV function in ASL code."
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "0"
+End
+
+TOKEN
+ Name = "TBT_WAK_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Help = "Main switch to enable TWAK method in ASL code"
+End
+
+TOKEN
+ Name = "TBT_PTS_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Help = "Main switch to enable TPTS method in ASL code"
+End
+
+TOKEN
+ Name = "TBT_PCI0_INI_SUPPORT"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Help = "Enable/Disable OS_UP command of RR chip under _INI method of system bus in ASL code."
+End
+
+TOKEN
+ Name = "TBT_S3_WAK_SMI"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Help = "Enable:1/Disable:0 trigger TBT SMI in ASL code when S3 resuming"
+End
+
+TOKEN
+ Name = "TBT_WAK"
+ Value = "\_SB.PCI0.RP0$(TBT_RPNum).TWAK(Arg0)"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Lock = Yes
+ Token = "TBT_WAK_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "TBT_WAK"
+ Value = "\_SB.PCI0.PEX$(TBT_RPNum).TWAK(Arg0)"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Lock = Yes
+ Token = "TBT_WAK_SUPPORT" "=" "1"
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "0"
+End
+
+TOKEN
+ Name = "TBT_PTS"
+ Value = "\_SB.PCI0.RP0$(TBT_RPNum).TPTS(Arg0)"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Lock = Yes
+ Token = "TBT_PTS_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "TBT_PTS"
+ Value = "\_SB.PCI0.PEX$(TBT_RPNum).TPTS(Arg0)"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Lock = Yes
+ Token = "TBT_PTS_SUPPORT" "=" "1"
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "0"
+End
+
+TOKEN
+ Name = "TBT_CLEAR_PME_STATUS"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Help = "Enable:1/Disable:0 Clear PCIE root port thunderbolt host located PME status in ASL code."
+ Token = "TBT_PTS_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "TBT_CLEAR_PME_STATUS"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Help = "Enable:1/Disable:0 Clear PCIE root port thunderbolt host located PME status in ASL code."
+ Token = "MOBILE_306AX" "=" "1"
+ Token = "TBT_PTS_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "TBT_CLEAR_PME_STATUS"
+ Value = "0"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Help = "Enable:1/Disable:0 Clear PCIE root port thunderbolt host located PME status in ASL code."
+ Token = "DESKTOP_306AX" "=" "1"
+ Token = "TBT_PTS_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "TBT_INI"
+ Value = "\_SB.PCI0.RP0$(TBT_RPNum).TINI()"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Lock = Yes
+ Token = "TBT_PCI0_INI_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "TBT_INI"
+ Value = "\_SB.PCI0.PEX$(TBT_RPNum).TINI()"
+ TokenType = Expression
+ TargetMak = Yes
+ TargetH = Yes
+ Lock = Yes
+ Token = "TBT_PCI0_INI_SUPPORT" "=" "1"
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "0"
+End
+
+MODULE
+ Help = "Includes TbtDxe.mak to Project"
+ File = "TbtDxe.mak"
+End
+
+PATH
+ Name = "TbtDxe_DIR"
+End
+
+ELINK
+ Name = "/I$(TbtDxe_DIR)"
+ Parent = "TBT_DXE_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "TBT_DXE_INCLUDES"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(TbtDxe_DIR)\TbtGpe.asl"
+ Parent = "INTEL_GENERIC_ASL"
+ InvokeOrder = AfterParent
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "1"
+End
+
+ELINK
+ Name = "$(TbtDxe_DIR)\TbtGpeNonRC.asl"
+ Parent = "GENERIC_ASL"
+ InvokeOrder = AfterParent
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "0"
+End
+
+ELINK
+ Name = "$(TBT_WAK)"
+ Parent = "ASL_WAK"
+ Help = "Include TBT Specific Function at WAK.\Arg0 is a sleep state the System is resuming from. "
+ SrcFile = "$(TbtDxe_DIR)\TbtGpe.ASL"
+ InvokeOrder = AfterParent
+ Token = "TBT_WAK_SUPPORT" "=" "1"
+End
+
+ELINK
+ Name = "$(TBT_PTS)"
+ Parent = "ASL_PTS"
+ Help = "Include TBT Specific Function at PTS.\Arg0 is a sleep state the System is resuming from. "
+ SrcFile = "$(TbtDxe_DIR)\TbtGpe.ASL"
+ InvokeOrder = AfterParent
+ Token = "TBT_PTS_SUPPORT" "=" "1"
+End
+
+ELINK
+ Name = "$(TBT_INI)"
+ Parent = "ASL_PCI0_INI"
+ Help = "Include TBT Specific Function at _INI method of PCI0."
+ SrcFile = "$(TbtDxe_DIR)\TbtGpe.ASL"
+ InvokeOrder = AfterParent
+ Token = "TBT_PCI0_INI_SUPPORT" "=" "1"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\TbtDxe.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "OEM_PCI_DEVICE_CALLBACK(0, 0, TbtProtectedPciDevice),"
+ Parent = "OEM_SKIP_PCI_DEVICE"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "TbtDxeInvokeSmiHandler,"
+ Parent = "ConnectRootBridgeHandles,"
+ InvokeOrder = AfterParent
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtDxe/TbtDxeLib.c b/Board/EM/Thunderbolt/TbtDxe/TbtDxeLib.c
new file mode 100644
index 0000000..45f6768
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtDxe/TbtDxeLib.c
@@ -0,0 +1,209 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtDxe/TbtDxeLib.c 4 5/16/14 6:02p Barretlin $
+//
+// $Revision: 4 $
+//
+// $Date: 5/16/14 6:02p $
+//*************************************************************************
+// Revision History
+// ----------------
+//
+//*************************************************************************
+//---------------------------------------------------------------------------
+// Include(s)
+//---------------------------------------------------------------------------
+
+#include <Efi.h>
+#include <Token.h>
+#include <Setup.h>
+#include <AmiPeiLib.h>
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+
+// Produced Protocols
+
+// Consumed Protocols
+
+//---------------------------------------------------------------------------
+// Constant, Macro and Type Definition(s)
+//---------------------------------------------------------------------------
+// Constant Definition(s)
+
+// Macro Definition(s)
+
+// Type Definition(s)
+
+// Function Prototype(s)
+
+//---------------------------------------------------------------------------
+// Variable and External Declaration(s)
+//---------------------------------------------------------------------------
+// Variable Declaration(s)
+
+// GUID Definition(s)
+
+// Protocol Definition(s)
+
+// External Declaration(s)
+
+// Function Definition(s)
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: TbtProtectedPciDevice
+//
+// Description: This function is called by PCI Bus Driver before configuring
+// or disabling any PCI device. This function should examine the
+// Vendor/Device ID or PCI Bus, Device and Function numbers to
+// make sure it is not a south bridge device or any other device
+// which should no be configured by PCI Bus Driver.
+//
+// Input: *PciDevice - Pointer to PCI Device Info structure.
+//
+// Output: EFI_STATUS
+// EFI_SUCCESS - SKIP this device, do not touch
+// PCI Command register.
+// EFI_UNSUPPORTED - DON'T SKIP this device do complete
+// enumeration as usual.
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS TbtProtectedPciDevice (
+ IN PCI_DEV_INFO *PciDevice )
+{
+ AMI_TBT_PLATFORM_POLICY_PROTOCOL *gAmiTbtPlatformPolicy = NULL;
+ EFI_GUID gOemTbtProtocolGuid = AMI_TBT_PLATFROM_POLICY_PROTOCOL_GUID;
+ EFI_STATUS Status;
+ UINT8 TBus = TBT_UP_PORT_BUS;
+ UINT8 TDev = TBT_UP_PORT_DEV;
+ UINT8 TFun = TBT_UP_PORT_FUNC;
+
+ TRACE((-1, "\nTbtDxe: TbtProtectedPciDevice Entry !!!\n"));
+ Status = pBS->LocateProtocol( &gOemTbtProtocolGuid, \
+ NULL, \
+ &gAmiTbtPlatformPolicy);
+ if (EFI_ERROR(Status) || (!(gAmiTbtPlatformPolicy->TbtEnable))){
+ return EFI_UNSUPPORTED;
+ }
+
+ if ((!EFI_ERROR(Status)) && (gAmiTbtPlatformPolicy->TbtAICSupport == 1)){
+ if (gAmiTbtPlatformPolicy->Dev == 0x1c){
+ TFun = gAmiTbtPlatformPolicy->Fun;
+ } else {
+ TBus = gAmiTbtPlatformPolicy->Bus;
+ TDev = gAmiTbtPlatformPolicy->Dev;
+ TFun = gAmiTbtPlatformPolicy->Fun;
+ }
+ }
+ TRACE((-1, "TbtDxe: PciDevice @B:%x|D:%x|F:%x !!!\n", PciDevice->Address.Addr.Bus, PciDevice->Address.Addr.Device, PciDevice->Address.Addr.Function));
+#if defined TBT_PCIBUS_SKIP && TBT_PCIBUS_SKIP == 1
+ while ((PciDevice->Type != tPciRootBrg) && (PciDevice->ParentBrg != NULL)) {
+ PciDevice = PciDevice->ParentBrg;
+ if (PciDevice->Address.Addr.Bus != TBus) continue;
+ if (PciDevice->Address.Addr.Device != TDev) continue;
+ if (PciDevice->Address.Addr.Function != TFun) continue;
+
+ TRACE((-1, "TbtDxe: Skip thunderbolt device before PCI BUS assign resource.\n"));
+ return EFI_SUCCESS;
+ }
+#endif
+
+ return EFI_UNSUPPORTED;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: TbtDxeInvokeSmiHandler
+//
+// Description: Invoke SW SMI befor boot for reaource adjust.
+//
+// Input: None
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID TbtDxeInvokeSmiHandler(){
+ AMI_TBT_PLATFORM_POLICY_PROTOCOL *gAmiTbtPlatformPolicy = NULL;
+ EFI_GUID gOemTbtProtocolGuid = AMI_TBT_PLATFROM_POLICY_PROTOCOL_GUID;
+ EFI_STATUS Status;
+
+ TRACE((-1, "TbtDxe: TbtDxeInvokeSmiHandler\n"));
+ Status = pBS->LocateProtocol( &gOemTbtProtocolGuid, \
+ NULL, \
+ &gAmiTbtPlatformPolicy);
+ if ((!EFI_ERROR(Status)) && (gAmiTbtPlatformPolicy->TbtEnable)){
+ IoWrite8 (SW_SMI_IO_ADDRESS, TBT_SWSMI_VALUE); //trigger SwSMI for Thunderbolt
+ }
+}
+
+#if defined ULT_SUPPORT && ULT_SUPPORT == 1
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: IsULTPchSeries
+//
+// Description: This function is to get PCH series is ULT series or not
+//
+// Input: None
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN
+IsULTPchSeries( VOID ){
+ UINT16 PchDeviceId;
+
+ PchDeviceId = MmPciRead16 (0x00, LPC_DEVICE, LPC_FUNC, 0x02);
+ switch(PchDeviceId){
+ case 0x9C40: ///< LynxPoint LP Unfuse
+ case 0x9C41: ///< LynxPoint LP Mobile Super SKU
+ case 0x9C42: ///< LynxPoint LP Mobile TBD SKU
+ case 0x9C43: ///< LynxPoint LP Mobile Premium SKU
+ case 0x9C44: ///< LynxPoint LP Mobile TBD SKU
+ case 0x9C45: ///< LynxPoint LP Mobile Mainstream SKU
+ case 0x9C46: ///< LynxPoint LP Mobile TBD SKU
+ case 0x9C47: ///< LynxPoint LP Mobile Value SKU
+ case 0x9CC1: ///< WildcatPoint LP Mobile Super SKU HSW
+ case 0x9CC2: ///< WildcatPoint LP Mobile Super SKU BDW U
+ case 0x9CC3: ///< WildcatPoint LP Mobile Premium SKU BDW U
+ case 0x9CC4: ///< WildcatPoint LP Mobile TBD SKU
+ case 0x9CC5: ///< WildcatPoint LP Mobile Base SKU BDW U
+ case 0x9CC6: ///< WildcatPoint LP Mobile Super SKU BDW Y
+ case 0x9CC7: ///< WildcatPoint LP Mobile Premium SKU BDW Y
+ case 0x9CC8: ///< WildcatPoint LP Mobile TBD SKU
+ case 0x9CC9: ///< WildcatPoint LP Mobile Base SKU BDW Y
+ case 0x9CCA: ///< WildcatPoint LP Mobile TBD SKU
+ case 0x9CCB: ///< WildcatPoint LP Mobile Performance SKU
+ return TRUE;
+ }
+ return FALSE;
+}
+#endif
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtDxe/TbtDxeLib.h b/Board/EM/Thunderbolt/TbtDxe/TbtDxeLib.h
new file mode 100644
index 0000000..a1dbaa0
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtDxe/TbtDxeLib.h
@@ -0,0 +1,74 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtDxe/TbtDxeLib.h 2 6/21/13 7:41a Barretlin $
+//
+// $Revision: 2 $
+//
+// $Date: 6/21/13 7:41a $
+//*************************************************************************
+// Revision History
+// ----------------
+//
+//*************************************************************************
+#include <Efi.h>
+#include <token.h>
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+
+#ifndef __TBTDXELIB_H__
+#define __TBTDXELIB_H__
+
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined TBT_INTEL_RC_CONFIG && TBT_INTEL_RC_CONFIG == 1
+EFI_STATUS TbtProtectedPciDevice
+(
+ IN PCI_DEV_INFO *PciDevice
+);
+#endif
+
+VOID TbtDxeInvokeSmiHandler();
+
+#if defined ULT_SUPPORT && ULT_SUPPORT == 1
+BOOLEAN
+IsULTPchSeries
+(
+ VOID
+);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtDxe/TbtGpe.asl b/Board/EM/Thunderbolt/TbtDxe/TbtGpe.asl
new file mode 100644
index 0000000..ad17b9f
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtDxe/TbtGpe.asl
@@ -0,0 +1,797 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtDxe/TbtGpe.asl 22 5/19/14 7:32a Barretlin $
+//
+// $Revision: 22 $
+//
+// $Date: 5/19/14 7:32a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtDxe/TbtGpe.asl $
+//
+// 22 5/19/14 7:32a Barretlin
+// [TAG] EIP165410
+// [Category] New Feature
+// [Description] Support Thunderbolt AIC at NB PCIE slot
+// [Files] TbtPei.c TbtDxe.c TbtGpe.asl TbtSmm.c TbtOemBoard.c
+// TbtOemLib.c TbtOemLib.h TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+// TbtSetupReset.c
+//
+// 21 5/19/14 7:13a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Using setup item choose return value of _RMV method in
+// ASL code
+// [Files] TbtDxe.c TbtGpe.asl TbtOemBoard.c TbtOemBoard.h TbtSetup.sd
+// TbtSetup.sdl TbtSetup.uni
+//
+// 20 2/22/14 5:50p Barretlin
+// [TAG] EIP N/A
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] For Cactus Ridge host the thunderbolt hotplug event cannot
+// be trigger
+// [RootCause] signal event is not trigger under _INI/TINI method cause
+// OS will not set GPE event enable bit
+// [Solution] Change signal event location of _INI/TINI method
+// [Files] TbtGpe.asl
+//
+// 19 2/18/14 12:07p Barretlin
+//
+// 18 2/18/14 6:02a Barretlin
+// [TAG] EIP152401
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Update Intel Thunderbolt Sample code rev 1.9
+// [Files] TbtSmm.c TbtGpe.asl TbtOemPorting.asl
+//
+// 17 1/05/14 1:43p Barretlin
+// [TAG] EIP N/A
+// [Category] New Feature
+// [Description] Support Thunderbolt feature Enable/Disable in run time
+// Support dynamic Thunderbolt AIC location in run time
+// [Files] TbtDxe.c TbtGpe.asl
+//
+// 16 7/26/13 2:24a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] remove non Intel RC config
+// [Files] TbtGpe.asl
+//
+// 15 6/21/13 7:41a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix build error with non Intel RC project
+// [Files] TbtDxe.sdl TbtDxe.c TbtGpe.asl TbtDxeLib.h
+//
+// 14 6/19/13 9:24a Barretlin
+// [TAG] EIP126581
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Update Intel Thunderbolt sample code to rev. 1.7
+// [Files] TbtGpe.asl
+//
+// 13 5/27/13 8:57a Barretlin
+// [TAG] EIP124914
+// [Category] New Feature
+// [Description] Support Falcon Ridge chip
+// [Files] TbtGpe.asl
+//
+// 12 5/27/13 8:54a Barretlin
+// [TAG] EIP122882
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] let system entering sleep status continually and waking up
+// system via Thunderbolt Lan device, system will auto-wake
+// [RootCause] PCIE PME status is not cleared by ASL in SB module
+// [Solution] Clear PCIE PME status againg before system entring sleep
+// status
+// [Files] TbtDxe.sdl TbtGpe.asl
+//
+// 11 5/27/13 8:46a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] add sychronized method to make sure executed sequence
+// is one by one
+// [Files] TbtGpe.asl
+//
+// 10 4/12/13 1:18p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Rollback OSUP method and following Intel sample code
+// [Files] TbtGpe.asl
+//
+// 9 4/10/13 2:31p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Change reported MMIO address way in ASL code
+// [Files] TbtDxe.c TbtGpe.asl
+//
+// 8 4/10/13 1:37p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Adding a TPTS method into _PTS method in ASL code
+// [Files] TbtDxe.sdl TbtGpe.asl
+//
+// 7 4/03/13 8:42a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix might hang up when S3 resuming
+// [Files] TbtGpe.asl
+//
+// 6 3/21/13 4:58a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Use token to decide where location of OS_UP command for
+// RR chip is
+// [Files] TbtDxe.sdl TbtGpe.asl
+//
+// 5 2/08/13 1:23a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Following Intel sample code move _INI method of
+// thunderbolt from under PCIE root port to under system bus
+// [Files] TbtDxe.sdl TbtGpe.asl
+//
+// 4 2/06/13 7:49a Barretlin
+// [TAG] EIP114556
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Update RR handshake flow for Thunderbolt RR Spec 0.9
+// [Files] TbtGpe.asl
+//
+// 3 1/24/13 1:31a Barretlin
+// [TAG] EIP N/A
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] TBT debug setup item function fail
+// [RootCause] ASL updating error
+// [Files] TbtGpe.asl
+//
+// 2 1/18/13 2:26a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Improve _RMV ASL code for SharkBay RC
+// [Files] TbtDxe.sdl TbtDxe.c TbtGpe.asl
+//
+// 1 1/10/13 4:56a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 6 12/12/12 3:02a Barretlin
+// [TAG] EIP108272
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update to Spec 1.4 to support Redwood Ridge chip
+// [Files] TbtPei.c TbtSmm.c TbtDxe.c TbtDxe.sdl TbtGpe.asl
+// TbtOemBoard.c TbtOemBoard.h TbtOemLib.c TbtOemLib.h
+//
+// 5 10/28/12 10:50p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Change GPIO routing for SharkBay ULT platform
+// [Files] TbtDxe.c TbtGpe.asl TbtDxeLib.c TbtDxeLib.h TbtSmm.c
+//
+// 4 5/07/12 6:34a Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Add three setup items for debug
+// [Files] TbtDxe.c
+// TbtGpe.asl
+// TbtSmm.c
+// TbtSetup.sd
+// TbtSetup.uni
+// TbtOemBoard.c
+// TbtOemBoard.h
+//
+// 3 4/16/12 10:17a Barretlin
+// [TAG] EIP86590
+// [Category] Bug Fix
+// [Symptom] Only EP#1 can be detected after resume from S3
+// [Solution] Adding a TWAK method into _WAK method
+// [Files] TbtDxe.sdl TbtGpe.asl
+//
+// 2 4/14/12 4:50a Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Improve ASL code, which redefines device name and RMV
+// mothod at same address when project supports RMV method, that might
+// cause conflict.
+// [Files] TbtDxe.c TbtGpe.asl
+//
+// 1 12/08/11 4:09a Wesleychen
+// Thunderbolt eModule initially releases.
+//
+//*************************************************************************
+Scope(\)
+{
+ Mutex(OSUM, 0) // OS Up mutex
+ Event(WFEV)
+// Name(TBTE, 0) // Thunderbolt function enable
+ Name(PEMA, ASL_PCIEX_BASE_ADDRESS) // PCIE base address
+ Name(TBRP, ASL_TBT_RPNum) // PCIE root port location for Thunderbolt Host
+ Name(TBUS, 0xFF) // Thunderbolt Host BUS number
+ Name(TBHR, 0xFF) //1:Cactus Ridge 2:Redwood Ridge 3:Falcon Ridge 4:Win Ridge will be updated
+ Name(TBMV, 0xFF) // _RMV return value for Thunderbolt
+ Name(RPR6, 0)
+ Name(RPR7, 0)
+ Name(RPR8, 0)
+ Name(RPR9, 0)
+ Name(RPRA, 0)
+ Name(RPRB, 0)
+}
+
+Scope(\_SB)
+{
+ // Include OEM porting required ASL
+ Include("..\\TbtOemBoard\\TbtOemPorting.asl")
+
+ // WMI ACPI device to control TBT force power
+ Device(WMTF)
+ {
+ // pnp0c14 is pnp id assigned to WMI mapper
+ Name(_HID, "PNP0C14")
+ Name(_UID, "TBFP")
+
+ Name(_WDG, Buffer() {
+ // {86CCFD48-205E-4A77-9C48-2021CBEDE341}
+ 0x48, 0xFD, 0xCC, 0x86,
+ 0x5E, 0x20,
+ 0x77, 0x4A,
+ 0x9C, 0x48,
+ 0x20, 0x21, 0xCB, 0xED, 0xE3, 0x41,
+ 84, 70, // Object Id (TF)
+ 1, // Instance Count
+ 0x02 // Flags (WMIACPI_REGFLAG_METHOD)
+ })
+
+ // Set TBT force power
+ // Arg2 is force power value
+ Method(WMTF, 3)
+ {
+ CreateByteField(Arg2,0,FP)
+
+ If(FP)
+ {
+ TBFP(1)
+ }
+ Else
+ {
+ TBFP(0)
+ }
+ }
+ }
+}
+
+Scope(\_GPE)
+{
+ // OSUP method apply TB2P<->P2TB handshake procedure
+ // with Command = OS_Up
+ // Arg0 - Memory mapped IO address of RR host router upstream port
+ Method(OSUP, 1)
+ {
+ Add(Arg0, 0x548, Local0)
+ OperationRegion(PXVD,SystemMemory,Local0,0x08)
+ Field(PXVD,DWordAcc, NoLock, Preserve)
+ {
+ TB2P, 32,
+ P2TB, 32
+ }
+
+ Store(100, Local1)
+ Store(0x0D, P2TB) // Write (OS_Up << 1) | 1 to PCIe2TBT
+ While(LGreater(Local1, 0))
+ {
+ Store(Subtract(Local1, 1), Local1)
+ Store(TB2P, Local2)
+ If(LEqual(Local2, 0xFFFFFFFF))// Device gone
+ {
+ Return(2)
+ }
+ If(And(Local2, 1)) // Done
+ {
+ break
+ }
+ Sleep(50)
+ }
+ Store(0x00, P2TB) // Write 0 to PCIe2TBT
+ Return(1)
+ }
+
+ Method(MMRP)
+ {
+ // Calculate Memory mapped IO address of RR host router PCIE root port
+ // And put it into XXXXX
+
+ Store(\PEMA, Local0)
+ If(LLessEqual(ToInteger(TBRP), 0x08)) // SB PCIE root port
+ {
+ Add(Local0, 0xE0000, Local0) // RP01
+ Subtract(ToInteger(\TBRP), 1, Local1)
+ Multiply(Local1, 0x1000, Local1)
+ Add(Local0, Local1, Local0) //RP0x
+ }
+ Else // NB PCIE root port
+ {
+ Add(Local0, 0x8000, Local0) //PEG0
+ Subtract(ToInteger(\TBRP), 0x20, Local1)
+ Multiply(Local1, 0x1000, Local1)
+ Add(Local0, Local1, Local0)
+ }
+ Return(Local0)
+ }
+
+ // Calculate Memory mapped IO address of RR host router upstream port
+ Method(MMTB)
+ {
+ // Calculate Memory mapped IO address of RR host router upstream port
+ // And put it into XXXXX
+
+ Store(MMRP(), Local0)
+ OperationRegion(MMMM, SystemMemory, Local0, 0x1A)
+ Field(MMMM, AnyAcc, NoLock, Preserve)
+ {
+ Offset(0x19),
+ SBUS, 8
+ }
+
+ Store(SBUS, Local2)
+ Store(\PEMA, Local0)
+ Multiply(Local2, 0x100000, Local2)
+ Add(Local0, Local2, Local0) //TBT HR US port MMIO address
+ Return(Local0)
+ }
+
+ Method(GDRP)
+ {
+ // Put TBT PCIE root port to D0 state
+
+ Store(MMRP(), Local0)
+ OperationRegion(RP_X, SystemMemory, Local0, 0x100)
+ Field(RP_X, AnyAcc, NoLock, Preserve)
+ {
+ Offset(0x84),
+ NBPS, 2, // Power State of PEG slot
+ Offset(0xA4),
+ PSD3, 2 // Power State of SB PCIE slot
+ }
+ If(LLess(TBRP, 0x20)){
+ Store(0, PSD3)
+ Return (PSD3)
+ }
+ If(LGreaterEqual(TBRP, 0x20)){
+ Store(0, NBPS)
+ Return (NBPS)
+ }
+ }
+
+ Method(RPDX, 1)
+ {
+ // Change TBT PCIE root port Power state via Arg0
+ // Arg0 - 0: D0 Status
+ // 3: D3 Status
+
+ Store(MMRP(), Local0)
+ OperationRegion(RP_X, SystemMemory, Local0, 0x100)
+ Field(RP_X, AnyAcc, NoLock, Preserve)
+ {
+ Offset(0x84),
+ NBPS, 2, // Power State of PEG slot
+ Offset(0xA4),
+ PSD3, 2
+ }
+ If(LLess(TBRP, 0x20)){
+ Store(Arg0, PSD3)
+ Sleep(100)
+ }
+ If(LGreaterEqual(TBRP, 0x20)){
+ Store(Arg0, NBPS)
+ Sleep(100)
+ }
+ }
+
+ Method(TBAC)
+ {
+ // Equal Intel BIOS method TSUB and WSUB
+
+ Acquire(OSUM, 0xFFFF)
+ Store(MMRP(), Local0)
+ OperationRegion(RP_X, SystemMemory, Local0, 0x100)
+ Field(RP_X, AnyAcc, NoLock, Preserve)
+ {
+ Offset(0x08),
+ RDCC, 32,
+ Offset(0x18),
+ PBUS, 8,
+ SBUS, 8,
+ SUBS, 8,
+ Offset(0x84),
+ NBPS, 2, // Power State of PEG slot
+ Offset(0xA4),
+ PSD3, 2
+ }
+ Store(0, Local1)
+ While(1)
+ {
+ If(LAnd(LNotEqual(RDCC, 0xFFFFFFFF), LNotEqual(SBUS, 0xFF)))
+ {
+ If(LAnd(LLess(TBRP, 0x20), LEqual(PSD3, 0x0))){
+ Break
+ }
+ If(LAnd(LGreaterEqual(TBRP, 0x20), LEqual(PSD3, 0x0))){
+ Break
+ }
+ }
+ Else
+ {
+ Add(Local1, 0x01, Local1)
+ If(LGreater(Local1, 0x03E8))
+ {
+ P8XH(1,0x7B)
+ P8XH(0,0xAC)
+ Sleep(0x3E8)
+ Break
+ }
+ Else
+ {
+ Sleep(0x10)
+ }
+ }
+ }
+ Release(OSUM)
+ }
+
+ Method(NTFY)
+ {
+ // Intel Chipset Sample code Notify Method
+ Sleep(100)
+ Switch(ToInteger(TBRP)) // TBT Selector
+ {
+ Case (1)
+ {
+ Notify(\_SB.PCI0.RP01,0)
+ }
+ Case (2)
+ {
+ Notify(\_SB.PCI0.RP02,0)
+ }
+ Case (3)
+ {
+ Notify(\_SB.PCI0.RP03,0)
+ }
+ Case (4)
+ {
+ Notify(\_SB.PCI0.RP04,0)
+ }
+ Case (5)
+ {
+ Notify(\_SB.PCI0.RP05,0)
+ }
+ Case (6)
+ {
+ Notify(\_SB.PCI0.RP06,0)
+ }
+ Case (7)
+ {
+ Notify(\_SB.PCI0.RP07,0)
+ }
+ Case (8)
+ {
+ Notify(\_SB.PCI0.RP08,0)
+ }
+ Case (0x20)
+ {
+ Notify(\_SB.PCI0.PEG0,0)
+ }
+ Case (0x21)
+ {
+ Notify(\_SB.PCI0.PEG1,0)
+ }
+ Case (0x22)
+ {
+ Notify(\_SB.PCI0.PEG2,0)
+ }
+ }
+ }
+
+ // Check for 0xFFFFFFFF in TBT Vendor/Device ID
+ // And Call OSUP if true
+ Method(TBFF)
+ {
+ // Get mapped IO address of RR host router upstream port
+ Store(MMTB(), Local0)
+ OperationRegion(PXVD,SystemMemory,Local0,0x4)
+ Field(PXVD,DWordAcc, NoLock, Preserve)
+ {
+ VEDI, 32 // Vendor/Device ID
+ }
+
+ //Check Vendor/Device ID for 0xFFFFFFFF
+ Store(VEDI, Local1)
+ If(LEqual(Local1, 0xFFFFFFFF))
+ {
+ Return (OSUP(Local0))
+ }
+ Else
+ {
+ Return (0)
+ }
+ }
+
+ Method(OE1X)
+ {
+ Name(TSNE, 0xFF) //will be updated by setup menu
+
+ If(LLess(OSYS,2009)) { Return() } // only support win7 or above OS
+
+ Wait(WFEV, 0xFFFF)
+ Signal(WFEV)
+ TBAC()
+ Acquire(OSUM, 0xFFFF)
+ If(LNotEqual(\TBHR, 0x01))// For Redwood Ridge/Falcon Ridge
+ {
+ Store(TBFF(), Local0)
+ If(LEqual(Local0, 1))// Only HR
+ {
+ Sleep(16)
+ Release(OSUM)
+ Return ()
+ }
+ If(LEqual(Local0, 2)) // Disconnect
+ {
+ If(And(TSNE, 0x02)) // If notification is enabled call Notify
+ {
+ Sleep(16)
+ NTFY()
+ }
+ P8XH(0,0x7D)
+ Release(OSUM)
+ Return ()
+ }
+ }
+
+ If(And(TSNE, 0x01))
+ {
+ Store(TBSW, SSMP)
+ }
+ If(And(TSNE, 0x02))
+ {
+ NTFY()
+ }
+ Sleep(16)
+ Release(OSUM)
+ }
+}
+
+#if defined (ASL_TBT_RMV_REPORT) && (ASL_TBT_RMV_REPORT == 1)
+Scope (ASL_TBT_RP_NUM.PXSX)
+{
+ Method(_RMV)
+ {
+ Return(TBMV)
+ } // end _RMV
+}
+#endif
+
+Scope (ASL_TBT_RP_NUM)
+{
+#if defined ASL_TBT_PCI0_INI_SUPPORT && ASL_TBT_PCI0_INI_SUPPORT == 1
+ Method(TINI,0)
+#else
+ Method(_INI,0)
+#endif
+ {
+ If(LLess(OSYS,2009)) { Return() } // only support win7 or above OS
+
+ If(LAnd(LNotEqual(\TBHR, 0xFF), LNotEqual(\TBHR, 0x01)))// For Redwood Ridge/Falcon Ridge
+ {
+ Acquire(OSUM, 0xFFFF)
+ P8XH(0, 0x51) // for debug
+/*
+ Store(MMRP(), Local1)
+ OperationRegion(RP_X, SystemMemory, Local1, 0x20)
+ Field(RP_X, DWordAcc, NoLock, Preserve)
+ {
+ REG0, 32,
+ REG1, 32,
+ REG2, 32,
+ REG3, 32,
+ REG4, 32,
+ REG5, 32,
+ REG6, 32,
+ REG7, 32,
+ }
+ Store(REG6, Local2)
+ Store(0x00F0F000, REG6)
+*/
+ \_GPE.TBAC()
+ // Get memory mapped IO address of RR host router upstream port
+ Store(\_GPE.MMTB(), Local3)
+ // Call OSUP
+ \_GPE.OSUP(Local3)
+ Release(OSUM)
+ }
+ Signal(WFEV)
+ }
+
+#if defined(ASL_TBT_WAK_SUPPORT) && (ASL_TBT_WAK_SUPPORT==1)
+ Method(TWAK, 1)
+ {
+ Name(RPL1, 0)
+ Name(RPL6, 0)
+ Name(RPL7, 0)
+ Name(RPL8, 0)
+ Name(RPL9, 0)
+ Name(RPLA, 0)
+ Name(RPLB, 0)
+
+ If(LLess(OSYS,2009)) { Return() } // only support win7 or above OS
+
+ If(LAnd(LNotEqual(\TBHR, 0xFF), LNotEqual(\TBHR, 0x01)))// Only for Redwood Ridge/Falcon Ridge
+ {
+ Acquire(OSUM, 0xFFFF)
+ \_GPE.TBAC()
+ //Sleep(50) // fix hang up when S3 resuming
+ // Get memory mapped IO address of RR host router upstream port
+ Store(\_GPE.MMRP(), Local0)
+ OperationRegion(RP_X, SystemMemory, Local0, 0x34)
+ Field(RP_X, DWordAcc, NoLock, Preserve)
+ {
+ REG0, 32,
+ REG1, 32,
+ REG2, 32,
+ REG3, 32,
+ REG4, 32,
+ REG5, 32,
+ REG6, 32,
+ REG7, 32,
+ REG8, 32,
+ REG9, 32,
+ REGA, 32,
+ REGB, 32,
+ REGC, 32,
+ }
+ Store(REG1, RPL1)
+ Store(REG6, RPL6)
+ Store(REG7, RPL7)
+ Store(REG8, RPL8)
+ Store(REG9, RPL9)
+ Store(REGA, RPLA)
+ Store(REGB, RPLB)
+ Store(RPR6, REG6)
+ Store(RPR7, REG7)
+ Store(RPR8, REG8)
+ Store(RPR9, REG9)
+ Store(RPRA, REGA)
+ Store(RPRB, REGB)
+ Store(0x00100007, REG1)
+ Store(\_GPE.GDRP(), Local2)
+ \_GPE.RPDX(Zero)
+ Store(\_GPE.MMTB(), Local3)
+ // Call OSUP
+ \_GPE.OSUP(Local3)
+ // Restore TBT root port resource/bus/cmd/D state registers as before Sx entry
+ Store(TBSW, SSMP)
+ // Restore original register values as before calling SMI
+ Store(RPL1, REG1)
+ Store(RPL6, REG6)
+ Store(RPL7, REG7)
+ Store(RPL8, REG8)
+ Store(RPL9, REG9)
+ Store(RPLA, REGA)
+ Store(RPLB, REGB)
+ \_GPE.RPDX(Local2)
+ Release(OSUM)
+
+ // For TBT host at NB PCIE slot
+ If(LGreaterEqual(ToInteger(TBRP), 0x20))
+ {
+ Switch(ToInteger(TBRP))
+ {
+ Case (0x20)
+ {
+ Notify(\_SB.PCI0.PEG0,0)
+ }
+ Case (0x21)
+ {
+ Notify(\_SB.PCI0.PEG1,0)
+ }
+ Case (0x22)
+ {
+ Notify(\_SB.PCI0.PEG2,0)
+ }
+ }
+ }
+ }
+
+#if defined(ASL_TBT_S3_WAK_SMI) && (ASL_TBT_S3_WAK_SMI == 1) && (ASL_TBT_WAK_SUPPORT == 1)
+ Store(Arg0,Local0)
+ If(LEqual(Local0, 0x03)){
+ If(ASL_TBT_RP_NUM.PDSX){
+ Store(TBSW, SSMP)
+ NTFY()
+ }
+ }
+#endif
+ Signal(WFEV)
+ }
+#endif
+
+#if defined(ASL_TBT_PTS_SUPPORT) && (ASL_TBT_PTS_SUPPORT==1)
+ Method(TPTS, 1)
+ {
+ If(LLess(OSYS,2009)) { Return() } // only support win7 or above OS
+
+ If(LAnd(LNotEqual(\TBHR, 0xFF), LNotEqual(\TBHR, 0x01)))// Only for Redwood Ridge/Falcon Ridge
+ {
+ Acquire(OSUM, 0xFFFF)
+ Store(\_GPE.MMRP(), Local0)
+ OperationRegion(RP_X, SystemMemory, Local0, 0x34)
+ Field(RP_X, DWordAcc, NoLock, Preserve)
+ {
+ REG0, 32,
+ REG1, 32,
+ REG2, 32,
+ REG3, 32,
+ REG4, 32,
+ REG5, 32,
+ REG6, 32,
+ REG7, 32,
+ REG8, 32,
+ REG9, 32,
+ REGA, 32,
+ REGB, 32,
+ REGC, 32,
+ }
+ Store(REG6, RPR6)
+ Store(REG7, RPR7)
+ Store(REG8, RPR8)
+ Store(REG9, RPR9)
+ Store(REGA, RPRA)
+ Store(REGB, RPRB)
+ Release(OSUM)
+ }
+#if defined(ASL_TBT_CLEAR_PME_STATUS) && (ASL_TBT_CLEAR_PME_STATUS == 1)
+ If(LOr(PSPX, PMEP)){
+ Store(PMEX, Local1)
+ Store(0, PMEX)
+ Sleep(10)
+ Store(1, PSPX)
+ Sleep(10)
+ If(PSPX){
+ Store(1, PSPX)
+ Sleep(10)
+ }
+ Store(Local1, PMEX)
+ }
+#endif
+ Reset(WFEV)
+ }
+#endif
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.c b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.c
new file mode 100644
index 0000000..ce78068
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.c
@@ -0,0 +1,415 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtOemBoard.c 7 5/19/14 7:38a Barretlin $
+//
+// $Revision: 7 $
+//
+// $Date: 5/19/14 7:38a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtOemBoard.c $
+//
+// 7 5/19/14 7:38a Barretlin
+// [TAG] EIP165410
+// [Category] New Feature
+// [Description] Support Thunderbolt AIC at NB PCIE slot
+// [Files] TbtPei.c TbtDxe.c TbtGpe.asl TbtSmm.c TbtOemBoard.c
+// TbtOemLib.c TbtOemLib.h TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+// TbtSetupReset.c
+//
+// 6 5/19/14 7:15a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Using setup item choose return value of _RMV method in
+// ASL code
+// [Files] TbtDxe.c TbtGpe.asl TbtOemBoard.c TbtOemBoard.h TbtSetup.sd
+// TbtSetup.sdl TbtSetup.uni
+//
+// 5 2/18/14 2:12a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Release PCIE root port control when Thunderbolt
+// function disable in run time
+// [Files] TbtOemBoard.c
+//
+// 4 2/10/14 1:26p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] remove useless policy item and setup item
+// [Files] TbtOemBoard.h TbtOemBoard.c TbSetup.sdl TbtSetup.sd
+// TbtSetup.uni TbtSmm.c
+//
+// 3 1/05/14 2:06p Barretlin
+// [TAG] EIP N/A
+// [Category] New Feature
+// [Description] Support Thunderbolt feature Enable/Disable in run time
+// Support dynamic Thunderbolt AIC location in run time
+// [Files] TbtOemBoard.h TbtOemBoard.c TbtOemLib.c TbtOemLib.h
+//
+// 2 6/17/13 2:18a Barretlin
+// [TAG] EIP126581
+// [Category] Improvement
+// [Description] add new AIC support setup item and change
+// TBWakeupSupport name
+// [Files] TbtOemBoard.h TbtOemBoard.c
+//
+// 1 1/10/13 4:57a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 12 12/12/12 4:14a Barretlin
+// [TAG] EIP108272
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update to Spec 1.4 to support Redwood Ridge chip
+// [Files] TbtPei.c TbtSmm.c TbtDxe.c TbtDxe.sdl TbtGpe.asl
+// TbtOemBoard.c TbtOemBoard.h TbtOemLib.c TbtOemLib.h
+//
+// 11 10/28/12 11:50p Barretlin
+// [TAG] EIP104870
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Change wake up flow for Spec 1.2 and Spec 1.3
+// [Files] TbtPei.c TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+// TbtOemBoard.sdl TbtOemLib.c TbtOemLib.h
+//
+// 10 10/28/12 11:21p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Create new setup item for thunderbolt POC handling
+// [Files] TbtOemBoard.c TbtOemBoard.h TbtSetup.sdl TbtSetup.sd
+// TbtSetup.uni
+//
+// 9 9/22/12 9:59a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Use token to defien thunderbolt chip pins and update
+// sample code
+// [Files] TbtOemBoard.c TbtOemBoard.sdl
+//
+// 8 8/20/12 5:12a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix IO resource workaround broken in 4C 2port case
+// [Files] TbtSmm.c TbtOemBoard.c TbtOemBoard.h TbtSetup.sdl
+// TbtSetup.sd TbtSetup.uni
+//
+// 7 8/17/12 8:44a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Add IO resource workaround for Thunderbolt Spec1.1
+// Because new spec has removed IO resource for Thunderbolt device
+// [Files] TbtSmm.c TbtOemBoard.h TbtOemBoard.c TbtSetup.sdl
+// TbtSetup.sd TbtSetup.uni
+//
+// 6 7/31/12 4:07a Barretlin
+// [TAG] EIP96350
+// [Category] Spec Update
+// [Severity] Critical
+// [Description] Updated Thunderbolt specification to version 1.00
+// [Files] TbtDxe.c TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+// TbtOemBoard.sdl TbtSetup.sd TbtSetup.uni
+//
+// 5 7/31/12 3:15a Barretlin
+// [TAG] EIP91119
+// [Category] Improvement
+// [Description] Resolution for enable/disable Thunderbolt device option
+// rom at POST time
+// [Files] TbtDxe.c TbtOemBoard.c TbtOemBoard.h TbtOemBoard.sdl
+// TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+//
+// 4 5/22/12 10:00a Barretlin
+// [TAG] EIP90650
+// [Category] Spec Update
+// [Description] Specificatoin Update 0.94 - The default value of
+// OPTIONAL workaround for devices that don't support surprise-removal
+// should be disable.
+// [Files] TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+// TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+//
+// 3 5/07/12 7:00a Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Add three setup items for debug
+// [Files] TbtDxe.c
+// TbtGpe.asl
+// TbtSmm.c
+// TbtSetup.sd
+// TbtSetup.uni
+// TbtOemBoard.c
+// TbtOemBoard.h
+//
+// 2 2/20/12 12:01a Wesleychen
+// - Add new policy "SmiNotifyEnabled".
+// - Move OemProgramTbtSecurityLevel() to TbtDxe.c.
+//
+// 1 12/08/11 4:09a Wesleychen
+// Thunderbolt eModule initially releases.
+//
+//*************************************************************************
+#include <Efi.h>
+#include <token.h>
+#include <Setup.h>
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+#include <TbtOemLib.h>
+#include <TbtOemBoard.h>
+
+// GUID Definition(s)
+EFI_GUID AmiTbtPlatformPpolicyGuid = AMI_TBT_PLATFROM_POLICY_PROTOCOL_GUID;
+EFI_GUID TbtHRStatusGuid = AMI_TBT_HR_STATUS_GUID;
+EFI_GUID SetupGuid = SETUP_GUID;
+
+// Variable Declaration(s)
+AMI_TBT_PLATFORM_POLICY_PROTOCOL gTbtPlatformPolicy;
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: TbtOemBoard_Init
+//
+// Description: This function is the entry point for TbtOemBoard.
+//
+// Input: ImageHandle - Image handle
+// SystemTable - Pointer to the system table
+//
+// Output: Return Status based on errors that occurred while waiting for
+// time to expire.
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS TbtOemBoard_Init (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable )
+{
+ //
+ // OEM Porting is required.
+ //
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_HANDLE Handle = NULL;
+ UINTN VariableSize = sizeof(SETUP_DATA);
+ UINTN HRStatusSize = sizeof(AMI_TBT_HR_STATUS_DATA);
+ UINT32 Attributes;
+ UINT16 counter;
+ UINT8 TbtSetVariableFlag = 0;
+ CHAR16 TbtHRStatusVar[] = TBT_HR_STATUS_VARIABLE;
+ AMI_TBT_HR_STATUS_DATA HRStatusData;
+ SETUP_DATA SetupData;
+
+ InitAmiLib(ImageHandle, SystemTable);
+
+ //Initial Host Router information
+ Status = pRS->GetVariable( L"TbtHRStatusVar", \
+ &TbtHRStatusGuid, \
+ NULL, \
+ &HRStatusSize, \
+ &HRStatusData );
+ if (EFI_ERROR(Status)){
+ TRACE((-1, "TbtOemBoard: Can not get Thunderbolt Host Router Information !!! \n"));
+ HRStatusData.TbtHRStatus = 0;
+ //Get Thunderbolt host Series
+ HRStatusData.TbtHRSeries = GetHRInfo();
+ TRACE((-1, "TbtOemBoard: Thunderbolt Host Router Chip: %x \n", HRStatusData.TbtHRSeries));
+
+ Status = pRS->SetVariable( TbtHRStatusVar, \
+ &TbtHRStatusGuid, \
+ EFI_VARIABLE_NON_VOLATILE | \
+ EFI_VARIABLE_BOOTSERVICE_ACCESS | \
+ EFI_VARIABLE_RUNTIME_ACCESS, \
+ HRStatusSize, \
+ &HRStatusData );
+ if (!EFI_ERROR(Status))
+ TRACE((-1, "TbtOemBoard: Create Thunderbolt Host Router Information !!! \n"));
+ }
+
+ Status = pRS->GetVariable( L"Setup", \
+ &SetupGuid, \
+ &Attributes, \
+ &VariableSize, \
+ &SetupData );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = pBS->AllocatePool( \
+ EfiBootServicesData, \
+ sizeof(AMI_TBT_PLATFORM_POLICY_PROTOCOL), \
+ (VOID**)&gTbtPlatformPolicy );
+ ASSERT_EFI_ERROR (Status);
+
+ TRACE((-1, "TbtOemBoard: Start install Thunderbolt Platform Policy !!! \n"));
+ pBS->SetMem( &gTbtPlatformPolicy, sizeof(AMI_TBT_PLATFORM_POLICY_PROTOCOL), 0 );
+
+ //
+ // OEM Porting required.
+ //
+/* Sample Code
+ gTbtPlatformPolicy.TbtEnable = SetupData.TbtEnable;
+ gTbtPlatformPolicy.TbtGO2SX = TBT_GO2SX;
+ gTbtPlatformPolicy.TbtForcePWR = TBT_ForcePWR;
+ gTbtPlatformPolicy.TbtHotPlugEvt = TBT_HotPlugEvt;
+ gTbtPlatformPolicy.TbtOK2GO2SX_N = TBT_OK2GO2SX_N;
+ gTbtPlatformPolicy.CacheLineSize = SetupData.TbtCacheLineSize;
+ gTbtPlatformPolicy.TbtWakeupSupport = SetupData.TbtWakeupSupport;
+ gTbtPlatformPolicy.TbtAICSupport = SetupData.TbtAICSupport;
+ gTbtPlatformPolicy.TbtHandlePOC = SetupData.TbtHandlePOC;
+ gTbtPlatformPolicy.TbtSecurityLevel = SetupData.TbtSecurityLevel;
+ gTbtPlatformPolicy.Bus = TBT_UP_PORT_BUS;
+ gTbtPlatformPolicy.Dev = TBT_UP_PORT_DEV;
+ if (gTbtPlatformPolicy.TbtAICSupport == 1){
+ if (SetupData.TbtHostLocation < 0x20){
+ gTbtPlatformPolicy.Fun = SetupData.TbtHostLocation;
+ } else {
+ gTbtPlatformPolicy.Dev = 0x01;
+ gTbtPlatformPolicy.Fun = (SetupData.TbtHostLocation) - 0x20;
+ }
+ } else {
+ gTbtPlatformPolicy.Fun = TBT_UP_PORT_FUNC;
+ }
+ gTbtPlatformPolicy.ReserveMemoryPerSlot = SetupData.ReserveMemoryPerSlot;
+ gTbtPlatformPolicy.ReservePMemoryPerSlot = SetupData.ReservePMemoryPerSlot;
+ gTbtPlatformPolicy.ReserveIOPerSlot = SetupData.ReserveIOPerSlot;
+ gTbtPlatformPolicy.SmiNotifyEnabled = SetupData.SmiNotifyEnabled;
+ gTbtPlatformPolicy.SwSmiEnabled = SetupData.SwSmiEnabled;
+ gTbtPlatformPolicy.NotifyEnabled = SetupData.NotifyEnabled;
+ gTbtPlatformPolicy.TbtOptionRom = SetupData.TbtOptionRom;
+ gTbtPlatformPolicy.TbtRmvReturnValue = SetupData.TbtRmvReturnValue;
+ gTbtPlatformPolicy.TbtIOresourceEnable = SetupData.TbtIOresourceEnable;
+ gTbtPlatformPolicy.TbtNVMversion = SetupData.TbtNVMversion;
+
+ Status = pBS->InstallProtocolInterface (
+ &Handle,
+ &AmiTbtPlatformPpolicyGuid,
+ EFI_NATIVE_INTERFACE,
+ &gTbtPlatformPolicy
+ );
+ ASSERT_EFI_ERROR (Status);
+//*/
+ //synchronize Thunderbolt Host Router Information with Setup Data
+ if (HRStatusData.TbtHRSeries != SetupData.TbtHRSeries){
+ TRACE((-1, "TbtOemBoard: Setting Thunderbolt Host Router Information into Setup Data!!! \n"));
+ SetupData.TbtHRSeries = HRStatusData.TbtHRSeries;
+ TbtSetVariableFlag |= 1;
+ }
+
+#if defined TBT_INTEL_RC_CONFIG && TBT_INTEL_RC_CONFIG == 1
+ if (gTbtPlatformPolicy.TbtEnable){
+ if (gTbtPlatformPolicy.TbtAICSupport){
+ if ((gTbtPlatformPolicy.Bus == 0) && (gTbtPlatformPolicy.Dev == 0x1C))
+ { // Thunderbolt AIC is at SB PCIE root port
+ if ((SetupData.PcieMemRsvd[gTbtPlatformPolicy.Fun] != 353) || \
+ (SetupData.PcieMemRsvd[gTbtPlatformPolicy.Fun] != 737)){
+ // Change PCIE root port resource to correct location
+ SetupData.PcieRootPortEn[gTbtPlatformPolicy.Fun] = 1;
+ SetupData.PcieRootPortHPE[gTbtPlatformPolicy.Fun] = 1;
+ SetupData.ExtraBusRsvd[gTbtPlatformPolicy.Fun] = TBT_DEFAULT_EXTRA_BUS_RESERVED;
+ SetupData.PcieMemRsvd[gTbtPlatformPolicy.Fun] = TBT_DEFAULT_PCIE_MEM_RESERVED;
+ SetupData.PcieMemRsvdalig[gTbtPlatformPolicy.Fun] = 26;
+ SetupData.PciePFMemRsvd[gTbtPlatformPolicy.Fun] = TBT_DEFAULT_PCIE_PF_MEM_RESERVED;
+ SetupData.PciePFMemRsvdalig[gTbtPlatformPolicy.Fun] = 28;
+ SetupData.PcieIoRsvd[gTbtPlatformPolicy.Fun] = TBT_DEFAULT_PCIE_IO_RESERVED;
+
+ // Double check resource on other PCIE root port is disable
+ for(counter=0;counter<=7;counter++){
+ if(counter != gTbtPlatformPolicy.Fun){
+ if((SetupData.PcieMemRsvd[counter] == 353) || \
+ (SetupData.PcieMemRsvd[counter] == 737))
+ {
+ SetupData.PcieRootPortHPE[counter] = 0;
+ SetupData.ExtraBusRsvd[counter] = 0;
+ SetupData.PcieMemRsvd[counter] = 10;
+ SetupData.PcieMemRsvdalig[counter] = 1;
+ SetupData.PciePFMemRsvd[counter] = 10;
+ SetupData.PciePFMemRsvdalig[counter] = 1;
+ SetupData.PcieIoRsvd[counter] = 4;
+ }
+ } // counter != gTbtPlatformPolicy.Fun
+ } // for loop
+
+ TbtSetVariableFlag |= 1;
+ } // PCIE root port resource is at incorrect location
+ } else {
+ // Thunderbolt AIC is at NB PCIE root port
+ // Double check resource on other PCIE root port is disable
+ for(counter=0;counter<=7;counter++){
+ if((SetupData.PcieMemRsvd[counter] == 353) || \
+ (SetupData.PcieMemRsvd[counter] == 737))
+ {
+ SetupData.PcieRootPortHPE[counter] = 0;
+ SetupData.ExtraBusRsvd[counter] = 0;
+ SetupData.PcieMemRsvd[counter] = 10;
+ SetupData.PcieMemRsvdalig[counter] = 1;
+ SetupData.PciePFMemRsvd[counter] = 10;
+ SetupData.PciePFMemRsvdalig[counter] = 1;
+ SetupData.PcieIoRsvd[counter] = 4;
+
+ TbtSetVariableFlag |= 1;
+ }
+ } // for loop
+ }
+ } else {
+ if ((SetupData.PcieMemRsvd[TBT_UP_PORT_FUNC] != 353) || \
+ (SetupData.PcieMemRsvd[TBT_UP_PORT_FUNC] != 737))
+ {
+ SetupData.TbtHostLocation = TBT_UP_PORT_FUNC;
+ SetupData.PcieRootPortEn[TBT_UP_PORT_FUNC] = 1;
+ SetupData.PcieRootPortHPE[TBT_UP_PORT_FUNC] = 1;
+ SetupData.ExtraBusRsvd[TBT_UP_PORT_FUNC] = TBT_DEFAULT_EXTRA_BUS_RESERVED;
+ SetupData.PcieMemRsvd[TBT_UP_PORT_FUNC] = TBT_DEFAULT_PCIE_MEM_RESERVED;
+ SetupData.PcieMemRsvdalig[TBT_UP_PORT_FUNC] = 26;
+ SetupData.PciePFMemRsvd[TBT_UP_PORT_FUNC] = TBT_DEFAULT_PCIE_PF_MEM_RESERVED;
+ SetupData.PciePFMemRsvdalig[TBT_UP_PORT_FUNC] = 28;
+ SetupData.PcieIoRsvd[TBT_UP_PORT_FUNC] = TBT_DEFAULT_PCIE_IO_RESERVED;
+
+ // Double check resource on other PCIE root port is disable
+ for(counter=0;counter<=7;counter++){
+ if(counter != TBT_UP_PORT_FUNC){
+ if((SetupData.PcieMemRsvd[counter] == 353) || (SetupData.PcieMemRsvd[counter] == 737)){
+ SetupData.PcieRootPortHPE[counter] = 0;
+ SetupData.ExtraBusRsvd[counter] = 0;
+ SetupData.PcieMemRsvd[counter] = 10;
+ SetupData.PcieMemRsvdalig[counter] = 1;
+ SetupData.PciePFMemRsvd[counter] = 10;
+ SetupData.PciePFMemRsvdalig[counter] = 1;
+ SetupData.PcieIoRsvd[counter] = 4;
+ }
+ } // counter != TBT_UP_PORT_FUNC
+ } // for loop
+
+ TbtSetVariableFlag |= 1;
+ } // PCIE root port resource is not at default location
+ } // gTbtPlatformPolicy.TbtAICSupport
+ } // gTbtPlatformPolicy.TbtEnable
+#endif
+
+ if (TbtSetVariableFlag != 0){
+ Status = pRS->SetVariable( L"Setup", &SetupGuid, Attributes,
+ VariableSize, &SetupData );
+ }
+
+ return EFI_SUCCESS;
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.cif b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.cif
new file mode 100644
index 0000000..32057d9
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.cif
@@ -0,0 +1,17 @@
+<component>
+ name = "TbtOemBoard"
+ category = ModulePart
+ LocalRoot = "Board\EM\Thunderbolt\TbtOemBoard\"
+ RefName = "TbtOemBoard"
+[files]
+"TbtOemBoard.h"
+"TbtOemBoard.c"
+"TbtOemBoard.dxs"
+"TbtOemBoard.mak"
+"TbtOemBoard.sdl"
+"TbtOemLib.c"
+"TbtOemLib.h"
+"TbtOemPorting.asl"
+[parts]
+"TbtSetup"
+<endComponent>
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.dxs b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.dxs
new file mode 100644
index 0000000..4aa8e93
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.dxs
@@ -0,0 +1,48 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtOemBoard.dxs 1 1/10/13 4:57a Barretlin $
+//
+// $Revision: 1 $
+//
+// $Date: 1/10/13 4:57a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtOemBoard.dxs $
+//
+// 1 1/10/13 4:57a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 1 12/08/11 4:09a Wesleychen
+// Thunderbolt eModule initially releases.
+//
+//**********************************************************************
+DEPENDENCY_START
+ TRUE
+DEPENDENCY_END
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.h b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.h
new file mode 100644
index 0000000..c4ce1ac
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.h
@@ -0,0 +1,328 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtOemBoard.h 11 5/19/14 7:15a Barretlin $
+//
+// $Revision: 11 $
+//
+// $Date: 5/19/14 7:15a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtOemBoard.h $
+//
+// 11 5/19/14 7:15a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Using setup item choose return value of _RMV method in
+// ASL code
+// [Files] TbtDxe.c TbtGpe.asl TbtOemBoard.c TbtOemBoard.h TbtSetup.sd
+// TbtSetup.sdl TbtSetup.uni
+//
+// 10 2/18/14 7:29a Barretlin
+// [TAG] EIP152401
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] add new Thunderbolt chip series
+// [Files] TbtOemBoard.h
+//
+// 9 2/10/14 1:26p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] remove useless policy item and setup item
+// [Files] TbtOemBoard.h TbtOemBoard.c TbSetup.sdl TbtSetup.sd
+// TbtSetup.uni TbtSmm.c
+//
+// 8 1/05/14 2:06p Barretlin
+// [TAG] EIP N/A
+// [Category] New Feature
+// [Description] Support Thunderbolt feature Enable/Disable in run time
+// Support dynamic Thunderbolt AIC location in run time
+// [Files] TbtOemBoard.h TbtOemBoard.c TbtOemLib.c TbtOemLib.h
+//
+// 7 7/26/13 1:53a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix build error at MahoBay/ChiefRiver platform
+// [Files] TbtPei.c TbtOemBoard.h
+//
+// 6 6/21/13 7:50a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix build error with non Intel RC project
+// [Files] TbtOemBoard.h TbtOemBoard.sdl
+//
+// 5 6/17/13 2:18a Barretlin
+// [TAG] EIP126581
+// [Category] Improvement
+// [Description] add new AIC support setup item and change
+// TBWakeupSupport name
+// [Files] TbtOemBoard.h TbtOemBoard.c
+//
+// 4 4/24/13 2:40a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Add new series
+// [Files] TbtOemBoard.h
+//
+// 3 4/03/13 3:04a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Adding mask definition for reading Redwood Ridge
+// command
+// [Files] TbtOemBoard.h
+//
+// 2 2/06/13 6:33a Barretlin
+// [TAG] EIP114556
+// [Category] Spec Update
+// [Severity] Normal
+// [Description] Add more definition for Thunderbolt RR Spec 0.9
+// [Files] TbtOemBoard.h
+//
+// 1 1/10/13 4:57a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 15 12/12/12 4:14a Barretlin
+// [TAG] EIP108272
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update to Spec 1.4 to support Redwood Ridge chip
+// [Files] TbtPei.c TbtSmm.c TbtDxe.c TbtDxe.sdl TbtGpe.asl
+// TbtOemBoard.c TbtOemBoard.h TbtOemLib.c TbtOemLib.h
+//
+// 14 10/28/12 11:50p Barretlin
+// [TAG] EIP104870
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Change wake up flow for Spec 1.2 and Spec 1.3
+// [Files] TbtPei.c TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+// TbtOemBoard.sdl TbtOemLib.c TbtOemLib.h
+//
+// 13 10/28/12 11:21p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Create new setup item for thunderbolt POC handling
+// [Files] TbtOemBoard.c TbtOemBoard.h TbtSetup.sdl TbtSetup.sd
+// TbtSetup.uni
+//
+// 12 10/03/12 9:27p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Change Programming security level timing for saving
+// boot time
+// [Files] TbtPei.c TbtDxe.c TbtOemBoard.h TbtOemLib.c TbtOemLib.h
+//
+// 11 8/20/12 5:12a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix IO resource workaround broken in 4C 2port case
+// [Files] TbtSmm.c TbtOemBoard.c TbtOemBoard.h TbtSetup.sdl
+// TbtSetup.sd TbtSetup.uni
+//
+// 10 8/17/12 8:44a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Add IO resource workaround for Thunderbolt Spec1.1
+// Because new spec has removed IO resource for Thunderbolt device
+// [Files] TbtSmm.c TbtOemBoard.h TbtOemBoard.c TbtSetup.sdl
+// TbtSetup.sd TbtSetup.uni
+//
+// 9 7/31/12 4:07a Barretlin
+// [TAG] EIP96350
+// [Category] Spec Update
+// [Severity] Critical
+// [Description] Updated Thunderbolt specification to version 1.00
+// [Files] TbtDxe.c TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+// TbtOemBoard.sdl TbtSetup.sd TbtSetup.uni
+//
+// 8 7/31/12 3:15a Barretlin
+// [TAG] EIP91119
+// [Category] Improvement
+// [Description] Resolution for enable/disable Thunderbolt device option
+// rom at POST time
+// [Files] TbtDxe.c TbtOemBoard.c TbtOemBoard.h TbtOemBoard.sdl
+// TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+//
+// 7 5/22/12 10:00a Barretlin
+// [TAG] EIP90650
+// [Category] Spec Update
+// [Description] Specificatoin Update 0.94 - The default value of
+// OPTIONAL workaround for devices that don't support surprise-removal
+// should be disable.
+// [Files] TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+// TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+//
+// 6 5/07/12 7:00a Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Add three setup items for debug
+// [Files] TbtDxe.c
+// TbtGpe.asl
+// TbtSmm.c
+// TbtSetup.sd
+// TbtSetup.uni
+// TbtOemBoard.c
+// TbtOemBoard.h
+//
+// 5 3/05/12 1:16a Barretlin
+// [TAG] EIP83266
+// [Category] Spec Update
+// [Description] Specificatoin Update 0.90
+// [Files] TbtSetup.sdl
+// TbtSetup.sd
+// TbtSetup.uni
+// TbtSetup.cif
+// TbtOemBoard.h
+// TbtOemLib.c
+// TbtOemLib.h
+// TbtSmm.c
+// TbtPei..
+//
+// 3 2/20/12 12:57a Wesleychen
+// Add new policy "SmiNotifyEnabled".
+//
+// 1 12/08/11 4:09a Wesleychen
+// Thunderbolt eModule initially releases.
+//
+//*************************************************************************
+#ifndef _THUNDERBOLT_OEM_PROTOCOL_
+#define _THUNDERBOLT_OEM_PROTOCOL_
+
+#include <Hob.h>
+
+#define AMI_TBT_PLATFROM_POLICY_PROTOCOL_GUID { 0x380D7A5E, 0x1BCA, 0x11E1, 0xA1, 0x10, 0xE8, 0xEB, 0x47, 0x24, 0x01, 0x9B }
+
+#define AMI_TBT_HR_STATUS_GUID { 0x380D7A5E, 0x1BCA, 0x11E1, 0xA1, 0x10, 0xE8, 0x59, 0x87, 0x32, 0xF1, 0x56 }
+
+#define AMI_TBT_HOB_GUID { 0x380D7A5E, 0x1BCA, 0x11E1, 0xA1, 0x10, 0xE8, 0x5A, 0x87, 0x15, 0x15, 0x47 }
+
+#define TBT_HR_STATUS_VARIABLE L"TbtHRStatusVar"
+
+#define RR_PCIE2TBT 0x54C
+
+#define RR_TBT2PCIE 0x548
+
+#define PCIE2TBT_VLD_B 1
+
+#define TBT2PCIE_DON_R 1
+
+#define MASK_DATA (BIT08 | BIT09 | BIT10 | BIT11)
+
+#define MASK_ERROR (BIT12 | BIT13 | BIT14 | BIT15)
+
+#ifdef PCIEX_BASE_ADDRESS
+#define TBT_CFG_ADDRESS(bus, dev, func, reg) NB_PCIE_CFG_ADDRESS(bus, dev, func, reg)
+#endif
+
+#ifndef R_PCH_RCRB_PM_CFG
+#define R_PCH_RCRB_PM_CFG 0x3318 // Power Management Configuration Register
+#endif
+
+typedef enum {
+ Cactus_Ridge = 1,
+ Redwood_Ridge,
+ Falcon_Ridge,
+ BDW_TBT_LP
+} TBT_HOST_SERIES;
+
+typedef enum {
+ TBT_NORMAL_MODE = 1,
+ TBT_NORMAL_MODE_WO_NHI,
+ TBT_DIRECT_CONNECTED_WO_NHI,
+ TBT_REDRIVER_ONLY,
+ TBT_OFF_MODE,
+ TBT_DEBUG_MODE,
+ TBT_RR_LEGACY_CONNECTION = 0,
+ TBT_RR_UNIQUIE_ID,
+ TBT_RR_ONE_TIME_SAVED_KEY,
+ TBT_RR_DPPLUS
+} TBT_SECURITY_TYPE;
+
+typedef enum {
+ TBT_GO2SX_WITH_WAKE = 2,
+ TBT_GO2SX_NO_WAKE,
+ TBT_SX_EXIT_TBT_CONNECTED,
+ TBT_SX_EXIT_NO_TBT_CONNECTED,
+ TBT_OS_UP,
+ TBT_SET_SECURITY_LEVEL = 8,
+ TBT_GET_SECURITY_LEVEL
+} TBT_RR_COMMOND;
+
+typedef VOID (EFIAPI *TBT_PROGRAM_SEURITY_LVL) (
+ IN TBT_SECURITY_TYPE SecurityLevel
+ );
+
+typedef struct _AMI_TBT_HR_STATUS_DATA {
+ UINT8 TbtHRSeries;
+ UINT8 TbtHRStatus;
+} AMI_TBT_HR_STATUS_DATA;
+
+typedef struct {
+ EFI_HOB_GUID_TYPE Header;
+ UINT8 TbtSecurityLevelFlag;
+} TBT_HOB;
+
+typedef struct _AMI_TBT_PLATFORM_POLICY_PROTOCOL {
+ UINT8 TbtEnable;
+ UINT8 TbtGO2SX;
+ UINT8 TbtForcePWR;
+ UINT8 TbtHotPlugEvt;
+ UINT8 TbtOK2GO2SX_N;
+ UINT8 CacheLineSize;
+ UINT8 TbtWakeupSupport;
+ UINT8 TbtAICSupport;
+ UINT8 TbtHandlePOC;
+ UINT8 TbtSecurityLevel;
+ UINT8 Bus;
+ UINT8 Dev;
+ UINT8 Fun;
+ UINT16 ReserveMemoryPerSlot;
+ UINT16 ReservePMemoryPerSlot;
+ UINT8 ReserveIOPerSlot;
+ UINT8 SmiNotifyEnabled;
+ UINT8 SwSmiEnabled;
+ UINT8 NotifyEnabled;
+ UINT8 TbtRmvReturnValue;
+ UINT8 TbtOptionRom;
+ UINT8 TbtIOresourceEnable;
+ UINT8 TbtNVMversion;
+} AMI_TBT_PLATFORM_POLICY_PROTOCOL;
+
+#if !defined TBT_INTEL_RC_CONFIG || TBT_INTEL_RC_CONFIG == 0
+#define PCI_DEVICE_NUMBER_PCH_LPC LPC_DEVICE
+#define PCI_FUNCTION_NUMBER_PCH_LPC LPC_FUNC
+#define R_PCH_LPC_GPI_ROUT 0xB8
+#define R_PCH_PCIE_CLS 0x0C
+#define R_PCH_PCIE_SLCTL 0x58
+#define R_PCH_PCIE_SLSTS 0x5A
+#define B_PCH_PCIE_SLSTS_PDS BIT06
+#define R_PCH_PCIE_PMCS 0xA4
+#define B_PCH_PCIE_PMCS_PS (BIT00 | BIT01)
+#endif // TBT_INTEL_RC_CONFIG == 0
+
+#endif // _THUNDERBOLT_OEM_PROTOCOL_
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.mak b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.mak
new file mode 100644
index 0000000..f9d42e5
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.mak
@@ -0,0 +1,95 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtOemBoard.mak 1 1/10/13 4:57a Barretlin $
+#
+# $Revision: 1 $
+#
+# $Date: 1/10/13 4:57a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtOemBoard.mak $
+#
+# 1 1/10/13 4:57a Barretlin
+# Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+# Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+#
+# 2 2/19/12 11:57p Wesleychen
+# [TAG] None
+# [Category] Improvement
+# [Description] Add TbtOemLib.
+# [Files] TbtOemLib.c; TbtOemLib.h; TbtOemBoard,mak;
+# TbtOemBoard.cif.
+#
+# 1 12/08/11 4:09a Wesleychen
+# Thunderbolt eModule initially releases.
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: TbtOemBoard.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+All : TbtOemBoard
+
+TbtOemBoard : $(BUILD_DIR)\TbtOemBoard.mak TbtOemBoardBin
+
+$(BUILD_DIR)\TbtOemBoard.mak : $(TbtOemBoard_DIR)\$(@B).cif $(TbtOemBoard_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(TbtOemBoard_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+TbtOemBoardBin : $(AMICSPLib) $(AMIDXELIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\TbtOemBoard.mak all\
+ GUID=B4DE05C0-1BD0-11E1-8F0E-77F34724019B\
+ ENTRY_POINT=TbtOemBoard_Init \
+ "MY_INCLUDES=$(TBT_OEMBOARD_INCLUDES)"\
+ TYPE=BS_DRIVER\
+ DEPEX1=$(TbtOemBoard_DIR)\TbtOemBoard.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ COMPRESS=1
+
+#----------------------------------------------------------------------------
+# Add files into CSP Library
+#----------------------------------------------------------------------------
+AMI_CSP_LIB_LIBRARY_PATH = $(AMI_CSP_LIB_LIBRARY_PATH);$(TbtOemBoard_DIR)
+
+AMI_CSP_LIB_INCLUDE_FILES = "$(TbtOemBoard_DIR)\TbtOemLib.h" + \
+"$(TbtOemBoard_DIR)\TbtOemBoard.h" + \
+$(AMI_CSP_LIB_INCLUDE_FILES)
+
+AMI_CSP_LIB_OBJS = $(AMI_CSP_LIB_OBJS) \
+$(BUILD_DIR)\TbtOemLib.obj \
+
+{$(TbtOemBoard_DIR)}.c{$(BUILD_DIR)}.obj::
+ $(CC) $(CFLAGS) /I $(TbtDxe_DIR) /Fo$(BUILD_DIR)\ $<
+
+$(BUILD_DIR)\TbtOemLib.obj : $(TbtOemBoard_DIR)\TbtOemLib.c
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.sdl b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.sdl
new file mode 100644
index 0000000..e8a79a6
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemBoard.sdl
@@ -0,0 +1,495 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtOemBoard.sdl 9 2/18/14 6:11a Barretlin $
+#
+# $Revision: 9 $
+#
+# $Date: 2/18/14 6:11a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtOemBoard.sdl $
+#
+# 9 2/18/14 6:11a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Add new Thunderbolt chip
+# [Files] TbtOemBoard.sdl
+#
+# 8 1/03/14 5:41a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Change default Thunderbolt host chip to Falcon Ridge
+# [Files] TbtOemBoard.sdl
+#
+# 7 6/21/13 7:50a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Fix build error with non Intel RC project
+# [Files] TbtOemBoard.h TbtOemBoard.sdl
+#
+# 6 4/24/13 2:39a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Using token to decide execute Sx_Exit command of RR
+# chip in S5 boot path
+# [Files] TbtPei.c TbtOemBoard.sdl
+#
+# 5 4/12/13 1:48p Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Use token decide default thunderbolt Chip
+# [Files] TbtOemBoard.sdl TbtOemLib.c
+#
+# 4 4/12/13 5:02a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Change token default value
+# [Files] TbtOemBoard.sdl
+#
+# 3 3/21/13 7:00a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Clone Token
+# [Files] TbtOemBoard.sdl
+#
+# 2 1/10/13 5:13a Barretlin
+#
+# 1 1/10/13 4:57a Barretlin
+# Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+# Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+#
+# 15 12/12/12 4:14a Barretlin
+# [TAG] EIP108272
+# [Category] Spec Update
+# [Severity] Important
+# [Description] Update to Spec 1.4 to support Redwood Ridge chip
+# [Files] TbtPei.c TbtSmm.c TbtDxe.c TbtDxe.sdl TbtGpe.asl
+# TbtOemBoard.c TbtOemBoard.h TbtOemLib.c TbtOemLib.h
+#
+# 14 10/28/12 11:50p Barretlin
+# [TAG] EIP104870
+# [Category] Spec Update
+# [Severity] Important
+# [Description] Change wake up flow for Spec 1.2 and Spec 1.3
+# [Files] TbtPei.c TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+# TbtOemBoard.sdl TbtOemLib.c TbtOemLib.h
+#
+# 13 10/28/12 10:35p Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Use token to decide to skip thunderbolt device initial
+# or not before PCI bus assigning resource
+# [Files] TbtDxeLib.c TbtOemBoard.sdl
+#
+# 12 10/04/12 5:43p Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Update Setup item
+# [Files] TbtOemBoard.sdl TbtSetup.sd TbtSetup.uni
+#
+# 11 9/22/12 9:59a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Use token to defien thunderbolt chip pins and update
+# sample code
+# [Files] TbtOemBoard.c TbtOemBoard.sdl
+#
+# 10 8/30/12 4:50a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Add new tokens which related resource for 2C and 4C
+# case
+# [Files] TbtOemBoard.sdl
+#
+# 9 8/20/12 5:07a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Change default value of resources in 4C 2 port case
+# [Files] TbtOemBoard.sdl
+#
+# 8 8/17/12 8:35a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] add new resource token for thunderbolt 4C chip and
+# creat "TBT_FCTP" token to switch max size
+# [Files] TbtOemBoard.sdl
+#
+# 7 7/31/12 4:07a Barretlin
+# [TAG] EIP96350
+# [Category] Spec Update
+# [Severity] Critical
+# [Description] Updated Thunderbolt specification to version 1.00
+# [Files] TbtDxe.c TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+# TbtOemBoard.sdl TbtSetup.sd TbtSetup.uni
+#
+# 6 7/31/12 3:15a Barretlin
+# [TAG] EIP91119
+# [Category] Improvement
+# [Description] Resolution for enable/disable Thunderbolt device option
+# rom at POST time
+# [Files] TbtDxe.c TbtOemBoard.c TbtOemBoard.h TbtOemBoard.sdl
+# TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+#
+# 5 7/06/12 5:56a Barretlin
+#
+# 4 5/24/12 9:54p Barretlin
+# [TAG] None
+# [Category] Improvement
+# [Description] Add resource token, it needs the co-ordination of the
+# chipset
+# [Files] TbtOemBoard.sdl
+#
+# 3 5/21/12 2:27a Barretlin
+# [TAG] EIP90003
+# [Category] Improvement
+# [Description] If TBT devices with option rom enabled, system maybe
+# cannot boot to OS.
+# [Files] TbtDxe.c TbtSmm.c TbtOemBoard.sdl
+#
+# 2 4/16/12 10:23a Barretlin
+# [TAG] None
+# [Category] Improvement
+# [Description] Improve ASL code, which redefines device name and RMV
+# method at same address when project supports RMV method,
+# that mightcause conflict
+# [Files] TbtDxe.c TbtGpe.asl TbtOemBoard.sdl
+#
+# 1 12/08/11 4:09a Wesleychen
+# Thunderbolt eModule initially releases.
+#
+#*************************************************************************
+TOKEN
+ Name = "TbtOemBoard_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Help = "Main switch to enable TbtOemBoard support in Project"
+End
+
+TOKEN
+ Name = "DEFAULT_TBT_CHIP"
+ Value = "3"
+ Help = "1: Cactus Ridge/2: Redwood Ridge/3: Falcon Ridge/4: Win Ridge."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_UP_PORT_BUS"
+ Value = "0x00"
+ Help = "Thunderbolt Host Router Upstream Port Bus Number."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_UP_PORT_DEV"
+ Value = "0x1C"
+ Help = "Thunderbolt Host Router Upstream Port Device Number."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_UP_PORT_FUNC"
+ Value = "0x00"
+ Help = "Thunderbolt Host Router Upstream Port Function Number."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_GO2SX"
+ Value = "20"
+ Help = "Thunderbolt Host Router GO2SX Pin Number, Only for Cactus Ridge chip host."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_ForcePWR"
+ Value = "21"
+ Help = "Thunderbolt Host Router ForcePWR Pin Number."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_OK2GO2SX_N"
+ Value = "22"
+ Help = "Thunderbolt Host Router OK2GO2SX_N Pin Number, Only for Cactus Ridge chip host."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_HR_PWR"
+ Value = "0xFF"
+ Help = "Thunderbolt Host Router Power Pin Number, Only for Cactus Ridge chip."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_HotPlugEvt"
+ Value = "11"
+ Help = "Thunderbolt Host Router HotPlugEvt Pin Number."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_FCTP"
+ Value = "0"
+ Help = "Thunderbolt Host Router is 4 CIO and 2 phyical Thunderbolt port on board."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_PCIBUS_SKIP"
+ Value = "1"
+ Help = "Allow PCI bus skip thunderbolt device initial"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_RR_S5_SXEXIT"
+ Value = "0"
+ Help = "Enable/Disable execute Sx_Exit command of RR chip in S5 boot path."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "====== Thunderbolt Resource Configuration ======"
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "PCIEX_BASE_ADDRESS"
+ Value = "0xF0000000"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "1"
+End
+
+TOKEN
+ Name = "PCIEX_BASE_ADDRESS"
+ Value = "0xE0000000"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ TOKEN = "TBT_FCTP" "=" "1"
+ TOKEN = "TBT_INTEL_RC_CONFIG" "=" "1"
+End
+
+TOKEN
+ Name = "MAX_ADDITIONAL_P2P_BRIDGES"
+ Value = "0x80"
+ Help = "The number of P2P bridges that can be processed in addition to the ones defined in BusNumXlat.INC."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "1...0FFh"
+ TOKEN = "TBT_FCTP" "=" "1"
+End
+
+TOKEN
+ Name = "COMBINE_MEM_PMEM"
+ Value = "0"
+ Help = "Tells if Chipset correctly supports PF MMIO\if set PF MMIO will be decoded through the same resource\window as NONE PF MMIO. PF MEM BASE and PF MEM LIMIT register pare will not be used."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "ON or OFF. Default is OFF!"
+End
+
+TOKEN
+ Name = "TBT_PCH_PCIE_TEMP_RP_BUS_NUM_MAX"
+ Value = "255" # (PPTRC060.8)
+ Help = "Temp Root Port Bus Number Max for Thunderbolt."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_MAX_EXTRA_BUS_RESERVED"
+ Value = "63"
+ Help = "The Max number of extra Bus Reserved for bridges behind this Root Bridge for Thunderbolt."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_MAX_EXTRA_BUS_RESERVED"
+ Value = "245"
+ Help = "The Max number of extra Bus Reserved for bridges behind this Root Bridge for Thunderbolt."
+ TokenType = Integer
+ TargetH = Yes
+ TOKEN = "TBT_FCTP" "=" "1"
+ Token = "PCIEX_BASE_ADDRESS" "!=" "0xF8000000"
+End
+
+TOKEN
+ Name = "TBT_DEFAULT_EXTRA_BUS_RESERVED"
+ Value = "56"
+ Help = "The Default number of extra Bus Reserved for bridges behind this Root Bridge for Thunderbolt."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_DEFAULT_EXTRA_BUS_RESERVED"
+ Value = "106"
+ Help = "The Default number of extra Bus Reserved for bridges behind this Root Bridge for Thunderbolt."
+ TokenType = Integer
+ TargetH = Yes
+ TOKEN = "TBT_FCTP" "=" "1"
+End
+
+TOKEN
+ Name = "TBT_MAX_PCIE_MEM_RESERVED"
+ Value = "640"
+ Help = "The Max number of reserved memory range for this Root Bridge for Thunderbolt."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_MAX_PCIE_MEM_RESERVED"
+ Value = "1200"
+ Help = "The Max number of reserved memory range for this Root Bridge for Thunderbolt."
+ TokenType = Integer
+ TargetH = Yes
+ TOKEN = "TBT_FCTP" "=" "1"
+End
+
+TOKEN
+ Name = "TBT_DEFAULT_PCIE_MEM_RESERVED"
+ Value = "353"
+ Help = "The Default number of reserved memory range for this Root Bridge for Thunderbolt."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_DEFAULT_PCIE_MEM_RESERVED"
+ Value = "737"
+ Help = "The Default number of reserved memory range for this Root Bridge for Thunderbolt."
+ TokenType = Integer
+ TargetH = Yes
+ TOKEN = "TBT_FCTP" "=" "1"
+End
+
+TOKEN
+ Name = "TBT_MAX_PCIE_PF_MEM_RESERVED"
+ Value = "640"
+ Help = "The Max number of prefetchable memory range for this Root Bridge for Thunderbolt."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_MAX_PCIE_PF_MEM_RESERVED"
+ Value = "1200"
+ Help = "The Max number of prefetchable memory range for this Root Bridge for Thunderbolt."
+ TokenType = Integer
+ TargetH = Yes
+ TOKEN = "TBT_FCTP" "=" "1"
+End
+
+TOKEN
+ Name = "TBT_DEFAULT_PCIE_PF_MEM_RESERVED"
+ Value = "544"
+ Help = "The Default number of prefetchable memory range for this Root Bridge for Thunderbolt."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_DEFAULT_PCIE_PF_MEM_RESERVED"
+ Value = "1184"
+ Help = "The Default number of prefetchable memory range for this Root Bridge for Thunderbolt."
+ TokenType = Integer
+ TargetH = Yes
+ TOKEN = "TBT_FCTP" "=" "1"
+End
+
+TOKEN
+ Name = "TBT_MAX_PCIE_IO_RESERVED"
+ Value = "48"
+ Help = "The Max number of IO range for this Root Bridge."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_DEFAULT_PCIE_IO_RESERVED"
+ Value = "0"
+ Help = "The Default number of IO range for this Root Bridge."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+MODULE
+ Help = "Includes TbtOemBoard.mak to Project"
+ File = "TbtOemBoard.mak"
+End
+
+PATH
+ Name = "TbtOemBoard_DIR"
+End
+
+ELINK
+ Name = "/D TBT_UP_PORT_FUNC_FLAG"
+ Parent = "GLOBAL_DEFINES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "TBT_OEMBOARD_INCLUDES"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "/I$(TbtOemBoard_DIR)"
+ Parent = "TBT_OEMBOARD_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\TbtOemBoard.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtOemLib.c b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemLib.c
new file mode 100644
index 0000000..9e27a42
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemLib.c
@@ -0,0 +1,1298 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtOemLib.c 13 5/19/14 7:38a Barretlin $
+//
+// $Revision: 13 $
+//
+// $Date: 5/19/14 7:38a $
+//*************************************************************************
+// ReviGpion History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtOemLib.c $
+//
+// 13 5/19/14 7:38a Barretlin
+// [TAG] EIP165410
+// [Category] New Feature
+// [Description] Support Thunderbolt AIC at NB PCIE slot
+// [Files] TbtPei.c TbtDxe.c TbtGpe.asl TbtSmm.c TbtOemBoard.c
+// TbtOemLib.c TbtOemLib.h TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+// TbtSetupReset.c
+//
+// 12 2/18/14 12:16p Barretlin
+// [TAG] EIP152401
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] add new Thunderbolt chip series
+// [Files] TbtOemLib.c
+//
+// 11 1/05/14 2:06p Barretlin
+// [TAG] EIP N/A
+// [Category] New Feature
+// [Description] Support Thunderbolt feature Enable/Disable in run time
+// Support dynamic Thunderbolt AIC location in run time
+// [Files] TbtOemBoard.h TbtOemBoard.c TbtOemLib.c TbtOemLib.h
+//
+// 10 5/27/13 8:11a Barretlin
+// [TAG] EIP124914
+// [Category] New Feature
+// [Description] Support Falcon Ridge chip
+// [Files] TbtOemLib.c
+//
+// 9 4/12/13 1:48p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Use token decide default thunderbolt Chip
+// [Files] TbtOemBoard.sdl TbtOemLib.c
+//
+// 8 4/12/13 1:30p Barretlin
+//
+// 7 4/10/13 2:57p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Add new sample code for CRB
+// [Files] TbtOemLib.c
+//
+// 6 4/03/13 2:47a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Double check Security Level between Thunderbolt host FW
+// and BIOS are same or not for Redwood Ridge chip when entering setup
+// page.
+// [Files] TbtOemLib.c TbtOemLib.h TbtSetupReset.c
+//
+// 5 3/21/13 6:48a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Update sample code to fix FW's security level doesn't
+// match BIOS configuration.
+// [Files] TbtOemLib.c
+//
+// 4 2/08/13 2:05a Barretlin
+//
+// 3 2/06/13 6:45a Barretlin
+// [TAG] EIP114556
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Update RR handshake flow and sample code for
+// Thunderbolt RR Spec 0.9
+// [Files] TbtOemLib.c
+//
+// 2 1/27/13 4:36a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Change sample code avoiding side effect
+// [Files] TbtOemLib.c
+//
+// 1 1/10/13 4:57a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 12 12/13/12 4:06a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix build error
+// [Files] TbtOemLib.c
+//
+// 11 12/12/12 4:14a Barretlin
+// [TAG] EIP108272
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update to Spec 1.4 to support Redwood Ridge chip
+// [Files] TbtPei.c TbtSmm.c TbtDxe.c TbtDxe.sdl TbtGpe.asl
+// TbtOemBoard.c TbtOemBoard.h TbtOemLib.c TbtOemLib.h
+//
+// 10 10/28/12 11:50p Barretlin
+// [TAG] EIP104870
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Change wake up flow for Spec 1.2 and Spec 1.3
+// [Files] TbtPei.c TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+// TbtOemBoard.sdl TbtOemLib.c TbtOemLib.h
+//
+// 9 10/04/12 10:42p Barretlin
+// [TAG] EIP102947
+// [Category] Spec Update
+// [Severity] Normal
+// [Description] Update Thunderbolt Spec to Rev 1.2
+// [Files] TbtPei.c TbtOemLib.c TbtOemLib.h
+//
+// 8 10/03/12 9:27p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Change Programming security level timing for saving
+// boot time
+// [Files] TbtPei.c TbtDxe.c TbtOemBoard.h TbtOemLib.c TbtOemLib.h
+//
+// 7 5/21/12 2:56a Barretlin
+// [TAG] EIP90334
+// [Category] Improvement
+// [Description] Implement security level function on CRB
+// [Files] TbtOemLib.c
+//
+// 6 4/14/12 4:58a Barretlin
+//
+// 5 3/05/12 1:16a Barretlin
+// [TAG] EIP83266
+// [Category] Spec Update
+// [Description] Specificatoin Update 0.90
+// [Files] TbtSetup.sdl
+// TbtSetup.sd
+// TbtSetup.uni
+// TbtSetup.cif
+// TbtOemBoard.h
+// TbtOemLib.c
+// TbtOemLib.h
+// TbtSmm.c
+// TbtPei..
+//
+// 3 2/20/12 4:50a Wesleychen
+// [TAG] None
+// [Category] Improvement
+// [Description] Add TbtOemLib.
+// [Files] TbtOemLib.c; TbtOemLib.h; TbtOemBoard,mak;
+// TbtOemBoard.cif.
+//
+//*************************************************************************
+#include <Efi.h>
+#include <token.h>
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+
+// Sample code for ITE8728F
+/*
+VOID SetSioLdn( IN UINT8 Ldn)
+{
+ IoWrite8(0x2e, Ldn);
+ IoWrite8(0x2f, Ldn);
+}
+
+UINT8 ReadSio( IN UINT8 Index )
+{
+ IoWrite8(0x2e, Index);
+ return IoRead8(0x2f);
+}
+
+VOID WriteSio( IN UINT8 Index, IN UINT8 Value )
+{
+ IoWrite8(0x2e, Index);
+ IoWrite8(0x2f, Value);
+}
+
+VOID SetSio( IN UINT8 Index, IN UINT8 Set )
+{
+ UINT8 Data8;
+
+ IoWrite8(0x2e, Index);
+ Data8 = IoRead8(0x2f);
+ Data8 |= Set;
+ IoWrite8(0x2f, Data8);
+}
+
+VOID ResetSio( IN UINT8 Index, IN UINT8 Rst )
+{
+ UINT8 Data8;
+
+ IoWrite8(0x2e, Index);
+ Data8 = IoRead8(0x2f);
+ Data8 &= ~Rst;
+ IoWrite8(0x2f, Data8);
+}
+
+VOID OpenSioConfig ( VOID )
+{
+ IoWrite8(0x2e, 0x87);
+ IoWrite8(0x2e, 0x01);
+ IoWrite8(0x2e, 0x55);
+ IoWrite8(0x2e, 0x55);
+}
+//*/
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: TbtSetPCIe2TBTCommand
+//
+// Description: This snipped code contains PCIE2TBT <-> TBT2PCIE handshake
+// procedure and all related methods called directly or underectly
+// by TbtSetPCIe2TBTCommand.
+// This function is Intel Sample code(Rev. 1.5).
+//
+// Input: UINT8 - UpPortBus
+// UINT8 - Data
+// UINT8 - Command
+// UINTN - Timeout
+//
+// Output: BOOLEAN
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN TbtSetPCIe2TBTCommand(
+ IN UINT8 UpPortBus,
+ IN UINT8 Data,
+ IN UINT8 Command,
+ IN UINTN Timeout
+)
+{
+ UINT32 REG_VAL = 0;
+ UINTN Counter = Timeout;
+
+ REG_VAL = (Data << 8) | (Command << 1) | PCIE2TBT_VLD_B;
+
+ WRITE_PCI32(UpPortBus, 0, 0, RR_PCIE2TBT, REG_VAL);
+
+ while(Counter-- > 0){
+ // BIOS support of Thunderbolt devices Specification Update Revision 0.9
+ // Check Classcode, RevID
+ REG_VAL = MMIO_READ32(TBT_CFG_ADDRESS(UpPortBus, 0, 0, PCI_RID));
+ if (0xFFFFFFFF == REG_VAL){
+ // Device is not here return now
+ return FALSE;
+ }
+
+ // Check TBT2PCIE.Done
+ REG_VAL = MMIO_READ32(TBT_CFG_ADDRESS(UpPortBus, 0, 0, RR_TBT2PCIE));
+ if (REG_VAL & TBT2PCIE_DON_R){
+ break;
+ }
+ }
+ WRITE_PCI32(UpPortBus, 0, 0, RR_PCIE2TBT, 0);
+
+ return TRUE;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: TbtBeforeSxExitFlow
+//
+// Description:
+//
+//
+// Input: EFI_PEI_SERVICES - **PeiServices
+// UINT8 - TbtHostSeries
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID TbtBeforeSxExitFlow(
+ IN VOID *Services,
+ IN UINT8 TbtHostSeries )
+{
+// Sample code for CRB
+/*
+ EFI_PEI_SERVICES **PeiServices;
+ UINT16 GPIOInv;
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ UINT8 Data8;
+#else
+ UINT32 Data32;
+#endif
+
+ PeiServices = (EFI_PEI_SERVICES **)Services;
+
+ if (TbtHostSeries == Cactus_Ridge){
+ // only for SharkBay CRB
+ GPIOInv = (IoRead16(GPIO_BASE_ADDRESS + GP_IOREG_GPI_INV) & 0xF7FF);
+ IoWrite16(GPIO_BASE_ADDRESS + GP_IOREG_GPI_INV, GPIOInv);
+ }
+
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ OpenSioConfig();
+ SetSioLdn (0x07);
+
+ //program Super IO Base Address
+ WriteSio(0x62, (UINT8)(IT8728_GPIO_BASE_ADDRESS >> 8));
+ WriteSio(0x63, (UINT8)(IT8728_GPIO_BASE_ADDRESS & 0xFF));
+
+ //program GP20, GP21, GP22 as GPIO pin
+ Data8 = ReadSio (0x26);
+ Data8 |= 0x07;
+ WriteSio (0x26, Data8);
+
+ if (TbtHostSeries == Cactus_Ridge){
+#if defined (TBT_HR_PWR) && (TBT_HR_PWR != 0xFF)
+ //program GP40 as GPIO pin
+ Data8 = ReadSio (0x28);
+ Data8 |= 0x01;
+ WriteSio (0x28, Data8);
+#endif
+
+ //program GP66, GP67 as GPIO pin
+ Data8 = ReadSio (0x29);
+ Data8 |= BIT07;
+ WriteSio (0x29, Data8);
+ } // Cactus Ridge
+
+ //program GP20, GP21, GP22 GPIO polarity
+ Data8 = ReadSio (0xB1);
+ Data8 &= 0xF8;
+ WriteSio (0xB1, Data8);
+
+#if defined (TBT_HR_PWR) && (TBT_HR_PWR != 0xFF)
+ if (TbtHostSeries == Cactus_Ridge){
+ //program GP40 GPIO polarity
+ Data8 = ReadSio (0xB3);
+ Data8 &= 0xFE;
+ WriteSio (0xB3, Data8);
+ }
+#endif
+
+ //GP20, GP21, GP22 internal pull-up enable
+ Data8 = ReadSio (0xB9);
+ Data8 |= 0x03;
+ WriteSio (0xB9, Data8);
+
+ if (TbtHostSeries == Cactus_Ridge){
+#if defined (TBT_HR_PWR) && (TBT_HR_PWR != 0xFF)
+ //GP40 internal internal pull-up enable
+ Data8 = ReadSio (0xBB);
+ Data8 |= 0x01;
+ WriteSio (0xBB, Data8);
+#endif
+
+ //GP66, GP67 internal pull-up enable
+ Data8 = ReadSio (0xBD);
+ Data8 |= 0xC0;
+ WriteSio (0xBD, Data8);
+ }
+
+ //GP20, GP21, GP22 Simple I/O enable
+ Data8 = ReadSio (0xC1);
+ Data8 |= 0x07;
+ WriteSio (0xC1, Data8);
+
+#if defined (TBT_HR_PWR) && (TBT_HR_PWR != 0xFF)
+ if (TbtHostSeries == Cactus_Ridge){
+ //GP40 Simple I/O enable
+ Data8 = ReadSio (0xC3);
+ Data8 |= 0x01;
+ WriteSio (0xC3, Data8);
+ }
+#endif
+
+ //GP20, GP21, GP22 Input/Output Configure
+ //1:Output Mode 0:Input Mode
+ Data8 = ReadSio (0xC9);
+ Data8 |= 0x03;
+ WriteSio (0xC9, Data8);
+
+ if (TbtHostSeries == Cactus_Ridge){
+#if defined (TBT_HR_PWR) && (TBT_HR_PWR != 0xFF)
+ //GP40 Input/Output Configure
+ //1:Output Mode 0:Input Mode
+ Data8 = ReadSio (0xCB);
+ Data8 |= 0x01;
+ WriteSio (0xCB, Data8);
+#endif
+
+ //GP66, GP67 Input/Output Configure
+ //1:Output Mode 0:Input Mode
+ Data8 = ReadSio (0xCD);
+ Data8 |= 0xC0;
+ WriteSio (0xCD, Data8);
+ }
+
+ if (TbtHostSeries != Cactus_Ridge){
+ //Pull high GPIO_9
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 1, 0x04);
+ } // RR, FR and WR
+#else
+ // program ownship
+ //Data32 = IoRead32(GPIO_BASE_ADDRESS + (TBT_HotPlugEvt/32)*4);
+ //Data32 |= (BIT00 << (TBT_ForcePWR%32));
+ //IoWrite32((GPIO_BASE_ADDRESS + (TBT_HotPlugEvt/32)*4), Data32);
+
+ //Data32 = IoRead32(GPIO_BASE_ADDRESS + (TBT_HotPlugEvt/32)*4);
+ //Data32 &= ~(BIT00 << (TBT_HotPlugEvt%32));
+ //IoWrite32((GPIO_BASE_ADDRESS + (TBT_HotPlugEvt/32)*4), Data32);
+
+ // program GPIO pin setting
+ // TBT_ForcePWR is GPIO, is Output, is Level mode
+ //Data32 = (BIT00 | BIT04) & (~BIT02);
+ //IoWrite32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)), Data32);
+
+ // TBT_HotPlugEvt is GPIO, is input, need invert, is Edge mode
+ //Data32 = (BIT00 | BIT02 | BIT03) & (~BIT04);
+ //IoWrite32((GPIO_BASE_ADDRESS + 0x100 + (TBT_HotPlugEvt * 8)), Data32);
+#endif
+//*/
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: GetHRInfo
+//
+// Description: Pull High GPIO_3 and assign temp bus to get Thunderbolt Host
+// Chip Series for distinguishing Thunderbolt host is Cactus Ridge
+// or Redwood Ridge
+//
+// If your case is only support Redwood Ridge or only support Cactus
+// Ridge, you can just return Thunderbolt Host number which is defined
+// in TbtOemBoard.h
+//
+// According test result, the dynamic detect Thunderbolt HR series
+// still has fail rate, so we don't suggest you using the same way
+// to decide HR series. sample code is just for testing !!!
+//
+// Input: None
+//
+// Output: UINT8 - Thunderbolt Host chip Series
+// 1 - Cactus Ridge
+// 2 - Redwood Ridge
+// 3 - Falcon Ridge
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINT8 GetHRInfo( VOID )
+{
+ UINT8 TBTHostSeries = DEFAULT_TBT_CHIP;
+// Sample code for ITE8728F and WTM2
+/*
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ UINT8 Data8;
+#else
+ UINT32 Data32;
+#endif
+ UINT16 HRID;
+ UINT32 REG_VAL = 0;
+ BOOLEAN RRCmd = FALSE;
+
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ OpenSioConfig();
+
+ SetSioLdn(0x07);
+
+ if(ReadSio (0x62) == 0x00){
+ //program Super IO Base Address
+ WriteSio(0x62, (UINT8)(IT8728_GPIO_BASE_ADDRESS >> 8));
+ WriteSio(0x63, (UINT8)(IT8728_GPIO_BASE_ADDRESS & 0xFF));
+ }
+
+ //program GP21 as GPIO pin
+ Data8 = ReadSio (0x26);
+ Data8 |= 0x02;
+ WriteSio (0x26, Data8);
+
+ //program GP21 GPIO polarity
+ Data8 = ReadSio (0xB1);
+ Data8 &= 0xFD;
+ WriteSio (0xB1, Data8);
+
+ //program GP21 internal pull-up enable
+ Data8 = ReadSio (0xB9);
+ Data8 |= 0x02;
+ WriteSio (0xB9, Data8);
+
+ //program GP21 Simple I/O enable
+ Data8 = ReadSio (0xC1);
+ Data8 |= 0x02;
+ WriteSio (0xC1, Data8);
+
+ //program GP21 Input/Output Configure
+ //1:Output Mode 0:Input Mode
+ Data8 = ReadSio (0xC9);
+ Data8 |= 0x02;
+ WriteSio (0xC9, Data8);
+#else
+#endif
+
+ // Assign temp bus
+ WRITE_PCI16(TBT_UP_PORT_BUS, TBT_UP_PORT_DEV, TBT_UP_PORT_FUNC, PCI_PBUS+1, 0x0505);
+ // Do a dummy Write
+ WRITE_PCI32(5, 0, 0, PCI_VID, 0x12345678);
+
+ // Pull High GPIO_3(__FORCE_PWR)
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 1);
+ Data8 |= 0x02;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 1, Data8);
+#else
+ Data32 = IoRead32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)));
+ Data32 |= BIT31;
+ IoWrite32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)), Data32);
+#endif
+
+ // Delay 100 ms
+ CountTime(100000, PM_BASE_ADDRESS);
+
+ //Write OS_UP commond for RR chip
+ TbtSetPCIe2TBTCommand(5, 0, TBT_OS_UP, 0x8FFFF);
+
+ // Delay 600 ms
+ CountTime(600000, PM_BASE_ADDRESS);
+
+ // Get HR Info
+ HRID = READ_PCI16(5, 0, 0, PCI_DID);
+ switch (HRID){
+ case 0x1547: // Cactus Ridge 4C
+ case 0x1548: // Cactus Ridge 2C
+ TBTHostSeries = Cactus_Ridge;
+ break;
+
+ case 0x1567: // Redwood Ridge 2C
+ case 0x1569: // Redwood Ridge 4C
+ case 0x156B: // Falcon Ridge 2C
+ case 0x156D: // Falcon Ridge 4C
+ case 0x157E: // BDW-TBT-LP(WR)
+ default:
+ if ((HRID == 0x1567) || (HRID == 0x1569)){
+ TBTHostSeries = Redwood_Ridge;
+ } else if ((HRID == 0x156B) || (HRID == 0x156D)){
+ TBTHostSeries = Falcon_Ridge;
+ } else {
+ TBTHostSeries = BDW_TBT_LP;
+ }
+
+ // Reset FW's security level for RR chip, only for FW rev.26 or above.
+ TbtSetPCIe2TBTCommand(5, 0, TBT_SET_SECURITY_LEVEL, 0x8FFFF);
+ // Delay 100 ms
+ CountTime(100000, PM_BASE_ADDRESS);
+ } // end switch
+
+ // Pull Low GPIO_3(__FORCE_PWR)
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 1);
+ Data8 &= 0xFD;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 1, Data8);
+#else
+ Data32 = IoRead32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)));
+ Data32 &= ~BIT31;
+ IoWrite32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)), Data32);
+#endif
+
+ // Delay 100 ms
+ CountTime(100000, PM_BASE_ADDRESS);
+
+ // Remove temp bus
+ WRITE_PCI32(TBT_UP_PORT_BUS, TBT_UP_PORT_DEV, TBT_UP_PORT_FUNC, PCI_PBUS, 0xFF000000);
+//*/
+ return TBTHostSeries;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: SynchSecurityLevel
+//
+// Description: When entering Setup page, double check Security Level setting
+// is same or not between Thunderbolt host Fw and BIOS.
+//
+// This function only work for Thunderbolt Redwood Ridge chip
+//
+// Input: UINT8 BiosSecurityLevel
+// UINT8 TbtHostLocation
+//
+// Output: UINT8 0 - Security Level synchnized without change
+// 1 - Security Level synchnized with programming
+// again
+// 2 - Error
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINT8 SynchSecurityLevel(
+ IN UINT8 BiosSecurityLevel,
+ IN UINT8 TbtHostLocation
+)
+{
+ UINT8 SynchState = 0;
+// Sample code for ITE8728F and WTM2
+/*
+ UINT8 TbtHRbus;
+ UINT8 PWRFlag = 0;
+ UINT8 TBus = TBT_UP_PORT_BUS;
+ UINT8 TDev = TBT_UP_PORT_DEV;
+ UINT8 TFun = TBT_UP_PORT_FUNC;
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ UINT8 Data8;
+#else
+ UINT32 Data32;
+#endif
+ UINT32 RegVal;
+ BOOLEAN CmdDone;
+
+ if (TbtHostLocation < 0x20){
+ TFun = TbtHostLocation;
+ } else {
+ TDev = 0x01;
+ TFun = TbtHostLocation - 0x20;
+ }
+
+ // Get Thunderbolt Host Router Location
+ TbtHRbus = READ_PCI8(TBus, TDev, TFun, PCI_SBUS);
+
+ // Check Thunderbolt Host state
+ RegVal = MMIO_READ32(TBT_CFG_ADDRESS(TbtHRbus, 0, 0, PCI_RID));
+ if (RegVal == 0xFFFFFFFF){
+ // Pull high GPIO_3(__FORCE_PWR) pin
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 1);
+ Data8 |= 0x02;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 1, Data8);
+#else
+ Data32 = IoRead32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)));
+ Data32 |= BIT31;
+ IoWrite32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)), Data32);
+#endif
+
+ // Delay 50ms
+ CountTime(50000, PM_BASE_ADDRESS);
+ PWRFlag = 1;
+ }
+
+ // Do Redwood Ridge handshake to get Thunderbolt FW security level
+ CmdDone = TbtSetPCIe2TBTCommand(TbtHRbus, 0, TBT_GET_SECURITY_LEVEL, 0x008FFFFF);
+
+ if (CmdDone){
+ RegVal = READ_PCI32(TbtHRbus, 0, 0, RR_TBT2PCIE);
+
+ if ((RegVal & MASK_ERROR) == 0){
+ RegVal = (RegVal & MASK_DATA) >> 8;
+ }
+ else SynchState = 2;
+ } else SynchState = 2;
+ // So far, RegVal variable might be:
+ // 1: 0xFFFFFFFF
+ // 2: Thunderbolt host Revision ID and Class Code
+ // 3: Thunderbolt host Fw security level setting
+
+ // check Security Level setting between Thunderbolt Fw and BIOS
+ if ((UINT8)RegVal != (BiosSecurityLevel - 1)){
+ if (PWRFlag == 0){
+ // Pull high GPIO_3(__FORCE_PWR) pin
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 1);
+ Data8 |= 0x02;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 1, Data8);
+#else
+ Data32 = IoRead32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)));
+ Data32 |= BIT31;
+ IoWrite32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)), Data32);
+#endif
+
+ PWRFlag = 1;
+ }
+ IoWrite8(0x80, (BiosSecurityLevel - 1 + 0xC0));
+ // After testing, TBT Fw needs Delay 600ms
+ CountTime(600000, PM_BASE_ADDRESS);
+
+ // Re-config Security Level with BIOS setting
+ CmdDone = TbtSetPCIe2TBTCommand(TbtHRbus, (BiosSecurityLevel - 1), TBT_SET_SECURITY_LEVEL, 0x008FFFFF);
+
+ if (CmdDone) SynchState = 1;
+ else SynchState = 2;
+ }
+
+ if (PWRFlag == 1){
+ // Pull low GPIO_3(__FORCE_PWR) pin
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 1);
+ Data8 &= 0xFD;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 1, Data8);
+#else
+ Data32 = IoRead32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)));
+ Data32 &= (~BIT31);
+ IoWrite32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)), Data32);
+#endif
+
+ // Delay 100ms
+ CountTime(100000, PM_BASE_ADDRESS);
+ }
+//*/
+ return SynchState;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: ProgramTbtSecurityLevel
+//
+// Description: This function is configure the Thunderbolt security level.
+// OEM Porting required !!!.
+//
+// Input: UINT8 TbtSecurityLevel
+// UINT8 TBTHostSeries
+// UINT8 TbtHostLocation
+// BOOLEAN IsPei
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID ProgramTbtSecurityLevel(
+ IN UINT8 *TbtSecurityLevel,
+ IN UINT8 TbtHostSeries,
+ IN UINT8 TbtHostLocation,
+ IN BOOLEAN IsPei
+)
+{
+// Sample code for ITE8728F and WTM2
+/*
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ UINT8 Data8 = 0;
+#else
+ UINT32 Data32 = 0;
+#endif
+ UINT8 SecLevel = *TbtSecurityLevel;
+ UINT8 TbtHRbus;
+ BOOLEAN RRCmd = FALSE;
+ UINT8 TBus = TBT_UP_PORT_BUS;
+ UINT8 TDev = TBT_UP_PORT_DEV;
+ UINT8 TFun = TBT_UP_PORT_FUNC;
+
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ if (TbtHostSeries == Cactus_Ridge){
+ // For Cactus Ridge chip
+#if defined (TBT_HR_PWR) && (TBT_HR_PWR != 0xFF)
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 3);
+ if (SecLevel == TBT_OFF_MODE){
+ Data8 &= 0xFE;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 3, Data8);
+ return;
+ }
+ if (!(Data8 & BIT0)){
+ Data8 |= 0x01;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 3, Data8);
+ }
+#else
+ if (SecLevel == TBT_OFF_MODE) return;
+#endif
+
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 5);
+ Data8 &= ~(BIT6 | BIT7);
+
+ switch (SecLevel)
+ {
+ case TBT_DIRECT_CONNECTED_WO_NHI:
+ Data8 |= BIT6;
+ break;
+
+ case TBT_REDRIVER_ONLY:
+ Data8 |= BIT7;
+ break;
+
+ case TBT_NORMAL_MODE_WO_NHI:
+ break;
+
+ case TBT_NORMAL_MODE:
+ case TBT_DEBUG_MODE:
+ default:
+ // Normal mode with NHI.
+ Data8 |= (BIT6 | BIT7);
+ break;
+ } // end of switch
+
+ // Set GP66 and GP67
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 5, Data8);
+
+ // Set GPIO6 and GPIO7 to the desired levels and
+ // assert GPIO3 for at least 400ms period.
+ // GP21 Pull high
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 1);
+ Data8 |= 0x02;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 1, Data8);
+ } else {
+ // For Redwood Ridge / Falcon Ridge / Win Ridge chip
+ if (IsPei != TRUE){
+ if(TbtHostLocation < 0x20){
+ TFun = TbtHostLocation;
+ } else {
+ TDev = 0x01;
+ TFun = TbtHostLocation - 0x20;
+ }
+
+ // Get Thunderbolt Host Router Location
+ TbtHRbus = READ_PCI8(TBus, TDev, TFun, PCI_SBUS);
+
+ // First pull high GPIO_3(__FORCE_PWR) pin
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 1);
+ Data8 |= 0x02;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 1, Data8);
+
+ IoWrite8(0x80, (0x80 | (SecLevel - 1)));
+ CountTime(500000, PM_BASE_ADDRESS);
+
+ // Do PCIE2TBT handshake
+ RRCmd = TbtSetPCIe2TBTCommand(TbtHRbus, (SecLevel - 1), TBT_SET_SECURITY_LEVEL, 0x008FFFFF);
+ if(RRCmd){
+ IoWrite8(0x80, 0x5D);
+ CountTime(100000, PM_BASE_ADDRESS);
+ }
+
+ // Finial pull low GPIO_3(__FORCE_PWR) pin
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 1);
+ Data8 &= 0xFD;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 1, Data8);
+ } // is not at PEI phase
+ }
+#else
+ if (IsPei != TRUE){
+ if (TbtHostLocation < 20){
+ TFun = TbtHostLocation;
+ } else {
+ TDev = 0x01;
+ TFun = TbtHostLocation - 0x20;
+ }
+
+ //Get Thunderbolt Host Router Location
+ TbtHRbus = READ_PCI8(TBus, TDev, TFun, PCI_SBUS);
+
+ // First pull high GPIO_3(__FORCE_PWR) pin
+ Data32 = IoRead32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)));
+ Data32 |= BIT31;
+ IoWrite32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)), Data32);
+
+ IoWrite8(0x80, (0x80 | (SecLevel - 1)));
+ CountTime(500000, PM_BASE_ADDRESS);
+
+ // Do PCIE2TBT handshake
+ RRCmd = TbtSetPCIe2TBTCommand(TbtHRbus, (SecLevel - 1), TBT_SET_SECURITY_LEVEL, 0x008FFFFF);
+
+ //for debug
+ if(RRCmd){
+ IoWrite8(0x80, 0x5D);
+ CountTime(100000, PM_BASE_ADDRESS);
+ }
+
+ // finial pull low GPIO_3(__FORCE_PWR) pin
+ Data32 = IoRead32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)));
+ Data32 &= ~BIT31;
+ IoWrite32((GPIO_BASE_ADDRESS + 0x100 + (TBT_ForcePWR * 8)), Data32);
+ }
+#endif
+//*/
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: PeiFinialProgramTbtSecurityLevel
+//
+// Description: if system does not support "Wake from Thunderbolt device"
+// function, BIOS should depend on Security Level and BootMod to
+// pull low FORCE_PWR pin or not in PEI phase
+//
+// This function only work for Thunderbolt Cactus Ridge chip and
+// system doesn't support wake up from Thunderbolt Device
+//
+// Input: UINT8 TbtSecurityLevel
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID PeiFinialProgramTbtSecurityLevel(
+ IN UINT8 TbtSecurityLevel
+)
+{
+// Sample code for ITE8728F
+/*
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ UINT8 Data8;
+ UINT8 SecLevel = TbtSecurityLevel;
+
+ OpenSioConfig();
+ SetSioLdn (0x07);
+ if(ReadSio (0x62) == 0x00){
+ //program Super IO Base Address
+ WriteSio(0x62, (UINT8)(IT8728_GPIO_BASE_ADDRESS >> 8));
+ WriteSio(0x63, (UINT8)(IT8728_GPIO_BASE_ADDRESS & 0xFF));
+ }
+
+ //The 400 ms delay has been done in TbtPei.c
+ //So just pull low GPIO_3(__FORCE_PWR) pin without any delay
+ if (SecLevel <= 4) {
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 1);
+ Data8 &= 0xFD;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 1, Data8);
+ }
+#endif
+//*/
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: FinialProgramTbtSecurityLevel
+//
+// Description: BIOS should depend on Security Level to pull low FORCE_PWR pin
+// or not
+//
+// This function only work for Thunderbolt Cactus Ridge chip
+//
+// Input: AMI_TBT_PLATFORM_POLICY_PROTOCOL *PlatformPolocy
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID FinialProgramTbtSecurityLevel(
+ IN AMI_TBT_PLATFORM_POLICY_PROTOCOL *PlatformPolocy
+)
+{
+// Sample code for ITE8728F
+/*
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ UINT8 Data8;
+ UINT8 SecLevel = PlatformPolocy->TbtSecurityLevel;
+
+ OpenSioConfig();
+ SetSioLdn (0x07);
+ if(ReadSio (0x62) == 0x00){
+ //program Super IO Base Address
+ WriteSio(0x62, (UINT8)(IT8728_GPIO_BASE_ADDRESS >> 8));
+ WriteSio(0x63, (UINT8)(IT8728_GPIO_BASE_ADDRESS & 0xFF));
+ }
+
+ if (SecLevel <= 4) {
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 1);
+ Data8 &= 0xFD;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 1, Data8);
+ }
+#endif
+//*/
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: ActiveTbtGpio2
+//
+// Description: BIOS should assert GO2Sx pin
+// That will trigger Host Router to prepare underlying devices
+// For Thunderbolt host is CR chip
+//
+// This function only work for Thunderbolt Cactus Ridge chip
+//
+// Input: None
+//
+// Output: EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS ActiveTbtGpio2 ( VOID )
+{
+// Sample code for ITE8728F
+/*
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ UINT8 Data8;
+
+ OpenSioConfig();
+
+ SetSioLdn(0x07);
+ if(ReadSio (0x62) == 0x00){
+ //program Super IO Base Address
+ WriteSio(0x62, (UINT8)(IT8728_GPIO_BASE_ADDRESS >> 8));
+ WriteSio(0x63, (UINT8)(IT8728_GPIO_BASE_ADDRESS & 0xFF));
+ }
+
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 1);
+ Data8 |= BIT0;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 1, Data8);
+#endif
+//*/
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: InactiveTbtGpio2
+//
+// Description: BIOS should deassert GO2Sx pin
+// That will trigger Host Router to prepare underlying devices
+//
+// This function only work for Thunderbolt Cactus Ridge chip
+//
+// Input: None
+//
+// Output: EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS InactiveTbtGpio2 ( VOID )
+{
+// Sample code for ITE8728F
+/*
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ UINT8 Data8;
+
+ OpenSioConfig();
+
+ SetSioLdn(0x07);
+ if(ReadSio (0x62) == 0x00){
+ //program Super IO Base Address
+ WriteSio(0x62, (UINT8)(IT8728_GPIO_BASE_ADDRESS >> 8));
+ WriteSio(0x63, (UINT8)(IT8728_GPIO_BASE_ADDRESS & 0xFF));
+ }
+
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 1);
+ Data8 &= 0xFE;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 1, Data8);
+#endif
+//*/
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: PollTbtGpio9
+//
+// Description: BIOS should poll OK2GO2SX_N_OD pin
+// Upon completion of all preparations, Host Router will assert
+// this pin to indicate readiness for Sx entry.
+//
+// This function only work for Thunderbolt Cactus Ridge chip
+//
+// Input: None
+//
+// Output: EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS PollTbtGpio9 ( VOID )
+{
+// Sample code for ITE8728F
+/*
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ UINT32 counter = 0;
+
+ while(IoRead8(IT8728_GPIO_BASE_ADDRESS + 1) & BIT2){
+ if (counter == 0x008FFFFF) break;
+ counter++;
+ }
+#endif
+//*/
+ return EFI_SUCCESS;
+};
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: PullDownTbtGpio9
+//
+// Description: BIOS should pull down OK2GO2SX_N_OD pin in Wake flow
+// if remebered Host Router state was active.
+//
+// This function only work for Thunderbolt Cactus Ridge chip and
+// system doesn't support wake up from Thunderbolt Device
+//
+// Input: None
+//
+// Output: EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS PullDownTbtGpio9 ( VOID )
+{
+// Sample code for ITE8728F
+/*
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ UINT8 Data8;
+
+ OpenSioConfig();
+
+ SetSioLdn(0x07);
+
+ if(ReadSio (0x62) == 0x00){
+ //program Super IO Base Address
+ WriteSio(0x62, (UINT8)(IT8728_GPIO_BASE_ADDRESS >> 8));
+ WriteSio(0x63, (UINT8)(IT8728_GPIO_BASE_ADDRESS & 0xFF));
+ }
+
+ //program GP22 as GPIO pin
+ Data8 = ReadSio (0x26);
+ Data8 |= 0x04;
+ WriteSio (0x26, Data8);
+
+ //program GP22 GPIO polarity
+ Data8 = ReadSio (0xB1);
+ Data8 &= 0xF8;
+ WriteSio (0xB1, Data8);
+
+ //program GP22 internal pull-up enable
+ Data8 = ReadSio (0xB9);
+ Data8 |= 0x04;
+ WriteSio (0xB9, Data8);
+
+ //program GP22 Simple I/O enable
+ Data8 = ReadSio (0xC1);
+ Data8 |= 0x04;
+ WriteSio (0xC1, Data8);
+
+ //program GP22 Input/Output Configure
+ //1:Output Mode 0:Input Mode
+ Data8 = ReadSio (0xC9);
+ Data8 |= 0x04;
+ WriteSio (0xC9, Data8);
+
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 1);
+ Data8 &= 0xFB;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 1, Data8);
+#endif
+//*/
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: ReleaseTbtGpio9
+//
+// Description: BIOS should release pull down OK2GO2SX_N_OD pin in Wake flow
+// if remebered Host Router state was active
+//
+// This function only work for Thunderbolt Cactus Ridge chip and
+// system doesn't support wake up from Thunderbolt Device
+//
+// Input: None
+//
+// Output: EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS ReleaseTbtGpio9 ( VOID )
+{
+// Sample code for ITE8728F
+/*
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ UINT8 Data8;
+
+ OpenSioConfig();
+
+ SetSioLdn(0x07);
+
+ //program GP22 Input/Output Configure
+ //1:Output Mode 0:Input Mode
+ Data8 = ReadSio (0xC9);
+ Data8 &= 0xFB;
+ WriteSio (0xC9, Data8);
+#endif
+//*/
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: PowerOnPOC
+//
+// Description: Power on POC to wake up thunderbolt
+//
+// This function is optional and only work for Thunderbolt Cactus
+// Ridge chip and system doesn't support wake up from Thunderbolt
+// Device.
+//
+// Input: None
+//
+// Output: EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS PowerOnPOC ( VOID )
+{
+// Sample code for ITE8728F
+/*
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ UINT8 Data8;
+
+ OpenSioConfig();
+ SetSioLdn(0x07);
+
+ if(ReadSio (0x62) == 0x00){
+ //program Super IO Base Address
+ WriteSio(0x62, (UINT8)(IT8728_GPIO_BASE_ADDRESS >> 8));
+ WriteSio(0x63, (UINT8)(IT8728_GPIO_BASE_ADDRESS & 0xFF));
+ }
+
+ //program GP40 as GPIO pin
+ Data8 = ReadSio (0x28);
+ Data8 |= 0x01;
+ WriteSio (0x28, Data8);
+
+ //program GP40 GPIO polarity
+ Data8 = ReadSio (0xB3);
+ Data8 &= 0xFE;
+ WriteSio (0xB3, Data8);
+
+ //GP40 internal internal pull-up enable
+ Data8 = ReadSio (0xBB);
+ Data8 |= 0x01;
+ WriteSio (0xBB, Data8);
+
+ //GP40 Simple I/O enable
+ Data8 = ReadSio (0xC3);
+ Data8 |= 0x01;
+ WriteSio (0xC3, Data8);
+
+ //GP40 Input/Output Configure
+ //1:Output Mode 0:Input Mode
+ Data8 = ReadSio (0xCB);
+ Data8 |= 0x01;
+ WriteSio (0xCB, Data8);
+
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 3);
+ if (!(Data8 & BIT0)){
+ Data8 |= 0x01;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 3, Data8);
+ }
+#endif
+//*/
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: PowerOffPOC
+//
+// Description: Power off POC to cut off thunderbolt power
+//
+// This function is optional and only work for Thunderbolt Cactus
+// Ridge chip and system doesn't support wake up from Thunderbolt
+// Device.
+//
+// Input: None
+//
+// Output: EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS PowerOffPOC ( VOID )
+{
+// Sample code for ITE8728F
+/*
+#if !defined BWT2_BOARD || BWT2_BOARD == 0
+ UINT8 Data8;
+
+ OpenSioConfig();
+ SetSioLdn(0x07);
+
+ if(ReadSio (0x62) == 0x00){
+ //program Super IO Base Address
+ WriteSio(0x62, (UINT8)(IT8728_GPIO_BASE_ADDRESS >> 8));
+ WriteSio(0x63, (UINT8)(IT8728_GPIO_BASE_ADDRESS & 0xFF));
+ }
+
+ Data8 = IoRead8(IT8728_GPIO_BASE_ADDRESS + 3);
+ Data8 &= 0xFE;
+ IoWrite8(IT8728_GPIO_BASE_ADDRESS + 3, Data8);
+#endif
+//*/
+ return EFI_SUCCESS;
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtOemLib.h b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemLib.h
new file mode 100644
index 0000000..ba3ca91
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemLib.h
@@ -0,0 +1,216 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtOemLib.h 4 5/19/14 7:38a Barretlin $
+//
+// $ReviGpion: 1 $
+//
+// $Date: 5/19/14 7:38a $
+//*************************************************************************
+// ReviGpion History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtOemLib.h $
+//
+// 4 5/19/14 7:38a Barretlin
+// [TAG] EIP165410
+// [Category] New Feature
+// [Description] Support Thunderbolt AIC at NB PCIE slot
+// [Files] TbtPei.c TbtDxe.c TbtGpe.asl TbtSmm.c TbtOemBoard.c
+// TbtOemLib.c TbtOemLib.h TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+// TbtSetupReset.c
+//
+// 3 1/05/14 2:06p Barretlin
+// [TAG] EIP N/A
+// [Category] New Feature
+// [Description] Support Thunderbolt feature Enable/Disable in run time
+// Support dynamic Thunderbolt AIC location in run time
+// [Files] TbtOemBoard.h TbtOemBoard.c TbtOemLib.c TbtOemLib.h
+//
+// 2 4/03/13 2:47a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Double check Security Level between Thunderbolt host FW
+// and BIOS are same or not for Redwood Ridge chip when entering setup
+// page.
+// [Files] TbtOemLib.c TbtOemLib.h TbtSetupReset.c
+//
+// 1 1/10/13 4:57a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 7 12/12/12 4:14a Barretlin
+// [TAG] EIP108272
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update to Spec 1.4 to support Redwood Ridge chip
+// [Files] TbtPei.c TbtSmm.c TbtDxe.c TbtDxe.sdl TbtGpe.asl
+// TbtOemBoard.c TbtOemBoard.h TbtOemLib.c TbtOemLib.h
+//
+// 6 10/28/12 11:50p Barretlin
+// [TAG] EIP104870
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Change wake up flow for Spec 1.2 and Spec 1.3
+// [Files] TbtPei.c TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+// TbtOemBoard.sdl TbtOemLib.c TbtOemLib.h
+//
+// 5 10/04/12 10:42p Barretlin
+// [TAG] EIP102947
+// [Category] Spec Update
+// [Severity] Normal
+// [Description] Update Thunderbolt Spec to Rev 1.2
+// [Files] TbtPei.c TbtOemLib.c TbtOemLib.h
+//
+// 4 10/03/12 9:27p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Change Programming security level timing for saving
+// boot time
+// [Files] TbtPei.c TbtDxe.c TbtOemBoard.h TbtOemLib.c TbtOemLib.h
+//
+// 3 3/05/12 1:16a Barretlin
+// [TAG] EIP83266
+// [Category] Spec Update
+// [Description] Specificatoin Update 0.90
+// [Files] TbtSetup.sdl
+// TbtSetup.sd
+// TbtSetup.uni
+// TbtSetup.cif
+// TbtOemBoard.h
+// TbtOemLib.c
+// TbtOemLib.h
+// TbtSmm.c
+// TbtPei..
+//
+// 1 2/19/12 11:56p Wesleychen
+// [TAG] None
+// [Category] Improvement
+// [Description] Add TbtOemLib.
+// [Files] TbtOemLib.c; TbtOemLib.h; TbtOemBoard,mak;
+// TbtOemBoard.cif.
+//
+// 1 12/08/11 4:09a Wesleychen
+// Thunderbolt eModule initially releases.
+//
+//*************************************************************************
+#ifndef _THUNDERBOLT_OEM_LIB_
+#define _THUNDERBOLT_OEM_LIB_
+
+#include "TbtOemBoard.h"
+
+UINT8 ReadSio(
+ IN UINT8 Index
+);
+
+VOID WriteSio(
+ IN UINT8 Index,
+ IN UINT8 Value
+);
+
+VOID SetSio(
+ IN UINT8 Index,
+ IN UINT8 Set
+);
+
+VOID ResetSio(
+ IN UINT8 Index,
+ IN UINT8 Rst
+);
+
+VOID OpenSioConfig(
+ VOID
+);
+
+VOID SetSioLdn(
+ IN UINT8 Ldn
+);
+
+UINT8 GetHRInfo(
+ VOID
+);
+
+BOOLEAN TbtSetPCIe2TBTCommand(
+ IN UINT8 UpPortBus,
+ IN UINT8 Data,
+ IN UINT8 Command,
+ IN UINTN Timeout
+);
+
+VOID TbtBeforeSxExitFlow(
+ IN VOID *Services,
+ IN UINT8 TbtHostSeries
+);
+
+UINT8 SynchSecurityLevel(
+ IN UINT8 BiosSecurityLevel,
+ IN UINT8 TbtHostLocation
+);
+
+VOID ProgramTbtSecurityLevel(
+ IN UINT8 *TbtSecurityLevel,
+ IN UINT8 TbtHostSeries,
+ IN UINT8 TbtHostLocation,
+ IN BOOLEAN IsPei
+);
+
+VOID PeiFinialProgramTbtSecurityLevel(
+ IN UINT8 TbtSecurityLevel
+);
+
+VOID FinialProgramTbtSecurityLevel(
+ IN AMI_TBT_PLATFORM_POLICY_PROTOCOL *PlatformPolocy
+);
+
+EFI_STATUS ActiveTbtGpio2(
+ VOID
+);
+
+EFI_STATUS InactiveTbtGpio2(
+ VOID
+);
+
+EFI_STATUS PollTbtGpio9(
+ VOID
+);
+
+EFI_STATUS PullDownTbtGpio9(
+ VOID
+);
+
+EFI_STATUS ReleaseTbtGpio9(
+ VOID
+);
+
+EFI_STATUS PowerOnPOC(
+ VOID
+);
+
+EFI_STATUS PowerOffPOC(
+ VOID
+);
+
+#endif // _THUNDERBOLT_OEM_LIB_
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtOemPorting.asl b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemPorting.asl
new file mode 100644
index 0000000..7edd513
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtOemPorting.asl
@@ -0,0 +1,13 @@
+ // Asserts/De-asserts TBT force power
+ Method(TBFP, 1)
+ {
+ // OEM Porting Required
+ If(Arg0)
+ {
+ // Implementation dependent way to assert TBT force power
+ }
+ Else
+ {
+ // Implementation dependent way to de-assert TBT force power
+ }
+ } \ No newline at end of file
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.c b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.c
new file mode 100644
index 0000000..f22b493
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.c
@@ -0,0 +1,172 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.c 5 2/18/14 7:31a Barretlin $
+//
+// $Revision: 5 $
+//
+// $Date: 2/18/14 7:31a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.c $
+//
+// 5 2/18/14 7:31a Barretlin
+// [TAG] EIP152401
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] add new thunderbolt chip series
+// [Files] TbtSetup.c
+//
+// 4 6/19/13 8:33a Barretlin
+// [TAG] EIP126581
+// [Category] Improvement
+// [Description] use thunderbolt FR spec token to update setup string
+// [Files] TbtSeup.c
+//
+// 3 6/16/13 10:23p Barretlin
+// [TAG] EIP None
+// [Category] Improvement
+// [Description] change CR BIOS Spec version display way
+// [Files] TbtSetup.c
+//
+// 2 5/27/13 8:15a Barretlin
+// [TAG] EIP124914
+// [Category] New Feature
+// [Description] Support Falcon Ridge chip
+// [Files] TbtSetup.c
+//
+// 1 1/10/13 4:57a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 4 8/16/12 4:19p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Add Thunderbolt Intel Sample Code version information
+// [Files] Thunderbolt.sdl TbtSetup.sd TbtSetup.uni TbtSetup.c
+//
+// 3 7/31/12 5:28a Barretlin
+//
+// 2 5/24/12 10:20p Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Add Thunderbolt version on setup menu
+// [Files] TbtSetup.sd TbtSetup.uni TbtSetup.c
+// Thunderbolt.sdl
+//
+// 1 12/08/11 4:09a Wesleychen
+// Thunderbolt eModule initially releases.
+//
+//**********************************************************************
+#include <token.h>
+#include <Setup.h>
+#include <AmiCSPLib.h>
+#include <AmiDxeLib.h>
+#include <TbtOemBoard.h>
+#include <SetupStrTokens.h>
+#if EFI_SPECIFICATION_VERSION>0x20000
+#include <Protocol\HiiDatabase.h>
+#include <Protocol\HiiString.h>
+#else
+#include <Protocol/Hii.h>
+#endif
+
+//----------------------------------------------------------------------------
+// GUID Definition(s)
+//----------------------------------------------------------------------------
+static EFI_GUID TbtHRStatusGuid = AMI_TBT_HR_STATUS_GUID;
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: InitiTbtInfo
+//
+// Description: Initializes Thunderbolt Setup String
+//
+// Input: HiiHandle - Handle to HII database
+// Class - Indicates the setup class
+//
+// Output: None
+//
+// Notes: PORTING REQUIRED
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID InitiTbtInfo(
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class )
+{
+ EFI_STATUS Status;
+ UINTN HRStatusSize = sizeof(AMI_TBT_HR_STATUS_DATA);
+ CHAR16 TbtHRStatusVar[] = TBT_HR_STATUS_VARIABLE;
+ AMI_TBT_HR_STATUS_DATA HRStatusData;
+ CHAR16 *TbtCR = L"Cactus Ridge";
+ CHAR16 *TbtRR = L"Redwood Ridge";
+ CHAR16 *TbtFR = L"Falcon Ridge";
+ CHAR16 *TbtWR = L"BDW-TBT-LP(WR)";
+
+ Status = pRS->GetVariable( L"TbtHRStatusVar", \
+ &TbtHRStatusGuid, \
+ NULL, \
+ &HRStatusSize, \
+ &HRStatusData );
+
+ TRACE((-1, "TbtSetup: HR is %x series\n", HRStatusData.TbtHRSeries));
+
+ InitString(HiiHandle, STRING_TOKEN(STR_TBT_RC_VERSION_VALUE),
+ L"%d.%d", TBT_RC_VERSION/10, TBT_RC_VERSION%10);
+
+ if (HRStatusData.TbtHRSeries == Cactus_Ridge){
+ InitString(HiiHandle, STRING_TOKEN(STR_TBT_SPEC_VERSION_VALUE),
+ L"%d.%d", Thunderbolt_CR_VERSION/10, Thunderbolt_CR_VERSION%10);
+
+ InitString(HiiHandle, STRING_TOKEN(STR_TBT_HOST_VALUE),
+ L"%s", TbtCR);
+ } else if (HRStatusData.TbtHRSeries == Redwood_Ridge) {
+ InitString(HiiHandle, STRING_TOKEN(STR_TBT_SPEC_VERSION_VALUE),
+ L"%d.%d", Thunderbolt_RR_VERSION/10, Thunderbolt_RR_VERSION%10);
+
+ InitString(HiiHandle, STRING_TOKEN(STR_TBT_HOST_VALUE),
+ L"%s", TbtRR);
+ } else if (HRStatusData.TbtHRSeries == Falcon_Ridge){
+ InitString(HiiHandle, STRING_TOKEN(STR_TBT_SPEC_VERSION_VALUE),
+ L"%d.%d", Thunderbolt_FR_VERSION/10, Thunderbolt_FR_VERSION%10);
+
+ InitString(HiiHandle, STRING_TOKEN(STR_TBT_HOST_VALUE),
+ L"%s", TbtFR);
+ } else {
+ InitString(HiiHandle, STRING_TOKEN(STR_TBT_SPEC_VERSION_VALUE),
+ L"%d.%d", Thunderbolt_WR_VERSION/10, Thunderbolt_WR_VERSION%10);
+
+ InitString(HiiHandle, STRING_TOKEN(STR_TBT_HOST_VALUE),
+ L"%s", TbtWR);
+ }
+}
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.cif b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.cif
new file mode 100644
index 0000000..8b8b975
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.cif
@@ -0,0 +1,14 @@
+<component>
+ name = "TbtSetup"
+ category = ModulePart
+ LocalRoot = "Board\EM\Thunderbolt\TbtOemBoard\TbtSetup"
+ RefName = "TbtSetup"
+[files]
+"TbtSetup.sdl"
+"TbtSetup.mak"
+"TbtSetup.sd"
+"TbtSetup.uni"
+"TbtSetup.c"
+"TbtSetup.h"
+"TbtSetupReset.c"
+<endComponent>
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.h b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.h
new file mode 100644
index 0000000..f249648
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.h
@@ -0,0 +1,70 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.h 1 1/10/13 4:57a Barretlin $
+//
+// $Revision: 1 $
+//
+// $Date: 1/10/13 4:57a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.h $
+//
+// 1 1/10/13 4:57a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 1 12/08/11 4:09a Wesleychen
+// Thunderbolt eModule initially releases.
+//
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: iFfsSetup.h
+//
+// Description: Header file for iFfsSetup module.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#ifndef __FFS_SETUP_H__
+#define __FFS_SETUP_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/****** DO NOT WRITE BELOW THIS LINE *******/
+#ifdef __cplusplus
+}
+#endif
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.mak b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.mak
new file mode 100644
index 0000000..95a1028
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.mak
@@ -0,0 +1,89 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.mak 1 1/10/13 4:57a Barretlin $
+#
+# $Revision: 1 $
+#
+# $Date: 1/10/13 4:57a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.mak $
+#
+# 1 1/10/13 4:57a Barretlin
+# Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+# Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+#
+# 2 12/12/12 4:47a Barretlin
+# [TAG] None
+# [Category] New Feature
+# [Description] Add Thunderbolt TSE Setup Reset Hook
+# [Files] TbtSetup.sdl TbtSetup.mak TbtSetup.cif TbtSetupReset.c
+#
+# 1 12/08/11 4:09a Wesleychen
+# Thunderbolt eModule initially releases.
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name: Tbt Setup.mak
+#
+# Description: Makfile for TBT Setup module.
+#
+#----------------------------------------------------------------------------
+#<AMI_FHDR_END>
+All : TbtSetup
+
+TbtSetup : $(BUILD_DIR)\TbtSetup.mak
+
+SetupSdbs : $(BUILD_DIR)\TbtSetup.sdb
+
+$(BUILD_DIR)\TbtSetup.sdb : $(TbtSetup_DIR)\$(@B).sd $(TbtSetup_DIR)\$(@B).uni
+ $(STRGATHER) -i INCLUDE -parse -newdb -db $(BUILD_DIR)\$(@B).sdb $(TbtSetup_DIR)\$(@B).uni
+ $(STRGATHER) -scan -db $(BUILD_DIR)\$(@B).sdb -od $(BUILD_DIR)\$(@B).sdb $(TbtSetup_DIR)\$(@B).sd
+
+$(BUILD_DIR)\TbtSetup.mak : $(TbtSetup_DIR)\$(@B).cif $(TbtSetup_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(TbtSetup_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+SetupBin : $(BUILD_DIR)\TbtSetup.obj
+
+$(BUILD_DIR)\TbtSetup.obj : $(TbtSetup_DIR)\TbtSetup.c $(BUILD_DIR)\SetupStrTokens.h
+ $(CC) $(CFLAGS) $(TBT_OEMBOARD_INCLUDES) /Fo$(BUILD_DIR)\ $(TbtSetup_DIR)\TbtSetup.c
+
+#----------------------------------------------------------------------------
+# Create Thunderbolt Setup TSE Reset Hook
+#----------------------------------------------------------------------------
+AMITSEBin : $(BUILD_DIR)\TbtSetupReset.obj
+
+$(BUILD_DIR)\TbtSetupReset.obj : $(TbtSetup_DIR)\TbtSetupReset.c $(AMICSPLib)
+ $(CC) $(CFLAGS) $(INTEL_PCH_INCLUDES) $(TBT_OEMBOARD_INCLUDES) /Fo$(BUILD_DIR)\ $(TbtSetup_DIR)\TbtSetupReset.c
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.sd b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.sd
new file mode 100644
index 0000000..ccc8166
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.sd
@@ -0,0 +1,1456 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+//
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.sd 13 5/19/14 7:40a Barretlin $
+//
+// $Revision: 13 $
+//
+// $Date: 5/19/14 7:40a $
+//
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.sd $
+//
+// 13 5/19/14 7:40a Barretlin
+// [TAG] EIP165410
+// [Category] Improvement
+// [Description] Support Thunderbolt AIC at NB PCIE slot
+// [Files] TbtPei.c TbtDxe.c TbtGpe.asl TbtSmm.c TbtOemBoard.c
+// TbtOemLib.c TbtOemLib.h TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+// TbtSetupReset.c
+//
+// 12 5/19/14 7:19a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Using setup item choose return value of _RMV method in
+// ASL code
+// [Files] TbtDxe.c TbtGpe.asl TbtOemBoard.c TbtOemBoard.h TbtSetup.sd
+// TbtSetup.sdl TbtSetup.uni
+//
+// 11 2/10/14 1:30p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] remove useless policy item and setup item
+// [Files] TbtOemBoard.h TbtOemBoard.c TbSetup.sdl TbtSetup.sd
+// TbtSetup.uni TbtSmm.c
+//
+// 10 1/05/14 2:14p Barretlin
+// [TAG] EIP N/A
+// [Category] New Feature
+// [Description] Support Thunderbolt feature Enable/Disable in run time
+// Support dynamic Thunderbolt AIC location in run time
+// [Files] TbtSetup.sdl TbtSetup.sd TbtSetup.uni TbtSetupReset.c
+//
+// 9 12/24/13 11:40a Barretlin
+// [TAG] EIP148198
+// [Category] Improvement
+// [Description] Updating for Thunderbolt BIOS additions rev.1.8
+// [Files] TbtSetup.sd
+//
+// 8 6/24/13 5:10a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix build error with non Intel RC project
+// [Files] TbtSetup.sd
+//
+// 7 6/17/13 4:25a Barretlin
+// [TAG] EIP126581
+// [Category] Improvement
+// [Description] add new AIC support setup item and change
+// TBWakeupSupport name
+// [Files] TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+//
+// 6 5/06/13 12:13a Barretlin
+//
+// 5 4/24/13 1:38a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Clone APCI PCIE setup item
+// [Files] TbtSetup.sd TbtSetup.uni
+//
+// 4 4/09/13 11:38p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Add cloned PCIE config for ULT platform
+// [Files] TbtSetup.sd
+//
+// 3 3/21/13 6:00a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Clone PCIE prot swap setup item and set disable by
+// default
+// [Files] TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+//
+// 2 2/06/13 1:55a Barretlin
+// [TAG] EIP None
+// [Category] Improvement
+// [Description] Hide unused setup item for RR chip
+// [Files] TbtSetup.sd
+//
+// 1 1/10/13 4:57a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 15 10/27/12 6:16a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Create new setup item for thunderbolt POC handling
+// [Files] TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+//
+// 14 10/04/12 5:40p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Update Setup item
+// [Files] TbtOemBoard.sdl TbtSetup.sd TbtSetup.uni
+//
+// 13 9/22/12 9:53a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Clone SB PCIE setup item which are related thunderbolt
+// [Files] TbtSetup.sd TbtSetup.uni
+//
+// 12 8/20/12 5:16a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix IO resource workaround broken in 4C 2port case
+// [Files] TbtSmm.c TbtOemBoard.c TbtOemBoard.h TbtSetup.sdl
+// TbtSetup.sd TbtSetup.uni
+//
+// 11 8/17/12 8:53a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Add IO resource workaround for Thunderbolt Spec1.1
+// Because new spec has removed IO resource for Thunderbolt device
+// [Files] TbtSmm.c TbtOemBoard.c TbtOemBoard.h TbtSetup.sdl
+// TbtSetup.sd TbtSetup.uni
+//
+// 10 8/16/12 4:19p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Add Thunderbolt Intel Sample Code version information
+// [Files] Thunderbolt.sdl TbtSetup.sd TbtSetup.uni TbtSetup.c
+//
+// 9 7/31/12 4:01a Barretlin
+// [TAG] EIP96350
+// [Category] Spec Update
+// [Severity] Critical
+// [Description] Updated Thunderbolt specification to version 1.00
+// [Files] TbtDxe.c TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+// TbtOemBoard.sdl TbtSetup.sd TbtSetup.uni
+//
+// 8 7/31/12 3:28a Barretlin
+// [TAG] EIP91119
+// [Category] Improvement
+// [Description] Resolution for enable/disable Thunderbolt device option
+// rom at POST time
+// [Files] TbtDxe.c TbtOemBoard.c TbtOemBoard.h TbtOemBoard.sdl
+// TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+//
+// 7 5/24/12 10:20p Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Add Thunderbolt version on setup menu
+// [Files] TbtSetup.sd TbtSetup.uni TbtSetup.c
+// Thunderbolt.sdl
+//
+// 6 5/22/12 10:05a Barretlin
+// [TAG] EIP90650
+// [Category] Spec Update
+// [Description] Specificatoin Update 0.94 - The default value of
+// OPTIONAL workaround for devices that don't support surprise-removal
+// should be disable.
+// [Files] TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+// TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+//
+// 5 5/07/12 7:04a Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Add three setup items for debug
+// [Files] TbtDxe.c
+// TbtGpe.asl
+// TbtSmm.c
+// TbtSetup.sd
+// TbtSetup.uni
+// TbtOemBoard.c
+// TbtOemBoard.h
+//
+// 4 3/05/12 1:11a Barretlin
+// [TAG] EIP83266
+// [Category] Spec Update
+// [Description] Specificatoin Update 0.90
+// [Files] TbtSetup.sdl
+// TbtSetup.sd
+// TbtSetup.uni
+// TbtSetup.cif
+// TbtOemBoard.h
+// TbtOemLib.c
+// TbtOemLib.h
+// TbtSmm.c
+// TbtPei..
+//
+// 2 2/19/12 11:52p Wesleychen
+// Add new setup item "SmiNotifyEnabled".
+//
+// 1 12/08/11 4:09a Wesleychen
+// Thunderbolt eModule initially releases.
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name: Thunderbolt Setup.sd
+//
+// Description: Setup for Thunderbolt Setup.
+//
+//----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#ifdef SETUP_DATA_DEFINITION
+/***********************************************************/
+/* Put NVRAM data definitions here.
+/* For example: UINT8 Data1;
+/* These definitions will be converted by the build process
+/* to a definitions of SETUP_DATA fields.
+/***********************************************************/
+ UINT8 TbtEnable;
+ UINT8 TbtHRSeries;
+ UINT8 TbtWakeupSupport;
+ UINT8 TbtAICSupport;
+ UINT8 TbtHostLocation;
+ UINT8 TbtHandlePOC;
+ UINT8 TbtCacheLineSize;
+ UINT8 TbtSecurityLevel;
+ UINT8 SmiNotifyEnabled;
+ UINT8 SwSmiEnabled;
+ UINT8 NotifyEnabled;
+ UINT8 TbtRmvReturnValue;
+ UINT8 TbtOptionRom;
+ UINT16 TbtWakeupDelay;
+ UINT16 TbtSwSMIDelay;
+ //Resources for Per Slot under Thunderbolt
+ UINT16 ReserveMemoryPerSlot;
+ UINT16 ReservePMemoryPerSlot;
+ UINT8 ReserveIOPerSlot;
+ UINT8 TbtIOresourceEnable;
+ UINT8 TbtNVMversion;
+#endif
+
+#if defined(VFRCOMPILE) && !defined(CONTROLS_ARE_DEFINED)
+#define CONTROL_DEFINITION
+#endif
+//---------------------------------------------------------------------------
+
+//---------------------------------------------------------------------------
+#ifdef CONTROL_DEFINITION
+
+#define TBT_ONEOF_TBTENABLE\
+ checkbox varid = SETUP_DATA.TbtEnable,\
+ prompt = STRING_TOKEN (STR_TBT_ENABLE_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_ENABLE_HELP),\
+ flags = DEFAULT_TBT_ENABLE | MANUFACTURING | RESET_REQUIRED,\
+ endcheckbox;
+
+#define TBT_ONEOF_TBTWAKEUPSUPPORT\
+ checkbox varid = SETUP_DATA.TbtWakeupSupport,\
+ prompt = STRING_TOKEN (STR_TBT_DEVICE_WAKE_UP_SUPPORT_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_DEVICE_WAKE_UP_SUPPORT_HELP),\
+ flags = DEFAULT_TB_WAKE_UP_SUPPORT | RESET_REQUIRED | MANUFACTURING, \
+ endcheckbox;
+
+#define TBT_ONEOF_TBTHANDLEPOC\
+ checkbox varid = SETUP_DATA.TbtHandlePOC,\
+ prompt = STRING_TOKEN (STR_TBT_HANDLE_POC_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_HANDLE_POC_HELP),\
+ flags = DEFAULT_TBT_HANDLE_POC | RESET_REQUIRED | MANUFACTURING, \
+ endcheckbox;
+
+#define TBT_ONEOF_TBTAICSUPPORT\
+ checkbox varid = SETUP_DATA.TbtAICSupport,\
+ prompt = STRING_TOKEN (STR_TBT_AIC_SUPPORT_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_AIC_SUPPORT_HELP),\
+ flags = DEFAULT_TBT_AIC_SUPPORT | RESET_REQUIRED | MANUFACTURING, \
+ endcheckbox;
+
+#define TBT_ONEOF_TBTHOSTLOCATION\
+ oneof varid = SETUP_DATA.TbtHostLocation,\
+ prompt = STRING_TOKEN (STR_TBT_HOST_LOCATION_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_HOST_LOCATION_HELP),\
+ default = DEFAULT_TBT_AIC_LOCATION,\
+ option text = STRING_TOKEN(STR_TBT_HOST_LOCATION_000), value = 0x00, flags = MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_HOST_LOCATION_001), value = 0x01, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_HOST_LOCATION_002), value = 0x02, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_HOST_LOCATION_003), value = 0x03, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_HOST_LOCATION_004), value = 0x04, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_HOST_LOCATION_005), value = 0x05, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_HOST_LOCATION_006), value = 0x06, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_HOST_LOCATION_007), value = 0x07, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_HOST_LOCATION_016), value = 0x20, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_HOST_LOCATION_017), value = 0x21, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_HOST_LOCATION_018), value = 0x22, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define TBT_ONEOF_TBTCACHELINESIZE\
+ oneof varid = SETUP_DATA.TbtCacheLineSize,\
+ prompt = STRING_TOKEN(STR_TBT_CACHE_LINE_SIZE_PROMPT),\
+ help = STRING_TOKEN(STR_TBT_CACHE_LINE_SIZE_HELP),\
+ option text = STRING_TOKEN(STR_TBT_CACHE_LINE_SIZE_000), value = 0x00, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CACHE_LINE_SIZE_001), value = 0x01, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CACHE_LINE_SIZE_002), value = 0x02, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CACHE_LINE_SIZE_004), value = 0x04, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CACHE_LINE_SIZE_008), value = 0x08, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CACHE_LINE_SIZE_016), value = 0x10, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CACHE_LINE_SIZE_032), value = 0x20, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CACHE_LINE_SIZE_064), value = 0x40, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CACHE_LINE_SIZE_128), value = 0x80, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#if defined (TBT_HR_PWR) && (TBT_HR_PWR != 0xFF)
+#define TBT_ONEOF_TBTCRSECURITYLEVEL\
+ oneof varid = SETUP_DATA.TbtSecurityLevel,\
+ prompt = STRING_TOKEN(STR_TBT_SECURITY_LEVEL_PROMPT),\
+ help = STRING_TOKEN(STR_TBT_SECURITY_LEVEL_HELP),\
+ option text = STRING_TOKEN(STR_TBT_CR_MODE1), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CR_MODE2), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CR_MODE3), value = 3, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CR_MODE4), value = 4, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CR_MODE5), value = 5, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CR_MODE6), value = 6, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#else
+#define TBT_ONEOF_TBTCRSECURITYLEVEL\
+ oneof varid = SETUP_DATA.TbtSecurityLevel,\
+ prompt = STRING_TOKEN(STR_TBT_SECURITY_LEVEL_PROMPT),\
+ help = STRING_TOKEN(STR_TBT_SECURITY_LEVEL_HELP),\
+ option text = STRING_TOKEN(STR_TBT_CR_MODE1), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CR_MODE2), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CR_MODE3), value = 3, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CR_MODE4), value = 4, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_CR_MODE6), value = 6, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif
+
+#define TBT_ONEOF_TBTRRSECURITYLEVEL\
+ oneof varid = SETUP_DATA.TbtSecurityLevel,\
+ prompt = STRING_TOKEN(STR_TBT_SECURITY_LEVEL_PROMPT),\
+ help = STRING_TOKEN(STR_TBT_SECURITY_LEVEL_HELP),\
+ option text = STRING_TOKEN(STR_TBT_RR_MODE1), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_RR_MODE2), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_RR_MODE3), value = 3, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_RR_MODE4), value = 4, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define TBT_ONEOF_SMINOTIFYENABLED\
+ checkbox varid = SETUP_DATA.SmiNotifyEnabled,\
+ prompt = STRING_TOKEN (STR_TBT_SMI_NOTIFY_SUPPORT_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_SMI_NOTIFY_SUPPORT_HELP),\
+ flags = DEFAULT_TB_SMI_NOTIFY_SUPPORT | RESET_REQUIRED | MANUFACTURING, \
+ endcheckbox;
+
+#define TBT_ONEOF_SWSMIENABLED\
+ checkbox varid = SETUP_DATA.SwSmiEnabled,\
+ prompt = STRING_TOKEN (STR_TBT_SWSMI_SUPPORT_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_SWSMI_SUPPORT_HELP),\
+ flags = DEFAULT_TB_SMI_NOTIFY_SUPPORT | RESET_REQUIRED | MANUFACTURING, \
+ endcheckbox;
+
+#define TBT_ONEOF_NOTIFYENABLED\
+ checkbox varid = SETUP_DATA.NotifyEnabled,\
+ prompt = STRING_TOKEN (STR_TBT_NOTIFY_SUPPORT_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_NOTIFY_SUPPORT_HELP),\
+ flags = DEFAULT_TB_SMI_NOTIFY_SUPPORT | RESET_REQUIRED | MANUFACTURING, \
+ endcheckbox;
+
+#define TBT_ONEOF_RMVRETRUNVALUE\
+ oneof varid = SETUP_DATA.TbtRmvReturnValue,\
+ prompt = STRING_TOKEN(STR_TBT_RMV_RETURN_VALUE_PROMPT),\
+ help = STRING_TOKEN(STR_TBT_RMV_RETURN_VALUE_HELP),\
+ default = DEFAULT_TBT_RMV_RETURN_VALUE,\
+ option text = STRING_TOKEN(STR_TBT_RMV_RETURN_VALUE_0), value = 0, flags = MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_TBT_RMV_RETURN_VALUE_1), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define TBT_ONEOF_OPTIONROM\
+ checkbox varid = SETUP_DATA.TbtOptionRom,\
+ prompt = STRING_TOKEN (STR_TBT_OPTIONROM_SUPPORT_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_OPTIONROM_SUPPORT_HELP),\
+ flags = DEFAULT_SKIP_TBT_OPTIONROM | RESET_REQUIRED | MANUFACTURING, \
+ endcheckbox;
+
+#define TBT_ONEOF_TBTWAKEUPDELAY\
+ numeric varid = SETUP_DATA.TbtWakeupDelay,\
+ prompt = STRING_TOKEN (STR_TBT_WAKE_UP_DELAY_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_WAKE_UP_DELAY_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 65535,\
+ step = 1,\
+ default = DEFAULT_TBT_WAK_DELAY,\
+ option text = STRING_TOKEN (STR_TBT_WAKE_UP_DELAY_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define TBT_ONEOF_TBTSWSMIDELAY\
+ numeric varid = SETUP_DATA.TbtSwSMIDelay,\
+ prompt = STRING_TOKEN (STR_TBT_SWSMI_DELAY_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_SWSMI_DELAY_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 65535,\
+ step = 1,\
+ default = DEFAULT_TBT_SWSMI_DELAY,\
+ option text = STRING_TOKEN (STR_TBT_SWSMI_DELAY_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define TBT_ONEOF_PERSLOTMEMRSVD\
+ numeric varid = SETUP_DATA.ReserveMemoryPerSlot,\
+ prompt = STRING_TOKEN (STR_TBT_PERSLOT_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_PERSLOT_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = TBT_MAX_PCIE_MEM_RESERVED,\
+ step = 1,\
+ default = 32,\
+ option text = STRING_TOKEN (STR_TBT_PERSLOT_RMEM_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define TBT_ONEOF_PERSLOTPFMEMRSVD\
+ numeric varid = SETUP_DATA.ReservePMemoryPerSlot,\
+ prompt = STRING_TOKEN (STR_TBT_PERSLOT_PF_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_PERSLOT_PF_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = TBT_MAX_PCIE_PF_MEM_RESERVED,\
+ step = 1,\
+ default = 32,\
+ option text = STRING_TOKEN (STR_TBT_PERSLOT_PF_RMEM_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define TBT_ONEOF_PERSLOTIORSVD\
+ numeric varid = SETUP_DATA.ReserveIOPerSlot,\
+ prompt = STRING_TOKEN (STR_TBT_PERSLOT_RVIO_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_PERSLOT_RVIO_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 4,\
+ maximum = TBT_MAX_PCIE_IO_RESERVED,\
+ step = 4,\
+ default = 4,\
+ option text = STRING_TOKEN (STR_TBT_PERSLOT_RVIO_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define TBT_ONEOF_IORESOURCEENABLED\
+ checkbox varid = SETUP_DATA.TbtIOresourceEnable,\
+ prompt = STRING_TOKEN (STR_TBT_IORESOURCE_SUPPORT_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_IORESOURCE_SUPPORT_HELP),\
+ flags = DEFAULT_TBT_IO_RESOURCE_SUPPORT | RESET_REQUIRED | MANUFACTURING, \
+ endcheckbox;
+
+#define TBT_ONEOF_NVMVERSION\
+ numeric varid = SETUP_DATA.TbtNVMversion,\
+ prompt = STRING_TOKEN (STR_TBT_NVM_VERSION_PROMPT),\
+ help = STRING_TOKEN (STR_TBT_NVM_VERSION_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 11,\
+ maximum = 65535,\
+ step = 1,\
+ default = TBT_NVM,\
+ option text = STRING_TOKEN (STR_TBT_NVM_VERSION_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#if defined (TBT_INTEL_RC_CONFIG) && (TBT_INTEL_RC_CONFIG == 1)
+//---------------------------------------------------------------------------
+// ACPI PCIE Setting
+//---------------------------------------------------------------------------
+
+#ifdef ACPI_ONEOF_PCIEXPNATIVE
+#undef ACPI_ONEOF_PCIEXPNATIVE
+#define ACPI_ONEOF_PCIEXPNATIVE\
+ oneof varid = SETUP_DATA.PciExpNative,\
+ prompt = STRING_TOKEN(STR_ACPI_PCIE_NATIVE_PROMPT),\
+ help = STRING_TOKEN(STR_ACPI_PCIE_NATIVE_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif
+
+#ifdef ACPI_ONEOF_NATIVEASPMENABLE
+#undef ACPI_ONEOF_NATIVEASPMENABLE
+#define ACPI_ONEOF_NATIVEASPMENABLE\
+ oneof varid = SETUP_DATA.NativeAspmEnable,\
+ prompt = STRING_TOKEN(STR_ACPI_NATIVE_ASPM_PROMPT),\
+ help = STRING_TOKEN(STR_ACPI_NATIVE_ASPM_HELP),\
+ option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif
+
+//---------------------------------------------------------------------------
+// SB PCIE Root Port Setting
+//---------------------------------------------------------------------------
+
+#if defined (DISABLE_PCIE_ROOT_PORT_SWAP) && (DISABLE_PCIE_ROOT_PORT_SWAP == 1)
+#ifdef SB_ONEOF_ROOTPORTFUNCTIONSWAPPING
+#undef SB_ONEOF_ROOTPORTFUNCTIONSWAPPING
+#define SB_ONEOF_ROOTPORTFUNCTIONSWAPPING\
+ oneof varid = SETUP_DATA.RootPortFunctionSwapping,\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PORT_SWAP_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PORT_SWAP_HELP),\
+ option text = STRING_TOKEN (STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif
+#endif
+
+#if defined (TBT_UP_PORT_FUNC) && (TBT_UP_PORT_FUNC == 0)
+#ifdef SB_ONEOF_PCIEROOTPORTHPE00
+#undef SB_ONEOF_PCIEROOTPORTHPE00
+#define SB_ONEOF_PCIEROOTPORTHPE00\
+ oneof varid = SETUP_DATA.PcieRootPortHPE[OFFSET_0],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_HPE_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_HPE_HELP),\
+ option text = STRING_TOKEN (STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif
+
+#ifdef SB_ONEOF_EXTRABUSRSVD00
+#undef SB_ONEOF_EXTRABUSRSVD00
+#define SB_ONEOF_EXTRABUSRSVD00\
+ numeric varid = SETUP_DATA.ExtraBusRsvd[OFFSET_0],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RBUS_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RBUS_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_EXTRA_BUS_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_EXTRA_BUS_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RBUS_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved bus
+
+#ifdef SB_ONEOF_PCIEMEMRSVD00
+#undef SB_ONEOF_PCIEMEMRSVD00
+#define SB_ONEOF_PCIEMEMRSVD00\
+ numeric varid = SETUP_DATA.PcieMemRsvd[OFFSET_0],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_MEM_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_PCIE_MEM_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RMEM_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved memory
+
+#ifdef SB_ONEOF_PCIEMEMRSVDALIG00
+#undef SB_ONEOF_PCIEMEMRSVDALIG00
+#define SB_ONEOF_PCIEMEMRSVDALIG00\
+ numeric varid = SETUP_DATA.PcieMemRsvdalig[OFFSET_0],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 31,\
+ step = 1,\
+ default = 26,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved memory alignment
+
+#ifdef SB_ONEOF_PCIEPFMEMRSVD00
+#undef SB_ONEOF_PCIEPFMEMRSVD00
+#define SB_ONEOF_PCIEPFMEMRSVD00\
+ numeric varid = SETUP_DATA.PciePFMemRsvd[OFFSET_0],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_PF_MEM_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_PCIE_PF_MEM_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+#endif // Prefetchable memory
+
+#ifdef SB_ONEOF_PCIEPFMEMRSVDALIG00
+#undef SB_ONEOF_PCIEPFMEMRSVDALIG00
+#define SB_ONEOF_PCIEPFMEMRSVDALIG00\
+ numeric varid = SETUP_DATA.PciePFMemRsvdalig[OFFSET_0],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 31,\
+ step = 1,\
+ default = 28,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+#endif // Prefetchable memory alignment
+
+#ifdef SB_ONEOF_PCIEIORSVD00
+#undef SB_ONEOF_PCIEIORSVD00
+#define SB_ONEOF_PCIEIORSVD00\
+ numeric varid = SETUP_DATA.PcieIoRsvd[OFFSET_0],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RVIO_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RVIO_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_IO_RESERVED,\
+ step = 4,\
+ default = TBT_DEFAULT_PCIE_IO_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RVIO_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+#endif // IO resource
+
+#ifdef SB_ONEOF_PCIEROOTPORTEN01
+#undef SB_ONEOF_PCIEROOTPORTEN01
+#define SB_ONEOF_PCIEROOTPORTEN01\
+ oneof varid = SETUP_DATA.PcieRootPortEn[OFFSET_1],\
+ prompt = STRING_TOKEN (STR_PCH_PCIERP2_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIERP_HELP),\
+ option text = STRING_TOKEN (STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif // PCIE root port1 disable
+
+#ifdef SB_ONEOF_PCIEROOTPORTEN02
+#undef SB_ONEOF_PCIEROOTPORTEN02
+#define SB_ONEOF_PCIEROOTPORTEN02\
+ oneof varid = SETUP_DATA.PcieRootPortEn[OFFSET_2],\
+ prompt = STRING_TOKEN (STR_PCH_PCIERP3_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIERP_HELP),\
+ option text = STRING_TOKEN (STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif // PCIE root port2 disable
+
+#ifdef SB_ONEOF_PCIEROOTPORTEN03
+#undef SB_ONEOF_PCIEROOTPORTEN03
+#define SB_ONEOF_PCIEROOTPORTEN03\
+ oneof varid = SETUP_DATA.PcieRootPortEn[OFFSET_3],\
+ prompt = STRING_TOKEN (STR_PCH_PCIERP4_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIERP_HELP),\
+ option text = STRING_TOKEN (STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif // PCIE root port3 disable
+#endif //TBT_UP_PORT_FUNC == 0
+
+#if defined (TBT_UP_PORT_FUNC) && (TBT_UP_PORT_FUNC == 1)
+#ifdef SB_ONEOF_PCIEROOTPORTHPE01
+#undef SB_ONEOF_PCIEROOTPORTHPE01
+#define SB_ONEOF_PCIEROOTPORTHPE01\
+ oneof varid = SETUP_DATA.PcieRootPortHPE[OFFSET_1],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_HPE_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_HPE_HELP),\
+ option text = STRING_TOKEN (STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif
+
+#ifdef SB_ONEOF_EXTRABUSRSVD01
+#undef SB_ONEOF_EXTRABUSRSVD01
+#define SB_ONEOF_EXTRABUSRSVD01\
+ numeric varid = SETUP_DATA.ExtraBusRsvd[OFFSET_1],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RBUS_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RBUS_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_EXTRA_BUS_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_EXTRA_BUS_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RBUS_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved bus
+
+#ifdef SB_ONEOF_PCIEMEMRSVD01
+#undef SB_ONEOF_PCIEMEMRSVD01
+#define SB_ONEOF_PCIEMEMRSVD01\
+ numeric varid = SETUP_DATA.PcieMemRsvd[OFFSET_1],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_MEM_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_PCIE_MEM_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RMEM_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved memory
+
+#ifdef SB_ONEOF_PCIEMEMRSVDALIG01
+#undef SB_ONEOF_PCIEMEMRSVDALIG01
+#define SB_ONEOF_PCIEMEMRSVDALIG01\
+ numeric varid = SETUP_DATA.PcieMemRsvdalig[OFFSET_1],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 31,\
+ step = 1,\
+ default = 26,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved memory alignment
+
+#ifdef SB_ONEOF_PCIEPFMEMRSVD01
+#undef SB_ONEOF_PCIEPFMEMRSVD01
+#define SB_ONEOF_PCIEPFMEMRSVD01\
+ numeric varid = SETUP_DATA.PciePFMemRsvd[OFFSET_1],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_PF_MEM_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_PCIE_PF_MEM_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+#endif // Prefetchable memory
+
+#ifdef SB_ONEOF_PCIEPFMEMRSVDALIG01
+#undef SB_ONEOF_PCIEPFMEMRSVDALIG01
+#define SB_ONEOF_PCIEPFMEMRSVDALIG01\
+ numeric varid = SETUP_DATA.PciePFMemRsvdalig[OFFSET_1],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 31,\
+ step = 1,\
+ default = 28,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+#endif // Prefetchable memory alignment
+
+#ifdef SB_ONEOF_PCIEIORSVD01
+#undef SB_ONEOF_PCIEIORSVD01
+#define SB_ONEOF_PCIEIORSVD01\
+ numeric varid = SETUP_DATA.PcieIoRsvd[OFFSET_1],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RVIO_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RVIO_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_IO_RESERVED,\
+ step = 4,\
+ default = TBT_DEFAULT_PCIE_IO_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RVIO_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+#endif // IO resource
+#endif //TBT_UP_PORT_FUNC == 1
+
+#if defined (TBT_UP_PORT_FUNC) && (TBT_UP_PORT_FUNC == 2)
+#ifdef SB_ONEOF_PCIEROOTPORTHPE02
+#undef SB_ONEOF_PCIEROOTPORTHPE02
+#define SB_ONEOF_PCIEROOTPORTHPE02\
+ oneof varid = SETUP_DATA.PcieRootPortHPE[OFFSET_2],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_HPE_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_HPE_HELP),\
+ option text = STRING_TOKEN (STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif
+
+#ifdef SB_ONEOF_EXTRABUSRSVD02
+#undef SB_ONEOF_EXTRABUSRSVD02
+#define SB_ONEOF_EXTRABUSRSVD02\
+ numeric varid = SETUP_DATA.ExtraBusRsvd[OFFSET_2],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RBUS_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RBUS_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_EXTRA_BUS_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_EXTRA_BUS_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RBUS_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved bus
+
+#ifdef SB_ONEOF_PCIEMEMRSVD02
+#undef SB_ONEOF_PCIEMEMRSVD02
+#define SB_ONEOF_PCIEMEMRSVD02\
+ numeric varid = SETUP_DATA.PcieMemRsvd[OFFSET_2],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_MEM_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_PCIE_MEM_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RMEM_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved memory
+
+#ifdef SB_ONEOF_PCIEMEMRSVDALIG02
+#undef SB_ONEOF_PCIEMEMRSVDALIG02
+#define SB_ONEOF_PCIEMEMRSVDALIG02\
+ numeric varid = SETUP_DATA.PcieMemRsvdalig[OFFSET_2],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 31,\
+ step = 1,\
+ default = 26,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved memory alignment
+
+#ifdef SB_ONEOF_PCIEPFMEMRSVD02
+#undef SB_ONEOF_PCIEPFMEMRSVD02
+#define SB_ONEOF_PCIEPFMEMRSVD02\
+ numeric varid = SETUP_DATA.PciePFMemRsvd[OFFSET_2],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_PF_MEM_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_PCIE_PF_MEM_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+#endif // Prefetchable memory
+
+#ifdef SB_ONEOF_PCIEPFMEMRSVDALIG02
+#undef SB_ONEOF_PCIEPFMEMRSVDALIG02
+#define SB_ONEOF_PCIEPFMEMRSVDALIG02\
+ numeric varid = SETUP_DATA.PciePFMemRsvdalig[OFFSET_2],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 31,\
+ step = 1,\
+ default = 28,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+#endif // Prefetchable memory alignment
+
+#ifdef SB_ONEOF_PCIEIORSVD02
+#undef SB_ONEOF_PCIEIORSVD02
+#define SB_ONEOF_PCIEIORSVD02\
+ numeric varid = SETUP_DATA.PcieIoRsvd[OFFSET_2],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RVIO_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RVIO_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_IO_RESERVED,\
+ step = 4,\
+ default = TBT_DEFAULT_PCIE_IO_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RVIO_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+#endif // IO resource
+#endif //TBT_UP_PORT_FUNC == 2
+
+#if defined (TBT_UP_PORT_FUNC) && (TBT_UP_PORT_FUNC == 3)
+#ifdef SB_ONEOF_PCIEROOTPORTHPE3
+#undef SB_ONEOF_PCIEROOTPORTHPE03
+#define SB_ONEOF_PCIEROOTPORTHPE03\
+ oneof varid = SETUP_DATA.PcieRootPortHPE[OFFSET_3],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_HPE_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_HPE_HELP),\
+ option text = STRING_TOKEN (STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif
+
+#ifdef SB_ONEOF_EXTRABUSRSVD03
+#undef SB_ONEOF_EXTRABUSRSVD03
+#define SB_ONEOF_EXTRABUSRSVD03\
+ numeric varid = SETUP_DATA.ExtraBusRsvd[OFFSET_3],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RBUS_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RBUS_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_EXTRA_BUS_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_EXTRA_BUS_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RBUS_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved bus
+
+#ifdef SB_ONEOF_PCIEMEMRSVD03
+#undef SB_ONEOF_PCIEMEMRSVD03
+#define SB_ONEOF_PCIEMEMRSVD03\
+ numeric varid = SETUP_DATA.PcieMemRsvd[OFFSET_3],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_MEM_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_PCIE_MEM_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RMEM_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved memory
+
+#ifdef SB_ONEOF_PCIEMEMRSVDALIG03
+#undef SB_ONEOF_PCIEMEMRSVDALIG03
+#define SB_ONEOF_PCIEMEMRSVDALIG03\
+ numeric varid = SETUP_DATA.PcieMemRsvdalig[OFFSET_3],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 31,\
+ step = 1,\
+ default = 26,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved memory alignment
+
+#ifdef SB_ONEOF_PCIEPFMEMRSVD03
+#undef SB_ONEOF_PCIEPFMEMRSVD03
+#define SB_ONEOF_PCIEPFMEMRSVD03\
+ numeric varid = SETUP_DATA.PciePFMemRsvd[OFFSET_3],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_PF_MEM_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_PCIE_PF_MEM_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+#endif // Prefetchable memory
+
+#ifdef SB_ONEOF_103
+#undef SB_ONEOF_PCIEPFMEMRSVDALIG03
+#define SB_ONEOF_PCIEPFMEMRSVDALIG03\
+ numeric varid = SETUP_DATA.PciePFMemRsvdalig[OFFSET_3],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 31,\
+ step = 1,\
+ default = 28,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+#endif // Prefetchable memory alignment
+
+#ifdef SB_ONEOF_PCIEIORSVD03
+#undef SB_ONEOF_PCIEIORSVD03
+#define SB_ONEOF_PCIEIORSVD03\
+ numeric varid = SETUP_DATA.PcieIoRsvd[OFFSET_3],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RVIO_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RVIO_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_IO_RESERVED,\
+ step = 4,\
+ default = TBT_DEFAULT_PCIE_IO_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RVIO_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+#endif // IO resource
+#endif //TBT_UP_PORT_FUNC == 3
+
+#if defined (TBT_UP_PORT_FUNC) && (TBT_UP_PORT_FUNC == 4)
+#ifdef SB_ONEOF_PCIEROOTPORTHPE04
+#undef SB_ONEOF_PCIEROOTPORTHPE04
+#define SB_ONEOF_PCIEROOTPORTHPE04\
+ oneof varid = SETUP_DATA.PcieRootPortHPE[OFFSET_4],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_HPE_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_HPE_HELP),\
+ option text = STRING_TOKEN (STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif
+
+#ifdef SB_ONEOF_EXTRABUSRSVD04
+#undef SB_ONEOF_EXTRABUSRSVD04
+#define SB_ONEOF_EXTRABUSRSVD04\
+ numeric varid = SETUP_DATA.ExtraBusRsvd[OFFSET_4],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RBUS_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RBUS_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_EXTRA_BUS_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_EXTRA_BUS_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RBUS_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved bus
+
+#ifdef SB_ONEOF_PCIEMEMRSVD04
+#undef SB_ONEOF_PCIEMEMRSVD04
+#define SB_ONEOF_PCIEMEMRSVD04\
+ numeric varid = SETUP_DATA.PcieMemRsvd[OFFSET_4],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_MEM_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_PCIE_MEM_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RMEM_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved memory
+
+#ifdef SB_ONEOF_PCIEMEMRSVDALIG04
+#undef SB_ONEOF_PCIEMEMRSVDALIG04
+#define SB_ONEOF_PCIEMEMRSVDALIG04\
+ numeric varid = SETUP_DATA.PcieMemRsvdalig[OFFSET_4],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 31,\
+ step = 1,\
+ default = 26,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved memory alignment
+
+#ifdef SB_ONEOF_PCIEPFMEMRSVD04
+#undef SB_ONEOF_PCIEPFMEMRSVD04
+#define SB_ONEOF_PCIEPFMEMRSVD04\
+ numeric varid = SETUP_DATA.PciePFMemRsvd[OFFSET_4],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_PF_MEM_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_PCIE_PF_MEM_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+#endif // Prefetchable memory
+
+#ifdef SB_ONEOF_PCIEPFMEMRSVDALIG04
+#undef SB_ONEOF_PCIEPFMEMRSVDALIG04
+#define SB_ONEOF_PCIEPFMEMRSVDALIG04\
+ numeric varid = SETUP_DATA.PciePFMemRsvdalig[OFFSET_4],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 31,\
+ step = 1,\
+ default = 28,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+#endif // Prefetchable memory alignment
+
+#ifdef SB_ONEOF_PCIEIORSVD04
+#undef SB_ONEOF_PCIEIORSVD04
+#define SB_ONEOF_PCIEIORSVD04\
+ numeric varid = SETUP_DATA.PcieIoRsvd[OFFSET_4],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RVIO_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RVIO_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_IO_RESERVED,\
+ step = 4,\
+ default = TBT_DEFAULT_PCIE_IO_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RVIO_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+#endif // IO resource
+
+#if !defined (ULT_SUPPORT) || (ULT_SUPPORT == 0)
+#ifdef SB_ONEOF_PCIEROOTPORTEN05
+#undef SB_ONEOF_PCIEROOTPORTEN05
+#define SB_ONEOF_PCIEROOTPORTEN05\
+ oneof varid = SETUP_DATA.PcieRootPortEn[OFFSET_5],\
+ prompt = STRING_TOKEN (STR_PCH_PCIERP6_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIERP_HELP),\
+ option text = STRING_TOKEN (STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif // PCIE root port5 disable
+#endif
+
+#ifdef SB_ONEOF_PCIEROOTPORTEN06
+#undef SB_ONEOF_PCIEROOTPORTEN06
+#define SB_ONEOF_PCIEROOTPORTEN06\
+ oneof varid = SETUP_DATA.PcieRootPortEn[OFFSET_6],\
+ prompt = STRING_TOKEN (STR_PCH_PCIERP7_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIERP_HELP),\
+ option text = STRING_TOKEN (STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif // PCIE root port6 disable
+
+#ifdef SB_ONEOF_PCIEROOTPORTEN07
+#undef SB_ONEOF_PCIEROOTPORTEN07
+#define SB_ONEOF_PCIEROOTPORTEN07\
+ oneof varid = SETUP_DATA.PcieRootPortEn[OFFSET_7],\
+ prompt = STRING_TOKEN (STR_PCH_PCIERP8_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIERP_HELP),\
+ option text = STRING_TOKEN (STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif // PCIE root port7 disable
+#endif //TBT_UP_PORT_FUNC == 4
+
+#if defined (TBT_UP_PORT_FUNC) && (TBT_UP_PORT_FUNC == 5) && (ULT_SUPPORT == 1)
+#ifdef SB_ONEOF_PCIEROOTPORTHPE05
+#undef SB_ONEOF_PCIEROOTPORTHPE05
+#define SB_ONEOF_PCIEROOTPORTHPE05\
+ oneof varid = SETUP_DATA.PcieRootPortHPE[OFFSET_5],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_HPE_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_HPE_HELP),\
+ option text = STRING_TOKEN (STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif
+
+#ifdef SB_ONEOF_EXTRABUSRSVD05
+#undef SB_ONEOF_EXTRABUSRSVD05
+#define SB_ONEOF_EXTRABUSRSVD05\
+ numeric varid = SETUP_DATA.ExtraBusRsvd[OFFSET_5],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RBUS_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RBUS_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_EXTRA_BUS_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_EXTRA_BUS_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RBUS_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved bus
+
+#ifdef SB_ONEOF_PCIEMEMRSVD05
+#undef SB_ONEOF_PCIEMEMRSVD05
+#define SB_ONEOF_PCIEMEMRSVD05\
+ numeric varid = SETUP_DATA.PcieMemRsvd[OFFSET_5],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_MEM_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_PCIE_MEM_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RMEM_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved memory
+
+#ifdef SB_ONEOF_PCIEMEMRSVDALIG05
+#undef SB_ONEOF_PCIEMEMRSVDALIG05
+#define SB_ONEOF_PCIEMEMRSVDALIG05\
+ numeric varid = SETUP_DATA.PcieMemRsvdalig[OFFSET_5],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 31,\
+ step = 1,\
+ default = 26,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved memory alignment
+
+#ifdef SB_ONEOF_PCIEPFMEMRSVD05
+#undef SB_ONEOF_PCIEPFMEMRSVD05
+#define SB_ONEOF_PCIEPFMEMRSVD05\
+ numeric varid = SETUP_DATA.PciePFMemRsvd[OFFSET_5],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_PF_MEM_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_PCIE_PF_MEM_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+#endif // Prefetchable memory
+
+#ifdef SB_ONEOF_PCIEPFMEMRSVDALIG05
+#undef SB_ONEOF_PCIEPFMEMRSVDALIG05
+#define SB_ONEOF_PCIEPFMEMRSVDALIG05\
+ numeric varid = SETUP_DATA.PciePFMemRsvdalig[OFFSET_5],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 31,\
+ step = 1,\
+ default = 28,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+#endif // Prefetchable memory alignment
+
+#ifdef SB_ONEOF_PCIEIORSVD05
+#undef SB_ONEOF_PCIEIORSVD05
+#define SB_ONEOF_PCIEIORSVD05\
+ numeric varid = SETUP_DATA.PcieIoRsvd[OFFSET_5],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RVIO_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RVIO_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_IO_RESERVED,\
+ step = 4,\
+ default = TBT_DEFAULT_PCIE_IO_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RVIO_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+#endif // IO resource
+#endif // TBT_UP_PORT_FUNC == 5
+
+#if defined (TBT_UP_PORT_FUNC) && (TBT_UP_PORT_FUNC == 6)
+#ifdef SB_ONEOF_PCIEROOTPORTHPE06
+#undef SB_ONEOF_PCIEROOTPORTHPE06
+#define SB_ONEOF_PCIEROOTPORTHPE06\
+ oneof varid = SETUP_DATA.PcieRootPortHPE[OFFSET_6],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_HPE_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_HPE_HELP),\
+ option text = STRING_TOKEN (STR_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+#endif
+
+#ifdef SB_ONEOF_EXTRABUSRSVD06
+#undef SB_ONEOF_EXTRABUSRSVD06
+#define SB_ONEOF_EXTRABUSRSVD06\
+ numeric varid = SETUP_DATA.ExtraBusRsvd[OFFSET_6],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RBUS_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RBUS_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_EXTRA_BUS_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_EXTRA_BUS_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RBUS_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved bus
+
+#ifdef SB_ONEOF_PCIEMEMRSVD06
+#undef SB_ONEOF_PCIEMEMRSVD06
+#define SB_ONEOF_PCIEMEMRSVD06\
+ numeric varid = SETUP_DATA.PcieMemRsvd[OFFSET_6],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_MEM_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_PCIE_MEM_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RMEM_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved memory
+
+#ifdef SB_ONEOF_PCIEMEMRSVDALIG06
+#undef SB_ONEOF_PCIEMEMRSVDALIG06
+#define SB_ONEOF_PCIEMEMRSVDALIG06\
+ numeric varid = SETUP_DATA.PcieMemRsvdalig[OFFSET_6],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 31,\
+ step = 1,\
+ default = 26,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RMEM_ALIG_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+#endif //Reserved memory alignment
+
+#ifdef SB_ONEOF_PCIEPFMEMRSVD06
+#undef SB_ONEOF_PCIEPFMEMRSVD06
+#define SB_ONEOF_PCIEPFMEMRSVD06\
+ numeric varid = SETUP_DATA.PciePFMemRsvd[OFFSET_6],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_PF_MEM_RESERVED,\
+ step = 1,\
+ default = TBT_DEFAULT_PCIE_PF_MEM_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+#endif // Prefetchable memory
+
+#ifdef SB_ONEOF_PCIEPFMEMRSVDALIG06
+#undef SB_ONEOF_PCIEPFMEMRSVDALIG06
+#define SB_ONEOF_PCIEPFMEMRSVDALIG06\
+ numeric varid = SETUP_DATA.PciePFMemRsvdalig[OFFSET_6],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 31,\
+ step = 1,\
+ default = 28,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_PF_RMEM_ALIG_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+#endif // Prefetchable memory alignment
+
+#ifdef SB_ONEOF_PCIEIORSVD06
+#undef SB_ONEOF_PCIEIORSVD06
+#define SB_ONEOF_PCIEIORSVD06\
+ numeric varid = SETUP_DATA.PcieIoRsvd[OFFSET_6],\
+ prompt = STRING_TOKEN (STR_PCH_PCIE_RVIO_PROMPT),\
+ help = STRING_TOKEN (STR_PCH_PCIE_RVIO_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = TBT_MAX_PCIE_IO_RESERVED,\
+ step = 4,\
+ default = TBT_DEFAULT_PCIE_IO_RESERVED,\
+ option text = STRING_TOKEN (STR_PCH_PCIE_RVIO_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+#endif // IO resource
+#endif //TBT_UP_PORT_FUNC == 6
+
+#endif // TBT_INTEL_RC_CONFIG == 1
+
+#endif // CONTROL_DEFINITION
+//---------------------------------------------------------------------------
+
+//---------------------------------------------------------------------------
+#ifdef CONTROLS_WITH_DEFAULTS
+ TBT_ONEOF_TBTENABLE
+ TBT_ONEOF_TBTWAKEUPSUPPORT
+ TBT_ONEOF_TBTAICSUPPORT
+ TBT_ONEOF_TBTHOSTLOCATION
+ TBT_ONEOF_TBTHANDLEPOC
+ TBT_ONEOF_TBTCACHELINESIZE
+ TBT_ONEOF_TBTCRSECURITYLEVEL
+ TBT_ONEOF_TBTRRSECURITYLEVEL
+ TBT_ONEOF_SMINOTIFYENABLED
+ TBT_ONEOF_SWSMIENABLED
+ TBT_ONEOF_NOTIFYENABLED
+ TBT_ONEOF_RMVRETRUNVALUE
+ TBT_ONEOF_OPTIONROM
+ TBT_ONEOF_TBTWAKEUPDELAY
+ TBT_ONEOF_TBTSWSMIDELAY
+ TBT_ONEOF_PERSLOTMEMRSVD
+ TBT_ONEOF_PERSLOTPFMEMRSVD
+ TBT_ONEOF_PERSLOTIORSVD
+ TBT_ONEOF_IORESOURCEENABLED
+ TBT_ONEOF_NVMVERSION
+#endif // CONTROLS_WITH_DEFAULTS
+//---------------------------------------------------------------------------
+
+
+//**********************************************************************
+// Advanced - TBT Configuration Form
+//**********************************************************************
+
+#ifdef ADVANCED_FORM_SET
+
+#ifdef FORM_SET_TYPEDEF
+ #include <TbtSetup.h>
+#endif
+
+#ifndef SUPPRESS_GRAYOUT_ENDIF //old Core
+ #define SUPPRESS_GRAYOUT_ENDIF endif;
+#endif
+
+#ifdef FORM_SET_GOTO
+// Define goto commands for the forms defined in this file
+ goto TBT_FORM_ID,
+ prompt = STRING_TOKEN(STR_TBT_FORM),
+ help = STRING_TOKEN(STR_TBT_FORM_HELP);
+#endif
+
+#ifdef FORM_SET_FORM
+// Define forms
+
+ #ifndef TBT_FORM_SETUP
+ #define TBT_FORM_SETUP
+
+ form formid = AUTO_ID(TBT_FORM_ID),
+ title = STRING_TOKEN(STR_TBT_FORM);
+
+ SUBTITLE(STRING_TOKEN (STR_TBT_SUBTITLE))
+
+ text
+ help = STRING_TOKEN (STR_TBT_SPEC_VERSION_HELP),
+ text = STRING_TOKEN (STR_TBT_SPEC_VERSION_NAME),
+ text = STRING_TOKEN (STR_TBT_SPEC_VERSION_VALUE),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN (STR_TBT_RC_VERSION_HELP),
+ text = STRING_TOKEN (STR_TBT_RC_VERSION_NAME),
+ text = STRING_TOKEN (STR_TBT_RC_VERSION_VALUE),
+ flags = 0, key = 0;
+
+ suppressif ideqval SETUP_DATA.TbtEnable == 0x0;
+ text
+ help = STRING_TOKEN (STR_TBT_HOST_HELP),
+ text = STRING_TOKEN (STR_TBT_HOST_NAME),
+ text = STRING_TOKEN (STR_TBT_HOST_VALUE),
+ flags = 0, key = 0;
+ endif;
+
+ SEPARATOR
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ TBT_ONEOF_TBTENABLE
+ suppressif ideqval SETUP_DATA.TbtEnable == 0x0;
+ suppressif ideqval SETUP_DATA.TbtHRSeries == 0x1;
+ TBT_ONEOF_TBTRRSECURITYLEVEL
+ endif;
+ suppressif NOT ideqval SETUP_DATA.TbtHRSeries == 0x1; // if TBT chip is not equal CR, hide CR setting.
+ TBT_ONEOF_TBTCRSECURITYLEVEL
+ endif;
+ suppressif ideqval SETUP_DATA.TbtSecurityLevel == 0x5;
+ TBT_ONEOF_TBTWAKEUPSUPPORT
+ suppressif ideqval SETUP_DATA.TbtHRSeries == 0x1;
+ TBT_ONEOF_TBTAICSUPPORT
+ suppressif ideqval SETUP_DATA.TbtAICSupport == 0x0;
+ TBT_ONEOF_TBTHOSTLOCATION
+ endif;
+ endif;
+ #if defined (TBT_HR_PWR) && (TBT_HR_PWR != 0xFF)
+ suppressif ideqval SETUP_DATA.TbtWakeupSupport == 0x1;
+ TBT_ONEOF_TBTHANDLEPOC
+ endif;
+ #endif
+ TBT_ONEOF_TBTCACHELINESIZE
+ TBT_ONEOF_SMINOTIFYENABLED
+ suppressif ideqval SETUP_DATA.SmiNotifyEnabled == 0x0;
+ TBT_ONEOF_SWSMIENABLED
+ TBT_ONEOF_NOTIFYENABLED
+ endif;
+ TBT_ONEOF_RMVRETRUNVALUE
+ TBT_ONEOF_OPTIONROM
+ suppressif NOT ideqval SETUP_DATA.TbtHRSeries == 0x1;
+ TBT_ONEOF_TBTWAKEUPDELAY
+ endif;
+ TBT_ONEOF_TBTSWSMIDELAY
+ TBT_ONEOF_IORESOURCEENABLED
+ TBT_ONEOF_PERSLOTMEMRSVD
+ TBT_ONEOF_PERSLOTPFMEMRSVD
+ suppressif ideqval SETUP_DATA.TbtIOresourceEnable ==0x0;
+ TBT_ONEOF_PERSLOTIORSVD
+ #if defined (TBT_FCTP) && (TBT_FCTP == 1)
+ suppressif NOT ideqval SETUP_DATA.TbtHRSeries == 0x1;
+ TBT_ONEOF_NVMVERSION
+ endif;
+ #else
+ #endif
+ endif; // TbtIOresourceEnable ==0x0;
+ endif; // SETUP_DATA.TbtSecurityLevel == 0x5
+ endif; // TbtEnable ==0x0;
+ endif; // SYSTEM_PASSWORD_USER
+ endform; // TBT_FORM_ID
+#endif // TBT_FORM_SETUP
+#endif // FORM_SET_FORM
+
+#endif // ADVANCED_FORM_SET
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.sdl b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.sdl
new file mode 100644
index 0000000..5752562
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.sdl
@@ -0,0 +1,386 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.sdl 9 5/19/14 7:40a Barretlin $
+#
+# $Revision: 9 $
+#
+# $Date: 5/19/14 7:40a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.sdl $
+#
+# 9 5/19/14 7:40a Barretlin
+# [TAG] EIP165410
+# [Category] Improvement
+# [Description] Support Thunderbolt AIC at NB PCIE slot
+# [Files] TbtPei.c TbtDxe.c TbtGpe.asl TbtSmm.c TbtOemBoard.c
+# TbtOemLib.c TbtOemLib.h TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+# TbtSetupReset.c
+#
+# 8 5/19/14 7:19a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Using setup item choose return value of _RMV method in
+# ASL code
+# [Files] TbtDxe.c TbtGpe.asl TbtOemBoard.c TbtOemBoard.h TbtSetup.sd
+# TbtSetup.sdl TbtSetup.uni
+#
+# 7 2/10/14 1:30p Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] remove useless policy item and setup item
+# [Files] TbtOemBoard.h TbtOemBoard.c TbSetup.sdl TbtSetup.sd
+# TbtSetup.uni TbtSmm.c
+#
+# 6 1/05/14 2:13p Barretlin
+# [TAG] EIP N/A
+# [Category] New Feature
+# [Description] Support Thunderbolt feature Enable/Disable in run time
+# Support dynamic Thunderbolt AIC location in run time
+# [Files] TbtSetup.sdl TbtSetup.sd TbtSetup.uni TbtSetupReset.c
+#
+# 5 6/17/13 4:25a Barretlin
+# [TAG] EIP126581
+# [Category] Improvement
+# [Description] add new AIC support setup item and change
+# TBWakeupSupport name
+# [Files] TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+#
+# 4 5/06/13 12:06a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Fix clone ACPI setup item fail
+# [Files] TbtSetup.sdl
+#
+# 3 3/21/13 6:00a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Clone PCIE prot swap setup item and set disable by
+# default
+# [Files] TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+#
+# 2 1/10/13 5:11a Barretlin
+#
+# 1 1/10/13 4:57a Barretlin
+# Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+# Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+#
+# 11 12/12/12 4:47a Barretlin
+# [TAG] None
+# [Category] New Feature
+# [Description] Add Thunderbolt TSE Setup Reset Hook
+# [Files] TbtSetup.sdl TbtSetup.mak TbtSetup.cif TbtSetupReset.c
+#
+# 10 10/27/12 6:16a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Create new setup item for thunderbolt POC handling
+# [Files] TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+#
+# 9 8/20/12 5:16a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Fix IO resource workaround broken in 4C 2port case
+# [Files] TbtSmm.c TbtOemBoard.c TbtOemBoard.h TbtSetup.sdl
+# TbtSetup.sd TbtSetup.uni
+#
+# 8 8/17/12 8:53a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Add IO resource workaround for Thunderbolt Spec1.1
+# Because new spec has removed IO resource for Thunderbolt device
+# [Files] TbtSmm.c TbtOemBoard.c TbtOemBoard.h TbtSetup.sdl
+# TbtSetup.sd TbtSetup.uni
+#
+# 7 7/31/12 3:28a Barretlin
+# [TAG] EIP91119
+# [Category] Improvement
+# [Description] Resolution for enable/disable Thunderbolt device option
+# rom at POST time
+# [Files] TbtDxe.c TbtOemBoard.c TbtOemBoard.h TbtOemBoard.sdl
+# TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+#
+# 6 5/22/12 10:05a Barretlin
+# [TAG] EIP90650
+# [Category] Spec Update
+# [Description] Specificatoin Update 0.94 - The default value of
+# OPTIONAL workaround for devices that don't support surprise-removal
+# should be disable.
+# [Files] TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+# TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+#
+# 5 5/20/12 10:42p Barretlin
+# [TAG] EIP90169
+# [Category] Spec Update
+# [Description] Specificatoin Update 0.93 - BIOS should stall wake
+# process for approximately 2.5 seconds to ensure
+# completeness of TBT link to all endpoint devices.
+# [Files] TbtSetup.sdl
+#
+# 4 3/05/12 1:11a Barretlin
+# [TAG] EIP83266
+# [Category] Spec Update
+# [Description] Specificatoin Update 0.90
+# [Files] TbtSetup.sdl
+# TbtSetup.sd
+# TbtSetup.uni
+# TbtSetup.cif
+# TbtOemBoard.h
+# TbtOemLib.c
+# TbtOemLib.h
+# TbtSmm.c
+# TbtPei..
+#
+# 2 2/19/12 11:52p Wesleychen
+# Add new setup item "SmiNotifyEnabled".
+#
+# 1 12/08/11 4:09a Wesleychen
+# Thunderbolt eModule initially releases.
+#
+#*************************************************************************
+TOKEN
+ Name = "Tbt_Setup"
+ Value = "1"
+ Help = "Main switch to enable Tbt Setup support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_TBT_ENABLE"
+ Value = "1"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_TB_WAKE_UP_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_TBT_AIC_SUPPORT"
+ Value = "0"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_TBT_AIC_SUPPORT"
+ Value = "0"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_TBT_AIC_LOCATION"
+ Value = "$(TBT_UP_PORT_FUNC) + 0x20"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_DEV" "!=" "0x1C"
+End
+
+TOKEN
+ Name = "DEFAULT_TBT_AIC_LOCATION"
+ Value = "$(TBT_UP_PORT_FUNC)"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "TBT_UP_PORT_DEV" "=" "0x1C"
+End
+
+TOKEN
+ Name = "DEFAULT_TBT_HANDLE_POC"
+ Value = "1"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_TB_SMI_NOTIFY_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_TBT_WAK_DELAY"
+ Value = "2500"
+ Help = "The delay time for wakup in ms.\0: Disable\500 = 500ms\1000 = 1 sec"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+
+TOKEN
+ Name = "DEFAULT_TBT_SWSMI_DELAY"
+ Value = "0"
+ Help = "This delay time for TBT SwSMI in ms. \0 = Disable; 1 = 1ms; 1000 = 1sec ..."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_SKIP_TBT_OPTIONROM"
+ Value = "1"
+ Help = "Enable:1 / Disable:0 skip Thunderbolt Device Option Rom"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_TBT_RMV_RETURN_VALUE"
+ Value = "0"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_NVM"
+ Value = "17"
+ Help = "Thunderbolt Host Router EEEPROM Version. for IO source workaround using."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_TBT_IO_RESOURCE_SUPPORT"
+ Value = "0"
+ Help = "Enable:1 / Disable:0 IO resource for Thunderbolt Device"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DISABLE_PCIE_ROOT_PORT_SWAP"
+ Value = "1"
+ Help = "Disable Intel RC PCI Express root port swap function."
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DISABLE_PCIE_ROOT_PORT_SWAP"
+ Value = "0"
+ Help = "Disable Intel RC PCI Express root port swap function."
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "TBT_PCIE_PORT_SWAP_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "DISABLE_PCIE_ROOT_PORT_SWAP"
+ Value = "0"
+ Help = "Disable Intel RC PCI Express root port swap function. MahoBay platform has no this setup item."
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "DESKTOP_306AX" "=" "1"
+End
+
+TOKEN
+ Name = "DISABLE_PCIE_ROOT_PORT_SWAP"
+ Value = "0"
+ Help = "Disable Intel RC PCI Express root port swap function. ChiefRiver platform has no this setup item."
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "MOBILE_306AX" "=" "1"
+End
+
+PATH
+ Name = "TbtSetup_DIR"
+End
+
+MODULE
+ Help = "Includes TbtSetup.mak to Project"
+ File = "TbtSetup.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\TbtSetup.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 40
+ Help = "Includes generic TBT setup screens to the project"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(TbtSetup_DIR)\TbtSetup.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 40
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/I$(TbtSetup_DIR)"
+ Parent = "TBT_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "-i $(TbtSetup_DIR)"
+ Parent = "SETUP_VFR_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "InitiTbtInfo,"
+ Parent = "SetupStringInit"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "TbtProcessEnterSetup,"
+ Parent = "ProcessEnterSetup,"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "TbtSetupResetHook,"
+ Parent = "PreSystemResetHook,"
+ InvokeOrder = AfterParent
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.uni b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.uni
new file mode 100644
index 0000000..2774c89
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetup.uni
Binary files differ
diff --git a/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetupReset.c b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetupReset.c
new file mode 100644
index 0000000..c046245
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetupReset.c
@@ -0,0 +1,243 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetupReset.c 8 5/19/14 7:40a Barretlin $
+//
+// $Revision: 8 $
+//
+// $Date: 5/19/14 7:40a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtOemBoard/TbtSetup/TbtSetupReset.c $
+//
+// 8 5/19/14 7:40a Barretlin
+// [TAG] EIP165410
+// [Category] Improvement
+// [Description] Support Thunderbolt AIC at NB PCIE slot
+// [Files] TbtPei.c TbtDxe.c TbtGpe.asl TbtSmm.c TbtOemBoard.c
+// TbtOemLib.c TbtOemLib.h TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+// TbtSetupReset.c
+//
+// 7 1/05/14 2:14p Barretlin
+// [TAG] EIP N/A
+// [Category] New Feature
+// [Description] Support Thunderbolt feature Enable/Disable in run time
+// Support dynamic Thunderbolt AIC location in run time
+// [Files] TbtSetup.sdl TbtSetup.sd TbtSetup.uni TbtSetupReset.c
+//
+// 6 6/21/13 7:53a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix build error with non Intel RC project
+// [Files] TbtSetupReset.c
+//
+// 5 6/21/13 5:16a Barretlin
+// [TAG] EIPNone
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] can not change Falcon Ridge security level
+// [RootCause] can not regconize Falcon Ridge chip
+// [Solution] add Falcon Ridge chip
+// [Files] TbtSetupReset.c
+//
+// 4 4/12/13 1:03p Barretlin
+//
+// 3 4/03/13 2:54a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Double check Security Level between Thunderbolt host FW
+// and BIOS are same or not for Redwood Ridge chip when entering setup
+// page.
+// [Files] TbtOemLib.c TbtOemLib.h TbtSetupReset.c
+//
+// 2 2/06/13 2:25a Barretlin
+//
+// 1 1/10/13 4:57a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 1 12/12/12 4:40a Barretlin
+// [TAG] None
+// [Category] New Feature
+// [Description] Add Thunderbolt TSE Setup Reset Hook
+// [Files] TbtSetupReset.c
+//
+// 6 1/13/10 2:13p Felixp
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: TbtSetupReset.c
+//
+// Description: Setup Reset Rountines
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include <EFI.h>
+#include <Token.h>
+#include <Setup.h>
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <TbtOemLib.h>
+#include <TbtOemBoard.h>
+#if defined(RESET_RUNTIME_SERVICES_SUPPORT) && (RESET_RUNTIME_SERVICES_SUPPORT == 0)
+#include <Protocol\PchReset\PchReset.h>
+#else
+#include <AmiCSPLib.h>
+#if defined TBT_INTEL_RC_CONFIG && TBT_INTEL_RC_CONFIG == 1
+#include <PchRegsLpc.h>
+#endif
+#endif
+
+//----------------------------------------------------------------------------
+// Variable and External Declaration(s)
+//----------------------------------------------------------------------------
+static SETUP_DATA gNewSetupData;
+static SETUP_DATA gOldSetupData;
+
+//----------------------------------------------------------------------------
+// GUID Definition(s)
+//----------------------------------------------------------------------------
+static EFI_GUID gEfiSetupGuid = SETUP_GUID;
+static EFI_GUID TbtHRStatusGuid = AMI_TBT_HR_STATUS_GUID;
+
+UINTN HRStatusSize = sizeof(AMI_TBT_HR_STATUS_DATA);
+AMI_TBT_HR_STATUS_DATA HRStatusData;
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: TbtProcessEnterSetup
+//
+// Description: This function is a hook called when TSE determines
+// that it has to load the boot options in the boot
+// order. This function is available as ELINK.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID TbtProcessEnterSetup(VOID)
+{
+ EFI_STATUS Status;
+ UINTN VariableSize = sizeof (SETUP_DATA);
+ UINT8 SecurityLevelState;
+
+ TRACE((-1, "TbtSetupReset.c: TbtProcessEnterSetup().....\n"));
+ Status = pRS->GetVariable(
+ L"Setup",
+ &gEfiSetupGuid,
+ NULL,
+ &VariableSize,
+ &gOldSetupData);
+ ASSERT_EFI_ERROR(Status);
+
+ Status = pRS->GetVariable( L"TbtHRStatusVar", \
+ &TbtHRStatusGuid, \
+ NULL, \
+ &HRStatusSize, \
+ &HRStatusData );
+ ASSERT_EFI_ERROR(Status);
+
+ //
+ // synchronize Thunderbolt security level config between BIOS and Thunderbolt
+ // host FW
+ if ((gOldSetupData.TbtEnable != 0) && (HRStatusData.TbtHRSeries != Cactus_Ridge)){
+ SecurityLevelState = SynchSecurityLevel(gOldSetupData.TbtSecurityLevel, gOldSetupData.TbtHostLocation);
+ TRACE((-1, "TbtSetupReset: Synchronizing Security Level between host Fw and BIOS state is %x\n", SecurityLevelState));
+ }
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: TbtSetupResetHook
+//
+// Description: This function is a hook called after some control
+// modified in the setup utility by user. This
+// function is available as ELINK.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID TbtSetupResetHook(VOID)
+{
+ EFI_STATUS Status;
+ UINT8 SetSecurityFlag = 0;
+ UINT8 ResetFlag = 0;
+ UINTN VariableSize;
+
+ VariableSize = sizeof (SETUP_DATA);
+ Status = pRS->GetVariable (
+ L"Setup",
+ &gEfiSetupGuid,
+ NULL,
+ &VariableSize,
+ &gNewSetupData);
+ ASSERT_EFI_ERROR(Status);
+
+ if ((!EFI_ERROR (Status)) && (gNewSetupData.TbtEnable != 0) && \
+ (HRStatusData.TbtHRSeries != Cactus_Ridge))
+ {
+ // Check Security Setup Setting first
+ if (gNewSetupData.TbtSecurityLevel != gOldSetupData.TbtSecurityLevel){
+ SetSecurityFlag |= 1;
+ } // Thunderbolt security level changed by user
+
+ // Check Thunderbolt host location
+ if (gNewSetupData.TbtHostLocation != gOldSetupData.TbtHostLocation){
+ ResetFlag |= 1;
+ }
+
+ // programming Redwood Ridge's/Falcon Ridge's/Win Ridge's Security Level
+ if (SetSecurityFlag != 0){
+ ProgramTbtSecurityLevel(&(gNewSetupData.TbtSecurityLevel), HRStatusData.TbtHRSeries, gNewSetupData.TbtHostLocation, FALSE);
+ ResetFlag |= 1;
+ }
+
+ // Reset system if need
+ if(ResetFlag != 0){
+#if defined(RESET_RUNTIME_SERVICES_SUPPORT) && (RESET_RUNTIME_SERVICES_SUPPORT == 0)
+ pRS->ResetSystem (EfiResetCold, EFI_SUCCESS, 0, NULL);
+#else
+#if defined TBT_INTEL_RC_CONFIG && TBT_INTEL_RC_CONFIG == 1
+ SBLib_ExtResetSystem (SbResetFull);
+#else
+ SBLib_ResetSystem(FullReset);
+#endif
+#endif
+ EFI_DEADLOOP();
+ }
+ } // Get New Setup Data success && Thunderbolt Function is enable
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2010, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//********************************************************************** \ No newline at end of file
diff --git a/Board/EM/Thunderbolt/TbtPei/TbtPei.c b/Board/EM/Thunderbolt/TbtPei/TbtPei.c
new file mode 100644
index 0000000..37a6614
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtPei/TbtPei.c
@@ -0,0 +1,638 @@
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtPei/TbtPei.c 11 5/19/14 7:31a Barretlin $
+//
+// $Revision: 11 $
+//
+// $Date: 5/19/14 7:31a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtPei/TbtPei.c $
+//
+// 11 5/19/14 7:31a Barretlin
+// [TAG] EIP165410
+// [Category] New Feature
+// [Description] Support Thunderbolt AIC at NB PCIE slot
+// [Files] TbtPei.c TbtDxe.c TbtGpe.asl TbtSmm.c TbtOemBoard.c
+// TbtOemLib.c TbtOemLib.h TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+// TbtSetupReset.c
+//
+// 10 1/06/14 5:21a Barretlin
+//
+// 9 1/05/14 1:30p Barretlin
+// [TAG] EIP N/A
+// [Category] New Feature
+// [Description] Support Thunderbolt feature Enable/Disable in run time
+// Support dynamic Thunderbolt AIC location in run time
+// [Files] TbtPei.c
+//
+// 8 7/26/13 1:50a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix build error at MahoBay/ChiefRiver platform
+// [Files] TbtPei.c TbtOemBoard.h
+//
+// 7 6/20/13 2:15a Barretlin
+// [TAG] EIP126581
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Follow Thunderbolt RR/FR BIOS Spec rev 1.0 to set PCH
+// PM_CFG register for Add-in Card
+// [Files] TbtPei.c
+//
+// 6 6/17/13 4:36a Barretlin
+// [TAG] EIP None
+// [Category] Improvement
+// [Description] change TBWakeupSupport name
+// [Files] TbtPei.c
+//
+// 5 5/27/13 7:27a Barretlin
+// [TAG] EIP124914
+// [Category] New Feature
+// [Description] Support Falcon Ridge chip
+// [Files] TbtPei.c
+//
+// 4 4/24/13 2:30a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Using token to decide execute Sx_Exit command of RR
+// chip in S5 boot path
+// [Files] TbtPei.c TbtOemBoard.sdl
+//
+// 3 4/12/13 12:51p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix security level of CR chip not be programming in
+// some case
+// [Files] TbtPei.c
+//
+// 2 2/06/13 1:46a Barretlin
+// [TAG] EIP114556
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Change fast link bring-up flow for Thunderbolt RR
+// Spec0.9
+// [Files] TbtPei.c
+//
+// 1 1/10/13 4:55a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 7 12/12/12 2:40a Barretlin
+// [TAG] EIP108272
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update to Spec. 1.4 to support Redwood Ridge chip
+// [Files] TbtPei.c TbtSmm.c TbtDxe.c TbtDxe.sdl TbtGpe.asl
+// TbtOemBoard.c TbtOemBoard.h TbtOemLib.c TbtOemLib.h
+//
+// 6 10/28/12 11:41p Barretlin
+// [TAG] EIP104870
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Change wake up flow for Spec 1.2 and Spec 1.3
+// [Files] TbtPei.c TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+//
+// 5 10/04/12 10:35p Barretlin
+// [TAG] EIP102947
+// [Category] Spec Update
+// [Severity] Normal
+// [Description] Update Thunderbolt Spec to Rev 1.2
+// [Files] TbtPei.c TbtOemLib.c TbtOemLib.h
+//
+// 4 10/03/12 9:06p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Change Programming security level timing for saving
+// boot time
+// [Files] TbtPei.c TbtDxe.c TbtOemBoard.c TbtOemBoard.h
+// TbtOemBoard.sdl TbtOemLib.c TbtOemLib.h
+//
+// 3 4/14/12 4:26a Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Fix Programming error at specification 0.90
+// update
+// [Files] TbtPei.c
+//
+// 2 3/05/12 1:21a Barretlin
+// [TAG] EIP83266
+// [Category] Spec Update
+// [Description] Specificatoin Update 0.90
+// [Files] TbtSetup.sdl
+// TbtSetup.sd
+// TbtSetup.uni
+// TbtSetup.cif
+// TbtOemBoard.h
+// TbtOemLib.c
+// TbtOemLib.h
+// TbtSmm.c
+// TbtPei..
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name: <TbtPei.c>
+//
+// Description:
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+#include <Token.h>
+#include <Setup.h>
+#include <AmiPeiLib.h>
+#include <AmiCspLib.h>
+#include <TbtOemBoard.h>
+#include <PPI\stall.h>
+#include <ppi\ReadOnlyVariable.h>
+#include <PPI\NBPPI.h>
+
+//----------------------------------------------------------------------------
+// GUID Definition(s)
+//----------------------------------------------------------------------------
+EFI_GUID gEfiPeiReadOnlyVariablePpiGuid = EFI_PEI_READ_ONLY_VARIABLE_PPI_GUID;
+EFI_GUID gTbtHRStatusGuid = AMI_TBT_HR_STATUS_GUID;
+EFI_GUID gPeiStallPpiGuid = EFI_PEI_STALL_PPI_GUID;
+EFI_GUID gTbtHobGuid = AMI_TBT_HOB_GUID;
+EFI_GUID SetupGuid = SETUP_GUID;
+
+//----------------------------------------------------------------------------
+// Function Prototype Definition(s)
+//----------------------------------------------------------------------------
+EFI_STATUS TbtCRSxExitFlow (
+ IN EFI_PEI_SERVICES **PeiServices);
+
+EFI_STATUS TbtSxExitFlow (
+ IN EFI_PEI_SERVICES **PeiServices);
+
+EFI_STATUS TbtPeiAfterNbPcieReady(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
+ IN VOID *InvokePpi );
+
+//----------------------------------------------------------------------------
+// Notified PPI Definition(s)
+//----------------------------------------------------------------------------
+static EFI_PEI_NOTIFY_DESCRIPTOR TbtNotifyList[] = {
+ { EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | \
+ EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST, \
+// &gEfiPeiEndOfPeiPhasePpiGuid, TbtPeiAfterNbPcieReady },
+ &gAmiPeiBeforeMrcGuid, TbtPeiAfterNbPcieReady },
+};
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: TbtPeiEntry
+//
+// Description:
+// This function is the main PEI phase entry point for the Thunderbolt
+// module.
+//
+// Input:
+// IN EFI_FFS_FILE_HEADER *FfsHeader
+// -- FFS file header pointer
+// IN EFI_PEI_SERVICES **PeiServices
+// -- PEI Services table pointer
+//
+// Output:
+// EFI_STATUS (Return Value)
+// = EFI_SUCCESS if successful
+// = or other valid EFI error code
+//
+// Notes:
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS TbtPeiEntry(
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices )
+{
+ EFI_STATUS Status;
+ UINTN VariableSize = sizeof(SETUP_DATA);
+ UINTN HRStatusSize = sizeof(AMI_TBT_HR_STATUS_DATA);
+ SETUP_DATA SetupData;
+ EFI_PEI_READ_ONLY_VARIABLE_PPI *ReadOnlyVariable;
+ EFI_BOOT_MODE BootMode;
+ AMI_TBT_HR_STATUS_DATA HRStatusData;
+ UINT8 TBus = TBT_UP_PORT_BUS;
+ UINT8 TDev = TBT_UP_PORT_DEV;
+ UINT8 TFun = TBT_UP_PORT_FUNC;
+
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "Intel Thunderbolt PEI Entry !!!\n"));
+ Status = (*PeiServices)->GetBootMode (PeiServices, &BootMode);
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "BootMode = %X\n", BootMode));
+ if (BootMode > BOOT_ON_S3_RESUME){
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "Thunderbolt dones't support working with this Boot mode !!!\n"));
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "Intel Thunderbolt PEI Exit !!!\n"));
+ return EFI_SUCCESS;
+ }
+
+ // Locate PeiReadOnlyVariable ppi.
+ Status = (*PeiServices)->LocatePpi ( PeiServices, \
+ &gEfiPeiReadOnlyVariablePpiGuid, \
+ 0, \
+ NULL, \
+ &ReadOnlyVariable);
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: Locate PeiReadOnlyVariable Ppi Status = %r\n", Status));
+
+ Status = ReadOnlyVariable->GetVariable ( PeiServices,
+ L"Setup",
+ &SetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData );
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: Locate Get Setup ReadOnlyVariable Status = %r\n", Status));
+
+ if ((!EFI_ERROR(Status)) && (SetupData.TbtEnable == 0)){
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: Thunderbolt function is disable in Setup...\n"));
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: Skip all action for TBT in PEI phase\n"));
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "Intel Thunderbolt PEI Exit !!!\n"));
+ return EFI_SUCCESS;
+ }
+
+ // Thunderbolt BIOS Implementation guide for Redwood Ridge/Falcon Ridge/Win Ridge
+ // based devices Specification Update Revision 1.0
+ // 2.1.3.7 PCH configuration for hosts with Add-In Card support
+ // During boot, reboot and wake T218 field (bits [1:0]) of PCH PM_CFG register should
+ // be set to 11b - 10 ms (default value is 0b - 10 us)
+ if ((!EFI_ERROR(Status)) && SetupData.TbtAICSupport){
+ SET_MEM8_RCRB(R_PCH_RCRB_PM_CFG, (BIT00 | BIT01));
+ } // end of setting T218 field
+
+ // Get Thunderbolt host status variable
+ Status = ReadOnlyVariable->GetVariable ( PeiServices,
+ L"TbtHRStatusVar",
+ &gTbtHRStatusGuid,
+ NULL,
+ &HRStatusSize,
+ &HRStatusData );
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: Locate Get TbtHRStatusVar ReadOnlyVariable Status = %r\n", Status));
+
+ if(!EFI_ERROR(Status)){
+ // For OEM doing anything before Thunderbolt Sx Exit flow
+ TbtBeforeSxExitFlow(PeiServices, HRStatusData.TbtHRSeries);
+
+ // Check Thunderbolt host is at NB PCIE slot or SB PCIE slot
+ if (SetupData.TbtHostLocation >= 0x20){
+ // Thunderbolt host is at NB PCIE root port
+ Status = (*PeiServices)->NotifyPpi( PeiServices, TbtNotifyList );
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: Thunderbolt host is at NB PCIE slot, create notify event %r\n", Status));
+ ASSERT_PEI_ERROR(PeiServices, Status);
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "Intel Thunderbolt PEI Exit !!!\n"));
+ return EFI_SUCCESS;
+ }
+
+ switch(HRStatusData.TbtHRSeries){
+ case Cactus_Ridge:
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: Cactus Ridge wake flow ...\n"));
+ Status = TbtCRSxExitFlow(PeiServices);
+ break;
+
+ case Redwood_Ridge:
+ case Falcon_Ridge:
+ case BDW_TBT_LP:
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: Redwood Ridge/Falcon Ridge/Win Ridge wake flow ...\n"));
+ Status = TbtSxExitFlow(PeiServices);
+ break;
+ } // end of switch
+ ASSERT_PEI_ERROR(PeiServices, Status);
+ } // end of if
+
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "Intel Thunderbolt PEI Exit !!!\n"));
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: TbtCRSxExitFlow
+//
+// Description: Thunderbolt host Sx Exit Flow for Cactus Ridge chip
+//
+// Input: EFI_PEI_SERVICES **PeiServices
+//
+// Output: EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS TbtCRSxExitFlow (
+ IN EFI_PEI_SERVICES **PeiServices)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_PEI_READ_ONLY_VARIABLE_PPI *ReadOnlyVariable;
+ AMI_TBT_HR_STATUS_DATA TbtHostInfo;
+ SETUP_DATA SetupData;
+ EFI_BOOT_MODE BootMode;
+ EFI_PEI_STALL_PPI *StallPpi = NULL;
+ TBT_HOB *tHob;
+ UINTN VariableSize = sizeof(SETUP_DATA);
+ UINTN HRStatusSize = sizeof(AMI_TBT_HR_STATUS_DATA);
+ UINTN Delay;
+
+ Status = (*PeiServices)->GetBootMode (PeiServices, &BootMode);
+ ASSERT_PEI_ERROR(PeiServices, Status);
+
+ Status = (*PeiServices)->LocatePpi ( PeiServices, &gEfiPeiReadOnlyVariablePpiGuid,
+ 0, NULL, &ReadOnlyVariable);
+ ASSERT_PEI_ERROR(PeiServices, Status);
+
+ Status = ReadOnlyVariable->GetVariable ( PeiServices, L"Setup",
+ &SetupGuid, NULL,
+ &VariableSize, &SetupData);
+ ASSERT_PEI_ERROR(PeiServices, Status);
+
+ Status = ReadOnlyVariable->GetVariable ( PeiServices, L"TbtHRStatusVar",
+ &gTbtHRStatusGuid, NULL,
+ &HRStatusSize, &TbtHostInfo);
+ ASSERT_PEI_ERROR(PeiServices, Status);
+
+ if (TbtHostInfo.TbtHRSeries != Cactus_Ridge) return EFI_INVALID_PARAMETER;
+
+ // Locate Stall Ppi
+ Status = (*PeiServices)->LocatePpi (PeiServices, &gPeiStallPpiGuid, 0, NULL, &StallPpi);
+ ASSERT_PEI_ERROR(PeiServices, Status);
+
+ // For Debug, out put 80 port CP 0x14
+ IoWrite8(0x80, 0x14);
+
+ if (SetupData.TbtWakeupSupport){
+ // BIOS support of Thunderbolt devices Specification Update Revision 0.90
+ // When BIOS decides to wake system the first step that should be
+ // performed is deasserting of GO2Sx pin to wake HR.
+ Status = InactiveTbtGpio2();
+
+ // If remembered HR state was active(system went to sleep status with
+ // attached devices), BIOS should stall wake process for approximately
+ // 2.5 seconds to ensure completeness of TBT link to all endpoint devices.
+ if (TbtHostInfo.TbtHRStatus){
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: HR status is active, delay 2.5 seconds...\n"));
+ Delay = (UINTN)((SetupData.TbtWakeupDelay)*1000);
+ if (Delay != 0) StallPpi->Stall(PeiServices, StallPpi, Delay);
+ }
+
+ if (BootMode <= BOOT_ON_S5_RESUME){
+ Status = (*PeiServices)->CreateHob(PeiServices, EFI_HOB_TYPE_GUID_EXTENSION, sizeof(TBT_HOB), &tHob);
+ if (!EFI_ERROR(Status)){
+ PEI_TRACE((TRACE_ALWAYS,PeiServices,"TbtPei: Create Thunderbolt Hob for Programming Cactus Ridge host Security Level = %x !!!\n", SetupData.TbtSecurityLevel));
+ tHob->Header.Name = gTbtHobGuid;
+ tHob->TbtSecurityLevelFlag = 1;
+ }
+ }
+ } else {
+ // BIOS support of Thunderbolt devices Specification Update Revision 1.2
+ // If system does not support "Wake From Thunderbolt Devices" function and
+ // remembered HR state was active(system went to sleep status with attached devices),
+ // BIOS should:
+ // 1. Pull down GPIO_9__OK2GO2SX_N_OD
+ // 2. Stall wake process for approximately 2.5 seconds to ensure
+ // completeness of TBT link to all endpoint devices.
+ // 3. Release pull down GPIO_9__OK2GO2SX_N_OD (Make control pin as input)
+
+ // Power on POC of Thunderbolt host chip
+ if (SetupData.TbtHandlePOC)
+ Status = PowerOnPOC();
+
+ if (TbtHostInfo.TbtHRStatus){
+ // program GPIO_9 as output
+ Status = PullDownTbtGpio9();
+
+ // delay 2.5 seconds
+ Delay = (UINTN)((SetupData.TbtWakeupDelay)*1000);
+ if (Delay != 0) StallPpi->Stall(PeiServices, StallPpi, Delay);
+
+ // release GPIO_9
+ Status = ReleaseTbtGpio9();
+ }
+
+ if (BootMode != BOOT_ON_S3_RESUME){
+ Status = (*PeiServices)->CreateHob(PeiServices, EFI_HOB_TYPE_GUID_EXTENSION, sizeof(TBT_HOB), &tHob);
+ if (!EFI_ERROR(Status)){
+ PEI_TRACE((TRACE_ALWAYS,PeiServices,"TbtPei: Create Thunderbolt Hob for Programming Cactus Ridge host Security Level = %x !!!\n", SetupData.TbtSecurityLevel));
+ tHob->Header.Name = gTbtHobGuid;
+ tHob->TbtSecurityLevelFlag = 1;
+ }
+ }
+ }
+
+ // Program Thunderbolt host security level
+ PEI_TRACE((TRACE_ALWAYS,PeiServices,"TbtPei: Start Programming Security Level = %x !!!\n", SetupData.TbtSecurityLevel));
+ ProgramTbtSecurityLevel(&(SetupData.TbtSecurityLevel), TbtHostInfo.TbtHRSeries, TBT_UP_PORT_FUNC, TRUE);
+
+ if ((BootMode == BOOT_ON_S3_RESUME) && (!SetupData.TbtWakeupSupport)){
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: No support wake from thunderbolt and in S3 boot path !!!\n"));
+ // delay 400ms
+ StallPpi->Stall(PeiServices, StallPpi, (450*1000));
+
+ // Finish programming security level
+ PeiFinialProgramTbtSecurityLevel(SetupData.TbtSecurityLevel);
+ }
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: TbtSxExitFlow
+//
+// Description: Thunderbolt host Sx Exit Flow for Redwood Ridge, Falcon Ridge
+// and Win Ridge(BDW-TBT-LP) chips
+//
+// Input: EFI_PEI_SERVICES **PeiServices
+//
+// Output: EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS TbtSxExitFlow (
+ IN EFI_PEI_SERVICES **PeiServices)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_PEI_READ_ONLY_VARIABLE_PPI *ReadOnlyVariable;
+ AMI_TBT_HR_STATUS_DATA TbtHostInfo;
+ SETUP_DATA SetupData;
+ EFI_BOOT_MODE BootMode;
+ EFI_PEI_STALL_PPI *StallPpi = NULL;
+ UINTN VariableSize = sizeof(SETUP_DATA);
+ UINTN HRStatusSize = sizeof(AMI_TBT_HR_STATUS_DATA);
+ UINTN Delay;
+ UINTN Counter;
+ UINT32 REG_VAL = 0;
+ UINT8 TBus = TBT_UP_PORT_BUS;
+ UINT8 TDev = TBT_UP_PORT_DEV;
+ UINT8 TFun = TBT_UP_PORT_FUNC;
+
+ Status = (*PeiServices)->GetBootMode (PeiServices, &BootMode);
+ ASSERT_PEI_ERROR(PeiServices, Status);
+
+ Status = (*PeiServices)->LocatePpi ( PeiServices, &gEfiPeiReadOnlyVariablePpiGuid,
+ 0, NULL, &ReadOnlyVariable);
+ ASSERT_PEI_ERROR(PeiServices, Status);
+
+ Status = ReadOnlyVariable->GetVariable ( PeiServices, L"Setup",
+ &SetupGuid, NULL,
+ &VariableSize, &SetupData);
+ ASSERT_PEI_ERROR(PeiServices, Status);
+
+ Status = ReadOnlyVariable->GetVariable ( PeiServices, L"TbtHRStatusVar",
+ &gTbtHRStatusGuid, NULL,
+ &HRStatusSize, &TbtHostInfo);
+ ASSERT_PEI_ERROR(PeiServices, Status);
+
+ if (TbtHostInfo.TbtHRSeries == Cactus_Ridge) return EFI_INVALID_PARAMETER;
+
+ // Get Thunderbolt host location
+ if (SetupData.TbtHostLocation < 0x20){
+ // Thunderbolt host is at SB PCIE root port
+ TFun = SetupData.TbtHostLocation;
+ } else {
+ // Thunderbolt host is at NB PCIE root port
+ TDev = 0x01;
+ TFun = SetupData.TbtHostLocation - 0x20;
+ }
+
+ //Assign temp bus
+ WRITE_PCI16(TBus, TDev, TFun, PCI_PBUS+1, 0x0505);
+ // Do a dummy Write
+ WRITE_PCI32(5, 0, 0, PCI_VID, 0x12345678);
+
+#if defined TBT_RR_S5_SXEXIT && TBT_RR_S5_SXEXIT == 1
+ if (TbtHostInfo.TbtHRStatus){
+#else
+ if ((TbtHostInfo.TbtHRStatus) && ((BootMode == BOOT_ON_S3_RESUME) || (BootMode == BOOT_ON_S4_RESUME))){
+#endif
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: HR status is active...\n"));
+
+ // Locate Stall Ppi
+ Status = (*PeiServices)->LocatePpi (PeiServices, &gPeiStallPpiGuid, 0, NULL, &StallPpi);
+ ASSERT_PEI_ERROR(PeiServices, Status);
+
+ // For Debug, out put 80 port CP 0x14
+ IoWrite8(0x80, (TBT_SX_EXIT_TBT_CONNECTED | 0x10));
+
+ if (!(SetupData.TbtWakeupSupport)){
+ // BIOS support of Thunderbolt devices Specification for
+ // RR Revision 1.0 / FR Revision 1.1 / WR Revision 1.0
+ // 2.2.2.4 Sx exit flow for Hosts without Thunderbolt wake support
+ // If BIOS saved pre-Sx Host Router state as active
+ // (system went to sleep with attached devices),
+ // BIOS should add 500ms delay before proceeding to next step
+ Delay = (UINTN)(550 * 1000);
+ StallPpi->Stall(PeiServices, StallPpi, Delay);
+ }
+ // BIOS support of Thunderbolt devices Specification for
+ // RR Revision 1.0 / FR Revision 1.1 / WR Revision 1.0
+ // 2.2.2.5 Sx exit flow for Hosts with and without Thunderbolt wake support
+ // Upon wake, if BIOS saved pre-Sx Host Router state as active, BIOS sholud:
+ // 1. Apply "PCIE2TBT <-> TBT2PCIE" handshake procedure with
+ // "Sx_Exit_TBT_Connected" command.
+ // 2. If procedure above returns true, BIOS sholud perform
+ // "wait for fast link bring-up" loop.
+
+ // Excute command...
+ if (MMIO_READ32(TBT_CFG_ADDRESS(0x05, 0, 0, PCI_RID))!= 0xFFFFFFFF){
+ if (TbtSetPCIe2TBTCommand(0x05, 0, TBT_SX_EXIT_TBT_CONNECTED, 0x8FFFFF)){
+ for(Counter=0;Counter<0x2000;Counter++){
+ if (MMIO_READ32(TBT_CFG_ADDRESS(5, 0, 0, PCI_VID)) != 0xFFFFFFFF){
+ break;
+ }
+ StallPpi->Stall(PeiServices, StallPpi, 1000);
+ } // for loop
+ } // end of if
+ } // end of if
+ } // Host is active
+
+ // Remove temp bus
+ WRITE_PCI32(TBus, TDev, TFun, PCI_PBUS, 0xFF000000);
+
+ return Status;
+}
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: TbtPeiAfterNbPcieReady
+//
+// Description: When Thunderbolt host is at NB PCIE slot, we do Sx_Exit flow
+// here avoiding chipset limitation
+//
+// Input: EFI_PEI_SERVICES **PeiServices
+// EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor
+// VOID *InvokePpi
+//
+// Output: EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+EFI_STATUS TbtPeiAfterNbPcieReady(
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
+ IN VOID *InvokePpi )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_PEI_READ_ONLY_VARIABLE_PPI *ReadOnlyVariable;
+ SETUP_DATA SetupData;
+ AMI_TBT_HR_STATUS_DATA TbtHostInfo;
+ UINTN VariableSize = sizeof(SETUP_DATA);
+ UINTN HRStatusSize = sizeof(AMI_TBT_HR_STATUS_DATA);
+
+ PEI_TRACE((TRACE_ALWAYS,PeiServices, "TbtPeiAfterNbPcieReady Start.\n"));
+
+ Status = (*PeiServices)->LocatePpi ( PeiServices, &gEfiPeiReadOnlyVariablePpiGuid,
+ 0, NULL, &ReadOnlyVariable);
+ ASSERT_PEI_ERROR(PeiServices, Status);
+
+ Status = ReadOnlyVariable->GetVariable ( PeiServices, L"Setup",
+ &SetupGuid, NULL,
+ &VariableSize, &SetupData);
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: Locate Get Setup ReadOnlyVariable Status = %r\n", Status));
+
+ Status = ReadOnlyVariable->GetVariable ( PeiServices, L"TbtHRStatusVar",
+ &gTbtHRStatusGuid, NULL,
+ &HRStatusSize, &TbtHostInfo);
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: Locate Get TbtHRStatusVar ReadOnlyVariable Status = %r\n", Status));
+
+ if(!EFI_ERROR(Status) && (SetupData.TbtHostLocation >= 0x20)){
+ switch(TbtHostInfo.TbtHRSeries){
+ case Cactus_Ridge:
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: Cactus Ridge wake flow ...\n"));
+ Status = TbtCRSxExitFlow(PeiServices);
+ break;
+
+ case Redwood_Ridge:
+ case Falcon_Ridge:
+ case BDW_TBT_LP:
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPei: Redwood Ridge/Falcon Ridge/Win Ridge wake flow ...\n"));
+ Status = TbtSxExitFlow(PeiServices);
+ break;
+ } // end of switch
+ ASSERT_PEI_ERROR(PeiServices, Status);
+ }
+
+ PEI_TRACE((TRACE_ALWAYS, PeiServices, "TbtPeiAfterNbPcieReady End.\n"));
+ return Status;
+}
+
+//**********************************************************************
+//**********************************************************************
+//** **
+//** (C)Copyright 1985-2012, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//**********************************************************************
+//**********************************************************************
diff --git a/Board/EM/Thunderbolt/TbtPei/TbtPei.cif b/Board/EM/Thunderbolt/TbtPei/TbtPei.cif
new file mode 100644
index 0000000..8eec4a5
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtPei/TbtPei.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "TbtPei"
+ category = ModulePart
+ LocalRoot = "Board\EM\Thunderbolt\TbtPei\"
+ RefName = "TbtPei"
+[files]
+"TbtPei.sdl"
+"TbtPei.mak"
+"TbtPei.c"
+"TbtPei.dxs"
+<endComponent>
diff --git a/Board/EM/Thunderbolt/TbtPei/TbtPei.dxs b/Board/EM/Thunderbolt/TbtPei/TbtPei.dxs
new file mode 100644
index 0000000..8edea56
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtPei/TbtPei.dxs
@@ -0,0 +1,66 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtPei/TbtPei.dxs 1 1/10/13 4:55a Barretlin $
+//
+// $Revision: 1 $
+//
+// $Date: 1/10/13 4:55a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtPei/TbtPei.dxs $
+//
+// 1 1/10/13 4:55a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 2 3/05/12 1:21a Barretlin
+// [TAG] EIP83266
+// [Category] Spec Update
+// [Description] Specificatoin Update 0.90
+// [Files] TbtSetup.sdl
+// TbtSetup.sd
+// TbtSetup.uni
+// TbtSetup.cif
+// TbtOemBoard.h
+// TbtOemLib.c
+// TbtOemLib.h
+// TbtSmm.c
+// TbtPei..
+//
+//**********************************************************************
+#include <token.h>
+#include <ppi\CpuIo.h>
+#include <PPI\stall.h>
+#include <ppi\ReadOnlyVariable.h>
+
+DEPENDENCY_START
+ EFI_PEI_CPU_IO_PPI_INSTALLED_GUID AND
+ EFI_PEI_READ_ONLY_VARIABLE_PPI_GUID AND
+ EFI_PEI_STALL_PPI_GUID
+DEPENDENCY_END
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtPei/TbtPei.mak b/Board/EM/Thunderbolt/TbtPei/TbtPei.mak
new file mode 100644
index 0000000..10ecd1a
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtPei/TbtPei.mak
@@ -0,0 +1,82 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtPei/TbtPei.mak 1 1/10/13 4:55a Barretlin $
+#
+# $Revision: 1 $
+#
+# $Date: 1/10/13 4:55a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtPei/TbtPei.mak $
+#
+# 1 1/10/13 4:55a Barretlin
+# Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+# Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+#
+# 2 3/05/12 1:21a Barretlin
+# [TAG] EIP83266
+# [Category] Spec Update
+# [Description] Specificatoin Update 0.90
+# [Files] TbtSetup.sdl
+# TbtSetup.sd
+# TbtSetup.uni
+# TbtSetup.cif
+# TbtOemBoard.h
+# TbtOemLib.c
+# TbtOemLib.h
+# TbtSmm.c
+# TbtPei..
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: TbtPei.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all : TbtPei
+
+TbtPei : $(BUILD_DIR)\TbtPei.mak TbtPeiBin
+
+$(BUILD_DIR)\TbtPei.mak : $(TbtPei_DIR)\$(@B).cif $(TbtPei_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(TbtPei_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+TbtPeiBin : $(AMICSPLib) $(AMIPEILIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\TbtPei.mak all\
+ GUID=1A8E9D96-66E6-461B-95D6-882C984D0B00\
+ ENTRY_POINT=TbtPeiEntry\
+ "MY_INCLUDES=$(TBT_OEMBOARD_INCLUDES)"\
+ TYPE=PEIM \
+ DEPEX1=$(TbtPei_DIR)\TbtPei.dxs \
+ DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX \
+ COMPRESS=0\
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#********************************************************************** \ No newline at end of file
diff --git a/Board/EM/Thunderbolt/TbtPei/TbtPei.sdl b/Board/EM/Thunderbolt/TbtPei/TbtPei.sdl
new file mode 100644
index 0000000..4e90aa8
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtPei/TbtPei.sdl
@@ -0,0 +1,35 @@
+TOKEN
+ Name = TbtPei_SUPPORT
+ Value = 1
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Help = "Main switch to enable TbtPei support in Project"
+End
+
+MODULE
+ Help = "Includes TbtPei.mak to Project"
+ File = "TbtPei.mak"
+End
+
+PATH
+ Name = "TbtPei_DIR"
+End
+
+ELINK
+ Name = "/I$(TbtPei_DIR)"
+ Parent = "TBT_PEI_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "TBT_PEI_INCLUDES"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\TbtPei.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+End \ No newline at end of file
diff --git a/Board/EM/Thunderbolt/TbtSmm/TbtSmm.c b/Board/EM/Thunderbolt/TbtSmm/TbtSmm.c
new file mode 100644
index 0000000..e60f02f
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtSmm/TbtSmm.c
@@ -0,0 +1,2992 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtSmm/TbtSmm.c 22 5/19/14 9:02a Barretlin $
+//
+// $Revision: 22 $
+//
+// $Date: 5/19/14 9:02a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtSmm/TbtSmm.c $
+//
+// 22 5/19/14 9:02a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix check error with cppcheck tool
+// [Files] TbtSmm.c
+//
+// 21 5/19/14 7:34a Barretlin
+// [TAG] EIP165410
+// [Category] New Feature
+// [Description] Support Thunderbolt AIC at NB PCIE slot
+// [Files] TbtPei.c TbtDxe.c TbtGpe.asl TbtSmm.c TbtOemBoard.c
+// TbtOemLib.c TbtOemLib.h TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+// TbtSetupReset.c
+//
+// 20 5/19/14 4:40a Barretlin
+// [TAG] EIP167031
+// [Category] Improvement
+// [Description] Variable's attribute needs to be reviewed by
+// Thunderbolt component driver
+// [Files] TbtSmm.c
+//
+// 19 2/19/14 2:57p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] fix TBT host chip information record incorrect in SMM
+// [Files] TbtSmm.c
+//
+// 18 2/18/14 1:13a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] fix build error
+// [Files] TbtSmm.c
+//
+// 17 2/10/14 1:35p Barretlin
+// [TAG] EIP152401
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Implement Thunderbolt BIOS additions 1.9
+// [Files] TbtSmm.c TbtGpe.asl
+//
+// 16 2/10/14 12:17p Barretlin
+// [TAG] EIP151867
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] Build error when using PI 1.0
+// [RootCause] GUID and Protocal do not be defined
+// [Solution] Using generic GUID and defining correct protocal when
+// using PI 1.0
+// [Files] TbtSmm.c
+//
+// 15 1/05/14 1:57p Barretlin
+// [TAG] EIP N/A
+// [Category] New Feature
+// [Description] Support Thunderbolt feature Enable/Disable in run time
+// Support dynamic Thunderbolt AIC location in run time
+// [Files] TbtSmm.c
+//
+// 14 12/25/13 6:06a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Using token to enable/disable double check TBT host
+// router state in SxSMI/PowerButtonSMI
+// [Files] TbtSmm.sdl TbtSmm.c
+//
+// 13 12/24/13 11:35a Barretlin
+// [TAG] EIP148198
+// [Category] Spec Update
+// [Severity] Normal
+// [Description] Updating for Thunderbolt BIOS additions - rev.1.8
+// [Files] TbtSmm.c
+//
+// 12 12/24/13 11:25a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix thunderbolt device enumerating fail when
+// TBT_PCIBUS_SKIP is disable
+// [Files] TbtSmm.c
+//
+// 11 6/21/13 7:42a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix build error with non Intel RC project
+// [Files] TbtSmm.c
+//
+// 10 6/20/13 3:38a Barretlin
+// [TAG] EIP None
+// [Category] Improvement
+// [Description] make sure RR and FR handshake work in sleep smi
+// [Files] TbtSmm.c
+//
+// 9 6/19/13 10:34a Barretlin
+// [TAG] EIP126581
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Follow Thunderbolt RR/FR BIOS Spec rev 1.0 to add Sx
+// entry flow for Add-in Card
+// [Files] TbtSmm.c
+//
+// 8 6/18/13 1:15p Barretlin
+// [TAG] EIP None
+// [Category] Improvement
+// [Description] change TBWakeupSupport name
+// [Files] TbtSmm.c
+//
+// 7 6/16/13 11:05p Barretlin
+// [TAG] EIP126581
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update Intel Thunderbolt sample code to rev. 1.7
+// [Files] TbtSmm.c
+//
+// 6 5/27/13 9:04a Barretlin
+// [TAG] EIP124914
+// [Category] New Feature
+// [Description] Support Falcon Ridge chip
+// [Files] TbtSmm.c
+//
+// 5 4/23/13 3:25a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix programming error
+// [Files] TbtSmm.c
+//
+// 4 4/10/13 2:09p Barretlin
+// [TAG] EIP120580
+// [Category] Spec Update
+// [Severity] Minor
+// [Description] Update Intel Thunderbolt sample code to rev. 1.6
+// [Files] TbtSmm.c
+//
+// 3 4/02/13 11:41p Barretlin
+// [TAG] EIP N/A
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] Thunderbolt host driver behavior is incorrect in special
+// case
+// [RootCause] Host router state is not updating
+// [Solution] Double check Presence Detect State bit on PCIE root port
+// in sleep SMI
+// [Files] TbtSmm.c
+//
+// 2 1/25/13 10:08a Barretlin
+// [TAG] EIP N/A
+// [Category] Bug Fix
+// [Severity] Critical
+// [Symptom] IO resource will be changed by win8
+// [RootCause] OpROM address error when assigning OpROM location to
+// PCIE config register
+// [Solution] according device type to fill different OpROM address
+// location
+// [Files] TbtSmm.c
+//
+// 1 1/10/13 4:56a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 30 12/13/12 12:12a Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Following Spec remove RR handshake with GO2SX command
+// in power button and Sx callback
+// [Files] TbtSmm.c
+//
+// 29 12/12/12 3:32a Barretlin
+// [TAG] EIP None
+// [Category] Improvement
+// [Description] Workaround for synchronizing cache line size of
+// Thunderbolt
+// [Files] TbtSmm.c
+//
+// 28 12/12/12 3:18a Barretlin
+// [TAG] EIP108272
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Update to Spec 1.4 to support Redwood Ridge chip
+// [Files] TbtPei.c TbtSmm.c TbtDxe.c TbtDxe.sdl TbtGpe.asl
+// TbtOemBoard.c TbtOemBoard.h TbtOemLib.c TbtOemLib.h
+//
+// 27 10/28/12 11:44p Barretlin
+// [TAG] EIP104870
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Change wake up flow for Spec 1.2 and Spec 1.3
+// [Files] TbtPei.c TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+//
+// 26 10/28/12 10:58p Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Change GPIO routing for SharkBay ULT platform
+// [Files] TbtDxe.c TbtGpe.asl TbtDxeLib.c TbtDxeLib.h TbtSmm.c
+//
+// 25 10/27/12 6:29a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Create new setup item for thunderbolt POC handling
+// [Files] TbtPei.c TbtSmm.c TbtOemboard.c TbtOemboard.h TbtSetup.sdl
+// TbtSetup.sd Tbtsetup.uni
+//
+// 24 10/04/12 11:53a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Use global definition for genernic
+// [Files] TbtSmm.c TbtSmm.mak
+//
+// 23 9/22/12 10:49a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Change IO resource workaround behavior, docking device
+// is not support in 4C 2ports case.
+// [Files] TbtSmm.c
+//
+// 22 9/06/12 1:34a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] fix programming error
+// [Files] TbtSmm.c
+//
+// 21 9/03/12 6:27a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Change driver type and dependence for SharkBay platform
+// [Files] TbtSmm.mak TbtSmm.c TbtSmm.dxs
+//
+// 20 9/01/12 4:20a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix Intel sample code bug
+// [Files] TbtSmm.c
+//
+// 19 8/20/12 5:22a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Fix IO resource workaround broken in 4C 2port case
+// [Files] TbtSmm.c TbtOemBoard.c TbtOemBoard.h TbtSetup.sdl
+// TbtSetup.sd TbtSetup.uni
+//
+// 18 8/17/12 9:24a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Add IO resource workaround for Thunderbolt Spec1.1
+// Because new spec has removed IO resource for Thunderbolt device
+// [Files] TbtSmm.c TbtOemBoard.c TbtOemBoard.h TbtSetup.sdl
+// TbtSetup.sd TbtSetup.uni
+//
+// 17 8/17/12 9:19a Barretlin
+// [TAG] EIP98269
+// [Category] Spec Update
+// [Severity] Normal
+// [Description] Update Thunderbolt specification to version 1.1 and
+// sample code to Rev. 1.4
+// [Files] TbtSmm.c
+//
+// 16 7/31/12 5:42a Barretlin
+// [TAG] EIP96350
+// [Category] Spec Update
+// [Severity] Critical
+// [Description] Updated Thunderbolt specification to version 1.00
+// [Files] TbtDxe.c TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+// TbtOemBoard.sdl TbtSetup.sd TbtSetup.uni
+//
+// 15 7/24/12 11:50p Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Adding power button event
+// [Files] TbtSmm.c
+//
+// 14 5/29/12 5:23a Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Removing registered S1callback function when system
+// entering S1state
+// [Files] TbtSmm.c
+//
+// 13 5/29/12 5:17a Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] clean redundancy code in surprise-removal workaround
+// [Files] TbtSmm.c
+//
+// 12 5/22/12 9:54a Barretlin
+// [TAG] EIP90650
+// [Category] Spec Update
+// [Description] Specificatoin Update 0.94 - The default value of
+// OPTIONAL workaround for devices that don't support surprise-removal
+// should be disable.
+//
+// [Files] TbtSmm.c TbtOemBoard.c TbtOemBoard.h
+// TbtSetup.sdl TbtSetup.sd TbtSetup.uni
+//
+// 11 5/21/12 2:25a Barretlin
+// [TAG] EIP90003
+// [Category] Improvement
+// [Description] If TBT devices with option rom enabled, system maybe
+// cannot boot to OS.
+// [Files] TbtDxe.c TbtSmm.c TbtOemBoard.sdl
+//
+// 10 5/10/12 6:40a Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Fix Programming error at specification 0.92 update
+// [Files] TbtSmm.c
+//
+// 9 5/07/12 6:40a Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Add three setup items for debug
+// [Files] TbtDxe.c
+// TbtGpe.asl
+// TbtSmm.c
+// TbtSetup.sd
+// TbtSetup.uni
+// TbtOemBoard.c
+// TbtOemBoard.h
+//
+// 8 5/06/12 1:47a Barretlin
+// [TAG] None
+// [Category] Bug Fix
+// [Symptom] Thunderbolt function is broken in windows 8 and sometime
+// EP#6 shows yellow mark in windows device manager
+// [RootCause] SCI is signaled incorrectly
+// [Solution] enable GPIO routing
+// [Files] TbtSmm.c
+//
+// 7 5/05/12 9:20a Barretlin
+// [TAG] EIP89207
+// [Category] Spec Update
+// [Description] OPTIONAL workaround for devices that don't support
+// surprise-removal
+// [Files] TbtSmm.c
+//
+// 6 4/14/12 4:17a Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] Fix Programming error at specification 0.91 update
+// [Files] TbtSmm.c
+//
+// 5 3/05/12 1:18a Barretlin
+// [TAG] EIP83266
+// [Category] Spec Update
+// [Description] Specificatoin Update 0.90
+// [Files] TbtSetup.sdl
+// TbtSetup.sd
+// TbtSetup.uni
+// TbtSetup.cif
+// TbtOemBoard.h
+// TbtOemLib.c
+// TbtOemLib.h
+// TbtSmm.c
+// TbtPei..
+//
+// 3 2/20/12 4:44a Wesleychen
+// Add new SDL token "TBT_SWSMI_DELAY" for debug.
+//
+// 2 2/20/12 12:04a Wesleychen
+// - Add SMMSxDispatch.
+// - Rewrite ThunderboltSwSmiCallback().
+//
+// 1 12/08/11 4:09a Wesleychen
+// Thunderbolt eModule initially releases.
+//
+//*************************************************************************
+#include <Token.h>
+#include <Setup.h>
+#include <AmiDxeLib.h>
+#include <AMICSPLIBInc.h>
+#include <AmiCspLib.h>
+#include <TbtOemBoard.h>
+#if defined TBT_INTEL_RC_CONFIG && TBT_INTEL_RC_CONFIG == 1
+#include <PchAccess.h>
+#endif
+#include <Protocol/Variable.h>
+
+#if defined(PI_SPECIFICATION_VERSION)&&(PI_SPECIFICATION_VERSION>=0x0001000A)&&(CORE_COMBINED_VERSION >= 0x4028B)
+#include <Protocol\SmmBase2.h>
+#include <Protocol\SmmSwDispatch2.h>
+#include <Protocol\SmmSxDispatch2.h>
+#include <Protocol\SmmPowerButtonDispatch2.h>
+#else
+#include <Protocol\SmmBase.h>
+#include <Protocol\SmmSwDispatch.h>
+#include <Protocol\SmmSxDispatch.h>
+#include <Protocol\SmmPowerButtonDispatch.h>
+#endif
+
+//---------------------------------------------------------------------------
+// Constant, Macro and Type Definition(s)
+//---------------------------------------------------------------------------
+// Constant Definition(s)
+
+#if defined(PI_SPECIFICATION_VERSION)&&(PI_SPECIFICATION_VERSION>=0x0001000A)&&(CORE_COMBINED_VERSION >= 0x4028B)
+#define AMI_SMM_BASE_PROTOCOL EFI_SMM_BASE2_PROTOCOL
+#define AMI_SMM_SW_DISPATCH_PROTOCOL EFI_SMM_SW_DISPATCH2_PROTOCOL
+#define AMI_SMM_SW_DISPATCH_CONTEXT EFI_SMM_SW_REGISTER_CONTEXT
+#define AMI_SMM_SX_DISPATCH_PROTOCOL EFI_SMM_SX_DISPATCH2_PROTOCOL
+#define AMI_SMM_SX_DISPATCH_CONTEXT EFI_SMM_SX_REGISTER_CONTEXT
+#define AMI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL EFI_SMM_POWER_BUTTON_DISPATCH2_PROTOCOL
+#define AMI_SMM_POWER_BUTTON_DISPATCH_CONTEXT EFI_SMM_POWER_BUTTON_REGISTER_CONTEXT
+#define SMM_CHILD_DISPATCH_SUCCESS EFI_SUCCESS
+#define SMM_CHILD_DISPATCH_TIMEOUT EFI_TIMEOUT
+#define SMM_CHILD_DISPATCH_NO_MEDIA EFI_NO_MEDIA
+#define SMM_CHILD_DISPATCH_UNSUPPORTED EFI_UNSUPPORTED
+#else
+#define AMI_SMM_BASE_PROTOCOL EFI_SMM_BASE_PROTOCOL
+#define AMI_SMM_SW_DISPATCH_PROTOCOL EFI_SMM_SW_DISPATCH_PROTOCOL
+#define AMI_SMM_SW_DISPATCH_CONTEXT EFI_SMM_SW_DISPATCH_CONTEXT
+#define AMI_SMM_SX_DISPATCH_PROTOCOL EFI_SMM_SX_DISPATCH_PROTOCOL
+#define AMI_SMM_SX_DISPATCH_CONTEXT EFI_SMM_SX_DISPATCH_CONTEXT
+#define AMI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL
+#define AMI_SMM_POWER_BUTTON_DISPATCH_CONTEXT EFI_SMM_POWER_BUTTON_DISPATCH_CONTEXT
+#define SMM_CHILD_DISPATCH_SUCCESS
+#define SMM_CHILD_DISPATCH_TIMEOUT
+#define SMM_CHILD_DISPATCH_NO_MEDIA
+#define SMM_CHILD_DISPATCH_UNSUPPORTED
+#endif
+
+#ifndef EFI_PCI_CAPABILITY_ID_PMI
+#define EFI_PCI_CAPABILITY_ID_PMI 0x01
+#endif
+
+#ifndef EFI_PCI_CAPABILITY_ID_PCIEXP
+#define EFI_PCI_CAPABILITY_ID_PCIEXP 0x10
+#endif
+
+#ifdef SMI_PROGRESS_CODE
+#undef SMI_PROGRESS_CODE
+#endif
+#define SMI_PROGRESS_CODE(Data) IoWrite8(0x80, Data)
+
+#define SMM_THUNDERBOLT_CALL TBT_SWSMI_VALUE
+
+#define MAX_TBT_DEPTH 6
+
+#define P2P_BRIDGE (((PCI_CL_BRIDGE) << 8) | (PCI_CL_BRIDGE_SCL_P2P))
+
+#define BAR_ALIGN(v, a) ((((v) - 1) | (a)) + 1)
+
+#define CMD_BUS_MASTER BIT2
+#define CMD_BM_IO (CMD_BUS_MASTER | BIT0)
+#define CMD_BM_MEM (CMD_BUS_MASTER | BIT1)
+#define CMD_BM_MEM_IO (CMD_BUS_MASTER | BIT1 | BIT0)
+
+//#define DEF_RES_IO_PER_DEV 4 //new setup item
+//#define DEF_RES_MEM_PER_DEV 32 //new setup item
+//#define DEF_RES_PMEM_PER_DEV 32 //new setup item
+#define DOCK_BUSSES 8
+
+#define DISBL_IO_REG1C 0x01F1
+#define DISBL_MEM32_REG20 0x0000FFF0
+#define DISBL_PMEM_REG24 0x0001FFF1
+
+// Light Ridge HR device ID
+#define LR_HR 0x1513
+// Eagle Ridge HR device IDs
+#define ER_SFF_HR 0x151A
+#define ER_HR 0x151B
+// Cactus Ridge HR device IDs
+#define CR_HR_2C 0x1548
+#define CR_HR_4C 0x1547
+// Redwood Ridge HR device IDs
+#define RR_HR_2C 0x1567
+#define RR_HR_4C 0x1569
+// Falcon Ridge HR device IDs
+#define FR_HR_2C 0x156B
+#define FR_HR_4C 0x156D
+// Win Ridge HR device ID
+#define WR_HR_2C 0x157E
+
+#define count(x) (sizeof(x) / sizeof((x)[0]))
+
+//
+// Common Memory mapped Pci access macros -----------------------------------
+//
+#define SmiPciAddress( Segment, Bus, Device, Function, Register ) \
+ ( (UINTN)PCIEX_BASE_ADDRESS + \
+ (UINTN)(Bus << 20) + \
+ (UINTN)(Device << 15) + \
+ (UINTN)(Function << 12) + \
+ (UINTN)(Register) \
+ )
+//
+// UINT32
+//
+#define SmiPci32Ptr( Segment, Bus, Device, Function, Register ) \
+ ( (volatile UINT32 *)SmiPciAddress( Segment, Bus, Device, Function, Register ) )
+
+#define SmiPci32( Segment, Bus, Device, Function, Register ) \
+ *SmiPci32Ptr( Segment, Bus, Device, Function, Register )
+
+#define SmiPci32Or( Segment, Bus, Device, Function, Register, OrData ) \
+ SmiPci32( Segment, Bus, Device, Function, Register ) = \
+ (UINT32) ( \
+ SmiPci32( Segment, Bus, Device, Function, Register ) | \
+ (UINT32)(OrData) \
+ )
+
+#define SmiPci32And( Segment, Bus, Device, Function, Register, AndData ) \
+ SmiPci32( Segment, Bus, Device, Function, Register ) = \
+ (UINT32) ( \
+ SmiPci32( Segment, Bus, Device, Function, Register ) & \
+ (UINT32)(AndData) \
+ )
+
+#define SmiPci32AndThenOr( Segment, Bus, Device, Function, Register, AndData, OrData ) \
+ SmiPci32( Segment, Bus, Device, Function, Register ) = \
+ (UINT32) ( \
+ ( SmiPci32( Segment, Bus, Device, Function, Register ) & \
+ (UINT32)(AndData) \
+ ) | \
+ (UINT32)(OrData) \
+ )
+//
+// UINT16
+//
+#define SmiPci16Ptr( Segment, Bus, Device, Function, Register ) \
+ ( (volatile UINT16 *)SmiPciAddress( Segment, Bus, Device, Function, Register ) )
+
+#define SmiPci16( Segment, Bus, Device, Function, Register ) \
+ *SmiPci16Ptr( Segment, Bus, Device, Function, Register )
+
+#define SmiPci16Or( Segment, Bus, Device, Function, Register, OrData ) \
+ SmiPci16( Segment, Bus, Device, Function, Register ) = \
+ (UINT16) ( \
+ SmiPci16( Segment, Bus, Device, Function, Register ) | \
+ (UINT16)(OrData) \
+ )
+
+#define SmiPci16And( Segment, Bus, Device, Function, Register, AndData ) \
+ SmiPci16( Segment, Bus, Device, Function, Register ) = \
+ (UINT16) ( \
+ SmiPci16( Segment, Bus, Device, Function, Register ) & \
+ (UINT16)(AndData) \
+ )
+
+#define SmiPci16AndThenOr( Segment, Bus, Device, Function, Register, AndData, OrData ) \
+ SmiPci16( Segment, Bus, Device, Function, Register ) = \
+ (UINT16) ( \
+ ( SmiPci16( Segment, Bus, Device, Function, Register ) & \
+ (UINT16)(AndData) \
+ ) | \
+ (UINT16)(OrData) \
+ )
+//
+// UINT8
+//
+#define SmiPci8Ptr( Segment, Bus, Device, Function, Register ) \
+ ( (volatile UINT8 *)SmiPciAddress( Segment, Bus, Device, Function, Register ) )
+
+#define SmiPci8( Segment, Bus, Device, Function, Register ) \
+ *SmiPci8Ptr( Segment, Bus, Device, Function, Register )
+
+#define SmiPci8Or( Segment, Bus, Device, Function, Register, OrData ) \
+ SmiPci8( Segment, Bus, Device, Function, Register ) = \
+ (UINT8) ( \
+ SmiPci8( Segment, Bus, Device, Function, Register ) | \
+ (UINT8)(OrData) \
+ )
+
+#define SmiPci8And( Segment, Bus, Device, Function, Register, AndData ) \
+ SmiPci8( Segment, Bus, Device, Function, Register ) = \
+ (UINT8) ( \
+ SmiPci8( Segment, Bus, Device, Function, Register ) & \
+ (UINT8)(AndData) \
+ )
+
+#define SmiPci8AndThenOr( Segment, Bus, Device, Function, Register, AndData, OrData ) \
+ SmiPci8( Segment, Bus, Device, Function, Register ) = \
+ (UINT8) ( \
+ ( SmiPci8( Segment, Bus, Device, Function, Register ) & \
+ (UINT8)(AndData) \
+ ) | \
+ (UINT8)(OrData) \
+ )
+
+// Type Definition(s)
+
+// Function Prototype(s)
+
+//---------------------------------------------------------------------------
+// Variable and External Declaration(s)
+//---------------------------------------------------------------------------
+// Variable Declaration(s)
+#if defined(PI_SPECIFICATION_VERSION)&&(PI_SPECIFICATION_VERSION>=0x0001000A)&&(CORE_COMBINED_VERSION >= 0x4028B)
+EFI_SMM_BASE2_PROTOCOL *gSmmBase2;
+EFI_SMM_SYSTEM_TABLE2 *pSmst2;
+#endif
+
+UINT16 HostDeviceId;
+UINT8 gCacheLineSize;
+UINT8 gTbtBus;
+UINT8 gTbtDev;
+UINT8 gTbtFun;
+UINT16 gReserveMemoryPerSlot;
+UINT16 gReservePMemoryPerSlot;
+UINT8 gReserveIOPerSlot;
+UINT8 gTbtHotPlugEvent;
+UINT8 gTbtNVMversion;
+#if !defined TBT_PCIBUS_SKIP || TBT_PCIBUS_SKIP == 0
+UINT8 IsFirstEnterFlag = 1;
+#endif
+UINT32 AmiTbtHrStatusAttribute = 0;
+BOOLEAN gTbtEnable = FALSE;
+BOOLEAN gTbtWakeupSupport = FALSE;
+BOOLEAN gTbtAICSupport = FALSE;
+BOOLEAN gTbtHandlePOC = FALSE;
+BOOLEAN gTbtIOresourceEnable = FALSE;
+
+// GUID Definition(s)
+EFI_GUID TbtHRStatusGuid = AMI_TBT_HR_STATUS_GUID;
+
+// Protocol Definition(s)
+
+// External Declaration(s)
+
+// Function Definition(s)
+
+//----------------------------------------------------------------------------
+
+#if defined(EFI64) || defined(EFIx64)
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: SmiDivU64x32
+//
+// Description: This routine allows a 64 bit value to be divided with a 32 bit
+// value returns 64bit result and the Remainder.
+//
+// Input: UINT64 Dividend
+// UINT64 Divisor
+//
+// Output: UINTN *Remainder OPTIONAL
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+static UINT64 SmiDivU64x32 (
+ IN UINT64 Dividend,
+ IN UINTN Divisor,
+ OUT UINTN *Remainder OPTIONAL
+)
+{
+ UINT64 Result = Dividend/Divisor;
+ if (Remainder) *Remainder=Dividend%Divisor;
+ return Result;
+}
+
+#else
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: SmiDivU64x32
+//
+// Description: This routine allows a 64 bit value to be divided with a 32 bit
+// value returns 64bit result and the Remainder.
+//
+// Input: UINT64 Dividend
+// UINT64 Divisor
+//
+// Output: UINTN *Remainder OPTIONAL
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+static UINT64 SmiDivU64x32 (
+ IN UINT64 Dividend,
+ IN UINTN Divisor, //Can only be 31 bits.
+ OUT UINTN *Remainder OPTIONAL
+)
+{
+ UINT64 Result;
+ UINT32 Rem;
+ _asm
+ {
+ mov eax, dword ptr Dividend[0]
+ mov edx, dword ptr Dividend[4]
+ mov esi, Divisor
+ xor edi, edi ;/// Remainder
+ mov ecx, 64 ;/// 64 bits
+Div64_loop:
+ shl eax, 1 ;/// Shift dividend left. This clears bit 0.
+ rcl edx, 1
+ rcl edi, 1 ;/// Shift remainder left. Bit 0 = previous dividend bit 63.
+
+ cmp edi, esi ;/// If Rem >= Divisor, do not adjust
+ cmc ;/// else adjust dividend and subtract divisor.
+ sbb ebx, ebx ;/// if Rem >= Divisor, ebx = 0, else ebx = -1.
+ sub eax, ebx ;/// if adjust, bit 0 of dividend = 1
+ and ebx, esi ;/// if adjust, ebx = Divisor, else ebx = 0.
+ sub edi, ebx ;/// if adjust, subtract divisor from remainder.
+ loop Div64_loop
+
+ mov dword ptr Result[0], eax
+ mov dword ptr Result[4], edx
+ mov Rem, edi
+ }
+
+ if (Remainder) *Remainder = Rem;
+
+ return Result;
+}
+
+#endif
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+// Procedure: SmiStall
+//
+// Description: Stalls for the Required Amount of MicroSeconds
+//
+// Parameters: Usec - UINTN
+//
+// Returns: None
+//
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID SmiStall (
+ UINTN Usec
+)
+{
+ UINTN Counter, i;
+ UINT32 Data32, PrevData;
+ UINTN Remainder;
+
+ Counter = (UINTN)SmiDivU64x32 ((Usec * 10), 3, &Remainder);
+
+ if (Remainder != 0) {
+ Counter++;
+ }
+
+ //
+ // Call WaitForTick for Counter + 1 ticks to try to guarantee Counter tick
+ // periods, thus attempting to ensure Microseconds of stall time.
+ //
+ if (Counter != 0) {
+
+ PrevData = IoRead32(PM_BASE_ADDRESS + 8);
+ for (i = 0; i < Counter; ) {
+ Data32 = IoRead32(PM_BASE_ADDRESS + 8);
+ if (Data32 < PrevData) { // Reset if there is a overlap
+ PrevData=Data32;
+ continue;
+ }
+ i += (Data32 - PrevData);
+ PrevData = Data32;
+ }
+ }
+ return;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+// Procedure: IsTBTDevice
+//
+// Description: Check device is Thunderbolt device or not
+//
+// Parameters: UINT16 - DeviceID
+//
+// Returns: BOOLEAN - TRUE
+// FALSE
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+BOOLEAN IsTBTDevice(
+ IN UINT16 DeviceID )
+{
+ switch(DeviceID)
+ {
+ case 0x1513:
+ case 0x151A:
+ case 0x151B:
+ case 0x1547: // Cactus Ridge 4C
+ case 0x1548: // Cactus Ridge 2C
+ case 0x1567: // Redwood Ridge 2C
+ case 0x1569: // Redwood Ridge 4C
+ case 0x156B: // Falcon Ridge 2C
+ case 0x156D: // Falcon Ridge 4C
+ return TRUE;
+ }
+ return FALSE;
+}//IsTBTDevice
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------
+// Procedure: TbtHotplugPinSciRouting
+//
+// Description: Find the Offset to a given Capabilities
+// ID CAPID list:
+// 0x01 = PCI Power Management Interface
+// 0x04 = Slot Identification
+// 0x05 = MSI Capability
+// 0x10 = PCI Express Capability
+//
+// Parameters: UINT8 Bus - Pci Bus Number
+// UINT8 Dev - Pci Device Number
+// UINT8 Fun - Pci Function Number
+// UINT8 CapId - CAPID to search for
+//
+// Returns: UINT8 0 - CAPID not found
+// UINT8 Other - CAPID found, Offset of desired CAPID
+//----------------------------------------------------------------------
+//<AMI_PHDR_END>
+UINT8 PcieFindCapId (
+ IN UINT8 Bus,
+ IN UINT8 Dev,
+ IN UINT8 Fun,
+ IN UINT8 CapId)
+{
+ UINT8 CapHeader;
+
+ CapHeader = SmiPci8(0x00, Bus, Dev, Fun, 0x34);
+ if (CapHeader == 0xFF) {
+ return 0;
+ }
+ while (CapHeader != 0) {
+ // Bottom 2 bits of the pointers are reserved per PCI Local Bus Spec 2.2
+ CapHeader &= ~(BIT1 | BIT0);
+
+ // Search for desired CapID
+ if (SmiPci8 (0x00, Bus, Dev, Fun, CapHeader) == CapId) {
+ return CapHeader;
+ }
+
+ CapHeader = SmiPci8 (0x00, Bus, Dev, Fun, (CapHeader + 1));
+ } // while loop
+ return 0;
+}
+
+BOOLEAN
+IsTBTHostRouter(
+ IN UINT16 DeviceID
+)
+{
+ switch(DeviceID)
+ {
+ case LR_HR:
+ case ER_SFF_HR:
+ case ER_HR:
+ case CR_HR_4C:
+ case CR_HR_2C:
+ case RR_HR_2C:
+ case RR_HR_4C:
+ case FR_HR_2C:
+ case FR_HR_4C:
+ case WR_HR_2C:
+ return TRUE;
+ }
+ return FALSE;
+}//IsTBTHostRouter
+
+typedef struct _PortInfo
+{
+ UINT8 IOBase;
+ UINT8 IOLimit;
+ UINT16 MemBase;
+ UINT16 MemLimit;
+ UINT64 PMemBase64;
+ UINT64 PMemLimit64;
+ UINT8 BusNumLimit;
+ UINT8 ConfedEP;
+} PortInfo;
+
+typedef struct _MEM_REGS
+{
+ UINT32 Base;
+ UINT32 Limit;
+} MEM_REGS;
+
+typedef struct _PMEM_REGS
+{
+ UINT64 Base64;
+ UINT64 Limit64;
+} PMEM_REGS;
+
+typedef struct _IO_REGS
+{
+ UINT16 Base;
+ UINT16 Limit;
+} IO_REGS;
+
+VOID
+PortInfoInit(
+ IN OUT PortInfo *pi
+)
+{
+ pi->BusNumLimit = 4;
+}//PortInfoInit
+
+BOOLEAN isLegacyDevice = FALSE;
+
+#define MEM_PER_SLOT gReserveMemoryPerSlot
+#define PMEM_PER_SLOT gReservePMemoryPerSlot
+
+UINT16
+MemPerSlot(
+ IN UINT16 currUsage
+)
+{
+ if(currUsage == 0)
+ return 0;
+
+ if(currUsage <= 16)
+ return 16;
+ if(currUsage <= 64)
+ return 64;
+ if(currUsage <= 128)
+ return 128;
+ if(currUsage <= 256)
+ return 256;
+ if(currUsage <= 512)
+ return 512;
+ if(currUsage <= 1024)
+ return 1024;
+
+ return currUsage;
+}//MemPerSlot
+
+UINT64
+PMemPerSlot(
+ IN UINT64 currUsage
+)
+{
+ if(currUsage == 0)
+ return 0;
+
+ if(currUsage <= 1024ULL)
+ return 1024ULL;
+ if(currUsage <= 4096ULL)
+ return 4096ULL;
+
+ return currUsage;
+}//PMemPerSlot
+
+VOID
+SetPHYPortResources(
+ IN UINT8 Bus,
+ IN UINT8 Dev,
+ IN UINT8 SubBus,
+ IN INT8 Depth,
+ IN PortInfo* CurrentPi,
+ IN OUT PortInfo* pi
+)
+{
+ UINT8 Cmd = CMD_BUS_MASTER;
+ UINT16 deltaMEM;
+ UINT64 deltaPMEM;
+ UINT8 deltaIO;
+
+ SmiPci8 (0x00, Bus, Dev, 0x00, PCI_SUBUS) = SubBus;
+ SmiPci8 (0x00, Bus, Dev, 0x00, PCI_CMD) = Cmd;
+
+ deltaIO = pi->IOBase - CurrentPi->IOBase;
+ if(Depth >= 0 && gReserveIOPerSlot && deltaIO < gReserveIOPerSlot)
+ pi->IOBase += gReserveIOPerSlot - deltaIO;
+
+ if (pi->IOBase > CurrentPi->IOBase && (pi->IOBase - 0x10) <= pi->IOLimit)
+ {
+ SmiPci8 (0x00, Bus, Dev, 0x00, PCI_IOBASE) = CurrentPi->IOBase;
+ SmiPci8 (0x00, Bus, Dev, 0x00, PCI_IOLIMIT) = pi->IOBase - 0x10;
+ SmiPci32 (0x00, Bus, Dev, 0x00, PCI_IOBASE_U) = 0x00000000;
+ Cmd |= CMD_BM_IO;
+ }
+ else
+ {
+ SmiPci16 (0x00, Bus, Dev, 0x00, PCI_IOBASE) = DISBL_IO_REG1C;
+ pi->IOBase = CurrentPi->IOBase;
+ }
+
+ deltaMEM = pi->MemBase - CurrentPi->MemBase;
+
+ if(isLegacyDevice)
+ {
+ if(Depth >= 0 && gReserveMemoryPerSlot && deltaMEM < MEM_PER_SLOT)
+ pi->MemBase += MEM_PER_SLOT - deltaMEM;
+ }
+ else
+ {
+ if(deltaMEM < MemPerSlot(deltaMEM))
+ pi->MemBase += MemPerSlot(deltaMEM) - deltaMEM;
+ }
+
+ if (pi->MemBase > CurrentPi->MemBase && (pi->MemBase - 0x10) <= pi->MemLimit)
+ {
+ SmiPci16 (0x00, Bus, Dev, 0x00, PCI_MEMBASE) = CurrentPi->MemBase;
+ SmiPci16 (0x00, Bus, Dev, 0x00, PCI_MEMLIMIT) = pi->MemBase - 0x10;
+ Cmd |= CMD_BM_MEM;
+ }
+ else
+ {
+ SmiPci32 (0x00, Bus, Dev, 0x00, PCI_MEMBASE) = DISBL_MEM32_REG20;
+ pi->MemBase = CurrentPi->MemBase;
+ }
+
+ deltaPMEM = pi->PMemBase64 - CurrentPi->PMemBase64;
+ if(isLegacyDevice)
+ {
+ if(Depth >= 0 && gReservePMemoryPerSlot && deltaPMEM < PMEM_PER_SLOT)
+ pi->PMemBase64 += PMEM_PER_SLOT - deltaPMEM;
+ }
+ else
+ {
+ if(deltaPMEM < PMemPerSlot(deltaPMEM))
+ pi->PMemBase64 += PMemPerSlot(deltaPMEM) - deltaPMEM;
+ }
+
+ if (pi->PMemBase64 > CurrentPi->PMemBase64 && (pi->PMemBase64 - 0x10) <= pi->PMemLimit64)
+ {
+ SmiPci16 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMBASE) = (UINT16)(CurrentPi->PMemBase64 & 0xFFFF);
+ SmiPci16 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMLIMIT) = (UINT16)((pi->PMemBase64 - 0x10) & 0xFFFF);
+ SmiPci32 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMBASE_U) = (UINT32)(CurrentPi->PMemBase64 >> 16);
+ SmiPci32 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMLIMIT_U) = (UINT32)((pi->PMemBase64 - 0x10) >> 16);
+ Cmd |= CMD_BM_MEM;
+ }
+ else
+ {
+ SmiPci32 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMBASE) = DISBL_PMEM_REG24;
+ SmiPci32 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMBASE_U) = 0;
+ SmiPci32 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMLIMIT_U) = 0;
+ pi->PMemBase64 = CurrentPi->PMemBase64;
+ }
+
+ SmiPci8 (0x00, Bus, Dev, 0x00, PCI_CMD) = Cmd;
+ SmiPci8 (0x00, Bus, Dev, 0x00, PCI_CLS) = gCacheLineSize;
+}//SetPHYPortResources
+
+UINT32
+SaveSetGetRestoreBAR(
+ IN volatile UINT32* BAR
+)
+{
+ UINT32 BarReq;
+ UINT32 OrigBar = *BAR;// Save BAR
+ *BAR = 0xFFFFFFFF; // Set BAR
+ BarReq = *BAR; // Get BAR
+ *BAR = OrigBar; // Restore BAR
+
+ return BarReq;
+}//SaveSetGetRestoreBAR
+
+VOID
+SetIOBAR(
+ IN volatile
+ UINT32* BAR,
+ IN UINT32 BarReq,
+ IN OUT UINT8* Cmd,
+ IN OUT IO_REGS* io_r
+)
+{
+ UINT16 Alignment = ~(BarReq & 0xFFFC);
+ UINT16 Size = Alignment + 1;
+ UINT16 NewBase;
+
+ if(io_r->Base > io_r->Limit || !Size)
+ return;
+
+ NewBase = BAR_ALIGN(io_r->Base, Alignment);
+ if(NewBase > io_r->Limit || NewBase + Size - 1 > io_r->Limit)
+ return;
+
+ *BAR = NewBase; // Set BAR
+ io_r->Base = NewBase + Size; // Advance to new position
+ *Cmd |= CMD_BM_IO; // Set IO Space Enable
+}//SetIOBAR
+
+VOID
+SetMemBAR(
+ IN volatile
+ UINT32* BAR,
+ IN UINT32 BarReq,
+ IN OUT UINT8* Cmd,
+ IN OUT MEM_REGS* mem_r
+)
+{
+ UINT32 Alignment = ~(BarReq & 0xFFFFFFF0);
+ UINT32 Size = Alignment + 1;
+ UINT32 NewBase;
+
+ if(mem_r->Base > mem_r->Limit || !Size)
+ return;
+
+ NewBase = BAR_ALIGN(mem_r->Base, Alignment);
+ if(NewBase > mem_r->Limit || NewBase + Size - 1 > mem_r->Limit)
+ return;
+
+ *BAR = NewBase; // Set BAR
+ mem_r->Base = NewBase + Size; // Advance to new position
+ *Cmd |= CMD_BM_MEM; // Set Memory Space Enable
+}//SetMemBAR
+
+VOID
+SetPMem64BAR(
+ IN volatile
+ UINT32* BAR,
+ IN BOOLEAN IsMaxBAR,
+ IN UINT32 BarReq,
+ IN OUT UINT8* Cmd,
+ IN OUT PMEM_REGS* mem_r
+)
+{
+ UINT32 Alignment = ~(BarReq & 0xFFFFFFF0);
+ UINT32 Size = Alignment + 1;
+ UINT64 NewBase;
+
+ if(mem_r->Base64 > mem_r->Limit64 || !Size)
+ return;
+
+ NewBase = BAR_ALIGN(mem_r->Base64, Alignment);
+ if(NewBase > mem_r->Limit64 || NewBase + Size - 1 > mem_r->Limit64)
+ return;
+
+ *BAR = (UINT32)(NewBase & 0xFFFFFFFF); // Set BAR
+ if(!IsMaxBAR)
+ {
+ BAR++;
+ *BAR = (UINT32)(NewBase >> 32); // Set BAR U
+ }
+ mem_r->Base64 = NewBase + Size; // Advance to new position
+ *Cmd |= CMD_BM_MEM; // Set Memory Space Enable
+}//SetPMem64BAR
+
+VOID
+SetDevResources(
+ IN UINT8 Bus,
+ IN UINT8 Dev,
+ IN UINT8 FUNC_MAX, // PCI_MAX_FUNC for devices, 1 for bridge
+ IN UINT8 BAR_MAX, // PCI_BAR5 for devices, PCI_BAR1 for bridge
+ IN OUT PortInfo *pi
+)
+{
+ UINT8 Fun;
+ UINT8 Reg;
+ UINT8 BCC; //Base Class Code
+ UINT16 VendorID;
+ UINT16 DeviceID;
+ UINT32 BarReq;
+ IO_REGS IO;
+ MEM_REGS Mem;
+ PMEM_REGS PMem;
+
+ IO.Base = pi->IOBase << 8;
+ IO.Limit = (pi->IOLimit << 8) | 0xFF;
+ Mem.Base = pi->MemBase << 16;
+ Mem.Limit = (pi->MemLimit << 16) | 0xFFFF;
+ PMem.Base64 = pi->PMemBase64 << 16;
+ PMem.Limit64 = (pi->PMemLimit64 << 16) | 0xFFFF;
+
+ for (Fun = 0; Fun < FUNC_MAX; ++Fun)
+ {
+ UINT8 Cmd = SmiPci8 (0x00, Bus, Dev, Fun, PCI_CMD) = CMD_BUS_MASTER;
+ BCC = SmiPci8 (0x00, Bus, Dev, Fun, PCI_BCC);
+ VendorID = SmiPci16 (0x00, Bus, Dev, Fun, PCI_VID);
+ DeviceID = SmiPci16 (0x00, Bus, Dev, Fun, PCI_DID);
+
+ if (0xFFFF == DeviceID)
+ continue;
+
+ for (Reg = PCI_BAR0; Reg <= BAR_MAX; Reg += 4)
+ {
+ BarReq = SaveSetGetRestoreBAR(SmiPci32Ptr (0x00, Bus, Dev, Fun, Reg));// Perform BAR sizing
+
+ if (BarReq & BIT0) // I/O BAR
+ {
+ SetIOBAR(SmiPci32Ptr(0x00, Bus, Dev, Fun, Reg),
+ BarReq, &Cmd, &IO);
+ continue;
+ }
+
+ if(BarReq & BIT3)// P-Memory BAR
+ {
+ SetPMem64BAR(SmiPci32Ptr(0x00, Bus, Dev, Fun, Reg), BAR_MAX == Reg, BarReq, &Cmd, &PMem);
+ }
+ else
+ {
+ SetMemBAR(SmiPci32Ptr(0x00, Bus, Dev, Fun, Reg), BarReq, &Cmd, &Mem);
+ }
+
+ if (BIT2 == (BarReq & (BIT2 | BIT1))) // Base address is 64 bits wide
+ {
+ Reg += 4;
+ if(!(BarReq & BIT3))// 64-bit memory bar
+ SmiPci32 (0x00, Bus, Dev, Fun, Reg) = 0; // Allocate from 32 bit space
+ }
+ }
+
+ // Assign ROM BAR
+ if (!(IsTBTDevice(DeviceID) && VendorID == 0x8086)){
+ TRACE((-1, "Start Assign ROM BAR for device....\n"));
+ if (BCC == PCI_CL_BRIDGE)
+ Reg = PCI_P2P_ROM_BAR;
+ else
+ Reg = PCI_DEV_ROM_BAR;
+
+ BarReq = SaveSetGetRestoreBAR(SmiPci32Ptr (0x00, Bus, Dev, Fun, Reg));// Perform BAR sizing
+ SetMemBAR(SmiPci32Ptr(0x00, Bus, Dev, Fun, Reg), BarReq, &Cmd, &Mem);
+ TRACE((-1, "Assign rom bar end....\n"));
+ }
+
+ if(Cmd & BIT1) // If device uses I/O and MEM mapping use only MEM mepping
+ Cmd &= ~BIT0;
+
+ SmiPci8 (0x00, Bus, Dev, Fun, PCI_CMD) = Cmd;
+ SmiPci8 (0x00, Bus, Dev, Fun, PCI_CLS) = gCacheLineSize;
+ }// Fun < PCI_MAX_FUNC
+
+ // Update pi if any changes
+ if (IO.Base > ((UINT32)pi->IOBase << 8))
+ pi->IOBase = (UINT8)(BAR_ALIGN(IO.Base, 0xFFF) >> 8);
+
+ if (Mem.Base > ((UINT32)pi->MemBase << 16))
+ pi->MemBase = (UINT16)(BAR_ALIGN(Mem.Base, 0xFFFFF) >> 16);
+
+ if (PMem.Base64 > (pi->PMemBase64 << 16))
+ pi->PMemBase64 = (BAR_ALIGN(PMem.Base64, 0xFFFFF) >> 16);
+}// SetDevResources
+
+typedef struct _DEV_ID
+{
+ UINT8 Bus;
+ UINT8 Dev;
+ UINT8 Fun;
+} DEV_ID;
+
+DEV_ID HR_Slots[] =
+{
+ {0x00, 0x1C, 0x00},// PCH slot 0
+ {0x00, 0x1C, 0x01},// PCH slot 1
+ {0x00, 0x1C, 0x02},// PCH slot 2
+ {0x00, 0x1C, 0x03},// PCH slot 3
+ {0x00, 0x1C, 0x04},// PCH slot 4
+ {0x00, 0x1C, 0x05},// PCH slot 5
+ {0x00, 0x1C, 0x06},// PCH slot 6
+ {0x00, 0x1C, 0x07},// PCH slot 7
+ {0x00, 0x01, 0x00},// PEG slot
+};
+
+//#define count(x) (sizeof(x) / sizeof((x)[0]))
+
+typedef struct _BRDG_RES_CONFIG
+{
+ UINT8 Cmd;
+ UINT8 Cls;
+ UINT8 IOBase;
+ UINT8 IOLimit;
+ UINT16 MemBase;
+ UINT16 MemLimit;
+ UINT64 PMemBase64;
+ UINT64 PMemLimit64;
+} BRDG_RES_CONFIG;
+
+const
+BRDG_RES_CONFIG NOT_IN_USE_BRIDGE =
+{
+ CMD_BUS_MASTER,
+ 0,
+ DISBL_IO_REG1C & 0xFF,
+ DISBL_IO_REG1C >> 8,
+ DISBL_MEM32_REG20 & 0xFFFF,
+ DISBL_MEM32_REG20 >> 16,
+ DISBL_PMEM_REG24 & 0xFFFF,
+ DISBL_PMEM_REG24 >> 16
+};
+
+typedef struct _BRDG_CONFIG
+{
+ DEV_ID DevId;
+ UINT8 PBus;
+ UINT8 SBus;
+ UINT8 SubBus;
+ BRDG_RES_CONFIG Res;
+} BRDG_CONFIG;
+
+enum {
+HR_US_PORT,
+HR_DS_PORT0,
+HR_DS_PORT3,
+HR_DS_PORT4,
+HR_DS_PORT5,
+HR_DS_PORT6,
+MAX_CFG_PORTS
+};
+
+enum {
+ HR_DS_PORT1 = HR_DS_PORT3
+};
+
+BRDG_CONFIG HRConfigs[MAX_CFG_PORTS];// US(X:0:0), DS(X+1:3:0),DS(X+1:4:0),DS(X+1:5:0),DS(X+1:6:0)
+
+typedef struct _HR_CONFIG
+{
+ UINT16 DeviceId;
+ UINT8 HRBus;
+ UINT8 MinDSNumber;
+ UINT8 MaxDSNumber;
+ UINT8 BridgeLoops;
+} HR_CONFIG;
+
+VOID
+InitCommonHRConfigs(
+ IN HR_CONFIG *HR_Config,
+ IN UINT8 BusNumLimit,
+ IN OUT BRDG_RES_CONFIG* HRResConf
+)
+{
+ UINT8 i,j;
+ // US(HRBus:0:0)
+ HRConfigs[HR_US_PORT].DevId.Bus = HR_Config->HRBus;
+ HRConfigs[HR_US_PORT].DevId.Dev = 0;
+ HRConfigs[HR_US_PORT].DevId.Fun = 0;
+ HRConfigs[HR_US_PORT].Res = *HRResConf;
+ if (gTbtIOresourceEnable == FALSE){
+ HRConfigs[HR_US_PORT].Res.IOBase = 0xF1;
+ HRConfigs[HR_US_PORT].Res.IOLimit = 0x01;
+ }
+ HRConfigs[HR_US_PORT].PBus = HRConfigs[HR_US_PORT].DevId.Bus;
+ HRConfigs[HR_US_PORT].SBus = HRConfigs[HR_US_PORT].PBus + 1;
+ HRConfigs[HR_US_PORT].SubBus = BusNumLimit;
+
+ // NHI resides here
+ HRConfigs[HR_DS_PORT0].DevId.Bus = HRConfigs[HR_US_PORT].DevId.Bus + 1;
+ HRConfigs[HR_DS_PORT0].DevId.Dev = 0;
+ HRConfigs[HR_DS_PORT0].DevId.Fun = 0;
+ HRConfigs[HR_DS_PORT0].Res = NOT_IN_USE_BRIDGE;
+ HRConfigs[HR_DS_PORT0].Res.MemBase = HRResConf->MemLimit;
+ HRConfigs[HR_DS_PORT0].Res.MemLimit = HRResConf->MemLimit;
+ HRResConf->MemLimit -= 0x10; //This 1 MB chunk will be used by NHI
+ HRConfigs[HR_DS_PORT0].Res.Cmd = CMD_BM_MEM;
+ HRConfigs[HR_DS_PORT0].Res.Cls = gCacheLineSize;
+ HRConfigs[HR_DS_PORT0].PBus = HRConfigs[HR_DS_PORT0].DevId.Bus;
+ HRConfigs[HR_DS_PORT0].SBus = HRConfigs[HR_DS_PORT0].PBus + 1;
+ HRConfigs[HR_DS_PORT0].SubBus = HRConfigs[HR_DS_PORT0].PBus + 1;
+
+ switch(HR_Config->DeviceId)
+ {
+ case WR_HR_2C:// HR with 1 DS only
+ HRConfigs[HR_DS_PORT1].DevId.Bus = HRConfigs[HR_US_PORT].DevId.Bus + 1;
+ HRConfigs[HR_DS_PORT1].DevId.Dev = 1;
+ HRConfigs[HR_DS_PORT1].DevId.Fun = 0;
+ HRConfigs[HR_DS_PORT1].Res = *HRResConf;
+ HRConfigs[HR_DS_PORT1].PBus = HRConfigs[HR_DS_PORT1].DevId.Bus;
+ HRConfigs[HR_DS_PORT1].SBus = HRConfigs[HR_DS_PORT0].SubBus + 1;
+ HRConfigs[HR_DS_PORT1].SubBus = BusNumLimit;
+ HR_Config->MinDSNumber = HRConfigs[HR_DS_PORT1].DevId.Dev;
+ HR_Config->MaxDSNumber = HRConfigs[HR_DS_PORT1].DevId.Dev;
+ HR_Config->BridgeLoops = 3;
+ break;
+ default:
+ // DS(HRBus+2:3-6:0)
+ HR_Config->MinDSNumber = 3;
+ HR_Config->MaxDSNumber = 6;
+ HR_Config->BridgeLoops = count(HRConfigs);
+
+ for(j = 2, i = HR_Config->MinDSNumber; j < count(HRConfigs) && i <= HR_Config->MaxDSNumber; ++j, ++i)
+ {
+ HRConfigs[j].DevId.Bus = HRConfigs[HR_US_PORT].DevId.Bus + 1;
+ HRConfigs[j].DevId.Dev = i;
+ HRConfigs[j].DevId.Fun = 0;
+ HRConfigs[j].PBus = HRConfigs[j].DevId.Bus;
+ HRConfigs[j].Res.Cls = gCacheLineSize;
+ }
+ }
+}//InitCommonHRConfigs
+
+VOID
+InitHRDSPort_Disable(
+ IN UINT8 id,
+ IN OUT BRDG_CONFIG* BrdgConf
+)
+{
+ HRConfigs[id].Res = NOT_IN_USE_BRIDGE;
+ HRConfigs[id].SBus = BrdgConf->SBus;
+ HRConfigs[id].SubBus = BrdgConf->SBus;
+
+ BrdgConf->SBus++;
+}//InitHRDSPort_Disable
+
+VOID
+InitHRDSPort_1Port(
+ IN OUT BRDG_CONFIG* BrdgConf
+)
+{
+ UINT16 MemBase = BrdgConf->Res.MemBase & 0xFFF0;
+ UINT64 PMemBase64 = BrdgConf->Res.PMemBase64 & ~0xFULL;
+ UINT8 IOBase = BrdgConf->Res.IOBase & 0xF0;
+ UINT8 BusRange = BrdgConf->SubBus - BrdgConf->PBus - (MAX_CFG_PORTS - 2); // MAX_CFG_PORTS-1(US)-1(HIA) is num of bridges in HR, on each bridge bus# is incremented
+ BusRange -= DOCK_BUSSES; // Bus range for Dock port
+
+ if (gTbtIOresourceEnable == TRUE)
+ HRConfigs[HR_DS_PORT3].Res.Cmd = CMD_BM_MEM_IO;
+ else{
+ HRConfigs[HR_DS_PORT3].Res = NOT_IN_USE_BRIDGE;
+ HRConfigs[HR_DS_PORT3].Res.Cmd = CMD_BM_MEM;
+ }
+ HRConfigs[HR_DS_PORT3].Res.Cls = gCacheLineSize;
+ HRConfigs[HR_DS_PORT3].Res.MemBase = MemBase;
+ HRConfigs[HR_DS_PORT3].Res.MemLimit = MemBase + 0xE00 - 1;
+ HRConfigs[HR_DS_PORT3].Res.PMemBase64 = PMemBase64;
+ HRConfigs[HR_DS_PORT3].Res.PMemLimit64 = PMemBase64 + 0x1A00 - 1;
+
+ if (gTbtIOresourceEnable == TRUE){
+ HRConfigs[HR_DS_PORT3].Res.IOBase = IOBase;
+ if ((BrdgConf->Res.IOLimit & 0xF0) < (IOBase + 0x50))
+ HRConfigs[HR_DS_PORT3].Res.IOLimit = BrdgConf->Res.IOLimit & 0xF0;
+ else
+ HRConfigs[HR_DS_PORT3].Res.IOLimit = IOBase + 0x50;
+ }
+
+ HRConfigs[HR_DS_PORT3].SBus = BrdgConf->SBus;
+ HRConfigs[HR_DS_PORT3].SubBus = BrdgConf->SBus + BusRange;
+
+ BrdgConf->SBus = HRConfigs[HR_DS_PORT3].SubBus + 1;
+
+ if (gTbtIOresourceEnable == TRUE)
+ HRConfigs[HR_DS_PORT4].Res.Cmd = CMD_BM_MEM_IO;
+ else{
+ HRConfigs[HR_DS_PORT4].Res = NOT_IN_USE_BRIDGE;
+ HRConfigs[HR_DS_PORT4].Res.Cmd = CMD_BM_MEM;
+ }
+ HRConfigs[HR_DS_PORT4].Res.Cls = gCacheLineSize;
+ HRConfigs[HR_DS_PORT4].Res.MemBase = MemBase + 0xE00;
+ HRConfigs[HR_DS_PORT4].Res.MemLimit = MemBase + 0x1600 - 1;
+ HRConfigs[HR_DS_PORT4].Res.PMemBase64 = PMemBase64 + 0x1A00;
+ HRConfigs[HR_DS_PORT4].Res.PMemLimit64 = PMemBase64 + 0x2200 - 1;
+
+ if (gTbtIOresourceEnable == TRUE){
+ if (HRConfigs[HR_DS_PORT3].Res.IOLimit == (BrdgConf->Res.IOLimit & 0xF0)){
+ HRConfigs[HR_DS_PORT4].Res.IOBase = 0xF1;
+ HRConfigs[HR_DS_PORT4].Res.IOLimit = 0x01;
+ }
+ else{
+ HRConfigs[HR_DS_PORT4].Res.IOBase = IOBase + 0x60;
+ HRConfigs[HR_DS_PORT4].Res.IOLimit = BrdgConf->Res.IOLimit & 0xF0;
+ }
+ }
+
+ HRConfigs[HR_DS_PORT4].SBus = BrdgConf->SBus;
+ HRConfigs[HR_DS_PORT4].SubBus = BrdgConf->SBus + DOCK_BUSSES;
+
+ BrdgConf->SBus = HRConfigs[HR_DS_PORT4].SubBus + 1;
+}//InitHRDSPort_1Port
+
+VOID
+InitHRDSPort_2Port(
+ IN OUT BRDG_CONFIG* BrdgConf
+)
+{
+ UINT16 MemBase = BrdgConf->Res.MemBase & 0xFFF0;
+ UINT64 PMemBase64 = BrdgConf->Res.PMemBase64 & ~0xFULL;
+ UINT8 IOBase = BrdgConf->Res.IOBase & 0xF0;
+ UINT8 BusRange = BrdgConf->SubBus - BrdgConf->PBus - (MAX_CFG_PORTS - 2); // MAX_CFG_PORTS-1(US)-1(HIA) is num of bridges in HR, on each bridge bus# is incremented
+
+ BusRange -= 2 * DOCK_BUSSES; // Bus range for Dock ports
+ // Rest of busses split between ports 3 and 5
+ BusRange /= 2; // Bus range for port 3/5
+
+ if (gTbtIOresourceEnable == TRUE)
+ HRConfigs[HR_DS_PORT3].Res.Cmd = CMD_BM_MEM_IO;
+ else{
+ HRConfigs[HR_DS_PORT3].Res = NOT_IN_USE_BRIDGE;
+ HRConfigs[HR_DS_PORT3].Res.Cmd = CMD_BM_MEM;
+ }
+ HRConfigs[HR_DS_PORT3].Res.Cls = gCacheLineSize;
+ HRConfigs[HR_DS_PORT3].Res.MemBase = MemBase;
+ HRConfigs[HR_DS_PORT3].Res.MemLimit = MemBase + 0x1000 - 1;
+ HRConfigs[HR_DS_PORT3].Res.PMemBase64 = PMemBase64;
+ HRConfigs[HR_DS_PORT3].Res.PMemLimit64 = PMemBase64 + 0x2000 - 1;
+
+ if (gTbtIOresourceEnable == TRUE){
+ HRConfigs[HR_DS_PORT3].Res.IOBase = IOBase;
+ if ((BrdgConf->Res.IOLimit & 0xF0) < (IOBase + 0x50))
+ HRConfigs[HR_DS_PORT3].Res.IOLimit = BrdgConf->Res.IOLimit & 0xF0;
+ else
+ HRConfigs[HR_DS_PORT3].Res.IOLimit = IOBase + 0x50;
+ }
+
+ HRConfigs[HR_DS_PORT3].SBus = BrdgConf->SBus;
+ HRConfigs[HR_DS_PORT3].SubBus = BrdgConf->SBus + BusRange;
+
+ BrdgConf->SBus = HRConfigs[HR_DS_PORT3].SubBus + 1;
+
+ if (gTbtIOresourceEnable == TRUE)
+ HRConfigs[HR_DS_PORT4].Res.Cmd = CMD_BM_MEM_IO;
+ else{
+ HRConfigs[HR_DS_PORT4].Res = NOT_IN_USE_BRIDGE;
+ HRConfigs[HR_DS_PORT4].Res.Cmd = CMD_BM_MEM;
+ }
+ HRConfigs[HR_DS_PORT4].Res.Cls = gCacheLineSize;
+ HRConfigs[HR_DS_PORT4].Res.MemBase = MemBase + 0x1000;
+ HRConfigs[HR_DS_PORT4].Res.MemLimit = MemBase + 0x1800 - 1;
+ HRConfigs[HR_DS_PORT4].Res.PMemBase64 = PMemBase64 + 0x2000;
+ HRConfigs[HR_DS_PORT4].Res.PMemLimit64 = PMemBase64 + 0x2800 - 1;
+
+ if (gTbtIOresourceEnable == TRUE){
+ if (gTbtNVMversion > 14){
+ HRConfigs[HR_DS_PORT4].Res.Cmd = CMD_BM_MEM;
+ HRConfigs[HR_DS_PORT4].Res.IOBase = 0xF1;
+ HRConfigs[HR_DS_PORT4].Res.IOLimit = 0x01;
+ }
+ else{
+ if (HRConfigs[HR_DS_PORT3].Res.IOLimit == (BrdgConf->Res.IOLimit & 0xF0)){
+ HRConfigs[HR_DS_PORT4].Res.IOBase = 0xF1;
+ HRConfigs[HR_DS_PORT4].Res.IOLimit = 0x01;
+ }
+ else{
+ HRConfigs[HR_DS_PORT4].Res.IOBase = IOBase + 0x60;
+ HRConfigs[HR_DS_PORT4].Res.IOLimit = BrdgConf->Res.IOLimit & 0xF0;
+ }
+ }
+ }
+
+ HRConfigs[HR_DS_PORT4].SBus = BrdgConf->SBus;
+ HRConfigs[HR_DS_PORT4].SubBus = BrdgConf->SBus + DOCK_BUSSES;
+
+ BrdgConf->SBus = HRConfigs[HR_DS_PORT4].SubBus + 1;
+
+ if (gTbtIOresourceEnable == TRUE)
+ HRConfigs[HR_DS_PORT5].Res.Cmd = CMD_BM_MEM_IO;
+ else{
+ HRConfigs[HR_DS_PORT5].Res = NOT_IN_USE_BRIDGE;
+ HRConfigs[HR_DS_PORT5].Res.Cmd = CMD_BM_MEM;
+ }
+ HRConfigs[HR_DS_PORT5].Res.Cls = gCacheLineSize;
+ HRConfigs[HR_DS_PORT5].Res.MemBase = MemBase + 0x1800;
+ HRConfigs[HR_DS_PORT5].Res.MemLimit = MemBase + 0x2600 - 1;
+ HRConfigs[HR_DS_PORT5].Res.PMemBase64 = PMemBase64 + 0x3000;
+ HRConfigs[HR_DS_PORT5].Res.PMemLimit64 = PMemBase64 + 0x4A00 - 1;
+
+ if (gTbtIOresourceEnable == TRUE){
+ if (gTbtNVMversion > 14){
+ if (HRConfigs[HR_DS_PORT3].Res.IOLimit == (BrdgConf->Res.IOLimit & 0xF0)){
+ HRConfigs[HR_DS_PORT5].Res.IOBase = 0xF1;
+ HRConfigs[HR_DS_PORT5].Res.IOLimit = 0x01;
+ }
+ else{
+ HRConfigs[HR_DS_PORT5].Res.IOBase = IOBase + 0x60;
+ HRConfigs[HR_DS_PORT5].Res.IOLimit = BrdgConf->Res.IOLimit & 0xF0;
+ }
+ }
+ else{
+ HRConfigs[HR_DS_PORT5].Res.Cmd = CMD_BM_MEM;
+ HRConfigs[HR_DS_PORT5].Res.IOBase = 0xF1;
+ HRConfigs[HR_DS_PORT5].Res.IOLimit = 0x01;
+ }
+ }
+ HRConfigs[HR_DS_PORT5].SBus = BrdgConf->SBus;
+ HRConfigs[HR_DS_PORT5].SubBus = BrdgConf->SBus + BusRange;
+
+ BrdgConf->SBus = HRConfigs[HR_DS_PORT5].SubBus + 1;
+
+ if (gTbtIOresourceEnable == TRUE)
+ HRConfigs[HR_DS_PORT6].Res.Cmd = CMD_BM_MEM_IO;
+ else{
+ HRConfigs[HR_DS_PORT6].Res = NOT_IN_USE_BRIDGE;
+ HRConfigs[HR_DS_PORT6].Res.Cmd = CMD_BM_MEM;
+ }
+ HRConfigs[HR_DS_PORT6].Res.Cls = gCacheLineSize;
+ HRConfigs[HR_DS_PORT6].Res.MemBase = MemBase + 0x2600;
+ HRConfigs[HR_DS_PORT6].Res.MemLimit = MemBase + 0x2E00 - 1;
+ HRConfigs[HR_DS_PORT6].Res.PMemBase64 = PMemBase64 + 0x2800;
+ HRConfigs[HR_DS_PORT6].Res.PMemLimit64 = PMemBase64 + 0x3000 - 1;
+ if (gTbtIOresourceEnable == TRUE){
+ HRConfigs[HR_DS_PORT6].Res.Cmd = CMD_BM_MEM;
+ HRConfigs[HR_DS_PORT6].Res.IOBase = 0xF1;
+ HRConfigs[HR_DS_PORT6].Res.IOLimit = 0x01;
+ }
+ HRConfigs[HR_DS_PORT6].SBus = BrdgConf->SBus;
+ HRConfigs[HR_DS_PORT6].SubBus = BrdgConf->SBus + DOCK_BUSSES;
+
+ BrdgConf->SBus = HRConfigs[HR_DS_PORT6].SubBus + 1;
+}//InitHRDSPort_2Port
+
+BOOLEAN
+CheckLimits(
+ IN BOOLEAN Is2PortDev,
+ IN BRDG_RES_CONFIG *HRResConf,
+ IN UINT8 BusRange
+)
+{
+ UINT16 MemBase = HRResConf->MemBase & 0xFFF0;
+ UINT16 MemLimit = HRResConf->MemLimit & 0xFFF0;
+ UINT64 PMemBase64 = HRResConf->PMemBase64 & 0xFFF0;
+ UINT64 PMemLimit64 = HRResConf->PMemLimit64 & 0xFFF0;
+ UINT8 IOBase = HRResConf->IOBase & 0xF0;
+ UINT8 IOLimit = HRResConf->IOLimit & 0xF0;
+
+ TRACE((-1, "TbtSmm.c: MemBase = %x\n", MemBase));
+ TRACE((-1, "TbtSmm.c: MemLimit = %x\n", MemLimit));
+ TRACE((-1, "TbtSmm.c: PMemBase = %x\n", PMemBase64));
+ TRACE((-1, "TbtSmm.c: PMemLimit = %x\n", PMemLimit64));
+
+ // Check memory alignment
+ if(MemBase & 0x3FF)
+ {
+ TRACE((-1, "TbtSmm.c: M alig is not 64 MB.\n"));
+ return FALSE;
+ }
+ if(PMemBase64 & 0xFFF)
+ {
+ TRACE((-1, "TbtSmm.c: PM alig is not 256 MB.\n"));
+ return FALSE;
+ }
+
+ // Check mem size
+
+ if(Is2PortDev)
+ {
+ // Check mem size
+ if(MemLimit + 0x10 - MemBase < 0x2E00)
+ {
+ TRACE((-1, "TbtSmm.c: M size is small than 737 MB.\n"));
+ return FALSE;
+ }
+ // Check P-mem size
+ if(PMemLimit64 + 0x10 - PMemBase64 < 0x4A00)
+ {
+ TRACE((-1, "TbtSmm.c: PM size is small than 1184 MB.\n"));
+ return FALSE;
+ }
+ // Check bus range
+ if(BusRange < 106)
+ {
+ TRACE((-1, "TbtSmm.c: Bus range is small than 106.\n"));
+ return FALSE;
+ }
+ }
+ else
+ {
+ if(MemLimit + 0x10 - MemBase < 0x1600) //Reserved mem min: 353MB
+ {
+ TRACE((-1, "TbtSmm.c: M size is small than 353 MB.\n"));
+ return FALSE;
+ }
+ if(PMemLimit64 + 0x10 - PMemBase64 < 0x2200) //Prefetchable mem min: 544MB
+ {
+ TRACE((-1, "TbtSmm.c: PM size is small than 544 MB.\n"));
+ return FALSE;
+ }
+ if(BusRange < 56) //Reserved bus min: 56
+ {
+ TRACE((-1, "TbtSmm.c: Bus range is small than 56\n"));
+ return FALSE;
+ }
+ }
+
+ return TRUE;
+}
+
+
+
+BOOLEAN
+InitHRResConfigs(
+ IN OUT HR_CONFIG *HR_Config,
+ IN UINT8 BusNumLimit,
+ IN OUT BRDG_RES_CONFIG* HRResConf
+)
+{
+ BRDG_CONFIG BrdgConf = {0};
+ InitCommonHRConfigs(HR_Config, BusNumLimit, HRResConf);
+ BrdgConf.PBus = HR_Config->HRBus + 2;
+ BrdgConf.SBus = HR_Config->HRBus + 3;
+ BrdgConf.SubBus = BusNumLimit;
+ BrdgConf.Res = *HRResConf;
+ while(TRUE){
+ switch(HR_Config->DeviceId)
+ {
+ case CR_HR_4C:
+ case RR_HR_4C:
+ case FR_HR_4C: // 2 Port host
+ if(CheckLimits(TRUE, HRResConf, BusNumLimit - HR_Config->HRBus))
+ {
+ InitHRDSPort_2Port(&BrdgConf);
+ return TRUE;
+ }
+ else
+ {
+ HR_Config->DeviceId = 0; // Jump to default on next loop
+ continue;
+ }
+ case CR_HR_2C:
+ case RR_HR_2C:
+ case FR_HR_2C: // 1 Port host
+ if(CheckLimits(FALSE, HRResConf, BusNumLimit - HR_Config->HRBus))
+ {
+ InitHRDSPort_1Port(&BrdgConf);
+ InitHRDSPort_Disable(HR_DS_PORT5, &BrdgConf);
+ InitHRDSPort_Disable(HR_DS_PORT6, &BrdgConf);
+ return TRUE;
+ }
+ case WR_HR_2C: // 1 Port host
+ return TRUE;
+ default:
+ InitHRDSPort_Disable(HR_DS_PORT3, &BrdgConf);
+ InitHRDSPort_Disable(HR_DS_PORT4, &BrdgConf);
+ InitHRDSPort_Disable(HR_DS_PORT5, &BrdgConf);
+ InitHRDSPort_Disable(HR_DS_PORT6, &BrdgConf);
+ return FALSE;
+ }//switch
+ }//while
+}//InitHRResConfigs
+
+BOOLEAN
+InitializeHostRouter(
+ OUT HR_CONFIG *HR_Config
+)
+{
+ UINT8 BusNumLimit;
+ BRDG_RES_CONFIG HRResConf = {0};
+ UINT8 i;
+ BOOLEAN Ret = TRUE;
+
+ for(i = 0; i < count(HR_Slots); ++i)
+ {
+ HR_Config->HRBus = SmiPci8 (0x00, HR_Slots[i].Bus, HR_Slots[i].Dev, HR_Slots[i].Fun, PCI_SBUS);
+ HR_Config->DeviceId = SmiPci16 (0x00, HR_Config->HRBus, 0x00, 0x00, PCI_DID);
+ if (IsTBTHostRouter(HR_Config->DeviceId))
+ break;
+ }
+
+ if(i >= count(HR_Slots))
+ return FALSE;
+
+ if (gTbtIOresourceEnable == TRUE)
+ HRResConf.Cmd = CMD_BM_MEM_IO;
+ else
+ HRResConf.Cmd = CMD_BM_MEM;
+ HRResConf.Cls = gCacheLineSize;
+ HRResConf.IOBase = SmiPci8 (0x00, HR_Slots[i].Bus, HR_Slots[i].Dev, HR_Slots[i].Fun, PCI_IOBASE);
+ HRResConf.IOLimit = SmiPci8 (0x00, HR_Slots[i].Bus, HR_Slots[i].Dev, HR_Slots[i].Fun, PCI_IOLIMIT);
+ HRResConf.MemBase = SmiPci16 (0x00, HR_Slots[i].Bus, HR_Slots[i].Dev, HR_Slots[i].Fun, PCI_MEMBASE);
+ HRResConf.MemLimit = SmiPci16 (0x00, HR_Slots[i].Bus, HR_Slots[i].Dev, HR_Slots[i].Fun, PCI_MEMLIMIT);
+ HRResConf.PMemBase64 = SmiPci16 (0x00, HR_Slots[i].Bus, HR_Slots[i].Dev, HR_Slots[i].Fun, PCI_PRE_MEMBASE);
+ HRResConf.PMemLimit64 = SmiPci16 (0x00, HR_Slots[i].Bus, HR_Slots[i].Dev, HR_Slots[i].Fun, PCI_PRE_MEMLIMIT);
+ HRResConf.PMemBase64 |= SmiPci32 (0x00, HR_Slots[i].Bus, HR_Slots[i].Dev, HR_Slots[i].Fun, PCI_PRE_MEMBASE_U) << 16;
+ HRResConf.PMemLimit64|= SmiPci32 (0x00, HR_Slots[i].Bus, HR_Slots[i].Dev, HR_Slots[i].Fun, PCI_PRE_MEMLIMIT_U) << 16;
+ BusNumLimit = SmiPci8 (0x00, HR_Slots[i].Bus, HR_Slots[i].Dev, HR_Slots[i].Fun, PCI_SUBUS);
+
+ // BIOS support of Thunderbolt devices Specification Update
+ // Revision 0.91
+ // 8.1.2 VGA Enable should not be set
+ // VGA Enable and VGA 16-bit decode registers of Bridge
+ // control register of Root port where Host router resides
+ // should be cleaned(Both of them should set into 0).
+ SmiPci8And(0x00, HR_Slots[i].Bus, HR_Slots[i].Dev, HR_Slots[i].Fun, PCI_BRIDGE_CNTL, 0xE7);
+
+ Ret = InitHRResConfigs(HR_Config, BusNumLimit, &HRResConf);
+
+ for(i = 0; i < HR_Config->BridgeLoops; ++i)
+ {
+ UINT8 Bus = HRConfigs[i].DevId.Bus;
+ UINT8 Dev = HRConfigs[i].DevId.Dev;
+ UINT8 Fun = HRConfigs[i].DevId.Fun;
+
+ SmiPci8 (0x00, Bus, Dev, Fun, PCI_CLS) = HRConfigs[i].Res.Cls;
+ SmiPci8 (0x00, Bus, Dev, Fun, PCI_PBUS) = HRConfigs[i].PBus;
+ SmiPci8 (0x00, Bus, Dev, Fun, PCI_SBUS) = HRConfigs[i].SBus;
+ SmiPci8 (0x00, Bus, Dev, Fun, PCI_SUBUS) = HRConfigs[i].SubBus;
+ SmiPci16 (0x00, Bus, Dev, Fun, PCI_MEMBASE) = HRConfigs[i].Res.MemBase;
+ SmiPci16 (0x00, Bus, Dev, Fun, PCI_MEMLIMIT) = HRConfigs[i].Res.MemLimit;
+ SmiPci16 (0x00, Bus, Dev, Fun, PCI_PRE_MEMBASE) = (UINT16)(HRConfigs[i].Res.PMemBase64 & 0xFFFF);
+ SmiPci16 (0x00, Bus, Dev, Fun, PCI_PRE_MEMLIMIT) = (UINT16)(HRConfigs[i].Res.PMemLimit64 & 0xFFFF);
+ SmiPci32 (0x00, Bus, Dev, Fun, PCI_PRE_MEMBASE_U) = (UINT32)(HRConfigs[i].Res.PMemBase64 >> 16);
+ SmiPci32 (0x00, Bus, Dev, Fun, PCI_PRE_MEMLIMIT_U) = (UINT32)(HRConfigs[i].Res.PMemLimit64 >> 16);
+ SmiPci8 (0x00, Bus, Dev, Fun, PCI_IOBASE) = HRConfigs[i].Res.IOBase;
+ SmiPci8 (0x00, Bus, Dev, Fun, PCI_IOLIMIT) = HRConfigs[i].Res.IOLimit;
+ SmiPci32 (0x00, Bus, Dev, Fun, PCI_IOBASE_U) = 0x00000000;
+ SmiPci8 (0x00, Bus, Dev, Fun, PCI_CMD) = HRConfigs[i].Res.Cmd;
+ }
+
+ SmiPci32 (0x00, (HR_Config->HRBus + 2), 0x00, 0x00, PCI_BAR0) = HRConfigs[HR_DS_PORT0].Res.MemLimit << 16;
+ SmiPci32 (0x00, (HR_Config->HRBus + 2), 0x00, 0x00, PCI_BAR1) = (HRConfigs[HR_DS_PORT0].Res.MemLimit + 0x4) << 16;
+ SmiPci8 (0x00, (HR_Config->HRBus + 2), 0x00, 0x00, PCI_CLS) = gCacheLineSize;
+ SmiPci8 (0x00, (HR_Config->HRBus + 2), 0x00, 0x00, PCI_CMD) = CMD_BM_MEM;
+
+ return Ret;
+}//InitializeHostRouter
+
+UINT8
+ConfigureSlot(
+ IN UINT8 Bus,
+ IN UINT8 MAX_DEVICE,
+ IN INT8 Depth,
+ IN OUT PortInfo* pi
+)
+{
+ UINT8 Device;
+ UINT8 SBus;
+ UINT8 UsedBusNumbers;
+ UINT8 RetBusNum = 0;
+ PortInfo CurrentSlot;
+
+ for (Device = 0; Device < MAX_DEVICE; Device++)
+ {
+ // Continue if device is absent
+ if (0xFFFF == SmiPci16 (0x00, Bus, Device, 0x00, PCI_DID))
+ continue;
+
+ if (P2P_BRIDGE != SmiPci16 (0x00, Bus, Device, 0x00, PCI_SCC))
+ {
+ SetDevResources(Bus, Device,
+ PCI_MAX_FUNC, PCI_BAR5, pi);
+ continue;
+ }
+ // Else Bridge
+
+ CurrentSlot = *pi; // Save before update
+
+ ++RetBusNum; // UP Bridge
+ SBus = Bus + RetBusNum; // DS Bridge
+
+ if (SBus + 1 >= pi->BusNumLimit)
+ continue;
+
+ SetDevResources(Bus, Device, 1, PCI_BAR1, pi);
+
+ // Init UP Bridge to reach DS Bridge
+ SmiPci8 (0x00, Bus, Device, 0x00, PCI_PBUS) = Bus;
+ SmiPci8 (0x00, Bus, Device, 0x00, PCI_SBUS) = SBus;
+ SmiPci8 (0x00, Bus, Device, 0x00, PCI_SUBUS) = pi->BusNumLimit;// Just in case
+ if (gTbtIOresourceEnable == TRUE)
+ SmiPci8 (0x00, Bus, Device, 0x00, PCI_CMD) = CMD_BM_MEM_IO;
+ else
+ SmiPci8 (0x00, Bus, Device, 0x00, PCI_CMD) = CMD_BM_MEM;
+
+ UsedBusNumbers = ConfigureSlot(SBus, PCI_MAX_DEVICE + 1, -1, pi);
+
+ RetBusNum += UsedBusNumbers;
+
+ SetPHYPortResources(Bus, Device,
+ SBus + UsedBusNumbers, Depth,
+ &CurrentSlot, pi);
+ }//for (Device = 0; Device <= PCI_MAX_DEVICE; Device++)
+ return RetBusNum;
+}// ConfigureSlot
+
+VOID
+SetCIOPortResources(
+ IN UINT8 Bus,
+ IN UINT8 Dev,
+ IN UINT8 SBus,
+ IN UINT8 SubBus,
+ IN PortInfo* portInfoBeforeChange,
+ IN OUT PortInfo* pi
+)
+{
+ UINT8 Cmd = CMD_BUS_MASTER;
+
+ SmiPci8 (0x00, Bus, Dev, 0x00, PCI_PBUS) = Bus;
+ SmiPci8 (0x00, Bus, Dev, 0x00, PCI_SBUS) = SBus;
+ SmiPci8 (0x00, Bus, Dev, 0x00, PCI_SUBUS) = SubBus;
+ SmiPci8 (0x00, Bus, Dev, 0x00, PCI_CMD) = Cmd;
+
+ if (pi->IOBase <= pi->IOLimit)
+ {
+ SmiPci8 (0x00, Bus, Dev, 0x00, PCI_IOBASE) = pi->IOBase;
+ SmiPci8 (0x00, Bus, Dev, 0x00, PCI_IOLIMIT) = pi->IOLimit;
+ SmiPci32 (0x00, Bus, Dev, 0x00, PCI_IOBASE_U) = 0x00000000;
+ Cmd |= CMD_BM_IO;
+ }
+ else
+ {
+ SmiPci16 (0x00, Bus, Dev, 0x00, PCI_IOBASE) = DISBL_IO_REG1C;
+ }
+
+ if (pi->MemBase <= pi->MemLimit)
+ {
+ SmiPci16 (0x00, Bus, Dev, 0x00, PCI_MEMBASE) = pi->MemBase;
+ SmiPci16 (0x00, Bus, Dev, 0x00, PCI_MEMLIMIT) = pi->MemLimit;
+ Cmd |= CMD_BM_MEM;
+ }
+ else
+ {
+ SmiPci32 (0x00, Bus, Dev, 0x00, PCI_MEMBASE) = DISBL_MEM32_REG20;
+ }
+
+ if (pi->PMemBase64 <= pi->PMemLimit64)
+ {
+ SmiPci16 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMBASE) = (UINT16)(pi->PMemBase64 & 0xFFFF);
+ SmiPci16 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMLIMIT) = (UINT16)(pi->PMemLimit64 & 0xFFFF);
+ SmiPci32 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMBASE_U) = (UINT32)(pi->PMemBase64 >> 16);
+ SmiPci32 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMLIMIT_U) = (UINT32)(pi->PMemLimit64 >> 16);
+ Cmd |= CMD_BM_MEM;
+ }
+ else
+ {
+ SmiPci32 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMBASE) = DISBL_PMEM_REG24;
+ SmiPci32 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMBASE_U) = 0;
+ SmiPci32 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMLIMIT_U) = 0;
+ }
+
+ SmiPci8 (0x00, Bus, Dev, 0x00, PCI_CMD) = Cmd;
+ SmiPci8 (0x00, Bus, Dev, 0x00, PCI_CLS) = gCacheLineSize;
+}//SetCIOPortResources
+
+VOID
+SetSlotsAsUnused(
+ IN UINT8 Bus,
+ IN UINT8 MaxSlotNum,
+ IN UINT8 CIOSlot,
+ IN OUT PortInfo* pi
+)
+{
+ UINT8 Slot;
+ for (Slot = MaxSlotNum; Slot > CIOSlot; --Slot)
+ {
+ if (0xFFFF == SmiPci16 (0x00, Bus, Slot, 0x00, PCI_DID))
+ continue;
+
+ SmiPci8 (0x00, Bus, Slot, 0x00, PCI_CLS) = gCacheLineSize;
+ SmiPci8 (0x00, Bus, Slot, 0x00, PCI_PBUS) = Bus;
+ SmiPci8 (0x00, Bus, Slot, 0x00, PCI_SBUS) = pi->BusNumLimit;
+ SmiPci8 (0x00, Bus, Slot, 0x00, PCI_SUBUS) = pi->BusNumLimit;
+ SmiPci16 (0x00, Bus, Slot, 0x00, PCI_IOBASE) = DISBL_IO_REG1C;
+ SmiPci32 (0x00, Bus, Slot, 0x00, PCI_MEMBASE) = DISBL_MEM32_REG20;
+ SmiPci32 (0x00, Bus, Slot, 0x00, PCI_PRE_MEMBASE) = DISBL_PMEM_REG24;
+ SmiPci8 (0x00, Bus, Slot, 0x00, PCI_CMD) = CMD_BUS_MASTER;
+
+ pi->BusNumLimit--;
+ }
+}//SetSlotsAsUnused
+
+#define PCIE_CAP_ID_VSEC 0x000B
+
+UINT16
+FindVendorSpecificHeader(
+ IN UINT8 Bus
+)
+{
+ PCIE_EXT_CAP_HDR ExtCap;
+ UINT16 ExtendedRegister = 0x100;
+
+ while (ExtendedRegister)
+ {
+ ExtCap.EXT_CAP_HDR = SmiPci32 (0x00, Bus, 0x00, 0x00, ExtendedRegister);
+ if (ExtCap.ExtCapId == 0xFFFF)
+ return 0x0000; // No Vendor-Specific Extended Capability header
+
+ if (PCIE_CAP_ID_VSEC == ExtCap.ExtCapId)
+ return ExtendedRegister;
+
+ ExtendedRegister = (UINT16)ExtCap.NextItemPtr;
+ }
+ return 0x0000; // No Vendor-Specific Extended Capability header
+}
+
+#define PCIE_CAP_ID_SSID_SSVID 0x0D
+
+UINT8
+FindSSID_SSVIDHeader(
+ IN UINT8 Bus
+)
+{
+ UINT8 CapHeaderId;
+ UINT8 CapHeaderOffset = SmiPci8 (0x00, Bus, 0x00, 0x00, PCI_CAPP);
+
+ while (CapHeaderOffset != 0)
+ {
+ CapHeaderId = SmiPci8 (0x00, Bus, 0x00, 0x00, CapHeaderOffset);
+
+ if (CapHeaderId == PCIE_CAP_ID_SSID_SSVID)
+ return CapHeaderOffset;
+
+ CapHeaderOffset = SmiPci8 (0x00, Bus, 0x00, 0x00, CapHeaderOffset + 1);
+ }
+ TRACE((-1, "TbtSmm.c: Cannot find SSID Capability header...\n"));
+ return 0;
+}//FindSSID_SSVIDHeader
+
+typedef union _BRDG_CIO_MAP_REG
+{
+ UINT32 AB_REG;
+ struct
+ {
+ UINT32 NumOfDSPorts : 5;
+ UINT32 CIOPortMap : 27;
+ };
+}BRDG_CIO_MAP_REG;
+
+BOOLEAN
+GetCIOSlotByDevId(
+ IN UINT8 Bus,
+ OUT UINT8* CIOSlot,
+ OUT UINT8* MaxSlotNum
+)
+{
+ UINT16 VSECRegister;
+ BRDG_CIO_MAP_REG BridgMap;
+ UINT32 BitScanRes;
+ UINT16 DevId = SmiPci16 (0x00, Bus, 0x00, 0x00, PCI_DID);
+
+ // Init out params in case device is not recognised
+ *CIOSlot = 4;
+ *MaxSlotNum = 7;
+
+ switch(DevId) // For known device IDs
+ {
+ case 0x1513:
+ case 0x151A:
+ case 0x151B:
+ case 0x1547:
+ case 0x1548:
+ case 0x1549:
+ return TRUE; // Just return
+ }
+
+ VSECRegister = FindVendorSpecificHeader(Bus);
+ if(!VSECRegister)
+ return TRUE; // Just return
+
+ // Go to Bridge/CIO map register
+ VSECRegister += 0x18;
+
+ BridgMap.AB_REG = SmiPci32 (0x00, Bus, 0x00, 0x00, VSECRegister);
+ // Check for range
+ if(BridgMap.NumOfDSPorts < 1 || BridgMap.NumOfDSPorts > 27)
+ return TRUE;// Not a valid register
+
+ // Set OUT params
+
+ *MaxSlotNum = (UINT8)BridgMap.NumOfDSPorts;
+
+ if(!_BitScanForward(&BitScanRes, BridgMap.CIOPortMap))// No DS bridge which is CIO port
+ return FALSE;
+
+ *CIOSlot = (UINT8)BitScanRes;
+ return TRUE;
+}//GetCIOSlotByDevId
+
+#define TBT_LEGACY_SUB_SYS_ID 0x11112222
+
+BOOLEAN
+IsLegacyDevice(
+ IN UINT8 Bus
+)
+{
+ UINT32 SID;
+ UINT8 SIDRegister;
+ UINT16 DevId = SmiPci16 (0x00, Bus, 0x00, 0x00, PCI_DID);
+ switch(DevId) // For known device IDs
+ {
+ case 0x1513:
+ case 0x151A:
+ case 0x151B:
+ TRACE((-1, "TbtSmm.c: Legacy device %x...\n", DevId));
+ return TRUE; // Legacy device by Device Id
+ }
+
+ SIDRegister = FindSSID_SSVIDHeader(Bus);
+
+ if(!SIDRegister)
+ return TRUE; // May be absent for legacy devices
+
+ // Go to register
+ SIDRegister += 0x4;
+
+ SID = SmiPci32 (0x00, Bus, 0x00, 0x00, SIDRegister);
+ TRACE((-1, "TbtSmm.c: SSID of device is %x...\n", SID));
+
+ return TBT_LEGACY_SUB_SYS_ID == SID || 0 == SID;
+}//IsLegacyDevice
+
+BOOLEAN
+ConfigureEP(
+ IN INT8 Depth,
+ IN OUT UINT8* Bus,
+ IN OUT PortInfo* pi
+)
+{
+ UINT8 SBus;
+ UINT8 CIOSlot = 4;
+ UINT8 MaxSlotNum = 7;
+ UINT8 MaxPHYSlots;
+ UINT8 UsedBusNumbers;
+ UINT8 cmd;
+ BOOLEAN CIOSlotPresent;
+ BOOLEAN Continue;
+ PortInfo portInfo = *pi;
+
+ // Based on Device ID assign CIO slot and max number of PHY slots to scan
+ CIOSlotPresent = GetCIOSlotByDevId(*Bus, &CIOSlot, &MaxSlotNum);
+ MaxPHYSlots = MaxSlotNum;// Correct if CIO slot is absent
+ // Check whether EP already configured by examining CMD register
+ cmd = SmiPci8 (0x00, *Bus, 0x00, 0x00, PCI_CMD);
+#if !defined TBT_PCIBUS_SKIP || TBT_PCIBUS_SKIP == 0
+ if(IsFirstEnterFlag) cmd &= 0; //AMI_OVERWRITE
+#endif
+ if(cmd & CMD_BUS_MASTER) // Yes no need to touch this EP, just move to next one in chain
+ {
+ UINT8 CIOBus = *Bus + 1;
+ if(!CIOSlotPresent)// CIO slot is not present in EP, just return FALSE
+ {
+ //PrintCPStr("BMF");
+ TRACE((-1, "TbtSmm.c: CIO slot is not present in EP, just return FALSE.\n"));
+ return FALSE;
+ }
+ // Take all resources from CIO slot and return
+ pi->BusNumLimit = SmiPci8 (0x00, CIOBus, CIOSlot, 0x00, PCI_SUBUS);
+ pi->IOBase = SmiPci8 (0x00, CIOBus, CIOSlot, 0x00, PCI_IOBASE);
+ pi->IOLimit = SmiPci8 (0x00, CIOBus, CIOSlot, 0x00, PCI_IOLIMIT);
+ pi->MemBase = SmiPci16 (0x00, CIOBus, CIOSlot, 0x00, PCI_MEMBASE);
+ pi->MemLimit = SmiPci16 (0x00, CIOBus, CIOSlot, 0x00, PCI_MEMLIMIT);
+ pi->PMemBase64 = SmiPci16 (0x00, CIOBus, CIOSlot, 0x00, PCI_PRE_MEMBASE) & 0xFFF0;
+ pi->PMemLimit64 = SmiPci16 (0x00, CIOBus, CIOSlot, 0x00, PCI_PRE_MEMLIMIT) & 0xFFF0;
+ pi->PMemBase64 |= SmiPci32 (0x00, CIOBus, CIOSlot, 0x00, PCI_PRE_MEMBASE_U) << 16;
+ pi->PMemLimit64|= SmiPci32 (0x00, CIOBus, CIOSlot, 0x00, PCI_PRE_MEMLIMIT_U) << 16;
+ pi->PMemLimit64|= 0xF;
+ // Jump to next EP
+ *Bus = SmiPci8 (0x00, CIOBus, CIOSlot, 0x00, PCI_SBUS);
+ // Should we continue?
+ Continue = 0xFFFF != SmiPci16 (0x00, *Bus, 0x00, 0x00, PCI_DID);
+ return Continue;
+ }
+
+ //Set is legacy dvice
+ isLegacyDevice = IsLegacyDevice(*Bus);
+
+ SetCIOPortResources(*Bus, 0, // Assign all available resources to US port of EP
+ *Bus + 1, pi->BusNumLimit, 0, pi);
+
+ SBus = *Bus + 1;// Jump to DS port
+
+ if(CIOSlotPresent)
+ MaxPHYSlots = CIOSlot;
+
+ UsedBusNumbers = ConfigureSlot(SBus, MaxPHYSlots, Depth, pi);
+
+ if(!CIOSlotPresent)
+ return FALSE; // Stop resource assignment on this chain
+
+ // Set rest of slots us unused
+ SetSlotsAsUnused(SBus, MaxSlotNum, CIOSlot, pi);
+
+ SetCIOPortResources(SBus, CIOSlot,
+ SBus + UsedBusNumbers + 1,
+ pi->BusNumLimit, &portInfo, pi);
+
+ *Bus = SBus + UsedBusNumbers + 1;// Go to next EP
+
+ if (*Bus > pi->BusNumLimit - 2) // In case of bus numbers are exhausted stop enumeration
+ return FALSE;
+
+ // BIOS support of Thunderbolt devices Specification Update
+ // Revision 0.94
+ // This OPTIONAL workaround sholud be disable by default
+
+ // BIOS support of Thunderbolt devices Specification Update
+ // Revision 0.92
+ // OPTIONAL workaround for devices that don't support surprise-removal
+ // If SMI Handler cannot find any device behind a CIO port it means no more TBT devices
+ // attached to this PCIe sub-tree. In this case BIOS should set MBASE = MLIMIT.
+ // Check whether we should continue on this chain
+ Continue = 0xFFFF != SmiPci16 (0x00, *Bus, 0x00, 0x00, PCI_DID);
+
+ return Continue;
+}//ConfigureEP
+
+VOID
+GetPortResources(
+ IN UINT8 Bus,
+ IN UINT8 Dev,
+ IN OUT PortInfo* pi
+)
+{
+ pi->BusNumLimit = SmiPci8 (0x00, Bus, Dev, 0x00, PCI_SUBUS);
+ pi->IOBase = SmiPci8 (0x00, Bus, Dev, 0x00, PCI_IOBASE) & 0xF0;
+ pi->IOLimit = SmiPci8 (0x00, Bus, Dev, 0x00, PCI_IOLIMIT) & 0xF0;
+ pi->MemBase = SmiPci16 (0x00, Bus, Dev, 0x00, PCI_MEMBASE) & 0xFFF0;
+ pi->MemLimit = SmiPci16 (0x00, Bus, Dev, 0x00, PCI_MEMLIMIT) & 0xFFF0;
+ pi->PMemBase64 = SmiPci16 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMBASE) & 0xFFF0;
+ pi->PMemLimit64 = SmiPci16 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMLIMIT) & 0xFFF0;
+ pi->PMemBase64 |= SmiPci32 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMBASE_U) << 16;
+ pi->PMemLimit64|= SmiPci32 (0x00, Bus, Dev, 0x00, PCI_PRE_MEMLIMIT_U) << 16;
+ pi->IOLimit |= 0xF;
+ pi->MemLimit |= 0xF;
+ pi->PMemLimit64 |= 0xF;
+}//GetPortResources
+
+VOID
+ConfigurePort(
+ IN UINT8 Bus,
+ IN UINT8 Dev,
+ IN OUT PortInfo* pi
+)
+{
+ INT8 i;
+ UINT8 USBusNum = SmiPci8 (0x00, Bus, Dev, 0x00, PCI_SBUS);
+
+ if (0xFFFF == SmiPci16 (0x00, USBusNum, 0x00, 0x00, PCI_DID))// Nothing to do if TBT device is not connected
+ return;
+
+ GetPortResources(Bus, Dev, pi);// Take reserved resources from DS port
+
+ // Assign resources to EPs
+ for (i = 0; i < MAX_TBT_DEPTH; ++i)
+ {
+ pi->ConfedEP++;
+ if(!ConfigureEP(i, &USBusNum, pi))
+ return;
+ }
+}//ConfigurePort
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: ThunderboltSwSmiCallback
+//
+// Description: This is a TBT software SMI Handler for Porting.
+//
+// Input: DispatchHandle - EFI Handle
+// DispatchContext - Pointer to the EFI_SMM_SW_DISPATCH_CONTEXT
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+#if defined(PI_SPECIFICATION_VERSION)&&(PI_SPECIFICATION_VERSION>=0x0001000A)&&(CORE_COMBINED_VERSION >= 0x4028B)
+EFI_STATUS ThunderboltSwSmiCallback (
+ IN EFI_HANDLE DispatchHandle,
+ IN CONST VOID *DispatchContext OPTIONAL,
+ IN OUT VOID *CommBuffer OPTIONAL,
+ IN OUT UINTN *CommBufferSize OPTIONAL )
+#else
+VOID ThunderboltSwSmiCallback (
+ IN EFI_HANDLE DispatchHandle,
+ IN AMI_SMM_SW_DISPATCH_CONTEXT *DispatchContext)
+#endif
+{
+ PortInfo portInfo = {0};
+ HR_CONFIG HrConfig = {0};
+ UINT8 i;
+ EFI_STATUS Status;
+ EFI_GUID SetupGuid = SETUP_GUID;
+ EFI_GUID TbtHRStatusGuid = AMI_TBT_HR_STATUS_GUID;
+ CHAR16 TbtHRStatusVar[] = TBT_HR_STATUS_VARIABLE;
+ UINTN SetupDataSize = sizeof(SETUP_DATA);
+ SETUP_DATA SetupData;
+ AMI_TBT_HR_STATUS_DATA TbtHRStatusData;
+
+ TRACE((-1, "TbtSmm.c: Thunderbolt SWSMI Callback Function Entry !!!\n"));
+ Status = pRS->GetVariable(L"Setup", &SetupGuid, NULL, &SetupDataSize, &SetupData);
+ if (!EFI_ERROR(Status)){
+ SmiStall((UINTN)(SetupData.TbtSwSMIDelay * 1000));
+ }
+
+ // Workaround for synchronizing cache line size of Thunderbolt
+ if (gCacheLineSize != SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, R_PCH_PCIE_CLS))
+ SmiPci8AndThenOr( 0x00, gTbtBus, gTbtDev, gTbtFun, R_PCH_PCIE_CLS, 0x00, gCacheLineSize);
+
+ SMI_PROGRESS_CODE (SMM_THUNDERBOLT_CALL);
+
+ PortInfoInit(&portInfo);
+
+ if (!InitializeHostRouter(&HrConfig)){
+ SMI_PROGRESS_CODE (0xCB); //Cable is unplugged
+
+ // BIOS support of Thunderbolt devices Specification Update
+ // Revision 0.90
+ // BIOS should remember whether HR is active(it is active
+ // when cable is connected)
+
+ // HR status is setted inactive
+ TbtHRStatusData.TbtHRStatus = 0;
+ if ((HostDeviceId == 0x1547) || (HostDeviceId == 0x1548)) {
+ TbtHRStatusData.TbtHRSeries = Cactus_Ridge;
+ } else if ((HostDeviceId == 0x1567) || (HostDeviceId == 0x1569)) {
+ TbtHRStatusData.TbtHRSeries = Redwood_Ridge;
+ } else if ((HostDeviceId == 0x156B) || (HostDeviceId == 0x156D)){
+ TbtHRStatusData.TbtHRSeries = Falcon_Ridge;
+ } else {
+ TbtHRStatusData.TbtHRSeries = BDW_TBT_LP;
+ }
+
+ Status = pRS->SetVariable( TbtHRStatusVar, \
+ &TbtHRStatusGuid, \
+ AmiTbtHrStatusAttribute, \
+ sizeof(AMI_TBT_HR_STATUS_DATA), \
+ &TbtHRStatusData );
+
+#if !defined TBT_PCIBUS_SKIP || TBT_PCIBUS_SKIP == 0
+ if(IsFirstEnterFlag) IsFirstEnterFlag = 0;
+#endif
+ TRACE((-1, "TbtSmm.c: Thunderbolt SWSMI Callback Function Exit !!!\n"));
+ return SMM_CHILD_DISPATCH_SUCCESS;
+ }
+
+ // Configure DS ports
+ for(i = HrConfig.MinDSNumber; i <= HrConfig.MaxDSNumber; ++i)
+ {
+ ConfigurePort(HrConfig.HRBus + 1, i, &portInfo);
+ }
+ SMI_PROGRESS_CODE (SMM_THUNDERBOLT_CALL + 2 + portInfo.ConfedEP); //PostCode = 0xAC + # of connected EP
+
+ // BIOS support of Thunderbolt devices Specification Update
+ // Revision 0.90
+ // BIOS should remember whether HR is active(it is active
+ // when cable is connected)
+ // HR status is setted active
+ HostDeviceId = SmiPci16 (0x00, HrConfig.HRBus, 0x00, 0x00, PCI_DID);
+ TRACE((-1, "TbtSmm.c: Get Thunderbolt Host Device ID %x in SWSMI from Bus:%x \n", HostDeviceId, HrConfig.HRBus));
+ if ((HostDeviceId == 0x1547) || (HostDeviceId == 0x1548))
+ TbtHRStatusData.TbtHRSeries = Cactus_Ridge;
+ if ((HostDeviceId == 0x1567) || (HostDeviceId == 0x1569))
+ TbtHRStatusData.TbtHRSeries = Redwood_Ridge;
+ if ((HostDeviceId == 0x156B) || (HostDeviceId == 0x156D))
+ TbtHRStatusData.TbtHRSeries = Falcon_Ridge;
+ if (HostDeviceId == 0x157E)
+ TbtHRStatusData.TbtHRSeries = BDW_TBT_LP;
+
+ TbtHRStatusData.TbtHRStatus = 1;
+ Status = pRS->SetVariable( TbtHRStatusVar, \
+ &TbtHRStatusGuid, \
+ AmiTbtHrStatusAttribute, \
+ sizeof(AMI_TBT_HR_STATUS_DATA), \
+ &TbtHRStatusData );
+
+#if !defined TBT_PCIBUS_SKIP || TBT_PCIBUS_SKIP == 0
+ if(IsFirstEnterFlag) IsFirstEnterFlag = 0;
+#endif
+ TRACE((-1, "TbtSmm.c: Thunderbolt SWSMI Callback Function Exit !!!\n"));
+ return SMM_CHILD_DISPATCH_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: TbtPowerButtonCallback
+//
+// Description: The following flow should be performed as a last step before
+// instructing the platform to enter Sx state:
+// BIOS should assert GO2Sx pin
+// That will trigger Host Router to prepare underlying devices
+// BIOS should poll OK2GO2SX_N_OD pin
+// Upon completion of all preparations, Host Router will assert
+// this pin to indicate readiness for Sx entry
+// At this stage BIOS should continue with legacy Sx entry steps
+//
+// Input: DispatchHandle - SMI dispatcher handle
+// *DispatchContext - Pointer to the dispatch context
+//
+// Output: Nothing
+//
+// Notes: This function does not need to put the system to sleep. This is
+// handled by PutToSleep.
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+#if defined(PI_SPECIFICATION_VERSION)&&(PI_SPECIFICATION_VERSION>=0x0001000A)&&(CORE_COMBINED_VERSION >= 0x4028B)
+EFI_STATUS TbtPowerButtonCallback (
+ IN EFI_HANDLE DispatchHandle,
+ IN CONST VOID *DispatchContext OPTIONAL,
+ IN OUT VOID *CommBuffer OPTIONAL,
+ IN OUT UINTN *CommBufferSize OPTIONAL )
+#else
+VOID TbtPowerButtonCallback (
+ IN EFI_HANDLE DispatchHandle,
+ IN AMI_SMM_POWER_BUTTON_DISPATCH_CONTEXT *DispatchContext)
+#endif
+{
+ EFI_STATUS Status;
+ UINT8 UpPortBus;
+ UINT8 RegVal8;
+ UINT16 PresenceFlag = 0;
+ UINT8 SlotStatusCapOffset;
+ UINT8 PowerManagerCapOffset;
+#if defined TBT_HR_SX_CHECK && TBT_HR_SX_CHECK == 1
+ UINT32 Attributes;
+ UINTN TbtHRStatusDataSize = sizeof(AMI_TBT_HR_STATUS_DATA);
+ CHAR16 TbtHRStatusVar[] = TBT_HR_STATUS_VARIABLE;
+ EFI_GUID TbtHRStatusGuid = AMI_TBT_HR_STATUS_GUID;
+ AMI_TBT_HR_STATUS_DATA TbtHRStatusData;
+
+ // Double check Thunderbolt Host status
+ SlotStatusCapOffset = PcieFindCapId(gTbtBus, gTbtDev, gTbtFun, EFI_PCI_CAPABILITY_ID_PCIEXP);
+ PresenceFlag = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (SlotStatusCapOffset + 0x1A));
+
+ Status = pRS->GetVariable(TbtHRStatusVar, &TbtHRStatusGuid, &Attributes, &TbtHRStatusDataSize, &TbtHRStatusData);
+ if (!EFI_ERROR(Status)){
+ TRACE((-1, "Thunderbolt Presence bit on PCIE root port%x :%x(Bit06)\n", gTbtFun, PresenceFlag));
+ if (TbtHRStatusData.TbtHRStatus){
+ if ((PresenceFlag & B_PCH_PCIE_SLSTS_PDS) == 0){
+ // Host route status record is active but no device connect actually
+ TbtHRStatusData.TbtHRStatus = 0;
+ //TbtHRStatusData.TbtHRSeries = HostDeviceId;
+ Status = pRS->SetVariable( TbtHRStatusVar, \
+ &TbtHRStatusGuid, \
+ Attributes, \
+ sizeof(AMI_TBT_HR_STATUS_DATA), \
+ &TbtHRStatusData );
+ TRACE((-1, "Host route status record is active but no device connect actually !!!\nReset Thunderbolt Host state %r\n", Status));
+ }
+ } else {
+ if ((PresenceFlag & B_PCH_PCIE_SLSTS_PDS) != 0){
+ // Host route status record is inactive but device connect actually
+ TbtHRStatusData.TbtHRStatus = 1;
+ //TbtHRStatusData.TbtHRSeries = HostDeviceId;
+ Status = pRS->SetVariable( TbtHRStatusVar, \
+ &TbtHRStatusGuid, \
+ Attributes, \
+ sizeof(AMI_TBT_HR_STATUS_DATA), \
+ &TbtHRStatusData );
+ TRACE((-1, "Host route status record is inactive but device connect actually !!!\nReset Thunderbolt Host state %r\n", Status));
+ }
+ } //TbtHRStatus
+ } // !EFI_ERROR(Status)
+#endif
+
+ if (!gTbtWakeupSupport){
+ // System does not support wake from Thunderbolt device
+ if ((HostDeviceId == 0x1547) || (HostDeviceId == 0x1548)){
+ // Sleep entry flow for Cactus Ridge chip
+#if defined TBT_HR_PWR && (TBT_HR_PWR != 0xFF)
+ if (gTbtHandlePOC){
+ Status = PowerOffPOC();
+ TRACE((-1, "TbtSmm.c: Cut off Thunderbolt POC power %r !!!\n", Status));
+ ASSERT_EFI_ERROR(Status);
+ }
+ else
+#endif
+ return SMM_CHILD_DISPATCH_UNSUPPORTED;
+ } else {
+ // Sleep entry flow for Redwood Ridge / Falcon Ridge / BDW-TBT-LP chip
+ // when system doesn't support thunderbolt wake function
+
+ // put PCIE root port power state back to D0
+ PowerManagerCapOffset = PcieFindCapId(gTbtBus, gTbtDev, gTbtFun, EFI_PCI_CAPABILITY_ID_PMI);
+ RegVal8 = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04));
+ RegVal8 &= B_PCH_PCIE_PMCS_PS;
+ SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04)) = RegVal8;
+
+ // BIOS support of Thunderbolt devices Specification Update Revision 1.4
+ // 2.3.2.2 Sx Entry flow for RR Hosts without Thunderbolt wake support
+ UpPortBus = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, PCI_SBUS);
+ if (!TbtSetPCIe2TBTCommand(UpPortBus, 0, TBT_GO2SX_NO_WAKE, 0x8FFFF)){
+ // restore PCIE root port power state back to D3
+ RegVal8 = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04));
+ RegVal8 |= B_PCH_PCIE_PMCS_PS;
+ SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04)) = RegVal8;
+
+ return SMM_CHILD_DISPATCH_NO_MEDIA;
+ }
+
+ // restore PCIE root port power state back to D3
+ RegVal8 = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04));
+ RegVal8 |= B_PCH_PCIE_PMCS_PS;
+ SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04)) = RegVal8;
+ }
+ } else {
+ // System support wake from Thunderbolt device
+ if ((HostDeviceId == 0x1547) || (HostDeviceId == 0x1548)){
+ // BIOS support of Thunderbolt devices Specification Update
+ // Revision 0.85
+ // 5. System power state (Sx) handing
+ // For Cactus Ridge (CR) Host Router component, those GPIO's
+ // should be connected to the following pins:
+ // 1. GPIO_2__GO2SX - active high
+ // 2. GPIO_9__OK2GO2SX_N_OD - active low
+ Status = ActiveTbtGpio2();
+ ASSERT_EFI_ERROR(Status);
+
+ Status = PollTbtGpio9();
+ ASSERT_EFI_ERROR(Status);
+ } else {
+ // Sleep entry flow for Redwood Ridge / Falcon Ridge / BDW-TBT-LP chip
+ // when system support thunderbolt wake function
+ //
+ // Thunderbolt BIOS Implementation guide for Redwood Ridge/Falcon Ridge/BDW-TBT-LP based
+ // devices Specification Update Revision 1.0
+ // 2.2.2.3 Sx Entry Flow for Host with Add-In Card support
+
+#if !defined TBT_HR_SX_CHECK || TBT_HR_SX_CHECK == 0
+ SlotStatusCapOffset = PcieFindCapId(gTbtBus, gTbtDev, gTbtFun, EFI_PCI_CAPABILITY_ID_PCIEXP);
+ PresenceFlag = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (SlotStatusCapOffset + 0x1A));
+#endif
+ if (gTbtAICSupport){
+ if((PresenceFlag & B_PCH_PCIE_SLSTS_PDS) != 0){
+ // put PCIE root port power state back to D0
+ PowerManagerCapOffset = PcieFindCapId(gTbtBus, gTbtDev, gTbtFun, EFI_PCI_CAPABILITY_ID_PMI);
+ RegVal8 = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04));
+ RegVal8 &= B_PCH_PCIE_PMCS_PS;
+ SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04)) = RegVal8;
+
+ // Get Thunderbolt host location
+ UpPortBus = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, PCI_SBUS);
+ if (!TbtSetPCIe2TBTCommand(UpPortBus, 0, TBT_GO2SX_WITH_WAKE, 0x8FFFF)){
+ // restore PCIE root port power state back to D3
+ RegVal8 = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04));
+ RegVal8 |= B_PCH_PCIE_PMCS_PS;
+ SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04)) = RegVal8;
+
+ return SMM_CHILD_DISPATCH_TIMEOUT;
+ }
+
+ // restore PCIE root port power state back to D3
+ RegVal8 = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04));
+ RegVal8 |= B_PCH_PCIE_PMCS_PS;
+ SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04)) = RegVal8;
+ }
+ }// end of AIC support
+
+ //
+ // BIOS support of Thunderbolt devices Specification Update Revision 1.4
+ // 2.3.2.1 Sx Entry flow for RR/FR/WR Hosts with Thunderbolt wake support
+
+ //UpPortBus = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, PCI_SBUS);
+ //if (!TbtSetPCIe2TBTCommand(UpPortBus, 0, TBT_GO2SX_WITH_WAKE, 0x8FFFF))
+ // return SMM_CHILD_DISPATCH_NO_MEDIA;
+ }
+ }
+ TRACE((-1, "TbtSmm: TbtPowerButtonCallback() !!!\n"));
+ return SMM_CHILD_DISPATCH_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: TbtGo2SxCallback
+//
+// Description: The following flow should be performed as a last step before
+// instructing the platform to enter Sx state:
+// BIOS should assert GO2Sx pin
+// That will trigger Host Router to prepare underlying devices
+// BIOS should poll OK2GO2SX_N_OD pin
+// Upon completion of all preparations, Host Router will assert
+// this pin to indicate readiness for Sx entry
+// At this stage BIOS should continue with legacy Sx entry steps
+//
+// Input: DispatchHandle - SMI dispatcher handle
+// *DispatchContext - Pointer to the dispatch context
+//
+// Output: Nothing
+//
+// Notes: This function does not need to put the system to sleep. This is
+// handled by PutToSleep.
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+#if defined(PI_SPECIFICATION_VERSION)&&(PI_SPECIFICATION_VERSION>=0x0001000A)&&(CORE_COMBINED_VERSION >= 0x4028B)
+EFI_STATUS TbtGo2SxCallback (
+ IN EFI_HANDLE DispatchHandle,
+ IN CONST VOID *DispatchContext OPTIONAL,
+ IN OUT VOID *CommBuffer OPTIONAL,
+ IN OUT UINTN *CommBufferSize OPTIONAL )
+#else
+VOID TbtGo2SxCallback (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_SX_DISPATCH_CONTEXT *DispatchContext )
+#endif
+{
+ EFI_STATUS Status;
+ UINT8 UpPortBus;
+ UINT8 RegVal8;
+ UINT16 PresenceFlag = 0;
+ UINT8 SlotStatusCapOffset;
+ UINT8 PowerManagerCapOffset;
+#if defined TBT_HR_SX_CHECK && TBT_HR_SX_CHECK == 1
+ UINT32 Attributes;
+ UINTN TbtHRStatusDataSize = sizeof(AMI_TBT_HR_STATUS_DATA);
+ CHAR16 TbtHRStatusVar[] = TBT_HR_STATUS_VARIABLE;
+ EFI_GUID TbtHRStatusGuid = AMI_TBT_HR_STATUS_GUID;
+ AMI_TBT_HR_STATUS_DATA TbtHRStatusData;
+
+ // Double check Thunderbolt Host status
+ SlotStatusCapOffset = PcieFindCapId(gTbtBus, gTbtDev, gTbtFun, EFI_PCI_CAPABILITY_ID_PCIEXP);
+ PresenceFlag = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (SlotStatusCapOffset + 0x1A));
+
+ Status = pRS->GetVariable(TbtHRStatusVar, &TbtHRStatusGuid, &Attributes, &TbtHRStatusDataSize, &TbtHRStatusData);
+ if (!EFI_ERROR(Status)){
+ TRACE((-1, "Thunderbolt Presence bit on PCIE root port%x :%x(Bit06)\n", gTbtFun, PresenceFlag));
+ if (TbtHRStatusData.TbtHRStatus){
+ if ((PresenceFlag & B_PCH_PCIE_SLSTS_PDS) == 0){
+ // Host route status record is active but no device connect actually
+ TbtHRStatusData.TbtHRStatus = 0;
+ //TbtHRStatusData.TbtHRSeries = HostDeviceId;
+ Status = pRS->SetVariable( TbtHRStatusVar, \
+ &TbtHRStatusGuid, \
+ Attributes, \
+ sizeof(AMI_TBT_HR_STATUS_DATA), \
+ &TbtHRStatusData );
+ TRACE((-1, "Host route status record is active but no device connect actually !!!\nReset Thunderbolt Host state %r\n", Status));
+ }
+ } else {
+ if ((PresenceFlag & B_PCH_PCIE_SLSTS_PDS) != 0){
+ // Host route status record is inactive but device connect actually
+ TbtHRStatusData.TbtHRStatus = 1;
+ //TbtHRStatusData.TbtHRSeries = HostDeviceId;
+ Status = pRS->SetVariable( TbtHRStatusVar, \
+ &TbtHRStatusGuid, \
+ Attributes, \
+ sizeof(AMI_TBT_HR_STATUS_DATA), \
+ &TbtHRStatusData );
+ TRACE((-1, "Host route status record is inactive but device connect actually !!!\nReset Thunderbolt Host state %r\n", Status));
+ }
+ } //TbtHRStatus
+ } // !EFI_ERROR(Status)
+#endif
+
+ if (!gTbtWakeupSupport){
+ // System does not support wake from Thunderbolt device
+ if ((HostDeviceId == 0x1547) || (HostDeviceId == 0x1548)){
+ // Sleep entry flow for Cactus Ridge chip
+#if defined TBT_HR_PWR && (TBT_HR_PWR != 0xFF)
+ if (gTbtHandlePOC){
+ Status = PowerOffPOC();
+ TRACE((-1, "TbtSmm.c: Cut off Thunderbolt POC power %r !!!\n", Status));
+ ASSERT_EFI_ERROR(Status);
+ }
+ else
+#endif
+ return SMM_CHILD_DISPATCH_UNSUPPORTED;
+ } else {
+ // Sleep entry flow for Redwood Ridge / Falcon Ridge / BDW-TBT-LP chip
+ // when system doesn't support thunderbolt wake function
+
+ // put PCIE root port power state back to D0
+ PowerManagerCapOffset = PcieFindCapId(gTbtBus, gTbtDev, gTbtFun, EFI_PCI_CAPABILITY_ID_PMI);
+ RegVal8 = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04));
+ RegVal8 &= B_PCH_PCIE_PMCS_PS;
+ SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04)) = RegVal8;
+
+ // BIOS support of Thunderbolt devices Specification Update Revision 1.4
+ // 2.3.2.2 Sx Entry flow for RR Hosts without Thunderbolt wake support
+ UpPortBus = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, PCI_SBUS);
+ if (!TbtSetPCIe2TBTCommand(UpPortBus, 0, TBT_GO2SX_NO_WAKE, 0x8FFFF)){
+ // restore PCIE root port power state back to D3
+ RegVal8 = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04));
+ RegVal8 |= B_PCH_PCIE_PMCS_PS;
+ SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04)) = RegVal8;
+
+ return SMM_CHILD_DISPATCH_NO_MEDIA;
+ }
+
+ // restore PCIE root port power state back to D3
+ RegVal8 = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04));
+ RegVal8 |= B_PCH_PCIE_PMCS_PS;
+ SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04)) = RegVal8;
+ }
+ } else {
+ // System support wake from Thunderbolt device
+ if ((HostDeviceId == 0x1547) || (HostDeviceId == 0x1548)){
+ // BIOS support of Thunderbolt devices Specification Update
+ // Revision 0.85
+ // 5. System power state (Sx) handing
+ // For Cactus Ridge (CR) Host Router component, those GPIO's
+ // should be connected to the following pins:
+ // 1. GPIO_2__GO2SX - active high
+ // 2. GPIO_9__OK2GO2SX_N_OD - active low
+ Status = ActiveTbtGpio2();
+ ASSERT_EFI_ERROR(Status);
+
+ Status = PollTbtGpio9();
+ ASSERT_EFI_ERROR(Status);
+ } else {
+ // Sleep entry flow for Redwood Ridge / Falcon Ridge / BDW-TBT-LP chip
+ // when system support thunderbolt wake function
+ //
+ // Thunderbolt BIOS Implementation guide for Redwood Ridge/Falcon Ridge/BDW-TBT-LP based
+ // devices Specification Update Revision 1.0
+ // 2.2.2.3 Sx Entry Flow for Host with Add-In Card support
+
+#if !defined TBT_HR_SX_CHECK || TBT_HR_SX_CHECK == 0
+ SlotStatusCapOffset = PcieFindCapId(gTbtBus, gTbtDev, gTbtFun, EFI_PCI_CAPABILITY_ID_PCIEXP);
+ PresenceFlag = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (SlotStatusCapOffset + 0x1A));
+#endif
+ if (gTbtAICSupport){
+ if((PresenceFlag & B_PCH_PCIE_SLSTS_PDS) != 0){
+ // put PCIE root port power state back to D0
+ PowerManagerCapOffset = PcieFindCapId(gTbtBus, gTbtDev, gTbtFun, EFI_PCI_CAPABILITY_ID_PMI);
+ RegVal8 = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04));
+ RegVal8 &= B_PCH_PCIE_PMCS_PS;
+ SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04)) = RegVal8;
+
+ // Get Thunderbolt host location
+ UpPortBus = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, PCI_SBUS);
+ if (!TbtSetPCIe2TBTCommand(UpPortBus, 0, TBT_GO2SX_WITH_WAKE, 0x8FFFF)){
+ // restore PCIE root port power state back to D3
+ RegVal8 = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04));
+ RegVal8 |= B_PCH_PCIE_PMCS_PS;
+ SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04)) = RegVal8;
+
+ return SMM_CHILD_DISPATCH_TIMEOUT;
+ }
+
+ // restore PCIE root port power state back to D3
+ RegVal8 = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04));
+ RegVal8 |= B_PCH_PCIE_PMCS_PS;
+ SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, (PowerManagerCapOffset + 0x04)) = RegVal8;
+ }
+ }// end of AIC support
+
+ //
+ // BIOS support of Thunderbolt devices Specification Update Revision 1.4
+ // 2.3.2.1 Sx Entry flow for RR/FR/WR Hosts with Thunderbolt wake support
+
+ //UpPortBus = SmiPci8(0x00, gTbtBus, gTbtDev, gTbtFun, PCI_SBUS);
+ //if (!TbtSetPCIe2TBTCommand(UpPortBus, 0, TBT_GO2SX_WITH_WAKE, 0x8FFFF))
+ // return SMM_CHILD_DISPATCH_NO_MEDIA;
+ }
+ }
+
+ return SMM_CHILD_DISPATCH_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: InSmmFunction
+//
+// Description: Installs TBT SMM Child Dispatcher Handler.
+//
+// Input: ImageHandle - Image handle
+// *SystemTable - Pointer to the system table
+//
+// Output: EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS InSmmFunction (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE SwHandle = NULL;
+ EFI_HANDLE hS1Smi = NULL;
+ EFI_HANDLE hS3Smi = NULL;
+ EFI_HANDLE hS4Smi = NULL;
+ EFI_HANDLE hS5Smi = NULL;
+ EFI_HANDLE hPBSmi = NULL;
+ AMI_SMM_SW_DISPATCH_PROTOCOL *SwDispatch;
+ AMI_SMM_SX_DISPATCH_PROTOCOL *SxDispatch;
+ AMI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL *PowerButton;
+ AMI_SMM_SW_DISPATCH_CONTEXT SwContext;
+ AMI_SMM_SX_DISPATCH_CONTEXT S1DispatchContext = {SxS1, SxEntry};
+ AMI_SMM_SX_DISPATCH_CONTEXT S3DispatchContext = {SxS3, SxEntry};
+ AMI_SMM_SX_DISPATCH_CONTEXT S4DispatchContext = {SxS4, SxEntry};
+ AMI_SMM_SX_DISPATCH_CONTEXT S5DispatchContext = {SxS5, SxEntry};
+#if defined(PI_SPECIFICATION_VERSION)&&(PI_SPECIFICATION_VERSION>=0x0001000A)&&(CORE_COMBINED_VERSION >= 0x4028B)
+ AMI_SMM_POWER_BUTTON_DISPATCH_CONTEXT PwrContext = {EfiPowerButtonEntry};
+#else
+ AMI_SMM_POWER_BUTTON_DISPATCH_CONTEXT PwrContext = {PowerButtonEntry};
+ EFI_SMM_BASE_PROTOCOL *SmmBaseProtocol;
+#endif
+
+#if defined ULT_SUPPORT && ULT_SUPPORT == 1
+ UINT8 Data;
+
+ if (IsULTPchSeries()){
+ // Enable Thunderbolt Hotplug Pin SCI route for ULT platform
+ Data = IoRead8(GPIO_BASE_ADDRESS + R_PCH_LP_LPC_GPI_ROUT0 + gTbtHotPlugEvent/8);
+ Data = Data & ~(BIT00 << (gTbtHotPlugEvent%8));
+ IoWrite8(GPIO_BASE_ADDRESS + R_PCH_LP_LPC_GPI_ROUT0 + gTbtHotPlugEvent/8, Data);
+ }
+ else{
+ // Enable Thunderbolt Hotplug Pin SCI route
+ SmiPci8Or( 0x00, 0x00, PCI_DEVICE_NUMBER_PCH_LPC, PCI_FUNCTION_NUMBER_PCH_LPC, (R_PCH_LPC_GPI_ROUT + gTbtHotPlugEvent/4), (0x2 << (gTbtHotPlugEvent%4)*2) );
+ }
+#else
+ // Enable Thunderbolt Hotplug Pin SCI route
+ SmiPci8Or( 0x00, 0x00, PCI_DEVICE_NUMBER_PCH_LPC, PCI_FUNCTION_NUMBER_PCH_LPC, (R_PCH_LPC_GPI_ROUT + gTbtHotPlugEvent/4), (0x2 << (gTbtHotPlugEvent%4)*2) );
+#endif
+
+ // Presence Detect Changed Enable
+ SmiPci8Or( 0x00, gTbtBus, gTbtDev, gTbtFun, R_PCH_PCIE_SLCTL, 0x08);
+
+#if defined(PI_SPECIFICATION_VERSION)&&(PI_SPECIFICATION_VERSION>=0x0001000A)&&(CORE_COMBINED_VERSION >= 0x4028B)
+
+ Status = pSmst2->SmmLocateProtocol( &gEfiSmmSwDispatch2ProtocolGuid, \
+ NULL, \
+ &SwDispatch );
+ if (EFI_ERROR(Status)) return Status;
+
+ Status = pSmst2->SmmLocateProtocol( &gEfiSmmSxDispatch2ProtocolGuid , \
+ NULL, \
+ &SxDispatch );
+ if (EFI_ERROR(Status)) return Status;
+
+ Status = pSmst2->SmmLocateProtocol( &gEfiSmmPowerButtonDispatch2ProtocolGuid, \
+ NULL, \
+ &PowerButton );
+ if (EFI_ERROR(Status)) return Status;
+#else
+ Status = pBS->LocateProtocol( &gEfiSmmBaseProtocolGuid, \
+ NULL, \
+ &SmmBaseProtocol );
+ if (EFI_ERROR(Status)) return Status;
+
+ Status = pBS->LocateProtocol( &gEfiSmmSwDispatchProtocolGuid, \
+ NULL, \
+ &SwDispatch );
+ if (EFI_ERROR(Status)) return Status;
+
+ Status = pBS->LocateProtocol( &gEfiSmmSxDispatchProtocolGuid, \
+ NULL, \
+ &SxDispatch );
+ if (EFI_ERROR(Status)) return Status;
+
+ Status = pBS->LocateProtocol( &gEfiSmmPowerButtonDispatchProtocolGuid,
+ NULL,
+ &PowerButton);
+ if (EFI_ERROR(Status)) return Status;
+#endif
+
+ SwContext.SwSmiInputValue = TBT_SWSMI_VALUE;
+ Status = SwDispatch->Register (
+ SwDispatch,
+ ThunderboltSwSmiCallback,
+ &SwContext,
+ &SwHandle );
+ if (EFI_ERROR(Status)) return Status;
+
+ if (gTbtEnable == FALSE){
+ TRACE((-1, "TbtSmm.c: Thunderbolt function is disable in Setup.\n"));
+ TRACE((-1, "TbtSmm.c: Only register Tbt SwSMI for debug.\n"));
+ return EFI_SUCCESS;
+ }
+
+ Status = SxDispatch->Register(
+ SxDispatch, \
+ TbtGo2SxCallback, \
+ &S3DispatchContext, \
+ &hS3Smi );
+ if (EFI_ERROR(Status)) return Status;
+
+ Status = SxDispatch->Register(
+ SxDispatch, \
+ TbtGo2SxCallback, \
+ &S4DispatchContext, \
+ &hS4Smi );
+ if (EFI_ERROR(Status)) return Status;
+
+ Status = SxDispatch->Register(
+ SxDispatch, \
+ TbtGo2SxCallback, \
+ &S5DispatchContext, \
+ &hS5Smi );
+ if (EFI_ERROR(Status)) return Status;
+
+ Status = PowerButton->Register(
+ PowerButton,
+ TbtPowerButtonCallback,
+ &PwrContext,
+ &hPBSmi );
+ if (EFI_ERROR(Status)) return Status;
+
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: TbtSmm_Init
+//
+// Description: Installs TBT SMM Child Dispatcher Handler.
+//
+// Input: ImageHandle - Image handle
+// *SystemTable - Pointer to the system table
+//
+// Output: EFI_STATUS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS TbtSmm_Init (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_GUID AmiTbtPlatformPolicyGuid = AMI_TBT_PLATFROM_POLICY_PROTOCOL_GUID;
+ BOOLEAN InSmram = FALSE;
+ AMI_TBT_PLATFORM_POLICY_PROTOCOL *AmiTbtPlatformPolicy = NULL;
+ UINTN HRStatusSize = sizeof(AMI_TBT_HR_STATUS_DATA);
+ CHAR16 TbtHRStatusVar[] = TBT_HR_STATUS_VARIABLE;
+ AMI_TBT_HR_STATUS_DATA HRStatusData;
+
+ InitAmiLib(ImageHandle, SystemTable);
+
+ Status = pBS->LocateProtocol( \
+ &AmiTbtPlatformPolicyGuid, \
+ NULL, \
+ &AmiTbtPlatformPolicy );
+
+ if (!EFI_ERROR(Status)) {
+ gCacheLineSize = AmiTbtPlatformPolicy->CacheLineSize;
+ gTbtBus = AmiTbtPlatformPolicy->Bus;
+ gTbtDev = AmiTbtPlatformPolicy->Dev;
+ gTbtFun = AmiTbtPlatformPolicy->Fun;
+ gReserveMemoryPerSlot = AmiTbtPlatformPolicy->ReserveMemoryPerSlot;
+ gReservePMemoryPerSlot = AmiTbtPlatformPolicy->ReservePMemoryPerSlot;
+ gReserveIOPerSlot = AmiTbtPlatformPolicy->ReserveIOPerSlot;
+ if (AmiTbtPlatformPolicy->TbtWakeupSupport)
+ gTbtWakeupSupport = TRUE;
+ if (AmiTbtPlatformPolicy->TbtAICSupport)
+ gTbtAICSupport = TRUE;
+ if (AmiTbtPlatformPolicy->TbtHandlePOC)
+ gTbtHandlePOC = TRUE;
+ gTbtHotPlugEvent = AmiTbtPlatformPolicy->TbtHotPlugEvt;
+ if (AmiTbtPlatformPolicy->TbtIOresourceEnable)
+ gTbtIOresourceEnable = TRUE;
+ gTbtNVMversion = AmiTbtPlatformPolicy->TbtNVMversion;
+ if (AmiTbtPlatformPolicy->TbtEnable)
+ gTbtEnable = TRUE;
+
+ // Convert slot resource to register format
+ gReserveMemoryPerSlot <<= 4;
+ gReservePMemoryPerSlot <<= 4;
+ gReserveIOPerSlot <<= 2;
+ TRACE((-1, "TbtSmm.c: gReserveMemoryPerSlot = %x\n", gReserveMemoryPerSlot));
+ TRACE((-1, "TbtSmm.c: gReservePMemoryPerSlot = %x\n", gReservePMemoryPerSlot));
+ TRACE((-1, "TbtSmm.c: gReserveIOPerSlot = %x\n", gReserveIOPerSlot));
+ }
+
+ // Init Tbt Host Information in SMM RAM
+ Status = pRS->GetVariable( L"TbtHRStatusVar", \
+ &TbtHRStatusGuid, \
+ &AmiTbtHrStatusAttribute, \
+ &HRStatusSize, \
+ &HRStatusData );
+ if (!EFI_ERROR(Status)){
+ if (HRStatusData.TbtHRSeries == Cactus_Ridge) HostDeviceId = 0x1548;
+ else if (HRStatusData.TbtHRSeries == Redwood_Ridge) HostDeviceId = 0x1567;
+ else if (HRStatusData.TbtHRSeries == Falcon_Ridge) HostDeviceId = 0x156B;
+ else HostDeviceId = 0x157E;
+ }
+
+#if defined(PI_SPECIFICATION_VERSION)&&(PI_SPECIFICATION_VERSION>=0x0001000A)&&(CORE_COMBINED_VERSION >= 0x4028B)
+ Status = pBS->LocateProtocol( \
+ &gEfiSmmBase2ProtocolGuid, \
+ NULL, \
+ &gSmmBase2 );
+
+ if (!EFI_ERROR(Status))
+ {
+ Status = gSmmBase2->InSmm(gSmmBase2, &InSmram);
+ if ((!EFI_ERROR(Status)) &&
+ (InSmram))
+ {
+ Status = InitAmiSmmLib( ImageHandle, SystemTable );
+ if (EFI_ERROR(Status))
+ return Status;
+
+ Status = gSmmBase2->GetSmstLocation(gSmmBase2, &pSmst2);
+ if (!EFI_ERROR(Status))
+ {
+ Status = InSmmFunction(ImageHandle, SystemTable);
+ return Status;
+ }
+ else
+ {
+ pSmst2 = NULL;
+ }
+ }
+ else
+ {
+ // DXE initialize.
+ }
+ }
+
+ return EFI_SUCCESS;
+#else
+ return InitSmmHandler(ImageHandle, SystemTable, InSmmFunction, NULL);
+#endif
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2014, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtSmm/TbtSmm.cif b/Board/EM/Thunderbolt/TbtSmm/TbtSmm.cif
new file mode 100644
index 0000000..92a02d4
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtSmm/TbtSmm.cif
@@ -0,0 +1,11 @@
+<component>
+ name = "TbtSmm"
+ category = ModulePart
+ LocalRoot = "Board\EM\Thunderbolt\TbtSmm\"
+ RefName = "TbtSmm"
+[files]
+"TbtSmm.sdl"
+"TbtSmm.mak"
+"TbtSmm.c"
+"TbtSmm.dxs"
+<endComponent>
diff --git a/Board/EM/Thunderbolt/TbtSmm/TbtSmm.dxs b/Board/EM/Thunderbolt/TbtSmm/TbtSmm.dxs
new file mode 100644
index 0000000..36857a6
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtSmm/TbtSmm.dxs
@@ -0,0 +1,83 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtSmm/TbtSmm.dxs 1 1/10/13 4:56a Barretlin $
+//
+// $Revision: 1 $
+//
+// $Date: 1/10/13 4:56a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtSmm/TbtSmm.dxs $
+//
+// 1 1/10/13 4:56a Barretlin
+// Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+// Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+//
+// 4 9/03/12 6:27a Barretlin
+// [TAG] EIP N/A
+// [Category] Improvement
+// [Description] Change driver type and dependence for SharkBay platform
+// [Files] TbtSmm.mak TbtSmm.c TbtSmm.dxs
+//
+// 3 6/12/12 11:30p Barretlin
+// [TAG] None
+// [Category] Improvement
+// [Description] fix programming error
+// [Files] TbtSmm.dxs
+//
+// 2 12/22/11 9:15a Wesleychen
+// Included "token.h".
+//
+// 1 12/08/11 4:09a Wesleychen
+// Thunderbolt eModule initially releases.
+//
+//**********************************************************************
+#include <token.h>
+
+#if defined(PI_SPECIFICATION_VERSION)&&(PI_SPECIFICATION_VERSION>=0x0001000A)&&(CORE_COMBINED_VERSION >= 0x4028B)
+#include <Protocol\SmmBase2.h>
+#include <Protocol\SmmSwDispatch2.h>
+#include <Protocol\SmmSxDispatch2.h>
+#else
+#include <Protocol\SmmSwDispatch.h>
+#include <Protocol\SmmSxDispatch.h>
+#endif
+#include <TbtOemBoard.h>
+
+DEPENDENCY_START
+#if defined(PI_SPECIFICATION_VERSION)&&(PI_SPECIFICATION_VERSION>=0x0001000A)&&(CORE_COMBINED_VERSION >= 0x4028B)
+ EFI_SMM_BASE2_PROTOCOL_GUID AND
+ EFI_SMM_SW_DISPATCH2_PROTOCOL_GUID AND
+ EFI_SMM_SX_DISPATCH2_PROTOCOL_GUID AND
+#else
+ EFI_SMM_SW_DISPATCH_PROTOCOL_GUID AND
+ EFI_SMM_SX_DISPATCH_PROTOCOL_GUID AND
+#endif
+ AMI_TBT_PLATFROM_POLICY_PROTOCOL_GUID
+DEPENDENCY_END
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/EM/Thunderbolt/TbtSmm/TbtSmm.mak b/Board/EM/Thunderbolt/TbtSmm/TbtSmm.mak
new file mode 100644
index 0000000..ec271c9
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtSmm/TbtSmm.mak
@@ -0,0 +1,113 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtSmm/TbtSmm.mak 3 6/21/13 7:44a Barretlin $
+#
+# $Revision: 3 $
+#
+# $Date: 6/21/13 7:44a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtSmm/TbtSmm.mak $
+#
+# 3 6/21/13 7:44a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Fix build error with non Intel RC project
+# [Files] TbtSmm.mak
+#
+# 2 6/13/13 11:36p Barretlin
+# [TAG] EIP None
+# [Category] Improvement
+# [Description] change obj file name to avoid ambiguous
+# [Files] TbtSmm.mak
+#
+# 1 1/10/13 4:56a Barretlin
+# Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+# Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+#
+# 3 10/04/12 11:53a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Use global definition for genernic
+# [Files] TbtSmm.c TbtSmm.mak
+#
+# 2 9/03/12 6:27a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Change driver type and dependence for SharkBay platform
+# [Files] TbtSmm.mak TbtSmm.c TbtSmm.dxs
+#
+# 1 12/08/11 4:09a Wesleychen
+# Thunderbolt eModule initially releases.
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: TbtSmm.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all : TbtSmm
+
+TbtSmm: $(BUILD_DIR)\TbtSmm.mak TbtSmmBin
+
+TBT_SMM_OBJECTS = \
+!IF $(TBT_INTEL_RC_CONFIG) == 1
+$(BUILD_SB_BOARD_DIR)\GetSetupData.obj \
+!ENDIF
+$(BUILD_DIR)\$(TbtSmm_DIR)\TbtSmm.obj
+
+$(BUILD_DIR)\TbtSmm.mak : $(TbtSmm_DIR)\TbtSmm.cif $(TbtSmm_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(TbtSmm_DIR)\TbtSmm.cif $(CIF2MAK_DEFAULTS)
+
+TbtSmm_INCLUDES=\
+ $(TBT_OEMBOARD_INCLUDES)\
+!IF $(TBT_INTEL_RC_CONFIG) == 1
+ $(INTEL_PCH_INCLUDES)\
+!ENDIF
+
+TbtSmmBin : $(AMIDXELIB) $(AMICSPLib)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\TbtSmm.mak all\
+ "CFLAGS=$(CFLAGS)"\
+ OBJECTS="$(TBT_SMM_OBJECTS)" \
+ GUID=B7D9F0D7-EBDB-4EE4-AB77-B30C4B9093CC\
+ ENTRY_POINT=TbtSmm_Init\
+ "MY_INCLUDES=$(TbtSmm_INCLUDES)"\
+!IF $(PI_SPECIFICATION_VERSION) >= 0x1000A && $(CORE_COMBINED_VERSION) >= 0x4028B
+ TYPE=DXESMM_DRIVER PE_TYPE=RT_DRIVER \
+ DEPEX1=$(TbtSmm_DIR)\TbtSmm.DXS DEPEX1_TYPE=EFI_SECTION_SMM_DEPEX \
+ DEPEX2=$(TbtSmm_DIR)\TbtSmm.DXS DEPEX2_TYPE=EFI_SECTION_DXE_DEPEX \
+!ELSE
+ TYPE=BS_DRIVER \
+ DEPEX1=$(TbtSmm_DIR)\TbtSmm.DXS DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+!ENDIF
+ COMPRESS=1
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Thunderbolt/TbtSmm/TbtSmm.sdl b/Board/EM/Thunderbolt/TbtSmm/TbtSmm.sdl
new file mode 100644
index 0000000..c4f98b1
--- /dev/null
+++ b/Board/EM/Thunderbolt/TbtSmm/TbtSmm.sdl
@@ -0,0 +1,120 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/Thunderbolt/TbtSmm/TbtSmm.sdl 2 12/25/13 6:06a Barretlin $
+#
+# $Revision: 2 $
+#
+# $Date: 12/25/13 6:06a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Thunderbolt/TbtSmm/TbtSmm.sdl $
+#
+# 2 12/25/13 6:06a Barretlin
+# [TAG] EIP N/A
+# [Category] Improvement
+# [Description] Using token to enable/disable double check TBT host
+# router state in SxSMI/PowerButtonSMI
+# [Files] TbtSmm.sdl TbtSmm.c
+#
+# 1 1/10/13 4:56a Barretlin
+# Change SS path and update module for Thunderbolt Spec 1.6 for Cactus
+# Ridge chip and Thunderbolt Spec 0.5 for Redwood Ridge chip
+#
+# 3 5/07/12 6:44a Barretlin
+# [TAG] None
+# [Category] Improvement
+# [Description] Change SwSMI value avoiding conflict
+# [Files] TbtSmm.sdl
+#
+# 2 2/20/12 4:45a Wesleychen
+# Add new SDL token "TBT_SWSMI_DELAY" for debug.
+#
+# 1 12/08/11 4:09a Wesleychen
+# Thunderbolt eModule initially releases.
+#
+#*************************************************************************
+TOKEN
+ Name = TbtSmm_SUPPORT
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Help = "Main switch to enable TbtSmm support in Project"
+End
+
+TOKEN
+ Name = "TBT_SWSMI_VALUE"
+ Value = "0xBC"
+ Help = "Thunderbolt SWSMI value"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBSW"
+ Value = "$(TBT_SWSMI_VALUE)"
+ Help = "Thunderbolt SWSMI value"
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "TBT_HR_SX_CHECK"
+ Value = "0"
+ Help = "Double check Thunderbolt host router status in SxSMI/PowerButton SMI"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+MODULE
+ Help = "Includes TbtSmm.mak to Project"
+ File = "TbtSmm.mak"
+End
+
+PATH
+ Name = "TbtSmm_DIR"
+End
+
+ELINK
+ Name = "/I$(TbtSmm_DIR)"
+ Parent = "TBT_SMM_INCLUDES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "TBT_SMM_INCLUDES"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\TbtSmm.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2012, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/EM/Thunderbolt/Thunderbolt.cif b/Board/EM/Thunderbolt/Thunderbolt.cif
new file mode 100644
index 0000000..afe5c07
--- /dev/null
+++ b/Board/EM/Thunderbolt/Thunderbolt.cif
@@ -0,0 +1,14 @@
+<component>
+ name = "Thunderbolt"
+ category = eModule
+ LocalRoot = "Board\EM\Thunderbolt\"
+ RefName = "Thunderbolt"
+[files]
+"Thunderbolt.sdl"
+"ReleaseNotes.chm"
+[parts]
+"TbtPei"
+"TbtDxe"
+"TbtSmm"
+"TbtOemBoard"
+<endComponent>
diff --git a/Board/EM/Thunderbolt/Thunderbolt.sdl b/Board/EM/Thunderbolt/Thunderbolt.sdl
new file mode 100644
index 0000000..2d7c45c
--- /dev/null
+++ b/Board/EM/Thunderbolt/Thunderbolt.sdl
@@ -0,0 +1,116 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+TOKEN
+ Name = "Thunderbolt_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable Thunderbolt support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+ Token = "HOTPLUG_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "Thunderbolt_CR_VERSION"
+ Value = "16"
+ Help = "Thunderbolt Spec Version for Cactus Ridge chip."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "Thunderbolt_RR_VERSION"
+ Value = "10"
+ Help = "Thunderbolt Spec Version for Redwood Ridge chip."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "Thunderbolt_FR_VERSION"
+ Value = "11"
+ Help = "Thunderbolt Spec Version for Falcon Ridge chip."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "Thunderbolt_WR_VERSION"
+ Value = "10"
+ Help = "Thunderbolt Spec Version for BDW-TBT-LP chip."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "TBT_RC_VERSION"
+ Value = "19"
+ Help = "Thunderbolt RC Version."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "TBT_INTEL_RC_CONFIG"
+ Value = "1"
+ Help = "If set, it means PCH and ACPI platform modules are using Intel RC"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+PATH
+ Name = "Thunderbolt_DIR"
+End
+
+ELINK
+ Name = "TBT_INCLUDES"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "/I$(Thunderbolt_DIR)"
+ Parent = "TBT_INCLUDES"
+ InvokeOrder = AfterParent
+End
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/EM/usb/amiusb.cif b/Board/EM/usb/amiusb.cif
new file mode 100644
index 0000000..bd02ab2
--- /dev/null
+++ b/Board/EM/usb/amiusb.cif
@@ -0,0 +1,19 @@
+<component>
+ name = "USB"
+ category = eModule
+ LocalRoot = "board\em\usb\"
+ RefName = "USB"
+[files]
+"usb.sdl"
+"usbport.c"
+"usb.chm"
+[parts]
+"USBRT"
+"UHCD"
+"FRAMEWORK"
+"AmiUSBProtocols"
+"USB_SETUP"
+"USB_LEGACY"
+"USB_SB"
+"AmiUsbLib"
+<endComponent>
diff --git a/Board/EM/usb/usb.chm b/Board/EM/usb/usb.chm
new file mode 100644
index 0000000..46593a3
--- /dev/null
+++ b/Board/EM/usb/usb.chm
Binary files differ
diff --git a/Board/EM/usb/usb.sdl b/Board/EM/usb/usb.sdl
new file mode 100644
index 0000000..bedc7e5
--- /dev/null
+++ b/Board/EM/usb/usb.sdl
@@ -0,0 +1,481 @@
+TOKEN
+ Name = "AMIUSB_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable AMI USB support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "USB_DRIVER_MAJOR_VER"
+ Value = "8"
+ Help = "USB driver major version"
+ TokenType = Integer
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "USB_DRIVER_MINOR_VER"
+ Value = "10"
+ Help = "USB driver minor version"
+ TokenType = Integer
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "USB_DRIVER_BUILD_VER"
+ Value = "36"
+ Help = "USB driver build version"
+ TokenType = Integer
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "UHCI_SUPPORT"
+ Value = "1"
+ Help = "Enable/Disable UHCI controller(s)."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "OHCI_SUPPORT"
+ Value = "1"
+ Help = "Enable/Disable OHCI controller(s)"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "EHCI_SUPPORT"
+ Value = "1"
+ Help = "Enable/Disable EHCI controller(s)"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "XHCI_SUPPORT"
+ Value = "1"
+ Help = "Enable/Disable xHCI controller(s)"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "USB_HOTPLUG_FDD"
+ Value = "0"
+ Help = "Includes the support for USB hot plug floppy drive."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "USB_HOTPLUG_HDD"
+ Value = "0"
+ Help = "Includes the support for USB hot plug hard drive."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "USB_HOTPLUG_CDROM"
+ Value = "0"
+ Help = "Includes the support for USB hot plug CD-ROM drive."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "HIDE_USB_SUPPORT_SETUP_QUESTION"
+ Value = "1"
+ Help = "This setup item is for debug only. Switch to Hide/Un-hide USB Support setup question."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "USB_LEGACY_PLATFORM_SUPPORT"
+ Value = "1"
+ Help = "Includes the USB Legacy options and keypress monitor implementation."
+ TokenType = Boolean
+ TargetH = Yes
+ Token = "KEYMONFILTER_SUPPORT" "!=" "0"
+End
+
+TOKEN
+ Name = "KBC_EMULATION_8MSTD_OVERRIDE"
+ Value = "25"
+ Help = "This token is designed to work around the problems for the projects that have the actual KBC hardware enabled and at the same time enable KBC emulation.\For these projects there is a high probability of racing conditions between IRQ1 handler and USB keyboard SMI handler. It was found the problem could be solved by 'slowing down' the 8ms TD schedule.\By default 8ms is changed to 25ms. This change may depend on the execution time of SMI dispatcher (number of SMI handlers, size of SMI code, cachability of SMM area, etc.)."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "8..64"
+End
+
+TOKEN
+ Name = "KEY_REPEAT_DELAY"
+ Value = "2"
+ Help = "This value is for the offset of the aTypematicRateDelayTable. aTypematicRateDelayTable is based on 8ms periodic interrupt. If the periodic interrupt is more than 8ms , modify this token for the proper delay between KeyRepeat action. To calculate the delay between Key repeat action PeriodicTime Interrupt Interval * aTypematicRateDelayTable[KEY_REPEAT_DELAY]"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..3"
+End
+
+TOKEN
+ Name = "KEY_REPEAT_INITIAL_DELAY"
+ Value = "6"
+ Help = "This value is for the offset of the aTypematicRateDelayTable. aTypematicRateDelayTable is based on 8ms periodic interrupt. If the periodic interrupt is more than 8ms , modify this token for the proper initial delay for KeyRepeat action.To calculate the initial delay for the Key repeat action PeriodicTime Interrupt Interval * aTypematicRateDelayTable[KEY_REPEAT_INITIAL_DELAY]"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "4..7"
+End
+
+TOKEN
+ Name = "USB_KEYREPEAT_INTERVAL"
+ Value = "0"
+ Help = "0-Use default key repeat interval 8ms. 1-Use key repeat interval 16ms."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "USB_EHCI_HANDOFF_SUPPORT"
+ Value = "1"
+ Help = "Switch to enable EHCI hand-off"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "XHCI_EVENT_SERVICE_MODE"
+ Value = "0"
+ Help = "This token controlls xHCI event service mode.\0 - Use periodic timer SMI.\1 - Use xHCI hardware SMI.\2 - Both periodic timer SMI and se xHCI hardware SMI."
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0..2"
+End
+
+TOKEN
+ Name = "USB_XHCI_EXT_HW_SMI_PINS"
+ Value = "255"
+ Help = "List of xHCI GPI bit offset in the following format: GPI0, GPI1,...,GPIN.\Use 0xFF (255) to ignore the settings."
+ TokenType = Expression
+ TargetH = Yes
+ Range = "0..31"
+ Token = "XHCI_EVENT_SERVICE_MODE" "!=" "0"
+End
+
+TOKEN
+ Name = "USB_S5_WAKEUP_SUPPORT"
+ Value = "0"
+ Help = "Support USB S5 wakeup function."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "USB_DIFFERENTIATE_IDENTICAL_DEVICE_NAME"
+ Value = "0"
+ Help = "If enabled the USB Device name string is prefixed with U1-,U2-... for each USB device to differentiate the Devices with same Device name Strings."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "USB_BAD_DEVICES"
+ Help = "List the non-compliant USB devices, please refer to the gUsbBadDeviceTable in usbport.c."
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "HIDE_USB_HISPEED_SUPPORT_SETUP_QUESTION"
+ Value = "1"
+ Help = "Switch to Hide/Un-hide USB HiSpeed Support setup question."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_USB_EMUL6064_OPTION"
+ Value = "1"
+ Help = "Default value of the I/O port 60h/64h emulation support option"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "USB_RUNTIME_DRIVER_IN_SMM"
+ Value = "1"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "EXTERNAL_USB_CONTROLLER_SUPPORT"
+ Value = "1"
+ Help = "Support external USB controllers."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "USB_OHCI_HANDOFF_SUPPORT"
+ Value = "0"
+ Help = "Switch to enable OHCI hand-off workaround"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "USB_CONTROLLERS_WITH_RMH"
+ Help = "List of USB controllers that have integrated USB 2.0 Rate Matching Hubs (RMH) in the following format: {vid1, did1}, {vid2, did2}"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "HIDE_USB_XHCI_LEGACY_SUPPORT_SETUP_QUESTION"
+ Value = "1"
+ Help = "This setup item is for debug only. Switch to Hide/Un-hide USB XHCI Legacy Support setup question."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "USB_SETUP_VARIABLE_RUNTIME_ACCESS"
+ Value = "0"
+ Help = "Set Runtime attribute for the setup variables used by USB driver."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "USB_CONTROLLERS_INITIAL_DELAY_LIST"
+ Help = "List of USB controllers which need to delay for stabilization in the following format: {vid1, did1, delay time1(ms)}, {vid2, did2, delay time2(ms)}"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DEFAULT_XHCI_HANDOFF_OPTION"
+ Value = "1"
+ Help = "Default value of the XHCI Hand-off option."
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "USB_STORAGE_DEVICE_RMB_CHECK"
+ Value = "1"
+ Help = "RMB bit returned by inquiry command indicate whether device media is removable.\Off: Always set mass storage devices RemovableMedia.\On: Check RMB status from inquiry data. \"
+ TokenType = Boolean
+ TargetH = Yes
+End
+
+PATH
+ Name = "USBPORTING_DIR"
+End
+
+PATH
+ Name = "UHCD_DIR"
+ Path = "core\em\usb"
+End
+
+PATH
+ Name = "USBRT_DIR"
+ Path = "core\em\usb\rt"
+ Help = "AMI USB runtime files source directory"
+End
+
+PATH
+ Name = "USB_SETUP_DIR"
+ Path = "core\em\usb\setup"
+End
+
+PATH
+ Name = "USB_SB_DIR"
+ Path = "chipset\sb\usb"
+End
+
+MODULE
+ Help = "Includes uhcd.mak into project"
+ Path = "$(UHCD_DIR)"
+ File = "uhcd.mak"
+End
+
+MODULE
+ Help = "Includes usbrt.mak into project"
+ Path = "$(USBRT_DIR)"
+ File = "usbrt.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\usb.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 30
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(USB_SETUP_DIR)\usb.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 30
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\uhcd.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\usbrt.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "InitUSBStrings,"
+ Parent = "SetupStringInit"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "UsbAcpiEnableCallBack,"
+ Parent = "AcpiEnableCallbackList"
+ Token = "USB_RUNTIME_DRIVER_IN_SMM" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "USB_DEV_DELAYED_DRIVER_LIST"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "USB_DEV_DRIVER_LIST"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "USB_DEV_EFI_DRIVER_LIST"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "USBHIDFillDriverEntries,"
+ Parent = "USB_DEV_DELAYED_DRIVER_LIST"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "USBMassFillDriverEntries,"
+ Parent = "USB_DEV_DELAYED_DRIVER_LIST"
+ Token = "USB_DEV_MASS" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "USBCCIDFillDriverEntries,"
+ Parent = "USB_DEV_DELAYED_DRIVER_LIST"
+ Token = "USB_DEV_CCID" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "USBHubFillDriverEntries,"
+ Parent = "USB_DEV_DRIVER_LIST"
+ Token = "USB_DEV_HUB" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "BusFillDriverEntries,"
+ Parent = "USB_DEV_DRIVER_LIST"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "USBHIDFillDriverEntries,"
+ Parent = "USB_DEV_DRIVER_LIST"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "USBMassFillDriverEntries,"
+ Parent = "USB_DEV_DRIVER_LIST"
+ Token = "USB_DEV_MASS" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "USBCCIDFillDriverEntries,"
+ Parent = "USB_DEV_DRIVER_LIST"
+ Token = "USB_DEV_CCID" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "UsbBusInit,"
+ Parent = "USB_DEV_EFI_DRIVER_LIST"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "UsbHidInit,"
+ Parent = "USB_DEV_EFI_DRIVER_LIST"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "UsbMassInit,"
+ Parent = "USB_DEV_EFI_DRIVER_LIST"
+ Token = "USB_DEV_MASS" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "UsbCCIDInit,"
+ Parent = "USB_DEV_EFI_DRIVER_LIST"
+ Token = "USB_DEV_CCID" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "CheckKeyBoardBufferForSpecialChars"
+ Help = "This is a list of OEM KBD routines that consumes KBD buffer to handle some input chanracters differently. \The child eLink can be in following format:Functionname(DEV_INFO fpDevInfo, UINT8 *fpBuffer)"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(ADVANCED_FORM_SET_CLASS, 0, USB_DEVICES_ENABLED_REFRESH_KEY, UpdateUSBStrings),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "{{ 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }, {'U','s','b','M','a','s','s','D','e','v','N','u','m'}},"
+ Parent = "AMITSE_DYNAMICPARSING_HANDLE_SUPPRESS_LIST"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "{{ 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }, {'U','s','b','M','a','s','s','D','e','v','V','a','l','i','d'}},"
+ Parent = "AMITSE_DYNAMICPARSING_HANDLE_SUPPRESS_LIST"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "{{ 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 }, {'U','s','b','S','u','p','p','o','r','t'}},"
+ Parent = "AMITSE_DYNAMICPARSING_HANDLE_SUPPRESS_LIST"
+ InvokeOrder = AfterParent
+End \ No newline at end of file
diff --git a/Board/EM/usb/usbport.c b/Board/EM/usb/usbport.c
new file mode 100644
index 0000000..027332f
--- /dev/null
+++ b/Board/EM/usb/usbport.c
@@ -0,0 +1,1444 @@
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2016, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************
+
+//****************************************************************************
+// $Header: /Alaska/SOURCE/Modules/USB/ALASKA/usbport.c 80 10/28/16 3:57a Wilsonlee $
+//
+// $Revision: 80 $
+//
+// $Date: 10/28/16 3:57a $
+//
+//****************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/USB/ALASKA/usbport.c $
+//
+// 80 10/28/16 3:57a Wilsonlee
+// [TAG] EIP300142
+// [Category] Improvement
+// [Description] Remove USB Int1C module part because we use the other
+// method to service xhci.
+// [Files] usbport.c, amidef.h, amiusbhc.c, UsbLegacy.cif
+//
+// 79 10/28/16 1:28a Wilsonlee
+// [TAG] EIP300142
+// [Category] Improvement
+// [Description] Get vector value from memory 0x1c directly and check
+// it's not zero.
+// [Files] usbport.c, amidef.h
+//
+// 78 2/18/16 10:05p Wilsonlee
+// [TAG] EIP256089
+// [Category] Improvement
+// [Description] Add {0, 0, 0, 0, 0, 0} for the end of USB_SKIP_LIST
+// structure in UsbGetSkipList function.
+// [Files] usbport.c
+//
+// 77 2/16/15 2:43a Wilsonlee
+// [TAG] EIP205373
+// [Category] Improvement
+// [Description] Cppcheck errors in Usb module.
+// [Files] usb.c, usbport.c, uhcd.c, usbCCID.c
+//
+// 76 12/24/14 10:41p Wilsonlee
+// [TAG] EIP196287
+// [Category] Improvement
+// [Description] Display info of connected usb controllers and remove or
+// grayed-out some item according the connected usb controller number.
+// [Files] uhcd.c, usbport.c, usb.uni, usb.sd, usbsetup.c,
+// AmiUsbController.h, UsbPolicy.h
+//
+// 75 11/24/14 12:13a Wilsonlee
+// [TAG] EIP188680
+// [Category] Improvement
+// [Description] Add Genovation USB Mini-Terminal Model #904-RJ to
+// UsbBadDeviceTable.
+// [Files] usbport.c
+//
+// 74 9/23/14 11:52p Wilsonlee
+// [TAG] EIP185391
+// [Category] Improvement
+// [Description] Use 0xF to mask the port number for
+// SKIP_FLAG_SKIP_MULTI_LEVEL function.
+// [Files] usbport.c
+//
+// 73 8/06/14 10:06p Wilsonlee
+// [TAG] EIP180650
+// [Category] Improvement
+// [Description] Hide mass storage devices if "Usb Support" is disable.
+// [Files] usbport.c, uhcd.c
+//
+// 72 6/26/14 1:12a Wilsonlee
+// [TAG] EIP173387
+// [Category] Improvement
+// [Description] Remove TODO comments.
+// [Files] usbsetup.c, xhci.c, usbmass.c, usbCCID.c, usb.c, uhci.c,
+// syskbc.c, usbport.c, usbbus.c, uhcd.c, UsbBotPeim.c, PeiXhci.c,
+// PeiEhci.c
+//
+// 71 6/11/14 8:22p Wilsonlee
+// [TAG] EIP172625
+// [Category] Improvement
+// [Description] Usb skip table function adds the flag
+// "SKIP_FLAG_SKIP_MULTI_LEVEL" that skips usb ports include down stream
+// ports.
+// [Files] usbport.c, AmiUsbController.h
+//
+// 70 5/07/14 10:38a Wilsonlee
+// [TAG] EIP166594
+// [Category] Improvement
+// [Description] Add the token "USB_SETUP_VARIABLE_RUNTIME_ACCESS" to
+// control if we set runtime attribute for the setup variables used by USB
+// module.
+// [Files] usb.sdl, usbport.c, usbsetup.c
+//
+// 69 7/03/13 4:06a Roberthsu
+// [TAG] EIP127455
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] Skip table can not skip device
+// [RootCause] Because xhci root port over than 0xf.
+// [Solution] Check root port use another variable.
+// [Files] usbport.c
+//
+// 68 6/26/13 3:37a Roberthsu
+// [TAG] EIP125792
+// [Category] Bug Fix
+// [Severity:] Normal
+// [Symptom:] Keep function not work
+// [Root Cause] When check port change. We can not get baseclass.
+// [Solution] Add Vaild base class flag.
+// [Files] UsbPort.c,Usb.c
+//
+// 67 3/19/13 3:54a Ryanchou
+// [TAG] EIP118177
+// [Category] Improvement
+// [Description] Dynamically allocate HCStrucTable at runtime.
+// [Files] usb.sdl, usbport.c, usbsb.c, amiusb.c, ehci.c, ohci.c,
+// syskbc.c, sysnokbc.c, uhci.c, usb.c, usbCCID.c, usbdef.h, usbhid.c,
+// usbhub.c, usbmass.c, usbrt.mak, usb.sd, amiusbhc.c, efiusbccid.c,
+// efiusbhid.c, efiusbmass.c, efiusbms.c, uhcd.c, uhcd.h, uhcd.mak,
+// usbmisc.c, usbsrc.sdl
+//
+// 66 3/18/13 4:46a Ryanchou
+// [TAG] EIP98377
+// [Category] Improvement
+// [Description] Optimize USB controller timing.
+// [Files] usb.sdl, usbport.c, ehci.c, elib.c, ohci.c, uhci.c,
+// usbdef.h, usbhub.c, xhci.c, uhcd.c
+//
+// 65 1/22/13 2:40a Wilsonlee
+// [TAG] EIP110305
+// [Category] Improvement
+// [Description] Set the device address after we send the first
+// get-device-descriptor command.
+// [Files] usbmass.c, usb.c, usbdef.h, usbbus.c, efiusbmass.c, uhcd.c,
+// usbport.c
+//
+// 64 1/11/13 4:13a Ryanchou
+// [TAG] EIP102491
+// [Category] Improvement
+// [Description] Synchronized with Aptio V USB module
+// [Files] usbport.c, usbsb.c, ehci.c, ehci.h, ohci.c, ohci.h, uhci.h,
+// usb.c, usbdef.h, usbhid.c, usbhub.c, usbkbd.c, usbkbd.h, usbmass.c.
+// usbms.c, usbpoint.c, xhci.h, usb.sd, amiusbhc.c, componentname.c,
+// efiusbkc.c, efiusbmass.c, uhcd.c, uhcd.h, usbbus.c, usbbus.h, usbmisc.c
+//
+// 63 12/21/12 5:01a Ryanchou
+// [TAG] EIP71730
+// [Category] New Feature
+// [Description] Added OHCI handoff support.
+// [Files] usb.sdl, usbport.c, amiusb.c, usbdef.h, UsbPolicy.h, usb.sd,
+// usb.uni
+//
+// 62 12/19/12 2:51a Roberthsu
+// Correct comment.
+//
+// 61 12/19/12 2:35a Roberthsu
+// [TAG] EIP107664
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] Usb skip table no function
+// [RootCause] HubDeviceNumber and PortNumber fail.
+// [Solution] Restore bHubDeviceNumber and bHubPortNumber.
+// [Files] usbport.c
+//
+// 60 9/13/12 1:41a Ryanchou
+// Fix compile error with x64_BUILD = 0.
+//
+// 59 9/04/12 8:06a Wilsonlee
+// [TAG] EIP99882
+// [Category] New Feature
+// [Description] Add the usb setup item and usbpolicyprotocol to enable
+// or disable the usb mass storage driver.
+// [Files] UsbPolicy.h, usb.uni, usb.sd, usbmass.c, usbdef.h,
+// efiusbmass.c, usbport.c, uhcd.c
+//
+// 58 9/03/12 5:25a Roberthsu
+// [TAG] EIP88776
+// [Category] Improvement
+// [Description] Implement keep port function.
+// [Files] usbport.c,AmiUsbController.h
+//
+// 57 8/29/12 8:06a Ryanchou
+// [TAG] EIP77262
+// [Category] New Feature
+// [Description] Remove SMM dependency of USB.
+// [Files] usb.sdl, usbport.c, amiusb.c, amiusb.dxs, amiusb.h, ehci.c,
+// elib.c, ohci.c, uhci.c, usb.c, usbdef.h, usbrt.mak, xhci.c, amiusbhc.c,
+// efiusbccid.c, efiusbhid.c, efiusbkb.c, efiusbmass.c, uhcd.c, uhcd.dxs,
+// uhcd.h, usbmisc.c, AmiUsbController.h
+//
+// 56 5/04/12 6:36a Ryanchou
+// [TAG] EIP82875
+// [Category] Improvement
+// [Description] Support start/stop individual USB host to avoid
+// reconnect issues.
+// [Files] usbport.c, usbsb.c, amiusb.c, amiusb.h, ehci.c, ohci.c,
+// uhci.c, uhci.h, usb.c, usbdef.h, xhci.c, amiusbhc.c, uhcd.c, uhcd.h,
+// usbbus.c, usbmisc.c
+//
+// 55 5/03/12 5:06a Ryanchou
+// [TAG] EIP83361
+// [Category] New Feature
+// [Description] Added "USB 2.0 Controller Mode" setup item.
+// [Files] ehci.c, usb.sd, usb.sdl, usb.uni, usbdef.h, UsbPolicy.h,
+// usbport.c
+//
+// 54 5/02/12 8:11a Wilsonlee
+// [TAG] EIP86793
+// [Category] New Feature
+// [Description] Add the SDL token "USB_MASS_EMULATION_FOR_NO_MEDIA" for
+// determine the USB mass storage device emulation type without media.
+// [Files] usbmass.c, usbport.c, uhcd.c, usbdef.h, usbsrc.sdl
+//
+// 53 4/05/12 10:54a Ryanchou
+// [TAG] EIP74685
+// [Category] New Feature
+// [Description] Add a token "USB_BAD_DEVICES" that is used to list the
+// bad devices for OEM.
+// [Files] usb.sdl, usbport.c
+//
+// 52 1/14/12 6:40a Wilsonlee
+// [TAG] EIP80382
+// [Category] New Feature
+// [Description] Add the SDL token "USB_MASS_EMULATION_BY_SIZE" for
+// determine the USB mass storage device emulation type by size only.
+// [Files] usbmass.c, usbport.c, uhcd.c, usbdef.h, usbsrc.sdl
+//
+// 51 1/06/12 1:03a Rajeshms
+// [TAG] EIP62737
+// [Category] Improvement
+// [Description] Added USB Device number into USB mass device name
+// string based on SDL Token.
+// [Files] Usb.sdl, usbport.c, usbmass.c, UsbInt13.h, UsbInt13.c,
+// usbbus.c, Bfiusb.equ
+//
+// 50 12/26/11 2:32a Roberthsu
+// Correct checkin comment.
+//
+// 49 12/26/11 2:21a Roberthsu
+// [TAG] EIP74609
+// [Category] Improvement
+// [Description] Add check oemskiplist at check port change.
+// [Files] usbport.c,usb.c,AmiUsbController.h
+//
+// 48 12/08/11 1:44a Ryanchou
+// [TAG] EIP75441
+// [Category] Bug Fix
+// [Severity] Normal
+// [Symptom] System hangs at 0xB4 after restart from Win7
+// [RootCause] The device does not use standard BOT protocol under
+// Windows.
+// [Solution] Add the device into bad device table.
+// [Files] usb.c usbport.c
+//
+// 47 11/16/11 3:18a Ryanchou
+// [TAG] EIP70094
+// [Category] Improvement
+// [Description] Microsoft CSM Opt-Out feature implementation.
+// [Files] amiusb.c, uhcd.c, usbport.c
+//
+// 46 11/05/11 7:34a Wilsonlee
+// [TAG] EIP64781
+// [Category] New Feature
+// [Description] Added SDL token
+// SKIP_CARD_READER_CONNECT_BEEP_IF_NO_MEDIA that skip the connect beep if
+// no media present in USB card reader.
+// [Files] usbport.c, usbmass.c, usb.c, usbdef.h, uhcd.c usbsrc.sdl
+//
+// 45 10/17/11 2:23a Ryanchou
+// [TAG] EIP69136
+// [Category] Improvement
+// [Description] Remove the dependency of EBDA in USB module for CSM
+// disabling.
+// [Files] amiusb.c, uhcd.c, usbport.c, usbsb.c
+//
+// 44 9/28/11 10:46a Ryanchou
+// [TAG] EIP66064
+// [Category] Bug Fix
+// [Severity] Minor
+// [Symptom] System hangs when waiting for finger swipe
+// [RootCause] USB driver save the URP pointer to EBDA in function
+// UsbSmiCore and UsbSmiHc, the pointer will be destroyed if someone also
+// invoke the two functions.
+// [Solution] Save the URP pointer before generate SW SMI and restore it
+// after return from SMI.
+// [Files] amiusb.c, amiusbhc.c, usbport.c
+//
+// 43 8/08/11 5:14a Ryanchou
+// [TAG] EIP60561
+// [Category] New Feature
+// [Description] Add USB timing policy protocol for timing override.
+// [Files] ehci.c, guids.c, ohci.c, uhcd.c, uhci.c usb.c, usbdef.h,
+// usbhub.c, usbmass.c, UsbPolicy.h, usbport.c usbsrc.sdl
+//
+// 42 8/05/11 6:17a Ryanchou
+// [TAG] EIP60706
+// [Category] Improvement
+// [Description] Move gUsbBadDeviceTable into SMRAM.
+// [Files] usbport.c, amiusb.c, usb.c, uhcd.c, AmiUsbController.h
+//
+// 41 6/22/11 2:14a Ryanchou
+// [TAG] EIP62695
+// [Improvement] Add new oemskiplist function
+// [Description] Add skip function by controller or port.Skip by device
+// type or port number.
+//
+// 40 4/13/11 12:47a Ryanchou
+// [TAG] EIP58029
+// [Category] Bug Fix
+// [Severity] Important
+// [Symptom] System hangs when insert USB devices
+// [RootCause] The function OEMSkipList uses LocateProtocol to get USB
+// global data pointer, uses Boot Services in runtime may cause system
+// hang.
+// [Solution] Extern usb global data pointer.
+// [Files] usbport.c
+//
+// 39 4/06/11 12:52a Ryanchou
+// [TAG] EIP51653
+// [Category] New Feature
+// [Description] Added an interface that skips specific port
+// enumeration.
+// [Files] AmiUsbController.h, uhcd.c, uhcd.h, usb.c, usbdef.h,
+// usbport.c
+//
+// 38 3/29/11 10:05a Ryanchou
+// [TAG] EIP53518
+// [Category] Improvement
+// [Description] Added chipset xHCI chip support.
+// [Files] amiusb.c, amiusb.h, ehci.c, ohci.c, uhcd.c, uhci.c, usb.c,
+// usb.sdl, usbdef.h, usbport, usbsb.c, xhci.c
+//
+// 37 10/29/10 5:33a Ryanchou
+// EIP46992: USB module build failed with WDK after apply EIP44570.
+//
+// 36 10/22/10 8:56a Ryanchou
+// EIP46693: Clear xHCI BIOS owned semaphore bit and SMI enable bit in
+// PreInitXhci.
+//
+// 35 10/21/10 8:56a Ryanchou
+// EIP44570: Added multiple xHCI SMI pin support.
+//
+// 34 10/12/10 4:52a Rameshr
+// [TAG]- EIP 44585
+// [Category]-IMPROVEMENT
+// [Description]- Number of maximum supported USB Mass Storage device
+// increased from 8 to 16.
+// [Files]- Uin13.bin, UsbPort.c, UsbInt13.h, Usb.c, Usbdef.h, Uasbmass.c,
+// Usb.sd, usb.uni, UsbSetup.c, UsbSrc.sdl, UsbPolicy.h
+//
+// 33 10/12/10 2:05a Rameshr
+// [TAG]- EIP 44585
+// [Category]-IMPROVEMENT
+// [Description]- Number of maximum supported USB Mass Storage device
+// increased from 8 to 16.
+// [Files]- Uin13.bin, UsbPort.c, UsbInt13.h, Usb.c, Usbdef.h, Uasbmass.c,
+// Usb.sd, usb.uni, UsbSetup.c, UsbSrc.sdl, UsbPolicy.h
+//
+// 32 9/16/10 1:09p Olegi
+//
+// 31 8/31/10 8:52a Tonylo
+// EIP41544 - Add EntronTech XHCI support.
+//
+// 30 7/13/10 7:03a Ryanchou
+// EIP38356: Implement shutdown USB legacy support in ACPI enable call.
+//
+// 29 6/23/10 10:18a Olegi
+//
+// 28 6/22/10 9:15p Olegi
+// EIP39708: added incompatible mouse "SANWA Supply MA-LS11DS USB Mouse"
+//
+// 27 6/15/10 1:25a Ryanchou
+// Implement xHCI USB Legacy Capability.
+//
+// 26 6/10/10 10:45p Ryanchou
+// Remove SMSC USB Floppy in gUsbBadDeviceTable.
+//
+// 25 5/20/10 11:56a Olegi
+//
+// 24 5/19/10 4:01p Olegi
+//
+// 23 4/19/10 1:54p Olegi
+//
+// 22 4/12/10 12:20p Olegi
+// Moving structure definitions to the .H file. EIP36942
+//
+// 21 4/02/10 10:09a Olegi
+//
+// 20 4/02/10 8:57a Olegi
+//
+// 19 12/10/09 10:10a Olegi
+// Added UsbControlTimeout setup selection. EIP30079.
+//
+// 18 11/23/09 3:28p Olegi
+// Fix for EIP30023: access gSetupData only when GetVariable returns
+// EFI_SUCCESS.
+//
+// 17 11/13/09 9:11a Olegi
+// EIP31023: key repeat rates are defined by SDL tokens.
+//
+// 16 10/30/09 5:48p Olegi
+//
+// 15 10/09/09 5:56p Olegi
+//
+// 14 10/06/09 6:19p Olegi
+//
+// 13 5/21/09 5:10p Olegi
+// Added HDD hotplug support.
+//
+// 12 3/26/09 2:17p Olegi
+// All setup related code is moved to OEMPORT.C to maximize the porting
+// capabilities.
+//
+// 11 2/27/09 10:27a Olegi
+//
+// 10 2/18/09 3:45p Olegi
+// Added a feature that allows to skip mass storage device installation
+// depending on physical media presence. EIP#19260.
+//
+// 9 11/25/08 6:03p Olegi
+// Support for OEM USB Boot Override feature. EIP#17052.
+//
+// 8 7/04/08 1:06p Olegi
+// NATIVE emulation option EIP 14317
+//
+// 7 5/16/08 12:00p Olegi
+// Compliance with AMI coding standard.
+//
+// 6 2/06/08 11:44a Olegi
+// Added UpdateHCPCIInfo function.
+//
+// 5 12/17/07 4:03p Olegi
+// Removed kbc_support variable.
+//
+// 4 5/22/07 1:20p Yakovlevs
+// Added code to initialize kbc_support variable if KBC_SUPPORT token is
+// undefined
+//
+// 3 11/10/05 11:10a Olegi
+//
+// 2 8/04/05 5:57p Andriyn
+// Legacy over LegacyFree
+//
+// 1 3/29/05 10:16a Olegi
+//
+//****************************************************************************
+//
+//<AMI_FHDR_START>
+//-----------------------------------------------------------------------------
+//
+// Name: USBPORT.C
+//
+// Description: AMI USB Porting file
+//
+//-----------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+//****************************************************************************
+
+#include "Efi.h"
+#include "token.h"
+#include "Setup.h"
+#include "amidef.h"
+#include "usbdef.h"
+#include "uhcd.h"
+
+#if defined(CSM_SUPPORT) && CSM_SUPPORT //(EIP69136+)
+#include <Protocol\LegacyBiosExt.h>
+#endif //(EIP69136+)
+
+#if USB_DIFFERENTIATE_IDENTICAL_DEVICE_NAME
+static UINT8 DeviceNumber=1;
+#endif
+
+#if USB_RT_DRIVER
+//-----------------------------------------------------------------------------
+// This part is linked with USBRT and located in SMI
+
+//<AMI_THDR_START>
+//----------------------------------------------------------------------------
+// Name: USBBadDeviceTable
+//
+// Description: This table contains list of vendor & device IDs of USB
+// devices that are non-compliant. This is currently used
+// only for USB mass storage devices but can be extended to
+// other type of non-compliant devices also.
+//
+//----------------------------------------------------------------------------
+//<AMI_THDR_END>
+
+USB_BADDEV_STRUC gUsbBadDeviceTable[] = {
+// Intel, Lacie hard disk
+ {0x059f, 0xa601,
+ 0, 0, PROTOCOL_CBI_NO_INT,
+ 0},
+
+// In-systems ATA bridge
+ {0x05ab, 0x0060,
+ 0, 0, 0,
+ USB_INCMPT_START_UNIT_NOT_SUPPORTED},
+
+// Data Store Technologies, USB 2 ATA bridge
+ {0x04e6, 0x0001,
+ BASE_CLASS_MASS_STORAGE, 0, PROTOCOL_CBI_NO_INT,
+ USB_INCMPT_BOT_STATUS_FAILED},
+
+// NEC, Floppy drive
+ {0x0409, 0x0040,
+ 0, 0, PROTOCOL_CBI_NO_INT,
+ 0},
+
+// Hana flash drive
+ {0x090a, 0x1001,
+ 0, 0, 0, \
+ USB_INCMPT_SINGLE_LUN_DEVICE +
+ USB_INCMPT_MODE_SENSE_NOT_SUPPORTED},
+
+// Compact Flash reader
+ {0x04e6, 0x000a,
+ 0, 0, 0,
+ USB_INCMPT_MODE_SENSE_NOT_SUPPORTED},
+
+// ScanLogic SL11R-IDE and Ennyah RW4420U
+ {0x04ce, 0x0002,
+ 0, SUB_CLASS_SL11R, PROTOCOL_BOT,
+ 0},
+
+// BAFO Slim CDR-W BF-2100
+ {0x09cc, 0x0404,
+ 0, 0, PROTOCOL_CBI,
+ 0},
+
+//Panasonic USB CD/RW Model:KXL-RW21AN
+ {0x04da, 0x0d06,
+ BASE_CLASS_MASS_STORAGE, 0, PROTOCOL_CBI,
+ 0},
+
+ {0x04da, 0x0d07,
+ BASE_CLASS_MASS_STORAGE, 0, PROTOCOL_CBI,
+ 0},
+
+//TaiDen Technology:CoolFlash
+ {0x0ea0, 0x6803,
+ 0, 0, 0,
+ USB_INCMPT_MODE_SENSE_NOT_SUPPORTED},
+
+// A-Bit USB Mouse(Model:97M32U)
+ {0x0605, 0x0001,
+ 0, 0, 0,
+ USB_INCMPT_SET_BOOT_PROTOCOL_NOT_SUPPORTED},
+
+// The problem with this card reader is fixed elsewhere
+// HP 4-in-1 Card reader (does not support Read Format Capacity command)
+// {0x6050, 0x0034,
+// 0, 0, 0,
+// USB_INCMPT_FORMAT_CAPACITY_NOT_SUPPORTED},
+
+// Silicon Motion Inc., Taiwan: USB Flash Disk
+ {0x090c, 0x1000,
+ 0, 0, 0,
+ USB_INCMPT_GETMAXLUN_NOT_SUPPORTED},
+
+//Intel KVM HID
+ {0x8086, 0x2b,
+ 0, 0, 0,
+ USB_INCMPT_HID_DATA_OVERFLOW},
+
+// SANWA Supply MA-LS11DS USB Mouse
+ {0x04fc, 0x0801,
+ 0, 0, 0,
+ USB_INCMPT_BOOT_PROTOCOL_IGNORED},
+ //(EIP75441+)>
+// SanDisk 2GB Sansa Clip+ MP3 Player
+ {0x0781, 0x74D0,
+ 0xFF, 0xFF, 0xFF,
+ 0},
+
+// SanDisk Sansa Fuze 4GB Flash Portable Media Player
+ {0x0781, 0x74C2,
+ 0xFF, 0xFF, 0xFF,
+ 0},
+ //<(EIP75441+)
+// Genovation USB Mini-Terminal Model #904-RJ
+ {0x16C0, 0x0604,
+ 0, 0, 0,
+ USB_INCMPT_DISABLE_DEVICE},
+#ifdef USB_BAD_DEVICES
+ USB_BAD_DEVICES
+#endif
+// End of incompatible device list
+ {0, 0, 0, 0, 0, 0}
+};
+
+UINT16 gKbcSetTypeRate11CharsSec=KEY_REPEAT_DELAY;
+UINT16 gKbcSetTypeDelay500MSec=KEY_REPEAT_INITIAL_DELAY;
+extern USB_GLOBAL_DATA *gUsbData; //EIP58029
+
+DEV_INFO* USB_GetDeviceInfoStruc(UINT8, DEV_INFO*, UINT8, HC_STRUC*);
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name: OEMSkipList
+//
+// Description: This function intends to skip port.
+//
+// Notes:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+BOOLEAN
+OEMSkipList (
+ UINT8 HubAddr,
+ UINT8 PortNum,
+ UINT16 Bdf,
+ UINT8 BaseClass,
+ UINT8 VaildBaseClass
+)
+{
+ //(EIP88776+)>
+ USB_SKIP_LIST *UsbSkipListTable;
+ DEV_INFO *TmpDevInfo;
+ UINT8 TablePortNumber;
+ UINT8 ConnectDeviceNumber;
+ UINT8 ConnectPortNumber;
+ UINT16 i;
+ UINT16 TableLevel;
+ UINT16 ConnectLevel;
+ UINT32 TablePath;
+ UINT32 ConnectPath;
+ UINT32 ConnectPathMask;
+
+ UsbSkipListTable = (USB_SKIP_LIST*) gUsbData->gUsbSkipListTable;
+
+ if (UsbSkipListTable == NULL) {
+ return FALSE;
+ }
+
+ for ( ; (UsbSkipListTable->wBDF != 0); UsbSkipListTable++) {
+ TablePortNumber = UsbSkipListTable->bRootPort;
+ TablePath = UsbSkipListTable->dRoutePath;
+ for (i = 1; i < 5; i++, TablePath >>= 4) {
+ if (TablePath == 0) {
+ break;
+ }
+ }
+
+ TablePath = UsbSkipListTable->dRoutePath;
+ TableLevel = i;
+ USB_DEBUG(4, "TableLevel = %x TablePath = %x TablePortNumber = %x BDF = %x\n",
+ TableLevel,TablePath,TablePortNumber, UsbSkipListTable->wBDF);
+
+ //get connect path and level
+ ConnectDeviceNumber = HubAddr;
+ ConnectPortNumber = PortNum;
+ for (i = 1, ConnectPath = 0; i < 5; i++) {
+ if (ConnectDeviceNumber & BIT7) {
+ break;
+ }
+ ConnectPath = ConnectPath << 4;
+ ConnectPath |= ConnectPortNumber;
+
+ // Get the device info structure for the matching device address
+ TmpDevInfo = USB_GetDeviceInfoStruc(
+ USB_SRCH_DEV_ADDR,
+ 0,
+ ConnectDeviceNumber,
+ 0);
+ if (TmpDevInfo == NULL) {
+ break;
+ }
+ ConnectDeviceNumber = TmpDevInfo->bHubDeviceNumber;
+ ConnectPortNumber = TmpDevInfo->bHubPortNumber;
+ }
+ ConnectLevel = i;
+ USB_DEBUG(4, "ConnectLevel = %x ConnectPath = %x ConnectPortNumber = %x BDF = %x\n",
+ ConnectLevel, ConnectPath, ConnectPortNumber, Bdf);
+
+ //Skip by all
+ if (UsbSkipListTable->bSkipType == SKIP_FOR_ALLCONTROLLER) {
+ if (UsbSkipListTable->bFlag == SKIP_FLAG_SKIP_LEVEL) {
+ if (TableLevel != ConnectLevel) {
+ continue;
+ }
+ }
+
+ if (UsbSkipListTable->bBaseClass == 0) {
+ return TRUE;
+ }
+
+ if (UsbSkipListTable->bBaseClass == BaseClass) {
+ return TRUE;
+ }
+
+ continue;
+ }
+
+ if (UsbSkipListTable->wBDF != Bdf) {
+ continue;
+ }
+
+ //Skip by controller
+ if (UsbSkipListTable->bRootPort == 0) {
+ if (UsbSkipListTable->bBaseClass != 0) {
+ if (UsbSkipListTable->bBaseClass != BaseClass) {
+ continue;
+ } else {
+ return TRUE;
+ }
+ }
+ return TRUE;
+ }
+ //Skip usb ports which include down stream ports.
+ if (UsbSkipListTable->bFlag == SKIP_FLAG_SKIP_MULTI_LEVEL) {
+ ConnectPathMask = 0xFFFFFFFF >> (4 * (8 - (TableLevel)));
+ ConnectPathMask = ConnectPathMask >> 4;
+ if (((ConnectPath & ConnectPathMask) == TablePath) && (ConnectPortNumber == TablePortNumber)){
+ if (UsbSkipListTable->bBaseClass != 0) {
+ if (UsbSkipListTable->bBaseClass == BaseClass) {
+ return TRUE;
+ }
+ continue;
+ }
+ return TRUE;
+ }
+ continue;
+ }
+
+ if (TableLevel != ConnectLevel) {
+ continue;
+ }
+ //Skip usb ports on the same level.
+ if (UsbSkipListTable->bFlag == SKIP_FLAG_SKIP_LEVEL) {
+ if (UsbSkipListTable->bBaseClass == 0) {
+ return TRUE;
+ }
+
+ if (UsbSkipListTable->bBaseClass == BaseClass) {
+ return TRUE;
+ }
+ }
+ for (i = 0; i < TableLevel; i++, ConnectPath >>= 4, TablePath >>= 4) {
+ if (i == (TableLevel - 1)) {
+ switch (UsbSkipListTable->bFlag) {
+ case SKIP_FLAG_SKIP_PORT:
+ if ((ConnectPath == TablePath) && (ConnectPortNumber == TablePortNumber)){
+ if (UsbSkipListTable->bBaseClass != 0) {
+ if (UsbSkipListTable->bBaseClass == BaseClass) {
+ return TRUE;
+ }
+ break;
+ }
+ return TRUE;
+ }
+ break;
+ case SKIP_FLAG_KEEP_PORT:
+ if (ConnectPortNumber == TablePortNumber) {
+ if (ConnectPath == TablePath) {
+ if (UsbSkipListTable->bBaseClass != 0) {
+ if (VaildBaseClass == 1) {
+ if (UsbSkipListTable->bBaseClass != BaseClass) {
+ return TRUE;
+ }
+ }
+ }
+ break;
+ }
+ return TRUE;
+ }
+ break;
+ default:
+ break;
+ }
+ } else {
+ if ((ConnectPath & 0xf) != (TablePath & 0xf)) {
+ break;
+ }
+ }
+ }
+ }
+
+ return FALSE;
+ //<(EIP88776+)
+}
+
+// End of SMI part of USBPORT.C
+//-----------------------------------------------------------------------------
+#else
+//-----------------------------------------------------------------------------
+// This part is linked with UHCD and located outside SMI
+extern USB_GLOBAL_DATA *gUsbData; //EIP58029
+extern EFI_GUID gEfiSetupGuid;
+
+UINT8 gFddHotplugSupport = USB_HOTPLUG_FDD;
+UINT8 gHddHotplugSupport = USB_HOTPLUG_HDD;
+UINT8 gCdromHotplugSupport = USB_HOTPLUG_CDROM;
+UINT8 gUsbMassNativeEmulation = USB_MASS_EMULATION_NATIVE;
+UINT8 UsbMassEmulationForNoMedia = USB_MASS_EMULATION_FOR_NO_MEDIA; //(EIP86793+)
+ //(EIP80382+)>
+#ifndef USB_MASS_EMULATION_BY_SIZE
+#define USB_MASS_EMULATION_BY_SIZE 0
+#endif
+UINT8 UsbMassSizeEmulation = USB_MASS_EMULATION_BY_SIZE;
+ //<(EIP80382+)
+#ifndef REMOVE_CHECK_FOR_USB_FLOPPY_DRIVE
+#define REMOVE_CHECK_FOR_USB_FLOPPY_DRIVE 0
+#endif
+UINT8 gUsbMassMediaCheck = REMOVE_USB_STORAGE_FROM_BBS_IF_NO_MEDIA;
+UINT8 gUsbMassSkipFddMediaCheck = REMOVE_CHECK_FOR_USB_FLOPPY_DRIVE;
+UINT8 gUsbEfiMsDirectAccess = USB_EFIMS_DIRECT_ACCESS;
+UINT8 SkipCardReaderConnectBeep = SKIP_CARD_READER_CONNECT_BEEP_IF_NO_MEDIA; //(EIP64781+)
+
+//USB_SUPPORT_SETUP gSetupData; //(EIP99882-)
+
+//(EIP51653+)>
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name: UsbGetSkipList
+//
+// Description: This function returns a name string of connected mass storage
+// device.
+//
+// Input: SkipStruc - Pointer to a skip list to be filled
+// TotalStruc - Size of the data to copy to a buffer
+// Output: None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID
+UsbGetSkipList(
+ USB_SKIP_LIST *SkipStruc,
+ UINT8 TotalStruc
+)
+{
+ EFI_STATUS Status;
+
+ Status = pBS->AllocatePool(
+ EfiRuntimeServicesData,
+ (TotalStruc + 1) * sizeof(USB_SKIP_LIST),
+ &(gUsbData->gUsbSkipListTable));
+
+ if (EFI_ERROR(Status)) {
+ return;
+ }
+
+ pBS->SetMem(gUsbData->gUsbSkipListTable, (TotalStruc + 1) * sizeof(USB_SKIP_LIST), 0);
+ pBS->CopyMem(gUsbData->gUsbSkipListTable,SkipStruc, TotalStruc*sizeof(USB_SKIP_LIST));
+
+ return;
+}
+//<(EIP51653+)
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name: UpdateHcPciInfo
+//
+// Description: This function is called from the UHCD entry point, HcPciInfo
+// can be updated here depending on the platform and/or chipset
+// requirements.
+//
+// Input: None
+//
+// Output: EFI_STATUS - Updating succeeded / failed
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+UpdateHcPciInfo()
+{
+ return EFI_UNSUPPORTED;
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: OemGetAssignedUsbBootPort
+//
+// Description: This procedure return specific USB host controller index and
+// port number for BIOS to give specific mass storage device
+// have highest boot priority.
+//
+// Input: None
+//
+// Output:
+// EFI_SUCCESS USB boot device assigned
+// UsbHcIndx USB host index (1-based)
+// UsbHubPortIndx USB hub port index (1-based)
+// EFI_UNSUPPORTED No USB boot device assigned
+// EFI_INVALID_PARAMETER UsbHcIndx or UsbHubPortIndx are NULL
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+OemGetAssignUsbBootPort (
+ UINT8 *UsbHcIndx,
+ UINT8 *UsbHubPortIndx
+)
+{
+ if (UsbHcIndx == NULL || UsbHubPortIndx == NULL)
+ {
+ return EFI_INVALID_PARAMETER;
+ }
+/*
+ // The code below is the sample implementation that reports Port#3 of HC#7
+ // to be a port of boot priority device
+ *UsbHcIndx = 7;
+ *UsbHubPortIndx = 3;
+
+ return EFI_SUCCESS;
+*/
+ return EFI_UNSUPPORTED;
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: InitUsbSetupVars
+//
+// Description: This is porting function that fills in USB related fields in
+// gSetupData variable according to the setup settings and OEM
+// policy.
+//
+// Input: Pointers to USB data, Boot Services and Runtime Services
+//
+// Output: The status of gSetupData initialization
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+InitUsbSetupVars (
+ USB_GLOBAL_DATA *UsbData,
+ EFI_BOOT_SERVICES *pBS,
+ EFI_RUNTIME_SERVICES *pRS
+)
+{
+
+ UINTN VariableSize;
+ USB_MASS_DEV_NUM MassDevNum;
+ EFI_STATUS Status;
+ UINT8 Index;
+ USB_MASS_DEV_VALID MassDevValid= {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+ UINT32 VariableAttributes = EFI_VARIABLE_BOOTSERVICE_ACCESS;
+ USB_CONTROLLER_NUM UsbControllerNum;
+
+#if USB_SETUP_VARIABLE_RUNTIME_ACCESS
+ VariableAttributes |= EFI_VARIABLE_RUNTIME_ACCESS;
+#endif
+
+ UsbControllerNum.UhciNum = 0;
+ UsbControllerNum.OhciNum = 0;
+ UsbControllerNum.EhciNum = 0;
+ UsbControllerNum.XhciNum = 0;
+ VariableSize = sizeof(UsbControllerNum);
+
+ Status = pRS->SetVariable(L"UsbControllerNum",
+ &gEfiSetupGuid,
+ VariableAttributes,
+ VariableSize,
+ &UsbControllerNum);
+
+ MassDevNum.UsbMassDevNum = 0;
+ MassDevNum.IsInteractionAllowed = 1;
+ VariableSize = sizeof(MassDevNum);
+
+ Status = pRS->SetVariable(L"UsbMassDevNum",
+ &gEfiSetupGuid,
+ VariableAttributes,
+ VariableSize,
+ &MassDevNum);
+
+ //
+ // Initilize the Variable to 0
+ //
+ VariableSize = sizeof(MassDevValid);
+ Status = pRS->SetVariable( L"UsbMassDevValid",
+ &gEfiSetupGuid,
+ VariableAttributes,
+ VariableSize,
+ &MassDevValid );
+
+ if (UsbData == NULL) {
+ return EFI_SUCCESS;
+ }
+
+ VariableSize = sizeof(USB_SUPPORT_SETUP);
+ Status = pRS->GetVariable( L"UsbSupport", &gEfiSetupGuid, NULL,
+ &VariableSize, &UsbData->UsbSetupData);
+ if (EFI_ERROR(Status)) {
+ // Set default values and save "UsbSupport" variable.
+ pBS->SetMem(&UsbData->UsbSetupData, sizeof(UsbData->UsbSetupData), 0);
+
+ UsbData->UsbSetupData.UsbMainSupport = 1;
+
+ if (gFddHotplugSupport) {
+ UsbData->UsbSetupData.UsbHotplugFddSupport = SETUP_DATA_HOTPLUG_AUTO;
+ }
+ if (gHddHotplugSupport) {
+ UsbData->UsbSetupData.UsbHotplugHddSupport = SETUP_DATA_HOTPLUG_AUTO;
+ }
+ if (gCdromHotplugSupport) {
+ UsbData->UsbSetupData.UsbHotplugCdromSupport = SETUP_DATA_HOTPLUG_AUTO;
+ }
+
+ UsbData->UsbSetupData.UsbMassResetDelay = SETUP_DATA_RESETDELAY_20S;
+ UsbData->UsbSetupData.UsbControlTimeOut = 20; //(EIP30079+)
+ UsbData->UsbSetupData.UsbXhciSupport = 1;
+ UsbData->UsbSetupData.UsbHiSpeedSupport = 1;
+ UsbData->UsbSetupData.UsbMassDriverSupport = 1;
+
+ VariableAttributes |= EFI_VARIABLE_NON_VOLATILE;
+
+ Status = pRS->SetVariable(
+ L"UsbSupport",
+ &gEfiSetupGuid,
+ VariableAttributes,
+ sizeof(UsbData->UsbSetupData),
+ &UsbData->UsbSetupData );
+ }
+
+ if (gFddHotplugSupport) {
+ UsbData->fdd_hotplug_support = UsbData->UsbSetupData.UsbHotplugFddSupport;
+ }
+ if (gHddHotplugSupport) {
+ UsbData->hdd_hotplug_support = UsbData->UsbSetupData.UsbHotplugHddSupport;
+ }
+ if (gCdromHotplugSupport) {
+ UsbData->cdrom_hotplug_support = UsbData->UsbSetupData.UsbHotplugCdromSupport;
+ }
+ UsbData->UsbXhciHandoff = UsbData->UsbSetupData.UsbXhciHandoff;
+ UsbData->UsbEhciHandoff = UsbData->UsbSetupData.UsbEhciHandoff;
+ UsbData->UsbOhciHandoff = UsbData->UsbSetupData.UsbOhciHandoff;
+ UsbData->UsbEmul6064 = UsbData->UsbSetupData.UsbEmul6064;
+ UsbData->UsbMassResetDelay = UsbData->UsbSetupData.UsbMassResetDelay;
+ for (Index=0; Index<16; Index++) {
+ UsbData->USBMassEmulationOptionTable[Index] =
+ *((UINT8*)&UsbData->UsbSetupData.UsbEmu1+Index);
+ }
+ if (UsbData->UsbSetupData.UsbLegacySupport == 1) {
+ UsbData->dUSBStateFlag |= USB_FLAG_DISABLE_LEGACY_SUPPORT;
+ }
+ UsbData->wTimeOutValue = UsbData->UsbSetupData.UsbControlTimeOut*1000 ; //(EIP30079+)
+ UsbData->UsbXhciSupport = UsbData->UsbSetupData.UsbXhciSupport;
+ UsbData->UsbHiSpeedSupport = UsbData->UsbSetupData.UsbHiSpeedSupport;
+
+ UsbData->PowerGoodDeviceDelay =
+ (UsbData->UsbSetupData.PowerGoodDeviceDelay == 0)? 0 : UsbData->UsbSetupData.PowerGoodDeviceNumDelay;
+
+ return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: UsbSetupGetLegacySupport
+//
+// Description: Returns the status of "USB legacy support" question from Setup.
+//
+// Input: None
+//
+// Output: 0 - Enable, 1 - Disable, 2 - Auto
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+UINT8 UsbSetupGetLegacySupport()
+{
+ return gUsbData->UsbSetupData.UsbLegacySupport; //(EIP99882)
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: UpdateMassDevicesForSetup
+//
+// Description: Updates "UsbMassDevNum" setup variable according to the number
+// of installed mass storage devices.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+UpdateMassDevicesForSetup()
+{
+ EFI_STATUS Status;
+ UINTN VariableSize;
+ CONNECTED_USB_DEVICES_NUM devs;
+ USB_MASS_DEV_NUM SetupData;
+ UINT8 MassDevValid[16]={0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+ UINT8 i;
+ UINT32 VariableAttributes = EFI_VARIABLE_BOOTSERVICE_ACCESS;
+
+#if USB_SETUP_VARIABLE_RUNTIME_ACCESS
+ VariableAttributes |= EFI_VARIABLE_RUNTIME_ACCESS;
+#endif
+
+ VariableSize = sizeof(SetupData);
+ Status = pRS->GetVariable( L"UsbMassDevNum",
+ &gEfiSetupGuid,
+ NULL,
+ &VariableSize,
+ &SetupData );
+
+ if (Status == EFI_SUCCESS) {
+ if (!SetupData.IsInteractionAllowed) return EFI_SUCCESS;
+ }
+
+ ReportDevices(&devs);
+
+ SetupData.UsbMassDevNum = devs.NumUsbMass;
+
+ Status = pRS->SetVariable( L"UsbMassDevNum",
+ &gEfiSetupGuid,
+ VariableAttributes,
+ VariableSize,
+ &SetupData );
+
+ //
+ // Based on avilable USB mass storage device, set the device avilable flag
+ //
+ for(i=0;i<devs.NumUsbMass;i++) {
+ MassDevValid[i]=1;
+ }
+
+ VariableSize = sizeof(USB_MASS_DEV_VALID);
+
+ Status = pRS->SetVariable( L"UsbMassDevValid",
+ &gEfiSetupGuid,
+ VariableAttributes,
+ VariableSize,
+ &MassDevValid );
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name: Usb3OemGetMaxDeviceSlots
+//
+// Description: Returns maximum device slots to be enabled and programmed
+// in MaxSlotsEn field of XHCI CONFIG register. Valid range
+// is 1...HCPARAMS1.MaxSlots (see xhci.h for details)
+//
+// Output: EFI_SUCCESS - Valid value is reported in MaxSlots
+// EFI_UNSUPPORTED - Function is not ported; MaxSlots will
+// be used from HCPARAMS1 field.
+// Notes: Porting is optional
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+Usb3OemGetMaxDeviceSlots(
+ OUT UINT8 *MaxSlots
+)
+{
+ return EFI_UNSUPPORTED;
+}
+
+
+/*
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name: XHCI_InterruptHandler
+//
+// Description:
+// Hardware interrupt handler
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID
+XHCI_InterruptHandler (
+ IN EFI_EXCEPTION_TYPE InterruptType,
+ IN EFI_SYSTEM_CONTEXT SystemContext
+ )
+{
+ EFI_TPL OriginalTPL;
+
+ OriginalTPL = pBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+ gPic->EndOfInterrupt (gPic, gVector);
+
+ pBS->RestoreTPL (OriginalTPL);
+ USB_DEBUG(3, "xhci interrupt..\n");
+}
+*/
+
+VOID
+XhciTimerCallback(
+ EFI_EVENT Event,
+ VOID *Context
+)
+{
+ EFI_TPL OriginalTPL;
+
+ OriginalTPL = pBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+ // Execute XHCI_ProcessInterrupt using SW SMI, Context points to HC_STRUC
+ UsbSmiHc(opHC_ProcessInterrupt, USB_HC_XHCI, Context);
+
+ pBS->RestoreTPL (OriginalTPL);
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name: USBPort_InstallEventHandler
+//
+// Description:
+// Purpose of this function is to install event handlers for different
+// USB host controllers.
+//
+// Input:
+// Pointer to a host controller data structure
+//
+// Output:
+// EFI_SUCCESS on a successful handler installation, otherwise EFI_NOT_READY
+//
+// Notes:
+// 1. Currently implemented for XHCI only. UHCI, OHCI and EHCI currently have the
+// HW SMI registration routines in their HC Start functions.
+//
+// 2. This function is a part of UHCD, not a part of USBRT (SMI). It may only have
+// a code that installs a non-SMI event handler, e.h. timer callback function for
+// HC event polling, or HW interrupt handler. SMI handlers are installed in the
+// USBRT entry point (amiusb.c).
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+USBPort_InstallEventHandler(
+ HC_STRUC *HcStruc
+)
+{
+#if XHCI_SUPPORT
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ if (HcStruc->bHCType != USB_HC_XHCI) return EFI_UNSUPPORTED;
+/*
+#if XHCI_EVENT_SERVICE_MODE == 0
+{
+ EFI_EVENT XhciTimerEvent;
+
+ // Current HW does not support INTx method of interrupt, hold on to the handler
+ // installation until HW matures. In the meantime, use timer interrupt callback.
+ Status = pBS->CreateEvent(
+ EFI_EVENT_TIMER | EFI_EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ XhciTimerCallback, HcStruc, &XhciTimerEvent
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ pBS->SetTimer (XhciTimerEvent, TimerPeriodic, MILLISECOND*100 );
+}
+#endif
+*/
+/*
+#if USBInt1C_SUPPORT
+#if defined(CSM_SUPPORT) && CSM_SUPPORT //(EIP69136+)
+
+ // Update INT1C timer interrupt handler with the HcStruc data
+ {
+ UINT32 *ivt = (UINT32*)0;
+ UINT32 Int1cVector;
+ UINT32 Addr;
+ UINT32 HcStrucAddr;
+ UINT8 Count;
+ EFI_LEGACY_BIOS_EXT_PROTOCOL *BiosExtensions = NULL;
+
+ // Find the vector hooked up by "USB Int1C". At this time only AMI OEM interrupts
+ // might have trapped the original INT1C. So the trapped vector is located at EP-4
+ // (EP is the Entry Point).
+ //
+ // For the details refer the INT1C data area in usbint1c.asm
+ Status = pBS->LocateProtocol(
+ &gEfiLegacyBiosExtProtocolGuid, NULL, &BiosExtensions);
+
+ if (!EFI_ERROR(Status)) {
+ for (Count = 0, Int1cVector = ivt[0x1c];
+ ((Int1cVector >> 16) != 0xf000) && Count < 5;
+ Count++)
+ {
+ Addr = ((Int1cVector >> 12) & 0xffff0) + (Int1cVector & 0xffff);
+ // Check "$AMIUSB$" signature
+ if ((*(UINT32*)(UINTN)(Addr+2) == 0x494d4124) &&
+ (*(UINT32*)(UINTN)(Addr+6) == 0x24425355)) break;
+
+ Int1cVector = *(UINT32*)(UINTN)(Addr - 4); // Trapped address
+ }
+ ASSERT(Count < 5);
+ if ((Count < 5) && ((Int1cVector >> 16) != 0xf000)) {
+ // Update HcStruc information
+ HcStrucAddr = Addr + 12;
+ Addr = (UINT32)(*(UINT16*)(UINTN)(Addr + 10)); // offset of the Params in URP
+ Addr += ((Int1cVector >> 12) & 0xffff0); // added segment to create 32-bit address
+
+ BiosExtensions->UnlockShadow(0, 0, 0, 0);
+
+ *(UINTN*)(UINTN)HcStrucAddr = (UINTN)HcStruc;
+ *(UINTN*)(UINTN)Addr = (UINTN)HcStrucAddr;
+
+ BiosExtensions->LockShadow(0, 0);
+ }
+ }
+ }
+
+#endif //(EIP69136+)
+#endif
+*/
+/*
+ // Install HW interrupt handler on HcStruc->Irq IRQ level
+
+ // Find the Legacy8259 protocol. ASSERT if not found.
+ Status = pBS->LocateProtocol (&gEfiLegacy8259ProtocolGuid, NULL, (VOID **) &gPic);
+ if (!EFI_ERROR(Status)) {
+ EFI_CPU_ARCH_PROTOCOL *Cpu;
+
+ // Get the interrupt vector number corresponding to IRQ0 from the 8259 driver
+ Status = gPic->GetVector (gPic, HcStruc->Irq, (UINT8*)&gVector);
+ ASSERT_EFI_ERROR (Status);
+
+ // Find the CPU architectural protocol. ASSERT if not found.
+ Status = pBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **) &Cpu);
+ ASSERT_EFI_ERROR (Status);
+
+ // Install interrupt handler for XHCI controller
+ Status = Cpu->RegisterInterruptHandler (Cpu, gVector, XHCI_InterruptHandler);
+ ASSERT_EFI_ERROR (Status);
+ gPic->EnableIrq (gPic, HcStruc->Irq, TRUE);
+
+ }
+*/
+
+#endif
+ return EFI_SUCCESS;
+}
+
+#endif
+
+#if USB_DIFFERENTIATE_IDENTICAL_DEVICE_NAME
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name: AddPortNumbertoDeviceString
+//
+// Description:
+// This function will insert the USB device number into the devicename string.
+// Format----> "U(DeviceNumber)-DevNameString"
+//
+// Input:
+// Pointer to a device data structure
+//
+// Output:
+// VOID
+//
+// Notes:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+AddPortNumbertoDeviceString(
+ DEV_INFO *Device
+)
+{
+ UINT8 i;
+ UINT8 j;
+ UINT8 TempArray[50];
+ UINT8 Appendarray1[5] = {'U',NULL,'-',NULL};
+ UINT8 Appendarray2[6] = {'U',NULL,NULL,'-',NULL};
+
+ for (i = 0 ; Device->DevNameString[i]; i++) {
+ TempArray[i] = Device->DevNameString[i];
+ }
+ TempArray[i] = 0;
+
+ //
+ // Check for device number, if <= 9 then convert to ASCII and insert in array,
+ // else split the number and convert to ASCII and then insert in array.
+ //
+ if (DeviceNumber <= 9) {
+ Appendarray1[1] = DeviceNumber + 0x30;
+
+ for (i = 0; Appendarray1[i]; i++) {
+ Device->DevNameString[i] = Appendarray1[i];
+ }
+ } else {
+ i = (DeviceNumber / 10) + 0x30;
+ j = (DeviceNumber % 10) + 0x30;
+
+ Appendarray2[1] = i;
+ Appendarray2[2] = j;
+
+ for (i = 0; Appendarray2[i] ; i++) {
+ Device->DevNameString[i] = Appendarray2[i];
+ }
+ }
+
+ for (j=0; TempArray[j]; j++, i++) {
+ Device->DevNameString[i] = TempArray[j];
+ }
+
+ Device->DevNameString[i] = 0;
+
+ DeviceNumber++;
+}
+#endif
+
+//****************************************************************************
+//****************************************************************************
+//** **
+//** (C)Copyright 1985-2016, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Pkwy, Norcross, GA 30093 **
+//** **
+//** Phone (770)-246-8600 **
+//** **
+//****************************************************************************
+//****************************************************************************