diff options
author | raywu <raywu@aaeon.com> | 2018-06-19 18:32:59 +0800 |
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committer | raywu <raywu@aaeon.com> | 2018-06-19 18:32:59 +0800 |
commit | b06cc7b74aee095a1c8e810f0f93e2cae626f820 (patch) | |
tree | 2c6aacd86c30e83cd5ee5fde5b4be1b6e7652b93 /Board/IO/F81866/ACPI | |
parent | 5759e2929cee86e113c0f906660412515933d451 (diff) | |
download | zprj-b06cc7b74aee095a1c8e810f0f93e2cae626f820.tar.xz |
Adjust IRQ Assignment
Diffstat (limited to 'Board/IO/F81866/ACPI')
-rw-r--r-- | Board/IO/F81866/ACPI/Uart1.ASL | 24 | ||||
-rw-r--r-- | Board/IO/F81866/ACPI/Uart2.ASL | 24 | ||||
-rw-r--r-- | Board/IO/F81866/ACPI/Uart3.ASL | 26 | ||||
-rw-r--r-- | Board/IO/F81866/ACPI/Uart4.ASL | 26 | ||||
-rw-r--r-- | Board/IO/F81866/ACPI/Uart5.ASL | 30 | ||||
-rw-r--r-- | Board/IO/F81866/ACPI/Uart6.ASL | 30 |
6 files changed, 80 insertions, 80 deletions
diff --git a/Board/IO/F81866/ACPI/Uart1.ASL b/Board/IO/F81866/ACPI/Uart1.ASL index 5aa0ed1..22b5318 100644 --- a/Board/IO/F81866/ACPI/Uart1.ASL +++ b/Board/IO/F81866/ACPI/Uart1.ASL @@ -84,24 +84,24 @@ Device(UAR1) { } StartDependentFnNoPri() { IO(Decode16, 0x3F8, 0x3F8, 1, 8) - IRQNoFlags() {3,4,5,6,7,10,11,12} + IRQNoFlags() {4} DMA(Compatibility, NotBusMaster, Transfer8) {} } StartDependentFnNoPri() { IO(Decode16, 0x2F8, 0x2F8, 1, 8) - IRQNoFlags() {3,4,5,6,7,10,11,12} - DMA(Compatibility, NotBusMaster, Transfer8) {} - } - StartDependentFnNoPri() { - IO(Decode16, 0x3E8, 0x3E8, 1, 8) - IRQNoFlags() {3,4,5,6,7,10,11,12} - DMA(Compatibility, NotBusMaster, Transfer8) {} - } - StartDependentFnNoPri() { - IO(Decode16, 0x2E8, 0x2E8, 1, 8) - IRQNoFlags() {3,4,5,6,7,10,11,12} + IRQNoFlags() {3} DMA(Compatibility, NotBusMaster, Transfer8) {} } +// StartDependentFnNoPri() { +// IO(Decode16, 0x3E8, 0x3E8, 1, 8) +// IRQNoFlags() {3,4,5,6,7,10,11,12} +// DMA(Compatibility, NotBusMaster, Transfer8) {} +// } +// StartDependentFnNoPri() { +// IO(Decode16, 0x2E8, 0x2E8, 1, 8) +// IRQNoFlags() {3,4,5,6,7,10,11,12} +// DMA(Compatibility, NotBusMaster, Transfer8) {} +// } EndDependentFn() }) } // End Of UAR1 diff --git a/Board/IO/F81866/ACPI/Uart2.ASL b/Board/IO/F81866/ACPI/Uart2.ASL index d80ef3f..70dfd1d 100644 --- a/Board/IO/F81866/ACPI/Uart2.ASL +++ b/Board/IO/F81866/ACPI/Uart2.ASL @@ -84,24 +84,24 @@ Device(UAR2) { } StartDependentFnNoPri() { IO(Decode16, 0x3F8, 0x3F8, 1, 8) - IRQNoFlags() {3,4,5,6,7,10,11,12} + IRQNoFlags() {4} DMA(Compatibility, NotBusMaster, Transfer8) {} } StartDependentFnNoPri() { IO(Decode16, 0x2F8, 0x2F8, 1, 8) - IRQNoFlags() {3,4,5,6,7,10,11,12} - DMA(Compatibility, NotBusMaster, Transfer8) {} - } - StartDependentFnNoPri() { - IO(Decode16, 0x3E8, 0x3E8, 1, 8) - IRQNoFlags() {3,4,5,6,7,10,11,12} - DMA(Compatibility, NotBusMaster, Transfer8) {} - } - StartDependentFnNoPri() { - IO(Decode16, 0x2E8, 0x2E8, 1, 8) - IRQNoFlags() {3,4,5,6,7,10,11,12} + IRQNoFlags() {3} DMA(Compatibility, NotBusMaster, Transfer8) {} } +// StartDependentFnNoPri() { +// IO(Decode16, 0x3E8, 0x3E8, 1, 8) +// IRQNoFlags() {3,4,5,6,7,10,11,12} +// DMA(Compatibility, NotBusMaster, Transfer8) {} +// } +// StartDependentFnNoPri() { +// IO(Decode16, 0x2E8, 0x2E8, 1, 8) +// IRQNoFlags() {3,4,5,6,7,10,11,12} +// DMA(Compatibility, NotBusMaster, Transfer8) {} +// } EndDependentFn() }) diff --git a/Board/IO/F81866/ACPI/Uart3.ASL b/Board/IO/F81866/ACPI/Uart3.ASL index 70b5f1c..0e2a97f 100644 --- a/Board/IO/F81866/ACPI/Uart3.ASL +++ b/Board/IO/F81866/ACPI/Uart3.ASL @@ -80,29 +80,29 @@ Device(UAR3) { Name(_PRS, ResourceTemplate() { StartDependentFn(0, 0) { IO(Decode16, 0x3E8, 0x3E8, 1, 8) - IRQ(Level,ActiveLow,Shared) {7} + IRQ(Level,ActiveLow,Shared) {11} DMA(Compatibility, NotBusMaster, Transfer8) {} } StartDependentFnNoPri() { IO(Decode16, 0x3E8, 0x3E8, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + IRQ(Level,ActiveLow,Shared) {11} DMA(Compatibility, NotBusMaster, Transfer8) {} } StartDependentFnNoPri() { IO(Decode16, 0x2E8, 0x2E8, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} - DMA(Compatibility, NotBusMaster, Transfer8) {} - } - StartDependentFnNoPri() { - IO(Decode16, 0x2F0, 0x2F0, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} - DMA(Compatibility, NotBusMaster, Transfer8) {} - } - StartDependentFnNoPri() { - IO(Decode16, 0x2E0, 0x2E0, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + IRQ(Level,ActiveLow,Shared) {11} DMA(Compatibility, NotBusMaster, Transfer8) {} } +// StartDependentFnNoPri() { +// IO(Decode16, 0x2F0, 0x2F0, 1, 8) +// IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} +// DMA(Compatibility, NotBusMaster, Transfer8) {} +// } +// StartDependentFnNoPri() { +// IO(Decode16, 0x2E0, 0x2E0, 1, 8) +// IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} +// DMA(Compatibility, NotBusMaster, Transfer8) {} +// } EndDependentFn() }) diff --git a/Board/IO/F81866/ACPI/Uart4.ASL b/Board/IO/F81866/ACPI/Uart4.ASL index b7655c0..eb1307f 100644 --- a/Board/IO/F81866/ACPI/Uart4.ASL +++ b/Board/IO/F81866/ACPI/Uart4.ASL @@ -74,29 +74,29 @@ Device(UAR4) { Name(_PRS, ResourceTemplate() { StartDependentFn(0, 0) { IO(Decode16, 0x2E8, 0x2E8, 1, 8) - IRQ(Level,ActiveLow,Shared) {7} + IRQ(Level,ActiveLow,Shared) {11} DMA(Compatibility, NotBusMaster, Transfer8) {} } StartDependentFnNoPri() { IO(Decode16, 0x3E8, 0x3E8, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + IRQ(Level,ActiveLow,Shared) {11} DMA(Compatibility, NotBusMaster, Transfer8) {} } StartDependentFnNoPri() { IO(Decode16, 0x2E8, 0x2E8, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} - DMA(Compatibility, NotBusMaster, Transfer8) {} - } - StartDependentFnNoPri() { - IO(Decode16, 0x2F0, 0x2F0, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} - DMA(Compatibility, NotBusMaster, Transfer8) {} - } - StartDependentFnNoPri() { - IO(Decode16, 0x2E0, 0x2E0, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + IRQ(Level,ActiveLow,Shared) {11} DMA(Compatibility, NotBusMaster, Transfer8) {} } +// StartDependentFnNoPri() { +// IO(Decode16, 0x2F0, 0x2F0, 1, 8) +// IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} +// DMA(Compatibility, NotBusMaster, Transfer8) {} +// } +// StartDependentFnNoPri() { +// IO(Decode16, 0x2E0, 0x2E0, 1, 8) +// IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} +// DMA(Compatibility, NotBusMaster, Transfer8) {} +// } EndDependentFn() }) diff --git a/Board/IO/F81866/ACPI/Uart5.ASL b/Board/IO/F81866/ACPI/Uart5.ASL index 8493c6a..76fd3a3 100644 --- a/Board/IO/F81866/ACPI/Uart5.ASL +++ b/Board/IO/F81866/ACPI/Uart5.ASL @@ -73,30 +73,30 @@ Device(UAR5) { //----------------------------------------------------------------------- Name(_PRS, ResourceTemplate() { StartDependentFn(0, 0) { - IO(Decode16, 0x2F0, 0x2F0, 1, 8) + IO(Decode16, 0x278, 0x278, 1, 8) IRQ(Level,ActiveLow,Shared) {10} DMA(Compatibility, NotBusMaster, Transfer8) {} } StartDependentFnNoPri() { - IO(Decode16, 0x3E8, 0x3E8, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + IO(Decode16, 0x278, 0x278, 1, 8) + IRQ(Level,ActiveLow,Shared) {10} DMA(Compatibility, NotBusMaster, Transfer8) {} } StartDependentFnNoPri() { - IO(Decode16, 0x2E8, 0x2E8, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} - DMA(Compatibility, NotBusMaster, Transfer8) {} - } - StartDependentFnNoPri() { - IO(Decode16, 0x2F0, 0x2F0, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} - DMA(Compatibility, NotBusMaster, Transfer8) {} - } - StartDependentFnNoPri() { - IO(Decode16, 0x2E0, 0x2E0, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + IO(Decode16, 0x270, 0x270, 1, 8) + IRQ(Level,ActiveLow,Shared) {10} DMA(Compatibility, NotBusMaster, Transfer8) {} } +// StartDependentFnNoPri() { +// IO(Decode16, 0x2F0, 0x2F0, 1, 8) +// IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} +// DMA(Compatibility, NotBusMaster, Transfer8) {} +// } +// StartDependentFnNoPri() { +// IO(Decode16, 0x2E0, 0x2E0, 1, 8) +// IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} +// DMA(Compatibility, NotBusMaster, Transfer8) {} +// } EndDependentFn() }) diff --git a/Board/IO/F81866/ACPI/Uart6.ASL b/Board/IO/F81866/ACPI/Uart6.ASL index fbe96dc..fca3c09 100644 --- a/Board/IO/F81866/ACPI/Uart6.ASL +++ b/Board/IO/F81866/ACPI/Uart6.ASL @@ -73,30 +73,30 @@ Device(UAR6) { //----------------------------------------------------------------------- Name(_PRS, ResourceTemplate() { StartDependentFn(0, 0) { - IO(Decode16, 0x2E0, 0x2E0, 1, 8) + IO(Decode16, 0x270, 0x270, 1, 8) IRQ(Level,ActiveLow,Shared) {10} DMA(Compatibility, NotBusMaster, Transfer8) {} } StartDependentFnNoPri() { - IO(Decode16, 0x3E8, 0x3E8, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + IO(Decode16, 0x278, 0x278, 1, 8) + IRQ(Level,ActiveLow,Shared) {10} DMA(Compatibility, NotBusMaster, Transfer8) {} } StartDependentFnNoPri() { - IO(Decode16, 0x2E8, 0x2E8, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} - DMA(Compatibility, NotBusMaster, Transfer8) {} - } - StartDependentFnNoPri() { - IO(Decode16, 0x2F0, 0x2F0, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} - DMA(Compatibility, NotBusMaster, Transfer8) {} - } - StartDependentFnNoPri() { - IO(Decode16, 0x2E0, 0x2E0, 1, 8) - IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} + IO(Decode16, 0x270, 0x270, 1, 8) + IRQ(Level,ActiveLow,Shared) {10} DMA(Compatibility, NotBusMaster, Transfer8) {} } +// StartDependentFnNoPri() { +// IO(Decode16, 0x2F0, 0x2F0, 1, 8) +// IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} +// DMA(Compatibility, NotBusMaster, Transfer8) {} +// } +// StartDependentFnNoPri() { +// IO(Decode16, 0x2E0, 0x2E0, 1, 8) +// IRQ(Level,ActiveLow,Shared) {3,4,5,6,7,10,11,12} +// DMA(Compatibility, NotBusMaster, Transfer8) {} +// } EndDependentFn() }) |