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| author | raywu <raywu@aaeon.com> | 2018-06-19 08:13:12 +0800 |
|---|---|---|
| committer | raywu <raywu@aaeon.com> | 2018-06-19 08:13:12 +0800 |
| commit | 5759e2929cee86e113c0f906660412515933d451 (patch) | |
| tree | 15626289a650d7a61e478e89423a966bb84508a6 /Board/IO/F81866/F81866PEI.C | |
| parent | 12e3acf6a1de13ad8f9c94e16c7dc633b7b6613e (diff) | |
| download | zprj-5759e2929cee86e113c0f906660412515933d451.tar.xz | |
SIO Function Porting
1. LPC Decode
2. UART Porting
Diffstat (limited to 'Board/IO/F81866/F81866PEI.C')
| -rw-r--r-- | Board/IO/F81866/F81866PEI.C | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Board/IO/F81866/F81866PEI.C b/Board/IO/F81866/F81866PEI.C index 844336a..91cf7a7 100644 --- a/Board/IO/F81866/F81866PEI.C +++ b/Board/IO/F81866/F81866PEI.C @@ -146,7 +146,7 @@ VOID F81866_INIT(VOID) UINTN i; // Decode neccessary IO resource in PEI phase - PeiSetLpcDeviceDecoding(); +// PeiSetLpcDeviceDecoding(); // Step through table and initialize the Serial Port for(i=0; i<(sizeof(F81866_PEI_Init_Table))/(sizeof(SIO_DATA));i++) { |