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authorraywu <raywu0301@gmail.com>2018-06-15 00:00:50 +0800
committerraywu <raywu0301@gmail.com>2018-06-15 00:00:50 +0800
commitb7c51c9cf4864df6aabb99a1ae843becd577237c (patch)
treeeebe9b0d0ca03062955223097e57da84dd618b9a /Board/NB
downloadzprj-b7c51c9cf4864df6aabb99a1ae843becd577237c.tar.xz
init. 1AQQW051HEADmaster
Diffstat (limited to 'Board/NB')
-rw-r--r--Board/NB/GetSetupData.c996
-rw-r--r--Board/NB/NB.H331
-rw-r--r--Board/NB/NB.mak219
-rw-r--r--Board/NB/NB.sdl1223
-rw-r--r--Board/NB/NBBOARD.CIF21
-rw-r--r--Board/NB/NBDXE.DXS71
-rw-r--r--Board/NB/NBDXEBoard.c652
-rw-r--r--Board/NB/NBPEI.DXS73
-rw-r--r--Board/NB/NBPEIBoard.c94
-rw-r--r--Board/NB/NBSECInit.ASM249
-rw-r--r--Board/NB/NBSetup/NB.sd4944
-rw-r--r--Board/NB/NBSetup/NB.unibin0 -> 172600 bytes
-rw-r--r--Board/NB/NBSetup/NBSetup.c1144
-rw-r--r--Board/NB/NBSetup/NBSetup.cif13
-rw-r--r--Board/NB/NBSetup/NBSetup.mak83
-rw-r--r--Board/NB/NBSetup/NBSetup.sdl314
-rw-r--r--Board/NB/NBSetup/NBSetupReset.c181
-rw-r--r--Board/NB/Nb.ssp80
-rw-r--r--Board/NB/NbInt15.asm651
-rw-r--r--Board/NB/NbSetupData.h548
20 files changed, 11887 insertions, 0 deletions
diff --git a/Board/NB/GetSetupData.c b/Board/NB/GetSetupData.c
new file mode 100644
index 0000000..64eda79
--- /dev/null
+++ b/Board/NB/GetSetupData.c
@@ -0,0 +1,996 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/GetSetupData.c 32 6/26/13 4:39a Ireneyang $
+//
+// $Revision: 32 $
+//
+// $Date: 6/26/13 4:39a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/GetSetupData.c $
+//
+// 32 6/26/13 4:39a Ireneyang
+// [TAG] None
+// [Category] Improvement
+// [Description] Add new related items into structure.
+// [Files] NBPEI.c; GetSetupData.c;
+//
+// 30 6/21/13 5:21a Ireneyang
+// Update to SBY SA RC 1.6.0.
+//
+// 29 6/03/13 2:18a Ireneyang
+//
+// 28 5/22/13 5:14a Ireneyang
+// [TAG] None
+// [Category] Improvement
+// [Description] Add RCVENC1D into NB_SETUP_DATA for setting.
+// [Files] GetSetupData.c;
+//
+// 27 5/13/13 6:28a Ireneyang
+// [TAG] None
+// [Category] Improvement
+// [Description] Add PanelPowerEnable for enabling/disabling VDD force
+// bit. (Required only for early enabling of eDP panel)
+// [Files] NBSetup.c; GetSetupData.c; NbSetupData.h; NBPEI.c;
+//
+// 26 4/09/13 4:03a Ireneyang
+// [TAG] None
+// [Severity] BugFix
+// [Description] Fix C7 function can't work with SA RC 1.4.0.0.
+// [Files] SgDgpu.asl; GetSetupData.c;
+//
+// 25 3/15/13 6:28a Jeffch
+// [TAG] PCH_SKU
+// [Severity] BugFix
+// [Description] Fix Build error issue.
+// [Files] GetSetupData.c;
+//
+// 24 3/15/13 1:58a Ireneyang
+// [TAG] EIP118133
+// [Severity] BugFix
+// [Description] Fix and restructure PlatformConfig setting of SA policy.
+// [Files] NBDxe.c; GetSetupData.c; NbSetupData.h;
+//
+// 23 3/14/13 3:55a Ireneyang
+// [TAG] None
+// [Severity] Improvement
+// [Description] Update to SBY SA RC PV 1.3.0.
+// [Files] NBPEI.c; *.*;
+//
+// 22 3/07/13 6:11a Ireneyang
+// [TAG] None
+// [Severity] Improvement
+// [Description] Make some default SaPlatformPolicy items flexible.
+// Define some SaPlatformPolicy items into NB_SETUP_DATA
+// structure.
+// [Files] NbSetupData.h; GetSetupData.c; NBPEI.c;
+//
+// 21 3/07/13 3:44a Ireneyang
+// [TAG] None
+// [Severity] Improvement
+// [Description] Add "Hot only" option for Memory Refresh 2x support to
+// meet Intel Spec.
+// [Files] NBPEI.c; NB.uni; NB.sd; NbSetupData.h; GetSetupData.c;
+//
+// 20 2/23/13 6:14a Ireneyang
+// Update to SBY SA RC PV 1.2.0.
+//
+// 19 2/09/13 10:25a Jeffch
+// [TAG] None
+// [Severity] Spec update
+// [Description] Update SA RC 1.1.0
+// [Files] NBPei.c; GetSetupData.c; NbSetupData.h; NBDXE.c;
+//
+// 18 1/28/13 3:47a Jeffch
+// [TAG] None
+// [Severity] Spec update
+// [Description] Update SA RC 1.0.
+// [Files] NBPei.c; GetSetupData.c; NbSetupData.h; NBDXE.c;
+// NB.sd; NB.uni; NBDxeBoard.c
+//
+// 17 1/14/13 6:11a Jeffch
+// [TAG] None
+// [Severity] Spec update
+// [Description] Create setup item for SA RC 0.90.
+// [Files] NBPei.c; GetNbSetupData.c NB.sd; NB.uni;
+//
+// 16 1/10/13 6:00a Jeffch
+// [TAG] None
+// [Severity] Bug Fix
+// [Description] Fixed not program HDA codec for SaHDAVerbtable link bug.
+// [Files] NBDXE.c; GetSetupData.c; NbSetupData.h
+// [TAG] None
+// [Severity] Important
+// [Description] Create DDR PowerDown and idle counter for setup item.
+// [Files] NBPei.c; NB.sd; NB.uni; GetSetupData.c; NbSetupData.h
+//
+// 15 1/07/13 1:41a Jeffch
+// [TAG] None
+// [Severity] Improvement
+// [Description] Change MRC DEBUG PRINT enable default value.
+// [Files] GetSetupData.c;
+//
+// 14 1/03/13 7:31a Jeffch
+// [TAG] None
+// [Severity] Improvement
+// [Description] added SaHDAVerbtable link to OEM.
+// [Files] NBDxe.c; NbSetupData.h; GetSetupData.c;
+//
+// 13 12/22/12 2:30a Jeffch
+// [TAG] None
+// [Severity] Spec update
+// [Description] Create setup item for SA RC 0.81.
+// [Files] NBPei.c; GetNbSetupData.c NB.sd; NB.uni;
+//
+// 12 12/18/12 5:17a Jeffch
+// [TAG] None
+// [Severity] Spec update
+// [Description] Update SA RC 0.81.
+// [Files] GetSetupData.c; NbSetupData.h;
+//
+// 11 12/14/12 4:52a Jeffch
+// [TAG] EIP106709
+// [Severity] Important
+// [Description] Support PCIE Primary display.
+// [Files] NB.sd; NBDXEboard.c; NB.uni;
+// GetSetupData.c;NbSetupData.h;
+//
+// 10 11/14/12 5:33a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Update XTU4.x function
+// [Files] NBPei.c; GetSetupData.c; NbSetupData.h; NBDXE.c; NB.sd;
+// NB.uni
+//
+// 9 11/07/12 6:25a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Support ULT one BIOS
+// [Files] NBPei.c; GetSetupData.c; NbSetupData.h
+//
+// 8 10/18/12 11:17p Jeffch
+// [TAG] EIP104234
+// [Severity] Important
+// [Description] Fixed cannot compile 4.6.5.3_Intel_SA-RC_071_019a with
+// NB_ERROR_LOG_SUPPORT.
+// [Files] GetSetupData.c; NbSetupData.h
+//
+// 7 10/14/12 5:18a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Follow SA RC 0.71.
+// [Files] NBPei.c, NBDxe.c; NBGeneric.c; NBCspLib.h; NBSetup.c;
+// Nb.sd; GetSetupData.c
+//
+// 6 10/14/12 12:41a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Update by XTU4.0.
+// [Files] NB.h, GetSetupData.c, NbSetupData.h
+// [TAG] None
+// [Severity] Important
+// [Description] Follow Update by Mahobay.
+// [Files] NB.sdl, NB.mak.c; NBDXEBoard.c
+//
+// 5 9/12/12 6:37a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Add RxCEM Loop back setup item.
+// [Files] GetSetupData.c, NB.sd, NB.uni, NBPEI.c, NbSetupData.h,
+// NBPEI.c
+//
+// 4 7/27/12 8:46a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] IGfx Fource Disable Support.
+// [Files] GetSetupData.c, NB.sdl, NB.sd, NB.uni, NbSetupData.h,
+// NBDxe.c, NBPEI.c
+//
+// 3 4/26/12 3:00a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Adjust Intel System Agent module the Setup item and
+// Policy.
+// [Description] GetSetupData.c, NB.sdl, NB.sd, NB.uni, NBDxe.c,
+// NBPEI.c,
+// NBSetup.c, NBSetupReset.c, NbSetupData.h
+//
+// 2 4/05/12 2:22a Yurenlai
+// [TAG] EIP87103
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Change for SystemAgent RefCode Revision: 0.5.5 .
+// [Files] NBDxe.c, NBPEI.c, NBSMI.C, NBGeneric.cm NB.sd, NBSetup.c,
+// GetSetupData.c, NbSetupData.h
+//
+// 1 2/08/12 4:33a Yurenlai
+// Intel Haswell/NB eChipset initially releases.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: GetSetupData.c
+//
+// Description: Custom North Bridge setup data behavior implementation
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+//---------------------------------------------------------------------------
+// Include(s)
+//---------------------------------------------------------------------------
+#include <AmiCspLib.h>
+#include <Setup.h>
+#include <Ppi\ReadOnlyVariable2.h>
+
+//---------------------------------------------------------------------------
+// Constant, Macro and Type Definition(s)
+//---------------------------------------------------------------------------
+// Constant Definition(s)
+
+// Macro Definition(s)
+
+// Type Definition(s)
+
+typedef VOID (NB_OEM_SETUP_CALLBACK) (
+ IN VOID *Services,
+ IN OUT NB_SETUP_DATA *NbSetupData,
+ IN SETUP_DATA *SetupData,
+ IN BOOLEAN Pei
+);
+
+// Function Prototype(s)
+
+VOID NbSetupCallbacks (
+ IN VOID *Services,
+ IN OUT NB_SETUP_DATA *NbSetupData,
+ IN SETUP_DATA *SetupData,
+ IN BOOLEAN Pei
+);
+//---------------------------------------------------------------------------
+// Variable and External Declaration(s)
+//---------------------------------------------------------------------------
+// GUID Definition(s)
+
+static EFI_GUID gSetupGuid = SETUP_GUID;
+static EFI_GUID gPeiReadOnlyVar2PpiGuid = EFI_PEI_READ_ONLY_VARIABLE2_PPI_GUID;
+
+// Protocol/Ppi Definition(s)
+
+// External Declaration(s)
+
+extern NB_OEM_SETUP_CALLBACK NB_OEM_SETUP_CALLBACK_LIST EndOfList;
+
+// Variable Declaration(s)
+
+NB_OEM_SETUP_CALLBACK* NbOemSetupCallbackList[] = \
+ {NB_OEM_SETUP_CALLBACK_LIST NULL};
+
+
+// Function Definition(s)
+UINT32 gNbSaHdaVerbTableData[] = {
+ ///
+ /// Audio Verb Table - 0x80862807
+ ///
+ /// Pin Widget 5 - PORT B
+ ///
+ 0x00571C10,
+ 0x00571D00,
+ 0x00571E56,
+ 0x00571F18,
+ ///
+ /// Pin Widget 6 - PORT C
+ ///
+ 0x00671C20,
+ 0x00671D00,
+ 0x00671E56,
+ 0x00671F18,
+ ///
+ /// Pin Widget 7 - PORT D
+ ///
+ 0x00771C30,
+ 0x00771D00,
+ 0x00771E56,
+ 0x00771F18
+};
+
+NB_SA_HDA_VERB_TABLE gNbSaHdaVerbTable[] = {
+ {
+ {
+ 0x80862807, ///< Vendor ID/Device ID
+ 0x0000, ///< SubSystem ID
+ 0xFF, ///< Revision ID
+ 0x02, ///< Front panel support (1=yes, 2=no)
+ 0x0003, ///< Number of Rear Jacks
+ 0x0000 ///< Number of Front Jacks
+ },
+ 0 ///< Pointer to verb table data, need to be inited in the code.
+ }
+};
+//---------------------------------------------------------------------------
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: NbOemSetupCallbacks
+//
+// Description: This function calls registered callbacks for OEM/custom setup.
+//
+// Input: *Services - Pointer to PeiServices or RuntimeServices
+// structure
+// *NbSetupData - Pointer to custom setup data to return
+// *SetupData - Pointer to system setup data.
+// Pei - Pei flag. If TRUE we are in PEI phase
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID NbOemSetupCallbacks (
+ IN VOID *Services,
+ IN OUT NB_SETUP_DATA *NbSetupData,
+ IN SETUP_DATA *SetupData,
+ IN BOOLEAN Pei )
+{
+ UINTN i;
+
+ for (i = 0; NbOemSetupCallbackList[i] != NULL; i++)
+ NbOemSetupCallbackList[i]( Services, NbSetupData, SetupData, Pei);
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: GetNbSetupData
+//
+// Description: This function returns custom setup data from system SetupData
+// variable
+//
+// Input: *Services - Pointer to PeiServices or RuntimeServices
+// structure
+// *NbSetupData - Pointer to custom setup data to return
+// Pei - Pei flag. If TRUE we are in PEI phase
+//
+// Output: None
+//
+// Notes: PORTING REQUIRED
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID GetNbSetupData (
+ IN VOID *Services,
+ IN OUT NB_SETUP_DATA *NbSetupData,
+ IN BOOLEAN Pei )
+{
+ EFI_STATUS Status;
+ SETUP_DATA SetupData;
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_RUNTIME_SERVICES *RunServices;
+ EFI_PEI_READ_ONLY_VARIABLE2_PPI *ReadOnlyVariable = NULL;
+ UINTN VariableSize = sizeof(SETUP_DATA);
+ UINTN i;
+ // Porting Start
+ // Update NB_SETUP_DATA according to the default values.
+
+ NbSetupData->GdxcEnable = 1;
+ NbSetupData->GdxcIotSize = 4;
+ NbSetupData->GdxcMotSize = 12;
+ NbSetupData->MemoryTrace = 0;
+
+ NbSetupData->ECT = 0;
+ NbSetupData->SOT = 1;
+ NbSetupData->RDMPRT = 1;
+ NbSetupData->RCVET = 1;
+ NbSetupData->JWRL = 1;
+ NbSetupData->FWRL = 0;
+ NbSetupData->WRTC1D = 1;
+ NbSetupData->RDTC1D = 1;
+ NbSetupData->DIMMODTT = 1;
+ NbSetupData->WRDST = 0;
+ NbSetupData->WREQT = 1;
+
+ NbSetupData->RDODTT = 1;
+ NbSetupData->RDEQT = 0;
+ NbSetupData->RDAPT = 1;
+ NbSetupData->WRTC2D = 1;
+ NbSetupData->RDTC2D = 1;
+ NbSetupData->CMDVC = 1;
+ NbSetupData->WRVC2D = 1;
+ NbSetupData->RDVC2D = 1;
+ NbSetupData->LCT = 1;
+ NbSetupData->RTL = 1;
+ NbSetupData->TAT = 1;
+ NbSetupData->MEMTST = 0;
+ NbSetupData->DIMMODTT1D = 0;
+ NbSetupData->WRSRT = 0;
+ NbSetupData->DIMMRONT = 1;
+ NbSetupData->ALIASCHK = 1;
+ NbSetupData->RCVENC1D = 1;
+ NbSetupData->RMC = 1;
+
+ NbSetupData->ClttConfig = 0;
+ NbSetupData->Altitude = 0;
+ NbSetupData->Tcrit = 0;
+ NbSetupData->Thigh = 0;
+ NbSetupData->BwLimitTf = 1023;
+ NbSetupData->WarmThreshold = 0;
+ NbSetupData->BwLimitWarm = 0;
+ NbSetupData->HotThreshold = 0;
+ NbSetupData->BwLimitHot = 0;
+ NbSetupData->DoubleRefreshControl = 0;
+
+ NbSetupData->ReadVref = 0;
+ NbSetupData->InternalReadVref = 0;
+
+ NbSetupData->NBDxeSubSystemVendorId = V_SA_MC_VID;
+ NbSetupData->NBDxeSubSystemId = 0x2010;
+
+ NbSetupData->IgdBootType = 0;
+ NbSetupData->DisplayPipeB = 0;
+ NbSetupData->LcdPanelType = 0;
+ NbSetupData->SdvoPanelType = 0;
+ NbSetupData->LcdPanelScaling = 0;
+ NbSetupData->GtOcSupport = 0;
+ NbSetupData->GtVoltageOffset = 0;
+ NbSetupData->GtMaxOcTurboRatio = 0x16;
+ NbSetupData->GtVoltageOverride = 0;
+ NbSetupData->GtExtraTurboVoltage = 0;
+ NbSetupData->SaVoltageOffset = 0;
+ NbSetupData->GtVoltageMode = 0;
+ NbSetupData->IoaVoltageOffset = 0;
+ NbSetupData->IodVoltageOffset = 0;
+
+ NbSetupData->IgdLcdBlc = 0;
+ NbSetupData->IgdLcdIBia = 6;
+ NbSetupData->IgdLcdSSCC = 1;
+ NbSetupData->IgdTV1Standard = 0;
+ NbSetupData->IgdTV2Standard = 0;
+ NbSetupData->AlsEnable = 0;
+ NbSetupData->ActiveLFP = 1;
+ NbSetupData->LfpColorDepth = 0;
+ NbSetupData->AlwaysEnablePeg = 0;
+ for(i = 0; i < 3; i++) {
+ NbSetupData->PegAspm[i] = 3;
+ NbSetupData->PegAspmL0s[i] = 3;
+ NbSetupData->PegDeEmphasis[i] = 1;
+ NbSetupData->LtrEnable[i] = 1;
+ NbSetupData->LtrMaxSnoopLatency[i] = V_SA_LTR_MAX_SNOOP_LATENCY_VALUE;
+ NbSetupData->LtrMaxNoSnoopLatency[i] = V_SA_LTR_MAX_NON_SNOOP_LATENCY_VALUE;
+ NbSetupData->ObffEnable[i] = 1;
+ NbSetupData->PowerDownUnusedBundles[i] = 0xFF;
+ }
+ NbSetupData->PegSamplerCalibrate = 2;
+ NbSetupData->SwingControl = 0;
+ NbSetupData->PegComplianceTestingMode = 0;
+ NbSetupData->PegGen3Equalization = 1;
+ NbSetupData->PegGen3EqualizationPhase2 = 2;
+ NbSetupData->PegGen3PresetSearch = 0;
+ NbSetupData->PegGen3ForcePresetSearch = 0;
+ NbSetupData->PegGen3PresetSearchDwellTime = 1000;
+ NbSetupData->PegGen3PresetSearchMarginSteps = 2;
+ NbSetupData->PegGen3PresetSearchStartMargin = 15;
+ NbSetupData->PegGen3PresetSearchVoltageMarginSteps = 2;
+ NbSetupData->PegGen3PresetSearchVoltageStartMargin = 20;
+ NbSetupData->PegGen3PresetSearchFavorTiming = 0;
+ NbSetupData->PegGen3PresetSearchErrorTarget = 1;
+ //do not use i[16]
+ for(i = 0; i < 16; i++) {
+ NbSetupData->Gen3RootPortPreset[i] = 8;
+ NbSetupData->Gen3EndPointPreset[i] = 7;
+ NbSetupData->Gen3EndPointHint[i] = 2;
+ }
+
+ for (i = 0; i < 8 ; i++ ) {
+ NbSetupData->Gen3RxCtleP[i] = 8;
+ }
+
+ NbSetupData->InitPcieAspmAfterOprom = 0;
+ NbSetupData->AllowPerstGpioUsage = 1;
+ NbSetupData->AllowPerstGpio = 50;
+ NbSetupData->AllowPerstGpioActive = 0;
+ NbSetupData->RxCEMLoopback = 0;
+ NbSetupData->RxCEMLoopbackLane = 0;
+ NbSetupData->IGfxForceDisable = 1;
+ NbSetupData->GfxTurboIMON = 31;
+ NbSetupData->RenderStandby = 1;
+ NbSetupData->DeepRenderStandby = 1;
+ NbSetupData->PrimaryDisplay = 3;
+ NbSetupData->DetectNonComplaint = 0;
+ NbSetupData->PrimaryPeg = 0;
+ NbSetupData->PrimaryPcie = 0;
+ NbSetupData->IGpuPortConfig = 1;
+ NbSetupData->DigitalPortBMode = 0;
+ NbSetupData->DigitalPortCMode = 0;
+ NbSetupData->DigitalPortDMode = 0;
+ NbSetupData->InternalGraphics = 2;
+ NbSetupData->GTTSize = 2;
+ NbSetupData->ApertureSize = 2;
+ NbSetupData->PanelPowerEnable = 0;
+ NbSetupData->IgdDvmt50PreAlloc = 2;
+ NbSetupData->IgdDvmt50TotalAlloc = 2;
+ NbSetupData->LowPowerMode = 1;
+ NbSetupData->EnableVtd = 0;
+ NbSetupData->SaDevice7 = 0;
+ NbSetupData->SaDevice4 = 0;
+ NbSetupData->SaAudioEnable = 0;
+ NbSetupData->NbSaHdaVerbTable = gNbSaHdaVerbTable;
+ NbSetupData->NbSaHdaVerbTable->VerbTableData = gNbSaHdaVerbTableData;
+ NbSetupData->NbSaHdaVerbTableNum = sizeof (gNbSaHdaVerbTable) / sizeof (NB_SA_HDA_VERB_TABLE);
+// NbSetupData->SaHdmiCodecPortB = 0;
+// NbSetupData->SaHdmiCodecPortC = 0;
+// NbSetupData->SaHdmiCodecPortD = 1;
+ NbSetupData->EnableNbCrid = 0;
+ NbSetupData->ChHashEnable = 1;
+ NbSetupData->ChHashMask = 0x30CE;
+ NbSetupData->ChHashInterleaveBit = 1;
+ NbSetupData->DqPinsInterleaved = FALSE;
+ NbSetupData->MaxTolud = 0;
+ NbSetupData->OcDdrFreqLimit = 1333;
+ NbSetupData->DdrFreqLimit = 0;
+ NbSetupData->MemoryThermalManagement = 1;
+ NbSetupData->ThermalThresholdWarm = 80;
+ NbSetupData->ThermalThresholdHot = 90;
+ NbSetupData->ThermalThresholdCritical = 100;
+ NbSetupData->PeciInjectedTemp = 0;
+ NbSetupData->ExttsViaTsOnBoard = 0;
+ NbSetupData->ExttsViaTsOnDimm = 0;
+ NbSetupData->VirtualTempSensor = 0;
+ NbSetupData->SpdProfileSelected = 0;
+ NbSetupData->DDRLVOption = 0;
+ NbSetupData->DDRVoltageWaitTime = 2000000;
+ NbSetupData->EccSupport = 1;
+ NbSetupData->NModeSupport = 0;
+ NbSetupData->ScramblerSupport = 1;
+ NbSetupData->WeaklockEn = 1;
+ NbSetupData->McLock = 1;
+ NbSetupData->AutoSelfRefreshSupport = TRUE;
+ NbSetupData->ExtTemperatureSupport = TRUE;
+
+ NbSetupData->CAVrefCtlOffset = 6;
+ NbSetupData->Ch0VrefCtlOffset = 6;
+ NbSetupData->Ch1VrefCtlOffset = 6;
+ NbSetupData->Ch0ClkPiCodeOffset = 6;
+ NbSetupData->Ch1ClkPiCodeOffset = 6;
+ NbSetupData->Ch0RcvEnOffset = 3;
+ NbSetupData->Ch0RxDqsOffset = 3;
+ NbSetupData->Ch0TxDqOffset = 3;
+ NbSetupData->Ch0TxDqsOffset = 3;
+ NbSetupData->Ch0VrefOffset = 6;
+ NbSetupData->Ch1RcvEnOffset = 3;
+ NbSetupData->Ch1RxDqsOffset = 3;
+ NbSetupData->Ch1TxDqOffset = 3;
+ NbSetupData->Ch1TxDqsOffset = 3;
+ NbSetupData->Ch1VrefOffset = 6;
+
+ NbSetupData->BClkFrequency = 100 * 1000 * 1000;
+ NbSetupData->MaxRttWr = 0;
+
+#if MRC_DEBUG_PRINT_SUPPORT
+ NbSetupData->MrcFastBoot = 0;
+ NbSetupData->RmtCrosserEnable = 1;
+ NbSetupData->BdatAcpiTableSupport = 1;
+#else
+ NbSetupData->MrcFastBoot = 1;
+ NbSetupData->RmtCrosserEnable = 0;
+ NbSetupData->BdatAcpiTableSupport = 0;
+#endif
+ NbSetupData->ForceColdReset = 0;
+ NbSetupData->RemapEnable = 1;
+ NbSetupData->DisableDimmChannel0 = 0;
+ NbSetupData->DisableDimmChannel1 = 0;
+ NbSetupData->ExitMode = 0xff;
+ NbSetupData->PowerDownMode0 = 0x06;
+ NbSetupData->PowerDownMode1 = 0xff;
+ NbSetupData->PwdwnIdleCounter = 0x80;
+ NbSetupData->EnhancedInterleave = 1;
+ NbSetupData->RankInterleave = 1;
+ NbSetupData->DmiVc1 = 1;
+ NbSetupData->DmiVcp = 1;
+ NbSetupData->DmiVcm = 1;
+ NbSetupData->DmiGen2 = 2;
+ NbSetupData->DmiDeEmphasis = 0;
+ NbSetupData->DmiIot = 0;
+ NbSetupData->C7Allowed = 0;
+
+ NbSetupData->PegGenx0 = 0;
+ NbSetupData->PegGenx1 = 0;
+ NbSetupData->PegGenx2 = 0;
+ NbSetupData->NBDmiAspm = 0;
+ NbSetupData->NBDmiExtSync = 0;
+ NbSetupData->LockPTMregs = 0;
+ NbSetupData->Refresh2X = 0;
+ NbSetupData->Refresh2XMode = 0;
+ NbSetupData->LpddrThermalSensor = 1;
+ NbSetupData->SrefCfgEna = 1;
+ NbSetupData->SrefCfgIdleTmr = 512;
+ NbSetupData->ThrtCkeMinDefeat = 1;
+ NbSetupData->ThrtCkeMinTmr = 48;
+ NbSetupData->ThrtCkeMinDefeatLpddr = 1;
+ NbSetupData->ThrtCkeMinTmrLpddr = 64;
+ NbSetupData->EnablePwrDn = 1;
+ NbSetupData->EnablePwrDnLpddr = 0;
+ NbSetupData->EnableExtts = 0;
+ NbSetupData->EnableCltm = 0;
+ NbSetupData->EnableOltm = 0;
+ NbSetupData->WarmThresholdCh0Dimm0 = 0xFF;
+ NbSetupData->WarmThresholdCh0Dimm1 = 0xFF;
+ NbSetupData->WarmThresholdCh1Dimm0 = 0xFF;
+ NbSetupData->WarmThresholdCh1Dimm1 = 0xFF;
+ NbSetupData->HotThresholdCh0Dimm0 = 0xFF;
+ NbSetupData->HotThresholdCh0Dimm1 = 0xFF;
+ NbSetupData->HotThresholdCh1Dimm0 = 0xFF;
+ NbSetupData->HotThresholdCh1Dimm1 = 0xFF;
+ NbSetupData->WarmBudgetCh0Dimm0 = 0xFF;
+ NbSetupData->WarmBudgetCh0Dimm1 = 0xFF;
+ NbSetupData->WarmBudgetCh1Dimm0 = 0xFF;
+ NbSetupData->WarmBudgetCh1Dimm1 = 0xFF;
+ NbSetupData->HotBudgetCh0Dimm0 = 0xFF;
+ NbSetupData->HotBudgetCh0Dimm1 = 0xFF;
+ NbSetupData->HotBudgetCh1Dimm0 = 0xFF;
+ NbSetupData->HotBudgetCh1Dimm1 = 0xFF;
+ NbSetupData->UserPowerWeightsEn = 0;
+ NbSetupData->EnergyScaleFact = 4;
+ NbSetupData->IdleEnergyCh0Dimm1 = 10;
+ NbSetupData->IdleEnergyCh0Dimm0 = 10;
+ NbSetupData->IdleEnergyCh1Dimm1 = 10;
+ NbSetupData->IdleEnergyCh1Dimm0 = 10;
+ NbSetupData->PdEnergyCh0Dimm1 = 6;
+ NbSetupData->PdEnergyCh0Dimm0 = 6;
+ NbSetupData->PdEnergyCh1Dimm1 = 6;
+ NbSetupData->PdEnergyCh1Dimm0 = 6;
+ NbSetupData->ActEnergyCh0Dimm1 = 172;
+ NbSetupData->ActEnergyCh0Dimm0 = 172;
+ NbSetupData->ActEnergyCh1Dimm1 = 172;
+ NbSetupData->ActEnergyCh1Dimm0 = 172;
+ NbSetupData->RdEnergyCh0Dimm1 = 212;
+ NbSetupData->RdEnergyCh0Dimm0 = 212;
+ NbSetupData->RdEnergyCh1Dimm1 = 212;
+ NbSetupData->RdEnergyCh1Dimm0 = 212;
+ NbSetupData->WrEnergyCh0Dimm1 = 221;
+ NbSetupData->WrEnergyCh0Dimm0 = 221;
+ NbSetupData->WrEnergyCh1Dimm1 = 221;
+ NbSetupData->WrEnergyCh1Dimm0 = 221;
+ NbSetupData->RaplPwrFlCh1 = 0;
+ NbSetupData->RaplPwrFlCh0 = 0;
+ NbSetupData->RaplLim2Lock = 0;
+ NbSetupData->RaplLim2WindX = 1;
+ NbSetupData->RaplLim2WindY = 10;
+ NbSetupData->RaplLim2Ena = 0;
+ NbSetupData->RaplLim2Pwr = 222;
+ NbSetupData->RaplLim1WindX = 0;
+ NbSetupData->RaplLim1WindY = 0;
+ NbSetupData->RaplLim1Ena = 0;
+ NbSetupData->RaplLim1Pwr = 0;
+ NbSetupData->IsRunMemoryDown = 0;
+ NbSetupData->tCL = 4;
+ NbSetupData->tRCD = 3;
+ NbSetupData->tRP = 3;
+ NbSetupData->tRAS = 9;
+ NbSetupData->tWR = 5;
+ NbSetupData->tRFC = 15;
+ NbSetupData->tRRD = 4;
+ NbSetupData->tWTR = 3;
+ NbSetupData->tRTP = 4;
+ NbSetupData->tRC = 1;
+ NbSetupData->tFAW = 10;
+ NbSetupData->tCWL = 5;
+ NbSetupData->tREFI = 1;
+ NbSetupData->tRPab = 4;
+ // SmbiosLogging Setup
+ NbSetupData->SmbiosLogging = 0;
+ NbSetupData->AcpiLowPowerS0Idle = 1;
+ // Porting End
+
+ if (Pei) {
+ PeiServices = (EFI_PEI_SERVICES **)Services;
+ Status = (*PeiServices)->LocatePpi( PeiServices, \
+ &gPeiReadOnlyVar2PpiGuid, \
+ 0, \
+ NULL, \
+ &ReadOnlyVariable );
+
+ if (!EFI_ERROR(Status)) {
+ Status = ReadOnlyVariable->GetVariable( ReadOnlyVariable, \
+ L"Setup", \
+ &gSetupGuid, \
+ NULL, \
+ &VariableSize, \
+ &SetupData );
+ }
+ } else {
+ RunServices = (EFI_RUNTIME_SERVICES *)Services;
+ Status = RunServices->GetVariable( L"Setup", \
+ &gSetupGuid, \
+ NULL, \
+ &VariableSize, \
+ &SetupData );
+ }
+
+
+ if (EFI_ERROR(Status)) {
+ NbOemSetupCallbacks( Services, NbSetupData, NULL, Pei );
+ } else {
+ NbOemSetupCallbacks( Services, NbSetupData, &SetupData, Pei );
+ }
+
+
+}
+
+#if defined NB_SETUP_SUPPORT && NB_SETUP_SUPPORT == 1
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NbSetupCallbacks
+//
+// Description: This function returns NB Chipset setup data from system SetupData
+// variable
+//
+// Input: *Services - Pointer to PeiServices or RuntimeServices
+// structure
+// *NbSetupData - Pointer to custom setup data to return
+// *SetupData - Pointer to system setup data.
+// Pei - Pei flag. If TRUE we are in PEI phase
+//
+// Output: None
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID NbSetupCallbacks (
+ IN VOID *Services,
+ IN OUT NB_SETUP_DATA *NbSetupData,
+ IN SETUP_DATA *SetupData,
+ IN BOOLEAN Pei )
+{
+ UINTN i;
+
+ if (SetupData != NULL) {
+
+ // Porting Start
+ NbSetupData->GdxcEnable = SetupData->GdxcEnable;
+ // Update NB_SETUP_DATA according to the setup datas.
+ NbSetupData->IgdBootType = SetupData->IgdBootType;
+ NbSetupData->DisplayPipeB = SetupData->DisplayPipeB;
+ NbSetupData->LcdPanelType = SetupData->LcdPanelType;
+ NbSetupData->SdvoPanelType = SetupData->SdvoPanelType;
+ NbSetupData->LcdPanelScaling = SetupData->LcdPanelScaling;
+ NbSetupData->IgdLcdBlc = SetupData->IgdLcdBlc;
+ NbSetupData->IgdLcdIBia = SetupData->IgdLcdIBia;
+ NbSetupData->IgdLcdSSCC = SetupData->IgdLcdSSCC;
+ NbSetupData->IgdTV1Standard = SetupData->IgdTV1Standard;
+ NbSetupData->IgdTV2Standard = SetupData->IgdTV2Standard;
+ NbSetupData->AlsEnable = SetupData->AlsEnable;
+ NbSetupData->ActiveLFP = SetupData->ActiveLFP;
+ NbSetupData->LfpColorDepth = SetupData->LfpColorDepth;
+ NbSetupData->AlwaysEnablePeg = SetupData->AlwaysEnablePeg;
+ for(i = 0; i < 3; i++) {
+ NbSetupData->PegAspm[i] = SetupData->PegAspm[i];
+ NbSetupData->PegAspmL0s[i] = SetupData->PegAspmL0s[i];
+ NbSetupData->PegDeEmphasis[i] = SetupData->PegDeEmphasis[i];
+ }
+ NbSetupData->PegSamplerCalibrate = SetupData->PegSamplerCalibrate;
+ NbSetupData->SwingControl = SetupData->SwingControl;
+ NbSetupData->PegGen3Equalization = SetupData->PegGen3Equalization;
+ NbSetupData->PegGen3EqualizationPhase2 = SetupData->PegGen3EqualizationPhase2;
+ NbSetupData->PegGen3PresetSearch = SetupData->PegGen3PresetSearch;
+ NbSetupData->PegGen3ForcePresetSearch = SetupData->PegGen3ForcePresetSearch;
+ NbSetupData->PegGen3PresetSearchDwellTime = SetupData->PegGen3PresetSearchDwellTime;
+ NbSetupData->PegGen3PresetSearchMarginSteps = SetupData->PegGen3PresetSearchMarginSteps;
+ NbSetupData->PegGen3PresetSearchStartMargin = SetupData->PegGen3PresetSearchStartMargin;
+ NbSetupData->PegGen3PresetSearchVoltageMarginSteps = SetupData->PegGen3PresetSearchVoltageMarginSteps;
+ NbSetupData->PegGen3PresetSearchVoltageStartMargin = SetupData->PegGen3PresetSearchVoltageStartMargin;
+ NbSetupData->PegGen3PresetSearchFavorTiming = SetupData->PegGen3PresetSearchFavorTiming;
+ NbSetupData->PegGen3PresetSearchErrorTarget = SetupData->PegGen3PresetSearchErrorTarget;
+ //do not use i[16]
+ for(i = 0; i < 16; i++) {
+ NbSetupData->Gen3RootPortPreset[i] = SetupData->Gen3RootPortPreset[i];
+ NbSetupData->Gen3EndPointPreset[i] = SetupData->Gen3EndPointPreset[i];
+ NbSetupData->Gen3EndPointHint[i] = SetupData->Gen3EndPointHint[i];
+ }
+
+ for (i = 0; i < 8 ; i++ ) {
+ NbSetupData->Gen3RxCtleP[i] = SetupData->Gen3RxCtleP[i];
+ }
+ NbSetupData->InitPcieAspmAfterOprom = SetupData->InitPcieAspmAfterOprom;
+ NbSetupData->AllowPerstGpioUsage = SetupData->AllowPerstGpioUsage;
+ NbSetupData->RxCEMLoopback = SetupData->RxCEMLoopback;
+ NbSetupData->RxCEMLoopbackLane = SetupData->RxCEMLoopbackLane;
+ NbSetupData->IGfxForceDisable = SetupData->IGfxForceDisable;
+ NbSetupData->GfxTurboIMON = SetupData->GfxTurboIMON;
+ NbSetupData->RenderStandby = SetupData->RenderStandby;
+ NbSetupData->DeepRenderStandby = SetupData->DeepRenderStandby;
+ NbSetupData->GtOcSupport = SetupData->GtOcSupport;
+ NbSetupData->GtMaxOcTurboRatio = SetupData->GtMaxOcTurboRatio;
+ NbSetupData->GtExtraTurboVoltage = SetupData->GtExtraTurboVoltage;
+ NbSetupData->PrimaryDisplay = SetupData->PrimaryDisplay;
+ NbSetupData->DetectNonComplaint = SetupData->DetectNonComplaint;
+ NbSetupData->PrimaryPeg = SetupData->PrimaryPeg;
+ NbSetupData->PrimaryPcie = SetupData->PrimaryPcie;
+ NbSetupData->IGpuPortConfig = SetupData->IGpuPortConfig;
+ NbSetupData->DigitalPortBMode = SetupData->DigitalPortBMode;
+ NbSetupData->DigitalPortCMode = SetupData->DigitalPortCMode;
+ NbSetupData->DigitalPortDMode = SetupData->DigitalPortDMode;
+ NbSetupData->InternalGraphics = SetupData->InternalGraphics;
+ NbSetupData->GTTSize = SetupData->GTTSize;
+ NbSetupData->ApertureSize = SetupData->ApertureSize;
+ NbSetupData->IgdDvmt50PreAlloc = SetupData->IgdDvmt50PreAlloc;
+ NbSetupData->IgdDvmt50TotalAlloc = SetupData->IgdDvmt50TotalAlloc;
+ NbSetupData->LowPowerMode = SetupData->LowPowerMode;
+ NbSetupData->EnableVtd = SetupData->EnableVtd;
+ NbSetupData->SaDevice7 = SetupData->SaDevice7;
+ NbSetupData->SaDevice4 = SetupData->SaDevice4;
+ NbSetupData->SaAudioEnable = SetupData->SaAudioEnable;
+ NbSetupData->C7Allowed = SetupData->C7Allowed;
+ // NbSetupData->SaHdmiCodecPortB = SetupData->SaHdmiCodecPortB;
+ // NbSetupData->SaHdmiCodecPortC = SetupData->SaHdmiCodecPortC;
+ // NbSetupData->SaHdmiCodecPortD = SetupData->SaHdmiCodecPortD;
+
+ NbSetupData->EnableNbCrid = SetupData->EnableNbCrid;
+ NbSetupData->ChHashEnable = SetupData->ChHashEnable;
+ NbSetupData->ChHashMask = SetupData->ChHashMask;
+ NbSetupData->ChHashInterleaveBit = SetupData->ChHashInterleaveBit;
+ NbSetupData->BdatAcpiTableSupport = SetupData->BdatAcpiTableSupport;
+ NbSetupData->MaxTolud = SetupData->MaxTolud;
+ NbSetupData->DdrFreqLimit = SetupData->DdrFreqLimit;
+ NbSetupData->OcDdrFreqLimit = SetupData->OcDdrFreqLimit;
+ NbSetupData->MemoryThermalManagement = SetupData->MemoryThermalManagement;
+ NbSetupData->PeciInjectedTemp = SetupData->PeciInjectedTemp;
+ NbSetupData->ExttsViaTsOnBoard = SetupData->ExttsViaTsOnBoard;
+ NbSetupData->ExttsViaTsOnDimm = SetupData->ExttsViaTsOnDimm;
+ NbSetupData->VirtualTempSensor = SetupData->VirtualTempSensor;
+ NbSetupData->SpdProfileSelected = SetupData->SpdProfileSelected;
+ NbSetupData->DDRLVOption = SetupData->DDRLVOption;
+ NbSetupData->DDRVoltageWaitTime = SetupData->DDRVoltageWaitTime;
+ NbSetupData->EccSupport = SetupData->EccSupport;
+ NbSetupData->NModeSupport = SetupData->NModeSupport;
+ NbSetupData->ScramblerSupport = SetupData->ScramblerSupport;
+ NbSetupData->RmtCrosserEnable = SetupData->RmtCrosserEnable;
+ NbSetupData->MrcFastBoot = SetupData->MrcFastBoot;
+ NbSetupData->ForceColdReset = SetupData->ForceColdReset;
+
+ NbSetupData->RemapEnable = SetupData->RemapEnable;
+ NbSetupData->DisableDimmChannel0 = SetupData->DisableDimmChannel0;
+ NbSetupData->DisableDimmChannel1 = SetupData->DisableDimmChannel1;
+ NbSetupData->ExitMode = SetupData->ExitMode;
+ NbSetupData->PowerDownMode0 = SetupData->PowerDownMode0;
+ NbSetupData->PowerDownMode1 = SetupData->PowerDownMode1;
+ NbSetupData->PwdwnIdleCounter = SetupData->PwdwnIdleCounter;
+ NbSetupData->EnhancedInterleave = SetupData->EnhancedInterleave;
+ NbSetupData->RankInterleave = SetupData->RankInterleave;
+ NbSetupData->WeaklockEn = SetupData->WeaklockEn;
+ NbSetupData->McLock = SetupData->McLock;
+ NbSetupData->DmiVc1 = SetupData->DmiVc1;
+ NbSetupData->DmiVcp = SetupData->DmiVcp;
+ NbSetupData->DmiVcm = SetupData->DmiVcm;
+ NbSetupData->DmiGen2 = SetupData->DmiGen2;
+ NbSetupData->DmiDeEmphasis = SetupData->DmiDeEmphasis;
+ NbSetupData->DmiIot = SetupData->DmiIot;
+ NbSetupData->PegGenx0 = SetupData->PegGenx0;
+ NbSetupData->PegGenx1 = SetupData->PegGenx1;
+ NbSetupData->PegGenx2 = SetupData->PegGenx2;
+ NbSetupData->NBDmiAspm = SetupData->NBDmiAspm;
+ NbSetupData->NBDmiExtSync = SetupData->NBDmiExtSync;
+ NbSetupData->LockPTMregs = SetupData->LockPTMregs;
+ NbSetupData->Refresh2X = SetupData->Refresh2X;
+ if (SetupData->Refresh2X)
+ NbSetupData->Refresh2XMode = SetupData->Refresh2XMode;
+ else
+ NbSetupData->Refresh2XMode = 0;
+ NbSetupData->LpddrThermalSensor = SetupData->LpddrThermalSensor;
+ NbSetupData->SrefCfgEna = SetupData->SrefCfgEna;
+ NbSetupData->SrefCfgIdleTmr = SetupData->SrefCfgIdleTmr;
+ NbSetupData->ThrtCkeMinDefeat = SetupData->ThrtCkeMinDefeat;
+ NbSetupData->ThrtCkeMinTmr = SetupData->ThrtCkeMinTmr;
+ NbSetupData->ThrtCkeMinDefeatLpddr = SetupData->ThrtCkeMinDefeatLpddr;
+ NbSetupData->ThrtCkeMinTmrLpddr = SetupData->ThrtCkeMinTmrLpddr;
+ NbSetupData->EnablePwrDnLpddr = SetupData->EnablePwrDnLpddr;
+ NbSetupData->EnableExtts = SetupData->EnableExtts;
+ NbSetupData->EnableCltm = SetupData->EnableCltm;
+ NbSetupData->EnableOltm = SetupData->EnableOltm;
+ NbSetupData->WarmThresholdCh0Dimm0 = SetupData->WarmThresholdCh0Dimm0;
+ NbSetupData->WarmThresholdCh0Dimm1 = SetupData->WarmThresholdCh0Dimm1;
+ NbSetupData->WarmThresholdCh1Dimm0 = SetupData->WarmThresholdCh1Dimm0;
+ NbSetupData->WarmThresholdCh1Dimm1 = SetupData->WarmThresholdCh1Dimm1;
+ NbSetupData->HotThresholdCh0Dimm0 = SetupData->HotThresholdCh0Dimm0;
+ NbSetupData->HotThresholdCh0Dimm1 = SetupData->HotThresholdCh0Dimm1;
+ NbSetupData->HotThresholdCh1Dimm0 = SetupData->HotThresholdCh1Dimm0;
+ NbSetupData->HotThresholdCh1Dimm1 = SetupData->HotThresholdCh1Dimm1;
+ NbSetupData->WarmBudgetCh0Dimm0 = SetupData->WarmBudgetCh0Dimm0;
+ NbSetupData->WarmBudgetCh0Dimm1 = SetupData->WarmBudgetCh0Dimm1;
+ NbSetupData->WarmBudgetCh1Dimm0 = SetupData->WarmBudgetCh1Dimm0;
+ NbSetupData->WarmBudgetCh1Dimm1 = SetupData->WarmBudgetCh1Dimm1;
+ NbSetupData->HotBudgetCh0Dimm0 = SetupData->HotBudgetCh0Dimm0;
+ NbSetupData->HotBudgetCh0Dimm1 = SetupData->HotBudgetCh0Dimm1;
+ NbSetupData->HotBudgetCh1Dimm0 = SetupData->HotBudgetCh1Dimm0;
+ NbSetupData->HotBudgetCh1Dimm1 = SetupData->HotBudgetCh1Dimm1;
+
+ NbSetupData->UserPowerWeightsEn = SetupData->UserPowerWeightsEn;
+ NbSetupData->EnergyScaleFact = SetupData->EnergyScaleFact;
+ NbSetupData->IdleEnergyCh0Dimm1 = SetupData->IdleEnergyCh0Dimm1;
+ NbSetupData->IdleEnergyCh0Dimm0 = SetupData->IdleEnergyCh0Dimm0;
+ NbSetupData->IdleEnergyCh1Dimm1 = SetupData->IdleEnergyCh1Dimm1;
+ NbSetupData->IdleEnergyCh1Dimm0 = SetupData->IdleEnergyCh1Dimm0;
+ NbSetupData->PdEnergyCh0Dimm1 = SetupData->PdEnergyCh0Dimm1;
+ NbSetupData->PdEnergyCh0Dimm0 = SetupData->PdEnergyCh0Dimm0;
+ NbSetupData->PdEnergyCh1Dimm1 = SetupData->PdEnergyCh1Dimm1;
+ NbSetupData->PdEnergyCh1Dimm0 = SetupData->PdEnergyCh1Dimm0;
+ NbSetupData->ActEnergyCh0Dimm1 = SetupData->ActEnergyCh0Dimm1;
+ NbSetupData->ActEnergyCh0Dimm0 = SetupData->ActEnergyCh0Dimm0;
+ NbSetupData->ActEnergyCh1Dimm1 = SetupData->ActEnergyCh1Dimm1;
+ NbSetupData->ActEnergyCh1Dimm0 = SetupData->ActEnergyCh1Dimm0;
+ NbSetupData->RdEnergyCh0Dimm1 = SetupData->RdEnergyCh0Dimm1;
+ NbSetupData->RdEnergyCh0Dimm0 = SetupData->RdEnergyCh0Dimm0;
+ NbSetupData->RdEnergyCh1Dimm1 = SetupData->RdEnergyCh1Dimm1;
+ NbSetupData->RdEnergyCh1Dimm0 = SetupData->RdEnergyCh1Dimm0;
+ NbSetupData->WrEnergyCh0Dimm1 = SetupData->WrEnergyCh0Dimm1;
+ NbSetupData->WrEnergyCh0Dimm0 = SetupData->WrEnergyCh0Dimm0;
+ NbSetupData->WrEnergyCh1Dimm1 = SetupData->WrEnergyCh1Dimm1;
+ NbSetupData->WrEnergyCh1Dimm0 = SetupData->WrEnergyCh1Dimm0;
+
+ NbSetupData->RaplPwrFlCh1 = SetupData->RaplPwrFlCh1;
+ NbSetupData->RaplPwrFlCh0 = SetupData->RaplPwrFlCh0;
+ NbSetupData->RaplLim2Lock = SetupData->RaplLim2Lock;
+ NbSetupData->RaplLim2WindX = SetupData->RaplLim2WindX;
+ NbSetupData->RaplLim2WindY = SetupData->RaplLim2WindY;
+ NbSetupData->RaplLim2Ena = SetupData->RaplLim2Ena;
+ NbSetupData->RaplLim2Pwr = SetupData->RaplLim2Pwr;
+ NbSetupData->RaplLim1WindX = SetupData->RaplLim1WindX;
+ NbSetupData->RaplLim1WindY = SetupData->RaplLim1WindY;
+ NbSetupData->RaplLim1Ena = SetupData->RaplLim1Ena;
+ NbSetupData->RaplLim1Pwr = SetupData->RaplLim1Pwr;
+
+ NbSetupData->tCL = SetupData->tCL;
+ NbSetupData->tRCD = SetupData->tRCD;
+ NbSetupData->tRP = SetupData->tRP;
+ NbSetupData->tRAS = SetupData->tRAS;
+ NbSetupData->tWR = SetupData->tWR;
+ NbSetupData->tRFC = SetupData->tRFC;
+ NbSetupData->tRRD = SetupData->tRRD;
+ NbSetupData->tWTR = SetupData->tWTR;
+ NbSetupData->tRTP = SetupData->tRTP;
+ NbSetupData->tRC = SetupData->tRC;
+ NbSetupData->tFAW = SetupData->tFAW;
+ NbSetupData->tCWL = SetupData->tCWL;
+ NbSetupData->tREFI = SetupData->tREFI;
+ NbSetupData->tRPab = SetupData->tRPab;
+ // SmbiosLogging Setup
+#if defined (ErrorLogging_SUPPORT) && ErrorLogging_SUPPORT == 1
+ NbSetupData->SmbiosLogging = SetupData->SmbiosLogging;
+#endif
+
+#if defined (LOW_POWER_S0_IDLE_CAPABLE) && LOW_POWER_S0_IDLE_CAPABLE == 1
+ #if defined (PCH_SKU) && PCH_SKU == 1
+ NbSetupData->AcpiLowPowerS0Idle = !(SetupData->AcpiLowPowerS0Idle);
+ #else
+ NbSetupData->AcpiLowPowerS0Idle = 0;
+ #endif
+#endif
+ // Porting End
+ }
+}
+
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/NB/NB.H b/Board/NB/NB.H
new file mode 100644
index 0000000..95cee65
--- /dev/null
+++ b/Board/NB/NB.H
@@ -0,0 +1,331 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NB.H 3 10/14/12 12:42a Jeffch $
+//
+// $Revision: 3 $
+//
+// $Date: 10/14/12 12:42a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NB.H $
+//
+// 3 10/14/12 12:42a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Update by XTU4.0.
+// [Files] NB.h, GetSetupData.c, NbSetupData.h
+// [TAG] None
+// [Severity] Important
+// [Description] Follow Update by Mahobay.
+// [Files] NB.sdl, NB.mak.c; NBDXEBoard.c
+//
+// 2 9/26/12 9:28a Yurenlai
+// [TAG] EIP101495
+// [Category] Improvement
+// [Severity] Important
+// [Description] Initialize SSID of B0:D3:F0 and B0:D2:F0/F1.
+// [Files] NB.h, NB.sdl, NBPEI.c
+//
+// 1 2/08/12 4:32a Yurenlai
+// Intel Haswell/NB eChipset initially releases.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: NB.h
+//
+// Description: North Bridge header file, define all the North Bridge
+// specific equates and structures in this file.
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#ifndef _NB_H__ // To Avoid this header get compiled twice
+#define _NB_H__
+
+#include <Token.h>
+#include "ReferenceCode\Chipset\SystemAgent\Include\SaRegs.h"
+
+// DO NOT REMOVE THE DEFINITION OF THIS STRUCTURE. THIS IS USED BY CSM ALSO
+typedef struct ROOT_BRIDGE_MAPPING_TABLE {
+ UINT32 rbUID;
+ UINT8 rbDevFunc;
+} ROOT_BRIDGE_MAPPING_ENTRY;
+
+#define NB_PCI_CFG_ADDRESS(bus, dev, func, reg) \
+ (UINT64) ((((UINT8)(bus) << 24) + ((UINT8)(dev) << 16) + \
+ ((UINT8)(func) << 8) + ((UINT8)(reg))) & 0xffffffff)
+
+#ifdef PCIEX_BASE_ADDRESS
+#define NB_PCIE_CFG_ADDRESS(bus, dev, func, reg) \
+ ((UINTN)(PCIEX_BASE_ADDRESS + ((UINT8)(bus) << 20) + \
+ ((UINT8)(dev) << 15) + ((UINT8)(func) << 12) + (reg)))
+#endif
+
+#ifndef CORE_VERSION
+#define CORE_VERSION ( CORE_MAJOR_VERSION * 1000 + \
+ CORE_MINOR_VERSION * 100 + \
+ CORE_REVISION * 10 + \
+ CORE_BUILD_NUMBER )
+#endif
+
+#ifndef PCIBUS_VERSION
+#define PCIBUS_VERSION ( PCI_BUS_MAJOR_VER * 10000 + \
+ PCI_BUS_MINOR_VER * 100 + \
+ PCI_BUS_REVISION )
+#endif
+
+// For systems with config mechanism 1
+#define NB_PCICFG_SPACE_INDEX_REG 0xcf8
+#define NB_PCICFG_SPACE_DATA_REG 0xcfc
+
+typedef struct {
+ UINT16 MmioReg;
+ UINT32 bAndMask;
+ UINT32 bOrMask;
+} AMI_NB_MMIO_INIT_TABLE_STRUCT;
+
+typedef struct {
+ UINT64 PciAddr;
+ UINT32 Sid;
+} NB_PCI_SUBID_STRUCT;
+
+#define GET_PRIMARY_VGA_PCI_INFO_GUID {0x2fcaa4e9, 0xdc14, 0x4644, 0xbe, 0x51\
+ ,0xd2, 0x33, 0xd8, 0x20, 0xed, 0x4}
+
+#define GET_PRIMARY_VGA_PCI_INFO_VARIABLE L"GetPriVideoPciInfo"
+
+#define NB_ASL_BUFFER_PTR_GUID { 0x30bc0b91, 0x8106, 0x4f6b, 0xb8, 0x5d, \
+ 0x22, 0x47, 0x35, 0xd, 0x95, 0x38 }
+
+#define NB_ASL_BUFFER_PTR_VARIABLE L"NbAslBufferPtrVar"
+
+//-----------------------------------------------------------------------
+// NB : MRC Details
+//-----------------------------------------------------------------------
+
+//#define EFI_NB_MRC_INFO_GUID \
+// {0xd7bd52b0, 0xb2dc, 0x4f08, 0xb4, 0x67, 0xde, 0x50, 0xd7, 0x28, 0xf6, 0xbd}
+
+//#define ALING_1GB_PCI_MMIO_MASK 0xC0000000
+//#define ALING_64M_PCI_MMIO_MASK 0xF0000000
+
+//-----------------------------------------------------------------------
+// NB : Platform Details
+//-----------------------------------------------------------------------
+
+typedef union {
+ UINT32 Data;
+ struct
+ {
+ UINT32 CPUType:4;
+ UINT32 ExtCPUType:4;
+ UINT32 Reserved:24;
+ } Fields;
+} NB_PLATFORM_INFO;
+
+
+typedef struct {
+ UINT8 NbAslByte0;
+ UINT8 NbAslByte1;
+ UINT8 NbAslByte2;
+ UINT8 NbAslByte3;
+ UINT8 NbAslByte4;
+ UINT8 NbAslByte5;
+ UINT8 NbAslByte6;
+ UINT8 NbAslByte7;
+ UINT8 NbAslByte8;
+ UINT8 NbAslByte9;
+ UINT8 NbAslByte10;
+ UINT8 NbAslByte11;
+ UINT8 NbAslByte12;
+ UINT8 NbAslByte13;
+ UINT8 NbAslByte14;
+ UINT8 NbAslByte15;
+} NB_ASL_BUFFER;
+
+//----------------------------------------------------------------------------
+// INTEL Ivy Bridge Processor Host Bridge PCI Bus Number Equates
+//----------------------------------------------------------------------------
+#define NB_BUS 0x00 // North Bridge Bus Number
+#define PCIEBRN_BUS 0x00 // North Bridge PCI Express Bridge
+ // Bus Number
+#define IGD_BUS 0x00 // Integrated Graphics Device
+ // Device Number
+#define SA_HDA_BUS 0x00 //
+//----------------------------------------------------------------------------
+// INTEL Ivy Bridge Processor Host Bridge Device Number Equates
+//----------------------------------------------------------------------------
+#define NB_DEV 0x00 // North Bridge Device Number
+#define PCIEBRN_DEV 0x01 // North Bridge PCI Express Bridge
+ // Device Number
+#define IGD_DEV 0x02 // Integrated Graphics Device
+ // Device Number
+#define SA_HDA_DEV 0x03 //
+ //
+#define PCIEBRN_DEV6 0x06 // North Bridge PCI Express Bridge
+ // Device Number
+//----------------------------------------------------------------------------
+// INTEL Ivy Bridge Processor Host Bridge Function Number Equates
+//----------------------------------------------------------------------------
+#define NB_FUN 0x00 // North Bridge Function Number
+#define PCIEBRN_FUN 0x00 // North Bridge PCI Express Bridge
+ // Function Number
+#define PCIEBRN_FUN1 0x01 // North Bridge PCI Express Bridge
+ // Function Number
+#define PCIEBRN_FUN2 0x02 // North Bridge PCI Express Bridge
+ // Function Number
+#define IGD_FUN 0x00 // Integrated Graphics Device
+ // Function Number 0
+#define IGD_FUN1 0x01 // Integrated Graphics Device
+ // Function Number 1
+#define SA_HDA_FUN 0x0 //
+ //
+//----------------------------------------------------------------------------
+// INTEL Ivy Bridge Processor - PCI Bus/Device/Function/Register Number Macros
+//----------------------------------------------------------------------------
+#define NB_REG(Reg) NB_PCI_CFG_ADDRESS(NB_BUS, NB_DEV, \
+ NB_FUN, Reg)
+#define PCIEBRN_REG(Reg) NB_PCI_CFG_ADDRESS(PCIEBRN_BUS, PCIEBRN_DEV, \
+ PCIEBRN_FUN, Reg)
+#define PCIEBRNx16_REG(Reg) NB_PCI_CFG_ADDRESS(PCIEBRN_BUS, PCIEBRN_DEV, \
+ PCIEBRN_FUN, Reg)
+#define PCIEBRNx8_REG(Reg) NB_PCI_CFG_ADDRESS(PCIEBRN_BUS, PCIEBRN_DEV, \
+ PCIEBRN_FUN1, Reg)
+#define PCIEBRNx4_REG(Reg) NB_PCI_CFG_ADDRESS(PCIEBRN_BUS, PCIEBRN_DEV, \
+ PCIEBRN_FUN2, Reg)
+#define PCIED6BRN_REG(Reg) NB_PCI_CFG_ADDRESS(PCIEBRN_BUS, PCIEBRN_DEV6, \
+ PCIEBRN_FUN, Reg)
+#define IGD_REG(Reg) NB_PCI_CFG_ADDRESS(IGD_BUS, IGD_DEV, \
+ IGD_FUN, Reg)
+#define IGD1_REG(Reg) NB_PCI_CFG_ADDRESS(IGD_BUS, IGD_DEV, \
+ IGD_FUN1, Reg)
+#define SA_HDA_REG(Reg) NB_PCI_CFG_ADDRESS(SA_HDA_BUS, SA_HDA_DEV, \
+ SA_HDA_FUN, Reg)
+
+//----------------------------------------------------------------------------
+// INTEL Ivy Bridge Processor - PCI Bus/Device/Function Number Macros
+//----------------------------------------------------------------------------
+#define NB_BUS_DEV_FUN NB_REG(0)
+#define NB_IGD_BUS_DEV_FUN IGD_REG(0)
+#define NB_IGD_BUS_DEV_FUN1 IGD1_REG(0)
+#define NB_HDA_BUS_DEV_FUN SA_HDA_REG(0)
+#define NB_PCIEBRN_BUS_DEV_FUN PCIEBRNx16_REG(0)
+#define NB_PCIEBRNx16_BUS_DEV_FUN PCIEBRNx16_REG(0)
+#define NB_PCIEBRNx8_BUS_DEV_FUN PCIEBRNx8_REG(0)
+#define NB_PCIEBRNx4_BUS_DEV_FUN PCIEBRNx4_REG(0)
+#define NB_PCIEBRN_BUS_DEV6_FUN PCIED6BRN_REG(0)
+//----------------------------------------------------------------------------
+// INTEL Ivy Bridge Processor - PCI Device/Vendor IDs Equates
+//----------------------------------------------------------------------------
+#define NB_VENID 0x8086 // North Bridge Vendor ID
+#define NB_DEVID 0x0002 // North Bridge Device ID
+#define PCIEBRN_VENID 0x8086 // North Bridge PCI Express Bridge
+ // Vendor ID
+#define PCIEBRN_DEVID 0x0045 // North Bridge PCI Express Bridge
+ // Device ID
+#define IGD_VENID 0x8086 // Integrated Graphics Device
+ // Vendor ID
+#define IGD_DT_DEVID 0x0102 // Integrated Graphics Device
+ // Device ID
+#define IGD_MB_DEVID 0x0106 // Integrated Graphics Device
+ // Device ID
+
+//----------------------------------------------------------------------------
+// INTEL Ivy Bridge Processor - DRAM Controller Register Equates (D0:F0)
+//----------------------------------------------------------------------------
+#define NB_REG_VID 0x00 // Vendor ID Reg.
+#define NB_REG_DID 0x02 // Device ID Reg.
+#define NB_REG_SVID 0x2c // Subsystem Vendor ID Reg.
+//#define NB_REG_DEVEN 0x54 // Device Enable Reg.
+//#define NB_REG_TSEGMB 0xac // TSEG Memory Base Reg.
+//#define NB_REG_LAC 0x97 // Legacy Access Control Reg.
+//#define NB_REG_CAPID0 0xe0 // Capability Identifier 0 Reg.
+//#define NB_REG_CAPID1 0xe4 // Capability Identifier 1 Reg.
+
+//----------------------------------------------------------------------------
+// INTEL Ivy Bridge Processor - MCH BAR Memory Mapped IO Register Equates
+//----------------------------------------------------------------------------
+#define MCH_MMIO_C0REFRCTRL 0x0269 // Channel 0 DRAM Refersh Control
+#define MCH_MMIO_C1REFRCTRL 0x0669 // Channel 1 DRAM Refersh Control
+
+//----------------------------------------------------------------------------
+// INTEL Ivy Bridge Processor - PCI-Express Bridge Register Equates (D1:F0)
+//----------------------------------------------------------------------------
+#define PCIEBRN_REG_VID 0x00 // Vendor ID Reg.
+#define PCIEBRN_REG_SBUSN 0x19 // Secondary Bus Number Reg.
+#define PCIEBRN_REG_SUBUSN 0x1a // Subordinate Bus Number Reg.
+#define PCIEBRN_REG_SVID 0x8c // Vendor ID Reg.
+
+//----------------------------------------------------------------------------
+// INTEL Ivy Bridge Processor - Integrated Graphics Device Register Equates (D2:F0)
+//----------------------------------------------------------------------------
+#define IGD_REG_VID 0x00 // Vendor ID Reg.
+#define IGD_REG_SVID 0x2c // Subsystem Vendor ID Reg.
+
+//----------------------------------------------------------------------------
+// INTEL Ivy Bridge Processor - System Address Decoder Register Equates (D0:F1)
+//----------------------------------------------------------------------------
+
+#define MC_REG_PAM0 0x80 // Programmable Attribute Map 0 Reg.
+#define MC_REG_PAM1 0x81 // Programmable Attribute Map 1 Reg.
+#define MC_REG_PAM2 0x82 // Programmable Attribute Map 2 Reg.
+#define MC_REG_PAM3 0x83 // Programmable Attribute Map 3 Reg.
+#define MC_REG_PAM4 0x84 // Programmable Attribute Map 4 Reg.
+#define MC_REG_PAM5 0x85 // Programmable Attribute Map 5 Reg.
+#define MC_REG_PAM6 0x86 // Programmable Attribute Map 6 Reg.
+#define MC_REG_SMRAM 0x88
+
+//----------------------------------------------------------------------------
+// INTEL Ivy Bridge Processor - MAX TOLUD Type
+//----------------------------------------------------------------------------
+#define NB_MAX_TOLUD_DYNAMIC 0
+#define NB_MAX_TOLUD_0_5G 1
+#define NB_MAX_TOLUD_0_75G 2
+#define NB_MAX_TOLUD_1G 3
+#define NB_MAX_TOLUD_1_25G 4
+#define NB_MAX_TOLUD_1_5G 5
+#define NB_MAX_TOLUD_1_75G 6
+#define NB_MAX_TOLUD_2G 7
+#define NB_MAX_TOLUD_2_25G 8
+#define NB_MAX_TOLUD_2_5G 9
+#define NB_MAX_TOLUD_2_75G 10
+#define NB_MAX_TOLUD_3G 11
+#define NB_MAX_TOLUD_3_25G 12
+#define NB_MAX_TOLUD_3_5G 13
+#define NB_MAX_TOLUD_3_75G 14
+//----------------------------------------------------------------------------
+// INTEL Ivy Bridge GTTMMADR
+//----------------------------------------------------------------------------
+#define GTT_MEM_ALIGN 22
+#define GTTMMADR_SIZE_4MB 0x400000
+
+#endif
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/NB/NB.mak b/Board/NB/NB.mak
new file mode 100644
index 0000000..f7de78f
--- /dev/null
+++ b/Board/NB/NB.mak
@@ -0,0 +1,219 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NB.mak 7 4/01/13 9:55p Ireneyang $
+#
+# $Revision: 7 $
+#
+# $Date: 4/01/13 9:55p $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NB.mak $
+#
+# 7 4/01/13 9:55p Ireneyang
+# [TAG] None
+# [Severity] Improvement
+# [Description] Reduce boot time through PEG.
+# [Files] NB.mak; NBDxe.c; NBPEI.c; NBPPI.h; Sa.asl;
+# PcieComplex.c; GraphicsInit.c; PciExpressInit.c;
+#
+# 4 3/12/13 2:31a Ireneyang
+# [TAG] None
+# [Severity] Improvement
+# [Description] Remove related SaSsdt acpi data to DSDT
+# [Files] SaInit.c; INTELGFX.ASL; Sa.asl; SaSsdt.asl;
+# SaSsdtTables.sdl; NBDxe.c; NB.mak;
+#
+# 3 1/03/13 7:32a Jeffch
+# [TAG] None
+# [Severity] Spec update
+# [Description] Follow MRC error report status.
+# [Files] NBPei.c; NB.mak;
+#
+# 2 10/14/12 12:42a Jeffch
+# [TAG] None
+# [Severity] Important
+# [Description] Update by XTU4.0.
+# [Files] NB.h, GetSetupData.c, NbSetupData.h
+# [TAG] None
+# [Severity] Important
+# [Description] Follow Update by Mahobay.
+# [Files] NB.sdl, NB.mak.c; NBDXEBoard.c
+#
+# 1 2/08/12 4:32a Yurenlai
+# Intel Haswell/NB eChipset initially releases.
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: NB.mak
+#
+# Description: This make file builds north bridge SEC,PEI & DXE
+# components and link them to respective binary
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+
+!IFNDEF NB_MAK_INCLUSION_FLAG
+NB_MAK_INCLUSION_FLAG = 1
+
+all : NBPEI NBDXE NBCSPLibBin
+
+BUILD_NB_BOARD_DIR = $(BUILD_DIR)\$(NB_BOARD_DIR)
+BUILD_NB_CHIPSET_DIR = $(BUILD_DIR)\$(NB_CHIPSET_DIR)
+
+#----------------------------------------------------------------------------
+# Generic NB dependencies
+#----------------------------------------------------------------------------
+$(BUILD_DIR)\NB.mak : $(NB_BOARD_DIR)\NBBoard.cif $(NB_CHIPSET_DIR)\NBCSP.cif $(BUILD_RULES)
+ $(CIF2MAK) $(NB_BOARD_DIR)\NBBoard.cif $(CIF2MAK_DEFAULTS) $(NB_CHIPSET_DIR)\NBCSP.cif
+
+$(BUILD_DIR)\nbint15.obj: $(NB_BOARD_DIR)\nbint15.asm
+ $(ASM) /c /nologo /Fo$(BUILD_DIR)\ $(NB_BOARD_DIR)\nbint15.asm
+#----------------------------------------------------------------------------
+# Add files into CSP Library
+#----------------------------------------------------------------------------
+$(BUILD_DIR)\AMICSPLIBInc.H : $(NB_BOARD_DIR)\nb.h $(NB_CHIPSET_DIR)\NBCspLib.h $(NB_BOARD_DIR)\NbSetupData.h
+AMICSPLibBin : $(NBCSPLib)
+
+NB_CSP_OBJECTS =\
+$$(BUILD_DIR)\$(NB_CHIPSET_DIR)\NBGeneric.obj \
+$$(BUILD_DIR)\$(NB_CHIPSET_DIR)\NBPciCSP.obj \
+$$(BUILD_DIR)\$(NB_BOARD_DIR)\GetSetupData.obj
+
+$(NBCSPLib) : $(BUILD_DIR)\NB.mak NBCSPLibBin
+
+NBCSPLibBin :
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\Nb.mak all\
+ NAME=AMINBCSPLib\
+ MAKEFILE=$(BUILD_DIR)\Nb.mak\
+ OBJECTS="$(NB_CSP_OBJECTS)"\
+ TYPE=LIBRARY\
+ "CFLAGS=$(CFLAGS) /D\"NB_OEM_SETUP_CALLBACK_LIST=$(NbConfigurationList)\""
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\Nb.mak all\
+ BUILD_DIR=$(BUILD_DIR)\IA32\
+ NAME=AMINBCSPLib\
+ MAKEFILE=$(BUILD_DIR)\Nb.mak\
+ OBJECTS="$(NB_CSP_OBJECTS)"\
+ TYPE=PEI_LIBRARY\
+ "CFLAGS=$(CFLAGS) /D\"NB_OEM_SETUP_CALLBACK_LIST=$(NbConfigurationList)\""
+
+#----------------------------------------------------------------------------
+# Add files for NB SEC code
+#----------------------------------------------------------------------------
+CREATE_NB_SEC : $(BUILD_DIR)\NBSECInit.OBJ
+
+NB_SEC_ASM_FLAGS = /c /nologo /Sa
+!if "$(SEC_CREATE_PE32)" == "1"
+NB_SEC_ASM_FLAGS = $(NB_SEC_ASM_FLAGS) /coff
+!endif
+
+$(BUILD_DIR)\NBSECInit.OBJ : $(NB_BOARD_DIR)\NBSECInit.asm
+ $(ASM) $(NB_SEC_ASM_FLAGS) /I$(NB_BOARD_DIR) /Fo$(BUILD_DIR)\NBSECInit.obj $(NB_BOARD_DIR)\NBSECInit.asm
+
+#----------------------------------------------------------------------------
+# Create NB PEI Component
+#----------------------------------------------------------------------------
+NBPEI : $(BUILD_DIR)\NB.mak NBPEIBin
+
+NB_PEI_OBJECTS = $$(BUILD_DIR)\$(NB_BOARD_DIR)\NBPeiBoard.obj \
+$$(BUILD_DIR)\$(NB_BOARD_DIR)\GetSetupData.obj \
+$$(BUILD_DIR)\$(NB_CHIPSET_DIR)\NBPei.obj
+
+NBPEIBin : $(AMIPEILIB) $(AMICSPLib) $(INTEL_SA_PPI_LIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\NB.mak all\
+ NAME=NBPEI\
+ MAKEFILE=$(BUILD_DIR)\NB.mak \
+!IF "$(x64_BUILD)"=="1"
+ BUILD_DIR=$(BUILD_DIR)\IA32\
+!ELSE
+ BUILD_DIR=$(BUILD_DIR)\
+!ENDIF
+ "CFLAGS=$(CFLAGS) /I$(NB_BOARD_DIR) /D\"NB_OEM_SETUP_CALLBACK_LIST=$(NbConfigurationList)\""\
+ OBJECTS="$(NB_PEI_OBJECTS)" \
+ GUID=79AA6086-035A-4ad9-A89A-A6D5AA27F0E2 \
+ ENTRY_POINT=NBPEI_Init \
+ TYPE=PEIM \
+ "MY_INCLUDES=$(INTEL_PCH_INCLUDES) $(INTEL_MCH_INCLUDES) $(SwitchableGraphics_INCLUDES) $(EdkIIGlueLib_INCLUDES)" \
+ DEPEX1=$(NB_BOARD_DIR)\NBPEI.DXS DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX \
+ COMPRESS=0
+
+# FILE GUID for NBPEI BIN
+#// {79AA6086-035A-4ad9-A89A-A6D5AA27F0E2}
+#DEFINE_GUID(<<name>>,
+#0x79aa6086, 0x35a, 0x4ad9, 0xa8, 0x9a, 0xa6, 0xd5, 0xaa, 0x27, 0xf0, 0xe2);
+
+#----------------------------------------------------------------------------
+# Create NB DXE Component
+#----------------------------------------------------------------------------
+NBDXE : $(BUILD_DIR)\NB.MAK NBDXEBin
+
+
+NB_DXE_OBJECTS = $(BUILD_NB_BOARD_DIR)\NBDxeBoard.obj \
+$(BUILD_NB_BOARD_DIR)\GetSetupData.obj \
+$(BUILD_NB_CHIPSET_DIR)\NBSmm.obj \
+$(BUILD_NB_CHIPSET_DIR)\NBDxe.obj
+
+!IF "$(CSM_SUPPORT)"=="1"
+CSMCOREBin : $(BUILD_NB_BOARD_DIR)\NBDxeBoard.obj
+!ENDIF
+
+NBDXEBin : $(AMICSPLib) $(AMIDXELIB) $(SaGuidLib_LIB)
+ $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+ /f $(BUILD_DIR)\NB.mak all\
+ NAME=NBDXE\
+ MAKEFILE=$(BUILD_DIR)\NB.mak \
+ "CFLAGS=$(CFLAGS) $(ACPI_PLATFORM_INCLUDES) /I$(NB_BOARD_DIR) /D\"NB_OEM_SETUP_CALLBACK_LIST=$(NbConfigurationList)\""\
+ OBJECTS="$(NB_DXE_OBJECTS)" \
+ GUID=E4ECD0B2-E277-4f2b-BECB-E4D75C9A812E \
+ ENTRY_POINT=NBDXE_Init \
+ TYPE=BS_DRIVER \
+ "MY_INCLUDES=$(INTEL_PCH_INCLUDES) $(INTEL_MCH_INCLUDES) $(ME_INCLUDES)" \
+ DEPEX1=$(NB_BOARD_DIR)\NBDXE.DXS DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+ COMPRESS=1
+
+# FILE GUID for NBDXE BIN
+#// {E4ECD0B2-E277-4f2b-BECB-E4D75C9A812E}
+#DEFINE_GUID(<<name>>,
+#0xe4ecd0b2, 0xe277, 0x4f2b, 0xbe, 0xcb, 0xe4, 0xd7, 0x5c, 0x9a, 0x81, 0x2e);
+
+!ENDIF
+
+#----------------------------------------------------------------------------
+# Create NB ACPI Object
+#----------------------------------------------------------------------------
+$(BUILD_DIR)\NbAcpi.obj: $(NB_CHIPSET_DIR)\NbAcpi.c
+ $(CC) $(CFLAGS) /Fo$(BUILD_DIR)\ $(NB_CHIPSET_DIR)\NbAcpi.c /I$(NB_CHIPSET_DIR) /I$(NB_BOARD_DIR)
+
+AcpiModeEnableBin: $(BUILD_DIR)\NbAcpi.obj
+
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/NB/NB.sdl b/Board/NB/NB.sdl
new file mode 100644
index 0000000..4ce72da
--- /dev/null
+++ b/Board/NB/NB.sdl
@@ -0,0 +1,1223 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2015, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+#*************************************************************************
+# $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NB.sdl 23 7/02/15 2:48a Dennisliu $
+#
+# $Revision: 23 $
+#
+# $Date: 7/02/15 2:48a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NB.sdl $
+#
+# 23 7/02/15 2:48a Dennisliu
+# [TAG] EIP221317
+# [Category] Improvement
+# [Description] [SharkBay] S3 Security Technical Advisories
+# [Files] Board\NB\NB.sdl
+#
+# 22 11/07/13 3:37a Ireneyang
+# [TAG] None
+# [Category] Improvement
+# [Description] Remove "AMI_SA_ECC_DIMM_ERROR" for EIP#138347.
+# [Solution] It's fixed in RC1.7.0.
+# [Files] NB.sdl; MrcCrosser.c;
+#
+# 21 10/29/13 12:04p Ireneyang
+#
+# 20 10/29/13 11:55a Ireneyang
+# [TAG] EIP139301
+# [Category] BugFix
+# [Description] Hanging issue when moving ECC Dimm form channel B
+# dimm 1 to channel A dimm 0.
+# [Solution] Fix MRC code form Intel Patch. (This will be fixed
+# in next version RC code.)
+# [Files] MrcCrosser.c; NB.sdl;
+#
+# 19 5/22/13 6:42a Ireneyang
+# [TAG] None
+# [Category] Improvement
+# [Description] Add Token SG_GPIO_SUPPORT for GpioSupport.
+# [Files] NB.sdl; NBPEI.c;
+#
+# 18 3/14/13 4:15a Ireneyang
+# [TAG] None
+# [Severity] Improvement
+# [Description] Increase "PEI_MIN_MEMORY_SIZE" to "0x4000000" for PFAT
+# and Recovery.
+# [Files] NB.sdl;
+#
+# 17 2/25/13 4:25a Ireneyang
+# [TAG] EIP115090
+# [Category] Improvement
+# [Description] Memory data hasn't been cleared after running MRC base
+# memory test.
+# [Files] NB.sdl; NBPEI.c;
+#
+# 16 1/14/13 6:12a Jeffch
+# [TAG] None
+# [Severity] Spec update
+# [Description] Create Iedsize token for SA RC 0.90.
+# [Files] NB.sdl;
+#
+# 15 11/08/12 7:04a Jeffch
+#
+# 14 10/30/12 7:17a Jeffch
+# [TAG] None
+# [Severity] Important
+# [Description] Update SA RC 0.72.
+# [Files] NB.sdl; NBDXEboard.c
+#
+# 13 10/14/12 11:41a Jeffch
+# [TAG] None
+# [Severity] Important
+# [Description] Follow SA RC 0.71.
+# [Files] Nb.sdl
+#
+# 12 10/14/12 12:50a Jeffch
+# [TAG] None
+# [Severity] Important
+# [Description] Follow Update by Mahobay.
+# [Files] NB.sdl, NB.mak.c; NBDXEBoard.c; NB.sdl
+#
+# 11 9/26/12 9:28a Yurenlai
+# [TAG] EIP101495
+# [Category] Improvement
+# [Severity] Important
+# [Description] Initialize SSID of B0:D3:F0 and B0:D2:F0/F1.
+# [Files] NB.h, NB.sdl, NBPEI.c
+#
+# 10 8/14/12 4:26a Yurenlai
+# [TAG] None
+# [Severity] Important
+# [Description] Change for SystemAgent RefCode Revision: 0.6.1.
+# [Files] NB.sdl, NB.sd, NBCSP.CIF, NBDxe.c, NB.ASL, SaAudio.asl
+#
+# 9 7/27/12 8:46a Yurenlai
+# [TAG] None
+# [Category] Improvement
+# [Description] IGfx Fource Disable Support.
+# [Files] GetSetupData.c, NB.sdl, NB.sd, NB.uni, NbSetupData.h,
+# NBDxe.c, NBPEI.c
+#
+# 8 6/14/12 5:19a Yurenlai
+# [TAG] None
+# [Category] Improvement
+# [Description] Support token to disable PEG 0 ~ 2.
+# [Description] NB.sdl, NB.sd, NB.ASL, HOST_BUS.ASL
+#
+# 7 4/26/12 3:00a Yurenlai
+# [TAG] None
+# [Category] Improvement
+# [Severity] Important
+# [Description] Adjust Intel System Agent module the Setup item and
+# Policy.
+# [Description] GetSetupData.c, NB.sdl, NB.sd, NB.uni, NBDxe.c,
+# NBPEI.c, NBSetup.c, NBSetupReset.c, NbSetupData.h
+#
+# 6 4/05/12 2:15a Yurenlai
+# [TAG] EIP87103
+# [Category] Spec Update
+# [Severity] Important
+# [Description] Add token NB_IOTRAP_SMI_ADDRESSE for SystemAgent
+# RefCode Revision: 0.5.5.
+# [Files] Nb.sdl
+#
+# 5 4/05/12 2:03a Yurenlai
+# [TAG] None
+# [Category] Improvement
+# [Description] Add HD Audio device router.
+# [Files] Nb.sdl
+#
+# 4 3/08/12 10:32p Yurenlai
+# [TAG] None
+# [Category] Improvement
+# [Description] Change VBIOS the files name.
+# Notice : This hsm_Vbios.bin and hsd_Vbios.bin is dummy
+# files.
+# [Files] Nb.sdl, hsm_VBios.bin, hsd_VBios.bin, NBCSP.CIF
+#
+# 3 2/23/12 10:14p Yurenlai
+#
+# [TAG] None
+# [Category] Improvement
+# [Description] If you want to test IGD, please replace into correct
+# VBIOS.
+# [Files] Nb.sdl, NBCSP.CIF
+#
+# 2 2/23/12 6:57a Yurenlai
+# [TAG] None
+# [Category] Improvement
+# [Description] Change VBIOS the file name.
+# Notice : This hsm_Vbios.dat file is false.
+# [Files] Nb.sdl, hsm_Vbios.dat, NBCSP.CIF
+#
+# 1 2/08/12 4:32a Yurenlai
+# Intel Haswell/NB eChipset initially releases.
+#
+#*************************************************************************
+PCIDEVICE
+ Title = "Host Bridge"
+ Bus = 00h
+ Dev = 00h
+ Fun = 00h
+ BridgeBus = 00h
+ ASLfile = "$(INTEL_ACPI_ASL_DIR)\HOST_BUS.ASL"
+ ASLdeviceName = "PCI0"
+ DeviceType = OnBoard
+ PCIBusSize = PciEx
+ PCIBridge = Yes
+ ROMMain = No
+End
+
+PCIDEVICE
+ Title = "P.E.G. Root Port D1F0"
+ Bus = 00h
+ Dev = 01h
+ Fun = 00h
+ BridgeBus = 02h
+ GPEbit = 09h
+ SleepNum = 04h
+ IntA = LNKA; 16
+ IntB = LNKB; 17
+ IntC = LNKC; 18
+ IntD = LNKD; 19
+ Token = "RC_PEG_0" "=" "1"
+ DeviceType = OnBoard
+ PCIBusSize = PciEx
+ PCIBridge = Yes
+End
+
+PCIDEVICE
+ Title = "P.E.G. Root Port D1F1"
+ Bus = 00h
+ Dev = 01h
+ Fun = 01h
+ BridgeBus = 0ah
+ GPEbit = 09h
+ SleepNum = 04h
+ Token = "RC_PEG_1" "=" "1"
+ DeviceType = OnBoard
+ PCIBusSize = PciEx
+ PCIBridge = Yes
+End
+
+PCIDEVICE
+ Title = "P.E.G. Root Port D1F2"
+ Bus = 00h
+ Dev = 01h
+ Fun = 02h
+ BridgeBus = 0bh
+ GPEbit = 09h
+ SleepNum = 04h
+ Token = "RC_PEG_2" "=" "1"
+ DeviceType = OnBoard
+ PCIBusSize = PciEx
+ PCIBridge = Yes
+End
+
+PCIDEVICE
+ Title = "P.E.G. Port Slot x16"
+ Bus = 02h
+ Dev = 00h
+ Slot = 010h
+ GPEbit = 09h
+ SleepNum = 04h
+ IntA = LNKA; 16
+ IntB = LNKB; 17
+ IntC = LNKC; 18
+ IntD = LNKD; 19
+ Token = "RC_PEG_0" "=" "1"
+ DeviceType = Slot
+ PCIBusSize = PciEx
+End
+
+PCIDEVICE
+ Title = "P.E.G. Port Slot x8"
+ Bus = 0ah
+ Dev = 00h
+ Slot = 011h
+ GPEbit = 09h
+ SleepNum = 04h
+ IntA = LNKB; 17
+ IntB = LNKC; 18
+ IntC = LNKD; 19
+ IntD = LNKA; 16
+ Token = "RC_PEG_1" "=" "1"
+ DeviceType = Slot
+ PCIBusSize = PciEx
+End
+
+PCIDEVICE
+ Title = "P.E.G. Port Slot x4"
+ Bus = 0bh
+ Dev = 00h
+ Slot = 012h
+ GPEbit = 09h
+ SleepNum = 04h
+ IntA = LNKC; 18
+ IntB = LNKD; 19
+ IntC = LNKA; 16
+ IntD = LNKB; 17
+ Token = "RC_PEG_2" "=" "1"
+ DeviceType = Slot
+ PCIBusSize = PciEx
+End
+
+PCIDEVICE
+ Title = "I.G.F.X."
+ Bus = 00h
+ Dev = 02h
+ Fun = 00h
+ ROMFile = "Chipset\NB\hsw_VBios.dat"
+ DeviceID = 0402h
+ VendorID = 08086h
+ IntA = LNKA; 16
+ DeviceType = OnBoard
+ PCIBusSize = 32bit
+ OptionROM = Yes
+ CompressedROM = Yes
+End
+
+PCIDEVICE
+ Title = "I.G.D., Fun#1"
+ Bus = 00h
+ Dev = 02h
+ Fun = 01h
+ Disable = Yes
+ DeviceType = OnBoard
+ PCIBusSize = 32bit
+ ROMMain = No
+End
+
+PCIDEVICE
+ Title = "SA HDA Device"
+ Bus = 00h
+ Dev = 03h
+ Fun = 00h
+ DeviceID = 0c0ch
+ VendorID = 08086h
+ IntA = LNKA; 16
+ DeviceType = OnBoard
+ PCIBusSize = 32bit
+End
+
+PCIDEVICE
+ Title = "SA Thermal Device"
+ Bus = 00h
+ Dev = 04h
+ Fun = 00h
+ GPEbit = 09h
+ SleepNum = 04h
+ ASLdeviceName = "B0D4"
+ IntA = LNKA; 16
+ IntB = LNKB; 17
+ IntC = LNKC; 18
+ IntD = LNKD; 19
+ DeviceType = OnBoard
+ PCIBusSize = PciEx
+ ROMMain = No
+End
+
+TOKEN
+ Name = "NB_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable Template - NorthBridge support in Project"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "PEI_MRC_BASE_MEMORY_TEST_ENABLE"
+ Value = "0"
+ Help = "Enable/Disable Mrc base memory test."
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On - Off"
+End
+
+TOKEN
+ Name = "NB_TEMPLATE_VER"
+ Value = "0005"
+ Help = "North Bridge Template Version Number.\ DO NOT CHANGE THIS VALUE"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = "NB_NUMBER_OF_HOST_BRG"
+ Value = "1"
+ Help = "Provides Number of virtual HOST Bridges within the System.\If System covers more than one PCI segment it will nedd more than one HOST bridge; "
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "ROOT_BRIDGE_COUNT"
+ Value = "1"
+ Help = "Indicates how many root bridges (peer to peer) are in the system."
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NB_DEBUG_MESSAGE"
+ Value = "1"
+ Help = "Enables/disables debug message in NB module"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetH = Yes
+ Token = "DEBUG_MODE" "!=" "0"
+End
+
+TOKEN
+ Name = "INCLUDE_NB_ASM_FILE_IN_SEC"
+ Value = "1"
+ Help = "Includes an ASM file and an eLink in SEC build process for NB code modification:"
+ TokenType = Boolean
+End
+
+TOKEN
+ Name = "ENABLE_NB_DMI_GEN2_IN_SEC"
+ Value = "0"
+ Help = "Enabel an NB DMI GEN2 in SEC program."
+ TokenType = Boolean
+ TargetEQU = Yes
+End
+
+TOKEN
+ Name = "NB_IGFX_FORCE_DISABLE_SUPPORT"
+ Value = "0"
+ Help = "Enable/Disable IGfx Fource Disable Support."
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "RC_PEG_0"
+ Value = "1"
+ Help = "Set to 'On' if PEG Port #0 phisically enabled and connected on the board"
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On - Off"
+End
+
+TOKEN
+ Name = "RC_PEG_1"
+ Value = "1"
+ Help = "Set to 'On' if PEG Port #1 phisically enabled and connected on the board"
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On - Off"
+ Token = "RC_PEG_0" "=" "1"
+End
+
+TOKEN
+ Name = "RC_PEG_2"
+ Value = "1"
+ Help = "Set to 'On' if PEG Port #2 phisically enabled and connected on the board"
+ TokenType = Boolean
+ TargetH = Yes
+ Range = "On - Off"
+ Token = "RC_PEG_0" "=" "1"
+ Token = "RC_PEG_1" "=" "1"
+End
+
+TOKEN
+ Name = " "
+ TokenType = Integer
+End
+
+TOKEN
+ Name = "=============== NB Specific Tokens =============="
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "TSEG_SIZE"
+ Value = "0x800000"
+ Help = "Size of SMM TSEG area used (in bytes) \Default size 1MB."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "IED_SIZE"
+ Value = "0x400000"
+ Help = "Size of IED region in bytes \Default size 4MB."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PCIEX_BASE_ADDRESS"
+ Value = "0xF8000000"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PEBS"
+ Value = "$(PCIEX_BASE_ADDRESS)"
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "PCIEX_LENGTH"
+ Value = "0x4000000"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Range = "0x4000000, 0x8000000, 0x10000000"
+ Token = "PCIEX_BASE_ADDRESS" "=" "0xF8000000"
+End
+
+TOKEN
+ Name = "PCIEX_LENGTH"
+ Value = "0x8000000"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Range = "0x4000000, 0x8000000, 0x10000000"
+ Token = "PCIEX_BASE_ADDRESS" "=" "0xF0000000"
+End
+
+TOKEN
+ Name = "PCIEX_LENGTH"
+ Value = "0x10000000"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+ Range = "0x4000000, 0x8000000, 0x10000000"
+ Token = "PCIEX_BASE_ADDRESS" "=" "0xE0000000"
+End
+
+TOKEN
+ Name = "PCIEX_LENGTH_BIT_SETTING"
+ Value = "0x4"
+ Help = "PCI 0:0:0:60 PCIEXBAR bits [2:0] - PCI express size, 0x0 is 256MB, 0x2 is 128MB, 0x4 is 64MB"
+ TokenType = Integer
+ TargetEQU = Yes
+ Token = "PCIEX_LENGTH" "=" "0x04000000"
+End
+
+TOKEN
+ Name = "PCIEX_LENGTH_BIT_SETTING"
+ Value = "0x2"
+ Help = "PCI 0:0:0:60 PCIEXBAR bits [2:0] - PCI express size, 0x0 is 256MB, 0x2 is 128MB, 0x4 is 64MB"
+ TokenType = Integer
+ TargetEQU = Yes
+ Token = "PCIEX_LENGTH" "=" "0x08000000"
+End
+
+TOKEN
+ Name = "PCIEX_LENGTH_BIT_SETTING"
+ Value = "0x0"
+ Help = "PCI 0:0:0:60 PCIEXBAR bits [2:0] - PCI express size, 0x0 is 256MB, 0x2 is 128MB, 0x4 is 64MB"
+ TokenType = Integer
+ TargetEQU = Yes
+ Token = "PCIEX_LENGTH" "=" "0x10000000"
+End
+
+TOKEN
+ Name = "PELN"
+ Value = "$(PCIEX_LENGTH)"
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "PCI_REGISTER_MAX"
+ Value = "4096"
+ Help = "Contains the maximum value of PCI register that can be accessed. \ Enabled only when PCI config memory access is enabled"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Token = "PCIEX_BASE_ADDRESS" "!=" "0"
+End
+
+TOKEN
+ Name = "PCI_REGISTER_MAX"
+ Value = "256"
+ Help = "Contains the maximum value of PCI register that can be accessed. \ Enabled only when PCI config memory access is disabled"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Token = "PCIEX_BASE_ADDRESS" "=" "0"
+End
+
+TOKEN
+ Name = "NCPU"
+ Value = "8"
+ Help = "NOTE: If systen has one HT cpu the value has to be 2 and so on...\"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Range = "1- number of cpu in the system "
+End
+
+TOKEN
+ Name = "LAPB"
+ Value = "$(LOCAL_APIC_BASE)"
+ Help = "Local APIC Base Address"
+ TokenType = Expression
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "CPU_MAX_MEMORY_SIZE"
+ Value = "0x100000000"
+ Help = "Maximum memory size addressable by the CPU"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "PEI_MIN_MEMORY_SIZE"
+ Value = "0x4000000"
+ Help = "Minimum memory required for PEI currently 64 MB"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MEMORY_ARRAY_NUM"
+ Value = "1"
+ Help = "No of Memory Array"
+ TokenType = Integer
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DIMM1_SMBUS_ADDRESS"
+ Value = "0A0h"
+ Help = "DIMM Socket 0 - Channel A"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DIMM2_SMBUS_ADDRESS"
+ Value = "0A2h"
+ Help = "DIMM Socket 1 - Channel A"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DIMM3_SMBUS_ADDRESS"
+ Value = "0A4h"
+ Help = "DIMM Socket 0 - Channel B"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "DIMM4_SMBUS_ADDRESS"
+ Value = "0A6h"
+ Help = "DIMM Socket 1 - Channel B"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NB_EP_BASE_ADDRESS"
+ Value = "0FED19000h"
+ Help = "\(G)MCH Egress Port Base Address (D0:F0:Rx40). 4KB non-Conflicting Address Space Required."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NB_DERAM_BASE_ADDRESS"
+ Value = "0xFED80000"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NB_GDXC_BASE_ADDRESS"
+ Value = "0xFED84000"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "EGPB"
+ Value = "$(NB_EP_BASE_ADDRESS)"
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "NB_MCH_BASE_ADDRESS"
+ Value = "0FED10000h"
+ Help = "\(G)MCH Memory Mapped Register Range Base Address (D0:F0:Rx48). 16KB non-Conflicting Address Space Required."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "MCHB"
+ Value = "$(NB_MCH_BASE_ADDRESS)"
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "NB_DMI_BASE_ADDRESS"
+ Value = "0FED18000h"
+ Help = "\Root Complex Register Range Base Address (D0:F0:Rx68). 4KB non-Conflicting Address Space Required."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NB_VTD_BASE_ADDRESS"
+ Value = "0FED90000h"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "VTD_LENGTH"
+ Value = "0x4000"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "VTBS"
+ Value = "$(NB_VTD_BASE_ADDRESS)"
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "VTLN"
+ Value = "$(VTD_LENGTH)"
+ TokenType = Integer
+ TargetASL = Yes
+End
+
+TOKEN
+ Name = "NB_TEMP_MMIO_BASE"
+ Value = "0xFE800000"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NB_TEMP_MMIO_SIZE"
+ Value = "0x400000"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "NB_IOTRAP_SMI_ADDRESSE"
+ Value = "0x2100"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = " "
+ TokenType = Integer
+End
+
+TOKEN
+ Name = "=============== IGFX Setup data Type Tokens =============="
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "IGFX_LCD_PANEL_TYPE"
+ Value = "0x80"
+ Help = "IGFX LCD panel type"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "IGFX_LCD_PANEL_SCALING"
+ Value = "0x81"
+ Help = "IGFX LCD panel scaling type"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "IGFX_BOOT_TYPE"
+ Value = "0x82"
+ Help = "IGFX boot type"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "IGFX_BACKLIGHT_TYPE"
+ Value = "0x83"
+ Help = "IGFX Get Inverter Type and Polarity for Backlight type"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "IGFX_LFP_PANEL_COLOR_DEPTH_TYPE"
+ Value = "0x84"
+ Help = "IGFX LFP Panel Color Depth type"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "IGFX_EDP_ACTIVE_LFP_CONFIG_TYPE"
+ Value = "0x85"
+ Help = "IGFX Active LCD flat panel(LFP) config type"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "IGFX_PRIMARY_DISPLAY_TYPE"
+ Value = "0x86"
+ Help = "IGFX Primary Display config type"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "IGFX_DISPLAY_PIPE_B_TYPE"
+ Value = "0x87"
+ Help = "IGFX Display Pipe B device type"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = "IGFX_SDVO_PANEL_TYPE"
+ Value = "0x88"
+ Help = "IGFX SDVO Panel type"
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = " "
+ TokenType = Integer
+End
+
+TOKEN
+ Name = "=============== CMOS Configuration =============="
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "NB_CMOS_IFFS_SCRAMBLER_SEED"
+ Value = "0x80"
+ Help = "iFFS scrambler seed use 2 bytes CMOS REG[80 ~ 81]."
+ TokenType = Integer
+ TargetEQU = Yes
+ TargetH = Yes
+ Lock = Yes
+End
+
+TOKEN
+ Name = " "
+ TokenType = Integer
+End
+
+TOKEN
+ Name = "====== UEFI based Configuration ======"
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "OFFSET_14"
+ Value = "15"
+ Help = "Offset 0 based in UEFI 2.1 and 1 based in UEFI 2.0"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "EFI_SPECIFICATION_VERSION" "<=" "0x20000"
+End
+
+TOKEN
+ Name = "OFFSET_14"
+ Value = "14"
+ Help = "Offset 0 based in UEFI 2.1 and 1 based in UEFI 2.0"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "EFI_SPECIFICATION_VERSION" ">" "0x20000"
+End
+
+TOKEN
+ Name = "OFFSET_15"
+ Value = "16"
+ Help = "Offset 0 based in UEFI 2.1 and 1 based in UEFI 2.0"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "EFI_SPECIFICATION_VERSION" "<=" "0x20000"
+End
+
+TOKEN
+ Name = "OFFSET_15"
+ Value = "15"
+ Help = "Offset 0 based in UEFI 2.1 and 1 based in UEFI 2.0"
+ TokenType = Integer
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "EFI_SPECIFICATION_VERSION" ">" "0x20000"
+End
+
+TOKEN
+ Name = " "
+ TokenType = Integer
+End
+
+TOKEN
+ Name = "=============== NB PCI DEVICES SSID TABLE =============="
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "NB_PCI_DEVICES_SSID_TABLE"
+ Value = "{NB_BUS_DEV_FUN, -1}, {NB_IGD_BUS_DEV_FUN, -1}, {NB_IGD_BUS_DEV_FUN1, -1}, {NB_HDA_BUS_DEV_FUN, -1}, {NB_PCIEBRNx16_BUS_DEV_FUN, -1}, {NB_PCIEBRNx8_BUS_DEV_FUN, -1}, {NB_PCIEBRNx4_BUS_DEV_FUN, -1}"
+ Help = "List of PCI device's Sub-System ID in the following format:\{Device#1 Bus/Device/Function, Device#1 Sub-ID}, {Device#2 Bus/Device/Function, Device#2 Sub-ID}...\The format of the PCI bus/device/function is followed by EFI_PCI_CONFIGURATION_ADDRESS.\If the value of Sub-ID is -1, that means BIOS will use PCI Vendor-ID and Device-ID instead.\The last structure {-1, -1} is end of the table, don't remove it!"
+ TokenType = Expression
+ TargetH = Yes
+End
+
+TOKEN
+ Name = " "
+ TokenType = Integer
+End
+
+TOKEN
+ Name = "=============== PCH SKU LPC Device ID for NB HIDE IGFX =============="
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "NBCSPLib"
+ Value = "$$(LIB_BUILD_DIR)\AmiNbCSPLib.lib"
+ TokenType = Expression
+ TargetMAK = Yes
+End
+
+TOKEN
+ Name = "=============== SHADOW RAM SETTING =============="
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "NB_F0000_PAM0"
+ Value = "0"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0 - 3"
+ Help = "0: Didable. 1: Read Only. 2: Write Only. 3: R/W Enable."
+End
+
+TOKEN
+ Name = "NB_E0000_PAM5"
+ Value = "0"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0 - 3"
+ Help = "0: Didable. 1: Read Only. 2: Write Only. 3: R/W Enable."
+End
+
+TOKEN
+ Name = "NB_E8000_PAM6"
+ Value = "0"
+ TokenType = Integer
+ TargetH = Yes
+ Range = "0 - 3"
+ Help = "0: Didable. 1: Read Only. 2: Write Only. 3: R/W Enable."
+End
+
+TOKEN
+ Name = "=============== SG GPIO Support =============="
+ TokenType = Expression
+End
+
+TOKEN
+ Name = "SG_GPIO_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable GpioSupport for SG. 1: TRUE 0:FALSE"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ TargetH = Yes
+End
+
+TOKEN
+ Name = " "
+ TokenType = Expression
+End
+
+PATH
+ Name = "NB_BOARD_DIR"
+ Path = "Board\NB"
+End
+
+PATH
+ Name = "NB_CHIPSET_DIR"
+ Path = "Chipset\NB"
+End
+
+MODULE
+ Help = "Includes NB.mak to Project"
+ File = "NB.mak"
+End
+
+ELINK
+ Name = "/D DIMM_SLOT_NUM=4"
+ Parent = "CFLAGS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(MEM_INIT_FV_BB)"
+ Parent = "FV_BB"
+ InvokeOrder = BeforeParent
+End
+
+ELINK
+ Name = "$(NB_CHIPSET_DIR)\NB.asl"
+ Parent = "INTEL_GENERIC_ASL"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "\_SB.PCI0.NPTS(Arg0)"
+ Parent = "ASL_PTS"
+ Help = "Include North Bridge Specific Function at PTS.\Arg0 is a sleep state the System is targeted for."
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "\_SB.PCI0.NWAK(Arg0)"
+ Parent = "ASL_WAK"
+ Help = "Include North Bridge Specific Function at WAK.\Arg0 is a sleep state the System is resuming from. "
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/I$(NB_BOARD_DIR)"
+ Parent = "$(GLOBAL_DEFINES)"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/I$(NB_CHIPSET_DIR)"
+ Parent = "$(GLOBAL_DEFINES)"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "SECNB_EarlyInit"
+ Parent = "GainestownSecRcEntry"
+ Help = "NB Early Init in SEC (before Cache as memory enabling)"
+ SrcFile = "Board\NB\NBSECInit.ASM"
+ Token = "INCLUDE_NB_ASM_FILE_IN_SEC" "=" "1"
+ InvokeOrder = BeforeParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\NBPEI.ffs"
+ Parent = "FV_BB"
+ Help = "Template NB PEI component"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\NBDXE.ffs"
+ Parent = "FV_MAIN"
+ Help = "Template NB DXE component"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/D PLATFORM_PCIEX_BASE_ADDRESS=$(PCIEX_BASE_ADDRESS)"
+ Parent = "CFLAGS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/D EDKII_GLUE_PciExpressBaseAddress=$(PCIEX_BASE_ADDRESS)"
+ Parent = "CFLAGS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "/D PLATFORM_PCIEX_LENGTH=$(PCIEX_LENGTH)"
+ Parent = "CFLAGS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\NBSECInit.OBJ"
+ Parent = "ADDON_SEC_CORE_OBJ_FILES"
+ Token = "INCLUDE_NB_ASM_FILE_IN_SEC" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "NBINT15"
+ Parent = "CsmOemInterrupts"
+ ProcID = 015h
+ SrcFile = "$(NB_BOARD_DIR)\nbint15.asm"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\nbint15.obj"
+ Parent = "CSM_OEMINT_OBJS"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(NB_BOARD_DIR)\Nb.ssp"
+ Parent = "ADDON_SSP_FILES"
+ Token = "CMOS_MANAGER_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "NbAcpiEnabled,"
+ Parent = "AcpiEnableCallbackList"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "NbAcpiDisabled,"
+ Parent = "AcpiDisableCallbackList"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "NbRuntimeShadowRamWrite,"
+ Parent = "RuntimeShadowRamWrite"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "CheckPeiFvCopyToRam,"
+ Parent = "PeiRamBootList"
+ Token = "PeiRamBootSupport" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "NBGetPlatformHandle,"
+ Parent = "CSM_GET_PLATFORM_HANDLE_FUNCTIONS"
+ Token = "CSM_SUPPORT" "=" "1"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "OEM_PCI_DEVICE_CALLBACK(0, 0, NBProtectedPciDevice),"
+ Parent = "OEM_SKIP_PCI_DEVICE"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "OEM_PCI_DEVICE_CALLBACK(0, 0, NBProgramPciDevice),"
+ Parent = "OEM_PROGRAM_PCI_DEVICE"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "OEM_PCI_DEVICE_CALLBACK(0, 0, NBUpdatePciDeviceAttributes),"
+ Parent = "OEM_PCI_ATTRIBUTES"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "MEM_INIT_FV_BB"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK
+ Name = "NbConfigurationList"
+ InvokeOrder = ReplaceParent
+End
+
+ELINK # [ EIP221317 ]
+ Name = '{L"MrcS3Resume", {0x87f22dcb, 0x7304, 0x4105, 0xbb, 0x7c, 0x31, 0x71, 0x43, 0xcc, 0xc2, 0x3b}},'
+ Parent = "BLOCKED_S3_VAR_LIST"
+ InvokeOrder = AfterParent
+End
+
+ELINK # [ EIP221317 ]
+ Name = '{L"PegGen3PresetSearchData", {0xe1e2a446, 0x365, 0x4c65, 0x91, 0x9c, 0x03, 0x71, 0xc3, 0xf9, 0xf5, 0xff}},'
+ Parent = "BLOCKED_S3_VAR_LIST"
+ InvokeOrder = AfterParent
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2015, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#************************************************************************* \ No newline at end of file
diff --git a/Board/NB/NBBOARD.CIF b/Board/NB/NBBOARD.CIF
new file mode 100644
index 0000000..711ec77
--- /dev/null
+++ b/Board/NB/NBBOARD.CIF
@@ -0,0 +1,21 @@
+<component>
+ name = "Intel SystemAgent NB Board"
+ category = ModulePart
+ LocalRoot = "Board\NB\"
+ RefName = "Intel SystemAgent NB Board"
+[files]
+"NB.sdl"
+"NB.mak"
+"NB.H"
+"NBSECInit.ASM"
+"NBPEI.DXS"
+"NBPEIBoard.c"
+"NBDXE.DXS"
+"NBDXEBoard.c"
+"GetSetupData.c"
+"NbSetupData.h"
+"Nb.ssp"
+"NbInt15.asm"
+[parts]
+"NBSetup"
+<endComponent>
diff --git a/Board/NB/NBDXE.DXS b/Board/NB/NBDXE.DXS
new file mode 100644
index 0000000..09c8d34
--- /dev/null
+++ b/Board/NB/NBDXE.DXS
@@ -0,0 +1,71 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBDXE.DXS 1 2/08/12 4:32a Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 4:32a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBDXE.DXS $
+//
+// 1 2/08/12 4:32a Yurenlai
+// Intel Haswell/NB eChipset initially releases.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: NBDXE.DXS
+//
+// Description: This file is the dependency file for the NB DXE
+// driver
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include <Protocol\PciRootBridgeIo.h>
+#if defined(PI_SPECIFICATION_VERSION) && (PI_SPECIFICATION_VERSION >= 0x0001000A)
+#include <Protocol\S3SaveState.h>
+#else
+#include <AmiDxeLib.h>
+#endif
+#include <Protocol\Cpu.h>
+#include <Protocol\Variable.h>
+
+DEPENDENCY_START
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID AND
+#if defined(PI_SPECIFICATION_VERSION) && (PI_SPECIFICATION_VERSION >= 0x0001000A)
+ EFI_S3_SAVE_STATE_PROTOCOL_GUID AND
+#else
+ EFI_BOOT_SCRIPT_SAVE_GUID AND
+#endif
+ EFI_VARIABLE_WRITE_ARCH_PROTOCOL_GUID AND
+ EFI_CPU_ARCH_PROTOCOL_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/NB/NBDXEBoard.c b/Board/NB/NBDXEBoard.c
new file mode 100644
index 0000000..5fbe360
--- /dev/null
+++ b/Board/NB/NBDXEBoard.c
@@ -0,0 +1,652 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBDXEBoard.c 7 5/13/14 10:37p Dennisliu $
+//
+// $Revision: 7 $
+//
+// $Date: 5/13/14 10:37p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBDXEBoard.c $
+//
+// 7 5/13/14 10:37p Dennisliu
+// [TAG] EIP167027
+// [Category] Improvement
+// [Description] [SharkBay Aptio4]Variable's attribute needs to be
+// reviewed by SA component driver
+// [Files] NBDXEBoard.c; IntelSaGopSetup.c; IntelSaGopPolicy.c;
+// NBDxe.c; NbPciCSP.c; PciHostBridge.c;
+//
+// 6 6/28/13 7:55a Jeffch
+// [TAG] None
+// [Severity] Bug Fix
+// [Description] Fix Boot to OS will BSOD when disable
+// SwitchableGraphics_SUPPORT.
+// [Symptom] update asl name XBAS in NBDXEBoard.c.
+// [RootCause] RC will not update asl name XBAS when disable
+// SwitchableGraphics_SUPPORT.
+// [Files] NBDxeBoard.c
+//
+// 5 1/28/13 3:46a Jeffch
+// [TAG] None
+// [Severity] Spec update
+// [Description] Update SA RC 1.0.
+// [Files] NBPei.c; GetSetupData.c; NbSetupData.h; NBDXE.c;
+// NB.sd; NB.uni; NBDxeBoard.c
+//
+// 4 12/14/12 4:51a Jeffch
+// [TAG] EIP106709
+// [Severity] Important
+// [Description] Support PCIE Primary display.
+// [Files] NB.sd; NBDXEboard.c; NB.uni;
+// GetSetupData.c;NbSetupData.h;
+//
+// 3 10/30/12 7:17a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Update SA RC 0.72.
+// [Files] NB.sdl; NBDXEboard.c
+//
+// 2 10/14/12 12:42a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Update by XTU4.0.
+// [Files] NB.h, GetSetupData.c, NbSetupData.h
+// [TAG] None
+// [Severity] Important
+// [Description] Follow Update by Mahobay.
+// [Files] NB.sdl, NB.mak.c; NBDXEBoard.c
+//
+// 1 2/08/12 4:33a Yurenlai
+// Intel Haswell/NB eChipset initially releases.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: NBDXEBoard.C
+//
+// Description: This file contains DXE stage board component code for
+// Template NB
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+//----------------------------------------------------------------------------
+// Include(s)
+//----------------------------------------------------------------------------
+
+#include <Efi.h>
+#include <Pei.h>
+#include <token.h>
+#include <Setup.h>
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+#include <Protocol\NBMemInfo.h>
+#include <Protocol\MpService.h>
+
+#if SMBIOS_SUPPORT
+#include <Protocol\SmbiosDynamicData.h>
+#endif
+
+#if CSM_SUPPORT
+#include <Protocol\CsmPlatform.h>
+#include <Protocol\LegacyBiosPlatform.h>
+#endif
+#define _SA_COMMON_DEFINITIONS_H_
+#include <Protocol\SaPlatformPolicy\SaPlatformPolicy.h>
+#include <SaGlobalNvsArea\SaGlobalNvsArea.h>
+//----------------------------------------------------------------------------
+// Constant, Macro and Type Definition(s)
+//----------------------------------------------------------------------------
+// Constant Definition(s)
+
+// Macro Definition(s)
+
+
+// Type Definition(s)
+
+// Function Prototype(s)
+
+// Protocols that are installed
+
+//----------------------------------------------------------------------------
+// Variable and External Declaration(s)
+//----------------------------------------------------------------------------
+// Variable Declaration(s)
+
+// GUID Definition(s)
+EFI_GUID gSaGlobalNvsAreaProtocolGuid = SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL_GUID;
+EFI_GUID mDxePlatformSaPolicyGuid = DXE_PLATFORM_SA_POLICY_GUID;
+// Protocol Definition(s)
+SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL *gSaGlobalNvsArea;
+DXE_PLATFORM_SA_POLICY_PROTOCOL mDxePlatformSaPolicy;
+// External Declaration(s)
+NB_SETUP_DATA *gNbSetupData;
+// Function Definition(s)
+VOID NbSaGlobalNvsAreaNotify (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+);
+//----------------------------------------------------------------------------
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: NBDXE_BoardInit
+//
+// Description: This function initializes the board specific component in
+// in the chipset north bridge
+//
+// Input: ImageHandle Image handle
+// SystemTable Pointer to the system table
+//
+// Output: Return Status based on errors that occurred while waiting for
+// time to expire.
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS NBDXE_BoardInit (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable,
+ IN NB_SETUP_DATA *SetupData )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_EVENT NbSaGlobalNvsAreaEvent;
+ VOID *NbSaGlobalNvsAreaReg;
+
+ InitAmiLib(ImageHandle, SystemTable);
+
+ gNbSetupData = SetupData;
+
+ //NbSetupdata Pass to SaGlobalNvsArea.
+ Status = pBS->CreateEvent (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ NbSaGlobalNvsAreaNotify,
+ NULL,
+ &NbSaGlobalNvsAreaEvent
+ );
+
+ if (!EFI_ERROR (Status)) {
+ Status = pBS->RegisterProtocolNotify (
+ &gSaGlobalNvsAreaProtocolGuid,
+ NbSaGlobalNvsAreaEvent,
+ &NbSaGlobalNvsAreaReg
+ );
+ }
+
+
+ return Status;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: NbSaGlobalNvsAreaNotify
+//
+// Description: This callback function is called when a SaGlobalNvsArea Protocol is
+// installed.
+//
+// Input: Event - Event of callback
+// Context - Context of callback.
+//
+// Output: EFI_SUCCESS
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID NbSaGlobalNvsAreaNotify (
+ IN EFI_EVENT Event,
+ IN VOID *Context )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ ///
+ /// Locate the SA Global NVS Protocol.
+ ///
+ Status = pBS->LocateProtocol (
+ &gSaGlobalNvsAreaProtocolGuid,
+ NULL,
+ (VOID **) &gSaGlobalNvsArea
+ );
+ if (!(EFI_ERROR (Status)))
+ {
+
+ ///
+ /// Get the platform setup policy.
+ ///
+ Status = pBS->LocateProtocol (&mDxePlatformSaPolicyGuid, NULL, (VOID **) &mDxePlatformSaPolicy);
+ ASSERT_EFI_ERROR (Status);
+
+ gSaGlobalNvsArea->Area->IgdBootType = gNbSetupData->IgdBootType;
+ gSaGlobalNvsArea->Area->IgdPanelType = gNbSetupData->LcdPanelType;
+ gSaGlobalNvsArea->Area->IgdPanelScaling = gNbSetupData->LcdPanelScaling;
+ gSaGlobalNvsArea->Area->IgdSciSmiMode = 0; // 0=Enable, 1= Disabled
+//- gSaGlobalNvsArea->Area->IgdTvFormat = NbSetupData->IgdTV1Standard;
+//- gSaGlobalNvsArea->Area->IgdTvMinor = NbSetupData->IgdTV2Standard;
+ gSaGlobalNvsArea->Area->IgdSscConfig = gNbSetupData->IgdLcdSSCC;
+ gSaGlobalNvsArea->Area->IgdBiaConfig = gNbSetupData->IgdLcdIBia;
+
+ gSaGlobalNvsArea->Area->BacklightControlSupport = gNbSetupData->IgdLcdBlc;
+ gSaGlobalNvsArea->Area->AlsEnable = gNbSetupData->AlsEnable;
+ gSaGlobalNvsArea->Area->IgdDvmtMemSize = gNbSetupData->IgdDvmt50TotalAlloc;
+ gSaGlobalNvsArea->Area->GfxTurboIMON = gNbSetupData->GfxTurboIMON;
+
+ // Get SFF power mode platform data for the IGD driver. Flip the bit (bitwise xor)
+ // since Setup value is opposite of NVS and IGD OpRegion value.
+ gSaGlobalNvsArea->Area->IgdPowerConservation = gNbSetupData->LowPowerMode ^ BIT0;
+ gSaGlobalNvsArea->Area->XPcieCfgBaseAddress = (UINT32)NB_PCIE_CFG_ADDRESS (0, 0, 0, 0);
+
+ //
+ // Give the full brightness as the initial value
+ //
+ gSaGlobalNvsArea->Area->BrightnessPercentage = 100;
+
+ if(gNbSetupData->AlsEnable) {
+ if (gSaGlobalNvsArea->Area->IgdBiaConfig == 0) {
+ //
+ // Re-change the ALS to disable according to setup.
+ //
+ gSaGlobalNvsArea->Area->AlsEnable = 0;
+ } else if (gSaGlobalNvsArea->Area->IgdBiaConfig < 6) {
+ gSaGlobalNvsArea->Area->AlsEnable = 2;
+ gSaGlobalNvsArea->Area->AlsAdjustmentFactor = gSaGlobalNvsArea->Area->IgdBiaConfig * 20;
+ } else if (gSaGlobalNvsArea->Area->IgdBiaConfig == 6) {
+ //
+ // The default value from VBT
+ //
+ gSaGlobalNvsArea->Area->AlsAdjustmentFactor = 100;
+ gSaGlobalNvsArea->Area->AlsEnable = 2;
+ }
+ }
+
+ // Update DeviceIds
+ gSaGlobalNvsArea->Area->DeviceId1 = DeviceID1;
+ gSaGlobalNvsArea->Area->DeviceId2 = DeviceID2;
+ gSaGlobalNvsArea->Area->DeviceId3 = DeviceID3;
+ gSaGlobalNvsArea->Area->DeviceId4 = DeviceID4;
+ gSaGlobalNvsArea->Area->DeviceId5 = DeviceID5;
+ gSaGlobalNvsArea->Area->DeviceId6 = DeviceID6;
+ gSaGlobalNvsArea->Area->DeviceId7 = DeviceID7;
+ gSaGlobalNvsArea->Area->DeviceId8 = DeviceID8;
+ gSaGlobalNvsArea->Area->NumberOfValidDeviceId = ValidDeviceIDs;
+ gSaGlobalNvsArea->Area->CurrentDeviceList = 0x0f;
+ gSaGlobalNvsArea->Area->PreviousDeviceList = 0x0f;
+
+ gSaGlobalNvsArea->Area->Peg0LtrEnable = mDxePlatformSaPolicy.PcieConfig->PegPwrOpt[0].LtrEnable;
+ gSaGlobalNvsArea->Area->Peg0ObffEnable = mDxePlatformSaPolicy.PcieConfig->PegPwrOpt[0].ObffEnable;
+ gSaGlobalNvsArea->Area->Peg0ObffEnable = mDxePlatformSaPolicy.PcieConfig->PegPwrOpt[0].ObffEnable;
+ gSaGlobalNvsArea->Area->Peg1LtrEnable = mDxePlatformSaPolicy.PcieConfig->PegPwrOpt[1].LtrEnable;
+ gSaGlobalNvsArea->Area->Peg1ObffEnable = mDxePlatformSaPolicy.PcieConfig->PegPwrOpt[1].ObffEnable;
+ gSaGlobalNvsArea->Area->Peg2LtrEnable = mDxePlatformSaPolicy.PcieConfig->PegPwrOpt[2].LtrEnable;
+ gSaGlobalNvsArea->Area->Peg2ObffEnable = mDxePlatformSaPolicy.PcieConfig->PegPwrOpt[2].ObffEnable;
+ gSaGlobalNvsArea->Area->PegLtrMaxSnoopLatency = mDxePlatformSaPolicy.PcieConfig->PegPwrOpt[0].LtrMaxSnoopLatency;
+ gSaGlobalNvsArea->Area->PegLtrMaxNoSnoopLatency = mDxePlatformSaPolicy.PcieConfig->PegPwrOpt[0].LtrMaxNoSnoopLatency;
+ gSaGlobalNvsArea->Area->Peg0PowerDownUnusedBundles = gNbSetupData->PowerDownUnusedBundles[0];
+ gSaGlobalNvsArea->Area->Peg1PowerDownUnusedBundles = gNbSetupData->PowerDownUnusedBundles[1];
+ gSaGlobalNvsArea->Area->Peg2PowerDownUnusedBundles = gNbSetupData->PowerDownUnusedBundles[2];
+ gSaGlobalNvsArea->Area->IgdState = 1;
+
+ // If SCI mode is disabled in setup or IGD is disabled return
+ if ((READ_PCI32_IGD (0) == 0xFFFFFFFF)) {
+ gSaGlobalNvsArea->Area->IgdState = 0;
+ }
+
+ gSaGlobalNvsArea->Area->LidState = 1;
+
+ }
+
+ // Kill event
+ pBS->CloseEvent(Event);
+
+}
+
+#if CSM_SUPPORT
+
+typedef struct {
+ UINT8 PegBus;
+ UINT8 PegDev;
+ UINT8 PegFun;
+ EFI_HANDLE Handle;
+} NB_PEG_DEVICES_STRUCT;
+
+NB_PEG_DEVICES_STRUCT NBPegVgaList[] =
+{
+ {NB_BUS, PCIEBRN_DEV6, PCIEBRN_FUN, NULL},
+ {NB_BUS, PCIEBRN_DEV, PCIEBRN_FUN, NULL},
+ {NB_BUS, PCIEBRN_DEV, PCIEBRN_FUN1, NULL},
+ {NB_BUS, PCIEBRN_DEV, PCIEBRN_FUN2, NULL},
+};
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Name: NBGetPlatformHandle
+//
+// Description: Returns a buffer of handles for the requested subfunction.
+//
+// Input:
+// This Indicates the EFI_LEGACY_BIOS_PLATFORM_PROTOCOL instance.
+// Mode Specifies what handle to return.
+// GetVgaHandle
+// GetIdeHandle
+// GetIsaBusHandle
+// GetUsbHandle
+// Type Handle Modifier - Mode specific
+// HandleBuffer Pointer to buffer containing all Handles matching the
+// specified criteria. Handles are sorted in priority order.
+// Type EFI_HANDLE is defined in InstallProtocolInterface()
+// in the EFI 1.10 Specification.
+// HandleCount Number of handles in HandleBuffer.
+// AdditionalData Pointer to additional data returned - mode specific..
+//
+// Output:
+// EFI_SUCCESS The handle is valid.
+// EFI_UNSUPPORTED Mode is not supported on this platform.
+// EFI_NOT_FOUND The handle is not known.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS
+NBGetPlatformHandle (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN EFI_GET_PLATFORM_HANDLE_MODE Mode,
+ IN UINT16 Type,
+ OUT EFI_HANDLE **HandleBuffer,
+ OUT UINTN *HandleCount,
+ OUT VOID OPTIONAL **AdditionalData
+)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+//------------------------
+ switch (Mode) {
+ case EfiGetPlatformVgaHandle:{
+ UINTN sz = 0, i;
+ UINT8 PriVideo=0; //3=AUTO 0=IGD 1=PEG 2=PCI
+ UINT8 PrimaryPeg=0; //0=AUTO 1=PEG11 2=PEG12
+ UINT8 PrimaryPcie=0; //0=AUTO 1=PCIE1 2=PCIE2....
+ EFI_HANDLE *hb, *vh, peg=NULL, peg00=NULL, pcie0=NULL, igd=NULL, pcie=NULL;
+ T_ITEM_LIST VgaList={0,0,NULL};
+ PCI_DEV_INFO *dev;
+ EFI_PCI_IO_PROTOCOL *pciio;
+ BOOLEAN ChangeIgfxToAuto = FALSE;
+ BOOLEAN ChangePegToAuto = FALSE;
+ BOOLEAN ChangepcieToAuto = FALSE;
+ BOOLEAN ChangePrimaryPeg = FALSE;
+ BOOLEAN ChangePrimaryPcie = FALSE;
+ NB_SETUP_DATA *NBSetupData = NULL;
+ UINTN VariableSize = sizeof(NB_SETUP_DATA);
+ //-----------------
+
+ Status = pBS->AllocatePool( EfiBootServicesData, \
+ VariableSize, \
+ &NBSetupData );
+ ASSERT_EFI_ERROR(Status);
+
+ GetNbSetupData( pRS, NBSetupData, FALSE );
+
+
+ PriVideo = NBSetupData->PrimaryDisplay;
+ PrimaryPeg = NBSetupData->PrimaryPeg;
+ PrimaryPcie = NBSetupData->PrimaryPcie;
+
+ // Free memory used for setup data
+ pBS->FreePool( NBSetupData );
+
+ //Get all handles with PCI IO Protocol..
+ Status=pBS->LocateHandleBuffer(ByProtocol,&gEfiPciIoProtocolGuid,NULL, &sz, &hb);
+ if(EFI_ERROR(Status)) return Status;
+
+ for(i=0; i< sz; i++) {
+
+ Status=pBS->HandleProtocol(hb[i],&gEfiPciIoProtocolGuid,&pciio);
+ if(EFI_ERROR(Status)) {
+ pBS->FreePool(hb);
+ return Status;
+ }
+
+ dev = (PCI_DEV_INFO*)pciio;
+ //
+ // When a graphics card with internal PCI-PCI bridges (GTX 295) is attached to
+ // PCH PCIe ports video is not displayed.
+ // PCI to PCI bridge has another device with Baseclasscode as 0x03 and Sub Classcode
+ // as 0x02. And in CSMBsp.c file, it was seeing this as Video controller.
+ //
+ if((dev->Class.BaseClassCode == PCI_CL_DISPLAY) && (dev->Class.SubClassCode == 0x00)) {
+ Status=AppendItemLst(&VgaList, (VOID*)dev);
+ if(EFI_ERROR(Status)) return Status;
+ }
+ }
+
+ pBS->FreePool(hb);
+
+ vh=Malloc(sizeof(EFI_HANDLE));
+ *vh=NULL;
+
+ for(i=0; i<VgaList.ItemCount; i++) {
+ PCI_DEV_INFO *brg;
+ //--------------------------------
+ //This is an Easy task we know exactly where it is
+ dev = VgaList.Items[i];
+ if(igd == NULL) {
+ if((dev->ParentBrg->Type == tPciRootBrg)
+ && (dev->Address.Addr.Device == 2)
+ && (dev->Address.Addr.Function == 0))
+ igd=dev->Handle;
+ }
+
+ //Some Video cards Implement a MULTY FUNCTIONAL Devices;
+ //Some - use PCI 2 PCI bridg(es) to multiply itself
+ //to Avoid further complications regarding such situation
+ //we'll try to handle this situation!
+ //We will assume for Primary Video Device Selection that it always
+ //will be the function 0 of mulifunctional Device.
+ brg = dev->ParentBrg;
+
+ if(peg == NULL) {
+ while(brg->Type == tPci2PciBrg) {
+ if( (brg->DevVenId.VenId == 0x8086 ) //Intel's Vendor ID
+ && (brg->ParentBrg->Type != tPci2PciBrg ) //Must be connected to the HOST
+ && (brg->Address.Addr.Device == 1) //Device #1
+ && (brg->Address.Addr.Function >= 0) //Function #0 ~ 2
+ && ( (dev->PciIo.RomImage != NULL ) //Device behind this Bridge must have ROM
+ || (dev->Bar[PCI_MAX_BAR_NO].Type != tBarUnused) )
+ && (dev->Address.Addr.Function == 0 )
+ && (dev->Capab & EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY)
+ && (dev->Capab & EFI_PCI_IO_ATTRIBUTE_VGA_IO) )
+ {
+ if (PrimaryPeg != 0) {
+ if (brg->Address.Addr.Device == 1)
+ {
+ if (brg->Address.Addr.Function == 1 && PrimaryPeg == 1)
+ peg = dev->Handle;
+ else if (brg->Address.Addr.Function == 2 && PrimaryPeg == 2)
+ peg = dev->Handle;
+ else if (brg->Address.Addr.Function == 0)
+ peg00 = dev->Handle;
+
+ }
+ } else peg=dev->Handle;
+ }
+
+ if(peg != NULL)break;
+ brg = brg->ParentBrg;
+ } //#### while
+ } //#### if(peg == NULL)
+
+ //Do the same for Video that might be behind PCI 2 PCI bridge device 1Eh
+ brg=dev->ParentBrg;
+ if(pcie == NULL) {
+ while(brg->Type == tPci2PciBrg) {
+ if( (brg->DevVenId.VenId == 0x8086 ) //Intel's Vendor ID
+ && (brg->ParentBrg->Type != tPci2PciBrg ) //Must be connected to the HOST
+ && ((brg->Address.Addr.Device == 0x1C) // 0:1C:x - PCIe root ports on PCH
+ || (brg->Address.Addr.Device == 0x1E)) // 0:1E:0 - PCI-to-PCI bridge on PCH
+ && ( (dev->PciIo.RomImage != NULL ) //Device must have an Option ROM
+ || (dev->Bar[PCI_MAX_BAR_NO].Type != tBarUnused) )
+ && (dev->Address.Addr.Function == 0 ))
+ {
+ if (PrimaryPcie != 0) {
+ if (brg->Address.Addr.Device == 0x1C)
+ {
+ if (brg->Address.Addr.Function == 1 && PrimaryPcie == 1)
+ pcie = dev->Handle;
+ else if (brg->Address.Addr.Function == 2 && PrimaryPcie == 2)
+ pcie = dev->Handle;
+ if (brg->Address.Addr.Function == 3 && PrimaryPcie == 3)
+ pcie = dev->Handle;
+ if (brg->Address.Addr.Function == 4 && PrimaryPcie == 4)
+ pcie = dev->Handle;
+ else if (brg->Address.Addr.Function == 5 && PrimaryPcie == 5)
+ pcie = dev->Handle;
+ else if (brg->Address.Addr.Function == 6 && PrimaryPcie == 6)
+ pcie = dev->Handle;
+ else if (brg->Address.Addr.Function == 7 && PrimaryPcie == 7)
+ pcie = dev->Handle;
+ else if (brg->Address.Addr.Function == 0)
+ pcie0 = dev->Handle;
+
+ }
+ } else pcie=dev->Handle;
+ }
+
+ if(pcie != NULL) break;
+ brg = brg->ParentBrg;
+ } //#### while
+ } //#### if(pcie == NULL)
+ } //#### for;
+
+ if (PrimaryPeg != 0 && peg == NULL) {
+ peg = peg00;
+ ChangePrimaryPeg = TRUE;
+ }
+
+ if (PrimaryPcie != 0 && pcie == NULL) {
+ pcie = pcie0;
+ ChangePrimaryPcie = TRUE;
+ }
+
+ //Clear Temp Buffer we had for VGA Handles;
+ ClearItemLst(&VgaList, FALSE);
+ //3=AUTO 0=IGD 1=PEG 2=pcie
+ switch(PriVideo) {
+ case 3 : //0 = auto PEG -> pcie -> IGD
+ if(peg) {
+ *vh = peg;
+ break;
+ }
+
+ if(pcie) {
+ *vh = pcie;
+ break;
+ }
+
+ if(igd) *vh = igd;
+ break;
+
+ case 4 : //SG: 1=IGD
+ case 0 : //1=IGD b0|d2|f0
+ if(igd) {
+ *vh = igd;
+ } else {
+ ChangeIgfxToAuto = TRUE;
+ }
+ break;
+
+ case 1 : //1=PEG Bridge b0|d1|f0
+ if(peg) {
+ *vh = peg;
+ } else {
+ ChangePegToAuto = TRUE;
+ }
+ break;
+
+ case 2 : //1=PCI2 PCI bridge b0|d1E|f0
+ if(pcie) {
+ *vh = pcie;
+ } else {
+ ChangepcieToAuto = TRUE;
+ }
+ break;
+ } // switch
+
+ if(*vh == NULL) {
+ Status = EFI_UNSUPPORTED;
+ pBS->FreePool(vh);
+ } else {
+ Status = EFI_SUCCESS;
+ *HandleCount=1;
+ *HandleBuffer=vh;
+ }
+
+ if(ChangeIgfxToAuto || ChangePegToAuto || ChangepcieToAuto || ChangePrimaryPeg || ChangePrimaryPcie) {
+#if defined APAC_NB_SETUP_SUPPORT || defined NB_SETUP_SUPPORT
+#if APAC_NB_SETUP_SUPPORT == 1 || NB_SETUP_SUPPORT == 1
+ EFI_STATUS SetupStatus;
+ SETUP_DATA *SetupData = NULL;
+ EFI_GUID SetupGuid = SETUP_GUID;
+ UINT32 Attributes; // [ EIP167027 ]
+
+
+ //SetupStatus = GetEfiVariable(L"Setup",&SetupGuid,NULL,&sz,&SetupData); // [ EIP167027 ]
+ SetupStatus = GetEfiVariable(L"Setup",&SetupGuid,&Attributes,&sz,&SetupData);
+ if (!EFI_ERROR(SetupStatus))
+ {
+ if (ChangePrimaryPeg) SetupData->PrimaryPeg = 0; // change to AUTO
+ if (ChangePrimaryPcie) SetupData->PrimaryPcie = 0; // change to AUTO
+
+ if(ChangeIgfxToAuto || ChangePegToAuto || ChangepcieToAuto)
+ SetupData->PrimaryDisplay = 3; // change to AUTO
+
+ //SetupStatus = pRS->SetVariable (
+ // L"Setup",
+ // &SetupGuid,
+ // EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
+ // sizeof(SETUP_DATA),
+ // SetupData);
+ SetupStatus = pRS->SetVariable (
+ L"Setup",
+ &SetupGuid,
+ Attributes,
+ sizeof(SETUP_DATA),
+ SetupData);
+ ASSERT_EFI_ERROR (SetupStatus);
+ }
+#endif
+#endif
+ }
+ }break;
+ default: Status = EFI_UNSUPPORTED;
+ } // switch
+
+ return Status;
+}
+
+#endif
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/NB/NBPEI.DXS b/Board/NB/NBPEI.DXS
new file mode 100644
index 0000000..1d5aa29
--- /dev/null
+++ b/Board/NB/NBPEI.DXS
@@ -0,0 +1,73 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBPEI.DXS 2 7/03/12 6:47a Yurenlai $
+//
+// $Revision: 2 $
+//
+// $Date: 7/03/12 6:47a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBPEI.DXS $
+//
+// 2 7/03/12 6:47a Yurenlai
+// [TAG] None
+// [Severity] Important
+// [Description] Change for SystemAgent RefCode Revision: 0.6.0.
+// [Files] NBPEI.DXS, NB.sd, NBDxe.c, NBPEI.c
+//
+// 1 2/08/12 4:32a Yurenlai
+// Intel Haswell/NB eChipset initially releases.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: NBPEI.DXS
+//
+// Description: This file is the dependency file for the NB PEI driver
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#include <Token.h>
+#include <pei.h>
+#include "ppi\CpuIo.h"
+#include "ppi\PciCfg2.h"
+#include "ppi\CPUPolicy.h"
+#include "ppi\CspLibPpi.h"
+#include "ppi\ReadOnlyVariable2.h"
+#include "ppi\Stall.h"
+
+DEPENDENCY_START
+ EFI_PEI_CPU_IO_PPI_INSTALLED_GUID AND
+ EFI_PEI_READ_ONLY_VARIABLE2_PPI_GUID AND
+ EFI_PEI_PCI_CFG2_PPI_GUID AND
+ EFI_PEI_STALL_PPI_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/NB/NBPEIBoard.c b/Board/NB/NBPEIBoard.c
new file mode 100644
index 0000000..e2b4fe8
--- /dev/null
+++ b/Board/NB/NBPEIBoard.c
@@ -0,0 +1,94 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBPEIBoard.c 1 2/08/12 4:32a Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 4:32a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBPEIBoard.c $
+//
+// 1 2/08/12 4:32a Yurenlai
+// Intel Haswell/NB eChipset initially releases.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: NBPEIBoard.C
+//
+// Description: This file contains PEI stage board component code for
+// North Bridge.
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+//----------------------------------------------------------------------------
+// Include(s)
+//----------------------------------------------------------------------------
+
+#include <Efi.h>
+#include <Pei.h>
+#include <token.h>
+#include <AmiPeiLib.h>
+#include "Nb.h"
+
+#include <ppi\CspLibPpi.h>
+
+//----------------------------------------------------------------------------
+// Constant, Macro and Type Definition(s)
+//----------------------------------------------------------------------------
+// Constant Definition(s)
+
+// Macro Definition(s)
+
+// Type Definition(s)
+
+// Function Prototype(s)
+
+//----------------------------------------------------------------------------
+// Variable and External Declaration(s)
+//----------------------------------------------------------------------------
+// Variable Declaration(s)
+
+// GUID Definition(s)
+
+// PPI Definition(s)
+
+// PPI that are installed
+
+// PPI that are notified
+
+// External Declaration(s)
+
+// Function Definition(s)
+
+//----------------------------------------------------------------------------
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/NB/NBSECInit.ASM b/Board/NB/NBSECInit.ASM
new file mode 100644
index 0000000..7cb97ad
--- /dev/null
+++ b/Board/NB/NBSECInit.ASM
@@ -0,0 +1,249 @@
+ TITLE NBSECInit.ASM -- North Bridge SEC initialization
+;*************************************************************************
+;*************************************************************************
+;** **
+;** (C)Copyright 1985-2011, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;*************************************************************************
+;*************************************************************************
+
+;*************************************************************************
+; $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBSECInit.ASM 2 8/14/12 3:47a Yurenlai $
+;
+; $Revision: 2 $
+;
+; $Date: 8/14/12 3:47a $
+;*************************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBSECInit.ASM $
+;
+; 2 8/14/12 3:47a Yurenlai
+; [TAG] None
+; [Category] Improvement
+; [Description] If the PCIEXBAR register is enabled, it is INIT.
+; [Files] NBSECInit.ASM
+;
+; 1 2/08/12 4:32a Yurenlai
+; Intel Haswell/NB eChipset initially releases.
+;
+;*************************************************************************
+;<AMI_FHDR_START>
+;
+; Name: NBSECInit.ASM
+;
+; Description: Program any workaround or initialization needed before
+; enabling Cache as memory in the SEC stage
+;
+;<AMI_FHDR_END>
+;*************************************************************************
+
+;----------------------------------------------------------------------------
+ INCLUDE token.equ
+;----------------------------------------------------------------------------
+
+.586P
+.XMM
+.MODEL SMALL
+
+; Externs
+EXTERN SECNB_EarlyInitEnd:NEAR32
+
+IFDEF MKF_ENABLE_NB_DMI_GEN2_IN_SEC
+IF MKF_ENABLE_NB_DMI_GEN2_IN_SEC
+EXTERN SECSB_DmiGen2Init:NEAR32
+PUBLIC SECNB_DmiGen2Link
+ENDIF
+ENDIF
+
+
+; Define the equates here
+NB_BUS EQU 0
+NB_DEV_FUN EQU 0
+MSR_IA32_PLATFORM_ID EQU 0017h
+
+;----------------------------------------------------------------------------
+; STARTUP_SEG S E G M E N T STARTS
+;----------------------------------------------------------------------------
+STARTUP_SEG SEGMENT PARA PUBLIC 'CODE' USE32
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: SECNB_EarlyInit
+;
+; Description: This routine initializes north bridge for PEI preparation
+;
+; Input: ESP BIST Info
+; EBP Reset ID (EDX at reset)
+; Stack not available
+;
+; Output: None
+;
+; Modified: All, except EBP and ESP
+;
+; Notes: None.
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+SECNB_EarlyInit PROC PUBLIC
+
+ mov al, 003h
+ out 80h, al
+
+ ; If the PCIEXBAR register is enabled, it is INIT.
+ mov eax, (1 shl 31t) + (NB_BUS shl 16t) + (NB_DEV_FUN shl 8) + 60h ; 0:0:0:60
+ mov dx, 0CF8h
+ out dx, eax
+ mov dl, 0FCh
+ in al, dx
+ and al, 1 ; Zero?
+ jz NotInit ; JIf yes (PAM0 mapped to flash on cold reset)
+
+ ; Do a hard Reset if INIT.
+ mov al, 6
+ mov dx, 0cf9h
+ out dx, al
+ jmp $
+
+NotInit:
+
+ ; Program PCI Express base address
+ ; SNB bug [2992042]
+ ; Programming of PCIEXBAR has to be done in two steps:
+ ; 1. Program the length first - bits [2:1]
+ ; 2. Program the base and enable bit (read / modify / write).
+ mov eax, (1 shl 31t) + (NB_BUS shl 16t) + (NB_DEV_FUN shl 8) + 60h ; 0:0:0:60 ; 0:0:0:60
+ mov dx, 0CF8h
+ out dx, eax
+ mov dl, 0FCh
+ mov eax, MKF_PCIEX_LENGTH_BIT_SETTING ; Program the length first.
+ out dx, eax
+ in eax, dx
+ or eax, MKF_PCIEX_BASE_ADDRESS OR 1 ; Program the Base and Enable bit.
+ out dx, eax
+
+ ; Program PXPEPBAR address
+ mov eax, (1 shl 31t) + (NB_BUS shl 16t) + (NB_DEV_FUN shl 8) + 40h ; 0:0:0:40 ; 0:0:0:60
+ mov dx, 0CF8h
+ out dx, eax
+ mov dl, 0FCh
+ mov eax, MKF_NB_EP_BASE_ADDRESS OR 1 ; Set the Enable bit.
+ out dx, eax
+
+ ; Program MCHBAR address
+ mov eax, (1 shl 31t) + (NB_BUS shl 16t) + (NB_DEV_FUN shl 8) + 48h ; 0:0:0:48 ; 0:0:0:60
+ mov dx, 0CF8h
+ out dx, eax
+ mov dl, 0FCh
+ mov eax, MKF_NB_MCH_BASE_ADDRESS OR 1 ; Set the Enable bit.
+ out dx, eax
+
+ ; Program DMIBAR address
+ mov eax, (1 shl 31t) + (NB_BUS shl 16t) + (NB_DEV_FUN shl 8) + 68h ; 0:0:0:68 ; 0:0:0:60
+ mov dx, 0CF8h
+ out dx, eax
+ mov dl, 0FCh
+ mov eax, MKF_NB_DMI_BASE_ADDRESS OR 1 ; Set the Enable bit.
+ out dx, eax
+
+IFDEF MKF_ENABLE_NB_DMI_GEN2_IN_SEC
+IF MKF_ENABLE_NB_DMI_GEN2_IN_SEC
+ ; Check CPU Support Gen 2?
+ mov eax, (1 shl 31t) + (NB_BUS shl 16t) + (NB_DEV_FUN shl 8) + 0E4h ; 0:0:0:E4 ; 0:0:0:E4
+ mov dx, 0CF8h
+ out dx, eax
+ mov dl, 0FCh
+ in eax, dx
+ and eax, (1 SHL 22)
+ jnz SECNB_Init_Exit ; if Gen 1, jmp exit
+
+ ; Check SNB or IVB ?
+ mov eax, (1 shl 31t) + (NB_BUS shl 16t) + (NB_DEV_FUN shl 8) + 00h ; 0:0:0:00 ; 0:0:0:00
+ mov dx, 0CF8h
+ out dx, eax
+ mov dl, 0FEh
+ in ax, dx
+ and al, 0F0h
+ cmp al, 50h
+ jne not_IVB ; if SNB, jmp not_IVB
+ jmp SECSB_DmiGen2Prog
+not_IVB:
+
+ ; Set DMIBAR Offset BC0[8:6] = 000 before enabling Gen2, for SNB only
+ mov esi, MKF_NB_DMI_BASE_ADDRESS + 0BC0h
+ mov eax, dword ptr [esi]
+ and eax, NOT ((1 SHL 8) + (1 SHL 7) + (1 SHL 6))
+ mov dword ptr [esi], eax
+
+SECSB_DmiGen2Prog:
+ jmp SECSB_DmiGen2Init
+SECNB_DmiGen2Link::
+
+ ; Program CPU Max Link Speed to Gen 2
+ mov esi, MKF_NB_DMI_BASE_ADDRESS + 84h
+ mov eax, dword ptr [esi]
+ and eax, NOT (0Fh)
+ or eax, (1 SHL 1)
+ mov dword ptr [esi], eax
+
+ jmp SECNB_Retrainlink
+SECNB_Init_Exit::
+ENDIF
+ENDIF
+ jmp SECNB_EarlyInitEnd
+SECNB_EarlyInit ENDP
+
+IFDEF MKF_ENABLE_NB_DMI_GEN2_IN_SEC
+IF MKF_ENABLE_NB_DMI_GEN2_IN_SEC
+SECNB_Retrainlink PROC PUBLIC
+
+ ; Retrain link
+ mov esi, MKF_NB_DMI_BASE_ADDRESS + 88h
+ or byte ptr [esi], (1 SHL 5)
+
+ mov esi, MKF_NB_DMI_BASE_ADDRESS + 8Ah
+waitLoop0:
+ mov ax, word ptr [esi]
+ and ax, (1 SHL 11)
+ jnz waitLoop0
+
+ ; Retrain link again
+ mov esi, MKF_NB_DMI_BASE_ADDRESS + 88h
+ or byte ptr [esi], (1 SHL 5)
+
+ mov esi, MKF_NB_DMI_BASE_ADDRESS + 8Ah
+waitLoop1:
+ mov ax, word ptr [esi]
+ and ax, (1 SHL 11)
+ jnz waitLoop1
+
+ jmp SECNB_Init_Exit
+SECNB_Retrainlink ENDP
+ENDIF
+ENDIF
+;----------------------------------------------------------------------------
+; STARTUP_SEG S E G M E N T ENDS
+;----------------------------------------------------------------------------
+STARTUP_SEG ENDS
+END
+
+;*************************************************************************
+;*************************************************************************
+;** **
+;** (C)Copyright 1985-2011, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;*************************************************************************
+;*************************************************************************
diff --git a/Board/NB/NBSetup/NB.sd b/Board/NB/NBSetup/NB.sd
new file mode 100644
index 0000000..892c063
--- /dev/null
+++ b/Board/NB/NBSetup/NB.sd
@@ -0,0 +1,4944 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBSetup/NB.sd 43 5/28/14 3:16a Dennisliu $
+//
+// $Revision: 43 $
+//
+// $Date: 5/28/14 3:16a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBSetup/NB.sd $
+//
+// 43 5/28/14 3:16a Dennisliu
+// [TAG] NONE
+// [Category] Improvement
+// [Description] Create a Token "DEFAULT_REFRESH_2X_POLICY" for customer
+// to decide the default value.
+// [Files] NBSetup.sdl; NB.sd;
+//
+// 42 4/02/14 2:06a Dennisliu
+// [TAG] EIP160850
+// [Category] Improvement
+// [Description] Primary Display/PEG/PCIE Setup options do not match
+// their help text.
+// [Files] NB.sd; NB.uni;
+//
+// 41 7/09/13 4:02a Ireneyang
+// [TAG] None
+// [Category] Improvement
+// [Description] Add new feature CRID into SMBIOS Type88.
+// [Files] NB.sd; NBSetup.c; NBSetup.sdl;
+//
+// 40 5/23/13 11:46p Ireneyang
+// [TAG] None
+// [Category] Improvement
+// [Description] Fix Typo error.
+// [Files] NB.sd; NBSetup.sdl;
+//
+// 39 5/22/13 5:58a Ireneyang
+// [TAG] None
+// [Category] Improvement
+// [Description] Add [Panel Power Enable] selection into Graphics
+// Configuration of setup menu as Intel BIOS v125.
+// [Files] NB.sd; NB.uni;
+//
+// 38 4/23/13 3:24a Ireneyang
+// [TAG] None
+// [Severity] Improvement
+// [Description] Set Run-time C7 Allowed for SG Mode to Enable as default
+// value.
+// [Files] NB.sd; NB.uni;
+//
+// 37 4/17/13 6:41a Ireneyang
+// [TAG] NONE
+// [Category] Improvement
+// [Severity] Normal
+// [Symptom] Create a Token "PRIMARY_DISPLAY_SG_DEFAULT_ENABLE" for
+// customer
+// to decide if primarydispay should set to SG as default when
+// SwitchableGraphics_SUPPORT is set to 1.
+// [Files] NB.sd; NBSetup.sdl;
+//
+// 36 4/08/13 7:29a Ireneyang
+// Update SA RC to 1.4.0.0.
+//
+// 35 3/27/13 2:12a Jeffch
+// [TAG] "MaxTolud"
+// [Severity] Bug Fix
+// [Description] Fix max TOLUD setup item value on NB.sd is not match it
+// of NB.h.
+// [Files] NB.sd;
+//
+// 34 3/25/13 6:56a Ireneyang
+// [TAG] None
+// [Severity] Improvement
+// [Description] 1. Remove FlavorUpServer
+// 2. Set Default for Refresh2XMode.
+// [Files] NB.sd;
+//
+// 32 3/07/13 7:27a Ireneyang
+// [TAG] None
+// [Severity] Improvement
+// [Description] Add "C7 Allowed" option of PEG Mode into Setup Menu.
+// [Files] NB.sd; NB.uni;
+//
+// 31 3/07/13 3:49a Ireneyang
+// [TAG] None
+// [Severity] Improvement
+// [Description] Add "Hot only" option for Memory Refresh 2x support to
+// meet Intel Spec.
+// [Files] NBPEI.c; NB.uni; NB.sd; NbSetupData.h; GetSetupData.c;
+//
+// 30 1/28/13 3:43a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Update SA RC 1.0.
+// [Files] NBPei.c; GetSetupData.c; NbSetupData.h; NBDXE.c; NB.sd;
+// NB.uni;
+//
+// 29 1/14/13 6:10a Jeffch
+// [TAG] None
+// [Severity] Spec update
+// [Description] Create setup item for SA RC 0.90.
+// [Files] NBPei.c; GetNbSetupData.c NB.sd; NB.uni;
+//
+// 28 1/10/13 6:02a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Create DDR PowerDown and idle counter for setup item.
+// [Files] NBPei.c; NB.sd; NB.uni; GetSetupData.c; NbSetupData.h
+//
+// 27 1/03/13 7:35a Jeffch
+// [TAG] None
+// [Category] Bug Fix
+// [Description] Fixed Build error after PrimaryDisplay change default to
+// SG mode.
+// [Files] NB.sd;
+//
+// 26 12/24/12 2:57a Jeffch
+// [TAG] None
+// [Category] Improvement
+// [Description] added ULT SKU auto disable PEG.
+// [Files] NBPei.c; NBDxe.c; NbPlatform.h; NB.sd;
+// [TAG] None
+// [Category] Bug Fix
+// [Description] Remove tRPab and fixed XTU build fail issue.
+// [Files] NBPei.c; NBDxe.c; NB.sd;
+//
+// 24 12/18/12 5:15a Jeffch
+// [TAG] None
+// [Severity] Spec update
+// [Description] Update SA RC 0.81.
+// [Files] NBDxe.c; NBPei.c
+//
+// 23 12/14/12 5:17a Jeffch
+// [TAG] EIP106709
+// [Severity] Important
+// [Description] Support PCIE Primary display.
+// [Files] NB.sd; NBDXEboard.c; NB.uni;
+// GetSetupData.c;NbSetupData.h;
+// [TAG] None
+// [Severity] Important
+// [Description] Show memory voltage.
+// [Files] NB.sd; NB.uni; NBDxe.c
+//
+// 22 11/29/12 2:30a Jeffch
+// [TAG] None
+// [Category] Improvement
+// [Description] added bootime check IGFX Available.
+// [Files] NBDxe.c; NbPlatform.h; NB.sd;
+//
+// 21 11/29/12 12:49a Jeffch
+// [TAG] None
+// [Category] Improvement
+// [Description] added bootime check IGFX Available.
+//
+// 20 11/14/12 5:35a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Update XTU4.x function
+// [Files] NBPei.c; GetSetupData.c; NbSetupData.h; NBDXE.c; NB.sd;
+// NB.uni
+//
+// 19 11/07/12 6:24a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Change Vtd default to enable.
+// [Files] NB.sd;
+//
+// 18 10/18/12 11:10p Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Hide VBIOS version after Enable GOP.
+// [Files] NB.sd
+//
+// 17 10/14/12 5:20a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Follow SA RC 0.71.
+// [Files] NBPei.c, NBDxe.c; NBGeneric.c; NBCspLib.h; NBSetup.c;
+// Nb.sd; GetSetupData.c
+//
+// 16 10/14/12 12:39a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Update by XTU4.0.
+// [Files] NBPei.c, NBDxe.c, NBCspLib.h, NBGeneric.c
+// [TAG] None
+// [Severity] Important
+// [Description] Follow Update by Mahobay.
+// [Files] NBPei.c, NBDxe.c;
+//
+// 15 9/28/12 4:14a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] BDAT function support.
+// [Files] NB.sd, NBDxe.c, NBPEI.c, SystemAgent.sdl,
+// BdatAccessHandler.sdl
+//
+// 14 9/26/12 9:33a Yurenlai
+//
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Remove SPD XMP Profile support of the setup info.
+// [Files] NB.sd, NBSetup.c
+//
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Adjust setup item default for eDP display.
+// [Files] NB.sd
+//
+// 13 9/12/12 6:32a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Adjusted setup item default.
+// [Files] NB.sd
+//
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Add RxCEM Loop back setup item.
+// [Files] GetSetupData.c, NB.sd, NB.uni, NBPEI.c, NbSetupData.h,
+// NBPEI.c
+//
+// 12 8/14/12 4:28a Yurenlai
+// [TAG] None
+// [Severity] Important
+// [Description] Change for SystemAgent RefCode Revision: 0.6.1.
+// [Files] NB.sdl, NB.sd, NBCSP.CIF, NBDxe.c, NB.ASL, SaAudio.asl
+//
+// 11 7/27/12 8:43a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] IGfx Fource Disable Support.
+// [Files] GetSetupData.c, NB.sdl, NB.sd, NB.uni, NbSetupData.h,
+// NBDxe.c, NBPEI.c
+//
+// [TAG] None
+// [Category] Improvement
+// [Description] Adjusted NB policy debault.
+// [Files] NB.sd, NBDxe.c
+//
+// [TAG] None
+// [Category] Improvement
+// [Description] Add manufacturing defaults for Intel SA options.
+// [Files] NB.sd
+//
+// 10 7/03/12 6:49a Yurenlai
+// [TAG] None
+// [Severity] Important
+// [Description] Change for SystemAgent RefCode Revision: 0.6.0.
+// [Files] NBPEI.DXS, NB.sd, NBDxe.c, NBPEI.c
+//
+// 9 6/14/12 5:10a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Set 'Memory Scramble' default Disabled
+// [Description] NB.sd
+//
+// 8 6/14/12 5:06a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Fixed Tse 1224 will hang setup call back and value
+// error.
+// [Description] NBSetup.c, NB.sd
+//
+// 7 6/14/12 5:04a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Support token to disable PEG 0 ~ 2.
+// [Description] NB.sdl, NB.sd, NB.ASL, HOST_BUS.ASL
+//
+// 6 5/14/12 4:53a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Change MRC Fast Boot default to diasbled.
+// [Files] NB.sd
+//
+// 5 4/26/12 2:57a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Adjust Intel System Agent module the Setup item and
+// Policy.
+// [Description] GetSetupData.c, NB.sdl, NB.sd, NB.uni, NBDxe.c,
+// NBPEI.c,
+// NBSetup.c, NBSetupReset.c, NbSetupData.h
+//
+// 4 4/05/12 2:26a Yurenlai
+// [TAG] EIP87103
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Change for SystemAgent RefCode Revision: 0.5.5 .
+// [Files] NBDxe.c, NBPEI.c, NBSMI.C, NBGeneric.cm NB.sd, NBSetup.c,
+// GetSetupData.c, NbSetupData.h
+//
+// 3 3/22/12 11:22p Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Correct will hang in MRC while change DIMM.
+// [Files] NB.sd
+//
+// 2 2/23/12 6:48a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Adjusted North Bridge the Setup item value.
+//
+// 1 2/08/12 4:33a Yurenlai
+// Intel Haswell/NB eChipset initially releases.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: NB.sd
+//
+// Description: North Bridge setup form
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+#ifdef SETUP_DATA_DEFINITION
+//----------------------------------------------------------------------------
+// Put NVRAM data definitions here.
+// For example: UINT8 Data1;
+// These definitions will be converted by the build process
+// to a definitions of SETUP_DATA fields.
+//----------------------------------------------------------------------------
+ UINT8 IgdBootType;
+ UINT8 DisplayPipeB;
+ UINT8 LcdPanelType;
+ UINT8 SdvoPanelType;
+ UINT8 LcdPanelScaling;
+ UINT8 IGfxForceDisable;
+
+ UINT8 RenderStandby;
+ UINT8 DeepRenderStandby;
+
+ // GT related
+ UINT8 GtOcSupport;
+ UINT8 GtMaxOcTurboRatio;
+ UINT8 GtExtraTurboVoltage;
+
+ // LCD
+ UINT8 IgdLcdBlc;
+ UINT8 IgdLcdIBia;
+ UINT8 IgdLcdSSCC;
+ UINT8 IgdTV1Standard;
+ UINT8 IgdTV2Standard;
+ UINT8 AlsEnable;
+ UINT8 LowPowerMode;
+ UINT8 PanelPowerEnable;
+ UINT8 ActiveLFP;
+ UINT8 LfpColorDepth;
+ UINT8 GTTSize;
+ UINT8 ApertureSize;
+
+ // PEG
+ UINT8 PegAspm[3];
+ UINT8 PegAspmL0s[3];
+ UINT8 PegDeEmphasis[3];
+ UINT8 AlwaysEnablePeg;
+ UINT8 PegSamplerCalibrate;
+ UINT8 SwingControl;
+ UINT8 PegGen3Equalization;
+ UINT8 PegGen3EqualizationPhase2;
+ UINT8 PegGen3PresetSearch;
+ UINT8 PegGen3ForcePresetSearch;
+ UINT16 PegGen3PresetSearchDwellTime;
+ UINT8 PegGen3PresetSearchMarginSteps;
+ UINT8 PegGen3PresetSearchStartMargin;
+ UINT8 PegGen3PresetSearchVoltageMarginSteps;
+ UINT8 PegGen3PresetSearchVoltageStartMargin;
+ UINT8 PegGen3PresetSearchFavorTiming;
+ UINT16 PegGen3PresetSearchErrorTarget;
+ UINT8 RxCEMLoopback;
+ UINT8 RxCEMLoopbackLane;
+ UINT8 Gen3RootPortPreset[16];
+ UINT8 Gen3EndPointPreset[16];
+ UINT8 Gen3EndPointHint[16];
+ UINT8 Gen3RxCtleP[8];
+ UINT8 InitPcieAspmAfterOprom;
+ UINT8 AllowPerstGpioUsage;
+ // DVMT5.0 Graphic memory setting
+ UINT8 IgdDvmt50PreAlloc;
+ UINT8 IgdDvmt50TotalAlloc;
+ // SA Device Control
+ UINT8 SaDevice7;
+ UINT8 SaDevice4;
+ UINT8 SaAudioEnable;
+// UINT8 SaHdmiCodecPortB;
+// UINT8 SaHdmiCodecPortC;
+// UINT8 SaHdmiCodecPortD;
+ // VTD
+ UINT8 EnableVtd;
+ //SSVID WorkAround
+ UINT8 EnableNbCrid;
+ UINT8 BdatAcpiTableSupport;
+ // DMI
+ UINT8 DmiVc1;
+ UINT8 DmiVcp;
+ UINT8 DmiVcm;
+ UINT8 DmiGen2;
+ UINT8 DmiDeEmphasis;
+ UINT8 DmiIot;
+ // ASPM
+ UINT8 NBDmiAspm;
+ UINT8 NBDmiExtSync;
+ UINT8 PrimaryDisplay;
+ UINT8 PrimaryPeg;
+ UINT8 PrimaryPcie;
+ UINT8 DetectNonComplaint;
+ UINT8 IGpuPortConfig;
+ UINT8 InternalGraphics;
+ // Graphics Turbo IMON Current
+ UINT8 GfxTurboIMON;
+ // Digital port mode select
+ UINT8 DigitalPortBMode;
+ UINT8 DigitalPortCMode;
+ UINT8 DigitalPortDMode;
+ // MRC
+ UINT8 EccSupport;
+ UINT8 MrcFastBoot;
+ UINT8 ForceColdReset;
+ UINT8 RemapEnable;
+ UINT8 DisableDimmChannel0;
+ UINT8 DisableDimmChannel1;
+ UINT8 MaxTolud;
+ UINT8 DdrFreqLimit;
+ UINT16 OcDdrFreqLimit;
+ UINT8 DDRLVOption;
+ UINT32 DDRVoltageWaitTime;
+ UINT8 SpdProfileSelected;
+ UINT8 NModeSupport;
+ UINT8 ScramblerSupport;
+ UINT8 RmtCrosserEnable;
+ UINT8 ExitMode;
+ UINT8 PowerDownMode0;
+ UINT8 PowerDownMode1;
+ UINT8 PwdwnIdleCounter;
+ UINT8 EnhancedInterleave;
+ UINT8 RankInterleave;
+ UINT8 WeaklockEn;
+ UINT8 McLock;
+ UINT8 PegGenx0;
+ UINT8 PegGenx1;
+ UINT8 PegGenx2;
+
+ UINT8 MemoryThermalManagement;
+ UINT8 PeciInjectedTemp;
+ UINT8 ExttsViaTsOnBoard;
+ UINT8 ExttsViaTsOnDimm;
+ UINT8 VirtualTempSensor;
+// UINT8 RefreshRate2x;
+ UINT8 ChHashEnable;
+ UINT16 ChHashMask;
+ UINT8 ChHashInterleaveBit;
+ //
+ // Thermal Options
+ //
+ UINT8 EnableExtts; ///< REVISION_10
+ UINT8 EnableCltm; ///< REVISION_10
+ UINT8 EnableOltm; ///< REVISION_10
+ UINT8 EnablePwrDn; ///< REVISION_10
+ UINT8 Refresh2X; ///< REVISION_10
+ UINT8 Refresh2XMode; ///< REVISION_10
+ UINT8 LpddrThermalSensor; ///< REVISION_10
+ UINT8 LockPTMregs; ///< REVISION_10
+ UINT8 UserPowerWeightsEn; ///< REVISION_10
+ UINT8 EnergyScaleFact; ///< REVISION_10
+ UINT8 RaplPwrFlCh1; ///< REVISION_10
+ UINT8 RaplPwrFlCh0; ///< REVISION_10
+ UINT8 RaplLim2Lock; ///< REVISION_10
+ UINT8 RaplLim2WindX; ///< REVISION_10
+ UINT8 RaplLim2WindY; ///< REVISION_10
+ UINT8 RaplLim2Ena; ///< REVISION_10
+ UINT16 RaplLim2Pwr; ///< REVISION_10
+ UINT8 RaplLim1WindX; ///< REVISION_10
+ UINT8 RaplLim1WindY; ///< REVISION_10
+ UINT8 RaplLim1Ena; ///< REVISION_10
+ UINT16 RaplLim1Pwr; ///< REVISION_10
+ UINT8 WarmThresholdCh0Dimm0; ///< REVISION_10
+ UINT8 WarmThresholdCh0Dimm1; ///< REVISION_10
+ UINT8 WarmThresholdCh1Dimm0; ///< REVISION_10
+ UINT8 WarmThresholdCh1Dimm1; ///< REVISION_10
+ UINT8 HotThresholdCh0Dimm0; ///< REVISION_10
+ UINT8 HotThresholdCh0Dimm1; ///< REVISION_10
+ UINT8 HotThresholdCh1Dimm0; ///< REVISION_10
+ UINT8 HotThresholdCh1Dimm1; ///< REVISION_10
+ UINT8 WarmBudgetCh0Dimm0; ///< REVISION_10
+ UINT8 WarmBudgetCh0Dimm1; ///< REVISION_10
+ UINT8 WarmBudgetCh1Dimm0; ///< REVISION_10
+ UINT8 WarmBudgetCh1Dimm1; ///< REVISION_10
+ UINT8 HotBudgetCh0Dimm0; ///< REVISION_10
+ UINT8 HotBudgetCh0Dimm1; ///< REVISION_10
+ UINT8 HotBudgetCh1Dimm0; ///< REVISION_10
+ UINT8 HotBudgetCh1Dimm1; ///< REVISION_10
+ UINT8 IdleEnergyCh0Dimm1; ///< REVISION_10
+ UINT8 IdleEnergyCh0Dimm0; ///< REVISION_10
+ UINT8 PdEnergyCh0Dimm1; ///< REVISION_10
+ UINT8 PdEnergyCh0Dimm0; ///< REVISION_10
+ UINT8 ActEnergyCh0Dimm1; ///< REVISION_10
+ UINT8 ActEnergyCh0Dimm0; ///< REVISION_10
+ UINT8 RdEnergyCh0Dimm1; ///< REVISION_10
+ UINT8 RdEnergyCh0Dimm0; ///< REVISION_10
+ UINT8 WrEnergyCh0Dimm1; ///< REVISION_10
+ UINT8 WrEnergyCh0Dimm0; ///< REVISION_10
+ UINT8 IdleEnergyCh1Dimm1; ///< REVISION_10
+ UINT8 IdleEnergyCh1Dimm0; ///< REVISION_10
+ UINT8 PdEnergyCh1Dimm1; ///< REVISION_10
+ UINT8 PdEnergyCh1Dimm0; ///< REVISION_10
+ UINT8 ActEnergyCh1Dimm1; ///< REVISION_10
+ UINT8 ActEnergyCh1Dimm0; ///< REVISION_10
+ UINT8 RdEnergyCh1Dimm1; ///< REVISION_10
+ UINT8 RdEnergyCh1Dimm0; ///< REVISION_10
+ UINT8 WrEnergyCh1Dimm1; ///< REVISION_10
+ UINT8 WrEnergyCh1Dimm0; ///< REVISION_10
+ UINT8 SrefCfgEna; ///< REVISION_10
+ UINT16 SrefCfgIdleTmr; ///< REVISION_10
+ UINT8 ThrtCkeMinDefeat; ///< REVISION_10
+ UINT8 ThrtCkeMinTmr; ///< REVISION_10
+ UINT8 ThrtCkeMinDefeatLpddr; ///< REVISION_10
+ UINT8 ThrtCkeMinTmrLpddr; ///< REVISION_10
+ UINT8 EnablePwrDnLpddr; ///< REVISION_10
+ UINT16 tCL;
+ UINT16 tRCD;
+ UINT16 tRP;
+ UINT16 tRAS;
+ UINT16 tWR;
+ UINT16 tRFC;
+ UINT16 tRRD;
+ UINT16 tWTR;
+ UINT16 tRTP;
+ UINT16 tRC;
+ UINT16 tFAW;
+ UINT16 tCWL; // (P20121012A)
+ UINT16 tREFI; // (P20121012A)
+ UINT16 tRPab;
+
+ UINT8 GdxcEnable;
+ UINT8 C7Allowed;
+#endif
+
+#ifdef FORM_SET_TYPEDEF
+ #include <Protocol\NBPlatformData.h>
+#endif
+
+//---------------------------------------------------------------------------
+#if defined(VFRCOMPILE) && !defined(CONTROLS_ARE_DEFINED)
+#define CONTROL_DEFINITION
+#endif
+//---------------------------------------------------------------------------
+
+#ifdef CONTROL_DEFINITION
+
+#define NB_ONEOF_ENABLEVTD\
+ oneof varid = SETUP_DATA.EnableVtd,\
+ prompt = STRING_TOKEN(STR_MCH_VTD_PROMPT),\
+ help = STRING_TOKEN(STR_MCH_VTD_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+
+#define NB_ONEOF_IGFXFORCEDISABLE\
+ oneof varid = SETUP_DATA.IGfxForceDisable,\
+ prompt = STRING_TOKEN(STR_INT_IGFXFORCEDISABLE_PROMPT),\
+ help = STRING_TOKEN(STR_INT_IGFXFORCEDISABLE_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#if ( defined(SwitchableGraphics_SUPPORT) && (SwitchableGraphics_SUPPORT == 1) )
+
+#if ( defined(PRIMARY_DISPLAY_SG_DEFAULT_ENABLE) && (PRIMARY_DISPLAY_SG_DEFAULT_ENABLE == 1) )
+
+#define NB_ONEOF_PRIMARYDISPLAY\
+ oneof varid = SETUP_DATA.PrimaryDisplay,\
+ prompt = STRING_TOKEN(STR_PRIMARY_VIDEO),\
+ help = STRING_TOKEN(STR_PRIMARY_VIDEO_HELP1),\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 3, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_IGFX_STRING), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PEG_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCIE_STRING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_SG_STRING) , value = 4, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PRIMARYDISPLAY2\
+ oneof varid = SETUP_DATA.PrimaryDisplay,\
+ prompt = STRING_TOKEN(STR_PRIMARY_VIDEO),\
+ help = STRING_TOKEN(STR_PRIMARY_VIDEO_HELP2),\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 3, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_IGFX_STRING), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCIE_STRING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_SG_STRING) , value = 4, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+#else
+
+#define NB_ONEOF_PRIMARYDISPLAY\
+ oneof varid = SETUP_DATA.PrimaryDisplay,\
+ prompt = STRING_TOKEN(STR_PRIMARY_VIDEO),\
+ help = STRING_TOKEN(STR_PRIMARY_VIDEO_HELP1),\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 3, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_IGFX_STRING), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PEG_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCIE_STRING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_SG_STRING) , value = 4, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PRIMARYDISPLAY2\
+ oneof varid = SETUP_DATA.PrimaryDisplay,\
+ prompt = STRING_TOKEN(STR_PRIMARY_VIDEO),\
+ help = STRING_TOKEN(STR_PRIMARY_VIDEO_HELP2),\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 3, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_IGFX_STRING), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCIE_STRING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_SG_STRING) , value = 4, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#endif //PrimaryDisplay_ENABLE
+
+#else
+
+#define NB_ONEOF_PRIMARYDISPLAY\
+ oneof varid = SETUP_DATA.PrimaryDisplay,\
+ prompt = STRING_TOKEN(STR_PRIMARY_VIDEO),\
+ help = STRING_TOKEN(STR_PRIMARY_VIDEO_HELP3),\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 3, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_IGFX_STRING), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PEG_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCIE_STRING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PRIMARYDISPLAY2\
+ oneof varid = SETUP_DATA.PrimaryDisplay,\
+ prompt = STRING_TOKEN(STR_PRIMARY_VIDEO),\
+ help = STRING_TOKEN(STR_PRIMARY_VIDEO_HELP4),\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 3, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_IGFX_STRING), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCIE_STRING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PRIMARYDISPLAY1\
+ oneof varid = SETUP_DATA.PrimaryDisplay,\
+ prompt = STRING_TOKEN(STR_PRIMARY_VIDEO),\
+ help = STRING_TOKEN(STR_PRIMARY_VIDEO_HELP5),\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 3, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PEG_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCIE_STRING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#endif // SwitchableGraphics_SUPPORT
+
+#define NB_ONEOF_PRIMARYPEG\
+ oneof varid = SETUP_DATA.PrimaryPeg,\
+ prompt = STRING_TOKEN(STR_PRIMARY_PEG),\
+ help = STRING_TOKEN(STR_PRIMARY_PEG_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_PEG1), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_PEG2), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PRIMARYPCIE\
+ oneof varid = SETUP_DATA.PrimaryPcie,\
+ prompt = STRING_TOKEN(STR_PRIMARY_PCIE),\
+ help = STRING_TOKEN(STR_PRIMARY_PCIE_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_PCIE1), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_PCIE2), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_PCIE3), value = 3, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_PCIE4), value = 4, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_PCIE5), value = 5, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_PCIE6), value = 6, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_PCIE7), value = 7, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_DETECTNONCOMPLAINT\
+ oneof varid = SETUP_DATA.DetectNonComplaint,\
+ prompt = STRING_TOKEN(STR_NB_NON_COMPLIANCE),\
+ help = STRING_TOKEN(STR_NB_NON_COMPLIANCE_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_IGPUPORTCONFIG\
+ oneof varid = SETUP_DATA.IGpuPortConfig,\
+ prompt = STRING_TOKEN(STR_IGPU_PORT_CONFIG),\
+ help = STRING_TOKEN(STR_IGPU_PORT_CONFIG_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_DIGITALPORTBMODE\
+ oneof varid = SETUP_DATA.DigitalPortBMode,\
+ prompt = STRING_TOKEN(STR_IGFX_DIGITAL_PORT_B),\
+ help = STRING_TOKEN(STR_IGFX_DIGITAL_PORT_B_HELP),\
+ option text = STRING_TOKEN(STR_IGFX_PORT_SHARED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_IGFX_PORT_IGPU_ONLY), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_IGFX_PORT_HPD_ONLY), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_DIGITALPORTCMODE\
+ oneof varid = SETUP_DATA.DigitalPortCMode,\
+ prompt = STRING_TOKEN(STR_IGFX_DIGITAL_PORT_C),\
+ help = STRING_TOKEN(STR_IGFX_DIGITAL_PORT_C_HELP),\
+ option text = STRING_TOKEN(STR_IGFX_PORT_SHARED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_IGFX_PORT_IGPU_ONLY), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_IGFX_PORT_HPD_ONLY), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_DIGITALPORTDMODE\
+ oneof varid = SETUP_DATA.DigitalPortDMode,\
+ prompt = STRING_TOKEN(STR_IGFX_DIGITAL_PORT_D),\
+ help = STRING_TOKEN(STR_IGFX_DIGITAL_PORT_D_HELP),\
+ option text = STRING_TOKEN(STR_IGFX_PORT_SHARED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_IGFX_PORT_IGPU_ONLY), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_IGFX_PORT_HPD_ONLY), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_SADEVICE7\
+ oneof varid = SETUP_DATA.SaDevice7,\
+ prompt = STRING_TOKEN(STR_SA_CHAP_DEVICE_PROMPT),\
+ help = STRING_TOKEN(STR_SA_CHAP_DEVICE_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_SADEVICE4\
+ oneof varid = SETUP_DATA.SaDevice4,\
+ prompt = STRING_TOKEN(STR_SA_THERMAL_DEVICE_PROMPT),\
+ help = STRING_TOKEN(STR_SA_THERMAL_DEVICE_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_SAAUDIOENABLE\
+ oneof varid = SETUP_DATA.SaAudioEnable,\
+ prompt = STRING_TOKEN(STR_SA_AUDIO_DEVICE_PROMPT),\
+ help = STRING_TOKEN(STR_SA_AUDIO_DEVICE_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+//#define NB_ONEOF_SAHDMICODECPORTB\
+// oneof varid = SETUP_DATA.SaHdmiCodecPortB,\
+// prompt = STRING_TOKEN (STR_SA_HDMI_CODEC_PORTB_PROMPT),\
+// help = STRING_TOKEN (STR_SA_HDMI_CODEC_PORT_HELP),\
+// option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+// option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+// endoneof;
+
+//#define NB_ONEOF_SAHDMICODECPORTC\
+// oneof varid = SETUP_DATA.SaHdmiCodecPortC,\
+// prompt = STRING_TOKEN (STR_SA_HDMI_CODEC_PORTC_PROMPT),\
+// help = STRING_TOKEN (STR_SA_HDMI_CODEC_PORT_HELP),\
+// option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+// option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+// endoneof;
+
+//#define NB_ONEOF_SAHDMICODECPORTD\
+// oneof varid = SETUP_DATA.SaHdmiCodecPortD,\
+// prompt = STRING_TOKEN (STR_SA_HDMI_CODEC_PORTD_PROMPT),\
+// help = STRING_TOKEN (STR_SA_HDMI_CODEC_PORT_HELP),\
+// option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+// option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+// endoneof;
+
+#define NB_ONEOF_ENABLENBCRID\
+ oneof varid = SETUP_DATA.EnableNbCrid,\
+ questionid = AUTO_ID(NB_CRID_KEY),\
+ prompt = STRING_TOKEN (STR_ENABLE_NB_CRID_PROMPT),\
+ help = STRING_TOKEN (STR_ENABLE_NB_CRID_HELP),\
+ default = DEFAULT_CRID_ENABLE,\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED | INTERACTIVE;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = MANUFACTURING | RESET_REQUIRED | INTERACTIVE;\
+ endoneof;
+
+#define NB_NUMERIC_GFXTURBOIMON\
+ numeric varid = SETUP_DATA.GfxTurboIMON,\
+ prompt = STRING_TOKEN (STR_GRAPHICS_TURBO_IMAX),\
+ help = STRING_TOKEN (STR_GRAPHICS_TURBO_IMAX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 14,\
+ maximum = 31,\
+ step = 1,\
+ default = 31,\
+ option text = STRING_TOKEN (STR_GRAPHICS_TURBO_IMAX), value = 31, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_ONEOF_INTERNALGRAPHICS\
+ oneof varid = SETUP_DATA.InternalGraphics,\
+ prompt = STRING_TOKEN(STR_INT_GRAPHICS_PROMPT),\
+ help = STRING_TOKEN(STR_INT_GRAPHICS_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 2, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_GTTSIZE\
+ oneof varid = SETUP_DATA.GTTSize,\
+ prompt = STRING_TOKEN(STR_GTT_SIZE),\
+ help = STRING_TOKEN(STR_GTT_SIZE_HELP),\
+ option text = STRING_TOKEN(GTT_SIZE_1MB), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(GTT_SIZE_2MB), value = 2, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_APERTURESIZE\
+ oneof varid = SETUP_DATA.ApertureSize,\
+ prompt = STRING_TOKEN(STR_APERTURE_SIZE),\
+ help = STRING_TOKEN(STR_APERTURE_SIZE_HELP),\
+ option text = STRING_TOKEN(APERTURE_SIZE_128MB), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(APERTURE_SIZE_256MB), value = 2, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(APERTURE_SIZE_512MB), value = 3, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_IGDDVMT50PREALLOC\
+ oneof varid = SETUP_DATA.IgdDvmt50PreAlloc,\
+ prompt = STRING_TOKEN(STR_DVMT50_PRE_ALLOC),\
+ help = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_HELP),\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_32M), value=1, flags=DEFAULT | MANUFACTURING | RESET_REQUIRED, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_64M), value=2, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_96M), value=3, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_128M), value=4, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_160M), value=5, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_192M), value=6, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_224M), value=7, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_256M), value=8, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_288M), value=9, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_320M), value=10, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_352M), value=11, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_384M), value=12, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_416M), value=13, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_448M), value=14, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_480M), value=15, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_512M), value=16, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_PRE_ALLOC_1024M),value=17, flags=0, key= 0x00;\
+ endoneof;
+
+#define NB_ONEOF_IGDDVMT50TOTALALLOC\
+ oneof varid = SETUP_DATA.IgdDvmt50TotalAlloc,\
+ prompt = STRING_TOKEN(STR_DVMT50_DVMT ),\
+ help = STRING_TOKEN(STR_DVMT50_DVMT_HELP),\
+ option text = STRING_TOKEN(STR_DVMT50_ALLOC_128), value=1, flags=0, key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_ALLOC_256), value=2, flags=DEFAULT|MANUFACTURING|RESET_REQUIRED,key= 0x00;\
+ option text = STRING_TOKEN(STR_DVMT50_ALLOC_MAX), value=3, flags=0, key= 0x00;\
+ endoneof;
+
+#define NB_ONEOF_LOWPOWERMODE\
+ oneof varid = SETUP_DATA.LowPowerMode,\
+ prompt = STRING_TOKEN (STR_LOW_POWER_MODE),\
+ help = STRING_TOKEN (STR_LOW_POWER_MODE_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PANELPOWERE\
+ oneof varid = SETUP_DATA.PanelPowerEnable,\
+ prompt = STRING_TOKEN (STR_PANEL_POWER_ENABLE),\
+ help = STRING_TOKEN (STR_PANEL_POWER_ENABLE_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_IGDBOOTTYPE\
+ oneof varid = SETUP_DATA.IgdBootType,\
+ prompt = STRING_TOKEN(STR_VIDEO_BT_PROMPT),\
+ help = STRING_TOKEN(STR_VIDEO_BT_HELP),\
+ option text = STRING_TOKEN(STR_VIDEO_BT_DEFAULT), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_BT_CRT), value = 0x01, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_BT_EFP), value = 0x04, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_BT_LFP), value = 0x08, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_BT_EFP3), value = 0x20, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_BT_EFP2), value = 0x40, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_BT_LFP2), value = 0x80, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_DISPLAYPIPEB\
+ oneof varid = SETUP_DATA.DisplayPipeB,\
+ prompt = STRING_TOKEN(STR_VIDEO_BT_PIPE_B_PROMPT),\
+ help = STRING_TOKEN(STR_VIDEO_BT_PIPE_B_HELP),\
+ option text = STRING_TOKEN(STR_VIDEO_BT_PIPE_B_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_BT_CRT), value = 0x01, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_BT_EFP), value = 0x04, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_BT_LFP), value = 0x08, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_BT_EFP3), value = 0x20, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_BT_EFP2), value = 0x40, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_BT_LFP2), value = 0x80, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_LCDPANELTYPE\
+ oneof varid = SETUP_DATA.LcdPanelType,\
+ prompt = STRING_TOKEN(STR_PANELTYPE_PROMPT),\
+ help = STRING_TOKEN(STR_PANELTYPE_HELP),\
+ option text = STRING_TOKEN(STR_VIDEO_BT_DEFAULT), value = 0, flags = DEFAULT |RESET_REQUIRED | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_01), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_02), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_03), value = 3, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_04), value = 4, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_05), value = 5, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_06), value = 6, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_07), value = 7, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_08), value = 8, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_09), value = 9, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_10), value = 10, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_11), value = 11, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_12), value = 12, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_13), value = 13, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_14), value = 14, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_15), value = 15, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELTYPE_16), value = 16, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_SDVOPANELTYPE\
+ oneof varid = SETUP_DATA.SdvoPanelType,\
+ prompt = STRING_TOKEN(STR_SDVO_PANELTYPE_PROMPT),\
+ help = STRING_TOKEN(STR_SDVO_PANELTYPE_HELP),\
+ option text = STRING_TOKEN(STR_VIDEO_BT_DEFAULT), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING, key = 0;\
+ option text = STRING_TOKEN(STR_SDVO_PANELTYPE_01), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_SDVO_PANELTYPE_02), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_SDVO_PANELTYPE_03), value = 3, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_SDVO_PANELTYPE_04), value = 4, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_LCDPANELSCALING\
+ oneof varid = SETUP_DATA.LcdPanelScaling,\
+ prompt = STRING_TOKEN(STR_PANELSCALING_PROMPT),\
+ help = STRING_TOKEN(STR_PANELSCALING_HELP),\
+ option text = STRING_TOKEN(STR_PANELSCALING_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELSCALING_OFF), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PANELSCALING_FORCE), value = 6, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_IGDLCDBLC\
+ oneof varid = SETUP_DATA.IgdLcdBlc,\
+ prompt = STRING_TOKEN(STR_VIDEO_LCD_BLC),\
+ help = STRING_TOKEN(STR_VIDEO_LCD_BLCHELP),\
+ option text = STRING_TOKEN(STR_VIDEO_LCD_BLC1), value = 0x00, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_LCD_BLC2), value = 0x02, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_LCD_BLC3), value = 0x01, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_LCD_BLC4), value = 0x03, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_IGDLCDIBIA\
+ oneof varid = SETUP_DATA.IgdLcdIBia,\
+ prompt = STRING_TOKEN(STR_VIDEO_LCD_IBIA),\
+ help = STRING_TOKEN(STR_VIDEO_LCD_IBIAHLP),\
+ option text = STRING_TOKEN(STR_VIDEO_LCD_IBIAA), value = 6, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_LCD_IBIAD), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_LCD_IBIAL1), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_LCD_IBIAL2), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_LCD_IBIAL3), value = 3, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_LCD_IBIAL4), value = 4, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_LCD_IBIAL5), value = 5, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_IGDLCDSSCC\
+ oneof varid = SETUP_DATA.IgdLcdSSCC,\
+ prompt = STRING_TOKEN(STR_VIDEO_LCD_SSCC),\
+ help = STRING_TOKEN(STR_VIDEO_LCD_SSCCHLP),\
+ option text = STRING_TOKEN(STR_VIDEO_LCD_SSCC1), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_LCD_SSCC2), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_LCD_SSCC3), value = 3, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_IGDTV1STANDARD\
+ oneof varid = SETUP_DATA.IgdTV1Standard,\
+ prompt = STRING_TOKEN(STR_VIDEO_TV1_STANDARD),\
+ help = STRING_TOKEN(STR_TV1_STANDARD_HELP),\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD01), value = 0x00, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD02), value = 0x01, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD03), value = 0x11, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD04), value = 0x21, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD05), value = 0x02, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD06), value = 0x12, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD07), value = 0x22, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD08), value = 0x32, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD09), value = 0x42, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD10), value = 0x52, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD11), value = 0x62, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD12), value = 0x03, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD13), value = 0x23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD14), value = 0x33, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD15), value = 0x43, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD16), value = 0x53, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD17), value = 0x63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD18), value = 0x64, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD19), value = 0x74, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD20), value = 0x57, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD21), value = 0xD7, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD22), value = 0xD8, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD23), value = 0xF8, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD24), value = 0xE9, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD25), value = 0x7A, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_IGDTV2STANDARD\
+ oneof varid = SETUP_DATA.IgdTV2Standard,\
+ prompt = STRING_TOKEN(STR_VIDEO_TV2_STANDARD),\
+ help = STRING_TOKEN(STR_TV2_STANDARD_HELP),\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD01), value = 0x00, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD02), value = 0x01, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD03), value = 0x11, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD04), value = 0x21, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD05), value = 0x02, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD06), value = 0x12, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD07), value = 0x22, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD08), value = 0x32, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD09), value = 0x42, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD10), value = 0x52, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD11), value = 0x62, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD12), value = 0x03, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD13), value = 0x23, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD14), value = 0x33, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD15), value = 0x43, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD16), value = 0x53, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD17), value = 0x63, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD18), value = 0x64, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD19), value = 0x74, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD20), value = 0x57, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD21), value = 0xD7, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD22), value = 0xD8, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD23), value = 0xF8, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD24), value = 0xE9, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_VIDEO_TV_STANDARD25), value = 0x7A, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_ALSENABLE\
+ oneof varid = SETUP_DATA.AlsEnable,\
+ prompt = STRING_TOKEN (STR_ACPI_ALS_ENABLE),\
+ help = STRING_TOKEN (STR_ACPI_ALS_ENABLE_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_ACTIVELFP\
+ oneof varid = SETUP_DATA.ActiveLFP,\
+ prompt = STRING_TOKEN (STR_ACTIVE_LFP),\
+ help = STRING_TOKEN (STR_ACTIVE_LFP_HELP),\
+ option text = STRING_TOKEN (STR_NO_LVDS_STRING), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_INT_LVDS_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_SDVO_LVDS_STRING), value = 2, flags =RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_EDPA_LFP_STRING), value = 3, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_EDPD_LFP_STRING), value = 7, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_LFPCOLORDEPTH\
+ oneof varid = SETUP_DATA.LfpColorDepth,\
+ prompt = STRING_TOKEN (STR_LFP_COLOR_DEPTH),\
+ help = STRING_TOKEN (STR_LFP_COLOR_DEPTH_HELP),\
+ option text = STRING_TOKEN (STR_18BIT_COLOR_DEPTH_STRING), value = 0, flags = DEFAULT | MANUFACTURING |RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_24BIT_COLOR_DEPTH_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_RENDERSTANDBY\
+ oneof varid = SETUP_DATA.RenderStandby,\
+ prompt = STRING_TOKEN(STR_VIDEO_RS2_PROMPT),\
+ help = STRING_TOKEN(STR_VIDEO_RS2_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_DEEPRENDERSTANDBY\
+ oneof varid = SETUP_DATA.DeepRenderStandby,\
+ prompt = STRING_TOKEN(STR_VIDEO_DEEP_RS2_PROMPT),\
+ help = STRING_TOKEN(STR_VIDEO_DEEP_RS2_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_GTOCSUPPORT\
+ oneof varid = SETUP_DATA.GtOcSupport,\
+ prompt = STRING_TOKEN(STR_GT_OC_SUPPORT_PROMPT),\
+ help = STRING_TOKEN(STR_GT_OC_SUPPORT_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_NUMERIC_GTMAXOCTURBORATIO\
+ numeric varid = SETUP_DATA.GtMaxOcTurboRatio,\
+ prompt = STRING_TOKEN(STR_GT_OC_FREQUENCY_PROMPT),\
+ help = STRING_TOKEN(STR_GT_OC_FREQUENCY_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 22,\
+ option text = STRING_TOKEN (STR_GT_OC_FREQUENCY_PROMPT), value = 22, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GTEXTRATURBOVOLTAGE\
+ numeric varid = SETUP_DATA.GtExtraTurboVoltage,\
+ prompt = STRING_TOKEN(STR_GT_OC_VOLTAGE_PROMPT),\
+ help = STRING_TOKEN(STR_GT_OC_VOLTAGE_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 0,\
+ option text = STRING_TOKEN (STR_GT_OC_VOLTAGE_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_ONEOF_PEGGENX0\
+ oneof varid = SETUP_DATA.PegGenx0,\
+ prompt = STRING_TOKEN(STR_PEG0_GENX_SUPPORT_PROMPT),\
+ help = STRING_TOKEN(STR_PEG0_GENX_SUPPORT_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_GEN1), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_GEN2), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_GEN3), value = 3, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PEGGENX1\
+ oneof varid = SETUP_DATA.PegGenx1,\
+ prompt = STRING_TOKEN(STR_PEG1_GENX_SUPPORT_PROMPT),\
+ help = STRING_TOKEN(STR_PEG1_GENX_SUPPORT_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_GEN1), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_GEN2), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_GEN3), value = 3, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PEGGENX2\
+ oneof varid = SETUP_DATA.PegGenx2,\
+ prompt = STRING_TOKEN(STR_PEG2_GENX_SUPPORT_PROMPT),\
+ help = STRING_TOKEN(STR_PEG2_GENX_SUPPORT_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_GEN1), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_GEN2), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_GEN3), value = 3, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_C7ALLOWED\
+ oneof varid = SETUP_DATA.C7Allowed,\
+ prompt = STRING_TOKEN(STR_C7_ALLOWED_PROMPT),\
+ help = STRING_TOKEN(STR_C7_ALLOWED_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#if defined(RC_PEG_0) && (RC_PEG_0 == 1)
+
+#define NB_ONEOF_ALWAYSENABLEPEG\
+ oneof varid = SETUP_DATA.AlwaysEnablePeg,\
+ prompt = STRING_TOKEN(STR_ALWAYS_ENABLE_PEG_PROMPT),\
+ help = STRING_TOKEN(STR_ALWAYS_ENABLE_PEG_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+#else
+
+#define NB_ONEOF_ALWAYSENABLEPEG\
+ oneof varid = SETUP_DATA.AlwaysEnablePeg,\
+ prompt = STRING_TOKEN(STR_ALWAYS_ENABLE_PEG_PROMPT),\
+ help = STRING_TOKEN(STR_ALWAYS_ENABLE_PEG_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 2, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#endif
+
+#define NB_ONEOF_PEGASPM0\
+ oneof varid = SETUP_DATA.PegAspm[OFFSET_0],\
+ prompt = STRING_TOKEN(STR_PEG0_ASPM_PROMPT),\
+ help = STRING_TOKEN(STR_PEG_ASPM_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 4, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0S_PROMPT), value = 1, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L1_PROMPT), value = 2, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0SL1_PROMPT), value = 3, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PEGASPML0S0\
+ oneof varid = SETUP_DATA.PegAspmL0s[OFFSET_0],\
+ prompt = STRING_TOKEN(STR_PCIE_ASPM_L0S_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_ASPM_L0S_HELP),\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0S_RP_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0S_EP_STRING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0S_BOTH_STRING), value = 3, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PEGDEEMPHASIS0\
+ oneof varid = SETUP_DATA.PegDeEmphasis[OFFSET_0],\
+ prompt = STRING_TOKEN(STR_PCIE0_DE_EMPHASIS_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE0_DE_EMPHASIS_HELP),\
+ option text = STRING_TOKEN (STR_6DB_STRING), value = 0, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN (STR_35DB_STRING), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;\
+ endoneof;
+
+#define NB_ONEOF_PEGASPM1\
+ oneof varid = SETUP_DATA.PegAspm[OFFSET_1],\
+ prompt = STRING_TOKEN(STR_PEG1_ASPM_PROMPT),\
+ help = STRING_TOKEN(STR_PEG_ASPM_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 4, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0S_PROMPT), value = 1, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L1_PROMPT), value = 2, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0SL1_PROMPT), value = 3, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PEGASPML0S1\
+ oneof varid = SETUP_DATA.PegAspmL0s[OFFSET_1],\
+ prompt = STRING_TOKEN(STR_PCIE_ASPM_L0S_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_ASPM_L0S_HELP),\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0S_RP_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0S_EP_STRING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0S_BOTH_STRING), value = 3, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PEGDEEMPHASIS1\
+ oneof varid = SETUP_DATA.PegDeEmphasis[OFFSET_1],\
+ prompt = STRING_TOKEN(STR_PCIE1_DE_EMPHASIS_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE1_DE_EMPHASIS_HELP),\
+ option text = STRING_TOKEN (STR_6DB_STRING), value = 0, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN (STR_35DB_STRING), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;\
+ endoneof;
+
+#define NB_ONEOF_PEGASPM2\
+ oneof varid = SETUP_DATA.PegAspm[OFFSET_2],\
+ prompt = STRING_TOKEN(STR_PEG2_ASPM_PROMPT),\
+ help = STRING_TOKEN(STR_PEG_ASPM_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 4, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0S_PROMPT), value = 1, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L1_PROMPT), value = 2, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0SL1_PROMPT), value = 3, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PEGASPML0S2\
+ oneof varid = SETUP_DATA.PegAspmL0s[OFFSET_2],\
+ prompt = STRING_TOKEN(STR_PCIE_ASPM_L0S_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_ASPM_L0S_HELP),\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0S_RP_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0S_EP_STRING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCIE_ASPM_L0S_BOTH_STRING), value = 3, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PEGDEEMPHASIS2\
+ oneof varid = SETUP_DATA.PegDeEmphasis[OFFSET_2],\
+ prompt = STRING_TOKEN(STR_PCIE2_DE_EMPHASIS_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE2_DE_EMPHASIS_HELP),\
+ option text = STRING_TOKEN (STR_6DB_STRING), value = 0, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN (STR_35DB_STRING), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;\
+ endoneof;
+
+#define NB_ONEOF_PEGSAMPLERCALIBRATE\
+ oneof varid = SETUP_DATA.PegSamplerCalibrate,\
+ prompt = STRING_TOKEN(STR_PCIE_SAMPLER_CALIBRATE_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_SAMPLER_CALIBRATE_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_SWINGCONTROL\
+ oneof varid = SETUP_DATA.SwingControl,\
+ prompt = STRING_TOKEN(STR_PCIE_SWING_CONTROL_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_SWING_CONTROL_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_HALF), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_FULL), value = 2, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PEGGEN3EQUALIZATION\
+ oneof varid = SETUP_DATA.PegGen3Equalization,\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_EQUALIZATION_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_EQUALIZATION_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PEGGEN3EQUALIZATIONPHASE2\
+ oneof varid = SETUP_DATA.PegGen3EqualizationPhase2,\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_EQ_PHASE2_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_EQ_PHASE2_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_AUTO), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PEGGEN3PRESETSEARCH\
+ oneof varid = SETUP_DATA.PegGen3PresetSearch,\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_EQ_PRESET_SEARCH_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_EQ_PRESET_SEARCH_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PEGGEN3FORCEPRESETSEARCH\
+ oneof varid = SETUP_DATA.PegGen3ForcePresetSearch,\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_EQ_PRESET_RESEARCH_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_EQ_PRESET_RESEARCH_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_NUMERIC_PEGGEN3PRESETSEARCHDWELLTIME\
+ numeric varid = SETUP_DATA.PegGen3PresetSearchDwellTime,\
+ prompt = STRING_TOKEN(STR_PRESET_SEARCH_DWELL_TIME_PROMPT),\
+ help = STRING_TOKEN(STR_PRESET_SEARCH_DWELL_TIME_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 65535,\
+ step = 1,\
+ default = 1000,\
+ option text = STRING_TOKEN (STR_PRESET_SEARCH_DWELL_TIME_PROMPT), value = 400, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_PEGGEN3PRESETSEARCHMARGINSTEPS\
+ numeric varid = SETUP_DATA.PegGen3PresetSearchMarginSteps,\
+ prompt = STRING_TOKEN(STR_SEARCH_MARGIN_STEPS_PROMPT),\
+ help = STRING_TOKEN(STR_SEARCH_MARGIN_STEPS_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 255,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_SEARCH_MARGIN_STEPS_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_PEGGEN3PRESETSEARCHSTARTMARGIN\
+ numeric varid = SETUP_DATA.PegGen3PresetSearchStartMargin,\
+ prompt = STRING_TOKEN(STR_SEARCH_START_MARGIN_PROMPT),\
+ help = STRING_TOKEN(STR_SEARCH_START_MARGIN_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 4,\
+ maximum = 255,\
+ step = 1,\
+ default = 15,\
+ option text = STRING_TOKEN (STR_SEARCH_START_MARGIN_PROMPT), value = 15, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_PEGGEN3PRESETSEARCHVOLTAGEMARGINSTEPS\
+ numeric varid = SETUP_DATA.PegGen3PresetSearchVoltageMarginSteps,\
+ prompt = STRING_TOKEN(STR_VOLTAGE_SEARCH_MARGIN_STEPS_PROMPT),\
+ help = STRING_TOKEN(STR_VOLTAGE_SEARCH_MARGIN_STEPS_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 255,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_VOLTAGE_SEARCH_MARGIN_STEPS_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_PEGGEN3PRESETSEARCHVOLTAGESTARTMARGIN\
+ numeric varid = SETUP_DATA.PegGen3PresetSearchVoltageStartMargin,\
+ prompt = STRING_TOKEN(STR_VOLTAGE_SEARCH_START_MARGIN_PROMPT),\
+ help = STRING_TOKEN(STR_VOLTAGE_SEARCH_START_MARGIN_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 4,\
+ maximum = 255,\
+ step = 1,\
+ default = 20,\
+ option text = STRING_TOKEN (STR_VOLTAGE_SEARCH_START_MARGIN_PROMPT), value = 20, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_PEGGEN3PRESETSEARCHFAVORTIMING\
+ oneof varid = SETUP_DATA.PegGen3PresetSearchFavorTiming,\
+ prompt = STRING_TOKEN(STR_FAVOR_TIMING_MARGIN_PROMPT),\
+ help = STRING_TOKEN(STR_FAVOR_TIMING_MARGIN_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_NUMERIC_PEGGEN3PRESETSEARCHERRORTARGET\
+ numeric varid = SETUP_DATA.PegGen3PresetSearchErrorTarget,\
+ prompt = STRING_TOKEN(STR_ERROR_TARGET_MARGIN_PROMPT),\
+ help = STRING_TOKEN(STR_ERROR_TARGET_MARGIN_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 65535,\
+ step = 1,\
+ default = 1,\
+ option text = STRING_TOKEN (STR_ERROR_TARGET_MARGIN_PROMPT), value = 1, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET00\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_0],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE00_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE00_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE00_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET00\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_0],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE00_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE00_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE00_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT00\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_0],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE00_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE00_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE00_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET01\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_1],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE01_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE01_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE01_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET01\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_1],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE01_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE01_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE01_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT01\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_1],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE01_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE01_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE01_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET02\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_2],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE02_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE02_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE02_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET02\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_2],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE02_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE02_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE02_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT02\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_2],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE02_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE02_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE02_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET03\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_3],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE03_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE03_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE03_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET03\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_3],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE03_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE03_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE03_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT03\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_3],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE03_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE03_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE03_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET04\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_4],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE04_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE04_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE04_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET04\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_4],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE04_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE04_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE04_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT04\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_4],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE04_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE04_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE04_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET05\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_5],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE05_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE05_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE05_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET05\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_5],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE05_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE05_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE05_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT05\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_5],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE05_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE05_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE05_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET06\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_6],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE06_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE06_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE06_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET06\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_6],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE06_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE06_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE06_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT06\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_6],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE06_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE06_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE06_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET07\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_7],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE07_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE07_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE07_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET07\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_7],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE07_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE07_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE07_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT07\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_7],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE07_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE07_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE07_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET08\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_8],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE08_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE08_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE08_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET08\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_8],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE08_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE08_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE08_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT08\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_8],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE08_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE08_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE08_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET09\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_9],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE09_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE09_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE09_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET09\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_9],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE09_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE09_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE09_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT09\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_9],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE09_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE09_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE09_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET10\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_10],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE10_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE10_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE10_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET10\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_10],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE10_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE10_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE10_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT10\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_10],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE10_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE10_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE10_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET11\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_11],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE11_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE11_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE11_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET11\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_11],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE11_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE11_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE11_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT11\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_11],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE11_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE11_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE11_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET12\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_12],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE12_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE12_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE12_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET12\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_12],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE12_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE12_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE12_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT12\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_12],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE12_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE12_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE12_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET13\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_13],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE13_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE13_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE13_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET13\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_13],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE13_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE13_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE13_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT13\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_13],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE13_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE13_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE13_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET14\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_14],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE14_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE14_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE14_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET14\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_14],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE14_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE14_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE14_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT14\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_14],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE14_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE14_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE14_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ROOTPORTPRESET15\
+ numeric varid = SETUP_DATA.Gen3RootPortPreset[OFFSET_15],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE15_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE15_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 11,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ROOT_PORT_PRESET_LANE15_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTPRESET15\
+ numeric varid = SETUP_DATA.Gen3EndPointPreset[OFFSET_15],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE15_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_PRESET_LANE15_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 7,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_PRESET_LANE15_PROMPT), value = 7, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3ENDPOINTHINT15\
+ numeric varid = SETUP_DATA.Gen3EndPointHint[OFFSET_15],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE15_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_ENDPOINT_HINT_LANE15_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 11,\
+ step = 1,\
+ default = 2,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_ENDPOINT_HINT_LANE15_PROMPT), value = 2, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3RXCTLEP00\
+ numeric varid = SETUP_DATA.Gen3RxCtleP[OFFSET_0],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE00_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE00_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 15,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE00_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3RXCTLEP01\
+ numeric varid = SETUP_DATA.Gen3RxCtleP[OFFSET_1],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE01_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE01_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 15,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE01_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3RXCTLEP02\
+ numeric varid = SETUP_DATA.Gen3RxCtleP[OFFSET_2],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE02_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE02_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 15,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE02_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3RXCTLEP03\
+ numeric varid = SETUP_DATA.Gen3RxCtleP[OFFSET_3],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE03_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE03_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 15,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE03_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3RXCTLEP04\
+ numeric varid = SETUP_DATA.Gen3RxCtleP[OFFSET_4],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE04_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE04_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 15,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE04_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3RXCTLEP05\
+ numeric varid = SETUP_DATA.Gen3RxCtleP[OFFSET_5],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE05_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE05_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 15,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE05_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3RXCTLEP06\
+ numeric varid = SETUP_DATA.Gen3RxCtleP[OFFSET_6],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE06_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE06_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 15,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE06_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_GEN3RXCTLEP07\
+ numeric varid = SETUP_DATA.Gen3RxCtleP[OFFSET_7],\
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE07_PROMPT),\
+ help = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE07_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 15,\
+ step = 1,\
+ default = 8,\
+ option text = STRING_TOKEN (STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE07_PROMPT), value = 8, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_ONEOF_INITPCIEASPMAFTEROPROM\
+ oneof varid = SETUP_DATA.InitPcieAspmAfterOprom,\
+ prompt = STRING_TOKEN(STR_INT_PCIE_ASPM_AFTER_OPROM_PROMPT),\
+ help = STRING_TOKEN(STR_INT_PCIE_ASPM_AFTER_OPROM_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_ALLOWPERSTGPIOUSAGE\
+ oneof varid = SETUP_DATA.AllowPerstGpioUsage,\
+ prompt = STRING_TOKEN(STR_ALL_PERST_GPIO_USAGE_PROMPT),\
+ help = STRING_TOKEN(STR_ALL_PERST_GPIO_USAGE_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_NUMERIC_PEGRXCEMLOOPBACK\
+ oneof varid = SETUP_DATA.RxCEMLoopback,\
+ prompt = STRING_TOKEN(STR_PEG_RXCEM_LOOPBACK_MODE_PROMPT),\
+ help = STRING_TOKEN(STR_PEG_RXCEM_LOOPBACK_MODE_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_NUMERIC_PEGRXCEMLOOPBACKLANE\
+ numeric varid = SETUP_DATA.RxCEMLoopbackLane,\
+ prompt = STRING_TOKEN(STR_PEG_LANE_NO_TEST_PROMPT),\
+ help = STRING_TOKEN(STR_PEG_LANE_NO_TEST_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 15,\
+ step = 1,\
+ default = 0,\
+ option text = STRING_TOKEN (STR_PEG_LANE_NO_TEST_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_ONEOF_SPDPROFILESELECTED\
+ oneof varid = SETUP_DATA.SpdProfileSelected,\
+ prompt = STRING_TOKEN(STR_XMP_PROFILE_PROMPT),\
+ help = STRING_TOKEN(STR_XMP_PROFILE_PROMPT_HELP),\
+ option text = STRING_TOKEN (STR_DEFAULT_SPD_PROFILE), value = 0, flags = DEFAULT | INTERACTIVE | MANUFACTURING | RESET_REQUIRED, key = AUTO_ID(Default_SPD);\
+ option text = STRING_TOKEN (STR_CUSTOM_PROFILE), value = 1, flags = INTERACTIVE | RESET_REQUIRED, key = AUTO_ID(Custom_SPD);\
+ option text = STRING_TOKEN (STR_XMP_PROFILE_1), value = 2, flags = INTERACTIVE | RESET_REQUIRED, key = AUTO_ID(XMP_SPD1);\
+ option text = STRING_TOKEN (STR_XMP_PROFILE_2), value = 3, flags = INTERACTIVE | RESET_REQUIRED, key = AUTO_ID(XMP_SPD2);\
+ endoneof;
+
+#define NB_ONEOF_DDRLVOPTION\
+ oneof varid = SETUP_DATA.DDRLVOption,\
+ prompt = STRING_TOKEN(STR_DDR_LV_OPTION_PROMPT),\
+ help = STRING_TOKEN(STR_DDR_LV_OPTION_PROMPT_HELP),\
+ option text = STRING_TOKEN(STR_DDR3_STRING), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DDR3L_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_NUMERIC_DDRVOLTAGEWAITTIME\
+ numeric varid = SETUP_DATA.DDRVoltageWaitTime,\
+ prompt = STRING_TOKEN(STR_DDR_VOLTAGE_WAIT_TIME_PROMPT),\
+ help = STRING_TOKEN(STR_DDR_VOLTAGE_WAIT_TIME_PROMPT_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 3000000,\
+ step = 1,\
+ default = 0,/* default CRB time*/ \
+ option text = STRING_TOKEN (STR_DDR_VOLTAGE_WAIT_TIME_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_ONEOF_DDRFREQLIMIT\
+ oneof varid = SETUP_DATA.DdrFreqLimit,\
+ prompt = STRING_TOKEN(STR_DDR_FREQ_LIMIT_PROMPT),\
+ help = STRING_TOKEN(STR_DDR_FREQ_LIMIT_PROMPT_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DDR3_FREQ_1067_STRING), value = 3, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DDR3_FREQ_1333_STRING), value = 5, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DDR3_FREQ_1600_STRING), value = 7, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DDR3_FREQ_1867_STRING), value = 9, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DDR3_FREQ_2133_STRING), value = 11, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DDR3_FREQ_2400_STRING), value = 13, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DDR3_FREQ_2667_STRING), value = 15, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_OC_DDRFREQLIMIT\
+ oneof varid = SETUP_DATA.OcDdrFreqLimit,\
+ prompt = STRING_TOKEN(STR_DDR_FREQ_LIMIT_PROMPT),\
+ help = STRING_TOKEN(STR_DDR_FREQ_LIMIT_PROMPT_HELP),\
+ option text = STRING_TOKEN(STR_DDR3_FREQ_1067_STRING), value = 1067, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DDR3_FREQ_1333_STRING), value = 1333, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DDR3_FREQ_1600_STRING), value = 1600, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DDR3_FREQ_1867_STRING), value = 1867, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DDR3_FREQ_2133_STRING), value = 2133, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DDR3_FREQ_2400_STRING), value = 2400, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DDR3_FREQ_2667_STRING), value = 2677, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_ECCSUPPORT\
+ oneof varid = SETUP_DATA.EccSupport,\
+ prompt = STRING_TOKEN (STR_ECC_SUPPORT_PROMPT),\
+ help = STRING_TOKEN (STR_ECC_SUPPORT_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_MAXTOLUD\
+ oneof varid = SETUP_DATA.MaxTolud,\
+ prompt = STRING_TOKEN(STR_MAX_TOLUD_PROMPT),\
+ help = STRING_TOKEN(STR_MAX_TOLUD_HELP),\
+ option text = STRING_TOKEN(STR_MAX_TOLUD_DYNAMIC_STRING), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_MAX_TOLUD_1G_STRING), value = 3, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_MAX_TOLUD_1_25G_STRING), value = 4, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_MAX_TOLUD_1_5G_STRING), value = 5, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_MAX_TOLUD_1_75G_STRING), value = 6, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_MAX_TOLUD_2G_STRING), value = 7, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_MAX_TOLUD_2_25G_STRING), value = 8, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_MAX_TOLUD_2_5G_STRING), value = 9, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_MAX_TOLUD_2_75G_STRING), value = 10, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_MAX_TOLUD_3G_STRING), value = 11, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_MAX_TOLUD_3_25G_STRING), value = 12, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_NMODESUPPORT\
+ oneof varid = SETUP_DATA.NModeSupport,\
+ prompt = STRING_TOKEN (STR_NMODE_SUPPORT_PROMPT),\
+ help = STRING_TOKEN (STR_NMODE_SUPPORT_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_1N_MODE), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_2N_MODE), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_SCRAMBLERSUPPORT\
+ oneof varid = SETUP_DATA.ScramblerSupport,\
+ prompt = STRING_TOKEN (STR_MEMORY_SCRAMBLER_PROMPT),\
+ help = STRING_TOKEN (STR_MEMORY_SCRAMBLER_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#if MRC_DEBUG_PRINT_SUPPORT
+
+#define NB_ONEOF_RMTCROSSERENABLE\
+ oneof varid = SETUP_DATA.RmtCrosserEnable,\
+ prompt = STRING_TOKEN (STR_RMT_CROSSER_ENABLE_PROMPT),\
+ help = STRING_TOKEN (STR_RMT_CROSSER_ENABLE_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_MRCFASTBOOT\
+ oneof varid = SETUP_DATA.MrcFastBoot,\
+ prompt = STRING_TOKEN (STR_MRC_FAST_BOOT_ENABLE_PROMPT),\
+ help = STRING_TOKEN (STR_MRC_FAST_BOOT_ENABLE_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_BDATACPITABLESUPPORT\
+ oneof varid = SETUP_DATA.BdatAcpiTableSupport,\
+ prompt = STRING_TOKEN(STR_ENABLE_NB_BDAT_PROMPT),\
+ help = STRING_TOKEN(STR_ENABLE_NB_BDAT_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#else // #if MRC_DEBUG_PRINT_SUPPORT
+
+#define NB_ONEOF_RMTCROSSERENABLE\
+ oneof varid = SETUP_DATA.RmtCrosserEnable,\
+ prompt = STRING_TOKEN (STR_RMT_CROSSER_ENABLE_PROMPT),\
+ help = STRING_TOKEN (STR_RMT_CROSSER_ENABLE_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_MRCFASTBOOT\
+ oneof varid = SETUP_DATA.MrcFastBoot,\
+ prompt = STRING_TOKEN (STR_MRC_FAST_BOOT_ENABLE_PROMPT),\
+ help = STRING_TOKEN (STR_MRC_FAST_BOOT_ENABLE_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_BDATACPITABLESUPPORT\
+ oneof varid = SETUP_DATA.BdatAcpiTableSupport,\
+ prompt = STRING_TOKEN(STR_ENABLE_NB_BDAT_PROMPT),\
+ help = STRING_TOKEN(STR_ENABLE_NB_BDAT_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#endif // #if MRC_DEBUG_PRINT_SUPPORT
+
+#define NB_ONEOF_FORCECOLDRESET\
+ oneof varid = SETUP_DATA.ForceColdReset,\
+ prompt = STRING_TOKEN (STR_FORCE_COLD_RESET_ENABLE_PROMPT),\
+ help = STRING_TOKEN (STR_FORCE_COLD_RESET_ENABLE_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_REMAPENABLE\
+ oneof varid = SETUP_DATA.RemapEnable,\
+ prompt = STRING_TOKEN (STR_MEMORY_REMAP_ENABLE_PROMPT),\
+ help = STRING_TOKEN (STR_MEMORY_REMAP_ENABLE_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_DISABLEDIMMCHANNEL0\
+ oneof varid = SETUP_DATA.DisableDimmChannel0,\
+ prompt = STRING_TOKEN (STR_CHANNEL_A_DIMM_CONTROL_PROMPT),\
+ help = STRING_TOKEN (STR_CHANNEL_A_DIMM_CONTROL_HELP),\
+ option text = STRING_TOKEN (STR_ENABLE_BOTH_DIMMS_STRING), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_DISABLE_DIMM0_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_DISABLE_DIMM1_STRING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_DISABLE_BOTH_DIMMS_STRING), value = 3, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_DISABLEDIMMCHANNEL1\
+ oneof varid = SETUP_DATA.DisableDimmChannel1,\
+ prompt = STRING_TOKEN (STR_CHANNEL_B_DIMM_CONTROL_PROMPT),\
+ help = STRING_TOKEN (STR_CHANNEL_B_DIMM_CONTROL_HELP),\
+ option text = STRING_TOKEN (STR_ENABLE_BOTH_DIMMS_STRING), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_DISABLE_DIMM0_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_DISABLE_DIMM1_STRING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN (STR_DISABLE_BOTH_DIMMS_STRING), value = 3, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_EXITMODE\
+ oneof varid = SETUP_DATA.ExitMode,\
+ prompt = STRING_TOKEN (STR_EXIT_MODE_PROMPT),\
+ help = STRING_TOKEN (STR_EXIT_MODE_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 0xFF, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_SLOW_STRING), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_FAST_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+
+#define NB_ONEOF_POWERDOWNMODE0\
+ oneof varid = SETUP_DATA.PowerDownMode0,\
+ prompt = STRING_TOKEN(STR_POWER_DOWN_MODE_PROMPT),\
+ help = STRING_TOKEN(STR_POWER_DOWN_MODE_HELP),\
+ option text = STRING_TOKEN(STR_NO_PD_STRING), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_APD_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PPD_STRING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PPD_DLLOFF_STRING), value = 6, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 0xFF, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_POWERDOWNMODE1\
+ oneof varid = SETUP_DATA.PowerDownMode1,\
+ prompt = STRING_TOKEN(STR_POWER_DOWN_MODE_PROMPT),\
+ help = STRING_TOKEN(STR_POWER_DOWN_MODE_HELP),\
+ option text = STRING_TOKEN(STR_NO_PD_STRING), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_APD_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PPD_STRING), value = 2, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_APD_PPD_STRING), value = 3, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PWDWNIDLECOUNTER\
+ oneof varid = SETUP_DATA.PwdwnIdleCounter,\
+ prompt = STRING_TOKEN(STR_PWDWN_DOWN_IDLE_COUNTER_PROMPT),\
+ help = STRING_TOKEN(STR_PWDWN_DOWN_IDLE_COUNTER_HELP),\
+ option text = STRING_TOKEN(STR_BIOS_STRING), value = 0x80, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCODE_STRING), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_ENHANCEDINTERLEAVE\
+ oneof varid = SETUP_DATA.EnhancedInterleave,\
+ prompt = STRING_TOKEN(STR_ENHANCED_INTERLEAVE_PROMPT),\
+ help = STRING_TOKEN(STR_ENHANCED_INTERLEAVE_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_RANKINTERLEAVE\
+ oneof varid = SETUP_DATA.RankInterleave,\
+ prompt = STRING_TOKEN(STR_RANK_INTERLEAVE_PROMPT),\
+ help = STRING_TOKEN(STR_RANK_INTERLEAVE_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_WEAKLOCKEN\
+ oneof varid = SETUP_DATA.WeaklockEn,\
+ prompt = STRING_TOKEN(STR_WEAK_LOCK_ENABLE_PROMPT),\
+ help = STRING_TOKEN(STR_WEAK_LOCK_ENABLE_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_MCLOCK\
+ oneof varid = SETUP_DATA.McLock,\
+ prompt = STRING_TOKEN(STR_MC_LOCK_PROMPT),\
+ help = STRING_TOKEN(STR_MC_LOCK_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_MEMORYTHERMALMANAGEMENT\
+ oneof varid = SETUP_DATA.MemoryThermalManagement,\
+ prompt = STRING_TOKEN(STR_MEMORY_THERMAL_MANAGEMENT_PROMPT),\
+ help = STRING_TOKEN(STR_MEMORY_THERMAL_MANAGEMENT_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_PECIINJECTEDTEMP\
+ oneof varid = SETUP_DATA.PeciInjectedTemp,\
+ prompt = STRING_TOKEN(STR_PECI_INJECTED_TEMPERATURE_PROMPT),\
+ help = STRING_TOKEN(STR_PECI_INJECTED_TEMPERATURE_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_EXTTSVIATSONBOARD\
+ oneof varid = SETUP_DATA.ExttsViaTsOnBoard,\
+ prompt = STRING_TOKEN(STR_EXTTS_OVER_TS_ON_BOARD_PROMPT),\
+ help = STRING_TOKEN(STR_EXTTS_OVER_TS_ON_BOARD_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_EXTTSVIATSONDIMM\
+ oneof varid = SETUP_DATA.ExttsViaTsOnDimm,\
+ prompt = STRING_TOKEN(STR_EXTTS_OVER_TS_ON_DIMM_PROMPT),\
+ help = STRING_TOKEN(STR_EXTTS_OVER_TS_ON_DIMM_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_VIRTUALTEMPSENSOR\
+ oneof varid = SETUP_DATA.VirtualTempSensor,\
+ prompt = STRING_TOKEN(STR_VIRTUAL_TEMP_SENSOR_PROMPT),\
+ help = STRING_TOKEN(STR_VIRTUAL_TEMP_SENSOR_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_CHHASHENABLE\
+ oneof varid = SETUP_DATA.ChHashEnable,\
+ prompt = STRING_TOKEN(STR_CH_HASH_SUPPORT_PROMPT),\
+ help = STRING_TOKEN(STR_CH_HASH_SUPPORT_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_NUMERIC_CHHASHMASK\
+ numeric varid = SETUP_DATA.ChHashMask,\
+ prompt = STRING_TOKEN (STR_CH_HASH_MASK_PROMPT),\
+ help = STRING_TOKEN (STR_CH_HASH_MASK_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 1,\
+ maximum = 0x3FFF,\
+ step = 1,\
+ default = 0x30CE,\
+ option text = STRING_TOKEN (STR_TCL_VALUE), value = 0x30CE, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_ONEOF_CHHASHINTERLEAVEBIT\
+ oneof varid = SETUP_DATA.ChHashInterleaveBit,\
+ prompt = STRING_TOKEN(STR_CH_HASH_INTERLEAVED_BIT_PROMPT),\
+ help = STRING_TOKEN(STR_CH_HASH_INTERLEAVED_BIT_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_BIT06), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_BIT07), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_BIT08), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_BIT09), value = 3, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_USERPOWERWEIGHTSEN\
+ oneof varid = SETUP_DATA.UserPowerWeightsEn,\
+ prompt = STRING_TOKEN(STR_USER_POWER_WEIGHTS_ENABLE_PROMPT),\
+ help = STRING_TOKEN(STR_USER_POWER_WEIGHTS_ENABLE_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_NUMERIC_ENERGYSCALEFACT\
+ numeric varid = SETUP_DATA.EnergyScaleFact,\
+ prompt = STRING_TOKEN(STR_ENERGY_SCALE_FACT_PROMPT),\
+ help = STRING_TOKEN(STR_ENERGY_SCALE_FACT_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 7,\
+ step = 1,\
+ default = 4,\
+ option text = STRING_TOKEN (STR_ENERGY_SCALE_FACT_PROMPT), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_IDLEENERGYCH0DIMM0\
+ numeric varid = SETUP_DATA.IdleEnergyCh0Dimm0,\
+ prompt = STRING_TOKEN(STR_IDLE_ENERGY_CH0DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_IDLE_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 63,\
+ step = 1,\
+ default = 10,\
+ option text = STRING_TOKEN (STR_IDLE_ENERGY_CH0DIMM0_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_IDLEENERGYCH0DIMM1\
+ numeric varid = SETUP_DATA.IdleEnergyCh0Dimm1,\
+ prompt = STRING_TOKEN(STR_IDLE_ENERGY_CH0DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_IDLE_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 63,\
+ step = 1,\
+ default = 10,\
+ option text = STRING_TOKEN (STR_IDLE_ENERGY_CH0DIMM1_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_PDENERGYCH0DIMM0\
+ numeric varid = SETUP_DATA.PdEnergyCh0Dimm0,\
+ prompt = STRING_TOKEN(STR_PD_ENERGY_CH0DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_PD_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 63,\
+ step = 1,\
+ default = 6,\
+ option text = STRING_TOKEN (STR_PD_ENERGY_CH0DIMM0_PROMPT), value = 6, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_PDENERGYCH0DIMM1\
+ numeric varid = SETUP_DATA.PdEnergyCh0Dimm1,\
+ prompt = STRING_TOKEN(STR_PD_ENERGY_CH0DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_PD_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 63,\
+ step = 1,\
+ default = 6,\
+ option text = STRING_TOKEN (STR_PD_ENERGY_CH0DIMM1_PROMPT), value = 6, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_ACTENERGYCH0DIMM0\
+ numeric varid = SETUP_DATA.ActEnergyCh0Dimm0,\
+ prompt = STRING_TOKEN(STR_ACT_ENERGY_CH0DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_ACT_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 172,\
+ option text = STRING_TOKEN (STR_ACT_ENERGY_CH0DIMM0_PROMPT), value = 172, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_ACTENERGYCH0DIMM1\
+ numeric varid = SETUP_DATA.ActEnergyCh0Dimm1,\
+ prompt = STRING_TOKEN(STR_ACT_ENERGY_CH0DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_ACT_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 172,\
+ option text = STRING_TOKEN (STR_ACT_ENERGY_CH0DIMM1_PROMPT), value = 172, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_RDENERGYCH0DIMM0\
+ numeric varid = SETUP_DATA.RdEnergyCh0Dimm0,\
+ prompt = STRING_TOKEN(STR_RD_ENERGY_CH0DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_RD_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 212,\
+ option text = STRING_TOKEN (STR_RD_ENERGY_CH0DIMM0_PROMPT), value = 212, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_RDENERGYCH0DIMM1\
+ numeric varid = SETUP_DATA.RdEnergyCh0Dimm1,\
+ prompt = STRING_TOKEN(STR_RD_ENERGY_CH0DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_RD_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 212,\
+ option text = STRING_TOKEN (STR_RD_ENERGY_CH0DIMM1_PROMPT), value = 212, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_WRENERGYCH0DIMM0\
+ numeric varid = SETUP_DATA.WrEnergyCh0Dimm0,\
+ prompt = STRING_TOKEN(STR_WR_ENERGY_CH0DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_WR_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 221,\
+ option text = STRING_TOKEN (STR_WR_ENERGY_CH0DIMM0_PROMPT), value = 221, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_WRENERGYCH0DIMM1\
+ numeric varid = SETUP_DATA.WrEnergyCh0Dimm1,\
+ prompt = STRING_TOKEN(STR_WR_ENERGY_CH0DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_WR_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 221,\
+ option text = STRING_TOKEN (STR_WR_ENERGY_CH0DIMM1_PROMPT), value = 221, flags = MANUFACTURING; \
+ endnumeric;
+
+
+
+
+#define NB_NUMERIC_IDLEENERGYCH1DIMM0\
+ numeric varid = SETUP_DATA.IdleEnergyCh1Dimm0,\
+ prompt = STRING_TOKEN(STR_IDLE_ENERGY_CH1DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_IDLE_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 63,\
+ step = 1,\
+ default = 10,\
+ option text = STRING_TOKEN (STR_IDLE_ENERGY_CH1DIMM0_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_IDLEENERGYCH1DIMM1\
+ numeric varid = SETUP_DATA.IdleEnergyCh1Dimm1,\
+ prompt = STRING_TOKEN(STR_IDLE_ENERGY_CH1DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_IDLE_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 63,\
+ step = 1,\
+ default = 10,\
+ option text = STRING_TOKEN (STR_IDLE_ENERGY_CH1DIMM1_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_PDENERGYCH1DIMM0\
+ numeric varid = SETUP_DATA.PdEnergyCh1Dimm0,\
+ prompt = STRING_TOKEN(STR_PD_ENERGY_CH1DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_PD_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 63,\
+ step = 1,\
+ default = 6,\
+ option text = STRING_TOKEN (STR_PD_ENERGY_CH1DIMM0_PROMPT), value = 6, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_PDENERGYCH1DIMM1\
+ numeric varid = SETUP_DATA.PdEnergyCh1Dimm1,\
+ prompt = STRING_TOKEN(STR_PD_ENERGY_CH1DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_PD_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 63,\
+ step = 1,\
+ default = 6,\
+ option text = STRING_TOKEN (STR_PD_ENERGY_CH1DIMM1_PROMPT), value = 6, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_ACTENERGYCH1DIMM0\
+ numeric varid = SETUP_DATA.ActEnergyCh1Dimm0,\
+ prompt = STRING_TOKEN(STR_ACT_ENERGY_CH1DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_ACT_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 172,\
+ option text = STRING_TOKEN (STR_ACT_ENERGY_CH1DIMM0_PROMPT), value = 172, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_ACTENERGYCH1DIMM1\
+ numeric varid = SETUP_DATA.ActEnergyCh1Dimm1,\
+ prompt = STRING_TOKEN(STR_ACT_ENERGY_CH1DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_ACT_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 172,\
+ option text = STRING_TOKEN (STR_ACT_ENERGY_CH1DIMM1_PROMPT), value = 172, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_RDENERGYCH1DIMM0\
+ numeric varid = SETUP_DATA.RdEnergyCh1Dimm0,\
+ prompt = STRING_TOKEN(STR_RD_ENERGY_CH1DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_RD_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 212,\
+ option text = STRING_TOKEN (STR_RD_ENERGY_CH1DIMM0_PROMPT), value = 212, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_RDENERGYCH1DIMM1\
+ numeric varid = SETUP_DATA.RdEnergyCh1Dimm1,\
+ prompt = STRING_TOKEN(STR_RD_ENERGY_CH1DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_RD_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 212,\
+ option text = STRING_TOKEN (STR_RD_ENERGY_CH1DIMM1_PROMPT), value = 212, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_WRENERGYCH1DIMM0\
+ numeric varid = SETUP_DATA.WrEnergyCh1Dimm0,\
+ prompt = STRING_TOKEN(STR_WR_ENERGY_CH1DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_WR_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 221,\
+ option text = STRING_TOKEN (STR_WR_ENERGY_CH1DIMM0_PROMPT), value = 221, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_WRENERGYCH1DIMM1\
+ numeric varid = SETUP_DATA.WrEnergyCh1Dimm1,\
+ prompt = STRING_TOKEN(STR_WR_ENERGY_CH1DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_WR_ENERGY_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 221,\
+ option text = STRING_TOKEN (STR_WR_ENERGY_CH1DIMM1_PROMPT), value = 221, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_ONEOF_LOCKPTMREGS\
+ oneof varid = SETUP_DATA.LockPTMregs,\
+ prompt = STRING_TOKEN(STR_LOCK_PTM_REG_PROMPT),\
+ help = STRING_TOKEN(STR_LOCK_PTM_REG_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+//#define NB_ONEOF_REFRESH2X\
+// oneof varid = SETUP_DATA.Refresh2X,\
+// prompt = STRING_TOKEN(STR_REFRESH_2X_PROMPT),\
+// help = STRING_TOKEN(STR_REFRESH_2X_HELP),\
+// option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+// option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+// endoneof;
+#define NB_ONEOF_REFRESH2X\
+ oneof varid = SETUP_DATA.Refresh2X,\
+ prompt = STRING_TOKEN(STR_REFRESH_2X_PROMPT),\
+ help = STRING_TOKEN(STR_REFRESH_2X_HELP),\
+ default = DEFAULT_REFRESH_2X_POLICY,\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_REFRESH2XMODE\
+ suppressif ideqval SETUP_DATA.Refresh2X == 0;\
+ oneof varid = SETUP_DATA.Refresh2XMode,\
+ prompt = STRING_TOKEN(STR_REFRESH_2X_MODE_PROMPT),\
+ help = STRING_TOKEN(STR_REFRESH_2X_MODE_HELP),\
+ option text = STRING_TOKEN(STR_REFRESH_2X_ALWAYS), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_REFRESH_2X_HOT), value = 2, flags = RESET_REQUIRED, key = 0;\
+ endoneof;\
+ endif;
+
+#define NB_ONEOF_LPDDRTHERMALSENSOR\
+ oneof varid = SETUP_DATA.LpddrThermalSensor,\
+ prompt = STRING_TOKEN(STR_LPDDR_THERMAL_SENSOR_PROMPT),\
+ help = STRING_TOKEN(STR_LPDDR_THERMAL_SENSOR_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_SREFCFGENA\
+ oneof varid = SETUP_DATA.SrefCfgEna,\
+ prompt = STRING_TOKEN(STR_SREF_CFG_ENA_PROMPT),\
+ help = STRING_TOKEN(STR_SREF_CFG_ENA_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_NUMERIC_SREFCFGIDLETMR\
+ numeric varid = SETUP_DATA.SrefCfgIdleTmr,\
+ prompt = STRING_TOKEN(STR_SREF_CFG_IDLE_TMR_PROMPT),\
+ help = STRING_TOKEN(STR_SREF_CFG_IDLE_TMR_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 512,\
+ maximum = 65535,\
+ step = 1,\
+ default = 512,\
+ option text = STRING_TOKEN (STR_SREF_CFG_IDLE_TMR_PROMPT), value = 512, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_ONEOF_THRTCKEMINDEFEAT\
+ oneof varid = SETUP_DATA.ThrtCkeMinDefeat,\
+ prompt = STRING_TOKEN(STR_THRT_CKE_MIN_DEFEAT_PROMPT),\
+ help = STRING_TOKEN(STR_THRT_CKE_MIN_DEFEAT_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_NUMERIC_THRTCKEMINTMR\
+ numeric varid = SETUP_DATA.ThrtCkeMinTmr,\
+ prompt = STRING_TOKEN(STR_THROTTLER_CKEMIN_TIMER_PROMPT),\
+ help = STRING_TOKEN(STR_SREF_CFG_IDLE_TMR_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 48,\
+ option text = STRING_TOKEN (STR_THROTTLER_CKEMIN_TIMER_PROMPT), value = 48, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_ONEOF_ENABLEPWRDNLPDDR\
+ oneof varid = SETUP_DATA.EnablePwrDnLpddr,\
+ prompt = STRING_TOKEN(STR_ENABLE_POWER_DOWN_LPDDR_PROMPT),\
+ help = STRING_TOKEN(STR_ENABLE_POWER_DOWN_LPDDR_HELP),\
+ option text = STRING_TOKEN(STR_BIOS_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_PCODE_STRING), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_THRTCKEMINDEFEATLPDDR\
+ oneof varid = SETUP_DATA.ThrtCkeMinDefeatLpddr,\
+ prompt = STRING_TOKEN(STR_THRT_CKE_MIN_DEFEAT_LPDDR_PROMPT),\
+ help = STRING_TOKEN(STR_THRT_CKE_MIN_DEFEAT_LPDDR_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_NUMERIC_THRTCKEMINTMRLPDDR\
+ numeric varid = SETUP_DATA.ThrtCkeMinTmrLpddr,\
+ prompt = STRING_TOKEN(STR_THROTTLER_CKEMIN_TIMER_LPDDR_PROMPT),\
+ help = STRING_TOKEN(STR_THROTTLER_CKEMIN_TIMER_LPDDR_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 64,\
+ option text = STRING_TOKEN (STR_THROTTLER_CKEMIN_TIMER_LPDDR_PROMPT), value = 64, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_RAPLPWRFLCH0\
+ numeric varid = SETUP_DATA.RaplPwrFlCh0,\
+ prompt = STRING_TOKEN(STR_RAPL_POWER_FLOOR_CH0_PROMPT),\
+ help = STRING_TOKEN(STR_RAPL_POWER_FLOOR_CHX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 0,\
+ option text = STRING_TOKEN (STR_RAPL_POWER_FLOOR_CH0_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_RAPLPWRFLCH1\
+ numeric varid = SETUP_DATA.RaplPwrFlCh1,\
+ prompt = STRING_TOKEN(STR_RAPL_POWER_FLOOR_CH1_PROMPT),\
+ help = STRING_TOKEN(STR_RAPL_POWER_FLOOR_CHX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 0,\
+ option text = STRING_TOKEN (STR_RAPL_POWER_FLOOR_CH1_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_ONEOF_RAPLLIM2LOCK\
+ oneof varid = SETUP_DATA.RaplLim2Lock,\
+ prompt = STRING_TOKEN(STR_RAPL_LIM2_LOCK_PROMPT),\
+ help = STRING_TOKEN(STR_RAPL_LIM2_LOCK_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_RAPLLIM1ENA\
+ oneof varid = SETUP_DATA.RaplLim1Ena,\
+ prompt = STRING_TOKEN(STR_RAPL_LIM1_ENA_PROMPT),\
+ help = STRING_TOKEN(STR_RAPL_LIM1_ENA_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_NUMERIC_RAPLLIM1PWR\
+ numeric varid = SETUP_DATA.RaplLim1Pwr,\
+ prompt = STRING_TOKEN(STR_RAPL_LIM1_PWR_PROMPT),\
+ help = STRING_TOKEN(STR_RAPL_LIM_PWR_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 16383,\
+ step = 1,\
+ default = 0,\
+ option text = STRING_TOKEN (STR_RAPL_LIM1_PWR_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_RAPLLIM1WINDX\
+ numeric varid = SETUP_DATA.RaplLim1WindX,\
+ prompt = STRING_TOKEN(STR_RAPL_LIM1_WINDOWX_PROMPT),\
+ help = STRING_TOKEN(STR_RAPL_LIM1_WINDOWX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 3,\
+ step = 1,\
+ default = 0,\
+ option text = STRING_TOKEN (STR_RAPL_LIM1_WINDOWX_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_RAPLLIM1WINDY\
+ numeric varid = SETUP_DATA.RaplLim1WindY,\
+ prompt = STRING_TOKEN(STR_RAPL_LIM1_WINDOWY_PROMPT),\
+ help = STRING_TOKEN(STR_RAPL_LIM1_WINDOWY_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 31,\
+ step = 1,\
+ default = 0,\
+ option text = STRING_TOKEN (STR_RAPL_LIM1_WINDOWY_PROMPT), value = 0, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_ONEOF_RAPLLIM2ENA\
+ oneof varid = SETUP_DATA.RaplLim2Ena,\
+ prompt = STRING_TOKEN(STR_RAPL_LIM2_ENA_PROMPT),\
+ help = STRING_TOKEN(STR_RAPL_LIM2_ENA_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_NUMERIC_RAPLLIM2PWR\
+ numeric varid = SETUP_DATA.RaplLim2Pwr,\
+ prompt = STRING_TOKEN(STR_RAPL_LIM2_PWR_PROMPT),\
+ help = STRING_TOKEN(STR_RAPL_LIM_PWR_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 16383,\
+ step = 1,\
+ default = 222,\
+ option text = STRING_TOKEN (STR_RAPL_LIM2_PWR_PROMPT), value = 222, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_RAPLLIM2WINDX\
+ numeric varid = SETUP_DATA.RaplLim2WindX,\
+ prompt = STRING_TOKEN(STR_RAPL_LIM2_WINDOWX_PROMPT),\
+ help = STRING_TOKEN(STR_RAPL_LIM2_WINDOWX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 3,\
+ step = 1,\
+ default = 1,\
+ option text = STRING_TOKEN (STR_RAPL_LIM2_WINDOWX_PROMPT), value = 1, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_RAPLLIM2WINDY\
+ numeric varid = SETUP_DATA.RaplLim2WindY,\
+ prompt = STRING_TOKEN(STR_RAPL_LIM2_WINDOWY_PROMPT),\
+ help = STRING_TOKEN(STR_RAPL_LIM2_WINDOWY_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 31,\
+ step = 1,\
+ default = 10,\
+ option text = STRING_TOKEN (STR_RAPL_LIM2_WINDOWY_PROMPT), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_ONEOF_ENABLEEXTTS\
+ oneof varid = SETUP_DATA.EnableExtts,\
+ prompt = STRING_TOKEN(STR_ENABLE_EXTERN_STATUS_PROMPT),\
+ help = STRING_TOKEN(STR_ENABLE_EXTERN_STATUS_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_ENABLECLTM\
+ oneof varid = SETUP_DATA.EnableCltm,\
+ prompt = STRING_TOKEN(STR_ENABLE_CLTM_PROMPT),\
+ help = STRING_TOKEN(STR_ENABLE_CLTM_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_ENABLEOLTM\
+ oneof varid = SETUP_DATA.EnableOltm,\
+ prompt = STRING_TOKEN(STR_ENABLE_OLTM_PROMPT),\
+ help = STRING_TOKEN(STR_ENABLE_OLTM_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_NUMERIC_WARMTHRESHOLDCH0DIMM0\
+ numeric varid = SETUP_DATA.WarmThresholdCh0Dimm0,\
+ prompt = STRING_TOKEN(STR_WARM_THRESHOLD_CH0DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_WARM_THRESHOLD_CH0DIMM0_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_WARMTHRESHOLDCH0DIMM1\
+ numeric varid = SETUP_DATA.WarmThresholdCh0Dimm1,\
+ prompt = STRING_TOKEN(STR_WARM_THRESHOLD_CH0DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_WARM_THRESHOLD_CH0DIMM0_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_HOTHRESHOLDCH0DIMM0\
+ numeric varid = SETUP_DATA.HotThresholdCh0Dimm0,\
+ prompt = STRING_TOKEN(STR_HOT_THRESHOLD_CH0DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_HOT_THRESHOLD_CH0DIMM0_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_HOTHRESHOLDCH0DIMM1\
+ numeric varid = SETUP_DATA.HotThresholdCh0Dimm1,\
+ prompt = STRING_TOKEN(STR_HOT_THRESHOLD_CH0DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_HOT_THRESHOLD_CH0DIMM1_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_WARMTHRESHOLDCH1DIMM0\
+ numeric varid = SETUP_DATA.WarmThresholdCh1Dimm0,\
+ prompt = STRING_TOKEN(STR_WARM_THRESHOLD_CH1DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_WARM_THRESHOLD_CH1DIMM0_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_WARMTHRESHOLDCH1DIMM1\
+ numeric varid = SETUP_DATA.WarmThresholdCh1Dimm1,\
+ prompt = STRING_TOKEN(STR_WARM_THRESHOLD_CH1DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_WARM_THRESHOLD_CH1DIMM0_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_HOTHRESHOLDCH1DIMM0\
+ numeric varid = SETUP_DATA.HotThresholdCh1Dimm0,\
+ prompt = STRING_TOKEN(STR_HOT_THRESHOLD_CH1DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_HOT_THRESHOLD_CH1DIMM0_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_HOTHRESHOLDCH1DIMM1\
+ numeric varid = SETUP_DATA.HotThresholdCh1Dimm1,\
+ prompt = STRING_TOKEN(STR_HOT_THRESHOLD_CH1DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_HOT_THRESHOLD_CH1DIMM1_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_WARMBUDGETCH0DIMM0\
+ numeric varid = SETUP_DATA.WarmBudgetCh0Dimm0,\
+ prompt = STRING_TOKEN(STR_WARM_BUDGET_CH0DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_WARM_BUDGET_CH0DIMM0_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_WARMBUDGETCH0DIMM1\
+ numeric varid = SETUP_DATA.WarmBudgetCh0Dimm1,\
+ prompt = STRING_TOKEN(STR_WARM_BUDGET_CH0DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_WARM_BUDGET_CH0DIMM1_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_HOTBUDGETCH0DIMM0\
+ numeric varid = SETUP_DATA.HotBudgetCh0Dimm0,\
+ prompt = STRING_TOKEN(STR_HOT_BUDGET_CH0DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_HOT_BUDGET_CH0DIMM0_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_HOTBUDGETCH0DIMM1\
+ numeric varid = SETUP_DATA.HotBudgetCh0Dimm1,\
+ prompt = STRING_TOKEN(STR_HOT_BUDGET_CH0DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_HOT_BUDGET_CH0DIMM1_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_WARMBUDGETCH1DIMM0\
+ numeric varid = SETUP_DATA.WarmBudgetCh1Dimm0,\
+ prompt = STRING_TOKEN(STR_WARM_BUDGET_CH1DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_WARM_BUDGET_CH1DIMM0_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_WARMBUDGETCH1DIMM1\
+ numeric varid = SETUP_DATA.WarmBudgetCh1Dimm1,\
+ prompt = STRING_TOKEN(STR_WARM_BUDGET_CH1DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_WARM_BUDGET_CH1DIMM1_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_HOTBUDGETCH1DIMM0\
+ numeric varid = SETUP_DATA.HotBudgetCh1Dimm0,\
+ prompt = STRING_TOKEN(STR_HOT_BUDGET_CH1DIMM0_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_HOT_BUDGET_CH1DIMM0_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_HOTBUDGETCH1DIMM1\
+ numeric varid = SETUP_DATA.HotBudgetCh1Dimm1,\
+ prompt = STRING_TOKEN(STR_HOT_BUDGET_CH1DIMM1_PROMPT),\
+ help = STRING_TOKEN(STR_THRESHOLD_AND_BUDGET_CHXDIMMX_HELP),\
+ flags = RESET_REQUIRED,\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 255,\
+ option text = STRING_TOKEN (STR_HOT_BUDGET_CH1DIMM1_PROMPT), value = 255, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_TCL\
+ numeric varid = SETUP_DATA.tCL,\
+ prompt = STRING_TOKEN (STR_TCL_VALUE),\
+ help = STRING_TOKEN (STR_TCL_VALUE_HELP),\
+ flags = INTERACTIVE | RESET_REQUIRED,\
+ key = AUTO_ID(NB_tCL_KEY),\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 4,\
+ option text = STRING_TOKEN (STR_TCL_VALUE), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_TRCD\
+ numeric varid = SETUP_DATA.tRCD,\
+ prompt = STRING_TOKEN (STR_TRCD_VALUE),\
+ help = STRING_TOKEN (STR_TRCD_VALUE_HELP),\
+ flags = INTERACTIVE | RESET_REQUIRED,\
+ key = AUTO_ID(NB_tRCD_KEY),\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 3,\
+ option text = STRING_TOKEN (STR_TRCD_VALUE), value = 3, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_TRP\
+ numeric varid = SETUP_DATA.tRP,\
+ prompt = STRING_TOKEN (STR_TRP_VALUE),\
+ help = STRING_TOKEN (STR_TRP_VALUE_HELP),\
+ flags = INTERACTIVE | RESET_REQUIRED,\
+ key = AUTO_ID(NB_tRP_KEY),\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 3,\
+ option text = STRING_TOKEN (STR_TRP_VALUE), value = 3, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_TRAS\
+ numeric varid = SETUP_DATA.tRAS,\
+ prompt = STRING_TOKEN (STR_TRAS_VALUE),\
+ help = STRING_TOKEN (STR_TRAS_VALUE_HELP),\
+ flags = INTERACTIVE | RESET_REQUIRED,\
+ key = AUTO_ID(NB_tRAS_KEY),\
+ minimum = 0,\
+ maximum = 65535,\
+ step = 1,\
+ default = 9,\
+ option text = STRING_TOKEN (STR_TRAS_VALUE), value = 9, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_TWR\
+ numeric varid = SETUP_DATA.tWR,\
+ prompt = STRING_TOKEN (STR_TWR_VALUE),\
+ help = STRING_TOKEN (STR_TWR_VALUE_HELP),\
+ flags = INTERACTIVE | RESET_REQUIRED,\
+ key = AUTO_ID(NB_tWR_KEY),\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 5,\
+ option text = STRING_TOKEN (STR_TWR_VALUE), value = 5, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_TRFC\
+ numeric varid = SETUP_DATA.tRFC,\
+ prompt = STRING_TOKEN (STR_TRFC_VALUE),\
+ help = STRING_TOKEN (STR_TRFC_VALUE_HELP),\
+ flags = INTERACTIVE | RESET_REQUIRED,\
+ key = AUTO_ID(NB_tRFC_KEY),\
+ minimum = 0,\
+ maximum = 65535,\
+ step = 1,\
+ default = 15,\
+ option text = STRING_TOKEN (STR_TRFC_VALUE), value = 15, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_TRRD\
+ numeric varid = SETUP_DATA.tRRD,\
+ prompt = STRING_TOKEN (STR_TRRD_VALUE),\
+ help = STRING_TOKEN (STR_TRRD_VALUE_HELP),\
+ flags = INTERACTIVE | RESET_REQUIRED,\
+ key = AUTO_ID(NB_tRRD_KEY),\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 4,\
+ option text = STRING_TOKEN (STR_TRRD_VALUE), value = 4, flags = MANUFACTURING; \
+ endnumeric;\
+
+#define NB_NUMERIC_TWTR\
+ numeric varid = SETUP_DATA.tWTR,\
+ prompt = STRING_TOKEN (STR_TWTR_VALUE),\
+ help = STRING_TOKEN (STR_TWTR_VALUE_HELP),\
+ flags = INTERACTIVE | RESET_REQUIRED,\
+ key = AUTO_ID(NB_tWTR_KEY),\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 3,\
+ option text = STRING_TOKEN (STR_TWTR_VALUE), value = 3, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_TRTP\
+ numeric varid = SETUP_DATA.tRTP,\
+ prompt = STRING_TOKEN (STR_TRTP_VALUE),\
+ help = STRING_TOKEN (STR_TRTP_VALUE_HELP),\
+ flags = INTERACTIVE | RESET_REQUIRED,\
+ key = AUTO_ID(NB_tRTP_KEY),\
+ minimum = 0,\
+ maximum = 255,\
+ step = 1,\
+ default = 4,\
+ option text = STRING_TOKEN (STR_TRTP_VALUE), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_TRC\
+ numeric varid = SETUP_DATA.tRC,\
+ prompt = STRING_TOKEN (STR_TRC_VALUE),\
+ help = STRING_TOKEN (STR_TRC_VALUE_HELP),\
+ flags = INTERACTIVE | RESET_REQUIRED,\
+ key = AUTO_ID(NB_tRC_KEY),\
+ minimum = 0,\
+ maximum = 65535,\
+ step = 1,\
+ default = 15,\
+ option text = STRING_TOKEN (STR_TRC_VALUE), value = 15, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_TFAW\
+ numeric varid = SETUP_DATA.tFAW,\
+ prompt = STRING_TOKEN (STR_TFAW_VALUE),\
+ help = STRING_TOKEN (STR_TFAW_VALUE_HELP),\
+ flags = INTERACTIVE | RESET_REQUIRED,\
+ key = AUTO_ID(NB_tFAW_KEY),\
+ minimum = 0,\
+ maximum = 65535,\
+ step = 1,\
+ default = 10,\
+ option text = STRING_TOKEN (STR_TFAW_VALUE), value = 10, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_TCWL\
+ numeric varid = SETUP_DATA.tCWL,\
+ prompt = STRING_TOKEN (STR_TCWL_VALUE),\
+ help = STRING_TOKEN (STR_TCWL_VALUE_HELP),\
+ flags = INTERACTIVE | RESET_REQUIRED,\
+ key = AUTO_ID(NB_tCWL_KEY),\
+ minimum = 0,\
+ maximum = 12,\
+ step = 1,\
+ default = 5,\
+ option text = STRING_TOKEN (STR_TCWL_VALUE), value = 5, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_TREFI\
+ numeric varid = SETUP_DATA.tREFI,\
+ prompt = STRING_TOKEN (STR_TREFI_VALUE),\
+ help = STRING_TOKEN (STR_TREFI_VALUE_HELP),\
+ flags = INTERACTIVE | RESET_REQUIRED,\
+ key = AUTO_ID(NB_tREFI_KEY),\
+ minimum = 0,\
+ maximum = 65535,\
+ step = 1,\
+ default = 1,\
+ option text = STRING_TOKEN (STR_TREFI_VALUE), value = 1, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_NUMERIC_TRPAB\
+ numeric varid = SETUP_DATA.tRPab,\
+ prompt = STRING_TOKEN (STR_TRPAB_VALUE),\
+ help = STRING_TOKEN (STR_TRPAB_VALUE_HELP),\
+ flags = INTERACTIVE | RESET_REQUIRED,\
+ key = AUTO_ID(NB_tRPab_KEY),\
+ minimum = 0,\
+ maximum = 18,\
+ step = 1,\
+ default = 4,\
+ option text = STRING_TOKEN (STR_TRPAB_VALUE), value = 4, flags = MANUFACTURING; \
+ endnumeric;
+
+#define NB_ONEOF_DMIVC1\
+ oneof varid = SETUP_DATA.DmiVc1,\
+ prompt = STRING_TOKEN(STR_DMI_VC1_PROMPT),\
+ help = STRING_TOKEN(STR_DMI_VC1_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_DMIVCP\
+ oneof varid = SETUP_DATA.DmiVcp,\
+ prompt = STRING_TOKEN(STR_DMI_VCP_PROMPT),\
+ help = STRING_TOKEN(STR_DMI_VCP_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_DMIVCM\
+ oneof varid = SETUP_DATA.DmiVcm,\
+ prompt = STRING_TOKEN(STR_DMI_VCM_PROMPT),\
+ help = STRING_TOKEN(STR_DMI_VCM_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_NBDMIASPM\
+ oneof varid = SETUP_DATA.NBDmiAspm,\
+ prompt = STRING_TOKEN(STR_DMI_ASPM_PROMPT),\
+ help = STRING_TOKEN(STR_DMI_ASPM_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DMI_ASPM_L0S_STRING), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DMI_ASPM_L1_STRING), value = 2, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_DMI_ASPM_L0SL1_STRING), value = 3, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_NBDMIEXTSYNC\
+ oneof varid = SETUP_DATA.NBDmiExtSync,\
+ prompt = STRING_TOKEN(STR_DMI_EXT_SYNCH_PROMPT),\
+ help = STRING_TOKEN(STR_DMI_EXT_SYNCH_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;\
+ endoneof;
+
+#define NB_ONEOF_DMIGEN2\
+ oneof varid = SETUP_DATA.DmiGen2,\
+ prompt = STRING_TOKEN(STR_DMI_GEN2_PROMPT),\
+ help = STRING_TOKEN(STR_DMI_GEN2_HELP),\
+ option text = STRING_TOKEN(STR_COMMON_AUTO), value = 2, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED, key = 0;\
+ option text = STRING_TOKEN(STR_COMMON_DISABLED), value = 0, flags = RESET_REQUIRED, key = 0;\
+ endoneof;
+
+#define NB_ONEOF_DMIDEEMPHASIS\
+ oneof varid = SETUP_DATA.DmiDeEmphasis,\
+ prompt = STRING_TOKEN(STR_DMI_DE_EMPHASIS_PROMPT),\
+ help = STRING_TOKEN(STR_DMI_DE_EMPHASIS_HELP),\
+ option text = STRING_TOKEN (STR_6DB_STRING), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;\
+ option text = STRING_TOKEN (STR_35DB_STRING), value = 1, flags = RESET_REQUIRED;\
+ endoneof;
+
+#define NB_ONEOF_DMIIOT\
+ oneof varid = SETUP_DATA.DmiIot,\
+ prompt = STRING_TOKEN(STR_DMI_IOT_PROMPT),\
+ help = STRING_TOKEN(STR_DMI_IOT_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;\
+ endoneof;
+
+#define NB_ONEOF_GDXCENABLE\
+ oneof varid = SETUP_DATA.GdxcEnable,\
+ prompt = STRING_TOKEN(STR_GDXCENABLE_PROMPT),\
+ help = STRING_TOKEN(STR_GDXCENABLE_HELP),\
+ option text = STRING_TOKEN (STR_COMMON_ENABLED), value = 1, flags = RESET_REQUIRED;\
+ option text = STRING_TOKEN (STR_COMMON_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;\
+ endoneof;
+
+#endif // CONTROL_DEFINITION
+//---------------------------------------------------------------------------
+
+//---------------------------------------------------------------------------
+#ifdef CONTROLS_WITH_DEFAULTS
+NB_ONEOF_ENABLEVTD // EnableVtd
+NB_ONEOF_IGFXFORCEDISABLE // IGfxForceDisable
+NB_ONEOF_PRIMARYDISPLAY // PrimaryDisplay
+#if ( defined(SwitchableGraphics_SUPPORT) && (SwitchableGraphics_SUPPORT == 0) )
+NB_ONEOF_PRIMARYDISPLAY1 // PrimaryDisplay
+#endif
+NB_ONEOF_PRIMARYDISPLAY2 // PrimaryDisplay
+NB_ONEOF_PRIMARYPEG // PrimaryPeg
+NB_ONEOF_PRIMARYPCIE // PrimaryPcie
+NB_ONEOF_DETECTNONCOMPLAINT // DetectNonComplaint
+NB_ONEOF_IGPUPORTCONFIG // IGpuPortConfig
+NB_ONEOF_DIGITALPORTBMODE // DigitalPortBMode
+NB_ONEOF_DIGITALPORTCMODE // DigitalPortCMode
+NB_ONEOF_DIGITALPORTDMODE // DigitalPortDMode
+NB_ONEOF_SADEVICE7 // SaDevice7
+NB_ONEOF_SADEVICE4 // SaDevice4
+NB_ONEOF_SAAUDIOENABLE // SaAudioEnable
+//NB_ONEOF_SAHDMICODECPORTB // SaHdmiCodecPortB
+//NB_ONEOF_SAHDMICODECPORTC // SaHdmiCodecPortC
+//NB_ONEOF_SAHDMICODECPORTD // SaHdmiCodecPortD
+NB_ONEOF_ENABLENBCRID // EnableNbCrid
+NB_ONEOF_BDATACPITABLESUPPORT // BdatAcpiTableSupport
+NB_NUMERIC_GFXTURBOIMON // GfxTurboIMON
+NB_ONEOF_INTERNALGRAPHICS // InternalGraphics
+NB_ONEOF_GTTSIZE // GTTSize
+NB_ONEOF_APERTURESIZE // ApertureSize
+NB_ONEOF_IGDDVMT50PREALLOC // IgdDvmt50PreAlloc
+NB_ONEOF_IGDDVMT50TOTALALLOC // IgdDvmt50TotalAlloc
+NB_ONEOF_LOWPOWERMODE // LowPowerMode
+NB_ONEOF_PANELPOWERE // PanelPowerEnable
+NB_ONEOF_IGDBOOTTYPE // IgdBootType
+NB_ONEOF_DISPLAYPIPEB // DisplayPipeB
+NB_ONEOF_LCDPANELTYPE // LcdPanelType
+NB_ONEOF_SDVOPANELTYPE // SdvoPanelType
+NB_ONEOF_LCDPANELSCALING // LcdPanelScaling
+NB_ONEOF_IGDLCDBLC // IgdLcdBlc
+NB_ONEOF_IGDLCDIBIA // IgdLcdIBia
+NB_ONEOF_IGDLCDSSCC // IgdLcdSSCC
+NB_ONEOF_IGDTV1STANDARD // IgdTV1Standard
+NB_ONEOF_IGDTV2STANDARD // IgdTV2Standard
+NB_ONEOF_ALSENABLE // AlsEnable
+NB_ONEOF_ACTIVELFP // ActiveLFP
+NB_ONEOF_LFPCOLORDEPTH // LfpColorDepth
+NB_ONEOF_RENDERSTANDBY // RenderStandby
+NB_ONEOF_DEEPRENDERSTANDBY // DeepRenderStandby
+NB_ONEOF_GTOCSUPPORT // GtOcSupport
+NB_NUMERIC_GTMAXOCTURBORATIO // GtMaxOcTurboRatio
+NB_NUMERIC_GTEXTRATURBOVOLTAGE // GtExtraTurboVoltage
+NB_ONEOF_PEGGENX0 // PegGenx0
+NB_ONEOF_PEGGENX1 // PegGenx1
+NB_ONEOF_PEGGENX2 // PegGenx2
+NB_ONEOF_C7ALLOWED // C7Allowed
+NB_ONEOF_ALWAYSENABLEPEG // AlwaysEnablePeg
+NB_ONEOF_PEGASPM0 // PegAspm[0]
+NB_ONEOF_PEGASPML0S0 // PegAspmL0s[0]
+NB_ONEOF_PEGDEEMPHASIS0 // PegDeEmphasis[0]
+NB_ONEOF_PEGASPM1 // PegAspm[1]
+NB_ONEOF_PEGASPML0S1 // PegAspmL0s[1]
+NB_ONEOF_PEGDEEMPHASIS1 // PegDeEmphasis[1]
+NB_ONEOF_PEGASPM2 // PegAspm[2]
+NB_ONEOF_PEGASPML0S2 // PegAspmL0s[2]
+NB_ONEOF_PEGDEEMPHASIS2 // PegDeEmphasis[2]
+NB_ONEOF_PEGSAMPLERCALIBRATE // PegSamplerCalibrate
+NB_ONEOF_SWINGCONTROL // SwingControl
+NB_ONEOF_PEGGEN3EQUALIZATION // PegGen3Equalization
+NB_ONEOF_PEGGEN3EQUALIZATIONPHASE2 // PegGen3EqualizationPhase2
+NB_ONEOF_PEGGEN3PRESETSEARCH // PegGen3PresetSearch
+NB_ONEOF_PEGGEN3FORCEPRESETSEARCH // PegGen3ForcePresetSearch
+NB_NUMERIC_PEGGEN3PRESETSEARCHDWELLTIME // PegGen3PresetSearchDwellTime
+NB_NUMERIC_PEGGEN3PRESETSEARCHMARGINSTEPS // PegGen3PresetSearchMarginSteps
+NB_NUMERIC_PEGGEN3PRESETSEARCHSTARTMARGIN // PegGen3PresetSearchStartMargin
+NB_NUMERIC_PEGGEN3PRESETSEARCHVOLTAGEMARGINSTEPS // PegGen3PresetSearchVoltageMarginSteps
+NB_NUMERIC_PEGGEN3PRESETSEARCHVOLTAGESTARTMARGIN // PegGen3PresetSearchVoltageStartMargin
+NB_NUMERIC_PEGGEN3PRESETSEARCHFAVORTIMING // PegGen3PresetSearchFavorTiming
+NB_NUMERIC_PEGGEN3PRESETSEARCHERRORTARGET // PegGen3PresetSearchErrorTarget
+NB_NUMERIC_GEN3ROOTPORTPRESET00 // Gen3RootPortPreset[0]
+NB_NUMERIC_GEN3ENDPOINTPRESET00 // Gen3EndPointPreset[0]
+NB_NUMERIC_GEN3ENDPOINTHINT00 // Gen3EndPointHint[0]
+NB_NUMERIC_GEN3ROOTPORTPRESET01 // Gen3RootPortPreset[1]
+NB_NUMERIC_GEN3ENDPOINTPRESET01 // Gen3EndPointPreset[1]
+NB_NUMERIC_GEN3ENDPOINTHINT01 // Gen3EndPointHint[1]
+NB_NUMERIC_GEN3ROOTPORTPRESET02 // Gen3RootPortPreset[2]
+NB_NUMERIC_GEN3ENDPOINTPRESET02 // Gen3EndPointPreset[2]
+NB_NUMERIC_GEN3ENDPOINTHINT02 // Gen3EndPointHint[2]
+NB_NUMERIC_GEN3ROOTPORTPRESET03 // Gen3RootPortPreset[3]
+NB_NUMERIC_GEN3ENDPOINTPRESET03 // Gen3EndPointPreset[3]
+NB_NUMERIC_GEN3ENDPOINTHINT03 // Gen3EndPointHint[3]
+NB_NUMERIC_GEN3ROOTPORTPRESET04 // Gen3RootPortPreset[4]
+NB_NUMERIC_GEN3ENDPOINTPRESET04 // Gen3EndPointPreset[4]
+NB_NUMERIC_GEN3ENDPOINTHINT04 // Gen3EndPointHint[4]
+NB_NUMERIC_GEN3ROOTPORTPRESET05 // Gen3RootPortPreset[5]
+NB_NUMERIC_GEN3ENDPOINTPRESET05 // Gen3EndPointPreset[5]
+NB_NUMERIC_GEN3ENDPOINTHINT05 // Gen3EndPointHint[5]
+NB_NUMERIC_GEN3ROOTPORTPRESET06 // Gen3RootPortPreset[6]
+NB_NUMERIC_GEN3ENDPOINTPRESET06 // Gen3EndPointPreset[6]
+NB_NUMERIC_GEN3ENDPOINTHINT06 // Gen3EndPointHint[6]
+NB_NUMERIC_GEN3ROOTPORTPRESET07 // Gen3RootPortPreset[7]
+NB_NUMERIC_GEN3ENDPOINTPRESET07 // Gen3EndPointPreset[7]
+NB_NUMERIC_GEN3ENDPOINTHINT07 // Gen3EndPointHint[7]
+NB_NUMERIC_GEN3ROOTPORTPRESET08 // Gen3RootPortPreset[8]
+NB_NUMERIC_GEN3ENDPOINTPRESET08 // Gen3EndPointPreset[8]
+NB_NUMERIC_GEN3ENDPOINTHINT08 // Gen3EndPointHint[8]
+NB_NUMERIC_GEN3ROOTPORTPRESET09 // Gen3RootPortPreset[9]
+NB_NUMERIC_GEN3ENDPOINTPRESET09 // Gen3EndPointPreset[9]
+NB_NUMERIC_GEN3ENDPOINTHINT09 // Gen3EndPointHint[9]
+NB_NUMERIC_GEN3ROOTPORTPRESET10 // Gen3RootPortPreset[10]
+NB_NUMERIC_GEN3ENDPOINTPRESET10 // Gen3EndPointPreset[10]
+NB_NUMERIC_GEN3ENDPOINTHINT10 // Gen3EndPointHint[10]
+NB_NUMERIC_GEN3ROOTPORTPRESET11 // Gen3RootPortPreset[11]
+NB_NUMERIC_GEN3ENDPOINTPRESET11 // Gen3EndPointPreset[11]
+NB_NUMERIC_GEN3ENDPOINTHINT11 // Gen3EndPointHint[11]
+NB_NUMERIC_GEN3ROOTPORTPRESET12 // Gen3RootPortPreset[12]
+NB_NUMERIC_GEN3ENDPOINTPRESET12 // Gen3EndPointPreset[12]
+NB_NUMERIC_GEN3ENDPOINTHINT12 // Gen3EndPointHint[12]
+NB_NUMERIC_GEN3ROOTPORTPRESET13 // Gen3RootPortPreset[13]
+NB_NUMERIC_GEN3ENDPOINTPRESET13 // Gen3EndPointPreset[13]
+NB_NUMERIC_GEN3ENDPOINTHINT13 // Gen3EndPointHint[13]
+NB_NUMERIC_GEN3ROOTPORTPRESET14 // Gen3RootPortPreset[14]
+NB_NUMERIC_GEN3ENDPOINTPRESET14 // Gen3EndPointPreset[14]
+NB_NUMERIC_GEN3ENDPOINTHINT14 // Gen3EndPointHint[14]
+NB_NUMERIC_GEN3ROOTPORTPRESET15 // Gen3RootPortPreset[15]
+NB_NUMERIC_GEN3ENDPOINTPRESET15 // Gen3EndPointPreset[15]
+NB_NUMERIC_GEN3ENDPOINTHINT15 // Gen3EndPointHint[15]
+NB_NUMERIC_GEN3RXCTLEP00 // Gen3RxCtleP[0]
+NB_NUMERIC_GEN3RXCTLEP01 // Gen3RxCtleP[1]
+NB_NUMERIC_GEN3RXCTLEP02 // Gen3RxCtleP[2]
+NB_NUMERIC_GEN3RXCTLEP03 // Gen3RxCtleP[3]
+NB_NUMERIC_GEN3RXCTLEP04 // Gen3RxCtleP[4]
+NB_NUMERIC_GEN3RXCTLEP05 // Gen3RxCtleP[5]
+NB_NUMERIC_GEN3RXCTLEP06 // Gen3RxCtleP[6]
+NB_NUMERIC_GEN3RXCTLEP07 // Gen3RxCtleP[7]
+NB_ONEOF_INITPCIEASPMAFTEROPROM // InitPcieAspmAfterOprom
+NB_ONEOF_ALLOWPERSTGPIOUSAGE // AllowPerstGpioUsage
+NB_NUMERIC_PEGRXCEMLOOPBACK // RxCEMLoopback
+NB_NUMERIC_PEGRXCEMLOOPBACKLANE // RxCEMLoopbackLane
+NB_ONEOF_SPDPROFILESELECTED // SpdProfileSelected
+NB_ONEOF_DDRLVOPTION // DDRLVOption
+NB_NUMERIC_DDRVOLTAGEWAITTIME // DDRVoltageWaitTime
+NB_ONEOF_DDRFREQLIMIT // DdrFreqLimit
+NB_ONEOF_OC_DDRFREQLIMIT // DdrFreqLimit
+NB_ONEOF_ECCSUPPORT // EccSupport
+NB_ONEOF_MAXTOLUD // MaxTolud
+NB_ONEOF_NMODESUPPORT // NModeSupport
+NB_ONEOF_SCRAMBLERSUPPORT // ScramblerSupport
+NB_ONEOF_RMTCROSSERENABLE // RmtCrosserEnable
+NB_ONEOF_MRCFASTBOOT // MrcFastBoot
+NB_ONEOF_FORCECOLDRESET // ForceColdReset
+NB_ONEOF_REMAPENABLE // RemapEnable
+NB_ONEOF_DISABLEDIMMCHANNEL0 // DisableDimmChannel0
+NB_ONEOF_DISABLEDIMMCHANNEL1 // DisableDimmChannel1
+NB_ONEOF_EXITMODE // ExitMode
+NB_ONEOF_POWERDOWNMODE0 // PowerDownMode0
+NB_ONEOF_POWERDOWNMODE1 // PowerDownMode1
+NB_ONEOF_PWDWNIDLECOUNTER // PwdwnIdleCounter
+NB_ONEOF_ENHANCEDINTERLEAVE // EnhancedInterleave
+NB_ONEOF_RANKINTERLEAVE // RankInterleave
+NB_ONEOF_WEAKLOCKEN // WeaklockEn
+NB_ONEOF_MCLOCK // McLock
+NB_ONEOF_MEMORYTHERMALMANAGEMENT // MemoryThermalManagement
+NB_ONEOF_PECIINJECTEDTEMP // PeciInjectedTemp
+NB_ONEOF_EXTTSVIATSONBOARD // ExttsViaTsOnBoard
+NB_ONEOF_EXTTSVIATSONDIMM // ExttsViaTsOnDimm
+NB_ONEOF_VIRTUALTEMPSENSOR // VirtualTempSensor
+NB_ONEOF_CHHASHENABLE // ChHashEnable
+NB_NUMERIC_CHHASHMASK // ChHashMask
+NB_ONEOF_CHHASHINTERLEAVEBIT // ChHashInterleaveBit
+NB_ONEOF_USERPOWERWEIGHTSEN // UserPowerWeightsEn
+NB_NUMERIC_ENERGYSCALEFACT // EnergyScaleFact
+NB_NUMERIC_IDLEENERGYCH0DIMM0 // IdleEnergyCh0Dimm0
+NB_NUMERIC_IDLEENERGYCH0DIMM1 // IdleEnergyCh0Dimm1
+NB_NUMERIC_PDENERGYCH0DIMM0 // PdEnergyCh0Dimm0
+NB_NUMERIC_PDENERGYCH0DIMM1 // PdEnergyCh0Dimm1
+NB_NUMERIC_ACTENERGYCH0DIMM0 // ActEnergyCh0Dimm0
+NB_NUMERIC_ACTENERGYCH0DIMM1 // ActEnergyCh0Dimm1
+NB_NUMERIC_RDENERGYCH0DIMM0 // RdEnergyCh0Dimm0
+NB_NUMERIC_RDENERGYCH0DIMM1 // RdEnergyCh0Dimm1
+NB_NUMERIC_WRENERGYCH0DIMM0 // WrEnergyCh0Dimm0
+NB_NUMERIC_WRENERGYCH0DIMM1 // WrEnergyCh0Dimm1
+NB_NUMERIC_IDLEENERGYCH1DIMM0 // IdleEnergyCh1Dimm0
+NB_NUMERIC_PDENERGYCH1DIMM0 // PdEnergyCh1Dimm0
+NB_NUMERIC_ACTENERGYCH1DIMM0 // ActEnergyCh1Dimm0
+NB_NUMERIC_RDENERGYCH1DIMM0 // RdEnergyCh1Dimm0
+NB_NUMERIC_WRENERGYCH1DIMM0 // WrEnergyCh1Dimm0
+NB_NUMERIC_IDLEENERGYCH1DIMM1 // IdleEnergyCh1Dimm1
+NB_NUMERIC_PDENERGYCH1DIMM1 // PdEnergyCh1Dimm1
+NB_NUMERIC_ACTENERGYCH1DIMM1 // ActEnergyCh1Dimm1
+NB_NUMERIC_RDENERGYCH1DIMM1 // RdEnergyCh1Dimm1
+NB_NUMERIC_WRENERGYCH1DIMM1 // WrEnergyCh1Dimm1
+NB_ONEOF_LOCKPTMREGS // LockPTMregs
+NB_ONEOF_REFRESH2X // Refresh2X
+NB_ONEOF_REFRESH2XMODE // Refresh2XMode
+NB_ONEOF_LPDDRTHERMALSENSOR // LpddrThermalSensor
+NB_ONEOF_SREFCFGENA // SrefCfgEna
+NB_NUMERIC_SREFCFGIDLETMR // SrefCfgIdleTmr
+NB_ONEOF_THRTCKEMINDEFEAT // ThrtCkeMinDefeat
+NB_NUMERIC_THRTCKEMINTMR // ThrtCkeMinTmr
+NB_ONEOF_ENABLEPWRDNLPDDR // EnablePwrDnLpddr
+NB_ONEOF_THRTCKEMINDEFEATLPDDR // ThrtCkeMinDefeatLpddr
+NB_NUMERIC_THRTCKEMINTMRLPDDR // ThrtCkeMinTmrLpddr
+NB_NUMERIC_RAPLPWRFLCH0 // RaplPwrFlCh0
+NB_NUMERIC_RAPLPWRFLCH1 // RaplPwrFlCh1
+NB_ONEOF_RAPLLIM2LOCK // RaplLim2Lock
+NB_ONEOF_RAPLLIM1ENA // RaplLim1Ena
+NB_NUMERIC_RAPLLIM1PWR // RaplLim1Pwr
+NB_NUMERIC_RAPLLIM1WINDX // RaplLim1WindX
+NB_NUMERIC_RAPLLIM1WINDY // RaplLim1WindY
+NB_ONEOF_RAPLLIM2ENA // RaplLim2Ena
+NB_NUMERIC_RAPLLIM2PWR // RaplLim2Pwr
+NB_NUMERIC_RAPLLIM2WINDX // RaplLim2WindX
+NB_NUMERIC_RAPLLIM2WINDY // RaplLim2WindY
+NB_ONEOF_ENABLEEXTTS // EnableExtts
+NB_ONEOF_ENABLECLTM // EnableCltm
+NB_ONEOF_ENABLEOLTM // EnableOltm
+NB_NUMERIC_WARMTHRESHOLDCH0DIMM0 // WarmThresholdCh0Dimm0
+NB_NUMERIC_WARMTHRESHOLDCH0DIMM1 // WarmThresholdCh0Dimm1
+NB_NUMERIC_HOTHRESHOLDCH0DIMM0 // HotThresholdCh0Dimm0
+NB_NUMERIC_HOTHRESHOLDCH0DIMM1 // HotThresholdCh0Dimm1
+NB_NUMERIC_WARMTHRESHOLDCH1DIMM0 // WarmThresholdCh1Dimm0
+NB_NUMERIC_WARMTHRESHOLDCH1DIMM1 // WarmThresholdCh1Dimm1
+NB_NUMERIC_HOTHRESHOLDCH1DIMM0 // HotThresholdCh1Dimm0
+NB_NUMERIC_HOTHRESHOLDCH1DIMM1 // HotThresholdCh1Dimm1
+NB_NUMERIC_WARMBUDGETCH0DIMM0 // WarmBudgetCh0Dimm0
+NB_NUMERIC_WARMBUDGETCH0DIMM1 // WarmBudgetCh0Dimm1
+NB_NUMERIC_HOTBUDGETCH0DIMM0 // HotBudgetCh0Dimm0
+NB_NUMERIC_HOTBUDGETCH0DIMM1 // HotBudgetCh0Dimm1
+NB_NUMERIC_WARMBUDGETCH1DIMM0 // WarmBudgetCh1Dimm0
+NB_NUMERIC_WARMBUDGETCH1DIMM1 // WarmBudgetCh1Dimm1
+NB_NUMERIC_HOTBUDGETCH1DIMM0 // HotBudgetCh1Dimm0
+NB_NUMERIC_HOTBUDGETCH1DIMM1 // HotBudgetCh1Dimm1
+NB_NUMERIC_TCL // tCL
+NB_NUMERIC_TRCD // tRCD
+NB_NUMERIC_TRP // tRP
+NB_NUMERIC_TRAS // tRAS
+NB_NUMERIC_TWR // tWR
+NB_NUMERIC_TRFC // tRFC
+NB_NUMERIC_TRRD // tRRD
+NB_NUMERIC_TWTR // tWTR
+NB_NUMERIC_TRTP // tRTP
+NB_NUMERIC_TRC // tRC
+NB_NUMERIC_TFAW // tFAW
+NB_NUMERIC_TCWL // tCWL
+NB_NUMERIC_TREFI // tREFI
+//NB_NUMERIC_TRPAB // tRPab
+NB_ONEOF_DMIVC1 // DmiVc1
+NB_ONEOF_DMIVCP // DmiVcp
+NB_ONEOF_DMIVCM // DmiVcm
+NB_ONEOF_NBDMIASPM // NBDmiAspm
+NB_ONEOF_NBDMIEXTSYNC // NBDmiExtSync
+NB_ONEOF_DMIGEN2 // DmiGen2
+NB_ONEOF_DMIDEEMPHASIS // DmiDeEmphasis
+NB_ONEOF_DMIIOT // DmiIot
+NB_ONEOF_GDXCENABLE // GdxcEnable
+
+#endif // CONTROLS_WITH_DEFAULTS
+//---------------------------------------------------------------------------
+
+#ifdef CHIPSET_FORM_SET
+ #ifndef SUPPRESS_GRAYOUT_ENDIF //old Core
+ #define SUPPRESS_GRAYOUT_ENDIF endif;
+ #endif
+
+ #ifdef FORM_SET_VARSTORE
+ varstore NB_PLATFORM_DATA,
+ key = AUTO_ID(NB_PLATFORM_DATA_ID),
+ name = NBPlatformData,
+ guid = SETUP_GUID;
+ #endif
+
+ #ifdef FORM_SET_ITEM
+ // Define controls to be added to the main page of the formset
+ #endif
+
+ #ifdef FORM_SET_GOTO
+ // Define goto commands for the forms defined in this file
+ goto NB_FORM_ID,
+ prompt = STRING_TOKEN(STR_NB_FORM),
+ help = STRING_TOKEN(STR_NB_FORM_HELP);
+ #endif
+
+ #ifdef FORM_SET_FORM
+ // Define forms
+ form formid = AUTO_ID(NB_FORM_ID),
+ title = STRING_TOKEN(STR_NB_FORM);
+
+ text
+ help = STRING_TOKEN(STR_SA_BRIDGE_HELP),
+ text = STRING_TOKEN(STR_SA_BRIDGE_NAME),
+ text = STRING_TOKEN(STR_SA_BRIDGE_VALUE),
+ flags = 0, key = 0;
+
+ text
+ help = STRING_TOKEN(STR_SA_RC_REV_HELP),
+ text = STRING_TOKEN(STR_SA_RC_REV_NAME),
+ text = STRING_TOKEN(STR_SA_RC_REV_VALUE),
+ flags = 0, key = 0;
+
+ suppressif ideqval SETUP_DATA.EnableVtd == 0;
+ text
+ help = STRING_TOKEN(STR_SA_VTD_HELP),
+ text = STRING_TOKEN(STR_SA_VTD_NAME),
+ text = STRING_TOKEN(STR_SA_VTD_VALUE),
+ flags = 0, key = 0;
+ endif;
+
+ SEPARATOR
+
+ suppressif ideqval NB_PLATFORM_DATA.VTdAvailable == 0;
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+
+ NB_ONEOF_ENABLEVTD
+
+ SUPPRESS_GRAYOUT_ENDIF
+
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ NB_ONEOF_SADEVICE7
+ endif;
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ NB_ONEOF_SADEVICE4
+ endif;
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ NB_ONEOF_SAAUDIOENABLE
+ endif;
+
+// grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+// suppressif ideqval NB_PLATFORM_DATA.IGFXCapability == 0 OR
+// ideqval SETUP_DATA.SaAudioEnable == 0;
+// NB_ONEOF_SAHDMICODECPORTB
+// NB_ONEOF_SAHDMICODECPORTC
+// NB_ONEOF_SAHDMICODECPORTD
+// SUPPRESS_GRAYOUT_ENDIF
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ NB_ONEOF_ENABLENBCRID
+ endif;
+
+#if defined BdatAccessHandler_SUPPORT && BdatAccessHandler_SUPPORT == 1
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ NB_ONEOF_BDATACPITABLESUPPORT
+ endif;
+#endif // BdatAccessHandler_SUPPORT
+
+#if defined NB_IGFX_FORCE_DISABLE_SUPPORT && NB_IGFX_FORCE_DISABLE_SUPPORT == 1
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ NB_ONEOF_IGFXFORCEDISABLE
+ endif;
+#endif // NB_IGFX_FORCE_DISABLE_SUPPORT
+
+ SEPARATOR
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ goto INTEL_IGFX_ID,
+ prompt = STRING_TOKEN(STR_INTEL_IGFX_FORM),
+ help = STRING_TOKEN(STR_INTEL_IGFX_HELP);
+ endif;
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ goto DMI_CONFIG_ID,
+ prompt = STRING_TOKEN(STR_DMI_CONFIGURATION_TITLE),
+ help = STRING_TOKEN(STR_DMI_CONFIGURATION_HELP);
+ endif;
+
+#if defined(RC_PEG_0) && (RC_PEG_0 == 1)
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval NB_PLATFORM_DATA.PegAvailable == 0;
+ goto PCIE_CONFIG_ID,
+ prompt = STRING_TOKEN(STR_PCIE_CONFIGURATION_FORM),
+ help = STRING_TOKEN(STR_PCIE_CONFIGURATION_HELP);
+ SUPPRESS_GRAYOUT_ENDIF
+#endif
+
+ // Define goto commands for the forms defined in this file
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ goto MEMORY_FORM_ID,
+ prompt = STRING_TOKEN(STR_MEMORY_FORM),
+ help = STRING_TOKEN(STR_MEMORY_FORM_HELP);
+ endif;
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ goto MEMORY_THERMAL_CONFIG_FORM_ID,
+ prompt = STRING_TOKEN(STR_MEMORY_THERMAL_CONFIG_FORM_TITLE),
+ help = STRING_TOKEN(STR_MEMORY_THERMAL_CONFIG_FORM_HELP);
+ endif;
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ suppressif ideqval NB_PLATFORM_DATA.IGFXAvailable == 0;
+ goto GT_POWER_CONFIG_FORM_ID,
+ prompt = STRING_TOKEN(STR_GT_POWER_CONFIG_FORM_TITLE),
+ help = STRING_TOKEN(STR_GT_POWER_CONFIG_FORM_HELP);
+ SUPPRESS_GRAYOUT_ENDIF
+
+ endform;
+
+//----------------------------------------------------------------------------
+// IGFX_CONFIGURATION
+//----------------------------------------------------------------------------
+
+ form formid = AUTO_ID(INTEL_IGFX_ID),
+ title = STRING_TOKEN(STR_INTEL_IGFX_FORM);
+ SUBTITLE(STRING_TOKEN(STR_INTEL_IGFX_FORM))
+
+ suppressif ideqval NB_PLATFORM_DATA.IGFXAvailable == 0 OR
+ ideqval SETUP_DATA.InternalGraphics == 0 OR
+ ideqval NB_PLATFORM_DATA.IGFXGopAvailable == 1;
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+ text
+ help = STRING_TOKEN(STR_CHIP_IGFX_VBIOS_REV_HELP),
+ text = STRING_TOKEN(STR_CHIP_IGFX_VBIOS_REV_NAME),
+ text = STRING_TOKEN(STR_CHIP_IGFX_VBIOS_REV_VALUE),
+ flags = 0,
+ key = 0;
+#endif
+ text
+ help = STRING_TOKEN(STR_EMPTY_STRING),
+ text = STRING_TOKEN(STR_IGFX_FREQ_PROMPT),
+ text = STRING_TOKEN(STR_IGFX_FREQ_VALUE),
+ flags = 0,
+ key = 0;
+
+ NB_NUMERIC_GFXTURBOIMON
+
+ endif;
+
+ SEPARATOR
+
+ suppressif ideqval NB_PLATFORM_DATA.PegAvailable == 0 OR
+ ideqval NB_PLATFORM_DATA.IGFXCapability == 0;
+
+ NB_ONEOF_PRIMARYDISPLAY
+
+ endif;
+
+#if ( defined(SwitchableGraphics_SUPPORT) && (SwitchableGraphics_SUPPORT == 0) )
+
+ suppressif NOT ideqval NB_PLATFORM_DATA.IGFXCapability == 0 OR
+ ideqval NB_PLATFORM_DATA.PegAvailable == 0;
+
+ NB_ONEOF_PRIMARYDISPLAY1
+
+ endif;
+
+#endif
+
+ suppressif NOT ideqval NB_PLATFORM_DATA.PegAvailable == 0;
+
+ NB_ONEOF_PRIMARYDISPLAY2
+
+ endif;
+
+// suppressif ideqval NB_PLATFORM_DATA.UserBoard == FlavorUpServer OR
+// ideqval NB_PLATFORM_DATA.IGFXAvailable == 0 OR
+// ideqval NB_PLATFORM_DATA.IGFXGopAvailable == 0;
+
+// NB_ONEOF_PRIMARYGOPDISPLAY
+
+// endif;
+
+#if defined(RC_PEG_0) && (RC_PEG_0 == 1)
+#if ( defined(SwitchableGraphics_SUPPORT) && (SwitchableGraphics_SUPPORT == 1) )
+ suppressif NOT ideqval SETUP_DATA.PrimaryDisplay == 4 OR
+ NOT ideqval SETUP_DATA.IGpuPortConfig == 1;
+
+ NB_ONEOF_IGPUPORTCONFIG
+
+ endif;
+
+ // Digital port options.
+ suppressif NOT ideqval SETUP_DATA.IGpuPortConfig == 1 OR
+ NOT ideqval SETUP_DATA.PrimaryDisplay == 4 OR
+ ideqval NB_PLATFORM_DATA.IGFXAvailable == 0;
+
+ NB_ONEOF_DIGITALPORTBMODE
+
+ NB_ONEOF_DIGITALPORTCMODE
+
+ NB_ONEOF_DIGITALPORTDMODE
+
+ endif;
+
+#endif
+#endif
+
+#if defined(RC_PEG_0) && (RC_PEG_0 == 1)
+ suppressif ideqval SETUP_DATA.PrimaryDisplay == 0 OR
+ ideqval SETUP_DATA.PrimaryDisplay == 4 OR
+ ideqval SETUP_DATA.AlwaysEnablePeg == 2;
+
+ NB_ONEOF_PRIMARYPEG
+
+ endif;
+#endif
+// << (EIP76034)
+
+ suppressif ideqval SETUP_DATA.PrimaryDisplay == 0 OR
+ ideqval SETUP_DATA.PrimaryDisplay == 4;
+
+ NB_ONEOF_PRIMARYPCIE
+
+ endif;
+
+ suppressif NOT ideqval NB_PLATFORM_DATA.IGFXCapability == 1;
+
+ NB_ONEOF_INTERNALGRAPHICS
+
+ endif;
+
+ suppressif ideqval NB_PLATFORM_DATA.IGFXAvailable == 0 OR
+ ideqval SETUP_DATA.InternalGraphics == 0;
+
+// NB_ONEOF_GTTSIZE
+
+ NB_ONEOF_APERTURESIZE
+
+ NB_ONEOF_IGDDVMT50PREALLOC
+
+ NB_ONEOF_IGDDVMT50TOTALALLOC
+
+ NB_ONEOF_LOWPOWERMODE
+
+ NB_ONEOF_PANELPOWERE
+
+ goto IGFX_LCD_FORM_ID,
+ prompt = STRING_TOKEN(STR_IGFX_LCD),
+ help = STRING_TOKEN(STR_IGFX_LCD);
+
+ endif;
+
+ endform;
+
+//----------------------------------------------------------------------------
+// IGFX_LCD_CONFIGURATION
+//----------------------------------------------------------------------------
+
+ form formid = AUTO_ID(IGFX_LCD_FORM_ID),
+ title = STRING_TOKEN(STR_IGFX_LCD);
+
+ SUBTITLE(STRING_TOKEN(STR_IGFX_LCD))
+
+ SEPARATOR
+
+ NB_ONEOF_IGDBOOTTYPE
+
+ suppressif ideqval SETUP_DATA.IgdBootType == 0x0;
+
+ NB_ONEOF_DISPLAYPIPEB
+
+ endif;
+
+ NB_ONEOF_LCDPANELTYPE
+
+ NB_ONEOF_SDVOPANELTYPE
+
+ NB_ONEOF_LCDPANELSCALING
+
+ NB_ONEOF_IGDLCDBLC
+
+ NB_ONEOF_IGDLCDIBIA
+
+ NB_ONEOF_IGDLCDSSCC
+
+ NB_ONEOF_IGDTV1STANDARD
+
+ NB_ONEOF_IGDTV2STANDARD
+
+ NB_ONEOF_ALSENABLE
+
+ NB_ONEOF_ACTIVELFP
+
+ NB_ONEOF_LFPCOLORDEPTH
+
+ endform;
+
+ form formid = AUTO_ID(GT_POWER_CONFIG_FORM_ID),
+ title = STRING_TOKEN(STR_GT_POWER_CONFIG_FORM_TITLE);
+
+ SUBTITLE(STRING_TOKEN(STR_GT_POWER_CONFIG_FORM_TITLE))
+
+ text
+ help = STRING_TOKEN(STR_PROCESSOR_GT_HELP),
+ text = STRING_TOKEN(STR_PROCESSOR_GT_STRING),
+ text = STRING_TOKEN(STR_PROCESSOR_GT_VALUE),
+ flags = 0, key = 0;
+
+ SEPARATOR
+
+ NB_ONEOF_RENDERSTANDBY
+
+//- NB_ONEOF_DEEPRENDERSTANDBY
+
+#if PERF_TUNE_SUPPORT == 0
+
+ NB_ONEOF_GTOCSUPPORT
+
+ suppressif ideqval SETUP_DATA.GtOcSupport == 0;
+
+ NB_NUMERIC_GTMAXOCTURBORATIO
+
+ NB_NUMERIC_GTEXTRATURBOVOLTAGE
+
+ endif;
+#endif
+
+ endform;
+
+//----------------------------------------------------------------------------
+// PCIE_CONFIGURATION
+//----------------------------------------------------------------------------
+
+ form formid = AUTO_ID(PCIE_CONFIG_ID),
+ title = STRING_TOKEN(STR_PCIE_CONFIGURATION_FORM);
+ SUBTITLE(STRING_TOKEN(STR_PCIE_CONFIGURATION_FORM))
+
+
+ text
+ help = STRING_TOKEN(STR_PEG0_INFO_HELP),
+ text = STRING_TOKEN(STR_PEG0_INFO_NAME),
+ text = STRING_TOKEN(STR_PEG0_INFO_VALUE),
+ flags = 0,
+ key = 0;
+
+ NB_ONEOF_PEGGENX0
+
+ text
+ help = STRING_TOKEN(STR_PEG1_INFO_HELP),
+ text = STRING_TOKEN(STR_PEG1_INFO_NAME),
+ text = STRING_TOKEN(STR_PEG1_INFO_VALUE),
+ flags = 0,
+ key = 0;
+
+ NB_ONEOF_PEGGENX1
+
+ text
+ help = STRING_TOKEN(STR_PEG2_INFO_HELP),
+ text = STRING_TOKEN(STR_PEG2_INFO_NAME),
+ text = STRING_TOKEN(STR_PEG2_INFO_VALUE),
+ flags = 0,
+ key = 0;
+
+ NB_ONEOF_PEGGENX2
+
+
+ SEPARATOR
+
+ NB_ONEOF_C7ALLOWED
+
+#if ( defined(CSM_SUPPORT) && (CSM_SUPPORT != 0) )
+ suppressif ideqval SETUP_DATA.PrimaryDisplay == 4;
+
+ NB_ONEOF_ALWAYSENABLEPEG
+
+ endif;
+#endif
+
+ NB_ONEOF_DETECTNONCOMPLAINT
+ NB_ONEOF_INITPCIEASPMAFTEROPROM
+ NB_ONEOF_PEGDEEMPHASIS0
+ NB_ONEOF_PEGDEEMPHASIS1
+ NB_ONEOF_PEGDEEMPHASIS2
+ NB_ONEOF_PEGASPM0
+
+ suppressif ideqval SETUP_DATA.PegAspm[OFFSET_0] == 0x0
+ OR ideqval SETUP_DATA.PegAspm[OFFSET_0] == 2
+ OR ideqval SETUP_DATA.PegAspm[OFFSET_0] == 4;
+
+ NB_ONEOF_PEGASPML0S0
+
+ endif;
+
+ NB_ONEOF_PEGASPM1
+
+ suppressif ideqval SETUP_DATA.PegAspm[OFFSET_1] == 0x0
+ OR ideqval SETUP_DATA.PegAspm[OFFSET_1] == 2
+ OR ideqval SETUP_DATA.PegAspm[OFFSET_1] == 4;
+
+ NB_ONEOF_PEGASPML0S1
+
+ endif;
+
+ NB_ONEOF_PEGASPM2
+
+ suppressif ideqval SETUP_DATA.PegAspm[OFFSET_2] == 0x0
+ OR ideqval SETUP_DATA.PegAspm[OFFSET_2] == 2
+ OR ideqval SETUP_DATA.PegAspm[OFFSET_2] == 4;
+
+ NB_ONEOF_PEGASPML0S2
+
+ endif;
+
+ NB_ONEOF_PEGSAMPLERCALIBRATE
+
+ NB_ONEOF_SWINGCONTROL
+
+ NB_ONEOF_PEGGEN3EQUALIZATION
+
+ suppressif ideqval SETUP_DATA.PegGen3Equalization == 0x0;
+
+ NB_ONEOF_PEGGEN3EQUALIZATIONPHASE2
+
+ goto PCIE_GEN3_ROOT_PORT_PRESET_VALUE_FORM_ID,
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_VALUE_FORM),
+ help = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_VALUE_HELP);
+
+ goto PCIE_GEN3_END_POINT_PRESET_VALUE_FORM_ID,
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_END_POINT_PRESET_VALUE_FORM),
+ help = STRING_TOKEN(STR_PCIE_GEN3_END_POINT_PRESET_VALUE_HELP);
+
+ goto PCIE_GEN3_END_POINT_HINT_VALUE_FORM_ID,
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_END_POINT_HINT_VALUE_FORM),
+ help = STRING_TOKEN(STR_PCIE_GEN3_END_POINT_HINT_VALUE_HELP);
+
+ endif;
+
+ NB_ONEOF_PEGGEN3PRESETSEARCH
+
+ suppressif ideqval SETUP_DATA.PegGen3PresetSearch == 0x0;
+
+ NB_ONEOF_PEGGEN3FORCEPRESETSEARCH
+
+ NB_ONEOF_ALLOWPERSTGPIOUSAGE
+
+ NB_NUMERIC_PEGGEN3PRESETSEARCHDWELLTIME
+
+ NB_NUMERIC_PEGGEN3PRESETSEARCHMARGINSTEPS
+
+ NB_NUMERIC_PEGGEN3PRESETSEARCHSTARTMARGIN
+
+ NB_NUMERIC_PEGGEN3PRESETSEARCHVOLTAGEMARGINSTEPS
+
+ NB_NUMERIC_PEGGEN3PRESETSEARCHVOLTAGESTARTMARGIN
+
+ NB_NUMERIC_PEGGEN3PRESETSEARCHFAVORTIMING
+
+ NB_NUMERIC_PEGGEN3PRESETSEARCHERRORTARGET
+
+ endif;
+
+ NB_NUMERIC_PEGRXCEMLOOPBACK
+
+ suppressif ideqval SETUP_DATA.RxCEMLoopback == 0x0;
+
+ NB_NUMERIC_PEGRXCEMLOOPBACKLANE
+
+ endif;
+
+ goto PCIE_GEN3_RXCTLEP_PER_BUNDLE_VALUE_FORM_ID,
+ prompt = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE_VALUE_FORM),
+ help = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE_VALUE_HELP);
+
+ endform;
+
+//----------------------------------------------------------------------------
+ form formid = AUTO_ID(MEMORY_FORM_ID),
+ title = STRING_TOKEN(STR_MEMORY_FORM);
+
+ SUBTITLE(STRING_TOKEN(STR_MEMORY_INFO))
+
+ SEPARATOR
+
+ text
+ help = STRING_TOKEN(STR_MRC_REV_HELP),
+ text = STRING_TOKEN(STR_MRC_REV_NAME),
+ text = STRING_TOKEN(STR_MRC_REV_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_SPEED_HELP),
+ text = STRING_TOKEN(STR_MEMORY_SPEED_NAME),
+ text = STRING_TOKEN(STR_MEMORY_SPEED_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_SIZE_HELP),
+ text = STRING_TOKEN(STR_MEMORY_SIZE_NAME),
+ text = STRING_TOKEN(STR_MEMORY_SIZE_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_VOLTAGE_HELP),
+ text = STRING_TOKEN(STR_MEMORY_VOLTAGE_NAME),
+ text = STRING_TOKEN(STR_MEMORY_VOLTAGE_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_DIMM_INFO_HELP),
+ text = STRING_TOKEN(STR_MEMORY_DIMM0_NAME),
+ text = STRING_TOKEN(STR_MEMORY_DIMM0_VALUE),
+ flags = 0,
+ key = 0;
+
+#if ( defined(A1_MEMORY_SOCKETS) && (A1_MEMORY_SOCKETS > 2) )
+ text
+ help = STRING_TOKEN(STR_MEMORY_DIMM_INFO_HELP),
+ text = STRING_TOKEN(STR_MEMORY_DIMM1_NAME),
+ text = STRING_TOKEN(STR_MEMORY_DIMM1_VALUE),
+ flags = 0,
+ key = 0;
+#endif
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_DIMM_INFO_HELP),
+ text = STRING_TOKEN(STR_MEMORY_DIMM2_NAME),
+ text = STRING_TOKEN(STR_MEMORY_DIMM2_VALUE),
+ flags = 0,
+ key = 0;
+
+#if ( defined(A1_MEMORY_SOCKETS) && (A1_MEMORY_SOCKETS > 2) )
+ text
+ help = STRING_TOKEN(STR_MEMORY_DIMM_INFO_HELP),
+ text = STRING_TOKEN(STR_MEMORY_DIMM3_NAME),
+ text = STRING_TOKEN(STR_MEMORY_DIMM3_VALUE),
+ flags = 0,
+ key = 0;
+#endif
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_CL_HELP),
+ text = STRING_TOKEN(STR_MEMORY_CL_NAME),
+ text = STRING_TOKEN(STR_MEMORY_CL_VALUE),
+ flags = 0,
+ key = 0;
+
+ SUBTITLE(STRING_TOKEN(STR_MEMORY_DELAY_TIME))
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_TRCD_HELP),
+ text = STRING_TOKEN(STR_MEMORY_TRCD_NAME),
+ text = STRING_TOKEN(STR_MEMORY_TRCD_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_TRP_HELP),
+ text = STRING_TOKEN(STR_MEMORY_TRP_NAME),
+ text = STRING_TOKEN(STR_MEMORY_TRP_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_TRAS_HELP),
+ text = STRING_TOKEN(STR_MEMORY_TRAS_NAME),
+ text = STRING_TOKEN(STR_MEMORY_TRAS_VALUE),
+ flags = 0,
+ key = 0;
+
+#if ( defined(PERF_TUNE_SUPPORT) && (PERF_TUNE_SUPPORT == 0) )
+ text
+ help = STRING_TOKEN(STR_XMP_PROFILE_1),
+ text = STRING_TOKEN(STR_XMP_PROFILE_1),
+ text = STRING_TOKEN(STR_XMP_PROFILE_1_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_XMP_PROFILE_2),
+ text = STRING_TOKEN(STR_XMP_PROFILE_2),
+ text = STRING_TOKEN(STR_XMP_PROFILE_2_VALUE),
+ flags = 0,
+ key = 0;
+#endif
+
+ SEPARATOR
+
+#if ( defined(PERF_TUNE_SUPPORT) && (PERF_TUNE_SUPPORT == 0) )
+
+ NB_ONEOF_SPDPROFILESELECTED
+
+ suppressif NOT ideqval SETUP_DATA.SpdProfileSelected == 1;
+ goto MEMORY_OC_FORM_ID,
+ prompt = STRING_TOKEN(STR_MEMORY_OC_FORM),
+ help = STRING_TOKEN(STR_MEMORY_OC_FORM_HELP);
+ endif;
+
+
+ suppressif NOT ideqval SETUP_DATA.SpdProfileSelected == 0;
+
+ NB_ONEOF_DDRFREQLIMIT
+
+ endif;
+
+#ifndef MRC_DDR3L_NOT_SUPPORT_FLAG
+ suppressif NOT ideqval NB_PLATFORM_DATA.UserBoard == FlavorMobile;
+
+//- NB_ONEOF_DDRLVOPTION
+
+ NB_NUMERIC_DDRVOLTAGEWAITTIME
+
+ endif;
+#endif
+
+#endif
+
+ suppressif NOT ideqval NB_PLATFORM_DATA.UserBoard == FlavorDesktop AND
+ NOT ideqval NB_PLATFORM_DATA.UserBoard == FlavorMobile;
+
+ NB_ONEOF_ECCSUPPORT
+
+ endif;
+
+ //
+ // Max TOLUD setup option
+ //
+ NB_ONEOF_MAXTOLUD
+
+ NB_ONEOF_ENHANCEDINTERLEAVE
+
+ NB_ONEOF_RANKINTERLEAVE
+
+ NB_ONEOF_WEAKLOCKEN
+
+ NB_ONEOF_MCLOCK
+
+ NB_ONEOF_CHHASHENABLE
+
+ NB_NUMERIC_CHHASHMASK
+
+ NB_ONEOF_CHHASHINTERLEAVEBIT
+
+ NB_ONEOF_NMODESUPPORT
+
+ NB_ONEOF_SCRAMBLERSUPPORT
+
+ NB_ONEOF_RMTCROSSERENABLE
+
+ NB_ONEOF_MRCFASTBOOT
+
+//Refcode no function- NB_ONEOF_FORCECOLDRESET
+
+ NB_ONEOF_EXITMODE
+
+ suppressif ideqval SETUP_DATA.ExitMode == 1 OR ideqval SETUP_DATA.ExitMode == 0xFF;
+
+ NB_ONEOF_POWERDOWNMODE0
+
+ endif;
+
+ suppressif ideqval SETUP_DATA.ExitMode == 0 OR ideqval SETUP_DATA.ExitMode == 0xFF;
+
+ NB_ONEOF_POWERDOWNMODE1
+
+ endif;
+
+ NB_ONEOF_REMAPENABLE
+
+ NB_ONEOF_DISABLEDIMMCHANNEL0
+
+ NB_ONEOF_DISABLEDIMMCHANNEL1
+
+ NB_ONEOF_GDXCENABLE
+
+ endform;
+
+//----------------------------------------------------------------------------
+// PCIE_GEN3_ROOT_PORT_PRESET_CONFIGURATION
+//----------------------------------------------------------------------------
+ #ifndef PCIE_GEN3_ROOT_PORT_PRESET_VALUE_FORM_SETUP
+ #define PCIE_GEN3_ROOT_PORT_PRESET_VALUE_FORM_SETUP
+
+ form formid = AUTO_ID(PCIE_GEN3_ROOT_PORT_PRESET_VALUE_FORM_ID),
+ title = STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_VALUE_FORM);
+
+ SUBTITLE(STRING_TOKEN(STR_PCIE_GEN3_ROOT_PORT_PRESET_VALUE_FORM))
+
+ SEPARATOR
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET00
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET01
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET02
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET03
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET04
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET05
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET06
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET07
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET08
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET09
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET10
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET11
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET12
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET13
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET14
+
+ NB_NUMERIC_GEN3ROOTPORTPRESET15
+
+ endform;
+ #endif // PCIE_GEN3_ROOT_PORT_PRESET_VALUE_FORM_SETUP
+//----------------------------------------------------------------------------
+// PCIE_GEN3_END_POINT_PRESET_CONFIGURATION
+//----------------------------------------------------------------------------
+ #ifndef PCIE_GEN3_END_POINT_PRESET_VALUE_FORM_SETUP
+ #define PCIE_GEN3_END_POINT_PRESET_VALUE_FORM_SETUP
+
+ form formid = AUTO_ID(PCIE_GEN3_END_POINT_PRESET_VALUE_FORM_ID),
+ title = STRING_TOKEN(STR_PCIE_GEN3_END_POINT_PRESET_VALUE_FORM);
+
+ SUBTITLE(STRING_TOKEN(STR_PCIE_GEN3_END_POINT_PRESET_VALUE_FORM))
+
+ SEPARATOR
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET00
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET01
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET02
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET03
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET04
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET05
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET06
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET07
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET08
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET09
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET10
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET11
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET12
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET13
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET14
+
+ NB_NUMERIC_GEN3ENDPOINTPRESET15
+
+ endform;
+ #endif // PCIE_GEN3_END_POINT_PRESET_VALUE_FORM_SETUP
+//----------------------------------------------------------------------------
+// PCIE_GEN3_END_POINT_HINT_CONFIGURATION
+//----------------------------------------------------------------------------
+ #ifndef PCIE_GEN3_END_POINT_HINT_VALUE_FORM_SETUP
+ #define PCIE_GEN3_END_POINT_HINT_VALUE_FORM_SETUP
+
+ form formid = AUTO_ID(PCIE_GEN3_END_POINT_HINT_VALUE_FORM_ID),
+ title = STRING_TOKEN(STR_PCIE_GEN3_END_POINT_HINT_VALUE_FORM);
+
+ SUBTITLE(STRING_TOKEN(STR_PCIE_GEN3_END_POINT_HINT_VALUE_FORM))
+
+ SEPARATOR
+
+ NB_NUMERIC_GEN3ENDPOINTHINT00
+
+ NB_NUMERIC_GEN3ENDPOINTHINT01
+
+ NB_NUMERIC_GEN3ENDPOINTHINT02
+
+ NB_NUMERIC_GEN3ENDPOINTHINT03
+
+ NB_NUMERIC_GEN3ENDPOINTHINT04
+
+ NB_NUMERIC_GEN3ENDPOINTHINT05
+
+ NB_NUMERIC_GEN3ENDPOINTHINT06
+
+ NB_NUMERIC_GEN3ENDPOINTHINT07
+
+ NB_NUMERIC_GEN3ENDPOINTHINT08
+
+ NB_NUMERIC_GEN3ENDPOINTHINT09
+
+ NB_NUMERIC_GEN3ENDPOINTHINT10
+
+ NB_NUMERIC_GEN3ENDPOINTHINT11
+
+ NB_NUMERIC_GEN3ENDPOINTHINT12
+
+ NB_NUMERIC_GEN3ENDPOINTHINT13
+
+ NB_NUMERIC_GEN3ENDPOINTHINT14
+
+ NB_NUMERIC_GEN3ENDPOINTHINT15
+
+ endform;
+ #endif // PCIE_GEN3_END_POINT_HINT_VALUE_FORM_SETUP
+//----------------------------------------------------------------------------
+// PCIE_GEN3_RXCTLEP_PER_BUNDLE_CONFIGURATION
+//----------------------------------------------------------------------------
+ #ifndef PCIE_GEN3_RXCTLEP_PER_BUNDLE_VALUE_FORM_SETUP
+ #define PCIE_GEN3_RXCTLEP_PER_BUNDLE_VALUE_FORM_SETUP
+
+ form formid = AUTO_ID(PCIE_GEN3_RXCTLEP_PER_BUNDLE_VALUE_FORM_ID),
+ title = STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE_VALUE_FORM);
+
+ SUBTITLE(STRING_TOKEN(STR_PCIE_GEN3_RXCTLEP_PER_BUNDLE_VALUE_FORM))
+
+ SEPARATOR
+
+ NB_NUMERIC_GEN3RXCTLEP00
+
+ NB_NUMERIC_GEN3RXCTLEP01
+
+ NB_NUMERIC_GEN3RXCTLEP02
+
+ NB_NUMERIC_GEN3RXCTLEP03
+
+ NB_NUMERIC_GEN3RXCTLEP04
+
+ NB_NUMERIC_GEN3RXCTLEP05
+
+ NB_NUMERIC_GEN3RXCTLEP06
+
+ NB_NUMERIC_GEN3RXCTLEP07
+
+ endform;
+ #endif //PCIE_GEN3_RXCTLEP_PER_BUNDLE_VALUE_FORM_SETUP
+//----------------------------------------------------------------------------
+// MEMORY_OC_CONFIGURATION
+//----------------------------------------------------------------------------
+#if ( defined(PERF_TUNE_SUPPORT) && (PERF_TUNE_SUPPORT == 0) )
+ form formid = AUTO_ID(MEMORY_OC_FORM_ID),
+ title = STRING_TOKEN(STR_MEMORY_OC_FORM);
+
+ SUBTITLE(STRING_TOKEN(STR_MEMORY_OC_TITLE))
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_SPEED_HELP),
+ text = STRING_TOKEN(STR_MEMORY_SPEED_NAME),
+ text = STRING_TOKEN(STR_MEMORY_SPEED_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_CL_HELP),
+ text = STRING_TOKEN(STR_MEMORY_CL_NAME),
+ text = STRING_TOKEN(STR_MEMORY_CL_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_TRCD_HELP),
+ text = STRING_TOKEN(STR_MEMORY_OC_TRCD_NAME),
+ text = STRING_TOKEN(STR_MEMORY_TRCD_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_TRP_HELP),
+ text = STRING_TOKEN(STR_MEMORY_OC_TRP_NAME),
+ text = STRING_TOKEN(STR_MEMORY_TRP_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_TRAS_HELP),
+ text = STRING_TOKEN(STR_MEMORY_OC_TRAS_NAME),
+ text = STRING_TOKEN(STR_MEMORY_TRAS_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_TWR_HELP),
+ text = STRING_TOKEN(STR_MEMORY_TWR_NAME),
+ text = STRING_TOKEN(STR_MEMORY_TWR_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_TRFC_HELP),
+ text = STRING_TOKEN(STR_MEMORY_TRFC_NAME),
+ text = STRING_TOKEN(STR_MEMORY_TRFC_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_TRRD_HELP),
+ text = STRING_TOKEN(STR_MEMORY_TRRD_NAME),
+ text = STRING_TOKEN(STR_MEMORY_TRRD_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_TWTR_HELP),
+ text = STRING_TOKEN(STR_MEMORY_TWTR_NAME),
+ text = STRING_TOKEN(STR_MEMORY_TWTR_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_TRTP_HELP),
+ text = STRING_TOKEN(STR_MEMORY_TRTP_NAME),
+ text = STRING_TOKEN(STR_MEMORY_TRTP_VALUE),
+ flags = 0,
+ key = 0;
+
+ text
+ help = STRING_TOKEN(STR_MEMORY_TFAW_HELP),
+ text = STRING_TOKEN(STR_MEMORY_TFAW_NAME),
+ text = STRING_TOKEN(STR_MEMORY_TFAW_VALUE),
+ flags = 0,
+ key = 0;
+
+ SEPARATOR
+
+ SUBTITLE(STRING_TOKEN(STR_MEMORY_TIMING_SUBTITLE))
+
+ NB_ONEOF_OC_DDRFREQLIMIT
+
+ NB_NUMERIC_TCL
+
+ NB_NUMERIC_TRCD
+
+ NB_NUMERIC_TRP
+
+ NB_NUMERIC_TRAS
+
+ NB_NUMERIC_TWR
+
+ NB_NUMERIC_TRFC
+
+ NB_NUMERIC_TRRD
+
+ NB_NUMERIC_TWTR
+
+ NB_NUMERIC_TRTP
+
+ NB_NUMERIC_TRC
+
+ NB_NUMERIC_TFAW
+
+ NB_NUMERIC_TCWL
+
+ NB_NUMERIC_TREFI
+
+// NB_NUMERIC_TRPAB
+
+ endform;
+
+#endif
+//----------------------------------------------------------------------------
+// MEMORY_THERMAL_CONFIGURATION
+//----------------------------------------------------------------------------
+ form formid = AUTO_ID(MEMORY_THERMAL_CONFIG_FORM_ID),
+ title = STRING_TOKEN(STR_MEMORY_THERMAL_CONFIGURATION);
+
+ SUBTITLE(STRING_TOKEN(STR_MEMORY_THERMAL_CONFIGURATION))
+ SEPARATOR
+
+
+ goto MEMORY_POWER_AND_THERMAL_THROTTLING_FORM_ID,
+ prompt = STRING_TOKEN(STR_MEMORY_POWER_AND_THERMAL_THROTTLING_FORM_TITLE),
+ help = STRING_TOKEN(STR_MEMORY_POWER_AND_THERMAL_THROTTLING_FORM_HELP);
+
+ NB_ONEOF_MEMORYTHERMALMANAGEMENT
+
+ suppressif ideqval SETUP_DATA.MemoryThermalManagement == 0x0
+ OR NOT ideqval NB_PLATFORM_DATA.UserBoard == FlavorMobile;
+
+ NB_ONEOF_PECIINJECTEDTEMP
+
+ NB_ONEOF_EXTTSVIATSONBOARD
+
+ NB_ONEOF_EXTTSVIATSONDIMM
+
+ NB_ONEOF_VIRTUALTEMPSENSOR
+
+ endif;
+
+ endform;
+
+//----------------------------------------------------------------------------
+// MEMORY_POWER_AND_THERMAL_THROTTLING
+//----------------------------------------------------------------------------
+ form formid = AUTO_ID(MEMORY_POWER_AND_THERMAL_THROTTLING_FORM_ID),
+ title = STRING_TOKEN(STR_MEMORY_POWER_AND_THERMAL_THROTTLING_FORM_TITLE);
+
+ SUBTITLE(STRING_TOKEN(STR_MEMORY_POWER_AND_THERMAL_THROTTLING_FORM_TITLE))
+ SEPARATOR
+
+ NB_ONEOF_PWDWNIDLECOUNTER
+
+ NB_ONEOF_REFRESH2X
+
+ NB_ONEOF_REFRESH2XMODE
+
+ NB_ONEOF_LPDDRTHERMALSENSOR // LpddrThermalSensor
+
+ NB_ONEOF_SREFCFGENA // SrefCfgEna
+
+ NB_NUMERIC_SREFCFGIDLETMR // SrefCfgIdleTmr
+
+ NB_ONEOF_THRTCKEMINDEFEAT // ThrtCkeMinDefeat
+
+ NB_NUMERIC_THRTCKEMINTMR // ThrtCkeMinTmr
+
+ suppressif NOT ideqval NB_PLATFORM_DATA.DDR3Type == 0x02;
+ SEPARATOR
+
+ NB_ONEOF_ENABLEPWRDNLPDDR // EnablePwrDnLpddr
+
+ NB_ONEOF_THRTCKEMINDEFEATLPDDR // ThrtCkeMinDefeatLpddr
+
+ NB_NUMERIC_THRTCKEMINTMRLPDDR // ThrtCkeMinTmrLpddr
+
+ SEPARATOR
+ endif;
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ goto DRAM_POWER_METER_FORM_FORM_ID,
+ prompt = STRING_TOKEN(STR_DRAM_POWER_METER_FORM_TITLE),
+ help = STRING_TOKEN(STR_DRAM_POWER_METER_FORM_HELP);
+ endif;
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ goto MEMORY_THERMAL_REPORTING_FORM_FORM_ID,
+ prompt = STRING_TOKEN(STR_MEMORY_THERMAL_REPORTING_FORM_TITLE),
+ help = STRING_TOKEN(STR_MEMORY_THERMAL_REPORTING_FORM_HELP);
+ endif;
+
+ grayoutif ideqval SYSTEM_ACCESS.Access == SYSTEM_PASSWORD_USER;
+ goto MEMORY_RAPL_FORM_FORM_ID,
+ prompt = STRING_TOKEN(STR_MEMORY_RAPL_FORM_TITLE),
+ help = STRING_TOKEN(STR_MEMORY_RAPL_FORM_HELP);
+ endif;
+
+ endform;
+//----------------------------------------------------------------------------
+// Dram Power Meter
+//----------------------------------------------------------------------------
+ form formid = AUTO_ID(DRAM_POWER_METER_FORM_FORM_ID),
+ title = STRING_TOKEN(STR_DRAM_POWER_METER_FORM_TITLE);
+
+ SUBTITLE(STRING_TOKEN(STR_DRAM_POWER_METER_FORM_TITLE))
+ SEPARATOR
+
+ SUBTITLE(STRING_TOKEN(STR_USER_POWER_WEIGHTS_ENABLE_TITLE))
+ SUBTITLE(STRING_TOKEN(STR_USER_POWER_WEIGHTS_ENABLE_TITLE1))
+ NB_ONEOF_USERPOWERWEIGHTSEN // UserPowerWeightsEn
+
+ SEPARATOR
+
+ grayoutif ideqval SETUP_DATA.UserPowerWeightsEn == 0;
+
+ NB_NUMERIC_ENERGYSCALEFACT // EnergyScaleFact
+
+ SEPARATOR
+
+ NB_NUMERIC_IDLEENERGYCH0DIMM0 // IdleEnergyCh0Dimm0
+ NB_NUMERIC_PDENERGYCH0DIMM0 // PdEnergyCh0Dimm0
+ NB_NUMERIC_ACTENERGYCH0DIMM0 // ActEnergyCh0Dimm0
+ NB_NUMERIC_RDENERGYCH0DIMM0 // RdEnergyCh0Dimm0
+ NB_NUMERIC_WRENERGYCH0DIMM0 // WrEnergyCh0Dimm0
+
+ SEPARATOR
+
+ NB_NUMERIC_IDLEENERGYCH0DIMM1 // IdleEnergyCh0Dimm1
+ NB_NUMERIC_PDENERGYCH0DIMM1 // PdEnergyCh0Dimm1
+ NB_NUMERIC_ACTENERGYCH0DIMM1 // ActEnergyCh0Dimm1
+ NB_NUMERIC_RDENERGYCH0DIMM1 // RdEnergyCh0Dimm1
+ NB_NUMERIC_WRENERGYCH0DIMM1 // WrEnergyCh0Dimm1
+
+ SEPARATOR
+
+ NB_NUMERIC_IDLEENERGYCH1DIMM0 // IdleEnergyCh1Dimm0
+ NB_NUMERIC_PDENERGYCH1DIMM0 // PdEnergyCh1Dimm0
+ NB_NUMERIC_ACTENERGYCH1DIMM0 // ActEnergyCh1Dimm0
+ NB_NUMERIC_RDENERGYCH1DIMM0 // RdEnergyCh1Dimm0
+ NB_NUMERIC_WRENERGYCH1DIMM0 // WrEnergyCh1Dimm0
+
+ SEPARATOR
+
+ NB_NUMERIC_IDLEENERGYCH1DIMM1 // IdleEnergyCh1Dimm1
+ NB_NUMERIC_PDENERGYCH1DIMM1 // PdEnergyCh1Dimm1
+ NB_NUMERIC_ACTENERGYCH1DIMM1 // ActEnergyCh1Dimm1
+ NB_NUMERIC_RDENERGYCH1DIMM1 // RdEnergyCh1Dimm1
+ NB_NUMERIC_WRENERGYCH1DIMM1 // WrEnergyCh1Dimm1
+
+ endif;
+ endform;
+//----------------------------------------------------------------------------
+// Memory Thermal Reporting
+//----------------------------------------------------------------------------
+ form formid = AUTO_ID(MEMORY_THERMAL_REPORTING_FORM_FORM_ID),
+ title = STRING_TOKEN(STR_MEMORY_THERMAL_REPORTING_FORM_TITLE);
+
+ NB_ONEOF_LOCKPTMREGS // LockPTMregs
+
+ SEPARATOR
+ SUBTITLE(STRING_TOKEN(STR_MEMORY_THERMAL_REPORTING_FORM_TITLE))
+ SEPARATOR
+
+ NB_ONEOF_ENABLEEXTTS // EnableExtts
+
+ NB_ONEOF_ENABLECLTM // EnableCltm
+
+ NB_ONEOF_ENABLEOLTM // EnableOltm
+
+ SEPARATOR
+ SUBTITLE(STRING_TOKEN(STR_THERMAL_THRESHOLD_SETTINGS_FORM_TITLE))
+ SEPARATOR
+
+ NB_NUMERIC_WARMTHRESHOLDCH0DIMM0 // WarmThresholdCh0Dimm0
+
+ NB_NUMERIC_WARMTHRESHOLDCH0DIMM1 // WarmThresholdCh0Dimm1
+
+ NB_NUMERIC_HOTHRESHOLDCH0DIMM0 // HotThresholdCh0Dimm0
+
+ NB_NUMERIC_HOTHRESHOLDCH0DIMM1 // HotThresholdCh0Dimm1
+
+ NB_NUMERIC_WARMTHRESHOLDCH1DIMM0 // WarmThresholdCh1Dimm0
+
+ NB_NUMERIC_WARMTHRESHOLDCH1DIMM1 // WarmThresholdCh1Dimm1
+
+ NB_NUMERIC_HOTHRESHOLDCH1DIMM0 // HotThresholdCh1Dimm0
+
+ NB_NUMERIC_HOTHRESHOLDCH1DIMM1 // HotThresholdCh1Dimm1
+
+ SEPARATOR
+ SUBTITLE(STRING_TOKEN(STR_THERMAL_THROTTLE_BUDGET_SETTINGS_FORM_TITLE))
+ SEPARATOR
+
+ NB_NUMERIC_WARMBUDGETCH0DIMM0 // WarmBudgetCh0Dimm0
+
+ NB_NUMERIC_WARMBUDGETCH0DIMM1 // WarmBudgetCh0Dimm1
+
+ NB_NUMERIC_HOTBUDGETCH0DIMM0 // HotBudgetCh0Dimm0
+
+ NB_NUMERIC_HOTBUDGETCH0DIMM1 // HotBudgetCh0Dimm1
+
+ NB_NUMERIC_WARMBUDGETCH1DIMM0 // WarmBudgetCh1Dimm0
+
+ NB_NUMERIC_WARMBUDGETCH1DIMM1 // WarmBudgetCh1Dimm1
+
+ NB_NUMERIC_HOTBUDGETCH1DIMM0 // HotBudgetCh1Dimm0
+
+ NB_NUMERIC_HOTBUDGETCH1DIMM1 // HotBudgetCh1Dimm1
+
+ endform;
+//----------------------------------------------------------------------------
+// MEMORY RAPL
+//----------------------------------------------------------------------------
+ form formid = AUTO_ID(MEMORY_RAPL_FORM_FORM_ID),
+ title = STRING_TOKEN(STR_MEMORY_RAPL_FORM_TITLE);
+
+ SUBTITLE(STRING_TOKEN(STR_MEMORY_RAPL_FORM_TITLE))
+
+ SEPARATOR
+
+ grayoutif ideqval SETUP_DATA.UserPowerWeightsEn == 0;
+
+ NB_NUMERIC_RAPLPWRFLCH0 // RaplPwrFlCh0
+
+ NB_NUMERIC_RAPLPWRFLCH1 // RaplPwrFlCh1
+
+ endif;
+
+ SEPARATOR
+
+ NB_ONEOF_RAPLLIM2LOCK // RaplLim2Lock
+
+ NB_ONEOF_RAPLLIM1ENA // RaplLim1Ena
+
+ NB_NUMERIC_RAPLLIM1PWR // RaplLim1Pwr
+
+ NB_NUMERIC_RAPLLIM1WINDX // RaplLim1WindX
+
+ NB_NUMERIC_RAPLLIM1WINDY // RaplLim1WindY
+
+ SEPARATOR
+
+ NB_ONEOF_RAPLLIM2ENA // RaplLim2Ena
+
+ NB_NUMERIC_RAPLLIM2PWR // RaplLim2Pwr
+
+ NB_NUMERIC_RAPLLIM2WINDX // RaplLim2WindX
+
+ NB_NUMERIC_RAPLLIM2WINDY // RaplLim2WindY
+
+ endform;
+//----------------------------------------------------------------------------
+// DMI_CONFIGURATION
+//----------------------------------------------------------------------------
+
+ form formid = AUTO_ID(DMI_CONFIG_ID),
+ title = STRING_TOKEN(STR_DMI_CONFIGURATION_TITLE);
+
+ SUBTITLE(STRING_TOKEN(STR_DMI_CONFIGURATION_TITLE))
+ SEPARATOR
+ text
+ help = STRING_TOKEN(STR_DMI_INFO_HELP),
+ text = STRING_TOKEN(STR_DMI_INFO_NAME),
+ text = STRING_TOKEN(STR_DMI_INFO_VALUE),
+ flags = 0,
+ key = 0;
+ SEPARATOR
+
+ NB_ONEOF_DMIVC1
+
+ NB_ONEOF_DMIVCP
+
+ NB_ONEOF_DMIVCM
+
+ NB_ONEOF_NBDMIASPM
+
+ NB_ONEOF_NBDMIEXTSYNC
+
+ NB_ONEOF_DMIGEN2
+
+ NB_ONEOF_DMIDEEMPHASIS
+
+ NB_ONEOF_DMIIOT
+
+ endform;
+ #endif // end FORM_SET_FORM
+#endif // end CHIPSET_SET_FORM
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/NB/NBSetup/NB.uni b/Board/NB/NBSetup/NB.uni
new file mode 100644
index 0000000..cf6eb1c
--- /dev/null
+++ b/Board/NB/NBSetup/NB.uni
Binary files differ
diff --git a/Board/NB/NBSetup/NBSetup.c b/Board/NB/NBSetup/NBSetup.c
new file mode 100644
index 0000000..8052df2
--- /dev/null
+++ b/Board/NB/NBSetup/NBSetup.c
@@ -0,0 +1,1144 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBSetup/NBSetup.c 26 1/15/15 6:28a Dennisliu $
+//
+// $Revision: 26 $
+//
+// $Date: 1/15/15 6:28a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBSetup/NBSetup.c $
+//
+// 26 1/15/15 6:28a Dennisliu
+// [TAG] EIP200606
+// [Category] Improvement
+// [Description] The options of "DIMM profile" can't load default. The
+// TSE revision 4.6.2_TSE_2_16_1243 behavior change, it is working after
+// checking the case EFI_BROWSER_ACTION_DEFAULT_STANDARD and returning
+// EFI_UNSUPPORTED.
+// [Files] NBSetup.c
+//
+// 24 7/11/14 3:49a Dennisliu
+// [TAG] None
+// [Category] Improvement
+// [Description] Problem: #if directive for TSE_BUILD=0x1208 (EIP176870)
+// [Files]
+// Board\NB\NBSetup\NBSetup.c
+// Chipset\NB\GOP\IntelSaGopSetup\IntelSaGopSetup.c
+//
+// 23 7/31/13 2:26a Ireneyang
+// [TAG] None
+// [Category] BrugFix
+// [Symptom] When adding XTU module, it would have building error.
+// [Description] Fix building error when adding XTU module.
+// [RootCause] The original NB_SETUP_CALLBACK function only will be
+// build
+// only when PERF_TUNE_SUPPORT is 0. However, CRID is one of
+// NB_SETUP_CALLBACK and it should be build wheather
+// PERF_TUNE_SUPPORT is 0 or 1. Others of NB_SETUP_CALLBACK
+// should still keep be build only when PERF_TUNE_SUPPORT
+// is 0.
+// [Solution] Divide others from original NB_SETUP_CALLBACK group to
+// an new NB_MEMORY_TUNING_CALLBACK and let them only be
+// build when PERF_TUNE_SUPPORT is 0. Keep CRID in
+// NB_SETUP_CALLBACK without any building condition.
+// [Files] NBSetup.sdl; NBSetup.c;
+//
+// 22 7/09/13 4:00a Ireneyang
+// [TAG] None
+// [Category] Improvement
+// [Description] Add new feature CRID into SMBIOS Type88.
+// [Files] NB.sd; NBSetup.c; NBSetup.sdl;
+//
+// 21 6/20/13 11:32p Ireneyang
+// [TAG] EIP126611
+// [Category] Improvement
+// [Description] Correct GT information.
+// [Files] NBSetup.c;
+//
+// 20 6/13/13 7:56a Ireneyang
+// [TAG] None
+// [Category] Improvement
+// [Description] Update LCAP Max Link Spped Value for Gen2/Gen1.
+//
+// 19 5/13/13 6:27a Ireneyang
+// [TAG] None
+// [Category] Improvement
+// [Description] Add PanelPowerEnable for enabling/disabling VDD force
+// bit.
+// (Required only for early enabling of eDP panel)
+// [Files] NBSetup.c; GetSetupData.c; NbSetupData.h; NBPEI.c;
+//
+// 18 5/13/13 4:31a Ireneyang
+// [TAG] EIP118807
+// [Category] BrugFix
+// [Description] Actual memory size and memory size information in Setup
+// Menu are dismatch.
+// [Files] NBSetup.c;
+//
+// 17 5/09/13 8:35a Ireneyang
+//
+// 14 12/24/12 2:56a Jeffch
+// [TAG] None
+// [Category] Bug Fix
+// [Description] Remove tRPab and fixed XTU build fail issue.
+// [Files] NBPei.c; NBDxe.c; NB.sd;
+//
+// 13 12/22/12 2:32a Jeffch
+//
+// 12 12/14/12 5:18a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Show memory voltage.
+// [Files] NB.sd; NB.uni; NBDxe.c.
+//
+// 11 11/19/12 4:37a Jeffch
+// [TAG] EIP106919
+// [Severity] Important
+// [Description] Fixed GT info incorrectly when CSM disabled.
+// [Files] NBSetup.c
+//
+// 10 10/30/12 7:06a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Update SA RC 0.72.
+// [Files] NBSetup.c
+//
+// 9 10/14/12 5:36a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Follow SA RC 0.71.
+// [Files] NBPei.c, NBDxe.c; NBGeneric.c; NBCspLib.h; NBSetup.c;
+// Nb.sd; GetSetupData.c; NBSetup.c;
+//
+// 8 10/14/12 12:38a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Update by XTU4.0.
+// [Files] NBPei.c, NBDxe.c, NBCspLib.h, NBGeneric.c
+// [TAG] None
+// [Severity] Important
+// [Description] Follow Update by Mahobay.
+// [Files] NBPei.c, NBDxe.c;
+//
+// 7 9/26/12 9:33a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Remove SPD XMP Profile support of the setup info.
+// [Files] NB.sd, NBSetup.c
+//
+// 6 6/14/12 5:17a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Fix for setup item 'DIMM profile' associated with
+// options.
+// [Description] NBSetup.c, NB.sd
+//
+// 5 6/14/12 5:14a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] Fixed Tse 1224 will hang setup call back and value
+// error.
+// [Description] NBSetup.c, NB.sd
+//
+// 4 4/26/12 2:57a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Adjust Intel System Agent module the Setup item and
+// Policy.
+// [Description] GetSetupData.c, NB.sdl, NB.sd, NB.uni, NBDxe.c,
+// NBPEI.c,
+// NBSetup.c, NBSetupReset.c, NbSetupData.h
+//
+// 3 4/26/12 2:56a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Correct Graphics Technology (GT) Displays (GT Info) in
+// BIOS Setup.
+// [Description] NBSetup.c
+//
+// 2 4/05/12 2:27a Yurenlai
+// [TAG] EIP87103
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Change for SystemAgent RefCode Revision: 0.5.5 .
+// [Files] NBDxe.c, NBPEI.c, NBSMI.C, NBGeneric.cm NB.sd, NBSetup.c,
+// GetSetupData.c, NbSetupData.h
+//
+// 1 2/08/12 4:33a Yurenlai
+// Intel Haswell/NB eChipset initially releases.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: NBSetup.c
+//
+// Description: North Bridge Setup Rountines
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+//----------------------------------------------------------------------------
+// Include(s)
+//----------------------------------------------------------------------------
+
+#include <Setup.h>
+#include <SetupStrTokens.h>
+#include <AmiDxeLib.h>
+#include <AmiCspLib.h>
+#include <Protocol\NBMemInfo.h>
+#include <MemInfo\MemInfo.h>
+#include <SaInfo\SaInfo.h>
+#include <Protocol\NBPlatformData.h>
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+#include <Protocol\LegacyBios.h>
+#endif
+
+#define _SA_COMMON_DEFINITIONS_H_
+#include <SaAccess.h>
+
+//----------------------------------------------------------------------------
+// Constant, Macro and Type Definition(s)
+//----------------------------------------------------------------------------
+// Constant Definition(s)
+
+// Macro Definition(s)
+#if defined PERF_TUNE_SUPPORT && PERF_TUNE_SUPPORT == 0
+//
+// tCL Macro definitions
+//
+#ifndef tCL_MINIMUM
+#define tCL_MINIMUM 4
+#endif
+#ifndef tCL_MAXIMUM
+#define tCL_MAXIMUM 15
+#endif
+//
+// tRP Macro definitions
+//
+#ifndef tRP_MINIMUM
+#define tRP_MINIMUM 3
+#endif
+#ifndef tRP_MAXIMUM
+#define tRP_MAXIMUM 15
+#endif
+//
+// tRCD Macro definitions
+//
+#ifndef tRCD_MINIMUM
+#define tRCD_MINIMUM 3
+#endif
+#ifndef tRCD_MAXIMUM
+#define tRCD_MAXIMUM 15
+#endif
+//
+// tRAS Macro definitions
+//
+#ifndef tRAS_MINIMUM
+#define tRAS_MINIMUM 9
+#endif
+#ifndef tRAS_MAXIMUM
+#define tRAS_MAXIMUM 63
+#endif
+//
+// tWR Macro definitions
+//
+#ifndef tWR_MINIMUM
+#define tWR_MINIMUM 3
+#endif
+#ifndef tWR_MAXIMUM
+#define tWR_MAXIMUM 31
+#endif
+//
+// tRFC Macro definitions
+//
+#ifndef tRFC_MINIMUM
+#define tRFC_MINIMUM 15
+#endif
+#ifndef tRFC_MAXIMUM
+#define tRFC_MAXIMUM 255
+#endif
+//
+// tRRD Macro definitions
+//
+#ifndef tRRD_MINIMUM
+#define tRRD_MINIMUM 4
+#endif
+#ifndef tRRD_MAXIMUM
+#define tRRD_MAXIMUM 15
+#endif
+//
+// tWTR Macro definitions
+//
+#ifndef tWTR_MINIMUM
+#define tWTR_MINIMUM 3
+#endif
+#ifndef tWTR_MAXIMUM
+#define tWTR_MAXIMUM 31
+#endif
+//
+// tRTP Macro definitions
+//
+#ifndef tRTP_MINIMUM
+#define tRTP_MINIMUM 4
+#endif
+#ifndef tRTP_MAXIMUM
+#define tRTP_MAXIMUM 15
+#endif
+//
+// tFAW Macro definitions
+//
+#ifndef tFAW_MINIMUM
+#define tFAW_MINIMUM 10
+#endif
+#ifndef tFAW_MAXIMUM
+#define tFAW_MAXIMUM 43
+#endif
+//
+// tRC Macro definitions
+//
+#ifndef tRC_MINIMUM
+#define tRC_MINIMUM 1
+#endif
+#ifndef tRC_MAXIMUM
+#define tRC_MAXIMUM 4095
+#endif
+
+//
+//
+// tCWL Macro definitions
+//
+#ifndef tCWL_MINIMUM
+#define tCWL_MINIMUM 5
+#endif
+#ifndef tCWL_MAXIMUM
+#define tCWL_MAXIMUM 12
+#endif
+//
+// tREFI Macro definitions
+//
+#ifndef tREFI_MINIMUM
+#define tREFI_MINIMUM 1
+#endif
+#ifndef tREFI_MAXIMUM
+#define tREFI_MAXIMUM 10000
+#endif
+//
+// tRPab Macro definitions
+//
+#ifndef tRPab_MINIMUM
+#define tRPab_MINIMUM 4
+#endif
+#ifndef tRPab_MAXIMUM
+#define tRPab_MAXIMUM 18
+#endif
+#endif //#if defined PERF_TUNE_SUPPORT && PERF_TUNE_SUPPORT == 0
+// Type Definition(s)
+
+// Function Prototype(s)
+
+//----------------------------------------------------------------------------
+// Variable and External Declaration(s)
+//----------------------------------------------------------------------------
+// Variable Declaration(s)
+#if defined PERF_TUNE_SUPPORT && PERF_TUNE_SUPPORT == 0
+static UINT8 gMaxXmpProfiles = 0;
+#endif
+STRING_REF PegInfo[3] = {
+ STRING_TOKEN(STR_PEG0_INFO_VALUE),
+ STRING_TOKEN(STR_PEG1_INFO_VALUE),
+ STRING_TOKEN(STR_PEG2_INFO_VALUE),
+};
+
+// GUID Definition(s)
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+static EFI_GUID gEfiLegacyBiosProtocol = EFI_LEGACY_BIOS_PROTOCOL_GUID;
+#endif
+static EFI_GUID gEfiSaInfoProtocolGuid = EFI_SA_INFO_PROTOCOL_GUID;
+static EFI_GUID gMemInfoHobProtocolGuid = MEM_INFO_PROTOCOL_GUID;
+
+// Protocol Definition(s)
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+static EFI_LEGACY_BIOS_PROTOCOL *LegacyBiosProtocol = NULL;
+#endif
+
+// External Declaration(s)
+
+// Function Definition(s)
+
+VOID
+UpdatePegInfo (
+ EFI_HII_HANDLE HiiHandle,
+ UINT16 Class
+);
+
+VOID
+UpdateDmiInfo (
+ EFI_HII_HANDLE HiiHandle,
+ UINT16 Class
+);
+
+VOID UpdateDDRXmpInfo (
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class
+);
+//----------------------------------------------------------------------------
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: InitNBStrings
+//
+// Description: Initializes North Bridge Setup String
+//
+// Input: HiiHandle - Handle to HII database
+// Class - Indicates the setup class
+//
+// Output: None
+//
+// Notes: PORTING REQUIRED
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID InitNBStrings (
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class )
+{
+
+ EFI_STATUS Status;
+ MEM_INFO_PROTOCOL *MemInfoHobProtocol;
+ EFI_SA_INFO_PROTOCOL *SaInfo;
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+ EFI_IA32_REGISTER_SET RegSet;
+ UINT8 RevisionHigh;
+ UINT8 RevisionLow;
+#endif
+
+ UINT16 Channel_A;
+ UINT16 Channel_B;
+ UINT16 Slot_0;
+ UINT16 Slot_1;
+ UINT16 Slot_2;
+ UINT16 Slot_3;
+ UINT16 DdrFrequency;
+ UINT8 MemoryType;
+ UINT64 MemorySize;
+ UINT64 MchBAR;
+ UINTN Granularity;
+ UINT32 IGfxFreq;
+ UINT8 GtSkuType;
+ UINT32 Value32;
+ UINT8 Offset24;
+ UINT8 Offset16;
+ UINT8 Offset08;
+ UINT8 Offset00;
+ BOOLEAN DimmExist[4] = { 0, 0, 0, 0 };
+ UINT8 RankInDimm[4] = { 0, 0, 0, 0 };
+ UINT8 MemDevIdx;
+ UINT16 VddVoltage[5] = {0};
+ UINT16 wDimmValue[DIMM_SLOT_NUM] = {STR_MEMORY_DIMM0_VALUE,
+ STR_MEMORY_DIMM1_VALUE,
+ STR_MEMORY_DIMM2_VALUE,
+ STR_MEMORY_DIMM3_VALUE};
+ UINT16 Slot_Array[DIMM_SLOT_NUM];
+ NB_SETUP_DATA NbSetupData;
+ UINT8 NbDeviceData;
+ UINT8 GtTypeAndValue;
+
+ if (Class == CHIPSET_FORM_SET_CLASS)
+ {
+ // Get the Memory Info HOB Protocol if it exists.
+ Status = pBS->LocateProtocol (&gMemInfoHobProtocolGuid, NULL, &MemInfoHobProtocol);
+ if (!EFI_ERROR (Status)) {
+
+ // each channel has 2 dimms...
+
+
+ GetNbSetupData( pRS, &NbSetupData, FALSE );
+
+ if((NbSetupData.DisableDimmChannel0 == 1) || (NbSetupData.DisableDimmChannel0 == 3)){
+ Slot_0 = 0;
+ }else{
+ Slot_0 = (UINT16) ((MemInfoHobProtocol->MemInfoData.dimmSize[0]));
+ }
+
+ if((NbSetupData.DisableDimmChannel0 == 2) || (NbSetupData.DisableDimmChannel0 == 3)){
+ Slot_1 = 0;
+ }else{
+ Slot_1 = (UINT16) ((MemInfoHobProtocol->MemInfoData.dimmSize[1]));
+ }
+
+ if((NbSetupData.DisableDimmChannel1 == 1) || (NbSetupData.DisableDimmChannel1 == 3)){
+ Slot_2 = 0;
+ }else{
+ Slot_2 = (UINT16) ((MemInfoHobProtocol->MemInfoData.dimmSize[2]));
+ }
+
+ if((NbSetupData.DisableDimmChannel1 == 2) || (NbSetupData.DisableDimmChannel1 == 3)){
+ Slot_3 = 0;
+ }else{
+ Slot_3 = (UINT16) ((MemInfoHobProtocol->MemInfoData.dimmSize[3]));
+ }
+
+ Channel_A = Slot_0 + Slot_1;
+ Channel_B = Slot_2 + Slot_3;
+ Granularity = 1;
+ MemoryType = 3;
+ MemorySize = (UINT64) ((Channel_A + Channel_B) * Granularity);
+ DdrFrequency = MemInfoHobProtocol->MemInfoData.ddrFreq;
+
+ VddVoltage[0] = MemInfoHobProtocol->MemInfoData.VddVoltage[0];
+
+ for (MemDevIdx = 0; MemDevIdx < 4; MemDevIdx++) {
+ DimmExist[MemDevIdx] = MemInfoHobProtocol->MemInfoData.DimmExist[MemDevIdx];
+ RankInDimm[MemDevIdx] = MemInfoHobProtocol->MemInfoData.RankInDimm[MemDevIdx];
+ VddVoltage[MemDevIdx+1] = MemInfoHobProtocol->MemInfoData.VddVoltage[MemDevIdx];
+ }
+
+ InitString( HiiHandle, \
+ STRING_TOKEN(STR_MEMORY_SIZE_VALUE), \
+ L"%4d MB (DDR3)", \
+ MemorySize);
+
+ InitString( HiiHandle, \
+ STRING_TOKEN(STR_MEMORY_SPEED_VALUE), \
+ L"%4d Mhz", \
+ DdrFrequency );
+
+ InitString( HiiHandle, \
+ STRING_TOKEN(STR_MEMORY_VOLTAGE_VALUE), \
+ L"%1d.%2dv", \
+ VddVoltage[0] / 1000, (VddVoltage[0] % 1000) / 10 );
+
+ Slot_Array[0] = Slot_0;
+ Slot_Array[1] = Slot_1;
+ Slot_Array[2] = Slot_2;
+ Slot_Array[3] = Slot_3;
+
+ for (MemDevIdx = 0; MemDevIdx < DIMM_SLOT_NUM; MemDevIdx++) {
+ if(Slot_Array[MemDevIdx] == 0)
+ continue;
+ MemorySize = (MemInfoHobProtocol->MemInfoData.dimmSize[MemDevIdx] * Granularity);
+ if (MemorySize)
+ InitString( HiiHandle, \
+ wDimmValue[MemDevIdx], \
+ L"%4d MB (DDR3)", \
+ MemorySize);
+ }
+
+ //
+ // Update the tCL, tRCD, tRP and tRAS string with data obtained from MemInfo protocol
+ //
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_MEMORY_CL_VALUE),
+ L"%d",
+ MemInfoHobProtocol->MemInfoData.Timing[0].tCL
+ );
+
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_MEMORY_TRCD_VALUE),
+ L"%d",
+ MemInfoHobProtocol->MemInfoData.Timing[0].tRCD
+ );
+
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_MEMORY_TRP_VALUE),
+ L"%d",
+ MemInfoHobProtocol->MemInfoData.Timing[0].tRP
+ );
+
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_MEMORY_TRAS_VALUE),
+ L"%d",
+ MemInfoHobProtocol->MemInfoData.Timing[0].tRAS
+ );
+
+#if defined PERF_TUNE_SUPPORT && PERF_TUNE_SUPPORT == 0
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_MEMORY_TWR_VALUE),
+ L"%d",
+ MemInfoHobProtocol->MemInfoData.Timing[0].tWR
+ );
+
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_MEMORY_TRFC_VALUE),
+ L"%d",
+ MemInfoHobProtocol->MemInfoData.Timing[0].tRFC
+ );
+
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_MEMORY_TRRD_VALUE),
+ L"%d",
+ MemInfoHobProtocol->MemInfoData.Timing[0].tRRD
+ );
+
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_MEMORY_TWTR_VALUE),
+ L"%d",
+ MemInfoHobProtocol->MemInfoData.Timing[0].tWTR
+ );
+
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_MEMORY_TRTP_VALUE),
+ L"%d",
+ MemInfoHobProtocol->MemInfoData.Timing[0].tRTP
+ );
+
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_MEMORY_TFAW_VALUE),
+ L"%d",
+ MemInfoHobProtocol->MemInfoData.Timing[0].tFAW
+ );
+#endif
+
+ } // MemInfoHobProtocol
+
+ // - Sa version
+ Status = pBS->LocateProtocol( &gEfiSaInfoProtocolGuid, \
+ NULL, \
+ &SaInfo );
+ if (!EFI_ERROR (Status)) {
+
+ Offset24 = (UINT8) ((SaInfo->RCVersion & 0xFF000000) >> 24);
+ Offset16 = (UINT8) ((SaInfo->RCVersion & 0xFF0000) >> 16);
+ Offset08 = (UINT8) ((SaInfo->RCVersion & 0xFF00) >> 8);
+ Offset00 = (UINT8) ((SaInfo->RCVersion & 0xFF));
+
+ InitString ( HiiHandle,
+ STRING_TOKEN (STR_SA_RC_REV_VALUE),
+ L"%d.%d.%d.%d",
+ Offset24, Offset16, Offset08, Offset00);
+ }
+
+ // MCDECS_SPARE - MRC version
+ Value32 = READ_MEM32_MCH(0x5034);
+ Offset24 = (UINT8) ((Value32 & 0xFF000000) >> 24);
+ Offset16 = (UINT8) ((Value32 & 0xFF0000) >> 16);
+ Offset08 = (UINT8) ((Value32 & 0xFF00) >> 8);
+ Offset00 = (UINT8) (Value32 & 0xFF);
+
+ InitString ( HiiHandle,
+ STRING_TOKEN (STR_MRC_REV_VALUE),
+ L"%d.%d.%d.%d",
+ Offset24, Offset16, Offset08, Offset00);
+
+ // Vtd Supported
+ if (!(READ_PCI32_NB(R_SA_MC_CAPID0_A_OFFSET) & BIT23)) {
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_SA_VTD_VALUE),
+ L"Supported"
+ );
+ }
+
+ UpdatePegInfo(HiiHandle, Class);
+ UpdateDmiInfo(HiiHandle, Class);
+#if defined PERF_TUNE_SUPPORT && PERF_TUNE_SUPPORT == 0
+ UpdateDDRXmpInfo(HiiHandle, Class);
+#endif
+
+
+
+ //
+ // Check IGFX device
+ //
+
+ if ((READ_PCI8_NB(R_SA_DEVEN) & B_SA_DEVEN_D2EN_MASK)) {
+ //
+ // IGFX enable
+ //
+#if (defined(CSM_SUPPORT) && (CSM_SUPPORT != 0))
+ if (!LegacyBiosProtocol) {
+ Status = pBS->LocateProtocol (&gEfiLegacyBiosProtocolGuid, NULL, (void **) &LegacyBiosProtocol);
+ if (!EFI_ERROR(Status)) {
+
+ RegSet.X.AX = 0x5f01;
+ Status = LegacyBiosProtocol->Int86 (LegacyBiosProtocol, 0x15, &RegSet);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // HEX2Ascii
+ //
+ RevisionHigh = (UINT8) (((RegSet.X.DX & 0x0F00) >> 4) | (RegSet.X.DX & 0x000F));
+ RevisionLow = (UINT8) (((RegSet.X.BX & 0x0F00) >> 4) | (RegSet.X.BX & 0x000F));
+
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_CHIP_IGFX_VBIOS_REV_VALUE),
+ L"%02X%02X",
+ RevisionHigh,
+ RevisionLow
+ );
+ }
+ }
+#endif
+
+ //
+ // Get MCHBAR to read the IGFX temperature
+ //
+ MchBAR = *(volatile UINT64 *) NB_PCIE_CFG_ADDRESS (0, 0, 0, 0x48) &~(BIT0);
+
+ //
+ // Read RP0 (Max) Frequency supported, RP0 ratio is in 100MHz units
+ //
+ IGfxFreq = (((READ_MEM32_MCH(0x5998) >> 8) & 0xFF) * 100);
+
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_IGFX_FREQ_VALUE),
+ L"%d MHz",
+ IGfxFreq
+ );
+
+ NbDeviceData = READ_PCI8_IGD(R_SA_PEG_DID_OFFSET);
+
+ GtTypeAndValue = NbDeviceData & 0xf0;
+
+ if (GtTypeAndValue == 0x20) {
+ GtSkuType = 3;
+ } else if (GtTypeAndValue == 0x10) {
+ GtSkuType = 2;
+ } else if (GtTypeAndValue == 0x00){
+ GtSkuType = 1;
+ }
+
+ // Display GT Type with RP0 Frequency Information
+ InitString (
+ HiiHandle,
+ STRING_TOKEN (STR_PROCESSOR_GT_VALUE),
+ L"%a%x (%d MHz)",
+ "GT",
+ GtSkuType,
+ IGfxFreq
+ );
+
+ }
+
+ } //(Class == CHIPSET_FORM_SET_CLASS)
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: UpdatePegInfo
+//
+// Description: Update PCIE Info
+//
+// Input: HiiHandle - Handle to HII database
+// Class - Indicates the setup class
+//
+// Output: None
+//
+// Notes: PORTING REQUIRED
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID
+UpdatePegInfo (
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class
+ )
+{
+ UINT16 Data16;
+ UINT8 Index;
+ UINT8 PegDeviceNumber;
+ UINT8 PegFunctionNumber;
+
+ Data16 = 0;
+
+ for (Index = 0; Index < 3; Index++) {
+
+ PegDeviceNumber = SA_PEG10_DEV_NUM;
+ PegFunctionNumber = Index;
+
+ //
+ // Check for DID VID to check Root Port is present
+ //
+ Data16 = *(volatile UINT16 *) NB_PCIE_CFG_ADDRESS (SA_PEG_BUS_NUM, PegDeviceNumber, PegFunctionNumber, 0x0);
+
+ if (Data16 != 0xFFFF) {
+ //
+ // Read Slot Status register
+ //
+ Data16 = *(volatile UINT16 *) NB_PCIE_CFG_ADDRESS (SA_PEG_BUS_NUM, PegDeviceNumber, PegFunctionNumber, R_SA_PEG_SLOTSTS_OFFSET);
+
+ //
+ // Check for Presence Detect State SlotStatus 0xba[6]
+ //
+ if (Data16 & 0x40) {
+ //
+ // Read LinkStatus 0xb2[3-0]-Current Link Speed, [9-4]-Negotiated Link Width.
+ //
+ Data16 = *(volatile UINT16 *) NB_PCIE_CFG_ADDRESS (SA_PEG_BUS_NUM, PegDeviceNumber, PegFunctionNumber, R_SA_PEG_LSTS_OFFSET);
+
+ InitString (
+ HiiHandle,
+ PegInfo[Index],
+ L"x%d Gen%1d",
+ (Shr64((Data16 & 0x3f0), 4)),
+ (Data16 & 0xf)
+ );
+
+ }
+ }
+ }
+ //
+ // for loop
+ //
+
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: UpdateDmiInfo
+//
+// Description: Update NB DMI Info
+//
+// Input: HiiHandle - Handle to HII database
+// Class - Indicates the setup class
+//
+// Output: None
+//
+// Notes: PORTING REQUIRED
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID
+UpdateDmiInfo (
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class
+ )
+{
+ UINT16 Data16;
+ UINT32 Data32;
+ UINT64 DmiBar;
+
+ // Get DMIBAR
+ DmiBar = (UINT64)READ_PCI32_NB(0x68) & ~BIT0; //DMI BAR
+
+ // LCAP 3:0 - Max Link Speed, Gen2/Gen1 Infomation
+ Data32 = READ_MEM32(DmiBar + 0x8a);
+
+ // LSTS 9:4 - DMI Link Negotiated Width
+ Data16 = READ_MEM16(DmiBar + 0x8a);
+
+ InitString (
+ HiiHandle,
+ STRING_TOKEN(STR_DMI_INFO_VALUE),
+ L"X%d Gen%1d",
+ ((Data16 >> 4) & 0xf),
+ (Data32 & 0xf)
+ );
+}
+
+EFI_STATUS
+EFIAPI
+NB_SETUP_CALLBACK (
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class,
+ IN UINT16 SubClass,
+ IN UINT16 Key
+)
+{
+ SETUP_DATA *SetupData = NULL;
+ CALLBACK_PARAMETERS *pCallbackData = NULL;
+ EFI_STATUS Status = EFI_SUCCESS;
+#if EFI_SPECIFICATION_VERSION > 0x20000
+ UINTN BufferSize= sizeof(SETUP_DATA);
+ EFI_GUID SetupGuid = SETUP_GUID;
+#else
+ UINT8 *pNvRamMap;
+#endif
+
+ pCallbackData = GetCallbackParameters();
+ if(pCallbackData == NULL) return Status;
+
+#if ((TSE_BUILD >= 0x1224) && (EFI_SPECIFICATION_VERSION >= 0x2000A))
+ if (pCallbackData->Action != EFI_BROWSER_ACTION_CHANGED)
+ return Status;
+#elif ((TSE_BUILD > 0x1208) && (EFI_SPECIFICATION_VERSION >= 0x2000A))
+ // Check callback action
+ if (pCallbackData->Action != EFI_BROWSER_ACTION_CHANGING)
+ return Status;
+#endif
+
+#if EFI_SPECIFICATION_VERSION > 0x20000
+ Status = pBS->AllocatePool(EfiBootServicesData, BufferSize, &SetupData);
+ if(EFI_ERROR(Status)) return Status;
+
+ Status = HiiLibGetBrowserData(
+ &BufferSize, SetupData,
+ &SetupGuid, L"Setup"
+ );
+ ASSERT_EFI_ERROR(Status);
+#else
+ pNvRamMap = pCallbackData->Data->NvRamMap;
+ SetupData = (SETUP_DATA*)pNvRamMap;
+#endif
+
+ switch (Key)
+ {
+ case NB_CRID_KEY:
+ SetupData->PchEnableCrid = SetupData->EnableNbCrid;
+ break;
+ }
+
+#if EFI_SPECIFICATION_VERSION > 0x20000
+ Status = HiiLibSetBrowserData(
+ BufferSize, SetupData,
+ &SetupGuid, L"Setup"
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ pBS->FreePool(SetupData);
+#endif;
+
+ return EFI_SUCCESS;
+}
+
+
+#if defined PERF_TUNE_SUPPORT && PERF_TUNE_SUPPORT == 0
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+//
+// Procedure: UpdateDDRXmpInfo
+//
+// Description: Update DDR XMP Info
+//
+// Input: HiiHandle - Handle to HII database
+// Class - Indicates the setup class
+//
+// Output: None
+//
+// Notes: PORTING REQUIRED
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID UpdateDDRXmpInfo (
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class )
+{
+ UINTN VariableSize;
+ NB_PLATFORM_DATA NBPlatformData = {0};
+ EFI_GUID SetupGuid = SETUP_GUID;
+ EFI_STATUS Status;
+
+ // Read the NB Platform Data
+ VariableSize = sizeof (NB_PLATFORM_DATA);
+ Status = pRS->GetVariable (
+ L"NBPlatformData",
+ &SetupGuid,
+ NULL,
+ &VariableSize,
+ &NBPlatformData
+ );
+
+ if (!EFI_ERROR (Status)) {
+ if (NBPlatformData.XmpProfile1) {
+ gMaxXmpProfiles = 2;
+ InitString(
+ HiiHandle,
+ STRING_TOKEN(STR_XMP_PROFILE_1_VALUE),
+ L"%a",
+ "Supported"
+ );
+
+ }
+
+ if (NBPlatformData.XmpProfile2) {
+ gMaxXmpProfiles = 3;
+ InitString(
+ HiiHandle,
+ STRING_TOKEN(STR_XMP_PROFILE_2_VALUE),
+ L"%a",
+ "Supported"
+ );
+ }
+ }
+}
+
+EFI_STATUS
+EFIAPI
+NB_MEMORY_TUNING_CALLBACK (
+ IN EFI_HII_HANDLE HiiHandle,
+ IN UINT16 Class,
+ IN UINT16 SubClass,
+ IN UINT16 Key
+)
+{
+ SETUP_DATA *SetupData = NULL;
+ CALLBACK_PARAMETERS *pCallbackData = NULL;
+ EFI_STATUS Status = EFI_SUCCESS;
+#if EFI_SPECIFICATION_VERSION > 0x20000
+ UINTN BufferSize= sizeof(SETUP_DATA);
+ EFI_GUID SetupGuid = SETUP_GUID;
+#else
+ UINT8 *pNvRamMap;
+#endif
+
+ pCallbackData = GetCallbackParameters();
+ if(pCallbackData == NULL) return Status;
+
+#if ((TSE_BUILD >= 0x1243) && (EFI_SPECIFICATION_VERSION >= 0x2000A)) // [ EIP200606 ]
+ if (pCallbackData->Action == EFI_BROWSER_ACTION_DEFAULT_STANDARD)
+ return EFI_UNSUPPORTED;
+#endif
+
+#if ((TSE_BUILD >= 0x1224) && (EFI_SPECIFICATION_VERSION >= 0x2000A))
+ if (pCallbackData->Action != EFI_BROWSER_ACTION_CHANGED)
+ return Status;
+#elif ((TSE_BUILD > 0x1208) && (EFI_SPECIFICATION_VERSION >= 0x2000A))
+ // Check callback action
+ if (pCallbackData->Action != EFI_BROWSER_ACTION_CHANGING)
+ return Status;
+#endif
+
+#if EFI_SPECIFICATION_VERSION > 0x20000
+ Status = pBS->AllocatePool(EfiBootServicesData, BufferSize, &SetupData);
+ if(EFI_ERROR(Status)) return Status;
+
+ Status = HiiLibGetBrowserData(
+ &BufferSize, SetupData,
+ &SetupGuid, L"Setup"
+ );
+ ASSERT_EFI_ERROR(Status);
+#else
+ pNvRamMap = pCallbackData->Data->NvRamMap;
+ SetupData = (SETUP_DATA*)pNvRamMap;
+#endif
+
+ switch (Key)
+ {
+ case Default_SPD:
+ case Custom_SPD:
+ case XMP_SPD1:
+ case XMP_SPD2:
+ if (SetupData->SpdProfileSelected >= gMaxXmpProfiles &&\
+ SetupData->SpdProfileSelected != 1)
+ SetupData->SpdProfileSelected = gMaxXmpProfiles;
+ break;
+
+ case NB_tCL_KEY:
+ if (SetupData->tCL > tCL_MAXIMUM) SetupData->tCL = tCL_MAXIMUM;
+ if (SetupData->tCL < tCL_MINIMUM) SetupData->tCL = tCL_MINIMUM;
+ break;
+
+ case NB_tRP_KEY:
+ if (SetupData->tRP > tRP_MAXIMUM) SetupData->tRP = tRP_MAXIMUM;
+ if (SetupData->tRP < tRP_MINIMUM) SetupData->tRP = tRP_MINIMUM;
+ break;
+
+ case NB_tRCD_KEY:
+ if (SetupData->tRCD > tRCD_MAXIMUM) SetupData->tRCD = tRCD_MAXIMUM;
+ if (SetupData->tRCD < tRCD_MINIMUM) SetupData->tRCD = tRCD_MINIMUM;
+ break;
+
+ case NB_tRAS_KEY:
+ if (SetupData->tRAS > tRAS_MAXIMUM) SetupData->tRAS = tRAS_MAXIMUM;
+ if (SetupData->tRAS < tRAS_MINIMUM) SetupData->tRAS = tRAS_MINIMUM;
+ break;
+
+ case NB_tWR_KEY:
+ if (SetupData->tWR > tWR_MAXIMUM) SetupData->tWR = tWR_MAXIMUM;
+ if (SetupData->tWR < tWR_MINIMUM) SetupData->tWR = tWR_MINIMUM;
+ break;
+
+ case NB_tRFC_KEY:
+ if (SetupData->tRFC > tRFC_MAXIMUM) SetupData->tRFC = tRFC_MAXIMUM;
+ if (SetupData->tRFC < tRFC_MINIMUM) SetupData->tRFC = tRFC_MINIMUM;
+ break;
+
+ case NB_tWTR_KEY:
+ if (SetupData->tWTR > tWTR_MAXIMUM) SetupData->tWTR = tWTR_MAXIMUM;
+ if (SetupData->tWTR < tWTR_MINIMUM) SetupData->tWTR = tWTR_MINIMUM;
+ break;
+
+ case NB_tRRD_KEY:
+ if (SetupData->tRRD > tRRD_MAXIMUM) SetupData->tRRD = tRRD_MAXIMUM;
+ if (SetupData->tRRD < tRRD_MINIMUM) SetupData->tRRD = tRRD_MINIMUM;
+ break;
+
+ case NB_tRTP_KEY:
+ if (SetupData->tRTP > tRTP_MAXIMUM) SetupData->tRTP = tRTP_MAXIMUM;
+ if (SetupData->tRTP < tRTP_MINIMUM) SetupData->tRTP = tRTP_MINIMUM;
+ break;
+
+ case NB_tFAW_KEY:
+ if (SetupData->tFAW > tFAW_MAXIMUM) SetupData->tFAW = tFAW_MAXIMUM;
+ if (SetupData->tFAW < tFAW_MINIMUM) SetupData->tFAW = tFAW_MINIMUM;
+ break;
+
+ case NB_tRC_KEY:
+ if (SetupData->tRC > tRC_MAXIMUM) SetupData->tRC = tRC_MAXIMUM;
+ if (SetupData->tRC < tRC_MINIMUM) SetupData->tRC = tRC_MINIMUM;
+ break;
+
+ case NB_tCWL_KEY:
+ if (SetupData->tCWL > tCWL_MAXIMUM) SetupData->tCWL = tCWL_MAXIMUM;
+ if (SetupData->tCWL < tCWL_MINIMUM) SetupData->tCWL = tCWL_MINIMUM;
+ break;
+
+ case NB_tREFI_KEY:
+ if (SetupData->tREFI > tREFI_MAXIMUM) SetupData->tREFI = tREFI_MAXIMUM;
+ if (SetupData->tREFI < tREFI_MINIMUM) SetupData->tREFI = tREFI_MINIMUM;
+ break;
+
+// case NB_tRPab_KEY:
+// if (SetupData->tRPab > tRPab_MAXIMUM) SetupData->tRPab = tRPab_MAXIMUM;
+// if (SetupData->tRPab < tRPab_MINIMUM) SetupData->tRPab = tRPab_MINIMUM;
+// break;
+ }
+
+#if EFI_SPECIFICATION_VERSION > 0x20000
+ Status = HiiLibSetBrowserData(
+ BufferSize, SetupData,
+ &SetupGuid, L"Setup"
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ pBS->FreePool(SetupData);
+#endif;
+
+ return EFI_SUCCESS;
+}
+#endif
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
diff --git a/Board/NB/NBSetup/NBSetup.cif b/Board/NB/NBSetup/NBSetup.cif
new file mode 100644
index 0000000..926b4ad
--- /dev/null
+++ b/Board/NB/NBSetup/NBSetup.cif
@@ -0,0 +1,13 @@
+<component>
+ name = "NBSetup"
+ category = ModulePart
+ LocalRoot = "Board\NB\NBSetup"
+ RefName = "NBSetup"
+[files]
+"NBSetup.sdl"
+"NBSetup.mak"
+"NB.sd"
+"NB.uni"
+"NBSetup.c"
+"NBSetupReset.c"
+<endComponent>
diff --git a/Board/NB/NBSetup/NBSetup.mak b/Board/NB/NBSetup/NBSetup.mak
new file mode 100644
index 0000000..cfcb805
--- /dev/null
+++ b/Board/NB/NBSetup/NBSetup.mak
@@ -0,0 +1,83 @@
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBSetup/NBSetup.mak 2 4/05/12 2:25a Yurenlai $
+#
+# $Revision: 2 $
+#
+# $Date: 4/05/12 2:25a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBSetup/NBSetup.mak $
+#
+# 2 4/05/12 2:25a Yurenlai
+# [TAG] None
+# [Category] Improvement
+# [Severity] Important
+# [Description] Fixed token RESET_RUNTIME_SERVICES_SUPPORT = 1 building
+# error.
+# [Files] NBSetup.mak
+#
+# 1 2/08/12 4:33a Yurenlai
+# Intel Haswell/NB eChipset initially releases.
+#
+#*************************************************************************
+#<AMI_FHDR_START>
+#
+# Name: NBSetup.mak
+#
+# Description: This make file builds north bridge Setup
+# components and link them to respective binary
+#
+#<AMI_FHDR_END>
+#*************************************************************************
+All : NBSetup
+
+NBSetup : $(BUILD_DIR)\NBSetup.mak
+
+SetupSdbs : $(BUILD_DIR)\NB.sdb
+
+$(BUILD_DIR)\NB.sdb : $(NBSetup_DIR)\$(@B).sd $(NBSetup_DIR)\$(@B).uni
+ $(STRGATHER) -i INCLUDE -parse -newdb -db $(BUILD_DIR)\$(@B).sdb $(NBSetup_DIR)\$(@B).uni
+ $(STRGATHER) -scan -db $(BUILD_DIR)\$(@B).sdb -od $(BUILD_DIR)\$(@B).sdb $(NBSetup_DIR)\$(@B).sd
+
+$(BUILD_DIR)\NBSetup.mak : $(NBSetup_DIR)\$(@B).cif $(NBSetup_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(NBSetup_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+SetupBin : $(BUILD_DIR)\NBSetup.obj
+
+$(BUILD_DIR)\NBSetup.obj : $(NBSetup_DIR)\NBSetup.c $(BUILD_DIR)\SetupStrTokens.h
+ $(CC) $(CFLAGS) $(INTEL_MCH_INCLUDES) /Fo$(BUILD_DIR)\ $(NBSetup_DIR)\NBSetup.c
+
+AMITSEBin : $(BUILD_DIR)\NBSetupReset.obj $(AMICSPLib)
+
+$(BUILD_DIR)\NBSetupReset.obj : $(NBSetup_DIR)\NBSetupReset.c
+ $(CC) $(CFLAGS) $(INTEL_PCH_INCLUDES) /Fo$(BUILD_DIR)\ $(NBSetup_DIR)\NBSetupReset.c
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/NB/NBSetup/NBSetup.sdl b/Board/NB/NBSetup/NBSetup.sdl
new file mode 100644
index 0000000..65cd114
--- /dev/null
+++ b/Board/NB/NBSetup/NBSetup.sdl
@@ -0,0 +1,314 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBSetup/NBSetup.sdl 9 5/28/14 3:15a Dennisliu $
+#
+# $Revision: 9 $
+#
+# $Date: 5/28/14 3:15a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBSetup/NBSetup.sdl $
+#
+# 9 5/28/14 3:15a Dennisliu
+# [TAG] NONE
+# [Category] Improvement
+# [Description] Create a Token "DEFAULT_REFRESH_2X_POLICY" for customer
+# to decide the default value.
+# [Files] NBSetup.sdl; NB.sd;
+#
+# 8 12/31/13 1:53a Ireneyang
+# [TAG] None
+# [Category] Improvement
+# [Description] Some items belong to XTU, therefore, its callback
+# funtion should be NB_MEMORY_TUNING_CALLBACK.
+# [Files] NBSetup.sdl;
+#
+# 7 7/31/13 2:29a Ireneyang
+# [TAG] None
+# [Category] BrugFix
+# [Symptom] When adding XTU module, it would have building error.
+# [Description] Fix building error when adding XTU module.
+# [RootCause] The original NB_SETUP_CALLBACK function only will be
+# build only when PERF_TUNE_SUPPORT is 0. However, CRID
+# is one of NB_SETUP_CALLBACK and it should be build
+# wheather PERF_TUNE_SUPPORT is 0 or 1. Others of
+# NB_SETUP_CALLBACK should still keep be build only
+# when PERF_TUNE_SUPPORT is 0.
+# [Solution] Divide others from original NB_SETUP_CALLBACK group to
+# an new NB_MEMORY_TUNING_CALLBACK and let them only be
+# build when PERF_TUNE_SUPPORT is 0. Keep CRID in
+# NB_SETUP_CALLBACK without any building condition.
+# [Files] NBSetup.sdl; NBSetup.c;
+#
+# 6 7/09/13 4:02a Ireneyang
+# [TAG] None
+# [Category] Improvement
+# [Description] Add new feature CRID into SMBIOS Type88.
+# [Files] NB.sd; NBSetup.c; NBSetup.sdl;
+#
+# 5 5/23/13 11:47p Ireneyang
+# [TAG] None
+# [Category] Improvement
+# [Description] Fix Typo error.
+# [Files] NB.sd; NBSetup.sdl;
+#
+# 4 4/17/13 6:42a Ireneyang
+# [TAG] NONE
+# [Category] Improvement
+# [Severity] Normal
+# [Symptom] Create a Token "PRIMARY_DISPLAY_SG_DEFAULT_ENABLE" for
+# customer to decide if primarydispay should set to SG
+# as default when SwitchableGraphics_SUPPORT is set to 1.
+# [Files] NB.sd; NBSetup.sdl;
+#
+# 3 12/24/12 2:56a Jeffch
+# [TAG] None
+# [Category] Bug Fix
+# [Description] Remove tRPab and fixed XTU build fail issue.
+# [Files] NBPei.c; NBDxe.c; NB.sd;
+#
+# 2 12/22/12 2:32a Jeffch
+#
+# 1 2/08/12 4:33a Yurenlai
+# Intel Haswell/NB eChipset initially releases.
+#
+#*************************************************************************
+TOKEN
+ Name = "NB_SETUP_SUPPORT"
+ Value = "1"
+ Help = "Main switch to enable NBSetup support in Project"
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Master = Yes
+End
+
+TOKEN
+ Name = "PRIMARY_DISPLAY_SG_DEFAULT_ENABLE"
+ Value = "0"
+ Help = "[1] : Default is SG for primarydisplay. [0] : Default is Auto for primarydisplay."
+ TokenType = Boolean
+ TargetMAK = Yes
+ TargetH = Yes
+ Token = "SwitchableGraphics_SUPPORT" "=" "1"
+End
+
+TOKEN
+ Name = "DEFAULT_REFRESH_2X_POLICY"
+ Value = "0"
+ Help = "[1] : Default is Enabled. [0] : Default is Disabled."
+ TokenType = Integer
+ TargetH = Yes
+End
+
+PATH
+ Name = "NBSetup_DIR"
+End
+
+MODULE
+ Help = "Includes NBSetup.mak to Project"
+ File = "NBSetup.mak"
+End
+
+ELINK
+ Name = "NbSetupCallbacks,"
+ Parent = "NbConfigurationList"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "InitNBStrings,"
+ Parent = "SetupStringInit"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\NB.sdb"
+ Parent = "SETUP_SDBS"
+ Priority = 20
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "$(NBSetup_DIR)\NB.sd"
+ Parent = "SETUP_DEFINITIONS"
+ Priority = 20
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "NBProcessEnterSetup,"
+ Parent = "ProcessEnterSetup,"
+ InvokeOrder = AfterParent
+End
+
+ELINK
+ Name = "NBSetupResetHook,"
+ Parent = "PreSystemResetHook,"
+ InvokeOrder = AfterParent
+End
+
+TOKEN
+ Name = "============================================="
+ TokenType = Expression
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, Default_SPD, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, Custom_SPD, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, XMP_SPD1, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, XMP_SPD2, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_tCL_KEY, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_tRCD_KEY, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_tRP_KEY, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_tRAS_KEY, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_tWR_KEY, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_tRFC_KEY, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_tRRD_KEY, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_tWTR_KEY, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_tRTP_KEY, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_tFAW_KEY, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_tRC_KEY, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_tCWL_KEY, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_tREFI_KEY, NB_MEMORY_TUNING_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+ Token = "PERF_TUNE_SUPPORT" "!=" "1"
+End
+
+#ELINK
+# Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_tRPab_KEY, NB_MEMORY_TUNING_CALLBACK),"
+# Parent = "SetupItemCallbacks"
+# InvokeOrder = AfterParent
+# Token = "PERF_TUNE_SUPPORT" "!=" "1"
+#End
+
+ELINK
+ Name = "ITEM_CALLBACK(CHIPSET_FORM_SET_CLASS, 0, NB_CRID_KEY, NB_SETUP_CALLBACK),"
+ Parent = "SetupItemCallbacks"
+ InvokeOrder = AfterParent
+End
+
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/Board/NB/NBSetup/NBSetupReset.c b/Board/NB/NBSetup/NBSetupReset.c
new file mode 100644
index 0000000..1be4b63
--- /dev/null
+++ b/Board/NB/NBSetup/NBSetupReset.c
@@ -0,0 +1,181 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBSetup/NBSetupReset.c 4 3/13/14 11:16p Dennisliu $
+//
+// $Revision: 4 $
+//
+// $Date: 3/13/14 11:16p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NBSetup/NBSetupReset.c $
+//
+// 4 3/13/14 11:16p Dennisliu
+// [TAG] None
+// [Category] Improvement
+// [Description] Add new item "PrimaryDisplay" in NBSetupResetHook.
+// [Files] NBSetupReset.c
+//
+// 3 10/14/12 12:38a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Follow Update by Mahobay.
+// [Files] NBPei.c, NBDxe.c;
+//
+// 2 4/26/12 2:57a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Adjust Intel System Agent module the Setup item and
+// Policy.
+// [Description] GetSetupData.c, NB.sdl, NB.sd, NB.uni, NBDxe.c,
+// NBPEI.c,
+// NBSetup.c, NBSetupReset.c, NbSetupData.h
+//
+// 1 2/08/12 4:33a Yurenlai
+// Intel Haswell/NB eChipset initially releases.
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name: NBSetupReset.c
+//
+// Description: North Bridge Setup Reset Rountines
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+#include <EFI.h>
+#include <Token.h>
+#include <AmiLib.h>
+#include <AmiDxeLib.h>
+#include <Setup.h>
+#if defined(RESET_RUNTIME_SERVICES_SUPPORT) && (RESET_RUNTIME_SERVICES_SUPPORT == 0)
+#include <Protocol\PchReset\PchReset.h>
+#else
+#include <AmiCSPLib.h>
+#include <PchRegsLpc.h>
+#endif
+//----------------------------------------------------------------------------
+// Variable and External Declaration(s)
+//----------------------------------------------------------------------------
+// Variable Declaration(s)
+static SETUP_DATA gNewSetupData;
+static SETUP_DATA gOldSetupData;
+
+// GUID Definition(s)
+static EFI_GUID gEfiSetupGuid = SETUP_GUID;
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NBProcessEnterSetup
+//
+// Description: This function is a hook called when TSE determines
+// that it has to load the boot options in the boot
+// order. This function is available as ELINK.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID NBProcessEnterSetup(VOID)
+{
+ EFI_STATUS Status;
+ UINTN VariableSize;
+
+ VariableSize = sizeof (SETUP_DATA);
+ Status = pRS->GetVariable (
+ L"Setup",
+ &gEfiSetupGuid,
+ NULL,
+ &VariableSize,
+ &gOldSetupData
+ );
+
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure: NBSetupResetHook
+//
+// Description: This function is a hook called after some control
+// modified in the setup utility by user. This
+// function is available as ELINK.
+//
+// Input: VOID
+//
+// Output: VOID
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+VOID NBSetupResetHook(VOID)
+{
+
+ EFI_STATUS Status;
+ UINTN VariableSize;
+
+ VariableSize = sizeof (SETUP_DATA);
+ Status = pRS->GetVariable (
+ L"Setup",
+ &gEfiSetupGuid,
+ NULL,
+ &VariableSize,
+ &gNewSetupData
+ );
+ if (!EFI_ERROR (Status)) {
+ if ((gNewSetupData.EnableVtd != gOldSetupData.EnableVtd) ||
+ (gNewSetupData.BdatAcpiTableSupport != gOldSetupData.BdatAcpiTableSupport) ||
+ (gNewSetupData.PegGenx0 != gOldSetupData.PegGenx0) ||
+ (gNewSetupData.PegGenx1 != gOldSetupData.PegGenx1) ||
+ (gNewSetupData.PegGenx2 != gOldSetupData.PegGenx2) ||
+ (gNewSetupData.ExitMode != gOldSetupData.ExitMode) ||
+ (gNewSetupData.DmiGen2 != gOldSetupData.DmiGen2) ||
+ (gNewSetupData.NBDmiAspm != gOldSetupData.NBDmiAspm) ||
+ (gNewSetupData.NBDmiExtSync != gOldSetupData.NBDmiExtSync) ||
+ (gNewSetupData.DetectNonComplaint != gOldSetupData.DetectNonComplaint) ||
+ (gNewSetupData.AlwaysEnablePeg != gOldSetupData.AlwaysEnablePeg) ||
+ (gNewSetupData.PowerDownMode0 != gOldSetupData.PowerDownMode0) ||
+ (gNewSetupData.PrimaryDisplay != gOldSetupData.PrimaryDisplay) ||
+ (gNewSetupData.PowerDownMode1 != gOldSetupData.PowerDownMode1)) {
+ //
+ // Powe Cycle Reset
+ //
+#if defined(RESET_RUNTIME_SERVICES_SUPPORT) && (RESET_RUNTIME_SERVICES_SUPPORT == 0)
+ pRS->ResetSystem (PowerCycleReset, EFI_SUCCESS, 0, NULL);
+#else
+ SBLib_ExtResetSystem (SbResetFull);
+#endif
+
+ }
+ }
+
+
+}
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//************************************************************************* \ No newline at end of file
diff --git a/Board/NB/Nb.ssp b/Board/NB/Nb.ssp
new file mode 100644
index 0000000..8db2b7c
--- /dev/null
+++ b/Board/NB/Nb.ssp
@@ -0,0 +1,80 @@
+// This AMI Setup Script Processor (SSP) file contains setup items that
+// are related to the CMOS Manager.
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/Nb.ssp 1 2/08/12 4:33a Yurenlai $
+//
+// $Revision: 1 $
+//
+// $Date: 2/08/12 4:33a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/Nb.ssp $
+//
+// 1 2/08/12 4:33a Yurenlai
+// Intel Haswell/NB eChipset initially releases.
+//
+//*************************************************************************
+
+//---------------------------------------------------------------------------
+// CMOS manager starts auto-assigning at 0x40
+//
+// This is a typical CMOS usage arrangement.
+// (Note: these locations are not currently reserverd by default.)
+//---------------------------------------------------------------------------
+//
+// 0x00..0x3F Legacy CMOS area, used by CSM
+// 0x40..0x7F OEM/ODM
+// 0x80..0xBF Chipset
+// 0xC0..0xFF Core+Technologies
+//
+// This is the format of a CMOS token defintion:
+//---------------------------------------------------------------------------
+// NvramField (TOKEN_NAME)
+// OptionBits = integer // how many bits to use
+// [Default = integer] // assembler format "xxxh"
+// [CheckSum = YES | NO] // include=YES | exclude=NO
+// [Location = cmos address, clobber mask] // CMOS register, size/offset
+// EndNvramField
+
+
+//-----------------------------------------------------------------
+// TODO: Check if all 8 bits are needed for each of these locations
+//-----------------------------------------------------------------
+
+
+NvramField (NB_SSP_IFFS_SCRAMBLER_SEED)
+ OptionBits = 16
+ Default = 0000h
+ CheckSum = NO
+ Location = MKF_NB_CMOS_IFFS_SCRAMBLER_SEED, 0FFFFh
+EndNvramField
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
diff --git a/Board/NB/NbInt15.asm b/Board/NB/NbInt15.asm
new file mode 100644
index 0000000..3e5206a
--- /dev/null
+++ b/Board/NB/NbInt15.asm
@@ -0,0 +1,651 @@
+ TITLE NBINT15.ASM -- OEM INTERRUPT NB IMPLEMENTATION
+;*************************************************************************
+;*************************************************************************
+;** **
+;** (C)Copyright 1985-2011, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;*************************************************************************
+;*************************************************************************
+
+;*************************************************************************
+; $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NbInt15.asm 1 2/08/12 4:33a Yurenlai $
+;
+; $Revision: 1 $
+;
+; $Date: 2/08/12 4:33a $
+;*************************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NbInt15.asm $
+;
+; 1 2/08/12 4:33a Yurenlai
+; Intel Haswell/NB eChipset initially releases.
+;
+;*************************************************************************
+;<AMI_FHDR_START>
+;
+; Name: NbInt15.asm
+;
+; Description: IGFX INT15 function hook
+;
+;<AMI_FHDR_END>
+;*************************************************************************
+
+
+include token.equ
+.386
+
+CSMOEM_CSEG SEGMENT PARA PUBLIC 'CODE' USE16
+ ASSUME cs:CSMOEM_CSEG, ds:CSMOEM_CSEG
+
+OldIntHandler LABEL DWORD
+ IntSegSav dw 0
+ IntOfsSav dw 0
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure: NBINT15
+;
+; Description: TIGD INT15 function implememtation.
+;
+; Input: None
+;
+; Output: None
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+NBINT15 PROC PUBLIC
+
+ cmp ah, 5fh
+ je igd_call
+ jmp DWORD PTR cs:[OldIntHandler]
+
+igd_call:
+; we are going to handle this call
+ cmp al, 00
+ jne not_5f00
+
+ mov bx, 1302h
+ jmp exit_success
+
+not_5f00:
+
+IFDEF MKF_CRB_EC_SUPPORT
+IF MKF_CRB_EC_SUPPORT
+ cmp al, 14h
+ jne not_5f14
+
+ cmp bx, 078Fh
+ jne exit_not_supported
+
+ mov cl, 00h
+ call read_ec_port
+ jmp exit_success
+ENDIF
+ENDIF
+
+not_5f14:
+ cmp al,40h
+ jne not_5f40
+
+ cmp bl, 00h
+ jne get_sdvo_paneltype
+
+; Get LFP Panel Type
+ mov al, MKF_IGFX_LCD_PANEL_TYPE
+ jmp read_paneltype
+
+get_sdvo_paneltype:
+ cmp bl, 01h
+ jne exit_fail
+ mov al, MKF_IGFX_SDVO_PANEL_TYPE
+
+read_paneltype:
+ call get_igfx_setup_data
+ mov cl, al
+ cmp cl, 0
+ jz not_5f01
+ jmp exit_success
+
+not_5f40:
+ cmp al, 34h
+ jne not_5f34
+
+; Get Panel Scaling feature
+ mov al, MKF_IGFX_LCD_PANEL_SCALING
+ call get_igfx_setup_data
+ mov cl, al
+ jmp exit_success
+
+not_5f34:
+ cmp al,35h
+ jne not_5f35
+
+; Get IGD boot type
+ mov al,MKF_IGFX_BOOT_TYPE
+ call get_igfx_setup_data
+ mov cl, al
+ cmp cl, 00h
+ jne check_pipe_B_display
+ mov ch, 00h
+ jmp exit_success
+
+check_pipe_B_display:
+
+; Get Pipe B device type
+ mov al,MKF_IGFX_DISPLAY_PIPE_B_TYPE
+ call get_igfx_setup_data
+ mov ch, al
+
+; Check Pipe A & Pipe B are same
+ cmp cl, ch
+ jne exit_success
+ mov ch, 00h
+ jmp exit_success
+
+not_5f35:
+ cmp al,49h
+ jne not_5f49
+
+; ----------------------------------------------------
+; Int 15h, AX = 5F49h, Get backlight type and polarity
+; ----------------------------------------------------
+ mov al,MKF_IGFX_BACKLIGHT_TYPE
+ call get_igfx_setup_data
+ movzx cx, al
+ jmp exit_success
+
+not_5f49:
+ cmp al,50h
+ jne not_5f50
+
+; ----------------------------------------------------
+; Int 15h, AX = 5F50h, Program Squelch Register for eDP
+; ----------------------------------------------------
+ push es
+ push 0
+ pop es
+ push edi
+ mov edi,MKF_PCIEX_BASE_ADDRESS
+;
+; set PCIEXBAR + 0x8dfc[1]=1b
+;
+ mov al, BYTE PTR es:[edi + 08dfch]
+ or al,02h
+ mov BYTE PTR es:[edi + 08dfch],al
+;
+; set PCIEXBAR + 0x8f88[31]=1b
+; set PCIEXBAR + 0x8f88[26]=0b
+;
+ mov al, BYTE PTR es:[edi + 08f8bh]
+ or al,080h
+ and al,NOT (04h)
+ mov BYTE PTR es:[edi + 08f8bh],al
+;
+; set PCIEXBAR + 0x8fa8[31]=1b
+; set PCIEXBAR + 0x8fa8[26]=0b
+;
+ mov al, BYTE PTR es:[edi + 08fabh]
+ or al,080h
+ and al,NOT (04h)
+ mov BYTE PTR es:[edi + 08fabh],al
+;
+; set PCIEXBAR + 0x8fc8[31]=1b
+; set PCIEXBAR + 0x8fc8[26]=0b
+;
+ mov al, BYTE PTR es:[edi + 08fcbh]
+ or al,080h
+ and al,NOT (04h)
+ mov BYTE PTR es:[edi + 08fcbh],al
+;
+; set PCIEXBAR + 0x8fe8[31]=1b
+; set PCIEXBAR + 0x8fe8[26]=0b
+;
+ mov al, BYTE PTR es:[edi + 08febh]
+ or al,080h
+ and al,NOT (04h)
+ mov BYTE PTR es:[edi + 08febh],al
+ pop edi
+ pop es
+ jmp exit_success
+not_5f50:
+ cmp al,51h
+ jne not_5f51
+; ----------------------------------------------------
+; Int 15h, AX = 5F51h, Select Active LFP Configuration
+; ----------------------------------------------------
+ mov al,MKF_IGFX_EDP_ACTIVE_LFP_CONFIG_TYPE
+ call get_igfx_setup_data
+ movzx cx, al
+ jmp exit_success
+not_5f51:
+ cmp al,52h
+ jne not_5f52
+; -----------------------------------------------------
+; Int 15h, AX = 5F52h, Hook to select Panel Color Depth
+; -----------------------------------------------------
+ mov al,MKF_IGFX_LFP_PANEL_COLOR_DEPTH_TYPE
+ call get_igfx_setup_data
+ movzx cx, al
+ jmp exit_success
+not_5f52:
+ cmp al,21h
+ jne not_5f21
+; --------------------------------------------------
+; Int 15h, AX = 5F21h, Get Actual display core clock
+; --------------------------------------------------
+ call GetCDClock
+ cmp cx, 0
+ je exit_fail
+ jmp exit_success
+
+not_5f21:
+ cmp al,22h
+ jne not_5f22
+; --------------------------------------------------
+; Int 15h, AX = 5F22h, Get FSB frequency
+; --------------------------------------------------
+ call GetFsbFreq
+ cmp cx, 0
+ je exit_fail
+ jmp exit_success
+
+not_5f22:
+ .386
+ cmp al,01h
+ jnz not_5f01
+ INT 10h
+ mov eax,ebx
+ shr ebx,16
+ mov dx,bx
+ mov bx,ax
+ jmp exit_success
+
+not_5f01:
+ cmp al, 70h
+ jnz not_5f70
+ call Func_70h_handler
+ jmp exit
+
+exit_not_supported:
+ mov ax, 0000h
+ jmp exit
+
+exit_fail:
+not_5f70:
+ mov ax, 15fh
+ jmp exit
+
+
+exit_success:
+ mov ax, 05fh
+
+exit:
+ retf 2
+NBINT15 ENDP
+
+;<AMI_PHDR_START>
+;---------------------------------------------------------------------------;
+;
+; Procedure: Func_70h_handler
+;
+; Description: Get/Set MUX State Hook
+;
+; Input: AX = 5F70h, Get/Set MUX State
+; CH = 00h - Get MUX State
+; = 01h - Set MUX State
+; = 02h - Get SG/Non-SG Mode
+;
+;
+; For CH=01h Set MUX State,
+; CL = MUX state,
+; = 0 - Set all MUXs to iGPU
+; = 1 - Set all MUXs to dGPU
+;
+; Output: AX = Return Status(function not supported if AL !=5FH)
+; 005Fh,Function Supported and successful
+; 015Fh,Function Supported but failed
+; For CH=00h in Input, CL = MUX State (0 = iGPU, 1= dGPU)
+; Bit 0 = CRT
+; Bit 3 = LFP
+; For CH=02h in Input, Get SG/Non-SG Mode
+; CL = SG Mode (0 = SG Enabled, 1= SG Disabled)
+;
+;---------------------------------------------------------------------------;
+;<AMI_PHDR_END>
+Func_70h_handler PROC NEAR PUBLIC
+.386
+
+; check if function 0 of handler is being called
+ push dx
+ push eax
+ cmp ch, 0h
+ jne check_INTEL_HG_F1
+
+; Function 0 - Get MUX State
+ mov dx, 0538h
+ mov cl, 09h ; assume DGPU
+ in eax, dx
+ and eax, 00100000h
+ jz OK_70
+ mov cl, 0h
+ jmp OK_70
+
+; Function 1
+; check if function 1 of handler is being called
+check_INTEL_HG_F1:
+ cmp ch, 01h
+ jne check_INTEL_HG_F2
+
+ mov dx, 0538h ; DX = mux register
+ cmp cl, 0
+ je ProgramMuxIGPU_Intel
+ cmp cl, 1
+ je ProgramMuxDGPU_Intel
+ jmp notOK_70
+
+ProgramMuxIGPU_Intel:
+ in eax, dx
+ or eax, 00180000h
+ out dx, eax
+ jmp OK_70
+
+ProgramMuxDGPU_Intel:
+ in eax, dx
+ and eax, NOT (00180000h)
+ out dx, eax
+ jmp OK_70
+
+; Function 2
+; Check if function 2 of handler is being called
+
+check_INTEL_HG_F2:
+ cmp ch, 02h
+ jne notOK_70
+
+;Get PrimaryDisplay
+ mov al, MKF_IGFX_PRIMARY_DISPLAY_TYPE
+ call get_igfx_setup_data
+ cmp al,4h
+ je PrimaryDisplay_SG
+
+ mov cl,01h
+ jmp OK_70
+
+PrimaryDisplay_SG:
+ mov cl,00h
+
+OK_70:
+ pop eax ; restore EAX before setting return value
+ mov ax, 005fh
+ jmp Func_70h_exit
+
+notOK_70:
+ pop eax ; restore EAX before setting return value
+ mov ax, 015Fh
+
+Func_70h_exit:
+ pop dx
+ ret
+
+Func_70h_handler ENDP
+
+;<AMI_PHDR_START>
+;---------------------------------------------------------------------------;
+;
+; Procedure: read_ec_port
+;
+; Description: procedure to read status values from EC ports
+;
+; Input: N/A
+;
+; Output: data in CL register
+;
+;---------------------------------------------------------------------------;
+;<AMI_PHDR_END>
+
+read_ec_port proc near
+
+ push eax
+
+ mov al, 0Ah
+ out 66h, al
+ec_read_loop1:
+ in al, 66h
+ and al, 01h
+ jz ec_read_loop1
+ in al, 62h
+ mov ah, al
+
+ mov al, 8Ah
+ out 66h, al
+ec_read_loop2:
+ in al, 66h
+ and al, 01h
+ jz ec_read_loop2
+ in al, 62h
+
+; SS Docking status
+ and al, 01h
+ jz check_lid_status
+ or cl, 01h
+
+;Lid status
+check_lid_status:
+ mov al, ah
+ and al, 01h
+ jnz check_AC_status
+ or cl, 02h
+
+;AC power status
+check_AC_status:
+ mov al, ah
+ and al, 10h
+ jz exit_read_ec_port
+ or cl, 04h
+
+exit_read_ec_port:
+ pop eax
+ ret
+
+read_ec_port endp
+
+;<AMI_PHDR_START>
+;---------------------------------------------------------------------------;
+;
+; Procedure: get_igfx_setup_data
+;
+; Description: get IGFX setup data after call NB SMI
+;
+; Input: AL - INDEX
+;
+; Output: data in reg al
+;
+;---------------------------------------------------------------------------;
+;<AMI_PHDR_END>
+get_igfx_setup_data proc near
+
+ push bx
+; save index to bl
+ mov bl, al
+
+; NB SW SMI
+ mov al, MKF_NB_SWSMI_IGFX_GET_SETUP
+ out 0b2h, al
+
+; setup data move to al
+ mov al, bl
+
+ pop bx
+
+ ret
+
+get_igfx_setup_data endp
+
+GraphicsCoreClock LABEL WORD
+;
+; VCO = 3200MHz (MCHBAR+0C0Fh[2:0] = 000b)
+;
+ DW 0228
+ DW 0320
+;
+; VCO = 4000MHz (MCHBAR+0C0Fh[2:0] = 001b)
+;
+ DW 0222
+ DW 0333
+;
+; Reserved
+;
+ DW 0222
+ DW 0333
+;
+; Reserved
+;
+ DW 0
+ DW 0
+;
+; VCO = 2666MHz (MCHBAR+0C0Fh[2:0] = 100b)
+;
+ DW 0222
+ DW 0333
+
+SaveCoreClock DW 05555h
+
+;<AMI_PHDR_START>
+;---------------------------------------------------------------------------;
+;
+; Procedure: GetCDClock
+;
+; Description: This function gets the Cantiga IGD display core clock value
+; and return it in CX.
+;
+; Input: N/A
+;
+; Output: N/A
+;
+;---------------------------------------------------------------------------;
+;<AMI_PHDR_END>
+GetCDClock PROC
+ mov cx, cs:[SaveCoreClock]
+ cmp cx, 05555h
+ jne ExitGetCDClock
+
+ push ax
+ push bx
+ push edi
+;
+; Read MCHBAR + 0C0Fh[2:0] = HPLL VCO frequency
+;
+ push es ; Save previous ES
+ push 0 ;
+ pop es
+ mov edi, MKF_NB_MCH_BASE_ADDRESS
+ movzx bx, BYTE PTR es:[edi + 0C0Fh]
+ and bx, 7 ; HPLL VCO Freq, Bits[2:0]
+
+ push bx ; Save in BX
+;
+; Read B0:D2:F0:Offset F0h[12] = Graphics Core Display Clock Select
+;
+ mov edi, MKF_PCIEX_BASE_ADDRESS + (2 SHL 15) + (0 SHL 12)
+ mov ax, WORD PTR es:[edi + 0F0h]
+ pop es ; Restore ES
+ and ax, 01000h ; GCFGC Bit[12]
+ shr ax, 12 - 1 ; Bit[12] * (sizeof WORD)
+ pop bx ; Restore HPLL VCO Freq
+ imul bx, 4
+ add bx, ax
+;
+; Get Actual Core Display Frequency from Table
+;
+ mov cx, cs:GraphicsCoreClock[bx]
+ mov cs:[SaveCoreClock], cx
+ pop edi
+ pop bx
+ pop ax
+
+ExitGetCDClock:
+ ret
+GetCDClock ENDP
+
+;<AMI_PHDR_START>
+;---------------------------------------------------------------------------;
+;
+; Procedure: GetFsbFreq
+;
+; Description: This function gets the Cantiga Front Side Bus (FSB) Frequency
+; and return it in CX.
+;
+; Input: N/A
+;
+; Output: N/A
+;
+;---------------------------------------------------------------------------;
+;<AMI_PHDR_END>
+
+SaveFsbFreq DW 05555h
+
+GetFsbFreq PROC NEAR
+ mov cx, cs:[SaveFsbFreq]
+ cmp cx, 05555h
+ jne Exit
+
+ push ax
+ push edi
+;
+; Read MCHBAR + 0C00h[2:0] = FSB Frequency
+;
+ push es ; Save previous ES
+ push 0 ;
+ pop es
+ mov edi, MKF_NB_MCH_BASE_ADDRESS
+ mov al, BYTE PTR es:[edi + 0C00h]
+ and al, 7 ; FSB Freq, Bits[2:0]
+
+;
+; Get actual Front Side Bus Frequency
+;
+ mov cx, 800
+ cmp al, 2
+ je GotFsbFreq
+ mov cx, 667
+ cmp al, 3
+ je GotFsbFreq
+ mov cx, 1066
+ cmp al, 6
+ je GotFsbFreq
+ mov cx, 0 ; Not supported
+
+GotFsbFreq:
+ mov cs:[SaveFsbFreq], cx
+ pop es ; Restore ES
+ pop edi
+ pop ax
+
+Exit:
+ ret
+GetFsbFreq ENDP
+
+
+CSMOEM_CSEG ENDS
+
+END
+;**********************************************************************
+;**********************************************************************
+;** **
+;** (C)Copyright 1985-2011, American Megatrends, Inc. **
+;** **
+;** All Rights Reserved. **
+;** **
+;** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+;** **
+;** Phone: (770)-246-8600 **
+;** **
+;**********************************************************************
+;********************************************************************** \ No newline at end of file
diff --git a/Board/NB/NbSetupData.h b/Board/NB/NbSetupData.h
new file mode 100644
index 0000000..e1e3d14
--- /dev/null
+++ b/Board/NB/NbSetupData.h
@@ -0,0 +1,548 @@
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NbSetupData.h 23 6/21/13 5:20a Ireneyang $
+//
+// $Revision: 23 $
+//
+// $Date: 6/21/13 5:20a $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Board/NbSetupData.h $
+//
+// 23 6/21/13 5:20a Ireneyang
+// Update to SBY SA RC 1.6.0.
+//
+// 22 5/22/13 5:13a Ireneyang
+// [TAG] None
+// [Category] Improvement
+// [Description] Add RCVENC1D into NB_SETUP_DATA for setting.
+// [Files] GetSetupData.c;
+//
+// 21 5/13/13 6:27a Ireneyang
+// [TAG] None
+// [Category] Improvement
+// [Description] Add PanelPowerEnable for enabling/disabling VDD force
+// bit.
+// (Required only for early enabling of eDP panel)
+// [Files] NBSetup.c; GetSetupData.c; NbSetupData.h; NBPEI.c;
+//
+// 20 3/15/13 1:57a Ireneyang
+// [TAG] EIP118133
+// [Severity] BugFix
+// [Description] Fix and restructure PlatformConfig setting of SA policy.
+// [Files] NBDxe.c; GetSetupData.c; NbSetupData.h;
+//
+// 19 3/07/13 6:12a Ireneyang
+// [TAG] None
+// [Severity] Improvement
+// [Description] Make some default SaPlatformPolicy items flexible.
+// Define some SaPlatformPolicy items into NB_SETUP_DATA
+// structure.
+// [Files] NbSetupData.h; GetSetupData.c; NBPEI.c;
+//
+// 18 3/07/13 3:44a Ireneyang
+// [TAG] None
+// [Severity] Improvement
+// [Description] Add "Hot only" option for Memory Refresh 2x support to
+// meet Intel Spec.
+// [Files] NBPEI.c; NB.uni; NB.sd; NbSetupData.h; GetSetupData.c;
+//
+// 17 2/09/13 10:25a Jeffch
+// [TAG] None
+// [Severity] Spec update
+// [Description] Update SA RC 1.1.0
+// [Files] NBPei.c; GetSetupData.c; NbSetupData.h; NBDXE.c;
+//
+// 16 1/28/13 3:48a Jeffch
+// [TAG] None
+// [Severity] Spec update
+// [Description] Update SA RC 1.0.
+// [Files] NBPei.c; GetSetupData.c; NbSetupData.h; NBDXE.c;
+// NB.sd; NB.uni; NBDxeBoard.c
+//
+// 15 1/14/13 6:10a Jeffch
+// [TAG] None
+// [Severity] Spec update
+// [Description] Create setup item for SA RC 0.90.
+// [Files] NBPei.c; GetNbSetupData.c NB.sd; NB.uni;
+//
+// 14 1/10/13 6:01a Jeffch
+// [TAG] None
+// [Severity] Bug Fix
+// [Description] Fixed not program HDA codec for SaHDAVerbtable link bug.
+// [Files] NBDXE.c; GetSetupData.c; NbSetupData.h
+// [TAG] None
+// [Severity] Important
+// [Description] Create DDR PowerDown and idle counter for setup item.
+// [Files] NBPei.c; NB.sd; NB.uni; GetSetupData.c; NbSetupData.h
+//
+// 13 1/03/13 7:31a Jeffch
+// [TAG] None
+// [Severity] Improvement
+// [Description] added SaHDAVerbtable link to OEM.
+// [Files] NBDxe.c; NbSetupData.h; GetSetupData.c;
+//
+// 12 12/22/12 2:30a Jeffch
+// [TAG] None
+// [Severity] Spec update
+// [Description] Create setup item for SA RC 0.81.
+// [Files] NBPei.c; GetNbSetupData.c NB.sd; NB.uni;
+//
+// 11 12/18/12 5:17a Jeffch
+// [TAG] None
+// [Severity] Spec update
+// [Description] Update SA RC 0.81.
+// [Files] GetSetupData.c; NbSetupData.h;
+//
+// 10 12/14/12 4:53a Jeffch
+// [TAG] EIP106709
+// [Severity] Important
+// [Description] Support PCIE Primary display.
+// [Files] NB.sd; NBDXEboard.c; NB.uni;
+// GetSetupData.c;NbSetupData.h;
+//
+// 9 11/14/12 5:33a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Update XTU4.x function
+// [Files] NBPei.c; GetSetupData.c; NbSetupData.h; NBDXE.c; NB.sd;
+// NB.uni
+//
+// 8 11/07/12 6:25a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Support ULT one BIOS
+// [Files] NBPei.c; GetSetupData.c; NbSetupData.h
+//
+// 7 10/18/12 11:17p Jeffch
+// [TAG] EIP104234
+// [Severity] Important
+// [Description] Fixed cannot compile 4.6.5.3_Intel_SA-RC_071_019a with
+// NB_ERROR_LOG_SUPPORT.
+//
+// 6 10/14/12 12:41a Jeffch
+// [TAG] None
+// [Severity] Important
+// [Description] Update by XTU4.0.
+// [Files] NB.h, GetSetupData.c, NbSetupData.h
+// [TAG] None
+// [Severity] Important
+// [Description] Follow Update by Mahobay.
+// [Files] NB.sdl, NB.mak.c; NBDXEBoard.c
+//
+// 5 9/12/12 6:37a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Add RxCEM Loop back setup item.
+// [Files] GetSetupData.c, NB.sd, NB.uni, NBPEI.c, NbSetupData.h,
+// NBPEI.c
+//
+// 4 7/27/12 8:46a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Description] IGfx Fource Disable Support.
+// [Files] GetSetupData.c, NB.sdl, NB.sd, NB.uni, NbSetupData.h,
+// NBDxe.c, NBPEI.c
+//
+// 3 4/26/12 3:00a Yurenlai
+// [TAG] None
+// [Category] Improvement
+// [Severity] Important
+// [Description] Adjust Intel System Agent module the Setup item and
+// Policy.
+// [Description] GetSetupData.c, NB.sdl, NB.sd, NB.uni, NBDxe.c,
+// NBPEI.c,
+// NBSetup.c, NBSetupReset.c, NbSetupData.h
+//
+// 2 4/05/12 2:23a Yurenlai
+// [TAG] EIP87103
+// [Category] Spec Update
+// [Severity] Important
+// [Description] Change for SystemAgent RefCode Revision: 0.5.5 .
+// [Files] NBDxe.c, NBPEI.c, NBSMI.C, NBGeneric.cm NB.sd, NBSetup.c,
+// GetSetupData.c, NbSetupData.h
+//
+// 1 2/08/12 4:33a Yurenlai
+// Intel Haswell/NB eChipset initially releases.
+//
+//*************************************************************************
+
+#ifndef __NB_SETUP_DATA_H__ // To Avoid this header get compiled twice
+#define __NB_SETUP_DATA_H__
+
+#include <Efi.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct _NB_SETUP_DATA NB_SETUP_DATA;
+
+#pragma pack(push, 1)
+
+typedef struct {
+ UINT32 VendorDeviceId;
+ UINT16 SubSystemId;
+ UINT8 RevisionId; ///< 0xFF applies to all steppings
+ UINT8 FrontPanelSupport;
+ UINT16 NumberOfRearJacks;
+ UINT16 NumberOfFrontJacks;
+} NB_SA_HDA_VERB_TABLE_HEADER;
+
+typedef struct {
+ NB_SA_HDA_VERB_TABLE_HEADER VerbTableHeader;
+ UINT32 *VerbTableData;
+} NB_SA_HDA_VERB_TABLE;
+
+typedef struct _NB_SETUP_DATA {
+ UINT8 GdxcEnable;
+ UINT8 GdxcIotSize;
+ UINT8 GdxcMotSize;
+ UINT8 MemoryTrace;
+
+ UINT8 ECT;
+ UINT8 SOT;
+ UINT8 RDMPRT;
+ UINT8 RCVET;
+ UINT8 JWRL;
+ UINT8 FWRL;
+ UINT8 WRTC1D;
+ UINT8 RDTC1D;
+ UINT8 DIMMODTT;
+ UINT8 WRDST;
+ UINT8 WREQT;
+
+ UINT8 RDODTT;
+ UINT8 RDEQT;
+ UINT8 RDAPT;
+ UINT8 WRTC2D;
+ UINT8 RDTC2D;
+ UINT8 CMDVC;
+ UINT8 WRVC2D;
+ UINT8 RDVC2D;
+ UINT8 LCT;
+ UINT8 RTL;
+ UINT8 TAT;
+ UINT8 MEMTST;
+ UINT8 DIMMODTT1D;
+ UINT8 WRSRT;
+ UINT8 DIMMRONT;
+ UINT8 ALIASCHK;
+ UINT8 RCVENC1D;
+ UINT8 RMC;
+
+ UINT8 ClttConfig;
+ UINT8 Altitude;
+ UINT8 Tcrit;
+ UINT8 Thigh;
+ UINT16 BwLimitTf;
+ UINT8 WarmThreshold;
+ UINT8 BwLimitWarm;
+ UINT8 HotThreshold;
+ UINT8 BwLimitHot;
+ UINT8 DoubleRefreshControl;
+
+ UINT8 ReadVref;
+ UINT8 InternalReadVref;
+
+ UINT16 NBDxeSubSystemVendorId;
+ UINT16 NBDxeSubSystemId;
+
+ UINT8 IgdBootType;
+ UINT8 DisplayPipeB;
+ UINT8 LcdPanelType;
+ UINT8 SdvoPanelType;
+ UINT8 LcdPanelScaling;
+ UINT8 IGfxForceDisable;
+
+ UINT8 RenderStandby;
+ UINT8 DeepRenderStandby;
+
+ // GT related
+ UINT8 GtOcSupport;
+ INT16 GtVoltageOffset;
+ UINT16 GtVoltageOverride;
+ UINT16 GtExtraTurboVoltage;
+ UINT16 GtMaxOcTurboRatio;
+ INT16 SaVoltageOffset;
+ UINT8 GtVoltageMode;
+ INT16 IoaVoltageOffset;
+ INT16 IodVoltageOffset;
+
+ // LCD
+ UINT8 IgdLcdBlc;
+ UINT8 IgdLcdIBia;
+ UINT8 IgdLcdSSCC;
+ UINT8 IgdTV1Standard;
+ UINT8 IgdTV2Standard;
+ UINT8 AlsEnable;
+ UINT8 LowPowerMode;
+ UINT8 ActiveLFP;
+ UINT8 LfpColorDepth;
+ UINT8 GTTSize;
+ UINT8 ApertureSize;
+ UINT8 PanelPowerEnable;
+
+ // PEG
+ UINT8 PegAspm[3];
+ UINT8 PegAspmL0s[3];
+ UINT8 PegDeEmphasis[3];
+ UINT8 AlwaysEnablePeg;
+ UINT8 PegSamplerCalibrate;
+ UINT8 SwingControl;
+ UINT8 PegComplianceTestingMode;
+ UINT8 PegGen3Equalization;
+ UINT8 PegGen3EqualizationPhase2;
+ UINT8 PegGen3PresetSearch;
+ UINT8 PegGen3ForcePresetSearch;
+ UINT16 PegGen3PresetSearchDwellTime;
+ UINT8 PegGen3PresetSearchMarginSteps;
+ UINT8 PegGen3PresetSearchStartMargin;
+ UINT8 PegGen3PresetSearchVoltageMarginSteps;
+ UINT8 PegGen3PresetSearchVoltageStartMargin;
+ UINT8 PegGen3PresetSearchFavorTiming;
+ UINT16 PegGen3PresetSearchErrorTarget;
+ UINT8 RxCEMLoopback;
+ UINT8 RxCEMLoopbackLane;
+ UINT8 Gen3RootPortPreset[16];
+ UINT8 Gen3EndPointPreset[16];
+ UINT8 Gen3EndPointHint[16];
+ UINT8 Gen3RxCtleP[8];
+ UINT8 InitPcieAspmAfterOprom;
+ UINT8 AllowPerstGpioUsage;
+ UINT8 AllowPerstGpio;
+ UINT8 AllowPerstGpioActive;
+ UINT8 LtrEnable[3];
+ UINT16 LtrMaxSnoopLatency[3];
+ UINT16 LtrMaxNoSnoopLatency[3];
+ UINT8 ObffEnable[3];
+ UINT8 PowerDownUnusedBundles[3];
+ UINT8 C7Allowed;
+ // DVMT5.0 Graphic memory setting
+ UINT8 IgdDvmt50PreAlloc;
+ UINT8 IgdDvmt50TotalAlloc;
+
+ // SA Device Control
+ UINT8 SaDevice7;
+ UINT8 SaDevice4;
+ UINT8 SaAudioEnable; // Device3
+// UINT8 SaHdmiCodecPortB;
+// UINT8 SaHdmiCodecPortC;
+// UINT8 SaHdmiCodecPortD;
+ UINT8 NbSaHdaVerbTableNum;
+ NB_SA_HDA_VERB_TABLE *NbSaHdaVerbTable;
+ // VTD
+ UINT8 EnableVtd;
+ //SSVID WorkAround
+ UINT8 EnableNbCrid;
+ UINT8 BdatAcpiTableSupport;
+ // DMI
+ UINT8 DmiVc1;
+ UINT8 DmiVcp;
+ UINT8 DmiVcm;
+ UINT8 DmiGen2;
+ UINT8 DmiDeEmphasis;
+ UINT8 DmiIot;
+ // ASPM
+ UINT8 NBDmiAspm;
+ UINT8 NBDmiExtSync;
+ UINT8 PrimaryDisplay;
+ UINT8 DetectNonComplaint;
+ UINT8 PrimaryPeg;
+ UINT8 PrimaryPcie;
+ UINT8 IGpuPortConfig;
+ UINT8 InternalGraphics;
+ // Graphics Turbo IMON Current
+ UINT8 GfxTurboIMON;
+ // Digital port mode select
+ UINT8 DigitalPortBMode;
+ UINT8 DigitalPortCMode;
+ UINT8 DigitalPortDMode;
+ // MRC
+ UINT8 EccSupport;
+ UINT8 MrcFastBoot;
+ UINT8 ForceColdReset;
+ UINT8 RemapEnable;
+ UINT8 DisableDimmChannel0;
+ UINT8 DisableDimmChannel1;
+ UINT8 CAVrefCtlOffset; ///< REVISION_11 - CA Vref Control Offset
+ UINT8 Ch0VrefCtlOffset; ///< REVISION_11 - Channel 0 DQ Vref Control Offset
+ UINT8 Ch1VrefCtlOffset; ///< REVISION_11 - Channel 1 DQ Vref Control Offset
+ UINT8 Ch0ClkPiCodeOffset; ///< REVISION_11 - Channel 0 Clk Pi Code Offset
+ UINT8 Ch1ClkPiCodeOffset; ///< REVISION_11 - Channel 1 Clk Pi Code Offset
+ UINT8 Ch0RcvEnOffset; ///< REVISION_11 - Channel 0 Receive Enable Offset
+ UINT8 Ch0RxDqsOffset; ///< REVISION_11 - Channel 0 Read DQS Offset
+ UINT8 Ch0TxDqOffset; ///< REVISION_11 - Channel 0 Write DQ Offset
+ UINT8 Ch0TxDqsOffset; ///< REVISION_11 - Channel 0 Write DQS Offset
+ UINT8 Ch0VrefOffset; ///< REVISION_11 - Channel 0 Vref Offset
+ UINT8 Ch1RcvEnOffset; ///< REVISION_11 - Channel 1 Receive Enable Offset
+ UINT8 Ch1RxDqsOffset; ///< REVISION_11 - Channel 1 Read DQS Offset
+ UINT8 Ch1TxDqOffset; ///< REVISION_11 - Channel 1 Write DQ Offset
+ UINT8 Ch1TxDqsOffset; ///< REVISION_11 - Channel 1 Write DQS Offset
+ UINT8 Ch1VrefOffset; ///< REVISION_11 - Channel 1 Vref Offset
+ BOOLEAN AutoSelfRefreshSupport;///< REVISION_11 - FALSE = No auto self refresh support, TRUE = auto self refresh support.
+ BOOLEAN ExtTemperatureSupport; ///< REVISION_11 - FALSE = No extended temperature support, TRUE = extended temperature support.
+ UINT8 MaxRttWr; ///< REVISION_11 - Maximum DIMM RTT_WR to use in power training 0 = Off, 1 = 120 ohms
+ UINT32 BClkFrequency;
+ UINT8 MaxTolud;
+ UINT8 DdrFreqLimit;
+ UINT16 OcDdrFreqLimit;
+ UINT8 DDRLVOption;
+ UINT32 DDRVoltageWaitTime;
+ UINT8 SpdProfileSelected;
+ UINT8 NModeSupport;
+ UINT8 ScramblerSupport;
+ UINT8 RmtCrosserEnable;
+ UINT8 ExitMode;
+ UINT8 PowerDownMode0;
+ UINT8 PowerDownMode1;
+ UINT8 PwdwnIdleCounter;
+ UINT8 WeaklockEn;
+ UINT8 McLock;
+ UINT8 EnhancedInterleave;
+ UINT8 RankInterleave;
+ UINT8 PegGenx0;
+ UINT8 PegGenx1;
+ UINT8 PegGenx2;
+
+ UINT8 MemoryThermalManagement;
+ UINT8 ThermalThresholdWarm;
+ UINT8 ThermalThresholdHot;
+ UINT8 ThermalThresholdCritical;
+ UINT8 PeciInjectedTemp;
+ UINT8 ExttsViaTsOnBoard;
+ UINT8 ExttsViaTsOnDimm;
+ UINT8 VirtualTempSensor;
+// UINT8 RefreshRate2x;
+ UINT8 ChHashEnable;
+ UINT16 ChHashMask;
+ UINT8 ChHashInterleaveBit;
+ BOOLEAN DqPinsInterleaved;
+ //
+ // Thermal Options
+ //
+ UINT8 EnableExtts; ///< REVISION_10
+ UINT8 EnableCltm; ///< REVISION_10
+ UINT8 EnableOltm; ///< REVISION_10
+ UINT8 EnablePwrDn; ///< REVISION_10
+ UINT8 Refresh2X; ///< REVISION_10
+ UINT8 Refresh2XMode; ///< REVISION_10
+ UINT8 LpddrThermalSensor; ///< REVISION_10
+ UINT8 LockPTMregs; ///< REVISION_10
+ UINT8 UserPowerWeightsEn; ///< REVISION_10
+ UINT8 EnergyScaleFact; ///< REVISION_10
+ UINT8 RaplPwrFlCh1; ///< REVISION_10
+ UINT8 RaplPwrFlCh0; ///< REVISION_10
+ UINT8 RaplLim2Lock; ///< REVISION_10
+ UINT8 RaplLim2WindX; ///< REVISION_10
+ UINT8 RaplLim2WindY; ///< REVISION_10
+ UINT8 RaplLim2Ena; ///< REVISION_10
+ UINT16 RaplLim2Pwr; ///< REVISION_10
+ UINT8 RaplLim1WindX; ///< REVISION_10
+ UINT8 RaplLim1WindY; ///< REVISION_10
+ UINT8 RaplLim1Ena; ///< REVISION_10
+ UINT16 RaplLim1Pwr; ///< REVISION_10
+ UINT8 WarmThresholdCh0Dimm0; ///< REVISION_10
+ UINT8 WarmThresholdCh0Dimm1; ///< REVISION_10
+ UINT8 WarmThresholdCh1Dimm0; ///< REVISION_10
+ UINT8 WarmThresholdCh1Dimm1; ///< REVISION_10
+ UINT8 HotThresholdCh0Dimm0; ///< REVISION_10
+ UINT8 HotThresholdCh0Dimm1; ///< REVISION_10
+ UINT8 HotThresholdCh1Dimm0; ///< REVISION_10
+ UINT8 HotThresholdCh1Dimm1; ///< REVISION_10
+ UINT8 WarmBudgetCh0Dimm0; ///< REVISION_10
+ UINT8 WarmBudgetCh0Dimm1; ///< REVISION_10
+ UINT8 WarmBudgetCh1Dimm0; ///< REVISION_10
+ UINT8 WarmBudgetCh1Dimm1; ///< REVISION_10
+ UINT8 HotBudgetCh0Dimm0; ///< REVISION_10
+ UINT8 HotBudgetCh0Dimm1; ///< REVISION_10
+ UINT8 HotBudgetCh1Dimm0; ///< REVISION_10
+ UINT8 HotBudgetCh1Dimm1; ///< REVISION_10
+ UINT8 IdleEnergyCh0Dimm1; ///< REVISION_10
+ UINT8 IdleEnergyCh0Dimm0; ///< REVISION_10
+ UINT8 PdEnergyCh0Dimm1; ///< REVISION_10
+ UINT8 PdEnergyCh0Dimm0; ///< REVISION_10
+ UINT8 ActEnergyCh0Dimm1; ///< REVISION_10
+ UINT8 ActEnergyCh0Dimm0; ///< REVISION_10
+ UINT8 RdEnergyCh0Dimm1; ///< REVISION_10
+ UINT8 RdEnergyCh0Dimm0; ///< REVISION_10
+ UINT8 WrEnergyCh0Dimm1; ///< REVISION_10
+ UINT8 WrEnergyCh0Dimm0; ///< REVISION_10
+ UINT8 IdleEnergyCh1Dimm1; ///< REVISION_10
+ UINT8 IdleEnergyCh1Dimm0; ///< REVISION_10
+ UINT8 PdEnergyCh1Dimm1; ///< REVISION_10
+ UINT8 PdEnergyCh1Dimm0; ///< REVISION_10
+ UINT8 ActEnergyCh1Dimm1; ///< REVISION_10
+ UINT8 ActEnergyCh1Dimm0; ///< REVISION_10
+ UINT8 RdEnergyCh1Dimm1; ///< REVISION_10
+ UINT8 RdEnergyCh1Dimm0; ///< REVISION_10
+ UINT8 WrEnergyCh1Dimm1; ///< REVISION_10
+ UINT8 WrEnergyCh1Dimm0; ///< REVISION_10
+ UINT8 SrefCfgEna; ///< REVISION_10
+ UINT16 SrefCfgIdleTmr; ///< REVISION_10
+ UINT8 ThrtCkeMinDefeat; ///< REVISION_10
+ UINT8 ThrtCkeMinTmr; ///< REVISION_10
+ UINT8 ThrtCkeMinDefeatLpddr; ///< REVISION_10
+ UINT8 ThrtCkeMinTmrLpddr; ///< REVISION_10
+ UINT8 EnablePwrDnLpddr; ///< REVISION_10 - Enable Power Down for LPDDR
+ UINT8 IsRunMemoryDown;
+ UINT16 tCL;
+ UINT16 tRCD;
+ UINT16 tRP;
+ UINT16 tRAS;
+ UINT16 tWR;
+ UINT16 tRFC;
+ UINT16 tRRD;
+ UINT16 tWTR;
+ UINT16 tRTP;
+ UINT16 tRC;
+ UINT16 tFAW;
+ UINT16 tCWL; // (P20121012A)
+ UINT16 tREFI; // (P20121012A)
+ UINT16 tRPab;
+ UINT8 SmbiosLogging; // SmbiosLogging Setup
+ UINT8 AcpiLowPowerS0Idle; //ULT PlatformConfig
+} NB_SETUP_DATA;
+
+#pragma pack(pop)
+
+VOID GetNbSetupData (
+ IN VOID *Service,
+ IN OUT NB_SETUP_DATA *NbSetupData,
+ IN BOOLEAN Pei
+);
+
+/****** DO NOT WRITE BELOW THIS LINE *******/
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+//*************************************************************************
+//*************************************************************************
+//** **
+//** (C)Copyright 1985-2011, American Megatrends, Inc. **
+//** **
+//** All Rights Reserved. **
+//** **
+//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+//** **
+//** Phone: (770)-246-8600 **
+//** **
+//*************************************************************************
+//*************************************************************************
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