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author | raywu <raywu@aaeon.com> | 2018-06-22 15:44:55 +0800 |
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committer | raywu <raywu@aaeon.com> | 2018-06-22 15:44:55 +0800 |
commit | 05fd109bd0dc96590eeb5bd1fc011b2063275cd6 (patch) | |
tree | a2230467e86084974f1b6629aa9b1beb37d87fad /CRB/CSP.sdl | |
parent | b427fb4c14cd43429ce961846e10c5748066c1f3 (diff) | |
download | zprj-05fd109bd0dc96590eeb5bd1fc011b2063275cd6.tar.xz |
Adjust ELINK / "PCIEClockConfig"
Name = "{ CLOCK_SRC0, PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_1, 0 },"
Name = "{ CLOCK_SRC1, PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_2, 0 },"
Name = "{ CLOCK_SRC2, PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_3, 0 },"
Diffstat (limited to 'CRB/CSP.sdl')
-rw-r--r-- | CRB/CSP.sdl | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/CRB/CSP.sdl b/CRB/CSP.sdl index fb91811..6d4d436 100644 --- a/CRB/CSP.sdl +++ b/CRB/CSP.sdl @@ -1424,3 +1424,22 @@ TOKEN TargetH = Yes # Master = Yes End + +ELINK + Name = "{ CLOCK_SRC0, PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_1, 0 }," + Parent = "PCIEClockConfig" + InvokeOrder = AfterParent + Help = "Intel Flathead Creek, PCIE Slot#6(J13BU)" +End +ELINK + Name = "{ CLOCK_SRC1, PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_2, 0 }," + Parent = "PCIEClockConfig" + InvokeOrder = AfterParent + Help = "Intel Flathead Creek, PCIE Slot#6(J13BU)" +End +ELINK + Name = "{ CLOCK_SRC2, PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_3, 0 }," + Parent = "PCIEClockConfig" + InvokeOrder = AfterParent + Help = "Intel Flathead Creek, PCIE Slot#6(J13BU)" +End |