summaryrefslogtreecommitdiff
path: root/Chipset
diff options
context:
space:
mode:
authorraywu <raywu@aaeon.com>2018-07-03 17:11:32 +0800
committerraywu <raywu@aaeon.com>2018-07-03 17:11:32 +0800
commitb2f42f4aa16c4adb94fcd02df7192d1263045e61 (patch)
tree974e7513a578f681a6ab1d96976114c9d898a386 /Chipset
parent0150586c99f84f55066660441305716109ed5fd9 (diff)
downloadzprj-b2f42f4aa16c4adb94fcd02df7192d1263045e61.tar.xz
SATA Mode set to Legacy IDE as default / Reserve IRQ14/15 for Legacy IDE Mode
Diffstat (limited to 'Chipset')
-rw-r--r--Chipset/SB/SBDxe.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/Chipset/SB/SBDxe.c b/Chipset/SB/SBDxe.c
index 91f2cfb..b5fca98 100644
--- a/Chipset/SB/SBDxe.c
+++ b/Chipset/SB/SBDxe.c
@@ -6341,7 +6341,7 @@ InstallDxePchPlatformPolicy (VOID)
mPchPolicyData.SataConfig->OromUiDelay = gSbSetupData->OromUiDelay;
mPchPolicyData.SataConfig->TestMode = gSbSetupData->SataTestMode;
mPchPolicyData.SataConfig->SalpSupport = gSbSetupData->SalpSupport;
- mPchPolicyData.SataConfig->LegacyMode = PCH_DEVICE_DISABLE;
+ mPchPolicyData.SataConfig->LegacyMode = 1;//PCH_DEVICE_DISABLE;
mPchPolicyData.SataConfig->SpeedSupport = gSbSetupData->SataControllerSpeed;
// AzaliaConfig