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authorraywu <raywu0301@gmail.com>2018-06-15 00:00:50 +0800
committerraywu <raywu0301@gmail.com>2018-06-15 00:00:50 +0800
commitb7c51c9cf4864df6aabb99a1ae843becd577237c (patch)
treeeebe9b0d0ca03062955223097e57da84dd618b9a /EDK/Foundation/Library/EfiCommonLib/Ia32/RShiftU64.asm
downloadzprj-b7c51c9cf4864df6aabb99a1ae843becd577237c.tar.xz
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+ TITLE RShiftU64.asm: 64-bit right shift function for IA-32
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2004, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit right shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686P
+ .XMM
+ .MODEL SMALL
+ .CODE
+
+RShiftU64 PROTO C Operand: QWORD, Count: DWORD
+
+RShiftU64 PROC C Operand: QWORD, Count: DWORD
+
+;------------------------------------------------------------------------------
+; UINT64
+; RShiftU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; )
+;
+; Routine Description:
+;
+; This routine allows a 64 bit value to be right shifted by 32 bits and returns the
+; shifted value.
+; Count is valid up 63. (Only Bits 0-5 is valid for Count)
+;
+; Arguments:
+;
+; Operand - Value to be shifted
+; Count - Number of times to shift right.
+;
+; Returns:
+;
+; Value shifted right identified by the Count.
+;------------------------------------------------------------------------------
+
+ push ecx
+
+ mov eax, dword ptr Operand[0]
+ mov edx, dword ptr Operand[4]
+
+ ;
+ ; CL is valid from 0 - 31. shld will move EDX:EAX by CL times but EDX is not touched
+ ; For CL of 32 - 63, it will be shifted 0 - 31 so we will move edx to eax later.
+ ;
+ mov ecx, Count
+ and ecx, 63
+ shrd eax, edx, cl
+ shr edx, cl
+
+ cmp ecx, 32
+ jc short _RShiftU64_Done
+
+ ;
+ ; Since Count is 32 - 63, edx will have been shifted by 0 - 31
+ ; If shifted by 32 or more, set upper 32 bits to zero.
+ ;
+ mov eax, edx
+ xor edx, edx
+
+_RShiftU64_Done:
+ pop ecx
+ ret
+
+RShiftU64 ENDP
+
+END