diff options
Diffstat (limited to 'Board/IO/F81216/BSP')
| -rw-r--r-- | Board/IO/F81216/BSP/BSP.cif | 10 | ||||
| -rw-r--r-- | Board/IO/F81216/BSP/DxeIoTable.h | 122 | ||||
| -rw-r--r-- | Board/IO/F81216/BSP/OemIoDecode.c | 186 | ||||
| -rw-r--r-- | Board/IO/F81216/BSP/PeiIoTable.h | 219 |
4 files changed, 537 insertions, 0 deletions
diff --git a/Board/IO/F81216/BSP/BSP.cif b/Board/IO/F81216/BSP/BSP.cif new file mode 100644 index 0000000..b21d947 --- /dev/null +++ b/Board/IO/F81216/BSP/BSP.cif @@ -0,0 +1,10 @@ +<component> + name = "F81216 Board" + category = ModulePart + LocalRoot = "Board\IO\F81216\BSP\" + RefName = "F81216Board" +[files] +"OemIoDecode.c" +"PeiIoTable.h" +"DxeIoTable.h" +<endComponent> diff --git a/Board/IO/F81216/BSP/DxeIoTable.h b/Board/IO/F81216/BSP/DxeIoTable.h new file mode 100644 index 0000000..abc4c8b --- /dev/null +++ b/Board/IO/F81216/BSP/DxeIoTable.h @@ -0,0 +1,122 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/DxeIoTable.h 2 7/04/11 3:23a Kasalinyi $ +// +// $Revision: 2 $ +// +// $Date: 7/04/11 3:23a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/DxeIoTable.h $ +// +// 2 7/04/11 3:23a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] OemIoDecode.c +// PeiIoTable.h +// DxeIoTable.h +// BSP.cif +// +// 1 3/31/10 5:56a Fantasylai +// Initial release to F81216 just as a second IO + +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: DxeIoTable.H +// +// Description: +// SIO init table in DXE phase. Any customers have to review below tables +// for themselves platform and make sure each initialization is necessary. +// +// Notes: +// In all tables, only fill with necessary setting. Don't fill with default +// +//<AMI_FHDR_END> +//************************************************************************* +#ifndef _DXEIoTable_H +#define _DXEIoTable_H +#ifdef __cplusplus +extern "C" { +#endif +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- +typedef struct _DXE_DEVICE_INIT_DATA{ + UINT16 Reg16; + UINT8 AndData8; // 0xFF means register don't need AndMask + // only write OrData8 to regisrer. + UINT8 OrData8; +} DXE_DEVICE_INIT_DATA; + +// SIO DECODE list creation code must be in this order +typedef EFI_STATUS (IO_RANGE_DECODE)( +// IN void *LpcPciIo, + IN EFI_PCI_IO_PROTOCOL *LpcPciIo, + IN UINT16 DevBase, + IN UINT8 UID, + IN SIO_DEV_TYPE Type +); + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: DXE_XXX_Init_Table +// +// Description: +// Table filled with SIO GPIO,PME,HWM, etc. logical devices' setting +// For example: +// 1. GPIO will define the GPIO pin useage +// 2. PME will power management control +// 3. HWM will set temperature, fan, voltage and start control. +// +// Notes: +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> + + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif //_DXEIoTable_H +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + + + + diff --git a/Board/IO/F81216/BSP/OemIoDecode.c b/Board/IO/F81216/BSP/OemIoDecode.c new file mode 100644 index 0000000..25e008e --- /dev/null +++ b/Board/IO/F81216/BSP/OemIoDecode.c @@ -0,0 +1,186 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2009, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/OemIoDecode.c 1 3/31/10 5:56a Fantasylai $ +// +// $Revision: 1 $ +// +// $Date: 3/31/10 5:56a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/OemIoDecode.c $ +// +// 1 3/31/10 5:56a Fantasylai +// Initial release to F81216 just as a second IO +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <OemIoDecode.C> +// +// Description: If can't decode IO usually. Change other IoDecode mode in file. +// +// Note: +// !!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!! +// This sample is not for any chipset, it bases on a chipset. For any indivadual +// projects, should re-program the IO decode policy. +// !!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!! +// +//<AMI_FHDR_END> +//************************************************************************* +#include <Efi.h> +#include <Token.h> +#include <Protocol\PciIo.h> +#include <Protocol\AmiSio.h> + +#if(IODECODETYPE) +//<AMI_PHDR_START> +//---------------------------------------------------------------------- +// Procedure: OEM_F81216_LPCDeviceDecoding +// +// Description: This function goes through the elinked list of identify +// functions giving control when the token "IODECODETYPE == 1". +// +// Input: Base - I/O base address, Base=0 means disable the decode of the device +// DevUid - The device Unique ID +// If type is 0xFF, DevUid contain the IO length +// +// Output: EFI_STATUS +// EFI_SUCCESS - Set successfully. +// EFI_INVALID_PARAMETER - the Input parameter is invalid. +// +// Note: +// Input paramete is a multi-paramete. If type is 0xFF, DevUid contain the IO length +// +//---------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS OEM_F81216_LPCDeviceDecoding( + IN EFI_PCI_IO_PROTOCOL *LpcPciIo, + IN UINT16 Base, + IN UINT8 DevUid +) +{//Chipset porting should provide the Io Ranage decode function. + //If chipset porting provide this function, set IODECODETYPE = 0. + //If chipset porting doesn't provide this function, you can use a eLink to replace OEM_F81216_LPCDeviceDecoding() + //In file of IoDecodeSample.c, there is a example code to decode IO Range. You can eLink your code with CORE_DXEBin object. + //------------------------------------- + EFI_STATUS Status=EFI_SUCCESS; + +/* + EFI_STATUS Status; + ICH_LPC_IO_DECODE_REG dr; //IchDecode Register + BOOLEAN a; +//--------------------------------------------------------- + //Read what currently have there... + Status = LpcPciIo->Pci.Read(LpcPciIo, EfiPciIoWidthUint16, + ICH_LPC_IO_DECODE_OFFSET, 1, &dr.IO_DECODE_REG); + if (EFI_ERROR(Status)) return Status; + a = TRUE; + //Check all possible BAse Addresses + switch(Base){ + //LPT Address range + case 0x378 : + dr.LptDecode = 0; + break; + case 0x278 : + dr.LptDecode=1; + break; + case 0x3bc : + dr.LptDecode=2; + break; + //FDC Address range + case 0x3f0 : + dr.FdcDecode = 0; + break; + case 0x370 : + dr.FdcDecode = 1; + break; + //COM Port Address range + case 0x3f8 : + if (DevUid) + dr.ComBDecode=0; + else + dr.ComADecode=0; + break; + case 0x2f8 : + if (DevUid) + dr.ComBDecode=1; + else + dr.ComADecode=1; + break; + case 0x220 : + if (DevUid) + dr.ComBDecode=2; + else + dr.ComADecode=2; + break; + case 0x228 : + if (DevUid) + dr.ComBDecode=3; + else + dr.ComADecode=3; + break; + case 0x238 : + if (DevUid) + dr.ComBDecode=4; + else + dr.ComADecode=4; + break; + + case 0x2E8 : + if (DevUid) + dr.ComBDecode=5; + else + dr.ComADecode=5; + break; + case 0x338 : + if (DevUid) + dr.ComBDecode=6; + else + dr.ComADecode=6; + break; + case 0x3e8 : + if (DevUid) + dr.ComBDecode=7; + else + dr.ComADecode=7; + break; + + default : + a = FALSE; + } + //Use Provided LPC Bridge PCI IO to write data back + if (a) Status=LpcPciIo->Pci.Write(LpcPciIo, EfiPciIoWidthUint16, + ICH_LPC_IO_DECODE_OFFSET, 1, &dr.IO_DECODE_REG); +*/ + + return Status; +} +#endif + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2009, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//*************************************************************************
\ No newline at end of file diff --git a/Board/IO/F81216/BSP/PeiIoTable.h b/Board/IO/F81216/BSP/PeiIoTable.h new file mode 100644 index 0000000..6ff6e85 --- /dev/null +++ b/Board/IO/F81216/BSP/PeiIoTable.h @@ -0,0 +1,219 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/PeiIoTable.h 4 1/19/12 3:07a Elviscai $ +// +// $Revision: 4 $ +// +// $Date: 1/19/12 3:07a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/PeiIoTable.h $ +// +// 4 1/19/12 3:07a Elviscai +// [TAG] EIPNONE +// [Category] Bug Fix +// [Severity] Important +// [Symptom] Base 0x200 generic IO decode fail +// [RootCause] 1ST IO OemIoDecode will take 0x200 as GamePort +// [Solution] Change Com port IoDecodeBase from 0x200 to 0x240. +// +// 3 7/04/11 3:23a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] OemIoDecode.c +// PeiIoTable.h +// DxeIoTable.h +// BSP.cif +// +// 2 10/28/10 2:34a Mikes +// Change configure key with a token +// +// 1 3/31/10 5:56a Fantasylai +// Initial release to F81216 just as a second IO + +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: PeiIoTable.H +// +// Description: +// SIO init table in PEI phase. Any customers have to review below tables +// for themselves platform and make sure each initialization is necessary. +// +// Notes: +// +//<AMI_FHDR_END> +//************************************************************************* +#ifndef _PEIIoTable_H +#define _PEIIoTable_H +#ifdef __cplusplus +extern "C" { +#endif + +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- +typedef struct _IO_DECODE_DATA{ + UINT16 BaseAdd; + //!!!Attention!!!If type is 0xFF, UID is a IO legth + UINT8 UID; + SIO_DEV_TYPE Type; +} IO_DECODE_DATA; + +typedef struct _SIO_DATA{ + UINT16 Addr; + //AND mask value, 0xFF means register don't need AndMask and + //only write OrData8 to regisrer. + UINT8 DataMask; + //OR mask value. + UINT8 DataValue; +} SIO_DATA; + +// SIO DECODE list creation code must be in this order +typedef EFI_STATUS (IO_RANGE_DECODE)( + IN void *LpcPciIo, + IN UINT16 DevBase, + IN UINT8 UID, + IN SIO_DEV_TYPE Type +); + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: F81216SEC_Decode_Table +// +// Description: +// Table filled with SIO IO resource to decode. It is used +// for PEI IO Decode function. For example: +// 1. Decode Index/data port +// 2. Decode KBC,FDC IO for recovery +// 3. Decode COM port for debug +// 4. Decode total IO base for runtime, pme, acpi, etc... +// 5. Decode more com ports wirh "generic IO range decode" +// +// Notes: +// Attention! Cann't open 3F6(it was used by IDE controller.) +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> +IO_DECODE_DATA F81216SEC_Decode_Table[]={ + // ----------------------------- + //| BaseAdd | UID | Type | + // ----------------------------- + {F81216SEC_CONFIG_INDEX, 2, 0xFF}, + + // !!!!Attention!!!!This is necessary + //OEM_TODO//OEM_TODO//OEM_TODO//OEM_TODO + {0x240, 0x40, 0xFF}, // 0x200~0x27f , open a IODecode section for UART1,2,3,4 + // Add more OEM IO decode below. +}; + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: F81216SEC_PEI_Init_Table +// +// Description: Table filled with SIO logical devices' register value. +// Only do the necessary initialization. For example: +// 1. Program clock and multi-pin setting in global registers +// 2. Program KBC,FDC IO for recovery +// 3. Program COM port for debug +// +// Notes: +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> +SIO_DATA F81216SEC_PEI_Init_Table[] = { + // ----------------------------- + //| Addr | DataMask | DataValue | + // ----------------------------- + + //--------------------------------------------------------------------- + // Enter Configuration Mode. + //--------------------------------------------------------------------- + //AMI_TODO: + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_CONFIG_MODE_ENTER_VALUE}, + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_CONFIG_MODE_ENTER_VALUE}, + //--------------------------------------------------------------------- + // Before init all logical devices, program Global register if needed. + //--------------------------------------------------------------------- + // Program clock setting in global registers + // Bit0: 0/1 for CLKIN is 48Mhz/24MHz . + {F81216SEC_CONFIG_INDEX, 0xFF, 0x25}, + {F81216SEC_CONFIG_DATA, 0xFE, 0x00 | F81216SEC_CLOCK}, + + //--------------------------------------------------------------------- + // Initialize the Serial Port for debug useage. Default is COMA + //--------------------------------------------------------------------- + //if first io have no comport debug,open it +/* + #if defined(EFI_DEBUG) || (defined(Recovery_SUPPORT) && (SERIAL_RECOVERY_SUPPORT)) + #if (F81216SEC_SERIAL_PORT0_PRESENT) + // Select device + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_LDN_SEL_REGISTER}, + {F81216SEC_CONFIG_DATA, 0xFF, F81216SEC_LDN_UART0}, + // Program Base Addr + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_BASE1_LO_REGISTER}, + {F81216SEC_CONFIG_DATA, 0xFF ,0x60}, + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_BASE1_HI_REGISTER}, + {F81216SEC_CONFIG_DATA, 0xFF, 0x02}, + // Activate Device + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_ACTIVATE_REGISTER}, + {F81216SEC_CONFIG_DATA, 0xFF, F81216SEC_ACTIVATE_VALUE}, + #endif // F81216SEC_SERIAL_PORT1_PRESENT + #endif // #ifdef EFI_DEBUG +*/ + //--------------------------------------------------------------------- + // Disable non-used devices + //--------------------------------------------------------------------- + +//-------------------------------------------------------------------------- +// After init all logical devices, program Global register if needed. +//-------------------------------------------------------------------------- +//-------------------------------------------------------------------------- +// After init all logical devices, Exit Configuration Mode. +//-------------------------------------------------------------------------- + {F81216SEC_CONFIG_INDEX, 0xFF, 0xAA}, + +}; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif //_PEIIoTable_H +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* |