diff options
Diffstat (limited to 'Chipset/SB/PchWrap')
38 files changed, 3188 insertions, 0 deletions
diff --git a/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.c b/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.c new file mode 100644 index 0000000..237366a --- /dev/null +++ b/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.c @@ -0,0 +1,174 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PchSpiWrap/PchSpiWrap.c 2 11/17/14 7:31a Mirayang $ +// +// $Revision: 2 $ +// +// $Date: 11/17/14 7:31a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PchSpiWrap/PchSpiWrap.c $ +// +// 2 11/17/14 7:31a Mirayang +// [TAG] EIP191661 +// [Category] Improvement +// [Description] SUT can't generate UEFI SCT2.3.1 report completely. +// +// 1 2/08/12 8:33a Yurenlai +// Intel Lynx Point/SB eChipset initially releases. +// +//************************************************************************* +//---------------------------------------------------------------------- +// Includes +#include <AmiDxeLib.h> +#include <Protocol\LoadPe32Image.h> +#include "token.h" + + +static EFI_GUID gDxeSvcTblGuid = DXE_SERVICES_TABLE_GUID; +EFI_GUID gPchSpiRuntimeFFsGuid = \ + {0xC194C6EA,0xB68C,0x4981,0xB6,0x4B,0x9B,0xD2,0x71,0x47,0x4B,0x20}; + +EFI_STATUS +FFsLoaderToRuntime( + IN EFI_HANDLE ImageHandle +); + +//<AMI_PHDR_START> +//---------------------------------------------------------------------------- +// +// Procedure: PchSpiWrapEntry +// +// Description: This function load PchSpi and execute it. +// +// Input: ImageHandle Image handle of this driver. +// SystemTable Global system service table. +// +// Output: EFI_SUCCESS Load and execute complete. +// EFI_UNSUPPORTED Image type is unsupported by this driver. +// EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver. +// +//---------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS +PchSpiWrapEntry( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + InitAmiLib(ImageHandle, SystemTable); + + Status = FFsLoaderToRuntime( ImageHandle); + ASSERT_EFI_ERROR (Status); + + return Status; +} + + +//<AMI_PHDR_START> +//---------------------------------------------------------------------------- +// +// Procedure: FFsLoaderToRuntime +// +// Description: Load FFs to Runtime. +// +// Input: ImageHandle Image handle of this driver. +// +// Output: EFI_SUCCESS FFs Load to Runtime complete. +// +//---------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS +FFsLoaderToRuntime( + IN EFI_HANDLE ImageHandle +){ + EFI_STATUS Status; + EFI_PHYSICAL_ADDRESS Dst; + EFI_PHYSICAL_ADDRESS EntryPoint; + EFI_PE32_IMAGE_PROTOCOL *LoadPeImageEx; + VOID *Buffer; + UINTN BufferSize; + UINT32 AuthenticationStatus; + UINTN Pages; + EFI_HANDLE FFsImageHandle; + EFI_DEVICE_PATH_PROTOCOL EndOfDp = { 0x7F, 0xFF, 0x4 , 0x0 }; + + Buffer = 0; + + Status = FvReadPe32Image ( + &gPchSpiRuntimeFFsGuid, + &Buffer, + &BufferSize, + &AuthenticationStatus + ); + + if (EFI_ERROR (Status)) { + return Status; + } + + Pages = EFI_SIZE_TO_PAGES (BufferSize) + 2; + Status = pBS->AllocatePages ( + AllocateAnyPages, + EfiRuntimeServicesCode, + Pages, + &Dst + ); + + Status = pBS->LocateProtocol (&gEfiLoadPeImageGuid, NULL, &LoadPeImageEx); + if (EFI_ERROR (Status)) { + pBS->FreePool (&Dst); + return Status; + } + + Status = LoadPeImageEx->LoadPeImage( + LoadPeImageEx, + ImageHandle, +// NULL, + &EndOfDp, + Buffer, + BufferSize, + Dst, + &Pages, + &FFsImageHandle, + &EntryPoint, + EFI_LOAD_PE_IMAGE_ATTRIBUTE_NONE + ); + if (EFI_ERROR (Status)) { + pBS->FreePool (&Dst); + return Status; + } + + Status = pBS->StartImage(FFsImageHandle, NULL, NULL); + pBS->FreePool(Buffer); + + return Status; +} +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.cif b/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.cif new file mode 100644 index 0000000..7d6847b --- /dev/null +++ b/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.cif @@ -0,0 +1,11 @@ +<component> + name = "PchSpiWrap" + category = ModulePart + LocalRoot = "Chipset\SB\PchWrap\PchSpiWrap\" + RefName = "PchSpiWrap" +[files] +"PchSpiWrap.sdl" +"PchSpiWrap.mak" +"PchSpiWrap.c" +"PchSpiWrap.dxs" +<endComponent> diff --git a/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.dxs b/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.dxs new file mode 100644 index 0000000..432fc02 --- /dev/null +++ b/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.dxs @@ -0,0 +1,59 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PchSpiWrap/PchSpiWrap.dxs 1 2/08/12 8:33a Yurenlai $ +// +// $Revision: 1 $ +// +// $Date: 2/08/12 8:33a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PchSpiWrap/PchSpiWrap.dxs $ +// +// 1 2/08/12 8:33a Yurenlai +// Intel Lynx Point/SB eChipset initially releases. +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: PchSpiWrap.dxs +// +// Description: This file is the dependency file for the Pch Spi Wrap driver. +// +//<AMI_FHDR_END> +//************************************************************************* + +#include <Protocol\Runtime.h> +#include <Protocol\PchPlatformPolicy\PchPlatformPolicy.h> + +DEPENDENCY_START + EFI_RUNTIME_ARCH_PROTOCOL_GUID AND + DXE_PCH_PLATFORM_POLICY_PROTOCOL_GUID +DEPENDENCY_END + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.mak b/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.mak new file mode 100644 index 0000000..c22d22d --- /dev/null +++ b/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.mak @@ -0,0 +1,58 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PchSpiWrap/PchSpiWrap.mak 1 2/08/12 8:33a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 8:33a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PchSpiWrap/PchSpiWrap.mak $ +# +# 1 2/08/12 8:33a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +all : PchSpiWrap + +PchSpiWrap : $(BUILD_DIR)\PchSpiWrap.mak PchSpiWrapBin + +$(BUILD_DIR)\PchSpiWrap.mak : $(PchSpiWrap_DIR)\$(@B).cif $(PchSpiWrap_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(PchSpiWrap_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +PchSpiWrapBin : $(AMICSPLib) $(AMIDXELIB) + $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\ + /f $(BUILD_DIR)\PchSpiWrap.mak all\ + GUID=B716A6F8-F3A1-4b8e-8582-5A303F1CDD64\ + "MY_INCLUDES=$(INTEL_PCH_INCLUDES)"\ + ENTRY_POINT=PchSpiWrapEntry\ + TYPE=RT_DRIVER \ + DEPEX1=$(PchSpiWrap_DIR)\PchSpiWrap.DXS DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \ + COMPRESS=1 +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.sdl b/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.sdl new file mode 100644 index 0000000..950af3e --- /dev/null +++ b/Chipset/SB/PchWrap/PchSpiWrap/PchSpiWrap.sdl @@ -0,0 +1,75 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PchSpiWrap/PchSpiWrap.sdl 1 2/08/12 8:32a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 8:32a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PchSpiWrap/PchSpiWrap.sdl $ +# +# 1 2/08/12 8:32a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +TOKEN + Name = PchSpiWrap_SUPPORT + Value = "1" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes + Help = "Main switch to enable PchSpiWrap support in Project" +End + +MODULE + Help = "Includes PchSpiWrap.mak to Project" + File = "PchSpiWrap.mak" +End + +PATH + Name = "PchSpiWrap_DIR" +End + +TOKEN + Name = "PchSpiRuntime_GUID" + Value = "C194C6EA-B68C-4981-B64B-9BD271474B20" + Help = "GUID of AP initialization file." + TokenType = Expression + TargetMAK = Yes + TargetH = Yes +End + +ELINK + Name = "$(BUILD_DIR)\PchSpiWrap.ffs" + Parent = "FV_MAIN" + InvokeOrder = AfterParent +End +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#*************************************************************************
\ No newline at end of file diff --git a/Chipset/SB/PchWrap/PchWrap.cif b/Chipset/SB/PchWrap/PchWrap.cif new file mode 100644 index 0000000..18da186 --- /dev/null +++ b/Chipset/SB/PchWrap/PchWrap.cif @@ -0,0 +1,13 @@ +<component> + name = "PchWrap" + category = ModulePart + LocalRoot = "Chipset\SB\PchWrap\" + RefName = "PchWrap" +[files] +"PchWrap.sdl" +[parts] +"PchSpiWrap" +"WdtApp" +"PciHotPlug" +"SmBusMemoryDown" +<endComponent> diff --git a/Chipset/SB/PchWrap/PchWrap.sdl b/Chipset/SB/PchWrap/PchWrap.sdl new file mode 100644 index 0000000..ab9167e --- /dev/null +++ b/Chipset/SB/PchWrap/PchWrap.sdl @@ -0,0 +1,52 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PchWrap.sdl 1 2/08/12 8:32a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 8:32a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PchWrap.sdl $ +# +# 1 2/08/12 8:32a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +TOKEN + Name = "PchWrap_SUPPORT" + Value = "1" + Help = "Main switch to enable PchWrap support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes +End + +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.c b/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.c new file mode 100644 index 0000000..34540d7 --- /dev/null +++ b/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.c @@ -0,0 +1,544 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PciHotPlug/PciHotPlug.c 6 5/16/14 5:56p Barretlin $ +// +// $Revision: 6 $ +// +// $Date: 5/16/14 5:56p $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PciHotPlug/PciHotPlug.c $ +// +// 6 5/16/14 5:56p Barretlin +// [TAG] EIP165410 +// [Category] Improvement +// [Description] Support Thunderbolt AIC at NB PCIE slot +// [Files] PciHotplug.c +// +// 5 5/14/14 1:15p Barretlin +// [TAG] EIP165410 +// [Category] New Feature +// [Description] Support Thunderbolt AIC at NB PCIE slot +// [Files] PciHotPlug.c +// +// 4 4/24/13 5:02a Scottyang +// +// 3 9/12/12 5:15a Victortu +// [TAG] None +// [Category] Improvement +// [Description] Modify for Thunderbolt support. +// [Files] GetSetupData.c, SB.sdl, SB.sd, SB.uni, SbSetupData.h, +// PciHotPlug.c +// +// 2 5/03/12 6:30a Victortu +// [TAG] None +// [Category] Improvement +// [Description] Modify to support Thunderbolt. +// [Files] SB.sd; SB.uni; SB.sdl; SbSetupData.h; PciHotPlug.c +// +// 1 2/08/12 8:37a Yurenlai +// Intel Lynx Point/SB eChipset initially releases. +// +//************************************************************************* + +// +// Statements that include other files +// +#include "PciHotPlug.h" +#include <token.h> + +#define PCIE_NUM (11) + +// +// Instantiation of Driver private data. +// +PCIE_HOT_PLUG_DEVICE_PATH mPcieList[PCIE_NUM] = { + { + ACPI, + PCI(0x1C, 0), + END + }, // PCI Express 0 + { + ACPI, + PCI(0x1C, 1), + END + }, // PCI Express 1 + { + ACPI, + PCI(0x1C, 2), + END + }, // PCI Express 2 + { + ACPI, + PCI(0x1C, 3), + END + }, // PCI Express 3 + { + ACPI, + PCI(0x1C, 4), + END + }, // PCI Express 4 + { + ACPI, + PCI(0x1C, 5), + END + }, // PCI Express 5 + { + ACPI, + PCI(0x1C, 6), + END + }, // PCI Express 6 + { + ACPI, + PCI(0x1C, 7), + END + }, // PCI Express 7 + { + ACPI, + PCI(0x01, 0), + END + }, // NB PCI Express 0 + { + ACPI, + PCI(0x01, 1), + END + }, // NB PCI Express 1 + { + ACPI, + PCI(0x01, 2), + END + }, // NB PCI Express 2 +}; + +EFI_HPC_LOCATION mPcieLocation[PCIE_NUM] = { + { + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[0], + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[0] + }, + { + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[1], + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[1] + }, + { + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[2], + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[2] + }, + { + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[3], + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[3] + }, + { + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[4], + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[4] + }, + { + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[5], + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[5] + }, + { + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[6], + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[6] + }, + { + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[7], + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[7] + }, + { + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[8], + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[8] + }, + { + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[9], + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[9] + }, + { + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[10], + (EFI_DEVICE_PATH_PROTOCOL *) &mPcieList[10] + }, +}; + +//<AMI_PHDR_START> +//---------------------------------------------------------------------------- +// +// Procedure: PciHotPlug +// +// Description: This routine reads the PlatformType GPI on FWH and produces a protocol +// to be consumed by the chipset driver to effect those settings. +// +// Input: ImageHandle An image handle. +// SystemTable A pointer to the system table. +// +// Output: EFI_SUCCESS +// +//---------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS +PciHotPlug ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + PCI_HOT_PLUG_INSTANCE *PciHotPlug; + + + PciHotPlug = AllocatePool (sizeof (PCI_HOT_PLUG_INSTANCE)); + ASSERT (PciHotPlug != NULL); + + // + // Initialize driver private data. + // + ZeroMem (PciHotPlug, sizeof (PCI_HOT_PLUG_INSTANCE)); + + PciHotPlug->Signature = PCI_HOT_PLUG_DRIVER_PRIVATE_SIGNATURE; + PciHotPlug->HotPlugInitProtocol.GetRootHpcList = GetRootHpcList; + PciHotPlug->HotPlugInitProtocol.InitializeRootHpc = InitializeRootHpc; + PciHotPlug->HotPlugInitProtocol.GetResourcePadding = GetResourcePadding; + + Status = gBS->InstallProtocolInterface ( + &PciHotPlug->Handle, + &gEfiPciHotPlugInitProtocolGuid, + EFI_NATIVE_INTERFACE, + &PciHotPlug->HotPlugInitProtocol + ); + ASSERT_EFI_ERROR (Status); + + return EFI_SUCCESS; +} + + +//<AMI_PHDR_START> +//---------------------------------------------------------------------------- +// +// Procedure: GetRootHpcList +// +// Description: This procedure returns a list of Root Hot Plug controllers +// that require initialization during boot process +// +// Input: This The pointer to the instance of the +// EFI_PCI_HOT_PLUG_INIT protocol. +// HpcCount The number of Root HPCs returned. +// HpcList The list of Root HPCs. HpcCount defines the +// number of elements in this list. +// +// Output: EFI_SUCCESS +// +//---------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS +GetRootHpcList ( + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This, + OUT UINTN *HpcCount, + OUT EFI_HPC_LOCATION **HpcList + ) +{ + + *HpcCount = PCIE_NUM; + *HpcList = mPcieLocation; + + return EFI_SUCCESS; +} + + +//<AMI_PHDR_START> +//---------------------------------------------------------------------------- +// +// Procedure: InitializeRootHpc +// +// Description: This procedure Initializes one Root Hot Plug Controller +// This process may casue initialization of its subordinate buses +// +// Input: This The pointer to the instance of the +// EFI_PCI_HOT_PLUG_INIT protocol. +// HpcDevicePath The Device Path to the HPC that is being initialized. +// HpcPciAddress The address of the Hot Plug Controller function +// on the PCI bus. +// Event The event that should be signaled when the Hot +// Plug Controller initialization is complete. +// Set to NULL if the caller wants to wait until +// the entire initialization process is complete. +// The event must be of the type EFI_EVT_SIGNAL. +// HpcState The state of the Hot Plug Controller hardware. +// The type EFI_Hpc_STATE is defined in section 3.1. +// +// Output: EFI_SUCCESS +// +//---------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS +InitializeRootHpc ( + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This, + IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath, + IN UINT64 HpcPciAddress, + IN EFI_EVENT Event, OPTIONAL + OUT EFI_HPC_STATE *HpcState + ) +{ + if (Event) { + gBS->SignalEvent (Event); + } + + *HpcState = EFI_HPC_STATE_INITIALIZED; + + return EFI_SUCCESS; +} + + +//<AMI_PHDR_START> +//---------------------------------------------------------------------------- +// +// Procedure: GetResourcePadding +// +// Description: Returns the resource padding required by the PCI bus that is +// controlled by the specified Hot Plug Controller. +// +// Input: This The pointer to the instance of the +// EFI_PCI_HOT_PLUG_INIT protocol. +// HpcDevicePath The Device Path to the HPC that is being initialized. +// HpcPciAddress The address of the Hot Plug Controller function +// on the PCI bus. +// HpcState The state of the Hot Plug Controller hardware. +// The type EFI_Hpc_STATE is defined in section 3.1. +// Padding This is the amount of resource padding required +// by the PCI bus under the control of the specified Hpc. +// Since the caller does not know the size of this buffer, +// this buffer is allocated by the callee and freed by the +// caller. +// Attribute Describes how padding is accounted for. +// +// Output: EFI_SUCCESS +// +//---------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS +GetResourcePadding ( + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This, + IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath, + IN UINT64 HpcPciAddress, + OUT EFI_HPC_STATE *HpcState, + OUT VOID **Padding, + OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes + ) +{ + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *PaddingResource; + EFI_STATUS Status; + UINT8 FindRP; + UINT8 RsvdExtraBusNum = 0; + // (SB082311A)> + UINT16 RsvdPcieMegaMem = 0; + UINT8 RsvdPcieKiloIo = 0; + UINT16 RsvdPcieMegaPFMem = 0; + UINT8 RsvdPcieMegaMemalig = 0; + UINT8 RsvdPcieMegaPFMemalig = 0; + // <(SB082311A) + UINTN VariableSize; + SETUP_DATA SetupData; + EFI_GUID SetupGuid = SETUP_GUID; + UINT32 RPFN; //Root Port Function Number + UINT8 SwRPFN; + + PaddingResource = AllocatePool (PCIE_NUM * sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR)); + ASSERT (PaddingResource != NULL); + + *Padding = (VOID *) PaddingResource; + + RPFN = MmioRead32(SB_RCRB_BASE_ADDRESS + R_PCH_RCRB_RPFN); + DEBUG((EFI_D_INFO, "\nRCBA RPFN = %x\n", RPFN)); + // + // Check if PCIe Root Hob Controller need to reserve bus for docking downstream P2P hotplug + // + + VariableSize = sizeof(SETUP_DATA); + Status = gRT->GetVariable(L"Setup", + &SetupGuid, + NULL, + &VariableSize, + &SetupData); + + for (FindRP = 0; FindRP < PCIE_NUM; FindRP ++) { + if (HpcPciAddress == EFI_PCI_ADDRESS(0, 0x1C, FindRP, 0)) { + if (!EFI_ERROR(Status)) { + switch (FindRP){ + case 0: + SwRPFN = (UINT8)(RPFN & B_PCH_RCRB_RPFN_RP1FN); + break; + case 1: + SwRPFN = (UINT8)((RPFN & B_PCH_RCRB_RPFN_RP2FN) >> 4); + break; + case 2: + SwRPFN = (UINT8)((RPFN & B_PCH_RCRB_RPFN_RP3FN) >> 8); + break; + case 3: + SwRPFN = (UINT8)((RPFN & B_PCH_RCRB_RPFN_RP4FN) >> 12); + break; + case 4: + SwRPFN = (UINT8)((RPFN & B_PCH_RCRB_RPFN_RP5FN) >> 16); + break; + case 5: + SwRPFN = (UINT8)((RPFN & B_PCH_RCRB_RPFN_RP6FN) >> 20); + break; + case 6: + SwRPFN = (UINT8)((RPFN & B_PCH_RCRB_RPFN_RP7FN) >> 24); + break; + case 7: + SwRPFN = (UINT8)((RPFN & B_PCH_RCRB_RPFN_RP8FN) >> 28); + break; + default: + ASSERT_EFI_ERROR(EFI_DEVICE_ERROR); + } + DEBUG((EFI_D_INFO, "FindRP = %x\nSwRPFN = %x\n", FindRP, SwRPFN)); +#if (defined SB_SETUP_SUPPORT && SB_SETUP_SUPPORT) || \ + (defined OEM_SB_SETUP_SUPPORT && OEM_SB_SETUP_SUPPORT) + if (SwRPFN == FindRP) { + DEBUG((EFI_D_INFO, "PCIE Root Port#%x does not swap...\n", FindRP)); + if (SetupData.PcieRootPortHPE[FindRP]){ + RsvdExtraBusNum = SetupData.ExtraBusRsvd[FindRP]; + RsvdPcieMegaMem = SetupData.PcieMemRsvd[FindRP]; + RsvdPcieMegaPFMem = SetupData.PciePFMemRsvd[FindRP]; + RsvdPcieKiloIo = SetupData.PcieIoRsvd[FindRP]; + RsvdPcieMegaMemalig = SetupData.PcieMemRsvdalig[FindRP]; + RsvdPcieMegaPFMemalig = SetupData.PciePFMemRsvdalig[FindRP]; + } + } + else{ + DEBUG((EFI_D_INFO, "PCIE Root Port#%x is mapping to PCIE slot#%x...\n", FindRP, SwRPFN)); + if (SetupData.PcieRootPortHPE[SwRPFN]){ + RsvdExtraBusNum = SetupData.ExtraBusRsvd[SwRPFN]; + RsvdPcieMegaMem = SetupData.PcieMemRsvd[SwRPFN]; + RsvdPcieMegaPFMem = SetupData.PciePFMemRsvd[SwRPFN]; + RsvdPcieKiloIo = SetupData.PcieIoRsvd[SwRPFN]; + RsvdPcieMegaMemalig = SetupData.PcieMemRsvdalig[SwRPFN]; + RsvdPcieMegaPFMemalig = SetupData.PciePFMemRsvdalig[SwRPFN]; + } + } +#endif + } + break; + } // SB PCIE root port +#if defined Thunderbolt_SUPPORT && Thunderbolt_SUPPORT == 1 + if (HpcPciAddress == EFI_PCI_ADDRESS(0, 0x01, (FindRP - 8), 0)) { + if (!EFI_ERROR(Status)) { + DEBUG((EFI_D_INFO, "Hotplug root port is NB PCIE root port\n")); + if ((SetupData.TbtEnable != 0) && (SetupData.TbtHostLocation >= 0x20) && (SetupData.TbtHostLocation < 0x23)){ + DEBUG((EFI_D_INFO, "Update resource for NB PCIE root port\n")); + RsvdExtraBusNum = TBT_DEFAULT_EXTRA_BUS_RESERVED; + RsvdPcieMegaMem = TBT_DEFAULT_PCIE_MEM_RESERVED; + RsvdPcieMegaPFMem = TBT_DEFAULT_PCIE_PF_MEM_RESERVED; + RsvdPcieKiloIo = TBT_DEFAULT_PCIE_IO_RESERVED; + RsvdPcieMegaMemalig = 26; + RsvdPcieMegaPFMemalig = 28; + } + } + } // NB PCIE root port +#endif + } // for loop + + // + // Padding for bus + // + ZeroMem (PaddingResource, PCIE_NUM * sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR)); + *Attributes = EfiPaddingPciBus; + + PaddingResource->Desc = 0x8A; + PaddingResource->Len = 0x2B; + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS; + PaddingResource->GenFlag = 0x0; + PaddingResource->SpecificFlag = 0; + PaddingResource->AddrRangeMin = 0; + PaddingResource->AddrRangeMax = 0; + PaddingResource->AddrLen = RsvdExtraBusNum; + + // + // Padding for non-prefetchable memory + // + PaddingResource++; + PaddingResource->Desc = 0x8A; + PaddingResource->Len = 0x2B; + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM; + PaddingResource->GenFlag = 0x0; + PaddingResource->AddrSpaceGranularity = 32; + PaddingResource->SpecificFlag = 0; + // + // Pad non-prefetchable + // + PaddingResource->AddrRangeMin = 0; + PaddingResource->AddrLen = RsvdPcieMegaMem * 0x100000; + PaddingResource->AddrRangeMax = (1 << RsvdPcieMegaMemalig) - 1; // 0x3FFFFFF + + // + // Padding for prefetchable memory + // + PaddingResource++; + PaddingResource->Desc = 0x8A; + PaddingResource->Len = 0x2B; + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM; + PaddingResource->GenFlag = 0x0; + PaddingResource->AddrSpaceGranularity = 32; + PaddingResource->SpecificFlag = 06; + // + // Padding for prefetchable memory + // + PaddingResource->AddrRangeMin = 0; + PaddingResource->AddrLen = RsvdPcieMegaPFMem * 0x100000; + // + // Pad 16 MB of MEM + // + PaddingResource->AddrRangeMax = (1 << RsvdPcieMegaPFMemalig) - 1; // 0xfffffff + // + // Alignment + // + // Padding for I/O + // + PaddingResource++; + PaddingResource->Desc = 0x8A; + PaddingResource->Len = 0x2B; + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_IO; + PaddingResource->GenFlag = 0x0; + PaddingResource->SpecificFlag = 0; + PaddingResource->AddrRangeMin = 0; + PaddingResource->AddrLen = RsvdPcieKiloIo * 0x400; + // + // Pad 4K of IO + // + PaddingResource->AddrRangeMax = 1; + // + // Alignment + // + // Terminate the entries. + // + PaddingResource++; + ((EFI_ACPI_END_TAG_DESCRIPTOR *) PaddingResource)->Desc = ACPI_END_TAG_DESCRIPTOR; + ((EFI_ACPI_END_TAG_DESCRIPTOR *) PaddingResource)->Checksum = 0x0; + + *HpcState = EFI_HPC_STATE_INITIALIZED | EFI_HPC_STATE_ENABLED; + + return EFI_SUCCESS; +} +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.cif b/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.cif new file mode 100644 index 0000000..5a46b95 --- /dev/null +++ b/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.cif @@ -0,0 +1,12 @@ +<component> + name = "PciHotPlug" + category = ModulePart + LocalRoot = "Chipset\SB\PchWrap\PciHotPlug" + RefName = "PciHotPlug" +[files] +"PciHotPlug.sdl" +"PciHotPlug.mak" +"PciHotPlug.c" +"PciHotPlug.h" +"PciHotPlug.dxs" +<endComponent> diff --git a/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.dxs b/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.dxs new file mode 100644 index 0000000..d6a5059 --- /dev/null +++ b/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.dxs @@ -0,0 +1,61 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PciHotPlug/PciHotPlug.dxs 1 2/08/12 8:37a Yurenlai $ +// +// $Revision: 1 $ +// +// $Date: 2/08/12 8:37a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PciHotPlug/PciHotPlug.dxs $ +// +// 1 2/08/12 8:37a Yurenlai +// Intel Lynx Point/SB eChipset initially releases. +// +//************************************************************************* + +// +// Common for R8 and R9 codebase +// +#include "AutoGen.h" +#include "DxeDepex.h" + +// +// BUILD_WITH_GLUELIB is turned "on" in R8 codebase; +// BUILD_WITH_GLUELIB is turned "off" in R9 codebase. +// +#ifdef BUILD_WITH_GLUELIB +#include "EfiDepex.h" +#endif + +DEPENDENCY_START + TRUE +DEPENDENCY_END +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.h b/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.h new file mode 100644 index 0000000..295e721 --- /dev/null +++ b/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.h @@ -0,0 +1,198 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PciHotPlug/PciHotPlug.h 2 4/24/13 5:02a Scottyang $ +// +// $Revision: 2 $ +// +// $Date: 4/24/13 5:02a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PciHotPlug/PciHotPlug.h $ +// +// 2 4/24/13 5:02a Scottyang +// +// 1 2/08/12 8:37a Yurenlai +// Intel Lynx Point/SB eChipset initially releases. +// +//************************************************************************* + +#ifndef _PCI_HOT_PLUG_H_ +#define _PCI_HOT_PLUG_H_ + +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined (EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) + +#include "EdkIIGlueDxe.h" + +#include "PchRegs.h" +#include "PchRegsRcrb.h" + +#include EFI_PROTOCOL_DEFINITION (PciHotPlugInit) +#include EFI_PROTOCOL_DEFINITION (PciRootBridgeIo) +#include "Acpi.h" + +// without these include guards, setup.h would include AMI EFI definitions conflicting with those from EDK +#define __UEFI_HII__H__ +#if EFI_SPECIFICATION_VERSION >= 0x2000A +#define __HII_CONFIG_ACCESS__H__ +#else +#define __HII_PROTOCOL_H__ +#define _HII_H_ +#define __FORM_CALLBACK_PROTOCOL_H__ +#endif +#include <Setup.h> +#endif + +#define PCI_HOT_PLUG_DRIVER_PRIVATE_SIGNATURE EFI_SIGNATURE_32 ('G', 'U', 'L', 'P') + +#define ACPI \ + { \ + ACPI_DEVICE_PATH, ACPI_DP, (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)), (UINT8) \ + ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8), EISA_PNP_ID (0x0A03), 0 \ + } + +#define PCI(device, function) \ + { \ + HARDWARE_DEVICE_PATH, HW_PCI_DP, (UINT8) (sizeof (PCI_DEVICE_PATH)), (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8), \ + (UINTN) function, (UINTN) device \ + } + +#define END \ + { \ + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, END_DEVICE_PATH_LENGTH, 0 \ + } + +#define LPC(eisaid, function) \ + { \ + ACPI_DEVICE_PATH, ACPI_DP, (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)), (UINT8) \ + ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8), EISA_PNP_ID (eisaid), function \ + } + +typedef struct PCIE_HOT_PLUG_DEVICE_PATH { + ACPI_HID_DEVICE_PATH PciRootBridgeNode; + PCI_DEVICE_PATH PciRootPortNode; + EFI_DEVICE_PATH_PROTOCOL EndDeviceNode; +} PCIE_HOT_PLUG_DEVICE_PATH; + +typedef struct { + UINTN Signature; + EFI_HANDLE Handle; // Handle for protocol this driver installs on + EFI_PCI_HOT_PLUG_INIT_PROTOCOL HotPlugInitProtocol; +} PCI_HOT_PLUG_INSTANCE; + +EFI_STATUS +GetRootHpcList ( + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This, + OUT UINTN *PhpcCount, + OUT EFI_HPC_LOCATION **PhpcList + ) +/*++ + +Routine Description: + + This procedure returns a list of Root Hot Plug controllers that require + initialization during boot process + +Arguments: + + This - The pointer to the instance of the EFI_PCI_HOT_PLUG_INIT protocol. + PhpcCount - The number of Root HPCs returned. + PhpcList - The list of Root HPCs. HpcCount defines the number of elements in this list. +Returns: + + EFI_SUCCESS. + +--*/ +; + +EFI_STATUS +InitializeRootHpc ( + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This, + IN EFI_DEVICE_PATH_PROTOCOL *PhpcDevicePath, + IN UINT64 PhpcPciAddress, + IN EFI_EVENT Event, OPTIONAL + OUT EFI_HPC_STATE *PhpcState + ) +/*++ + +Routine Description: + + This procedure Initializes one Root Hot Plug Controller + This process may casue initialization of its subordinate buses + +Arguments: + + This - The pointer to the instance of the EFI_PCI_HOT_PLUG_INIT protocol. + PhpcDevicePath - The Device Path to the HPC that is being initialized. + PhpcPciAddress - The address of the Hot Plug Controller function on the PCI bus. + Event - The event that should be signaled when the Hot Plug Controller initialization is complete. Set to NULL if the caller wants to wait until the entire initialization process is complete. The event must be of the type EFI_EVT_SIGNAL. + PhpcState - The state of the Hot Plug Controller hardware. The type EFI_Hpc_STATE is defined in section 3.1. + +Returns: + + EFI_SUCCESS. +--*/ +; + +EFI_STATUS +GetResourcePadding ( + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This, + IN EFI_DEVICE_PATH_PROTOCOL *PhpcDevicePath, + IN UINT64 PhpcPciAddress, + OUT EFI_HPC_STATE *PhpcState, + OUT VOID **Padding, + OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes + ) +/*++ + +Routine Description: + + Returns the resource padding required by the PCI bus that is controlled by the specified Hot Plug Controller. + +Arguments: + + This - The pointer to the instance of the EFI_PCI_HOT_PLUG_INIT protocol. initialized. + PhpcDevicePath - The Device Path to the Hot Plug Controller. + PhpcPciAddress - The address of the Hot Plug Controller function on the PCI bus. + PhpcState - The state of the Hot Plug Controller hardware. The type EFI_HPC_STATE is defined in section 3.1. + Padding - This is the amount of resource padding required by the PCI bus under the control of the specified Hpc. Since the caller does not know the size of this buffer, this buffer is allocated by the callee and freed by the caller. + Attributes - Describes how padding is accounted for. + +Returns: + + EFI_SUCCESS. +--*/ +; + +#endif +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.mak b/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.mak new file mode 100644 index 0000000..62c3a01 --- /dev/null +++ b/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.mak @@ -0,0 +1,98 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PciHotPlug/PciHotPlug.mak 2 2/24/12 2:00a Victortu $ +# +# $Revision: 2 $ +# +# $Date: 2/24/12 2:00a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PciHotPlug/PciHotPlug.mak $ +# +# 2 2/24/12 2:00a Victortu +# Updated to support 4.6.5.3_IntelEDK_1117_Patch7_00. +# +# 1 2/08/12 8:37a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +#--------------------------------------------------------------------------- +# Create PciHotPlug Driver +#--------------------------------------------------------------------------- +EDK : PciHotPlug + +PciHotPlug : $(BUILD_DIR)\PciHotPlug.mak PciHotPlugBin + +$(BUILD_DIR)\PciHotPlug.mak : $(PciHotPlug_DIR)\$(@B).cif $(PciHotPlug_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(PciHotPlug_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +PciHotPlug_INCLUDES=\ + $(INTEL_PCH_INCLUDES)\ + $(EdkIIGlueLib_INCLUDES)\ + $(NB_INCLUDES)\ + $(SB_INCLUDES)\ + /I$(PROJECT_DIR)\ + /IInclude\ + +PciHotPlug_DEFINES = $(MY_DEFINES)\ + /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=PciHotPlug"\ + /D __EDKII_GLUE_BASE_MEMORY_LIB__ \ + /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \ + /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \ + /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \ + /D __EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__ \ + +PciHotPlug_LIB_LINKS =\ + $(EDKPROTOCOLLIB) \ + $(EdkIIGlueBaseLib_LIB)\ +!IF "$(x64_BUILD)"=="1" + $(EdkIIGlueBaseLibX64_LIB)\ +!ELSE + $(EdkIIGlueBaseLibIA32_LIB)\ +!ENDIF + $(EdkIIGlueBaseMemoryLib_LIB)\ + $(EdkIIGlueDxeReportStatusCodeLib_LIB)\ + $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\ + $(EdkIIGlueUefiBootServicesTableLib_LIB)\ + $(EdkIIGlueDxeMemoryAllocationLib_LIB)\ + $(EDKFRAMEWORKPROTOCOLLIB) + +PciHotPlugBin: $(PciHotPlug_LIB_LINKS) + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\ + /f $(BUILD_DIR)\PciHotPlug.mak all \ + "MY_INCLUDES=$(PciHotPlug_INCLUDES)"\ + "MY_DEFINES=$(PciHotPlug_DEFINES)"\ + GUID=3022E512-B94A-4f12-806D-7EF1177899D8\ + ENTRY_POINT=_ModuleEntryPoint \ + TYPE=BS_DRIVER\ + EDKIIModule=DXEDRIVER\ + DEPEX1=$(PciHotPlug_DIR)\PciHotPlug.dxs\ + DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\ + COMPRESS=1 +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.sdl b/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.sdl new file mode 100644 index 0000000..4a3cbf9 --- /dev/null +++ b/Chipset/SB/PchWrap/PciHotPlug/PciHotPlug.sdl @@ -0,0 +1,75 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PciHotPlug/PciHotPlug.sdl 1 2/08/12 8:37a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 8:37a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/PciHotPlug/PciHotPlug.sdl $ +# +# 1 2/08/12 8:37a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +TOKEN + Name = "PciHotPlug_SUPPORT" + Value = "1" + Help = "Main switch to enable PciHotPlug support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes + Token = "AMI_ROOT_BRIDGE_SUPPORT" "=" "0" + Token = "HOTPLUG_SUPPORT" "=" "1" +End + +MODULE + Help = "Includes PciHotPlug to Project" + File = "PciHotPlug.mak" +End + + +ELINK + Name = "PciHotPlug" + InvokeOrder = ReplaceParent +End + +ELINK + Name = "$(BUILD_DIR)\PciHotPlug.ffs" + Parent = "FV_MAIN" + InvokeOrder = AfterParent +End + +PATH + Name = "PciHotPlug_DIR" +End + +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.c b/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.c new file mode 100644 index 0000000..8e081d1 --- /dev/null +++ b/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.c @@ -0,0 +1,252 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2012, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/SmBusMemoryDown.c 1 12/11/12 1:09a Scottyang $ +// +// $Date: 12/11/12 1:09a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: SmBusMemoryDown.c +// +// Description: SmBus support MemoryDown functions implementation +// +//<AMI_FHDR_END> +//************************************************************************* + +#include <efi.h> +#include <AmiDxeLib.h> +#include <AmiCspLib.h> +#include <Protocol\SmBus.h> + +EFI_SMBUS_HC_PROTOCOL *SmBusProtocol = NULL; +static EFI_SMBUS_HC_EXECUTE_OPERATION PchSmBusExecute = NULL; +EFI_EVENT gSmBusMemoryDownEvent; +VOID *gSmBusMemoryDownEventReg; +UINT8 IsRunMemoryDown = 0; +EFI_GUID gEfiSMBusProtocolGuid = EFI_SMBUS_HC_PROTOCOL_GUID; + +#ifndef AMI_OVERRIDE_FOR_MEMORY_DOWN +#if defined(NB_OEM_DIMM1_STATUS) && (NB_OEM_DIMM1_STATUS == 0x02) +static UINT8 Dimm1SpdTbl[] = NB_OEM_DIMM1_SPD_DATA; +#endif +#if defined(NB_OEM_DIMM2_STATUS) && (NB_OEM_DIMM2_STATUS == 0x02) +static UINT8 Dimm2SpdTbl[] = NB_OEM_DIMM2_SPD_DATA; +#endif +#if defined(NB_OEM_DIMM3_STATUS) && (NB_OEM_DIMM3_STATUS == 0x02) +static UINT8 Dimm3SpdTbl[] = NB_OEM_DIMM3_SPD_DATA; +#endif +#if defined(NB_OEM_DIMM4_STATUS) && (NB_OEM_DIMM4_STATUS == 0x02) +static UINT8 Dimm4SpdTbl[] = NB_OEM_DIMM4_SPD_DATA; +#endif +#endif // AMI_OVERRIDE_FOR_MEMORY_DOWN + +VOID OverrideSmBusNotify ( + IN EFI_EVENT Event, + IN VOID *Context +); + + +//************************************************************************* +//<AMI_PHDR_START> +// +// Procedure: OverrideSmBusExecute +// +// Description: Init SmBus MemoryDown Protocol Execute.. +// +// Input: +// +// Output: +// +//<AMI_PHDR_END> +//************************************************************************* +EFI_STATUS +EFIAPI +OverrideSmBusExecute ( + IN EFI_SMBUS_HC_PROTOCOL *This, + IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress, + IN EFI_SMBUS_DEVICE_COMMAND Command, + IN EFI_SMBUS_OPERATION Operation, + IN BOOLEAN PecCheck, + IN OUT UINTN *Length, + IN OUT VOID *Buffer + ) +{ + UINT8 *DimmSpd = NULL; + UINT8 *BufferPoint = Buffer; + UINT16 i = 0; + + if (IsRunMemoryDown) { +#ifdef NB_OEM_DIMM1_SPD_DATA + if(SlaveAddress.SmbusDeviceAddress == DIMM1_SMBUS_ADDRESS >> 1) { + DimmSpd = Dimm1SpdTbl; + } +#endif +#ifdef NB_OEM_DIMM2_SPD_DATA + if(SlaveAddress.SmbusDeviceAddress == DIMM2_SMBUS_ADDRESS >> 1) { + DimmSpd = Dimm2SpdTbl; + } +#endif +#ifdef NB_OEM_DIMM3_SPD_DATA + if(SlaveAddress.SmbusDeviceAddress == DIMM3_SMBUS_ADDRESS >> 1) { + DimmSpd = Dimm3SpdTbl; + } +#endif +#ifdef NB_OEM_DIMM4_SPD_DATA + if(SlaveAddress.SmbusDeviceAddress == DIMM4_SMBUS_ADDRESS >> 1) { + DimmSpd = Dimm4SpdTbl; + } +#endif + if (DimmSpd != NULL) { + for (i=0; i <= *Length; i++) { + *BufferPoint = DimmSpd[Command + i]; + BufferPoint++; + } + return EFI_SUCCESS; + } + } + + return PchSmBusExecute ( + This, + SlaveAddress, + Command, + Operation, + PecCheck, + Length, + Buffer + ); + +} +//************************************************************************* +//<AMI_PHDR_START> +// +// Procedure: OverrideSmBusNotify +// +// Description: Override SmBus Protocol Execute. +// +// Input: +// IN EFI_LEGACY_REGION_PROTOCOL *This, +// IN UINT32 Start, +// IN UINT32 Length, +// OUT UINT32 *Granularity, +// IN BOOLEAN *On +// +// Output: +// Status of the operation +// +//<AMI_PHDR_END> +//************************************************************************* +VOID OverrideSmBusNotify ( + IN EFI_EVENT Event, + IN VOID *Context ) +{ + EFI_STATUS Status; + + Status = pBS->LocateProtocol (&gEfiSmbusProtocolGuid, NULL, (VOID**) &SmBusProtocol); + if (!EFI_ERROR (Status)) { + + PchSmBusExecute = SmBusProtocol->Execute; + SmBusProtocol->Execute = OverrideSmBusExecute; + } + // Kill event + pBS->CloseEvent(Event); +} +//************************************************************************* +//<AMI_PHDR_START> +// +// Procedure: InitSmBusMemoryDown +// +// Description: Override the SmBus protocol. +// +// Input: +// IN EFI_HANDLE ImageHandle, +// IN EFI_SYSTEM_TABLE *SystemTable +// +// Output: +// Status of the operation +// +// Notes: +// Here is the control flow of this function: +// 1. Get SmBus protocol. +// 2. Override the SmBus protocol. +// +//<AMI_PHDR_END> +//************************************************************************* +EFI_STATUS InitSmBusMemoryDown( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + NB_SETUP_DATA *NBSetupData = NULL; + UINTN VariableSize = sizeof(NB_SETUP_DATA); + + + InitAmiLib(ImageHandle, SystemTable); + + Status = pBS->AllocatePool( EfiBootServicesData, \ + VariableSize, \ + &NBSetupData ); + ASSERT_EFI_ERROR(Status); + + GetNbSetupData( pRS, NBSetupData, FALSE ); + + if (NBSetupData->IsRunMemoryDown) { + IsRunMemoryDown = NBSetupData->IsRunMemoryDown; + + + //NbSetupdata Pass to SaGlobalNvsArea. + Status = pBS->CreateEvent ( + EFI_EVENT_NOTIFY_SIGNAL, + TPL_CALLBACK, + OverrideSmBusNotify, + NULL, + &gSmBusMemoryDownEvent + ); + + if (!EFI_ERROR (Status)) { + Status = pBS->RegisterProtocolNotify ( + &gEfiSMBusProtocolGuid, + gSmBusMemoryDownEvent, + &gSmBusMemoryDownEventReg + ); + } + + } + // Free memory used for setup data + pBS->FreePool( NBSetupData ); + + return Status; + +} + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2012, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.cif b/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.cif new file mode 100644 index 0000000..d187e08 --- /dev/null +++ b/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.cif @@ -0,0 +1,11 @@ +<component> + name = "SmBusMemoryDown" + category = ModulePart + LocalRoot = "Chipset\SB\PchWrap\SmBusMemoryDown\" + RefName = "SmBusMemoryDown" +[files] +"SmBusMemoryDown.sdl" +"SmBusMemoryDown.mak" +"SmBusMemoryDown.dxs" +"SmBusMemoryDown.c" +<endComponent> diff --git a/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.dxs b/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.dxs new file mode 100644 index 0000000..6b1acfb --- /dev/null +++ b/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.dxs @@ -0,0 +1,50 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2012, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/SmBusMemoryDown.dxs 1 12/11/12 1:09a Scottyang $ +// +// $Date: 12/11/12 1:09a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: SmBusMemoryDown.dxs +// +// Description: SmBusMemoryDown dependency file +// +//<AMI_FHDR_END> +//************************************************************************* + +DEPENDENCY_START + TRUE +DEPENDENCY_END + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2012, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.mak b/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.mak new file mode 100644 index 0000000..c99931f --- /dev/null +++ b/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.mak @@ -0,0 +1,44 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +all : SmBusMemoryDown + +SmBusMemoryDown : $(BUILD_DIR)\SmBusMemoryDown.mak SmBusMemoryDownBin + +$(BUILD_DIR)\SmBusMemoryDown.mak : $(SMBUS_MEMORYDOWN_DIR)\$(@B).cif $(SMBUS_MEMORYDOWN_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(SMBUS_MEMORYDOWN_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +SmBusMemoryDownBin : $(AMIDXELIB) $(AMICSPLib) + $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\ + /f $(BUILD_DIR)\SmBusMemoryDown.mak all\ + GUID=F6A59595-BB9F-415b-A7F3-DC7C09387BE6 \ + ENTRY_POINT=InitSmBusMemoryDown \ + DEPEX1=$(SMBUS_MEMORYDOWN_DIR)\SmBusMemoryDown.dxs\ + DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \ + TYPE=BS_DRIVER \ + COMPRESS=1\ + +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2012, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.sdl b/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.sdl new file mode 100644 index 0000000..e5f0206 --- /dev/null +++ b/Chipset/SB/PchWrap/SmBusMemoryDown/SmBusMemoryDown.sdl @@ -0,0 +1,27 @@ +TOKEN + Name = "SmBusMemoryDown_SUPPORT" + Value = "1" + Help = "Main switch to enable SmBusMemoryDown support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes + Token = "PchSmbusDxe_SUPPORT" "=" "1" + Token = "MRC_MEMORY_DOWN_SUPPORT" "=" "1" +End + +PATH + Name = "SMBUS_MEMORYDOWN_DIR" +End + +MODULE + Help = "Includes SmBusMemoryDown.mak to Project" + File = "SmBusMemoryDown.mak" +End + +ELINK + Name = "$(BUILD_DIR)\SmBusMemoryDown.ffs" + Parent = "FV_MAIN" + InvokeOrder = AfterParent +End + diff --git a/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.CIF b/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.CIF new file mode 100644 index 0000000..c79f8a0 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.CIF @@ -0,0 +1,11 @@ +<component> + name = "WdtAppDxe" + category = ModulePart + LocalRoot = "Chipset\SB\PchWrap\WdtApp\Dxe" + RefName = "WdtAppDxe" +[files] +"WdtAppDxe.sdl" +"WdtAppDxe.dxs" +"WdtAppDxe.mak" +"WdtAppDxe.c" +<endComponent>
\ No newline at end of file diff --git a/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.c b/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.c new file mode 100644 index 0000000..902b521 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.c @@ -0,0 +1,401 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppDxe/WdtAppDxe.c 2 5/14/14 1:10p Barretlin $ +// +// $Revision: 2 $ +// +// $Date: 5/14/14 1:10p $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppDxe/WdtAppDxe.c $ +// +// 2 5/14/14 1:10p Barretlin +// [TAG] EIP167028 +// [Category] Improvement +// [Description] Variable attribute improment +// [Files] SB.sd SBDxe.c WdtAppDxe.c +// +// 1 2/08/12 8:34a Yurenlai +// Intel Lynx Point/SB eChipset initially releases. +// +//************************************************************************* +#include <Efi.h> +#include <token.h> +#include <AmiLib.h> +#include <AmiDxeLib.h> +#include <Dxe.h> +#include <PCI.h> +#include <AmiCspLib.h> +#include <WdtAppVariable.h> +#include <Protocol\Wdt\Wdt.h> +#include <Protocol\WdtApp\WdtApp.h> + +#ifdef EFI_DEBUG +#define WDT_TIMEOUT_VALUE 10 // s +#else +#define WDT_TIMEOUT_VALUE 5 // s +#endif + +#define WDT_RELOAD_TIMER 10000000 // in units of 100ns + +EFI_GUID guidLegacyBoot = EFI_EVENT_LEGACY_BOOT_GUID; +EFI_GUID gWdtProtocolGuid = WDT_PROTOCOL_GUID; + +EFI_STATUS +StopFeedingWatchdog ( + IN EFI_EVENT Event, + IN VOID *Context +); + +EFI_STATUS +FeedWatchdog ( + IN EFI_EVENT Event, + IN VOID *Context +); + +EFI_STATUS +InstallWdtSupport ( + VOID +); + +EFI_STATUS +EFIAPI +RequestWdtAfterReboot ( + VOID +); + +EFI_STATUS +EFIAPI +RequestWdtNow ( + VOID +); + +WDT_APP_PROTOCOL mWdtAppProtocol = { + RequestWdtAfterReboot, + RequestWdtNow +}; + +EFI_EVENT mFeedEvent; + +//<AMI_PHDR_START> +//---------------------------------------------------------------------------- +// +// Procedure: WdtAppDxeEntryPoint +// +// Description: Turns on WDT during DXE phase according to requests made by +// OS overclocking application (through WDT status) and BIOS +// modules (through flash variable) +// +// Input: IN EFI_HANDLE ImageHandle, +// IN EFI_SYSTEM_TABLE *SystemTable +// +// Output: EFI_STATUS +// +//---------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS +WdtAppDxeEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + WDT_PROTOCOL *WdtProtocol; + UINTN VariableSize; + UINT32 Attributes; + EFI_GUID WdtPersistentDataGuid = WDT_PERSISTENT_DATA_GUID; + WDT_PERSISTENT_DATA WdtPersistentData; + + InitAmiLib(ImageHandle, SystemTable); + + TRACE ((-1, "(WdtApp) Entry Point to WdtAppDxe\n")); + + Status = pBS->LocateProtocol(&gWdtProtocolGuid, NULL, &WdtProtocol); + if ( EFI_ERROR(Status) ) { + TRACE ((-1, "(WdtApp) Failed to locate Wdt protocol, Status = %r\n",Status)); + return EFI_SUCCESS; + } + + VariableSize = sizeof (WDT_PERSISTENT_DATA); + + Status = pRS->GetVariable ( + L"WdtPersistentData", + &WdtPersistentDataGuid, + &Attributes, + &VariableSize, + &WdtPersistentData + ); + if (EFI_ERROR (Status)) { + WdtPersistentData.Enable = 0; + Attributes = EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS; + } + + if (WdtProtocol->IsWdtRequired() == TRUE || WdtPersistentData.Enable == 1) { + WdtProtocol->ReloadAndStart(WDT_TIMEOUT_VALUE); + InstallWdtSupport(); + } + + WdtPersistentData.Enable = 0; + pRS->SetVariable( + L"WdtPersistentData", + &WdtPersistentDataGuid, + Attributes, + sizeof (WDT_PERSISTENT_DATA), + &WdtPersistentData + ); + + Status = pBS->InstallProtocolInterface ( + &ImageHandle, + &gWdtAppProtocolGuid, + EFI_NATIVE_INTERFACE, + &mWdtAppProtocol + ); + + ASSERT_EFI_ERROR (Status); + + return EFI_SUCCESS; +} + + +//<AMI_PHDR_START> +//---------------------------------------------------------------------------- +// +// Procedure: RequestWdtNow +// +// Description: Allows protocol's clients to request that WDT be turned on and periodically kicked, +// starting from now. +// +// Input: None +// +// Output: EFI_SUCCESS if everything's OK +// +//---------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS +EFIAPI +RequestWdtNow ( + VOID + ) +{ + EFI_STATUS Status; + Status = InstallWdtSupport(); + return Status; +}; + + +//<AMI_PHDR_START> +//---------------------------------------------------------------------------- +// +// Procedure: RequestWdtAfterReboot +// +// Description: Allows protocol's clients to request that WDT be turned on and periodically kicked +// during BIOS execution during next boot. +// +// Input: None +// +// Output: EFI_SUCCESS if everything's OK +// +//---------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS +EFIAPI +RequestWdtAfterReboot ( + VOID + ) +{ + EFI_STATUS Status; + EFI_GUID WdtPersistentDataGuid = WDT_PERSISTENT_DATA_GUID; + WDT_PERSISTENT_DATA WdtPersistentData; + UINT32 Attributes; + UINTN VariableSize; + + VariableSize = sizeof (WDT_PERSISTENT_DATA); + + Status = pRS->GetVariable ( + L"WdtPersistentData", + &WdtPersistentDataGuid, + &Attributes, + &VariableSize, + &WdtPersistentData + ); + if (EFI_ERROR(Status)) Attributes = EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS; + + WdtPersistentData.Enable = 1; + Status = pRS->SetVariable( + L"WdtPersistentData", + &WdtPersistentDataGuid, + Attributes, + sizeof (WDT_PERSISTENT_DATA), + &WdtPersistentData + ); + ASSERT_EFI_ERROR(Status); + + return Status; +} + + +//<AMI_PHDR_START> +//---------------------------------------------------------------------------- +// +// Procedure: InstallWdtSupport +// +// Description: Creates events for FeedWatchdog and StopFeedingWatchdog functions. +// +// Input: None +// +// Output: EFI_SUCCESS if everything's OK +// +//---------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS +InstallWdtSupport ( + VOID + ) +{ + EFI_STATUS Status; + EFI_EVENT BootEvent; + WDT_PROTOCOL* WdtProtocol; + + TRACE ((-1, "(WdtApp) Wdt turned on\n")); + + Status = pBS->LocateProtocol(&gWdtProtocolGuid, NULL, &WdtProtocol); + ASSERT_EFI_ERROR(Status); + Status = WdtProtocol->ReloadAndStart(WDT_TIMEOUT_VALUE); + ASSERT_EFI_ERROR(Status); + + Status = pBS->CreateEvent ( + EFI_EVENT_TIMER | EFI_EVENT_NOTIFY_SIGNAL, + TPL_NOTIFY, + FeedWatchdog, + NULL, + &mFeedEvent + ); + ASSERT_EFI_ERROR (Status); + Status = pBS->SetTimer ( + mFeedEvent, + TimerPeriodic, + WDT_RELOAD_TIMER + ); + ASSERT_EFI_ERROR (Status); + + Status = pBS->CreateEvent ( + EVT_SIGNAL_EXIT_BOOT_SERVICES, + TPL_CALLBACK, + StopFeedingWatchdog, + NULL, + &BootEvent + ); + + ASSERT_EFI_ERROR (Status); + + Status = pBS->CreateEventEx( + EVT_NOTIFY_SIGNAL, + TPL_CALLBACK, + StopFeedingWatchdog, + NULL, + &guidLegacyBoot, + &BootEvent + ); + + ASSERT_EFI_ERROR (Status); + + return Status; +} + + +//<AMI_PHDR_START> +//---------------------------------------------------------------------------- +// +// Procedure: FeedWatchdog +// +// Description: Prevents WDT timeout by restarting it. +// +// Input: None +// +// Output: Nothing +// +//---------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS +FeedWatchdog ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + EFI_STATUS Status; + WDT_PROTOCOL* WdtProtocol; + + Status = pBS->LocateProtocol(&gWdtProtocolGuid, NULL, &WdtProtocol); + if ( EFI_ERROR(Status) ) { + TRACE ((-1, "(WdtApp) Failed to locate Wdt protocol, Status = %r\n",Status)); + Status = pBS->SetTimer (mFeedEvent, TimerCancel, 0); + ASSERT_EFI_ERROR(Status); + Status = pBS->CloseEvent (mFeedEvent); + ASSERT_EFI_ERROR(Status); + return Status; + } + Status = WdtProtocol->ReloadAndStart(WDT_TIMEOUT_VALUE); + return Status; +} + + +//<AMI_PHDR_START> +//---------------------------------------------------------------------------- +// +// Procedure: StopFeedingWatchdog +// +// Description: Stops timer and event that kept on feeding watchdog. +// +// Input: None +// +// Output: Nothing +// +//---------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS +StopFeedingWatchdog ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + EFI_STATUS Status; + WDT_PROTOCOL* WdtProtocol; + + TRACE ((-1, "(WdtApp) Stop feeding WDT\n")); + Status = pBS->SetTimer (mFeedEvent, TimerCancel, 0); + ASSERT_EFI_ERROR(Status); + Status = pBS->CloseEvent (mFeedEvent); + ASSERT_EFI_ERROR(Status); + Status = pBS->LocateProtocol(&gWdtProtocolGuid, NULL, &WdtProtocol); + if ( !EFI_ERROR(Status) ) { + WdtProtocol->Disable(); + } + return EFI_SUCCESS; +} +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.dxs b/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.dxs new file mode 100644 index 0000000..22e287c --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.dxs @@ -0,0 +1,25 @@ +/*++ +Copyright (c) 2010 Intel Corporation. All rights reserved +This software and associated documentation (if any) is furnished +under a license and may only be used or copied in accordance +with the terms of the license. Except as permitted by such +license, no part of this software or documentation may be +reproduced, stored in a retrieval system, or transmitted in any +form or by any means without the express written consent of +Intel Corporation. + +Module Name: + + WdtAppDxe.dxs + +Abstract: + + Platform-specific ICC code + +--*/ + +#include <Protocol\Wdt\Wdt.h> + +DEPENDENCY_START + WDT_PROTOCOL_GUID +DEPENDENCY_END diff --git a/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.mak b/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.mak new file mode 100644 index 0000000..b8576a9 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.mak @@ -0,0 +1,65 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppDxe/WdtAppDxe.mak 1 2/08/12 8:34a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 8:34a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppDxe/WdtAppDxe.mak $ +# +# 1 2/08/12 8:34a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +all : WdtAppDxe + +$(BUILD_DIR)\WdtAppDxe.mak : $(WdtAppDxe_DIR)\$(@B).cif $(BUILD_RULES) + $(CIF2MAK) $(WdtAppDxe_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +WdtAppDxe : $(BUILD_DIR)\WdtAppDxe.mak WdtAppDxe_Bin + +WdtAppDxe_INCLUDES=\ + $(INTEL_PCH_INCLUDES)\ + $(PROJECT_INCLUDES)\ + $(WDT_APP_INCLUDES)\ + +WdtAppDxe_Bin : $(AMICSPLib) $(AMIDXELIB) $(WdtAppProtocol_LIB) + $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\ + /f $(BUILD_DIR)\WdtAppDxe.mak all\ + "MY_INCLUDES=$(WdtAppDxe_INCLUDES)"\ + GUID=CE366D33-B057-4c03-8561-CAF17738B66F\ + ENTRY_POINT=WdtAppDxeEntryPoint \ + TYPE=BS_DRIVER \ + DEPEX1=$(WdtAppDxe_DIR)\WdtAppDxe.dxs \ + DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \ + COMPRESS=1\ + +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.sdl b/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.sdl new file mode 100644 index 0000000..9a96355 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Dxe/WdtAppDxe.sdl @@ -0,0 +1,68 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppDxe/WdtAppDxe.sdl 1 2/08/12 8:34a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 8:34a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppDxe/WdtAppDxe.sdl $ +# +# 1 2/08/12 8:34a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +TOKEN + Name = "WdtAppDxe_SUPPORT" + Value = "1" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + TargetH = Yes + Master = Yes + Help = "Main switch to enable WDT app support in Project in DXE Phase" +End + +MODULE + Help = "Includes WdtAppDxe.mak to Project" + File = "WdtAppDxe.mak" +End + +PATH + Name = "WdtAppDxe_DIR" + Help = "Wdt App dir" +End + +ELINK + Name = "$(BUILD_DIR)\WdtAppDxe.ffs" + Parent = "FV_MAIN" + InvokeOrder = AfterParent +End +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/Chipset/SB/PchWrap/WdtApp/Include/WdtAppInclude.CIF b/Chipset/SB/PchWrap/WdtApp/Include/WdtAppInclude.CIF new file mode 100644 index 0000000..4a73faa --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Include/WdtAppInclude.CIF @@ -0,0 +1,9 @@ +<component> + name = "WdtAppInclude" + category = ModulePart + LocalRoot = "Chipset\SB\PchWrap\WdtApp\Include" + RefName = "WdtAppInclude" +[files] +"WdtAppInclude.sdl" +"WdtAppVariable.h" +<endComponent> diff --git a/Chipset/SB/PchWrap/WdtApp/Include/WdtAppInclude.sdl b/Chipset/SB/PchWrap/WdtApp/Include/WdtAppInclude.sdl new file mode 100644 index 0000000..2791219 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Include/WdtAppInclude.sdl @@ -0,0 +1,56 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppInclude/WdtAppInclude.sdl 1 2/08/12 8:35a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 8:35a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppInclude/WdtAppInclude.sdl $ +# +# 1 2/08/12 8:35a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +TOKEN + Name = "WdtAppInclude_SUPPORT" + Value = "1" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes + Help = "Main switch to enable WdtAppInclude support in Project" +End + +ELINK + Name = "WdtAppInclude" + InvokeOrder = ReplaceParent +End +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/Chipset/SB/PchWrap/WdtApp/Include/WdtAppVariable.h b/Chipset/SB/PchWrap/WdtApp/Include/WdtAppVariable.h new file mode 100644 index 0000000..2b8d1c8 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Include/WdtAppVariable.h @@ -0,0 +1,52 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppInclude/WdtAppVariable.h 1 2/08/12 8:35a Yurenlai $ +// +// $Revision: 1 $ +// +// $Date: 2/08/12 8:35a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppInclude/WdtAppVariable.h $ +// +// 1 2/08/12 8:35a Yurenlai +// Intel Lynx Point/SB eChipset initially releases. +// +//************************************************************************* + +#define WDT_PERSISTENT_DATA_GUID \ +{0x78ce2354, 0xcfbc, 0x4643, 0xae, 0xba, 0x7, 0xa2, 0x7f, 0xa8, 0x92, 0xbf} + +#define WDT_PERSISTENT_DATA_C_NAME L"WdtPersistentData" + +typedef struct _WDT_PERSISTENT_DATA { + UINT8 Enable; +} WDT_PERSISTENT_DATA; +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.CIF b/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.CIF new file mode 100644 index 0000000..0fabb1c --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.CIF @@ -0,0 +1,11 @@ +<component> + name = "WdtAppPei" + category = ModulePart + LocalRoot = "Chipset\SB\PchWrap\WdtApp\Pei\" + RefName = "WdtAppPei" +[files] +"WdtAppPei.sdl" +"WdtAppPei.mak" +"WdtAppPei.c" +"WdtAppPei.dxs" +<endComponent> diff --git a/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.c b/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.c new file mode 100644 index 0000000..7171b49 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.c @@ -0,0 +1,136 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppPei/WdtAppPei.c 1 2/08/12 8:34a Yurenlai $ +// +// $Revision: 1 $ +// +// $Date: 2/08/12 8:34a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppPei/WdtAppPei.c $ +// +// 1 2/08/12 8:34a Yurenlai +// Intel Lynx Point/SB eChipset initially releases. +// +//************************************************************************* + +#include <Efi.h> +#include <Pei.h> +#include <Token.h> +#include <AmiPeiLib.h> +#include <AmiCspLib.h> + +#include "PchAccess.h" +#include "WdtAppVariable.h" +#include <Ppi\Wdt\Wdt.h> +#include <PPI\ReadOnlyVariable.h> + +#ifdef EFI_DEBUG +#define WDT_TIMEOUT_BETWEEN_PEI_DXE 30 +#else +#define WDT_TIMEOUT_BETWEEN_PEI_DXE 10 +#endif + +EFI_GUID gWdtPpiGuid = WDT_PPI_GUID; + + +//<AMI_PHDR_START> +//---------------------------------------------------------------------------- +// +// Procedure: WdtAppPeiEntryPoint +// +// Description: Turns on WDT during PEI phase according to requests made by +// OS overclocking application (through WDT status) and BIOS +// modules (through flash variable) +// +// Input: *FfsHeader - Pointer to Firmware File System file header. +// *PeiServices - General purpose services available to every PEIM. +// +// Output: EFI_SUCCESS if everything's OK +// +//---------------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS +WdtAppPeiEntryPoint ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ) +{ + EFI_STATUS Status; + WDT_PPI *WdtPei; + EFI_GUID WdtPersistentData = WDT_PERSISTENT_DATA_GUID; + EFI_GUID gPeiReadOnlyVariablePpiGuid = EFI_PEI_READ_ONLY_VARIABLE_PPI_GUID; + WDT_PERSISTENT_DATA WdtStateData; + EFI_PEI_READ_ONLY_VARIABLE_PPI *ReadOnlyVariable; + UINTN VariableSize; + + PEI_TRACE((-1, PeiServices, "(WdtApp) WdtAppPei Entry Point\n")); + + Status = (*PeiServices)->LocatePpi ( + PeiServices, + &gPeiReadOnlyVariablePpiGuid, + 0, NULL, + &ReadOnlyVariable + ); + ASSERT_PEI_ERROR (PeiServices, Status); + + VariableSize = sizeof(WdtStateData); + + Status = ReadOnlyVariable->GetVariable ( + PeiServices, + WDT_PERSISTENT_DATA_C_NAME, + &WdtPersistentData, + NULL, + &VariableSize, + &WdtStateData + ); + + if (EFI_ERROR(Status)) { + WdtStateData.Enable = 0; + } + + Status = (*PeiServices)->LocatePpi ( + PeiServices, + &gWdtPpiGuid, + 0, + NULL, + &WdtPei + ); + + ASSERT_PEI_ERROR (PeiServices, Status); + + if (WdtPei->IsWdtRequired() == TRUE || WdtStateData.Enable == 1) { + WdtPei->ReloadAndStart(WDT_TIMEOUT_BETWEEN_PEI_DXE); + } + + return EFI_SUCCESS; +} + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.dxs b/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.dxs new file mode 100644 index 0000000..e78218e --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.dxs @@ -0,0 +1,47 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppPei/WdtAppPei.dxs 1 2/08/12 8:34a Yurenlai $ +// +// $Revision: 1 $ +// +// $Date: 2/08/12 8:34a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppPei/WdtAppPei.dxs $ +// +// 1 2/08/12 8:34a Yurenlai +// Intel Lynx Point/SB eChipset initially releases. +// +//************************************************************************* +#include <Ppi\Wdt\Wdt.h> + +DEPENDENCY_START +WDT_PPI_GUID +DEPENDENCY_END +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.mak b/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.mak new file mode 100644 index 0000000..c6f3127 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.mak @@ -0,0 +1,66 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppPei/WdtAppPei.mak 1 2/08/12 8:34a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 8:34a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppPei/WdtAppPei.mak $ +# +# 1 2/08/12 8:34a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +all : WdtAppPei + +$(BUILD_DIR)\WdtAppPei.mak : $(WdtAppPei_DIR)\$(@B).cif $(BUILD_RULES) + $(CIF2MAK) $(WdtAppPei_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +WdtAppPei : $(BUILD_DIR)\WdtAppPei.mak WdtAppPeiBin + +WdtAppPei_INCLUDES=\ + $(INTEL_PCH_INCLUDES)\ + $(WDT_APP_INCLUDES)\ + +WdtAppPeiBin : $(AMIPEILIB) $(AMICSPLib) + $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS) \ + /f $(BUILD_DIR)\WdtAppPei.mak all \ + "MY_INCLUDES = $(WdtAppPei_INCLUDES)" \ + NAME=WdtAppPei\ + MAKEFILE=$(BUILD_DIR)\WdtAppPei.mak \ + GUID=0F69F6D7-0E4B-43a6-BFC2-6871694369B0 \ + ENTRY_POINT=WdtAppPeiEntryPoint \ + TYPE=PEIM \ + DEPEX1=$(WdtAppPei_DIR)\WdtAppPei.dxs \ + DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX \ + COMPRESS=0 + +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.sdl b/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.sdl new file mode 100644 index 0000000..8f0c3b9 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Pei/WdtAppPei.sdl @@ -0,0 +1,68 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppPei/WdtAppPei.sdl 1 2/08/12 8:34a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 8:34a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppPei/WdtAppPei.sdl $ +# +# 1 2/08/12 8:34a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +TOKEN + Name = "WdtAppPei_SUPPORT" + Value = "1" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + TargetH = Yes + Master = Yes + Help = "Main switch to enable WDT APP support in Project in PEI Phase" +End + +MODULE + Help = "Includes WdtAppPei.mak to Project" + File = "WdtAppPei.mak" +End + +PATH + Name = "WdtAppPei_DIR" + Help = "WdtAppPei dir" +End + +ELINK + Name = "$(BUILD_DIR)\WdtAppPei.ffs" + Parent = "FV_BB" + InvokeOrder = AfterParent +End +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/Chipset/SB/PchWrap/WdtApp/Protocol/WdtApp/WdtApp.c b/Chipset/SB/PchWrap/WdtApp/Protocol/WdtApp/WdtApp.c new file mode 100644 index 0000000..0c3a5f2 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Protocol/WdtApp/WdtApp.c @@ -0,0 +1,55 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppProtocolLib/WdtApp/WdtApp.c 1 2/08/12 8:36a Yurenlai $ +// +// $Revision: 1 $ +// +// $Date: 2/08/12 8:36a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppProtocolLib/WdtApp/WdtApp.c $ +// +// 1 2/08/12 8:36a Yurenlai +// Intel Lynx Point/SB eChipset initially releases. +// +//************************************************************************* +#include "WdtApp.h" + +// +// Protocol GUID definition +// +EFI_GUID gWdtAppProtocolGuid = WDT_APP_PROTOCOL_GUID; + +// +// Protocol description +// +//EFI_GUID_STRING +// (&gWdtAppProtocolGuid, "WDT Application Protocol", "Watchdog Timer Application Protocol"); +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Chipset/SB/PchWrap/WdtApp/Protocol/WdtApp/WdtApp.h b/Chipset/SB/PchWrap/WdtApp/Protocol/WdtApp/WdtApp.h new file mode 100644 index 0000000..f79ddc0 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Protocol/WdtApp/WdtApp.h @@ -0,0 +1,78 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppProtocolLib/WdtApp/WdtApp.h 1 2/08/12 8:36a Yurenlai $ +// +// $Revision: 1 $ +// +// $Date: 2/08/12 8:36a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppProtocolLib/WdtApp/WdtApp.h $ +// +// 1 2/08/12 8:36a Yurenlai +// Intel Lynx Point/SB eChipset initially releases. +// +//************************************************************************* + +#ifndef _WDT_APP_API_H_ +#define _WDT_APP_API_H_ + +#include <Efi.h> +#include <token.h> +#include <AmiLib.h> +#include <AmiDxeLib.h> +#include <Dxe.h> +#include <AmiCspLib.h> +// +// GUID for the WDT application Protocol +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#define WDT_APP_PROTOCOL_GUID \ + {0x92c7d0bb, 0x679e, 0x479d, 0x87, 0x8d, 0xd4, 0xb8, 0x29, 0x68, 0x57, 0x8b} + +#else + +#define WDT_APP_PROTOCOL_GUID \ + {0x92c7d0bb, 0x679e, 0x479d, { 0x87, 0x8d, 0xd4, 0xb8, 0x29, 0x68, 0x57, 0x8b } } + +#endif +// +// Extern the GUID for protocol users. +// +extern EFI_GUID gWdtAppProtocolGuid; + +typedef EFI_STATUS (EFIAPI *WDT_REQUEST) (VOID); + +typedef struct _WDT_APP_PROTOCOL { + WDT_REQUEST RequestWdtAfterReboot; + WDT_REQUEST RequestWdtNow; +} WDT_APP_PROTOCOL; + +#endif /* _WDT_APP_API_H_ */ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Chipset/SB/PchWrap/WdtApp/Protocol/WdtAppProtocolLib.CIF b/Chipset/SB/PchWrap/WdtApp/Protocol/WdtAppProtocolLib.CIF new file mode 100644 index 0000000..6f76b03 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Protocol/WdtAppProtocolLib.CIF @@ -0,0 +1,11 @@ +<component> + name = "WdtAppProtocolLib" + category = ModulePart + LocalRoot = "Chipset\SB\PchWrap\WdtApp\Protocol" + RefName = "WdtAppProtocolLib" +[files] +"WdtAppProtocolLib.sdl" +"WdtAppProtocolLib.mak" +"WdtApp\WdtApp.h" +"WdtApp\WdtApp.c" +<endComponent> diff --git a/Chipset/SB/PchWrap/WdtApp/Protocol/WdtAppProtocolLib.mak b/Chipset/SB/PchWrap/WdtApp/Protocol/WdtAppProtocolLib.mak new file mode 100644 index 0000000..2b938ab --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Protocol/WdtAppProtocolLib.mak @@ -0,0 +1,56 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppProtocolLib/WdtAppProtocolLib.mak 1 2/08/12 8:36a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 8:36a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppProtocolLib/WdtAppProtocolLib.mak $ +# +# 1 2/08/12 8:36a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* + +all : WdtAppProtocolLib + +$(WdtAppProtocol_LIB) : WdtAppProtocolLib + +WdtAppProtocolLib : $(BUILD_DIR)\WdtAppProtocolLib.mak WdtAppProtocolLibBin + +$(BUILD_DIR)\WdtAppProtocolLib.mak : $(WdtAppProtocol_DIR)\$(@B).cif $(WdtAppProtocol_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(WdtAppProtocol_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +WdtAppProtocolLibBin : + $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\ + /f $(BUILD_DIR)\WdtAppProtocolLib.mak all\ + TYPE=LIBRARY \ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/Chipset/SB/PchWrap/WdtApp/Protocol/WdtAppProtocolLib.sdl b/Chipset/SB/PchWrap/WdtApp/Protocol/WdtAppProtocolLib.sdl new file mode 100644 index 0000000..a2cf557 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/Protocol/WdtAppProtocolLib.sdl @@ -0,0 +1,71 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppProtocolLib/WdtAppProtocolLib.sdl 1 2/08/12 8:36a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 8:36a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtAppProtocolLib/WdtAppProtocolLib.sdl $ +# +# 1 2/08/12 8:36a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +TOKEN + Name = "WdtAppProtocolLib_SUPPORT" + Value = "1" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes + Help = "Main switch to enable WdtAppProtocolLib support in Project" +End + +PATH + Name = "WdtAppProtocol_DIR" +End + +MODULE + File = "WdtAppProtocolLib.mak" + Help = "Includes WdtAppProtocolLib.mak to Project" +End + +ELINK + Name = "WdtAppProtocol_LIB" + InvokeOrder = ReplaceParent +End + +ELINK + Name = "$(BUILD_DIR)\WdtAppProtocolLib.lib" + Parent = "WdtAppProtocol_LIB" + InvokeOrder = AfterParent +End +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/Chipset/SB/PchWrap/WdtApp/WdtApp.CIF b/Chipset/SB/PchWrap/WdtApp/WdtApp.CIF new file mode 100644 index 0000000..185f5f9 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/WdtApp.CIF @@ -0,0 +1,14 @@ +<component> + name = "WdtApp" + category = ModulePart + LocalRoot = "Chipset\SB\PchWrap\WdtApp" + RefName = "WdtApp" +[files] +"WdtApp.sdl" +[parts] +"WdtAppDxe" +"WdtAppPei" +"WdtAppInclude" +[parts] +"WdtAppProtocolLib" +<endComponent> diff --git a/Chipset/SB/PchWrap/WdtApp/WdtApp.sdl b/Chipset/SB/PchWrap/WdtApp/WdtApp.sdl new file mode 100644 index 0000000..05197b0 --- /dev/null +++ b/Chipset/SB/PchWrap/WdtApp/WdtApp.sdl @@ -0,0 +1,74 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtApp.sdl 1 2/08/12 8:33a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 8:33a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/PchWrap/WdtApp/WdtApp.sdl $ +# +# 1 2/08/12 8:33a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +TOKEN + Name = "WdtApp_SUPPORT" + Value = "1" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + TargetH = Yes + Master = Yes + Help = "Main switch to enable WDT app support in Project" +End + +PATH + Name = "WdtApp_DIR" + Help = "Wdt App dir" +End + +ELINK + Name = "WDT_APP_INCLUDES" + InvokeOrder = ReplaceParent +End + +ELINK + Name = "/I$(WdtApp_DIR)" + Parent = "WDT_APP_INCLUDES" + InvokeOrder = AfterParent +End + +ELINK + Name = "/I$(WdtApp_DIR)\Include" + Parent = "WDT_APP_INCLUDES" + InvokeOrder = AfterParent +End +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* |