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-rw-r--r--ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbus.dxs41
-rw-r--r--ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbus.h183
-rw-r--r--ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusArpDisabled.c103
-rw-r--r--ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusEntry.c128
-rw-r--r--ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.cif14
-rw-r--r--ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.inf95
-rw-r--r--ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.mak105
-rw-r--r--ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.sdl67
8 files changed, 736 insertions, 0 deletions
diff --git a/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbus.dxs b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbus.dxs
new file mode 100644
index 0000000..287dd96
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbus.dxs
@@ -0,0 +1,41 @@
+/** @file
+ Dependency expression source file.
+
+@copyright
+ Copyright (c) 2009 - 2012 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+
+**/
+
+//
+// Common for R8 and R9 codebase
+//
+#include "AutoGen.h"
+#include "DxeDepex.h"
+
+//
+// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are both "defined" in R8 codebase;
+// BUILD_WITH_EDKII_GLUE_LIB is defined in Edk-Dev-Snapshot-20070228 and later version
+// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are "not defined" in R9 codebase.
+//
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+
+#include EFI_PROTOCOL_DEFINITION (SmmBase)
+#include EFI_PROTOCOL_DEFINITION (Smbus)
+#endif
+
+DEPENDENCY_START
+ EFI_SMM_BASE_PROTOCOL_GUID
+DEPENDENCY_END
diff --git a/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbus.h b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbus.h
new file mode 100644
index 0000000..8b99bcd
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbus.h
@@ -0,0 +1,183 @@
+/** @file
+ PCH Smbus Protocol
+
+@copyright
+ Copyright (c) 2009 - 2012 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains an 'Intel Peripheral Driver' and uniquely
+ identified as "Intel Reference Module" and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+**/
+#ifndef _SMM_PCH_SMBUS_H
+#define _SMM_PCH_SMBUS_H
+
+//
+// External include files do NOT need to be explicitly specified in real EDKII
+// environment
+//
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+
+#include "EdkIIGlueDxe.h"
+
+//
+// Driver Produced Protocol Prototypes
+//
+#include EFI_PROTOCOL_DEFINITION (Smbus)
+#include EFI_PROTOCOL_PRODUCER (SmmSmbus)
+
+//
+// Driver Consumed Protcol Prototypes
+//
+#include "PchSmbusCommon.h"
+#endif
+//
+// Definitions
+//
+///
+/// Max number of SMBus devices (7 bit address yields 128 combinations but 21 of those are reserved)
+///
+#define MAX_SMBUS_DEVICES 107
+#define MICROSECOND 10
+#define MILLISECOND (1000 * MICROSECOND)
+#define ONESECOND (1000 * MILLISECOND)
+
+///
+/// Declare a local instance structure for this driver
+///
+typedef struct _SMBUS_INSTANCE {
+ UINTN Signature;
+ EFI_HANDLE Handle;
+
+ UINT32 SmbusIoBase;
+ SMBUS_IO_READ SmbusIoRead;
+ SMBUS_IO_WRITE SmbusIoWrite;
+ SMBUS_IO_DONE IoDone;
+
+ ///
+ /// Published interface
+ ///
+ EFI_SMBUS_HC_PROTOCOL SmbusController;
+
+} SMBUS_INSTANCE;
+
+SMBUS_INSTANCE *mSmbusContext;
+
+//
+// Prototypes
+//
+
+/**
+ Execute an SMBUS operation
+
+ @param[in] This The protocol instance
+ @param[in] SlaveAddress The address of the SMBUS slave device
+ @param[in] Command The SMBUS command
+ @param[in] Operation Which SMBus protocol will be issued
+ @param[in] PecCheck If Packet Error Code Checking is to be used
+ @param[in, out] Length Length of data
+ @param[in, out] Buffer Data buffer
+
+ @retval EFI_SUCCESS The SMBUS operation is successful
+ @retval Other Values Something error occurred
+**/
+EFI_STATUS
+EFIAPI
+SmbusExecute (
+ IN EFI_SMBUS_HC_PROTOCOL *This,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN EFI_SMBUS_DEVICE_COMMAND Command,
+ IN EFI_SMBUS_OPERATION Operation,
+ IN BOOLEAN PecCheck,
+ IN OUT UINTN *Length,
+ IN OUT VOID *Buffer
+ );
+
+/**
+ Smbus driver entry point
+
+ @param[in] ImageHandle ImageHandle of this module
+ @param[in] SystemTable EFI System Table
+
+ @retval EFI_SUCCESS Driver initializes successfully
+ @retval Other values Some error occurred
+**/
+EFI_STATUS
+EFIAPI
+InitializePchSmbusSmm (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+/**
+ Set Slave address for an Smbus device with a known UDID or perform a general
+ ARP of all devices.
+
+ @param[in] This Pointer to the instance of the EFI_SMBUS_HC_PROTOCOL.
+ @param[in] ArpAll If TRUE, do a full ARP. Otherwise, just ARP the specified UDID.
+ @param[in] SmbusUdid When doing a directed ARP, ARP the device with this UDID.
+ @param[in, out] SlaveAddress Buffer to store new Slave Address during directed ARP. On output,If
+ ArpAlll == TRUE, this will contain the newly assigned Slave address.
+
+ @exception EFI_UNSUPPORTED This functionality is not supported
+**/
+EFI_STATUS
+EFIAPI
+SmbusArpDevice (
+ IN EFI_SMBUS_HC_PROTOCOL * This,
+ IN BOOLEAN ArpAll,
+ IN EFI_SMBUS_UDID * SmbusUdid, OPTIONAL
+ IN OUT EFI_SMBUS_DEVICE_ADDRESS * SlaveAddress OPTIONAL
+ );
+
+/**
+ Get a pointer to the assigned mappings of UDID's to Slave Addresses.
+
+ @param[in] This Pointer to the instance of the EFI_SMBUS_HC_PROTOCOL.
+ @param[in, out] Length Buffer to contain the lenght of the Device Map, it will be updated to
+ contain the number of pairs of UDID's mapped to Slave Addresses.
+ @param[in, out] SmbusDeviceMap Buffer to contian a pointer to the Device Map, it will be updated to
+ point to the first pair in the Device Map
+
+ @exception EFI_UNSUPPORTED This functionality is not supported
+**/
+EFI_STATUS
+EFIAPI
+SmbusGetArpMap (
+ IN EFI_SMBUS_HC_PROTOCOL *This,
+ IN OUT UINTN *Length,
+ IN OUT EFI_SMBUS_DEVICE_MAP **SmbusDeviceMap
+ );
+
+/**
+ Register a callback in the event of a Host Notify command being sent by a
+ specified Slave Device.
+
+ @param[in] This Pointer to the instance of the EFI_SMBUS_HC_PROTOCOL.
+ @param[in] SlaveAddress Address of the device whose Host Notify command we want to
+ trap.
+ @param[in] Data Data of the Host Notify command we want to trap.
+ @param[in] NotifyFunction Function to be called in the event the desired Host Notify
+ command occurs.
+
+ @exception EFI_UNSUPPORTED This functionality is not supported
+**/
+EFI_STATUS
+EFIAPI
+SmbusNotify (
+ IN EFI_SMBUS_HC_PROTOCOL *This,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN UINTN Data,
+ IN EFI_SMBUS_NOTIFY_FUNCTION NotifyFunction
+ );
+
+#endif
diff --git a/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusArpDisabled.c b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusArpDisabled.c
new file mode 100644
index 0000000..89b9fbc
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusArpDisabled.c
@@ -0,0 +1,103 @@
+/** @file
+ PCH Smbus Driver, ARP functions not supported
+
+@copyright
+ Copyright (c) 2009 - 2012 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains an 'Intel Peripheral Driver' and uniquely
+ identified as "Intel Reference Module" and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+**/
+#include "PchSmbus.h"
+
+/**
+ Set Slave address for an Smbus device with a known UDID or perform a general
+ ARP of all devices.
+
+ @param[in] This Pointer to the instance of the EFI_SMBUS_HC_PROTOCOL.
+ @param[in] ArpAll If TRUE, do a full ARP. Otherwise, just ARP the specified UDID.
+ @param[in] SmbusUdid When doing a directed ARP, ARP the device with this UDID.
+ @param[in, out] SlaveAddress Buffer to store new Slave Address during directed ARP. On output,If
+ ArpAlll == TRUE, this will contain the newly assigned Slave address.
+
+ @exception EFI_UNSUPPORTED This functionality is not supported
+**/
+EFI_STATUS
+EFIAPI
+SmbusArpDevice (
+ IN EFI_SMBUS_HC_PROTOCOL * This,
+ IN BOOLEAN ArpAll,
+ IN EFI_SMBUS_UDID * SmbusUdid, OPTIONAL
+ IN OUT EFI_SMBUS_DEVICE_ADDRESS * SlaveAddress OPTIONAL
+ )
+{
+ ///
+ /// ARP should be done in DXE SMBUS driver.
+ /// Not needed here.
+ ///
+ return EFI_UNSUPPORTED;
+}
+
+/**
+ Get a pointer to the assigned mappings of UDID's to Slave Addresses.
+
+ @param[in] This Pointer to the instance of the EFI_SMBUS_HC_PROTOCOL.
+ @param[in, out] Length Buffer to contain the lenght of the Device Map, it will be updated to
+ contain the number of pairs of UDID's mapped to Slave Addresses.
+ @param[in, out] SmbusDeviceMap Buffer to contian a pointer to the Device Map, it will be updated to
+ point to the first pair in the Device Map
+
+ @exception EFI_UNSUPPORTED This functionality is not supported
+**/
+EFI_STATUS
+EFIAPI
+SmbusGetArpMap (
+ IN EFI_SMBUS_HC_PROTOCOL *This,
+ IN OUT UINTN *Length,
+ IN OUT EFI_SMBUS_DEVICE_MAP **SmbusDeviceMap
+ )
+{
+ ///
+ /// ARP should be done in DXE SMBUS driver.
+ /// Not needed here.
+ ///
+ return EFI_UNSUPPORTED;
+}
+
+/**
+ Register a callback in the event of a Host Notify command being sent by a
+ specified Slave Device.
+
+ @param[in] This Pointer to the instance of the EFI_SMBUS_HC_PROTOCOL.
+ @param[in] SlaveAddress Address of the device whose Host Notify command we want to
+ trap.
+ @param[in] Data Data of the Host Notify command we want to trap.
+ @param[in] NotifyFunction Function to be called in the event the desired Host Notify
+ command occurs.
+
+ @exception EFI_UNSUPPORTED This functionality is not supported
+**/
+EFI_STATUS
+EFIAPI
+SmbusNotify (
+ IN EFI_SMBUS_HC_PROTOCOL *This,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN UINTN Data,
+ IN EFI_SMBUS_NOTIFY_FUNCTION NotifyFunction
+ )
+{
+ ///
+ /// Not needed for SMM.
+ ///
+ return EFI_UNSUPPORTED;
+}
diff --git a/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusEntry.c b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusEntry.c
new file mode 100644
index 0000000..37cb621
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusEntry.c
@@ -0,0 +1,128 @@
+/** @file
+ PCH Smbus Driver Entry
+
+@copyright
+ Copyright (c) 2009 - 2012 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains an 'Intel Peripheral Driver' and uniquely
+ identified as "Intel Reference Module" and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+**/
+#include "PchSmbus.h"
+
+//
+// Global variables
+//
+EFI_SMM_BASE_PROTOCOL *mSmmBase;
+EFI_SMM_SYSTEM_TABLE *mSmst;
+
+EFI_GUID mEfiSmmSmbusProtocolGuid = EFI_SMM_SMBUS_PROTOCOL_GUID;
+
+/**
+ Execute an SMBUS operation
+
+ @param[in] This The protocol instance
+ @param[in] SlaveAddress The address of the SMBUS slave device
+ @param[in] Command The SMBUS command
+ @param[in] Operation Which SMBus protocol will be issued
+ @param[in] PecCheck If Packet Error Code Checking is to be used
+ @param[in, out] Length Length of data
+ @param[in, out] Buffer Data buffer
+
+ @retval EFI_SUCCESS The SMBUS operation is successful
+ @retval Other Values Something error occurred
+**/
+EFI_STATUS
+EFIAPI
+SmbusExecute (
+ IN EFI_SMBUS_HC_PROTOCOL *This,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN EFI_SMBUS_DEVICE_COMMAND Command,
+ IN EFI_SMBUS_OPERATION Operation,
+ IN BOOLEAN PecCheck,
+ IN OUT UINTN *Length,
+ IN OUT VOID *Buffer
+ )
+{
+ InitializeSmbusRegisters ();
+
+ return SmbusExec (
+ SlaveAddress,
+ Command,
+ Operation,
+ PecCheck,
+ Length,
+ Buffer
+ );
+}
+
+/**
+ Smbus driver entry point
+
+ @param[in] ImageHandle ImageHandle of this module
+ @param[in] SystemTable EFI System Table
+
+ @retval EFI_SUCCESS Driver initializes successfully
+ @retval Other values Some error occurred
+**/
+EFI_STATUS
+EFIAPI
+InitializePchSmbusSmm (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ ///
+ /// Locate SMM Base Protocol
+ ///
+ Status = gBS->LocateProtocol (&gEfiSmmBaseProtocolGuid, NULL, (VOID **) &mSmmBase);
+ ASSERT_EFI_ERROR (Status);
+
+ ///
+ /// Initialize our module variables
+ ///
+ Status = mSmmBase->GetSmstLocation (mSmmBase, &mSmst);
+ ASSERT_EFI_ERROR (Status);
+
+ Status = mSmst->SmmAllocatePool (EfiRuntimeServicesData, sizeof (SMBUS_INSTANCE), (VOID **) &mSmbusContext);
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ } else {
+ ZeroMem (mSmbusContext, sizeof (SMBUS_INSTANCE));
+
+ mSmbusContext->Signature = PCH_SMBUS_PRIVATE_DATA_SIGNATURE;
+ mSmbusContext->IoDone = IoDone;
+ mSmbusContext->SmbusIoRead = SmbusIoRead;
+ mSmbusContext->SmbusIoWrite = SmbusIoWrite;
+ mSmbusContext->SmbusController.Execute = SmbusExecute;
+ mSmbusContext->SmbusController.ArpDevice = SmbusArpDevice;
+ mSmbusContext->SmbusController.GetArpMap = SmbusGetArpMap;
+ mSmbusContext->SmbusController.Notify = SmbusNotify;
+
+ ///
+ /// Install the SMBUS interface
+ ///
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &mSmbusContext->Handle,
+ &mEfiSmmSmbusProtocolGuid,
+ &mSmbusContext->SmbusController,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ return EFI_SUCCESS;
+}
diff --git a/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.cif b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.cif
new file mode 100644
index 0000000..884f322
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.cif
@@ -0,0 +1,14 @@
+<component>
+ name = "PchSmbusSmm"
+ category = ModulePart
+ LocalRoot = "ReferenceCode\Chipset\LynxPoint\Smbus\Smm"
+ RefName = "PchSmbusSmm"
+[files]
+"PchSmbusSmm.sdl"
+"PchSmbusSmm.mak"
+"PchSmbus.h"
+"PchSmbusArpDisabled.c"
+"PchSmbusEntry.c"
+"PchSmbus.dxs"
+"PchSmbusSmm.inf"
+<endComponent>
diff --git a/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.inf b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.inf
new file mode 100644
index 0000000..bd5a8f8
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.inf
@@ -0,0 +1,95 @@
+## @file
+# Component description file for PchSmbus driver
+#
+#@copyright
+# Copyright (c) 2009 - 2012 Intel Corporation. All rights reserved
+# This software and associated documentation (if any) is furnished
+# under a license and may only be used or copied in accordance
+# with the terms of the license. Except as permitted by such
+# license, no part of this software or documentation may be
+# reproduced, stored in a retrieval system, or transmitted in any
+# form or by any means without the express written consent of
+# Intel Corporation.
+#
+# This file contains a 'Sample Driver' and is licensed as such
+# under the terms of your license agreement with Intel or your
+# vendor. This file may be modified by the user, subject to
+# the additional terms of the license agreement
+#
+
+[defines]
+BASE_NAME = PchSmbusSmm
+FILE_GUID = 59287178-59B2-49ca-BC63-532B12EA2C53
+COMPONENT_TYPE = BS_DRIVER
+
+[sources.common]
+ PchSmbusEntry.c
+ PchSmbus.h
+ PchSmbusArpDisabled.c
+ ../Common/PchSmbusExec.c
+#
+# Edk II Glue Driver Entry Point
+#
+ EdkIIGlueSmmDriverEntryPoint.c
+
+[includes.common]
+ $(EDK_SOURCE)/Foundation/Efi
+ .
+ ../Common
+ $(EDK_SOURCE)/Foundation/Include
+ $(EDK_SOURCE)/Foundation/Efi/Include
+ $(EDK_SOURCE)/Foundation/Framework/Include
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include/Library
+#
+# EDK II Glue Library utilizes some standard headers from EDK
+#
+ $(EFI_SOURCE)
+ $(EDK_SOURCE)/Foundation
+ $(EDK_SOURCE)/Foundation/Framework
+ $(EDK_SOURCE)/Foundation/Include/IndustryStandard
+ $(EDK_SOURCE)/Foundation/Core/Dxe
+ $(EDK_SOURCE)/Foundation/Include/Pei
+ $(EDK_SOURCE)/Foundation/Library/Dxe/Include
+ $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include
+#
+# Typically the sample code referenced will be available in the code base already
+# So keep this include at the end to defer to the source base definition
+# and only use the sample code definition if source base does not include these files.
+#
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/SampleCode
+
+[libraries.common]
+ EdkIIGlueBaseLib
+ EdkIIGlueBaseIoLibIntrinsic
+ EdkIIGlueBaseMemoryLib
+ EdkIIGlueDxeMemoryAllocationLib
+ EdkIIGlueDxeDebugLibReportStatusCode
+ EdkIIGlueSmmRuntimeDxeReportStatusCodeLib
+ EdkIIGlueUefiBootServicesTableLib
+ EdkIIGlueUefiRuntimeServicesTableLib
+ EdkIIGlueUefiDevicePathLib
+ EdkIIGlueBasePciLibPciExpress
+ EdkProtocolLib
+ EdkFrameworkProtocolLib
+ $(PROJECT_PCH_FAMILY)ProtocolLib
+ PchPlatformLib
+
+[nmake.common]
+ IMAGE_ENTRY_POINT=_ModuleEntryPoint
+ DPX_SOURCE=PchSmbus.dxs
+#
+# Module Entry Point
+#
+ C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_MODULE_ENTRY_POINT__=InitializePchSmbusSmm
+ C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_BASE_LIB__ \
+ -D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ -D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ -D __EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__ \
+ -D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ -D __EDKII_GLUE_SMM_RUNTIME_DXE_REPORT_STATUS_CODE_LIB__ \
+ -D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \
+ -D __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__ \
+ -D __EDKII_GLUE_UEFI_DEVICE_PATH_LIB__ \
+ -D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__
diff --git a/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.mak b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.mak
new file mode 100644
index 0000000..32274ff
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.mak
@@ -0,0 +1,105 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchSmbusSmm/PchSmbusSmm.mak 2 2/24/12 2:28a Victortu $
+#
+# $Revision: 2 $
+#
+# $Date: 2/24/12 2:28a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchSmbusSmm/PchSmbusSmm.mak $
+#
+# 2 2/24/12 2:28a Victortu
+# Updated to support 4.6.5.3_IntelEDK_1117_Patch7_00.
+#
+# 1 2/08/12 9:27a Yurenlai
+# Intel Lynx Point/SB eChipset initially releases.
+#
+#*************************************************************************
+
+#---------------------------------------------------------------------------
+# Create PchSmbus SMM Driver
+#---------------------------------------------------------------------------
+EDK : PchSmbusSmm
+PchSmbusSmm : $(BUILD_DIR)\PchSmbusSmm.mak PchSmbusSmmBin
+
+
+$(BUILD_DIR)\PchSmbusSmm.mak : $(PchSmbusSmm_DIR)\$(@B).cif $(PchSmbusSmm_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(PchSmbusSmm_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+PchSmbusSmm_INCLUDES=\
+ $(INTEL_PCH_INCLUDES)\
+ $(EdkIIGlueLib_INCLUDES)\
+
+PchSmbusSmm_DEFINES = $(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=InitializePchSmbusSmm"\
+ /D __EDKII_GLUE_BASE_LIB__ \
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__ \
+ /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_SMM_RUNTIME_DXE_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \
+ /D __EDKII_GLUE_UEFI_DEVICE_PATH_LIB__ \
+ /D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__
+
+PchSmbusSmm_LIB_LINKS =\
+!IF "$(x64_BUILD)"=="1"
+ $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+ $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+ $(EdkIIGlueBaseLib_LIB)\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGlueBaseMemoryLib_LIB)\
+ $(EdkIIGlueDxeMemoryAllocationLib_LIB)\
+ $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+ $(EdkIIGlueSmmRuntimeDxeReportStatusCodeLib_LIB)\
+ $(EdkIIGlueUefiBootServicesTableLib_LIB)\
+ $(EdkIIGlueUefiDevicePathLib_LIB)\
+ $(EdkIIGlueBasePciLibPciExpress_LIB)\
+ $(EDKPROTOCOLLIB)\
+ $(EDKFRAMEWORKPROTOCOLLIB)\
+ $(INTEL_PCH_PROTOCOL_LIB)\
+ $(PchPlatformSmmLib_LIB) \
+ $(PchSmbusCommonSmmLib_LIB)
+
+PchSmbusSmmBin: $(PchSmbusSmm_LIB_LINKS)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\PchSmbusSmm.mak all \
+ "MY_INCLUDES=$(PchSmbusSmm_INCLUDES)"\
+ "MY_DEFINES=$(PchSmbusSmm_DEFINES)"\
+ GUID=59287178-59B2-49ca-BC63-532B12EA2C53\
+ ENTRY_POINT=_ModuleEntryPoint \
+ TYPE=RT_DRIVER\
+ EDKIIModule=SMMDRIVER\
+ DEPEX1=$(PchSmbusSmm_DIR)\PchSmbus.dxs\
+ DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+ COMPRESS=1
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
diff --git a/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.sdl b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.sdl
new file mode 100644
index 0000000..b2db358
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/Smbus/Smm/PchSmbusSmm.sdl
@@ -0,0 +1,67 @@
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchSmbusSmm/PchSmbusSmm.sdl 1 2/08/12 9:27a Yurenlai $
+#
+# $Revision: 1 $
+#
+# $Date: 2/08/12 9:27a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchSmbusSmm/PchSmbusSmm.sdl $
+#
+# 1 2/08/12 9:27a Yurenlai
+# Intel Lynx Point/SB eChipset initially releases.
+#
+#*************************************************************************
+TOKEN
+ Name = "PchSmbusSmm_SUPPORT"
+ Value = "1"
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Help = "Main switch to enable PchSmbusSmm support in Project"
+End
+
+PATH
+ Name = "PchSmbusSmm_DIR"
+ Help = "PchSmbusSmm file source directory"
+End
+
+MODULE
+ Help = "Includes PchSmbusSmm.mak to Project"
+ File = "PchSmbusSmm.mak"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\PchSmbusSmm.ffs"
+ Parent = "FV_MAIN"
+ InvokeOrder = AfterParent
+End
+#*************************************************************************
+#*************************************************************************
+#** **
+#** (C)Copyright 1985-2011, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#*************************************************************************
+#*************************************************************************