diff options
Diffstat (limited to 'ReferenceCode/Chipset/SystemAgent/MemoryInit/Pei/Source/McConfiguration/MrcPowerModes.c')
| -rw-r--r-- | ReferenceCode/Chipset/SystemAgent/MemoryInit/Pei/Source/McConfiguration/MrcPowerModes.c | 1034 |
1 files changed, 1034 insertions, 0 deletions
diff --git a/ReferenceCode/Chipset/SystemAgent/MemoryInit/Pei/Source/McConfiguration/MrcPowerModes.c b/ReferenceCode/Chipset/SystemAgent/MemoryInit/Pei/Source/McConfiguration/MrcPowerModes.c new file mode 100644 index 0000000..9c06a65 --- /dev/null +++ b/ReferenceCode/Chipset/SystemAgent/MemoryInit/Pei/Source/McConfiguration/MrcPowerModes.c @@ -0,0 +1,1034 @@ +/** @file + This module configures the memory controller power modes. + +@copyright + Copyright (c) 1999 - 2013 Intel Corporation. All rights reserved. + + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement. + +**/ + +/// +/// Include files +/// +#include "MrcPowerModes.h" +#include "MrcOemDebugPrint.h" +#include "MrcSpdProcessing.h" + +const Ddr3PowerWeightEntry Ddr3PowerWeightTable[] = { + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x6A, 0xCA, 0x82, 0x9, 0x10, 0x08}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_2, 0}}, 3, 0x34, 0x89, 0x40, 0x5, 0x07, 0x0B}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x78, 0xD6, 0x86, 0xB, 0x13, 0x09}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_4, 0}}, 3, 0x3B, 0x8F, 0x42, 0x6, 0x09, 0x0E}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x5B, 0xB0, 0x7C, 0x5, 0x0B, 0x07}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x58, 0xF7, 0x7A, 0x5, 0x09, 0x09}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x66, 0xB9, 0x81, 0x6, 0x0D, 0x08}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_4, 0}}, 3, 0x32, 0x80, 0x40, 0x3, 0x05, 0x09}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0x9F, 0xCA, 0x40, 0x5, 0x07, 0x11}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0x9E, 0xCA, 0x3F, 0x5, 0x07, 0x18}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0xA6, 0xD0, 0x42, 0x6, 0x09, 0x13}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0xA5, 0xD0, 0x41, 0x6, 0x08, 0x1A}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0x98, 0xBD, 0x3D, 0x3, 0x05, 0x0F}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0x97, 0xBD, 0x3D, 0x3, 0x04, 0x12}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0x9D, 0xC2, 0x40, 0x3, 0x06, 0x10}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0x9C, 0xC1, 0x3F, 0x3, 0x05, 0x14}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x66, 0xB3, 0x88, 0x8, 0x0E, 0x0A}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x64, 0xB1, 0x86, 0x8, 0x0C, 0x0D}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x74, 0xBF, 0x8B, 0xA, 0x11, 0x0B}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x72, 0xBD, 0x89, 0xA, 0x0F, 0x0F}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x57, 0x9A, 0x7C, 0x4, 0x0A, 0x08}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x55, 0x98, 0x7A, 0x4, 0x08, 0x0A}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x62, 0xA3, 0x80, 0x5, 0x0B, 0x09}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x60, 0xA1, 0x7E, 0x5, 0x09, 0x0B}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0x88, 0xAB, 0x43, 0x4, 0x07, 0x14}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0x87, 0xAA, 0x43, 0x4, 0x06, 0x1A}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0x8F, 0xB1, 0x45, 0x5, 0x08, 0x15}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0x8F, 0xB0, 0x44, 0x5, 0x07, 0x1D}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0x81, 0x9E, 0x3D, 0x2, 0x04, 0x10}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0x80, 0x9E, 0x3D, 0x2, 0x04, 0x15}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0x86, 0xA3, 0x3F, 0x3, 0x05, 0x11}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0x85, 0xA2, 0x3F, 0x3, 0x04, 0x15}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x72, 0xFD, 0x90, 0x7, 0x0D, 0x0C}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x71, 0xFB, 0x8E, 0x7, 0x0B, 0x0F}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_4, 0}}, 3, 0x40, 0x85, 0x4A, 0x5, 0x08, 0x0E}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_4, 0}}, 3, 0x3F, 0x84, 0x49, 0x5, 0x07, 0x12}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x62, 0xE4, 0x7E, 0x4, 0x09, 0x0A}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x61, 0xE3, 0x7C, 0x4, 0x07, 0x0C}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x6C, 0xED, 0x82, 0x5, 0x0A, 0x0B}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x6B, 0xEB, 0x80, 0x5, 0x08, 0x0D}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x8E, 0xCE, 0x47, 0x4, 0x06, 0x17}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x8E, 0xCD, 0x47, 0x4, 0x06, 0x20}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x95, 0xD4, 0x49, 0x5, 0x07, 0x19}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x95, 0xD3, 0x48, 0x5, 0x07, 0x23}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x86, 0xC1, 0x3E, 0x2, 0x04, 0x13}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x86, 0xC1, 0x3E, 0x2, 0x03, 0x16}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x8C, 0xC6, 0x40, 0x3, 0x04, 0x14}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x8B, 0xC5, 0x40, 0x3, 0x04, 0x1A}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x6F, 0xE6, 0x9C, 0x7, 0x0C, 0x0E}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x6D, 0xE4, 0x9B, 0x7, 0x0B, 0x12}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x7C, 0xF1, 0x9F, 0x8, 0x0E, 0x0F}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x7B, 0xF0, 0x9D, 0x8, 0x0D, 0x14}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x5F, 0xCE, 0x83, 0x4, 0x08, 0x0B}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x5E, 0xCC, 0x82, 0x4, 0x06, 0x0D}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x69, 0xD6, 0x87, 0x5, 0x09, 0x0C}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x68, 0xD5, 0x86, 0x5, 0x07, 0x0E}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x81, 0xB7, 0x4E, 0x4, 0x06, 0x1A}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x80, 0xB6, 0x4D, 0x4, 0x05, 0x21}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x87, 0xBD, 0x4F, 0x4, 0x07, 0x1C}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x87, 0xBC, 0x4F, 0x4, 0x06, 0x25}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x79, 0xAB, 0x41, 0x2, 0x04, 0x15}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x78, 0xAA, 0x41, 0x2, 0x03, 0x19}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x7E, 0xAF, 0x43, 0x3, 0x04, 0x16}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x7D, 0xAF, 0x43, 0x3, 0x04, 0x1D}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x6C, 0xD4, 0xA6, 0x6, 0x0B, 0x0F}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x6B, 0xD3, 0xA4, 0x6, 0x0A, 0x13}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x7A, 0xE0, 0xA8, 0x8, 0x0D, 0x11}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x79, 0xDE, 0xA7, 0x8, 0x0C, 0x16}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x5C, 0xBD, 0x87, 0x3, 0x07, 0x0C}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x5B, 0xBB, 0x85, 0x3, 0x06, 0x0E}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x66, 0xC5, 0x8A, 0x4, 0x08, 0x0D}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x65, 0xC3, 0x89, 0x4, 0x07, 0x10}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0x76, 0xA6, 0x52, 0x3, 0x05, 0x1A}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0x76, 0xA5, 0x52, 0x3, 0x05, 0x24}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0x7D, 0xAB, 0x54, 0x4, 0x06, 0x1D}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0x7D, 0xAB, 0x53, 0x4, 0x06, 0x29}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0x6E, 0x9A, 0x43, 0x2, 0x03, 0x15}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0x6E, 0x9A, 0x43, 0x2, 0x03, 0x1B}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0x73, 0x9E, 0x45, 0x2, 0x04, 0x18}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0x73, 0x9D, 0x44, 0x2, 0x03, 0x1C}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x77, 0xC9, 0x82, 0x9, 0x10, 0x09}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x75, 0xC7, 0x7F, 0x9, 0x0E, 0x0C}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x85, 0xD6, 0x86, 0xB, 0x13, 0x0A}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x83, 0xD3, 0x83, 0xB, 0x11, 0x0D}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x68, 0xB0, 0x7C, 0x5, 0x0B, 0x07}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x66, 0xAE, 0x7A, 0x5, 0x09, 0x09}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x73, 0xB9, 0x81, 0x6, 0x0D, 0x08}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x71, 0xB7, 0x7E, 0x6, 0x0A, 0x0A}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0xBD, 0xE8, 0x40, 0x5, 0x07, 0x13}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0xBD, 0xE8, 0x3F, 0x5, 0x07, 0x1A}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0xC4, 0xEF, 0x42, 0x6, 0x09, 0x15}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0xC3, 0xEE, 0x41, 0x6, 0x08, 0x1C}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0xB6, 0xDC, 0x3D, 0x3, 0x05, 0x11}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0xB5, 0xDB, 0x3D, 0x3, 0x04, 0x14}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0xBB, 0xE0, 0x40, 0x3, 0x06, 0x12}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0xBB, 0xDF, 0x3F, 0x3, 0x05, 0x16}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x71, 0xB2, 0x88, 0x8, 0x0E, 0x0A}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x6F, 0xB1, 0x86, 0x8, 0x0C, 0x0D}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x7F, 0xBF, 0x8B, 0xA, 0x11, 0x0B}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x7D, 0xBD, 0x89, 0xA, 0x0F, 0x0F}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x62, 0x9A, 0x7C, 0x4, 0x0A, 0x08}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x60, 0x98, 0x7A, 0x4, 0x08, 0x0A}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x6D, 0xA3, 0x80, 0x5, 0x0B, 0x09}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x6B, 0xA1, 0x7E, 0x5, 0x09, 0x0B}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0xA0, 0xC3, 0x43, 0x4, 0x07, 0x15}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0xA0, 0xC2, 0x43, 0x4, 0x06, 0x1C}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0xA7, 0xC9, 0x45, 0x5, 0x08, 0x17}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0xA7, 0xC8, 0x44, 0x5, 0x07, 0x1F}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0x99, 0xB6, 0x3D, 0x2, 0x04, 0x11}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0x98, 0xB6, 0x3D, 0x2, 0x04, 0x16}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0x9E, 0xBB, 0x3F, 0x3, 0x05, 0x13}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0x9E, 0xBA, 0x3F, 0x3, 0x04, 0x17}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x79, 0xD2, 0x90, 0x7, 0x0D, 0x0C}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x77, 0xD0, 0x8E, 0x7, 0x0B, 0x0F}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x87, 0xDE, 0x93, 0x9, 0x0F, 0x0D}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x85, 0xDC, 0x91, 0x9, 0x0D, 0x11}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x69, 0xBA, 0x7E, 0x4, 0x08, 0x0A}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x67, 0xB8, 0x7C, 0x4, 0x07, 0x0C}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x73, 0xC2, 0x81, 0x5, 0x0A, 0x0B}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x72, 0xC0, 0x80, 0x5, 0x08, 0x0D}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x8E, 0xBA, 0x47, 0x4, 0x06, 0x17}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x8E, 0xBA, 0x47, 0x4, 0x06, 0x20}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x95, 0xC0, 0x49, 0x5, 0x07, 0x19}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x94, 0xC0, 0x48, 0x5, 0x07, 0x23}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x86, 0xAE, 0x3E, 0x2, 0x04, 0x13}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x86, 0xAE, 0x3E, 0x2, 0x03, 0x16}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x8B, 0xB2, 0x40, 0x3, 0x04, 0x14}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x8B, 0xB2, 0x40, 0x3, 0x04, 0x1A}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x75, 0xC1, 0x9C, 0x7, 0x0C, 0x0E}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x73, 0xBF, 0x9B, 0x7, 0x0B, 0x12}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x82, 0xCC, 0x9F, 0x8, 0x0E, 0x0F}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x81, 0xCB, 0x9D, 0x8, 0x0C, 0x14}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x65, 0xA9, 0x83, 0x4, 0x08, 0x0B}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x64, 0xA8, 0x82, 0x4, 0x06, 0x0D}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x6F, 0xB1, 0x87, 0x5, 0x09, 0x0C}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x6E, 0xB0, 0x86, 0x5, 0x07, 0x0E}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x80, 0xA6, 0x4E, 0x4, 0x06, 0x1A}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x80, 0xA6, 0x4D, 0x4, 0x05, 0x21}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x87, 0xAC, 0x4F, 0x4, 0x07, 0x1C}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x87, 0xAB, 0x4F, 0x4, 0x06, 0x25}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x78, 0x9A, 0x41, 0x2, 0x04, 0x15}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x78, 0x9A, 0x41, 0x2, 0x03, 0x19}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x7D, 0x9E, 0x43, 0x3, 0x04, 0x16}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x7D, 0x9E, 0x43, 0x3, 0x04, 0x1D}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x72, 0xB4, 0xA5, 0x6, 0x0B, 0x0F}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x70, 0xB3, 0xA4, 0x6, 0x0A, 0x14}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x7F, 0xC0, 0xA8, 0x8, 0x0D, 0x11}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x7E, 0xBE, 0xA7, 0x8, 0x0C, 0x16}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x61, 0x9D, 0x87, 0x3, 0x07, 0x0C}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x60, 0x9B, 0x85, 0x3, 0x06, 0x0E}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x6B, 0xA4, 0x8A, 0x4, 0x08, 0x0D}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x6A, 0xA3, 0x89, 0x4, 0x07, 0x10}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0x76, 0x97, 0x52, 0x3, 0x05, 0x1A}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0x76, 0x97, 0x52, 0x3, 0x05, 0x24}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0x7D, 0x9D, 0x54, 0x4, 0x06, 0x1D}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0x7C, 0x9C, 0x53, 0x4, 0x06, 0x29}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0x6E, 0x8B, 0x43, 0x2, 0x03, 0x15}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0x6D, 0x8B, 0x43, 0x2, 0x03, 0x1B}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0x73, 0x8F, 0x45, 0x2, 0x04, 0x18}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0x72, 0x8F, 0x44, 0x2, 0x03, 0x1C}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x85, 0xE2, 0x91, 0xA, 0x12, 0x08}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x83, 0xDF, 0x8F, 0xA, 0x0F, 0x0B}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x95, 0xF0, 0x96, 0xD, 0x15, 0x09}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x92, 0xED, 0x93, 0xD, 0x13, 0x0D}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x7E, 0xCF, 0x9A, 0x6, 0x0C, 0x06}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x7B, 0xCC, 0x98, 0x6, 0x0A, 0x08}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x8B, 0xDA, 0xA0, 0x7, 0x0E, 0x07}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x89, 0xD7, 0x9D, 0x7, 0x0C, 0x0A}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_2, 0}}, 2, 0x77, 0x8C, 0x24, 0x3, 0x04, 0x0F}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_2, 0}}, 2, 0x76, 0x8C, 0x24, 0x3, 0x04, 0x17}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_4, 0}}, 2, 0x7B, 0x90, 0x25, 0x4, 0x05, 0x11}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_4, 0}}, 2, 0x7A, 0x8F, 0x25, 0x4, 0x05, 0x1B}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_2, 0}}, 2, 0x75, 0x87, 0x26, 0x2, 0x03, 0x0D}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_2, 0}}, 2, 0x74, 0x87, 0x26, 0x2, 0x03, 0x13}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_4, 0}}, 2, 0x78, 0x8A, 0x28, 0x2, 0x03, 0x0D}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_4, 0}}, 2, 0x78, 0x8A, 0x27, 0x2, 0x03, 0x13}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x7E, 0xC8, 0x98, 0x9, 0x10, 0x09}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x7C, 0xC6, 0x96, 0x9, 0x0E, 0x0D}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x8E, 0xD6, 0x9C, 0xB, 0x12, 0x0A}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x8C, 0xD4, 0x9A, 0xB, 0x10, 0x0E}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x77, 0xB6, 0x9A, 0x5, 0x0B, 0x07}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x75, 0xB4, 0x98, 0x5, 0x09, 0x0A}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x84, 0xC0, 0x9F, 0x7, 0x0C, 0x08}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x82, 0xBE, 0x9D, 0x7, 0x0A, 0x0A}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_2, 0}}, 2, 0x83, 0x92, 0x26, 0x3, 0x04, 0x13}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_2, 0}}, 2, 0x82, 0x92, 0x26, 0x3, 0x04, 0x1D}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_4, 0}}, 2, 0x87, 0x96, 0x27, 0x3, 0x05, 0x16}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_4, 0}}, 2, 0x86, 0x95, 0x27, 0x3, 0x04, 0x1D}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_2, 0}}, 2, 0x81, 0x8E, 0x26, 0x2, 0x03, 0x11}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_2, 0}}, 2, 0x80, 0x8D, 0x26, 0x2, 0x02, 0x13}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_4, 0}}, 2, 0x84, 0x90, 0x28, 0x2, 0x03, 0x11}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_4, 0}}, 2, 0x84, 0x90, 0x27, 0x2, 0x03, 0x18}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x7A, 0xB8, 0xA1, 0x8, 0x0E, 0x0A}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x79, 0xB6, 0xA0, 0x8, 0x0C, 0x0E}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x8A, 0xC5, 0xA5, 0xA, 0x10, 0x0B}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x88, 0xC4, 0xA3, 0xA, 0x0F, 0x10}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x71, 0xA6, 0x9C, 0x5, 0x0A, 0x08}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x70, 0xA4, 0x9A, 0x5, 0x08, 0x0B}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x7E, 0xB0, 0xA1, 0x6, 0x0B, 0x09}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x7C, 0xAE, 0x9F, 0x6, 0x09, 0x0C}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0xE2, 0xFC, 0x50, 0x4, 0x07, 0x14}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0xE1, 0xFB, 0x50, 0x4, 0x06, 0x1C}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_4, 0}}, 2, 0x75, 0x82, 0x29, 0x3, 0x04, 0x16}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_4, 0}}, 2, 0x75, 0x81, 0x29, 0x3, 0x04, 0x22}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0xDD, 0xF3, 0x4E, 0x3, 0x04, 0x10}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0xDD, 0xF2, 0x4D, 0x3, 0x04, 0x16}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0xE4, 0xF8, 0x50, 0x3, 0x05, 0x12}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0xE3, 0xF7, 0x50, 0x3, 0x05, 0x19}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x77, 0xAC, 0xAF, 0x7, 0x0D, 0x0B}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x76, 0xAB, 0xAE, 0x7, 0x0C, 0x10}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x86, 0xB9, 0xB2, 0x9, 0x0F, 0x0D}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x85, 0xB8, 0xB1, 0x9, 0x0E, 0x12}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x6F, 0x9A, 0xA3, 0x4, 0x09, 0x09}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x6D, 0x99, 0xA2, 0x4, 0x07, 0x0C}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x7B, 0xA5, 0xA8, 0x5, 0x0A, 0x0A}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x7A, 0xA3, 0xA7, 0x5, 0x09, 0x0E}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0xC9, 0xDF, 0x57, 0x4, 0x06, 0x15}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0xC8, 0xDF, 0x57, 0x4, 0x06, 0x20}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0xD0, 0xE6, 0x59, 0x5, 0x07, 0x17}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0xD0, 0xE5, 0x58, 0x5, 0x07, 0x24}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0xC5, 0xD6, 0x51, 0x2, 0x04, 0x12}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0xC4, 0xD6, 0x51, 0x2, 0x04, 0x19}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0xCB, 0xDB, 0x54, 0x3, 0x05, 0x14}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0xCB, 0xDB, 0x53, 0x3, 0x04, 0x19}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x75, 0xA4, 0xBA, 0x7, 0x0C, 0x0D}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x74, 0xA2, 0xB9, 0x7, 0x0B, 0x12}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x84, 0xB0, 0xBC, 0x9, 0x0E, 0x0E}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x83, 0xAF, 0xBB, 0x9, 0x0D, 0x14}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x6C, 0x92, 0xA7, 0x4, 0x08, 0x0A}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x6A, 0x91, 0xA6, 0x4, 0x07, 0x0D}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x78, 0x9C, 0xAC, 0x5, 0x09, 0x0B}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x77, 0x9B, 0xAB, 0x5, 0x08, 0x0E}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0xB6, 0xCA, 0x5D, 0x4, 0x06, 0x18}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0xB6, 0xC9, 0x5C, 0x4, 0x06, 0x24}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0xBE, 0xD0, 0x5E, 0x5, 0x07, 0x1A}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0xBD, 0xD0, 0x5E, 0x5, 0x06, 0x24}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0xB1, 0xC1, 0x53, 0x2, 0x04, 0x13}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0xB1, 0xC1, 0x53, 0x2, 0x03, 0x17}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0xB8, 0xC6, 0x56, 0x3, 0x04, 0x14}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0xB7, 0xC6, 0x55, 0x3, 0x04, 0x1C}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x56, 0xA3, 0x69, 0x7, 0x0D, 0x07}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x54, 0xDD, 0x67, 0x7, 0x0B, 0x09}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x61, 0xAD, 0x6C, 0x9, 0x10, 0x08}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x5F, 0xE7, 0x6A, 0x9, 0x0E, 0x0B}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x4A, 0x8F, 0x65, 0x4, 0x09, 0x06}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x48, 0xC9, 0x63, 0x4, 0x07, 0x07}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x53, 0x96, 0x69, 0x5, 0x0A, 0x06}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x51, 0xD0, 0x67, 0x5, 0x08, 0x08}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0x81, 0xA4, 0x34, 0x4, 0x06, 0x0E}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0x80, 0xA3, 0x33, 0x4, 0x06, 0x14}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0x87, 0xA9, 0x36, 0x5, 0x07, 0x10}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0x86, 0xA8, 0x35, 0x5, 0x07, 0x16}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0x7B, 0x9A, 0x32, 0x2, 0x04, 0x0C}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0x7A, 0x99, 0x31, 0x2, 0x03, 0x0E}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0x7F, 0x9D, 0x34, 0x3, 0x05, 0x0D}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0x7F, 0x9D, 0x33, 0x3, 0x04, 0x10}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x53, 0x91, 0x6E, 0x6, 0x0C, 0x08}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x51, 0x8F, 0x6D, 0x6, 0x0A, 0x0B}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x5E, 0x9B, 0x71, 0x8, 0x0E, 0x09}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x5C, 0x99, 0x6F, 0x8, 0x0C, 0x0C}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_2, 0}}, 5, 0x8D, 0xF9, 0xC9, 0x7, 0x0F, 0x06}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_2, 0}}, 5, 0x8A, 0xF6, 0xC5, 0x7, 0x0C, 0x08}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x4F, 0x84, 0x68, 0x4, 0x09, 0x07}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x4E, 0x82, 0x66, 0x4, 0x07, 0x09}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0x6E, 0x8A, 0x37, 0x3, 0x05, 0x0F}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0x6E, 0x8A, 0x36, 0x3, 0x05, 0x16}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0x74, 0x8F, 0x38, 0x4, 0x06, 0x11}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0x74, 0x8F, 0x38, 0x4, 0x06, 0x18}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0x68, 0x80, 0x32, 0x2, 0x04, 0x0E}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_2, 0}}, 4, 0xCF, 0xFF, 0x62, 0x4, 0x06, 0x10}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0x6D, 0x84, 0x34, 0x2, 0x04, 0x0E}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0x6C, 0x83, 0x33, 0x2, 0x04, 0x13}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x5D, 0xCD, 0x75, 0x6, 0x0B, 0x0A}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x5B, 0xCB, 0x73, 0x6, 0x09, 0x0D}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x68, 0xD6, 0x77, 0x7, 0x0C, 0x0B}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x66, 0xD5, 0x76, 0x7, 0x0B, 0x0E}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x50, 0xB9, 0x66, 0x3, 0x07, 0x08}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x4E, 0xB8, 0x65, 0x3, 0x06, 0x0A}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x58, 0xC0, 0x69, 0x4, 0x08, 0x09}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x57, 0xBE, 0x68, 0x4, 0x07, 0x0B}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x73, 0xA7, 0x3A, 0x3, 0x05, 0x13}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x73, 0xA6, 0x3A, 0x3, 0x05, 0x1A}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x79, 0xAB, 0x3B, 0x4, 0x06, 0x15}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x79, 0xAB, 0x3B, 0x4, 0x05, 0x1B}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x6D, 0x9D, 0x33, 0x2, 0x03, 0x0F}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x6D, 0x9C, 0x32, 0x2, 0x03, 0x14}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x71, 0xA0, 0x34, 0x2, 0x04, 0x11}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x71, 0xA0, 0x34, 0x2, 0x03, 0x14}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x5A, 0xBA, 0x7F, 0x5, 0x0A, 0x0B}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x59, 0xB9, 0x7E, 0x5, 0x09, 0x0F}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x65, 0xC3, 0x81, 0x7, 0x0B, 0x0C}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x64, 0xC2, 0x80, 0x7, 0x0A, 0x10}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x4D, 0xA7, 0x6B, 0x3, 0x06, 0x09}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x4C, 0xA6, 0x69, 0x3, 0x05, 0x0A}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x55, 0xAD, 0x6E, 0x4, 0x07, 0x09}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x54, 0xAC, 0x6C, 0x4, 0x06, 0x0C}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x68, 0x94, 0x3F, 0x3, 0x05, 0x15}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x68, 0x94, 0x3F, 0x3, 0x04, 0x1B}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x6E, 0x99, 0x40, 0x4, 0x05, 0x16}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x6D, 0x98, 0x40, 0x4, 0x05, 0x1E}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x62, 0x8A, 0x35, 0x2, 0x03, 0x11}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x62, 0x8A, 0x35, 0x2, 0x03, 0x16}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x66, 0x8E, 0x37, 0x2, 0x03, 0x11}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x66, 0x8D, 0x36, 0x2, 0x03, 0x17}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x58, 0xAC, 0x86, 0x5, 0x09, 0x0C}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x57, 0xAB, 0x85, 0x5, 0x08, 0x10}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x63, 0xB5, 0x88, 0x6, 0x0B, 0x0E}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x62, 0xB4, 0x87, 0x6, 0x0A, 0x12}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x4A, 0x99, 0x6D, 0x3, 0x06, 0x0A}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x49, 0x98, 0x6C, 0x3, 0x05, 0x0C}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x53, 0x9F, 0x70, 0x4, 0x07, 0x0B}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x52, 0x9E, 0x6F, 0x4, 0x06, 0x0D}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0x60, 0x86, 0x43, 0x3, 0x04, 0x16}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0x60, 0x86, 0x43, 0x3, 0x04, 0x1D}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0x65, 0x8B, 0x44, 0x3, 0x05, 0x18}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0x65, 0x8B, 0x44, 0x3, 0x05, 0x22}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_2133, DENSITY_2, 0}}, 4, 0xB2, 0xF9, 0x6C, 0x3, 0x05, 0x11}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_2133, DENSITY_2, 0}}, 4, 0xB1, 0xF8, 0x6C, 0x3, 0x05, 0x16}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_2133, DENSITY_4, 0}}, 4, 0xBA, 0xFF, 0x6F, 0x4, 0x06, 0x13}, + {{{VDD_135, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_2133, DENSITY_4, 0}}, 4, 0xB9, 0xFF, 0x6F, 0x4, 0x05, 0x17}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x63, 0xA3, 0x69, 0x7, 0x0D, 0x07}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x61, 0xA1, 0x67, 0x7, 0x0B, 0x09}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x6E, 0xAD, 0x6C, 0x9, 0x10, 0x08}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x6C, 0xAB, 0x6A, 0x9, 0x0E, 0x0B}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x57, 0x8F, 0x65, 0x4, 0x09, 0x06}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x55, 0x8D, 0x63, 0x4, 0x07, 0x07}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x5F, 0x96, 0x68, 0x5, 0x0A, 0x06}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x5D, 0x94, 0x67, 0x5, 0x08, 0x08}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0x99, 0xBC, 0x34, 0x4, 0x06, 0x10}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0x99, 0xBC, 0x33, 0x4, 0x06, 0x16}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0x9F, 0xC1, 0x36, 0x5, 0x07, 0x11}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0x9E, 0xC1, 0x35, 0x5, 0x07, 0x18}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0x93, 0xB2, 0x32, 0x2, 0x04, 0x0D}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0x93, 0xB1, 0x31, 0x2, 0x03, 0x0F}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0x98, 0xB6, 0x34, 0x3, 0x05, 0x0F}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0x97, 0xB5, 0x33, 0x3, 0x04, 0x12}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x5D, 0x91, 0x6E, 0x6, 0x0C, 0x08}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x5B, 0x8F, 0x6D, 0x6, 0x0A, 0x0B}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x68, 0x9B, 0x71, 0x8, 0x0E, 0x09}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x67, 0x99, 0x6F, 0x8, 0x0C, 0x0D}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_2, 0}}, 5, 0xA2, 0xF9, 0xC8, 0x7, 0x0F, 0x07}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_2, 0}}, 5, 0x9E, 0xF6, 0xC5, 0x7, 0x0C, 0x08}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x5A, 0x84, 0x68, 0x4, 0x09, 0x07}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x58, 0x82, 0x66, 0x4, 0x07, 0x09}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0x82, 0x9E, 0x37, 0x3, 0x05, 0x11}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0x81, 0x9D, 0x36, 0x3, 0x05, 0x17}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0x88, 0xA3, 0x38, 0x4, 0x06, 0x12}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0x87, 0xA2, 0x38, 0x4, 0x06, 0x1A}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0x7C, 0x94, 0x32, 0x2, 0x03, 0x0E}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0x7B, 0x93, 0x31, 0x2, 0x03, 0x12}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0x80, 0x97, 0x34, 0x2, 0x04, 0x0F}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0x80, 0x97, 0x33, 0x2, 0x04, 0x14}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x63, 0xAA, 0x74, 0x6, 0x0B, 0x0A}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x62, 0xA9, 0x73, 0x6, 0x09, 0x0D}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x6F, 0xB4, 0x77, 0x7, 0x0C, 0x0B}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x6D, 0xB2, 0x76, 0x7, 0x0B, 0x0F}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x56, 0x96, 0x66, 0x3, 0x07, 0x08}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x55, 0x95, 0x64, 0x3, 0x06, 0x0A}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x5F, 0x9D, 0x69, 0x4, 0x08, 0x09}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x5D, 0x9C, 0x68, 0x4, 0x07, 0x0B}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x73, 0x97, 0x3A, 0x3, 0x05, 0x13}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x73, 0x96, 0x3A, 0x3, 0x05, 0x1A}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x79, 0x9C, 0x3B, 0x4, 0x06, 0x15}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x78, 0x9B, 0x3B, 0x4, 0x05, 0x1B}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x6D, 0x8D, 0x33, 0x2, 0x03, 0x0F}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0x6C, 0x8D, 0x32, 0x2, 0x03, 0x14}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x71, 0x90, 0x34, 0x2, 0x04, 0x11}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0x70, 0x90, 0x34, 0x2, 0x03, 0x14}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x60, 0x9C, 0x7F, 0x5, 0x0A, 0x0B}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x5F, 0x9B, 0x7E, 0x5, 0x09, 0x0F}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x6B, 0xA6, 0x81, 0x7, 0x0B, 0x0C}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x6A, 0xA5, 0x80, 0x7, 0x0A, 0x10}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x53, 0x89, 0x6A, 0x3, 0x06, 0x09}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x52, 0x88, 0x69, 0x3, 0x05, 0x0B}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x5B, 0x90, 0x6D, 0x4, 0x07, 0x0A}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x5A, 0x8F, 0x6C, 0x4, 0x06, 0x0C}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x68, 0x87, 0x3F, 0x3, 0x05, 0x15}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x68, 0x86, 0x3F, 0x3, 0x04, 0x1A}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x6D, 0x8B, 0x40, 0x4, 0x05, 0x16}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x6D, 0x8B, 0x40, 0x4, 0x05, 0x1E}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1867, DENSITY_2, 0}}, 4, 0xC3, 0xF9, 0x6A, 0x3, 0x05, 0x10}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1867, DENSITY_2, 0}}, 4, 0xC2, 0xF9, 0x69, 0x3, 0x05, 0x14}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0x66, 0x80, 0x37, 0x2, 0x03, 0x11}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1867, DENSITY_4, 0}}, 4, 0xCA, 0xFF, 0x6C, 0x4, 0x06, 0x16}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x5D, 0x92, 0x86, 0x5, 0x09, 0x0C}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x5C, 0x91, 0x85, 0x5, 0x08, 0x10}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x68, 0x9B, 0x88, 0x6, 0x0B, 0x0E}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x67, 0x9A, 0x87, 0x6, 0x0A, 0x12}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_2133, DENSITY_2, 0}}, 5, 0x9F, 0xFD, 0xDA, 0x5, 0x0B, 0x0A}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_2133, DENSITY_2, 0}}, 5, 0x9D, 0xFB, 0xD8, 0x5, 0x09, 0x0B}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x58, 0x85, 0x70, 0x4, 0x07, 0x0B}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x57, 0x84, 0x6F, 0x4, 0x06, 0x0D}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_2133, DENSITY_2, 0}}, 4, 0xBF, 0xF4, 0x85, 0x5, 0x08, 0x15}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_2133, DENSITY_2, 0}}, 4, 0xBE, 0xF4, 0x85, 0x5, 0x08, 0x1D}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_2133, DENSITY_4, 0}}, 4, 0xCA, 0xFE, 0x87, 0x6, 0x0A, 0x18}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_2133, DENSITY_4, 0}}, 4, 0xC9, 0xFD, 0x87, 0x6, 0x09, 0x20}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_2133, DENSITY_2, 0}}, 4, 0xB1, 0xE1, 0x6C, 0x3, 0x05, 0x11}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_2133, DENSITY_2, 0}}, 4, 0xB1, 0xE1, 0x6C, 0x3, 0x05, 0x16}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_2133, DENSITY_4, 0}}, 4, 0xB9, 0xE8, 0x6F, 0x4, 0x06, 0x13}, + {{{VDD_135, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_2133, DENSITY_4, 0}}, 4, 0xB9, 0xE7, 0x6F, 0x4, 0x05, 0x17}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x6E, 0xB7, 0x76, 0x8, 0x0E, 0x06}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x6C, 0xB5, 0x74, 0x8, 0x0C, 0x09}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x7B, 0xC2, 0x79, 0xA, 0x11, 0x07}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x79, 0xC0, 0x77, 0xA, 0x0F, 0x0A}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x68, 0xA7, 0x7D, 0x5, 0x0A, 0x05}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_2, 0}}, 4, 0x66, 0xA5, 0x7B, 0x5, 0x08, 0x07}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x73, 0xB0, 0x81, 0x6, 0x0C, 0x06}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_4, 0}}, 4, 0x71, 0xAF, 0x7F, 0x6, 0x0A, 0x08}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0xC0, 0xE3, 0x3A, 0x4, 0x07, 0x0D}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0xBF, 0xE2, 0x3A, 0x4, 0x06, 0x12}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0xC6, 0xE8, 0x3C, 0x5, 0x08, 0x0E}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0xC6, 0xE8, 0x3B, 0x5, 0x07, 0x14}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0xBD, 0xDB, 0x3E, 0x3, 0x04, 0x0A}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_2, 0}}, 3, 0xBC, 0xDA, 0x3D, 0x3, 0x04, 0x0E}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0xC2, 0xDF, 0x40, 0x3, 0x05, 0x0B}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_4, 0}}, 3, 0xC2, 0xDF, 0x40, 0x3, 0x05, 0x10}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x68, 0xA2, 0x7B, 0x7, 0x0D, 0x07}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x66, 0xA1, 0x7A, 0x7, 0x0B, 0x0A}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x75, 0xAE, 0x7E, 0x9, 0x0F, 0x08}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x73, 0xAC, 0x7D, 0x9, 0x0D, 0x0C}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x62, 0x93, 0x7D, 0x4, 0x09, 0x06}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_2, 0}}, 4, 0x61, 0x92, 0x7B, 0x4, 0x07, 0x08}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x6D, 0x9C, 0x81, 0x5, 0x0A, 0x07}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_4, 0}}, 4, 0x6B, 0x9A, 0x7F, 0x5, 0x08, 0x09}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0xD3, 0xED, 0x3D, 0x4, 0x06, 0x0F}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0xD3, 0xEC, 0x3D, 0x4, 0x05, 0x14}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0xDA, 0xF2, 0x3F, 0x5, 0x07, 0x10}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0xD9, 0xF2, 0x3E, 0x5, 0x07, 0x19}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0xD0, 0xE5, 0x3E, 0x2, 0x04, 0x0D}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_2, 0}}, 3, 0xD0, 0xE5, 0x3D, 0x2, 0x04, 0x11}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0xD6, 0xE9, 0x40, 0x3, 0x05, 0x0E}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_4, 0}}, 3, 0xD5, 0xE9, 0x40, 0x3, 0x04, 0x12}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x64, 0x95, 0x83, 0x6, 0x0B, 0x08}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x63, 0x94, 0x81, 0x6, 0x0A, 0x0B}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x71, 0xA0, 0x85, 0x8, 0x0D, 0x09}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x70, 0x9F, 0x84, 0x8, 0x0C, 0x0D}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x5D, 0x86, 0x7E, 0x4, 0x08, 0x07}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_2, 0}}, 4, 0x5C, 0x85, 0x7D, 0x4, 0x07, 0x09}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x68, 0x8F, 0x82, 0x5, 0x09, 0x07}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_4, 0}}, 4, 0x66, 0x8D, 0x81, 0x5, 0x08, 0x0A}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0xB7, 0xCC, 0x41, 0x3, 0x05, 0x10}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0xB7, 0xCC, 0x41, 0x3, 0x05, 0x17}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0xBD, 0xD2, 0x42, 0x4, 0x06, 0x11}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0xBD, 0xD1, 0x42, 0x4, 0x06, 0x1A}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0xB3, 0xC5, 0x3F, 0x2, 0x04, 0x0E}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_2, 0}}, 3, 0xB3, 0xC4, 0x3F, 0x2, 0x03, 0x11}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0xB9, 0xC9, 0x41, 0x3, 0x04, 0x0E}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_4, 0}}, 3, 0xB8, 0xC9, 0x41, 0x3, 0x04, 0x14}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x62, 0x8C, 0x8E, 0x6, 0x0B, 0x0A}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x61, 0x8A, 0x8D, 0x6, 0x0A, 0x0D}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x6E, 0x96, 0x90, 0x8, 0x0C, 0x0A}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x6D, 0x95, 0x8F, 0x8, 0x0B, 0x0F}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x5B, 0x7D, 0x84, 0x4, 0x07, 0x08}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1867, DENSITY_2, 0}}, 4, 0x5A, 0x7C, 0x83, 0x4, 0x06, 0x0A}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x65, 0x85, 0x88, 0x5, 0x08, 0x08}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1867, DENSITY_4, 0}}, 4, 0x64, 0x84, 0x87, 0x5, 0x07, 0x0B}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0xA3, 0xB5, 0x47, 0x3, 0x05, 0x12}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0xA2, 0xB5, 0x47, 0x3, 0x05, 0x1A}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0xA9, 0xBA, 0x48, 0x4, 0x06, 0x14}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0xA9, 0xBA, 0x48, 0x4, 0x06, 0x1E}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x9F, 0xAE, 0x42, 0x2, 0x03, 0x0E}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1867, DENSITY_2, 0}}, 3, 0x9F, 0xAD, 0x42, 0x2, 0x03, 0x13}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0xA4, 0xB2, 0x44, 0x3, 0x04, 0x10}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1867, DENSITY_4, 0}}, 3, 0xA4, 0xB2, 0x44, 0x3, 0x04, 0x17}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x60, 0x85, 0x97, 0x6, 0x0A, 0x0B}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x5F, 0x84, 0x96, 0x6, 0x09, 0x0E}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x6C, 0x8F, 0x99, 0x7, 0x0C, 0x0C}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x6B, 0x8E, 0x98, 0x7, 0x0B, 0x11}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x58, 0x76, 0x88, 0x3, 0x07, 0x09}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_2133, DENSITY_2, 0}}, 4, 0x57, 0x75, 0x87, 0x3, 0x06, 0x0B}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x62, 0x7E, 0x8B, 0x4, 0x08, 0x09}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_2133, DENSITY_4, 0}}, 4, 0x61, 0x7D, 0x8A, 0x4, 0x07, 0x0C}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0x94, 0xA4, 0x4B, 0x3, 0x05, 0x14}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0x93, 0xA3, 0x4B, 0x3, 0x05, 0x1E}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0x9A, 0xA9, 0x4C, 0x4, 0x06, 0x16}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0x99, 0xA8, 0x4C, 0x4, 0x05, 0x1E}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0x90, 0x9C, 0x44, 0x2, 0x03, 0x0F}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_2133, DENSITY_2, 0}}, 3, 0x8F, 0x9C, 0x43, 0x2, 0x03, 0x15}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0x95, 0xA0, 0x45, 0x2, 0x04, 0x11}, + {{{VDD_135, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_2133, DENSITY_4, 0}}, 3, 0x95, 0xA0, 0x45, 0x2, 0x03, 0x16}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_1, 0}}, 3, 0x5A, 0xAD, 0xCC, 0x8, 0x0E, 0x17}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_1, 0}}, 3, 0x5B, 0x8A, 0xCD, 0x8, 0x10, 0x11}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_1, 0}}, 3, 0xC5, 0xEE, 0xCB, 0x8, 0x0E, 0x2B}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_1, 0}}, 3, 0xC5, 0xEF, 0xCC, 0x8, 0x0F, 0x1E}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_1, 0}}, 3, 0x61, 0x88, 0xCC, 0x8, 0x0E, 0x17}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_1, 0}}, 3, 0x62, 0x8A, 0xCD, 0x8, 0x10, 0x11}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_1, 0}}, 2, 0x72, 0x86, 0x66, 0x4, 0x07, 0x2C}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_1, 0}}, 2, 0x72, 0x87, 0x66, 0x4, 0x08, 0x20}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1067, DENSITY_1, 0}}, 3, 0x6D, 0x99, 0xE5, 0x9, 0x10, 0x17}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1067, DENSITY_1, 0}}, 3, 0x6E, 0x9A, 0xE6, 0x9, 0x11, 0x10}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1067, DENSITY_1, 0}}, 2, 0x8C, 0xA0, 0x73, 0x5, 0x08, 0x2B}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1067, DENSITY_1, 0}}, 2, 0x8C, 0xA1, 0x73, 0x5, 0x08, 0x1B}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_1, 0}}, 3, 0x40, 0x97, 0x62, 0x5, 0x08, 0x0E}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_1, 0}}, 4, 0x83, 0xE7, 0xC5, 0x9, 0x12, 0x0A}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_1, 0}}, 3, 0xAB, 0xD8, 0x61, 0x5, 0x08, 0x1B}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_1, 0}}, 3, 0xAC, 0xD9, 0x62, 0x5, 0x08, 0x14}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_1, 0}}, 4, 0x8E, 0xE4, 0xC3, 0x9, 0x10, 0x0E}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_1, 0}}, 4, 0x90, 0xE6, 0xC5, 0x9, 0x12, 0x0B}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_1, 0}}, 3, 0xC9, 0xF6, 0x61, 0x5, 0x08, 0x1D}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_1, 0}}, 3, 0xCA, 0xF7, 0x62, 0x5, 0x08, 0x15}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1067, DENSITY_1, 0}}, 3, 0x57, 0x88, 0x7A, 0x6, 0x0A, 0x0F}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1067, DENSITY_1, 0}}, 3, 0x58, 0x8A, 0x7B, 0x6, 0x0B, 0x0A}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1067, DENSITY_1, 0}}, 2, 0x81, 0x98, 0x3D, 0x3, 0x05, 0x1C}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1067, DENSITY_1, 0}}, 2, 0x81, 0x98, 0x3D, 0x3, 0x05, 0x12}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_1, 0}}, 3, 0x58, 0x76, 0xA8, 0x8, 0x0D, 0x1A}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_1, 0}}, 3, 0x59, 0x77, 0xA9, 0x8, 0x0E, 0x13}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_1, 0}}, 3, 0xAD, 0xC8, 0xA8, 0x8, 0x0C, 0x2E}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_1, 0}}, 3, 0xAD, 0xC8, 0xA9, 0x8, 0x0D, 0x20}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_1, 0}}, 3, 0x5D, 0x76, 0xA8, 0x8, 0x0D, 0x1A}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_1, 0}}, 3, 0x5E, 0x77, 0xA9, 0x8, 0x0E, 0x13}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_1, 0}}, 3, 0xC5, 0xE0, 0xA8, 0x8, 0x0C, 0x2F}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_1, 0}}, 3, 0xC5, 0xE0, 0xA9, 0x8, 0x0D, 0x22}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1333, DENSITY_1, 0}}, 3, 0x68, 0x85, 0xBD, 0x8, 0x0E, 0x19}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1333, DENSITY_1, 0}}, 3, 0x69, 0x86, 0xBE, 0x8, 0x0F, 0x11}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1333, DENSITY_1, 0}}, 2, 0x97, 0xA3, 0x5F, 0x4, 0x07, 0x30}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1333, DENSITY_1, 0}}, 2, 0x98, 0xA3, 0x5F, 0x4, 0x07, 0x1E}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_1, 0}}, 4, 0x83, 0xCA, 0xC7, 0x8, 0x0E, 0x10}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_1, 0}}, 4, 0x85, 0xCC, 0xC9, 0x8, 0x10, 0x0C}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_1, 0}}, 3, 0x97, 0xB6, 0x63, 0x4, 0x07, 0x1E}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_1, 0}}, 3, 0x97, 0xB7, 0x64, 0x4, 0x07, 0x16}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_1, 0}}, 4, 0x8E, 0xCA, 0xC7, 0x8, 0x0E, 0x10}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_1, 0}}, 4, 0x8F, 0xCB, 0xC9, 0x8, 0x10, 0x0C}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_1, 0}}, 3, 0xAF, 0xCF, 0x63, 0x4, 0x07, 0x20}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_1, 0}}, 3, 0xB0, 0xCF, 0x64, 0x4, 0x07, 0x17}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1333, DENSITY_1, 0}}, 4, 0xAE, 0xF2, 0xF8, 0x9, 0x10, 0x10}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1333, DENSITY_1, 0}}, 4, 0xB0, 0xF4, 0xFA, 0x9, 0x12, 0x0C}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1333, DENSITY_1, 0}}, 2, 0x8F, 0x9D, 0x3E, 0x3, 0x04, 0x1F}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1333, DENSITY_1, 0}}, 2, 0x8F, 0x9D, 0x3F, 0x3, 0x05, 0x17}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_1, 0}}, 3, 0x5D, 0x97, 0x94, 0x6, 0x0B, 0x1C}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_1, 0}}, 3, 0x5E, 0x98, 0x95, 0x6, 0x0C, 0x15}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_1, 0}}, 3, 0xB2, 0xE7, 0x93, 0x6, 0x0B, 0x34}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_1, 0}}, 3, 0xB3, 0xE7, 0x94, 0x6, 0x0B, 0x23}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_1, 0}}, 3, 0x60, 0x82, 0x94, 0x6, 0x0B, 0x1D}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_1, 0}}, 3, 0x61, 0x83, 0x95, 0x6, 0x0C, 0x15}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_1, 0}}, 3, 0xB2, 0xD3, 0x93, 0x6, 0x0B, 0x34}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_1, 0}}, 3, 0xB2, 0xD4, 0x94, 0x6, 0x0B, 0x23}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_1, FREQ_1600, DENSITY_1, 0}}, 3, 0x65, 0x78, 0xA6, 0x7, 0x0C, 0x1A}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_1, FREQ_1600, DENSITY_1, 0}}, 3, 0x66, 0x79, 0xA7, 0x7, 0x0D, 0x12}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_2, DPC_2, FREQ_1600, DENSITY_1, 0}}, 2, 0x85, 0x8C, 0x53, 0x4, 0x06, 0x31}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_8, RANKS_1, DPC_2, FREQ_1600, DENSITY_1, 0}}, 2, 0x86, 0x8C, 0x53, 0x4, 0x06, 0x1F}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_1, 0}}, 3, 0x47, 0x88, 0x60, 0x4, 0x06, 0x12}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_1, 0}}, 3, 0x48, 0x89, 0x61, 0x4, 0x07, 0x0E}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_1, 0}}, 3, 0x9C, 0xD8, 0x60, 0x4, 0x06, 0x22}, + {{{VDD_150, ECC_F, TYPE_SODIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_1, 0}}, 3, 0x9D, 0xD8, 0x60, 0x4, 0x06, 0x19}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_1, 0}}, 4, 0x94, 0xE5, 0xC0, 0x7, 0x0C, 0x12}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_1, 0}}, 4, 0x96, 0xE7, 0xC1, 0x7, 0x0E, 0x0E}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_1, 0}}, 3, 0x9C, 0xC4, 0x60, 0x4, 0x06, 0x22}, + {{{VDD_150, ECC_F, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_1, 0}}, 3, 0x9C, 0xC5, 0x60, 0x4, 0x06, 0x19}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_1, FREQ_1600, DENSITY_1, 0}}, 4, 0xA7, 0xDD, 0xEF, 0x8, 0x0E, 0x11}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_1, FREQ_1600, DENSITY_1, 0}}, 4, 0xA9, 0xDE, 0xF0, 0x8, 0x10, 0x0D}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_2, DPC_2, FREQ_1600, DENSITY_1, 0}}, 2, 0x7D, 0x88, 0x3C, 0x2, 0x04, 0x24}, + {{{VDD_150, ECC_T, TYPE_UDIMM, WIDTH_16, RANKS_1, DPC_2, FREQ_1600, DENSITY_1, 0}}, 2, 0x7D, 0x88, 0x3C, 0x2, 0x04, 0x18} +}; +const Ddr3PowerWeightEntry Ddr3WcPowerWeightTable[] = { + {{{VDD_135, ECC_F, TYPE_SODIMM, 0 , 0 , 0 , 0 , 0 , 0}}, 3, 0x87, 0xAB, 0x44, 0x5, 0x08, 0x22}, + {{{VDD_135, ECC_F, TYPE_UDIMM, 0 , 0 , 0 , 0 , 0 , 0}}, 3, 0x9F, 0xC1, 0x44, 0x5, 0x08, 0x20}, + {{{VDD_135, ECC_T, TYPE_UDIMM, 0 , 0 , 0 , 0 , 0 , 0}}, 3, 0xDA, 0xF2, 0x4D, 0x5, 0x09, 0x1E}, + {{{VDD_150, ECC_F, TYPE_SODIMM, 0 , 0 , 0 , 0 , 0 , 0}}, 3, 0xC5, 0xEF, 0xCD, 0x8, 0x10, 0x34}, + {{{VDD_150, ECC_F, TYPE_UDIMM, 0 , 0 , 0 , 0 , 0 , 0}}, 2, 0x72, 0x87, 0x67, 0x4, 0x08, 0x34}, + {{{VDD_150, ECC_T, TYPE_UDIMM, 0 , 0 , 0 , 0 , 0 , 0}}, 2, 0x98, 0xA3, 0x73, 0x5, 0x09, 0x31}, + {{{0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0}}, 2, 0x98, 0xA3, 0x73, 0x5, 0x09, 0x34} +}; + +const Lpddr3PowerWeightEntry Lpddr3PowerWeightTable[] = { + {{{VDD_120, 0, 0, WIDTH_32, RANKS_2, 0, FREQ_1333, DENSITY_4, 0}}, 5, 0xA9, 0x84, 0xEE, 0x2, 0x4, 0x6, 0x3}, + {{{VDD_120, 0, 0, WIDTH_32, RANKS_1, 0, FREQ_1333, DENSITY_4, 0}}, 5, 0x91, 0x4C, 0xEE, 0x2, 0x4, 0x5, 0x3}, + {{{VDD_120, 0, 0, WIDTH_32, RANKS_2, 0, FREQ_1600, DENSITY_4, 0}}, 5, 0xA3, 0x79, 0xE9, 0x2, 0x3, 0x7, 0x4}, + {{{VDD_120, 0, 0, WIDTH_32, RANKS_1, 0, FREQ_1600, DENSITY_4, 0}}, 5, 0x8B, 0x4A, 0xE9, 0x2, 0x3, 0x6, 0x3}, + {{{VDD_120, 0, 0, WIDTH_16, RANKS_2, 0, FREQ_1333, DENSITY_4, 0}}, 4, 0x6B, 0x56, 0xE0, 0x2, 0x3, 0x9, 0x5}, + {{{VDD_120, 0, 0, WIDTH_16, RANKS_1, 0, FREQ_1333, DENSITY_4, 0}}, 4, 0x5F, 0x3D, 0xE0, 0x2, 0x3, 0x8, 0x4}, + {{{VDD_120, 0, 0, WIDTH_16, RANKS_2, 0, FREQ_1600, DENSITY_4, 0}}, 4, 0x67, 0x4F, 0xDB, 0x2, 0x3, 0xA, 0x6}, + {{{VDD_120, 0, 0, WIDTH_16, RANKS_1, 0, FREQ_1600, DENSITY_4, 0}}, 4, 0x5B, 0x38, 0xDB, 0x2, 0x3, 0x9, 0x5} +}; +const Lpddr3PowerWeightEntry Lpddr3WcPowerWeightTable[] = { + {{{0 , 0, 0, 0 , 0 , 0, 0 , 0 , 0}}, 4, 0x6B, 0x56, 0xE0, 0x2, 0x3, 0xA, 0x6} +}; + +/** +@brief + This function configure the MC power register post training after normal mode before PCU start working. + + @param[in, out] MrcData - Include all MRC global data. + + @retval Nothing. +**/ +void +MrcPowerModesPostTraining ( + IN OUT MrcParameters *const MrcData + ) +{ + const MrcInput *Inputs; + MrcOutput *Outputs; + MrcControllerOut *ControllerOut; + MrcChannelOut *ChannelOut; + MCHBAR_CH0_CR_TC_BANK_RANK_D_STRUCT TcBankRankD; + MCDECS_CR_MCDECS_CBIT_MCMAIN_STRUCT McdecsCbit; + U32 Offset; + U8 Controller; + U8 Channel; + + Inputs = &MrcData->SysIn.Inputs; + Outputs = &MrcData->SysOut.Outputs; + for (Controller = 0; Controller < MAX_CONTROLLERS; Controller++) { + ControllerOut = &Outputs->Controller[Controller]; + for (Channel = 0; Channel < MAX_CHANNEL; Channel++) { + if (MrcChannelExist (Outputs, Channel)) { + ChannelOut = &ControllerOut->Channel[Channel]; + // + // Configure Tcpded and Tprpden + // + TcBankRankD.Data = ChannelOut->MchbarBANKRANKD; + if (Outputs->Frequency >= f1867) { + TcBankRankD.Bits.tCPDED = 2; + } + + if (Outputs->Frequency >= f2133) { + TcBankRankD.Bits.tPRPDEN = 2; + } + + Offset = MCHBAR_CH0_CR_TC_BANK_RANK_D_REG + + ((MCHBAR_CH1_CR_TC_BANK_RANK_D_REG - MCHBAR_CH0_CR_TC_BANK_RANK_D_REG) * Channel); + MrcWriteCR (MrcData, Offset, TcBankRankD.Data); + + // + // Save in MrcData structure + // + ChannelOut->MchbarBANKRANKD = TcBankRankD.Data; + } + } + } + // + // Configure Power Down CR + // + MrcPowerDownConfig (MrcData); + + // + // Initialize McDecs_CBIT + // + McdecsCbit.Data = MCDECS_CBIT_DEFAULT; + if (!Inputs->WeaklockEn) { + McdecsCbit.Bits.dis_msg_clk_gate = 1; + } + MrcWriteCrMulticast (MrcData, MCDECS_CR_MCDECS_CBIT_MCMAIN_REG, McdecsCbit.Data); + + return; +} + +/** +@brief + This function configures the power down control register. + + @param[in] - MrcData - The MRC global data. + + @retval - Nothing +**/ +void +MrcPowerDownConfig ( + IN MrcParameters *const MrcData + ) +{ + const MrcInput *Inputs; + MrcOutput *Outputs; + U32 PowerDownMode; + MCSCHEDS_CR_PM_PDWN_CONFIG_STRUCT PmPdwnConfig; + + Inputs = &MrcData->SysIn.Inputs; + Outputs = &MrcData->SysOut.Outputs; + + PmPdwnConfig.Data = 0; + PmPdwnConfig.Bits.PDWN_idle_counter = PDWN_IDLE_COUNTER; + + if (Inputs->PwdwnIdleCounter) { + PmPdwnConfig.Bits.PDWN_idle_counter = Inputs->PwdwnIdleCounter; + } + + if ((Inputs->PowerDownMode == pdmNoPowerDown) || + (Inputs->PowerDownMode == pdmAPD) || + (Inputs->PowerDownMode == pdmPPDDLLOFF) + ) { + PowerDownMode = Inputs->PowerDownMode; + } else { + PowerDownMode = pdmPPDDLLOFF; +#ifdef ULT_FLAG + if (Outputs->DdrType == MRC_DDR_TYPE_LPDDR3) { + PowerDownMode = pdmPPD; + } +#endif // ULT_FLAG + } + + PmPdwnConfig.Bits.PDWN_mode = PowerDownMode; + MrcWriteCR (MrcData, MCSCHEDS_CR_PM_PDWN_CONFIG_REG, PmPdwnConfig.Data); + + return; +} + +/** +@brief + This functions sets power weight, scale factor and Channel + Power Floor values from lookup table based on DIMMs present in + the system. + + @param[in] MrcData - Include all MRC global data. + + @retval MrcStatus - mrcSuccess or reason for failure. +**/ +MrcStatus +MrcPowerWeight ( + IN MrcParameters *const MrcData + ) +{ + const MrcInput *Inputs; + const MrcControllerIn *ControllerIn; + const MrcDimmIn *DimmIn; + const MrcSpd *Spd; + const MrcDebug *Debug; + MrcOutput *Outputs; + MrcControllerOut *ControllerOut; + MrcDimmOut *DimmOut; + U8 Controller; + U8 Channel; + U8 Dimm; + const Ddr3PowerWeightEntry *Ddr3Pwt[2]; + const Lpddr3PowerWeightEntry *Lpddr3Pwt[2]; + U16 PwtSize[2]; + PowerWeightInputs DimmPwt; + U8 i; + U16 j; + BOOL DimmEntryFound; + BOOL EnterWc; + U8 SfDiff; + U8 MinScaleFactor; + U8 ScaleFactor[MAX_CHANNEL][MAX_DIMMS_IN_CHANNEL]; + U8 ChPwrFloor[MAX_CHANNEL][MAX_DIMMS_IN_CHANNEL]; + U32 Offset; + MCHBAR_CH0_CR_PM_DIMM_RD_ENERGY_STRUCT PmDimmRdEnergy[MAX_CHANNEL]; + MCHBAR_CH0_CR_PM_DIMM_WR_ENERGY_STRUCT PmDimmWrEnergy[MAX_CHANNEL]; + MCHBAR_CH0_CR_PM_DIMM_ACT_ENERGY_STRUCT PmDimmActEnergy[MAX_CHANNEL]; + MCHBAR_CH0_CR_PM_DIMM_PD_ENERGY_STRUCT PmDimmPdEnergy[MAX_CHANNEL]; + MCHBAR_CH0_CR_PM_DIMM_IDLE_ENERGY_STRUCT PmDimmIdleEnergy[MAX_CHANNEL]; + PCU_CR_DDR_RAPL_CHANNEL_POWER_FLOOR_PCU_STRUCT DdrRaplChannelPowerFloor; + + Inputs = &MrcData->SysIn.Inputs; + Debug = &MrcData->SysIn.Inputs.Debug; + Outputs = &MrcData->SysOut.Outputs; + MinScaleFactor = (U8) ~0; + Ddr3Pwt[0] = Ddr3PowerWeightTable; + Ddr3Pwt[1] = Ddr3WcPowerWeightTable; + Lpddr3Pwt[0] = Lpddr3PowerWeightTable; + Lpddr3Pwt[1] = Lpddr3WcPowerWeightTable; + DdrRaplChannelPowerFloor.Data = 0; + + MrcOemMemorySet((U8 *) PmDimmRdEnergy, 0, sizeof (PmDimmRdEnergy)); + MrcOemMemorySet((U8 *) PmDimmWrEnergy, 0, sizeof (PmDimmWrEnergy)); + MrcOemMemorySet((U8 *) PmDimmActEnergy, 0, sizeof (PmDimmActEnergy)); + MrcOemMemorySet((U8 *) PmDimmPdEnergy, 0, sizeof (PmDimmPdEnergy)); + MrcOemMemorySet((U8 *) PmDimmIdleEnergy, 0, sizeof (PmDimmIdleEnergy)); + MrcOemMemorySet((U8 *) ScaleFactor, (U32) ~0, sizeof (ScaleFactor)); + MrcOemMemorySet((U8 *) ChPwrFloor, (U32) 0, sizeof (ChPwrFloor)); + + if (Outputs->DdrType == MRC_DDR_TYPE_LPDDR3) { + PwtSize[0] = sizeof (Lpddr3PowerWeightTable) / sizeof (Lpddr3PowerWeightEntry); + PwtSize[1] = sizeof (Lpddr3WcPowerWeightTable) / sizeof (Lpddr3PowerWeightEntry); + } else { + PwtSize[0] = sizeof (Ddr3PowerWeightTable) / sizeof (Ddr3PowerWeightEntry); + PwtSize[1] = sizeof (Ddr3WcPowerWeightTable) / sizeof (Ddr3PowerWeightEntry); + } + + if (Inputs->MemoryProfile != USER_PROFILE) { + for (Controller = 0; Controller < MAX_CONTROLLERS; Controller++) { + ControllerOut = &Outputs->Controller[Controller]; + ControllerIn = &Inputs->Controller[Controller]; + for (Channel = 0; Channel < MAX_CHANNEL; Channel++) { + if (MrcChannelExist (Outputs, Channel)) { + // + // Collect Channel level data for lookup + // + for (Dimm = 0; Dimm < MAX_DIMMS_IN_CHANNEL; Dimm++) { + DimmOut = &ControllerOut->Channel[Channel].Dimm[Dimm]; + DimmIn = &ControllerIn->Channel[Channel].Dimm[Dimm]; + if (DimmOut->Status == DIMM_PRESENT) { + EnterWc = FALSE; + DimmPwt.Data = 0; + // + // Collect DIMM level data for lookup + // + + Spd = &DimmIn->Spd; + + switch (Outputs->VddVoltage[Inputs->MemoryProfile]) { + case VDD_1_20: + DimmPwt.Bits.Vddq = VDD_120; + break; + + case VDD_1_35: + DimmPwt.Bits.Vddq = VDD_135; + break; + + case VDD_1_50: + DimmPwt.Bits.Vddq = VDD_150; + break; + + default: + DimmPwt.Bits.Vddq = VDD_OTHER; + EnterWc = TRUE; + break; + } + + DimmPwt.Bits.Ecc = DimmOut->EccSupport; + DimmPwt.Bits.DimmType = DimmOut->ModuleType; + DimmPwt.Bits.DeviceWidth = DimmOut->SdramWidthIndex; + DimmPwt.Bits.NumOfRanks = DimmOut->RankInDIMM; + DimmPwt.Bits.Dpc = ControllerOut->Channel[Channel].DimmCount; + + switch (Outputs->Frequency) { + case f1067: + DimmPwt.Bits.Frequency = FREQ_1067; + break; + + case f1333: + DimmPwt.Bits.Frequency = FREQ_1333; + break; + + case f1600: + DimmPwt.Bits.Frequency = FREQ_1600; + break; + + case f1867: + DimmPwt.Bits.Frequency = FREQ_1867; + break; + + case f2133: + DimmPwt.Bits.Frequency = FREQ_2133; + break; + + default: + EnterWc = TRUE; + break; + } + + DimmPwt.Bits.DramDensity = DimmOut->DensityIndex; + + if (Outputs->DdrType == MRC_DDR_TYPE_LPDDR3) { + DimmPwt.Bits.Ecc = 0; + DimmPwt.Bits.DimmType = 0; + DimmPwt.Bits.Dpc = 0; + } + + // + // Search lookup table for DIMM entry + // + DimmEntryFound = FALSE; + for (i = 0; i < sizeof (PwtSize) / sizeof (PwtSize[0]); i++) { + if (i == 0) { + if (EnterWc) { + continue; + } + } else if (i == 1) { + if (!DimmEntryFound) { + DimmPwt.Bits.DeviceWidth = 0; + DimmPwt.Bits.NumOfRanks = 0; + DimmPwt.Bits.Dpc = 0; + DimmPwt.Bits.Frequency = 0; + DimmPwt.Bits.DramDensity = 0; + } else { + continue; + } + } + for (j = 0; j < PwtSize[i]; j++) { + if (Outputs->DdrType == MRC_DDR_TYPE_LPDDR3) { + if (DimmPwt.Data == Lpddr3Pwt[i][j].PwInput.Data || + (i == 1 && j == PwtSize[i] - 1)) { + PmDimmRdEnergy[Channel].Data8[Dimm] = Lpddr3Pwt[i][j].RdCr; + PmDimmWrEnergy[Channel].Data8[Dimm] = Lpddr3Pwt[i][j].WrCr; + PmDimmActEnergy[Channel].Data8[Dimm] = Lpddr3Pwt[i][j].ActCr; + PmDimmPdEnergy[Channel].Data8[Dimm] = Lpddr3Pwt[i][j].CkeL; + PmDimmIdleEnergy[Channel].Data8[Dimm] = Lpddr3Pwt[i][j].CkeH; + ScaleFactor[Channel][Dimm] = Lpddr3Pwt[i][j].ScaleFactor; + ChPwrFloor[Channel][Dimm] = (ControllerOut->ChannelCount == 1) + ? Lpddr3Pwt[i][j].OneChPwrFloor + : Lpddr3Pwt[i][j].TwoChPwrFloor; + MinScaleFactor = MIN (MinScaleFactor, ScaleFactor[Channel][Dimm]); + DimmEntryFound = TRUE; + break; + } + } else { + if (DimmPwt.Data == Ddr3Pwt[i][j].PwInput.Data || + (i == 1 && j == PwtSize[i] - 1)) { + PmDimmRdEnergy[Channel].Data8[Dimm] = Ddr3Pwt[i][j].RdCr; + PmDimmWrEnergy[Channel].Data8[Dimm] = Ddr3Pwt[i][j].WrCr; + PmDimmActEnergy[Channel].Data8[Dimm] = Ddr3Pwt[i][j].ActCr; + PmDimmPdEnergy[Channel].Data8[Dimm] = Ddr3Pwt[i][j].CkeL; + PmDimmIdleEnergy[Channel].Data8[Dimm] = Ddr3Pwt[i][j].CkeH; + ScaleFactor[Channel][Dimm] = Ddr3Pwt[i][j].ScaleFactor; + ChPwrFloor[Channel][Dimm] = Ddr3Pwt[i][j].ChPwrFloor; + MinScaleFactor = MIN (MinScaleFactor, ScaleFactor[Channel][Dimm]); + DimmEntryFound = TRUE; + break; + } + } + } + } + } + } + } + } + } + + for (Channel = 0; Channel < MAX_CHANNEL; Channel++) { + if (MrcChannelExist (Outputs, Channel)) { + for (Dimm = 0; Dimm < MAX_DIMMS_IN_CHANNEL; Dimm++) { + DimmOut = &Outputs->Controller->Channel[Channel].Dimm[Dimm]; + if (DimmOut->Status == DIMM_PRESENT) { + // + // Set Scale Factor of all DIMMs to lowest Scale Factor and adjust weights accordingly. + // + if ((SfDiff = ScaleFactor[Channel][Dimm] - MinScaleFactor) > 0) { + PmDimmRdEnergy[Channel].Data8[Dimm] = (PmDimmRdEnergy[Channel].Data8[Dimm] + 1) >> SfDiff; + PmDimmWrEnergy[Channel].Data8[Dimm] = (PmDimmWrEnergy[Channel].Data8[Dimm] + 1) >> SfDiff; + PmDimmActEnergy[Channel].Data8[Dimm] = (PmDimmActEnergy[Channel].Data8[Dimm] + 1) >> SfDiff; + PmDimmPdEnergy[Channel].Data8[Dimm] = (PmDimmPdEnergy[Channel].Data8[Dimm] + 1) >> SfDiff; + PmDimmIdleEnergy[Channel].Data8[Dimm] = (PmDimmIdleEnergy[Channel].Data8[Dimm] + 1) >> SfDiff; + } + } + } + // + // Set RAPL Channel Power Floor to average of DIMMs rounded up to nearest integer multiple of 0.125W (which is + // going to be a multiple of 8 for Channel Power Floor Register). + // + if (Outputs->Controller->Channel[Channel].DimmCount > 1) { + if (ChPwrFloor[Channel][0] != ChPwrFloor[Channel][1]) { + ChPwrFloor[Channel][0] = (ChPwrFloor[Channel][0] + ChPwrFloor[Channel][1] + 1) / 2; + if (ChPwrFloor[Channel][0] < 0xF8) { + if ((ChPwrFloor[Channel][0] % 8) != 0) { + ChPwrFloor[Channel][0] = ChPwrFloor[Channel][0] + (8 - (ChPwrFloor[Channel][0] % 8)); + } + } else { // No more 8-bit mulitples of 8 after 0xF8, must round down. + ChPwrFloor[Channel][0] = 0xF8; + } + } + } else { + for (Dimm = 0; Dimm < MAX_DIMMS_IN_CHANNEL; Dimm++) { + ChPwrFloor[Channel][0] = MAX (ChPwrFloor[Channel][0], ChPwrFloor[Channel][Dimm]); + } + } + + // + // Apply power weights + // + Offset = MCHBAR_CH0_CR_PM_DIMM_RD_ENERGY_REG + + (MCHBAR_CH1_CR_PM_DIMM_RD_ENERGY_REG - MCHBAR_CH0_CR_PM_DIMM_RD_ENERGY_REG) * Channel; + MrcWriteCR (MrcData, Offset, PmDimmRdEnergy[Channel].Data); + Offset = MCHBAR_CH0_CR_PM_DIMM_WR_ENERGY_REG + + (MCHBAR_CH1_CR_PM_DIMM_WR_ENERGY_REG - MCHBAR_CH0_CR_PM_DIMM_WR_ENERGY_REG) * Channel; + MrcWriteCR (MrcData, Offset, PmDimmWrEnergy[Channel].Data); + Offset = MCHBAR_CH0_CR_PM_DIMM_ACT_ENERGY_REG + + (MCHBAR_CH1_CR_PM_DIMM_ACT_ENERGY_REG - MCHBAR_CH0_CR_PM_DIMM_ACT_ENERGY_REG) * Channel; + MrcWriteCR (MrcData, Offset, PmDimmActEnergy[Channel].Data); + Offset = MCHBAR_CH0_CR_PM_DIMM_PD_ENERGY_REG + + (MCHBAR_CH1_CR_PM_DIMM_PD_ENERGY_REG - MCHBAR_CH0_CR_PM_DIMM_PD_ENERGY_REG) * Channel; + MrcWriteCR (MrcData, Offset, PmDimmPdEnergy[Channel].Data); + Offset = MCHBAR_CH0_CR_PM_DIMM_IDLE_ENERGY_REG + + (MCHBAR_CH1_CR_PM_DIMM_IDLE_ENERGY_REG - MCHBAR_CH0_CR_PM_DIMM_IDLE_ENERGY_REG) * Channel; + MrcWriteCR (MrcData, Offset, PmDimmIdleEnergy[Channel].Data); + } + } + DdrRaplChannelPowerFloor.Bits.CH0 = ChPwrFloor[0][0]; + DdrRaplChannelPowerFloor.Bits.CH1 = ChPwrFloor[1][0]; + MrcWriteCR (MrcData, PCU_CR_DDR_RAPL_CHANNEL_POWER_FLOOR_PCU_REG, DdrRaplChannelPowerFloor.Data); + MrcWriteCR (MrcData, PCU_CR_DDR_ENERGY_SCALEFACTOR_PCU_REG, (U32) MinScaleFactor); + +#ifdef MRC_DEBUG_PRINT + MRC_DEBUG_MSG ( + Debug, + MSG_LEVEL_NOTE, + "Applied Power Weights:\n\tSclFctr\tRdCr\tWrCr\tActCr\tCkeL\tCkeH\tChPwrFloor\n" + ); + for (Channel = 0; Channel < MAX_CHANNEL; Channel++) { + if (MrcChannelExist (Outputs, Channel)) { + for (Dimm = 0; Dimm < MAX_DIMMS_IN_CHANNEL; Dimm++) { + DimmOut = &Outputs->Controller->Channel[Channel].Dimm[Dimm]; + if (DimmOut->Status == DIMM_PRESENT) { + MRC_DEBUG_MSG (Debug, MSG_LEVEL_NOTE, "C%dD%d:\t", Channel, Dimm); + MRC_DEBUG_MSG ( + Debug, + MSG_LEVEL_NOTE, + "%d\t%2Xh\t%2Xh\t%2Xh\t%Xh\t%2Xh\t%2Xh\n", + MinScaleFactor, + PmDimmRdEnergy[Channel].Data8[Dimm], + PmDimmWrEnergy[Channel].Data8[Dimm], + PmDimmActEnergy[Channel].Data8[Dimm], + PmDimmPdEnergy[Channel].Data8[Dimm], + PmDimmIdleEnergy[Channel].Data8[Dimm], + ChPwrFloor[Channel][0] + ); + } + } + } + } +#endif + } + + return mrcSuccess; +} |