summaryrefslogtreecommitdiff
path: root/ReferenceCode/ME/Library/Ptt/Include
diff options
context:
space:
mode:
Diffstat (limited to 'ReferenceCode/ME/Library/Ptt/Include')
-rw-r--r--ReferenceCode/ME/Library/Ptt/Include/PttHciDeviceLib.h175
-rw-r--r--ReferenceCode/ME/Library/Ptt/Include/PttHciRegs.h100
-rw-r--r--ReferenceCode/ME/Library/Ptt/Include/PttLibInc.cif9
3 files changed, 284 insertions, 0 deletions
diff --git a/ReferenceCode/ME/Library/Ptt/Include/PttHciDeviceLib.h b/ReferenceCode/ME/Library/Ptt/Include/PttHciDeviceLib.h
new file mode 100644
index 0000000..e6e92de
--- /dev/null
+++ b/ReferenceCode/ME/Library/Ptt/Include/PttHciDeviceLib.h
@@ -0,0 +1,175 @@
+/** @file
+ Platform Trust Technology (FTPM) HCI Device Library
+
+@copyright
+ Copyright (c) 2012 -2013 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains an 'Intel Peripheral Driver' and uniquely
+ identified as "Intel Reference Module" and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+**/
+#ifndef _PTT_HCI_DEVICE_LIB_H_
+#define _PTT_HCI_DEVICE_LIB_H_
+
+#ifdef PTT_FLAG
+
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueBase.h"
+#endif
+
+///
+/// Default Timeout values
+/// @todo these values should be adjusted on actual silicon after power-on
+///
+#define PTT_HCI_TIMEOUT_A 500 ///< 500 microseconds
+// AMI-Core Override for PTT +
+//#define PTT_HCI_TIMEOUT_B 10 * 1000 ///< 10ms (max command processing time in PK-TPM ca. 3ms)
+#define PTT_HCI_TIMEOUT_B 500 * 1000 ///< 10ms (max command processing time in PK-TPM ca. 3ms)
+// AMI-Core Override for PTT -
+#define PTT_HCI_TIMEOUT_C 1000 * 1000 ///< 1s
+#define PTT_HCI_TIMEOUT_D 500 * 1000 ///< 500 ms
+#define PTT_HCI_POLLING_PERIOD 140 ///< Poll register every 140 microsecondss
+
+/// TPM2_RESPONSE_HEADER size (10B) aligned to dword
+#define PTT_HCI_RESPONSE_HEADER_SIZE 12 ///< 12B
+
+/**
+ Checks whether FTPM is enabled (FTPM_STS::FTPM_EN).
+
+ @retval TRUE FTPM is enabled.
+ @retval FALSE FTPM is disabled. All LT writes will be dropped.
+ All LT reads will be returned with read data value of all 0's.
+ The bit can only be written once per ME power cycle.
+**/
+BOOLEAN
+EFIAPI
+PttHciPresenceCheck (
+ VOID
+ );
+
+/**
+ Checks whether TPM2_Startup command has been executed (FTPM_STS::STARTUP_EXEC).
+ If command was executed, it should not be redundantly issued again.
+
+ @retval TRUE Startup command executed already.
+ @retval FALSE Startup command not executed yet.
+**/
+BOOLEAN
+EFIAPI
+PttHciStartupExecuted (
+ VOID
+ );
+
+/**
+ Sets FTPM_CMD and CA_START register to a defined value to indicate that a command is
+ available for processing.
+ Any host write to this register shall result in an interrupt to the ME firmware.
+
+ @retval EFI_SUCCESS Register successfully written.
+ @retval TBD
+**/
+EFI_STATUS
+EFIAPI
+PttHciRequestCommandExec (
+ VOID
+ );
+
+/**
+ Checks whether the value of a FTPM register satisfies the input BIT setting.
+
+ @param[in] Register Address port of register to be checked.
+ @param[in] BitSet Check these data bits are set.
+ @param[in] BitClear Check these data bits are clear.
+ @param[in] TimeOut The max wait time (unit MicroSecond) when checking register.
+
+ @retval EFI_SUCCESS The register satisfies the check bit.
+ @retval EFI_TIMEOUT The register can't run into the expected status in time.
+**/
+EFI_STATUS
+EFIAPI
+PttHciWaitRegisterBits(
+ IN EFI_PHYSICAL_ADDRESS RegAddress,
+ IN UINT32 BitSet,
+ IN UINT32 BitClear,
+ IN UINT32 TimeOut
+ );
+
+/**
+ Sends command to FTPM for execution.
+
+ @param[in] FtpmBuffer Buffer for TPM command data.
+ @param[in] DataLength TPM command data length.
+
+ @retval EFI_SUCCESS Operation completed successfully.
+ @retval EFI_TIMEOUT The register can't run into the expected status in time.
+**/
+EFI_STATUS
+EFIAPI
+PttHciSend(
+ IN UINT8 *FtpmBuffer,
+ IN UINT32 DataLength
+ );
+
+/**
+ Receives response data of last command from FTPM.
+
+ @param[out] FtpmBuffer Buffer for response data.
+ @param[out] RespSize Response data length.
+
+ @retval EFI_SUCCESS Operation completed successfully.
+ @retval EFI_TIMEOUT The register can't run into the expected status in time.
+ @retval EFI_DEVICE_ERROR Unexpected device status.
+ @retval EFI_BUFFER_TOO_SMALL Response data is too long.
+**/
+EFI_STATUS
+EFIAPI
+PttHciReceive(
+ OUT UINT8 *FtpmBuffer,
+ OUT UINT32 *RespSize
+ );
+
+/**
+ Sends formatted command to FTPM for execution and returns formatted response data.
+
+ @param[in] InputBuffer Buffer for the input data.
+ @param[in] InputBufferSize Size of the input buffer.
+ @param[out] ReturnBuffer Buffer for the output data.
+ @param[out] ReturnBufferSize Size of the output buffer.
+
+ @retval EFI_SUCCESS Operation completed successfully.
+ @retval EFI_TIMEOUT The register can't run into the expected status in time.
+**/
+EFI_STATUS
+EFIAPI
+PttHciSubmitCommand(
+ IN UINT8 *InputBuffer,
+ IN UINT32 InputBufferSize,
+ OUT UINT8 *ReturnBuffer,
+ OUT UINT32 *ReturnBufferSize
+ );
+
+/**
+ Checks whether PTT is Ready
+
+ @retval TRUE PTT is ready.
+ @retval FALSE PTT is not ready
+
+**/
+BOOLEAN
+EFIAPI
+PttHciReadyCheck (
+ VOID
+ );
+
+#endif // PTT_FLAG
+#endif
diff --git a/ReferenceCode/ME/Library/Ptt/Include/PttHciRegs.h b/ReferenceCode/ME/Library/Ptt/Include/PttHciRegs.h
new file mode 100644
index 0000000..cba0c8a
--- /dev/null
+++ b/ReferenceCode/ME/Library/Ptt/Include/PttHciRegs.h
@@ -0,0 +1,100 @@
+/** @file
+ Register definitions for PTT HCI (Platform Trust Technology - Host Controller Interface).
+
+ Conventions:
+
+ - Prefixes:
+ Definitions beginning with "R_" are registers
+ Definitions beginning with "B_" are bits within registers
+ Definitions beginning with "V_" are meaningful values of bits within the registers
+ Definitions beginning with "S_" are register sizes
+ Definitions beginning with "N_" are the bit position
+
+@copyright
+ Copyright (c) 2012 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains an 'Intel Peripheral Driver' and uniquely
+ identified as "Intel Reference Module" and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+**/
+#ifndef _PTT_HCI_REGS_H_
+#define _PTT_HCI_REGS_H_
+
+#ifdef PTT_FLAG
+
+///
+/// FTPM HCI register base address
+///
+#define R_PTT_HCI_BASE_ADDRESS 0xFED70000
+
+//
+// FTPM HCI Control Area
+//
+#define R_PTT_HCI_CA_RSVD 0x00
+#define R_PTT_HCI_CA_ERROR 0x04
+#define R_PTT_HCI_CA_CANCEL 0x08
+#define R_PTT_HCI_CA_START 0x0C
+#define R_PTT_HCI_CA_INT_RSVD 0x10
+#define R_PTT_HCI_CA_CMD_SZ 0x18
+#define R_PTT_HCI_CA_CMD 0x1C
+#define R_PTT_HCI_CA_RSP_SZ 0x24
+#define R_PTT_HCI_CA_RSP 0x28
+
+//
+// FTPM HCI Private Area
+//
+#define R_PTT_HCI_CMD 0x40
+#define R_PTT_HCI_STS 0x44
+
+///
+/// FTPM HCI Command and Response Buffer
+///
+#define R_PTT_HCI_CRB 0x80
+
+//
+// R_PTT_HCI_STS Flags
+//
+#define B_PTT_HCI_STS_ENABLED 0x00000001 ///< BIT0
+#define B_PTT_HCI_STS_READY 0x00000002 ///< BIT1
+#define B_PTT_HCI_STS_ACM_AS_CRTM 0x00000004 ///< BIT2
+#define B_PTT_HCI_STS_STARTUP_EXEC 0x00000008 ///< BIT3
+
+//
+// Value written to R_PTT_HCI_CMD and CA_START
+// to indicate that a command is available for processing
+//
+#define V_PTT_HCI_COMMAND_AVAILABLE_START 0x00000001
+#define V_PTT_HCI_COMMAND_AVAILABLE_CMD 0x00000000
+#define V_PTT_HCI_BUFFER_ADDRESS_RDY 0x00000003
+
+///
+/// Ignore bit setting mask for WaitRegisterBits
+///
+#define V_PTT_HCI_IGNORE_BITS 0x00000000
+
+///
+/// All bits clear mask for WaitRegisterBits
+///
+#define V_PTT_HCI_ALL_BITS_CLEAR 0xFFFFFFFF
+#define V_PTT_HCI_START_CLEAR 0x00000001
+
+///
+/// Max FTPM command/reponse buffer length
+///
+#define S_PTT_HCI_CRB_LENGTH 3968 ///< 0xFED70080:0xFED70FFF = 3968 Bytes
+// AMI-Core Override for PTT +
+#define PM_BASE_ADDRESS 0x1800
+// AMI-Core Override for PTT -
+
+#endif // PTT_FLAG
+#endif
diff --git a/ReferenceCode/ME/Library/Ptt/Include/PttLibInc.cif b/ReferenceCode/ME/Library/Ptt/Include/PttLibInc.cif
new file mode 100644
index 0000000..a444f07
--- /dev/null
+++ b/ReferenceCode/ME/Library/Ptt/Include/PttLibInc.cif
@@ -0,0 +1,9 @@
+<component>
+ name = "PttLibrary Include"
+ category = ModulePart
+ LocalRoot = "ReferenceCode\Me\Library\Ptt\Include"
+ RefName = "PttLibInc"
+[files]
+"PttHciDeviceLib.h"
+"PttHciRegs.h"
+<endComponent>