diff options
Diffstat (limited to 'ReferenceCode/ME/Ppi')
| -rw-r--r-- | ReferenceCode/ME/Ppi/AmtPlatformPolicyPei/AmtPlatformPolicyPei.c | 31 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/AmtPlatformPolicyPei/AmtPlatformPolicyPei.h | 77 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/AmtStatusCode/AmtStatusCode.c | 30 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/AmtStatusCode/AmtStatusCode.h | 120 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/Heci/Heci.c | 31 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/Heci/Heci.h | 201 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/MeLibPpi.cif | 22 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/MeLibPpi.inf | 59 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/MeLibPpi.mak | 43 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/MeLibPpi.sdl | 34 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/MePlatformPolicyPei/MePlatformPolicyPei.c | 31 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/MePlatformPolicyPei/MePlatformPolicyPei.h | 58 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/PchMeUma/PchMeUma.c | 42 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/PchMeUma/PchMeUma.h | 159 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/PlatformMeHook/PlatformMeHook.c | 42 | ||||
| -rw-r--r-- | ReferenceCode/ME/Ppi/PlatformMeHook/PlatformMeHook.h | 70 |
16 files changed, 1050 insertions, 0 deletions
diff --git a/ReferenceCode/ME/Ppi/AmtPlatformPolicyPei/AmtPlatformPolicyPei.c b/ReferenceCode/ME/Ppi/AmtPlatformPolicyPei/AmtPlatformPolicyPei.c new file mode 100644 index 0000000..86e3155 --- /dev/null +++ b/ReferenceCode/ME/Ppi/AmtPlatformPolicyPei/AmtPlatformPolicyPei.c @@ -0,0 +1,31 @@ +/** @file + AMT Platform Policy for AMT PEIMs + +@copyright + Copyright (c) 2010 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement +**/ + +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGluePeim.h" +#include EFI_PPI_DEFINITION (AmtPlatformPolicyPei) +#endif + +EFI_GUID gPeiAmtPlatformPolicyPpiGuid = PEI_AMT_PLATFORM_POLICY_PPI_GUID; + +EFI_GUID_STRING(&gPeiAmtPlatformPolicyPpiGuid, "PeiAmtPlatformPolicyPpi", "PEI Amt Platform Policy PPI"); diff --git a/ReferenceCode/ME/Ppi/AmtPlatformPolicyPei/AmtPlatformPolicyPei.h b/ReferenceCode/ME/Ppi/AmtPlatformPolicyPei/AmtPlatformPolicyPei.h new file mode 100644 index 0000000..d41d187 --- /dev/null +++ b/ReferenceCode/ME/Ppi/AmtPlatformPolicyPei/AmtPlatformPolicyPei.h @@ -0,0 +1,77 @@ +/** @file + AMT Platform Policy for AMT PEIMs + +@copyright + Copyright (c) 2008 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement +**/ +#ifndef _PEI_AMT_PLATFORM_POLICY_PPI_H_ +#define _PEI_AMT_PLATFORM_POLICY_PPI_H_ + +// +// Include other definitions +// +/// +/// Intel AMT Platform Policy PPI GUID +/// This PPI provides an interface to get the current Intel AMT SKU information +/// +#define PEI_AMT_PLATFORM_POLICY_PPI_GUID \ + { \ + 0xb4a1208e, 0x4d9a, 0x4ea2, 0x9d, 0x6b, 0xe4, 0x1a, 0x61, 0xe6, 0xc5, 0xac \ + } + +// +// Extern the GUID for PPI users. +// +extern EFI_GUID gPeiAmtPlatformPolicyPpiGuid; + +/// +/// Revision +/// +#define PEI_AMT_PLATFORM_POLICY_PPI_REVISION_1 1 +/// +/// Add AsfEnabled, and ManageabilityMode +/// +#define PEI_AMT_PLATFORM_POLICY_PPI_REVISION_2 2 +/// +/// Added FWProgress +/// +#define PEI_AMT_PLATFORM_POLICY_PPI_REVISION_3 3 +/// +/// Cleanup +/// +#define PEI_AMT_PLATFORM_POLICY_PPI_REVISION_4 4 +/// +/// Cleanup +/// +#define PEI_AMT_PLATFORM_POLICY_PPI_REVISION_5 5 + +/// +/// Intel AMT Platform Policy PPI +/// The Intel AMT Platform Policy PPI returns the Intel ME feature set in PEI phase +/// +typedef struct _PEI_AMT_PLATFORM_POLICY_PPI { + UINT8 Revision; ///< Policy structure revision number + UINT8 iAmtEnabled : 1; ///< Intel AMT features enabled/disable + UINT8 WatchDog : 1; ///< Asf Watch Dog timer message enabled/disable + UINT8 Reserved : 1; + UINT8 AsfEnabled : 1; ///< Asf features enable/disable + UINT8 ManageabilityMode : 1; ///< Manageability Mode, 0: Off, 1:On + UINT8 Reserved1 : 1; + UINT16 WatchDogTimerOs; ///< Watch Dog timeout value for OS + UINT16 WatchDogTimerBios; ///< Watch Dog timeout value for BIOS + UINT8 FWProgress; ///< Progress Event option enable/disable +} PEI_AMT_PLATFORM_POLICY_PPI; + +#endif diff --git a/ReferenceCode/ME/Ppi/AmtStatusCode/AmtStatusCode.c b/ReferenceCode/ME/Ppi/AmtStatusCode/AmtStatusCode.c new file mode 100644 index 0000000..c1f850e --- /dev/null +++ b/ReferenceCode/ME/Ppi/AmtStatusCode/AmtStatusCode.c @@ -0,0 +1,30 @@ +/** @file + AMT Status Code support at PEI phase + +@copyright + Copyright (c) 2010 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement +**/ +#include "Tiano.h" +#include "Pei.h" + +#include EFI_PPI_DEFINITION (AmtStatusCode) + +EFI_GUID gPeiAmtStatusCodePpiGuid = PEI_AMT_STATUS_CODE_PPI_GUID; +EFI_GUID gAmtPetQueueHobGuid = AMT_PET_QUEUE_HOB_GUID; +EFI_GUID gAmtForcePushPetHobGuid = AMT_FORCE_PUSH_PET_HOB_GUID; + +EFI_GUID_STRING(&gPeiAmtStatusCodePpiGuid, "PEI AMT Status Code PPI", "PEI AMT Status Code PPI"); +EFI_GUID_STRING(&gAmtPetQueueHobGuid, "PEI AMT PET Queue Hob", "PEI AMT PET Queue Hob"); +EFI_GUID_STRING(&gAmtForcePushPetHobGuid, "PEI AMT Force Push PET Hob", "PEI AMT Force Push PET Hob"); diff --git a/ReferenceCode/ME/Ppi/AmtStatusCode/AmtStatusCode.h b/ReferenceCode/ME/Ppi/AmtStatusCode/AmtStatusCode.h new file mode 100644 index 0000000..733a57f --- /dev/null +++ b/ReferenceCode/ME/Ppi/AmtStatusCode/AmtStatusCode.h @@ -0,0 +1,120 @@ +/** @file + Header file for AMT Status Code support at PEI phase + +@copyright + Copyright (c) 2010 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement +**/ +#ifndef _PEI_AMT_STATUS_CODE_PPI_H_ +#define _PEI_AMT_STATUS_CODE_PPI_H_ + +/// +/// Intel AMT PEI Status Code PPI GUID +/// This driver produces interface to let PEI Status Code generic driver report status to +/// Intel AMT, so that Intel AMT PET message can be sent out in PEI phase. +/// +#define PEI_AMT_STATUS_CODE_PPI_GUID \ + { \ + 0x881807d2, 0x98d1, 0x4ec9, 0xaf, 0xa0, 0x77, 0x46, 0xc4, 0x2f, 0x24, 0x49 \ + } + +extern EFI_GUID gPeiAmtStatusCodePpiGuid; + +EFI_FORWARD_DECLARATION (PEI_AMT_STATUS_CODE_PPI); + +/** + Provides an interface that a software module can call to report an ASF PEI status code. + The extension to report status code to Intel AMT, so that Intel AMT PET message will + be sent out in PEI. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] This This interface. + @param[in] Type Indicates the type of status code being reported. + @param[in] Value Describes the current status of a hardware or software entity. + This included information about the class and subclass that is + used to classify the entity as well as an operation. + @param[in] Instance The enumeration of a hardware or software entity within + the system. Valid instance numbers start with 1. + @param[in] CallerId This optional parameter may be used to identify the caller. + This parameter allows the status code driver to apply different + rules to different callers. + @param[in] Data This optional parameter may be used to pass additional data. + + @retval EFI_SUCCESS The function completed successfully + @retval EFI_DEVICE_ERROR The function should not be completed due to a device error. +**/ +typedef +EFI_STATUS +(EFIAPI *PEI_AMT_STATUS_CODE_PPI_REPORT_STATUS_CODE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_AMT_STATUS_CODE_PPI *This, + IN EFI_STATUS_CODE_TYPE Type, + IN EFI_STATUS_CODE_VALUE Value, + IN UINT32 Instance, + IN EFI_GUID *CallerId OPTIONAL, + IN EFI_STATUS_CODE_DATA *Data OPTIONAL + ) +; + +/// +/// Intel AMT PEI Status Code PPI +/// The PEI platform status code driver should be responsible to use this interface to report +/// status code to Intel AMT. For example, memory init, memory init done, chassis intrusion. +/// So that Intel AMT driver will send corresponding PET message out. +/// +struct _PEI_AMT_STATUS_CODE_PPI { + /// + /// The extension to report status code to Intel AMT, so that Intel AMT PET message will + /// be sent out in PEI. + /// + PEI_AMT_STATUS_CODE_PPI_REPORT_STATUS_CODE ReportStatusCode; +}; + +/// +/// Queue Hob. +/// This hob is used by PEI Status Code generic driver before Intel AMT PEI status code driver +/// starts. +/// 1) If AMT driver is not ready yet, StatusCode driver can save information +/// to QueueHob. +/// 2) If after AMT driver start, but ME is not ready, the AMT +/// driver can also save information to QueueHob. +/// Later, when ME is ready, AMT driver will send all the +/// message in the QueueHob. +/// +typedef struct { + EFI_HOB_GUID_TYPE EfiHobGuidType; ///< The GUID type hob header + EFI_STATUS_CODE_VALUE Value; ///< Status code value + EFI_STATUS_CODE_TYPE Type; ///< Status code type +} AMT_PET_QUEUE_HOB; + +#define AMT_PET_QUEUE_HOB_GUID \ + { \ + 0xca0801d3, 0xafb1, 0x4dec, 0x9b, 0x65, 0x93, 0x65, 0xec, 0xc7, 0x93, 0x6b \ + } + +extern EFI_GUID gAmtPetQueueHobGuid; + +#define AMT_FORCE_PUSH_PET_HOB_GUID \ + { \ + 0x4efa0db6, 0x26dc, 0x4bb1, 0xa7, 0x6f, 0x14, 0xbc, 0x63, 0x0c, 0x7b, 0x3c \ + } + +typedef struct { + EFI_HOB_GUID_TYPE EfiHobGuidType; + INT32 MessageType; +} AMT_FORCE_PUSH_PET_HOB; + +extern EFI_GUID gAmtForcePushPetHobGuid; + +#endif diff --git a/ReferenceCode/ME/Ppi/Heci/Heci.c b/ReferenceCode/ME/Ppi/Heci/Heci.c new file mode 100644 index 0000000..9b600a7 --- /dev/null +++ b/ReferenceCode/ME/Ppi/Heci/Heci.c @@ -0,0 +1,31 @@ +/** @file + PEI Heci PPI + +@copyright + Copyright (c) 2006 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement +**/ + +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGluePeim.h" +#include EFI_PPI_DEFINITION (Heci) +#endif + +EFI_GUID gPeiHeciPpiGuid = PEI_HECI_PPI_GUID; + +EFI_GUID_STRING(&gPeiHeciPpiGuid, "PEI Heci PPI", "PEI Heci PPI"); diff --git a/ReferenceCode/ME/Ppi/Heci/Heci.h b/ReferenceCode/ME/Ppi/Heci/Heci.h new file mode 100644 index 0000000..2f026b3 --- /dev/null +++ b/ReferenceCode/ME/Ppi/Heci/Heci.h @@ -0,0 +1,201 @@ +/** @file + PEI Heci PPI + +@copyright + Copyright (c) 2006 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement + +**/ +#ifndef _PEI_HECI_PPI_H_ +#define _PEI_HECI_PPI_H_ + +#include "MeState.h" + +/// +/// HECI PPI GUID +/// This PPI provides an interface to communicate with Intel ME in PEI phase +/// +#define PEI_HECI_PPI_GUID \ + { \ + 0xEE0EA811, 0xFBD9, 0x4777, 0xB9, 0x5A, 0xBA, 0x4F, 0x71, 0x10, 0x1F, 0x74 \ + } + +extern EFI_GUID gPeiHeciPpiGuid; + +EFI_FORWARD_DECLARATION (PEI_HECI_PPI); + +/** + Function sends one messsage through the HECI circular buffer and waits + for the corresponding ACK message. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] This The address of HECI PPI. + @param[in][out] Message Pointer to the message buffer. + @param[in] HeciMemBar HECI Memory BAR. + @param[in][out] Length Length of the message in bytes. + @param[in] HostAddress Address of the sending entity. + @param[in] MeAddress Address of the ME entity that should receive the message. + + @retval EFI_SUCCESS Command succeeded + @retval EFI_DEVICE_ERROR HECI Device error, command aborts abnormally + @retval EFI_TIMEOUT HECI does not return the bufferbefore timeout + @retval EFI_BUFFER_TOO_SMALL Message Buffer is too small for the Acknowledge + @exception EFI_UNSUPPORTED Current ME mode doesn't support send message through HECI +**/ +typedef +EFI_STATUS +(EFIAPI *PEI_HECI_SENDWACK) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_HECI_PPI *This, + IN OUT UINT32 *Message, + IN UINT32 HeciMemBar, + IN OUT UINT32 *Length, + IN UINT8 HostAddress, + IN UINT8 MeAddress + ); + +/** + Read the HECI Message from Intel ME with size in Length into + buffer Message. Set Blocking to BLOCKING and code will wait + until one message packet is received. When set to + NON_BLOCKING, if the circular buffer is empty at the time, the + code not wait for the message packet read. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] This The address of HECI PPI. + @param[in] HeciMemBar HECI Memory BAR. + @param[in] Blocking Used to determine if the read is BLOCKING or NON_BLOCKING. + @param[in] MessageBody Pointer to a buffer used to receive a message. + @param[in][out] Length Pointer to the length of the buffer on input and the length + of the message on return. (in bytes) + + @exception EFI_UNSUPPORTED Current ME mode doesn't support this function + @retval EFI_SUCCESS One message packet read + @retval EFI_TIMEOUT HECI is not ready for communication + @retval EFI_DEVICE_ERROR Zero-length message packet read + @retval EFI_BUFFER_TOO_SMALL The caller's buffer was not large enough +**/ +typedef +EFI_STATUS +(EFIAPI *PEI_HECI_READ_MESSAGE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_HECI_PPI *This, + IN UINT32 Blocking, + IN UINT32 HeciMemBar, + IN UINT32 *MessageBody, + IN OUT UINT32 *Length + ); + +/** + Function sends one messsage (of any length) through the HECI circular buffer. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] This The address of HECI PPI. + @param[in] HeciMemBar HECI Memory BAR. + @param[in] Message Pointer to the message data to be sent. + @param[in] Length Length of the message in bytes. + @param[in] HostAddress The address of the host processor. + @param[in] MeAddress Address of the ME subsystem the message is being sent to. + + @retval EFI_SUCCESS One message packet sent. + @retval EFI_DEVICE_ERROR Failed to initialize HECI + @retval EFI_TIMEOUT HECI is not ready for communication + @exception EFI_UNSUPPORTED Current ME mode doesn't support send message through HEC +**/ +typedef +EFI_STATUS +(EFIAPI *PEI_HECI_SEND_MESSAGE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_HECI_PPI *This, + IN UINT32 *Message, + IN UINT32 HeciMemBar, + IN UINT32 Length, + IN UINT8 HostAddress, + IN UINT8 MEAddress + ); + +/** + Determines if the HECI device is present and, if present, initializes it for + use by the BIOS. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] This The address of HECI PPI + @param[in][out] HeciMemBar HECI Memory BAR + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_DEVICE_ERROR No HECI device + @retval EFI_TIMEOUT HECI does not return the buffer before timeout + @exception EFI_UNSUPPORTED HECI MSG is unsupported +**/ +typedef +EFI_STATUS +(EFIAPI *PEI_INITIALIZE_HECI) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_HECI_PPI *This, + IN OUT UINT32 *HeciMemBar + ); + +/** + Get an abstract Intel ME Status from Firmware Status Register. + This is used to control BIOS flow for different Intel ME + functions. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] MeStatus Pointer for status report, + see MeState.h - Abstract ME status definitions. + + @retval EFI_SUCCESS MeStatus copied + @retval EFI_INVALID_PARAMETER Pointer of MeStatus is invalid +**/ +typedef +EFI_STATUS +(EFIAPI *PEI_HECI_GET_ME_STATUS) ( + IN EFI_PEI_SERVICES **PeiServices, + IN UINT32 *Status + ); + +/** + Get an abstract ME operation mode from firmware status + register. This is used to control BIOS flow for different + Intel ME functions. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[out] MeMode Pointer for ME Mode report, + see MeState.h - Abstract ME Mode definitions. + + @retval EFI_SUCCESS MeMode copied + @retval EFI_INVALID_PARAMETER Pointer of MeMode is invalid +**/ +typedef +EFI_STATUS +(EFIAPI *PEI_HECI_GET_ME_MODE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN UINT32 *MeMode + ); + +/// +/// HECI PPI +/// The interface functions are for sending/receiving HECI messages between host and Intel ME subsystem +/// in PEI phase +/// +struct _PEI_HECI_PPI { + PEI_HECI_SENDWACK SendwAck; ///< Send HECI message and wait for respond + PEI_HECI_READ_MESSAGE ReadMsg; ///< Read message from HECI + PEI_HECI_SEND_MESSAGE SendMsg; ///< Send message to HECI + PEI_INITIALIZE_HECI InitializeHeci; ///< Init HECI + PEI_HECI_GET_ME_STATUS GetMeStatus; ///< Get Intel ME Status register + PEI_HECI_GET_ME_MODE GetMeMode; ///< Get Intel ME mode +}; + +#endif diff --git a/ReferenceCode/ME/Ppi/MeLibPpi.cif b/ReferenceCode/ME/Ppi/MeLibPpi.cif new file mode 100644 index 0000000..da1b41c --- /dev/null +++ b/ReferenceCode/ME/Ppi/MeLibPpi.cif @@ -0,0 +1,22 @@ +<component> + name = "MeLibPpi" + category = ModulePart + LocalRoot = "ReferenceCode\ME\Ppi\" + RefName = "MeLibPpi" +[files] +"MeLibPpi.sdl" +"MeLibPpi.mak" +"MeLibPpi.inf" +"AmtStatusCode\AmtStatusCode.h" +"AmtStatusCode\AmtStatusCode.c" +"Heci\Heci.h" +"Heci\Heci.c" +"AmtPlatformPolicyPei\AmtPlatformPolicyPei.c" +"AmtPlatformPolicyPei\AmtPlatformPolicyPei.h" +"MePlatformPolicyPei\MePlatformPolicyPei.h" +"MePlatformPolicyPei\MePlatformPolicyPei.c" +"PlatformMeHook\PlatformMeHook.h" +"PlatformMeHook\PlatformMeHook.c" +"PchMeUma\PchMeUma.c" +"PchMeUma\PchMeUma.h" +<endComponent> diff --git a/ReferenceCode/ME/Ppi/MeLibPpi.inf b/ReferenceCode/ME/Ppi/MeLibPpi.inf new file mode 100644 index 0000000..7a4973e --- /dev/null +++ b/ReferenceCode/ME/Ppi/MeLibPpi.inf @@ -0,0 +1,59 @@ +## @file +# Component description file for Me PPI library. +# +#@copyright +# Copyright (c) 2005 - 2012 Intel Corporation. All rights reserved +# This software and associated documentation (if any) is furnished +# under a license and may only be used or copied in accordance +# with the terms of the license. Except as permitted by such +# license, no part of this software or documentation may be +# reproduced, stored in a retrieval system, or transmitted in any +# form or by any means without the express written consent of +# Intel Corporation. +# +# This file contains a 'Sample Driver' and is licensed as such +# under the terms of your license agreement with Intel or your +# vendor. This file may be modified by the user, subject to +# the additional terms of the license agreement +# + +[defines] +BASE_NAME = MeLibPpi +COMPONENT_TYPE = LIBRARY + +[includes.common] + $(EFI_SOURCE)/$(PROJECT_ME_ROOT) + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Include + +# +# EDK II Glue Library utilizes some standard headers from EDK +# + $(EDK_SOURCE)/Foundation + $(EDK_SOURCE)/Foundation/Core/Dxe + $(EDK_SOURCE)/Foundation/Efi + $(EDK_SOURCE)/Foundation/Efi/Include + $(EDK_SOURCE)/Foundation/Framework + $(EDK_SOURCE)/Foundation/Framework/Include + $(EDK_SOURCE)/Foundation/Include + $(EDK_SOURCE)/Foundation/Include/IndustryStandard + $(EDK_SOURCE)/Foundation/Include/Pei + $(EDK_SOURCE)/Foundation/Library/Dxe/Include + $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include + +[sources.common] + AmtStatusCode/AmtStatusCode.c + AmtStatusCode/AmtStatusCode.h + Heci/Heci.c + Heci/Heci.h + AmtPlatformPolicyPei/AmtPlatformPolicyPei.c + AmtPlatformPolicyPei/AmtPlatformPolicyPei.h + MePlatformPolicyPei/MePlatformPolicyPei.c + MePlatformPolicyPei/MePlatformPolicyPei.h + PlatformMeHook/PlatformMeHook.c + PlatformMeHook/PlatformMeHook.h + PchMeUma/PchMeUma.c + PchMeUma/PchMeUma.h + +[nmake.common] +C_STD_INCLUDE= + diff --git a/ReferenceCode/ME/Ppi/MeLibPpi.mak b/ReferenceCode/ME/Ppi/MeLibPpi.mak new file mode 100644 index 0000000..139f0d1 --- /dev/null +++ b/ReferenceCode/ME/Ppi/MeLibPpi.mak @@ -0,0 +1,43 @@ +# /*++ +# Copyright (c) 2009 Intel Corporation. All rights reserved. +# This software and associated documentation (if any) is furnished +# under a license and may only be used or copied in accordance +# with the terms of the license. Except as permitted by such +# license, no part of this software or documentation may be +# reproduced, stored in a retrieval system, or transmitted in any +# form or by any means without the express written consent of +# Intel Corporation. +# --*/ +# MAK file for the ModulePart:MeLibPpi +all : MeLibPpi + +$(MeLibPpi_LIB) : MeLibPpi + +MeLibPpi : $(BUILD_DIR)\MeLibPpi.mak MeLibPpiBin + +$(BUILD_DIR)\MeLibPpi.mak : $(MeLibPpi_DIR)\$(@B).cif $(MeLibPpi_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(MeLibPpi_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +MeLibPpi_INCLUDES = \ + $(EDK_INCLUDES)\ + $(EdkIIGlueLib_INCLUDES)\ + $(ME_INCLUDES) + +MeLibPpiBin : + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\ + /f $(BUILD_DIR)\MeLibPpi.mak all\ + "MY_INCLUDES=$(MeLibPpi_INCLUDES)" \ + TYPE=PEI_LIBRARY \ +#********************************************************************** +#********************************************************************** +#** ** +#** (C)Copyright 1985-2006, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#********************************************************************** +#********************************************************************** diff --git a/ReferenceCode/ME/Ppi/MeLibPpi.sdl b/ReferenceCode/ME/Ppi/MeLibPpi.sdl new file mode 100644 index 0000000..cedbd4b --- /dev/null +++ b/ReferenceCode/ME/Ppi/MeLibPpi.sdl @@ -0,0 +1,34 @@ +TOKEN + Name = "MeLibPpi_SUPPORT" + Value = "1" + Help = "Main switch to enable MeLibPpi support in Project" + TokenType = Boolean + TargetMAK = Yes + Master = Yes +End + +PATH + Name = "MeLibPpi_DIR" +End + +MODULE + Help = "Includes MeLibPpi.mak to Project" + File = "MeLibPpi.mak" +End + +ELINK + Name = "MeLibPpi_LIB" + InvokeOrder = ReplaceParent +End + +ELINK + Name = "$(BUILD_DIR)\MeLibPpi.lib" + Parent = "MeLibPpi_LIB" + InvokeOrder = AfterParent +End + +ELINK + Name = "/I$(MeLibPpi_DIR)" + Parent = "ME_INCLUDES" + InvokeOrder = AfterParent +End diff --git a/ReferenceCode/ME/Ppi/MePlatformPolicyPei/MePlatformPolicyPei.c b/ReferenceCode/ME/Ppi/MePlatformPolicyPei/MePlatformPolicyPei.c new file mode 100644 index 0000000..e371be3 --- /dev/null +++ b/ReferenceCode/ME/Ppi/MePlatformPolicyPei/MePlatformPolicyPei.c @@ -0,0 +1,31 @@ +/** @file + ME Platform Policy for ME PEIMs + +@copyright + Copyright (c) 2010 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement +**/ + +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGluePeim.h" +#include EFI_PPI_DEFINITION (MePlatformPolicyPei) +#endif + +EFI_GUID gPeiMePlatformPolicyPpiGuid = PEI_ME_PLATFORM_POLICY_PPI_GUID; + +EFI_GUID_STRING(&gPeiMePlatformPolicyPpiGuid, "PeiMePlatformPolicyPpi", "PEI Me Platform Policy PPI"); diff --git a/ReferenceCode/ME/Ppi/MePlatformPolicyPei/MePlatformPolicyPei.h b/ReferenceCode/ME/Ppi/MePlatformPolicyPei/MePlatformPolicyPei.h new file mode 100644 index 0000000..034b955 --- /dev/null +++ b/ReferenceCode/ME/Ppi/MePlatformPolicyPei/MePlatformPolicyPei.h @@ -0,0 +1,58 @@ +/** @file + ME Platform Policy for ME PEIMs + +@copyright + Copyright (c) 2010 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement +**/ +#ifndef _PEI_ME_PLATFORM_POLICY_PPI_H_ +#define _PEI_ME_PLATFORM_POLICY_PPI_H_ + +// +// Include other definitions +// +/// +/// ME policy provided by platform for PEI phase +/// The Platform Policy PPI returns the Intel ME feature set in PEI phase +/// +#define PEI_ME_PLATFORM_POLICY_PPI_GUID \ + { \ + 0x7ae3ceb7, 0x2ee2, 0x48fa, 0xaa, 0x49, 0x35, 0x10, 0xbc, 0x83, 0xca, 0xbf \ + } + +// +// Extern the GUID for PPI users. +// +extern EFI_GUID gPeiMePlatformPolicyPpiGuid; + +// +// Revision +// +#define PEI_ME_PLATFORM_POLICY_PPI_REVISION_1 1 +#define PEI_ME_PLATFORM_POLICY_PPI_REVISION_2 2 + +/// +/// +/// ME policy provided by platform for PEI phase +/// The Platform Policy PPI returns the Intel ME feature set in PEI phase +/// +typedef struct _PEI_ME_PLATFORM_POLICY_PPI { + UINT8 Revision; ///< Revision for the protocol structure + UINT8 Reserved1 : 1; ///< Reserved for Intel internal use + UINT8 Reserved2 : 1; ///< Reserved for Intel internal use + UINT8 Reserved : 6; ///< Reserved for Intel internal use + UINT8 FTpmSwitch; +} PEI_ME_PLATFORM_POLICY_PPI; + +#endif diff --git a/ReferenceCode/ME/Ppi/PchMeUma/PchMeUma.c b/ReferenceCode/ME/Ppi/PchMeUma/PchMeUma.c new file mode 100644 index 0000000..a7478d1 --- /dev/null +++ b/ReferenceCode/ME/Ppi/PchMeUma/PchMeUma.c @@ -0,0 +1,42 @@ +/** @file + This file defines the Pch Me UMA function + +@copyright + Copyright (c) 2010 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement +**/ + +// +// Statements that include other files +// +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGluePeim.h" +// +// Include the PPI header file +// +#include EFI_PPI_DEFINITION (PchMeUma) +#endif +// +// PPI GUID definition +// +EFI_GUID gPchMeUmaPpiGuid = PCH_ME_UMA_PPI_GUID; + +// +// PPI description +// +EFI_GUID_STRING(&gPchMeUmaPpiGuid, "PchMeUma PPI", "Intel(R) PCH ME UMA PPI"); diff --git a/ReferenceCode/ME/Ppi/PchMeUma/PchMeUma.h b/ReferenceCode/ME/Ppi/PchMeUma/PchMeUma.h new file mode 100644 index 0000000..ef9b0a3 --- /dev/null +++ b/ReferenceCode/ME/Ppi/PchMeUma/PchMeUma.h @@ -0,0 +1,159 @@ +/** @file + Interface definition details for PCH Me UMA. + +@copyright + Copyright (c) 2010 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement +**/ +#ifndef _PCH_ME_UMA_PPI_H_ +#define _PCH_ME_UMA_PPI_H_ + +/// +/// ME UMA PPI +/// The interface functions are for configure/receiving Me FW in PEI phase. +/// +#define PCH_ME_UMA_PPI_GUID \ + { \ + 0x8c376010, 0x2400, 0x4d7d, 0xb4, 0x7b, 0x9d, 0x85, 0x1d, 0xf3, 0xc9, 0xd1 \ + } + +extern EFI_GUID gPchMeUmaPpiGuid; + +// +// Revision +// +#define PCH_ME_UMA_PPI_REVISION 1 + +/// +/// define the MRC recommended boot modes. +/// +typedef enum { + s3Boot, ///< In current implementation, bmS3 == bmWarm + warmBoot, + coldBoot, + fastBoot, +} MRC_BOOT_MODE_T; + +/** + This procedure will read and return the amount of ME UMA requested + by ME ROM from the HECI device. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] FfsHeader Pointer to the FFS file header + + @retval UINT32 Return ME UMA Size + @retval EFI_SUCCESS Do not check for ME UMA +**/ +typedef +UINT32 +(EFIAPI *ME_SEND_UMA_SIZE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_FFS_FILE_HEADER *FfsHeader + ) +; + +/** + This procedure will determine whether or not the CPU was replaced + during system power loss or via dynamic fusing. + Calling this procedure could result in a warm reset (if ME FW is requesting one). + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] FfsHeader Not used. + @param[out] ForceFullTraining When set = 0x1, MRC will be forced to perform a full + memory training cycle. + + @retval EFI_SUCCESS The function completed successfully. +**/ +typedef +EFI_STATUS +(EFIAPI *CPU_REPLACEMENT_CHECK) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_FFS_FILE_HEADER *FfsHeader, + OUT UINT8 *ForceFullTraining + ) +; + +/** + This procedure will configure the ME Host General Status register, + indicating that DRAM Initialization is complete and ME FW may + begin using the allocated ME UMA space. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] FfsHeader Pointer to the FFS file header + @param[in] MrcBootMode MRC BootMode + @param[in] InitStat H_GS[27:24] Status + @param[in] FtpmStolenBase The base of FTPM + + @retval EFI_SUCCESS +**/ +typedef +EFI_STATUS +(EFIAPI *ME_CONFIG_DID_REG) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN MRC_BOOT_MODE_T MrcBootMode, + IN UINT8 InitStat, + IN UINT32 FtpmStolenBase, + IN UINT32 MeUmaSize + + ) +; + +/** + This procedure will enforce the BIOS Action that was requested by ME FW + as part of the DRAM Init Done message. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] MrcBootMode MRC BootMode + @param[in] BiosAction Me requests BIOS to act + + @retval EFI_SUCCESS Always return EFI_SUCCESS +**/ +typedef +EFI_STATUS +(EFIAPI *HANDLE_ME_BIOS_ACTION) ( + IN EFI_PEI_SERVICES **PeiServices, + IN MRC_BOOT_MODE_T MrcBootMode, + IN UINT8 BiosAction + ) +; + +/// +/// ME UMA PPI +/// This PPI provides an interface to get the ME UMA size and performs the DID handshake with ME +/// +typedef struct PCH_ME_UMA_PPI { + /// + /// This procedure will read and return the amount of ME UMA requested by ME ROM from the + /// HECI device + /// + ME_SEND_UMA_SIZE MeSendUmaSize; + /// + /// This procedure will determine whether or not the CPU was replaced during system power loss + /// or via dynamic fusing + /// + CPU_REPLACEMENT_CHECK CpuReplacementCheck; + /// + /// This procedure will configure the ME Host General Status register, indicating that DRAM + /// Initialization is complete and ME FW may begin using the allocated ME UMA space + /// + ME_CONFIG_DID_REG MeConfigDidReg; + /// + /// This procedure will enforce the BIOS Action that was requested by ME FW as part of the + /// DRAM Init Done message + /// + HANDLE_ME_BIOS_ACTION HandleMeBiosAction; +} PCH_ME_UMA_PPI; + +#endif diff --git a/ReferenceCode/ME/Ppi/PlatformMeHook/PlatformMeHook.c b/ReferenceCode/ME/Ppi/PlatformMeHook/PlatformMeHook.c new file mode 100644 index 0000000..96dc6c9 --- /dev/null +++ b/ReferenceCode/ME/Ppi/PlatformMeHook/PlatformMeHook.c @@ -0,0 +1,42 @@ +/** @file + This file defines the Platform ME Hook function + +@copyright + Copyright (c) 2010 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement +**/ + +// +// Statements that include other files +// +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGluePeim.h" +// +// Include the PPI header file +// +#include EFI_PPI_DEFINITION (PlatformMeHook) +#endif +// +// PPI GUID definition +// +EFI_GUID gPlatformMeHookPpiGuid = PLATFORM_ME_HOOK_PPI_GUID; + +// +// PPI description +// +EFI_GUID_STRING(&gPlatformMeHookPpiGuid, "PlatformMeHook PPI", "Intel(R) PEIM Phase ME Platform Hook PPI"); diff --git a/ReferenceCode/ME/Ppi/PlatformMeHook/PlatformMeHook.h b/ReferenceCode/ME/Ppi/PlatformMeHook/PlatformMeHook.h new file mode 100644 index 0000000..92c0292 --- /dev/null +++ b/ReferenceCode/ME/Ppi/PlatformMeHook/PlatformMeHook.h @@ -0,0 +1,70 @@ +/** @file + Interface definition details for platform hook support to ME module. + +@copyright + Copyright (c) 2010 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement +**/ +#ifndef _PLATFORM_ME_HOOK_PPI_H_ +#define _PLATFORM_ME_HOOK_PPI_H_ + +/// +/// ME Hook provided by platform for PEI phase +/// This ppi provides an interface to hook reference code by OEM. +/// +#define PLATFORM_ME_HOOK_PPI_GUID \ + { \ + 0xe806424f, 0xd425, 0x4b1a, 0xbc, 0x26, 0x5f, 0x69, 0x03, 0x89, 0xa1, 0x5a \ + } + +extern EFI_GUID gPlatformMeHookPpiGuid; + +EFI_FORWARD_DECLARATION (PLATFORM_ME_HOOK_PPI); + +// +// Revision +// +#define PLATFORM_ME_HOOK_PPI_REVISION 1 + +/** + Platform hook before BIOS sends Global Reset Heci Message to ME + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] This Pointer to this PLATFORM_ME_HOOK_PPI + + @retval EFI Status Code +**/ +typedef +EFI_STATUS +(EFIAPI *PLATFORM_ME_HOOK_PRE_GLOBAL_RESET) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PLATFORM_ME_HOOK_PPI *This + ); + +/// +/// ME Hook provided by platform for PEI phase +/// This ppi provides an interface to hook reference code by OEM. +/// +struct _PLATFORM_ME_HOOK_PPI { + /// + /// Revision for the ppi structure + /// + UINT8 Revision; + /// + /// Function pointer for the hook called before BIOS sends Global Reset Heci Message to ME + // + PLATFORM_ME_HOOK_PRE_GLOBAL_RESET PreGlobalReset; +}; + +#endif |