From 7ef645f177f8fe0fe4eeda15421dfdad14d51c49 Mon Sep 17 00:00:00 2001 From: raywu Date: Tue, 3 Jul 2018 14:04:15 +0800 Subject: Adjust IRQ --- Board/EM/Setup/Setup.uni | Bin 24798 -> 24798 bytes Board/IO/F81866/F81866.ASL | 81 ++++++++++++++++++++++---------------------- Board/IO/F81866/F81866.SD | 4 +-- Board/IO/F81866/F81866DXE.C | 43 ++++++++++++----------- RomImage/FitcBuild.bat | 2 +- 5 files changed, 67 insertions(+), 63 deletions(-) diff --git a/Board/EM/Setup/Setup.uni b/Board/EM/Setup/Setup.uni index 5941542..5171885 100644 Binary files a/Board/EM/Setup/Setup.uni and b/Board/EM/Setup/Setup.uni differ diff --git a/Board/IO/F81866/F81866.ASL b/Board/IO/F81866/F81866.ASL index 326e4d7..8899ae8 100644 --- a/Board/IO/F81866/F81866.ASL +++ b/Board/IO/F81866/F81866.ASL @@ -593,25 +593,26 @@ CreateByteField(CRS3, IO04._LEN, LEN4) //Length 1 0x7 // Write Current Settings into IRQ descriptor If(INTR){ ShiftLeft(1, INTR, IRQT) - // Set IRQ Type:porting according IRTT - //AMI_TODO: - If(And(OPT0,0x01)){ - If(And(OPT0,0x02)){ - If(And(OPT6,0x08)){ - Store(0x18, IRQS) } // IRQ Type: Reserved, set as Active-Low-Level-Triggered,Shared. - Else{ - Store(0x11, IRQS) } // IRQ Type: Active-High-Edge-Triggered,Shared. - } - Else{ - If(And(OPT6,0x08)){ - Store(0x10, IRQS) } // IRQ Type: Active-High-Level-Triggered,Shared. - Else{ - Store(0x18, IRQS) } // IRQ Type: Active-Low-Level-Triggered,Shared. - } - } Else { - Store(0x01, IRQS) // IRQ Type: Active-High-Edge-Triggered,No-Shared(default) - } - +// // Set IRQ Type:porting according IRTT +// //AMI_TODO: +// If(And(OPT0,0x01)){ +// If(And(OPT0,0x02)){ +// If(And(OPT6,0x08)){ +// Store(0x18, IRQS) } // IRQ Type: Reserved, set as Active-Low-Level-Triggered,Shared. +// Else{ +// Store(0x11, IRQS) } // IRQ Type: Active-High-Edge-Triggered,Shared. +// } +// Else{ +// If(And(OPT6,0x08)){ +// Store(0x10, IRQS) } // IRQ Type: Active-High-Level-Triggered,Shared. +// Else{ +// Store(0x18, IRQS) } // IRQ Type: Active-Low-Level-Triggered,Shared. +// } +// } Else { +// Store(0x01, IRQS) // IRQ Type: Active-High-Edge-Triggered,No-Shared(default) +// } +// + Store(0x18, IRQS) }Else{ Store(0, IRQT) // No IRQ used } @@ -765,27 +766,27 @@ CreateByteField(CRS3, IO04._LEN, LEN4) //Length 1 0x7 If(IRQT){ FindSetRightBit(IRQT, Local0) Subtract(Local0, 1, INTR) - //Set IRQ flag,AMI_TODO: - //Set IRQ flag,AMI_TODO: - If(And(IRQS,0x10)){ - Or(OPT0, 0x01, OPT0) - If(LEqual(IRQS,0x18)){ // IRQ Type: Active-Low-Level-Triggered,Shared. - And(OPT0, 0xFD, OPT0) - And(OPT6, 0xF7, OPT6) - } - Else{ - If(LEqual(IRQS,0x11)){ // IRQ Type: Active-High-Edge-Triggered,Shared. - Or(OPT0, 0x01, OPT0) - And(OPT6, 0xF7, OPT6) - } - Else{ - If(LEqual(IRQS,0x10)){ // IRQ Type: Active-High-Level-Triggered,Shared. - And(OPT0, 0xFD, OPT0) - Or(OPT6, 0x08, OPT6) - } - } - } - } + //Set IRQ flag,AMI_TODO: + //Set IRQ flag,AMI_TODO: + If(And(IRQS,0x10)){ + Or(OPT0, 0x01, OPT0) + If(LEqual(IRQS,0x18)){ // IRQ Type: Active-Low-Level-Triggered,Shared. + And(OPT0, 0xFD, OPT0) + And(OPT6, 0xF7, OPT6) + } + Else{ + If(LEqual(IRQS,0x11)){ // IRQ Type: Active-High-Edge-Triggered,Shared. + Or(OPT0, 0x01, OPT0) + And(OPT6, 0xF7, OPT6) + } + Else{ + If(LEqual(IRQS,0x10)){ // IRQ Type: Active-High-Level-Triggered,Shared. + And(OPT0, 0xFD, OPT0) + Or(OPT6, 0x08, OPT6) + } + } + } + } }Else{ Store(0, INTR) //No IRQ used } diff --git a/Board/IO/F81866/F81866.SD b/Board/IO/F81866/F81866.SD index 1ec4420..440861f 100644 --- a/Board/IO/F81866/F81866.SD +++ b/Board/IO/F81866/F81866.SD @@ -1707,8 +1707,8 @@ oneof varid = LPT_NV_DATA.DevMode, prompt = STRING_TOKEN(STR_SELECT_MODE), help = STRING_TOKEN(STR_F81866_PARALLEL_MODE_HELP), - option text = STRING_TOKEN(STR_F81866_PARALLEL_MODE0), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; - option text = STRING_TOKEN(STR_F81866_PARALLEL_MODE1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLEL_MODE0), value = 0, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81866_PARALLEL_MODE1), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; option text = STRING_TOKEN(STR_F81866_PARALLEL_MODE2), value = 2, flags = RESET_REQUIRED; option text = STRING_TOKEN(STR_F81866_PARALLEL_MODE3), value = 3, flags = RESET_REQUIRED; option text = STRING_TOKEN(STR_F81866_PARALLEL_MODE4), value = 4, flags = RESET_REQUIRED; diff --git a/Board/IO/F81866/F81866DXE.C b/Board/IO/F81866/F81866DXE.C index f945c58..d1ce887 100644 --- a/Board/IO/F81866/F81866DXE.C +++ b/Board/IO/F81866/F81866DXE.C @@ -678,27 +678,30 @@ static EFI_STATUS COM_Init( // ASSERT_EFI_ERROR(Status); // } - //Programm Serial_X IRQ Share register. - if((dev->DeviceInfo->Flags & SIO_SHR_IRQ1) && dev->ResOwner) { - //enter cfgmode - SioCfgMode(dev->Owner, TRUE); - //set device resource owner share register - DevSelect(dev->ResOwner); - SioRegister(dev->ResOwner, FALSE, 0xF0, &rv);//read reg0xF0 value - rv |= 0x01; //Bit1:share or normal - SioRegister(dev->ResOwner, TRUE, 0xF0, &rv);//write reg0xF0 value - //set device irq register - DevSelect(dev); - SioRegister(dev->ResOwner, FALSE, 0x70, &rv);//read reg0x70 value - SioRegister(dev, TRUE, 0x70, &rv);//write reg0x70 value - SioRegister(dev, FALSE, 0xF0, &rv);//read reg0xF0 value - rv |= 0x01; //Bit1:share or normal - SioRegister(dev, TRUE, 0xF0, &rv);//write reg0xF0 value - //exit cfgmode - SioCfgMode(dev->Owner, FALSE); - dev->VlData.DevIrq1=dev->ResOwner->VlData.DevIrq1; - } +// //Programm Serial_X IRQ Share register. +// if((dev->DeviceInfo->Flags & SIO_SHR_IRQ1) && dev->ResOwner) { +// //enter cfgmode +// SioCfgMode(dev->Owner, TRUE); +// //set device resource owner share register +// DevSelect(dev->ResOwner); +// SioRegister(dev->ResOwner, FALSE, 0xF0, &rv);//read reg0xF0 value +// rv |= 0x01; //Bit1:share or normal +// SioRegister(dev->ResOwner, TRUE, 0xF0, &rv);//write reg0xF0 value +// //set device irq register +// DevSelect(dev); +// SioRegister(dev->ResOwner, FALSE, 0x70, &rv);//read reg0x70 value +// SioRegister(dev, TRUE, 0x70, &rv);//write reg0x70 value +// SioRegister(dev, FALSE, 0xF0, &rv);//read reg0xF0 value +// rv |= 0x01; //Bit1:share or normal +// SioRegister(dev, TRUE, 0xF0, &rv);//write reg0xF0 value +// //exit cfgmode +// SioCfgMode(dev->Owner, FALSE); +// dev->VlData.DevIrq1=dev->ResOwner->VlData.DevIrq1; +// } + Status=AmiSio->Access(AmiSio, FALSE, FALSE, 0xF0, &rv); + rv &= ~(BIT0) ; + Status=AmiSio->Access(AmiSio,TRUE,FALSE,0xF0,&rv); break; case isAfterActivate: diff --git a/RomImage/FitcBuild.bat b/RomImage/FitcBuild.bat index a0f748b..5df6e7c 100644 --- a/RomImage/FitcBuild.bat +++ b/RomImage/FitcBuild.bat @@ -103,7 +103,7 @@ GOTO ImageOutput :ImageOutput IF EXIST %DestDir%\OutImage.bin ECHO Rom_%RomSize%%RomSkue%.bin && move /Y %DestDir%\OutImage.bin Rom_%RomSize%%RomSkue%.bin -IF EXIST Rom_%RomSize%%RomSkue%.bin move /Y Rom_%RomSize%%RomSkue%.bin SZPRJM06.bin +IF EXIST Rom_%RomSize%%RomSkue%.bin move /Y Rom_%RomSize%%RomSkue%.bin SZPRJM07.bin IF EXIST %DestDir%\OutImage_1.bin ECHO Rom00%RomSkue%.bin && move /Y %DestDir%\OutImage_1.bin Rom00%RomSkue%.bin IF EXIST %DestDir%\OutImage_2.bin ECHO Rom01%RomSkue%.bin && move /Y %DestDir%\OutImage_2.bin Rom01%RomSkue%.bin echo Rom_%RomSize%%RomSkue%.bin>ForPfatName.txt -- cgit v1.2.3