From 16d9c6b8f5a95724f70ad3af0dbed5cccd57b6ec Mon Sep 17 00:00:00 2001
From: raywu <raywu@aaeon.com.tw>
Date: Fri, 23 Nov 2018 15:15:07 +0800
Subject: DW01 - Support WDT Function

---
 CRB/CRBPei.c | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

(limited to 'CRB/CRBPei.c')

diff --git a/CRB/CRBPei.c b/CRB/CRBPei.c
index fc93a20..e8cb3ef 100644
--- a/CRB/CRBPei.c
+++ b/CRB/CRBPei.c
@@ -558,6 +558,44 @@ EFI_STATUS EFIAPI CRBPEI_Init (
         F81866ExitConfigMode();
 	}
 	// Parallel Port / Gpio multi function selection _End <<
+
+    {
+        F81866EnterConfigMode() ;
+        F81866LDNSelect(F81866_LDN_WDT) ;
+        
+        switch( SetupData.F81866WdtEnable ) {
+            case 1 : // WDT Enabled
+                // Disable WDT
+                F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) & ~BIT5 ) ;
+                // Clear WDT Status
+                F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) | BIT6 ) ;
+
+                // Configure WDT to Pulse Mode
+                F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) | BIT4 ) ;
+                // Configure WDT Pulse Width to 25ms
+                F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) & ~(BIT1 + BIT0) ) ;
+                F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) | BIT0 ) ;
+                // Configure WDT Polarity to Low Active
+                F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) & ~BIT2 ) ;
+                // Configure WDT Reset via WDTRST#
+                F81866ConfigRegisterWrite( 0xFA , F81866ConfigRegisterRead(0xFA) | BIT0 ) ;
+
+                // Configure WDT Timer
+                F81866ConfigRegisterWrite( 0xF6 , SetupData.F81866WdtTimer ) ;
+                F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) & ~BIT3 ) ; // Configure Timer Unit : 1 Second
+
+                // Enable WDT
+                F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) | BIT5 ) ;
+            break ;
+
+            default :
+            case 0 : // WDT Disabled
+                F81866ConfigRegisterWrite( 0xF5 , F81866ConfigRegisterRead(0xF5) & ~BIT5 ) ;
+            break ;
+        }
+
+        F81866ExitConfigMode() ;
+    }
 }
     return EFI_SUCCESS;
 }
-- 
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