From b7c51c9cf4864df6aabb99a1ae843becd577237c Mon Sep 17 00:00:00 2001 From: raywu Date: Fri, 15 Jun 2018 00:00:50 +0800 Subject: init. 1AQQW051 --- CRB/CSP.sdl | 368 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 368 insertions(+) create mode 100644 CRB/CSP.sdl (limited to 'CRB/CSP.sdl') diff --git a/CRB/CSP.sdl b/CRB/CSP.sdl new file mode 100644 index 0000000..bfb10be --- /dev/null +++ b/CRB/CSP.sdl @@ -0,0 +1,368 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/Projects/Intel/Haswell/LynxPoint_SharkBay-DT_Crb_1AQQW/CRB/CSP.sdl 5 4/24/13 2:49a Thomaschen $ +# +# $Revision: 5 $ +# +# $Date: 4/24/13 2:49a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/Projects/Intel/Haswell/LynxPoint_SharkBay-DT_Crb_1AQQW/CRB/CSP.sdl $ +# +# 5 4/24/13 2:49a Thomaschen +# add token "USB_CONTROLLERS_WITH_RMH" +# +# 4 12/13/12 4:02a Wesleychen +# EIP#108566: Fixed ME will not work under debug mode. +# +# 2 11/21/12 6:10a Wesleychen +# Fix FV_BB size over 1MB cannot boot. +# +# 1 2/12/12 10:38p Victortu +# Intel SharkBay CRB initially releases. +# +#************************************************************************* +TOKEN + Name = "USB_UHCI" + Value = "0" + Help = "Maximum number of UHCI controllers present in the system" + TokenType = Integer + TargetH = Yes + Range = "0-6" +End + +TOKEN + Name = "USB_EHCI" + Value = "2" + Help = "Maximum number of EHCI controllers present in the system" + TokenType = Integer + TargetH = Yes + Range = "0-6" +End + +TOKEN + Name = "USB_XHCI" + Value = "1" + Help = "Maximum number of supported XHCI controllers" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "XHCI_EVENT_SERVICE_MODE" + Value = "0" + Help = "This token controlls xHCI event service mode.\0 - Use periodic timer SMI.\1 - Use xHCI hardware SMI.\2 - Both periodic timer SMI and se xHCI hardware SMI." + TokenType = Integer + TargetH = Yes + Range = "0..2" +End + +TOKEN + Name = "USB_XHCI_EXT_HW_SMI_PINS" + Value = "255" + Help = "List of xHCI GPI bit offset in the following format: GPI0, GPI1,...,GPIN.\Use 0xFF (255) to ignore the settings." + TokenType = Expression + TargetH = Yes + Range = "0..31" + Token = "XHCI_EVENT_SERVICE_MODE" "!=" "0" +End + +TOKEN + Name = "EHCI_PCI_DEVICES" + Value = "{0xD0, 0x20}, {0xE8, 0x20}" + Help = "List of supported EHCI controllers in the following format: {dev1, 0}, {dev2, 0},...,{devN, 0}\dev represents the location of EHCI controller on PCI bus: dev = Bus << 8 + Dev << 3 + Func. Value followed by dev is the PCI device interface, for EHCI it must be 0x20.\Note: number of pairs {dev, 0} must not be less than a number of supported UHCI controllers specified in USB_UHCI token." + TokenType = Expression + TargetH = Yes +End + +TOKEN + Name = "XHCI_PCI_DEVICES" + Value = "{0xA0, 0x30}" + Help = "List of supported onchip XHCI controllers in the following format: {dev1, 0}, {dev2, 0},...,{devN, 0}\dev represents the location of XHCI controller on PCI bus: dev = Bus << 8 + Dev << 3 + Func. Value followed by dev is the PCI device interface, for XHCI it must be 0x30.\Note: number of pairs {dev, 0} must not be less than a number of supported EHCI controllers specified in USB_XHCI token." + TokenType = Expression + TargetH = Yes +End + +TOKEN + Name = "UHCI_PCI_DEVICES" + Value = "{0xD0, 0}, {0xD1, 0}, {0xD2, 0}, {0xD3, 0}, {0xE8, 0}, {0xE9, 0}, {0xEA, 0}, {0xEB, 0}, {0xEC, 0}" + Help = "List of supported UHCI controllers in the following format: {dev1, 0}, {dev2, 0},...,{devN, 0}\dev represents the location of UHCI controller on PCI bus: dev = Bus << 8 + Dev << 3 + Func. Value followed by dev is the PCI device interface, for UHCI it must be 0.\Note: number of pairs {dev, 0} must not be less than a number of supported UHCI controllers specified in USB_UHCI token." + TokenType = Expression + TargetH = Yes +End + +TOKEN + Name = "USB_CONTROLLERS_WITH_RMH" + Value = "{0x8086, 0x8C26}, {0x8086, 0x8C2D}" # for Intel Lynx Point + Help = "List of USB controllers that have integrated USB 2.0 Rate Matching Hubs (RMH) in the following format: {vid1, did1}, {vid2, did2}" + TokenType = Expression + TargetH = Yes +End + +TOKEN + Name = "PEI_EHCI_PCI_BDFS" + Value = "{0x1A0000, 0x1D0000}" + Help = "List of supported EHCI controllers in the following format: {devfunc1, devfunc2,...,devfuncN}\devfunc represents the location of UHCI controller on PCI bus: dev = Bus << 24 + Dev << 16 + Func << 8. Value followed by dev is the PCI device interface, for UHCI it must be 0.\Note: number of entries {devfunc} must not be less than a number of supported EHCI controllers specified in PEI_NUM_EHCI token." + TokenType = Expression + TargetH = Yes +End + +TOKEN + Name = "PEI_UHCI_SUPPORT" + Value = "0" + Help = "Main switch to enable UHCI Controller support for USB recovery" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + TargetH = Yes +End + +TOKEN + Name = "PEI_EHCI_SUPPORT" + Value = "1" + Help = "Main switch to enable EhciPei support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + TargetH = Yes +End + +TOKEN + Name = "PEI_UHCI_PCI_DEVICES" + Value = "{0x1A0000, 0x1A0100, 0x1A0200, 0x1D0000, 0x1D0100, 0x1D0200, 0x1D0300}" + Help = "List of supported UHCI controllers in the following format: {devfunc1, devfunc2,...,devfuncN}\devfunc represents the location of UHCI controller on PCI bus: dev = Bus << 24 + Dev << 16 + Func << 8. Value followed by dev is the PCI device interface, for UHCI it must be 0.\Note: number of entries {devfunc} must not be less than a number of supported UHCI controllers specified in PEI_NUM_UHCI token." + TokenType = Expression + TargetH = Yes + Token = "PEI_UHCI_SUPPORT" "=" "1" +End + +TOKEN + Name = "PEI_EHCI_PCI_BDFS" + Value = "{0x1A0000, 0x1D0000}" + Help = "List of supported EHCI controllers in the following format: {devfunc1, devfunc2,...,devfuncN}\devfunc represents the location of EHCI controller on PCI bus: dev = Bus << 24 + Dev << 16 + Func << 8. Value followed by dev is the PCI device interface, for EHCI it must be 0.\Note: number of entries {devfunc} must not be less than a number of supported EHCI controllers specified in PEI_NUM_EHCI token." + TokenType = Expression + TargetH = Yes + Token = "PEI_EHCI_SUPPORT" "=" "1" +End + +TOKEN + Name = "PEI_EHCI_MEM_BASE_ADDRESSES" + Value = "{$(EHCI_MMIO_BASE_ADDRESS1), $(EHCI_MMIO_BASE_ADDRESS2)}" + Help = "List of supported EHCI controllers in the following format: {devfunc1, devfunc2,...,devfuncN}\devfunc represents the location of UHCI controller on PCI bus: dev = Bus << 24 + Dev << 16 + Func << 8. Value followed by dev is the PCI device interface, for UHCI it must be 0.\Note: number of entries {devfunc} must not be less than a number of supported EHCI controllers specified in USB_EHCI token." + TokenType = Expression + TargetH = Yes +End + +TOKEN + Name = "SMM_CACHE_SUPPORT" + Value = "1" + Help = "Enable/disable SMM Cache Support" + TokenType = Boolean + TargetEQU = Yes + TargetH = Yes +End + +TOKEN + Name = "FWHFlash_SUPPORT" + Value = "0" + Help = "Main switch to enable FWH Flash support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes +End + +TOKEN + Name = "LPCFlash_SUPPORT" + Value = "0" + Help = "Main switch to enable LPC Flash support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes +End + +TOKEN + Name = "CMOS_USES_STANDARD_BATTERY_TEST" + Value = "0" + Help = "Specifies whether or not to use CMOS Manager's default battery test function. If a platform provides a different battery test function this token should be disabled." + TokenType = Boolean + TargetEQU = Yes + TargetH = Yes +End + +TOKEN + Name = "MAX_MANAGED_CMOS_ADDRESS" + Value = "256" + Help = "Last CMOS address + 1 use to specify the maximum address that is manages by CMOS Manager" + TokenType = Integer + TargetEQU = Yes + TargetH = Yes +End + +TOKEN + Name = "SW_IRQ_GENERATION_REG" + Value = "$(PM_BASE_ADDRESS)+0x70" + Help = "Software IRQ generation regsiter from SB to generate the IRQ12 and IRQ1." + TokenType = Integer + TargetH = Yes + Token = "IRQ_EMUL_SUPPORT" "=" "1" +End + +TOKEN + Name = "IODECODETYPE" + Value = "0" + Help = "Check project actually who does IODecode Implement by :\1 - decode by OEM porting with eLink function(default),\0 - decode by chipset porting in SBGeneric.c" + TokenType = Boolean + TargetMAK = Yes + TargetH = Yes +End + +TOKEN + Name = "DUTY_OFFSET_VAL" + Value = "0" + Help = "The zero-based index of where the processor’s duty cycle setting is within the processor’s P_CNT register.\(for more information, ACPI SPEC)." + TokenType = Integer + TargetH = Yes + Range = "0-0xf0" +End + +TOKEN + Name = "DUTY_WIDTH_VAL" + Value = "0" + Help = "The bit width of the processor’s duty cycle setting value in the P_CNT register. Each processor’s duty cycle setting\allows the software to select a nominal processor frequency below its absolute frequency.\(for more information, ACPI SPEC)." + TokenType = Integer + TargetH = Yes + Range = "0-0xff: depends on 'duty_offset'" +End + +TOKEN + Name = "RESET_RUNTIME_SERVICES_SUPPORT" + Value = "0" + Help = "If ON includes in project CORE implementation of reset \services (from TimeAndReset.c). \Set to OFF to use stand alone reset driver." + TokenType = Boolean + TargetMAK = Yes + TargetH = Yes + Token = "PchReset_SUPPORT" "=" "1" +End + +TOKEN + Name = "RTC_RUNTIME_SERVICES_SUPPORT" + Value = "1" + Help = "If ON includes in project CORE implementation of RTC \services (from TimeAndReset.c). \Set to OFF to use stand alone RTC driver." + TokenType = Boolean + TargetMAK = Yes + TargetH = Yes +End + +TOKEN + Name = "CODE_CACHE_SIZE" + Value = "0x100000" + Help = "Code Cache Size in SEC phase\This size must a multiple of 4k and must be 2^n size. Caching the entire flash will cause cache line evictions." + TokenType = Integer + TargetEQU = Yes + TargetH = Yes +End + +TOKEN + Name = "TOTAL_FV_BB_SIZE" + Value = "$(FV_BB_BLOCKS)*$(FLASH_BLOCK_SIZE)" + Help = "Total FV_BB size in byte." + TokenType = Integer + TargetEQU = Yes + TargetH = Yes +End + +TOKEN + Name = "CODE_CACHE_PART2_SIZE" + Value = "$(TOTAL_FV_BB_SIZE)-$(CODE_CACHE_SIZE)" + Help = "Turn on CODE_CACHE_PART2 when FV_BB size > CODE_CACHE_SIZE.\Code Cache PART 2 Size ." + TokenType = Integer + TargetEQU = Yes + TargetH = Yes + Token = "TOTAL_FV_BB_SIZE" ">" "0x100000" +End + +TOKEN + Name = "CODE_CACHE_PART2_BASE" + Value = "0xffffffff-($(CODE_CACHE_SIZE)+$(CODE_CACHE_PART2_SIZE))+1" + Help = "Turn on CODE_CACHE_PART2 when FV_BB size > CODE_CACHE_SIZE.\Code Cache PART 2 Base Address. 0 = No PART 2" + TokenType = Integer + TargetEQU = Yes + TargetH = Yes + Token = "TOTAL_FV_BB_SIZE" ">" "0x100000" +End + +TOKEN + Name = "NO_OF_PHYSICAL_MEMORY_ARRAY" + Value = "$(MEMORY_ARRAY_NUM)" + Help = "Specifies the Total number of Physical Arrays in the System." + TokenType = Integer + TargetEQU = Yes + TargetH = Yes + Range = "1 - 5" +End + +TOKEN + Name = "ME_IGNITION_FW_MSG_SUPPORT" + Value = "0" + Help = "Enable this Token to Show Ignition FW status during POST" + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "PowerButton_SUPPORT" + Value = "0" + Help = "Main switch to enable PowerButton support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes +End + +TOKEN + Name = "LIBEXE" + Value = "$(SILENT)LINK /LIB" + TokenType = Expression + TargetMAK = Yes +End + +ELINK + Name = "$(BUILD_DIR)\UsbBotPeim.ffs" + Parent = "FV_BB" + Token = "UsbRecov_SUPPORT" "=" "1" + InvokeOrder = BeforeParent +End + +ELINK + Name = "$(BUILD_DIR)\Recovery.ffs" + Parent = "FV_BB" + Token = "Recovery_SUPPORT" "=" "1" + InvokeOrder = BeforeParent +End + +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* -- cgit v1.2.3