From b7c51c9cf4864df6aabb99a1ae843becd577237c Mon Sep 17 00:00:00 2001 From: raywu Date: Fri, 15 Jun 2018 00:00:50 +0800 Subject: init. 1AQQW051 --- .../Chipset/LynxPoint/Reset/Pei/PchReset.c | 134 +++++++++++++++++++++ .../Chipset/LynxPoint/Reset/Pei/PchReset.dxs | 39 ++++++ .../Chipset/LynxPoint/Reset/Pei/PchReset.h | 65 ++++++++++ .../Chipset/LynxPoint/Reset/Pei/PchResetPeim.cif | 13 ++ .../Chipset/LynxPoint/Reset/Pei/PchResetPeim.inf | 84 +++++++++++++ .../Chipset/LynxPoint/Reset/Pei/PchResetPeim.mak | 99 +++++++++++++++ .../Chipset/LynxPoint/Reset/Pei/PchResetPeim.sdl | 67 +++++++++++ 7 files changed, 501 insertions(+) create mode 100644 ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.c create mode 100644 ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.dxs create mode 100644 ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.h create mode 100644 ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.cif create mode 100644 ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.inf create mode 100644 ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.mak create mode 100644 ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.sdl (limited to 'ReferenceCode/Chipset/LynxPoint/Reset/Pei') diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.c b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.c new file mode 100644 index 0000000..5993d67 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.c @@ -0,0 +1,134 @@ +/** @file + PCH RESET PEIM DRIVER. + +@copyright + Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement +**/ +#include "PchReset.h" + +/** + Installs PCH RESET PPI + + @param[in] FfsHeader Not used. + @param[in] PeiServices General purpose services available to every PEIM. + + @retval EFI_SUCCESS PCH SPI PPI is installed successfully + @retval EFI_OUT_OF_RESOURCES Can't allocate pool +**/ +EFI_STATUS +InstallPchReset ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ) +{ + EFI_STATUS Status; + PEI_PCH_RESET_INSTANCE *PeiPchResetInstance; + PCH_RESET_INSTANCE *PchResetInstance; + + DEBUG ((EFI_D_INFO, "InstallPchReset() Start\n")); + + PeiPchResetInstance = (PEI_PCH_RESET_INSTANCE *) AllocateZeroPool (sizeof (PEI_PCH_RESET_INSTANCE)); + if (NULL == PeiPchResetInstance) { + return EFI_OUT_OF_RESOURCES; + } + + PchResetInstance = &(PeiPchResetInstance->PchResetInstance); + PchResetProtocolConstructor (PchResetInstance); + + PeiPchResetInstance->PpiDescriptor.Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST; + PeiPchResetInstance->PpiDescriptor.Guid = &gPchResetPpiGuid; + PeiPchResetInstance->PpiDescriptor.Ppi = &(PchResetInstance->PchResetProtocol); + + /// + /// Install the PCH RESET PPI + /// + Status = (**PeiServices).InstallPpi (PeiServices, &PeiPchResetInstance->PpiDescriptor); + ASSERT_EFI_ERROR (Status); + + DEBUG ((EFI_D_INFO, "PCH RESET PPI Installed\n")); + + DEBUG ((EFI_D_INFO, "InstallPchReset() End\n")); + + return Status; +} + +/** + Execute call back function for Pch Reset. + + @param[in] PchResetType Pch Reset Types which includes PowerCycle, Globalreset. + + @retval EFI_SUCCESS The callback function has been done successfully + @exception EFI_UNSUPPORTED Do not do any reset from PCH +**/ +EFI_STATUS +PchResetCallback ( + IN PCH_RESET_TYPE PchResetType + ) +{ + EFI_STATUS Status; + UINTN Instance; + PCH_RESET_CALLBACK_PPI *PchResetCallbackPpi; + + if ((PchResetType == GlobalReset) || (PchResetType == GlobalResetWithEc)) { + /// + /// After MRC is done, DRAM Init Done message will be sent to ME FW. + /// + Status = PeiServicesLocatePpi ( + &gEfiPeiMemoryDiscoveredPpiGuid, + 0, + NULL, + NULL + ); + + if (Status == EFI_SUCCESS) { + /// + /// After sending DRAM Init Done to ME FW, please do the global reset through HECI. + /// + DEBUG ((EFI_D_ERROR, "Please do the global reset through HECI \n")); + return EFI_UNSUPPORTED; + } + } + + Instance = 0; + + do { + /// + /// Those drivers that need to install Pch Reset Callback Ppi have the responsibility + /// to make sure themselves execute before Pch Reset PEI driver. + /// + Status = PeiServicesLocatePpi ( + &gPchResetCallbackPpiGuid, + Instance, + NULL, + (VOID**) &PchResetCallbackPpi + ); + + if (Status == EFI_SUCCESS) { + PchResetCallbackPpi->ResetCallback (PchResetType); + } else { + if ((Instance == 0) && (Status == EFI_NOT_FOUND)) { + DEBUG ((EFI_D_ERROR | EFI_D_INFO, "None of Pch Reset Callback Ppi is found .\n")); + } else { + DEBUG ((EFI_D_INFO, "Failed to locate Pch Reset Callback Ppi.\n")); + } + } + + Instance++; + } while (Status != EFI_NOT_FOUND); + + return EFI_SUCCESS; +} \ No newline at end of file diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.dxs b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.dxs new file mode 100644 index 0000000..5e18cb4 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.dxs @@ -0,0 +1,39 @@ +/** @file + Dependency expression source file. + +@copyright + Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement + +**/ + + +// +// Common for R8 and R9 codebase +// +#include "AutoGen.h" +#include "PeimDepex.h" + +// +// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are both "defined" in R8 codebase; +// BUILD_WITH_EDKII_GLUE_LIB is defined in Edk-Dev-Snapshot-20070228 and later version +// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are "not defined" in R9 codebase. +// +#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB) +#include "EfiDepex.h" +#endif + +DEPENDENCY_START + TRUE +DEPENDENCY_END diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.h b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.h new file mode 100644 index 0000000..fa6ddc0 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.h @@ -0,0 +1,65 @@ +/** @file + Header file for PCH RESET PEIM Driver. + +@copyright + Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement +**/ +#ifndef _PCH_RESET_H +#define _PCH_RESET_H + +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGluePeim.h" +#include EFI_PPI_PRODUCER (PchReset) +#include "PchResetCommon.h" +#include EFI_PPI_CONSUMER (MemoryDiscovered) +#include "PchAccess.h" +#endif + +typedef struct { + EFI_PEI_PPI_DESCRIPTOR PpiDescriptor; + PCH_RESET_INSTANCE PchResetInstance; +} PEI_PCH_RESET_INSTANCE; + +/** + Installs PCH RESET PPI + + @param[in] FfsHeader Not used. + @param[in] PeiServices General purpose services available to every PEIM. + + @retval EFI_SUCCESS PCH SPI PPI is installed successfully + @retval EFI_OUT_OF_RESOURCES Can't allocate pool +**/ +EFI_STATUS +InstallPchReset ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ); + +/** + Execute call back function for Pch Reset. + + @param[in] PchResetType Pch Reset Types which includes PowerCycle, Globalreset. + + @retval EFI_SUCCESS The callback function has been done successfully + @exception EFI_UNSUPPORTED Do not do any reset from PCH +**/ +EFI_STATUS +EFIAPI +PchResetCallback ( + IN PCH_RESET_TYPE PchResetType + ); +#endif diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.cif b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.cif new file mode 100644 index 0000000..294cf3c --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.cif @@ -0,0 +1,13 @@ + + name = "PchResetPeim" + category = ModulePart + LocalRoot = "ReferenceCode\Chipset\LynxPoint\Reset\Pei" + RefName = "PchResetPeim" +[files] +"PchResetPeim.sdl" +"PchResetPeim.mak" +"PchReset.h" +"PchReset.c" +"PchReset.dxs" +"PchResetPeim.inf" + diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.inf b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.inf new file mode 100644 index 0000000..cd135c0 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.inf @@ -0,0 +1,84 @@ +## @file +# Component description file for the Pch Reset PEIM. +# +#@copyright +# Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved +# This software and associated documentation (if any) is furnished +# under a license and may only be used or copied in accordance +# with the terms of the license. Except as permitted by such +# license, no part of this software or documentation may be +# reproduced, stored in a retrieval system, or transmitted in any +# form or by any means without the express written consent of +# Intel Corporation. +# +# This file contains a 'Sample Driver' and is licensed as such +# under the terms of your license agreement with Intel or your +# vendor. This file may be modified by the user, subject to +# the additional terms of the license agreement +# + + +[defines] +BASE_NAME = PchResetPeim +FILE_GUID = 147B4839-5DBE-413f-917F-DFEB687C6312 +COMPONENT_TYPE = PE32_PEIM + +[sources.common] + PchReset.h + PchReset.c + ../Common/PchResetCommon.c + +# +# Edk II Glue Driver Entry Point +# + EdkIIGluePeimEntryPoint.c + +[includes.common] + . + ../Common + $(EDK_SOURCE)/Foundation/Efi + $(EDK_SOURCE)/Foundation/Include + $(EDK_SOURCE)/Foundation/Efi/Include + $(EDK_SOURCE)/Foundation/Framework/Include + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT) + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include/Library +# +# EDK II Glue Library utilizes some standard headers from EDK +# + $(EFI_SOURCE) + $(EDK_SOURCE)/Foundation + $(EDK_SOURCE)/Foundation/Framework + $(EDK_SOURCE)/Foundation/Include/IndustryStandard + $(EDK_SOURCE)/Foundation/Core/Dxe + $(EDK_SOURCE)/Foundation/Include/Pei + $(EDK_SOURCE)/Foundation/Library/Dxe/Include + $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include + +[libraries.common] + $(PROJECT_PCH_FAMILY)PpiLib + EdkIIGlueBaseIoLibIntrinsic + EdkIIGlueBaseMemoryLib + EdkIIGluePeiDebugLibReportStatusCode + EdkIIGluePeiReportStatusCodeLib + EdkIIGluePeiServicesLib + EdkIIGluePeiMemoryAllocationLib + EdkIIGlueBasePciLibPciExpress + EdkPpiLib + PchPlatformLib + EdkFrameworkPpiLib + +[nmake.common] + IMAGE_ENTRY_POINT = _ModuleEntryPoint + DPX_SOURCE = PchReset.dxs +# +# Module Entry Point +# + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_MODULE_ENTRY_POINT__=InstallPchReset + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \ + -D __EDKII_GLUE_BASE_MEMORY_LIB__ \ + -D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \ + -D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \ + -D __EDKII_GLUE_PEI_SERVICES_LIB__ \ + -D __EDKII_GLUE_PEI_MEMORY_ALLOCATION_LIB__ \ + -D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.mak b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.mak new file mode 100644 index 0000000..541ee4f --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.mak @@ -0,0 +1,99 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchResetPeim/PchResetPeim.mak 2 2/24/12 2:17a Victortu $ +# +# $Revision: 2 $ +# +# $Date: 2/24/12 2:17a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchResetPeim/PchResetPeim.mak $ +# +# 2 2/24/12 2:17a Victortu +# Updated to support 4.6.5.3_IntelEDK_1117_Patch7_00. +# +# 1 2/08/12 9:05a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* + +#--------------------------------------------------------------------------- +# Create PchResetPeim module +#--------------------------------------------------------------------------- +EDK : PchResetPeim +PchResetPeim : $(BUILD_DIR)\PchResetPeim.mak PchResetPeimBin + + +$(BUILD_DIR)\PchResetPeim.mak : $(PchResetPeim_DIR)\$(@B).cif $(PchResetPeim_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(PchResetPeim_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +PchResetPeim_INCLUDES=\ + $(INTEL_PCH_INCLUDES)\ + $(EdkIIGlueLib_INCLUDES)\ + +PchResetPeim_DEFINES = $(MY_DEFINES)\ + /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=InstallPchReset"\ + /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \ + /D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \ + /D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \ + /D __EDKII_GLUE_PEI_SERVICES_LIB__ \ + /D __EDKII_GLUE_PEI_MEMORY_ALLOCATION_LIB__ \ + /D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ + +PchResetPeim_LIB_LINKS =\ + $(GuidLib_LIB) \ + $(PchPlatformPeiLib_LIB) \ + $(IntelPchPpiLib_LIB)\ + $(EDKFRAMEWORKPPILIB) \ + $(EdkIIGlueBaseLib_LIB)\ + $(EdkIIGlueBaseLibIA32_LIB)\ + $(EdkIIGlueBaseIoLibIntrinsic_LIB) \ + $(EdkIIGluePeiDebugLibReportStatusCode_LIB) \ + $(EdkIIGluePeiReportStatusCodeLib_LIB) \ + $(EdkIIGluePeiServicesLib_LIB) \ + $(EdkIIGluePeiMemoryAllocationLib_LIB) \ + $(EdkIIGlueBasePciLibCf8_LIB) \ + $(PchResetCommonPeiLib_LIB)\ + $(EdkIIGlueBasePciLibPciExpress_LIB)\ + +PchResetPeimBin: $(PchResetPeim_LIB_LINKS) + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\ + /f $(BUILD_DIR)\PchResetPeim.mak all \ + "MY_INCLUDES=$(PchResetPeim_INCLUDES)"\ + "MY_DEFINES=$(PchResetPeim_DEFINES)"\ + NAME=PchResetPeim\ + MAKEFILE=$(BUILD_DIR)\PchResetPeim.mak \ + GUID=FF259F16-18D1-4298-8DD2-BD87FF2894A9\ + ENTRY_POINT=_ModuleEntryPoint \ + TYPE=PEIM \ + EDKIIModule=PEIM\ + DEPEX1=$(PchResetPeim_DIR)\PchReset.dxs\ + DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX\ + COMPRESS=0 +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.sdl b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.sdl new file mode 100644 index 0000000..b213204 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.sdl @@ -0,0 +1,67 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchResetPeim/PchResetPeim.sdl 1 2/08/12 9:05a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 9:05a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchResetPeim/PchResetPeim.sdl $ +# +# 1 2/08/12 9:05a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +TOKEN + Name = "PchResetPeim_SUPPORT" + Value = "1" + Help = "Main switch to enable PchInitPeim support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes +End + +PATH + Name = "PchResetPeim_DIR" +End + +MODULE + File = "PchResetPeim.mak" + Help = "Includes PchResetPeim.mak to Project" +End + +ELINK + Name = "$(BUILD_DIR)\PchResetPeim.ffs" + Parent = "FV_BB" + InvokeOrder = AfterParent +End + +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* -- cgit v1.2.3