From b7c51c9cf4864df6aabb99a1ae843becd577237c Mon Sep 17 00:00:00 2001 From: raywu Date: Fri, 15 Jun 2018 00:00:50 +0800 Subject: init. 1AQQW051 --- .../SampleCode/Ppi/IntelPchSampleCodePpiLib.inf | 45 +++++++ .../SampleCode/Ppi/SmbusPolicy/SmbusPolicy.h | 38 ++++++ .../LynxPoint/SampleCode/Ppi/SmmAccess/SmmAccess.c | 25 ++++ .../LynxPoint/SampleCode/Ppi/SmmAccess/SmmAccess.h | 136 +++++++++++++++++++++ .../SampleCode/Ppi/UsbController/UsbController.h | 49 ++++++++ 5 files changed, 293 insertions(+) create mode 100644 ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/IntelPchSampleCodePpiLib.inf create mode 100644 ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/SmbusPolicy/SmbusPolicy.h create mode 100644 ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/SmmAccess/SmmAccess.c create mode 100644 ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/SmmAccess/SmmAccess.h create mode 100644 ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/UsbController/UsbController.h (limited to 'ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi') diff --git a/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/IntelPchSampleCodePpiLib.inf b/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/IntelPchSampleCodePpiLib.inf new file mode 100644 index 0000000..b72ede5 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/IntelPchSampleCodePpiLib.inf @@ -0,0 +1,45 @@ +## @file +# Component description file for the PEI protocol library +# +#@copyright +# Copyright (c) 2015 Intel Corporation. All rights reserved +# This software and associated documentation (if any) is furnished +# under a license and may only be used or copied in accordance +# with the terms of the license. Except as permitted by such +# license, no part of this software or documentation may be +# reproduced, stored in a retrieval system, or transmitted in any +# form or by any means without the express written consent of +# Intel Corporation. +# +# This file contains a 'Sample Driver' and is licensed as such +# under the terms of your license agreement with Intel or your +# vendor. This file may be modified by the user, subject to +# the additional terms of the license agreement +# + + +[defines] +BASE_NAME = IntelPchSampleCodePpiLib +COMPONENT_TYPE = LIBRARY + +[sources.common] + SmmAccess/SmmAccess.h + SmmAccess/SmmAccess.c + +[includes.common] + $(EFI_SOURCE) + $(EDK_SOURCE)/Foundation + $(EDK_SOURCE)/Foundation/Efi + $(EDK_SOURCE)/Foundation/Efi/Include + $(EDK_SOURCE)/Foundation/Framework + $(EDK_SOURCE)/Foundation/Framework/Include + $(EDK_SOURCE)/Foundation/Include + $(EDK_SOURCE)/Foundation/Include/IndustryStandard + $(EDK_SOURCE)/Foundation/Include/Pei + $(EDK_SOURCE)/Foundation/Library/Pei/Include + $(EDK_SOURCE)/Foundation/Library/Dxe/Include + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT) + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/SampleCode + +[nmake.common] +C_STD_INCLUDE= diff --git a/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/SmbusPolicy/SmbusPolicy.h b/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/SmbusPolicy/SmbusPolicy.h new file mode 100644 index 0000000..b43803b --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/SmbusPolicy/SmbusPolicy.h @@ -0,0 +1,38 @@ +/** @file + Smbus Policy PPI as defined in EFI 2.0 + +@copyright + Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains 'Framework Code' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may not be modified, except as allowed by + additional terms of your license agreement. +**/ +#ifndef _PEI_SMBUS_POLICY_PPI_H +#define _PEI_SMBUS_POLICY_PPI_H + +#define PEI_SMBUS_POLICY_PPI_GUID \ + { \ + 0x63b6e435, 0x32bc, 0x49c6, 0x81, 0xbd, 0xb7, 0xa1, 0xa0, 0xfe, 0x1a, 0x6c \ + } + +EFI_FORWARD_DECLARATION (PEI_SMBUS_POLICY_PPI); + +struct _PEI_SMBUS_POLICY_PPI { + UINTN BaseAddress; + UINT32 PciAddress; + UINT8 NumRsvdAddress; + UINT8 *RsvdAddress; +}; + +extern EFI_GUID gPeiSmbusPolicyPpiGuid; + +#endif diff --git a/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/SmmAccess/SmmAccess.c b/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/SmmAccess/SmmAccess.c new file mode 100644 index 0000000..85ab194 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/SmmAccess/SmmAccess.c @@ -0,0 +1,25 @@ +/** @file + SmmAccess PPI GUID + +@copyright + Copyright (c) 2015 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains 'Framework Code' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may not be modified, except as allowed by + additional terms of your license agreement. +**/ +#include "Tiano.h" +#include "Pei.h" +#include EFI_PPI_DEFINITION (SmmAccess) + +EFI_GUID gPeiSmmAccessPpiGuid = PEI_SMM_ACCESS_PPI_GUID; + +EFI_GUID_STRING(&gPeiSmmAccessPpiGuid, "SmmAccess", "SMM Access PPI"); diff --git a/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/SmmAccess/SmmAccess.h b/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/SmmAccess/SmmAccess.h new file mode 100644 index 0000000..4873b1a --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/SmmAccess/SmmAccess.h @@ -0,0 +1,136 @@ +/** @file + This code abstracts the PEI core to provide SmmAccess services. + +@copyright + Copyright (c) 2015 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains 'Framework Code' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may not be modified, except as allowed by + additional terms of your license agreement. +**/ +#ifndef _PEI_SMM_ACCESS_PPI_H_ +#define _PEI_SMM_ACCESS_PPI_H_ + +#include EFI_GUID_DEFINITION (SmramMemoryReserve) + +#define PEI_SMM_ACCESS_PPI_GUID \ + { \ + 0x268f33a9, 0xcccd, 0x48be, 0x88, 0x17, 0x86, 0x5, 0x3a, 0xc3, 0x2e, 0xd6 \ + } + +EFI_FORWARD_DECLARATION (PEI_SMM_ACCESS_PPI); + +typedef +EFI_STATUS +(EFIAPI *PEI_SMM_OPEN) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_SMM_ACCESS_PPI * This, + IN UINTN DescriptorIndex + ) +/** + This routine accepts a request to "open" a region of SMRAM. The + region could be legacy ABSEG, HSEG, or TSEG near top of physical memory. + The use of "open" means that the memory is visible from all PEIM + and SMM agents. + + @param[in] This - Pointer to the SMM Access Interface. + @param[in] DescriptorIndex - Region of SMRAM to Open. + + @retval EFI_SUCCESS - The region was successfully opened. + @retval EFI_DEVICE_ERROR - The region could not be opened because locked by + chipset. + @retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds. +**/ +; + +typedef +EFI_STATUS +(EFIAPI *PEI_SMM_CLOSE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_SMM_ACCESS_PPI * This, + IN UINTN DescriptorIndex + ) +/** + This routine accepts a request to "close" a region of SMRAM. The + region could be legacy AB or TSEG near top of physical memory. + The use of "close" means that the memory is only visible from SMM agents, + not from PEIM. + + @param[in] This - Pointer to the SMM Access Interface. + @param[in] DescriptorIndex - Region of SMRAM to Close. + + @retval EFI_SUCCESS - The region was successfully closed. + @retval EFI_DEVICE_ERROR - The region could not be closed because locked by + chipset. + @retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds. +**/ +; + +typedef +EFI_STATUS +(EFIAPI *PEI_SMM_LOCK) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_SMM_ACCESS_PPI * This, + IN UINTN DescriptorIndex + ) +/** + This routine accepts a request to "lock" SMRAM. The + region could be legacy AB or TSEG near top of physical memory. + The use of "lock" means that the memory can no longer be opened + to PEIM. + + @param[in] This - Pointer to the SMM Access Interface. + @param[in] DescriptorIndex - Region of SMRAM to Lock. + + @retval EFI_SUCCESS - The region was successfully locked. + @retval EFI_DEVICE_ERROR - The region could not be locked because at least + one range is still open. + @retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds. +**/ +; + +typedef +EFI_STATUS +(EFIAPI *PEI_SMM_CAPABILITIES) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_SMM_ACCESS_PPI * This, + IN OUT UINTN *SmramMapSize, + IN OUT EFI_SMRAM_DESCRIPTOR * SmramMap + ) +/** + This routine services a user request to discover the SMRAM + capabilities of this platform. This will report the possible + ranges that are possible for SMRAM access, based upon the + memory controller capabilities. + + @param[in] This - Pointer to the SMRAM Access Interface. + @param[in] SmramMapSize - Pointer to the variable containing size of the + buffer to contain the description information. + @param[in] SmramMap - Buffer containing the data describing the Smram + region descriptors. + + @retval EFI_BUFFER_TOO_SMALL - The user did not provide a sufficient buffer. + @retval EFI_SUCCESS - The user provided a sufficiently-sized buffer. +**/ +; + +struct _PEI_SMM_ACCESS_PPI { + PEI_SMM_OPEN Open; + PEI_SMM_CLOSE Close; + PEI_SMM_LOCK Lock; + PEI_SMM_CAPABILITIES GetCapabilities; + BOOLEAN LockState; + BOOLEAN OpenState; +}; + +extern EFI_GUID gPeiSmmAccessPpiGuid; + +#endif diff --git a/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/UsbController/UsbController.h b/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/UsbController/UsbController.h new file mode 100644 index 0000000..2fec82f --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/SampleCode/Ppi/UsbController/UsbController.h @@ -0,0 +1,49 @@ +/** @file + Usb Controller PPI as defined in EFI 2.0 + + This code abstracts the PEI core to provide Usb Controller Info from Chipset. + +@copyright + Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains 'Framework Code' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may not be modified, except as allowed by + additional terms of your license agreement. +**/ +#ifndef _PEI_USB_CONTROLLER_PPI_H_ +#define _PEI_USB_CONTROLLER_PPI_H_ + +#define PEI_USB_CONTROLLER_PPI_GUID \ + { \ + 0x3bc1f6de, 0x693e, 0x4547, 0xa3, 0x0, 0x21, 0x82, 0x3c, 0xa4, 0x20, 0xb2 \ + } + +#define PEI_EHCI_CONTROLLER 0x03 + +EFI_FORWARD_DECLARATION (PEI_USB_CONTROLLER_PPI); + +typedef +EFI_STATUS +(EFIAPI *PEI_GET_USB_CONTROLLER) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_USB_CONTROLLER_PPI *This, + IN UINT8 UsbControllerId, + OUT UINTN *ControllerType, + OUT UINTN *BaseAddress + ); + +struct _PEI_USB_CONTROLLER_PPI { + PEI_GET_USB_CONTROLLER GetUsbController; +}; + +extern EFI_GUID gPeiUsbControllerPpiGuid; + +#endif -- cgit v1.2.3