American Megatrends, Inc.

ReleaseNotes

Copyright

Release Notes

© American Megatrends, Inc.


Release Notes - NDA Required

Component Information:

Component Title: Intel System Agent

Component Reference Name: Intel System Agent

Component Type: eChipset

Release Date: 2012-02-10

Source Control Label: 4.6.5.3_Intel_SA-RC_050_000

Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

N0NE

Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF

Component Title: Intel SystemAgent NB Chipset

Component Reference Name: ivd_VBios, ivm_VBios

Component Source Control Label: 4.6.5.3_Intel_SA-RC_050_000

Component Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Component Description:

Support Intel Haswell North Bridge.

This is a caption
Filename | Description
Release Notes.chm | Intel Haswell NB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board

ModulePart Description:Intel SystemAgent NB Board Component Settings

Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup

ModulePart Description:NBSetup Setup Settings

Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset

ModulePart Description:Intel SystemAgent NB Chipset Component Settings

Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI

ModulePart Description:Support Intel SystemAgent NB SMI Settings

Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols

ModulePart Description:NB Protocols

Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI

ModulePart Description:Define NB PPI

Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap

ModulePart Description:Intel SystemAgent RC Wrap Settings

Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass

ModulePart Description:For Chipset Reference Board Template initialization

Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord

ModulePart Description:Save memory information in SMBIOS

Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.

Porting Notes:

Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

AMI Build Tools:

Tools Label: 4.5.5_Tools_38, Dated: 2011-12-20

Visual eBios: RSS 5.72.0219, Dated: 2012-12-20

Compiler Tool(s): Microsofts Windows Driver Kit (WDK) Ver. 7600.16385.1

Reference or 3rd Party Code/File in this Release:

Haswell Framework BIOS Reference Code: 0.5.0

Haswell Memory Reference Code: 0.5.0

Reference or 3rd Party Code updated in this Release:

None

Files changed in the Reference or 3rd Party Code:

None

New features added in this label:

None

General Bug Fixes and EIP Addressed in this Label:

General Bug Fixes

None

EIP Addressed

None

Files Changed for General Bug Fixes and EIP Addressed in this Label:

General Bug Fixes

None

EIP Addressed

None

Known Limitations and Erratas in this label:

NONE

Remaining Issues:

Issue(s) with a Description

NONE

Unit Testing:

None

Validation Testing:

None

Release History:

HISTORY.txt

American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-02-23
Source Control Label: 4.6.5.3_Intel_SA-RC_050_001
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_050_001 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

TWO
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch7_00
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.dat,hsm_Vbios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

AMI Build Tools:
Tools Label: 4.5.5_Tools_38, Dated: 2011/12/20
Visual eBios: RSS 5.72.0219, Dated: 2011/12/20
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel Haswell System Agent Refcode
Reference or 3rd Party Code updated in this Release:
Haswell Framework BIOS Reference Code: 0.5.0
Haswell Memory Reference Code: 0.5.0
Haswell VBIOS: 2133
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] None
[Category] Improvement
[Description] Change VBIOS the file name.
Notice : This hsm_Vbios.dat file is false.
[Files] Nb.sdl, hsm_Vbios.dat, NBCSP.CIF

[TAG] None
[Category] Improvement
[Description] Adjusted North Bridge the Setup item value.

[TAG] None
[Category] Improvement
[Description] Updated to support 4.6.5.3_IntelEDK_1117_Patch7_00.
[Files] BdatAccessHandler.mak, SaInitPeim.mak, SaInitDxe.mak,
SmmAccessPeim.mak, SmmAccess.mak, SmBiosMemory.mak,
PciHostBridge.mak, MemoryInit.mak
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_050_000

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-03-09
Source Control Label: 4.6.5.3_Intel_SA-RC_050_002
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_050_001 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

TWO
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_01
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

THREE
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_01
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

AMI Build Tools:
Tools Label: 4.5.5_Tools_38, Dated: 2011/12/20
Visual eBios: RSS 5.72.0219, Dated: 2011/12/20
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.5.0
Haswell Memory Reference Code: 0.5.0
Haswell VBIOS: 2133
Haswell GOP: 5.0.1.1005
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] None
[Category] Improvement
[Description] Change VBIOS the files name.
Notice : hsm_Vbios.bin and hsd_Vbios.bin is dummy files.
[Files] Nb.sdl, hsm_VBios.bin, hsd_VBios.bin, NBCSP.CIF

[TAG] None
[Category] Improvement
[Description] Support MRC debug message print information and RMT message.
[Files] NBPEI.c

[TAG] None
[Category] Improvement
[Description] Create Haswell Intel SA GOP Driver module part.
Notice : IntelGopDriver.efi and vbt.bin is dummy files.
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_050_000
4.6.5.3_Intel_SA-RC_050_001

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-03-23
Source Control Label: 4.6.5.3_Intel_SA-RC_050_003
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_050_003 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

TWO
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_01
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

THREE
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_01
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

AMI Build Tools:
Tools Label: 4.5.5_Tools_38, Dated: 2011/12/20
Visual eBios: RSS 5.72.0219, Dated: 2011/12/20
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.5.0
Haswell Memory Reference Code: 0.5.0
Haswell VBIOS: 2133
Haswell GOP: 5.0.1.1005
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] None
[Category] Improvement
[Description] Fixed MRC_DEBUG_PRINT = 0 for not send MRC debug message.
[Files] NBPEI.c, MemoryInit.sdl, MrcOemDebugPrint.h

[TAG] None
[Category] Improvement
[Description] Correct will hang in MRC while change DIMM.
[Files] NB.sd
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_050_000
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_002

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-004-05
Source Control Label: 4.6.5.3_Intel_SA-RC_055_004
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_055_004
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_050_003 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_01
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_01
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_39, Dated: 2012/04/04
Visual eBios: RSS 5.72.0220, Dated: 2012/04/04
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.5.5
Haswell Memory Reference Code: 0.5.5
Haswell VBIOS: 2133
Haswell GOP: 5.0.1.1005
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] EIP87103
[Category] Spec Update
[Severity] Important
[Description] Update SystemAgent RefCode Revision: 0.5.5 .
[Description] .\ReferenceCode\Chipset\SystemAgent\*.*

[TAG] EIP87103
[Category] Spec Update
[Severity] Important
[Description] Add token NB_IOTRAP_SMI_ADDRESSE for SystemAgent RefCode Revision: 0.5.5.
[Files] Nb.sdl

[TAG] EIP87103
[Category] New Feature
[Severity] Important
[Description] Add routine RetrieveGdxcMemorySize to support GDXC feature and SA RC rev. 0.5.5.
[Files] NBPEI.c

[TAG] EIP87103
[Category] Spec Update
[Severity] Important
[Description] Change for SystemAgent RefCode Revision: 0.5.5 .
[Files] NBDxe.c, NBPEI.c, NBSMI.C, NBGeneric.cm NB.sd, NBSetup.c, GetSetupData.c, NbSetupData.h

[TAG] None
[Category] Improvement
[Description] Add HD Audio device router.
[Files] Nb.sdl

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Fixed token RESET_RUNTIME_SERVICES_SUPPORT = 1 building error.
[Files] NBSetup.mak
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_050_000
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_003

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-04-26
Source Control Label: 4.6.5.3_Intel_SA-RC_055_005
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_055_005 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_055_004 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_01
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_39, Dated: 2012/04/04
Visual eBios: RSS 5.72.0220, Dated: 2012/04/04
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.5.5
Haswell Memory Reference Code: 0.5.5
Haswell VBIOS: 2138
Haswell GOP: 5.0.1.1005
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] None
[Category] Improvement
[Severity] Important
[Description] Fixed GenericSio use 0x0 ~ 0xfff issue start.
[Description] PciHostBridge.c

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Import Haswell IGD OptionRom for Mobile.(Revision:2138)
[Description] hsd_VBios.bin, hsm_VBios.bin

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Adjust Memory Configuration the Setup item for debug mode.
[Description] NB.sd, NBPEI.c, MemoryInit.sdl, MrcOemDebugPrint.h

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Fixed PeiRamBootSupport = 1 warm boot system is hang.
[Description] NBPEI.c, NBCspLib.h

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Support Locate MRC error Report.
[Description] NBPEI.c, MemoryInit.c

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Adjust Intel System Agent module the Setup item and Policy.
[Description] GetSetupData.c, NB.sdl, NB.sd, NB.uni, NBDxe.c, NBPEI.c,
NBSetup.c, NBSetupReset.c, NbSetupData.h

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Correct Graphics Technology (GT) Displays (GT Info) in BIOS Setup.
[Description] NBSetup.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_050_000
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_055_004

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-05-14
Source Control Label: 4.6.5.3_Intel_SA-RC_056_006
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_056_007 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_056_005 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_01
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_39, Dated: 2012/04/04
Visual eBios: RSS 5.72.0225, Dated: 2012/03/13
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.5.6
Haswell Memory Reference Code: 0.5.6.9
Haswell VBIOS: 2139
Haswell GOP: 5.0.1.1005
Reference or 3rd Party Code updated in this Release:
Kit 45209 Shark Bay SA Framework Reference Code Alpha 2 Version 0.5.6.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] None
[Category] Improvement
[Description] Update Haswell IGD OptionRom to revision:2139.
[Files] hsd_VBios.bin, hsm_VBios.bin

[TAG] None
[Category] Improvement
[Description] Change MRC Fast Boot default to diasbled.
[Files] NB.sd

[TAG] None
[Category] Improvement
[Description] Update Haswell SystemAgent RefCode Revision: 0.5.6
[Files] ReferenceCode\Chipset\SystemAgent\*.*
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-06-14
Source Control Label: 4.6.5.3_Intel_SA-RC_056_007
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_056_008 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_056_005 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_01
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_39, Dated: 2012/04/04
Visual eBios: RSS 5.72.0225, Dated: 2012/03/13
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.5.6
Haswell Memory Reference Code: 0.5.6.9
Haswell VBIOS: 2139
Haswell GOP: 5.0.1.1005
Reference or 3rd Party Code updated in this Release:
Kit 45209 Shark Bay SA Framework Reference Code Alpha 2 Version 0.5.6.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] None
[Category] Improvement
[Severity] Important
[Description] Correccted debug mode assert errot, if no IGFX to skip GT PM Init.
[Description] graphicsinit.c

[TAG] None
[Category] Improvement
[Description] Support token to disable PEG 0 ~ 2.
[Description] NB.sdl, NB.sd, NB.ASL, HOST_BUS.ASL

[TAG] None
[Category] Improvement
[Description] 1. Remap is disabled.
2. Support MMIO 4G to Tolud.
[Description] PciHostBridge.c

[TAG] None
[Category] Improvement
[Description] Add Notify BeforeMrc and AfterMrc.
[Description] NBPEI.c, NBPPI.h, MemoryInit.

[TAG] EIP90390
[Category] Improvement
[Description] Prevent VeB build error occur if CSM module is removed.
[Description] LegacyRegion2.sdl

[TAG] None
[Category] Improvement
[Description] Fixed PEG PERR log lost issue.
[Description] NBSMI.C

[TAG] None
[Category] Improvement
[Description] Fixed S4 resume fail.
[Description] NBPEI.c

[TAG] None
[Category] Improvement
[Description] Set Max Payload Size for EDS.
[Description] NBDxe.c

[TAG] None
[Category] Improvement
[Description] Fix some devices work abnormal in the PEG slot.
[Description] NBDxe.c

[TAG] None
[Category] Improvement
[Description] Fixed Tse 1224 will hang setup call back and value error.
[Description] NBSetup.c, NB.sd

[TAG] None
[Category] Improvement
[Description] Set 'Memory Scramble' default Disabled.
[Description] NB.sd

[TAG] None
[Category] Improvement
[Description] Fix for setup item 'DIMM profile' associated with options.
[Description] NBSetup.c, NB.sd
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-07-03
Source Control Label: 4.6.5.3_Intel_SA-RC_060_008
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_060_010 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_060_007 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_01
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_39, Dated: 2012/04/04
Visual eBios: RSS 5.72.0225, Dated: 2012/03/13
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.6.0
Haswell Memory Reference Code: 0.6.0.1
Haswell VBIOS: 2142
Haswell GOP: 5.0.4.1010
Reference or 3rd Party Code updated in this Release:
Kit 46132 Shark Bay SA Framework Reference Code Alpha 2 Version 0.6.0.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] None
[Category] Improvement
[Description] Update Haswell IGD OptionRom to revision:2142.
[Files] hsd_VBios.bin, hsm_VBios.bin

[TAG] None
[Category] Improvement
[Description] Update Shark Bay SA Framework Reference Code Alpha 2 Version 0.6.0.
[Files] ReferenceCode\Chipset\SystemAgent\*.*

[TAG] None
[Severity] Important
[Description] Change for SystemAgent RefCode Revision: 0.6.0.
[Files] NBPEI.DXS, NB.sd, NBDxe.c, NBPEI.c

[TAG] None
[Category] Improvement
[Description] Update Haswell IGD GOP Driver to revision:Alpha 5.0.4.1010.
[Files] IntelGopDriver.efi, vbt.bin

[TAG] None
[Severity] Important
[Description] Change the Save/Restore NB Registers position.
[Files] NB.ASL, NBAcpi.c, NBDxe.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-07-27
Source Control Label: 4.6.5.3_Intel_SA-RC_060_009
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_060_011 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_060_009 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_39, Dated: 2012/04/04
Visual eBios: RSS 5.72.0225, Dated: 2012/03/13
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.6.0
Haswell Memory Reference Code: 0.6.0.1
Haswell VBIOS: 2144
Haswell GOP: 5.0.4.1010
Reference or 3rd Party Code updated in this Release:
Kit 46132 Shark Bay SA Framework Reference Code Alpha 2 Version 0.6.0.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] None
[Category] Improvement
[Description] IGfx Fource Disable Support.
[Files] GetSetupData.c, NB.sdl, NB.sd, NB.uni, NbSetupData.h, NBDxe.c, NBPEI.c

[TAG] None
[Category] Improvement
[Description] Adjusted NB policy debault.
[Files] NB.sd, NBDxe.c

[TAG] None
[Category] Improvement
[Description] Add manufacturing defaults for Intel SA options.
[Files] NB.sd

[TAG] None
[Category] Improvement
[Description] Change to before Dxe SaInit to set maximum payload.
[Files] NBDxe.c

[TAG] None
[Category] Improvement
[Description] Change reference token for support TXT.
[Files] MemoryInit.mak

[TAG] None
[Category] Improvement
[Description] Support ASLPREPROCESS_FLAG to include Iintel RC flags.
[Files] MemoryInit.sdl, SaInitPeim.sdl, SystemAgent.sdl

[TAG] None
[Category] Improvement
[Description] Support none-SPD Platform.
[Files] MemoryInit.sdl, MemoryInit.mak, MrcOemPlatform

[TAG] None
[Category] Improvement
[Description] Update Haswell IGD OptionRom to revision:2144.
[Files] hsd_VBios.bin, hsm_VBios.bin

[TAG] None
[Category] Improvement
[Description] Fix building error after update 4.6.5.4_Csm_OptOut_03.
[Files] IntelSaGopPolicy.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-08-14
Source Control Label: 4.6.5.3_Intel_SA-RC_061_010
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_061_012 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_061_010 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_39, Dated: 2012/04/04
Visual eBios: RSS 5.72.0225, Dated: 2012/03/13
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.6.1
Haswell Memory Reference Code: 0.6.1.2
Haswell VBIOS: 2145
Haswell GOP: 5.0.5.1012
Reference or 3rd Party Code updated in this Release:
Kit 47252 Shark Bay SA Framework Reference Code Alpha 2 Version 0.6.1.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] None
[Category] Improvement
[Description] If the PCIEXBAR register is enabled, it is INIT.
[Files] NBSECInit.ASM

[TAG] None
[Severity] Important
[Description] Change for SystemAgent RefCode Revision: 0.6.1.
[Files] NB.sdl, NB.sd, NBCSP.CIF, NBDxe.c, NB.ASL, SaAudio.asl

[TAG] None
[Severity] Important
[Description] Implemented BIOS Integration Guide Rev 1.0 to Intel SA
GOP driver.
[Files] IntelSaGopDriver.cif, IntelSaGopDriver.mak,
IntelSaGopDriver.sdl, IntelSaGopPolicy.c,
IntelSaGopSetup.c, IntelSaGopSetup.h,
IntelSaGopSetup.mak, IntelSaGopSetup.sd,
IntelSaGopSetup.sdl, IntelSaGopSetup.uni,
IntelSaGopSwitch.c, IntelSaGopDriver.h, NBPlatformData.h

[TAG] None
[Category] Improvement
[Description] Update Haswell IGD OptionRom to revision:2145.
[Files] hsd_VBios.bin, hsm_VBios.bin

[TAG] None
[Category] Improvement
[Description] Update Shark Bay SA Framework Reference Code Alpha 2 Version 0.6.1.
[Files] ReferenceCode\Chipset\SystemAgent\*.*

[TAG] None
[Category] Improvement
[Description] Update Haswell IGD GOP Driver to revision: 5.0.5.1012.
[Files] IntelGopDriver.efi, vbt.bin
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-08-24
Source Control Label: 4.6.5.3_Intel_SA-RC_061_011
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_061_014 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_061_010 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_39, Dated: 2012/04/04
Visual eBios: RSS 5.72.0225, Dated: 2012/03/13
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.6.1
Haswell Memory Reference Code: 0.6.1.2
Haswell VBIOS: 2145
Haswell GOP: 5.0.5.1012
Reference or 3rd Party Code updated in this Release:
Kit 47252 Shark Bay SA Framework Reference Code Alpha 2 Version 0.6.1.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] None
[Category] Improvement
[Severity] Important
[Description] Remove useless SB_SHADOW_CONTROL.
[Files] NBGeneric.c

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Remove useless AMI_OVERRIDE_FOR_CHECK_IGD_PRESENT.
[Files] graphicsinit.c

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Corrected GTT reference define.
[Files] NBDxe.c, NBPEI.c

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Remove useless iME_SUPPORT.
[Files] NBDxe.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-08-31
Source Control Label: 4.6.5.3_Intel_SA-RC_061_012
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_061_015 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_061_011 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_39, Dated: 2012/04/04
Visual eBios: RSS 5.72.0225, Dated: 2012/03/13
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.6.1
Haswell Memory Reference Code: 0.6.1.2
Haswell VBIOS: 2145
Haswell GOP: 5.0.5.1012
Reference or 3rd Party Code updated in this Release:
Kit 47252 Shark Bay SA Framework Reference Code Alpha 2 Version 0.6.1.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] None
[Category] Improvement
[Severity] Important
[Description] Update Board ID for Haswell platform.
[Files] NBDxe.c

[TAG] EIP99526
[Category] Improvement
[Severity] Important
[Description] Fixed system hang at CKP 0x6A if PI_SPECIFICATION_VERSION = 0x10000.
[Files] UpdateMemoryRecord.dxs

[TAG] None
[Category] Improvement
[Severity] Important
[Description] SA RC modified for Switchable graphics function.
[Files] SgDgpu.asl, SgSsdt.asl, SaPlatformPolicy.h, SwitchableGraphicsInit.c, SystemAgent.sdl

[TAG] None
[Category] Improvement
[Severity] Important
[Description] PCI Root Bridge Prefetchable memory for HOTPLUG_SUPPORT.
[Files] PciHostBridge.c, SystemAgent.sdl

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Reprogram Memory Down function.
[Files] MrcOemPlatform.c

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Fixed building error when disable all PCI slots.
[Files] HOST_BUS.ASL
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-09-12
Source Control Label: 4.6.5.3_Intel_SA-RC_061_013
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_061_016 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_061_011 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_39, Dated: 2012/04/04
Visual eBios: RSS 5.72.0225, Dated: 2012/03/13
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.6.1
Haswell Memory Reference Code: 0.6.1.2
Haswell VBIOS: 2145
Haswell GOP: 5.0.5.1012
Reference or 3rd Party Code updated in this Release:
Kit 47252 Shark Bay SA Framework Reference Code Alpha 2 Version 0.6.1.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] EIP97383
[Category] Improvement
[Severity] Important
[Description] AllocateBuffer failed when we use INTEL PciHostbridge Driver UEFI spec doesn't say that we need to check the *hostaddress should be below 4GB.
[Files] PciRootBridgeIo.c

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Sighting #4391781 Update.
Hang During Memory Initialization on Cold Boots with LPDDR3.
[Files] MrcReadDqDqs.c

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Modified for Switchable Graphics support.
[Files] NBPEI.c, SwitchableGraphicsInit.c, SystemAgent.sdl

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Restore Performance Tuning the skip part.
[Files] NBDxe.c

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Fixed some pcie card compatibility issue.
[Files] NBGeneric.c

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Adjusted setup tem default.
[Files] NB.sd

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Add RxCEM Loop back setup item.
[Files] GetSetupData.c, NB.sd, NB.uni, NBPEI.c, NbSetupData.h, NBPEI.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-09-26
Source Control Label: 4.6.5.3_Intel_SA-RC_070_014
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_070_017 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_070_013 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.7.0
Haswell Memory Reference Code: 0.7.0.0
Haswell VBIOS: 2149
Haswell GOP: 5.0.5.1012
Reference or 3rd Party Code updated in this Release:
Kit 48583 Shark Bay SA Framework Reference Code Beta Version 0.7.0.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] None
[Category] Update
[Severity] Important
[Description] Update Shark Bay SA Framework Reference Code Beta Version 0.7.0.
[Files] ReferenceCode\Chipset\SystemAgent\*.*

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Import Haswell IGD OptionRom for Mobile.(Revision:2149)
[Files] hsd_VBios.bin, hsm_VBios.bin

[TAG] None
[Category] Update
[Severity] Important
[Description] Changed for Shark Bay SA Framework Reference Code Beta Version 0.7.0.
[Files] NBPEI.c

[TAG] EIP101495
[Category] Improvement
[Severity] Important
[Description] Initialize SSID of B0:D3:F0 and B0:D2:F0/F1.
[Files] NB.h, NB.sdl, NBPEI.c

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Remove SPD XMP Profile support of the setup info.
[Files] NB.sd, NBSetup.c

[TAG] None
[Category] Improvement
[Severity] Important
[Description] Adjust setup item default for eDP display.
[Files] NB.sd
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-09-28
Source Control Label: 4.6.5.3_Intel_SA-RC_070_015
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_070_017 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_070_013 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.7.0
Haswell Memory Reference Code: 0.7.0.0
Haswell VBIOS: 2149
Haswell GOP: 5.0.5.1012
Reference or 3rd Party Code updated in this Release:
Kit 48583 Shark Bay SA Framework Reference Code Beta Version 0.7.0.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] None
[Category] Improvement
[Severity] Important
[Description] BDAT function support.
[Files] NB.sd, NBDxe.c, NBPEI.c, SystemAgent.sdl, BdatAccessHandler.sdl
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-10-03
Source Control Label: 4.6.5.3_Intel_SA-RC_070_016
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_070_018 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_070_013 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.7.0
Haswell Memory Reference Code: 0.7.0.0
Haswell VBIOS: 2149
Haswell GOP: 5.0.5.1012
Reference or 3rd Party Code updated in this Release:
Kit 48583 Shark Bay SA Framework Reference Code Beta Version 0.7.0.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] None
[Category] Improvement
[Severity] Important
[Description] Corrected memory down can't boot problem.
[Files] MrcMcConfiguration.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-10-03
Source Control Label: 4.6.5.3_Intel_SA-RC_070_017
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_070_018 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_070_013 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsd_Vbios.bin,hsm_Vbios.bin
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft’s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.7.0
Haswell Memory Reference Code: 0.7.0.0
Haswell VBIOS: 2149
Haswell GOP: 5.0.5.1012
Reference or 3rd Party Code updated in this Release:
Kit 48583 Shark Bay SA Framework Reference Code Beta Version 0.7.0.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] EIP102852
[Category] Improvement
[Severity] Important
[Description] Fixed Windows 8 Secure Flash failure.
[Files] MemoryInit.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

© American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-10-14
Source Control Label: 4.6.5.3_Intel_SA-RC_070_018
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_070_018 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_070_013 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.7.0
Haswell Memory Reference Code: 0.7.0.0
Haswell VBIOS: 2155
Haswell GOP: 5.0.5.1012
Reference or 3rd Party Code updated in this Release:
Support ULT and Mobile One BIOS.
follow Updtae some mahobay SA update.
Support XTU 4.0.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] EIP102852
[Category] Improvement
[Severity] Important
[Description] Fixed Windows 8 Secure Flash failure.
[Files] MemoryInit.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-10-14
Source Control Label: 4.6.5.3_Intel_SA-RC_071_019
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_070_018 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_070_013 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_071
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.7.0
Haswell Memory Reference Code: 0.7.0.0
Haswell VBIOS: 2155
Haswell GOP: 5.0.5.1012
Reference or 3rd Party Code updated in this Release:
Kit 48993 Shark Bay SA Framework Reference Code Beta Version 0.7.1.
Need Reference Haswell RC 0.71.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] EIP102852
[Category] Improvement
[Severity] Important
[Description] Fixed Windows 8 Secure Flash failure.
[Files] MemoryInit.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-10-16
Source Control Label: 4.6.5.3_Intel_SA-RC_071_019a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_070_018 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_070_013 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_071
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.7.0
Haswell Memory Reference Code: 0.7.0.0
Haswell VBIOS: 2155
Haswell GOP: 5.0.5.1012
Reference or 3rd Party Code updated in this Release:
Kit 48993 Shark Bay SA Framework Reference Code Beta Version 0.7.1.
Need Reference all RC 0.71.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] EIP102852
[Category] Improvement
[Severity] Important
[Description] Fixed Windows 8 Secure Flash failure.
[Files] MemoryInit.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-10-19
Source Control Label: 4.6.5.3_Intel_SA-RC_071_019b
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_070_018 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_070_013 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_071
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.7.0
Haswell Memory Reference Code: 0.7.0.0
Haswell VBIOS: 2155
Haswell GOP: 5.0.7.1014
Reference or 3rd Party Code updated in this Release:
Kit 48993 Shark Bay SA Framework Reference Code Beta Version 0.7.1.
Need Reference all RC 0.71.
Fixed SG mode not boot to OS.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] EIP102852
[Category] Improvement
[Severity] Important
[Description] Fixed Windows 8 Secure Flash failure.
[Files] MemoryInit.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
NONE
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-10-30
Source Control Label: 4.6.5.3_Intel_SA-RC_072_020
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4651_Haswell_08-RC_072 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_071_014 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_071
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.7.2
Haswell Memory Reference Code: 0.7.2.0
Haswell VBIOS: 2155
Haswell GOP: 5.0.7.1014
Reference or 3rd Party Code updated in this Release:
Kit 49337 (Description: Shark Bay SA Framework Reference Code Beta Version 0.7.2.
Fixed SG mode not boot to OS.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] EIP102852
[Category] Improvement
[Severity] Important
[Description] Fixed Windows 8 Secure Flash failure.
[Files] MemoryInit.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
ULT platform can not boot to OS after enable S0ID.
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-10-31
Source Control Label: 4.6.5.3_Intel_SA-RC_072_020a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4651_Haswell_08-RC_072 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_071_014 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_071
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.7.2
Haswell Memory Reference Code: 0.7.2.0
Haswell VBIOS: 2155
Haswell GOP: 5.0.7.1014
Reference or 3rd Party Code updated in this Release:
Kit 49337 (Description: Shark Bay SA Framework Reference Code Beta Version 0.7.2.
Fixed ULT can't boot to OS after SOID Enable .
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] EIP102852
[Category] Improvement
[Severity] Important
[Description] Fixed Windows 8 Secure Flash failure.
[Files] MemoryInit.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-11-09
Source Control Label: 4.6.5.3_Intel_SA-RC_072_020b
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4651_Haswell_08-RC_072 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_071_016 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_071
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.7.2
Haswell Memory Reference Code: 0.7.2.0
Haswell VBIOS: 2155
Haswell GOP: 5.0.7.1014
Reference or 3rd Party Code updated in this Release:
Kit 49337 (Description: Shark Bay SA Framework Reference Code Beta Version 0.7.2.
Support ULT and SharkBay MB oen BIOS.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] EIP102852
[Category] Improvement
[Severity] Important
[Description] Fixed Windows 8 Secure Flash failure.
[Files] MemoryInit.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-11-20
Source Control Label: 4.6.5.3_Intel_SA-RC_080_021
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_080_023 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_080_017 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_080
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.7.2
Haswell Memory Reference Code: 0.7.2.0
Haswell VBIOS: 2155
Haswell GOP: 5.0.7.1014
Reference or 3rd Party Code updated in this Release:
Kit 49337 (Description: Shark Bay SA Framework Reference Code Beta Version 0.7.2.
Support ULT and SharkBay MB oen BIOS.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
[TAG] EIP102852
[Category] Improvement
[Severity] Important
[Description] Fixed Windows 8 Secure Flash failure.
[Files] MemoryInit.c
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-11-29
Source Control Label: 4.6.5.3_Intel_SA-RC_080_021a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_080_023 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_080_017 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_080
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.8.0
Haswell Memory Reference Code: 0.8.0.0
Haswell VBIOS: 2155
Haswell GOP: 5.0.8.1015
Reference or 3rd Party Code updated in this Release:
Kit 49337 (Description: Shark Bay SA Framework Reference Code Beta Version 0.8.0.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
Fixed Enable RMT is hang in MRC.
Fixed Iffs is fail on memory down platform.
None
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-12-18
Source Control Label: 4.6.5.3_Intel_SA-RC_081_022
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_080_023 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_080_017 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_081
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.8.1
Haswell Memory Reference Code: 0.8.1.2
Haswell VBIOS: 2157
Haswell GOP: 5.0.1017
Reference or 3rd Party Code updated in this Release:
Kit 49337 (Description: Shark Bay SA Framework Reference Code Beta Version 0.8.1.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
Fixed Enable RMT is hang in MRC.
Fixed Iffs is fail on memory down platform.
None
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-12-22
Source Control Label: 4.6.5.3_Intel_SA-RC_081_022a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_080_023 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_080_017 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_081
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.8.1
Haswell Memory Reference Code: 0.8.1.2
Haswell VBIOS: 2157
Haswell GOP: 5.0.1017
Reference or 3rd Party Code updated in this Release:
Kit 49337 (Description: Shark Bay SA Framework Reference Code Beta Version 0.8.1.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
Fixed AnyWay show memory timing default value.
None
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-01-10
Source Control Label: 4.6.5.3_Intel_SA-RC_081_022b
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_080_023 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_080_017 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_081
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.8.1
Haswell Memory Reference Code: 0.8.1.2
Haswell VBIOS: 2160
Haswell GOP: 5.0.1019
Reference or 3rd Party Code updated in this Release:
Kit 49337 (Description: Shark Bay SA Framework Reference Code Beta Version 0.8.1.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
Fixed AnyWay show memory timing default value.
None
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-01-14
Source Control Label: 4.6.5.3_Intel_SA-RC_090_023
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_090_025 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_080_017 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_090
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.9.0
Haswell Memory Reference Code: 0.9.0.0
Haswell VBIOS: 2162
Haswell GOP: 5.0.1020
Reference or 3rd Party Code updated in this Release:
Kit 49337 (Description: Shark Bay SA Framework Reference Code Beta Version 0.9.0.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
Fixed AnyWay show memory timing default value.
None
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-01-15
Source Control Label: 4.6.5.3_Intel_SA-RC_090_023a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_090_025 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_080_017 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_090
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 0.9.0
Haswell Memory Reference Code: 0.9.0.0
Haswell VBIOS: 2162
Haswell GOP: 5.0.1020
Reference or 3rd Party Code updated in this Release:
Kit 49337 (Description: Shark Bay SA Framework Reference Code Beta Version 0.9.0.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-01-28
Source Control Label: 4.6.5.3_Intel_SA-RC_100_024
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_100_026 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_100_021 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_100
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.0.0
Haswell Memory Reference Code: 1.0.0.0
Haswell VBIOS: 2164
Haswell GOP: 5.0.1020
Reference or 3rd Party Code updated in this Release:
Kit 49337 (Description: Shark Bay SA Framework Reference Code Beta Version 1.0.0.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-02-09
Source Control Label: 4.6.5.3_Intel_SA-RC_110_025
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.1.0
Haswell Memory Reference Code: 1.1.0.0
Haswell VBIOS: 2164
Haswell GOP: 5.0.1022
Reference or 3rd Party Code updated in this Release:
Kit 49337 (Description: Shark Bay SA Framework Reference Code Beta Version 1.1.0.
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-02-23
Source Control Label: 4.6.5.3_Intel_SA-RC_120_026
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft?�s Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.2.0
Haswell Memory Reference Code: 1.2.0.0
Haswell VBIOS: 2164
Haswell GOP: 5.0.1022
Reference or 3rd Party Code updated in this Release:
Kit 51570 (Description: Shark Bay SA Framework Reference Code PV Version 1.2.0 (Hot Fix Traditional and PC ULT).
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-03-07
Source Control Label: 4.6.5.3_Intel_SA-RC_120_026a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.2.0
Haswell Memory Reference Code: 1.2.0.0
Haswell VBIOS: 2164
Haswell GOP: 5.0.1022
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
1. | Add "C7 Allowed" option of PEG Mode into Setup Menu.
Files | NB.sd; NB.uni;
2. | Add "Hot only" option for Memory Refresh 2x support to meet Intel Spec.
Files | NBPEI.c; NB.uni; NB.sd; NbSetupData.h; GetSetupData.c;
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. | Make some default SaPlatformPolicy items flexible. Define some SaPlatformPolicy items into NB_SETUP_DATA structure.
Files | NbSetupData.h; GetSetupData.c; NBPEI.c;
2. | Fix BSOD issue. When detecting Display Device and an invalid Display Device is occurred, asl code should decrease this invalid Display Device in Display Device List.
Files | INTELGFX.ASL;
3. | Memory data hasn't been cleared after running MRC base memory test.
Files | NB.sdl; NBPEI.c;
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-03-12
Source Control Label: 4.6.5.3_Intel_SA-RC_120_026b
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.2.0
Haswell Memory Reference Code: 1.2.0.0
Haswell VBIOS: 2164
Haswell GOP: 5.0.1022
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
1. Remove related SaSsdt acpi data to DSDT
SaInit.c; INTELGFX.ASL; Sa.asl; SaSsdt.asl; SaSsdtTables.sdl; NBDxe.c; NB.mak;

General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-03-14
Source Control Label: 4.6.5.3_Intel_SA-RC_120_026c
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.2.0
Haswell Memory Reference Code: 1.2.0.0
Haswell VBIOS: 2164
Haswell GOP: 5.0.1022
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. Fix some PEG card with no VGA can't work normally under SG mode.
NBPEI.c

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-03-14
Source Control Label: 4.6.5.3_Intel_SA-RC_130_027
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.3.0
Haswell Memory Reference Code: 1.3.0.0
Haswell VBIOS: 2164
Haswell GOP: 5.0.1022
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-03-15
Source Control Label: 4.6.5.3_Intel_SA-RC_130_027a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.3.0
Haswell Memory Reference Code: 1.3.0.0
Haswell VBIOS: 2164
Haswell GOP: 5.0.1022
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. | Fix PCIe Root Bridge Prefetchable Memory Base/Limit is not set when Prefetchable Memory required device is attached to system.
 | PciHostBridge.c; PciHostBridge.sdl;
2. | Fix and restructure PlatformConfig setting of SA policy.
 | NBDxe.c; GetSetupData.c; NbSetupData.h;
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-03-21
Source Control Label: 4.6.5.3_Intel_SA-RC_130_027b
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.3.0
Haswell Memory Reference Code: 1.3.0.0
Haswell VBIOS: 2170
Haswell GOP: 5.0.1025
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. Support C7 to SG funtion.
SgDgpu.asl;
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2012-03-25
Source Control Label: 4.6.5.3_Intel_SA-RC_130_027c
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.3.0
Haswell Memory Reference Code: 1.3.0.0
Haswell VBIOS: 2170
Haswell GOP: 5.0.1025
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. | Remove FlavorUpServer
 | NB.sd;
2. | Set Default Value for 2x ReFresh Mode when it's eanble
 | NB.sd;
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-04-02
Source Control Label: 4.6.5.3_Intel_SA-RC_130_027d
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.3.0
Haswell Memory Reference Code: 1.3.0.0
Haswell VBIOS: 2170
Haswell GOP: 5.0.1025
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. | Reduce boot time through PEG.
 | NB.mak; NBDxe.c; NBPEI.c; NBPPI.h; Sa.asl; PcieComplex.c; GraphicsInit.c; PciExpressInit.c;
2. | Fix building error when using 4.6.5.3_CSM.7.71_80.
 | LegacyRegion.*; NBCSP.CIF; CRB.sdl; LegacyRegion.h; LegacyRegion2.h; LegacyRegionProtocols.cif;
3. | Change name from CADR to CCSA to fix that the system has BsOD issue. It is due to the name(CADR) is conflict with AMI Aptio definition name.
 | Sa.asl; SaSsdt.asl;
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-04-08
Source Control Label: 4.6.5.3_Intel_SA-RC_140_028
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.4.0
Haswell Memory Reference Code: 1.4.0.0
Haswell VBIOS: 2170
Haswell GOP: 5.0.1025
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
None

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
NONE
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-04-09
Source Control Label: 4.6.5.3_Intel_SA-RC_140_028a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.4.0
Haswell Memory Reference Code: 1.4.0.0
Haswell VBIOS: 2170
Haswell GOP: 5.0.1025
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. Fix C7 function can't work with SA RC 1.4.0.0.
SgDgpu.asl; GetSetupData.c;

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
NONE
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-04-17
Source Control Label: 4.6.5.3_Intel_SA-RC_140_028b
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.4.0
Haswell Memory Reference Code: 1.4.0.0
Haswell VBIOS: 2170
Haswell GOP: 5.0.1025
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. | System might halts at CKP 0x55 with some specific combinations. (Ex: i7-4770 / 4570 + Hynix 4G / 2G)
 | MemoryInit.sdl; SB.h;
2. | Create a Token "PrimaryDisplay_SG_DEFAUT_ENABLE" for customer to decide if primarydispay should set to SG as default when SwitchableGraphics_SUPPORT is set to 1.
 | NB.sd; NBSetup.sdl;

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
NONE
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-04-23
Source Control Label: 4.6.5.3_Intel_SA-RC_140_028c
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.4.0
Haswell Memory Reference Code: 1.4.0.0
Haswell VBIOS: 2170
Haswell GOP: 5.0.1025
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. | Set Run-time C7 Allowed to Enable as default value.
 | MemoryInit.sdl; SB.h;
2. | Support for BIST (Built-In Self Test) Protocol.
 | IntelSaGopSetup.c; IntelSaGopSetup.h; IntelSaGopSetup.sd; IntelSaGopSetup.sd; IntelSaGopSetup.sdl; IntelSaGopSetup.uni; IntelSaGopDriver.h;

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
NONE
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-05-09
Source Control Label: 4.6.5.3_Intel_SA-RC_140_028d
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.4.0
Haswell Memory Reference Code: 1.4.0.0
Haswell VBIOS: 2170
Haswell GOP: 5.0.1025
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. | Save and restore the missed 81~86 reg lower nibbles for S3.
 | NB.ASL;
2. | System became resuming from S5 when system is resuming from S4.
 | NBPEI.c;
3. | Some PEG Lan Cards on NorthBridge would cause hanging issue when waking through them.
 | NBPEI.c;

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
NONE
Known Limitations and Erratas in this label:
Errata Item(s) with a Description
NONE
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-05-13
Source Control Label: 4.6.5.3_Intel_SA-RC_150_029
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.5.0
Haswell Memory Reference Code: 1.5.0.0
Haswell VBIOS: 2170
Haswell GOP: 5.0.1025
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. | Update SA RC to 1.5.0 and MRC to 1.5.0.0.
 | ReferenceCode\Chipset\SystemAgent\*.*;
2. | When runnign a long run test (S3,S4,or _on/_off) with SG on two chips platform, it may happen to BSOD 0x9F. It got different fail rate on different platform.
 | SgDgpu.asl;
3. | Actual memory size and memory size information in Setup Menu are dismatch.
 | NBSetup.c;

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
NONE
Known Limitations and Erratas in this label:
Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-05-13
Source Control Label: 4.6.5.3_Intel_SA-RC_150_029a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.5.0
Haswell Memory Reference Code: 1.5.0.0
Haswell VBIOS: 2170
Haswell GOP: 5.0.1025
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. Add PanelPowerEnable for enabling/disabling VDD force bit. (Required only for early enabling of eDP panel)
NBSetup.c; GetSetupData.c; NbSetupData.h; NBPEI.c;

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
NONE
Known Limitations and Erratas in this label:
Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-05-22
Source Control Label: 4.6.5.3_Intel_SA-RC_150_029b
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.5.0
Haswell Memory Reference Code: 1.5.0.0
Haswell VBIOS: 2170
Haswell GOP: 5.0.1025
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. | Add Token SG_GPIO_SUPPORT for GpioSupport.
 | NB.sdl; NBPEI.c;
2. | Add [Panel Power Enable] selection into Graphics Configuration of setup menu as Intel BIOS v125.
 | NB.sd; NB.uni;
3. | Add RCVENC1D into NB_SETUP_DATA for setting.
 | GetSetupData.c;

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
NONE
Known Limitations and Erratas in this label:
Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-06-03
Source Control Label: 4.6.5.3_Intel_SA-RC_150_029c
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_40, Dated: 2012-07-03
Visual eBios: RSS 5.72.0239, Dated: 2012-06-21
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.5.0
Haswell Memory Reference Code: 1.5.0.0
Haswell VBIOS: 2170
Haswell GOP: 5.0.1029
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. | Fix smbios type 17 data is incorrect for memory down system.
 | NBDXE.c;
2. | Set NB_LegacyRegion_SUPPORT default to 0.
 | LegacyRegion.sdl;
3. | Fix some PEG cards can't be detected.
 | NBPEI.c;
4. | Change IASL compiler path
 | SgAcpiTablesPeg.mak;
5. | Update GOP to 5.0.1029.
 | IntelGopDriver.efi; vbt.bin;
6. | Fix Typo error for PRIMARY_DISPLAY_SG_DEFAULT_ENABLE.
 | NB.sd; NBSetup.sdl;

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
NONE
Known Limitations and Erratas in this label:
Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-06-014
Source Control Label: 4.6.5.3_Intel_SA-RC_150_029d
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.5.0
Haswell Memory Reference Code: 1.5.0.0
Haswell VBIOS: 2171
Haswell GOP: 5.0.1029
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
1. | Update LCAP Max Link Spped Value for Gen2/Gen1.
 | NBSetup.c;
2. | Update VBIOS to 2171
 | hsw_VBios.dat;
3. | Update SMBIOS Spec 2.8.0.
 | UpdateMemoryRecord.c

EIP Addressed
None
Files Changed for General Bug Fixes and EIP Addressed in this Label:
General Bug Fixes
NONE
Known Limitations and Erratas in this label:
Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-06-021
Source Control Label: 4.6.5.3_Intel_SA-RC_160_030
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.6.0
Haswell Memory Reference Code: 1.6.0.0
Haswell VBIOS: 2171
Haswell GOP: 5.0.1029
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
1. Correct GT information.
NBSetup.c;

EIP Addressed in this Label:
NONE
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
1. S3, S4 under Windows8.
2.
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-06-028
Source Control Label: 4.6.5.3_Intel_SA-RC_160_031a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.6.0
Haswell Memory Reference Code: 1.6.0.0
Haswell VBIOS: 2171
Haswell GOP: 5.0.1032
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
1. | Fix Smbios Type 17 serial number error.
SmbiosMemory.c;
2. | FIxed Mrc output data is incorrect. (SmbiosType17, 18, 19 have no value issue.)
MrcGlobal.h; MemoryInit.c;
3. | Rename NbSmbiosType17Voltage() to NbSmbiosType17VoltageAndSpeed().
UpdateMemoryRecord.c;
4. | According to SMBIOS spec, Set REFERENCE_DDR_IO_BUS token for choosing how to show DDR speed.
SystemAgentWrap.sdl; UpdateMemoryRecord.c;
5. | Add new feature CLTM for UPSERVER_SUPPORT.
MrcGlobal.h; MrcOemPlatform.c; MrcOemPlatform.h;

EIP Addressed in this Label:
NONE
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
None
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-06-28
Source Control Label: 4.6.5.3_Intel_SA-RC_160_031b
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_110_028 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;

FIVE
Dependent Component Title: All RC module
Dependent Component Reference Name: All RC module
Dependent Source Control Label: 4651_xxxxxxx_xxx-RC_110
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.6.0
Haswell Memory Reference Code: 1.6.0.0
Haswell VBIOS: 2171
Haswell GOP: 5.0.1032
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
1. | Fix Smbios Type 17 serial number error.
SmbiosMemory.c;
2. | FIxed Mrc output data is incorrect. (SmbiosType17, 18, 19 have no value issue.)
MrcGlobal.h; MemoryInit.c;
3. | Rename NbSmbiosType17Voltage() to NbSmbiosType17VoltageAndSpeed().
UpdateMemoryRecord.c;
4. | According to SMBIOS spec, Set REFERENCE_DDR_IO_BUS token for choosing how to show DDR speed.
SystemAgentWrap.sdl; UpdateMemoryRecord.c;
5. | Add new feature CLTM for UPSERVER_SUPPORT.
MrcGlobal.h; MrcOemPlatform.c; MrcOemPlatform.h;
6. | Fix Boot to OS will BSOD when disable SwitchableGraphics_SUPPORT.
NBDXEBoard.c;

EIP Addressed in this Label:
NONE
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
None
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©?American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-07-15
Source Control Label: 4.6.5.3_Intel_SA-RC_161_032
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_161_040 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.6.1
Haswell Memory Reference Code: 1.6.1.2
Haswell VBIOS: 2173
Haswell GOP: 5.0.1032
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
1. | EIP128014: When populating PC3L DIMM x2 or upper DIMM slot only, DMI type17 has wrong values.
NBDxe.c
2. | None: Add new feature CRID into SMBIOS Type88.
NB.sd; NBSetup.c; NBSetup.sdl; Sb.sdl
3. | Upda te VBIOS to v.2173.
hsw_VBios.dat
4. | EIP129088: Update Sharkbay SA RC v1.6.1.
..\ReferenceCode\Chipset\SystemAgent\*.*

EIP Addressed in this Label:
NONE
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
None
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-07-16
Source Control Label: 4.6.5.3_Intel_SA-RC_161_032a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_161_040 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.6.1
Haswell Memory Reference Code: 1.6.1.2
Haswell VBIOS: 2173
Haswell GOP: 5.0.1032
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
1. (1) EIP128014: When populating PC3L DIMM x2 or upper DIMM slot only, DMI type17 has wrong values.
(2) Remove same offset acpi device.
NBDxe.c
2. | None: Add new feature CRID into SMBIOS Type88.
NB.sd; NBSetup.c; NBSetup.sdl; Sb.sdl
3. | Upda te VBIOS to v.2173.
hsw_VBios.dat
4. | EIP129088: Update Sharkbay SA RC v1.6.1.
..\ReferenceCode\Chipset\SystemAgent\*.*

EIP Addressed in this Label:
NONE
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
None
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-07-31
Source Control Label: 4.6.5.3_Intel_SA-RC_161_032b
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_161_040 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.6.1
Haswell Memory Reference Code: 1.6.1.2
Haswell VBIOS: 2176
Haswell GOP: 5.0.1033
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
1. Fix building error when adding XTU module.
The original NB_SETUP_CALLBACK function will be build only when PERF_TUNE_SUPPORT is 0. However, CRID is one of NB_SETUP_CALLBACK and it should be build wheather PERF_TUNE_SUPPORT is 0 or 1. Others of NB_SETUP_CALLBACK should still keep be build only when PERF_TUNE_SUPPORT is 0. Divide others from original NB_SETUP_CALLBACK group to an new NB_MEMORY_TUNING_CALLBACK and let them only be build when PERF_TUNE_SUPPORT is 0. Keep CRID in NB_SETUP_CALLBACK without any building condition.
NBSetup.sdl; NBSetup.c;
2. | Update VBIOS to 2176.
hsw_VBios.dat;
3. | Update GOP to 1033.
IntelGopDriver.efi; vbt.bin;
4. Change token name REFERENCE_DDR_IO_BUS to DCLK_FREQUENCY.
When it's 0, it would show DDR Frequency in SMBIOS (DCLK Frequency).
When it's 1, it would show DDR IO Bus Clock in SMBIOS (QCLK Frequency).
SystemAgentWrap.sdl; UpdateMemoryRecord.c;

EIP Addressed in this Label:
NONE
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
None
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-08-19
Source Control Label: 4.6.5.3_Intel_SA-RC_161_032c
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_161_040 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.6.1
Haswell Memory Reference Code: 1.6.1.2
Haswell VBIOS: 2176
Haswell GOP: 5.0.1033
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
1. RBU function is not working
1. The current make file doesn’t build *.hdr file, we can use that file to verify RBU function under DOS.
2. We could build *.hdr file manually, and also verified the RBU function under DOS. But the RBU function is not working.
MemoryInit.sdl; MemoryInit.c; NBPEI.c;

EIP Addressed in this Label:
NONE
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
None
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-08-23
Source Control Label: 4.6.5.3_Intel_SA-RC_162_33
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_161_040 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.6.2
Haswell Memory Reference Code: 1.6.2.1
Haswell VBIOS: 2176
Haswell GOP: 5.0.1033
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
None
EIP Addressed in this Label:
NONE
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
None
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_161_032c
4.6.5.3_Intel_SA-RC_161_032b
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-10-29
Source Control Label: 4.6.5.3_Intel_SA-RC_162_33a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_161_040 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.6.2
Haswell Memory Reference Code: 1.6.2.1
Haswell VBIOS: 2179
Haswell GOP: 5.0.1035
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
None
EIP Addressed in this Label:
EIP139301 - Spelling Errors in NB.uni
EIP138347 - Hanging issue when moving ECC Dimm form channel B dimm 1 to channel A dimm 0.
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
EIP141504
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_162_33
4.6.5.3_Intel_SA-RC_161_032c
4.6.5.3_Intel_SA-RC_161_032b
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-11-07
Source Control Label: 4.6.5.3_Intel_SA-RC_170_34
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_161_040 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.7.0
Haswell Memory Reference Code: 1.7.0.0
Haswell VBIOS: 2179
Haswell GOP: 5.0.1035
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
None
EIP Addressed in this Label:
EIP138347 - Remove solution for EIP#138347. It's fixed in RC1.7.0.
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
EIP142527
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_162_33a
4.6.5.3_Intel_SA-RC_162_33
4.6.5.3_Intel_SA-RC_161_032c
4.6.5.3_Intel_SA-RC_161_032b
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2013-12-24
Source Control Label: 4.6.5.3_Intel_SA-RC_171_35
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_161_040 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.7.1
Haswell Memory Reference Code: 1.7.1.0
Haswell VBIOS: 2179
Haswell GOP: 5.0.1036
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
None
EIP Addressed in this Label:
EIP138347 - Remove solution for EIP#138347. It's fixed in RC1.7.0.
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
EIP148194
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_170_34
4.6.5.3_Intel_SA-RC_162_33a
4.6.5.3_Intel_SA-RC_162_33
4.6.5.3_Intel_SA-RC_161_032c
4.6.5.3_Intel_SA-RC_161_032b
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2014-03-14
Source Control Label: 4.6.5.3_Intel_SA-RC_171_35a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_170_044a or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.7.1
Haswell Memory Reference Code: 1.7.1.0
Haswell VBIOS: 2179
Haswell GOP: 5.0.1036
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
1. Some items belong to XTU therefore its callback funtion should be NB_MEMORY_TUNING_CALLBACK. (File: NBSetup.sdl)
2. Fix showing messages "invalid token near line xxx (text was '\')" when building code. (File: IntelSaGopSetup.sd)
3. Add new item "PrimaryDisplay" in NBSetupResetHook. (File: NBSetupReset.c)
EIP Addressed in this Label:
None
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
EIP158795
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_171_35
4.6.5.3_Intel_SA-RC_170_34
4.6.5.3_Intel_SA-RC_162_33a
4.6.5.3_Intel_SA-RC_162_33
4.6.5.3_Intel_SA-RC_161_032c
4.6.5.3_Intel_SA-RC_161_032b
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2014-03-14
Source Control Label: 4.6.5.3_Intel_SA-RC_180_36
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_170_046 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_110_022 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.8.0
Haswell Memory Reference Code: 1.8.0
Haswell VBIOS: 2179
Haswell GOP: 5.0.1036
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
None
EIP Addressed in this Label:
None
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
EIP158781
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_171_35a
4.6.5.3_Intel_SA-RC_171_35
4.6.5.3_Intel_SA-RC_170_34
4.6.5.3_Intel_SA-RC_162_33a
4.6.5.3_Intel_SA-RC_162_33
4.6.5.3_Intel_SA-RC_161_032c
4.6.5.3_Intel_SA-RC_161_032b
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2014-05-14
Source Control Label: 4.6.5.3_Intel_SA-RC_180_37
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_180_047b or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_180_033 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.8.0
Haswell Memory Reference Code: 1.8.0
Haswell VBIOS: 2179
Haswell GOP: 5.0.1036
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
None
EIP Addressed in this Label:
EIP160850 - Primary Display/PEG/PCIE Setup options do not match.
EIP167027 - [SharkBay Aptio4]Variable's attribute needs to be reviewed by SA component driver.
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
EIP167027
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_180_36
4.6.5.3_Intel_SA-RC_171_35a
4.6.5.3_Intel_SA-RC_171_35
4.6.5.3_Intel_SA-RC_170_34
4.6.5.3_Intel_SA-RC_162_33a
4.6.5.3_Intel_SA-RC_162_33
4.6.5.3_Intel_SA-RC_161_032c
4.6.5.3_Intel_SA-RC_161_032b
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2014-07-11
Source Control Label: 4.6.5.3_Intel_SA-RC_180_37a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label: 4.6.5.3_Intel_LPT-RC_180_047b or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_180_033 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.8.0
Haswell Memory Reference Code: 1.8.0
Haswell VBIOS: 2179
Haswell GOP: 5.0.1036
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None
General Bug Fixes:
None
EIP Addressed in this Label:
EIP176870 - Problem: #if directive for TSE_BUILD=0x1208
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
EIP176870
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_180_37
4.6.5.3_Intel_SA-RC_180_36
4.6.5.3_Intel_SA-RC_171_35a
4.6.5.3_Intel_SA-RC_171_35
4.6.5.3_Intel_SA-RC_170_34
4.6.5.3_Intel_SA-RC_162_33a
4.6.5.3_Intel_SA-RC_162_33
4.6.5.3_Intel_SA-RC_161_032c
4.6.5.3_Intel_SA-RC_161_032b
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2014-09-05
Source Control Label: 4.6.5.3_Intel_SA-RC_180_37b
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label:4.6.5.3_Intel_LPT-RC_180_047b or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_180_033 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.8.0
Haswell Memory Reference Code: 1.8.0
Haswell VBIOS: 2179
Haswell GOP: 5.0.1036
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
ReferenceCode\Chipset\SystemAgent\AcpiTables\SaAcpiTables.mak
New features added in this label:
None

General Bug Fixes:
None
EIP Addressed in this Label:
1. EIP180652 - Updated IntelSaGopSetup to support latest AmiGopPolicy.
2. Improved for TCG2Support (SaAcpiTables.mak).
Files Changed for EIP Fixes:
EIP180652 - Chipset\NB\GOP\IntelSaGopSetup\IntelSaGopSetup.sd
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
EIP176870
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_180_37a
4.6.5.3_Intel_SA-RC_180_37
4.6.5.3_Intel_SA-RC_180_36
4.6.5.3_Intel_SA-RC_171_35a
4.6.5.3_Intel_SA-RC_171_35
4.6.5.3_Intel_SA-RC_170_34
4.6.5.3_Intel_SA-RC_162_33a
4.6.5.3_Intel_SA-RC_162_33
4.6.5.3_Intel_SA-RC_161_032c
4.6.5.3_Intel_SA-RC_161_032b
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2014-11-28
Source Control Label: 4.6.5.3_Intel_SA-RC_181_38
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label:4.6.5.3_Intel_LPT-RC_180_047b or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_180_033 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.8.1
Haswell Memory Reference Code: 1.8.0
Haswell VBIOS: 2179
Haswell GOP: 5.0.1036
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
Chipset\SystemAgent\AcpiTables\SwitchableGraphics\Peg\SgDgpu.asl
ReferenceCode\Chipset\SystemAgent\Protocol\SaInfo\SaInfo.h
New features added in this label:
None

General Bug Fixes:
None
EIP Addressed in this Label:
EIP194212 - Shark Bay SA Framework Reference Code 1.8.1 for ISOCH/QOS fix ( It also needs to set “Run-Time C7 allowed” as Disable on Bios setup menu for Issue fixed)
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
EIP194212
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_180_37b
4.6.5.3_Intel_SA-RC_180_37a
4.6.5.3_Intel_SA-RC_180_37
4.6.5.3_Intel_SA-RC_180_36
4.6.5.3_Intel_SA-RC_171_35a
4.6.5.3_Intel_SA-RC_171_35
4.6.5.3_Intel_SA-RC_170_34
4.6.5.3_Intel_SA-RC_162_33a
4.6.5.3_Intel_SA-RC_162_33
4.6.5.3_Intel_SA-RC_161_032c
4.6.5.3_Intel_SA-RC_161_032b
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2014-12-02
Source Control Label: 4.6.5.3_Intel_SA-RC_190_39
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label:4.6.5.3_Intel_LPT-RC_180_047b or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_180_033 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.9.0
Haswell Memory Reference Code: 1.9.0
Haswell VBIOS: 2179
Haswell GOP: 5.0.1036
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
None

General Bug Fixes:
None
EIP Addressed in this Label:
EIP194524 - Shark Bay SA Reference Code Production Version 1.9.0
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
EIP194524
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_181_38
4.6.5.3_Intel_SA-RC_180_37b
4.6.5.3_Intel_SA-RC_180_37a
4.6.5.3_Intel_SA-RC_180_37
4.6.5.3_Intel_SA-RC_180_36
4.6.5.3_Intel_SA-RC_171_35a
4.6.5.3_Intel_SA-RC_171_35
4.6.5.3_Intel_SA-RC_170_34
4.6.5.3_Intel_SA-RC_162_33a
4.6.5.3_Intel_SA-RC_162_33
4.6.5.3_Intel_SA-RC_161_032c
4.6.5.3_Intel_SA-RC_161_032b
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Copyright

American Megatrends, Inc.
5555 Oakbrook Parkway
Suite 200
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Copyright (c) 1999-2011 American Megatrends, Inc. All Rights Reserved.

This publication contains proprietary information, which is protected by copyright. No part of this publication may be reproduced, transcribed, stored in a retrieval system, translated into any language or computer language, or transmitted in any form whatsoever without the prior written consent of the publisher, American Megatrends, Inc.

American Megatrends, Inc. retains the right to update, change, modify this publication at any time, without notice.

For Additional Information

Call American Megatrends BIOS Sales Department at 1-800-828-9264 for additional information.

Limitations of Liability

In no event shall American Megatrends be held liable for any loss, expenses, or damages of any kind whatsoever, whether direct, indirect, incidental, or consequential, arising from the design or use of this product or the support materials provided with the product.

Limited Warranty

No warranties are made, either expressed or implied, with regard to the contents of this work, its merchantability, or fitness for a particular use. American Megatrends assumes no responsibility for errors and omissions or for the uses made of the material contained herein or reader decisions based on such use.

Trademark and Copyright Acknowledgments

All product names used in this publication are for identification purposes only and are trademarks of their respective Companies.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2015-07-02
Source Control Label: 4.6.5.3_Intel_SA-RC_190_39b
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label:4.6.5.3_Intel_LPT-RC_180_047b or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_180_033 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.9.0
Haswell Memory Reference Code: 1.9.0
Haswell VBIOS: 2179
Haswell GOP: 5.0.1036
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
NONE
General Bug Fixes:
NONE
EIP Addressed in this Label:
EIP221317 - [SharkBay] S3 Security Technical Advisories
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
NONE
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_190_39a
4.6.5.3_Intel_SA-RC_190_39
4.6.5.3_Intel_SA-RC_181_38
4.6.5.3_Intel_SA-RC_180_37b
4.6.5.3_Intel_SA-RC_180_37a
4.6.5.3_Intel_SA-RC_180_37
4.6.5.3_Intel_SA-RC_180_36
4.6.5.3_Intel_SA-RC_171_35a
4.6.5.3_Intel_SA-RC_171_35
4.6.5.3_Intel_SA-RC_170_34
4.6.5.3_Intel_SA-RC_162_33a
4.6.5.3_Intel_SA-RC_162_33
4.6.5.3_Intel_SA-RC_161_032c
4.6.5.3_Intel_SA-RC_161_032b
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Component Information:
Component Title: Intel System Agent
Component Reference Name: Intel System Agent
Component Type: eChipset
Release Date: 2015-01-28
Source Control Label: 4.6.5.3_Intel_SA-RC_190_39a
Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/NorthBridge/Haswell;

Dependencies

ONE
Dependent Component Title: Intel PCH
Dependent Component Reference Name: Intel PCH
Dependent Source Control Label:4.6.5.3_Intel_LPT-RC_180_047b or above
Dependent Source Control Location: SS: Alaska;$/Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint;

TWO
Dependent Component Title: Platform
Dependent Component Reference Name: AcpiPlatform
Dependent Source Control Label:4.6.5.3_PF-ACPI_RC_180_033 or above
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/Platform;

THREE
Dependent Component Title: Intel EDK
Dependent Component Reference Name: Intel EDK
Dependent Source Control Label: 4.6.5.3_IntelEDK_1117_Patch8_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK;

FOUR
Dependent Component Title: CsmOptOut
Dependent Component Reference Name: CsmOptOut
Dependent Source Control Label: 4.6.5.3_Csm_OptOut_03
Dependent Source Control Location: SS: Alaska;$/Alaska/SOURCE/Modules/CsmOptOut;
Non-Compiled BIN and LIB File(s) within this Component:

NBCSP.CIF
Component Title: Intel SystemAgent NB Chipset
Component Reference Name: hsw_VBios.dat
Component Source Control Location: SS: Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset;
Component Description:
Intel SystemAgent - Haswell North Bridge.
This is a caption
Filename | Description
Release Notes.chm | Intel HaswellNB Chipset of CHM.
NBBOARD.CIF | Intel Haswell NB Board of ModulePart.
NBCSP.CIF | Intel Haswell NB Chipset of ModulePart.
SystemAgent.cif | Intel Haswell NB Reference Code of ModulePart.

ModulePart Name:Intel SystemAgent NB Board
ModulePart Description:Intel SystemAgent NB Board Component Settings
Filename | Description
NBBOARD.CIF | ModulePart NBBOARD of CIF
NB.sdl | Intel Cedarview NB of SDL
NB.mak | This make file builds north bridge SEC,PEI & DXE components and link them to respective binary.
NB.H | North Bridge header file, define all the North Bridge specific equates and structures in this file.
NBSECInit.ASM | Program any workaround or initialization needed before enabling Cache as memory in the SEC stage.
NBPEI.DXS | This file is the dependency file for the NB PEI driver.
NBPEIBoard.c | This file contains PEI stage board component code for North Bridge.
NBDXE.DXS | This file is the dependency file for the NB DXE driver.
NBDXEBoard.c | This file contains DXE stage board component code for North Bridge.
NBInt15.asm | Hook the Int 15.
NB.ssp | Cmos Manager Setup Script Processor.
GetSetupData.c | Custom North Bridge setup data behavior implementation.
NbSetupData.h | North Bridge Policy header file, define all the North Bridge Policy specific equates and structures in this file.

ModulePart Name:NBSetup
ModulePart Description:NBSetup Setup Settings
Filename | Description
NBSetup.CIF | ModulePart NBSetup of CIF.
NBSetup.sdl | ModulePart NBSetup of SDL.
NBSetup.mak | This make file components and link them to respective binary.
NB.sd | North Bridge setup form.
NB.uni | North Bridge setup string definitions.
NBSetup.c | North Bridge Setup Rountines.
NBSetupReset.c | North Bridge setup data full reset implementation.

ModulePart Name:Intel SystemAgent NB Chipset
ModulePart Description:Intel SystemAgent NB Chipset Component Settings
Filename | Description
NBCSP.cif | ModulePart Intel Cedarview NB Chipset of CIF.
NBDxe.c | This file contains code for North Bridge initialization in the DXE stage.
NBPEI.c | This file contains code for North Bridge initialization in the PEI stage.
NBGeneric.c | This file contains generic NB code that is common between various components such as NB PEI, DXE, etc.
NBCspLib.h | North Bridge Chipset Library header file, define all the North Bridge Chipset Library specific equates and structures in this file.
NBAcpi.c | The file for apci enable and disable elink.
NbPciCSP.c | Chipset Porting Hooks for PCI Host Bridge Driver.
NB.ASL | The ASL file for North Bridge specific function. If RC not support, NB will include this.

ModulePart Name:NB SMI
ModulePart Description:Support Intel SystemAgent NB SMI Settings
Filename | Description
NBSMI.cif | ModulePart NB SMI of CIF.
NBSMI.C | This file contains code for all North Bridge SMI events.
NBSMI.H | This file contains all definitions for North Bridge SMI driver.
NBSMI.MAK | Make file for the NB SMI handler code.
NBSMI.DXS | This file is the dependency file for the North Bridge SMI handler.
NBSMI.SDL | ModulePart NB SMI of SDL.

ModulePart Name:NBProtocols
ModulePart Description:NB Protocols
Filename | Description
NBProtocols.cif | ModulePart NBProtocols of CIF.

ModulePart Name:NB PPI
ModulePart Description:Define NB PPI
Filename | Description
NBPPI.cif | ModulePart NB PPI of CIF.
NBPPI.h | Define the North Bridge PPI specific equates and structures in this file.
BaseMemoryTest.h | Define the Base Memory Test PPI specific equates and structures in this file.

ModulePart Name:SystemAgentWrap
ModulePart Description:Intel SystemAgent RC Wrap Settings
Filename | Description
SystemAgentWrap.cif | ModulePart SystemAgentWrap of CIF.
SystemAgentWrap.sdl | ModulePart SystemAgentWrap of SDL.

ModulePart Name:MiscSubclass
ModulePart Description:For Chipset Reference Board Template initialization
Filename | Description
MiscSubclass.cif | ModulePart MiscSubclass of CIF.
MiscSubclass.sdl | ModulePart MiscSubclass of SDL.
MiscSubclass.mak | ModulePart MiscSubclass of MAK.
MiscSubclassStrings.uni | MiscSubclassStrings setup string definitions.
MiscSubclass.c | Set InitiMiscStrings.
MiscSubclassDxe.c | This file contains code for Chipset Reference Board Template initialization in the DXE stage.
MiscSubclassDxe.dxs | ModulePart MiscSubclass of DXS.

ModulePart Name:UpdateMemoryRecord
ModulePart Description:Save memory information in SMBIOS
Filename | Description
UpdateMemoryRecord.cif | ModulePart UpdateMemoryRecord of CIF.
UpdateMemoryRecord.sdl | ModulePart UpdateMemoryRecord of SDL.
UpdateMemoryRecord.mak | ModulePart UpdateMemoryRecord of MAK.
UpdateMemoryRecord.dxs | ModulePart UpdateMemoryRecord of DXS.
UpdateMemoryRecord.c | This function parses the data record and stores it into the Smbios format.
UpdateMemoryRecord.h | ModulePart UpdateMemoryRecord of Header file.
ModulePart Name:PlatformGOPPolicy
ModulePart Description:Platform GOP driver
Filename | Description
PlatformGOPPolicy.cif | ModulePart PlatformGOPPolicy of CIF.
PlatformGOPPolicy.sdl | ModulePart PlatformGOPPolicy of SDL.
PlatformGOPPolicy.mak | ModulePart PlatformGOPPolicy of MAK.
PlatformGOPPolicy.dxs | ModulePart PlatformGOPPolicy of DXS.
PlatformGOPPolicy.c | This function install the GOP Policy driver.
PlatformGOPPolicy.h | ModulePart PlatformGOPPolicy of Header file.
vbt.bin | ModulePart Vbt bin file.
IntelGopDriver.efi | Intel Gop Driver file.
Porting Notes:
Reserve MemoryIO and IO Space :

1. Add PCI Express region

Base : PCIEX_BASE_ADDRESS

Length : PCIEX_LENGTH

2. Local APICs dedicated Space. usual;0xfee00000

Base : LOCAL_APIC_BASE

Length : 0x00001000

3. Egress Port Base Address Region.

Base : NB_EP_BASE_ADDRESS

Length : 4*1024

4. MCH Memory Mapped Base Address Region

Base : NB_MCH_BASE_ADDRESS

Length : 16*1024

5. Root Complex Base Address Region

Base : NB_DMI_BASE_ADDRESS

Length : 4*1024

Reserve Memory Space :

1. Local Tseg dedicated Space

See the token setting length(TSEG_SIZE).

2. GTT and GFX Mapped Base Address Region

Auto adjuct that,GFX length dependence on setup "ShareMem"

And add GTT 2MB.

Reserve SW SMI Space :

1. NB_SWSMI_IGFX_GET_SETUP = 0xB0

2. NB_SWSMI_SA_LATE_INIT = 0xB1

Oem Sample use guid:

1. Add E-Link to upgrade the setup data by oem.

ELINK

Name = "NbSetupDataHook, "

Parent = "NbConfigurationList"

Help = " UpGrade the Setup data hook "

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\IA32\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "1"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_PEI_OBJ_FILES"

Token = "x64_BUILD" "=" "0"

InvokeOrder = AfterParent

End

ELINK

Name = "$(BUILD_DIR)\$(NB_SETUP_DIR)\NBSetupData.obj"

Parent = "NB_DXE_OBJ_FILES"

InvokeOrder = AfterParent

End

2. Disable the Nb Setup data module part.

Add Oem NbSetup module part. (Ref Intel Cedarview NB Setup moudle part)

ULT_FLAG:

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "ULT_SUPPORT"

Value = "0"

TokenType = Boolean

TargetMAK = Yes

Token = "PCH_SKU" "=" "1"

End

Notice : Because no have ULT CPU , this ULT_SUPPORT = 1 not tested.

FOR RMT:

If want RMT enable, please enable...

TOKEN

Name = "DEBUG_MODE"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

End

TOKEN

Name = "MRC_DEBUG_PRINT_SUPPORT"

Value = "1"

TokenType = Boolean

TargetMAK = Yes

TargetH = Yes

Token = "DEBUG_MODE" "=" "1"

End

If RMT output fail, please confirm MrcFastBoot = 0, RmtCrosserEnable = 1, BdatAcpiTableSupport = 1.

AMI Build Tools:
Tools Label: 4.5.5_TOOLS_41, Dated: 2013-05-19
Visual eBios: RSS 5.73.0244, Dated: 2013-05-19
Compiler Tool(s): Microsoft's Windows Driver Kit (WDK) Ver. 7600.16385.1
Reference or 3rd Party Code/File in this Release:
ITEM_TITLE: Intel System Agent Refcode
Haswell Framework BIOS Reference Code: 1.9.0
Haswell Memory Reference Code: 1.9.0
Haswell VBIOS: 2179
Haswell GOP: 5.0.1036
Reference or 3rd Party Code updated in this Release:
None
Files changed in the Reference or 3rd Party Code:
None
New features added in this label:
1. Implement Loading Intel GOP driver Condition
General Bug Fixes:
[TAG] EIP200606
[Category] Improvement
[Description] The options of "DIMM profile" can't load default.
The TSE revision 4.6.2_TSE_2_16_1243 behavior change,
it is working after checking the case EFI_BROWSER_ACTION_DEFAULT_STANDARD and returning EFI_UNSUPPORTED.
[Files]
Board\NB\NBSetup\NBSetup.c
[TAG] EIP202457
[Category] Improvement
[Description] Implement Loading Intel GOP driver Condition
[Files]
Chipset\NB\GOP\IntelGopDriver.dxs
Chipset\NB\GOP\IntelSaGopDriver.mak
EIP Addressed in this Label:
NONE
Files Changed for EIP Fixes:
NONE
Known issues in this label:
NONE
Limitations in this label:
1. SA RC 1.6.0 needs to use ME module upper than 4.6.4.1_Intel_ME_RC_1.60_038.
2. Intel announcement for 1.5.0 Reference code and 1.5.0.0 MRC code
Unsupported Features in Version 1.5.0 :
Haswell Traditional and Haswell-ULT pre-production/engineering stepping
are not validated with release of this MRC and Ref code. MRC and Ref
code will not block use of these stepping; however, platforms using these
stepping may experience unexpected behaviors, including system hangs.
To avoid potential issues with these parts, customer should use at least
pre-QS samples for their validation.
3. Intel announcement for SA RC 1.6.0 needs to use new BIOS ACM for
"Add related DMAR table entries for the LPSS devices" feature.
Remaining Issues:
Issue(s) with a Description
None
Unit Testing:
EIP202457
Validation Testing:
NONE
Release History:
4.6.5.3_Intel_SA-RC_190_39
4.6.5.3_Intel_SA-RC_181_38
4.6.5.3_Intel_SA-RC_180_37b
4.6.5.3_Intel_SA-RC_180_37a
4.6.5.3_Intel_SA-RC_180_37
4.6.5.3_Intel_SA-RC_180_36
4.6.5.3_Intel_SA-RC_171_35a
4.6.5.3_Intel_SA-RC_171_35
4.6.5.3_Intel_SA-RC_170_34
4.6.5.3_Intel_SA-RC_162_33a
4.6.5.3_Intel_SA-RC_162_33
4.6.5.3_Intel_SA-RC_161_032c
4.6.5.3_Intel_SA-RC_161_032b
4.6.5.3_Intel_SA-RC_161_032a
4.6.5.3_Intel_SA-RC_161_032
4.6.5.3_Intel_SA-RC_160_031b
4.6.5.3_Intel_SA-RC_160_031a
4.6.5.3_Intel_SA-RC_160_030
4.6.5.3_Intel_SA-RC_150_029d
4.6.5.3_Intel_SA-RC_150_029c
4.6.5.3_Intel_SA-RC_150_029b
4.6.5.3_Intel_SA-RC_150_029a
4.6.5.3_Intel_SA-RC_150_029
4.6.5.3_Intel_SA-RC_140_028d
4.6.5.3_Intel_SA-RC_140_028c
4.6.5.3_Intel_SA-RC_140_028b
4.6.5.3_Intel_SA-RC_140_028a
4.6.5.3_Intel_SA-RC_140_028
4.6.5.3_Intel_SA-RC_130_027d
4.6.5.3_Intel_SA-RC_130_027c
4.6.5.3_Intel_SA-RC_130_027b
4.6.5.3_Intel_SA-RC_130_027a
4.6.5.3_Intel_SA-RC_130_027
4.6.5.3_Intel_SA-RC_120_026c
4.6.5.3_Intel_SA-RC_120_026b
4.6.5.3_Intel_SA-RC_120_026a
4.6.5.3_Intel_SA-RC_120_026
4.6.5.3_Intel_SA-RC_110_025
4.6.5.3_Intel_SA-RC_100_024
4.6.5.3_Intel_SA-RC_090_023a
4.6.5.3_Intel_SA-RC_090_023
4.6.5.3_Intel_SA-RC_081_022b
4.6.5.3_Intel_SA-RC_081_022a
4.6.5.3_Intel_SA-RC_081_022
4.6.5.3_Intel_SA-RC_080_021a
4.6.5.3_Intel_SA-RC_080_021
4.6.5.3_Intel_SA-RC_072_020b
4.6.5.3_Intel_SA-RC_072_020a
4.6.5.3_Intel_SA-RC_072_020
4.6.5.3_Intel_SA-RC_070_019b
4.6.5.3_Intel_SA-RC_070_019a
4.6.5.3_Intel_SA-RC_070_019
4.6.5.3_Intel_SA-RC_070_018
4.6.5.3_Intel_SA-RC_070_017
4.6.5.3_Intel_SA-RC_070_016
4.6.5.3_Intel_SA-RC_070_015
4.6.5.3_Intel_SA-RC_070_014
4.6.5.3_Intel_SA-RC_061_013
4.6.5.3_Intel_SA-RC_061_012
4.6.5.3_Intel_SA-RC_061_011
4.6.5.3_Intel_SA-RC_061_010
4.6.5.3_Intel_SA-RC_060_009
4.6.5.3_Intel_SA-RC_060_008
4.6.5.3_Intel_SA-RC_056_007
4.6.5.3_Intel_SA-RC_056_006
4.6.5.3_Intel_SA-RC_055_005
4.6.5.3_Intel_SA-RC_055_004
4.6.5.3_Intel_SA-RC_050_003
4.6.5.3_Intel_SA-RC_050_002
4.6.5.3_Intel_SA-RC_050_001
4.6.5.3_Intel_SA-RC_050_000

©American Megatrends Inc.


Function by File Name

AMIBIOS Function Reference

By File Name

The following is a list of the source files.
For a list in alphabetical order, see In Alphabetical Order.
For a list by segment, see By Segment.

  • CRB.mak
  • CRBSec.ASM
Built on 14:30:58 07/02/15


AMIBIOS Function Reference

CRB.mak

Description:
This make file builds Chipset Reference Board SEC,PEI & DXE
components and link them to respective binary
Built on 14:30:58 07/02/15


AMIBIOS Function Reference

CRBSec.ASM

Description:
Program any workaround or initialization needed before
enabling Cache as memory in the SEC stage for CRB.

The following functions are used in the file: CRBSec.ASM.

Function | Description
SECCRB_EarlyInit | This routine initializes CRB for PEI preparation

Built on 14:30:58 07/02/15


SECCRB_EarlyInit in the CRBSec.ASM

AMIBIOS Function Reference

Function : SECCRB_EarlyInit

File: CRBSec.ASM
Segment: STARTUP_SEG
Description:
This routine initializes CRB for PEI preparation
Input:
ESP BIST Info
EBP Reset ID (EDX at reset)
Stack not available
Output:
None
Modified:
All, except EBP and ESP
Notes:
NBSEC & SBSEC initialization is done at this point.
Built on 14:30:58 07/02/15


Function by Segment

AMIBIOS Function Reference

By Segment

The following is a list of the segments.
For a list in alphabetical order, see In Alphabetical Order.
For a list by file name, see By File Name.

  • STARTUP_SEG
Built on 14:30:58 07/02/15


AMIBIOS Function Reference

STARTUP_SEG

The following functions are used in the segment: STARTUP_SEG.

Function | Description
SECCRB_EarlyInit | This routine initializes CRB for PEI preparation

Built on 14:30:58 07/02/15


Functions in Alphabetical Order

AMIBIOS Function Reference

In Alphabetical Order

The following topics provide a list in alphabetical order.
For a list by file name, see By File Name.
For a list by segment, see By Segment.

  • S
Built on 14:30:58 07/02/15


Functions in Alphabetical Order

AMIBIOS Function Reference

S

Function | Description
SECCRB_EarlyInit | This routine initializes CRB for PEI preparation

Built on 14:30:58 07/02/15


AMIBIOS Function Reference

General Information

Built on 14:30:58 07/02/15