;********************************************************************** ;********************************************************************** ;** ** ;** (C)Copyright 1985-2010, American Megatrends, Inc. ** ;** ** ;** All Rights Reserved. ** ;** ** ;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 ** ;** ** ;** Phone: (770)-246-8600 ** ;** ** ;********************************************************************** ;********************************************************************** ;********************************************************************** ; $Header: /Alaska/SOURCE/Modules/CSM/Generic/Core/OemPir.dat 4 1/12/10 11:46a Olegi $ ; ; $Revision: 4 $ ; ; $Date: 1/12/10 11:46a $ ;********************************************************************** ;********************************************************************** ; Revision History ; ---------------- ; $Log: /Alaska/SOURCE/Modules/CSM/Generic/Core/OemPir.dat $ ; ; 4 1/12/10 11:46a Olegi ; Copyright message updated. ; ; 3 4/27/07 5:13p Olegi ; CSM.CHM file preparation. ; ; 2 5/16/06 1:57p Olegi ; ; 1 11/07/05 7:11p Olegi ; ; 2 11/07/05 4:37p Olegi ; ; 1 6/21/05 12:12p Olegi ; LegacyBios and LegacyBiosPlatform are combined into one FFS. ; ; 3 4/04/05 5:08p Mandal ; ;********************************************************************** ; ; ; Name: PciInfo.asm ; ; Description: This file includes the PCI related tables generated by AMISDL ; ; ;********************************************************************** .586P .model small option language:c ; MS IRQ Routing Table Header Structure ;------------------------------------------------------------------------------ MSIRQ_HEADER STRUC dSignature dd ? ;'$PIR' signature wVersion dw ? ;version (low byte = minor, high byte = major) wSize dw ? ;length of routing table including header and slots bRouterBus db ? ;PCI IRQ Router bus# bRouterDevFunc db ? ;PCI IRQ Router dev#(7:3), func#(2:0) wExclusiveIRQ dw ? ;bitmap of IRQs used exclusively for PCI dCompatibleRouter dd ? ;VendorID, DeviceID of compatible IRQ router (low word = VendorID, high word = DeviceID) dMiniPortData dd ? ;MiniPort Data bReserved db 11 dup(?); reserved bytes (set to 0) bChecksum db ? ;checksum MSIRQ_HEADER ENDS ; PCI_IRQ_ENTRY follows the MSIRQ_HEADER, one entry per slot PCI_IRQ_ENTRY STRUC pirq_bus_number db ? ;PCI bus number of device pirq_device_number db ? ;PCI device number of device (in upper 5 bits) pirq_inta_reg db ? ;Chipset register for this dev's Int A Pin pirq_inta_irqs dw ? ;Bitmap of IRQs routable to Int A Pin pirq_intb_reg db ? ;Chipset register for this dev's Int B Pin pirq_intb_irqs dw ? ;Bitmap of IRQs routable to Int B Pin pirq_intc_reg db ? ;Chipset register for this dev's Int C Pin pirq_intc_irqs dw ? ;Bitmap of IRQs routable to Int C Pin pirq_intd_reg db ? ;Chipset register for this dev's Int D Pin pirq_intd_irqs dw ? ;Bitmap of IRQs routable to Int D Pin pirq_phys_slot db ? ;Physical slot number of device pirq_reserved db ? PCI_IRQ_ENTRY ENDS ;PCIDATA_SEG SEGMENT USE32 'DATA' PCIDATA_SEG SEGMENT 'DATA' ; ;---------------------------------------------------------------------------- ; Name: ms_irq_routing_table ; ; Type: Structure Array ; ; Description: The information below is used for two purposes: ; 1. PCI IRQ routing during POST ; 2. Runtime dynamic IRQ routing (using Int 1A functions ; B10E / B10F) ; ; The IRQ routing table should contain one entry for each ; on-board PCI device or PCI slot. Chipset devices such as host ; bridges and ISA bridges do not need an entry. A generic BIOS ; can contain a few unused entries that BCP can use when adapting ; a generic BIOS to a customized BIOS for a motherboard containing ; on board devices such as PCI IDE, PCI SCSI, or PCI Network chips. ; BCP can also use a blank entry if a motherboard OEM decides to ; put an extra ; PCI slot on their board. ; ; The rth_pci_device_limit byte should be set to the total number ; of entries that are present including any blank entries. ; ; The rth_pci_device_count byte should be set to the number of ; non-blank entries (entries that are actually used in this BIOS). ; ; The rth_pci_dedicated_irqs word is a bitmask of IRQs that are ; dedicated to the PCI bus. (Bit 0 = IRQ 0, ..., Bit 15 = IRQ ; 15) In most cases this word will be set to all 0's. This ; word may be used in systems that implement IRQ routing with ; jumpers. ; ; The fields in each table entry are discussed below: ; ; - PCI Bus Number: Most boards contain only a single PCI bus, ; so this byte should usually be set to 0. If a board has ; multiple PCI busses, then this byte should be set to indicate ; which bus the device or slot is on. ; ; - Dev Num: This field should be set to a slot's or device's ; address on the PCI bus shifted left by three bits (the device ; number should be in bits 7:3 and bits 2:0 should be 000). ; ; - Int A Pin, Chipset Reg: This field should be set to the ; chipset register number that controls this slot's (or device's) ; Int A Pin. The value in this field is basically arbitrary, ; the value is returned by the function rth_pci_get_irq_reg. ; Slots and devices that share the same chipset interrupt signal ; should have the same value for this field. ; For example: ; if Slot 1's Int A pin and Slot 2's Int B pin are both connected ; to the same chipset interrupt signal, then the Chipset Reg ; value for Slot 1 Int A should match Slot 2 Int B. The core ; BIOS (and configuration software) need this information to ; know how IRQs are shared between slots. If a slot or device ; has nothing connected to its Int A pin, then this field should ; be set to 0. If a slot or device has its Int A pin hardwired ; directly to an IRQ, then set this field to 0Fxh (where x is ; 0-F for IRQ 0 - IRQ 15). This is useful if a motherboard has ; a PCI IDE chip that has its Int A pin hardwired to IRQ 14. ; ; - Int A Pin, Bitmap of IRQs Routeable to Pin: This field should ; be set to indicate which IRQs the chipset is capable of routing ; to the slot's (or device's) Int A pin. If the value for Chipset ; Reg (see above) was set to 0, then set all bits in this field ; to 0 also. If the value for Chipset Reg was set to 0Fxh to ; indicate a hardwired connection to a certain IRQ, then only one ; bit corresponding to that IRQ should be set in this field. ; ; - Int B,C,D Pin, Chipset Reg: These fields work exactly like ; the Chipset Reg field for Int A Pin (see above). ; ; - Int B,C,D Pin, Bitmap of IRQs Routeable to Pin: These fields ; work exactly like the corresponding field for Int A Pin (see above). ; ; - Physical Slot Number: This field should be set to the slot ; number of a PCI slot as it appears to the end user. Numbers ; like 1, 2, 3, 4 should be used. On board PCI devices such as ; PCI IDE chips should have this field set to 0 to indicate that ; the device is not a removable card that is plugged into a slot. ; Configuration software can use this value to translate a PCI ; device number (0 - 1F) to a value that is meaningful to an end ; user. ; ; - Reserved Byte: Always set to 0. ; ; Notes: ; ;---------------------------------------------------------------------------- ; ALIGN 16 ms_irq_routing_table LABEL BYTE ; MS IRQ routing table header. this header is followed by all PCI slot entries. ; MSIRQ_HEADER <> db '$PIR' ; signature db 0, 1 ;version (low byte = minor, high byte = major) dw size(MSIRQ_HEADER) + (OFFSET Irq_table_empty_entries - \ OFFSET rth_pci_irq_routing_table) ;length of routing table including header and slots db 0 ;PCI IRQ Router bus# (to be updated during runtime) db 0 ;PCI IRQ Router dev#(7:3), func#(2:0), to be updated during runtime. dw 0 ;bitmap of IRQs used exclusively for PCI dd 0 ;VendorID, DeviceID of compatible IRQ router (low word = VendorID, high word = DeviceID) dd 0 ;MiniPort Data db 11 dup(0); reserved bytes (set to 0) db 0 ;checksum (to be updated during runtime) rth_pci_irq_routing_table LABEL BYTE include oempir.inc pci_irq_entry <> Irq_table_empty_entries LABEL BYTE ; PCI IRQ routing entries defined after this label are not included. PUBLIC IRQ_Table_end IRQ_Table_end LABEL BYTE PCIDATA_SEG ENDS end ;********************************************************************** ;********************************************************************** ;** ** ;** (C)Copyright 1985-2010, American Megatrends, Inc. ** ;** ** ;** All Rights Reserved. ** ;** ** ;** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 ** ;** ** ;** Phone: (770)-246-8600 ** ;** ** ;********************************************************************** ;**********************************************************************