American Megatrends, Inc.

PciBusSrc

Copyright

Release Notes

© American Megatrends, Inc.


eModule Release Notes

AMIBIOS Component Release Notes

Component Information:
Component Name: PCIBus
Component Type: eModulePart
Release Date: 2011/12/16
Source Control Label: Binaries - Core 4652_PCIBUSBIN_25_2; Sources - 4652_PCIBUSSRC_25_2
;
Binary Source Control Location: SS:ALASKA;$/Alaska/BIN/Core\Modules/PciBus;4652
Sources Source Control Location: SS:ALASKA;$/Alaska/BIN/Core\Modules/PciBus;4652
Component Description:
Pci Bus Sources Subcomponent (Part of "Core Sources" component)
Filename | Description
PciBusSrc.sdl | "PciBusSources" Module's SDL tokens file (modified by VeB)
PciBusSrc.mak | PCI Bus Sources Module MAK file (builds Module and all it's components)
PciBus.c | Main PCI Bus Driver file. It has Pci Bus Driver entry point and PciIo Protocol implementation.
PciHostBridge.c | Pci Root Bridge Driver file. Has Implementation of PciRootBridgeIo Protocol.
DeviceIo.c | Implementation of DeviceIo Protocol for compatibility sake. This protocol does not supported by UEFI anymore.
PCI Bus Subcomponent (Part of Core component)
Filename | Description
PciBus.sdl | "PciBus" Module SDL tokens file (modified by VeB)
PciBus.mak | "PciBus" Module MAK file (builds Module and all it's components)
PciBus.sd | "PciBus" Module Setup Definitions (SD) file (Provides PciBus Driver Setup Screen)
PciBus.uni | "PciBus" Module Setup Strings used by SD file.
PciBusSetup.c | "PciBus" Module Strings override routines to dynamically change Setup options.
PciPort.c | "PciBus" Driver porting file.
PciSetup.h | "PciBus" Driver Setup types definitions. Separates board specific setup data from Generic Pci Bus Driver code.
PciBoard.asm | Assembly Language file which includes all VeB auto-generated files.
PciBusSrc.lib | 32bit version of PciBus Library used to build final Driver Image (removed in v2.5.0 and up).
PciBusSrcx64.lib | 64bit version of PciBus Library used to build final Driver Image (removed in v2.5.0 and up).
PciPort.h | Definition file of available Porting Functions.
PciRootBridge.dxs | Dependency expression file for PCI Root Bridge Driver..
PciBusIncludes Subcomponent (Part of PCI Bus Component)
Filename | Description
PciBus.h | "PciBus" Driver private types and data definitions
PciHostbridge.h | "PciRootBridge" Driver private types and data definitions
PciBusEx.h | PCI Bus Extended Protocol interface declarations and data types
PCIe30.h | PCI Express Specification version definitions.
AMI Build Tools:
Tools Label: 4.5.5_TOOLS_34, Dated: 2010-10-06
Visual eBios: RSS.5.70.0171, Dated: 2010-10-04
Compiler Tool(s): WinDDK 7600.16385.1; DDK 3790.1830
General Information About this Label:
  • NewFeatures
    • EIP 71380
    Core support for CSM opt-out feature
    Files: PciBus.c; PciPort.c; PciBus.sd; PciBus.uni; PciSetup.h;
    EIP 54911
    Reconnect -r issue fixed for cards with OFF board option ROMs.
    Files: PciBus.c
    EIP 54911
    Added changes for module to be compliant with UEFI specification v 2.3.1.
    Files: PciBus.c
    Added some MORE debug messages.
    Added IO 3C0-3DF reservation release when Legacy VGA attributes set
    Fixed build issue when PCI_EXPRESS_GEN2_SUPPORT token set to OFF.
  • Bug Fixes
    • Minor bug fixes not related to any eip EIP. Code cleanup.
    Fixed bug in PcieRetrainLink function it was not doing other attempts to retrain link because of missing else statement.
    Fixed potential bug in PcieSetSlotProperties() routine. It was using uninitialized RCI_ADDRESS var this may cause system HUNG .
    Changed size of access to the ROM BAR register in GetOpRom() from 1 byte to 4 - some cards could hang the system if 1 byte is used.
    According to AMD GOP Driver GetBarAttributes() must return _GRA field set as a bar type NOT A RESOURCE TYPE
    EIP 72803: Incorrect Max Payload setting
    RootCause: The issue was that recorded MPL value was updated before PcieProgramPayloadUp() function was invoked. In that function we check condition again since it was needed to maintain loop exit. But control newer enter the loop since conditions were not met at that point for reason stated above.
    Solution: Move code that updates recorded MPL with a new value after call to PcieProgramPayloadUp().
    Files: PciBus.c
    EIP 71694: Option ROM is corrupted when copied from device on Rosecity Core 4.6.5.1.
    RootCause: MemCopy routine was updated to use 64 bit access but PCI BAR. Copy can not handle this.
    Solution: Introduced MemCpy32 routine to handle fast copy 4 byte at a time
    Files: PciBus.c
    EIP 66216: Hotplug resource padding not working for ROOT bridges other than 0.
    RootCause: Hot plug slots was incorrectly associated always with the RootBridge #0.
    Solution: Changed algorithm to beter distinguish between Root Bridges. Added debug messagers to monitor HPC_LOCATION_DATA.
    Files: PciBus.c; PciHostBridge.c.
  • Update Instructions
  • This release id part of Core 4652. Follow Core 4652 update instructions.
  • For Out of Resources condition handling get 4650_PCI_BRD_RES_01A component from $/Alaska/BIN/Modules/Template/PciPlatformResources/
  • See PCI Porting Guide on AMI Share Portal for more details and coding examples. Updated Porting Guide corresponding current label also attached to EIP 55759
    • Revision History:
  • Core 4651_PCIBUSBIN_25_1:
  • NewFeatures
    • Genericaly supported token PCI_DEV_REVERSE_SCAN_ORDER. If set to ON Pci Bus Driver will scan devices on PCI Bus in reverce order (from 31 to 0 default is from 0 to 31).
    Added LinkSpeed trace when link reset or retrain called.
    EIP 57664
    Aptio PI 1.2; UEFI 2.3.1 Support Extended PCI bus driver functionality
    Files: DevicePath.h; LoadFile2.h; PciBus.h; PciBus.c.
    EIP 58702
    Aptio PI 1.2; UEFI 2.3.1 Support Changes in Bus Drivers protocols (PCI bus driver)
    Files: PciBus.c
    EIP 53475
    PCI Express support issue fixed
    Files: PciBus.c
    EIP 54911
    Reconnect -r issue fixed.
    Files: PciBus.c
    EIP 61311
    PCI Express controllers may not be correctly initialized, because of missing delays, while resetting the link. Added delay code and tokens PCI_T_RST and PCI_T_RST_RECOVERY.
    Files: PciBus.c
    EIP 63430
    Replace use of PciIo->MemRead with MemCpy() for Option ROMs.
    Files: PciBus.c
    EIP 61101
    The secondary bus reset in the link retraining code causes downstream PLX bridges to disappear. Added BridgeRestoreBuses() function.
    Files: PciBus.c
  • Bug Fixes
    • Minor bug fixes not related to any eip EIP. Code cleanup.
    Fixed bug in PcieRetrainLink function it was not doing other attempts to retrain link because of missing else statement.
    EIP 54911
    Calling Stop function was causing ASSERT. Caused by Incorrect setting of the attributes and handling Stop function for Device of Type tRootBridge.
    Files: PciBus.c
    EIP 54911
    Calling Stop function was causing ASSERT. Caused by Incorrect setting of the attributes and handling Stop function for Device of Type tRootBridge.
    Files: PciBus.c
    EIP 61310
    Unable to enter OpROM on Adaptec 1430 card. OpROM executes, attached drives will boot but pressing Ctrl A to enter utility hangs system. Considered DID==0 as a valid option meaning all devices.
    Files: PciBus.c
    EIP 60123
    Resource padding is not functional for PCIe hot-plug. Caused by In hot plug function was missed changes in BusXlat. Fixed AmiBoardInfo driver to correctly update HP slot info.
    Files: PciHostBridge.c; PciBoard.c; AmiBoardInfo.c.
  • Update Instructions
  • This release id part of Core 4651. Follow Core 4651 update instructions.
  • For Out of Resources condition handling get 4650_PCI_BRD_RES_01A component from $/Alaska/BIN/Modules/Template/PciPlatformResources/
  • See PCI Porting Guide on AMI Share Portal for more details and coding examples. Updated Porting Guide corresponding current label also attached to EIP 55759
    • 4650_PCIBUSBIN_25_0:
  • NewFeatures
    • EIP 38174
    Generic support to handle PCI OUT OF RESOURDCES conditions
    Files: PciBus.c; PciHostBridge.c;
    EIP 53475
    Generic PCI Express 3.0 support.
    Files: PciBus.c; PciBus.uni; PciBus.sd
  • Bug Fixes
    • Minor bug fixes not related to any eip EIP. Code cleanup.
  • Update Instructions
  • Remove old PciBUs Module (Sources and Binaries)
  • Download new 4650_PCIBUSSRC_25_0; 4650_PCIBUSBIN_25_0
  • Update following Core Files: AcpiRes.c(checkin #36 or up); AcpiRes.h(#16); Setup.h(#36)
  • Check EIP 57650. If EIP is closed get latest TSE Binaries, if not use attaced to that EIP bootflow.c and booflow.h.
  • For Out of Resources condition handling get 4650_PCI_BRD_RES_01A component from $/Alaska/BIN/Modules/Template/PciPlatformResources/
  • See PCI Porting Guide on AMI Share Portal for more details and coding examples. Updated Porting Guide corresponding current label also attached to EIP 55759
    • 4650_PCIBUS_24_0
  • NewFeatures:
    • EIP48290:
    Added PCI_AMI_COMBINE_MEM_PMEM32 token that tells to map 32 bit sized PF MMIO BARs trough NON PF MMIO Bridge registers.
    Files: PciBus.c; PciBus.sdl;
    EIP43879:
    Added PciPortOemGetOptRom() OEM Hook to override content of the PCI Device Option ROM.
    Files: PciBus.c; PciPort.c; PciPort.h; PciBus.mak; PciBus.sdl
  • Improvements
    • EIP43879:
    Added PciPortOemGetOptRom() OEM Hook to override content of the PCI Device Option ROM.
    Files: PciBus.c; PciPort.c; PciPort.h; PciBus.mak; PciBus.sdl
    EIP45278:
    Changed default resource allocation algorithm to work more efficiently.
    Files: PciBus.c; PciHostBridge.c
    EIP49743:
    Workaround for devices which having Link Retrain bit "sticky".
    Files: PciBus.c
    EIP50097:
    Fixed issue when with PCI_FIXED_BUS_ASSIGNMENT==1 system was ASSERTING. Reason was that with complicated PCI structure next bridge XLAT entry that used to determine Subordinate bus #, selected incorrectly.
    Files: PciBus.c
    Removed Setup Option "Selectable DeEmphasis" since it is HwInit Bit.
  • Bug Fixes
    • EIP49743
    Incorrect initialization complicated PCI infrastructure wrong condition to breake {do while loop}.
    Files: PciBus.c
    EIP49743
    In the PcieCalcLatency(), the do-while loop condition have issue in this.
    It may be a condition when while loop in function PcieCalcLatency(), will never break.
    Files: PciBus.c
    Fixed bug in PcieCalcLatency() function. It was not calculating L1 latency correctly.
    4640_PCIBUS_24_0
    Features and Bug Fixes:
    PciHostBridge.c
  • Updated CreateRootBusData to call HbCspDoesRootBrgExist to determine whether to updated the BusXlat table for the particular host device.
  • Updated ClaimMmioResources to use MMIO resources as-is if AllocType is set to EfiGcdAllocateAddress. For this chipset, each root bridge is programmed with base and limit values for 32bit and 64bit MMIO. The root bridge will only decode addresses within these ranges. For this reason, the Base and Limit values passed to the PCI Bus driver should be used as-is and not modified.
    • PciBus.c
  • EIP 41687: The PciBus.c had workaround code for patching bad PCI or PCIe device list. Bad Pci list only could not cover device reource that requested more than one MMIO resources.
  • New Incompatibility Type Sypport: icBad64BitBar - Device has a bar that is 64bit capable, but the card does not function properly when it is allocated with an address above 4G.
  • Freeing all Memory when exiting with ERROR from EnumerateBus() function.
  • Fixed UEFI Option ROM Size miscalculation.
  • EIP 40554: Fixed WDK Build Issue.
  • EIP 38289: Minor fix for Klocwork Issues II.
  • Improved logic to select matching PCI Bus Xlat table entry.
  • Fixed condition to disable device using 64 bit resource threshold.
  • Fixed bug in DoubleCheckOpRom() when OpROM is a Single Image ROM.
  • Fixed build error with SRIOV token ON.
    • MPL Programming:
  • Bug fix in PcieProgramPayloadUp() function, canged order when recording calculated PayLoad.
  • It use to recursive call was made after reduced value of MPL was recorded. It was preventing function to program MPL correctly.
  • Fixed InitDevCahain() function Logic.
  • Fixed issue with PCIe Switches and MPL programming UP.
  • Fixed Possible issue with incorrect MPL Programming.
  • Introduced a New Csp Hook to overwrite global ASPM Settings.
    • PciPort.c; PciPort.h
  • Introduced a New Csp Hook to overwrite global ASPM Settings.
    • 4640_PCIBUS_24_0_TEST
    1. This Label is ONLY compatible with Core 4.6.4.0!
    2. This PCI Bus Driver Label also requires separately labeled Core.AmiBoardInfo Component and ACPI Module Label 32 or later.
    3. This label uses new, "C" style output of the AMI SDL. It is required update VeB and AMI SDL tool to version 5.68.0116 or Higher .
    4. In this label has competely redesigned an Algorithm used to initialize PCI Express Features including customers suggestions.
    5. Generic Support of PCI Express Base Specification ver. 2.1 was added.
    6. PCI Setup Screen was changed to separate PCI Express 1.1 Features and 2.1 (Generation 2).
    7. Label theoretically support ARI Forwarding... BUT No testing has been done since there are no ARI Hardware available yet.
    8. A generic Hot-Plug support also was improved in this label.
    9. PCI Root Bridge Driver uses information generated by VeB and some tokens from PciBus.sdl automatically produces MULTY ROOT infrastructure.
    10.When updating make sure you have followed update instructions from 4636_PCIBUS_23_0_TEST in project's Chipset files.
    11.New Chipset template will have all needed parts referenced in NEW ACPI ROOT Resource Allocation.
    Update Instructions
    1. Make sure your project has CORE 4640.
    2. Update AmiBoardInfo Sub Component with 4640_AMI_BOARD_0100.
    3. Get PCI Bus Driver Module From SS Label 4640_PCIBUSBIN_240_TEST.
    4 If your project has Sources: Get PCI Bus Driver Module From SS Label 4640_PCIBUSSRC_240_TEST.
    5. Verify that you have followed update instructuins from 4636_PCIBUS_23_0_TEST in project's Chipset files.
    6. Enjoy!
    4636_PCIBUS_23_0_TEST
    New Features and Bug Fixes
    PciBus.c
    1. P2P Bridge Spec. v1.1 requires to set INT Line Register to 0xFF. PCI spec 3.0 require to set it to 0xFF - means not connected for x86 architecture. Values of 0..0x0F indicating IRQ0..15 values 0x10..0xFE reserved.
    2. Fixed (~0LU) statement to (0ULL). This is correct statement for 64 bit Value.
    3. Component Name protocol implementation is updated to support both Component Name and ComponentName2 protocols (based on value of the EFI_SPECIFICATION_VERSION SDL token).
    4. Fixed: EIP 19106 If 1 Bus set to be padded in Setup, PCI Bus driver still creates 1 BUS for this bridge instead of 2.
    5. Moved DisableBridgeDecoding() call before Disable device decoding since it could decode 0-4K of IO and 0-1M of Memory.
    6. Fixed conditions in ApplyAcpiResources() where function assumes validity of Resource Range. In case of Fixed Resource Allocation Resource window allocated by custom unction might be bigger than actual hardware resource request.
    7. Fixed EIP 26787. If P2P Bridge has Expansion ROM BAR, value that has to go there was programmed as Secondary Interface Forward Range.
    PciHostBridge.c
    1. Added Print out Message in DEBUG_MODE with PCI BUS Driver Version.
    2. Added Initialization of ImageHandle field in Host Bridge and Root Bridge Structures. (New PciHostBridge.h required).
    3. Generic support for multiple root bridges resources reporting to ACPI DSDT Root Bridge Object (EIP 23548 Support MMIO allocation above 4GB, if devices are capable).
    PciPort.c and PciPort.h
    1. Added infrastructure to ELINKs as porting Functions delivered from Platform and Chipset files. Now you can port PCI Bus driver without modifying Core files
    PciHostBridge.h
    1. Added definitions to support changes for EIP 23548 (Support MMIO allocation above 4GB).
    PciBus.sdl
    1. PCI Bus Driver Version Changes.
    2. Added Parenting eLinks "OEM_SKIP_PCI_DEVICE"; "OEM_PROGRAM_PCI_DEVICE"; "OEM_PCI_ATTRIBUTES". To implement PCI Bus Driver hooks invocation w/o modifying Generic Files.
    PciBus.mak Changes
    1. Added Definitions for OEM_PCI_PROGRAM_DEVICE_CALLBACK_LIST; OEM_PCI_SKIP_DEVICE_CALLBACK_LIST and OEM_PCI_DEVICE_ATTRIBUTES_LIST to support adding porting hooks trough eLinks.
    Update Instructions
    Get PCI Bus Driver Module From SS. If your Project has CORE Earlier than 4.6.3.6, You need to upgrade to Core 4.6.3.6. first. Please follow instructions listed in here in "Revision History" Section or CORE CHM.
    PCI Bus Driver Version 2.3.0 Assumes that following modules are present in the Project.
    1. AmiBoardInfo eModule Part (Part Of Core BIN Starting from "SS: Alaska;$/Alaska/BIN/Core\Modules/BoardInfo;4.6.3.6" )
    2. ACPI Module Label 32. Upgrade from earlier Module Possible by following Steps below:
    a)Get updated OSCM.ASL from ACPI 32 (it must be included from each ROOT BRIDGE Device Scope)
    b)Get New file RbRes.asl from ACPI 32 (it must be included from each ROOT BRIDGE Device Scope)
    c)Get Updated AMLUPD.ASL (Some place holders no longer needed)
    d)Make sure each implementation of ROOT PCI Object in ASL Like "PCI0" "PCI1"(usually it is Nb.asl and Nb2.asl) must include following:

        include("Core\\Em\\ACPI\\RbRes.ASL")
        include("Core\\Em\\ACPI\\OSCM.ASL")
    e)Make sure to comment out all related to ROOT BRIDGE _CRS Method Objects from OEM_DSDT.ASL.
    f)If your project uses multiple ROOT BRIDGEs and predefined resource splitting. Use following code as reference for implementation of Resource Allocating routine

    //-----------------------------------------------------------------------
//CSP Function invoked in PCI Host Bridge Driver when time to ask GCD
//for resources. You can overwrite a default algorithm used to allocate
//resources for the Root Bridge.
EFI_STATUS HbCspAllocateResources( PCI_HOST_BRG_DATA *HostBrgData,
                                    PCI_ROOT_BRG_DATA *RootBrgData,
                                    UINTN RootBrgIndex)
{
    EFI_STATUS					Status=EFI_UNSUPPORTED;
//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
//Any Additional Variables goes here

    UINTN						i;
    ASLR_QWORD_ASD				*res;
    UINT64						a=0;
    UINT64						AddressLimit=0;
    DXE_SERVICES				*dxe;
    EFI_IOH_UDS_PROTOCOL  		*mIohUds; //Platform/Chipset Sapecifik interface provoding information about resource Split between Multiple ROOTs.
    EFI_GUID 					gEfiIohUdsProtocolGuid = EFI_IOH_UDS_PROTOCOL_GUID;

    // ported for two IOHs

  // koti : TO_DO : further improvement on resources based on setup options, if one IOH requires more than other and
    // Checking for error conditions on not to assign a more than qpi decode range.
    if (RootBrgIndex > (NUMBER_IOH_SOCKETS-1)) return Status;
    Status = pBS->LocateProtocol(
                            &gEfiIohUdsProtocolGuid,
                            NULL,
                            &mIohUds);
    ASSERT_EFI_ERROR (Status);
    if (EFI_ERROR(Status))
        return Status;

    Status=LibGetDxeSvcTbl(&dxe);
    if(EFI_ERROR(Status)) return Status;

    //Feel out needed structures.
    if(RootBrgData->AcpiRbRes[raIo].Min==0){ //do it only ones
        RootBrgData->AcpiRbRes[raIo].Min=mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceIoBase;
        RootBrgData->AcpiRbRes[raIo].Max=mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceIoLimit;
        RootBrgData->AcpiRbRes[raIo].Len=RootBrgData->AcpiRbRes[raIo].Max-RootBrgData->AcpiRbRes[raIo].Min+1;
        RootBrgData->AcpiRbRes[raIo].AddrUsed=mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceIoLimit+1;
        RootBrgData->AcpiRbRes[raIo].AllocType=EfiGcdAllocateMaxAddressSearchTopDown;

        RootBrgData->AcpiRbRes[raMmio32].Min=mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceMem32Base;
        RootBrgData->AcpiRbRes[raMmio32].Max=mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceMem32Limit;
        RootBrgData->AcpiRbRes[raMmio32].Len=RootBrgData->AcpiRbRes[raMmio32].Max-RootBrgData->AcpiRbRes[raMmio32].Min+1;
        RootBrgData->AcpiRbRes[raMmio32].AddrUsed=mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceMem32Limit+1;
        RootBrgData->AcpiRbRes[raMmio32].AllocType=EfiGcdAllocateMaxAddressSearchTopDown;

        RootBrgData->AcpiRbRes[raMmio64].Min=mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceMem64Base;
        RootBrgData->AcpiRbRes[raMmio64].Max=mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceMem64Limit;
        RootBrgData->AcpiRbRes[raMmio64].Len=RootBrgData->AcpiRbRes[raMmio64].Max-RootBrgData->AcpiRbRes[raMmio64].Min+1;
        RootBrgData->AcpiRbRes[raMmio64].AddrUsed=mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceMem64Limit+1;
        RootBrgData->AcpiRbRes[raMmio64].AllocType=EfiGcdAllocateMaxAddressSearchTopDown;
    }

    for(i=0; iResCount; i++){
        res=RootBrgData->RbRes[i];
        if(res->Type==ASLRV_SPC_TYPE_BUS) {
            TRACE((-1, "PciRB: #%X BUS _MIN=0x%lX; _MAX=0x%lX; _LEN=0x%lX\n",
                        RootBrgIndex,res->_MIN,res->_MAX,res->_LEN, res->_GRA));
            continue;
        }
        // update io and memory values from qpi rc output.
        //Allocate IO
        if(res->Type==ASLRV_SPC_TYPE_IO){

        //
        //Set Resource starting address for IO based on which RB it is.
        // Update Root Bridge with UDS resource information
        //
            RootBrgData->AcpiRbRes[raIo].Gra=res->_MAX;
            a = mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceIoBase;
            AddressLimit = mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceIoLimit;
            AddressLimit = AddressLimit + 1; // make power of 2
            TRACE((-1,"PciRB: #%X Resources Type=%X; routed by QPI: Address base = %lX; AddressLimit=%lX; \n",
            RootBrgIndex, res->Type, a, AddressLimit));

            TRACE((-1, "PciRB: #%X IO ",RootBrgIndex));
            //Use prefered method to allocate resources for
            Status=dxe->AllocateIoSpace(EfiGcdAllocateMaxAddressSearchTopDown,
                            EfiGcdIoTypeIo,
                            AlignFromGra((UINTN)res->_MAX),
                            res->_LEN,
                            &AddressLimit,
                            RootBrgData->ImageHandle,
                            RootBrgData->RbHandle);
            if(EFI_ERROR(Status)) {
                TRACE((-1,"PciRB: IO Allocation Failed: _LEN=%lX; _GRA=l%X.\n",res->_LEN, res->_MAX));
                ASSERT_EFI_ERROR(Status);
                return Status;
            }
        }
        //Allocate MMIO
        else if( res->Type==ASLRV_SPC_TYPE_MEM){
            //First root or Second one????
            if(res->_GRA==32){
                a = mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceMem32Base;
                AddressLimit = mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceMem32Limit;
                AddressLimit = AddressLimit + 1; // make power of 2
                TRACE((-1, "PciRB: #%X MMIO32",RootBrgIndex));
                RootBrgData->AcpiRbRes[raMmio32].Gra=res->_MAX;
            } else {
                a = mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceMem64Base;
                AddressLimit = mIohUds->IohUdsPtr->PlatformData.IOH_resource[RootBrgIndex].PciResourceMem64Limit;
                AddressLimit = AddressLimit + 1; // make power of 2
                TRACE((-1, "PciRB: #%X MMIO64",RootBrgIndex));
                RootBrgData->AcpiRbRes[raMmio64].Gra=res->_MAX;
            }

            TRACE((-1,"PciRB: #%X Resources Type=%X; routed by QPI: _GRA=%lX; Address base = %lX; AddressLimit=%lX; \n",
            RootBrgIndex, res->Type, res->_GRA, a, AddressLimit));

            Status=dxe->AllocateMemorySpace(EfiGcdAllocateMaxAddressSearchTopDown,
                            EfiGcdMemoryTypeMemoryMappedIo,
                            AlignFromGra((UINTN)res->_MAX),
                            res->_LEN,
                            &AddressLimit,
                            RootBrgData->ImageHandle,
                            RootBrgData->RbHandle);
            if(EFI_ERROR(Status)) {
                TRACE((-1,"PciRootBrg: Memory Allocation Failed: Length: %lX\n",res->_LEN));
                return Status;
            }

            //Set this region as WT cache if it is PREFETCHABLE
            if(res->TFlags.MEM_FLAGS._MEM!=ASLRV_MEM_UC)
            {
                TRACE((-1,"P"));
                Status=dxe->SetMemorySpaceAttributes(AddressLimit,res->_LEN,EFI_MEMORY_WT);
                //if attempt to set WT attributes has filed, let's try UC
                if(EFI_ERROR(Status))
                {
                    TRACE((-1,"PciHostBridge: Setting of WT attributes for prefetchable memory has failed(%r). UC is used.\n",Status));
                    Status=dxe->SetMemorySpaceAttributes(AddressLimit,res->_LEN,EFI_MEMORY_UC);
                }
            }
            else Status=dxe->SetMemorySpaceAttributes(AddressLimit,res->_LEN,EFI_MEMORY_UC);
            ASSERT_EFI_ERROR(Status);
            if(EFI_ERROR(Status)) return Status;

        }
        res->_MIN = AddressLimit;
//		TRACE((-1,"PciRB: #%X Resources: Type=%X; TFlags=%X; GCD asssigned address _MIN=%lX; _MAX=%lX; _GRA=%lX; _LEN=%lX.\n",
//        RootBrgIndex, res->Type, res->TFlags.TFLAGS,res->_MIN, res->_MAX, res->_GRA, res->_LEN ));
        TRACE((-1, ": _MIN=0x%lX; _MAX=0x%lX; _LEN=0x%lX; _GRA=0x%lX\n",
        res->_MIN,res->_MAX,res->_LEN, res->_GRA ));

        //No need to change this and lose Granularity Value... will preserve it.
        //res->_MAX=res->_MIN+res->_LEN-1;
    }

//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
    return Status;
}
    g)If you are using Standard(Single Root Project) or you want to use dynamic (default) resource allocation Algorithm, have HbCspAllocateResources() function return EFI_UNSUPPORTED. If so, default resource allocation algorithm will be used.
    h)Replace function UpdateAml() at ACPICore.c with following code:

//
//----------------------------------------------------------------------------
//  Procedure:   UpdateAml
//
//  Description:
//  This function updates AML objects with values provided in ACPI_AML_UPD_INFO
//  structure
//
//  Input:
//  IN ACPI_AML_UPD_INFO *AmlUpdInfo - pointer to ACPI_AML_UPD_INFO structure
//
//  Output:
//  EFI_SUCCESS - AML objects updated successfully
//  EFI_ERROR - some error occured during update process
//
//----------------------------------------------------------------------------
//

EFI_STATUS UpdateAml(ACPI_AML_UPD_INFO	*AmlUpdInfo)
{
    UINTN			i;
    ACPI_HDR 	*Dsdt;
    EFI_STATUS		Status = 0;

//-------------------------

    for(i = 0; i < 2; i++){
        if (i) Dsdt = (ACPI_HDR*)AmlUpdInfo->Dsdt1Addr;
        else Dsdt = (ACPI_HDR*)AmlUpdInfo->Dsdt2Addr;
        if (Dsdt){
            //Update TOPM Object
            Status = UpdateAslNameObject(Dsdt, "TOPM", AmlUpdInfo->TopOfMemory);
            ASSERT_EFI_ERROR (Status)
            if (EFI_ERROR(Status)) return Status;

            //Update ROMS Object
            //Status = UpdateNameObject(Dsdt, AML_NAME_ROMS, AmlUpdInfo->RomStart);
            //ASSERT_EFI_ERROR(Status)
            //if(EFI_ERROR(Status)) return Status;
//TODO: IOST and SSx Objects update
            //Update IOST Object
            Status = UpdateAslNameObject(Dsdt, "IOST", (UINT64)AmlUpdInfo->SioDevStatusVar.DEV_STATUS);
            ASSERT_EFI_ERROR(Status)
            if(EFI_ERROR(Status)) return Status;

            Status = UpdateAslNameObject(Dsdt, "SS4", (UINT64)AmlUpdInfo->SS4);
            ASSERT_EFI_ERROR(Status)
            if(EFI_ERROR(Status)) return Status;

            Status = UpdateAslNameObject(Dsdt, "SS3", (UINT64)AmlUpdInfo->SS3);
            ASSERT_EFI_ERROR(Status)

            if(EFI_ERROR(Status)) return Status;
            Status = UpdateAslNameObject(Dsdt, "SS2", (UINT64)AmlUpdInfo->SS2);
            ASSERT_EFI_ERROR(Status)

            if(EFI_ERROR(Status)) return Status;
            Status = UpdateAslNameObject(Dsdt, "SS1", (UINT64)AmlUpdInfo->SS1);
            ASSERT_EFI_ERROR(Status)
            if(EFI_ERROR(Status)) return Status;

            Dsdt->Checksum = 0;
            Dsdt->Checksum = ChsumTbl((UINT8*)Dsdt, Dsdt->Length);
        }
    }
    return Status;
}
    i) Comment out function CollectPciAmlUpdInfo(ACPI_AML_UPD_INFO *AmlUpdInfo).
    j) Comment call to function CollectPciAmlUpdInfo() from CollectAmlUpdInfo() function. This functionality moved into PciHostBridge.c:

//	Status=CollectPciAmlUpdInfo(Aui);
//	ASSERT_EFI_ERROR(Status);
    4633_PCIBUS_2_2:
    Fixes:
    1. Fixed minor issues, related to PCI IRQ entries usage and update.
    2. Potential issue when optimizing resources EIP 21366. Extra BAR Length value could overflow if initial eBar->Length totally used by other resource requests.
    3. Fixed potential Memory corruption issue when assigning Ext->XlatEntry->BusRun for bridges not having corresponded XlatTbl Entry.
    4. Fixed issue with Multi Root support and incorrect bus allocation for the secondary Root(s) if they have advanced (more than 1) bus structure.
    5. Fixed issue in AssignBridgeResources() function when there are no bars to program function was returning ERROR Status.
    6. Other Minor bug fixes and code cleanup.
    New Features in Release:
    1. Separated from PCI Bus Driver all PCI Bus related auto generated output files.
    2. Made PciBus and PCI Root Bridge Driver use New "AMI Board Info" Protocol.
    3. Added Generic Support for PERR#, SERR# and VGA Palette Snoop settings.
    4. Added PCI Porting Hooks to overwrite setting Device Attributes.
    5. Added Generic Support and Setup Question on how to handle resource requests Above 4G.
    6. Added "Semi-Automatic" Support for PCI Express Hot-Plug controlled by the BIOS. Supported only if AMI_ROOT_BRIDGE_SUPPORT token set to ON. will work only with Recent CHIPSET Template and ACPI label higher than 30.
    7. Added Setup Form to configure Hot-Plug settings.
    Files Changed In this Label.
    Removed: PciBoard.asm; PciBoard.h; PciBusSrcRbx64; PciBusSrcRb
    Added: PciPort.h; PciBusSrc.chm
    PciBus.c:
    1. Changed name and initialization of mMaxBusLen global variable to mMaxBusScan.
    2. Added Debug messages when updating IRQ routing table.
    3. Added Dump of PIC and APIC IRQ Routing Tables dump at the end of enumeration.
    4. Added fix in OptimizeBrgResource() function
    5. Changes related to removing PciBoard.h and usage of <Protocol\AmiBoardInfo.h>
    PciBus.h:
    1. PCI_DEV_INFO added new fields and Data types.
    PciHostridge.c
    1. Changes related to production of Root HP Controller Initialization Protocol.
    2. Changes related to removing PciBoard.h and PciBoard.asm from Root Bridge driver.
    PciPort.h; PciPort.c:
    1.Added new porting hooks prototypes and implementations
    PciBus.mak;PciBusSrc.mak:
    1. Changes related to removing/adding files to/from component.
    PciBus.sdl;PciBusSrc.sdl:
    1. Changes related to the new features implementation. Some eLinks was removed since they don't needed anymore.
    PciBusSetup.h; PciBus.sd; PciBus.uni:
    1. Changes related to the new features implementation.
    Update Instructions.
    1. Upgrade PciBus Component.
    2. If your project contains "Core Sources" module, upgrade PciBus sources component.
    3. Two additional parameters have been added to HbCspMapRootBrgToHost function in NbPciCsp.c (Function HbCspMapRootBrgToHost was introduced in PCI Bus Driver Label 21). On most of the projects current definition of the function can simply be replaced with the one below. Multi-host projects may require additional porting.

//<AMI_PHDR_START>/----------------------------------------------------------------------------
//
// Procedure:   HbCspMapRootBrgToHost
//
// Description:	Chipset specific function that returns Host Bridge Number for
//              the corresponded Root Bridge.
//
// Input:
//  IN PCI_BUS_XLAT_HDR*  RootBrgXlatHdr - Root Bridge XLAT table entry
//
// Output:
//      UINTN - Number of the Host Bridge that root bridge identified by RootBrgXlatHdr belongs to.
//
// Note:
//  THIS FUNCTION MUST BE PORTED FOR MULTI-HOST SYSTEMS
//
//  HOST bridge handle supports:
//    - ResourceAllocation Protocol (REQUIRED);
//    - RootHotplugControllerInitialization Protocol (OPTIONAL);
//    - PciPlatform Protocol (OPTIONAL).
//  ROOT bridge handle supports:
//    -PciRootBridgeIo Protocol (REQUIRED).
//----------------------------------------------------------------------------
//<AMI_PHDR_END>
UINTN HbCspMapRootBrgToHost(IN PCI_BUS_XLAT_HDR *RootBrgXlatHdr,
                            UINT64              *AllocationAttr,
                            UINT64              *RbSuportedAttr)
{
//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//

//Usually even server chipsets use only one PCI HOST abstraction
//but if  chipset has more than one HOST we have to specify
//which ROOT from PciBusXlat table belongs to which HOST.

    //Check if we need to update/change Allocation Attributes Passed to this function...
    //Here we have ability to override Automaticaly generated Attributes based on
    //SDL tokens COMBINE_MEM_PMEM and ABOVE_4G_PCI_DECODE
    //bits currently defined for Allocation Attributes is:
    //  EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM
    //  EFI_PCI_HOST_BRIDGE_MEM64_DECODE
    //Usually nothing needs to be done sor SINGLE HOST-SINGLE-ROOT systems
    //NOTE: this function could be called more than one time for each HOST
    // if you updating AllocationAttr only last data will be valid.
    //!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
    // PCI HostBridge Driver sets DEFAULT allocation attributes.
    // Add code only if you need to overwrite it.

    //if i.e. second root does not support PF_MMIO
    //if(RootBrgXlatHdr->BusBuild == 0x80 ) *AllocationAttr &= ~(EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM);
    //else *RbSuportedAttr = ....;

    //Check that in VeB PCI Wizard this Root creates bus 0
    //This is usualy a compatibility bus
    //Set the Compatibility bus Attributes it must decode Legacy resources
    //!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
    // PCI HostBridge Driver sets DEFAULT Supported ROOT BRIDGE Attributes.
    // Add code only if you need to overwrite it.

    //if(RootBrgXlatHdr->BusBuild==0) *RbSuportedAttr=
    //(EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |	EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO| \
    //EFI_PCI_ATTRIBUTE_ISA_IO | EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO  | \
    //EFI_PCI_ATTRIBUTE_VGA_MEMORY | EFI_PCI_ATTRIBUTE_VGA_IO | \
    //EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO);
    //else *RbSuportedAttr=0;

    //Returning Host Number for Root Bridge corresponded to the Root
    //ported as RootBrgXlatHdr->BusBuild from BusXLat Table
    //for single SINGLEHOST-SINGLE-ROOT system this value always 0
    //!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
    // If your system MULTY-HOST/MULTY-ROOTs system
    //you need to add code here to correctly map each ROOT referenced in VeB wizard
    //to it's corresponded host

    return 0;

//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
}
    4. Add the following definition of the new function HbCspAllocateResources to NbPciCsp.c.

//-----------------------------------------------------------------------
//CSP Function invoked in PCI Host Bridge Driver when time to ask GCD
//for resources. You can overwrite a default algorithm used to allocate
//resources for the Root Bridge.
EFI_STATUS HbCspAllocateResources( PCI_HOST_BRG_DATA *HostBrgData,
                                PCI_ROOT_BRG_DATA *RootBrgData,
                                UINTN RootBrgIndex)
{
    EFI_STATUS	Status=EFI_UNSUPPORTED;
//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
//Any Additional Variables goes here
/*
    UINTN				i;
    ASLR_QWORD_ASD		*res;
    UINT64				a=0;
    DXE_SERVICES		*dxe;
//------------------------------------
    Status=LibGetDxeSvcTbl(&dxe);
    if(EFI_ERROR(Status)) return Status;

    for(i=0; iResCount; i++){
        res=RootBrgData->RbRes[i];
        if(res->Type==ASLRV_SPC_TYPE_BUS) continue;

        //Allocate IO
        if(res->Type==ASLRV_SPC_TYPE_IO){
            //First root or Second one????
            //Set Resource starting address for IO based on which RB it is.
            if(RootBrgIndex==0) a= 0xB000;
            else a=0xc000;

            //Use prefered method to allocate resources for
            Status=dxe->AllocateIoSpace(EfiGcdAllocateMaxAddressSearchBottomUp,
                            EfiGcdIoTypeIo,
                            AlignFromGra((UINTN)res->_MAX),
                            res->_LEN,
                            &a,
                            RootBrgData->RbHandle, NULL);
            if(EFI_ERROR(Status)) {
                PCI_TRACE((TRACE_PCI,"PciRootBrg: IO Allocation Failed: Length: %lX\n",res->_LEN));
                return Status;
            }
        }

        //Allocate MMIO
        else if( res->Type==ASLRV_SPC_TYPE_MEM){

            //None PF memeory Will Have TypeSpecific Flag Different.

            //First root or Second one????
            if(res->_GRA==32){
                if(RootBrgIndex==0 ) a= 0xB0000000; //Set Resource starting address for IO
                else a=0xC0000000;
            } else {
                if(RootBrgIndex==0 ) a= 0x800000000; //Set Resource starting address for IO
                else a=0x1000000000;
            }

            Status=dxe->AllocateMemorySpace(EfiGcdAllocateMaxAddressSearchBottomUp,
                            EfiGcdMemoryTypeMemoryMappedIo,
                            AlignFromGra((UINTN)res->_MAX),
                            res->_LEN,
                            &a,
                            RootBrgData->RbHandle, NULL);
            if(EFI_ERROR(Status)) {
                PCI_TRACE((TRACE_PCI,"PciRootBrg: Memory Allocation Failed: Length: %lX\n",res->_LEN));
                return Status;
            }

            //Set this region as WT cache if it is PREFETCHABLE
            if(res->TFlags.MEM_FLAGS._MEM!=ASLRV_MEM_UC)
            {
                Status=dxe->SetMemorySpaceAttributes(a,res->_LEN,EFI_MEMORY_WT);
                //if attempt to set WT attributes has filed, let's try UC
                if(EFI_ERROR(Status))
                {
                    PCI_TRACE((TRACE_DXE_CHIPSET,"PciHostBridge: Setting of WT attributes for prefetchable memory has failed(%r). UC is used.\n",Status));
                    Status=dxe->SetMemorySpaceAttributes(a,res->_LEN,EFI_MEMORY_UC);
                }
            }
            else Status=dxe->SetMemorySpaceAttributes(a,res->_LEN,EFI_MEMORY_UC);
            ASSERT_EFI_ERROR(Status);
            if(EFI_ERROR(Status)) return Status;

        }
        res->_MIN=a;
        res->_MAX=res->_MIN+res->_LEN-1;
    }
*/

//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
    return Status;
}
    5. Remove definitions of the following four variables from NbPciCsp.c (the variables are no longer needed).
      •
UINTN	gRbCountTbl[NB_NUMBER_OF_HOST_BRG]={
    1, 	//Number of root bridges produced by Host #0
        //Number of root bridges produced by Host #1
        //Number of root bridges produced by Host #2
        //Number of root bridges produced by Host #3
};

      •
UINT64 gHbAllocAttribTbl[NB_NUMBER_OF_HOST_BRG]={
// Changed next line to 0 because screen would go blank early
// during EFI Vista installation
//	EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM,	//Allocation Attributes of Host #0
    0,	//Allocation Attributes of Host #0
        //Allocation Attributes of Host #1
        //Allocation Attributes of Host #2
        //Allocation Attributes of Host #3
        // And so on
};

      •
ASLR_QWORD_ASD	gRbBusesTbl[]={
//for Root 0 at Host 0
    {0x8A, 0x2B,ASLRV_SPC_TYPE_BUS, 0,0,  	0x1, 	0x00, 	0xFF, 	0, 		0x100 }//Bus
//for Root 1 at Host 0 if any

//for Root 0 at Host 1 if any
};

      •
UINT64	gRbSupportsTbl[]={
//for Root 0 at Host 0
    (EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |	EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO| \
     EFI_PCI_ATTRIBUTE_ISA_IO | EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO  | \
     EFI_PCI_ATTRIBUTE_VGA_MEMORY | EFI_PCI_ATTRIBUTE_VGA_IO | \
     EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO),
//for Root 1 at Host 0 if any

//for Root 0 at Host 1 if any

// and so on...
};
    6. Update implementation of function HbCspStartBusEnumeration in NbPciCsp.c. Older versions of PCI host bridge driver expected this function to create ACPI resource descriptor that defines available range of buses. It is no longer necessary. The information about available bus range is derived from the data generated by VeB PCI routing wizard. The function implementation must be replaced with the following code:

EFI_STATUS HbCspStartBusEnumeration(
        PCI_HOST_BRG_DATA *HostBrgData,PCI_ROOT_BRG_DATA *RootBrgData,UINTN RootBrgIndex)
{
    EFI_STATUS	Status=EFI_SUCCESS;
//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
//!!!!!ATTENTION!!!!!!!!!!ATTENTION!!!!!!!!!!ATTENTION!!!!!!!!!!ATTENTION!!!!!
//!!!!!NO NEED IMPLEMENTING THIS FUNCTION AMYMORE.
//IT MAY BE IMPLEMENTED IF YOU NEED TO OWERWRITE INITIAL BUILD TIME BUS ASSIGNMENT.
//USE RootBrgData->RbRes[i] of type ASLR_QWORD_ASD with Type field ==ASLRV_SPC_TYPE_BUS

//Any Additional Variables goes here

//------------------------------------

//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
//PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING////PORTING//
    return Status;
}
    7. Update declaration of HbCspMapRootBrgToHost function in NbCspLib.h:

UINTN HbCspMapRootBrgToHost(PCI_BUS_XLAT_HDR    *RootBrgXlatHdr,
                            UINT64              *AllocationAttr,
                            UINT64              *RbSuportedAttr);
    8. Add the following declaration of HbCspAllocateResources function to NbCspLib.h:

EFI_STATUS HbCspAllocateResources( PCI_HOST_BRG_DATA *HostBrgData,
                                PCI_ROOT_BRG_DATA *RootBrgData,
                                UINTN RootBrgIndex);
    NOTE #1: Sub Component is compatible with Core 4.6.3.6 or later.
    NOTE #2: To use PciBus Subcomponent of version 2.2.0 with the older versions of CORE, you need to add "AmiBoardInfo" MODULEPART from Core 4.6.3.6 to your project and update "Protocol" module part to get AmiBoardInfo.h header.
    NOTNOTE #3: If You updating to PciBus Driver v2.2.0 to have Generic PCIExpress Hot-Plug Support, you will need ACPI Label higher than 30 and most recent CHIPSET template. See AMI_Aptio_4.x_PCI_Porting_Guide_NDA_rev_03 on SHAREPORTAL for instructions how to port project for Hot Plug Support.
    4633_PCIBUS_21_2:
    Fixes:
    1. Fixed PCI Express MaxPayload and ReadRequest Size calculation algorithm. EIP #17947.
    2. Potential issue with name collision in PciHostBridge.c and PciBus.c. Renamed some global variables used.
    3. Added changes to support /W4 build switch.
    4. Added fix to break the PCI Express Extended Capability header access if read returns 0xFFFF. EIP #19144.
    New Features:
    Added "PciPortSkipThisDevice()" to handle PCI Devices which not suppose to be "Touched" during enumeration Process. EIP #8874
    4633_PCIBUS_21_1: Minor bug fixes label
    Fixes:
    1. Fixed "Connect -r" issue EIP #17740..
    2. Fixed Start function of the PCI Bus Driver. It use to return EFI_SUCCESS even
    when all devices were STARTTED. Now it returning EFI_ALREADY_STARTED. This will
    help save some time when CORE attempts to start ALREADY STARTED devices since
    Start() function returned SUCCESS.
    New Features:
    2. None.
    4633_PCIBUS_21: First independent label of the subcomponent.
    Fixes:
    1. Fixed SRIOV support.
    2. Added changes to pass PCI SIG Compliance test.
    3. Changes in PciBusEx Protocol. Some functions there moved to AMI Board Info Interface
    4. Fixed Stop() function in DriverBinding Protocol of the PCI Bus Driver.
    5. Removed EFI_DEADLOOP() used for debugging in PciBus.c and PciHostBridge.c
    New Features:
    1. PCI Root Bridge Driver Installs AMI Board Information Protocol now. It groups together all.
    2. Added Definitions for AMI Board Information Protocol.
    3. Corresponded changes in Make files since PCI RootBridge Driver has to start to install AMI_BOARD_INFO Protocol even when AMI_ROOT_BRIDGE_SUPPORT token is OFF.
    4. Introduced changes to Extended PCI Bus Protocol interface
    5. Added New PciBusSrcRb.Lib and PciBusSrcRbx64.lib build with AMI_ROOT_BRIDGE_SUPPORT set to OFF. Helps to reduce size of the PCI Module when using non-AMI RootBridge driver.

    © American Megatrends Inc.


Function by File Name

AMIBIOS Function Reference

By File Name

The following is a list of the source files.
For a list in alphabetical order, see In Alphabetical Order.

  • DeviceIo.c
  • PciBus.c
  • PciBusSrc.mak
  • PciHostBridge.c
Built on 17:53:34 12/16/11


DeviceIo.c

Description:
This file contains the DeviceIo Protocol and its construction.

The following functions are used in the file: DeviceIo.c.

Function | Description
ConstructDeviceIoProtocol | Construct a DeviceIo protocol.
DeviceIoAllocateBuffer | Allocate a buffer.
DeviceIoFlush | Flush cache lines.
DeviceIoFreeBuffer | Free a buffer.
DeviceIoIoRead | Read Io into a buffer.
DeviceIoIoWrite | Write Io from a buffer.
DeviceIoMap | Map a device address to a host address.
DeviceIoMemRead | Read memory into a buffer.
DeviceIoMemWrite | Write memory from a buffer.
DeviceIoPciDevicePath | Get a device path for a Pci Bus/Device/Function.
DeviceIoPciRead | Read Pci registers into a buffer.
DeviceIoPciWrite | Write Pci registers from a buffer.
DeviceIoUnmap | Unmap a device.


ConstructDeviceIoProtocol in the DeviceIo.c

Function : ConstructDeviceIoProtocol

File: DeviceIo.c
Description:
Construct a DeviceIo protocol.
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL	*RootBridgeIo
IN EFI_DEVICE_PATH					*Path
Output:
EFI_DEVICE_IO_INTERFACE *
Modified:
Notes:
Here is the control flow of this function:
1. Allocate moemory for Private DeviceIo.
2. Copy DeviceIo functions to private structure.
3. Copy pointer RootBridgeIo to private structure.
4. Copy pointer to RootBridgeIo path to private structure.
5. Return pointer to private structure.
Referrals:
AllocatePool
Built on 17:53:33 12/16/11


DeviceIoAllocateBuffer in the DeviceIo.c

Function : DeviceIoAllocateBuffer

File: DeviceIo.c
Description:
Allocate a buffer.
Input:
IN EFI_DEVICE_IO_INTERFACE	*This
IN EFI_ALLOCATE_TYPE		Type
IN EFI_MEMORY_TYPE			MemoryType
IN UINTN					Pages
IN OUT EFI_PHYSICAL_ADDRESS	*HostAddress
Output:
EFI_STATUS
Modified:
Notes:
Here is the control flow of this function:
1. Verify inputs to function.
2. If allocate type is AllocateAnyPages, change max address of 4G-1.
3. If allocate type is AllocateMaxAddress of 4G, change max address to 4G-1.
4. If allocate type is AllocateAddress, verify address is les than 4G.
3. Call BootServices Alloate.
Referrals:
AllocatePages


DeviceIoFlush in the DeviceIo.c

Function : DeviceIoFlush

File: DeviceIo.c
Description:
Flush cache lines.
Input:
IN EFI_DEVICE_IO_INTERFACE *This
Output:
EFI_STATUS
Modified:
Notes:
Here is the control flow of this function:
1. Call PciRootBridgeIo Flush.
Referrals:
Flush


DeviceIoFreeBuffer in the DeviceIo.c

Function : DeviceIoFreeBuffer

File: DeviceIo.c
Description:
Free a buffer.
Input:
IN EFI_DEVICE_IO_INTERFACE	*This
IN UINTN					Pages
IN EFI_PHYSICAL_ADDRESS		HostAddress
Output:
EFI_STATUS
Modified:
Notes:
Here is the control flow of this function:
1. Call PciRootBridgeIo FreeBuffer.
Referrals:
FreeBuffer


DeviceIoIoRead in the DeviceIo.c

Function : DeviceIoIoRead

File: DeviceIo.c
Description:
Read Io into a buffer.
Input:
IN EFI_DEVICE_IO_INTERFACE	*This
IN EFI_IO_WIDTH				Width
IN UINT64					Address
IN UINTN					Count
IN OUT VOID					*Buffer
Output:
EFI_STATUS
Modified:
Notes:
Here is the control flow of this function:
1. Validate width parameter. The parameter is a subset of the one used by RootBridgeIo.
2. Call PciRootBridgeIo PciIoRead and return its Status.
Referrals:
PciIoRead


DeviceIoIoWrite in the DeviceIo.c

Function : DeviceIoIoWrite

File: DeviceIo.c
Description:
Write Io from a buffer.
Input:
IN EFI_DEVICE_IO_INTERFACE	*This
/	IN EFI_IO_WIDTH				Width
IN UINT64					Address
IN UINTN					Count
IN OUT VOID					*Buffer
Output:
EFI_STATUS
Modified:
Notes:
Here is the control flow of this function:
1. Validate width parameter. The parameter is a subset of the one used by RootBridgeIo.
2. Call PciRootBridgeIo PciIoWrite and return its Status.
Referrals:
PciIoWrite


DeviceIoMap in the DeviceIo.c

Function : DeviceIoMap

File: DeviceIo.c
Description:
Map a device address to a host address.
Input:
IN EFI_DEVICE_IO_INTERFACE	*This
IN EFI_IO_OPERATION_TYPE	Operation
IN EFI_PHYSICAL_ADDRESS		*HostAddress
IN OUT UINTN				*NumberOfBytes
OUT EFI_PHYSICAL_ADDRESS	*DeviceAddress
OUT VOID					**Mapping
Output:
EFI_STATUS
Modified:
Notes:
Here is the control flow of this function:
1. Verify Operation. It is a subset of the PciRootBridgeIo Map Operation.
2. Verify valid Map address range. Can not Map any addresses over 4G.
3. Call PciRootBridgeIo Map.
Referrals:
Map


DeviceIoMemRead in the DeviceIo.c

Function : DeviceIoMemRead

File: DeviceIo.c
Description:
Read memory into a buffer.
Input:
IN EFI_DEVICE_IO_INTERFACE	*This
IN EFI_IO_WIDTH				Width
IN UINT64					Address
IN UINTN					Count
IN OUT VOID					*Buffer
Output:
EFI_STATUS
Modified:
Notes:
Here is the control flow of this function:
1. Validate width parameter. The parameter is a subset of the one used by RootBridgeIo.
2. Call PciRootBridgeIo PciMemRead and return its Status.
Referrals:
PciMemRead


DeviceIoMemWrite in the DeviceIo.c

Function : DeviceIoMemWrite

File: DeviceIo.c
Description:
Write memory from a buffer.
Input:
IN EFI_DEVICE_IO_INTERFACE	*This
IN EFI_IO_WIDTH				Width
IN UINT64					Address
IN UINTN					Count
IN OUT VOID					*Buffer
Output:
EFI_STATUS
Modified:
Notes:
Here is the control flow of this function:
1. Validate width parameter. The parameter is a subset of the one used by RootBridgeIo.
2. Call PciRootBridgeIo PciMemWrite and return its Status.
Referrals:
PciMemWrite


DeviceIoPciDevicePath in the DeviceIo.c

Function : DeviceIoPciDevicePath

File: DeviceIo.c
Description:
Get a device path for a Pci Bus/Device/Function.
Input:
IN EFI_DEVICE_IO_INTERFACE	*This
IN UINT64					PciAddress
IN OUT EFI_DEVICE_PATH		**PciDevicePath
Output:
EFI_STATUS
Modified:
Notes:
Here is the control flow of this function:
1. Locate handes of the PciIo Protocol.
2. Call the PciIo function GetLocation to find the matching PciDevicePath.
3. If match found, copy the the DevicePath on the same handle as the PciIo
Protocol. Otherwise, return EFI_UNSUPPORTED.
Referrals:
LocateHandleBuffer HandleProtocol GetLocation DPCopy FreePool


DeviceIoPciRead in the DeviceIo.c

Function : DeviceIoPciRead

File: DeviceIo.c
Description:
Read Pci registers into a buffer.
Input:
IN EFI_DEVICE_IO_INTERFACE	*This
IN EFI_IO_WIDTH				Width
IN UINT64					Address
IN UINTN					Count
IN OUT VOID					*Buffer
Output:
EFI_STATUS
Modified:
Notes:
Here is the control flow of this function:
1. Validate width parameter. The parameter is a subset of the one used by RootBridgeIo.
2. Call PciRootBridgeIo PciRead and return its Status.
Referrals:
PciRead


DeviceIoPciWrite in the DeviceIo.c

Function : DeviceIoPciWrite

File: DeviceIo.c
Description:
Write Pci registers from a buffer.
Input:
IN EFI_DEVICE_IO_INTERFACE	*This
IN EFI_IO_WIDTH				Width
IN UINT64					Address
IN UINTN					Count
IN OUT VOID					*Buffer
Output:
EFI_STATUS
Modified:
Notes:
Here is the control flow of this function:
1. Validate width parameter. The parameter is a subset of the one used by RootBridgeIo.
2. Call PciRootBridgeIo PciWrite and return its Status.
Referrals:
PciWrite


DeviceIoUnmap in the DeviceIo.c

Function : DeviceIoUnmap

File: DeviceIo.c
Description:
Unmap a device.
Input:
IN EFI_DEVICE_IO_INTERFACE	*This
IN VOID						*Mapping
Output:
EFI_STATUS
Modified:
Notes:
Here is the control flow of this function:
1. Call PciRootBridgeIo Unmap.
Referrals:
Unmap


PciBus.c

Description:
EFI PCI Bus Generic Driver.

Tabsize:		4

The following functions are used in the file: PciBus.c.

Function | Description
ActivateOptRom | This function parses Option ROM Image to decide which Image to give control to and updates PciIO->OptioRom and PciIO->OptioRomSize with Correct values.
AddBusDbEntry | Fills gPciBusDb Array in ascending order.
AddOvrHandle | Adds EFI_HANDLE of the Addon Card Option ROM image to the PCI Bus Driver Private Data.
AdjustBarGra | This function will Check and Adjust PCI Device's BAR Granularity according information found in gBadPciDevList[].
AppendBarOrder | This function suppore to fill array of BAR ORDER with actual order of PCI_BARs behind the Bridge and remove added BAR structure from the BAR DATABASE.
ApplyCrdPadding | This function applys default Card Bus Bridge Padding.
AssignBridgeResources | Sorts, Aligns, and Programms Resources requested by devices residing behind its Parent PCI Bridge - "Brg".
AssignBusResources | Sorts, Aligns, and Programms Resources requested by devices on the PCI Bus created by the PCI Bridge - "Brg".
BarCheckType | This helper function will check if Base Address Register(BAR) selected for PciIo operation is of valid type and has been initialized;
BridgeAddChild | Adds Pointer at the child PCI Device to the "Bridge" T_ITEM_LIST Child List Structure of the BRG_EXT. some of it's Fields
CalculateBrgResources | The objective of this routine is to select the biggest possible Granularity/Alignment for the Bridge by adding all Child's resources of the same type together.
CheckPciCompatibility | This function will check if PCI "Device" listed in Bad PCI Device Table - gBadPciDevList[].
CheckPciDevicePath | Checks if "DevicePath" is a PCI_DEVICE_PATH.
CheckPciRomDevId | PCI Firmware Spec 3.0 defines some reserved field in PCIR Structure as Device List Pointer. This function checks additional Device IDs
CheckRootHotplug | This function will update pointer to PCI_RHPC_INFO of Bridge Type device which creates a hot plug bus. Also if "Device" creates the 'home bus' for Root HPC it will initialize Root HPC and record the HPC state;
ClearBar | Clears/zeros contents of PCI_BAR structure.
Cmp128Int | This function compares 2 128 bit integers.
Cmp128IntKR | This function compares 2 128 bit integers with respect to EFI Database Engine Key to Record comparation Routine. When search for record is conducted.
Cmp128IntRR | This function compares 2 128 bit integers with respect to EFI Database Engine Record to Record comparation Routine. When position of record gets determined.
CollectDeviceExtCap | This function will Fill out structure of PciE Ext Cap data
ComponentNameGetControllerName | This function is the one of interface functions of the OPTIONAL, EFI_COMPONENT_NAME_PROTOCOL. Suppose to retun Controller Name String. Currently returning EFI_UNSUPPORTED.
ComponentNameGetDriverName | This function is the one of interface functions of the OPTIONAL EFI_COMPONENT_NAME_PROTOCOL. Retuning Driver Name String of the PCI BUS Driver.
ConvertResources | Converts Resources Requested by the Devices behind the PCI Bridge of "ResType" using "ConvType" method of conversion
CpyItemLst | Creates a copy of T_ITEM_LST structure.
CreateRootResDsc | Creates an ACPI QWORD Resource Descriptors set to reflect this "RootBrg" resource request
DecompressOptRom | Decompresses Option ROM Image if it is Compressed.
DeviceAttributes | Protocol Function Sets or resets PCI Device Arttributs.
DisableBridgeDecoding | Disables PCI Bridge Decoding of ALL resources.
DisableBridgeIoDecoding | Disables PCI Bridge I/O Space Decoding.
DisableBridgeMmioDecoding | Disables PCI Bridge MMIO Space Decoding.
DisableBridgePfmmDecoding | Disables PCI Bridge Prefetchable MMIO Space Decoding.
DisableDeviceDecoding | Disables PCI Device Decoding.
DoPciNotify | This function will follow the rules of calling seqence of Platform Notify it will call: 1.Platform NotifyPhase with ChipsetEntery 2.Host Brg NotifyPhase 3.Platform NotifyPhase with ChipsetExit
DoPrepController | This function will follow the rules of calling seqence of Platform Preprocess Controller it will call: 1.Platform PreprocessController with ChipsetEntery 2.Host Brg Preprocess Controller 3.Platform PreprocessController with ChipsetExit
DoubleCheckOpRom | This function called when PciRomHdr->InitializationSize and Pcir->ImageSize has different values and Pcir->Indicator bit 7 is not set. It evaluets whch one is correct by Searching for 0x55AA signature that is must present in the beginning of next OptROM image.
EnableBridgeIoDecoding | Enables PCI Bridge I/O Space Decoding.
EnableBridgeMmioDecoding | Enables PCI Bridge MMIO Space Decoding.
EnableBridgePfmmDecoding | Enables PCI Bridge Prefetchable MMIO Space Decoding.
EnableDeviceDecoding | Enables PCI Device Decoding.
EnumerateAll | This is Main function to start PCI Bus Enumeration Process.
EnumerateBus | Enumerate the PCI BUSes behind the "ParentBrg" and determine how much resources nedded for all its Child devices.
ExecuteUefiRom | This function decide to launch or not UEFI compatible Option ROM
FindBarByType | Checks if PCI BAR register of a particular "BarType" present behind the PCI Bridge.
FindBridgeXlatEntry | Finds corresponded BusXlatTable entry for the bridge.
FindDevIrqEntry | Finds corresponded BusXlatTable entry for the bridge.
FindFirstBit | This function will find first bit Set or Reset going Left to Right.
FindPciDeviceByHandle | This function finds Pci Device by "Handle" passed
FindPciDeviceByHandleBrg | This function Searches PCI Bridge Subsystem Database to find device which have passed "Handle"
FindRbHandle | This function will finds Root Bridge Device Handle for the "Device".
FindRootXlatEntry | Finds corresponded BusXlatTable entry for the bridge.
FreeResDb | This function suppore to free memory allocated for index array pool of the EFI Database Engine DATABASE.
GetDeviceCapabilities | This function will detect PCI Device Capabilities of the Device's Command Cegister and Bridge Command register (if any).
GetHpbResPadding | This function will get and apply resource padding requirements for the PCI to PCI Bridge or Card Bus Bridge, if this Bridge is supports hot plug.
GetOptRom | Validate and copy PCI Option ROM Image From ADD ON CARD to the System Memory.
GetPciCapPtrs | This function will collect information about PCI "Device" Capability Headers (Including PCI Express, Hot Plug and PCI-X/X2) and record them.
InCurVgaChain | Helper function to check if device referenced as "Dev" sits within Current VGA device parents bridges.
InitDeviceData | Initializes missing fields in PCI_DEV_INFO structure.
InitDeviceVc | This function will Init VC_DATA structure of the "Device".
InitPciDb | Creates all anckor structures and Initialize PCI Database.
InitResDb | This function suppore to initialize EFI Database Engine DATABASE with PCI_BAR pointers in decending order.
InstallEfiOpRom | Loads and Starts Native EFI PCI Option ROM.
InstallPciDevice | This function performs the following operations 1. Register Device with CORE by getting a brand new handle 2. Install PciIo Protocol Interface on This Device 3. Generates EFI_DEVICE_PPATH protocol instance for "Dev"ice 4. Installs DevicePath Protocol on Created Handle 5. If Device has Option ROM copy it to the Memory Buffer 6. If 5 is TRUE and if Opt ROM has EFI compliant Image installs Bus Override protocol.
IsFunc0 | Checks if PCI_DEV_INFO is Function 0 of PCI device.
IsFunc0OfMfDev | Checks if PCI_DEV_INFO data passed belongs to Function 0 of Multy-Functional device.
IsHpb | This function will check if "Device" passed is the Bridge Type Device with hotplug support.
MakePciDevicePath | This function will take Parent DevPath and extand it with Current ""Dev", Device Path and update pointer of the "Dev->DevPath"
MapBridgeBuses | Maps Bridge's Primary Secondary Subordinate Bus Numbers according information stored in PCI_DEV_INFO and PCI_BRG_EXT structures of the PCI Bridge.
NewDevice | Allocats Space nedded for New PCI_Device Instance and inits some of it's Fields
OptimizeBrgResource | This function arrange Bridge resource request in a way it will consume a optimal amount of resources.
OptionRom | This function will detect PCI Option ROMs BAR requirements.
OvrGetDriver | PCI Bus Specific Override Protocol Get Override Driver function implementation of the PCI Bus Driver.
PciBusEntryPoint | This function is the entry point for PCI BUS Driver. Since PCI BUS Driver follows EFI 1.1 driver model in it's entry point it will initialize some global data and install EFI_DRIVER_BINDING_PROTOCOL.
PciBusStart | Start Function of the EFI_DRIVER_BINDING_PROTOCOL for PCI Bus Driver
PciBusStop | Stop Function of the EFI_DRIVER_BINDING_PROTOCOL for PCI Bus Driver.
PciBusSupported | Supported Function of the EFI_DRIVER_BINDING_PROTOCOL for PCI Bus Driver.
PciCfg16 | Will do PCI Configuration Space Access 16 bit width
PciCfg32 | Will do PCI Configuration Space Access 32 bit width
PciCfg64 | Will do PCI Configuration Space Access 64 bit width
PciCfg8 | Will do PCI Configuration Space Access 8 bit width
Pcie2CheckAri | This function will Enable ARI Forwarding in DownSream Port of the device passed if 1.Device referenced is an ARI device; 2.Parenting Bridge supports ARI Forwarding. 3.ARI Firvarding Setup Question Set to "Enabled"
Pcie2EnableAri | This function will Enable ARI Forwarding in DownSream Port of the device passed if 1.Device referenced is an ARI device; 2.Parenting Bridge supports ARI Forwarding. 3.ARI Firvarding Setup Question Set to "Enabled"
Pcie2GetGen2Info | This function will collect information about PCIE GEN2 Device and initialize PCIE2_DATA structure based on information collected.
Pcie2SelectComplTimeOut | This function will select appropriate Completion Timeout range from supported by the device.
Pcie2SetDevProperties | This function will Select values for DEVICE CCONTROL2 register based on Setup Settings and hardware capabilities.
Pcie2SetLnkProperties | This function will Select values for Link Control2 register on both sides of the LINK based on Setup Settings and hardware capabilities.
PcieApplyDevSettings | This function will Select values for DEVICE CONTROL register based on Setup Settings and hardware capabilities.
PcieCalcLatency | This function will calculate MAX Latency needed to exit from ome of the ASPM Sattes L0s or L1.
PcieCalcMaxPayLoad | This function will calculate MAX PayLoad Size needed to work correctly.
PcieConvertLatency | This function will convert Latency value from Values read from. PPCIe.LNK_CNT_REG to Nanoseconds and opposite.
PcieDisableLink | This function will Disable Link of DNSTREAM port referenced as "Device" based on Setup Settings and hardware STATUS. Used to disable "EMPTY" links to save some POWER or "Force" LINK to Disable state if Link can not be trained correctly.
PcieGetCaps | This function will Collect PCI Express Capabilities Data of the "Device".
PcieInitDevChain | This function will detect optimal settings and programm - MaxPayLoadSize, ReadRequestSize, ASPM settings and Virtual Channels for all devices in the PCIE Links Chain.
PcieInitLink | This function will Initialize Pcie Link on both sides starting fronm DownStream Port.
PcieInitVc | This function will Initialize "Device"'s Virtual Channel properties based on Setup Settings and hardware capabilities.
PcieIsDownStreamPort | This function will check if *PCI_DEV_INFO passed belongs to PCI Express DOWNSTREAM PORT: - RootPort of PCIe Root Complex; - DownStream Port of PCIe Switch; - PCI/PCI-X to PCIe Bridge.
PcieProbeDevice | This function will collect information about PCIE Device and initialize it based on information collected.
PcieProgramLink | This function will Program Link with provided VALUEs trained correctly.
PcieProgramPayloadUp | This function will reprogram Max Payload and Read Request Size in upstream link if initialization code founds that one of Nodes down stream has lesser Max Pay load size than currently programmed
PcieRecordBootScript | This function will create S3 Resume Boot Script for Device's Virtual Channels feature initialization if device supports Virtual Channels.
PcieRemoveEpFromLst | This function will removed Device referencesd as EndPoint from the gPcieEpLst data structure used as a database of available EndPoint devices.
PcieResetLink | This function will issue HOT RESET on a LINK referenced by "Device".
PcieRetrainLink | This function will initiate LINK training of the Down Stream Port referenced as "Device".
PcieSetAspm | This function will Select values for Link Control2 register on both sides of the LINK based on Setup Settings and hardware capabilities.
PcieSetDevProperties | This function will Select values for DEVICE CONTROL register based on Setup Settings and hardware capabilities.
PcieSetLnkProperties | This function will Select values for Link Control2 register on both sides of the LINK based on Setup Settiongs and hardware capabilities.
PcieSetSlotPower | This function will power ON or OFF PCI Express Slot
PcieSetSlotProperties | This function will Initialize SLT_CNT and SLT_STA registers of the "Device".
PcieUpdateClockPm | This function will update Device's referenced as "Func0" Clock Power Management based on Setup Settings and hardware capabilities.
PciExtApicIrqRout | Returns device's corresponded APIC IRQ routing entry from MPPCIIRQ.INC table created by the BUILD process. If function returns EFI_SUCCESS the "ApicIrqTblEntry" updated with corresponded PIC IRQ Table entry pointer. "ParentDevices" == NULL and "EntryCount"==0 Function will return EFI_NOT_FOUND if there a no entry for the Device HANDLE passed. But it will return update the array of EFI_PCI_CONFIGURATION_ADDRESS structures with PCI Addresses of parenti
PciExtClassCodes | Returns device's Class code; Sub Class code; Programing Interface and Revision Id information.
PciExtGetDevice | Locates PCI_DEV_INFO using passed PCI Device Handle or PciIo Protocol pointer.
PciExtIsCrdBrg | Checks if PciDeviceHandle, or PciIO passed belongs to PCI 2 Card Bridge device.
PciExtIsDevice | Checks if PciDeviceHandle, or PciIO passed belongs to Regular PCI device.
PciExtIsPciBrg | Checks if PciDeviceHandle, or PciIO passed belongs to PCI 2 PCI Bridge device.
PciExtIsPciExpresss | Checks if PciDeviceHandle, or PciIO passed belongs to PCI Express device.
PciExtIsPciX | Checks if PciDeviceHandle, or PciIO passed belongs to PCI Express device.
PciExtPicIrqRout | Returns device's corresponded PIC IRQ routing entry from OEMPIR.INC table created by the BUILD process. If function returns EFI_SUCCESS the "PicIrqTblEntry" updated with corresponded PIC IRQ Table entry pointer. "ParentDevices" == NULL and "EntryCount"==0 Function will return EFI_NOT_FOUND if there a no entry for the Device HANDLE passed. But it will return update the array of EFI_PCI_CONFIGURATION_ADDRESS structures with PCI Addresses of parenti
PciIoAllocateBuffer | Protocol Function Allocates a common buffer for DMA
PciIoAttributes | Protocol Function Provides Arttribute operation for the PCI device
PciIoCheckBar | This helper function will check if parameters passed to the PCI IO Protocol to read or write a PCI resources are correct.
PciIoCheckConfig | This helper function will check if parameters passed to the PCI IO Protocol to made a PCI Config Space Access are correct
PciIoConfigRead | Protocol Function Performs a PCI Configuration Read Cycle
PciIoConfigWrite | Protocol Function Performs a PCI Configuration Write Cycle
PciIoCopyMem | Protocol Function Copyes PCI Memory
PciIoFlush | Protocol Function Flushes a DMA buffer
PciIoFreeBuffer | Protocol Function Frees a common buffer
PciIoGetBarAttributes | Protocol Function Gets respective BAR Attributes
PciIoGetLocation | Protocol Function Proides Device Address on PCI BUS like Bus#, Dev#, Fun# for the device who has PciIoProtocol == "This".
PciIoIoRead | Protocol Function Performs a PCI I/O Read Cycle
PciIoIoWrite | Protocol Function Performs a PCI I/O Write Cycle
PciIoMap | Protocol Function Maps a memory region for DMA
PciIoMemRead | Protocol Function Performs a PCI Memory Read Cycle
PciIoMemWrite | Protocol Function Performs a PCI Memory Write Cycle
PciIoPollIo | Protocol Function Poll PCI IO
PciIoPollMem | Protocol Function Poll PCI Memmory
PciIoSetBarAttributes | Protocol Function Sets respective BAR Attributes
PciIoUnmap | Protocol Function Unmaps a memory region for DMA
PopulateBusDb | Fills gPciBusDb Array in ascending order.
ProbeSriovDevice | This function will collect information about SRIOV PCIE Device and initialize it based on information collected.
ProgramBar | Programm PCI BAR Register with the Resource Address provided by the "bar" parameter.
QueryPciDevice | This function will collect all possible data about PCI Device.
RecordPriVgaBootScript | This function will create S3 Resume Boot Script for Device's on the path of primary VGA Device inclusive.
RemoveUnusedIrqEntries | Removes IRQ routing entries which got there by porting mistake in order not to confuse other consumers of AmiBoardInfoProtocol...
ResetDevicePm | This function will turn off SMI generation on PCI PME and put device in to D0 state, if device has PM capability.
RestoreBridgeBuses | This function will Reprogram Primary Secondary and Subordinate bus numbers for the downsteram bridges after SEC BUS reset signal assertion.
SaveBars | This function will create S3 Resume Boot Script for Device's BAR Registers.
SaveDevice | This function will create S3 Resume Boot Script for Device's other than BAR Registers.
SetIdeDevMode | This function will Change IDE Device Mode LEGACY/NATIVE
SetSubBus | Programm SubordinateBusNumber Register of PCI Bridge.
StartPciChildDevice | Starts PCI Devices Behind the Bridge. (Called recoursively) This function performs the following operations 1. Register Device with CORE by getting a brand new handle 2. Install PciIo Protocol Interface on This Device 3. Generates EFI_DEVICE_PPATH protocol instance for "Dev"ice 4. Installs DevicePath Protocol on Created Handle 5. If Device has Option ROM copy it to the Memory Buffer 6. If 5 is TRUE and if Opt ROM has EFI compliant Image installs Bus Override protocol.
StartPciDevices | Installs PCI Io Protocol Instance on all or some PCI Devices in the System
StopPciDevice | Stops PCI Device referenced as "Dev". Called From StopPciDeviceBrg() function.
StopPciDeviceBrg | Stops - Uninstalls PCI Io Protocol Instance from PCI Devices behind the PCI Bridge referenced as "Brg"
UpdateItqTbl | Updtaes all matching entries in Irqrouting tables with runtime values.

The following data structures are used in the file: PciBus.c.

Variable | Description
gAllocationAttributes | Root Bridge Allocation Attributes
gBadPciDevCount | Number or records in gBadPciDevList table.
gBadPciDevList | Incompatible PCI Devices List known so far.
gComponentName | Declaration of the EFI_COMPONENT_NAME_PROTOCOL
gHostCnt | Initial Global Variable to store Host Bridge Count.
gLowResType | Indicates what type of resource has Out Of Resources Condition.
gPciBusDb | Bus order Data Base if fixed bus allocation selected we need to know how many buses does this bridge suppose to decode
gPciBusDriverBinding | Extended PCI Bus Protocol instance for PciBus Driver
gPciHost | Initial Global Variable to store pointer on PCI Subsystem Host (This is very ROOT of the PCI Bus Driver Data).
gPciIoInstance | PCI IO Protocol Instance for Child Devices of the PciBus Driver.
gPciOutOfRes | Indicates Out Of Resources Condition.
gPciSetupData | Global Setup Variable to get the setup settings pointer.
mMaxBusFound | Global counter of buses found.
mPicIrqSta | To make sure we are not updating entries we have updated already, we would need array of BBOLEANs to mark updated entries. NOTE: BOOLEAN Aarray [IrqRoiting Table enytries Number]


ActivateOptRom in the PciBus.c

Function : ActivateOptRom

File: PciBus.c
Description:
This function parses Option ROM Image to decide which
Image to give control to and updates PciIO->OptioRom and
PciIO->OptioRomSize with Correct values.
Input:
PCI_DEV_INFO    *Dev    Pointer PCI Devicse Private Data.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_NOT_FOUND           When Device does not have any ROMs.
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AddBusDbEntry in the PciBus.c

Function : AddBusDbEntry

File: PciBus.c
Description:
Fills gPciBusDb Array in ascending  order.
Input:
PCI_BRG_EXT     *Ext        Pointer to PCI Bridge Extension Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.
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AddOvrHandle in the PciBus.c

Function : AddOvrHandle

File: PciBus.c
Description:
Adds EFI_HANDLE of the Addon Card Option ROM image to the
PCI Bus Driver Private Data.
Input:
PCI_BUS_OVERRIDE_DATA   *OvrData    Pointer to the PCI Devicse's Bus
                       Override data inside PCI_DEV_INFO
EFI_HANDLE              OvrHandle   Handle to add.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.
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AdjustBarGra in the PciBus.c

Function : AdjustBarGra

File: PciBus.c
Description:
This function will Check and Adjust PCI Device's BAR
Granularity according information found in gBadPciDevList[].
Input:
PCI_BAR     Bar         Type of Bar Register.
Output:
NOTHING

Referals: PCI_BAR; PCI_BAR_TYPE; gBadPciDevList.
Notes:
This function will be invoked only if PCI Device owning this BAR is in
gBadPciDevList.
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AppendBarOrder in the PciBus.c

Function : AppendBarOrder

File: PciBus.c
Description:
This function suppore to fill array of BAR ORDER with actual
order of PCI_BARs behind the Bridge and remove added BAR structure from
the BAR DATABASE.
Input:
DBE_DATABASE*   Db      Pointer to the EFI Database Engine DATABASE.
BRG_RES_ORDER*  BrgResOrder Pointer to the Bridge Resource order structure.
PCI_BAR         Bar     Pointer to the BAR structure to be added.
Output:
EFI_STATUS
EFI_SUCCESS if everything OK;
an EFI_ERROR if an ERROR
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ApplyCrdPadding in the PciBus.c

Function : ApplyCrdPadding

File: PciBus.c
Description:
This function applys default Card Bus Bridge Padding.
Input:
PCI_DEV_INFO    *Device Pointer to PCI Device Private Data structure.
MRES_TYPE       ResType Type of resource padding is applied.
Output:
Nothing
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AssignBridgeResources in the PciBus.c

Function : AssignBridgeResources

File: PciBus.c
Description:
Sorts, Aligns, and Programms Resources requested by devices
residing behind its Parent PCI Bridge - "Brg".
Input:
PCI_BRG_INFO    *Brg    Pointer to PCI Device Private Data structure
           of the Parent Bridge.
MRES_TYPE		rt		Type of PCI Bus resources to work with.
           See definition of MRES_TYPE for detail.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
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AssignBusResources in the PciBus.c

Function : AssignBusResources

File: PciBus.c
Description:
Sorts, Aligns, and Programms Resources requested by devices
on the PCI Bus created by the PCI Bridge - "Brg".
Input:
PCI_BRG_INFO    *Brg    Pointer to PCI Device Private Data structure
           of the Bridge who creates the bus.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
Notes:
Assigns Resources by filling Device Bar structure
and programm all Bridge Childs Bars
and Enables Bridge devices to decode their resources
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BarCheckType in the PciBus.c

Function : BarCheckType

File: PciBus.c
Description:
This helper function will check if Base Address Register(BAR) selected
for PciIo operation is of valid type and has been initialized;
Input:
PCI_DEV_INFO    *Dev        Pointer to PciDevice Info structure.
UINT8           BarIndex    Index of the BAR within PCI device
PCI_BAR_TYPE    BarType     Indicating what to check - IO or Memory.
Output:
BOOLEAN
TRUE    BAR supports selected transaction.
FALSE   BAR does not support selected transaction.

Referals: PCI_DEV_INFO; PCI_BAR_TYPE
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BridgeAddChild in the PciBus.c

Function : BridgeAddChild

File: PciBus.c
Description:
Adds Pointer at the child PCI Device to the "Bridge"
T_ITEM_LIST Child List Structure of the BRG_EXT.
some of it's Fields
Input:
PCI_DEV_INFO    *Brgidge    Pointer to PCI Device Private Data structure
               of the Parent Bridge.
PCI_DEV_INFO    *Child      Pointer to PCI Device Private Data structure.
               of the Child Device.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
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CalculateBrgResources in the PciBus.c

Function : CalculateBrgResources

File: PciBus.c
Description:
The objective of this routine is to select the biggest
possible Granularity/Alignment for the Bridge by adding all Child's
resources of the same type together.
Input:
PCI_DEV_INFO    *Brg    Pointer to PCI Device Private Data structure.
Output:
Nothing
Built on 17:53:33 12/16/11


CheckPciCompatibility in the PciBus.c

Function : CheckPciCompatibility

File: PciBus.c
Description:
This function will check if PCI "Device" listed in Bad PCI
Device Table - gBadPciDevList[].
Input:
PCI_DEV_INFO    *Device     Pointer to PCI Device Private Data structure.
PCI_BAR_TYPE    BarType     Type of Bar Register.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO; PCI_BAR_TYPE.
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CheckPciDevicePath in the PciBus.c

Function : CheckPciDevicePath

File: PciBus.c
Description:
Checks if "DevicePath" is a PCI_DEVICE_PATH.
Input:
EFI_DEVICE_PATH_PROTOCOL *DevicePath  Device Path Pointer.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_UNSUPPORTED         When "DevicePath" is not a PCI_DEVICE_PATH.
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CheckPciRomDevId in the PciBus.c

Function : CheckPciRomDevId

File: PciBus.c
Description:
PCI Firmware Spec 3.0 defines some reserved field in PCIR
Structure as Device List Pointer. This function checks additional Device IDs
Input:
PCI_DEV_INFO           *Dev             Pointer PCI Devicse Private Data.
PCI_DATA_STRUCTURE     *PciRomStruct    Pointer at PCIR ROM Header
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_UNSUPPORTED         When ROM is not compatible with device.
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CheckRootHotplug in the PciBus.c

Function : CheckRootHotplug

File: PciBus.c
Description:
This function will update pointer to PCI_RHPC_INFO of
Bridge Type device which creates a hot plug bus. Also if "Device"
creates the 'home bus' for Root HPC it will initialize Root HPC and
record the HPC state;
Input:
PCI_DEV_INFO    *Device     Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           When Device not present in the system.
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
Built on 17:53:33 12/16/11


ClearBar in the PciBus.c

Function : ClearBar

File: PciBus.c
Description:
Clears/zeros contents of PCI_BAR structure.
Input:
PCI_BAR         *Bar    Pointer to PCI_BAR structure to clear.
Output:
Nothing
Built on 17:53:33 12/16/11


Cmp128Int in the PciBus.c

Function : Cmp128Int

File: PciBus.c
Description:
This function compares 2 128 bit integers.
Input:
VOID* pDestination  *Pointer to the 128bit Integer to compare.
VOID* pSource       *Pointer to the 128bit Integer to compare.
Output:
INTN
== 0 Destination and are Source equal;
>  0 Destination is bigger than Source;
<  0 Destination is lesser than Source;
Built on 17:53:33 12/16/11


Cmp128IntKR in the PciBus.c

Function : Cmp128IntKR

File: PciBus.c
Description:
This function compares 2 128 bit integers with respect to EFI
Database Engine Key to Record comparation Routine.
When search for record is conducted.
Input:
VOID* pContext      Pointer to the DBE_OFFSET_KEY_CONTEXT structure
VOID* pRecord1      Pointer to the 128bit Integer to compare.
VOID* pRecord2      Pointer to the 128bit Integer to compare.
Output:
INTN
== 0 pRecord1 and are pRecord2 equal;
>  0 pRecord1 is bigger than pRecord2;
<  0 pRecord2 is lesser than pRecord2;
Built on 17:53:33 12/16/11


Cmp128IntRR in the PciBus.c

Function : Cmp128IntRR

File: PciBus.c
Description:
This function compares 2 128 bit integers with respect to EFI
Database Engine Record to Record comparation Routine.
When position of record gets determined.
Input:
VOID* pContext      Pointer to the DBE_OFFSET_KEY_CONTEXT structure
VOID* pRecord1      Pointer to the 128bit Integer to compare.
VOID* pRecord2      Pointer to the 128bit Integer to compare.
Output:
INTN
== 0 pRecord1 and are pRecord2 equal;
>  0 pRecord1 is bigger than pRecord2;
<  0 pRecord2 is lesser than pRecord2;
Built on 17:53:33 12/16/11


CollectDeviceExtCap in the PciBus.c

Function : CollectDeviceExtCap

File: PciBus.c
Description:
This function will Fill out structure of PciE Ext Cap data
Input:
PCI_DEV_INFO    *Device     Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
Built on 17:53:33 12/16/11


ComponentNameGetControllerName in the PciBus.c

Function : ComponentNameGetControllerName

File: PciBus.c
Description:
This function is the one of interface functions of the
OPTIONAL, EFI_COMPONENT_NAME_PROTOCOL. Suppose to retun Controller
Name String. Currently returning EFI_UNSUPPORTED.
Input:
EFI_COMPONENT_NAME_PROTOCOL
*This               Pointer to EFI_COMPONENT_NAME_PROTOCOL.
EFI_HANDLE  ControllerHandle    EFI_HANDLE of the device which to return.
EFI_HANDLE  ChildHandle         OPTIONAL, an EFI_HANDLE of child device.
CHAR8       *Language           Pointer to 3 char Language name.
CHAR16      **ControllerName    Pointer to the data buffer for Name Sring.
Output:
EFI_STATUS
EFI_SUCCESS         When everything is going on fine!
EFI_UNSUPPORTED     When feature not supported by the Driver.

Reference: EFI_COMPONENT_NAME2_PROTOCOL
Built on 17:53:33 12/16/11


ComponentNameGetDriverName in the PciBus.c

Function : ComponentNameGetDriverName

File: PciBus.c
Description:
This function is the one of interface functions of the OPTIONAL
EFI_COMPONENT_NAME_PROTOCOL.	Retuning Driver Name String of the PCI BUS Driver.
Input:
EFI_COMPONENT_NAME_PROTOCOL
*This               Pointer to EFI_COMPONENT_NAME_PROTOCOL.
CHAR8       *Language           Pointer to 3 char Language name.
CHAR16      **ControllerName    Pointer to the data buffer for Name Sring.
Output:
EFI_STATUS
EFI_SUCCESS         When everything is going on fine!
EFI_UNSUPPORTED     When feature not supported by the Driver.

Reference:	EFI_COMPONENT_NAME_PROTOCOL
Built on 17:53:33 12/16/11


ConvertResources in the PciBus.c

Function : ConvertResources

File: PciBus.c
Description:
Converts Resources Requested by the Devices behind the
PCI Bridge of "ResType" using "ConvType" method of conversion
Input:
PCI_BRG_INFO    *Brg    Pointer to PCI Device Private Data structure
           of the Parent Bridge.
PCI_BAR_TYPE	ResType	Resource Type to convert. Accepted values are
           tBarIo, tBarMem, tBarMemPf,
           all other values are invalid.
RES_CONV_TYPE  ConvType Type of Conversion to be performed.
Output:
Nothing
Built on 17:53:33 12/16/11


CpyItemLst in the PciBus.c

Function : CpyItemLst

File: PciBus.c
Description:
Creates a copy of T_ITEM_LST structure.
Input:
T_ITEM_LIST *Lst        Pointer to the structure to copy.
T_ITEM_LIST **NewLstPtr Double Pointer to the copied data (Memory allocation is done by this function).
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
Built on 17:53:33 12/16/11


CreateRootResDsc in the PciBus.c

Function : CreateRootResDsc

File: PciBus.c
Description:
Creates an ACPI QWORD Resource Descriptors set to reflect
this "RootBrg" resource request
Input:
PCI_BRG_INFO   *RootBrg Pointer to PCI Device Private Data structure
           of the Bridge who creates the bus.
IN OUT VOID*   *ResDsc  ACPI QWORD Resource Descriptors set.
           See definition of ASLR_QWORD_ASD for details.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
Notes:
Meaning of QWORD Resource Descriptor Fields for this function
_LEN => Set to the size of the aperture that is requested.
_GRA => Used to differentiate between a 32-bit memory request and a
64-bit memory request. For a 32-bit memory request,
this field should be set to 32. For a 64-bit memory request,
this field should be set to 64. All other values result in
this function returning the error code of EFI_INVALID_PARAMETER.
_MAX => Used to specify the alignment requirement.
All other fields are ignored.
Built on 17:53:33 12/16/11


DecompressOptRom in the PciBus.c

Function : DecompressOptRom

File: PciBus.c
Description:
Decompresses Option ROM Image if it is Compressed.
Input:
VOID        *Image          Pointer at the compressed Option ROM Image.
UINT32      ImageLength     Length of the Compressed Image.
OUT VOID    **DecompImage   Place holder to return pointer to the
               Decopressed Image.
OUT UINT32  ImageLength     Length of the Decompressed Image.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.
Built on 17:53:33 12/16/11


DeviceAttributes in the PciBus.c

Function : DeviceAttributes

File: PciBus.c
Description:
Protocol Function Sets or resets PCI Device Arttributs.
Input:
PCI_DEV_INFO    *Dev        Pointer to PciDevice Info structure.
UINT64          Attributes  Attributes bitmask which caller whants to change.
BOOLEAN         Set         Specifies weathere to set or reset given "Attributes".
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_UNSUPPORTED         When some of the "Attributes" not supported by the "Dev".


DisableBridgeDecoding in the PciBus.c

Function : DisableBridgeDecoding

File: PciBus.c
Description:
Disables PCI Bridge Decoding of ALL resources.
Input:
PCI_BRG_INFO    *Brg        Pointer to PCI Bridge Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_BRG_INFO.


DisableBridgeIoDecoding in the PciBus.c

Function : DisableBridgeIoDecoding

File: PciBus.c
Description:
Disables PCI Bridge I/O Space Decoding.
Input:
PCI_BRG_INFO    *Brg        Pointer to PCI Bridge Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_BRG_INFO.


DisableBridgeMmioDecoding in the PciBus.c

Function : DisableBridgeMmioDecoding

File: PciBus.c
Description:
Disables PCI Bridge MMIO Space Decoding.
Input:
PCI_BRG_INFO    *Brg        Pointer to PCI Bridge Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_BRG_INFO.


DisableBridgePfmmDecoding in the PciBus.c

Function : DisableBridgePfmmDecoding

File: PciBus.c
Description:
Disables PCI Bridge Prefetchable MMIO Space Decoding.
Input:
PCI_BRG_INFO    *Brg        Pointer to PCI Bridge Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_BRG_INFO.


DisableDeviceDecoding in the PciBus.c

Function : DisableDeviceDecoding

File: PciBus.c
Description:
Disables PCI Device Decoding.
Input:
PCI_DEV_INFO    *Dev        Pointer to PCI Device Private Data structure.
PCI_SPACE_TYPE  WhatSpace   Type of PCI Device Space for Action.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO; PCI_SPACE_TYPE.


DoPciNotify in the PciBus.c

Function : DoPciNotify

File: PciBus.c
Description:
This function will follow the rules of calling seqence of
Platform Notify it will call:
1.Platform NotifyPhase with ChipsetEntery
2.Host Brg NotifyPhase
3.Platform NotifyPhase with ChipsetExit
Input:
PCI_DEV_INFO    *Device Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           When Device not present in the system.
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


DoPrepController in the PciBus.c

Function : DoPrepController

File: PciBus.c
Description:
This function will follow the rules of calling seqence of
Platform Preprocess Controller it will call:
1.Platform PreprocessController with ChipsetEntery
2.Host Brg Preprocess Controller
3.Platform PreprocessController with ChipsetExit
Input:
PCI_DEV_INFO    *Device Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           When Device not present in the system.
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


DoubleCheckOpRom in the PciBus.c

Function : DoubleCheckOpRom

File: PciBus.c
Description:
This function called when PciRomHdr->InitializationSize and
Pcir->ImageSize has different values and Pcir->Indicator bit 7 is not set.
It evaluets whch one is correct by Searching for 0x55AA signature that is
must present in the beginning of next OptROM image.
Input:
LEGACY_OPT_ROM_HEADER   *PciRomHdr  Pointer to Legacy Option ROM Header(0x55AA).
PCI_DATA_STRUCTURE      *Pcir       Pointer to PCI ROM header ("PCIR")
Output:
EFI_STATUS
UINTN   Size of the ROM in bytes;
Note: PCIR and OptROM signatures assumed to be valid.


EnableBridgeIoDecoding in the PciBus.c

Function : EnableBridgeIoDecoding

File: PciBus.c
Description:
Enables PCI Bridge I/O Space Decoding.
Input:
PCI_DEV_INFO    *Brg        Pointer to PCI Bridge Private Data structure.
UINT64          Base        Base Address of the Bridge I/O Window.
UINT64          Length      Length of the Bridge I/O Window.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO.


EnableBridgeMmioDecoding in the PciBus.c

Function : EnableBridgeMmioDecoding

File: PciBus.c
Description:
Enables PCI Bridge MMIO Space Decoding.
Input:
PCI_DEV_INFO    *Brg        Pointer to PCI Bridge Private Data structure.
UINT64          Base        Base Address of the Bridge I/O Window.
UINT64          Length      Length of the Bridge I/O Window.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO.


EnableBridgePfmmDecoding in the PciBus.c

Function : EnableBridgePfmmDecoding

File: PciBus.c
Description:
Enables PCI Bridge Prefetchable MMIO Space Decoding.
Input:
PCI_DEV_INFO    *Brg        Pointer to PCI Bridge Private Data structure.
UINT64          Base        Base Address of the Bridge I/O Window.
UINT64          Length      Length of the Bridge I/O Window.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO.


EnableDeviceDecoding in the PciBus.c

Function : EnableDeviceDecoding

File: PciBus.c
Description:
Enables PCI Device Decoding.
Input:
PCI_DEV_INFO    *Dev        Pointer to PCI Device Private Data structure.
PCI_SPACE_TYPE  WhatSpace   Type of PCI Device Space for Action.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO; PCI_SPACE_TYPE.


EnumerateAll in the PciBus.c

Function : EnumerateAll

File: PciBus.c
Description:
This is Main function to start PCI Bus Enumeration Process.
Input:
EFI_HANDLE  Controller  Controller Handle passed to the PCI Bus Driver
           Start Function.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


EnumerateBus in the PciBus.c

Function : EnumerateBus

File: PciBus.c
Description:
Enumerate the PCI BUSes behind the "ParentBrg" and determine
how much resources nedded for all its Child devices.
Input:
PCI_DEV_INFO    *ParentBrg  Pointer to PCI Device Private Data structure
               of the Parent Bridge.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


ExecuteUefiRom in the PciBus.c

Function : ExecuteUefiRom

File: PciBus.c
Description:
This function decide to launch or not UEFI compatible
Option ROM
Input:
UINT8       PciClass    PCI Class Code Of the Device.
Output:
BOOLEAN
TRUE             		Launch UEFI Option ROM
FALSE                   NOT Launch UEFI Option ROM


FindBarByType in the PciBus.c

Function : FindBarByType

File: PciBus.c
Description:
Checks if PCI BAR register of a particular "BarType" present
behind the PCI Bridge.
Input:
PCI_BRG_INFO    *Brg    Pointer to PCI Device Private Data structure
           of the Parent Bridge.
PCI_BAR_TYPE	BarType	Bar Type to search for.
Output:
BOOLEAN
TRUE    if BAR of "BarType" present Behind the "Brg".
FALSE   if otherwice.


FindBridgeXlatEntry in the PciBus.c

Function : FindBridgeXlatEntry

File: PciBus.c
Description:
Finds corresponded BusXlatTable entry for the bridge.
Input:
PCI_DEV_INFO    *Dev        Pointer to PCI Bridge Private Data structure.
PCI_BRG_EXT     *Ext        Pointer to PCI Bridge Extension Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO; PCI_BRG_INFO; PCI_BRG_EXT.
Notes:
BaseBus         =   PCI_DEV_INFO->Address.Addr.Bus;
SecondaryBus    =   PCI_BRG_EXT->Res[rtBus].Base;
SubordinateBus  =   PCI_BRG_EXT->Res[rtBus].Base + PCI_BRG_EXT->Res[rtBus].Length-1;


FindDevIrqEntry in the PciBus.c

Function : FindDevIrqEntry

File: PciBus.c
Description:
Finds corresponded BusXlatTable entry for the bridge.
Input:
PCI_DEV_INFO    *Dev        Pointer to PCI Bridge Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO; PCI_BRG_INFO; PCI_BRG_EXT.


FindFirstBit in the PciBus.c

Function : FindFirstBit

File: PciBus.c
Description:
This function will find first bit Set or Reset
going Left to Right.
Input:
UINT64  Value           Value to scan.
BOOLEAN Set             What condition to test
Output:
UINT8                   First bit set/reset


FindPciDeviceByHandle in the PciBus.c

Function : FindPciDeviceByHandle

File: PciBus.c
Description:
This function finds Pci Device by "Handle" passed
Input:
EFI_HANDLE  Handle  PCI Device Handle.
Output:
PCI_DEV_INFO
!=NULL      When everything is going on fine!
==NULL      Not Found.


FindPciDeviceByHandleBrg in the PciBus.c

Function : FindPciDeviceByHandleBrg

File: PciBus.c
Description:
This function Searches PCI Bridge Subsystem Database to find
device which have passed "Handle"
Input:
PCI_BRG_INFO    *Brg    Pointer to PCI Bridge Device Private Data structure.
EFI_HANDLE      Handle  Device Handle to search for.
Output:
PCI_DEV_INFO
!=NULL          When everything is going on fine!
==NULL          Not Found.
Notes:
This is a subordinate function of FindPciDeviceByHandle()


FindRbHandle in the PciBus.c

Function : FindRbHandle

File: PciBus.c
Description:
This function will finds Root Bridge Device Handle for
the "Device".
Input:
PCI_DEV_INFO    *Device Pointer to PCI Device Private Data structure.
Output:
EFI_HANDLE
!=NULL          When everything is going on fine!


FindRootXlatEntry in the PciBus.c

Function : FindRootXlatEntry

File: PciBus.c
Description:
Finds corresponded BusXlatTable entry for the bridge.
Input:
PCI_DEV_INFO        *Dev        Pointer to PCI Bridge Private Data structure.
PCI_BUS_XLAT_HDR    *XlatHdr    Double Pointer to XLAT_HEADER will be initialized by this function
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO; PCI_BRG_INFO; PCI_BRG_EXT.


FreeResDb in the PciBus.c

Function : FreeResDb

File: PciBus.c
Description:
This function suppore to free memory allocated for index array
pool of the EFI Database Engine DATABASE.
Input:
DBE_DATABASE*   Db    Pointer to the EFI Database Engine DATABASE.
Output:
EFI_STATUS
EFI_SUCCESS if everything OK;
an EFI_ERROR if an ERROR


gAllocationAttributes in the PciBus.c

Variable : gAllocationAttributes

File: PciBus.c
Description:
Root Bridge Allocation Attributes
Notes:
UINT64


gBadPciDevCount in the PciBus.c

Variable : gBadPciDevCount

File: PciBus.c
Description:
Number or records in gBadPciDevList table.
Notes:
UINTN


gBadPciDevList in the PciBus.c

Variable : gBadPciDevList

File: PciBus.c
Description:
Incompatible PCI Devices List known so far.
Notes:
See PCI_BAD_BAR for field names and usage details.
If BarType field == tBarMaxType then BarOffset field should be used.
For "BarType" field only tBarIo, tBarMem and tBarMaxType allowed!


gComponentName in the PciBus.c

Variable : gComponentName

File: PciBus.c
Fields:

Name | Type | Description
ComponentNameGetDriverName | F_PTR | DriverName function pointer.
ComponentNameGetControllerName | F_PTR | ControllerName function pointer.
eng | CHAR8 | Language list Buffer.

Description:
Declaration of the EFI_COMPONENT_NAME_PROTOCOL


GetDeviceCapabilities in the PciBus.c

Function : GetDeviceCapabilities

File: PciBus.c
Description:
This function will detect PCI Device Capabilities of the Device's
Command Cegister and Bridge Command register (if any).
Input:
PCI_DEV_INFO    *Device     Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO.


GetHpbResPadding in the PciBus.c

Function : GetHpbResPadding

File: PciBus.c
Description:
This function will get and apply resource padding
requirements for the PCI to PCI Bridge or Card Bus Bridge, if this
Bridge is supports hot plug.
Input:
PCI_DEV_INFO    *Device     Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           When Device not present in the system.
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


GetOptRom in the PciBus.c

Function : GetOptRom

File: PciBus.c
Description:
Validate and copy PCI Option ROM Image From ADD ON CARD to
the System Memory.
Input:
PCI_DEV_INFO    *Dev   Pointer PCI Devicse Private Data.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.


GetPciCapPtrs in the PciBus.c

Function : GetPciCapPtrs

File: PciBus.c
Description:
This function will collect information about PCI "Device"
Capability Headers (Including PCI Express, Hot Plug and PCI-X/X2) and
record them.
Input:
PCI_DEV_INFO    *Device     Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           When Device not present in the system.
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters - invalid.


gHostCnt in the PciBus.c

Variable : gHostCnt

File: PciBus.c
Description:
Initial Global Variable to store Host Bridge Count.
Notes:
UINTN


gLowResType in the PciBus.c

Variable : gLowResType

File: PciBus.c
Description:
Indicates what type of resource has Out Of Resources Condition.
Notes:
MRES_TYPE


gPciBusDb in the PciBus.c

Variable : gPciBusDb

File: PciBus.c
Description:
Bus order Data Base if fixed bus allocation selected we need
to know how many buses does this bridge suppose to decode
Notes:
T_ITEM_LIST


gPciBusDriverBinding in the PciBus.c

Variable : gPciBusDriverBinding

File: PciBus.c
Description:
Extended PCI Bus Protocol instance for PciBus Driver
Notes:
AMI_PCI_EXT_PROTOCOL


gPciHost in the PciBus.c

Variable : gPciHost

File: PciBus.c
Description:
Initial Global Variable to store pointer on PCI Subsystem
Host (This is very ROOT of the PCI Bus Driver Data).
Notes:
PCI_HOST_INFO


gPciIoInstance in the PciBus.c

Variable : gPciIoInstance

File: PciBus.c
Description:
PCI IO Protocol Instance for Child Devices of the PciBus Driver.
Notes:
EFI_PCI_IO_PROTOCOL


gPciOutOfRes in the PciBus.c

Variable : gPciOutOfRes

File: PciBus.c
Description:
Indicates Out Of Resources Condition.
Notes:
BOOLEAN


gPciSetupData in the PciBus.c

Variable : gPciSetupData

File: PciBus.c
Description:
Global Setup Variable to get the setup settings pointer.
Notes:
PCI_SETUP_DATA


InCurVgaChain in the PciBus.c

Function : InCurVgaChain

File: PciBus.c
Description:
Helper function to check if device referenced as "Dev" sits
within Current VGA device parents bridges.
Input:
PCI_DEV_INFO    *Dev        Pointer to PciDevice Info structure.
Output:
BOOLEAN
TRUE    "Dev" in Current VGA device parents bridges.
FALSE   "Dev" is not in Current VGA device parents bridges.


InitDeviceData in the PciBus.c

Function : InitDeviceData

File: PciBus.c
Description:
Initializes missing fields in PCI_DEV_INFO structure.
Input:
PCI_DEV_INFO    *Dev    Pointer to PCI Device Private Data structure
           to initialize.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


InitDeviceVc in the PciBus.c

Function : InitDeviceVc

File: PciBus.c
Description:
This function will Init VC_DATA structure of the "Device".
Input:
PCI_DEV_INFO    *Device     Pointer to PCI Device Private Data.
PCI_CFG_ADDR    *DevAddr    Pointer to Device Address value.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


InitPciDb in the PciBus.c

Function : InitPciDb

File: PciBus.c
Description:
Creates all anckor structures and Initialize PCI Database.
Input:
EFI_HANDLE  Controller  Controller Handle passed to the PCI Bus Driver
           Start Function.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


InitResDb in the PciBus.c

Function : InitResDb

File: PciBus.c
Description:
This function suppore to initialize EFI Database Engine DATABASE
with PCI_BAR pointers in decending order.
Input:
DBE_DATABASE*   Db      Pointer to the EFI Database Engine DATABASE.
PCI_DEV_INFO*   Brg,    Bridge whose BARs must be stuffed in DATABASE.
MRES_TYPE       ResType Resource type of the BARs.
BOOLEAN         Dev     We are filling DATABASE with Bridges or Devices.
Output:
EFI_STATUS
EFI_SUCCESS if everything OK;
an EFI_ERROR if an ERROR


InstallEfiOpRom in the PciBus.c

Function : InstallEfiOpRom

File: PciBus.c
Description:
Loads and Starts Native EFI PCI Option ROM.
Input:
PCI_DEV_INFO            *Dev        Pointer PCI Devicse Private Data.
PCI_EFI_OPT_ROM_HEADER  *RomHeader  Pointer at PCI Option ROM Header
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.


InstallPciDevice in the PciBus.c

Function : InstallPciDevice

File: PciBus.c
Description:
This function performs the following operations
1. Register Device with CORE by getting a brand new handle
2. Install PciIo Protocol Interface on This Device
3. Generates EFI_DEVICE_PPATH protocol instance for "Dev"ice
4. Installs DevicePath Protocol on Created Handle
5. If Device has Option ROM copy it to the Memory Buffer
6. If 5 is TRUE and if Opt ROM has EFI compliant Image
installs Bus Override protocol.
Input:
EFI_HANDLE      ControllerHandle  Device's Controller Handle.
PCI_DEV_INFO    *Dev    Pointer PCI Devicse Private Data.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.


IsFunc0 in the PciBus.c

Function : IsFunc0

File: PciBus.c
Description:
Checks if PCI_DEV_INFO is Function 0 of PCI device.
Input:
PCI_DEV_INFO    *Device     Pointer to PCI Device Private Data structure.
Output:
BOOLEAN
TRUE    Device is Function 0 of Mulifunctional device.
FALSE   Device is not Function 0 of Mulifunctional device.


IsFunc0OfMfDev in the PciBus.c

Function : IsFunc0OfMfDev

File: PciBus.c
Description:
Checks if PCI_DEV_INFO data passed belongs to Function 0 of
Multy-Functional device.
Input:
PCI_DEV_INFO    *Device     Pointer to PCI Device Private Data structure.
Output:
BOOLEAN
TRUE    Device is Function 0 of Mulifunctional device.
FALSE   Device is not Function 0 of Mulifunctional device.


IsHpb in the PciBus.c

Function : IsHpb

File: PciBus.c
Description:
This function will check if "Device" passed is the Bridge
Type Device with hotplug support.
Input:
PCI_DEV_INFO    *Device     Pointer to PCI Device Private Data structure.
Output:
BOOLEAN
TRUE    If "Device" is a Bridge with HPC on it.
FALSE   Otherwice.


MakePciDevicePath in the PciBus.c

Function : MakePciDevicePath

File: PciBus.c
Description:
This function will take Parent DevPath and extand it with
Current ""Dev", Device Path and update pointer of the "Dev->DevPath"
Input:
PCI_DEV_INFO    *Dev    Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           When Device not present in the system.
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


MapBridgeBuses in the PciBus.c

Function : MapBridgeBuses

File: PciBus.c
Description:
Maps Bridge's Primary Secondary Subordinate Bus Numbers
according information stored in PCI_DEV_INFO and PCI_BRG_EXT structures
of the PCI Bridge.
Input:
PCI_DEV_INFO    *Brg        Pointer to PCI Bridge Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO; PCI_BRG_INFO; PCI_BRG_EXT.
Notes:
BaseBus         =   PCI_DEV_INFO->Address.Addr.Bus;
SecondaryBus    =   PCI_BRG_EXT->Res[rtBus].Base;
SubordinateBus  =   PCI_BRG_EXT->Res[rtBus].Base + PCI_BRG_EXT->Res[rtBus].Length-1;


mMaxBusFound in the PciBus.c

Variable : mMaxBusFound

File: PciBus.c
Description:
Global counter of buses found.
Notes:
UINT8


mPicIrqSta in the PciBus.c

Variable : mPicIrqSta

File: PciBus.c
Description:
To make sure we are not updating entries we have updated
already, we would need array of BBOLEANs to mark updated entries.

NOTE: BOOLEAN Aarray [IrqRoiting Table enytries Number]


NewDevice in the PciBus.c

Function : NewDevice

File: PciBus.c
Description:
Allocats Space nedded for New PCI_Device Instance and inits
some of it's Fields
Input:
BOOLEAN         BrgDevice   Indicator that New Device is a BRIDGE Device.
PCI_CFG_ADDR    *DevArrd	Device Address on PCI Bus.
Output:
PCI_DEV_INFO*
Pointer to the Created PCI Device Private Data structure.
NULL, if there was an ERROR.


OptimizeBrgResource in the PciBus.c

Function : OptimizeBrgResource

File: PciBus.c
Description:
This function arrange Bridge resource request in a way it will
consume a optimal amount of resources.
Input:
PCI_DEV_INFO*   Brg,    Bridge whose BARs must be stuffed in DATABASE.
MRES_TYPE       ResType Resource type we are doing optimization for.
Output:
EFI_STATUS
EFI_SUCCESS if everything OK;
an EFI_ERROR if an ERROR


OptionRom in the PciBus.c

Function : OptionRom

File: PciBus.c
Description:
This function will detect PCI Option ROMs BAR requirements.
Input:
PCI_DEV_INFO    *Device     Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO.


OvrGetDriver in the PciBus.c

Function : OvrGetDriver

File: PciBus.c
Description:
PCI Bus Specific Override Protocol Get Override Driver
function implementation of the PCI Bus Driver.
Input:
EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL **This    Pointer PCI Devicse's
                                       Bus Specific Override
                                       Protocol Interface.
EFI_HANDLE IN OUT       *DriverImageHandle  Image Handle of the Option
                               ROM EFI Driver.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND		    When there are no more handles to override.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.


PciBusEntryPoint in the PciBus.c

Function : PciBusEntryPoint

File: PciBus.c
Description:
This function is the entry point for PCI BUS Driver.
Since PCI BUS Driver follows EFI 1.1 driver model in it's entry point
it will initialize some global data and install
EFI_DRIVER_BINDING_PROTOCOL.
Input:
EFI_HANDLE          ImageHandle     Image handle.
EFI_SYSTEM_TABLE    *SystemTable    Pointer to the EFI system table.
Output:
EFI_STATUS
EFI_SUCCESS         When everything is going on fine!
EFI_NOT_FOUND       When something required is not found!
EFI_DEVICE_ERROR    When the device is not responding!
Notes:
Entry Points are used to locate or install protocol interfaces and
notification events.


PciBusStart in the PciBus.c

Function : PciBusStart

File: PciBus.c
Description:
Start Function of the EFI_DRIVER_BINDING_PROTOCOL
for PCI Bus Driver
Notes:
See EFI Specification for detail description


PciBusStop in the PciBus.c

Function : PciBusStop

File: PciBus.c
Description:
Stop Function of the EFI_DRIVER_BINDING_PROTOCOL
for PCI Bus Driver.
Notes:
See EFI Specification for detail description


PciBusSupported in the PciBus.c

Function : PciBusSupported

File: PciBus.c
Description:
Supported Function of the EFI_DRIVER_BINDING_PROTOCOL
for PCI Bus Driver.
Notes:
See EFI Specification for detail description


PciCfg16 in the PciBus.c

Function : PciCfg16

File: PciBus.c
Description:
Will do PCI Configuration Space Access 16 bit width
Input:
ROOT_BRIDGE_IO_PROTOCOL *RbIo   Pointer to PciRootBridgeIO Protocol.
PCI_CFG_ADDR            addr    PCI_CFG_ADDR filled by caller
BOOLEAN                 wr      TRUE = Write FALSE = Read
UINT16                  *buff   Pointer Data Buffer.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           When Device not present in the system.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.

Referals:PCI_CFG_ADDR


PciCfg32 in the PciBus.c

Function : PciCfg32

File: PciBus.c
Description:
Will do PCI Configuration Space Access 32 bit width
Input:
ROOT_BRIDGE_IO_PROTOCOL *RbIo   Pointer to PciRootBridgeIO Protocol.
PCI_CFG_ADDR            addr    PCI_CFG_ADDR filled by caller
BOOLEAN                 wr      TRUE = Write FALSE = Read
UINT32                  *buff   Pointer Data Buffer.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           When Device not present in the system.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.

Referals:PCI_CFG_ADDR


PciCfg64 in the PciBus.c

Function : PciCfg64

File: PciBus.c
Description:
Will do PCI Configuration Space Access 64 bit width
Input:
ROOT_BRIDGE_IO_PROTOCOL *RbIo   Pointer to PciRootBridgeIO Protocol.
PCI_CFG_ADDR            addr    PCI_CFG_ADDR filled by caller
BOOLEAN                 wr      TRUE = Write FALSE = Read
UINT64                  *buff   Pointer Data Buffer.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           When Device not present in the system.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.

Referals:PCI_CFG_ADDR


PciCfg8 in the PciBus.c

Function : PciCfg8

File: PciBus.c
Description:
Will do PCI Configuration Space Access 8 bit width
Input:
ROOT_BRIDGE_IO_PROTOCOL *RbIo   Pointer to PciRootBridgeIO Protocol.
PCI_CFG_ADDR            addr    PCI_CFG_ADDR filled by caller
BOOLEAN                 wr      TRUE = Write FALSE = Read
UINT8                   *buff   Pointer Data Buffer.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           When Device not present in the system.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.

Referals:PCI_CFG_ADDR


Pcie2CheckAri in the PciBus.c

Function : Pcie2CheckAri

File: PciBus.c
Description:
This function will Enable ARI Forwarding in DownSream Port of
the device passed if
1.Device referenced is an ARI device;
2.Parenting Bridge supports ARI Forwarding.
3.ARI Firvarding Setup Question Set to "Enabled"
Input:
PCI_DEV_INFO    *Device     Pointer to PCI Device Private Data structure.
BOOLEAN         *MultiFunc  Pointer to a Flag to modify if Device is MF Device
BOOLEAN         *AriEnabled Pointer to a Flag to modify if this function was able to ENABLE ARI.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


Pcie2EnableAri in the PciBus.c

Function : Pcie2EnableAri

File: PciBus.c
Description:
This function will Enable ARI Forwarding in DownSream Port of
the device passed if
1.Device referenced is an ARI device;
2.Parenting Bridge supports ARI Forwarding.
3.ARI Firvarding Setup Question Set to "Enabled"
Input:
PCI_DEV_INFO    *Device Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_UNSUPPORTED         When Device or Parenting Bridge does not support ARI
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


Pcie2GetGen2Info in the PciBus.c

Function : Pcie2GetGen2Info

File: PciBus.c
Description:
This function will collect information about PCIE GEN2 Device
and initialize PCIE2_DATA structure based on information collected.
Input:
PCI_DEV_INFO    *Device Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


Pcie2SelectComplTimeOut in the PciBus.c

Function : Pcie2SelectComplTimeOut

File: PciBus.c
Description:
This function will select appropriate Completion Timeout range
from supported by the device.
Input:
UINT32      Support     Supported by Device Completion Timeout ranges.
BOOLEAN     Short       A Flag to Indicate wahat type of ranges to select Biggest or Smallest
Output:
UINT16
Value to be programmed in DEV_CNT2 Register.


Pcie2SetDevProperties in the PciBus.c

Function : Pcie2SetDevProperties

File: PciBus.c
Description:
This function will Select values for DEVICE CCONTROL2 register
based on Setup Settings and hardware capabilities.
Input:
PCI_DEV_INFO        *DnStreamPort   Pointer to PCI Device Private Data of Downstream Port of the link.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


Pcie2SetLnkProperties in the PciBus.c

Function : Pcie2SetLnkProperties

File: PciBus.c
Description:
This function will Select values for Link Control2 register on
both sides of the LINK based on Setup Settings and hardware capabilities.
Input:
PCI_DEV_INFO        *DnStreamPort   Pointer to PCI Device Private Data of Downstream Port of the link.
PCIE_LNK_CNT2_REG   *DnLnkCnt2      Pointer to the LNK_CNT2 Reg of the Downstream Port of the link.
PCI_DEV_INFO        *UpStreamPort   Pointer to PCI Device Private Data of Upwnstream Port of the link.
PCIE_LNK_CNT2_REG   *UpLnkCnt2      Pointer to the LNK_CNT2 Reg of the Downstream Port of the link.
BOOLEAN             *LinkHotResetRequired Flag to modify if Link will need HOT RESET after programming.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


PcieApplyDevSettings in the PciBus.c

Function : PcieApplyDevSettings

File: PciBus.c
Description:
This function will Select values for DEVICE CONTROL register
based on Setup Settings and hardware capabilities.
Input:
PCI_DEV_INFO    *EndPoint   Pointer to PCI Device Private Data.
UINT16          MaxPayload  MaxPayload value.
UINT16          LatencyL0s  Latency L0s value.
UINT16          LatencyL1   Latency L1 value.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


PcieCalcLatency in the PciBus.c

Function : PcieCalcLatency

File: PciBus.c
Description:
This function will calculate MAX Latency needed to exit from
ome of the ASPM Sattes L0s or L1.
Input:
PCI_DEV_INFO    *Device Pointer to PCI Device Private Data structure.
BOOLEAN         L0s     Tells which ASPM state Latency we are calculating
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


PcieCalcMaxPayLoad in the PciBus.c

Function : PcieCalcMaxPayLoad

File: PciBus.c
Description:
This function will calculate MAX PayLoad Size needed to work
correctly.
Input:
PCI_DEV_INFO    *EndPoint   Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


PcieConvertLatency in the PciBus.c

Function : PcieConvertLatency

File: PciBus.c
Description:
This function will convert Latency value from Values read from.
PPCIe.LNK_CNT_REG to Nanoseconds and opposite.
Input:
UINTN   Latency     Latency Value to convert
BOOLEAN L0s         Tells if L0s or L1 Exit latency
BOOLEAN ToNs        Tells how to convert:
       TRUE  - to the units of nano Seconds;
       FALSE - to the LNK_CNT_REG.LxExitLat register value
Output:
EFI_STATUS
UINTN               Converted Value (-1) - means Invalid Value passed;


PcieDisableLink in the PciBus.c

Function : PcieDisableLink

File: PciBus.c
Description:
This function will Disable Link of DNSTREAM port referenced as
"Device" based on Setup Settings and hardware STATUS. Used to disable "EMPTY"
links to save some POWER or "Force" LINK to Disable state if Link can not be
trained correctly.
Input:
PCI_DEV_INFO    *Device    Pointer to PCI Device Private Data structure.
BOOLEAN         Force      Flag to indicate to disable link unconditionally.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.

NOTE: Must be called only for PCI Express devices (Device->PciExpress!=NULL)


PcieGetCaps in the PciBus.c

Function : PcieGetCaps

File: PciBus.c
Description:
This function will Collect PCI Express Capabilities Data
of the "Device".
Input:
PCI_DEV_INFO    *Device    Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.

NOTE: Must be called only for PCI Express devices (Device->PciExpress!=NULL)


PcieInitDevChain in the PciBus.c

Function : PcieInitDevChain

File: PciBus.c
Description:
This function will detect optimal settings and programm -
MaxPayLoadSize, ReadRequestSize, ASPM settings and Virtual Channels
for all devices in the PCIE Links Chain.
Input:
PCI_DEV_INFO    *Device Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
Notes:
RootPortComplex<=>Switch0...<=>...SwitchN<=>EndPoint


PcieInitLink in the PciBus.c

Function : PcieInitLink

File: PciBus.c
Description:
This function will Initialize Pcie Link on both sides starting
fronm DownStream Port.
Input:
PCI_DEV_INFO    *DnPort    Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


PcieInitVc in the PciBus.c

Function : PcieInitVc

File: PciBus.c
Description:
This function will Initialize "Device"'s Virtual Channel properties
based on Setup Settings and hardware capabilities.
Input:
PCI_DEV_INFO        *Device   Pointer to PCI Device Private Data.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


PcieIsDownStreamPort in the PciBus.c

Function : PcieIsDownStreamPort

File: PciBus.c
Description:
This function will check if *PCI_DEV_INFO passed belongs to
PCI Express DOWNSTREAM PORT:
- RootPort of PCIe Root Complex;
- DownStream Port of PCIe Switch;
- PCI/PCI-X to PCIe Bridge.
Input:
PCI_DEV_INFO    *Dev    Pointer to PCI Device Private Data structure.
Output:
BOOLEAN
TRUE         When PCI_DEV_INFO passed belongs to DOWNSTREAM PORT
FALSE        All other cases...

NOTE: Must be called only for PCI Express devices (Device->PciExpress!=NULL)


PcieProbeDevice in the PciBus.c

Function : PcieProbeDevice

File: PciBus.c
Description:
This function will collect information about PCIE Device
and initialize it based on information collected.
Input:
PCI_DEV_INFO    *Device Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
Notes:
The function will do the following steps
1.disable ASPM if any;
2.disable PMI Generation if any;
3.power up PCIE Slot (if capable) if the slot has device behind it;
4.if nothing connected to slot, power it down to make it HOTPLUG READY;


PcieProgramLink in the PciBus.c

Function : PcieProgramLink

File: PciBus.c
Description:
This function will Program Link with provided VALUEs
trained correctly.
Input:
PCI_DEV_INFO    *Device    Pointer to PCI Device Private Data structure.
UINT16          Data       Value to put in LNK_CNT register
BOOLEAN         Reg2       Flag to select LNK_CNT or LNK_CNT2 register.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.

NOTE: Must be called only for PCI Express devices (Device->PciExpress!=NULL)


PcieProgramPayloadUp in the PciBus.c

Function : PcieProgramPayloadUp

File: PciBus.c
Description:
This function will reprogram Max Payload and Read Request Size
in upstream link if initialization code founds that one of Nodes down stream
has lesser Max Pay load size than currently programmed
Input:
PCI_DEV_INFO    *Device     Pointer to PCI Device Private Data structure.
UINT32          Payload     Reduced Max Payload Value.
UINT32          ReadRequest Reduced Read Request Value.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
Notes:
RootPortComplex<=>Switch0...<=>...SwitchN<=>EndPoint


PcieRecordBootScript in the PciBus.c

Function : PcieRecordBootScript

File: PciBus.c
Description:
This function will create S3 Resume Boot Script
for Device's Virtual Channels feature initialization if device
supports Virtual Channels.
Input:
PCI_DEV_INFO    *Brg    Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


PcieRemoveEpFromLst in the PciBus.c

Function : PcieRemoveEpFromLst

File: PciBus.c
Description:
This function will removed Device referencesd as EndPoint from
the gPcieEpLst data structure used as a database of available EndPoint devices.
Input:
PCI_DEV_INFO    *EndPoint   Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           EndPoint not in the gPcieEpLst.


PcieResetLink in the PciBus.c

Function : PcieResetLink

File: PciBus.c
Description:
This function will issue HOT RESET on a LINK referenced by "Device".
Input:
PCI_DEV_INFO    *Device    Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.

NOTE: Must be called only for PCI Express devices (Device->PciExpress!=NULL)


PcieRetrainLink in the PciBus.c

Function : PcieRetrainLink

File: PciBus.c
Description:
This function will initiate LINK training of the
Down Stream Port referenced as "Device".
Input:
PCI_DEV_INFO    *Device    Pointer to PCI Device Private Data structure.
UINT16          Data       Value to put in LNK_CNT register
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.

NOTE: Must be called only for PCI Express devices (Device->PciExpress!=NULL)


PcieSetAspm in the PciBus.c

Function : PcieSetAspm

File: PciBus.c
Description:
This function will Select values for Link Control2 register on
both sides of the LINK based on Setup Settings and hardware capabilities.
Input:
PCI_DEV_INFO        *DnPort   Pointer to PCI Device Private Data of Downstream Port of the link.
PCI_DEV_INFO        *UpPort   Pointer to PCI Device Private Data of Upwnstream Port of the link.
UINT16              Aspm      ASPM value to programm.
BOOLEAN             *LinkHotResetRequired Flag to modify if Link will need HOT RESET after programming.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


PcieSetDevProperties in the PciBus.c

Function : PcieSetDevProperties

File: PciBus.c
Description:
This function will Select values for DEVICE CONTROL register
based on Setup Settings and hardware capabilities.
Input:
PCI_DEV_INFO        *Device         Pointer to PCI Device Private Data.
UINT16              *MaxPayload     Pointer to the MaxPayload value.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


PcieSetLnkProperties in the PciBus.c

Function : PcieSetLnkProperties

File: PciBus.c
Description:
This function will Select values for Link Control2 register on
both sides of the LINK based on Setup Settiongs and hardware capabilities.
Input:
PCI_DEV_INFO        *DnStreamPort   Pointer to PCI Device Private Data of Downstream Port of the link.
PCIE_LNK_CNT2_REG   *DnLnkCnt      Pointer to the LNK_CNT Reg of the Downstream Port of the link.
PCI_DEV_INFO        *UpStreamPort   Pointer to PCI Device Private Data of Upwnstream Port of the link.
PCIE_LNK_CNT2_REG   *UpLnkCnt      Pointer to the LNK_CNT Reg of the Downstream Port of the link.
BOOLEAN             *LinkTrainingRequired Flag to modify if Link will need RETRAINING after programming.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


PcieSetSlotPower in the PciBus.c

Function : PcieSetSlotPower

File: PciBus.c
Description:
This function will power ON or OFF PCI Express Slot
Input:
PCI_DEV_INFO    *Dev    Pointer to PCI Device Private Data structure.
BOOLEAN         PwrOn   Tells to turn slot power ON or OFF
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


PcieSetSlotProperties in the PciBus.c

Function : PcieSetSlotProperties

File: PciBus.c
Description:
This function will Initialize SLT_CNT and SLT_STA registers
of the "Device".
Input:
PCI_DEV_INFO    *Device    Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.

NOTE: Must be called only for PCI Express devices (Device->PciExpress!=NULL)


PcieUpdateClockPm in the PciBus.c

Function : PcieUpdateClockPm

File: PciBus.c
Description:
This function will update Device's referenced as "Func0"
Clock Power Management based on Setup Settings and hardware capabilities.
Input:
PCI_DEV_INFO    *Func0    Pointer to PCI Device Private Data structure.
CNT_REG         *LnkCnt   Pointer to the Device's LNK_CNT register data.
Output:
NOTHING

NOTE: Must be called only for PCI Express devices (Device->PciExpress!=NULL)


PciExtApicIrqRout in the PciBus.c

Function : PciExtApicIrqRout

File: PciBus.c
Description:
Returns device's corresponded APIC IRQ routing entry from MPPCIIRQ.INC
table created by the BUILD process.
If function returns EFI_SUCCESS the "ApicIrqTblEntry" updated with corresponded PIC
IRQ Table entry pointer. "ParentDevices" == NULL and "EntryCount"==0
Function will return EFI_NOT_FOUND if there a no entry for the Device HANDLE passed.

But it will return update the array of EFI_PCI_CONFIGURATION_ADDRESS structures with
PCI Addresses of parenti
Input:
AMI_PCI_EXT_PROTOCOL*   This            Pointer to the PciBusExtended protocol.
EFI_HANDLE              PciDeviceHandle Handle of the PCI Device to check.
EFI_PCI_IO_PROTOCOL*    PciIo 		    Pointer to the instance of PCI IO Protocol (OPTIONAL)
PCI_IRQ_PIC_ROUTE**     ApicIrqTblEntry Double pointer to the corresponded PCI_IRQ_PIC_ROUTE entry
EFI_PCI_CONFIGURATION_ADDRESS** ParentDevices Pointer to an array of parent Devices
                           for which was not found a valid PCI_IRQ_PIC_ROUTE entry.
UINTN*                  EntryCount      Number of elements in an array above.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           If no PIRQ entry was found for this device.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.

Note:
If PciDeviceHandle == NULL, PciIo must be valid.
If *PciIo == NULL PciDeviceHandle must be valid.


PciExtClassCodes in the PciBus.c

Function : PciExtClassCodes

File: PciBus.c
Description:
Returns device's Class code; Sub Class code; Programing Interface
and Revision Id information.
Input:
AMI_PCI_EXT_PROTOCOL*   This            Pointer to the PciBusExtended protocol.
EFI_HANDLE              PciDeviceHandle Handle of the PCI Device to check.
EFI_PCI_IO_PROTOCOL*    PciIo 		    Pointer to the instance of PCI IO Protocol (OPTIONAL)
PCI_DEV_CLASS*          CassCodes       Pointer to the PCI_DEV_CLASS to fill.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_INVALID_PARAMETER   When Parameter passed is invalid.

Note:
If PciDeviceHandle == NULL, PciIo must be valid.
If *PciIo == NULL PciDeviceHandle must be valid.


PciExtGetDevice in the PciBus.c

Function : PciExtGetDevice

File: PciBus.c
Description:
Locates PCI_DEV_INFO using passed PCI Device Handle or PciIo
Protocol pointer.
Input:
EFI_HANDLE              PciDeviceHandle Handle of the PCI Device to check.
EFI_PCI_IO_PROTOCOL*    PciIo 		    Pointer to the instance of PCI IO Protocol (OPTIONAL)
Output:
PCI_DEV_INFO*           When everything is going on fine!
NULL                    If no such device exists.

Note:
If PciDeviceHandle == NULL, PciIo must be valid.
If *PciIo == NULL PciDeviceHandle must be valid.


PciExtIsCrdBrg in the PciBus.c

Function : PciExtIsCrdBrg

File: PciBus.c
Description:
Checks if PciDeviceHandle, or PciIO passed belongs to
PCI 2 Card Bridge device.
Input:
AMI_PCI_EXT_PROTOCOL*   This            Pointer to the PciBusExtended protocol.
EFI_HANDLE              PciDeviceHandle Handle of the PCI Device to check.
EFI_PCI_IO_PROTOCOL*    PciIo 		    Pointer to the instance of PCI IO Protocol (OPTIONAL)
PCI_BRG_EXT**           PciBrgExt       Double Pointer to the PCI_BRG_EXT Structure (OPTIONAL)
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           If Device is not PCI 2 Card Bridge device.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.

Note:
If PciDeviceHandle == NULL, PciIo must be valid.
If *PciIo == NULL PciDeviceHandle must be valid.
**PciBrgExt if not needed must be NULL;


PciExtIsDevice in the PciBus.c

Function : PciExtIsDevice

File: PciBus.c
Description:
Checks if PciDeviceHandle, or PciIO passed belongs to
Regular PCI device.
Input:
AMI_PCI_EXT_PROTOCOL*   This            Pointer to the PciBusExtended protocol.
EFI_HANDLE              PciDeviceHandle Handle of the PCI Device to check.
EFI_PCI_IO_PROTOCOL*    PciIo 		    Pointer to the instance of PCI IO Protocol (OPTIONAL)
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           If Device is not Regular PCI device.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.

Note:
If PciDeviceHandle == NULL, PciIo must be valid.
If *PciIo == NULL PciDeviceHandle must be valid.


PciExtIsPciBrg in the PciBus.c

Function : PciExtIsPciBrg

File: PciBus.c
Description:
Checks if PciDeviceHandle, or PciIO passed belongs to
PCI 2 PCI Bridge device.
Input:
AMI_PCI_EXT_PROTOCOL*   This            Pointer to the PciBusExtended protocol.
EFI_HANDLE              PciDeviceHandle Handle of the PCI Device to check.
EFI_PCI_IO_PROTOCOL*    PciIo 		    Pointer to the instance of PCI IO Protocol (OPTIONAL)
PCI_BRG_EXT**           PciBrgExt       Double Pointer to the PCI_BRG_EXT Structure (OPTIONAL)
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           If Device is not PCI 2 PCI Bridge device.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.

Note:
If PciDeviceHandle == NULL, PciIo must be valid.
If *PciIo == NULL PciDeviceHandle must be valid.
**PciBrgExt if not needed must be NULL;


PciExtIsPciExpresss in the PciBus.c

Function : PciExtIsPciExpresss

File: PciBus.c
Description:
Checks if PciDeviceHandle, or PciIO passed belongs to
PCI Express device.
Input:
AMI_PCI_EXT_PROTOCOL*   This            Pointer to the PciBusExtended protocol.
EFI_HANDLE              PciDeviceHandle Handle of the PCI Device to check.
EFI_PCI_IO_PROTOCOL*    PciIo 		    Pointer to the instance of PCI IO Protocol (OPTIONAL)
PCIE_DATA**             PciExpData      Double Pointer to the PCIE_DATA Structure (OPTIONAL)
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           If Device is not PCI Express device.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.

Note:
If PciDeviceHandle == NULL, PciIo must be valid.
If *PciIo == NULL PciDeviceHandle must be valid.
**PciExpData if not needed must be NULL;


PciExtIsPciX in the PciBus.c

Function : PciExtIsPciX

File: PciBus.c
Description:
Checks if PciDeviceHandle, or PciIO passed belongs to
PCI Express device.
Input:
AMI_PCI_EXT_PROTOCOL*   This            Pointer to the PciBusExtended protocol.
EFI_HANDLE              PciDeviceHandle Handle of the PCI Device to check.
EFI_PCI_IO_PROTOCOL*    PciIo 		    Pointer to the instance of PCI IO Protocol (OPTIONAL)
PCIX_DATA**             PciXData      Double Pointer to the PCIX_DATA Structure (OPTIONAL)
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           If Device is not PCI X device.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.

Note:
If PciDeviceHandle == NULL, PciIo must be valid.
If *PciIo == NULL PciDeviceHandle must be valid.
**PciXData if not needed must be NULL;


PciExtPicIrqRout in the PciBus.c

Function : PciExtPicIrqRout

File: PciBus.c
Description:
Returns device's corresponded PIC IRQ routing entry from OEMPIR.INC
table created by the BUILD process.
If function returns EFI_SUCCESS the "PicIrqTblEntry" updated with corresponded PIC
IRQ Table entry pointer. "ParentDevices" == NULL and "EntryCount"==0
Function will return EFI_NOT_FOUND if there a no entry for the Device HANDLE passed.

But it will return update the array of EFI_PCI_CONFIGURATION_ADDRESS structures with
PCI Addresses of parenti
Input:
AMI_PCI_EXT_PROTOCOL*   This            Pointer to the PciBusExtended protocol.
EFI_HANDLE              PciDeviceHandle Handle of the PCI Device to check.
EFI_PCI_IO_PROTOCOL*    PciIo 		    Pointer to the instance of PCI IO Protocol (OPTIONAL)
PCI_IRQ_PIC_ROUTE**     PicIrqTblEntry  Double pointer to the corresponded PCI_IRQ_PIC_ROUTE entry
EFI_PCI_CONFIGURATION_ADDRESS** ParentDevices Pointer to an array of parent Devices
                           for which was not found a valid PCI_IRQ_PIC_ROUTE entry.
UINTN*                  EntryCount      Number of elements in an array above.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_NOT_FOUND           If no PIRQ entry was found for this device.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.

Note:
If PciDeviceHandle == NULL, PciIo must be valid.
If *PciIo == NULL PciDeviceHandle must be valid.


PciIoAllocateBuffer in the PciBus.c

Function : PciIoAllocateBuffer

File: PciBus.c
Description:
Protocol Function Allocates a common buffer for DMA
Notes:
See EFI Specification for detail description


PciIoAttributes in the PciBus.c

Function : PciIoAttributes

File: PciBus.c
Description:
Protocol Function Provides Arttribute operation for the PCI device
Notes:
See EFI Specification for detail description


PciIoCheckBar in the PciBus.c

Function : PciIoCheckBar

File: PciBus.c
Description:
This helper function will check if parameters passed to the
PCI IO Protocol to read or write a PCI resources are correct.
Input:
PCI_DEV_INFO    *Dev    Pointer to PciDevice Info structure.
UINT8           BarInd  Index of the BAR within PCI device.
PCI_BAR_TYPE    BarType Indicating what to check - IO or Memory.
EFI_PCI_IO_PROTOCOL_WIDTH   Width   Width of transaction.
UINTN           Count   Number of bytes been transfered.
UINT64          *Offset Offset within BAR address space to start from.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO; PCI_BAR_TYPE;EFI_PCI_IO_PROTOCOL_WIDTH


PciIoCheckConfig in the PciBus.c

Function : PciIoCheckConfig

File: PciBus.c
Description:
This helper function will check if parameters passed to the
PCI IO Protocol to made a PCI Config Space Access are correct
Input:
PCI_DEV_INFO                *Dev    Pointer to PciDevice Info structure.
EFI_PCI_IO_PROTOCOL_WIDTH   Width   Width of transaction been performed.
UINTN                       Count   Number of bytes been transfered.
UINT64                      *Offset Offset to start from.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO; PCI_BAR_TYPE; EFI_PCI_IO_PROTOCOL_WIDTH


PciIoConfigRead in the PciBus.c

Function : PciIoConfigRead

File: PciBus.c
Description:
Protocol Function Performs a PCI Configuration Read Cycle
Notes:
See EFI Specification for detail description


PciIoConfigWrite in the PciBus.c

Function : PciIoConfigWrite

File: PciBus.c
Description:
Protocol Function Performs a PCI Configuration Write Cycle
Notes:
See EFI Specification for detail description


PciIoCopyMem in the PciBus.c

Function : PciIoCopyMem

File: PciBus.c
Description:
Protocol Function Copyes PCI Memory
Notes:
See EFI Specification for detail description


PciIoFlush in the PciBus.c

Function : PciIoFlush

File: PciBus.c
Description:
Protocol Function Flushes a DMA buffer
Notes:
See EFI Specification for detail description


PciIoFreeBuffer in the PciBus.c

Function : PciIoFreeBuffer

File: PciBus.c
Description:
Protocol Function Frees a common buffer
Notes:
See EFI Specification for detail description


PciIoGetBarAttributes in the PciBus.c

Function : PciIoGetBarAttributes

File: PciBus.c
Description:
Protocol Function Gets respective BAR Attributes
Notes:
See EFI Specification for detail description


PciIoGetLocation in the PciBus.c

Function : PciIoGetLocation

File: PciBus.c
Description:
Protocol Function Proides Device Address on PCI BUS like
Bus#, Dev#, Fun# for the device who has PciIoProtocol == "This".
Notes:
See EFI Specification for detail description


PciIoIoRead in the PciBus.c

Function : PciIoIoRead

File: PciBus.c
Description:
Protocol Function Performs a PCI I/O Read Cycle
Notes:
See EFI Specification for detail description


PciIoIoWrite in the PciBus.c

Function : PciIoIoWrite

File: PciBus.c
Description:
Protocol Function Performs a PCI I/O Write Cycle
Notes:
See EFI Specification for detail description


PciIoMap in the PciBus.c

Function : PciIoMap

File: PciBus.c
Description:
Protocol Function Maps a memory region for DMA
Notes:
See EFI Specification for detail description


PciIoMemRead in the PciBus.c

Function : PciIoMemRead

File: PciBus.c
Description:
Protocol Function Performs a PCI Memory Read Cycle
Notes:
See EFI Specification for detail description


PciIoMemWrite in the PciBus.c

Function : PciIoMemWrite

File: PciBus.c
Description:
Protocol Function Performs a PCI Memory Write Cycle
Notes:
See EFI Specification for detail description


PciIoPollIo in the PciBus.c

Function : PciIoPollIo

File: PciBus.c
Description:
Protocol Function Poll PCI IO
Notes:
See EFI Specification for detail description


PciIoPollMem in the PciBus.c

Function : PciIoPollMem

File: PciBus.c
Description:
Protocol Function Poll PCI Memmory
Notes:
See EFI Specification for detail description


PciIoSetBarAttributes in the PciBus.c

Function : PciIoSetBarAttributes

File: PciBus.c
Description:
Protocol Function Sets respective BAR Attributes
Notes:
See EFI Specification for detail description


PciIoUnmap in the PciBus.c

Function : PciIoUnmap

File: PciBus.c
Description:
Protocol Function Unmaps a memory region for DMA
Notes:
See EFI Specification for detail description


PopulateBusDb in the PciBus.c

Function : PopulateBusDb

File: PciBus.c
Description:
Fills gPciBusDb Array in ascending  order.
Input:
Nothing;
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.


ProbeSriovDevice in the PciBus.c

Function : ProbeSriovDevice

File: PciBus.c
Description:
This function will collect information about SRIOV PCIE Device
and initialize it based on information collected.
Input:
PCI_DEV_INFO    *Device Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


ProgramBar in the PciBus.c

Function : ProgramBar

File: PciBus.c
Description:
Programm PCI BAR Register with the Resource Address
provided by the "bar" parameter.
Input:
PCI_BAR         *bar    Pointer at PCI BAR register information
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


QueryPciDevice in the PciBus.c

Function : QueryPciDevice

File: PciBus.c
Description:
This function will collect all possible data about PCI Device.
Input:
PCI_DEV_INFO    *Device Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


RecordPriVgaBootScript in the PciBus.c

Function : RecordPriVgaBootScript

File: PciBus.c
Description:
This function will create S3 Resume Boot Script
for Device's on the path of primary VGA Device inclusive.
Input:
Nothing
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


RemoveUnusedIrqEntries in the PciBus.c

Function : RemoveUnusedIrqEntries

File: PciBus.c
Description:
Removes IRQ routing entries which got there by porting mistake
in order not to confuse other consumers of AmiBoardInfoProtocol...
Input:
NOTHING
Output:
NOTHING


ResetDevicePm in the PciBus.c

Function : ResetDevicePm

File: PciBus.c
Description:
This function will turn off SMI generation on PCI PME
and put device in to D0 state, if device has PM capability.
Input:
PCI_DEV_INFO    *Brg    Pointer to PCI Device Private Data structure.
Output:
Nothing


RestoreBridgeBuses in the PciBus.c

Function : RestoreBridgeBuses

File: PciBus.c
Description:
This function will Reprogram Primary Secondary and Subordinate
bus numbers for the downsteram bridges after SEC BUS reset signal assertion.
Input:
PCI_DEV_INFO    *DnPort    Pointer to PCI Device Private Data structure.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.


SaveBars in the PciBus.c

Function : SaveBars

File: PciBus.c
Description:
This function will create S3 Resume Boot Script
for Device's BAR Registers.
Input:
PCI_DEV_INFO    *Dev    Pointer to PCI Device Private Data structure.
Output:
Nothing.


SaveDevice in the PciBus.c

Function : SaveDevice

File: PciBus.c
Description:
This function will create S3 Resume Boot Script
for Device's other than BAR Registers.
Input:
PCI_DEV_INFO    *Dev    Pointer to PCI Device Private Data structure.
Output:
Nothing.


SetIdeDevMode in the PciBus.c

Function : SetIdeDevMode

File: PciBus.c
Description:
This function will Change IDE Device Mode LEGACY/NATIVE
Input:
PCI_DEV_INFO    *Dev      Pointer to PCI Device Private Data structure.
BOOLEAN         Primary   Indicate Primary/Secondary controller
BOOLEAN         Legacy    Indicate Mode to programm
UINT8           *Override If not NULL value to programm in PI register
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_UNSUPPORTED         When device does not support mode programming.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_DEV_INFO;
Notes:
This function does not check if SecIde/PriIde Property of the Dev->HostData
is tacken already caller must do that before call;
This function does not update SecIde/PriIde Property of the Dev->HostData
object. Caller must do that upon successfull return.


SetSubBus in the PciBus.c

Function : SetSubBus

File: PciBus.c
Description:
Programm SubordinateBusNumber Register of PCI Bridge.
Input:
PCI_DEV_INFO    *Brg        Pointer to PCI Bridge Private Data structure.
UINT8           SubBusNo    Number to programm.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_DEVICE_ERROR        When driver fails access PCI Bus.
EFI_INVALID_PARAMETER   When some of the parameters are invalid.

Referals: PCI_BRG_INFO.


StartPciChildDevice in the PciBus.c

Function : StartPciChildDevice

File: PciBus.c
Description:
Starts PCI Devices Behind the Bridge. (Called recoursively)
This function performs the following operations
1. Register Device with CORE by getting a brand new handle
2. Install PciIo Protocol Interface on This Device
3. Generates EFI_DEVICE_PPATH protocol instance for "Dev"ice
4. Installs DevicePath Protocol on Created Handle
5. If Device has Option ROM copy it to the Memory Buffer
6. If 5 is TRUE and if Opt ROM has EFI compliant Image
installs Bus Override protocol.
Input:
EFI_HANDLE      ControllerHandle  Device's Controller Handle.
PCI_BRG_INFO    *Brg              Pointer at PCI Bridge Private Data.
EFI_DEVICE_PATH_PROTOCOL *RemainingDp Pointer at PCI Device Path
                     Protocol Instance or NULL.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.


StartPciDevices in the PciBus.c

Function : StartPciDevices

File: PciBus.c
Description:
Installs PCI Io Protocol Instance on all or some PCI Devices
in the System
Input:
EFI_HANDLE      ControllerHandle  Device's Controller Handle.
EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath Pointer at PCI Device Path
                     Protocol Instance or NULL.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.


StopPciDevice in the PciBus.c

Function : StopPciDevice

File: PciBus.c
Description:
Stops PCI Device referenced as "Dev". Called From
StopPciDeviceBrg() function.
Input:
PCI_DEV_INFO    *Dev    Pointer PCI Devicse Private Data.
EFI_HANDLE      Controller Device's Controller Handle.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.


StopPciDeviceBrg in the PciBus.c

Function : StopPciDeviceBrg

File: PciBus.c
Description:
Stops - Uninstalls PCI Io Protocol Instance from PCI Devices
behind the PCI Bridge referenced as "Brg"
Input:
PCI_BRG_INFO    *Brg        Pointer PCI Devicse Private Data.
EFI_HANDLE      Controller  Device's Controller (Parent) Handle.
Output:
EFI_STATUS
EFI_SUCCESS             When everything is going on fine!
EFI_OUT_OF_RESOURCES    When system runs out of resources.
EFI_INVALID_PARAMETER   When Parameter passed is invalid.


UpdateItqTbl in the PciBus.c

Function : UpdateItqTbl

File: PciBus.c
Description:
Updtaes all matching entries in Irqrouting tables with
runtime values.
Input:
PCI_BUS_XLAT_HDR    *XlatHdr    Updated BusTranslate table entry.
Output:
NOTHING


PciBusSrc.mak

Description:
Make file to build PciBus Driver Sources.


PciHostBridge.c

Description:
AMI's Native Root Bridge Protocol Implementation

The following functions are used in the file: PciHostBridge.c.

Function | Description
AlignFromGra | Converts C passed into Alignment format
AllocateBuffer | Allocate buffer for PCI use.
AllocateMemoryResource | This function will try to Allocate from GCD set of resources requested by input Length and Alignment.
AllocateResources | This function will try to Allocate from GCD set of resources requested by PCI BUS driver in "*Resources" buffer.
Configuration | Returns, using ACPI 2.0 Descriptors, resources allocated.
ConvertMemoryMap | This function will adjust the final GCD resource Map and convert all NonrExistant Memory resources into MMIO.
CopyMem | Copy PCI memory to PCI memory in bridge.
CreateRootBusData | This function will parse NusXlat Table looking for HostBridge entries (one who has Bus IN == Bus OUT) and populate gRootBusDb Structure.
Flush | Flush buffer used by PCI DMA Transfere.
FreeBuffer | Frees buffer
FreeUsedResources | Cleans internal RB data and free resources allocated trough GCD.
GetAttributes | Get Supported and Current Root Bridge Attributes.
GetRbByHandle | Lokates
GetResources | This function will generate Resource descriptors block based on information stored in RootBridge->RbRes array
HbResAllocGetAllocAttributes | Returns the attributes of a PCI Root Bridge.
HbResAllocGetNextRootBridge | Return the device handle of the next PCI root bridge that is associated with this Host Bridge.
HbResAllocGetProposedResources | This function returns the proposed resource settings for the specified PCI Root Bridge
HbResAllocNotifyPhase | Enter a certain phase of the PCI enumeration process
HbResAllocPreprocessController | This function is called for all the PCI controllers that the PCI bus driver finds. Can be used to Preprogram the controller. Arguments:
HbResAllocSetBusNumbers | This function programs the PCI Root Bridge hardware so that it decodes the specified PCI bus range
HbResAllocStartBusEnumeration | This is the request from the PCI enumerator to set up the specified PCI Root Bridge for bus enumeration process.
HbResAllocSubmitResources | Submits the I/O and memory resource requirements for the specified PCI Root Bridge
HpcFindHpSlots | This function find information and initialize an instance of PCI Root Hotplug Controller Initialization Protocol.
HpcInitGetRootHpcList | GetRootHpcList() Function of the PCI Root Hotplug Controller Initialization Protocol. See PI 1.1 Spec or details
HpcInitInitializeRootHpc | InitializeRootHpc() Function of the PCI Root Hotplug Controller Initialization Protocol. See PI 1.1 Spec or details NOTE: This function call will be used to overwrite default resource Padding settings.
HpcInitProtocol | This function will collect all information HP related information and initialize an instance of PCI Root Hotplug Controller Initialization Protocol.
InitializePCIHostBridge | This function is the entry point for PCI Root Bridge Driver. Since PCI Root Bridge Driver follows EFI 1.1 driver model in it's entry point it will initialize some global data and install EFI_DRIVER_BINDING_PROTOCOL.
IsPowerOfTwo | Checks if value passed makes "POWER OF TWO"
IsResSubmited | Will check if all root bridges belonging to the "Host" has submitted it's resources
KillTmr | Disables and Clear timer event to poll PCI IO and MEMORY. Arguments:
Map | Provide addresses required to access system memory from a DMA bus master.
PciIoRead | Read IO into buffer.
PciIoWrite | Write IO from buffer.
PciMemRead | Read memory IO into buffer.
PciMemWrite | Write memory IO from buffer.
PciRead | Read Pci registers into buffer.
PciRw | Provides Read and Write access to the PCI Configuration Space.
PciWrite | Write Pci registers from buffer.
PollIo | Poll IO for a value or until times out.
PollMem | Poll Memory for a value or until times out.
RbReadyToBoot | This function will create ReadyToBoot Event to update each Root Bridge ASL Object with corresponded resources decoded.
SetResources | This function will update RootBridge->RbRes array with Descriptors prowided with *Resources parameter
SetTmr | Enables timer event to poll PCI IO and MEMORY. Arguments:
Unmap | Remove mapping

The following data structures are used in the file: PciHostBridge.c.

Variable | Description
gAmiBoardProtocol | Ami Board Info Protocol Instance.
gPciHost | Array of PCI Host Bridge Data Sructures. Initial data point for PCI Subsystem.
gPciSetupData | Global Setup Variable to get the setup settings pointer.


AlignFromGra in the PciHostBridge.c

Function : AlignFromGra

File: PciHostBridge.c
Description:
Converts C passed into Alignment format
Input:
UINTN      g       AlignFromGra Value to convert
Output:
UINTN
Converted Alignment value.
Built on 17:53:33 12/16/11


AllocateBuffer in the PciHostBridge.c

Function : AllocateBuffer

File: PciHostBridge.c
Description:
Allocate buffer for PCI use.
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *This   Protocol Instance
IN EFI_ALLOCATE_TYPE    Type        Alloocation Type (ignored and uses AllocateMaxAddress)
IN EFI_MEMORY_TYPE      MemoryType  Memory Type (ex. EfiBootServicesData)
IN UINTN                Pages       Number of pages to allocate.
OUT VOID                **HostAddress   Host Address
IN UINT64               Attributes  Allocation Attributes.
Output:
EFI_STATUS
EFI_SUCCESS - Successful allocation.
EFI_UNSUPPORTED	- Attribute not supported.
EFI_INVALID_PARAMETER
Built on 17:53:33 12/16/11


AllocateMemoryResource in the PciHostBridge.c

Function : AllocateMemoryResource

File: PciHostBridge.c
Description:
This function will try to Allocate from GCD set of resources requested by
input Length and Alignment.
Input:
UINTN                   Alignment       Align with 2^Alignment
UINT64                  Length          Length to allocate
EFI_PHYSICAL_ADDRESS    *BaseAddress    Base address to allocate
EFI_HANDLE              ImageHandle     The image handle consume the allocated space.
EFI_HANDLE              DeviceHandle    The device handle consume the allocated space.
Output:
EFI_STATUS
EFI_INVALID_PARAMETER   Invalid parameter.
EFI_NOT_FOUND           No descriptor contains the desired space.
EFI_SUCCESS             Memory space successfully allocated.

EFI_PHYSICAL_ADDRESS    *BaseAddress    Base address to be allocated
Built on 17:53:33 12/16/11


AllocateResources in the PciHostBridge.c

Function : AllocateResources

File: PciHostBridge.c
Description:
This function will try to Allocate from GCD set of resources requested by
PCI BUS driver in "*Resources" buffer.
Input:
PCI_ROOT_BRG_DATA *RootBrg  Pointer to ROOT Bridge private data
Output:
EFI_STATUS
EFI_SUCCESS - Success
EFI_OUT_OF_RESOURCES - If could not allocate resources
EFI_DEVICE_ERROR     - failed due to HW error.
Built on 17:53:33 12/16/11


Configuration in the PciHostBridge.c

Function : Configuration

File: PciHostBridge.c
Description:
Returns, using ACPI 2.0 Descriptors, resources allocated.
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *This
    IN VOID                             *Resources
Output:
EFI_STATUS
EFI_SUCCESS
Built on 17:53:33 12/16/11


ConvertMemoryMap in the PciHostBridge.c

Function : ConvertMemoryMap

File: PciHostBridge.c
Description:
This function will adjust the final GCD resource Map and
        convert all NonrExistant Memory resources into MMIO.
Input:
ImgHandle	Image handle
        CntrHandle	Controller Handle
Output:
None
Notes:
CHIPSET AND/OR BOARD PORTING NEEDED
Built on 17:53:33 12/16/11


CopyMem in the PciHostBridge.c

Function : CopyMem

File: PciHostBridge.c
Description:
Copy PCI memory to PCI memory in bridge.
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *This   Protocol instance
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width   Pci Width
IN UINT64       DestAddress  Pci Address
IN UINT64       SrcAddress  Pci Address
IN UINTN        Count       Number of width writes.
IN OUT VOID     *Buffer     where Pci registers are written from.
Output:
EFI_STATUS
EFI_SUCCESS - Successful copy.
EFI_INVALID_PARAMETER
Built on 17:53:33 12/16/11


CreateRootBusData in the PciHostBridge.c

Function : CreateRootBusData

File: PciHostBridge.c
Description:
This function will parse NusXlat Table looking for HostBridge
entries (one who has Bus IN == Bus OUT) and populate gRootBusDb
Structure.
Input:
Nothing
Output:
EFI_SUCCESS is OK
Notes:
CHIPSET AND/OR BOARD PORTING NEEDED
Built on 17:53:33 12/16/11


Flush in the PciHostBridge.c

Function : Flush

File: PciHostBridge.c
Description:
Flush buffer used by PCI DMA Transfere.
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL	*This   Protocol Instance
Output:
EFI_STATUS
EFI_SUCCESS - Successful flushing


FreeBuffer in the PciHostBridge.c

Function : FreeBuffer

File: PciHostBridge.c
Description:
Frees buffer
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL	*This   Protocol Instance
    IN UINTN    Pages           Number of pages to free.
    IN VOID*    HostAddress     Host Address
Output:
EFI_STATUS
EFI_SUCCESS	- Successful free.
EFI_INVALID_PARAMETER


FreeUsedResources in the PciHostBridge.c

Function : FreeUsedResources

File: PciHostBridge.c
Description:
Cleans internal RB data and free resources allocated trough GCD.
Input:
PCI_ROOT_BRG_DATA	*RootBrg Pointer to RB Private data.
Output:
NONE


gAmiBoardProtocol in the PciHostBridge.c

Variable : gAmiBoardProtocol

File: PciHostBridge.c
Description:
Ami Board Info Protocol Instance.


GetAttributes in the PciHostBridge.c

Function : GetAttributes

File: PciHostBridge.c
Description:
Get Supported and Current Root Bridge Attributes.
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL	*This Protocol Instance
OUT UINT64      *Supported      Supported Attributes
OUT UINT64      *Attributes     Current Attributes
Output:
EFI_STATUS
EFI_SUCCESS - Successful reading attributes.
EFI_INVALID_PARAMETER - If both for attributes are invalid.
Notes:
None


GetRbByHandle in the PciHostBridge.c

Function : GetRbByHandle

File: PciHostBridge.c
Description:
Lokates
Input:
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This  Protocol instance
EFI_HANDLE  RbHandle            PCI Root Bridge Handle to get Private data for.
UINTN       *Index              Updated Index of the Found Root Bridge private data
Output:
PCI_ROOT_BRG_DATA
Not NULL if Root was found.
NULL if Root was not found.


GetResources in the PciHostBridge.c

Function : GetResources

File: PciHostBridge.c
Description:
This function will generate Resource descriptors block based on information
stored in RootBridge->RbRes array
Input:
PCI_HOST_BRG_DATA   *Host       Pointer to HOST Bridge private data
ASLR_QWORD_ASD      **Resources Resource List in a form of ACPI QWORD Resource Descriptor.
ASLR_TYPE_ENUM      ResType     Describes what type of resources we are getting.
Output:
EFI_STATUS
EFI_SUCCESS - Success
EFI_OUT_OF_RESOURCES - If SubmitResources ( ) could not allocate resources
EFI_NOT_READY        - This phase cannot be entered at this time
EFI_DEVICE_ERROR     - SetResources failed due to HW error.


gPciHost in the PciHostBridge.c

Variable : gPciHost

File: PciHostBridge.c
Description:
Array of PCI Host Bridge Data Sructures.
Initial data point for PCI Subsystem.
Notes:
See PCI_HOST_BRG_DATA. Number of elements in

 gPciHost
[] array
defined by NB_NUMBER_OF_HOST_BRG in NB.sdl


gPciSetupData in the PciHostBridge.c

Variable : gPciSetupData

File: PciHostBridge.c
Description:
Global Setup Variable to get the setup settings pointer.
Notes:
PCI_SETUP_DATA


HbResAllocGetAllocAttributes in the PciHostBridge.c

Function : HbResAllocGetAllocAttributes

File: PciHostBridge.c
Description:
Returns the attributes of a PCI Root Bridge.
Input:
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This Protocol instance
EFI_HANDLE      RootBridgeHandle    The device handle of the PCI Root Bridge
                       that the caller is interested in
UINT64          Attribute           The pointer to attributes of the PCI Root Bridge
Output:
EFI_STATUS
EFI_SUCCESS - Success
EFI_INVALID_PARAMETER - RootBridgeHandle is invalid
EFI_INVALID_PARAMETER - Attributes is NULL


HbResAllocGetNextRootBridge in the PciHostBridge.c

Function : HbResAllocGetNextRootBridge

File: PciHostBridge.c
Description:
Return the device handle of the next PCI root bridge that is
associated with this Host Bridge.
Input:
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL    *This   Protocol instance
EFI_HANDLE  *RootBridgeHandle                       Returns the device handle
of the next PCI Root Bridge. On input, it holds the RootBridgeHandle
returned by the most recent call to GetNextRootBridge().
The handle for the first PCI Root Bridge is returned if RootBridgeHandle
is NULL on input.
Output:
EFI_STATUS
EFI_SUCCESS - Success
EFI_INVALID_PARAMETER - RootBridgeHandle is invalid


HbResAllocGetProposedResources in the PciHostBridge.c

Function : HbResAllocGetProposedResources

File: PciHostBridge.c
Description:
This function returns the proposed resource settings for the specified
PCI Root Bridge
Input:
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This  Protocol instance
EFI_HANDLE  RootBridgeHandle    PCI Root Bridge to be configured
VOID        **Configuration     Pointer to the pointer to the PCI bus resource descriptor
Output:
EFI_STATUS
EFI_SUCCESS - Success
EFI_INVALID_PARAMETER - RootBridgeHandle is invalid
EFI_DEVICE_ERROR      - Request failed due to hardware error
EFI_OUT_OF_RESOURCES  - Request failed due to lack of resources


HbResAllocNotifyPhase in the PciHostBridge.c

Function : HbResAllocNotifyPhase

File: PciHostBridge.c
Description:
Enter a certain phase of the PCI enumeration process
Input:
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL    *This   Protocol instance
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE       Phase   The phase during enumeration
Output:
EFI_STATUS
EFI_SUCCESS - Success
EFI_OUT_OF_RESOURCES - If SubmitResources ( ) could not allocate resources
EFI_NOT_READY        - This phase cannot be entered at this time
EFI_DEVICE_ERROR     - SetResources failed due to HW error.


HbResAllocPreprocessController in the PciHostBridge.c

Function : HbResAllocPreprocessController

File: PciHostBridge.c
Description:
This function is called for all the PCI controllers that the PCI
bus driver finds. Can be used to Preprogram the controller.

Arguments:
Input:
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This  Protocol instance
EFI_HANDLE  RootBridgeHandle    PCI Root Bridge to be configured
EFI_PCI_CONFIGURATION_ADDRESS   PciBusAddress   Address of the controller on the PCI bus
EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE    Phase   The Phase during resource allocation
Output:
EFI_STATUS
EFI_SUCCESS - Success
EFI_INVALID_PARAMETER - RootBridgeHandle is invalid
EFI_DEVICE_ERROR      - Device pre-initialization failed due to hardware error.


HbResAllocSetBusNumbers in the PciHostBridge.c

Function : HbResAllocSetBusNumbers

File: PciHostBridge.c
Description:
This function programs the PCI Root Bridge hardware so that
it decodes the specified PCI bus range
Input:
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This  Protocol instance
EFI_HANDLE  RootBridgeHandle    PCI Root Bridge to be configured
VOID        **Configuration     Pointer to the pointer to the PCI bus resource descriptor
Output:
EFI_STATUS
EFI_SUCCESS - Success
EFI_INVALID_PARAMETER - RootBridgeHandle is invalid
EFI_INVALID_PARAMETER - Configuration is NULL
EFI_INVALID_PARAMETER - Configuration does not point to a valid ACPI resource descriptor
EFI_INVALID_PARAMETER - Configuration contains one or more memory or IO ACPI resource descriptor
EFI_INVALID_PARAMETER - Address Range Minimum or Address Range Length fields in Configuration
           are invalid for this Root Bridge.
EFI_INVALID_PARAMETER - Configuration contains one or more invalid ACPI resource descriptor
EFI_DEVICE_ERROR      - Request failed due to hardware error
EFI_OUT_OF_RESOURCES  - Request failed due to lack of resources


HbResAllocStartBusEnumeration in the PciHostBridge.c

Function : HbResAllocStartBusEnumeration

File: PciHostBridge.c
Description:
This is the request from the PCI enumerator to set up
the specified PCI Root Bridge for bus enumeration process.
Input:
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This PROTOCOL instance
EFI_HANDLE  RootBridgeHandle    PCI Root Bridge to be configured
VOID        **Configuration     Pointer to the pointer to the PCI bus resource descriptor
Output:
EFI_STATUS
EFI_SUCCESS - Success
EFI_INVALID_PARAMETER - RootBridgeHandle is invalid
EFI_DEVICE_ERROR      - Request failed due to hardware error
EFI_OUT_OF_RESOURCES  - Request failed due to lack of resources


HbResAllocSubmitResources in the PciHostBridge.c

Function : HbResAllocSubmitResources

File: PciHostBridge.c
Description:
Submits the I/O and memory resource requirements for the specified PCI Root Bridge
Input:
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This  Protocol instance
EFI_HANDLE  RootBridgeHandle    PCI Root Bridge to be configured
VOID        **Configuration     Pointer to the pointer to the PCI bus resource descriptor
Output:
EFI_STATUS
EFI_SUCCESS - Success
EFI_INVALID_PARAMETER - RootBridgeHandle is invalid
EFI_INVALID_PARAMETER - Configuration is NULL
EFI_INVALID_PARAMETER - Configuration does not point to a valid ACPI resource descriptor
EFI_INVALID_PARAMETER - Configuration includes a resource descriptor of unsupported type


HpcFindHpSlots in the PciHostBridge.c

Function : HpcFindHpSlots

File: PciHostBridge.c
Description:
This function find
information and initialize an instance of PCI Root Hotplug Controller
Initialization Protocol.
Input:
PCI_HOST_BRG_DATA   *HostBrg - Pointer on Private Data
structure for which PCI Hot Plug Init Protocol going to
be initialized
Output:
EFI_SUCCESS is OK
EFI_NOT_FOUND no Hotplug slots where found.
Notes:
CHIPSET AND/OR BOARD PORTING NEEDED


HpcInitGetRootHpcList in the PciHostBridge.c

Function : HpcInitGetRootHpcList

File: PciHostBridge.c
Description:
GetRootHpcList() Function of the PCI Root Hotplug Controller
Initialization Protocol. See PI 1.1 Spec or details


HpcInitInitializeRootHpc in the PciHostBridge.c

Function : HpcInitInitializeRootHpc

File: PciHostBridge.c
Description:
InitializeRootHpc() Function of the PCI Root Hotplug Controller
Initialization Protocol. See PI 1.1 Spec or details

NOTE:
This function call will be used to overwrite default resource Padding settings.


HpcInitProtocol in the PciHostBridge.c

Function : HpcInitProtocol

File: PciHostBridge.c
Description:
This function will collect all information HP related
information and initialize an instance of PCI Root Hotplug Controller
Initialization Protocol.
Input:
PCI_HOST_BRG_DATA   *HostBrg - Pointer on Private Data
structure for which PCI Hot Plug Init Protocol going to
be initialized
Output:
EFI_SUCCESS is OK
EFI_NOT_FOUND no Hotplug slots where found.
Notes:
CHIPSET AND/OR BOARD PORTING NEEDED


InitializePCIHostBridge in the PciHostBridge.c

Function : InitializePCIHostBridge

File: PciHostBridge.c
Description:
This function is the entry point for PCI Root Bridge Driver.
Since PCI Root Bridge Driver follows EFI 1.1 driver model in it's entry
point it will initialize some global data and install
EFI_DRIVER_BINDING_PROTOCOL.
Input:
EFI_HANDLE          ImageHandle     Image handle.
EFI_SYSTEM_TABLE    *SystemTable    Pointer to the EFI system table.
Output:
EFI_STATUS
EFI_SUCCESS         When everything is going on fine!
EFI_NOT_FOUND       When something required is not found!
EFI_DEVICE_ERROR    When the device is not responding!
Notes:
Entry Points are used to locate or install protocol interfaces and
notification events.


IsPowerOfTwo in the PciHostBridge.c

Function : IsPowerOfTwo

File: PciHostBridge.c
Description:
Checks if value passed makes "POWER OF TWO"
Input:
UINT64      Value       Value to check.
Output:
BOOLEAN
TRUE or FALSE based on value passed.


IsResSubmited in the PciHostBridge.c

Function : IsResSubmited

File: PciHostBridge.c
Description:
Will check if all root bridges belonging to the "Host" has submitted
it's resources
Input:
PCI_HOST_BRG_DATA *Host  Pointer to HOST Bridge private data
EFI_HANDLE  RootBridgeHandle    PCI Root Bridge to be configured
VOID        **Configuration     Pointer to the pointer to the PCI bus resource descriptor
EFI_PCI_CONFIGURATION_ADDRESS   PciBusAddress   Address of the controller on the PCI bus
EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE    Phase   The Phase during resource allocation
Output:
BOOLEAN
TRUE    all root bridges belonging to the "Host" has its resources submitted
FALSE   opposite ...


KillTmr in the PciHostBridge.c

Function : KillTmr

File: PciHostBridge.c
Description:
Disables and Clear timer event to poll PCI IO and MEMORY.

Arguments:
Input:
EFI_EVENT  TmrEvt   Timer event to close.
Output:
Nothing


Map in the PciHostBridge.c

Function : Map

File: PciHostBridge.c
Description:
Provide addresses required to access system memory from a DMA
bus master.
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL      *This
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION    Operation
IN VOID         *HostAddress        Host address
IN OUT UINTN    **NumberOfBytes     Number of bytes
OUT EFI_PHYSICAL_ADDRESS    *DeviceAddress  Device Address
OUT VOID        **Mapping
Output:
EFI_STATUS
EFI_SUCCESS											- Successful Map
Modified:
None
Notes:
None
Referrals:
None


PciIoRead in the PciHostBridge.c

Function : PciIoRead

File: PciHostBridge.c
Description:
Read IO into buffer.
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL	*		- This
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH	- Io Width
IN UINT64		- Io Address
IN UINTN		- Number of width reads.
IN OUT VOID *	- Buffer where Io is read into.
Output:
EFI_STATUS
EFI_SUCCESS - Successful read.
EFI_INVALID_PARAMETER
Modified:
None
Notes:
None
Referrals:
None


PciIoWrite in the PciHostBridge.c

Function : PciIoWrite

File: PciHostBridge.c
Description:
Write IO from buffer.
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *This   Protocol instance
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width   Pci Width
IN UINT64       Address     IO Address
IN UINTN        Count       Number of width writes.
IN OUT VOID     *Buffer     where Pci registers are written from.
Output:
EFI_STATUS
EFI_SUCCESS - Successful write.
EFI_INVALID_PARAMETER


PciMemRead in the PciHostBridge.c

Function : PciMemRead

File: PciHostBridge.c
Description:
Read memory IO into buffer.
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL	*		- This
    IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH	- Memory Width
    IN UINT64		- Memory Address
    IN UINTN		- Number of width reads.
    IN OUT VOID *	- Buffer where memory is read into.
Output:
EFI_STATUS
EFI_SUCCESS			- Successful read.
EFI_INVALID_PARAMETER
Modified:
None
Notes:
None
Referrals:
None


PciMemWrite in the PciHostBridge.c

Function : PciMemWrite

File: PciHostBridge.c
Description:
Write memory IO from buffer.
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL	*		- This
    IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH	- Memory Width
    IN UINT64		- Memory Address
    IN UINTN		- Number of width writes.
    IN OUT VOID *	- Buffer where memory is written from.
Output:
EFI_STATUS
EFI_SUCCESS			- Successful write.
EFI_INVALID_PARAMETER
Modified:
None
Notes:
None
Referrals:
None


PciRead in the PciHostBridge.c

Function : PciRead

File: PciHostBridge.c
Description:
Read Pci registers into buffer.
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *This   Protocol instance
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width   Pci Width
IN UINT64       Address  Pci Address
IN UINTN        Count       Number of width writes.
IN OUT VOID     *Buffer     where Pci registers are written from.
Output:
EFI_STATUS
EFI_SUCCESS - Successful read.
EFI_INVALID_PARAMETER


PciRw in the PciHostBridge.c

Function : PciRw

File: PciHostBridge.c
Description:
Provides Read and Write access to the PCI Configuration Space.
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *This   Protocol Instance
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width   Data Width.
IN UINT64   Address     PCI Config Address
IN UINT32   Mask        Mask for the bits to be preserved
IN UINT32   Value       Data to be written
Output:
EFI_STATUS
EFI_SUCCESS	- OK
EFI_DEVICE_ERROR - HW ERROR


PciWrite in the PciHostBridge.c

Function : PciWrite

File: PciHostBridge.c
Description:
Write Pci registers from buffer.
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *This   Protocol instance
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width   Pci Width
IN UINT64       Address  Pci Address
IN UINTN        Count       Number of width writes.
IN OUT VOID     *Buffer     where Pci registers are written from.
Output:
EFI_STATUS
EFI_SUCCESS - Successful write.
EFI_INVALID_PARAMETER


PollIo in the PciHostBridge.c

Function : PollIo

File: PciHostBridge.c
Description:
Poll IO for a value or until times out.
Input:
IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL	*		- This
    IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH	- Memory Width
    IN  UINT64		- Memory Address
    IN  UINT64		- Bit Mask
    IN  UINT64		- Value for exit
    IN  UINT64		- Timout
    OUT UINT64 *	- Contents of IO
Output:
EFI_STATUS
EFI_SUCCESS			- Found value
EFI_TIMEOUT			- Did not find value.
EFI_INVALID_PARAMETER
Modified:
None
Notes:
None
Referrals:
None


PollMem in the PciHostBridge.c

Function : PollMem

File: PciHostBridge.c
Description:
Poll Memory for a value or until times out.
Input:
IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL	*		- This
    IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH	- Memory Width
    IN  UINT64		- Memory Address
    IN  UINT64		- Bit Mask
    IN  UINT64		- Value for exit
    IN  UINT64		- Timout
    OUT UINT64 *	- Contents of memory
Output:
EFI_STATUS
EFI_SUCCESS			- Found value
EFI_TIMEOUT			- Did not find value.
EFI_INVALID_PARAMETER
Modified:
None
Notes:
None
Referrals:
None


RbReadyToBoot in the PciHostBridge.c

Function : RbReadyToBoot

File: PciHostBridge.c
Description:
This function will create ReadyToBoot Event to update each
Root Bridge ASL Object with corresponded resources decoded.
Input:
Nothing
Output:
EFI_SUCCESS is OK
Notes:
CHIPSET AND/OR BOARD PORTING NEEDED


SetResources in the PciHostBridge.c

Function : SetResources

File: PciHostBridge.c
Description:
This function will update RootBridge->RbRes array with Descriptors
prowided with *Resources parameter
Input:
PCI_HOST_BRG_DATA   *Host       Pointer to HOST Bridge private data
ASLR_QWORD_ASD      *Resources Resource List in a form of ACPI QWORD Resource Descriptor.
ASLR_TYPE_ENUM      ResType     Describes what type of resources we are getting.
BOOLEAN             Replace     if TRUE function will Remove all descriptors of "ResType" before adding.
                   if FALSE function will just add "Resources"
Output:
EFI_STATUS
EFI_SUCCESS - Success
EFI_OUT_OF_RESOURCES - If SubmitResources ( ) could not allocate resources
EFI_NOT_READY        - This phase cannot be entered at this time
EFI_DEVICE_ERROR     - SetResources failed due to HW error.


SetTmr in the PciHostBridge.c

Function : SetTmr

File: PciHostBridge.c
Description:
Enables timer event to poll PCI IO and MEMORY.

Arguments:
Input:
UINT64  Delay   Delay value in us
Output:
EFI_EVENT if Success
NULL if unable to set timer event.


Unmap in the PciHostBridge.c

Function : Unmap

File: PciHostBridge.c
Description:
Remove mapping
Input:
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *This   Protocol Instance
IN VOID         *Mapping        Pointer to Mapping formation to Unmap
Output:
EFI_STATUS
EFI_SUCCESS - Successful unmapping.
EFI_INVALID_PARAMETER


Functions in Alphabetical Order

In Alphabetical Order

The following topics provide a list in alphabetical order.
For a list by file name, see By File Name.

  • A
  • B
  • C
  • D
  • E
  • F
  • G
  • H
  • I
  • K
  • M
  • N
  • O
  • P
  • Q
  • R
  • S
  • U
Built on 17:53:33 12/16/11


Functions in Alphabetical Order

A

Function | Description
ActivateOptRom | This function parses Option ROM Image to decide which Image to give control to and updates PciIO->OptioRom and PciIO->OptioRomSize with Correct values.
AddBusDbEntry | Fills gPciBusDb Array in ascending order.
AddOvrHandle | Adds EFI_HANDLE of the Addon Card Option ROM image to the PCI Bus Driver Private Data.
AdjustBarGra | This function will Check and Adjust PCI Device's BAR Granularity according information found in gBadPciDevList[].
AlignFromGra | Converts C passed into Alignment format
AllocateBuffer | Allocate buffer for PCI use.
AllocateMemoryResource | This function will try to Allocate from GCD set of resources requested by input Length and Alignment.
AllocateResources | This function will try to Allocate from GCD set of resources requested by PCI BUS driver in "*Resources" buffer.
AppendBarOrder | This function suppore to fill array of BAR ORDER with actual order of PCI_BARs behind the Bridge and remove added BAR structure from the BAR DATABASE.
ApplyCrdPadding | This function applys default Card Bus Bridge Padding.
AssignBridgeResources | Sorts, Aligns, and Programms Resources requested by devices residing behind its Parent PCI Bridge - "Brg".
AssignBusResources | Sorts, Aligns, and Programms Resources requested by devices on the PCI Bus created by the PCI Bridge - "Brg".

Built on 17:53:33 12/16/11


Functions in Alphabetical Order

B

Function | Description
BarCheckType | This helper function will check if Base Address Register(BAR) selected for PciIo operation is of valid type and has been initialized;
BridgeAddChild | Adds Pointer at the child PCI Device to the "Bridge" T_ITEM_LIST Child List Structure of the BRG_EXT. some of it's Fields

Built on 17:53:33 12/16/11


Functions in Alphabetical Order

C

Function | Description
CalculateBrgResources | The objective of this routine is to select the biggest possible Granularity/Alignment for the Bridge by adding all Child's resources of the same type together.
CheckPciCompatibility | This function will check if PCI "Device" listed in Bad PCI Device Table - gBadPciDevList[].
CheckPciDevicePath | Checks if "DevicePath" is a PCI_DEVICE_PATH.
CheckPciRomDevId | PCI Firmware Spec 3.0 defines some reserved field in PCIR Structure as Device List Pointer. This function checks additional Device IDs
CheckRootHotplug | This function will update pointer to PCI_RHPC_INFO of Bridge Type device which creates a hot plug bus. Also if "Device" creates the 'home bus' for Root HPC it will initialize Root HPC and record the HPC state;
ClearBar | Clears/zeros contents of PCI_BAR structure.
Cmp128Int | This function compares 2 128 bit integers.
Cmp128IntKR | This function compares 2 128 bit integers with respect to EFI Database Engine Key to Record comparation Routine. When search for record is conducted.
Cmp128IntRR | This function compares 2 128 bit integers with respect to EFI Database Engine Record to Record comparation Routine. When position of record gets determined.
CollectDeviceExtCap | This function will Fill out structure of PciE Ext Cap data
ComponentNameGetControllerName | This function is the one of interface functions of the OPTIONAL, EFI_COMPONENT_NAME_PROTOCOL. Suppose to retun Controller Name String. Currently returning EFI_UNSUPPORTED.
ComponentNameGetDriverName | This function is the one of interface functions of the OPTIONAL EFI_COMPONENT_NAME_PROTOCOL. Retuning Driver Name String of the PCI BUS Driver.
Configuration | Returns, using ACPI 2.0 Descriptors, resources allocated.
ConstructDeviceIoProtocol | Construct a DeviceIo protocol.
ConvertMemoryMap | This function will adjust the final GCD resource Map and convert all NonrExistant Memory resources into MMIO.
ConvertResources | Converts Resources Requested by the Devices behind the PCI Bridge of "ResType" using "ConvType" method of conversion
CopyMem | Copy PCI memory to PCI memory in bridge.
CpyItemLst | Creates a copy of T_ITEM_LST structure.
CreateRootBusData | This function will parse NusXlat Table looking for HostBridge entries (one who has Bus IN == Bus OUT) and populate gRootBusDb Structure.
CreateRootResDsc | Creates an ACPI QWORD Resource Descriptors set to reflect this "RootBrg" resource request

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Functions in Alphabetical Order

D

Function | Description
DecompressOptRom | Decompresses Option ROM Image if it is Compressed.
DeviceAttributes | Protocol Function Sets or resets PCI Device Arttributs.
DeviceIoAllocateBuffer | Allocate a buffer.
DeviceIoFlush | Flush cache lines.
DeviceIoFreeBuffer | Free a buffer.
DeviceIoIoRead | Read Io into a buffer.
DeviceIoIoWrite | Write Io from a buffer.
DeviceIoMap | Map a device address to a host address.
DeviceIoMemRead | Read memory into a buffer.
DeviceIoMemWrite | Write memory from a buffer.
DeviceIoPciDevicePath | Get a device path for a Pci Bus/Device/Function.
DeviceIoPciRead | Read Pci registers into a buffer.
DeviceIoPciWrite | Write Pci registers from a buffer.
DeviceIoUnmap | Unmap a device.
DisableBridgeDecoding | Disables PCI Bridge Decoding of ALL resources.
DisableBridgeIoDecoding | Disables PCI Bridge I/O Space Decoding.
DisableBridgeMmioDecoding | Disables PCI Bridge MMIO Space Decoding.
DisableBridgePfmmDecoding | Disables PCI Bridge Prefetchable MMIO Space Decoding.
DisableDeviceDecoding | Disables PCI Device Decoding.
DoPciNotify | This function will follow the rules of calling seqence of Platform Notify it will call: 1.Platform NotifyPhase with ChipsetEntery 2.Host Brg NotifyPhase 3.Platform NotifyPhase with ChipsetExit
DoPrepController | This function will follow the rules of calling seqence of Platform Preprocess Controller it will call: 1.Platform PreprocessController with ChipsetEntery 2.Host Brg Preprocess Controller 3.Platform PreprocessController with ChipsetExit
DoubleCheckOpRom | This function called when PciRomHdr->InitializationSize and Pcir->ImageSize has different values and Pcir->Indicator bit 7 is not set. It evaluets whch one is correct by Searching for 0x55AA signature that is must present in the beginning of next OptROM image.

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Functions in Alphabetical Order

E

Function | Description
EnableBridgeIoDecoding | Enables PCI Bridge I/O Space Decoding.
EnableBridgeMmioDecoding | Enables PCI Bridge MMIO Space Decoding.
EnableBridgePfmmDecoding | Enables PCI Bridge Prefetchable MMIO Space Decoding.
EnableDeviceDecoding | Enables PCI Device Decoding.
EnumerateAll | This is Main function to start PCI Bus Enumeration Process.
EnumerateBus | Enumerate the PCI BUSes behind the "ParentBrg" and determine how much resources nedded for all its Child devices.
ExecuteUefiRom | This function decide to launch or not UEFI compatible Option ROM

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Functions in Alphabetical Order

F

Function | Description
FindBarByType | Checks if PCI BAR register of a particular "BarType" present behind the PCI Bridge.
FindBridgeXlatEntry | Finds corresponded BusXlatTable entry for the bridge.
FindDevIrqEntry | Finds corresponded BusXlatTable entry for the bridge.
FindFirstBit | This function will find first bit Set or Reset going Left to Right.
FindPciDeviceByHandle | This function finds Pci Device by "Handle" passed
FindPciDeviceByHandleBrg | This function Searches PCI Bridge Subsystem Database to find device which have passed "Handle"
FindRbHandle | This function will finds Root Bridge Device Handle for the "Device".
FindRootXlatEntry | Finds corresponded BusXlatTable entry for the bridge.
Flush | Flush buffer used by PCI DMA Transfere.
FreeBuffer | Frees buffer
FreeResDb | This function suppore to free memory allocated for index array pool of the EFI Database Engine DATABASE.
FreeUsedResources | Cleans internal RB data and free resources allocated trough GCD.

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Functions in Alphabetical Order

G

Function | Description
GetAttributes | Get Supported and Current Root Bridge Attributes.
GetDeviceCapabilities | This function will detect PCI Device Capabilities of the Device's Command Cegister and Bridge Command register (if any).
GetHpbResPadding | This function will get and apply resource padding requirements for the PCI to PCI Bridge or Card Bus Bridge, if this Bridge is supports hot plug.
GetOptRom | Validate and copy PCI Option ROM Image From ADD ON CARD to the System Memory.
GetPciCapPtrs | This function will collect information about PCI "Device" Capability Headers (Including PCI Express, Hot Plug and PCI-X/X2) and record them.
GetRbByHandle | Lokates
GetResources | This function will generate Resource descriptors block based on information stored in RootBridge->RbRes array

Data Structure | Description
gAllocationAttributes | Root Bridge Allocation Attributes
gAmiBoardProtocol | Ami Board Info Protocol Instance.
gBadPciDevCount | Number or records in gBadPciDevList table.
gBadPciDevList | Incompatible PCI Devices List known so far.
gComponentName | Declaration of the EFI_COMPONENT_NAME_PROTOCOL
gHostCnt | Initial Global Variable to store Host Bridge Count.
gLowResType | Indicates what type of resource has Out Of Resources Condition.
gPciBusDb | Bus order Data Base if fixed bus allocation selected we need to know how many buses does this bridge suppose to decode
gPciBusDriverBinding | Extended PCI Bus Protocol instance for PciBus Driver
gPciHost | Initial Global Variable to store pointer on PCI Subsystem Host (This is very ROOT of the PCI Bus Driver Data).
gPciHost | Array of PCI Host Bridge Data Sructures. Initial data point for PCI Subsystem.
gPciIoInstance | PCI IO Protocol Instance for Child Devices of the PciBus Driver.
gPciOutOfRes | Indicates Out Of Resources Condition.
gPciSetupData | Global Setup Variable to get the setup settings pointer.
gPciSetupData | Global Setup Variable to get the setup settings pointer.

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Functions in Alphabetical Order

H

Function | Description
HbResAllocGetAllocAttributes | Returns the attributes of a PCI Root Bridge.
HbResAllocGetNextRootBridge | Return the device handle of the next PCI root bridge that is associated with this Host Bridge.
HbResAllocGetProposedResources | This function returns the proposed resource settings for the specified PCI Root Bridge
HbResAllocNotifyPhase | Enter a certain phase of the PCI enumeration process
HbResAllocPreprocessController | This function is called for all the PCI controllers that the PCI bus driver finds. Can be used to Preprogram the controller. Arguments:
HbResAllocSetBusNumbers | This function programs the PCI Root Bridge hardware so that it decodes the specified PCI bus range
HbResAllocStartBusEnumeration | This is the request from the PCI enumerator to set up the specified PCI Root Bridge for bus enumeration process.
HbResAllocSubmitResources | Submits the I/O and memory resource requirements for the specified PCI Root Bridge
HpcFindHpSlots | This function find information and initialize an instance of PCI Root Hotplug Controller Initialization Protocol.
HpcInitGetRootHpcList | GetRootHpcList() Function of the PCI Root Hotplug Controller Initialization Protocol. See PI 1.1 Spec or details
HpcInitInitializeRootHpc | InitializeRootHpc() Function of the PCI Root Hotplug Controller Initialization Protocol. See PI 1.1 Spec or details NOTE: This function call will be used to overwrite default resource Padding settings.
HpcInitProtocol | This function will collect all information HP related information and initialize an instance of PCI Root Hotplug Controller Initialization Protocol.

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Functions in Alphabetical Order

I

Function | Description
InCurVgaChain | Helper function to check if device referenced as "Dev" sits within Current VGA device parents bridges.
InitDeviceData | Initializes missing fields in PCI_DEV_INFO structure.
InitDeviceVc | This function will Init VC_DATA structure of the "Device".
InitializePCIHostBridge | This function is the entry point for PCI Root Bridge Driver. Since PCI Root Bridge Driver follows EFI 1.1 driver model in it's entry point it will initialize some global data and install EFI_DRIVER_BINDING_PROTOCOL.
InitPciDb | Creates all anckor structures and Initialize PCI Database.
InitResDb | This function suppore to initialize EFI Database Engine DATABASE with PCI_BAR pointers in decending order.
InstallEfiOpRom | Loads and Starts Native EFI PCI Option ROM.
InstallPciDevice | This function performs the following operations 1. Register Device with CORE by getting a brand new handle 2. Install PciIo Protocol Interface on This Device 3. Generates EFI_DEVICE_PPATH protocol instance for "Dev"ice 4. Installs DevicePath Protocol on Created Handle 5. If Device has Option ROM copy it to the Memory Buffer 6. If 5 is TRUE and if Opt ROM has EFI compliant Image installs Bus Override protocol.
IsFunc0 | Checks if PCI_DEV_INFO is Function 0 of PCI device.
IsFunc0OfMfDev | Checks if PCI_DEV_INFO data passed belongs to Function 0 of Multy-Functional device.
IsHpb | This function will check if "Device" passed is the Bridge Type Device with hotplug support.
IsPowerOfTwo | Checks if value passed makes "POWER OF TWO"
IsResSubmited | Will check if all root bridges belonging to the "Host" has submitted it's resources

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Functions in Alphabetical Order

K

Function | Description
KillTmr | Disables and Clear timer event to poll PCI IO and MEMORY. Arguments:

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Functions in Alphabetical Order

M

Function | Description
MakePciDevicePath | This function will take Parent DevPath and extand it with Current ""Dev", Device Path and update pointer of the "Dev->DevPath"
Map | Provide addresses required to access system memory from a DMA bus master.
MapBridgeBuses | Maps Bridge's Primary Secondary Subordinate Bus Numbers according information stored in PCI_DEV_INFO and PCI_BRG_EXT structures of the PCI Bridge.

Data Structure | Description
mMaxBusFound | Global counter of buses found.
mPicIrqSta | To make sure we are not updating entries we have updated already, we would need array of BBOLEANs to mark updated entries. NOTE: BOOLEAN Aarray [IrqRoiting Table enytries Number]

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Functions in Alphabetical Order

N

Function | Description
NewDevice | Allocats Space nedded for New PCI_Device Instance and inits some of it's Fields

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Functions in Alphabetical Order

O

Function | Description
OptimizeBrgResource | This function arrange Bridge resource request in a way it will consume a optimal amount of resources.
OptionRom | This function will detect PCI Option ROMs BAR requirements.
OvrGetDriver | PCI Bus Specific Override Protocol Get Override Driver function implementation of the PCI Bus Driver.

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Functions in Alphabetical Order

P

Function | Description
PciBusEntryPoint | This function is the entry point for PCI BUS Driver. Since PCI BUS Driver follows EFI 1.1 driver model in it's entry point it will initialize some global data and install EFI_DRIVER_BINDING_PROTOCOL.
PciBusStart | Start Function of the EFI_DRIVER_BINDING_PROTOCOL for PCI Bus Driver
PciBusStop | Stop Function of the EFI_DRIVER_BINDING_PROTOCOL for PCI Bus Driver.
PciBusSupported | Supported Function of the EFI_DRIVER_BINDING_PROTOCOL for PCI Bus Driver.
PciCfg16 | Will do PCI Configuration Space Access 16 bit width
PciCfg32 | Will do PCI Configuration Space Access 32 bit width
PciCfg64 | Will do PCI Configuration Space Access 64 bit width
PciCfg8 | Will do PCI Configuration Space Access 8 bit width
Pcie2CheckAri | This function will Enable ARI Forwarding in DownSream Port of the device passed if 1.Device referenced is an ARI device; 2.Parenting Bridge supports ARI Forwarding. 3.ARI Firvarding Setup Question Set to "Enabled"
Pcie2EnableAri | This function will Enable ARI Forwarding in DownSream Port of the device passed if 1.Device referenced is an ARI device; 2.Parenting Bridge supports ARI Forwarding. 3.ARI Firvarding Setup Question Set to "Enabled"
Pcie2GetGen2Info | This function will collect information about PCIE GEN2 Device and initialize PCIE2_DATA structure based on information collected.
Pcie2SelectComplTimeOut | This function will select appropriate Completion Timeout range from supported by the device.
Pcie2SetDevProperties | This function will Select values for DEVICE CCONTROL2 register based on Setup Settings and hardware capabilities.
Pcie2SetLnkProperties | This function will Select values for Link Control2 register on both sides of the LINK based on Setup Settings and hardware capabilities.
PcieApplyDevSettings | This function will Select values for DEVICE CONTROL register based on Setup Settings and hardware capabilities.
PcieCalcLatency | This function will calculate MAX Latency needed to exit from ome of the ASPM Sattes L0s or L1.
PcieCalcMaxPayLoad | This function will calculate MAX PayLoad Size needed to work correctly.
PcieConvertLatency | This function will convert Latency value from Values read from. PPCIe.LNK_CNT_REG to Nanoseconds and opposite.
PcieDisableLink | This function will Disable Link of DNSTREAM port referenced as "Device" based on Setup Settings and hardware STATUS. Used to disable "EMPTY" links to save some POWER or "Force" LINK to Disable state if Link can not be trained correctly.
PcieGetCaps | This function will Collect PCI Express Capabilities Data of the "Device".
PcieInitDevChain | This function will detect optimal settings and programm - MaxPayLoadSize, ReadRequestSize, ASPM settings and Virtual Channels for all devices in the PCIE Links Chain.
PcieInitLink | This function will Initialize Pcie Link on both sides starting fronm DownStream Port.
PcieInitVc | This function will Initialize "Device"'s Virtual Channel properties based on Setup Settings and hardware capabilities.
PcieIsDownStreamPort | This function will check if *PCI_DEV_INFO passed belongs to PCI Express DOWNSTREAM PORT: - RootPort of PCIe Root Complex; - DownStream Port of PCIe Switch; - PCI/PCI-X to PCIe Bridge.
PcieProbeDevice | This function will collect information about PCIE Device and initialize it based on information collected.
PcieProgramLink | This function will Program Link with provided VALUEs trained correctly.
PcieProgramPayloadUp | This function will reprogram Max Payload and Read Request Size in upstream link if initialization code founds that one of Nodes down stream has lesser Max Pay load size than currently programmed
PcieRecordBootScript | This function will create S3 Resume Boot Script for Device's Virtual Channels feature initialization if device supports Virtual Channels.
PcieRemoveEpFromLst | This function will removed Device referencesd as EndPoint from the gPcieEpLst data structure used as a database of available EndPoint devices.
PcieResetLink | This function will issue HOT RESET on a LINK referenced by "Device".
PcieRetrainLink | This function will initiate LINK training of the Down Stream Port referenced as "Device".
PcieSetAspm | This function will Select values for Link Control2 register on both sides of the LINK based on Setup Settings and hardware capabilities.
PcieSetDevProperties | This function will Select values for DEVICE CONTROL register based on Setup Settings and hardware capabilities.
PcieSetLnkProperties | This function will Select values for Link Control2 register on both sides of the LINK based on Setup Settiongs and hardware capabilities.
PcieSetSlotPower | This function will power ON or OFF PCI Express Slot
PcieSetSlotProperties | This function will Initialize SLT_CNT and SLT_STA registers of the "Device".
PcieUpdateClockPm | This function will update Device's referenced as "Func0" Clock Power Management based on Setup Settings and hardware capabilities.
PciExtApicIrqRout | Returns device's corresponded APIC IRQ routing entry from MPPCIIRQ.INC table created by the BUILD process. If function returns EFI_SUCCESS the "ApicIrqTblEntry" updated with corresponded PIC IRQ Table entry pointer. "ParentDevices" == NULL and "EntryCount"==0 Function will return EFI_NOT_FOUND if there a no entry for the Device HANDLE passed. But it will return update the array of EFI_PCI_CONFIGURATION_ADDRESS structures with PCI Addresses of parenti
PciExtClassCodes | Returns device's Class code; Sub Class code; Programing Interface and Revision Id information.
PciExtGetDevice | Locates PCI_DEV_INFO using passed PCI Device Handle or PciIo Protocol pointer.
PciExtIsCrdBrg | Checks if PciDeviceHandle, or PciIO passed belongs to PCI 2 Card Bridge device.
PciExtIsDevice | Checks if PciDeviceHandle, or PciIO passed belongs to Regular PCI device.
PciExtIsPciBrg | Checks if PciDeviceHandle, or PciIO passed belongs to PCI 2 PCI Bridge device.
PciExtIsPciExpresss | Checks if PciDeviceHandle, or PciIO passed belongs to PCI Express device.
PciExtIsPciX | Checks if PciDeviceHandle, or PciIO passed belongs to PCI Express device.
PciExtPicIrqRout | Returns device's corresponded PIC IRQ routing entry from OEMPIR.INC table created by the BUILD process. If function returns EFI_SUCCESS the "PicIrqTblEntry" updated with corresponded PIC IRQ Table entry pointer. "ParentDevices" == NULL and "EntryCount"==0 Function will return EFI_NOT_FOUND if there a no entry for the Device HANDLE passed. But it will return update the array of EFI_PCI_CONFIGURATION_ADDRESS structures with PCI Addresses of parenti
PciIoAllocateBuffer | Protocol Function Allocates a common buffer for DMA
PciIoAttributes | Protocol Function Provides Arttribute operation for the PCI device
PciIoCheckBar | This helper function will check if parameters passed to the PCI IO Protocol to read or write a PCI resources are correct.
PciIoCheckConfig | This helper function will check if parameters passed to the PCI IO Protocol to made a PCI Config Space Access are correct
PciIoConfigRead | Protocol Function Performs a PCI Configuration Read Cycle
PciIoConfigWrite | Protocol Function Performs a PCI Configuration Write Cycle
PciIoCopyMem | Protocol Function Copyes PCI Memory
PciIoFlush | Protocol Function Flushes a DMA buffer
PciIoFreeBuffer | Protocol Function Frees a common buffer
PciIoGetBarAttributes | Protocol Function Gets respective BAR Attributes
PciIoGetLocation | Protocol Function Proides Device Address on PCI BUS like Bus#, Dev#, Fun# for the device who has PciIoProtocol == "This".
PciIoIoRead | Protocol Function Performs a PCI I/O Read Cycle
PciIoIoWrite | Protocol Function Performs a PCI I/O Write Cycle
PciIoMap | Protocol Function Maps a memory region for DMA
PciIoMemRead | Protocol Function Performs a PCI Memory Read Cycle
PciIoMemWrite | Protocol Function Performs a PCI Memory Write Cycle
PciIoPollIo | Protocol Function Poll PCI IO
PciIoPollMem | Protocol Function Poll PCI Memmory
PciIoRead | Read IO into buffer.
PciIoSetBarAttributes | Protocol Function Sets respective BAR Attributes
PciIoUnmap | Protocol Function Unmaps a memory region for DMA
PciIoWrite | Write IO from buffer.
PciMemRead | Read memory IO into buffer.
PciMemWrite | Write memory IO from buffer.
PciRead | Read Pci registers into buffer.
PciRw | Provides Read and Write access to the PCI Configuration Space.
PciWrite | Write Pci registers from buffer.
PollIo | Poll IO for a value or until times out.
PollMem | Poll Memory for a value or until times out.
PopulateBusDb | Fills gPciBusDb Array in ascending order.
ProbeSriovDevice | This function will collect information about SRIOV PCIE Device and initialize it based on information collected.
ProgramBar | Programm PCI BAR Register with the Resource Address provided by the "bar" parameter.

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Functions in Alphabetical Order

Q

Function | Description
QueryPciDevice | This function will collect all possible data about PCI Device.

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Functions in Alphabetical Order

R

Function | Description
RbReadyToBoot | This function will create ReadyToBoot Event to update each Root Bridge ASL Object with corresponded resources decoded.
RecordPriVgaBootScript | This function will create S3 Resume Boot Script for Device's on the path of primary VGA Device inclusive.
RemoveUnusedIrqEntries | Removes IRQ routing entries which got there by porting mistake in order not to confuse other consumers of AmiBoardInfoProtocol...
ResetDevicePm | This function will turn off SMI generation on PCI PME and put device in to D0 state, if device has PM capability.
RestoreBridgeBuses | This function will Reprogram Primary Secondary and Subordinate bus numbers for the downsteram bridges after SEC BUS reset signal assertion.

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Functions in Alphabetical Order

S

Function | Description
SaveBars | This function will create S3 Resume Boot Script for Device's BAR Registers.
SaveDevice | This function will create S3 Resume Boot Script for Device's other than BAR Registers.
SetIdeDevMode | This function will Change IDE Device Mode LEGACY/NATIVE
SetResources | This function will update RootBridge->RbRes array with Descriptors prowided with *Resources parameter
SetSubBus | Programm SubordinateBusNumber Register of PCI Bridge.
SetTmr | Enables timer event to poll PCI IO and MEMORY. Arguments:
StartPciChildDevice | Starts PCI Devices Behind the Bridge. (Called recoursively) This function performs the following operations 1. Register Device with CORE by getting a brand new handle 2. Install PciIo Protocol Interface on This Device 3. Generates EFI_DEVICE_PPATH protocol instance for "Dev"ice 4. Installs DevicePath Protocol on Created Handle 5. If Device has Option ROM copy it to the Memory Buffer 6. If 5 is TRUE and if Opt ROM has EFI compliant Image installs Bus Override protocol.
StartPciDevices | Installs PCI Io Protocol Instance on all or some PCI Devices in the System
StopPciDevice | Stops PCI Device referenced as "Dev". Called From StopPciDeviceBrg() function.
StopPciDeviceBrg | Stops - Uninstalls PCI Io Protocol Instance from PCI Devices behind the PCI Bridge referenced as "Brg"

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Functions in Alphabetical Order

U

Function | Description
Unmap | Remove mapping
UpdateItqTbl | Updtaes all matching entries in Irqrouting tables with runtime values.

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General Information


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