summaryrefslogtreecommitdiff
path: root/ReferenceCode/Chipset/SystemAgent/MemoryInit/Pei/MemInfoHob.h
blob: 0ce1f9055be125b60039ddb3c90b8fb1beb73bb2 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
/** @file
  This file contains definitions required for creation of
  Memory Info hob.

@copyright
  Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved
  This software and associated documentation (if any) is furnished
  under a license and may only be used or copied in accordance
  with the terms of the license. Except as permitted by such
  license, no part of this software or documentation may be
  reproduced, stored in a retrieval system, or transmitted in any
  form or by any means without the express written consent of
  Intel Corporation.

  This file contains an 'Intel Peripheral Driver' and uniquely
  identified as "Intel Reference Module" and is
  licensed for Intel CPUs and chipsets under the terms of your
  license agreement with Intel or your vendor.  This file may
  be modified by the user, subject to additional terms of the
  license agreement.
**/

///
/// @todo: Delete #define's and use definitions from SaCommonDefitions.h
///
#ifndef _MEM_HOB_H_
#define _MEM_HOB_H_
#pragma pack (push, 1)

#include "MrcGlobal.h"

#define EFI_MEMORY_RESTORE_DATA_GUID \
  {0x87f22dcb,0x7304,0x4105,0xbb,0x7c,0x31,0x71,0x43,0xcc,0xc2,0x3b }

#define MAX_NODE        1
#define MAX_CH          2
#define MAX_DIMM        2

#define DDR3_FREQ_AUTO  0
#define DDR3_FREQ_800   1
#define DDR3_FREQ_1000  2
#define DDR3_FREQ_1067  3
#define DDR3_FREQ_1200  4
#define DDR3_FREQ_1333  5
#define DDR3_FREQ_1400  6
#define DDR3_FREQ_1600  7
#define DDR3_FREQ_1800  8
#define DDR3_FREQ_1867  9
#define DDR3_FREQ_2000  10
#define DDR3_FREQ_2133  11
#define DDR3_FREQ_2200  12
#define DDR3_FREQ_2400  13
#define DDR3_FREQ_2600  14
#define DDR3_FREQ_2667  15

///
/// Host reset states from MRC.
///
#define  WARM_BOOT        2

#define MCPciD4F0RegBase  PCIEX_BASE_ADDRESS + (UINT32) (((PCIEX_LENGTH >> 20) - 1) << 20) + (UINT32) (4 << 15) + (UINT32) (0 << 12)
#define MCPciD5F0RegBase  PCIEX_BASE_ADDRESS + (UINT32) (((PCIEX_LENGTH >> 20) - 1) << 20) + (UINT32) (5 << 15) + (UINT32) (0 << 12)

#define R_MC_CHNL_RANK_PRESENT  0x7C
#define   B_RANK0_PRS           BIT0
#define   B_RANK1_PRS           BIT1
#define   B_RANK2_PRS           BIT4
#define   B_RANK3_PRS           BIT5

#ifndef _PEI_HOB_H_
#ifndef __HOB__H__
typedef struct _EFI_HOB_GENERIC_HEADER {
  UINT16  HobType;
  UINT16  HobLength;
  UINT32  Reserved;
} EFI_HOB_GENERIC_HEADER;

typedef struct _EFI_HOB_GUID_TYPE {
  EFI_HOB_GENERIC_HEADER  Header;
  EFI_GUID                Name;
  ///
  /// Guid specific data goes here
  ///
} EFI_HOB_GUID_TYPE;
#endif
#endif
///
/// HOB to save MRC Output data and Memory S3_RestoreData
///
#define MRC_HOB_SIZE_TOTAL  (63 * 1024)
#if ((defined SSA_FLAG) || (defined MRC_DEBUG_PRINT))
#define MRC_HOB_SIZE_BUFFER (MRC_HOB_SIZE_TOTAL - sizeof (EFI_HOB_GUID_TYPE) - sizeof (MrcParameters))
#else
#define MRC_HOB_SIZE_BUFFER (1)
#endif
typedef struct {
  EFI_HOB_GUID_TYPE EfiHobGuidType;
  MrcParameters     MrcData;
  UINT8             Buffer[MRC_HOB_SIZE_BUFFER];
} HOB_SAVE_MEMORY_DATA;

#pragma pack (pop)
#endif