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authorIru Cai <mytbk920423@gmail.com>2020-12-27 11:03:02 +0800
committerIru Cai <mytbk920423@gmail.com>2020-12-27 11:03:02 +0800
commitdf682c033b361d5442ae8f47de3da35c931c5452 (patch)
tree97dea15829fdedc1cf6e08be088befd6819d5706 /src
parent110a1aef72f22b0eeeabd94f4a227ea495e5fa8d (diff)
downloadbroadwell-refcode-df682c033b361d5442ae8f47de3da35c931c5452.tar.xz
add finalize_usb
Diffstat (limited to 'src')
-rw-r--r--src/usb.c64
1 files changed, 64 insertions, 0 deletions
diff --git a/src/usb.c b/src/usb.c
new file mode 100644
index 0000000..881cae6
--- /dev/null
+++ b/src/usb.c
@@ -0,0 +1,64 @@
+void finalize_ehci()
+{
+ if (pch_is_lp()) {
+ if (EHCI dev is disabled) {
+ RCBA32_OR(0x3a84, 5);
+ }
+ }
+ pch_iobp_update(0xe5004001,0xffffffff,0xc0);
+
+ if (EHCI1_DEV is disabled) {
+ pci_or_config32(EHCI1_DEV, 0xdc, 0x28);
+ } else {
+ pci_or_config32(EHCI1_DEV, 0xdc, 0x27);
+ }
+ pci_or_config32(EHCI1_DEV, 0x78, 3);
+
+ if (!pch_is_lp()) {
+ if (EHCI2_DEV is disabled) {
+ pci_or_config32(EHCI2_DEV, 0xdc, 0x28);
+ } else {
+ pci_or_config32(EHCI2_DEV, 0xdc, 0x27);
+ }
+ pci_or_config32(EHCI2_DEV, 0x78, 3);
+ }
+}
+
+void finalize_usb()
+{
+ finalize_ehci();
+
+ pch_iobp_update(0xe5004001,0xffffffff,0xc0);
+
+ uint32_t xhcc = pci_read_config32(XHCI_DEV, 0x40);
+
+ pci_write_config32(XHCI_DEV, 0x40, xhcc | 0x100);
+ /* D3IL1E | xHCIL1E | IIL1E >= 1024 bb_cclk */
+ pci_write_config8(XHCI_DEV, 0x42, ((xhcc >> 16) & 0x7f) | 0x36);
+ pci_or_config16(XHCI_DEV, 0x44, 0x288);
+
+ uint32_t orval;
+ if (!pch_is_lp()) {
+ orval = 0x40;
+ } else {
+ if (!is_wildcat_point_lp()) {
+ orval = 0x40000;
+ } else {
+ orval = 0x40040;
+ }
+ }
+
+ pci_or_config32(XHCI_DEV, 0xa0, orval);
+
+ if (!is_wildcat_point_lp()) {
+ if (!pch_is_lp()) {
+ orval = 0;
+ } else {
+ orval = 0x1800;
+ }
+ } else {
+ orval = xhcc;
+ }
+
+ pch_update_config32(XHCI_DEV, 0xa4, 0xffffdfff, orval);
+}