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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-24 08:18:26 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-28 14:36:28 +0000 |
commit | e363894d066fe33e826847b3cc4a32a04587d080 (patch) | |
tree | c8239d44ce1facec6308a4c34d945655a94a5fa4 /src/arch/riscv/tables.c | |
parent | e029c18f67f72fc5542254c58d2d4d9025f6282f (diff) | |
download | coreboot-e363894d066fe33e826847b3cc4a32a04587d080.tar.xz |
AGESA f10 vendorcode: Remove refcode sources
We never had a board in the tree that implements this.
Change-Id: Idce32a20c24e31eb52f8509d4a7cccfc24cf17cf
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21180
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/arch/riscv/tables.c')
0 files changed, 0 insertions, 0 deletions