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authorDuncan Laurie <dlaurie@chromium.org>2012-09-09 19:09:56 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-11-08 19:40:40 +0100
commitb6e97b19ae6a68556838c9801c7824302d72151f (patch)
tree0afd66b23e15ca3429134cf061f3ba9e12efc7cd /src/console/post.c
parent31409617a46c5ac6ef1a893d3c478f76ce4d7d3d (diff)
downloadcoreboot-b6e97b19ae6a68556838c9801c7824302d72151f.tar.xz
Add support for storing POST codes in CMOS
This will use 3 bytes of CMOS to keep track of the POST code for the current boot while also leaving a record of the previous boot. The active bank is switched early in the bootblock. Test: 1) clear cmos 2) reboot 3) use "mosys nvram dump" to verify that the first byte contains 0x80 and the second byte contains 0xF8 4) powerd_suspend and then resume 5) use "mosys nvram dump" to verify that the first byte contains 0x81 and the second byte contains 0xFD Change-Id: I1ee6bb2dac053018f3042ab5a0b26c435dbfd151 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1743 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/console/post.c')
-rw-r--r--src/console/post.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/console/post.c b/src/console/post.c
index be2d0e9307..ab1afcf50a 100644
--- a/src/console/post.c
+++ b/src/console/post.c
@@ -21,6 +21,7 @@
#include <arch/io.h>
#include <console/console.h>
+#include <pc80/mc146818rtc.h>
/* Write POST information */
@@ -38,6 +39,20 @@ void __attribute__((weak)) mainboard_post(uint8_t value)
#define mainboard_post(x)
#endif
+#if CONFIG_CMOS_POST
+static void cmos_post_code(u8 value)
+{
+ switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
+ case CMOS_POST_BANK_0_MAGIC:
+ cmos_write(value, CMOS_POST_BANK_0_OFFSET);
+ break;
+ case CMOS_POST_BANK_1_MAGIC:
+ cmos_write(value, CMOS_POST_BANK_1_OFFSET);
+ break;
+ }
+}
+#endif /* CONFIG_CMOS_POST */
+
void post_code(uint8_t value)
{
#if !CONFIG_NO_POST
@@ -46,6 +61,9 @@ void post_code(uint8_t value)
print_emerg_hex8(value);
print_emerg("\n");
#endif
+#if CONFIG_CMOS_POST
+ cmos_post_code(value);
+#endif
outb(value, CONFIG_POST_PORT);
#endif
mainboard_post(value);