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| author | Iru Cai <mytbk920423@gmail.com> | 2019-07-14 23:04:05 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2020-05-13 22:19:32 +0800 |
| commit | 120d1fb812f1fb3f52949b612c81ace5c72c42cc (patch) | |
| tree | 451e7b5366d3b30d6b78863e332b0de8a2dd27d0 /src/cpu/amd/pi/s3_resume.h | |
| parent | b7e37fd69e0adfec24d90b97d17dc1f42ab9aae8 (diff) | |
| download | coreboot-autoport-hsw.tar.xz | |
inteltool: Support dumping IOBP register valuesautoport-hsw
Currently only LynxPoint IOBP registers are added. The SATA IOBP
registers are found in coreboot sb/intel/lynxpoint, and the USB IOBP
registers are found in mrc.bin.
Tested with Dell Latitude E7240, which fails to read SATA_IOBP_SP*G3IR
(does LynxPoint really use them?) and reads other IOBP registers
successfully.
Change-Id: I1f11640fdff59a5317f19057476f7e48c2956ab9
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Diffstat (limited to 'src/cpu/amd/pi/s3_resume.h')
0 files changed, 0 insertions, 0 deletions