diff options
| author | Patrick Georgi <pgeorgi@google.com> | 2014-11-28 22:35:36 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2014-11-30 12:20:07 +0100 |
| commit | bd79c5eaf1f13f33c43c99657f24fa4c0330619a (patch) | |
| tree | c20d6e5e00fcf3494d1c3fdd2d84b97ae34a21ea /src/cpu | |
| parent | 1b2f2a071488bd15ce80194e85d318cd44659e54 (diff) | |
| download | coreboot-bd79c5eaf1f13f33c43c99657f24fa4c0330619a.tar.xz | |
Replace hlt() loops with halt()
Change-Id: I8486e70615f4c404a342cb86963b5357a934c41d
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7606
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/intel/haswell/romstage.c | 5 | ||||
| -rw-r--r-- | src/cpu/x86/lapic/lapic_cpu_init.c | 6 |
2 files changed, 4 insertions, 7 deletions
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index edb2fdfccf..bd2513f5e2 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -25,6 +25,7 @@ #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> +#include <halt.h> #include <lib.h> #include <timestamp.h> #include <arch/io.h> @@ -49,9 +50,7 @@ static inline void reset_system(void) { hard_reset(); - while (1) { - hlt(); - } + halt(); } /* The cache-as-ram assembly file calls romstage_main() after setting up diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c index 018924f11d..61b6bd72f7 100644 --- a/src/cpu/x86/lapic/lapic_cpu_init.c +++ b/src/cpu/x86/lapic/lapic_cpu_init.c @@ -23,10 +23,10 @@ #include <cpu/x86/cr.h> #include <cpu/x86/lapic.h> #include <delay.h> +#include <halt.h> #include <lib.h> #include <string.h> #include <console/console.h> -#include <arch/hlt.h> #include <device/device.h> #include <device/path.h> #include <smp/atomic.h> @@ -396,9 +396,7 @@ void stop_this_cpu(void) #endif } - while(1) { - hlt(); - } + halt(); } #endif |