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authorXavi Drudis Ferran <xdrudis@tinet.cat>2010-08-22 20:00:42 +0000
committerStefan Reinauer <stepan@openbios.org>2010-08-22 20:00:42 +0000
commit3bff8b523fd830925bf1c6e2398e4caec960577c (patch)
tree9c86a6ace5809c1aa7773833643b536c40fd4ea6 /src/cpu
parentaa81b69bfdaeb88899851a15acab289519e6edd1 (diff)
downloadcoreboot-3bff8b523fd830925bf1c6e2398e4caec960577c.tar.xz
I've checked Revision Guide for AMD Family10h processors (#41322) rev
3.74 June 2010 for errata 351 and it agrees with the comment on setting ForceFullT0= 000b but I believe the code didn't honor the comment. Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5736 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/model_10xxx/defaults.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/amd/model_10xxx/defaults.h b/src/cpu/amd/model_10xxx/defaults.h
index 7bf9ccb52d..2fbfbb26fc 100644
--- a/src/cpu/amd/model_10xxx/defaults.h
+++ b/src/cpu/amd/model_10xxx/defaults.h
@@ -161,7 +161,7 @@ static const struct {
/* Link Global Extended Control Register */
{ 0, 0x16C, AMD_DRBA23_RBC2, AMD_PTYPE_ALL,
- 0x00000014, 0x0000003F }, /* [15:13] ForceFullT0 = 0b,
+ 0x00000014, 0x0000E03F }, /* [15:13] ForceFullT0 = 0b,
* Set T0Time 14h per BKDG */