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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-11-24 14:12:04 -0600
committerMartin Roth <martinroth@google.com>2016-02-01 23:00:51 +0100
commit21724934d5b498f76bbe309584f4321e6f719fac (patch)
tree3a0347c68830433f9e28174c8afc485acefd0185 /src/cpu
parentbd8ab8890f58342cb1397435ed18a7e549a29daf (diff)
downloadcoreboot-21724934d5b498f76bbe309584f4321e6f719fac.tar.xz
cpu/amd/fam10h-15h: Add workaround for AMD Erratum 600
Change-Id: Ie175b5b490f77cc380536ebd737da8618d4b448b Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/13170 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/family_10h-family_15h/defaults.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/amd/family_10h-family_15h/defaults.h b/src/cpu/amd/family_10h-family_15h/defaults.h
index 3618cb8f70..88950a3314 100644
--- a/src/cpu/amd/family_10h-family_15h/defaults.h
+++ b/src/cpu/amd/family_10h-family_15h/defaults.h
@@ -270,6 +270,10 @@ static const struct {
ForceErrType = 0x0,
MultRetryErr = 0x0 */
+ /* Errata 600 */
+ { 0, 0x150, AMD_OR_B2, AMD_PTYPE_ALL,
+ 0x00000000, 0x00000e00 }, /* HtRetryCrcDatIns = 0x0 */
+
/* Errata 351
* System software should program the Link Extended Control Registers[LS2En]
* (F0x[18C:170][8]) to 0b for all links. System software should also